2019-04-22 11:31:01 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2007 - 2016 Realtek Corporation. All rights reserved. */
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2014-12-19 06:59:46 +00:00
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#define _RTL8188E_SRESET_C_
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2018-10-15 00:07:45 +00:00
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/* #include <rtl8188e_sreset.h> */
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2014-12-19 06:59:46 +00:00
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#include <rtl8188e_hal.h>
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2018-10-15 00:07:45 +00:00
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#ifdef DBG_CONFIG_ERROR_DETECT
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void rtl8188e_sreset_xmit_status_check(_adapter *padapter)
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2014-12-19 06:59:46 +00:00
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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struct sreset_priv *psrtpriv = &pHalData->srestpriv;
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unsigned long current_time;
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struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
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unsigned int diff_time;
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u32 txdma_status;
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2018-10-15 00:07:45 +00:00
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txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS);
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if (txdma_status != 0x00 && txdma_status != 0xeaeaeaea) {
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2018-11-03 19:22:43 +00:00
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RTW_INFO("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status);
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2014-12-19 06:59:46 +00:00
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rtw_hal_sreset_reset(padapter);
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}
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2018-12-22 03:55:20 +00:00
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current_time = jiffies;
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2014-12-19 06:59:46 +00:00
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2015-08-15 18:02:34 +00:00
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if (0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) {
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2014-12-19 06:59:46 +00:00
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diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time);
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if (diff_time > 2000) {
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2018-10-15 00:07:45 +00:00
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if (psrtpriv->last_tx_complete_time == 0)
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2014-12-19 06:59:46 +00:00
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psrtpriv->last_tx_complete_time = current_time;
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2015-08-15 18:27:00 +00:00
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else {
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2014-12-19 06:59:46 +00:00
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diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time);
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if (diff_time > 4000) {
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2018-10-15 00:07:45 +00:00
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u32 ability = 0;
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2014-12-19 06:59:46 +00:00
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2018-10-15 00:07:45 +00:00
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/* padapter->Wifi_Error_Status = WIFI_TX_HANG; */
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ability = rtw_phydm_ability_get(padapter);
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2018-11-03 19:22:43 +00:00
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RTW_INFO("%s tx hang %s\n", __func__,
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2018-10-15 00:07:45 +00:00
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(ability & ODM_BB_ADAPTIVITY) ? "ODM_BB_ADAPTIVITY" : "");
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2014-12-19 06:59:46 +00:00
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if (!(ability & ODM_BB_ADAPTIVITY))
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rtw_hal_sreset_reset(padapter);
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}
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}
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}
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}
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2018-10-15 00:07:45 +00:00
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2014-12-19 06:59:46 +00:00
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if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) {
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psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
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rtw_hal_sreset_reset(padapter);
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return;
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}
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}
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2018-10-15 00:07:45 +00:00
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void rtl8188e_sreset_linked_status_check(_adapter *padapter)
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2014-12-19 06:59:46 +00:00
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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struct sreset_priv *psrtpriv = &pHalData->srestpriv;
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u32 rx_dma_status = 0;
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2018-10-15 00:07:45 +00:00
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u8 fw_status = 0;
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rx_dma_status = rtw_read32(padapter, REG_RXDMA_STATUS);
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if (rx_dma_status != 0x00) {
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2018-11-03 19:22:43 +00:00
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RTW_INFO("%s REG_RXDMA_STATUS:0x%08x\n", __func__, rx_dma_status);
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2018-10-15 00:07:45 +00:00
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rtw_write32(padapter, REG_RXDMA_STATUS, rx_dma_status);
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2014-12-19 06:59:46 +00:00
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}
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2018-10-15 00:07:45 +00:00
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fw_status = rtw_read8(padapter, REG_FMETHR);
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if (fw_status != 0x00) {
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2015-08-15 18:02:34 +00:00
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if (fw_status == 1)
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2018-11-03 19:22:43 +00:00
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RTW_INFO("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !!\n", __func__, fw_status);
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2015-08-15 18:02:34 +00:00
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else if (fw_status == 2)
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2018-11-03 19:22:43 +00:00
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RTW_INFO("%s REG_FW_STATUS (0x%02x), Condition_No_Match !!\n", __func__, fw_status);
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2014-12-19 06:59:46 +00:00
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}
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if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) {
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psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
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rtw_hal_sreset_reset(padapter);
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return;
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}
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}
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2018-10-15 00:07:45 +00:00
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#endif
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