2013-05-08 21:45:39 +00:00
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#define _RTL8188E_XMIT_C_
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#include <drv_conf.h>
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#include <osdep_service.h>
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#include <drv_types.h>
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#include <rtl8188e_hal.h>
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#ifdef CONFIG_XMIT_ACK
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void dump_txrpt_ccx_88e(void *buf)
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{
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struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf;
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2013-05-25 23:35:42 +00:00
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DBG_88E("%s:\n"
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2013-05-08 21:45:39 +00:00
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"tag1:%u, pkt_num:%u, txdma_underflow:%u, int_bt:%u, int_tri:%u, int_ccx:%u\n"
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"mac_id:%u, pkt_ok:%u, bmc:%u\n"
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"retry_cnt:%u, lifetime_over:%u, retry_over:%u\n"
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"ccx_qtime:%u\n"
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"final_data_rate:0x%02x\n"
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"qsel:%u, sw:0x%03x\n"
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, __func__
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, txrpt_ccx->tag1, txrpt_ccx->pkt_num, txrpt_ccx->txdma_underflow, txrpt_ccx->int_bt, txrpt_ccx->int_tri, txrpt_ccx->int_ccx
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, txrpt_ccx->mac_id, txrpt_ccx->pkt_ok, txrpt_ccx->bmc
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2013-05-19 04:28:07 +00:00
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, txrpt_ccx->retry_cnt, txrpt_ccx->lifetime_over, txrpt_ccx->retry_over
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2013-05-08 21:45:39 +00:00
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, txrpt_ccx_qtime_88e(txrpt_ccx)
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, txrpt_ccx->final_data_rate
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, txrpt_ccx->qsel, txrpt_ccx_sw_88e(txrpt_ccx)
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);
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}
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void handle_txrpt_ccx_88e(_adapter *adapter, u8 *buf)
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{
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struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf;
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#ifdef DBG_CCX
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dump_txrpt_ccx_88e(buf);
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#endif
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if (txrpt_ccx->int_ccx) {
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if (txrpt_ccx->pkt_ok)
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rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_SUCCESS);
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else
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rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_CCX_PKT_FAIL);
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}
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}
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#endif //CONFIG_XMIT_ACK
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void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc)
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{
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u8 bDumpTxPkt;
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2013-05-26 03:02:10 +00:00
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u8 bDumpTxDesc = false;
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2013-05-08 21:45:39 +00:00
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rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DUMP_TXPKT, &(bDumpTxPkt));
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2013-05-09 04:04:25 +00:00
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if (bDumpTxPkt ==1){//dump txdesc for data frame
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2013-05-25 23:35:42 +00:00
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DBG_88E("dump tx_desc for data frame\n");
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2013-05-19 04:28:07 +00:00
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if ((frame_tag&0x0f) == DATA_FRAMETAG){
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2013-05-26 03:02:10 +00:00
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bDumpTxDesc = true;
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2013-05-08 21:45:39 +00:00
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}
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2013-05-19 04:28:07 +00:00
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}
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2013-05-09 04:04:25 +00:00
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else if (bDumpTxPkt ==2){//dump txdesc for mgnt frame
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2013-05-25 23:35:42 +00:00
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DBG_88E("dump tx_desc for mgnt frame\n");
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2013-05-19 04:28:07 +00:00
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if ((frame_tag&0x0f) == MGNT_FRAMETAG){
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2013-05-26 03:02:10 +00:00
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bDumpTxDesc = true;
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2013-05-08 21:45:39 +00:00
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}
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2013-05-19 04:28:07 +00:00
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}
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2013-05-09 04:04:25 +00:00
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else if (bDumpTxPkt ==3){//dump early info
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2013-05-08 21:45:39 +00:00
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}
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2013-05-09 04:04:25 +00:00
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if (bDumpTxDesc){
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2013-05-08 21:45:39 +00:00
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// ptxdesc->txdw4 = cpu_to_le32(0x00001006);//RTS Rate=24M
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// ptxdesc->txdw6 = 0x6666f800;
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2013-05-25 23:35:42 +00:00
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DBG_88E("=====================================\n");
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DBG_88E("txdw0(0x%08x)\n",ptxdesc->txdw0);
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DBG_88E("txdw1(0x%08x)\n",ptxdesc->txdw1);
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DBG_88E("txdw2(0x%08x)\n",ptxdesc->txdw2);
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DBG_88E("txdw3(0x%08x)\n",ptxdesc->txdw3);
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DBG_88E("txdw4(0x%08x)\n",ptxdesc->txdw4);
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DBG_88E("txdw5(0x%08x)\n",ptxdesc->txdw5);
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DBG_88E("txdw6(0x%08x)\n",ptxdesc->txdw6);
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DBG_88E("txdw7(0x%08x)\n",ptxdesc->txdw7);
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DBG_88E("=====================================\n");
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2013-05-08 21:45:39 +00:00
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}
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}
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/*
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* Description:
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* Aggregation packets and send to hardware
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*
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* Return:
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* 0 Success
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* -1 Hardware resource(TX FIFO) not ready
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* -2 Software resource(xmitbuf) not ready
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*/
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#ifdef CONFIG_TX_EARLY_MODE
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//#define DBG_EMINFO
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2013-05-19 04:28:07 +00:00
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#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
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2013-05-08 21:45:39 +00:00
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#define EARLY_MODE_MAX_PKT_NUM 10
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#else
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#define EARLY_MODE_MAX_PKT_NUM 5
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#endif
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struct EMInfo{
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2013-05-19 04:28:07 +00:00
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u8 EMPktNum;
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2013-05-08 21:45:39 +00:00
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u16 EMPktLen[EARLY_MODE_MAX_PKT_NUM];
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};
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void
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InsertEMContent_8188E(
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struct EMInfo *pEMInfo,
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IN pu1Byte VirtualAddress)
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{
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#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
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u1Byte index=0;
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u4Byte dwtmp=0;
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#endif
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_rtw_memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE);
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2013-05-09 04:04:25 +00:00
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if (pEMInfo->EMPktNum==0)
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2013-05-08 21:45:39 +00:00
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return;
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#ifdef DBG_EMINFO
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{
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int i;
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2013-05-25 23:35:42 +00:00
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DBG_88E("\n%s ==> pEMInfo->EMPktNum =%d\n",__func__,pEMInfo->EMPktNum);
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2013-05-09 04:04:25 +00:00
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for (i=0;i< EARLY_MODE_MAX_PKT_NUM;i++){
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2013-05-25 23:35:42 +00:00
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DBG_88E("%s ==> pEMInfo->EMPktLen[%d] =%d\n",__func__,i,pEMInfo->EMPktLen[i]);
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2013-05-08 21:45:39 +00:00
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}
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}
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#endif
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2013-05-19 04:28:07 +00:00
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2013-05-08 21:45:39 +00:00
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#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
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SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
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2013-05-09 04:04:25 +00:00
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if (pEMInfo->EMPktNum == 1){
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2013-05-08 21:45:39 +00:00
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dwtmp = pEMInfo->EMPktLen[0];
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}else{
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dwtmp = pEMInfo->EMPktLen[0];
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dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
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dwtmp += pEMInfo->EMPktLen[1];
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}
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SET_EARLYMODE_LEN0(VirtualAddress, dwtmp);
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2013-05-09 04:04:25 +00:00
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if (pEMInfo->EMPktNum <= 3){
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2013-05-08 21:45:39 +00:00
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dwtmp = pEMInfo->EMPktLen[2];
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}else{
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dwtmp = pEMInfo->EMPktLen[2];
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dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
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dwtmp += pEMInfo->EMPktLen[3];
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}
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SET_EARLYMODE_LEN1(VirtualAddress, dwtmp);
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2013-05-09 04:04:25 +00:00
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if (pEMInfo->EMPktNum <= 5){
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2013-05-08 21:45:39 +00:00
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dwtmp = pEMInfo->EMPktLen[4];
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}else{
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dwtmp = pEMInfo->EMPktLen[4];
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dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
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dwtmp += pEMInfo->EMPktLen[5];
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}
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SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp&0xF);
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SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp>>4);
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2013-05-09 04:04:25 +00:00
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if (pEMInfo->EMPktNum <= 7){
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2013-05-08 21:45:39 +00:00
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dwtmp = pEMInfo->EMPktLen[6];
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}else{
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dwtmp = pEMInfo->EMPktLen[6];
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dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
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dwtmp += pEMInfo->EMPktLen[7];
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}
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SET_EARLYMODE_LEN3(VirtualAddress, dwtmp);
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2013-05-09 04:04:25 +00:00
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if (pEMInfo->EMPktNum <= 9){
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2013-05-08 21:45:39 +00:00
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dwtmp = pEMInfo->EMPktLen[8];
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}else{
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dwtmp = pEMInfo->EMPktLen[8];
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dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
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dwtmp += pEMInfo->EMPktLen[9];
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}
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SET_EARLYMODE_LEN4(VirtualAddress, dwtmp);
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2013-05-19 04:28:07 +00:00
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#else
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2013-05-08 21:45:39 +00:00
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SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
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SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]);
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SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]);
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SET_EARLYMODE_LEN2_1(VirtualAddress, pEMInfo->EMPktLen[2]&0xF);
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SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2]>>4);
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SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]);
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SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]);
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2013-05-19 04:28:07 +00:00
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#endif
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2013-05-08 21:45:39 +00:00
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//RT_PRINT_DATA(COMP_SEND, DBG_LOUD, "EMHdr:", VirtualAddress, 8);
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}
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void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf )
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{
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//_adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq
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int index,j;
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u16 offset,pktlen;
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PTXDESC ptxdesc;
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2013-05-19 04:28:07 +00:00
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2013-05-08 21:45:39 +00:00
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u8 *pmem,*pEMInfo_mem;
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s8 node_num_0=0,node_num_1=0;
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struct EMInfo eminfo;
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struct agg_pkt_info *paggpkt;
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2013-05-19 04:28:07 +00:00
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struct xmit_frame *pframe = (struct xmit_frame*)pxmitbuf->priv_data;
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pmem= pframe->buf_addr;
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#ifdef DBG_EMINFO
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2013-05-25 23:35:42 +00:00
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DBG_88E("\n%s ==> agg_num:%d\n",__func__, pframe->agg_num);
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2013-05-09 04:04:25 +00:00
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for (index=0;index<pframe->agg_num;index++){
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2013-05-19 04:28:07 +00:00
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offset = pxmitpriv->agg_pkt[index].offset;
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2013-05-08 21:45:39 +00:00
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pktlen = pxmitpriv->agg_pkt[index].pkt_len;
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2013-05-25 23:35:42 +00:00
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DBG_88E("%s ==> agg_pkt[%d].offset=%d\n",__func__,index,offset);
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DBG_88E("%s ==> agg_pkt[%d].pkt_len=%d\n",__func__,index,pktlen);
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2013-05-08 21:45:39 +00:00
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}
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#endif
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2013-05-19 04:28:07 +00:00
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2013-05-09 04:04:25 +00:00
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if ( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM)
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2013-05-19 04:28:07 +00:00
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{
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2013-05-08 21:45:39 +00:00
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node_num_0 = pframe->agg_num;
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node_num_1= EARLY_MODE_MAX_PKT_NUM-1;
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}
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2013-05-19 04:28:07 +00:00
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2013-05-09 04:04:25 +00:00
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for (index=0;index<pframe->agg_num;index++){
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2013-05-08 21:45:39 +00:00
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offset = pxmitpriv->agg_pkt[index].offset;
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2013-05-19 04:28:07 +00:00
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pktlen = pxmitpriv->agg_pkt[index].pkt_len;
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2013-05-08 21:45:39 +00:00
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_rtw_memset(&eminfo,0,sizeof(struct EMInfo));
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2013-05-09 04:04:25 +00:00
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if ( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM){
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if (node_num_0 > EARLY_MODE_MAX_PKT_NUM){
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2013-05-08 21:45:39 +00:00
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eminfo.EMPktNum = EARLY_MODE_MAX_PKT_NUM;
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node_num_0--;
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}
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else{
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eminfo.EMPktNum = node_num_1;
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2013-05-19 04:28:07 +00:00
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node_num_1--;
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}
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2013-05-08 21:45:39 +00:00
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}
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else{
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2013-05-19 04:28:07 +00:00
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eminfo.EMPktNum = pframe->agg_num-(index+1);
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}
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2013-05-09 04:04:25 +00:00
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for (j=0;j< eminfo.EMPktNum ;j++){
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2013-05-08 21:45:39 +00:00
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eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index+1+j].pkt_len+4;// 4 bytes CRC
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}
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2013-05-19 04:28:07 +00:00
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2013-05-09 04:04:25 +00:00
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if (pmem){
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if (index==0){
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2013-05-08 21:45:39 +00:00
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ptxdesc = (PTXDESC)(pmem);
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2013-05-19 04:28:07 +00:00
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pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE;
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2013-05-08 21:45:39 +00:00
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}
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else{
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pmem = pmem + pxmitpriv->agg_pkt[index-1].offset;
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ptxdesc = (PTXDESC)(pmem);
|
2013-05-19 04:28:07 +00:00
|
|
|
pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE;
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2013-05-19 04:28:07 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
#ifdef DBG_EMINFO
|
2013-05-25 23:35:42 +00:00
|
|
|
DBG_88E("%s ==> desc.pkt_len=%d\n",__func__,ptxdesc->pktlen);
|
2013-05-08 21:45:39 +00:00
|
|
|
#endif
|
|
|
|
InsertEMContent_8188E(&eminfo,pEMInfo_mem);
|
2013-05-19 04:28:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
}
|
2013-05-08 21:45:39 +00:00
|
|
|
_rtw_memset(pxmitpriv->agg_pkt,0,sizeof(struct agg_pkt_info)*MAX_AGG_PKT_NUM);
|
|
|
|
|
|
|
|
}
|
|
|
|
#endif
|