2013-05-08 21:45:39 +00:00
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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2014-12-19 06:59:46 +00:00
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*
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2013-05-08 21:45:39 +00:00
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef _RTW_MP_H_
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#define _RTW_MP_H_
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2014-12-11 21:15:04 +00:00
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// 00 - Success
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// 11 - Error
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2013-05-08 21:45:39 +00:00
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#define STATUS_SUCCESS (0x00000000L)
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#define STATUS_PENDING (0x00000103L)
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#define STATUS_UNSUCCESSFUL (0xC0000001L)
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#define STATUS_INSUFFICIENT_RESOURCES (0xC000009AL)
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#define STATUS_NOT_SUPPORTED (0xC00000BBL)
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2014-12-11 21:15:04 +00:00
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#define NDIS_STATUS_SUCCESS ((NDIS_STATUS)STATUS_SUCCESS)
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#define NDIS_STATUS_PENDING ((NDIS_STATUS)STATUS_PENDING)
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#define NDIS_STATUS_NOT_RECOGNIZED ((NDIS_STATUS)0x00010001L)
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#define NDIS_STATUS_NOT_COPIED ((NDIS_STATUS)0x00010002L)
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#define NDIS_STATUS_NOT_ACCEPTED ((NDIS_STATUS)0x00010003L)
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#define NDIS_STATUS_CALL_ACTIVE ((NDIS_STATUS)0x00010007L)
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#define NDIS_STATUS_FAILURE ((NDIS_STATUS)STATUS_UNSUCCESSFUL)
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#define NDIS_STATUS_RESOURCES ((NDIS_STATUS)STATUS_INSUFFICIENT_RESOURCES)
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#define NDIS_STATUS_CLOSING ((NDIS_STATUS)0xC0010002L)
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#define NDIS_STATUS_BAD_VERSION ((NDIS_STATUS)0xC0010004L)
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#define NDIS_STATUS_BAD_CHARACTERISTICS ((NDIS_STATUS)0xC0010005L)
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#define NDIS_STATUS_ADAPTER_NOT_FOUND ((NDIS_STATUS)0xC0010006L)
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#define NDIS_STATUS_OPEN_FAILED ((NDIS_STATUS)0xC0010007L)
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#define NDIS_STATUS_DEVICE_FAILED ((NDIS_STATUS)0xC0010008L)
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#define NDIS_STATUS_MULTICAST_FULL ((NDIS_STATUS)0xC0010009L)
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#define NDIS_STATUS_MULTICAST_EXISTS ((NDIS_STATUS)0xC001000AL)
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#define NDIS_STATUS_MULTICAST_NOT_FOUND ((NDIS_STATUS)0xC001000BL)
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#define NDIS_STATUS_REQUEST_ABORTED ((NDIS_STATUS)0xC001000CL)
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#define NDIS_STATUS_RESET_IN_PROGRESS ((NDIS_STATUS)0xC001000DL)
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#define NDIS_STATUS_CLOSING_INDICATING ((NDIS_STATUS)0xC001000EL)
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#define NDIS_STATUS_NOT_SUPPORTED ((NDIS_STATUS)STATUS_NOT_SUPPORTED)
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#define NDIS_STATUS_INVALID_PACKET ((NDIS_STATUS)0xC001000FL)
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#define NDIS_STATUS_OPEN_LIST_FULL ((NDIS_STATUS)0xC0010010L)
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#define NDIS_STATUS_ADAPTER_NOT_READY ((NDIS_STATUS)0xC0010011L)
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#define NDIS_STATUS_ADAPTER_NOT_OPEN ((NDIS_STATUS)0xC0010012L)
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#define NDIS_STATUS_NOT_INDICATING ((NDIS_STATUS)0xC0010013L)
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#define NDIS_STATUS_INVALID_LENGTH ((NDIS_STATUS)0xC0010014L)
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#define NDIS_STATUS_INVALID_DATA ((NDIS_STATUS)0xC0010015L)
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#define NDIS_STATUS_BUFFER_TOO_SHORT ((NDIS_STATUS)0xC0010016L)
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#define NDIS_STATUS_INVALID_OID ((NDIS_STATUS)0xC0010017L)
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#define NDIS_STATUS_ADAPTER_REMOVED ((NDIS_STATUS)0xC0010018L)
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#define NDIS_STATUS_UNSUPPORTED_MEDIA ((NDIS_STATUS)0xC0010019L)
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#define NDIS_STATUS_GROUP_ADDRESS_IN_USE ((NDIS_STATUS)0xC001001AL)
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#define NDIS_STATUS_FILE_NOT_FOUND ((NDIS_STATUS)0xC001001BL)
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#define NDIS_STATUS_ERROR_READING_FILE ((NDIS_STATUS)0xC001001CL)
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#define NDIS_STATUS_ALREADY_MAPPED ((NDIS_STATUS)0xC001001DL)
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#define NDIS_STATUS_RESOURCE_CONFLICT ((NDIS_STATUS)0xC001001EL)
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#define NDIS_STATUS_NO_CABLE ((NDIS_STATUS)0xC001001FL)
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#define NDIS_STATUS_INVALID_SAP ((NDIS_STATUS)0xC0010020L)
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#define NDIS_STATUS_SAP_IN_USE ((NDIS_STATUS)0xC0010021L)
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#define NDIS_STATUS_INVALID_ADDRESS ((NDIS_STATUS)0xC0010022L)
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#define NDIS_STATUS_VC_NOT_ACTIVATED ((NDIS_STATUS)0xC0010023L)
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#define NDIS_STATUS_DEST_OUT_OF_ORDER ((NDIS_STATUS)0xC0010024L) // cause 27
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#define NDIS_STATUS_VC_NOT_AVAILABLE ((NDIS_STATUS)0xC0010025L) // cause 35,45
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#define NDIS_STATUS_CELLRATE_NOT_AVAILABLE ((NDIS_STATUS)0xC0010026L) // cause 37
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#define NDIS_STATUS_INCOMPATABLE_QOS ((NDIS_STATUS)0xC0010027L) // cause 49
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#define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED ((NDIS_STATUS)0xC0010028L) // cause 93
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#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((NDIS_STATUS)0xC0010029L) // cause 3
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typedef enum _ANTENNA_PATH{
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ANTENNA_NONE = 0x00,
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ANTENNA_D ,
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ANTENNA_C ,
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ANTENNA_CD ,
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ANTENNA_B ,
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ANTENNA_BD ,
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ANTENNA_BC ,
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2014-12-19 06:59:46 +00:00
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ANTENNA_BCD ,
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2014-12-11 21:15:04 +00:00
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ANTENNA_A ,
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ANTENNA_AD ,
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ANTENNA_AC ,
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2014-12-19 06:59:46 +00:00
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ANTENNA_ACD ,
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2014-12-11 21:15:04 +00:00
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ANTENNA_AB ,
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2014-12-19 06:59:46 +00:00
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ANTENNA_ABD ,
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ANTENNA_ABC ,
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ANTENNA_ABCD
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2014-12-11 21:15:04 +00:00
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} ANTENNA_PATH;
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2014-12-19 06:59:46 +00:00
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#define MAX_MP_XMITBUF_SZ 2048
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2013-05-08 21:45:39 +00:00
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#define NR_MP_XMITFRAME 8
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2014-12-11 21:15:04 +00:00
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struct mp_xmit_frame
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{
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_list list;
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2013-05-08 21:45:39 +00:00
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struct pkt_attrib attrib;
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2014-12-11 21:15:04 +00:00
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_pkt *pkt;
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2013-05-08 21:45:39 +00:00
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int frame_tag;
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2014-12-11 21:15:04 +00:00
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2014-12-17 23:13:53 +00:00
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struct adapter *padapter;
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2014-12-11 21:15:04 +00:00
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//insert urb, irp, and irpcnt info below...
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//max frag_cnt = 8
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2013-05-08 21:45:39 +00:00
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u8 *mem_addr;
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u32 sz[8];
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2014-12-11 21:15:04 +00:00
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PURB pxmit_urb[8];
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2013-05-08 21:45:39 +00:00
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u8 bpending[8];
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2014-12-11 21:15:04 +00:00
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sint ac_tag[8];
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sint last[8];
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2013-05-08 21:45:39 +00:00
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uint irpcnt;
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uint fragcnt;
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2014-12-11 21:15:04 +00:00
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2013-05-08 21:45:39 +00:00
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uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
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};
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2014-12-11 21:15:04 +00:00
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struct mp_wiparam
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{
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2013-05-08 21:45:39 +00:00
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u32 bcompleted;
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u32 act_type;
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u32 io_offset;
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u32 io_value;
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};
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2014-12-11 21:15:04 +00:00
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typedef void(*wi_act_func)(void* padapter);
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struct mp_tx
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{
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2013-05-08 21:45:39 +00:00
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u8 stop;
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u32 count, sended;
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u8 payload;
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struct pkt_attrib attrib;
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struct tx_desc desc;
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u8 *pallocated_buf;
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u8 *buf;
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u32 buf_size, write_size;
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2014-12-11 21:15:04 +00:00
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_thread_hdl_ PktTxThread;
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2013-05-08 21:45:39 +00:00
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};
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#include <Hal8188EPhyCfg.h>
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#define MP_MAX_LINES 1000
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#define MP_MAX_LINES_BYTES 256
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2014-12-11 21:15:04 +00:00
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#define ULONG u32
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#define PULONG u32*
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2013-05-19 04:28:07 +00:00
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2014-12-11 21:15:04 +00:00
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2015-03-13 17:06:38 +00:00
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typedef void (*MPT_WORK_ITEM_HANDLER)(void * Adapter);
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2014-12-11 21:15:04 +00:00
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typedef struct _MPT_CONTEXT
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{
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// Indicate if we have started Mass Production Test.
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2015-03-02 23:21:23 +00:00
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bool bMassProdTest;
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2014-12-11 21:15:04 +00:00
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// Indicate if the driver is unloading or unloaded.
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2015-03-02 23:21:23 +00:00
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bool bMptDrvUnload;
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2014-12-11 21:15:04 +00:00
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_sema MPh2c_Sema;
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_timer MPh2c_timeout_timer;
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// Event used to sync H2c for BT control
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2015-03-02 23:21:23 +00:00
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bool MptH2cRspEvent;
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bool MptBtC2hEvent;
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bool bMPh2c_timeout;
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2014-12-19 06:59:46 +00:00
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2013-05-08 21:45:39 +00:00
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/* 8190 PCI does not support NDIS_WORK_ITEM. */
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2014-12-11 21:15:04 +00:00
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// Work Item for Mass Production Test.
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//NDIS_WORK_ITEM MptWorkItem;
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// RT_WORK_ITEM MptWorkItem;
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// Event used to sync the case unloading driver and MptWorkItem is still in progress.
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// NDIS_EVENT MptWorkItemEvent;
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// To protect the following variables.
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// NDIS_SPIN_LOCK MptWorkItemSpinLock;
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// Indicate a MptWorkItem is scheduled and not yet finished.
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2015-03-02 23:21:23 +00:00
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bool bMptWorkItemInProgress;
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2014-12-11 21:15:04 +00:00
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// An instance which implements function and context of MptWorkItem.
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2013-05-08 21:45:39 +00:00
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MPT_WORK_ITEM_HANDLER CurrMptAct;
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2014-12-11 21:15:04 +00:00
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// 1=Start, 0=Stop from UI.
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ULONG MptTestStart;
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// _TEST_MODE, defined in MPT_Req2.h
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ULONG MptTestItem;
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// Variable needed in each implementation of CurrMptAct.
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2014-12-19 06:59:46 +00:00
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ULONG MptActType; // Type of action performed in CurrMptAct.
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2014-12-11 21:15:04 +00:00
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// The Offset of IO operation is depend of MptActType.
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ULONG MptIoOffset;
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// The Value of IO operation is depend of MptActType.
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ULONG MptIoValue;
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// The RfPath of IO operation is depend of MptActType.
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ULONG MptRfPath;
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WIRELESS_MODE MptWirelessModeToSw; // Wireless mode to switch.
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2014-12-19 06:59:46 +00:00
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u8 MptChannelToSw; // Channel to switch.
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u8 MptInitGainToSet; // Initial gain to set.
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2015-03-02 23:25:27 +00:00
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//ULONG bMptAntennaA; // true if we want to use antenna A.
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2014-12-11 21:15:04 +00:00
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ULONG MptBandWidth; // bandwidth to switch.
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ULONG MptRateIndex; // rate index.
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// Register value kept for Single Carrier Tx test.
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u8 btMpCckTxPower;
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// Register value kept for Single Carrier Tx test.
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u8 btMpOfdmTxPower;
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// For MP Tx Power index
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u8 TxPwrLevel[2]; // rf-A, rf-B
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// Content of RCR Regsiter for Mass Production Test.
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ULONG MptRCR;
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2015-03-02 23:25:27 +00:00
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// true if we only receive packets with specific pattern.
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2015-03-02 23:21:23 +00:00
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bool bMptFilterPattern;
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2014-12-19 06:59:46 +00:00
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// Rx OK count, statistics used in Mass Production Test.
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ULONG MptRxOkCnt;
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// Rx CRC32 error count, statistics used in Mass Production Test.
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ULONG MptRxCrcErrCnt;
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2014-12-11 21:15:04 +00:00
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2015-03-02 23:25:27 +00:00
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bool bCckContTx; // true if we are in CCK Continuous Tx test.
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bool bOfdmContTx; // true if we are in OFDM Continuous Tx test.
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bool bStartContTx; // true if we have start Continuous Tx test.
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// true if we are in Single Carrier Tx test.
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2015-03-02 23:21:23 +00:00
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bool bSingleCarrier;
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2015-03-02 23:25:27 +00:00
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// true if we are in Carrier Suppression Tx Test.
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2015-03-02 23:21:23 +00:00
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bool bCarrierSuppression;
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2015-03-02 23:25:27 +00:00
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//true if we are in Single Tone Tx test.
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2015-03-02 23:21:23 +00:00
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bool bSingleTone;
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2014-12-11 21:15:04 +00:00
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// ACK counter asked by K.Y..
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2015-03-02 23:21:23 +00:00
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bool bMptEnableAckCounter;
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2014-12-11 21:15:04 +00:00
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ULONG MptAckCounter;
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// SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~!
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2014-12-30 23:58:53 +00:00
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//s8 BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT];
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//s8 BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES];
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//s32 RfReadLine[2];
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2014-12-11 21:15:04 +00:00
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u8 APK_bound[2]; //for APK path A/path B
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2015-03-02 23:21:23 +00:00
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bool bMptIndexEven;
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2014-12-11 21:15:04 +00:00
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u8 backup0xc50;
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u8 backup0xc58;
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u8 backup0xc30;
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2014-12-19 06:59:46 +00:00
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u8 backup0x52_RF_A;
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u8 backup0x52_RF_B;
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2014-12-30 23:50:44 +00:00
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u8 h2cReqNum;
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u8 c2hBuf[20];
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2014-12-11 21:15:04 +00:00
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2014-12-30 23:50:44 +00:00
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u8 btInBuf[100];
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2014-12-11 21:15:04 +00:00
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ULONG mptOutLen;
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2014-12-30 23:50:44 +00:00
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u8 mptOutBuf[100];
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2014-12-19 06:59:46 +00:00
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2014-12-11 21:15:04 +00:00
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}MPT_CONTEXT, *PMPT_CONTEXT;
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2014-12-19 06:59:46 +00:00
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enum {
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2013-05-08 21:45:39 +00:00
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WRITE_REG = 1,
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READ_REG,
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WRITE_RF,
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READ_RF,
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MP_START,
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MP_STOP,
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MP_RATE,
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MP_CHANNEL,
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MP_BANDWIDTH,
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MP_TXPOWER,
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MP_ANT_TX,
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|
MP_ANT_RX,
|
|
|
|
MP_CTX,
|
|
|
|
MP_QUERY,
|
|
|
|
MP_ARX,
|
|
|
|
MP_PSD,
|
|
|
|
MP_PWRTRK,
|
|
|
|
MP_THER,
|
|
|
|
MP_IOCTL,
|
|
|
|
EFUSE_GET,
|
|
|
|
EFUSE_SET,
|
|
|
|
MP_RESET_STATS,
|
|
|
|
MP_DUMP,
|
|
|
|
MP_PHYPARA,
|
|
|
|
MP_SetRFPathSwh,
|
|
|
|
MP_QueryDrvStats,
|
|
|
|
MP_SetBT,
|
|
|
|
CTA_TEST,
|
2014-12-11 21:15:04 +00:00
|
|
|
MP_DISABLE_BT_COEXIST,
|
|
|
|
MP_PwrCtlDM,
|
2013-05-08 21:45:39 +00:00
|
|
|
MP_NULL,
|
|
|
|
};
|
|
|
|
|
2015-03-02 23:03:18 +00:00
|
|
|
struct mp_priv {
|
2014-12-17 23:13:53 +00:00
|
|
|
struct adapter *papdater;
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2014-12-11 21:15:04 +00:00
|
|
|
//Testing Flag
|
|
|
|
u32 mode;//0 for normal type packet, 1 for loopback packet (16bytes TXCMD)
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
u32 prev_fw_state;
|
|
|
|
|
2014-12-11 21:15:04 +00:00
|
|
|
//OID cmd handler
|
2013-05-08 21:45:39 +00:00
|
|
|
struct mp_wiparam workparam;
|
2014-12-11 21:15:04 +00:00
|
|
|
// u8 act_in_progress;
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2014-12-11 21:15:04 +00:00
|
|
|
//Tx Section
|
2013-05-08 21:45:39 +00:00
|
|
|
u8 TID;
|
|
|
|
u32 tx_pktcount;
|
|
|
|
struct mp_tx tx;
|
|
|
|
|
2014-12-11 21:15:04 +00:00
|
|
|
//Rx Section
|
2013-05-08 21:45:39 +00:00
|
|
|
u32 rx_pktcount;
|
|
|
|
u32 rx_crcerrpktcount;
|
|
|
|
u32 rx_pktloss;
|
|
|
|
|
|
|
|
struct recv_stat rxstat;
|
|
|
|
|
2014-12-11 21:15:04 +00:00
|
|
|
//RF/BB relative
|
2013-05-08 21:45:39 +00:00
|
|
|
u8 channel;
|
|
|
|
u8 bandwidth;
|
|
|
|
u8 prime_channel_offset;
|
|
|
|
u8 txpoweridx;
|
|
|
|
u8 txpoweridx_b;
|
|
|
|
u8 rateidx;
|
|
|
|
u32 preamble;
|
|
|
|
u32 CrystalCap;
|
|
|
|
u16 antenna_tx;
|
|
|
|
u16 antenna_rx;
|
|
|
|
u8 check_mp_pkt;
|
|
|
|
u8 bSetTxPower;
|
|
|
|
struct wlan_network mp_network;
|
2015-03-14 23:14:05 +00:00
|
|
|
u8 network_macaddr[ETH_ALEN];
|
2014-12-11 21:15:04 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
u8 *pallocated_mp_xmitframe_buf;
|
|
|
|
u8 *pmp_xmtframe_buf;
|
2014-12-11 21:15:04 +00:00
|
|
|
_queue free_mp_xmitqueue;
|
2013-05-08 21:45:39 +00:00
|
|
|
u32 free_mp_xmitframe_cnt;
|
2014-12-11 21:15:04 +00:00
|
|
|
MPT_CONTEXT MptCtx;
|
2013-05-08 21:45:39 +00:00
|
|
|
};
|
|
|
|
|
2014-12-11 21:15:04 +00:00
|
|
|
typedef struct _IOCMD_STRUCT_ {
|
2013-05-08 21:45:39 +00:00
|
|
|
u8 cmdclass;
|
|
|
|
u16 value;
|
|
|
|
u8 index;
|
2014-12-11 21:15:04 +00:00
|
|
|
}IOCMD_STRUCT;
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
struct rf_reg_param {
|
|
|
|
u32 path;
|
|
|
|
u32 offset;
|
|
|
|
u32 value;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct bb_reg_param {
|
|
|
|
u32 offset;
|
|
|
|
u32 value;
|
|
|
|
};
|
2014-12-11 21:15:04 +00:00
|
|
|
//=======================================================================
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2014-12-29 02:13:24 +00:00
|
|
|
#define LOWER true
|
|
|
|
#define RAISE false
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
/* Hardware Registers */
|
|
|
|
#define BB_REG_BASE_ADDR 0x800
|
|
|
|
|
|
|
|
/* MP variables */
|
2014-12-11 21:15:04 +00:00
|
|
|
typedef enum _MP_MODE_ {
|
2013-05-08 21:45:39 +00:00
|
|
|
MP_OFF,
|
|
|
|
MP_ON,
|
|
|
|
MP_ERR,
|
|
|
|
MP_CONTINUOUS_TX,
|
|
|
|
MP_SINGLE_CARRIER_TX,
|
|
|
|
MP_CARRIER_SUPPRISSION_TX,
|
|
|
|
MP_SINGLE_TONE_TX,
|
|
|
|
MP_PACKET_TX,
|
|
|
|
MP_PACKET_RX
|
2014-12-11 21:15:04 +00:00
|
|
|
} MP_MODE;
|
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
#define MAX_RF_PATH_NUMS RF_PATH_MAX
|
|
|
|
|
2014-12-11 21:15:04 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
extern u8 mpdatarate[NumRates];
|
|
|
|
|
|
|
|
/* MP set force data rate base on the definition. */
|
2014-12-11 21:15:04 +00:00
|
|
|
typedef enum _MPT_RATE_INDEX
|
|
|
|
{
|
2013-05-08 21:45:39 +00:00
|
|
|
/* CCK rate. */
|
|
|
|
MPT_RATE_1M, /* 0 */
|
|
|
|
MPT_RATE_2M,
|
|
|
|
MPT_RATE_55M,
|
|
|
|
MPT_RATE_11M, /* 3 */
|
|
|
|
|
|
|
|
/* OFDM rate. */
|
|
|
|
MPT_RATE_6M, /* 4 */
|
|
|
|
MPT_RATE_9M,
|
|
|
|
MPT_RATE_12M,
|
|
|
|
MPT_RATE_18M,
|
|
|
|
MPT_RATE_24M,
|
|
|
|
MPT_RATE_36M,
|
|
|
|
MPT_RATE_48M,
|
|
|
|
MPT_RATE_54M, /* 11 */
|
|
|
|
|
|
|
|
/* HT rate. */
|
|
|
|
MPT_RATE_MCS0, /* 12 */
|
|
|
|
MPT_RATE_MCS1,
|
|
|
|
MPT_RATE_MCS2,
|
|
|
|
MPT_RATE_MCS3,
|
|
|
|
MPT_RATE_MCS4,
|
|
|
|
MPT_RATE_MCS5,
|
|
|
|
MPT_RATE_MCS6,
|
|
|
|
MPT_RATE_MCS7, /* 19 */
|
|
|
|
MPT_RATE_MCS8,
|
|
|
|
MPT_RATE_MCS9,
|
|
|
|
MPT_RATE_MCS10,
|
|
|
|
MPT_RATE_MCS11,
|
|
|
|
MPT_RATE_MCS12,
|
|
|
|
MPT_RATE_MCS13,
|
|
|
|
MPT_RATE_MCS14,
|
|
|
|
MPT_RATE_MCS15, /* 27 */
|
|
|
|
MPT_RATE_LAST
|
2014-12-11 21:15:04 +00:00
|
|
|
}MPT_RATE_E, *PMPT_RATE_E;
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2014-12-11 21:15:04 +00:00
|
|
|
#define MAX_TX_PWR_INDEX_N_MODE 64 // 0x3F
|
|
|
|
|
|
|
|
typedef enum _POWER_MODE_ {
|
2013-05-08 21:45:39 +00:00
|
|
|
POWER_LOW = 0,
|
|
|
|
POWER_NORMAL
|
2014-12-11 21:15:04 +00:00
|
|
|
}POWER_MODE;
|
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
#define RX_PKT_BROADCAST 1
|
|
|
|
#define RX_PKT_DEST_ADDR 2
|
|
|
|
#define RX_PKT_PHY_MATCH 3
|
|
|
|
|
2014-12-11 21:15:04 +00:00
|
|
|
typedef enum _ENCRY_CTRL_STATE_ {
|
|
|
|
HW_CONTROL, //hw encryption& decryption
|
|
|
|
SW_CONTROL, //sw encryption& decryption
|
|
|
|
HW_ENCRY_SW_DECRY, //hw encryption & sw decryption
|
|
|
|
SW_ENCRY_HW_DECRY //sw encryption & hw decryption
|
|
|
|
}ENCRY_CTRL_STATE;
|
|
|
|
|
2014-12-19 06:59:46 +00:00
|
|
|
#define Mac_OFDM_OK 0x00000000
|
|
|
|
#define Mac_OFDM_Fail 0x10000000
|
|
|
|
#define Mac_OFDM_FasleAlarm 0x20000000
|
2014-12-11 21:15:04 +00:00
|
|
|
#define Mac_CCK_OK 0x30000000
|
|
|
|
#define Mac_CCK_Fail 0x40000000
|
|
|
|
#define Mac_CCK_FasleAlarm 0x50000000
|
2014-12-19 06:59:46 +00:00
|
|
|
#define Mac_HT_OK 0x60000000
|
2014-12-11 21:15:04 +00:00
|
|
|
#define Mac_HT_Fail 0x70000000
|
2014-12-19 06:59:46 +00:00
|
|
|
#define Mac_HT_FasleAlarm 0x90000000
|
2014-12-11 21:15:04 +00:00
|
|
|
#define Mac_DropPacket 0xA0000000
|
|
|
|
|
|
|
|
//=======================================================================
|
2014-12-15 05:08:37 +00:00
|
|
|
//struct mp_xmit_frame *alloc_mp_xmitframe(struct mp_priv *pmp_priv);
|
|
|
|
//int free_mp_xmitframe(struct xmit_priv *pxmitpriv, struct mp_xmit_frame *pmp_xmitframe);
|
2014-12-11 21:15:04 +00:00
|
|
|
|
2014-12-17 23:13:53 +00:00
|
|
|
s32 init_mp_priv(struct adapter *padapter);
|
2014-12-15 05:08:37 +00:00
|
|
|
void free_mp_priv(struct mp_priv *pmp_priv);
|
2014-12-17 23:13:53 +00:00
|
|
|
s32 MPT_InitializeAdapter(struct adapter *padapter, u8 Channel);
|
|
|
|
void MPT_DeInitAdapter(struct adapter *padapter);
|
|
|
|
s32 mp_start_test(struct adapter *padapter);
|
|
|
|
void mp_stop_test(struct adapter *padapter);
|
2014-12-11 21:15:04 +00:00
|
|
|
|
|
|
|
//=======================================================================
|
2014-12-17 23:13:53 +00:00
|
|
|
|
|
|
|
u32 _read_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 bitmask);
|
|
|
|
void _write_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val);
|
|
|
|
|
|
|
|
u32 read_macreg(struct adapter *padapter, u32 addr, u32 sz);
|
|
|
|
void write_macreg(struct adapter *padapter, u32 addr, u32 val, u32 sz);
|
|
|
|
u32 read_bbreg(struct adapter *padapter, u32 addr, u32 bitmask);
|
|
|
|
void write_bbreg(struct adapter *padapter, u32 addr, u32 bitmask, u32 val);
|
2015-01-30 03:41:53 +00:00
|
|
|
u32 read_rfreg(struct adapter *padapter, RF_RADIO_PATH_E rfpath, u32 addr);
|
2014-12-17 23:13:53 +00:00
|
|
|
void write_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 val);
|
|
|
|
|
|
|
|
void SetChannel(struct adapter *pAdapter);
|
|
|
|
void SetBandwidth(struct adapter *pAdapter);
|
|
|
|
void SetTxPower(struct adapter *pAdapter);
|
|
|
|
void SetAntennaPathPower(struct adapter *pAdapter);
|
|
|
|
void SetTxAGCOffset(struct adapter *pAdapter, u32 ulTxAGCOffset);
|
|
|
|
void SetDataRate(struct adapter *pAdapter);
|
|
|
|
|
|
|
|
void SetAntenna(struct adapter *pAdapter);
|
|
|
|
|
|
|
|
//void SetCrystalCap(struct adapter *pAdapter);
|
|
|
|
|
|
|
|
s32 SetThermalMeter(struct adapter *pAdapter, u8 target_ther);
|
|
|
|
void GetThermalMeter(struct adapter *pAdapter, u8 *value);
|
|
|
|
|
|
|
|
void SetContinuousTx(struct adapter *pAdapter, u8 bStart);
|
|
|
|
void SetSingleCarrierTx(struct adapter *pAdapter, u8 bStart);
|
|
|
|
void SetSingleToneTx(struct adapter *pAdapter, u8 bStart);
|
|
|
|
void SetCarrierSuppressionTx(struct adapter *pAdapter, u8 bStart);
|
|
|
|
void PhySetTxPowerLevel(struct adapter *pAdapter);
|
|
|
|
|
|
|
|
void fill_txdesc_for_mp(struct adapter *padapter, struct tx_desc *ptxdesc);
|
|
|
|
void SetPacketTx(struct adapter *padapter);
|
|
|
|
void SetPacketRx(struct adapter *pAdapter, u8 bStartRx);
|
|
|
|
|
|
|
|
void ResetPhyRxPktCount(struct adapter *pAdapter);
|
|
|
|
u32 GetPhyRxPktReceived(struct adapter *pAdapter);
|
|
|
|
u32 GetPhyRxPktCRC32Error(struct adapter *pAdapter);
|
|
|
|
|
|
|
|
s32 SetPowerTracking(struct adapter *padapter, u8 enable);
|
|
|
|
void GetPowerTracking(struct adapter *padapter, u8 *enable);
|
|
|
|
|
|
|
|
u32 mp_query_psd(struct adapter *pAdapter, u8 *data);
|
|
|
|
|
|
|
|
|
|
|
|
void Hal_SetAntenna(struct adapter *pAdapter);
|
|
|
|
void Hal_SetBandwidth(struct adapter *pAdapter);
|
|
|
|
|
|
|
|
void Hal_SetTxPower(struct adapter *pAdapter);
|
|
|
|
void Hal_SetCarrierSuppressionTx(struct adapter *pAdapter, u8 bStart);
|
|
|
|
void Hal_SetSingleToneTx ( struct adapter *pAdapter , u8 bStart );
|
|
|
|
void Hal_SetSingleCarrierTx (struct adapter *pAdapter, u8 bStart);
|
|
|
|
void Hal_SetContinuousTx (struct adapter *pAdapter, u8 bStart);
|
|
|
|
void Hal_SetBandwidth(struct adapter *pAdapter);
|
|
|
|
|
|
|
|
void Hal_SetDataRate(struct adapter *pAdapter);
|
|
|
|
void Hal_SetChannel(struct adapter *pAdapter);
|
|
|
|
void Hal_SetAntennaPathPower(struct adapter *pAdapter);
|
|
|
|
s32 Hal_SetThermalMeter(struct adapter *pAdapter, u8 target_ther);
|
|
|
|
s32 Hal_SetPowerTracking(struct adapter *padapter, u8 enable);
|
|
|
|
void Hal_GetPowerTracking(struct adapter *padapter, u8 * enable);
|
|
|
|
void Hal_GetThermalMeter(struct adapter *pAdapter, u8 *value);
|
|
|
|
void Hal_mpt_SwitchRfSetting(struct adapter *pAdapter);
|
2015-03-02 23:21:23 +00:00
|
|
|
void Hal_MPT_CCKTxPowerAdjust(struct adapter *Adapter, bool bInCH14);
|
|
|
|
void Hal_MPT_CCKTxPowerAdjustbyIndex(struct adapter *pAdapter, bool beven);
|
2014-12-17 23:13:53 +00:00
|
|
|
void Hal_SetCCKTxPower(struct adapter *pAdapter, u8 * TxPower);
|
|
|
|
void Hal_SetOFDMTxPower(struct adapter *pAdapter, u8 * TxPower);
|
|
|
|
void Hal_TriggerRFThermalMeter(struct adapter *pAdapter);
|
|
|
|
u8 Hal_ReadRFThermalMeter(struct adapter *pAdapter);
|
|
|
|
void Hal_SetCCKContinuousTx(struct adapter *pAdapter, u8 bStart);
|
|
|
|
void SetCCKContinuousTx(struct adapter *pAdapter, u8 bStart);
|
|
|
|
void SetOFDMContinuousTx(struct adapter *pAdapter, u8 bStart);
|
|
|
|
void Hal_SetOFDMContinuousTx(struct adapter *pAdapter, u8 bStart);
|
|
|
|
void Hal_ProSetCrystalCap (struct adapter *pAdapter , u32 CrystalCapVal);
|
2014-12-15 05:08:37 +00:00
|
|
|
void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv);
|
2015-03-02 23:21:23 +00:00
|
|
|
void MP_PHY_SetRFPathSwitch(struct adapter *pAdapter ,bool bMain);
|
2014-12-17 23:13:53 +00:00
|
|
|
void MPT_PwrCtlDM(struct adapter *padapter, u32 bstart);
|
2014-12-11 21:15:04 +00:00
|
|
|
|
|
|
|
#endif //_RTW_MP_H_
|