2013-05-08 21:45:39 +00:00
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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2014-12-19 06:59:46 +00:00
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*
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2013-05-08 21:45:39 +00:00
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#define _RTL8188E_XMIT_C_
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2014-12-17 04:09:56 +00:00
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#include <drv_conf.h>
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2013-05-08 21:45:39 +00:00
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#include <osdep_service.h>
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#include <drv_types.h>
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#include <wifi.h>
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#include <osdep_intf.h>
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2014-12-17 04:09:56 +00:00
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#include <circ_buf.h>
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2013-05-08 21:45:39 +00:00
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#include <usb_ops.h>
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#include <rtl8188e_hal.h>
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2014-12-17 23:13:53 +00:00
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s32 rtl8188eu_init_xmit_priv(struct adapter *padapter)
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2013-05-08 21:45:39 +00:00
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{
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2014-12-17 04:09:56 +00:00
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struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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2013-05-08 21:45:39 +00:00
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tasklet_init(&pxmitpriv->xmit_tasklet,
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2022-11-28 20:44:00 +00:00
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(void(*))rtl8188eu_xmit_tasklet,
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2014-12-17 04:09:56 +00:00
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(unsigned long)padapter);
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2013-05-08 21:45:39 +00:00
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return _SUCCESS;
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}
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2014-12-17 23:13:53 +00:00
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void rtl8188eu_free_xmit_priv(struct adapter *padapter)
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2013-05-08 21:45:39 +00:00
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{
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}
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2015-01-28 05:14:58 +00:00
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static u8 urb_zero_packet_chk(struct adapter *padapter, int sz)
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2013-05-08 21:45:39 +00:00
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{
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2014-12-17 04:09:56 +00:00
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u8 blnSetTxDescOffset;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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2015-08-15 18:22:58 +00:00
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blnSetTxDescOffset = (((sz + TXDESC_SIZE) % pHalData->UsbBulkOutSize) == 0)?1:0;
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2014-12-19 06:59:46 +00:00
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2014-12-17 04:09:56 +00:00
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return blnSetTxDescOffset;
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2013-05-08 21:45:39 +00:00
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}
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2015-01-28 05:14:58 +00:00
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static void rtl8188eu_cal_txdesc_chksum(struct tx_desc *ptxdesc)
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2013-05-08 21:45:39 +00:00
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{
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2014-12-17 04:09:56 +00:00
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u16 *usPtr = (u16*)ptxdesc;
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2015-02-20 00:51:33 +00:00
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u32 count = 16; /* (32 bytes / 2 bytes per XOR) => 16 times */
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2014-12-17 04:09:56 +00:00
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u32 index;
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u16 checksum = 0;
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2015-02-20 00:51:33 +00:00
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/* Clear first */
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2014-12-17 04:09:56 +00:00
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ptxdesc->txdw7 &= cpu_to_le32(0xffff0000);
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2014-12-19 06:59:46 +00:00
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2015-08-15 18:24:16 +00:00
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for (index = 0 ; index < count ; index++) {
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2015-01-28 05:14:58 +00:00
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checksum = checksum ^ le16_to_cpu(*(__le16 *)(usPtr + index));
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2014-12-17 04:09:56 +00:00
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}
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2013-05-08 21:45:39 +00:00
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2014-12-19 06:59:46 +00:00
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ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff&checksum);
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2013-05-19 04:28:07 +00:00
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2013-05-08 21:45:39 +00:00
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}
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2015-02-20 00:51:33 +00:00
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/* */
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/* Description: In normal chip, we should send some packet to Hw which will be used by Fw */
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/* in FW LPS mode. The function is to fill the Tx descriptor of this packets, then */
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/* Fw can tell Hw to send these packet derectly. */
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/* */
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2014-12-17 04:09:56 +00:00
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void rtl8188e_fill_fake_txdesc(
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2014-12-17 23:13:53 +00:00
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struct adapter *padapter,
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2014-12-17 04:09:56 +00:00
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u8* pDesc,
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u32 BufferLen,
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u8 IsPsPoll,
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u8 IsBTQosNull)
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2013-05-08 21:45:39 +00:00
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{
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struct tx_desc *ptxdesc;
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2015-02-20 00:51:33 +00:00
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/* Clear all status */
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2014-12-17 04:09:56 +00:00
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ptxdesc = (struct tx_desc*)pDesc;
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2015-02-19 20:58:09 +00:00
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memset(pDesc, 0, TXDESC_SIZE);
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2014-12-17 04:09:56 +00:00
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2015-02-20 00:51:33 +00:00
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/* offset 0 */
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ptxdesc->txdw0 |= cpu_to_le32( OWN | FSG | LSG); /* own, bFirstSeg, bLastSeg; */
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2013-05-08 21:45:39 +00:00
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2015-02-20 00:51:33 +00:00
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ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000); /* 32 bytes for TX Desc */
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2013-05-08 21:45:39 +00:00
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2015-02-20 00:51:33 +00:00
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ptxdesc->txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); /* Buffer size + command header */
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2013-05-08 21:45:39 +00:00
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2015-02-20 00:51:33 +00:00
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/* offset 4 */
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ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<<QSEL_SHT)&0x00001f00); /* Fixed queue of Mgnt queue */
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2013-05-08 21:45:39 +00:00
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2015-02-20 00:51:33 +00:00
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/* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. */
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2014-12-17 04:09:56 +00:00
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if (IsPsPoll)
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{
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2013-05-08 21:45:39 +00:00
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ptxdesc->txdw1 |= cpu_to_le32(NAVUSEHDR);
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2014-12-17 04:09:56 +00:00
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}
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else
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{
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2015-02-20 00:51:33 +00:00
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ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); /* Hw set sequence number */
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ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); /* set bit3 to 1. Suugested by TimChen. 2009.12.29. */
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2013-05-08 21:45:39 +00:00
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}
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2014-12-29 02:13:24 +00:00
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if (true == IsBTQosNull)
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2014-12-17 04:09:56 +00:00
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{
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2015-02-20 00:51:33 +00:00
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ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); /* BT NULL */
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2014-12-17 04:09:56 +00:00
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}
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2013-05-08 21:45:39 +00:00
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2015-02-20 00:51:33 +00:00
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/* offset 16 */
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ptxdesc->txdw4 |= cpu_to_le32(BIT(8));/* driver uses rate */
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2013-05-08 21:45:39 +00:00
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2015-02-20 00:51:33 +00:00
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/* USB interface drop packet if the checksum of descriptor isn't correct. */
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/* Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). */
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2013-05-08 21:45:39 +00:00
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rtl8188eu_cal_txdesc_chksum(ptxdesc);
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}
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2015-01-28 05:14:58 +00:00
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static void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc)
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2013-05-08 21:45:39 +00:00
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{
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2015-01-28 05:14:58 +00:00
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if ((pattrib->encrypt > 0) && !pattrib->bswenc) {
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switch (pattrib->encrypt) {
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2015-02-20 00:51:33 +00:00
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/* SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES */
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2015-01-28 05:14:58 +00:00
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case _WEP40_:
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case _WEP104_:
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ptxdesc->txdw1 |= cpu_to_le32((0x01<<SEC_TYPE_SHT)&0x00c00000);
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ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
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break;
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case _TKIP_:
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case _TKIP_WTMIC_:
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ptxdesc->txdw1 |= cpu_to_le32((0x01<<SEC_TYPE_SHT)&0x00c00000);
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ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
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break;
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case _AES_:
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ptxdesc->txdw1 |= cpu_to_le32((0x03<<SEC_TYPE_SHT)&0x00c00000);
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ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
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break;
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case _NO_PRIVACY_:
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default:
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break;
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2013-05-08 21:45:39 +00:00
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}
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}
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}
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2015-01-28 05:14:58 +00:00
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static void fill_txdesc_vcs(struct pkt_attrib *pattrib, __le32 *pdw)
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2013-05-08 21:45:39 +00:00
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{
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2015-08-15 18:05:44 +00:00
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switch (pattrib->vcs_mode)
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2014-12-17 04:09:56 +00:00
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{
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case RTS_CTS:
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*pdw |= cpu_to_le32(RTS_EN);
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break;
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case CTS_TO_SELF:
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*pdw |= cpu_to_le32(CTS_2_SELF);
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break;
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case NONE_VCS:
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default:
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2014-12-19 06:59:46 +00:00
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break;
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2013-05-08 21:45:39 +00:00
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}
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2014-12-17 04:09:56 +00:00
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2015-08-15 18:02:34 +00:00
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if (pattrib->vcs_mode) {
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2013-05-08 21:45:39 +00:00
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*pdw |= cpu_to_le32(HW_RTS_EN);
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2014-12-17 04:09:56 +00:00
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2015-02-20 00:51:33 +00:00
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/* Set RTS BW */
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2015-08-15 18:02:34 +00:00
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if (pattrib->ht_en)
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2014-12-17 04:09:56 +00:00
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{
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*pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)? cpu_to_le32(BIT(27)):0;
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2015-08-15 18:02:34 +00:00
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if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
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2014-12-17 04:09:56 +00:00
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*pdw |= cpu_to_le32((0x01<<28)&0x30000000);
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2015-08-15 18:02:34 +00:00
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else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
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2014-12-17 04:09:56 +00:00
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*pdw |= cpu_to_le32((0x02<<28)&0x30000000);
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2015-08-15 18:02:34 +00:00
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else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
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2013-05-08 21:45:39 +00:00
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*pdw |= 0;
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else
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2014-12-17 04:09:56 +00:00
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*pdw |= cpu_to_le32((0x03<<28)&0x30000000);
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2013-05-08 21:45:39 +00:00
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}
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}
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}
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2015-01-28 05:14:58 +00:00
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static void fill_txdesc_phy(struct pkt_attrib *pattrib, __le32 *pdw)
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2013-05-08 21:45:39 +00:00
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{
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2015-02-20 00:51:33 +00:00
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/* DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); */
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2014-12-17 04:09:56 +00:00
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2015-08-15 18:02:34 +00:00
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if (pattrib->ht_en)
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2014-12-17 04:09:56 +00:00
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{
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*pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)? cpu_to_le32(BIT(25)):0;
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2015-08-15 18:02:34 +00:00
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if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
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2014-12-19 06:59:46 +00:00
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*pdw |= cpu_to_le32((0x01<<DATA_SC_SHT)&0x003f0000);
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2015-08-15 18:02:34 +00:00
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else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
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2014-12-17 04:09:56 +00:00
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*pdw |= cpu_to_le32((0x02<<DATA_SC_SHT)&0x003f0000);
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2015-08-15 18:02:34 +00:00
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else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
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2013-05-08 21:45:39 +00:00
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*pdw |= 0;
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else
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2014-12-17 04:09:56 +00:00
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*pdw |= cpu_to_le32((0x03<<DATA_SC_SHT)&0x003f0000);
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2013-05-08 21:45:39 +00:00
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}
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}
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2014-12-17 04:09:56 +00:00
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static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bagg_pkt)
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2014-12-19 06:59:46 +00:00
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{
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2015-03-10 16:18:03 +00:00
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int pull=0;
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2013-05-08 21:45:39 +00:00
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uint qsel;
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2014-12-17 04:09:56 +00:00
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u8 data_rate,pwr_status,offset;
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2014-12-17 23:13:53 +00:00
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struct adapter *padapter = pxmitframe->padapter;
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2014-12-19 06:59:46 +00:00
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struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
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2013-05-08 21:45:39 +00:00
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struct pkt_attrib *pattrib = &pxmitframe->attrib;
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2014-12-17 04:09:56 +00:00
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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2013-05-08 21:45:39 +00:00
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struct tx_desc *ptxdesc = (struct tx_desc *)pmem;
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2014-12-17 04:09:56 +00:00
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struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
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2018-08-30 18:19:58 +00:00
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struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
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2014-12-17 04:09:56 +00:00
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sint bmcst = IS_MCAST(pattrib->ra);
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#ifdef CONFIG_P2P
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struct wifidirect_info* pwdinfo = &padapter->wdinfo;
|
2015-02-20 00:51:33 +00:00
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#endif /* CONFIG_P2P */
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2014-12-17 04:09:56 +00:00
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2015-03-12 19:20:06 +00:00
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if (padapter->registrypriv.mp_mode == 0) {
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2018-08-30 18:19:58 +00:00
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if ((!bagg_pkt) &&urb_zero_packet_chk(padapter, sz== 0)) {
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2015-03-12 19:20:06 +00:00
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ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ);
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pull = 1;
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}
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2013-05-08 21:45:39 +00:00
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}
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2015-02-19 20:58:09 +00:00
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memset(ptxdesc, 0, sizeof(struct tx_desc));
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2014-12-19 06:59:46 +00:00
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2015-02-20 00:51:33 +00:00
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/* 4 offset 0 */
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2013-05-08 21:45:39 +00:00
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ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
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2015-02-20 00:51:33 +00:00
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ptxdesc->txdw0 |= cpu_to_le32(sz & 0x0000ffff);/* update TXPKTSIZE */
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2014-12-17 04:09:56 +00:00
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2014-12-19 06:59:46 +00:00
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offset = TXDESC_SIZE + OFFSET_SZ;
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2015-02-20 00:51:33 +00:00
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ptxdesc->txdw0 |= cpu_to_le32(((offset) << OFFSET_SHT) & 0x00ff0000);/* 32 bytes for TX Desc */
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2013-05-08 21:45:39 +00:00
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2014-12-17 04:09:56 +00:00
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if (bmcst) ptxdesc->txdw0 |= cpu_to_le32(BMC);
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2013-05-08 21:45:39 +00:00
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2015-03-12 19:20:06 +00:00
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|
|
if (padapter->registrypriv.mp_mode == 0) {
|
2015-08-15 18:02:34 +00:00
|
|
|
if (!bagg_pkt) {
|
|
|
|
if ((pull) && (pxmitframe->pkt_offset>0))
|
2015-03-10 16:18:03 +00:00
|
|
|
pxmitframe->pkt_offset = pxmitframe->pkt_offset -1;
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
}
|
2015-02-20 00:51:33 +00:00
|
|
|
/* pkt_offset, unit:8 bytes padding */
|
2013-05-08 21:45:39 +00:00
|
|
|
if (pxmitframe->pkt_offset > 0)
|
|
|
|
ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000);
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* driver uses rate */
|
|
|
|
ptxdesc->txdw4 |= cpu_to_le32(USERATE);/* rate control always by driver */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2015-08-15 18:02:34 +00:00
|
|
|
if ((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
|
2014-12-17 04:09:56 +00:00
|
|
|
{
|
2015-02-20 00:51:33 +00:00
|
|
|
/* DBG_8192C("pxmitframe->frame_tag == DATA_FRAMETAG\n"); */
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 4 */
|
2014-12-17 04:09:56 +00:00
|
|
|
ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x3F);
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
qsel = (uint)(pattrib->qsel & 0x0000001f);
|
2015-08-15 18:00:19 +00:00
|
|
|
/* DBG_8192C("==> macid(%d) qsel:0x%02x\n",pattrib->mac_id,qsel); */
|
2013-05-08 21:45:39 +00:00
|
|
|
ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
|
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< RATE_ID_SHT) & 0x000F0000);
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
fill_txdesc_sectype(pattrib, ptxdesc);
|
|
|
|
|
2015-08-15 18:24:16 +00:00
|
|
|
if (pattrib->ampdu_en==true) {
|
2015-02-20 00:51:33 +00:00
|
|
|
ptxdesc->txdw2 |= cpu_to_le32(AGG_EN);/* AGG EN */
|
2015-01-28 05:14:58 +00:00
|
|
|
ptxdesc->txdw6 = cpu_to_le32(0x6666f800);
|
2015-08-15 18:27:00 +00:00
|
|
|
} else {
|
2015-02-20 00:51:33 +00:00
|
|
|
ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);/* AGG BK */
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 8 */
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2013-05-19 04:28:07 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 12 */
|
2014-12-17 04:09:56 +00:00
|
|
|
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<< SEQ_SHT)&0x0FFF0000);
|
2013-05-19 04:28:07 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 16 , offset 20 */
|
2013-05-08 21:45:39 +00:00
|
|
|
if (pattrib->qos_en)
|
2015-02-20 00:51:33 +00:00
|
|
|
ptxdesc->txdw4 |= cpu_to_le32(QOS);/* QoS */
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 20 */
|
2015-08-15 18:24:16 +00:00
|
|
|
if (pxmitframe->agg_num > 1) {
|
2015-02-20 00:51:33 +00:00
|
|
|
/* DBG_8192C("%s agg_num:%d\n",__FUNCTION__,pxmitframe->agg_num ); */
|
2013-05-08 21:45:39 +00:00
|
|
|
ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << USB_TXAGG_NUM_SHT) & 0xFF000000);
|
2014-12-17 04:09:56 +00:00
|
|
|
}
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
if ((pattrib->ether_type != 0x888e) &&
|
|
|
|
(pattrib->ether_type != 0x0806) &&
|
|
|
|
(pattrib->ether_type != 0x88b4) &&
|
2014-12-17 04:09:56 +00:00
|
|
|
(pattrib->dhcp_pkt != 1))
|
|
|
|
{
|
2015-02-20 00:51:33 +00:00
|
|
|
/* Non EAP & ARP & DHCP type data packet */
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
fill_txdesc_vcs(pattrib, &ptxdesc->txdw4);
|
|
|
|
fill_txdesc_phy(pattrib, &ptxdesc->txdw4);
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
ptxdesc->txdw4 |= cpu_to_le32(0x00000008);/* RTS Rate=24M */
|
|
|
|
ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);/* DATA/RTS Rate FB LMT */
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2014-12-19 06:59:46 +00:00
|
|
|
#if (RATE_ADAPTIVE_SUPPORT == 1)
|
2015-08-15 18:24:16 +00:00
|
|
|
if (pattrib->ht_en) {
|
2015-08-15 18:02:34 +00:00
|
|
|
if ( ODM_RA_GetShortGI_8188E(&pHalData->odmpriv,pattrib->mac_id))
|
2015-02-20 00:51:33 +00:00
|
|
|
ptxdesc->txdw5 |= cpu_to_le32(SGI);/* SGI */
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2014-12-19 06:59:46 +00:00
|
|
|
|
|
|
|
data_rate =ODM_RA_GetDecisionRate_8188E(&pHalData->odmpriv,pattrib->mac_id);
|
2015-02-20 00:51:33 +00:00
|
|
|
/* for debug */
|
2015-08-15 18:24:16 +00:00
|
|
|
if (padapter->fix_rate!= 0xFF) {
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
data_rate = padapter->fix_rate;
|
|
|
|
ptxdesc->txdw4 |= cpu_to_le32(DISDATAFB);
|
|
|
|
}
|
2014-12-19 06:59:46 +00:00
|
|
|
|
|
|
|
ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F);
|
2014-12-17 04:09:56 +00:00
|
|
|
|
|
|
|
#if (POWER_TRAINING_ACTIVE==1)
|
|
|
|
pwr_status = ODM_RA_GetHwPwrStatus_8188E(&pHalData->odmpriv,pattrib->mac_id);
|
|
|
|
ptxdesc->txdw4 |=cpu_to_le32( (pwr_status & 0x7)<< PWR_STATUS_SHT);
|
2015-02-20 00:51:33 +00:00
|
|
|
#endif /* POWER_TRAINING_ACTIVE==1) */
|
|
|
|
#else/* if (RATE_ADAPTIVE_SUPPORT == 1) */
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2015-08-15 18:02:34 +00:00
|
|
|
if (pattrib->ht_en)
|
2015-02-20 00:51:33 +00:00
|
|
|
ptxdesc->txdw5 |= cpu_to_le32(SGI);/* SGI */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
data_rate = 0x13; /* default rate: MCS7 */
|
2015-08-15 18:24:16 +00:00
|
|
|
if (padapter->fix_rate!= 0xFF) {/* rate control by iwpriv */
|
2014-12-19 06:59:46 +00:00
|
|
|
data_rate = padapter->fix_rate;
|
2014-12-17 04:09:56 +00:00
|
|
|
ptxdesc->txdw4 | cpu_to_le32(DISDATAFB);
|
|
|
|
}
|
2014-12-19 06:59:46 +00:00
|
|
|
ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F);
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
#endif/* if (RATE_ADAPTIVE_SUPPORT == 1) */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2015-02-20 00:51:33 +00:00
|
|
|
/* EAP data packet and ARP packet and DHCP. */
|
|
|
|
/* Use the 1M data rate to send the EAP/ARP packet. */
|
|
|
|
/* This will maybe make the handshake smooth. */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);/* AGG BK */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
|
2015-02-20 00:51:33 +00:00
|
|
|
ptxdesc->txdw4 |= cpu_to_le32(BIT(24));/* DATA_SHORT */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
|
|
|
|
}
|
2015-08-15 18:02:34 +00:00
|
|
|
} else if ((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG) {
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 4 */
|
2014-12-17 04:09:56 +00:00
|
|
|
ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x3f);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
qsel = (uint)(pattrib->qsel&0x0000001f);
|
2014-12-17 04:09:56 +00:00
|
|
|
ptxdesc->txdw1 |= cpu_to_le32((qsel<<QSEL_SHT)&0x00001f00);
|
|
|
|
|
|
|
|
ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< RATE_ID_SHT) & 0x000f0000);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 8 */
|
|
|
|
/* CCX-TXRPT ack for xmit mgmt frames. */
|
2014-12-17 04:09:56 +00:00
|
|
|
if (pxmitframe->ack_report) {
|
|
|
|
#ifdef DBG_CCX
|
|
|
|
static u16 ccx_sw = 0x123;
|
|
|
|
ptxdesc->txdw7 |= cpu_to_le32(((ccx_sw)<<16)&0x0fff0000);
|
2015-08-15 21:38:30 +00:00
|
|
|
DBG_88E("%s set ccx, sw:0x%03x\n", __func__, ccx_sw);
|
2014-12-17 04:09:56 +00:00
|
|
|
ccx_sw = (ccx_sw+1)%0xfff;
|
|
|
|
#endif
|
2013-05-08 21:45:39 +00:00
|
|
|
ptxdesc->txdw2 |= cpu_to_le32(BIT(19));
|
2014-12-17 04:09:56 +00:00
|
|
|
}
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 12 */
|
2013-05-08 21:45:39 +00:00
|
|
|
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<SEQ_SHT)&0x0FFF0000);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 20 */
|
|
|
|
ptxdesc->txdw5 |= cpu_to_le32(RTY_LMT_EN);/* retry limit enable */
|
2015-08-15 18:02:34 +00:00
|
|
|
if (pattrib->retry_ctrl == true)
|
2015-02-20 00:51:33 +00:00
|
|
|
ptxdesc->txdw5 |= cpu_to_le32(0x00180000);/* retry limit = 6 */
|
2013-05-08 21:45:39 +00:00
|
|
|
else
|
2015-02-20 00:51:33 +00:00
|
|
|
ptxdesc->txdw5 |= cpu_to_le32(0x00300000);/* retry limit = 12 */
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2015-08-17 15:11:05 +00:00
|
|
|
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
|
|
|
|
} else if ((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG) {
|
2014-12-17 04:09:56 +00:00
|
|
|
DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n");
|
2015-08-17 15:11:05 +00:00
|
|
|
} else {
|
2014-12-17 04:09:56 +00:00
|
|
|
DBG_8192C("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag);
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 4 */
|
|
|
|
ptxdesc->txdw1 |= cpu_to_le32((4)&0x3f);/* CAM_ID(MAC_ID) */
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
ptxdesc->txdw1 |= cpu_to_le32((6<< RATE_ID_SHT) & 0x000f0000);/* raid */
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 8 */
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 12 */
|
2013-05-08 21:45:39 +00:00
|
|
|
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<SEQ_SHT)&0x0fff0000);
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 20 */
|
2013-05-08 21:45:39 +00:00
|
|
|
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
|
|
|
|
}
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. */
|
|
|
|
/* (1) The sequence number of each non-Qos frame / broadcast / multicast / */
|
|
|
|
/* mgnt frame should be controled by Hw because Fw will also send null data */
|
|
|
|
/* which we cannot control when Fw LPS enable. */
|
|
|
|
/* --> default enable non-Qos data sequense number. 2010.06.23. by tynli. */
|
|
|
|
/* (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. */
|
|
|
|
/* (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. */
|
|
|
|
/* 2010.06.23. Added by tynli. */
|
2015-08-17 15:11:05 +00:00
|
|
|
if (!pattrib->qos_en) {
|
2015-02-20 00:51:33 +00:00
|
|
|
ptxdesc->txdw3 |= cpu_to_le32(EN_HWSEQ); /* Hw set sequence number */
|
|
|
|
ptxdesc->txdw4 |= cpu_to_le32(HW_SSN); /* Hw set sequence number */
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
ODM_SetTxAntByTxInfo_88E(&pHalData->odmpriv, pmem, pattrib->mac_id);
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
rtl8188eu_cal_txdesc_chksum(ptxdesc);
|
2014-12-19 06:59:46 +00:00
|
|
|
_dbg_dump_tx_info(padapter,pxmitframe->frame_tag,ptxdesc);
|
2013-05-08 21:45:39 +00:00
|
|
|
return pull;
|
|
|
|
}
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* for non-agg data frame or management frame */
|
2014-12-17 23:13:53 +00:00
|
|
|
static s32 rtw_dump_xframe(struct adapter *padapter, struct xmit_frame *pxmitframe)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
|
|
|
s32 ret = _SUCCESS;
|
|
|
|
s32 inner_ret = _SUCCESS;
|
2014-12-17 04:09:56 +00:00
|
|
|
int t, sz, w_sz, pull=0;
|
2013-05-08 21:45:39 +00:00
|
|
|
u8 *mem_addr;
|
|
|
|
u32 ff_hwaddr;
|
|
|
|
struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf;
|
|
|
|
struct pkt_attrib *pattrib = &pxmitframe->attrib;
|
2014-12-17 04:09:56 +00:00
|
|
|
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
|
|
|
|
struct security_priv *psecuritypriv = &padapter->securitypriv;
|
2013-05-08 21:45:39 +00:00
|
|
|
if ((pxmitframe->frame_tag == DATA_FRAMETAG) &&
|
|
|
|
(pxmitframe->attrib.ether_type != 0x0806) &&
|
|
|
|
(pxmitframe->attrib.ether_type != 0x888e) &&
|
|
|
|
(pxmitframe->attrib.ether_type != 0x88b4) &&
|
|
|
|
(pxmitframe->attrib.dhcp_pkt != 1))
|
2014-12-17 04:09:56 +00:00
|
|
|
rtw_issue_addbareq_cmd(padapter, pxmitframe);
|
2013-05-08 21:45:39 +00:00
|
|
|
mem_addr = pxmitframe->buf_addr;
|
|
|
|
|
2015-03-10 16:18:03 +00:00
|
|
|
RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_dump_xframe()\n"));
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2015-03-10 16:18:03 +00:00
|
|
|
for (t = 0; t < pattrib->nr_frags; t++) {
|
2013-05-08 21:45:39 +00:00
|
|
|
if (inner_ret != _SUCCESS && ret == _SUCCESS)
|
|
|
|
ret = _FAIL;
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
if (t != (pattrib->nr_frags - 1))
|
|
|
|
{
|
|
|
|
RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("pattrib->nr_frags=%d\n", pattrib->nr_frags));
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
sz = pxmitpriv->frag_len;
|
2014-12-19 06:59:46 +00:00
|
|
|
sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len);
|
2014-12-17 04:09:56 +00:00
|
|
|
}
|
2015-02-20 00:51:33 +00:00
|
|
|
else /* no frag */
|
2014-12-17 04:09:56 +00:00
|
|
|
{
|
2013-05-08 21:45:39 +00:00
|
|
|
sz = pattrib->last_txcmdsz;
|
|
|
|
}
|
|
|
|
|
2014-12-29 02:13:24 +00:00
|
|
|
pull = update_txdesc(pxmitframe, mem_addr, sz, false);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2015-08-15 18:02:34 +00:00
|
|
|
if (pull)
|
2014-12-17 04:09:56 +00:00
|
|
|
{
|
2015-02-20 00:51:33 +00:00
|
|
|
mem_addr += PACKET_OFFSET_SZ; /* pull txdesc head */
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* pxmitbuf ->pbuf = mem_addr; */
|
2013-05-08 21:45:39 +00:00
|
|
|
pxmitframe->buf_addr = mem_addr;
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
w_sz = sz + TXDESC_SIZE;
|
2013-05-19 04:28:07 +00:00
|
|
|
}
|
2014-12-17 04:09:56 +00:00
|
|
|
else
|
|
|
|
{
|
|
|
|
w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ;
|
2014-12-19 06:59:46 +00:00
|
|
|
}
|
2013-05-08 21:45:39 +00:00
|
|
|
ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe);
|
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
inner_ret = rtw_write_port(padapter, ff_hwaddr, w_sz, (unsigned char*)pxmitbuf);
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
rtw_count_tx_stats(padapter, pxmitframe, sz);
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_write_port, w_sz=%d\n", w_sz));
|
2015-02-20 00:51:33 +00:00
|
|
|
/* DBG_8192C("rtw_write_port, w_sz=%d, sz=%d, txdesc_sz=%d, tid=%d\n", w_sz, sz, w_sz-sz, pattrib->priority); */
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
mem_addr += w_sz;
|
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
mem_addr = (u8 *)RND4(((SIZE_PTR)(mem_addr)));
|
|
|
|
}
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
rtw_free_xmitframe(pxmitpriv, pxmitframe);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
if (ret != _SUCCESS)
|
|
|
|
rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static u32 xmitframe_need_length(struct xmit_frame *pxmitframe)
|
|
|
|
{
|
|
|
|
struct pkt_attrib *pattrib = &pxmitframe->attrib;
|
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
u32 len = 0;
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* no consider fragement */
|
2013-05-08 21:45:39 +00:00
|
|
|
len = pattrib->hdrlen + pattrib->iv_len +
|
|
|
|
SNAP_SIZE + sizeof(u16) +
|
|
|
|
pattrib->pktlen +
|
|
|
|
((pattrib->bswenc) ? pattrib->icv_len : 0);
|
|
|
|
|
2015-08-15 18:02:34 +00:00
|
|
|
if (pattrib->encrypt ==_TKIP_)
|
2013-05-08 21:45:39 +00:00
|
|
|
len += 8;
|
|
|
|
|
|
|
|
return len;
|
|
|
|
}
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
#define IDEA_CONDITION 1 /* check all packets before enqueue */
|
2014-12-17 23:13:53 +00:00
|
|
|
s32 rtl8188eu_xmitframe_complete(struct adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2014-12-17 04:09:56 +00:00
|
|
|
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
2013-05-08 21:45:39 +00:00
|
|
|
struct xmit_frame *pxmitframe = NULL;
|
|
|
|
struct xmit_frame *pfirstframe = NULL;
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* aggregate variable */
|
2013-05-08 21:45:39 +00:00
|
|
|
struct hw_xmit *phwxmit;
|
|
|
|
struct sta_info *psta = NULL;
|
|
|
|
struct tx_servq *ptxservq = NULL;
|
|
|
|
|
2015-03-16 13:54:18 +00:00
|
|
|
unsigned long irqL;
|
|
|
|
struct list_head *xmitframe_plist = NULL, *xmitframe_phead = NULL;
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
u32 pbuf; /* next pkt address */
|
|
|
|
u32 pbuf_tail; /* last pkt tail */
|
|
|
|
u32 len; /* packet length, except TXDESC_SIZE and PKT_OFFSET */
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
u32 bulkSize = pHalData->UsbBulkOutSize;
|
|
|
|
u8 descCount;
|
|
|
|
u32 bulkPtr;
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* dump frame variable */
|
2013-05-08 21:45:39 +00:00
|
|
|
u32 ff_hwaddr;
|
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
#ifndef IDEA_CONDITION
|
|
|
|
int res = _SUCCESS;
|
|
|
|
#endif
|
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
RT_TRACE(_module_rtl8192c_xmit_c_, _drv_info_, ("+xmitframe_complete\n"));
|
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* check xmitbuffer is ok */
|
2013-05-08 21:45:39 +00:00
|
|
|
if (pxmitbuf == NULL) {
|
|
|
|
pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
|
2015-08-15 18:24:16 +00:00
|
|
|
if (pxmitbuf == NULL) {
|
2015-08-15 21:38:30 +00:00
|
|
|
/* DBG_88E("%s #1, connot alloc xmitbuf!!!!\n",__FUNCTION__); */
|
2014-12-29 02:13:24 +00:00
|
|
|
return false;
|
2014-12-17 04:09:56 +00:00
|
|
|
}
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2015-08-15 18:00:19 +00:00
|
|
|
/* DBG_8192C("%s =====================================\n",__FUNCTION__); */
|
2015-02-20 00:51:33 +00:00
|
|
|
/* 3 1. pick up first frame */
|
2013-05-08 21:45:39 +00:00
|
|
|
do {
|
|
|
|
rtw_free_xmitframe(pxmitpriv, pxmitframe);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry);
|
|
|
|
if (pxmitframe == NULL) {
|
2015-02-20 00:51:33 +00:00
|
|
|
/* no more xmit frame, release xmit buffer */
|
|
|
|
/* DBG_8192C("no more xmit frame ,return\n"); */
|
2013-05-08 21:45:39 +00:00
|
|
|
rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
|
2014-12-29 02:13:24 +00:00
|
|
|
return false;
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
#ifndef IDEA_CONDITION
|
|
|
|
if (pxmitframe->frame_tag != DATA_FRAMETAG) {
|
|
|
|
RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
|
|
|
|
("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n",
|
|
|
|
pxmitframe->frame_tag, DATA_FRAMETAG));
|
2015-02-20 00:51:33 +00:00
|
|
|
/* rtw_free_xmitframe(pxmitpriv, pxmitframe); */
|
2014-12-17 04:09:56 +00:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* TID 0~15 */
|
2014-12-17 04:09:56 +00:00
|
|
|
if ((pxmitframe->attrib.priority < 0) ||
|
|
|
|
(pxmitframe->attrib.priority > 15)) {
|
|
|
|
RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
|
|
|
|
("xmitframe_complete: TID(%d) should be 0~15!\n",
|
|
|
|
pxmitframe->attrib.priority));
|
2015-02-20 00:51:33 +00:00
|
|
|
/* rtw_free_xmitframe(pxmitpriv, pxmitframe); */
|
2014-12-17 04:09:56 +00:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
#endif
|
2015-02-20 00:51:33 +00:00
|
|
|
/* DBG_8192C("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); */
|
2013-05-08 21:45:39 +00:00
|
|
|
pxmitframe->pxmitbuf = pxmitbuf;
|
|
|
|
pxmitframe->buf_addr = pxmitbuf->pbuf;
|
|
|
|
pxmitbuf->priv_data = pxmitframe;
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
pxmitframe->agg_num = 1; /* alloc xmitframe should assign to 1. */
|
|
|
|
pxmitframe->pkt_offset = 1; /* first frame of aggregation, reserve offset */
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2014-12-29 02:13:24 +00:00
|
|
|
if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == false) {
|
2015-08-15 21:38:30 +00:00
|
|
|
DBG_88E("%s coalesce 1st xmitframe failed\n",__FUNCTION__);
|
2014-12-17 04:09:56 +00:00
|
|
|
continue;
|
|
|
|
}
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* always return ndis_packet after rtw_xmitframe_coalesce */
|
2014-12-17 04:09:56 +00:00
|
|
|
rtw_os_xmit_complete(padapter, pxmitframe);
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
break;
|
|
|
|
} while (1);
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* 3 2. aggregate same priority and same DA(AP or STA) frames */
|
2013-05-08 21:45:39 +00:00
|
|
|
pfirstframe = pxmitframe;
|
2014-12-17 04:09:56 +00:00
|
|
|
len = xmitframe_need_length(pfirstframe) + TXDESC_SIZE+(pfirstframe->pkt_offset*PACKET_OFFSET_SZ);
|
2013-05-08 21:45:39 +00:00
|
|
|
pbuf_tail = len;
|
|
|
|
pbuf = _RND8(pbuf_tail);
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* check pkt amount in one bulk */
|
2014-12-17 04:09:56 +00:00
|
|
|
descCount = 0;
|
|
|
|
bulkPtr = bulkSize;
|
|
|
|
if (pbuf < bulkPtr)
|
|
|
|
descCount++;
|
|
|
|
else {
|
|
|
|
descCount = 0;
|
2015-02-20 00:51:33 +00:00
|
|
|
bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; /* round to next bulkSize */
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* dequeue same priority packet from station tx queue */
|
|
|
|
/* psta = pfirstframe->attrib.psta; */
|
2014-12-17 04:09:56 +00:00
|
|
|
psta = rtw_get_stainfo(&padapter->stapriv, pfirstframe->attrib.ra);
|
2015-08-15 18:24:16 +00:00
|
|
|
if (pfirstframe->attrib.psta != psta) {
|
2015-08-15 21:38:30 +00:00
|
|
|
DBG_88E("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pfirstframe->attrib.psta, psta);
|
2014-12-17 04:09:56 +00:00
|
|
|
}
|
2014-12-19 06:59:46 +00:00
|
|
|
if (psta == NULL) {
|
|
|
|
DBG_8192C("rtw_xmit_classifier: psta == NULL\n");
|
2014-12-17 04:09:56 +00:00
|
|
|
}
|
2015-08-15 18:24:16 +00:00
|
|
|
if (!(psta->state &_FW_LINKED)) {
|
2015-08-15 21:38:30 +00:00
|
|
|
DBG_88E("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state);
|
2014-12-17 04:09:56 +00:00
|
|
|
}
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
switch (pfirstframe->attrib.priority) {
|
2014-12-17 04:09:56 +00:00
|
|
|
case 1:
|
|
|
|
case 2:
|
2018-08-30 18:19:58 +00:00
|
|
|
ptxservq = &psta->sta_xmitpriv.bk_q;
|
2014-12-17 04:09:56 +00:00
|
|
|
phwxmit = pxmitpriv->hwxmits + 3;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 4:
|
|
|
|
case 5:
|
2018-08-30 18:19:58 +00:00
|
|
|
ptxservq = &psta->sta_xmitpriv.vi_q;
|
2014-12-17 04:09:56 +00:00
|
|
|
phwxmit = pxmitpriv->hwxmits + 1;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 6:
|
|
|
|
case 7:
|
2018-08-30 18:19:58 +00:00
|
|
|
ptxservq = &psta->sta_xmitpriv.vo_q;
|
2014-12-17 04:09:56 +00:00
|
|
|
phwxmit = pxmitpriv->hwxmits;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0:
|
|
|
|
case 3:
|
|
|
|
default:
|
2018-08-30 18:19:58 +00:00
|
|
|
ptxservq = &psta->sta_xmitpriv.be_q;
|
2014-12-17 04:09:56 +00:00
|
|
|
phwxmit = pxmitpriv->hwxmits + 2;
|
|
|
|
break;
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2015-02-20 00:51:33 +00:00
|
|
|
/* DBG_8192C("==> pkt_no=%d,pkt_len=%d,len=%d,RND8_LEN=%d,pkt_offset=0x%02x\n", */
|
|
|
|
/* pxmitframe->agg_num,pxmitframe->attrib.last_txcmdsz,len,pbuf,pxmitframe->pkt_offset ); */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2015-03-06 17:54:48 +00:00
|
|
|
spin_lock_bh(&pxmitpriv->lock);
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
xmitframe_phead = get_list_head(&ptxservq->sta_pending);
|
|
|
|
xmitframe_plist = get_next(xmitframe_phead);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-29 02:13:24 +00:00
|
|
|
while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == false)
|
2014-12-17 04:09:56 +00:00
|
|
|
{
|
2013-05-08 21:45:39 +00:00
|
|
|
pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list);
|
|
|
|
xmitframe_plist = get_next(xmitframe_plist);
|
|
|
|
|
2015-02-28 18:41:56 +00:00
|
|
|
pxmitframe->agg_num = 0; /* not first frame of aggregation */
|
2015-02-20 00:51:33 +00:00
|
|
|
pxmitframe->pkt_offset = 0; /* not first frame of aggregation, no need to reserve offset */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
|
|
|
len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE +(pxmitframe->pkt_offset*PACKET_OFFSET_SZ);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2015-02-28 18:41:56 +00:00
|
|
|
if (_RND8(pbuf + len) > MAX_XMITBUF_SZ) {
|
2013-05-08 21:45:39 +00:00
|
|
|
pxmitframe->agg_num = 1;
|
2014-12-19 06:59:46 +00:00
|
|
|
pxmitframe->pkt_offset = 1;
|
|
|
|
break;
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
rtw_list_delete(&pxmitframe->list);
|
|
|
|
ptxservq->qcnt--;
|
|
|
|
phwxmit->accnt--;
|
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
#ifndef IDEA_CONDITION
|
2015-02-20 00:51:33 +00:00
|
|
|
/* suppose only data frames would be in queue */
|
2014-12-17 04:09:56 +00:00
|
|
|
if (pxmitframe->frame_tag != DATA_FRAMETAG) {
|
|
|
|
RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
|
|
|
|
("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n",
|
|
|
|
pxmitframe->frame_tag, DATA_FRAMETAG));
|
|
|
|
rtw_free_xmitframe(pxmitpriv, pxmitframe);
|
|
|
|
continue;
|
|
|
|
}
|
2013-05-19 04:28:07 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* TID 0~15 */
|
2014-12-17 04:09:56 +00:00
|
|
|
if ((pxmitframe->attrib.priority < 0) ||
|
|
|
|
(pxmitframe->attrib.priority > 15)) {
|
|
|
|
RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_,
|
|
|
|
("xmitframe_complete: TID(%d) should be 0~15!\n",
|
|
|
|
pxmitframe->attrib.priority));
|
|
|
|
rtw_free_xmitframe(pxmitpriv, pxmitframe);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
#endif
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* pxmitframe->pxmitbuf = pxmitbuf; */
|
2014-12-17 04:09:56 +00:00
|
|
|
pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf;
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-29 02:13:24 +00:00
|
|
|
if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == false) {
|
2015-08-15 21:38:30 +00:00
|
|
|
DBG_88E("%s coalesce failed\n",__FUNCTION__);
|
2014-12-17 04:09:56 +00:00
|
|
|
rtw_free_xmitframe(pxmitpriv, pxmitframe);
|
|
|
|
continue;
|
|
|
|
}
|
2013-05-19 04:28:07 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* DBG_8192C("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); */
|
|
|
|
/* always return ndis_packet after rtw_xmitframe_coalesce */
|
2014-12-17 04:09:56 +00:00
|
|
|
rtw_os_xmit_complete(padapter, pxmitframe);
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz */
|
2014-12-29 02:13:24 +00:00
|
|
|
update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz,true);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* don't need xmitframe any more */
|
2013-05-08 21:45:39 +00:00
|
|
|
rtw_free_xmitframe(pxmitpriv, pxmitframe);
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* handle pointer and stop condition */
|
2013-05-08 21:45:39 +00:00
|
|
|
pbuf_tail = pbuf + len;
|
|
|
|
pbuf = _RND8(pbuf_tail);
|
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
pfirstframe->agg_num++;
|
|
|
|
if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num)
|
|
|
|
break;
|
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
if (pbuf < bulkPtr) {
|
|
|
|
descCount++;
|
|
|
|
if (descCount == pHalData->UsbTxAggDescNum)
|
2013-05-08 21:45:39 +00:00
|
|
|
break;
|
|
|
|
} else {
|
2014-12-17 04:09:56 +00:00
|
|
|
descCount = 0;
|
|
|
|
bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize;
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2015-08-15 18:04:12 +00:00
|
|
|
}/* end while ( aggregate same priority and same DA(AP or STA) frames) */
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2014-12-29 02:13:24 +00:00
|
|
|
if (_rtw_queue_empty(&ptxservq->sta_pending) == true)
|
2013-05-08 21:45:39 +00:00
|
|
|
rtw_list_delete(&ptxservq->tx_pending);
|
|
|
|
|
2015-03-06 17:54:48 +00:00
|
|
|
spin_unlock_bh(&pxmitpriv->lock);
|
2013-05-08 21:45:39 +00:00
|
|
|
if ((pfirstframe->attrib.ether_type != 0x0806) &&
|
|
|
|
(pfirstframe->attrib.ether_type != 0x888e) &&
|
|
|
|
(pfirstframe->attrib.ether_type != 0x88b4) &&
|
|
|
|
(pfirstframe->attrib.dhcp_pkt != 1))
|
2014-12-17 04:09:56 +00:00
|
|
|
{
|
|
|
|
rtw_issue_addbareq_cmd(padapter, pfirstframe);
|
|
|
|
}
|
2015-02-20 00:51:33 +00:00
|
|
|
/* 3 3. update first frame txdesc */
|
2014-12-17 04:09:56 +00:00
|
|
|
if ((pbuf_tail % bulkSize) == 0) {
|
2015-02-20 00:51:33 +00:00
|
|
|
/* remove pkt_offset */
|
2013-05-08 21:45:39 +00:00
|
|
|
pbuf_tail -= PACKET_OFFSET_SZ;
|
|
|
|
pfirstframe->buf_addr += PACKET_OFFSET_SZ;
|
|
|
|
pfirstframe->pkt_offset--;
|
|
|
|
}
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2014-12-29 02:13:24 +00:00
|
|
|
update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz,true);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* 3 4. write xmit buffer to USB FIFO */
|
2013-05-08 21:45:39 +00:00
|
|
|
ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe);
|
2015-02-20 00:51:33 +00:00
|
|
|
/* xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr */
|
2014-12-17 04:09:56 +00:00
|
|
|
rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8*)pxmitbuf);
|
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* 3 5. update statisitc */
|
2013-05-08 21:45:39 +00:00
|
|
|
pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE);
|
|
|
|
pbuf_tail -= (pfirstframe->pkt_offset * PACKET_OFFSET_SZ);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
rtw_count_tx_stats(padapter, pfirstframe, pbuf_tail);
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
rtw_free_xmitframe(pxmitpriv, pfirstframe);
|
|
|
|
|
2014-12-29 02:13:24 +00:00
|
|
|
return true;
|
2014-12-17 04:09:56 +00:00
|
|
|
}
|
|
|
|
|
2014-12-17 23:13:53 +00:00
|
|
|
static s32 xmitframe_direct(struct adapter *padapter, struct xmit_frame *pxmitframe)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
|
|
|
s32 res = _SUCCESS;
|
2015-08-15 18:00:19 +00:00
|
|
|
/* DBG_8192C("==> %s\n",__FUNCTION__); */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
|
|
|
res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
|
|
|
|
if (res == _SUCCESS) {
|
|
|
|
rtw_dump_xframe(padapter, pxmitframe);
|
|
|
|
}
|
2015-08-15 18:27:00 +00:00
|
|
|
else {
|
2014-12-17 04:09:56 +00:00
|
|
|
DBG_8192C("==> %s xmitframe_coalsece failed\n",__FUNCTION__);
|
|
|
|
}
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Return
|
2014-12-29 02:13:24 +00:00
|
|
|
* true dump packet directly
|
|
|
|
* false enqueue packet
|
2013-05-08 21:45:39 +00:00
|
|
|
*/
|
2014-12-17 23:13:53 +00:00
|
|
|
static s32 pre_xmitframe(struct adapter *padapter, struct xmit_frame *pxmitframe)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2015-03-16 13:54:18 +00:00
|
|
|
unsigned long irqL;
|
2013-05-08 21:45:39 +00:00
|
|
|
s32 res;
|
|
|
|
struct xmit_buf *pxmitbuf = NULL;
|
2014-12-17 04:09:56 +00:00
|
|
|
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
|
2013-05-08 21:45:39 +00:00
|
|
|
struct pkt_attrib *pattrib = &pxmitframe->attrib;
|
2014-12-17 04:09:56 +00:00
|
|
|
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2015-03-06 17:54:48 +00:00
|
|
|
spin_lock_bh(&pxmitpriv->lock);
|
2014-12-17 04:09:56 +00:00
|
|
|
|
|
|
|
if (rtw_txframes_sta_ac_pending(padapter, pattrib) > 0)
|
|
|
|
goto enqueue;
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2014-12-29 02:13:24 +00:00
|
|
|
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == true)
|
2013-05-08 21:45:39 +00:00
|
|
|
goto enqueue;
|
|
|
|
|
|
|
|
pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
|
|
|
|
if (pxmitbuf == NULL)
|
|
|
|
goto enqueue;
|
|
|
|
|
2015-03-06 17:54:48 +00:00
|
|
|
spin_unlock_bh(&pxmitpriv->lock);
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
pxmitframe->pxmitbuf = pxmitbuf;
|
|
|
|
pxmitframe->buf_addr = pxmitbuf->pbuf;
|
|
|
|
pxmitbuf->priv_data = pxmitframe;
|
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
if (xmitframe_direct(padapter, pxmitframe) != _SUCCESS) {
|
2013-05-08 21:45:39 +00:00
|
|
|
rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
|
|
|
|
rtw_free_xmitframe(pxmitpriv, pxmitframe);
|
|
|
|
}
|
|
|
|
|
2014-12-29 02:13:24 +00:00
|
|
|
return true;
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
enqueue:
|
2014-12-17 04:09:56 +00:00
|
|
|
res = rtw_xmitframe_enqueue(padapter, pxmitframe);
|
2015-03-06 17:54:48 +00:00
|
|
|
spin_unlock_bh(&pxmitpriv->lock);
|
2013-05-08 21:45:39 +00:00
|
|
|
|
|
|
|
if (res != _SUCCESS) {
|
|
|
|
RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("pre_xmitframe: enqueue xmitframe fail\n"));
|
|
|
|
rtw_free_xmitframe(pxmitpriv, pxmitframe);
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* Trick, make the statistics correct */
|
2013-05-08 21:45:39 +00:00
|
|
|
pxmitpriv->tx_pkts--;
|
|
|
|
pxmitpriv->tx_drop++;
|
2014-12-29 02:13:24 +00:00
|
|
|
return true;
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2014-12-29 02:13:24 +00:00
|
|
|
return false;
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2014-12-17 23:13:53 +00:00
|
|
|
s32 rtl8188eu_mgnt_xmit(struct adapter *padapter, struct xmit_frame *pmgntframe)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2014-12-17 04:09:56 +00:00
|
|
|
return rtw_dump_xframe(padapter, pmgntframe);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Return
|
2014-12-29 02:13:24 +00:00
|
|
|
* true dump packet directly ok
|
|
|
|
* false temporary can't transmit packets to hardware
|
2013-05-08 21:45:39 +00:00
|
|
|
*/
|
2014-12-17 23:13:53 +00:00
|
|
|
s32 rtl8188eu_hal_xmit(struct adapter *padapter, struct xmit_frame *pxmitframe)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2014-12-17 04:09:56 +00:00
|
|
|
return pre_xmitframe(padapter, pxmitframe);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2014-12-17 23:13:53 +00:00
|
|
|
s32 rtl8188eu_hal_xmitframe_enqueue(struct adapter *padapter, struct xmit_frame *pxmitframe)
|
2014-12-17 04:09:56 +00:00
|
|
|
{
|
2014-12-19 06:59:46 +00:00
|
|
|
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
|
2014-12-17 04:09:56 +00:00
|
|
|
s32 err;
|
2014-12-19 06:59:46 +00:00
|
|
|
|
|
|
|
if ((err=rtw_xmitframe_enqueue(padapter, pxmitframe)) != _SUCCESS)
|
2014-12-17 04:09:56 +00:00
|
|
|
{
|
|
|
|
rtw_free_xmitframe(pxmitpriv, pxmitframe);
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* Trick, make the statistics correct */
|
2014-12-17 04:09:56 +00:00
|
|
|
pxmitpriv->tx_pkts--;
|
2014-12-19 06:59:46 +00:00
|
|
|
pxmitpriv->tx_drop++;
|
2014-12-17 04:09:56 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
|
|
|
|
}
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
return err;
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_HOSTAPD_MLME
|
|
|
|
|
|
|
|
static void rtl8188eu_hostap_mgnt_xmit_cb(struct urb *urb)
|
2014-12-19 06:59:46 +00:00
|
|
|
{
|
2014-12-17 04:09:56 +00:00
|
|
|
struct sk_buff *skb = (struct sk_buff *)urb->context;
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* DBG_8192C("%s\n", __FUNCTION__); */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
|
|
|
rtw_skb_free(skb);
|
|
|
|
}
|
|
|
|
|
2014-12-17 23:13:53 +00:00
|
|
|
s32 rtl8188eu_hostap_mgnt_xmit_entry(struct adapter *padapter, _pkt *pkt)
|
2014-12-17 04:09:56 +00:00
|
|
|
{
|
|
|
|
u16 fc;
|
2014-12-19 06:59:46 +00:00
|
|
|
int rc, len, pipe;
|
2014-12-17 04:09:56 +00:00
|
|
|
unsigned int bmcst, tid, qsel;
|
|
|
|
struct sk_buff *skb, *pxmit_skb;
|
|
|
|
struct urb *urb;
|
|
|
|
unsigned char *pxmitbuf;
|
|
|
|
struct tx_desc *ptxdesc;
|
|
|
|
struct rtw_ieee80211_hdr *tx_hdr;
|
2014-12-19 06:59:46 +00:00
|
|
|
struct hostapd_priv *phostapdpriv = padapter->phostapdpriv;
|
2014-12-17 04:09:56 +00:00
|
|
|
struct net_device *pnetdev = padapter->pnetdev;
|
|
|
|
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
2014-12-19 06:59:46 +00:00
|
|
|
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
|
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* DBG_8192C("%s\n", __FUNCTION__); */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
|
|
|
skb = pkt;
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
len = skb->len;
|
|
|
|
tx_hdr = (struct rtw_ieee80211_hdr *)(skb->data);
|
|
|
|
fc = le16_to_cpu(tx_hdr->frame_ctl);
|
|
|
|
bmcst = IS_MCAST(tx_hdr->addr1);
|
|
|
|
|
|
|
|
if ((fc & RTW_IEEE80211_FCTL_FTYPE) != RTW_IEEE80211_FTYPE_MGMT)
|
|
|
|
goto _exit;
|
|
|
|
|
|
|
|
pxmit_skb = rtw_skb_alloc(len + TXDESC_SIZE);
|
|
|
|
|
2015-08-15 18:02:34 +00:00
|
|
|
if (!pxmit_skb)
|
2014-12-17 04:09:56 +00:00
|
|
|
goto _exit;
|
|
|
|
|
|
|
|
pxmitbuf = pxmit_skb->data;
|
|
|
|
|
|
|
|
urb = usb_alloc_urb(0, GFP_ATOMIC);
|
|
|
|
if (!urb) {
|
|
|
|
goto _exit;
|
|
|
|
}
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* ----- fill tx desc ----- */
|
2014-12-19 06:59:46 +00:00
|
|
|
ptxdesc = (struct tx_desc *)pxmitbuf;
|
2015-02-19 20:58:09 +00:00
|
|
|
memset(ptxdesc, 0, sizeof(*ptxdesc));
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 0 */
|
2014-12-19 06:59:46 +00:00
|
|
|
ptxdesc->txdw0 |= cpu_to_le32(len&0x0000ffff);
|
2015-02-20 00:51:33 +00:00
|
|
|
ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);/* default = 32 bytes for TX Desc */
|
2014-12-17 04:09:56 +00:00
|
|
|
ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
|
|
|
|
|
2015-08-15 18:02:34 +00:00
|
|
|
if (bmcst)
|
2014-12-17 04:09:56 +00:00
|
|
|
{
|
|
|
|
ptxdesc->txdw0 |= cpu_to_le32(BIT(24));
|
2014-12-19 06:59:46 +00:00
|
|
|
}
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 4 */
|
|
|
|
ptxdesc->txdw1 |= cpu_to_le32(0x00);/* MAC_ID */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
|
|
|
ptxdesc->txdw1 |= cpu_to_le32((0x12<<QSEL_SHT)&0x00001f00);
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
ptxdesc->txdw1 |= cpu_to_le32((0x06<< 16) & 0x000f0000);/* b mode */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 8 */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 12 */
|
2014-12-17 04:09:56 +00:00
|
|
|
ptxdesc->txdw3 |= cpu_to_le32((le16_to_cpu(tx_hdr->seq_ctl)<<16)&0xffff0000);
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 16 */
|
|
|
|
ptxdesc->txdw4 |= cpu_to_le32(BIT(8));/* driver uses rate */
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* offset 20 */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* HW append seq */
|
|
|
|
ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); /* Hw set sequence number */
|
|
|
|
ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); /* set bit3 to 1. Suugested by TimChen. 2009.12.29. */
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
|
|
|
|
rtl8188eu_cal_txdesc_chksum(ptxdesc);
|
2015-02-20 00:51:33 +00:00
|
|
|
/* ----- end of fill tx desc ----- */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* */
|
2014-12-17 04:09:56 +00:00
|
|
|
skb_put(pxmit_skb, len + TXDESC_SIZE);
|
|
|
|
pxmitbuf = pxmitbuf + TXDESC_SIZE;
|
2015-02-19 20:50:04 +00:00
|
|
|
memcpy(pxmitbuf, skb->data, len);
|
2014-12-17 04:09:56 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* DBG_8192C("mgnt_xmit, len=%x\n", pxmit_skb->len); */
|
2014-12-17 04:09:56 +00:00
|
|
|
|
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* ----- prepare urb for submit ----- */
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2015-02-20 00:51:33 +00:00
|
|
|
/* translate DMA FIFO addr to pipehandle */
|
|
|
|
/* pipe = ffaddr2pipehdl(pdvobj, MGT_QUEUE_INX); */
|
2014-12-17 04:09:56 +00:00
|
|
|
pipe = usb_sndbulkpipe(pdvobj->pusbdev, pHalData->Queue2EPNum[(u8)MGT_QUEUE_INX]&0x0f);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
usb_fill_bulk_urb(urb, pdvobj->pusbdev, pipe,
|
|
|
|
pxmit_skb->data, pxmit_skb->len, rtl8192cu_hostap_mgnt_xmit_cb, pxmit_skb);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
urb->transfer_flags |= URB_ZERO_PACKET;
|
|
|
|
usb_anchor_urb(urb, &phostapdpriv->anchored);
|
|
|
|
rc = usb_submit_urb(urb, GFP_ATOMIC);
|
|
|
|
if (rc < 0) {
|
|
|
|
usb_unanchor_urb(urb);
|
|
|
|
kfree_skb(skb);
|
|
|
|
}
|
|
|
|
usb_free_urb(urb);
|
|
|
|
|
2014-12-19 06:59:46 +00:00
|
|
|
|
|
|
|
_exit:
|
|
|
|
|
2014-12-17 04:09:56 +00:00
|
|
|
rtw_skb_free(skb);
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
}
|
|
|
|
#endif
|