2019-04-22 11:31:01 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2007 - 2016 Realtek Corporation. All rights reserved. */
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2013-05-08 21:45:39 +00:00
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#define _HAL_INTF_C_
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2014-12-11 21:15:04 +00:00
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2018-10-15 00:07:45 +00:00
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#include <drv_types.h>
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#include <hal_data.h>
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const u32 _chip_type_to_odm_ic_type[] = {
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0,
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ODM_RTL8188E,
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ODM_RTL8192E,
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ODM_RTL8812,
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ODM_RTL8821,
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ODM_RTL8723B,
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ODM_RTL8814A,
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ODM_RTL8703B,
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ODM_RTL8188F,
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ODM_RTL8822B,
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ODM_RTL8723D,
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ODM_RTL8821C,
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0,
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};
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void rtw_hal_chip_configure(_adapter *padapter)
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2013-05-08 21:45:39 +00:00
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{
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2018-10-15 00:07:45 +00:00
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padapter->hal_func.intf_chip_configure(padapter);
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2013-05-08 21:45:39 +00:00
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}
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2018-10-15 00:07:45 +00:00
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/*
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* Description:
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* Read chip internal ROM data
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*
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* Return:
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* _SUCCESS success
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* _FAIL fail
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*/
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u8 rtw_hal_read_chip_info(_adapter *padapter)
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2013-05-08 21:45:39 +00:00
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{
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2018-10-15 00:07:45 +00:00
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u8 rtn = _SUCCESS;
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u8 hci_type = rtw_get_intf_type(padapter);
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2018-12-22 03:55:20 +00:00
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u32 start = jiffies;
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2018-10-15 00:07:45 +00:00
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/* before access eFuse, make sure card enable has been called */
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if ((hci_type == RTW_SDIO || hci_type == RTW_GSPI)
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&& !rtw_is_hw_init_completed(padapter))
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rtw_hal_power_on(padapter);
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rtn = padapter->hal_func.read_adapter_info(padapter);
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if ((hci_type == RTW_SDIO || hci_type == RTW_GSPI)
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&& !rtw_is_hw_init_completed(padapter))
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rtw_hal_power_off(padapter);
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RTW_INFO("%s in %d ms\n", __func__, rtw_get_passing_time_ms(start));
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return rtn;
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2013-05-08 21:45:39 +00:00
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}
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2018-10-15 00:07:45 +00:00
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void rtw_hal_read_chip_version(_adapter *padapter)
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2013-05-08 21:45:39 +00:00
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{
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2018-10-15 00:07:45 +00:00
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padapter->hal_func.read_chip_version(padapter);
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rtw_odm_init_ic_type(padapter);
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2013-05-08 21:45:39 +00:00
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}
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2018-10-15 00:07:45 +00:00
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void rtw_hal_def_value_init(_adapter *padapter)
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2013-05-08 21:45:39 +00:00
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{
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2018-10-15 00:07:45 +00:00
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if (is_primary_adapter(padapter)) {
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padapter->hal_func.init_default_value(padapter);
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rtw_init_hal_com_default_value(padapter);
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{
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struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
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struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
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/* hal_spec is ready here */
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dvobj->macid_ctl.num = rtw_min(hal_spec->macid_num, MACID_NUM_SW_LIMIT);
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dvobj->cam_ctl.sec_cap = hal_spec->sec_cap;
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dvobj->cam_ctl.num = rtw_min(hal_spec->sec_cam_ent_num, SEC_CAM_ENT_NUM_SW_LIMIT);
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}
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}
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2013-05-08 21:45:39 +00:00
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}
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2015-03-12 01:21:04 +00:00
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2018-10-15 00:07:45 +00:00
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u8 rtw_hal_data_init(_adapter *padapter)
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2013-05-08 21:45:39 +00:00
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{
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2018-10-15 00:07:45 +00:00
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if (is_primary_adapter(padapter)) {
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padapter->hal_data_sz = sizeof(HAL_DATA_TYPE);
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padapter->HalData = rtw_zvmalloc(padapter->hal_data_sz);
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if (padapter->HalData == NULL) {
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RTW_INFO("cant not alloc memory for HAL DATA\n");
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return _FAIL;
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}
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}
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return _SUCCESS;
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2013-05-08 21:45:39 +00:00
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}
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2015-03-12 01:21:04 +00:00
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2018-10-15 00:07:45 +00:00
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void rtw_hal_data_deinit(_adapter *padapter)
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2013-05-08 21:45:39 +00:00
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{
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2018-10-15 00:07:45 +00:00
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if (is_primary_adapter(padapter)) {
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if (padapter->HalData) {
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#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
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phy_free_filebuf(padapter);
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#endif
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rtw_vmfree(padapter->HalData, padapter->hal_data_sz);
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padapter->HalData = NULL;
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padapter->hal_data_sz = 0;
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}
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}
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2013-05-08 21:45:39 +00:00
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}
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2015-03-12 01:21:04 +00:00
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2018-10-15 00:07:45 +00:00
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void rtw_hal_free_data(_adapter *padapter)
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2013-05-08 21:45:39 +00:00
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{
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2018-10-15 00:07:45 +00:00
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/* free HAL Data */
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rtw_hal_data_deinit(padapter);
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2013-05-08 21:45:39 +00:00
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}
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2018-10-15 00:07:45 +00:00
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void rtw_hal_dm_init(_adapter *padapter)
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{
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if (is_primary_adapter(padapter)) {
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
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padapter->hal_func.dm_init(padapter);
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2015-03-12 01:21:04 +00:00
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2018-10-19 16:48:13 +00:00
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spin_lock_init(&pHalData->IQKSpinLock);
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2018-10-15 00:07:45 +00:00
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phy_load_tx_power_ext_info(padapter, 1);
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}
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}
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void rtw_hal_dm_deinit(_adapter *padapter)
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{
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if (is_primary_adapter(padapter)) {
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
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padapter->hal_func.dm_deinit(padapter);
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}
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}
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2018-12-22 03:36:02 +00:00
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2018-10-15 00:07:45 +00:00
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void rtw_hal_sw_led_init(_adapter *padapter)
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2013-05-08 21:45:39 +00:00
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{
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2018-10-15 00:07:45 +00:00
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if (padapter->hal_func.InitSwLeds)
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padapter->hal_func.InitSwLeds(padapter);
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2013-05-08 21:45:39 +00:00
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}
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2018-10-15 00:07:45 +00:00
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void rtw_hal_sw_led_deinit(_adapter *padapter)
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2013-05-08 21:45:39 +00:00
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{
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2018-10-15 00:07:45 +00:00
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if (padapter->hal_func.DeInitSwLeds)
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padapter->hal_func.DeInitSwLeds(padapter);
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2013-05-08 21:45:39 +00:00
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}
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2018-10-15 00:07:45 +00:00
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u32 rtw_hal_power_on(_adapter *padapter)
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2013-05-08 21:45:39 +00:00
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{
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2018-10-15 00:07:45 +00:00
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return padapter->hal_func.hal_power_on(padapter);
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}
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void rtw_hal_power_off(_adapter *padapter)
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{
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struct macid_ctl_t *macid_ctl = &padapter->dvobj->macid_ctl;
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2018-11-24 18:07:51 +00:00
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memset(macid_ctl->h2c_msr, 0, MACID_NUM_SW_LIMIT);
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2018-10-15 00:07:45 +00:00
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padapter->hal_func.hal_power_off(padapter);
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2013-05-08 21:45:39 +00:00
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}
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2015-03-12 01:21:04 +00:00
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2018-10-15 00:07:45 +00:00
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2019-04-21 16:36:57 +00:00
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static void rtw_hal_init_opmode(_adapter *padapter)
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2014-12-11 21:15:04 +00:00
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{
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2018-10-15 00:07:45 +00:00
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NDIS_802_11_NETWORK_INFRASTRUCTURE networkType = Ndis802_11InfrastructureMax;
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struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
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sint fw_state;
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fw_state = get_fwstate(pmlmepriv);
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if (fw_state & WIFI_ADHOC_STATE)
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networkType = Ndis802_11IBSS;
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else if (fw_state & WIFI_STATION_STATE)
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networkType = Ndis802_11Infrastructure;
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else if (fw_state & WIFI_AP_STATE)
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networkType = Ndis802_11APMode;
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else
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return;
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2018-12-17 17:08:55 +00:00
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rtw_setopmode_cmd(padapter, networkType, false);
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2014-12-11 21:15:04 +00:00
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}
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2013-05-08 21:45:39 +00:00
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2018-10-15 00:07:45 +00:00
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uint rtw_hal_init(_adapter *padapter)
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2013-05-08 21:45:39 +00:00
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{
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uint status = _SUCCESS;
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2014-12-11 21:15:04 +00:00
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struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
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2018-10-15 00:07:45 +00:00
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
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2014-12-11 21:15:04 +00:00
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int i;
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2018-10-15 00:07:45 +00:00
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status = padapter->hal_func.hal_init(padapter);
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2013-05-08 21:45:39 +00:00
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2015-08-15 18:24:16 +00:00
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if (status == _SUCCESS) {
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2018-12-17 17:08:55 +00:00
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pHalData->hw_init_completed = true;
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2018-10-15 00:07:45 +00:00
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rtw_restore_mac_addr(padapter);
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2014-12-19 06:59:46 +00:00
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2014-12-11 21:15:04 +00:00
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if (padapter->registrypriv.notch_filter == 1)
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rtw_hal_notch_filter(padapter, 1);
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2013-05-19 04:28:07 +00:00
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2018-10-15 00:07:45 +00:00
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for (i = 0; i < dvobj->iface_nums; i++)
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rtw_sec_restore_wep_key(dvobj->padapters[i]);
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rtw_led_control(padapter, LED_CTL_POWER_ON);
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2013-05-08 21:45:39 +00:00
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2014-12-11 21:15:04 +00:00
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init_hw_mlme_ext(padapter);
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2018-10-15 00:07:45 +00:00
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rtw_hal_init_opmode(padapter);
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#ifdef CONFIG_RF_POWER_TRIM
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rtw_bb_rf_gain_offset(padapter);
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#endif /*CONFIG_RF_POWER_TRIM*/
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} else {
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2018-12-17 17:08:55 +00:00
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pHalData->hw_init_completed = false;
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2018-10-15 00:07:45 +00:00
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RTW_INFO("rtw_hal_init: hal_init fail\n");
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2013-05-08 21:45:39 +00:00
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}
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return status;
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2014-12-19 06:59:46 +00:00
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}
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2014-12-11 21:15:04 +00:00
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2018-10-15 00:07:45 +00:00
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uint rtw_hal_deinit(_adapter *padapter)
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2013-05-08 21:45:39 +00:00
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{
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uint status = _SUCCESS;
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2014-12-11 21:15:04 +00:00
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struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
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2018-10-15 00:07:45 +00:00
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
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2014-12-11 21:15:04 +00:00
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int i;
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2013-05-19 04:28:07 +00:00
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2018-10-15 00:07:45 +00:00
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status = padapter->hal_func.hal_deinit(padapter);
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2013-05-19 04:28:07 +00:00
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2015-08-15 18:24:16 +00:00
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if (status == _SUCCESS) {
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2018-10-15 00:07:45 +00:00
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rtw_led_control(padapter, LED_CTL_POWER_OFF);
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2018-12-17 17:08:55 +00:00
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pHalData->hw_init_completed = false;
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2018-10-15 00:07:45 +00:00
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} else
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RTW_INFO("\n rtw_hal_deinit: hal_init fail\n");
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2013-05-08 21:45:39 +00:00
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return status;
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}
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2018-10-15 00:07:45 +00:00
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void rtw_hal_set_hwreg(_adapter *padapter, u8 variable, u8 *val)
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2013-05-08 21:45:39 +00:00
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{
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2018-10-15 00:07:45 +00:00
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padapter->hal_func.set_hw_reg_handler(padapter, variable, val);
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2013-05-08 21:45:39 +00:00
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}
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2018-10-15 00:07:45 +00:00
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void rtw_hal_get_hwreg(_adapter *padapter, u8 variable, u8 *val)
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2013-05-19 04:28:07 +00:00
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{
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2018-10-15 00:07:45 +00:00
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padapter->hal_func.GetHwRegHandler(padapter, variable, val);
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2013-05-08 21:45:39 +00:00
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}
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2013-08-04 23:08:37 +00:00
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2018-11-13 03:24:45 +00:00
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u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void * pValue)
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2014-12-19 06:59:46 +00:00
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{
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2018-10-15 00:07:45 +00:00
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return padapter->hal_func.SetHalDefVarHandler(padapter, eVariable, pValue);
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2013-05-19 04:28:07 +00:00
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}
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2018-11-13 03:24:45 +00:00
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u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void * pValue)
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2014-12-19 06:59:46 +00:00
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{
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2018-10-15 00:07:45 +00:00
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return padapter->hal_func.get_hal_def_var_handler(padapter, eVariable, pValue);
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2014-12-19 06:59:46 +00:00
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}
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2013-05-08 21:45:39 +00:00
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2018-11-16 20:56:35 +00:00
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void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void * pValue1, bool bSet)
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2013-05-08 21:45:39 +00:00
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{
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2018-10-15 00:07:45 +00:00
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padapter->hal_func.SetHalODMVarHandler(padapter, eVariable, pValue1, bSet);
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}
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2018-11-13 03:24:45 +00:00
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void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void * pValue1, void * pValue2)
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2018-10-15 00:07:45 +00:00
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{
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padapter->hal_func.GetHalODMVarHandler(padapter, eVariable, pValue1, pValue2);
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2013-05-08 21:45:39 +00:00
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}
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2015-03-12 01:21:04 +00:00
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2018-10-15 00:07:45 +00:00
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/* FOR SDIO & PCIE */
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void rtw_hal_enable_interrupt(_adapter *padapter)
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2013-05-08 21:45:39 +00:00
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{
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}
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2018-10-15 00:07:45 +00:00
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/* FOR SDIO & PCIE */
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void rtw_hal_disable_interrupt(_adapter *padapter)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
u8 rtw_hal_check_ips_status(_adapter *padapter)
|
|
|
|
{
|
2018-12-17 17:08:55 +00:00
|
|
|
u8 val = false;
|
2018-10-15 00:07:45 +00:00
|
|
|
if (padapter->hal_func.check_ips_status)
|
|
|
|
val = padapter->hal_func.check_ips_status(padapter);
|
2014-12-19 06:59:46 +00:00
|
|
|
else
|
2018-11-03 19:22:43 +00:00
|
|
|
RTW_INFO("%s: hal_func.check_ips_status is NULL!\n", __func__);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
return val;
|
2014-12-11 21:15:04 +00:00
|
|
|
}
|
2015-03-12 01:21:04 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
s32 rtw_hal_fw_dl(_adapter *padapter, u8 wowlan)
|
2014-12-11 21:15:04 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
return padapter->hal_func.fw_dl(padapter, wowlan);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2013-08-04 23:08:37 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
|
|
|
|
void rtw_hal_clear_interrupt(_adapter *padapter)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
|
|
|
}
|
2018-10-15 00:07:45 +00:00
|
|
|
#endif
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
u32 rtw_hal_inirp_init(_adapter *padapter)
|
|
|
|
{
|
|
|
|
if (is_primary_adapter(padapter))
|
|
|
|
return padapter->hal_func.inirp_init(padapter);
|
|
|
|
return _SUCCESS;
|
|
|
|
}
|
|
|
|
u32 rtw_hal_inirp_deinit(_adapter *padapter)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
if (is_primary_adapter(padapter))
|
|
|
|
return padapter->hal_func.inirp_deinit(padapter);
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
return _SUCCESS;
|
|
|
|
}
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
/* for USB Auto-suspend */
|
|
|
|
u8 rtw_hal_intf_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val)
|
2014-12-19 06:59:46 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
if (padapter->hal_func.interface_ps_func)
|
|
|
|
return padapter->hal_func.interface_ps_func(padapter, efunc_id, val);
|
2013-05-08 21:45:39 +00:00
|
|
|
return _FAIL;
|
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
s32 rtw_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe)
|
2014-11-20 06:12:27 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
return padapter->hal_func.hal_xmitframe_enqueue(padapter, pxmitframe);
|
2014-11-20 06:12:27 +00:00
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
return padapter->hal_func.hal_xmit(padapter, pxmitframe);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
/*
|
|
|
|
* [IMPORTANT] This function would be run in interrupt context.
|
|
|
|
*/
|
|
|
|
s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
|
|
|
s32 ret = _FAIL;
|
2018-10-15 00:07:45 +00:00
|
|
|
u8 *pframe, subtype;
|
2014-12-11 21:15:04 +00:00
|
|
|
struct rtw_ieee80211_hdr *pwlanhdr;
|
2018-10-15 00:07:45 +00:00
|
|
|
struct sta_info *psta;
|
|
|
|
struct sta_priv *pstapriv = &padapter->stapriv;
|
2014-12-11 21:15:04 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
update_mgntframe_attrib_addr(padapter, pmgntframe);
|
2014-12-11 21:15:04 +00:00
|
|
|
pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
|
2018-10-15 00:07:45 +00:00
|
|
|
subtype = get_frame_sub_type(pframe); /* bit(7)~bit(2) */
|
|
|
|
|
|
|
|
/* pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; */
|
2018-12-18 03:50:56 +00:00
|
|
|
/* memcpy(pmgntframe->attrib.ra, pwlanhdr->addr1, ETH_ALEN); */
|
2014-12-11 21:15:04 +00:00
|
|
|
|
|
|
|
#ifdef CONFIG_IEEE80211W
|
2018-12-17 17:08:55 +00:00
|
|
|
if (padapter->securitypriv.binstallBIPkey == true && (subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC ||
|
2018-10-15 00:07:45 +00:00
|
|
|
subtype == WIFI_ACTION)) {
|
|
|
|
if (IS_MCAST(pmgntframe->attrib.ra) && pmgntframe->attrib.key_type != IEEE80211W_NO_KEY) {
|
2014-12-11 21:15:04 +00:00
|
|
|
pmgntframe->attrib.encrypt = _BIP_;
|
2018-12-17 17:08:55 +00:00
|
|
|
/* pmgntframe->attrib.bswenc = true; */
|
2018-10-15 00:07:45 +00:00
|
|
|
} else if (pmgntframe->attrib.key_type != IEEE80211W_NO_KEY) {
|
|
|
|
psta = rtw_get_stainfo(pstapriv, pmgntframe->attrib.ra);
|
2018-12-17 17:08:55 +00:00
|
|
|
if (psta && psta->bpairwise_key_installed == true) {
|
2018-10-15 00:07:45 +00:00
|
|
|
pmgntframe->attrib.encrypt = _AES_;
|
2018-12-17 17:08:55 +00:00
|
|
|
pmgntframe->attrib.bswenc = true;
|
2018-10-15 00:07:45 +00:00
|
|
|
} else {
|
2018-12-17 17:08:55 +00:00
|
|
|
RTW_INFO("%s, %d, bpairwise_key_installed is false\n", __func__, __LINE__);
|
2018-10-15 00:07:45 +00:00
|
|
|
goto no_mgmt_coalesce;
|
|
|
|
}
|
2014-12-11 21:15:04 +00:00
|
|
|
}
|
2018-10-15 00:07:45 +00:00
|
|
|
RTW_INFO("encrypt=%d, bswenc=%d\n", pmgntframe->attrib.encrypt, pmgntframe->attrib.bswenc);
|
2014-12-11 21:15:04 +00:00
|
|
|
rtw_mgmt_xmitframe_coalesce(padapter, pmgntframe->pkt, pmgntframe);
|
|
|
|
}
|
2015-02-20 00:51:33 +00:00
|
|
|
#endif /* CONFIG_IEEE80211W */
|
2018-10-15 00:07:45 +00:00
|
|
|
no_mgmt_coalesce:
|
|
|
|
ret = padapter->hal_func.mgnt_xmit(padapter, pmgntframe);
|
2013-05-08 21:45:39 +00:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
s32 rtw_hal_init_xmit_priv(_adapter *padapter)
|
2014-12-19 06:59:46 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
return padapter->hal_func.init_xmit_priv(padapter);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_free_xmit_priv(_adapter *padapter)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
padapter->hal_func.free_xmit_priv(padapter);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
s32 rtw_hal_init_recv_priv(_adapter *padapter)
|
2014-12-19 06:59:46 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
return padapter->hal_func.init_recv_priv(padapter);
|
|
|
|
}
|
|
|
|
void rtw_hal_free_recv_priv(_adapter *padapter)
|
|
|
|
{
|
|
|
|
padapter->hal_func.free_recv_priv(padapter);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2015-03-12 01:21:04 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_update_ramask(_adapter *padapter, struct sta_info *psta, u32 mac_id, u8 rssi_level, u8 is_update_bw)
|
2014-12-19 06:59:46 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
struct macid_cfg h2c_macid_cfg;
|
|
|
|
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
|
|
|
|
struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
|
|
|
|
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
|
|
|
|
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
|
|
|
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
|
2018-12-17 17:08:55 +00:00
|
|
|
u8 disable_cck_rate = false, MimoPs_enable = false;
|
2018-10-15 00:07:45 +00:00
|
|
|
u32 ratr_bitmap_msb = 0, ratr_bitmap_lsb = 0;
|
|
|
|
u64 mask = 0, rate_bitmap = 0;
|
|
|
|
u8 bw, short_gi;
|
|
|
|
|
|
|
|
if (psta == NULL) {
|
|
|
|
RTW_ERR(FUNC_ADPT_FMT" macid:%u, sta is NULL\n", FUNC_ADPT_ARG(padapter), mac_id);
|
|
|
|
rtw_warn_on(1);
|
|
|
|
return;
|
|
|
|
}
|
2018-11-24 18:07:51 +00:00
|
|
|
memset(&h2c_macid_cfg, 0, sizeof(struct macid_cfg));
|
2018-10-15 00:07:45 +00:00
|
|
|
|
|
|
|
bw = rtw_get_tx_bw_mode(padapter, psta);
|
|
|
|
short_gi = query_ra_short_GI(psta, bw);
|
|
|
|
|
|
|
|
ratr_bitmap_msb = (u32)(psta->ra_mask >> 32);
|
|
|
|
ratr_bitmap_lsb = (u32)(psta->ra_mask);
|
|
|
|
|
|
|
|
phydm_update_hal_ra_mask(&hal_data->odmpriv, psta->wireless_mode, hal_data->rf_type, bw, MimoPs_enable, disable_cck_rate, &ratr_bitmap_msb, &ratr_bitmap_lsb, rssi_level);
|
|
|
|
mask = (((u64)ratr_bitmap_msb) << 32) | ((u64)ratr_bitmap_lsb);
|
|
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_BT_COEXIST
|
|
|
|
if (hal_data->EEPROMBluetoothCoexist == 1) {
|
|
|
|
rate_bitmap = rtw_btcoex_GetRaMask(padapter);
|
|
|
|
mask &= ~rate_bitmap;
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_BT_COEXIST */
|
|
|
|
|
|
|
|
#ifdef CONFIG_CMCC_TEST
|
|
|
|
#ifdef CONFIG_BT_COEXIST
|
|
|
|
if (pmlmeext->cur_wireless_mode & WIRELESS_11G) {
|
|
|
|
if (mac_id == 0) {
|
|
|
|
RTW_INFO("CMCC_BT update raid entry, mask=0x%x\n", mask);
|
|
|
|
/*mask &=0xffffffc0; //disable CCK & <12M OFDM rate for 11G mode for CMCC */
|
|
|
|
mask &= 0xffffff00; /*disable CCK & <24M OFDM rate for 11G mode for CMCC */
|
|
|
|
RTW_INFO("CMCC_BT update raid entry, mask=0x%x\n", mask);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*set correct initial date rate for each mac_id */
|
|
|
|
hal_data->INIDATA_RATE[mac_id] = psta->init_rate;
|
|
|
|
|
|
|
|
|
|
|
|
RTW_INFO("%s => mac_id:%d, networkType:0x%02x, mask:0x%016llx\n\t ==> rssi_level:%d, rate_bitmap:0x%016llx, shortGIrate=%d\n\t ==> bw:%d, ignore_bw:0x%d\n",
|
|
|
|
__func__, mac_id, psta->wireless_mode, mask, rssi_level, rate_bitmap, short_gi, bw, (!is_update_bw));
|
|
|
|
|
|
|
|
rtw_macid_ctl_set_bw(macid_ctl, mac_id, bw);
|
|
|
|
rtw_macid_ctl_set_vht_en(macid_ctl, mac_id, is_supported_vht(psta->wireless_mode));
|
|
|
|
rtw_macid_ctl_set_rate_bmp0(macid_ctl, mac_id, mask);
|
|
|
|
rtw_macid_ctl_set_rate_bmp1(macid_ctl, mac_id, mask >> 32);
|
|
|
|
rtw_update_tx_rate_bmp(adapter_to_dvobj(padapter));
|
|
|
|
|
|
|
|
h2c_macid_cfg.mac_id = mac_id;
|
|
|
|
h2c_macid_cfg.rate_id = psta->raid;
|
|
|
|
h2c_macid_cfg.bandwidth = bw;
|
|
|
|
h2c_macid_cfg.ignore_bw = (!is_update_bw);
|
|
|
|
h2c_macid_cfg.short_gi = short_gi;
|
|
|
|
h2c_macid_cfg.ra_mask = mask;
|
|
|
|
|
|
|
|
padapter->hal_func.update_ra_mask_handler(padapter, psta, &h2c_macid_cfg);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level, u8 is_update_bw)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
_adapter *padapter;
|
2014-12-11 21:15:04 +00:00
|
|
|
struct mlme_priv *pmlmepriv;
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2015-08-15 18:02:34 +00:00
|
|
|
if (!psta)
|
2014-12-11 21:15:04 +00:00
|
|
|
return;
|
|
|
|
|
|
|
|
padapter = psta->padapter;
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
pmlmepriv = &(padapter->mlmepriv);
|
2014-12-11 21:15:04 +00:00
|
|
|
|
2018-12-17 17:08:55 +00:00
|
|
|
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true)
|
2018-10-15 00:07:45 +00:00
|
|
|
add_RATid(padapter, psta, rssi_level, is_update_bw);
|
|
|
|
else {
|
|
|
|
psta->raid = rtw_hal_networktype_to_raid(padapter, psta);
|
|
|
|
rtw_update_ramask(padapter, psta, psta->mac_id, rssi_level, is_update_bw);
|
2014-12-19 06:59:46 +00:00
|
|
|
}
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Start specifical interface thread */
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_start_thread(_adapter *padapter)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
|
|
|
}
|
|
|
|
/* Start specifical interface thread */
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_stop_thread(_adapter *padapter)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
|
|
|
u32 data = 0;
|
2018-10-15 00:07:45 +00:00
|
|
|
if (padapter->hal_func.read_bbreg)
|
|
|
|
data = padapter->hal_func.read_bbreg(padapter, RegAddr, BitMask);
|
2013-05-08 21:45:39 +00:00
|
|
|
return data;
|
|
|
|
}
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
if (padapter->hal_func.write_bbreg)
|
|
|
|
padapter->hal_func.write_bbreg(padapter, RegAddr, BitMask, Data);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
u32 rtw_hal_read_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
|
|
|
u32 data = 0;
|
2018-10-15 00:07:45 +00:00
|
|
|
|
|
|
|
if (padapter->hal_func.read_rfreg) {
|
|
|
|
data = padapter->hal_func.read_rfreg(padapter, eRFPath, RegAddr, BitMask);
|
|
|
|
|
|
|
|
if (match_rf_read_sniff_ranges(eRFPath, RegAddr, BitMask)) {
|
|
|
|
RTW_INFO("DBG_IO rtw_hal_read_rfreg(%u, 0x%04x, 0x%08x) read:0x%08x(0x%08x)\n"
|
|
|
|
, eRFPath, RegAddr, BitMask, (data << PHY_CalculateBitShift(BitMask)), data);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
return data;
|
|
|
|
}
|
2015-03-12 01:21:04 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
if (padapter->hal_func.write_rfreg) {
|
|
|
|
|
|
|
|
if (match_rf_write_sniff_ranges(eRFPath, RegAddr, BitMask)) {
|
|
|
|
RTW_INFO("DBG_IO rtw_hal_write_rfreg(%u, 0x%04x, 0x%08x) write:0x%08x(0x%08x)\n"
|
|
|
|
, eRFPath, RegAddr, BitMask, (Data << PHY_CalculateBitShift(BitMask)), Data);
|
|
|
|
}
|
|
|
|
|
|
|
|
padapter->hal_func.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data);
|
|
|
|
|
|
|
|
}
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2018-11-04 00:31:49 +00:00
|
|
|
#if defined(CONFIG_SUPPORT_USB_INT)
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf)
|
|
|
|
{
|
|
|
|
padapter->hal_func.interrupt_handler(padapter, pkt_len, pbuf);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2018-10-15 00:07:45 +00:00
|
|
|
#endif
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, CHANNEL_WIDTH Bandwidth, u8 Offset40, u8 Offset80)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
|
|
|
|
struct PHY_DM_STRUCT *pDM_Odm = &(pHalData->odmpriv);
|
|
|
|
u8 cch_160 = Bandwidth == CHANNEL_WIDTH_160 ? channel : 0;
|
|
|
|
u8 cch_80 = Bandwidth == CHANNEL_WIDTH_80 ? channel : 0;
|
|
|
|
u8 cch_40 = Bandwidth == CHANNEL_WIDTH_40 ? channel : 0;
|
|
|
|
u8 cch_20 = Bandwidth == CHANNEL_WIDTH_20 ? channel : 0;
|
|
|
|
|
|
|
|
odm_acquire_spin_lock(pDM_Odm, RT_IQK_SPINLOCK);
|
2018-12-17 17:08:55 +00:00
|
|
|
if (pDM_Odm->rf_calibrate_info.is_iqk_in_progress == true)
|
2018-10-15 00:07:45 +00:00
|
|
|
RTW_ERR("%s, %d, IQK may race condition\n", __func__, __LINE__);
|
|
|
|
odm_release_spin_lock(pDM_Odm, RT_IQK_SPINLOCK);
|
|
|
|
|
|
|
|
/* MP mode channel don't use secondary channel */
|
2018-12-17 17:08:55 +00:00
|
|
|
if (rtw_mi_mp_mode_check(padapter) == false) {
|
2018-10-15 00:07:45 +00:00
|
|
|
if (cch_80 != 0)
|
|
|
|
cch_40 = rtw_get_scch_by_cch_offset(cch_80, CHANNEL_WIDTH_80, Offset80);
|
|
|
|
if (cch_40 != 0)
|
|
|
|
cch_20 = rtw_get_scch_by_cch_offset(cch_40, CHANNEL_WIDTH_40, Offset40);
|
|
|
|
}
|
|
|
|
|
|
|
|
pHalData->cch_80 = cch_80;
|
|
|
|
pHalData->cch_40 = cch_40;
|
|
|
|
pHalData->cch_20 = cch_20;
|
|
|
|
|
|
|
|
if (0)
|
|
|
|
RTW_INFO("%s cch:%u, %s, offset40:%u, offset80:%u (%u, %u, %u)\n", __func__
|
|
|
|
, channel, ch_width_str(Bandwidth), Offset40, Offset80
|
|
|
|
, pHalData->cch_80, pHalData->cch_40, pHalData->cch_20);
|
|
|
|
|
|
|
|
padapter->hal_func.set_chnl_bw_handler(padapter, channel, Bandwidth, Offset40, Offset80);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_set_tx_power_level(_adapter *padapter, u8 channel)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
if (padapter->hal_func.set_tx_power_level_handler)
|
|
|
|
padapter->hal_func.set_tx_power_level_handler(padapter, channel);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_get_tx_power_level(_adapter *padapter, s32 *powerlevel)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
if (padapter->hal_func.get_tx_power_level_handler)
|
|
|
|
padapter->hal_func.get_tx_power_level_handler(padapter, powerlevel);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_dm_watchdog(_adapter *padapter)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
#ifdef CONFIG_MCC_MODE
|
|
|
|
if (MCC_EN(padapter)) {
|
|
|
|
if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC))
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
#endif /* CONFIG_MCC_MODE */
|
|
|
|
|
|
|
|
padapter->hal_func.hal_dm_watchdog(padapter);
|
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
#ifdef CONFIG_LPS_LCLK_WD_TIMER
|
|
|
|
void rtw_hal_dm_watchdog_in_lps(_adapter *padapter)
|
2014-12-19 06:59:46 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
#if defined(CONFIG_CONCURRENT_MODE)
|
|
|
|
#ifndef CONFIG_FW_MULTI_PORT_SUPPORT
|
|
|
|
if (padapter->hw_port != HW_PORT0)
|
|
|
|
return;
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
2018-12-17 17:08:55 +00:00
|
|
|
if (adapter_to_pwrctl(padapter)->bFwCurrentInPSMode == true) {
|
2018-10-15 00:07:45 +00:00
|
|
|
padapter->hal_func.hal_dm_watchdog_in_lps(padapter);/* this function caller is in interrupt context */
|
|
|
|
}
|
2014-12-11 21:15:04 +00:00
|
|
|
}
|
2018-10-15 00:07:45 +00:00
|
|
|
#endif
|
2015-03-12 01:21:04 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_bcn_related_reg_setting(_adapter *padapter)
|
2013-05-19 04:28:07 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
padapter->hal_func.SetBeaconRelatedRegistersHandler(padapter);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2013-08-04 23:08:37 +00:00
|
|
|
|
2014-12-11 21:15:04 +00:00
|
|
|
#ifdef CONFIG_HOSTAPD_MLME
|
2018-10-15 00:07:45 +00:00
|
|
|
s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
if (padapter->hal_func.hostap_mgnt_xmit_entry)
|
|
|
|
return padapter->hal_func.hostap_mgnt_xmit_entry(padapter, pkt);
|
2014-12-11 21:15:04 +00:00
|
|
|
return _FAIL;
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2015-02-20 00:51:33 +00:00
|
|
|
#endif /* CONFIG_HOSTAPD_MLME */
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
#ifdef DBG_CONFIG_ERROR_DETECT
|
|
|
|
void rtw_hal_sreset_init(_adapter *padapter)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
padapter->hal_func.sreset_init_value(padapter);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_sreset_reset(_adapter *padapter)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2014-12-11 21:15:04 +00:00
|
|
|
padapter = GET_PRIMARY_ADAPTER(padapter);
|
2018-10-15 00:07:45 +00:00
|
|
|
padapter->hal_func.silentreset(padapter);
|
|
|
|
}
|
2014-12-11 21:15:04 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_sreset_reset_value(_adapter *padapter)
|
|
|
|
{
|
|
|
|
padapter->hal_func.sreset_reset_value(padapter);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_sreset_xmit_status_check(_adapter *padapter)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
padapter->hal_func.sreset_xmit_status_check(padapter);
|
|
|
|
}
|
|
|
|
void rtw_hal_sreset_linked_status_check(_adapter *padapter)
|
|
|
|
{
|
|
|
|
padapter->hal_func.sreset_linked_status_check(padapter);
|
|
|
|
}
|
|
|
|
u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter)
|
|
|
|
{
|
|
|
|
return padapter->hal_func.sreset_get_wifi_status(padapter);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
bool rtw_hal_sreset_inprogress(_adapter *padapter)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
padapter = GET_PRIMARY_ADAPTER(padapter);
|
|
|
|
return padapter->hal_func.sreset_inprogress(padapter);
|
|
|
|
}
|
|
|
|
#endif /* DBG_CONFIG_ERROR_DETECT */
|
2014-12-11 21:15:04 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
#ifdef CONFIG_IOL
|
|
|
|
int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_waiting_ms, u32 bndy_cnt)
|
|
|
|
{
|
|
|
|
if (adapter->hal_func.IOL_exec_cmds_sync)
|
|
|
|
return adapter->hal_func.IOL_exec_cmds_sync(adapter, xmit_frame, max_waiting_ms, bndy_cnt);
|
|
|
|
return _FAIL;
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2018-10-15 00:07:45 +00:00
|
|
|
#endif
|
2015-03-12 01:21:04 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
#ifdef CONFIG_XMIT_THREAD_MODE
|
|
|
|
s32 rtw_hal_xmit_thread_handler(_adapter *padapter)
|
2014-12-11 21:15:04 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
return padapter->hal_func.xmit_thread_handler(padapter);
|
|
|
|
}
|
|
|
|
#endif
|
2013-08-04 23:08:37 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
#ifdef CONFIG_RECV_THREAD_MODE
|
|
|
|
s32 rtw_hal_recv_hdl(_adapter *adapter)
|
|
|
|
{
|
|
|
|
return adapter->hal_func.recv_hdl(adapter);
|
2014-12-11 21:15:04 +00:00
|
|
|
}
|
2018-10-15 00:07:45 +00:00
|
|
|
#endif
|
2015-03-12 01:21:04 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
void rtw_hal_notch_filter(_adapter *adapter, bool enable)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
if (adapter->hal_func.hal_notch_filter)
|
|
|
|
adapter->hal_func.hal_notch_filter(adapter, enable);
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2013-08-04 23:08:37 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
#ifdef CONFIG_FW_C2H_REG
|
|
|
|
inline bool rtw_hal_c2h_valid(_adapter *adapter, u8 *buf)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
|
|
|
|
HAL_VERSION *hal_ver = &HalData->version_id;
|
|
|
|
bool ret = _FAIL;
|
2013-08-04 23:08:37 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
ret = C2H_ID_88XX(buf) || C2H_PLEN_88XX(buf);
|
2014-12-11 21:15:04 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
return ret;
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
inline s32 rtw_hal_c2h_evt_read(_adapter *adapter, u8 *buf)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
|
|
|
|
HAL_VERSION *hal_ver = &HalData->version_id;
|
|
|
|
s32 ret = _FAIL;
|
|
|
|
|
|
|
|
ret = c2h_evt_read_88xx(adapter, buf);
|
|
|
|
|
|
|
|
return ret;
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
bool rtw_hal_c2h_reg_hdr_parse(_adapter *adapter, u8 *buf, u8 *id, u8 *seq, u8 *plen, u8 **payload)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
|
|
|
|
HAL_VERSION *hal_ver = &HalData->version_id;
|
|
|
|
bool ret = _FAIL;
|
|
|
|
|
|
|
|
*id = C2H_ID_88XX(buf);
|
|
|
|
*seq = C2H_SEQ_88XX(buf);
|
|
|
|
*plen = C2H_PLEN_88XX(buf);
|
|
|
|
*payload = C2H_PAYLOAD_88XX(buf);
|
|
|
|
ret = _SUCCESS;
|
|
|
|
|
|
|
|
return ret;
|
2014-12-11 21:15:04 +00:00
|
|
|
}
|
2018-10-15 00:07:45 +00:00
|
|
|
#endif /* CONFIG_FW_C2H_REG */
|
2014-12-11 21:15:04 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
#ifdef CONFIG_FW_C2H_PKT
|
|
|
|
bool rtw_hal_c2h_pkt_hdr_parse(_adapter *adapter, u8 *buf, u16 len, u8 *id, u8 *seq, u8 *plen, u8 **payload)
|
2014-12-11 21:15:04 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
|
|
|
|
HAL_VERSION *hal_ver = &HalData->version_id;
|
|
|
|
bool ret = _FAIL;
|
|
|
|
|
|
|
|
if (!buf || len > 256 || len < 3)
|
|
|
|
goto exit;
|
|
|
|
|
|
|
|
*id = C2H_ID_88XX(buf);
|
|
|
|
*seq = C2H_SEQ_88XX(buf);
|
|
|
|
*plen = len - 2;
|
|
|
|
*payload = C2H_PAYLOAD_88XX(buf);
|
|
|
|
ret = _SUCCESS;
|
|
|
|
|
|
|
|
exit:
|
|
|
|
return ret;
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
2018-10-15 00:07:45 +00:00
|
|
|
#endif /* CONFIG_FW_C2H_PKT */
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
|
|
|
|
{
|
|
|
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
|
|
|
struct PHY_DM_STRUCT *odm = &hal_data->odmpriv;
|
|
|
|
u8 sub_id = 0;
|
|
|
|
s32 ret = _SUCCESS;
|
|
|
|
|
|
|
|
switch (id) {
|
|
|
|
case C2H_DBG:
|
|
|
|
RTW_INFO_DUMP("C2H_DBG: ", payload, plen);
|
|
|
|
break;
|
|
|
|
case C2H_FW_SCAN_COMPLETE:
|
|
|
|
RTW_INFO("[C2H], FW Scan Complete\n");
|
|
|
|
break;
|
|
|
|
#ifdef CONFIG_BT_COEXIST
|
|
|
|
case C2H_BT_INFO:
|
|
|
|
rtw_btcoex_BtInfoNotify(adapter, plen, payload);
|
|
|
|
break;
|
|
|
|
case C2H_BT_MP_INFO:
|
|
|
|
rtw_btcoex_BtMpRptNotify(adapter, plen, payload);
|
|
|
|
break;
|
|
|
|
case C2H_MAILBOX_STATUS:
|
|
|
|
RTW_INFO_DUMP("C2H_MAILBOX_STATUS: ", payload, plen);
|
|
|
|
break;
|
|
|
|
#endif /* CONFIG_BT_COEXIST */
|
|
|
|
case C2H_IQK_FINISH:
|
|
|
|
c2h_iqk_offload(adapter, payload, plen);
|
|
|
|
break;
|
|
|
|
#if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)
|
|
|
|
case C2H_FW_CHNL_SWITCH_COMPLETE:
|
|
|
|
rtw_tdls_chsw_oper_done(adapter);
|
|
|
|
break;
|
|
|
|
case C2H_BCN_EARLY_RPT:
|
|
|
|
rtw_tdls_ch_sw_back_to_base_chnl(adapter);
|
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_MCC_MODE
|
|
|
|
case C2H_MCC:
|
|
|
|
rtw_hal_mcc_c2h_handler(adapter, plen, payload);
|
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_RTW_MAC_HIDDEN_RPT
|
|
|
|
case C2H_MAC_HIDDEN_RPT:
|
|
|
|
c2h_mac_hidden_rpt_hdl(adapter, payload, plen);
|
|
|
|
break;
|
|
|
|
case C2H_MAC_HIDDEN_RPT_2:
|
|
|
|
c2h_mac_hidden_rpt_2_hdl(adapter, payload, plen);
|
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
case C2H_DEFEATURE_DBG:
|
|
|
|
c2h_defeature_dbg_hdl(adapter, payload, plen);
|
|
|
|
break;
|
|
|
|
|
|
|
|
#ifdef CONFIG_RTW_CUSTOMER_STR
|
|
|
|
case C2H_CUSTOMER_STR_RPT:
|
|
|
|
c2h_customer_str_rpt_hdl(adapter, payload, plen);
|
|
|
|
break;
|
|
|
|
case C2H_CUSTOMER_STR_RPT_2:
|
|
|
|
c2h_customer_str_rpt_2_hdl(adapter, payload, plen);
|
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
case C2H_EXTEND:
|
|
|
|
sub_id = payload[0];
|
|
|
|
/* no handle, goto default */
|
|
|
|
|
|
|
|
default:
|
2018-12-17 17:08:55 +00:00
|
|
|
if (phydm_c2H_content_parsing(odm, id, plen, payload) != true)
|
2018-10-15 00:07:45 +00:00
|
|
|
ret = _FAIL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
exit:
|
|
|
|
if (ret != _SUCCESS) {
|
|
|
|
if (id == C2H_EXTEND)
|
|
|
|
RTW_WARN("%s: unknown C2H(0x%02x, 0x%02x)\n", __func__, id, sub_id);
|
|
|
|
else
|
|
|
|
RTW_WARN("%s: unknown C2H(0x%02x)\n", __func__, id);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifndef RTW_HALMAC
|
|
|
|
s32 rtw_hal_c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
|
|
|
s32 ret = _FAIL;
|
2018-10-15 00:07:45 +00:00
|
|
|
|
|
|
|
ret = adapter->hal_func.c2h_handler(adapter, id, seq, plen, payload);
|
|
|
|
if (ret != _SUCCESS)
|
|
|
|
ret = c2h_handler(adapter, id, seq, plen, payload);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
s32 rtw_hal_c2h_id_handle_directly(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
|
|
|
|
{
|
|
|
|
switch (id) {
|
|
|
|
case C2H_CCX_TX_RPT:
|
|
|
|
case C2H_BT_MP_INFO:
|
|
|
|
case C2H_FW_CHNL_SWITCH_COMPLETE:
|
|
|
|
case C2H_IQK_FINISH:
|
|
|
|
case C2H_MCC:
|
|
|
|
case C2H_BCN_EARLY_RPT:
|
|
|
|
case C2H_AP_REQ_TXRPT:
|
|
|
|
case C2H_SPC_STAT:
|
2018-12-17 17:08:55 +00:00
|
|
|
return true;
|
2018-10-15 00:07:45 +00:00
|
|
|
default:
|
2018-12-17 17:08:55 +00:00
|
|
|
return false;
|
2018-10-15 00:07:45 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif /* !RTW_HALMAC */
|
|
|
|
|
|
|
|
s32 rtw_hal_is_disable_sw_channel_plan(PADAPTER padapter)
|
|
|
|
{
|
|
|
|
return GET_HAL_DATA(padapter)->bDisableSWChannelPlan;
|
|
|
|
}
|
|
|
|
|
|
|
|
s32 rtw_hal_macid_sleep(PADAPTER padapter, u8 macid)
|
|
|
|
{
|
|
|
|
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
|
|
|
|
struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
|
|
|
|
u8 support;
|
|
|
|
|
2018-12-17 17:08:55 +00:00
|
|
|
support = false;
|
2018-10-15 00:07:45 +00:00
|
|
|
rtw_hal_get_def_var(padapter, HAL_DEF_MACID_SLEEP, &support);
|
2018-12-17 17:08:55 +00:00
|
|
|
if (false == support)
|
2018-10-15 00:07:45 +00:00
|
|
|
return _FAIL;
|
|
|
|
|
|
|
|
if (macid >= macid_ctl->num) {
|
|
|
|
RTW_ERR(FUNC_ADPT_FMT": Invalid macid(%u)\n",
|
|
|
|
FUNC_ADPT_ARG(padapter), macid);
|
|
|
|
return _FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
rtw_hal_set_hwreg(padapter, HW_VAR_MACID_SLEEP, &macid);
|
|
|
|
|
|
|
|
return _SUCCESS;
|
|
|
|
}
|
|
|
|
|
|
|
|
s32 rtw_hal_macid_wakeup(PADAPTER padapter, u8 macid)
|
|
|
|
{
|
|
|
|
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
|
|
|
|
struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
|
|
|
|
u8 support;
|
|
|
|
|
2018-12-17 17:08:55 +00:00
|
|
|
support = false;
|
2018-10-15 00:07:45 +00:00
|
|
|
rtw_hal_get_def_var(padapter, HAL_DEF_MACID_SLEEP, &support);
|
2018-12-17 17:08:55 +00:00
|
|
|
if (false == support)
|
2018-10-15 00:07:45 +00:00
|
|
|
return _FAIL;
|
|
|
|
|
|
|
|
if (macid >= macid_ctl->num) {
|
|
|
|
RTW_ERR(FUNC_ADPT_FMT": Invalid macid(%u)\n",
|
|
|
|
FUNC_ADPT_ARG(padapter), macid);
|
|
|
|
return _FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
rtw_hal_set_hwreg(padapter, HW_VAR_MACID_WAKEUP, &macid);
|
|
|
|
|
|
|
|
return _SUCCESS;
|
|
|
|
}
|
|
|
|
|
|
|
|
s32 rtw_hal_fill_h2c_cmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer)
|
|
|
|
{
|
|
|
|
_adapter *pri_adapter = GET_PRIMARY_ADAPTER(padapter);
|
|
|
|
|
2018-12-17 17:08:55 +00:00
|
|
|
if (pri_adapter->bFWReady == true)
|
2018-10-15 00:07:45 +00:00
|
|
|
return padapter->hal_func.fill_h2c_cmd(padapter, ElementID, CmdLen, pCmdBuffer);
|
|
|
|
else if (padapter->registrypriv.mp_mode == 0)
|
|
|
|
RTW_PRINT(FUNC_ADPT_FMT" FW doesn't exit when no MP mode, by pass H2C id:0x%02x\n"
|
|
|
|
, FUNC_ADPT_ARG(padapter), ElementID);
|
|
|
|
return _FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
void rtw_hal_fill_fake_txdesc(_adapter *padapter, u8 *pDesc, u32 BufferLen,
|
|
|
|
u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame)
|
|
|
|
{
|
|
|
|
padapter->hal_func.fill_fake_txdesc(padapter, pDesc, BufferLen, IsPsPoll, IsBTQosNull, bDataFrame);
|
|
|
|
|
|
|
|
}
|
|
|
|
u8 rtw_hal_get_txbuff_rsvd_page_num(_adapter *adapter, bool wowlan)
|
|
|
|
{
|
|
|
|
return adapter->hal_func.hal_get_tx_buff_rsvd_page_num(adapter, wowlan);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_GPIO_API
|
|
|
|
void rtw_hal_update_hisr_hsisr_ind(_adapter *padapter, u32 flag)
|
|
|
|
{
|
|
|
|
if (padapter->hal_func.update_hisr_hsisr_ind)
|
|
|
|
padapter->hal_func.update_hisr_hsisr_ind(padapter, flag);
|
|
|
|
}
|
|
|
|
|
|
|
|
int rtw_hal_gpio_func_check(_adapter *padapter, u8 gpio_num)
|
|
|
|
{
|
|
|
|
int ret = _SUCCESS;
|
|
|
|
|
|
|
|
if (padapter->hal_func.hal_gpio_func_check)
|
|
|
|
ret = padapter->hal_func.hal_gpio_func_check(padapter, gpio_num);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
void rtw_hal_gpio_multi_func_reset(_adapter *padapter, u8 gpio_num)
|
|
|
|
{
|
|
|
|
if (padapter->hal_func.hal_gpio_multi_func_reset)
|
|
|
|
padapter->hal_func.hal_gpio_multi_func_reset(padapter, gpio_num);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
void rtw_hal_fw_correct_bcn(_adapter *padapter)
|
|
|
|
{
|
|
|
|
if (padapter->hal_func.fw_correct_bcn)
|
|
|
|
padapter->hal_func.fw_correct_bcn(padapter);
|
|
|
|
}
|
|
|
|
|
|
|
|
void rtw_hal_set_tx_power_index(PADAPTER padapter, u32 powerindex, u8 rfpath, u8 rate)
|
|
|
|
{
|
|
|
|
return padapter->hal_func.set_tx_power_index_handler(padapter, powerindex, rfpath, rate);
|
|
|
|
}
|
|
|
|
|
|
|
|
u8 rtw_hal_get_tx_power_index(PADAPTER padapter, u8 rfpath, u8 rate, u8 bandwidth, u8 channel, struct txpwr_idx_comp *tic)
|
|
|
|
{
|
|
|
|
return padapter->hal_func.get_tx_power_index_handler(padapter, rfpath, rate, bandwidth, channel, tic);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef RTW_HALMAC
|
|
|
|
/*
|
|
|
|
* Description:
|
|
|
|
* Initialize MAC registers
|
|
|
|
*
|
|
|
|
* Return:
|
2018-12-17 17:08:55 +00:00
|
|
|
* true success
|
|
|
|
* false fail
|
2018-10-15 00:07:45 +00:00
|
|
|
*/
|
|
|
|
u8 rtw_hal_init_mac_register(PADAPTER adapter)
|
|
|
|
{
|
|
|
|
return adapter->hal_func.init_mac_register(adapter);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Description:
|
|
|
|
* Initialize PHY(BB/RF) related functions
|
|
|
|
*
|
|
|
|
* Return:
|
2018-12-17 17:08:55 +00:00
|
|
|
* true success
|
|
|
|
* false fail
|
2018-10-15 00:07:45 +00:00
|
|
|
*/
|
|
|
|
u8 rtw_hal_init_phy(PADAPTER adapter)
|
|
|
|
{
|
|
|
|
return adapter->hal_func.init_phy(adapter);
|
|
|
|
}
|
|
|
|
#endif /* RTW_HALMAC */
|
|
|
|
|
|
|
|
#ifdef CONFIG_RFKILL_POLL
|
|
|
|
bool rtw_hal_rfkill_poll(_adapter *adapter, u8 *valid)
|
|
|
|
{
|
|
|
|
bool ret;
|
|
|
|
|
|
|
|
if (adapter->hal_func.hal_radio_onoff_check)
|
|
|
|
ret = adapter->hal_func.hal_radio_onoff_check(adapter, valid);
|
|
|
|
else {
|
|
|
|
*valid = 0;
|
2018-12-17 17:08:55 +00:00
|
|
|
ret = false;
|
2018-10-15 00:07:45 +00:00
|
|
|
}
|
2013-05-08 21:45:39 +00:00
|
|
|
return ret;
|
|
|
|
}
|
2018-10-15 00:07:45 +00:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#define rtw_hal_error_msg(ops_fun) \
|
2018-11-03 19:22:43 +00:00
|
|
|
RTW_PRINT("### %s - Error : Please hook hal_func.%s ###\n", __func__, ops_fun)
|
2013-05-08 21:45:39 +00:00
|
|
|
|
2018-10-15 00:07:45 +00:00
|
|
|
u8 rtw_hal_ops_check(_adapter *padapter)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
2018-10-15 00:07:45 +00:00
|
|
|
u8 ret = _SUCCESS;
|
|
|
|
/*** initialize section ***/
|
|
|
|
if (NULL == padapter->hal_func.read_chip_version) {
|
|
|
|
rtw_hal_error_msg("read_chip_version");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
if (NULL == padapter->hal_func.init_default_value) {
|
|
|
|
rtw_hal_error_msg("init_default_value");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
if (NULL == padapter->hal_func.intf_chip_configure) {
|
|
|
|
rtw_hal_error_msg("intf_chip_configure");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
if (NULL == padapter->hal_func.read_adapter_info) {
|
|
|
|
rtw_hal_error_msg("read_adapter_info");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (NULL == padapter->hal_func.hal_power_on) {
|
|
|
|
rtw_hal_error_msg("hal_power_on");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
if (NULL == padapter->hal_func.hal_power_off) {
|
|
|
|
rtw_hal_error_msg("hal_power_off");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (NULL == padapter->hal_func.hal_init) {
|
|
|
|
rtw_hal_error_msg("hal_init");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
if (NULL == padapter->hal_func.hal_deinit) {
|
|
|
|
rtw_hal_error_msg("hal_deinit");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*** xmit section ***/
|
|
|
|
if (NULL == padapter->hal_func.init_xmit_priv) {
|
|
|
|
rtw_hal_error_msg("init_xmit_priv");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
if (NULL == padapter->hal_func.free_xmit_priv) {
|
|
|
|
rtw_hal_error_msg("free_xmit_priv");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
if (NULL == padapter->hal_func.hal_xmit) {
|
|
|
|
rtw_hal_error_msg("hal_xmit");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
if (NULL == padapter->hal_func.mgnt_xmit) {
|
|
|
|
rtw_hal_error_msg("mgnt_xmit");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
#ifdef CONFIG_XMIT_THREAD_MODE
|
|
|
|
if (NULL == padapter->hal_func.xmit_thread_handler) {
|
|
|
|
rtw_hal_error_msg("xmit_thread_handler");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
if (NULL == padapter->hal_func.hal_xmitframe_enqueue) {
|
|
|
|
rtw_hal_error_msg("hal_xmitframe_enqueue");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*** recv section ***/
|
|
|
|
if (NULL == padapter->hal_func.init_recv_priv) {
|
|
|
|
rtw_hal_error_msg("init_recv_priv");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
if (NULL == padapter->hal_func.free_recv_priv) {
|
|
|
|
rtw_hal_error_msg("free_recv_priv");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
#ifdef CONFIG_RECV_THREAD_MODE
|
|
|
|
if (NULL == padapter->hal_func.recv_hdl) {
|
|
|
|
rtw_hal_error_msg("recv_hdl");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
if (NULL == padapter->hal_func.inirp_init) {
|
|
|
|
rtw_hal_error_msg("inirp_init");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
if (NULL == padapter->hal_func.inirp_deinit) {
|
|
|
|
rtw_hal_error_msg("inirp_deinit");
|
|
|
|
ret = _FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*** interrupt hdl section ***/
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2018-11-04 00:31:49 +00:00
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#if (defined(CONFIG_SUPPORT_USB_INT))
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2018-10-15 00:07:45 +00:00
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if (NULL == padapter->hal_func.interrupt_handler) {
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rtw_hal_error_msg("interrupt_handler");
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ret = _FAIL;
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}
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2018-11-04 00:31:49 +00:00
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#endif /*#if ((CONFIG_SUPPORT_USB_INT))*/
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2018-10-15 00:07:45 +00:00
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/*** DM section ***/
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if (NULL == padapter->hal_func.dm_init) {
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rtw_hal_error_msg("dm_init");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.dm_deinit) {
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rtw_hal_error_msg("dm_deinit");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.hal_dm_watchdog) {
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rtw_hal_error_msg("hal_dm_watchdog");
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ret = _FAIL;
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}
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#ifdef CONFIG_LPS_LCLK_WD_TIMER
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if (NULL == padapter->hal_func.hal_dm_watchdog_in_lps) {
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rtw_hal_error_msg("hal_dm_watchdog_in_lps");
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ret = _FAIL;
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}
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#endif
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/*** xxx section ***/
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if (NULL == padapter->hal_func.set_chnl_bw_handler) {
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rtw_hal_error_msg("set_chnl_bw_handler");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.set_hw_reg_handler) {
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rtw_hal_error_msg("set_hw_reg_handler");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.GetHwRegHandler) {
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rtw_hal_error_msg("GetHwRegHandler");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.get_hal_def_var_handler) {
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rtw_hal_error_msg("get_hal_def_var_handler");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.SetHalDefVarHandler) {
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rtw_hal_error_msg("SetHalDefVarHandler");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.GetHalODMVarHandler) {
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rtw_hal_error_msg("GetHalODMVarHandler");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.SetHalODMVarHandler) {
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rtw_hal_error_msg("SetHalODMVarHandler");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.update_ra_mask_handler) {
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rtw_hal_error_msg("update_ra_mask_handler");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.SetBeaconRelatedRegistersHandler) {
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rtw_hal_error_msg("SetBeaconRelatedRegistersHandler");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.fill_h2c_cmd) {
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rtw_hal_error_msg("fill_h2c_cmd");
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ret = _FAIL;
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}
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#ifdef RTW_HALMAC
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if (NULL == padapter->hal_func.hal_mac_c2h_handler) {
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rtw_hal_error_msg("hal_mac_c2h_handler");
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ret = _FAIL;
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}
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#endif
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#if defined(CONFIG_LPS) || defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
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if (NULL == padapter->hal_func.fill_fake_txdesc) {
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rtw_hal_error_msg("fill_fake_txdesc");
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ret = _FAIL;
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}
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#endif
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if (NULL == padapter->hal_func.hal_get_tx_buff_rsvd_page_num) {
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rtw_hal_error_msg("hal_get_tx_buff_rsvd_page_num");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.fw_dl) {
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rtw_hal_error_msg("fw_dl");
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ret = _FAIL;
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}
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if (!padapter->hal_func.get_tx_power_index_handler) {
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rtw_hal_error_msg("get_tx_power_index_handler");
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ret = _FAIL;
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}
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/*** SReset section ***/
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#ifdef DBG_CONFIG_ERROR_DETECT
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if (NULL == padapter->hal_func.sreset_init_value) {
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rtw_hal_error_msg("sreset_init_value");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.sreset_reset_value) {
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rtw_hal_error_msg("sreset_reset_value");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.silentreset) {
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rtw_hal_error_msg("silentreset");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.sreset_xmit_status_check) {
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rtw_hal_error_msg("sreset_xmit_status_check");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.sreset_linked_status_check) {
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rtw_hal_error_msg("sreset_linked_status_check");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.sreset_get_wifi_status) {
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rtw_hal_error_msg("sreset_get_wifi_status");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.sreset_inprogress) {
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rtw_hal_error_msg("sreset_inprogress");
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ret = _FAIL;
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}
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#endif /* #ifdef DBG_CONFIG_ERROR_DETECT */
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#ifdef RTW_HALMAC
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if (NULL == padapter->hal_func.init_mac_register) {
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rtw_hal_error_msg("init_mac_register");
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ret = _FAIL;
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}
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if (NULL == padapter->hal_func.init_phy) {
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rtw_hal_error_msg("init_phy");
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ret = _FAIL;
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}
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#endif /* RTW_HALMAC */
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#ifdef CONFIG_RFKILL_POLL
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if (padapter->hal_func.hal_radio_onoff_check == NULL) {
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rtw_hal_error_msg("hal_radio_onoff_check");
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ret = _FAIL;
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}
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#endif
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return ret;
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2013-05-08 21:45:39 +00:00
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}
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