mirror of
https://github.com/lwfinger/rtl8188eu.git
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rtl8188eu: Place driver rtl8188EUS_rtl8189ES_linux_v4.1.8_9499.20131104 in branch v4.1.8_9499
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
bad0b4cde4
commit
065126d8ce
247 changed files with 192113 additions and 30447 deletions
781
include/rtw_mp.h
Normal file → Executable file
781
include/rtw_mp.h
Normal file → Executable file
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@ -1,7 +1,7 @@
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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@ -20,8 +20,9 @@
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#ifndef _RTW_MP_H_
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#define _RTW_MP_H_
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/* 00 - Success */
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/* 11 - Error */
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#ifndef PLATFORM_WINDOWS
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// 00 - Success
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// 11 - Error
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#define STATUS_SUCCESS (0x00000000L)
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#define STATUS_PENDING (0x00000103L)
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@ -29,107 +30,180 @@
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#define STATUS_INSUFFICIENT_RESOURCES (0xC000009AL)
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#define STATUS_NOT_SUPPORTED (0xC00000BBL)
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#define NDIS_STATUS_SUCCESS ((int)STATUS_SUCCESS)
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#define NDIS_STATUS_PENDING ((int)STATUS_PENDING)
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#define NDIS_STATUS_NOT_RECOGNIZED ((int)0x00010001L)
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#define NDIS_STATUS_NOT_COPIED ((int)0x00010002L)
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#define NDIS_STATUS_NOT_ACCEPTED ((int)0x00010003L)
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#define NDIS_STATUS_CALL_ACTIVE ((int)0x00010007L)
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#define NDIS_STATUS_SUCCESS ((NDIS_STATUS)STATUS_SUCCESS)
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#define NDIS_STATUS_PENDING ((NDIS_STATUS)STATUS_PENDING)
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#define NDIS_STATUS_NOT_RECOGNIZED ((NDIS_STATUS)0x00010001L)
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#define NDIS_STATUS_NOT_COPIED ((NDIS_STATUS)0x00010002L)
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#define NDIS_STATUS_NOT_ACCEPTED ((NDIS_STATUS)0x00010003L)
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#define NDIS_STATUS_CALL_ACTIVE ((NDIS_STATUS)0x00010007L)
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#define NDIS_STATUS_FAILURE ((int)STATUS_UNSUCCESSFUL)
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#define NDIS_STATUS_RESOURCES ((int)STATUS_INSUFFICIENT_RESOURCES)
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#define NDIS_STATUS_CLOSING ((int)0xC0010002L)
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#define NDIS_STATUS_BAD_VERSION ((int)0xC0010004L)
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#define NDIS_STATUS_BAD_CHARACTERISTICS ((int)0xC0010005L)
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#define NDIS_STATUS_ADAPTER_NOT_FOUND ((int)0xC0010006L)
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#define NDIS_STATUS_OPEN_FAILED ((int)0xC0010007L)
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#define NDIS_STATUS_DEVICE_FAILED ((int)0xC0010008L)
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#define NDIS_STATUS_MULTICAST_FULL ((int)0xC0010009L)
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#define NDIS_STATUS_MULTICAST_EXISTS ((int)0xC001000AL)
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#define NDIS_STATUS_MULTICAST_NOT_FOUND ((int)0xC001000BL)
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#define NDIS_STATUS_REQUEST_ABORTED ((int)0xC001000CL)
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#define NDIS_STATUS_RESET_IN_PROGRESS ((int)0xC001000DL)
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#define NDIS_STATUS_CLOSING_INDICATING ((int)0xC001000EL)
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#define NDIS_STATUS_NOT_SUPPORTED ((int)STATUS_NOT_SUPPORTED)
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#define NDIS_STATUS_INVALID_PACKET ((int)0xC001000FL)
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#define NDIS_STATUS_OPEN_LIST_FULL ((int)0xC0010010L)
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#define NDIS_STATUS_ADAPTER_NOT_READY ((int)0xC0010011L)
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#define NDIS_STATUS_ADAPTER_NOT_OPEN ((int)0xC0010012L)
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#define NDIS_STATUS_NOT_INDICATING ((int)0xC0010013L)
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#define NDIS_STATUS_INVALID_LENGTH ((int)0xC0010014L)
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#define NDIS_STATUS_INVALID_DATA ((int)0xC0010015L)
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#define NDIS_STATUS_BUFFER_TOO_SHORT ((int)0xC0010016L)
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#define NDIS_STATUS_INVALID_OID ((int)0xC0010017L)
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#define NDIS_STATUS_ADAPTER_REMOVED ((int)0xC0010018L)
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#define NDIS_STATUS_UNSUPPORTED_MEDIA ((int)0xC0010019L)
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#define NDIS_STATUS_GROUP_ADDRESS_IN_USE ((int)0xC001001AL)
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#define NDIS_STATUS_FILE_NOT_FOUND ((int)0xC001001BL)
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#define NDIS_STATUS_ERROR_READING_FILE ((int)0xC001001CL)
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#define NDIS_STATUS_ALREADY_MAPPED ((int)0xC001001DL)
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#define NDIS_STATUS_RESOURCE_CONFLICT ((int)0xC001001EL)
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#define NDIS_STATUS_NO_CABLE ((int)0xC001001FL)
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#define NDIS_STATUS_FAILURE ((NDIS_STATUS)STATUS_UNSUCCESSFUL)
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#define NDIS_STATUS_RESOURCES ((NDIS_STATUS)STATUS_INSUFFICIENT_RESOURCES)
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#define NDIS_STATUS_CLOSING ((NDIS_STATUS)0xC0010002L)
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#define NDIS_STATUS_BAD_VERSION ((NDIS_STATUS)0xC0010004L)
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#define NDIS_STATUS_BAD_CHARACTERISTICS ((NDIS_STATUS)0xC0010005L)
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#define NDIS_STATUS_ADAPTER_NOT_FOUND ((NDIS_STATUS)0xC0010006L)
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#define NDIS_STATUS_OPEN_FAILED ((NDIS_STATUS)0xC0010007L)
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#define NDIS_STATUS_DEVICE_FAILED ((NDIS_STATUS)0xC0010008L)
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#define NDIS_STATUS_MULTICAST_FULL ((NDIS_STATUS)0xC0010009L)
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#define NDIS_STATUS_MULTICAST_EXISTS ((NDIS_STATUS)0xC001000AL)
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#define NDIS_STATUS_MULTICAST_NOT_FOUND ((NDIS_STATUS)0xC001000BL)
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#define NDIS_STATUS_REQUEST_ABORTED ((NDIS_STATUS)0xC001000CL)
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#define NDIS_STATUS_RESET_IN_PROGRESS ((NDIS_STATUS)0xC001000DL)
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#define NDIS_STATUS_CLOSING_INDICATING ((NDIS_STATUS)0xC001000EL)
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#define NDIS_STATUS_NOT_SUPPORTED ((NDIS_STATUS)STATUS_NOT_SUPPORTED)
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#define NDIS_STATUS_INVALID_PACKET ((NDIS_STATUS)0xC001000FL)
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#define NDIS_STATUS_OPEN_LIST_FULL ((NDIS_STATUS)0xC0010010L)
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#define NDIS_STATUS_ADAPTER_NOT_READY ((NDIS_STATUS)0xC0010011L)
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#define NDIS_STATUS_ADAPTER_NOT_OPEN ((NDIS_STATUS)0xC0010012L)
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#define NDIS_STATUS_NOT_INDICATING ((NDIS_STATUS)0xC0010013L)
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#define NDIS_STATUS_INVALID_LENGTH ((NDIS_STATUS)0xC0010014L)
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#define NDIS_STATUS_INVALID_DATA ((NDIS_STATUS)0xC0010015L)
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#define NDIS_STATUS_BUFFER_TOO_SHORT ((NDIS_STATUS)0xC0010016L)
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#define NDIS_STATUS_INVALID_OID ((NDIS_STATUS)0xC0010017L)
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#define NDIS_STATUS_ADAPTER_REMOVED ((NDIS_STATUS)0xC0010018L)
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#define NDIS_STATUS_UNSUPPORTED_MEDIA ((NDIS_STATUS)0xC0010019L)
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#define NDIS_STATUS_GROUP_ADDRESS_IN_USE ((NDIS_STATUS)0xC001001AL)
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#define NDIS_STATUS_FILE_NOT_FOUND ((NDIS_STATUS)0xC001001BL)
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#define NDIS_STATUS_ERROR_READING_FILE ((NDIS_STATUS)0xC001001CL)
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#define NDIS_STATUS_ALREADY_MAPPED ((NDIS_STATUS)0xC001001DL)
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#define NDIS_STATUS_RESOURCE_CONFLICT ((NDIS_STATUS)0xC001001EL)
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#define NDIS_STATUS_NO_CABLE ((NDIS_STATUS)0xC001001FL)
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#define NDIS_STATUS_INVALID_SAP ((int)0xC0010020L)
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#define NDIS_STATUS_SAP_IN_USE ((int)0xC0010021L)
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#define NDIS_STATUS_INVALID_ADDRESS ((int)0xC0010022L)
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#define NDIS_STATUS_VC_NOT_ACTIVATED ((int)0xC0010023L)
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#define NDIS_STATUS_DEST_OUT_OF_ORDER ((int)0xC0010024L) /*cause 27*/
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#define NDIS_STATUS_VC_NOT_AVAILABLE ((int)0xC0010025L) /*cause 35,45 */
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#define NDIS_STATUS_CELLRATE_NOT_AVAILABLE ((int)0xC0010026L) /*cause 37*/
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#define NDIS_STATUS_INCOMPATABLE_QOS ((int)0xC0010027L) /*cause 49*/
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#define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED ((int)0xC0010028L) /*cause 93*/
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#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((int)0xC0010029L) /*cause 3 */
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#define NDIS_STATUS_INVALID_SAP ((NDIS_STATUS)0xC0010020L)
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#define NDIS_STATUS_SAP_IN_USE ((NDIS_STATUS)0xC0010021L)
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#define NDIS_STATUS_INVALID_ADDRESS ((NDIS_STATUS)0xC0010022L)
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#define NDIS_STATUS_VC_NOT_ACTIVATED ((NDIS_STATUS)0xC0010023L)
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#define NDIS_STATUS_DEST_OUT_OF_ORDER ((NDIS_STATUS)0xC0010024L) // cause 27
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#define NDIS_STATUS_VC_NOT_AVAILABLE ((NDIS_STATUS)0xC0010025L) // cause 35,45
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#define NDIS_STATUS_CELLRATE_NOT_AVAILABLE ((NDIS_STATUS)0xC0010026L) // cause 37
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#define NDIS_STATUS_INCOMPATABLE_QOS ((NDIS_STATUS)0xC0010027L) // cause 49
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#define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED ((NDIS_STATUS)0xC0010028L) // cause 93
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#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((NDIS_STATUS)0xC0010029L) // cause 3
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#endif /* #ifndef PLATFORM_WINDOWS */
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enum antenna_path {
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ANTENNA_NONE = 0x00,
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ANTENNA_D,
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ANTENNA_C,
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ANTENNA_CD,
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ANTENNA_B,
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ANTENNA_BD,
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ANTENNA_BC,
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ANTENNA_BCD,
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ANTENNA_A,
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ANTENNA_AD,
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ANTENNA_AC,
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ANTENNA_ACD,
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ANTENNA_AB,
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ANTENNA_ABD,
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ANTENNA_ABC,
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ANTENNA_ABCD
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};
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#if 0
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#define MPT_NOOP 0
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#define MPT_READ_MAC_1BYTE 1
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#define MPT_READ_MAC_2BYTE 2
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#define MPT_READ_MAC_4BYTE 3
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#define MPT_WRITE_MAC_1BYTE 4
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#define MPT_WRITE_MAC_2BYTE 5
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#define MPT_WRITE_MAC_4BYTE 6
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#define MPT_READ_BB_CCK 7
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#define MPT_WRITE_BB_CCK 8
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#define MPT_READ_BB_OFDM 9
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#define MPT_WRITE_BB_OFDM 10
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#define MPT_READ_RF 11
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#define MPT_WRITE_RF 12
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#define MPT_READ_EEPROM_1BYTE 13
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#define MPT_WRITE_EEPROM_1BYTE 14
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#define MPT_READ_EEPROM_2BYTE 15
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#define MPT_WRITE_EEPROM_2BYTE 16
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#define MPT_SET_CSTHRESHOLD 21
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#define MPT_SET_INITGAIN 22
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#define MPT_SWITCH_BAND 23
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#define MPT_SWITCH_CHANNEL 24
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#define MPT_SET_DATARATE 25
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#define MPT_SWITCH_ANTENNA 26
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#define MPT_SET_TX_POWER 27
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#define MPT_SET_CONT_TX 28
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#define MPT_SET_SINGLE_CARRIER 29
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#define MPT_SET_CARRIER_SUPPRESSION 30
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#define MPT_GET_RATE_TABLE 31
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#define MPT_READ_TSSI 32
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#define MPT_GET_THERMAL_METER 33
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#endif
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#define MAX_MP_XMITBUF_SZ 2048
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typedef enum _ANTENNA_PATH{
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ANTENNA_NONE = 0x00,
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ANTENNA_D ,
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ANTENNA_C ,
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ANTENNA_CD ,
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ANTENNA_B ,
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ANTENNA_BD ,
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ANTENNA_BC ,
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ANTENNA_BCD ,
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ANTENNA_A ,
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ANTENNA_AD ,
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ANTENNA_AC ,
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ANTENNA_ACD ,
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ANTENNA_AB ,
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ANTENNA_ABD ,
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ANTENNA_ABC ,
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ANTENNA_ABCD
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} ANTENNA_PATH;
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#define MAX_MP_XMITBUF_SZ 2048
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#define NR_MP_XMITFRAME 8
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struct mp_xmit_frame {
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struct list_head list;
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struct mp_xmit_frame
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{
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_list list;
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struct pkt_attrib attrib;
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struct sk_buff *pkt;
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_pkt *pkt;
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int frame_tag;
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struct adapter *padapter;
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struct urb *pxmit_urb[8];
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/* insert urb, irp, and irpcnt info below... */
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_adapter *padapter;
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#ifdef CONFIG_USB_HCI
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//insert urb, irp, and irpcnt info below...
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//max frag_cnt = 8
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u8 *mem_addr;
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u32 sz[8];
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#if defined(PLATFORM_OS_XP) || defined(PLATFORM_LINUX)
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PURB pxmit_urb[8];
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#endif
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#ifdef PLATFORM_OS_XP
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PIRP pxmit_irp[8];
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#endif
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u8 bpending[8];
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int ac_tag[8];
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int last[8];
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sint ac_tag[8];
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sint last[8];
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uint irpcnt;
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uint fragcnt;
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#endif /* CONFIG_USB_HCI */
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uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
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};
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struct mp_wiparam {
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struct mp_wiparam
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{
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u32 bcompleted;
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u32 act_type;
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u32 io_offset;
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u32 io_value;
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};
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typedef void(*wi_act_func)(void *padapter);
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typedef void(*wi_act_func)(void* padapter);
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struct mp_tx {
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#ifdef PLATFORM_WINDOWS
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struct mp_wi_cntx
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{
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u8 bmpdrv_unload;
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// Work Item
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NDIS_WORK_ITEM mp_wi;
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NDIS_EVENT mp_wi_evt;
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_lock mp_wi_lock;
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u8 bmp_wi_progress;
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wi_act_func curractfunc;
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// Variable needed in each implementation of CurrActFunc.
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struct mp_wiparam param;
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};
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#endif
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struct mp_tx
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{
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u8 stop;
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u32 count, sended;
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u8 payload;
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@ -138,106 +212,167 @@ struct mp_tx {
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u8 *pallocated_buf;
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u8 *buf;
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u32 buf_size, write_size;
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void *PktTxThread;
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_thread_hdl_ PktTxThread;
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};
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#if defined(CONFIG_RTL8192C) || defined(CONFIG_RTL8192D) || defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8188E)
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#ifdef CONFIG_RTL8192C
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#include <Hal8192CPhyCfg.h>
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#endif
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#ifdef CONFIG_RTL8192D
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#include <Hal8192DPhyCfg.h>
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#endif
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#ifdef CONFIG_RTL8723A
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#include <Hal8723APhyCfg.h>
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#endif
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#ifdef CONFIG_RTL8188E
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#include <Hal8188EPhyCfg.h>
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#endif
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#define MP_MAX_LINES 1000
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#define MP_MAX_LINES_BYTES 256
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#define u1Byte u8
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#define s1Byte s8
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#define u4Byte u32
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#define s4Byte s32
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#define u1Byte u8
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#define pu1Byte u8*
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typedef void (*MPT_WORK_ITEM_HANDLER)(void *Adapter);
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#define u2Byte u16
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#define pu2Byte u16*
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struct mpt_context {
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/* Indicate if we have started Mass Production Test. */
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bool bMassProdTest;
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#define u4Byte u32
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#define pu4Byte u32*
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/* Indicate if the driver is unloading or unloaded. */
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bool bMptDrvUnload;
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#define u8Byte u64
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#define pu8Byte u64*
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struct semaphore MPh2c_Sema;
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struct timer_list MPh2c_timeout_timer;
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/* Event used to sync H2c for BT control */
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#define s1Byte s8
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#define ps1Byte s8*
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bool MptH2cRspEvent;
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bool MptBtC2hEvent;
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bool bMPh2c_timeout;
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#define s2Byte s16
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#define ps2Byte s16*
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#define s4Byte s32
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#define ps4Byte s32*
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#define s8Byte s64
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#define ps8Byte s64*
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#define UCHAR u8
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#define USHORT u16
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#define UINT u32
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#define ULONG u32
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#define PULONG u32*
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typedef VOID (*MPT_WORK_ITEM_HANDLER)(IN PVOID Adapter);
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typedef struct _MPT_CONTEXT
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{
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// Indicate if we have started Mass Production Test.
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BOOLEAN bMassProdTest;
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// Indicate if the driver is unloading or unloaded.
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BOOLEAN bMptDrvUnload;
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_sema MPh2c_Sema;
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_timer MPh2c_timeout_timer;
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// Event used to sync H2c for BT control
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BOOLEAN MptH2cRspEvent;
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BOOLEAN MptBtC2hEvent;
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BOOLEAN bMPh2c_timeout;
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/* 8190 PCI does not support NDIS_WORK_ITEM. */
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/* Work Item for Mass Production Test. */
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/* Event used to sync the case unloading driver and MptWorkItem
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* is still in progress. */
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/* Indicate a MptWorkItem is scheduled and not yet finished. */
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bool bMptWorkItemInProgress;
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/* An instance which implements function and context of MptWorkItem. */
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// Work Item for Mass Production Test.
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//NDIS_WORK_ITEM MptWorkItem;
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// RT_WORK_ITEM MptWorkItem;
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// Event used to sync the case unloading driver and MptWorkItem is still in progress.
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// NDIS_EVENT MptWorkItemEvent;
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// To protect the following variables.
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// NDIS_SPIN_LOCK MptWorkItemSpinLock;
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// Indicate a MptWorkItem is scheduled and not yet finished.
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BOOLEAN bMptWorkItemInProgress;
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// An instance which implements function and context of MptWorkItem.
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MPT_WORK_ITEM_HANDLER CurrMptAct;
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/* 1=Start, 0=Stop from UI. */
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u32 MptTestStart;
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/* _TEST_MODE, defined in MPT_Req2.h */
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||||
u32 MptTestItem;
|
||||
/* Variable needed in each implementation of CurrMptAct. */
|
||||
u32 MptActType; /* Type of action performed in CurrMptAct. */
|
||||
/* The Offset of IO operation is depend of MptActType. */
|
||||
u32 MptIoOffset;
|
||||
/* The Value of IO operation is depend of MptActType. */
|
||||
u32 MptIoValue;
|
||||
/* The RfPath of IO operation is depend of MptActType. */
|
||||
u32 MptRfPath;
|
||||
// 1=Start, 0=Stop from UI.
|
||||
ULONG MptTestStart;
|
||||
// _TEST_MODE, defined in MPT_Req2.h
|
||||
ULONG MptTestItem;
|
||||
// Variable needed in each implementation of CurrMptAct.
|
||||
ULONG MptActType; // Type of action performed in CurrMptAct.
|
||||
// The Offset of IO operation is depend of MptActType.
|
||||
ULONG MptIoOffset;
|
||||
// The Value of IO operation is depend of MptActType.
|
||||
ULONG MptIoValue;
|
||||
// The RfPath of IO operation is depend of MptActType.
|
||||
ULONG MptRfPath;
|
||||
|
||||
enum wireless_mode MptWirelessModeToSw; /* Wireless mode to switch. */
|
||||
u8 MptChannelToSw; /* Channel to switch. */
|
||||
u8 MptInitGainToSet; /* Initial gain to set. */
|
||||
u32 MptBandWidth; /* bandwidth to switch. */
|
||||
u32 MptRateIndex; /* rate index. */
|
||||
/* Register value kept for Single Carrier Tx test. */
|
||||
u8 btMpCckTxPower;
|
||||
/* Register value kept for Single Carrier Tx test. */
|
||||
u8 btMpOfdmTxPower;
|
||||
/* For MP Tx Power index */
|
||||
u8 TxPwrLevel[2]; /* rf-A, rf-B */
|
||||
WIRELESS_MODE MptWirelessModeToSw; // Wireless mode to switch.
|
||||
u8 MptChannelToSw; // Channel to switch.
|
||||
u8 MptInitGainToSet; // Initial gain to set.
|
||||
//ULONG bMptAntennaA; // TRUE if we want to use antenna A.
|
||||
ULONG MptBandWidth; // bandwidth to switch.
|
||||
ULONG MptRateIndex; // rate index.
|
||||
// Register value kept for Single Carrier Tx test.
|
||||
u8 btMpCckTxPower;
|
||||
// Register value kept for Single Carrier Tx test.
|
||||
u8 btMpOfdmTxPower;
|
||||
// For MP Tx Power index
|
||||
u8 TxPwrLevel[2]; // rf-A, rf-B
|
||||
|
||||
/* Content of RCR Regsiter for Mass Production Test. */
|
||||
u32 MptRCR;
|
||||
/* true if we only receive packets with specific pattern. */
|
||||
bool bMptFilterPattern;
|
||||
/* Rx OK count, statistics used in Mass Production Test. */
|
||||
u32 MptRxOkCnt;
|
||||
/* Rx CRC32 error count, statistics used in Mass Production Test. */
|
||||
u32 MptRxCrcErrCnt;
|
||||
// Content of RCR Regsiter for Mass Production Test.
|
||||
ULONG MptRCR;
|
||||
// TRUE if we only receive packets with specific pattern.
|
||||
BOOLEAN bMptFilterPattern;
|
||||
// Rx OK count, statistics used in Mass Production Test.
|
||||
ULONG MptRxOkCnt;
|
||||
// Rx CRC32 error count, statistics used in Mass Production Test.
|
||||
ULONG MptRxCrcErrCnt;
|
||||
|
||||
bool bCckContTx; /* true if we are in CCK Continuous Tx test. */
|
||||
bool bOfdmContTx; /* true if we are in OFDM Continuous Tx test. */
|
||||
bool bStartContTx; /* true if we have start Continuous Tx test. */
|
||||
/* true if we are in Single Carrier Tx test. */
|
||||
bool bSingleCarrier;
|
||||
/* true if we are in Carrier Suppression Tx Test. */
|
||||
bool bCarrierSuppression;
|
||||
/* true if we are in Single Tone Tx test. */
|
||||
bool bSingleTone;
|
||||
BOOLEAN bCckContTx; // TRUE if we are in CCK Continuous Tx test.
|
||||
BOOLEAN bOfdmContTx; // TRUE if we are in OFDM Continuous Tx test.
|
||||
BOOLEAN bStartContTx; // TRUE if we have start Continuous Tx test.
|
||||
// TRUE if we are in Single Carrier Tx test.
|
||||
BOOLEAN bSingleCarrier;
|
||||
// TRUE if we are in Carrier Suppression Tx Test.
|
||||
BOOLEAN bCarrierSuppression;
|
||||
//TRUE if we are in Single Tone Tx test.
|
||||
BOOLEAN bSingleTone;
|
||||
|
||||
/* ACK counter asked by K.Y.. */
|
||||
bool bMptEnableAckCounter;
|
||||
u32 MptAckCounter;
|
||||
// ACK counter asked by K.Y..
|
||||
BOOLEAN bMptEnableAckCounter;
|
||||
ULONG MptAckCounter;
|
||||
|
||||
u8 APK_bound[2]; /* for APK path A/path B */
|
||||
bool bMptIndexEven;
|
||||
// SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~!
|
||||
//s1Byte BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT];
|
||||
//s1Byte BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES];
|
||||
//s4Byte RfReadLine[2];
|
||||
|
||||
u8 backup0xc50;
|
||||
u8 backup0xc58;
|
||||
u8 backup0xc30;
|
||||
u8 backup0x52_RF_A;
|
||||
u8 backup0x52_RF_B;
|
||||
u8 APK_bound[2]; //for APK path A/path B
|
||||
BOOLEAN bMptIndexEven;
|
||||
|
||||
u8 h2cReqNum;
|
||||
u8 c2hBuf[20];
|
||||
u8 backup0xc50;
|
||||
u8 backup0xc58;
|
||||
u8 backup0xc30;
|
||||
u8 backup0x52_RF_A;
|
||||
u8 backup0x52_RF_B;
|
||||
|
||||
u1Byte h2cReqNum;
|
||||
u1Byte c2hBuf[20];
|
||||
|
||||
u8 btInBuf[100];
|
||||
u32 mptOutLen;
|
||||
u8 mptOutBuf[100];
|
||||
};
|
||||
u1Byte btInBuf[100];
|
||||
ULONG mptOutLen;
|
||||
u1Byte mptOutBuf[100];
|
||||
|
||||
}MPT_CONTEXT, *PMPT_CONTEXT;
|
||||
#endif
|
||||
//#endif
|
||||
|
||||
enum {
|
||||
//#define RTPRIV_IOCTL_MP ( SIOCIWFIRSTPRIV + 0x17)
|
||||
enum {
|
||||
WRITE_REG = 1,
|
||||
READ_REG,
|
||||
WRITE_RF,
|
||||
|
|
@ -266,34 +401,40 @@ enum {
|
|||
MP_QueryDrvStats,
|
||||
MP_SetBT,
|
||||
CTA_TEST,
|
||||
MP_DISABLE_BT_COEXIST,
|
||||
MP_PwrCtlDM,
|
||||
#ifdef CONFIG_WOWLAN
|
||||
MP_WOW_ENABLE,
|
||||
#endif
|
||||
MP_NULL,
|
||||
};
|
||||
|
||||
struct mp_priv {
|
||||
struct adapter *papdater;
|
||||
struct mp_priv
|
||||
{
|
||||
_adapter *papdater;
|
||||
|
||||
/* Testing Flag */
|
||||
/* 0 for normal type packet, 1 for loopback packet (16bytes TXCMD) */
|
||||
u32 mode;
|
||||
//Testing Flag
|
||||
u32 mode;//0 for normal type packet, 1 for loopback packet (16bytes TXCMD)
|
||||
|
||||
u32 prev_fw_state;
|
||||
|
||||
/* OID cmd handler */
|
||||
//OID cmd handler
|
||||
struct mp_wiparam workparam;
|
||||
// u8 act_in_progress;
|
||||
|
||||
/* Tx Section */
|
||||
//Tx Section
|
||||
u8 TID;
|
||||
u32 tx_pktcount;
|
||||
struct mp_tx tx;
|
||||
|
||||
/* Rx Section */
|
||||
//Rx Section
|
||||
u32 rx_pktcount;
|
||||
u32 rx_crcerrpktcount;
|
||||
u32 rx_pktloss;
|
||||
|
||||
struct recv_stat rxstat;
|
||||
|
||||
/* RF/BB relative */
|
||||
//RF/BB relative
|
||||
u8 channel;
|
||||
u8 bandwidth;
|
||||
u8 prime_channel_offset;
|
||||
|
|
@ -301,31 +442,60 @@ struct mp_priv {
|
|||
u8 txpoweridx_b;
|
||||
u8 rateidx;
|
||||
u32 preamble;
|
||||
// u8 modem;
|
||||
u32 CrystalCap;
|
||||
// u32 curr_crystalcap;
|
||||
|
||||
u16 antenna_tx;
|
||||
u16 antenna_rx;
|
||||
|
||||
// u8 curr_rfpath;
|
||||
|
||||
u8 check_mp_pkt;
|
||||
|
||||
u8 bSetTxPower;
|
||||
// uint ForcedDataRate;
|
||||
|
||||
struct wlan_network mp_network;
|
||||
unsigned char network_macaddr[ETH_ALEN];
|
||||
NDIS_802_11_MAC_ADDRESS network_macaddr;
|
||||
|
||||
#ifdef PLATFORM_WINDOWS
|
||||
u32 rx_testcnt;
|
||||
u32 rx_testcnt1;
|
||||
u32 rx_testcnt2;
|
||||
u32 tx_testcnt;
|
||||
u32 tx_testcnt1;
|
||||
|
||||
struct mp_wi_cntx wi_cntx;
|
||||
|
||||
u8 h2c_result;
|
||||
u8 h2c_seqnum;
|
||||
u16 h2c_cmdcode;
|
||||
u8 h2c_resp_parambuf[512];
|
||||
_lock h2c_lock;
|
||||
_lock wkitm_lock;
|
||||
u32 h2c_cmdcnt;
|
||||
NDIS_EVENT h2c_cmd_evt;
|
||||
NDIS_EVENT c2h_set;
|
||||
NDIS_EVENT h2c_clr;
|
||||
NDIS_EVENT cpwm_int;
|
||||
|
||||
NDIS_EVENT scsir_full_evt;
|
||||
NDIS_EVENT scsiw_empty_evt;
|
||||
#endif
|
||||
|
||||
u8 *pallocated_mp_xmitframe_buf;
|
||||
u8 *pmp_xmtframe_buf;
|
||||
struct __queue free_mp_xmitqueue;
|
||||
_queue free_mp_xmitqueue;
|
||||
u32 free_mp_xmitframe_cnt;
|
||||
|
||||
struct mpt_context MptCtx;
|
||||
MPT_CONTEXT MptCtx;
|
||||
};
|
||||
|
||||
struct iocmd_struct {
|
||||
typedef struct _IOCMD_STRUCT_ {
|
||||
u8 cmdclass;
|
||||
u16 value;
|
||||
u8 index;
|
||||
};
|
||||
}IOCMD_STRUCT;
|
||||
|
||||
struct rf_reg_param {
|
||||
u32 path;
|
||||
|
|
@ -337,16 +507,37 @@ struct bb_reg_param {
|
|||
u32 offset;
|
||||
u32 value;
|
||||
};
|
||||
/* */
|
||||
//=======================================================================
|
||||
|
||||
#define LOWER true
|
||||
#define RAISE false
|
||||
#define LOWER _TRUE
|
||||
#define RAISE _FALSE
|
||||
|
||||
/* Hardware Registers */
|
||||
#if 0
|
||||
#if 0
|
||||
#define IOCMD_CTRL_REG 0x102502C0
|
||||
#define IOCMD_DATA_REG 0x102502C4
|
||||
#else
|
||||
#define IOCMD_CTRL_REG 0x10250370
|
||||
#define IOCMD_DATA_REG 0x10250374
|
||||
#endif
|
||||
|
||||
#define IOCMD_GET_THERMAL_METER 0xFD000028
|
||||
|
||||
#define IOCMD_CLASS_BB_RF 0xF0
|
||||
#define IOCMD_BB_READ_IDX 0x00
|
||||
#define IOCMD_BB_WRITE_IDX 0x01
|
||||
#define IOCMD_RF_READ_IDX 0x02
|
||||
#define IOCMD_RF_WRIT_IDX 0x03
|
||||
#endif
|
||||
#define BB_REG_BASE_ADDR 0x800
|
||||
|
||||
/* MP variables */
|
||||
enum mp_mode_{
|
||||
#if 0
|
||||
#define _2MAC_MODE_ 0
|
||||
#define _LOOPBOOK_MODE_ 1
|
||||
#endif
|
||||
typedef enum _MP_MODE_ {
|
||||
MP_OFF,
|
||||
MP_ON,
|
||||
MP_ERR,
|
||||
|
|
@ -356,14 +547,17 @@ enum mp_mode_{
|
|||
MP_SINGLE_TONE_TX,
|
||||
MP_PACKET_TX,
|
||||
MP_PACKET_RX
|
||||
};
|
||||
} MP_MODE;
|
||||
|
||||
|
||||
#define MAX_RF_PATH_NUMS RF_PATH_MAX
|
||||
|
||||
|
||||
extern u8 mpdatarate[NumRates];
|
||||
|
||||
/* MP set force data rate base on the definition. */
|
||||
enum mpt_rate_index {
|
||||
typedef enum _MPT_RATE_INDEX
|
||||
{
|
||||
/* CCK rate. */
|
||||
MPT_RATE_1M, /* 0 */
|
||||
MPT_RATE_2M,
|
||||
|
|
@ -398,97 +592,180 @@ enum mpt_rate_index {
|
|||
MPT_RATE_MCS14,
|
||||
MPT_RATE_MCS15, /* 27 */
|
||||
MPT_RATE_LAST
|
||||
};
|
||||
}MPT_RATE_E, *PMPT_RATE_E;
|
||||
|
||||
#define MAX_TX_PWR_INDEX_N_MODE 64 /* 0x3F */
|
||||
#if 0
|
||||
// Represent Channel Width in HT Capabilities
|
||||
typedef enum _HT_CHANNEL_WIDTH {
|
||||
HT_CHANNEL_WIDTH_20 = 0,
|
||||
HT_CHANNEL_WIDTH_40 = 1,
|
||||
}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH;
|
||||
#endif
|
||||
|
||||
enum power_mode {
|
||||
#define MAX_TX_PWR_INDEX_N_MODE 64 // 0x3F
|
||||
|
||||
typedef enum _POWER_MODE_ {
|
||||
POWER_LOW = 0,
|
||||
POWER_NORMAL
|
||||
};
|
||||
}POWER_MODE;
|
||||
|
||||
|
||||
#define RX_PKT_BROADCAST 1
|
||||
#define RX_PKT_DEST_ADDR 2
|
||||
#define RX_PKT_PHY_MATCH 3
|
||||
|
||||
enum encry_ctrl_state {
|
||||
HW_CONTROL, /* hw encryption& decryption */
|
||||
SW_CONTROL, /* sw encryption& decryption */
|
||||
HW_ENCRY_SW_DECRY, /* hw encryption & sw decryption */
|
||||
SW_ENCRY_HW_DECRY /* sw encryption & hw decryption */
|
||||
};
|
||||
#if 0
|
||||
#define RPTMaxCount 0x000FFFFF;
|
||||
|
||||
s32 init_mp_priv(struct adapter *padapter);
|
||||
void free_mp_priv(struct mp_priv *pmp_priv);
|
||||
s32 MPT_InitializeAdapter(struct adapter *padapter, u8 Channel);
|
||||
void MPT_DeInitAdapter(struct adapter *padapter);
|
||||
s32 mp_start_test(struct adapter *padapter);
|
||||
void mp_stop_test(struct adapter *padapter);
|
||||
// parameter 1 : BitMask
|
||||
// bit 0 : OFDM PPDU
|
||||
// bit 1 : OFDM False Alarm
|
||||
// bit 2 : OFDM MPDU OK
|
||||
// bit 3 : OFDM MPDU Fail
|
||||
// bit 4 : CCK PPDU
|
||||
// bit 5 : CCK False Alarm
|
||||
// bit 6 : CCK MPDU ok
|
||||
// bit 7 : CCK MPDU fail
|
||||
// bit 8 : HT PPDU counter
|
||||
// bit 9 : HT false alarm
|
||||
// bit 10 : HT MPDU total
|
||||
// bit 11 : HT MPDU OK
|
||||
// bit 12 : HT MPDU fail
|
||||
// bit 15 : RX full drop
|
||||
typedef enum _RXPHY_BITMASK_
|
||||
{
|
||||
OFDM_PPDU_BIT = 0,
|
||||
OFDM_FALSE_BIT,
|
||||
OFDM_MPDU_OK_BIT,
|
||||
OFDM_MPDU_FAIL_BIT,
|
||||
CCK_PPDU_BIT,
|
||||
CCK_FALSE_BIT,
|
||||
CCK_MPDU_OK_BIT,
|
||||
CCK_MPDU_FAIL_BIT,
|
||||
HT_PPDU_BIT,
|
||||
HT_FALSE_BIT,
|
||||
HT_MPDU_BIT,
|
||||
HT_MPDU_OK_BIT,
|
||||
HT_MPDU_FAIL_BIT,
|
||||
} RXPHY_BITMASK;
|
||||
#endif
|
||||
|
||||
u32 _read_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 bitmask);
|
||||
void _write_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val);
|
||||
typedef enum _ENCRY_CTRL_STATE_ {
|
||||
HW_CONTROL, //hw encryption& decryption
|
||||
SW_CONTROL, //sw encryption& decryption
|
||||
HW_ENCRY_SW_DECRY, //hw encryption & sw decryption
|
||||
SW_ENCRY_HW_DECRY //sw encryption & hw decryption
|
||||
}ENCRY_CTRL_STATE;
|
||||
|
||||
u32 read_macreg(struct adapter *padapter, u32 addr, u32 sz);
|
||||
void write_macreg(struct adapter *padapter, u32 addr, u32 val, u32 sz);
|
||||
u32 read_bbreg(struct adapter *padapter, u32 addr, u32 bitmask);
|
||||
void write_bbreg(struct adapter *padapter, u32 addr, u32 bitmask, u32 val);
|
||||
u32 read_rfreg(struct adapter *padapter, u8 rfpath, u32 addr);
|
||||
void write_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 val);
|
||||
#define Mac_OFDM_OK 0x00000000
|
||||
#define Mac_OFDM_Fail 0x10000000
|
||||
#define Mac_OFDM_FasleAlarm 0x20000000
|
||||
#define Mac_CCK_OK 0x30000000
|
||||
#define Mac_CCK_Fail 0x40000000
|
||||
#define Mac_CCK_FasleAlarm 0x50000000
|
||||
#define Mac_HT_OK 0x60000000
|
||||
#define Mac_HT_Fail 0x70000000
|
||||
#define Mac_HT_FasleAlarm 0x90000000
|
||||
#define Mac_DropPacket 0xA0000000
|
||||
|
||||
void SetChannel(struct adapter *pAdapter);
|
||||
void SetBandwidth(struct adapter *pAdapter);
|
||||
void SetTxPower(struct adapter *pAdapter);
|
||||
void SetAntennaPathPower(struct adapter *pAdapter);
|
||||
void SetDataRate(struct adapter *pAdapter);
|
||||
//=======================================================================
|
||||
//extern struct mp_xmit_frame *alloc_mp_xmitframe(struct mp_priv *pmp_priv);
|
||||
//extern int free_mp_xmitframe(struct xmit_priv *pxmitpriv, struct mp_xmit_frame *pmp_xmitframe);
|
||||
|
||||
void SetAntenna(struct adapter *pAdapter);
|
||||
extern s32 init_mp_priv(PADAPTER padapter);
|
||||
extern void free_mp_priv(struct mp_priv *pmp_priv);
|
||||
extern s32 MPT_InitializeAdapter(PADAPTER padapter, u8 Channel);
|
||||
extern void MPT_DeInitAdapter(PADAPTER padapter);
|
||||
extern s32 mp_start_test(PADAPTER padapter);
|
||||
extern void mp_stop_test(PADAPTER padapter);
|
||||
|
||||
s32 SetThermalMeter(struct adapter *pAdapter, u8 target_ther);
|
||||
void GetThermalMeter(struct adapter *pAdapter, u8 *value);
|
||||
//=======================================================================
|
||||
//extern void IQCalibrateBcut(PADAPTER pAdapter);
|
||||
|
||||
void SetContinuousTx(struct adapter *pAdapter, u8 bStart);
|
||||
void SetSingleCarrierTx(struct adapter *pAdapter, u8 bStart);
|
||||
void SetSingleToneTx(struct adapter *pAdapter, u8 bStart);
|
||||
void SetCarrierSuppressionTx(struct adapter *pAdapter, u8 bStart);
|
||||
void PhySetTxPowerLevel(struct adapter *pAdapter);
|
||||
//extern u32 bb_reg_read(PADAPTER Adapter, u16 offset);
|
||||
//extern u8 bb_reg_write(PADAPTER Adapter, u16 offset, u32 value);
|
||||
//extern u32 rf_reg_read(PADAPTER Adapter, u8 path, u8 offset);
|
||||
//extern u8 rf_reg_write(PADAPTER Adapter, u8 path, u8 offset, u32 value);
|
||||
|
||||
void fill_txdesc_for_mp(struct adapter *padapter, struct tx_desc *ptxdesc);
|
||||
void SetPacketTx(struct adapter *padapter);
|
||||
void SetPacketRx(struct adapter *pAdapter, u8 bStartRx);
|
||||
//extern u32 get_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask);
|
||||
//extern u8 set_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask, u32 value);
|
||||
//extern u32 get_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask);
|
||||
//extern u8 set_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask, u32 value);
|
||||
|
||||
void ResetPhyRxPktCount(struct adapter *pAdapter);
|
||||
u32 GetPhyRxPktReceived(struct adapter *pAdapter);
|
||||
u32 GetPhyRxPktCRC32Error(struct adapter *pAdapter);
|
||||
extern u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask);
|
||||
extern void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val);
|
||||
|
||||
s32 SetPowerTracking(struct adapter *padapter, u8 enable);
|
||||
void GetPowerTracking(struct adapter *padapter, u8 *enable);
|
||||
u32 mp_query_psd(struct adapter *pAdapter, u8 *data);
|
||||
void Hal_SetAntenna(struct adapter *pAdapter);
|
||||
void Hal_SetBandwidth(struct adapter *pAdapter);
|
||||
void Hal_SetTxPower(struct adapter *pAdapter);
|
||||
void Hal_SetCarrierSuppressionTx(struct adapter *pAdapter, u8 bStart);
|
||||
void Hal_SetSingleToneTx(struct adapter *pAdapter, u8 bStart);
|
||||
void Hal_SetSingleCarrierTx (struct adapter *pAdapter, u8 bStart);
|
||||
void Hal_SetContinuousTx (struct adapter *pAdapter, u8 bStart);
|
||||
void Hal_SetBandwidth(struct adapter *pAdapter);
|
||||
void Hal_SetDataRate(struct adapter *pAdapter);
|
||||
void Hal_SetChannel(struct adapter *pAdapter);
|
||||
void Hal_SetAntennaPathPower(struct adapter *pAdapter);
|
||||
s32 Hal_SetThermalMeter(struct adapter *pAdapter, u8 target_ther);
|
||||
s32 Hal_SetPowerTracking(struct adapter *padapter, u8 enable);
|
||||
void Hal_GetPowerTracking(struct adapter *padapter, u8 * enable);
|
||||
void Hal_GetThermalMeter(struct adapter *pAdapter, u8 *value);
|
||||
void Hal_mpt_SwitchRfSetting(struct adapter *pAdapter);
|
||||
void Hal_MPT_CCKTxPowerAdjust(struct adapter * Adapter, bool bInCH14);
|
||||
void Hal_MPT_CCKTxPowerAdjustbyIndex(struct adapter *pAdapter, bool beven);
|
||||
void Hal_SetCCKTxPower(struct adapter *pAdapter, u8 * TxPower);
|
||||
void Hal_SetOFDMTxPower(struct adapter *pAdapter, u8 * TxPower);
|
||||
void Hal_TriggerRFThermalMeter(struct adapter *pAdapter);
|
||||
u8 Hal_ReadRFThermalMeter(struct adapter *pAdapter);
|
||||
void Hal_SetCCKContinuousTx(struct adapter *pAdapter, u8 bStart);
|
||||
void Hal_SetOFDMContinuousTx(struct adapter *pAdapter, u8 bStart);
|
||||
void Hal_ProSetCrystalCap (struct adapter *pAdapter , u32 CrystalCapVal);
|
||||
void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv);
|
||||
void MP_PHY_SetRFPathSwitch(struct adapter *pAdapter ,bool bMain);
|
||||
extern u32 read_macreg(_adapter *padapter, u32 addr, u32 sz);
|
||||
extern void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz);
|
||||
extern u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask);
|
||||
extern void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val);
|
||||
extern u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr);
|
||||
extern void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val);
|
||||
|
||||
extern void SetChannel(PADAPTER pAdapter);
|
||||
extern void SetBandwidth(PADAPTER pAdapter);
|
||||
extern void SetTxPower(PADAPTER pAdapter);
|
||||
extern void SetAntennaPathPower(PADAPTER pAdapter);
|
||||
//extern void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset);
|
||||
extern void SetDataRate(PADAPTER pAdapter);
|
||||
|
||||
extern void SetAntenna(PADAPTER pAdapter);
|
||||
|
||||
//extern void SetCrystalCap(PADAPTER pAdapter);
|
||||
|
||||
extern s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther);
|
||||
extern void GetThermalMeter(PADAPTER pAdapter, u8 *value);
|
||||
|
||||
extern void SetContinuousTx(PADAPTER pAdapter, u8 bStart);
|
||||
extern void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart);
|
||||
extern void SetSingleToneTx(PADAPTER pAdapter, u8 bStart);
|
||||
extern void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart);
|
||||
extern void PhySetTxPowerLevel(PADAPTER pAdapter);
|
||||
|
||||
extern void fill_txdesc_for_mp(PADAPTER padapter, struct tx_desc *ptxdesc);
|
||||
extern void SetPacketTx(PADAPTER padapter);
|
||||
extern void SetPacketRx(PADAPTER pAdapter, u8 bStartRx);
|
||||
|
||||
extern void ResetPhyRxPktCount(PADAPTER pAdapter);
|
||||
extern u32 GetPhyRxPktReceived(PADAPTER pAdapter);
|
||||
extern u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter);
|
||||
|
||||
extern s32 SetPowerTracking(PADAPTER padapter, u8 enable);
|
||||
extern void GetPowerTracking(PADAPTER padapter, u8 *enable);
|
||||
|
||||
extern u32 mp_query_psd(PADAPTER pAdapter, u8 *data);
|
||||
|
||||
|
||||
extern void Hal_SetAntenna(PADAPTER pAdapter);
|
||||
extern void Hal_SetBandwidth(PADAPTER pAdapter);
|
||||
|
||||
extern void Hal_SetTxPower(PADAPTER pAdapter);
|
||||
extern void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart);
|
||||
extern void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart );
|
||||
extern void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart);
|
||||
extern void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart);
|
||||
extern void Hal_SetBandwidth(PADAPTER pAdapter);
|
||||
|
||||
extern void Hal_SetDataRate(PADAPTER pAdapter);
|
||||
extern void Hal_SetChannel(PADAPTER pAdapter);
|
||||
extern void Hal_SetAntennaPathPower(PADAPTER pAdapter);
|
||||
extern s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther);
|
||||
extern s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable);
|
||||
extern void Hal_GetPowerTracking(PADAPTER padapter, u8 * enable);
|
||||
extern void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value);
|
||||
extern void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter);
|
||||
extern void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14);
|
||||
extern void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven);
|
||||
extern void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 * TxPower);
|
||||
extern void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 * TxPower);
|
||||
extern void Hal_TriggerRFThermalMeter(PADAPTER pAdapter);
|
||||
extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter);
|
||||
extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart);
|
||||
extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart);
|
||||
extern void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCapVal);
|
||||
extern void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv);
|
||||
extern void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter ,BOOLEAN bMain);
|
||||
extern void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart);
|
||||
|
||||
#endif //_RTW_MP_H_
|
||||
|
||||
#endif /* _RTW_MP_H_ */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue