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rtl8188eu: Remove dead code for other than USB

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The vendor code has pieces of code for PCI, SDIO, and GSPI. Remove it
and CONFIG_USB_HCI.

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2013-07-11 13:35:36 -05:00
parent c5e461c221
commit 0e4009c999
46 changed files with 78 additions and 1448 deletions
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7
core/rtw_ap.c
View file

@ -164,9 +164,7 @@ static void update_BCNTIM(_adapter *padapter)
}
#ifndef CONFIG_INTERRUPT_BASED_TXBCN
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
set_tx_beacon_cmd(padapter);
#endif
#endif /* CONFIG_INTERRUPT_BASED_TXBCN */
}
@ -1008,13 +1006,11 @@ static void start_bss_network(_adapter *padapter, u8 *pbuf)
update_beacon(padapter, _TIM_IE_, NULL, false);
#ifndef CONFIG_INTERRUPT_BASED_TXBCN /* other case will tx beacon when bcn interrupt coming in. */
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
/* issue beacon frame */
if (send_beacon(padapter)==_FAIL)
{
DBG_88E("issue_beacon, fail!\n");
}
#endif
#endif /* CONFIG_INTERRUPT_BASED_TXBCN */
}
@ -1703,12 +1699,9 @@ void update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx)
_exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL);
#ifndef CONFIG_INTERRUPT_BASED_TXBCN
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
if (tx)
set_tx_beacon_cmd(padapter);
#endif
#endif /* CONFIG_INTERRUPT_BASED_TXBCN */
}
#ifdef CONFIG_80211N_HT

13
core/rtw_cmd.c
View file

@ -117,20 +117,7 @@ _func_enter_;
pevtpriv->evt_buf = pevtpriv->evt_allocated_buf + 4 - ((unsigned int)(pevtpriv->evt_allocated_buf) & 3);
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
pevtpriv->allocated_c2h_mem = rtw_zmalloc(C2H_MEM_SZ +4);
if (pevtpriv->allocated_c2h_mem == NULL){
res= _FAIL;
goto exit;
}
pevtpriv->c2h_mem = pevtpriv->allocated_c2h_mem + 4\
- ( (u32)(pevtpriv->allocated_c2h_mem) & 3);
#endif /* end of CONFIG_SDIO_HCI */
_rtw_init_queue(&(pevtpriv->evt_queue));
exit:
#endif /* end of CONFIG_EVENT_THREAD_MODE */

2
core/rtw_debug.c
View file

@ -379,9 +379,7 @@ int proc_get_trx_info(char *page, char **start,
len += snprintf(page + len, count - len, "free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d, free_ext_xmitbuf_cnt=%d, free_recvframe_cnt=%d\n",
pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt,pxmitpriv->free_xmit_extbuf_cnt, precvpriv->free_recvframe_cnt);
#ifdef CONFIG_USB_HCI
len += snprintf(page + len, count - len, "rx_urb_pending_cn=%d\n", precvpriv->rx_pending_cnt);
#endif
*eof = 1;
return len;

32
core/rtw_io.c
View file

@ -30,17 +30,9 @@ c. provides the software interface between caller and the hardware interface
Compiler Flag Option:
1. CONFIG_SDIO_HCI:
a. USE_SYNC_IRP: Only sync operations are provided.
b. USE_ASYNC_IRP:Both sync/async operations are provided.
2. CONFIG_USB_HCI:
USB:
a. USE_ASYNC_IRP: Both sync/async operations are provided.
3. CONFIG_CFIO_HCI:
b. USE_SYNC_IRP: Only sync operations are provided.
Only sync read/rtw_write_mem operations are provided.
jackson@realtek.com.tw
@ -53,34 +45,12 @@ jackson@realtek.com.tw
#include <drv_types.h>
#include <rtw_io.h>
#include <osdep_intf.h>
#ifdef CONFIG_SDIO_HCI
#include <sdio_ops.h>
#endif
#ifdef CONFIG_GSPI_HCI
#include <gspi_ops.h>
#endif
#ifdef CONFIG_USB_HCI
#include <usb_ops.h>
#endif
#ifdef CONFIG_PCI_HCI
#include <pci_ops.h>
#endif
#ifdef CONFIG_SDIO_HCI
#define rtw_le16_to_cpu(val) val
#define rtw_le32_to_cpu(val) val
#define rtw_cpu_to_le16(val) val
#define rtw_cpu_to_le32(val) val
#else
#define rtw_le16_to_cpu(val) le16_to_cpu(val)
#define rtw_le32_to_cpu(val) le32_to_cpu(val)
#define rtw_cpu_to_le16(val) cpu_to_le16(val)
#define rtw_cpu_to_le32(val) cpu_to_le32(val)
#endif
u8 _rtw_read8(_adapter *adapter, u32 addr)

9
core/rtw_ioctl_set.c
View file

@ -26,17 +26,8 @@
#include <rtw_ioctl_set.h>
#include <hal_intf.h>
#ifdef CONFIG_USB_HCI
#include <usb_osintf.h>
#include <usb_ops.h>
#endif
#ifdef CONFIG_SDIO_HCI
#include <sdio_osintf.h>
#endif
#ifdef CONFIG_GSPI_HCI
#include <gspi_osintf.h>
#endif
extern void indicate_wx_scan_complete_event(_adapter *padapter);

17
core/rtw_iol.c
View file

@ -100,27 +100,10 @@ bool rtw_IOL_applied(ADAPTER *adapter)
if (1 == adapter->registrypriv.fw_iol)
return true;
#ifdef CONFIG_USB_HCI
if ((2 == adapter->registrypriv.fw_iol) && (!adapter_to_dvobj(adapter)->ishighspeed))
return true;
#endif
return false;
}
/*
bool rtw_IOL_applied(ADAPTER *adapter)
{
if (adapter->registrypriv.fw_iol)
return true;
#ifdef CONFIG_USB_HCI
if (!adapter_to_dvobj(adapter)->ishighspeed)
return true;
#endif
return false;
}
*/
int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt)
{

16
core/rtw_led.c
View file

@ -36,19 +36,13 @@ void BlinkTimerCallback(void *data)
return;
}
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
#ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD
rtw_led_blink_cmd(padapter, pLed);
#else
_set_workitem(&(pLed->BlinkWorkItem));
#endif
#elif defined(CONFIG_PCI_HCI)
BlinkHandler(pLed);
#endif
}
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
/* */
/* Description: */
/* Callback function of LED BlinkWorkItem. */
@ -59,7 +53,6 @@ void BlinkWorkItemCallback(struct work_struct *work)
PLED_871x pLed = container_of(work, LED_871x, BlinkWorkItem);
BlinkHandler(pLed);
}
#endif
/* */
/* Description: */
@ -76,12 +69,10 @@ void ResetLedStatus(PLED_871x pLed) {
pLed->BlinkTimes = 0; /* Number of times to toggle led state for blinking. */
pLed->BlinkingLedState = LED_UNKNOWN; /* Next state for blinking, either RTW_LED_ON or RTW_LED_OFF are. */
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
pLed->bLedNoLinkBlinkInProgress = false;
pLed->bLedLinkBlinkInProgress = false;
pLed->bLedStartToLinkBlinkInProgress = false;
pLed->bLedScanBlinkInProgress = false;
#endif
}
/* */
@ -102,9 +93,7 @@ InitLed871x(
_init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed);
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
_init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed);
#endif
}
@ -117,9 +106,7 @@ DeInitLed871x(
PLED_871x pLed
)
{
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
_cancel_workitem_sync(&(pLed->BlinkWorkItem));
#endif
_cancel_timer_ex(&(pLed->BlinkTimer));
ResetLedStatus(pLed);
}
@ -130,7 +117,6 @@ DeInitLed871x(
/* Implementation of LED blinking behavior. */
/* It toggle off LED and schedule corresponding timer if necessary. */
/* */
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
void SwLedOn(_adapter *padapter, PLED_871x pLed);
void SwLedOff(_adapter *padapter, PLED_871x pLed);
@ -2403,5 +2389,3 @@ LedControl871x(
RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("LedStrategy:%d, LedAction %d\n", ledpriv->LedStrategy,LedAction));
}
#endif

5
core/rtw_mlme.c
View file

@ -2980,7 +2980,6 @@ void rtw_joinbss_reset(_adapter *padapter)
phtpriv->ampdu_enable = false;/* reset to disabled */
#ifdef CONFIG_USB_HCI
/* TH=1 => means that invalidate usb rx aggregation */
/* TH=0 => means that validate usb rx aggregation, use init value. */
if (phtpriv->ht_option)
@ -2997,12 +2996,8 @@ void rtw_joinbss_reset(_adapter *padapter)
rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
}
#endif
#endif
}
#ifdef CONFIG_80211N_HT
/* the fucntion is >= passive_level */

44
core/rtw_mlme_ext.c
View file

@ -8191,24 +8191,7 @@ unsigned int send_beacon(_adapter *padapter)
u8 bxmitok = false;
int issue=0;
int poll = 0;
/* ifdef CONFIG_CONCURRENT_MODE */
/* struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); */
/* struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); */
/* _adapter *pbuddy_adapter = padapter->pbuddy_adapter; */
/* struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); */
/* endif */
#ifdef CONFIG_PCI_HCI
/* DBG_88E("%s\n", __func__); */
issue_beacon(padapter, 0);
return _SUCCESS;
#endif
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
u32 start = rtw_get_current_time();
rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
@ -8224,28 +8207,17 @@ unsigned int send_beacon(_adapter *padapter)
}while (false == bxmitok && issue<100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
{
return _FAIL;
}
if (false == bxmitok)
{
if (false == bxmitok) {
DBG_88E("%s fail! %u ms\n", __func__, rtw_get_passing_time_ms(start));
return _FAIL;
}
else
{
} else {
u32 passing_time = rtw_get_passing_time_ms(start);
if (passing_time > 100 || issue > 3)
DBG_88E("%s success, issue:%d, poll:%d, %u ms\n", __func__, issue, poll, rtw_get_passing_time_ms(start));
/* else */
/* DBG_88E("%s success, issue:%d, poll:%d, %u ms\n", __func__, issue, poll, rtw_get_passing_time_ms(start)); */
return _SUCCESS;
}
#endif
}
/****************************************************************************
@ -11087,9 +11059,7 @@ u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf)
if ((pstapriv->tim_bitmap&BIT(0)) && (psta_bmc->sleepq_len>0))
{
#ifndef CONFIG_PCI_HCI
rtw_msleep_os(10);/* 10ms, ATIM(HIQ) Windows */
#endif
_enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL);
xmitframe_phead = get_list_head(&psta_bmc->sleep_q);
@ -11123,21 +11093,11 @@ u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf)
/* pstapriv->tim_bitmap &= ~BIT(0); */
}
_exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL);
/* if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) */
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
rtw_chk_hi_queue_cmd(padapter);
#endif
}
}
#endif
return H2C_SUCCESS;
}
#ifdef CONFIG_DUALMAC_CONCURRENT

19
core/rtw_mp.c
View file

@ -1158,35 +1158,16 @@ void _rtw_mp_xmit_priv (struct xmit_priv *pxmitpriv)
pxmitbuf->padapter = padapter;
pxmitbuf->ext_tag = true;
/*
pxmitbuf->pallocated_buf = rtw_zmalloc(max_xmit_extbuf_size);
if (pxmitbuf->pallocated_buf == NULL)
{
res = _FAIL;
goto exit;
}
pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), 4);
*/
if ((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,max_xmit_extbuf_size + XMITBUF_ALIGN_SZ)) == _FAIL) {
res= _FAIL;
goto exit;
}
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
pxmitbuf->phead = pxmitbuf->pbuf;
pxmitbuf->pend = pxmitbuf->pbuf + max_xmit_extbuf_size;
pxmitbuf->len = 0;
pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead;
#endif
rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmit_extbuf_queue.queue));
#ifdef DBG_XMIT_BUF_EXT
pxmitbuf->no=i;
#endif
pxmitbuf++;
}
pxmitpriv->free_xmit_extbuf_cnt = num_xmit_extbuf;

17
core/rtw_pwrctrl.c
View file

@ -836,9 +836,7 @@ _func_enter_;
if ((padapter->bSurpriseRemoved == true)
|| (padapter->hw_init_completed == false)
#ifdef CONFIG_USB_HCI
|| (padapter->bDriverStopped== true)
#endif
|| (pwrpriv->pwr_mode == PS_MODE_ACTIVE)
)
{
@ -1409,9 +1407,7 @@ _func_exit_;
}
#ifdef CONFIG_RESUME_IN_WORKQUEUE
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
extern int rtw_resume_process(_adapter *padapter);
#endif
static void resume_workitem_callback(struct work_struct *work)
{
struct pwrctrl_priv *pwrpriv = container_of(work, struct pwrctrl_priv, resume_work);
@ -1419,10 +1415,7 @@ static void resume_workitem_callback(struct work_struct *work)
DBG_88E("%s\n",__func__);
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
rtw_resume_process(adapter);
#endif
}
void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv)
@ -1439,9 +1432,7 @@ void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv)
#endif /* CONFIG_RESUME_IN_WORKQUEUE */
#ifdef CONFIG_HAS_EARLYSUSPEND
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
extern int rtw_resume_process(_adapter *padapter);
#endif
static void rtw_early_suspend(struct early_suspend *h)
{
struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend);
@ -1458,10 +1449,8 @@ static void rtw_late_resume(struct early_suspend *h)
DBG_88E("%s\n",__func__);
if (pwrpriv->do_late_resume) {
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
rtw_resume_process(adapter);
pwrpriv->do_late_resume = false;
#endif
}
}
@ -1493,9 +1482,7 @@ void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv)
#endif /* CONFIG_HAS_EARLYSUSPEND */
#ifdef CONFIG_ANDROID_POWER
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
extern int rtw_resume_process(PADAPTER padapter);
#endif
static void rtw_early_suspend(android_early_suspend_t *h)
{
struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend);
@ -1512,10 +1499,8 @@ static void rtw_late_resume(android_early_suspend_t *h)
DBG_88E("%s\n",__func__);
if (pwrpriv->do_late_resume) {
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
rtw_resume_process(adapter);
pwrpriv->do_late_resume = false;
#endif
}
}
@ -1638,7 +1623,6 @@ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller)
}
if (rf_off == pwrpriv->rf_pwrstate )
{
#ifdef CONFIG_USB_HCI
#ifdef CONFIG_AUTOSUSPEND
if (pwrpriv->brfoffbyhw==true)
{
@ -1657,7 +1641,6 @@ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller)
}
}
else
#endif
#endif
{
#ifdef CONFIG_IPS

87
core/rtw_recv.c
View file

@ -98,15 +98,10 @@ _func_enter_;
precvframe++;
}
#ifdef CONFIG_USB_HCI
precvpriv->rx_pending_cnt=1;
_rtw_init_sema(&precvpriv->allrxreturnevt, 0);
#endif
res = rtw_hal_init_recv_priv(padapter);
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
@ -387,22 +382,13 @@ sint rtw_enqueue_recvbuf_to_head(struct recv_buf *precvbuf, _queue *queue)
sint rtw_enqueue_recvbuf(struct recv_buf *precvbuf, _queue *queue)
{
_irqL irqL;
#ifdef CONFIG_SDIO_HCI
_enter_critical_bh(&queue->lock, &irqL);
#else
_enter_critical_ex(&queue->lock, &irqL);
#endif/*#ifdef CONFIG_SDIO_HCI*/
rtw_list_delete(&precvbuf->list);
rtw_list_insert_tail(&precvbuf->list, get_list_head(queue));
#ifdef CONFIG_SDIO_HCI
_exit_critical_bh(&queue->lock, &irqL);
#else
_exit_critical_ex(&queue->lock, &irqL);
#endif/*#ifdef CONFIG_SDIO_HCI*/
return _SUCCESS;
}
struct recv_buf *rtw_dequeue_recvbuf (_queue *queue)
@ -411,11 +397,7 @@ struct recv_buf *rtw_dequeue_recvbuf (_queue *queue)
struct recv_buf *precvbuf;
_list *plist, *phead;
#ifdef CONFIG_SDIO_HCI
_enter_critical_bh(&queue->lock, &irqL);
#else
_enter_critical_ex(&queue->lock, &irqL);
#endif/*#ifdef CONFIG_SDIO_HCI*/
if (_rtw_queue_empty(queue) == true)
{
@ -433,11 +415,7 @@ struct recv_buf *rtw_dequeue_recvbuf (_queue *queue)
}
#ifdef CONFIG_SDIO_HCI
_exit_critical_bh(&queue->lock, &irqL);
#else
_exit_critical_ex(&queue->lock, &irqL);
#endif/*#ifdef CONFIG_SDIO_HCI*/
return precvbuf;
@ -2293,65 +2271,8 @@ _func_exit_;
}
#endif
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
static void recvframe_expand_pkt(
PADAPTER padapter,
union recv_frame *prframe)
{
struct recv_frame_hdr *pfhdr;
_pkt *ppkt;
u8 shift_sz;
u32 alloc_sz;
pfhdr = &prframe->u.hdr;
/* 6 is for IP header 8 bytes alignment in QoS packet case. */
if (pfhdr->attrib.qos)
shift_sz = 6;
else
shift_sz = 0;
/* for first fragment packet, need to allocate */
/* (1536 + RXDESC_SIZE + drvinfo_sz) to reassemble packet */
/* 8 is for skb->data 8 bytes alignment. */
/* alloc_sz = _RND(1536 + RXDESC_SIZE + pfhdr->attrib.drvinfosize + shift_sz + 8, 128); */
alloc_sz = 1664; /* round (1536 + 24 + 32 + shift_sz + 8) to 128 bytes alignment */
/* 3 1. alloc new skb */
/* prepare extra space for 4 bytes alignment */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) /* www.mail-archive.com/netdev@vger.kernel.org/msg17214.html */
ppkt = dev_alloc_skb(alloc_sz);
if (ppkt) ppkt->dev = padapter->pnetdev;
#else
ppkt = netdev_alloc_skb(padapter->pnetdev, alloc_sz);
#endif
if (!ppkt) return; /* no way to expand */
/* 3 2. Prepare new skb to replace & release old skb */
/* force ppkt->data at 8-byte alignment address */
skb_reserve(ppkt, 8 - ((SIZE_PTR)ppkt->data & 7));
/* force ip_hdr at 8-byte alignment address according to shift_sz */
skb_reserve(ppkt, shift_sz);
/* copy data to new pkt */
_rtw_memcpy(skb_put(ppkt, pfhdr->len), pfhdr->rx_data, pfhdr->len);
dev_kfree_skb_any(pfhdr->pkt);
/* attach new pkt to recvframe */
pfhdr->pkt = ppkt;
pfhdr->rx_head = ppkt->head;
pfhdr->rx_data = ppkt->data;
pfhdr->rx_tail = skb_tail_pointer(ppkt);
pfhdr->rx_end = skb_end_pointer(ppkt);
}
#endif
/* perform defrag */
union recv_frame * recvframe_defrag(_adapter *adapter,_queue *defrag_q);
union recv_frame * recvframe_defrag(_adapter *adapter,_queue *defrag_q)
union recv_frame *recvframe_defrag(_adapter *adapter, _queue *defrag_q)
{
_list *plist, *phead;
u8 wlanhdr_offset;
@ -2381,12 +2302,6 @@ _func_enter_;
return NULL;
}
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#ifndef CONFIG_SDIO_RX_COPY
recvframe_expand_pkt(adapter, prframe);
#endif
#endif
curfragnum++;
plist= get_list_head(defrag_q);

65
core/rtw_xmit.c
View file

@ -182,13 +182,6 @@ _func_enter_;
}
}
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
pxmitbuf->phead = pxmitbuf->pbuf;
pxmitbuf->pend = pxmitbuf->pbuf + MAX_XMITBUF_SZ;
pxmitbuf->len = 0;
pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead;
#endif
pxmitbuf->flags = XMIT_VO_QUEUE;
rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmitbuf_queue.queue));
@ -241,13 +234,6 @@ _func_enter_;
goto exit;
}
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
pxmitbuf->phead = pxmitbuf->pbuf;
pxmitbuf->pend = pxmitbuf->pbuf + max_xmit_extbuf_size;
pxmitbuf->len = 0;
pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead;
#endif
rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmit_extbuf_queue.queue));
#ifdef DBG_XMIT_BUF_EXT
pxmitbuf->no=i;
@ -266,7 +252,6 @@ _func_enter_;
pxmitpriv->wmm_para_seq[i] = i;
}
#ifdef CONFIG_USB_HCI
pxmitpriv->txirp_cnt=1;
_rtw_init_sema(&(pxmitpriv->tx_retevt), 0);
@ -276,8 +261,6 @@ _func_enter_;
pxmitpriv->bkq_cnt = 0;
pxmitpriv->viq_cnt = 0;
pxmitpriv->voq_cnt = 0;
#endif
#ifdef CONFIG_XMIT_ACK
pxmitpriv->ack_tx = false;
@ -1867,7 +1850,7 @@ void rtw_count_tx_stats(PADAPTER padapter, struct xmit_frame *pxmitframe, int sz
if ((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
{
pxmitpriv->tx_bytes += sz;
#if defined(CONFIG_USB_TX_AGGREGATION) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#if defined(CONFIG_USB_TX_AGGREGATION)
pmlmepriv->LinkDetectInfo.NumTxOkInPeriod += pxmitframe->agg_num;
#else
pmlmepriv->LinkDetectInfo.NumTxOkInPeriod++;
@ -1877,7 +1860,7 @@ void rtw_count_tx_stats(PADAPTER padapter, struct xmit_frame *pxmitframe, int sz
if (psta)
{
pstats = &psta->sta_stats;
#if defined(CONFIG_USB_TX_AGGREGATION) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#if defined(CONFIG_USB_TX_AGGREGATION)
pstats->tx_pkts += pxmitframe->agg_num;
#else
pstats->tx_pkts++;
@ -1922,14 +1905,6 @@ _func_enter_;
pxmitbuf->priv_data = NULL;
/* pxmitbuf->ext_tag = true; */
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
pxmitbuf->len = 0;
pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead;
#endif
#ifdef CONFIG_PCI_HCI
pxmitbuf->len = 0;
#endif
if (pxmitbuf->sctx) {
DBG_88E("%s pxmitbuf->sctx is not NULL\n", __func__);
rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_ALLOC);
@ -2009,16 +1984,6 @@ _func_enter_;
pxmitbuf->priv_data = NULL;
/* pxmitbuf->ext_tag = false; */
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
pxmitbuf->len = 0;
pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead;
pxmitbuf->agg_num = 0;
pxmitbuf->pg_num = 0;
#endif
#ifdef CONFIG_PCI_HCI
pxmitbuf->len = 0;
#endif
if (pxmitbuf->sctx) {
DBG_88E("%s pxmitbuf->sctx is not NULL\n", __func__);
rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_ALLOC);
@ -2139,7 +2104,6 @@ _func_enter_;
pxframe->frame_tag = DATA_FRAMETAG;
#ifdef CONFIG_USB_HCI
pxframe->pkt = NULL;
pxframe->pkt_offset = 1;/* default use pkt_offset to fill tx desc */
@ -2147,13 +2111,6 @@ _func_enter_;
pxframe->agg_num = 1;
#endif
#endif /* ifdef CONFIG_USB_HCI */
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
pxframe->pg_num = 1;
pxframe->agg_num = 1;
#endif
#ifdef CONFIG_XMIT_ACK
pxframe->ack_report = 0;
#endif
@ -2287,9 +2244,6 @@ struct xmit_frame* rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmi
_adapter *padapter = pxmitpriv->adapter;
struct registry_priv *pregpriv = &padapter->registrypriv;
int i, inx[4];
#ifdef CONFIG_USB_HCI
/* int j, tmp, acirp_cnt[4]; */
#endif
_func_enter_;
@ -2299,10 +2253,8 @@ _func_enter_;
{
int j, tmp, acirp_cnt[4];
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
for (j=0; j<4; j++)
inx[j] = pxmitpriv->wmm_para_seq[j];
#endif
}
_enter_critical_bh(&pxmitpriv->lock, &irqL0);
@ -3476,14 +3428,7 @@ void enqueue_pending_xmitbuf(
rtw_list_insert_tail(&pxmitbuf->list, get_list_head(pqueue));
_exit_critical_bh(&pqueue->lock, &irql);
#if defined(CONFIG_SDIO_HCI) && defined(CONFIG_CONCURRENT_MODE)
if (pri_adapter->adapter_type > PRIMARY_ADAPTER)
pri_adapter = pri_adapter->pbuddy_adapter;
#endif /* SDIO_HCI + CONCURRENT */
_rtw_up_sema(&(pri_adapter->xmitpriv.xmit_sema));
}
struct xmit_buf* dequeue_pending_xmitbuf(
@ -3519,9 +3464,7 @@ struct xmit_buf* dequeue_pending_xmitbuf_under_survey(
{
_irqL irql;
struct xmit_buf *pxmitbuf;
#ifdef CONFIG_USB_HCI
struct xmit_frame *pxmitframe;
#endif
_queue *pqueue;
@ -3543,7 +3486,6 @@ struct xmit_buf* dequeue_pending_xmitbuf_under_survey(
pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list);
#ifdef CONFIG_USB_HCI
pxmitframe = (struct xmit_frame*)pxmitbuf->priv_data;
if (pxmitframe)
{
@ -3553,9 +3495,6 @@ struct xmit_buf* dequeue_pending_xmitbuf_under_survey(
{
DBG_88E("%s, !!!ERROR!!! For USB, TODO ITEM\n", __func__);
}
#else
type = GetFrameSubType(pxmitbuf->pbuf + TXDESC_OFFSET);
#endif
if ((type == WIFI_PROBEREQ) ||
(type == WIFI_DATA_NULL) ||

137
hal/HalPwrSeqCmd.c
View file

@ -34,11 +34,6 @@ Major Change History:
--*/
#include <HalPwrSeqCmd.h>
#ifdef CONFIG_SDIO_HCI
#include <sdio_ops.h>
#elif defined(CONFIG_GSPI_HCI)
#include <gspi_ops.h>
#endif
/* */
/* Description: */
@ -80,101 +75,61 @@ u8 HalPwrSeqCmdParsing(
/* 2 Only Handle the command whose FAB, CUT, and Interface are matched */
if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) &&
(GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) &&
(GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType))
{
switch (GET_PWR_CFG_CMD(PwrCfgCmd))
{
case PWR_CMD_READ:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n"));
break;
(GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) &&
(GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType)) {
switch (GET_PWR_CFG_CMD(PwrCfgCmd)) {
case PWR_CMD_READ:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n"));
break;
case PWR_CMD_WRITE:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n"));
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
case PWR_CMD_WRITE:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n"));
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
/* Read the value from system register */
value = rtw_read8(padapter, offset);
#ifdef CONFIG_SDIO_HCI
/* */
/* <Roger_Notes> We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface */
/* 2011.07.07. */
/* */
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
{
/* Read Back SDIO Local value */
value = SdioLocalCmd52Read1Byte(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
/* Write the value back to sytem register */
rtw_write8(padapter, offset, value);
break;
case PWR_CMD_POLLING:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n"));
/* Write Back SDIO Local value */
SdioLocalCmd52Write1Byte(padapter, offset, value);
}
else
#endif
{
#ifdef CONFIG_GSPI_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
offset = SPI_LOCAL_OFFSET | offset;
#endif
/* Read the value from system register */
bPollingBit = false;
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
do {
value = rtw_read8(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
/* Write the value back to sytem register */
rtw_write8(padapter, offset, value);
}
break;
case PWR_CMD_POLLING:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n"));
bPollingBit = false;
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
#ifdef CONFIG_GSPI_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
offset = SPI_LOCAL_OFFSET | offset;
#endif
do {
#ifdef CONFIG_SDIO_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
value = SdioLocalCmd52Read1Byte(padapter, offset);
else
#endif
value = rtw_read8(padapter, offset);
value &= GET_PWR_CFG_MASK(PwrCfgCmd);
if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)))
bPollingBit = true;
else
rtw_udelay_os(10);
if (pollingCount++ > maxPollingCnt) {
DBG_88E("Fail to polling Offset[%#x]\n", offset);
return false;
}
} while (!bPollingBit);
break;
case PWR_CMD_DELAY:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n"));
if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US)
rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd));
value &= GET_PWR_CFG_MASK(PwrCfgCmd);
if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)))
bPollingBit = true;
else
rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)*1000);
break;
rtw_udelay_os(10);
case PWR_CMD_END:
/* When this command is parsed, end the process */
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n"));
return true;
break;
if (pollingCount++ > maxPollingCnt) {
DBG_88E("Fail to polling Offset[%#x]\n", offset);
return false;
}
} while (!bPollingBit);
default:
RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n"));
break;
break;
case PWR_CMD_DELAY:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n"));
if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US)
rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd));
else
rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)*1000);
break;
case PWR_CMD_END:
/* When this command is parsed, end the process */
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n"));
return true;
break;
default:
RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n"));
break;
}
}

10
hal/hal_intf.c
View file

@ -22,16 +22,8 @@
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <hal_intf.h>
#ifdef CONFIG_SDIO_HCI
#include <sdio_hal.h>
#elif defined(CONFIG_USB_HCI)
#include <usb_hal.h>
#elif defined(CONFIG_GSPI_HCI)
#include <gspi_hal.h>
#endif
#include <usb_hal.h>
void rtw_hal_chip_configure(_adapter *padapter)
{

14
hal/odm.c
View file

@ -3047,7 +3047,6 @@ odm_DynamicTxPowerInit(
pdmpriv->bDynamicTxPowerEnable = false;
#if (RTL8192C_SUPPORT==1)
#ifdef CONFIG_USB_HCI
#ifdef CONFIG_INTEL_PROXIM
if ((pHalData->BoardType == BOARD_USB_High_PA)||(Adapter->proximity.proxim_support==true))
@ -3060,9 +3059,6 @@ odm_DynamicTxPowerInit(
pdmpriv->bDynamicTxPowerEnable = true;
}
else
#else
pdmpriv->bDynamicTxPowerEnable = false;
#endif
#endif
pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal;
@ -6079,16 +6075,6 @@ odm_EdcaTurboCheckCE(
edca_param = EDCAParam[HT_IOT_PEER_UNKNOWN][trafficIndex];
}
#ifdef CONFIG_PCI_HCI
if (IS_92C_SERIAL(pHalData->VersionID))
{
edca_param = 0x60a42b;
}
else
{
edca_param = 0x6ea42b;
}
#endif
rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);
pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex;

7
hal/rtl8188e_cmd.c
View file

@ -1007,14 +1007,7 @@ _func_enter_;
pwowlan_parm.mode |=FW_WOWLAN_DEAUTH_WAKEUP;
/* DataPinWakeUp */
#ifdef CONFIG_USB_HCI
pwowlan_parm.gpio_index=0x0;
#endif /* CONFIG_USB_HCI */
#ifdef CONFIG_SDIO_HCI
pwowlan_parm.gpio_index=0x80;
#endif /* CONFIG_SDIO_HCI */
DBG_88E_LEVEL(_drv_info_, "%s 5.pwowlan_parm.mode=0x%x\n",__func__,pwowlan_parm.mode);
DBG_88E_LEVEL(_drv_info_, "%s 6.pwowlan_parm.index=0x%x\n",__func__,pwowlan_parm.gpio_index);
res = FillH2CCmd_88E(padapter, H2C_COM_WWLAN, 2, (u8 *)&pwowlan_parm);

84
hal/rtl8188e_dm.c
View file

@ -62,7 +62,6 @@ static void dm_CheckPbcGPIO(_adapter *padapter)
if (!padapter->registrypriv.hw_wps_pbc)
return;
#ifdef CONFIG_USB_HCI
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as output mode */
@ -83,17 +82,6 @@ static void dm_CheckPbcGPIO(_adapter *padapter)
{
bPbcPressed = true;
}
#else
tmp1byte = rtw_read8(padapter, GPIO_IN);
if (tmp1byte == 0xff || padapter->init_adpt_in_progress)
return ;
if ((tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)==0)
{
bPbcPressed = true;
}
#endif
if ( true == bPbcPressed)
{
@ -110,69 +98,6 @@ static void dm_CheckPbcGPIO(_adapter *padapter)
}
}
#ifdef CONFIG_PCI_HCI
/* */
/* Description: */
/* Perform interrupt migration dynamically to reduce CPU utilization. */
/* */
/* Assumption: */
/* 1. Do not enable migration under WIFI test. */
/* */
/* Created by Roger, 2010.03.05. */
/* */
void
dm_InterruptMigration(
PADAPTER Adapter
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
bool bCurrentIntMt, bCurrentACIntDisable;
bool IntMtToSet = false;
bool ACIntToSet = false;
/* Retrieve current interrupt migration and Tx four ACs IMR settings first. */
bCurrentIntMt = pHalData->bInterruptMigration;
bCurrentACIntDisable = pHalData->bDisableTxInt;
/* */
/* <Roger_Notes> Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics */
/* when interrupt migration is set before. 2010.03.05. */
/* */
if (!Adapter->registrypriv.wifi_spec &&
(check_fwstate(pmlmepriv, _FW_LINKED)== true) &&
pmlmepriv->LinkDetectInfo.bHigherBusyTraffic)
{
IntMtToSet = true;
/* To check whether we should disable Tx interrupt or not. */
if (pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic )
ACIntToSet = true;
}
/* Update current settings. */
if ( bCurrentIntMt != IntMtToSet ){
DBG_88E("%s(): Update interrrupt migration(%d)\n",__func__,IntMtToSet);
if (IntMtToSet)
{
/* */
/* <Roger_Notes> Set interrrupt migration timer and corresponging Tx/Rx counter. */
/* timer 25ns*0xfa0=100us for 0xf packets. */
/* 2010.03.05. */
/* */
rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);/* 0x306:Rx, 0x307:Tx */
pHalData->bInterruptMigration = IntMtToSet;
} else {
/* Reset all interrupt migration settings. */
rtw_write32(Adapter, REG_INT_MIG, 0);
pHalData->bInterruptMigration = IntMtToSet;
}
}
}
#endif
/* */
/* Initialize GPIO setting registers */
/* */
@ -329,9 +254,7 @@ rtl8188e_InitHalDm(
PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
u8 i;
#ifdef CONFIG_USB_HCI
dm_InitGPIOSetting(Adapter);
#endif
pdmpriv->DM_Type = DM_Type_ByDriver;
pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE;
@ -445,13 +368,6 @@ skip_dm:
/* Check GPIO to determine current RF on/off and Pbc status. */
/* Check Hardware Radio ON/OFF or not */
#ifdef CONFIG_PCI_HCI
if (pHalData->bGpioHwWpsPbc)
#endif
{
/* temp removed */
/* dm_CheckPbcGPIO(Adapter); */
}
return;
}

56
hal/rtl8188e_hal_init.c
View file

@ -27,9 +27,8 @@
#include <rtw_iol.h>
#if defined(CONFIG_IOL)
#ifdef CONFIG_USB_HCI
#include <usb_ops.h>
#endif
static void iol_mode_enable(PADAPTER padapter, u8 enable)
{
u8 reg_0xf0 = 0;
@ -2525,63 +2524,15 @@ static void rtl8188e_SetHalODMVar(
void rtl8188e_clone_haldata(_adapter* dst_adapter, _adapter* src_adapter)
{
#ifdef CONFIG_SDIO_HCI
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(dst_adapter);
#ifndef CONFIG_SDIO_TX_TASKLET
_sema temp_SdioXmitSema;
_sema temp_SdioXmitTerminateSema;
#endif
_lock temp_SdioTxFIFOFreePageLock;
#ifndef CONFIG_SDIO_TX_TASKLET
_rtw_memcpy(&temp_SdioXmitSema, &(pHalData->SdioXmitSema), sizeof(_sema));
_rtw_memcpy(&temp_SdioXmitTerminateSema, &(pHalData->SdioXmitTerminateSema), sizeof(_sema));
#endif
_rtw_memcpy(&temp_SdioTxFIFOFreePageLock, &(pHalData->SdioTxFIFOFreePageLock), sizeof(_lock));
_rtw_memcpy(dst_adapter->HalData, src_adapter->HalData, dst_adapter->hal_data_sz);
#ifndef CONFIG_SDIO_TX_TASKLET
_rtw_memcpy(&(pHalData->SdioXmitSema), &temp_SdioXmitSema, sizeof(_sema));
_rtw_memcpy(&(pHalData->SdioXmitTerminateSema), &temp_SdioXmitTerminateSema, sizeof(_sema));
#endif
_rtw_memcpy(&(pHalData->SdioTxFIFOFreePageLock), &temp_SdioTxFIFOFreePageLock, sizeof(_lock));
#else
_rtw_memcpy(dst_adapter->HalData, src_adapter->HalData, dst_adapter->hal_data_sz);
#endif
}
void rtl8188e_start_thread(_adapter *padapter)
{
#ifdef CONFIG_SDIO_HCI
#ifndef CONFIG_SDIO_TX_TASKLET
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
pHalData->SdioXmitThread = kthread_run(rtl8188es_xmit_thread, padapter, "RTWHALXT");
if (IS_ERR(pHalData->SdioXmitThread))
{
RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: start rtl8188es_xmit_thread FAIL!!\n", __func__));
}
#endif
#endif
}
void rtl8188e_stop_thread(_adapter *padapter)
{
#ifdef CONFIG_SDIO_HCI
#ifndef CONFIG_SDIO_TX_TASKLET
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
/* stop xmit_buf_thread */
if (pHalData->SdioXmitThread ) {
_rtw_up_sema(&pHalData->SdioXmitSema);
_rtw_down_sema(&pHalData->SdioXmitTerminateSema);
pHalData->SdioXmitThread = 0;
}
#endif
#endif
}
static void hal_notch_filter_8188e(_adapter *adapter, bool enable)
@ -2673,7 +2624,6 @@ u8 GetEEPROMSize8188E(PADAPTER padapter)
return size;
}
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_PCI_HCI)
/* */
/* */
/* LLT R/W/Init function */
@ -2753,8 +2703,6 @@ s32 InitLLTTable(PADAPTER padapter, u8 txpktbuf_bndy)
return status;
}
#endif
void
Hal_InitPGData88E(PADAPTER padapter)
@ -3052,9 +3000,7 @@ void Hal_ReadPowerSavingMode88E(PADAPTER padapter, u8 *hwinfo, bool AutoLoadFail
/* decide hw if support remote wakeup function */
/* if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume */
#ifdef CONFIG_USB_HCI
padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT1)?true :false;
#endif /* CONFIG_USB_HCI */
DBG_88E("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) ,bSupportRemoteWakeup(%x)\n",__func__,
padapter->pwrctrlpriv.bHWPwrPindetect,padapter->pwrctrlpriv.bHWPowerdown ,padapter->pwrctrlpriv.bSupportRemoteWakeup);

16
hal/rtl8188e_phycfg.c
View file

@ -1287,21 +1287,7 @@ PHY_BBConfig8188E(
rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB);
#ifdef CONFIG_USB_HCI
rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB);
#else
rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB);
#endif
#ifdef CONFIG_PCI_HCI
/* Force use left antenna by default for 88C. */
/* if (!IS_92C_SERIAL(pHalData->VersionID) || IS_92C_1T2R(pHalData->VersionID)) */
if (Adapter->ledpriv.LedStrategy != SW_LED_MODE10)
{
RegVal = rtw_read32(Adapter, REG_LEDCFG0);
rtw_write32(Adapter, REG_LEDCFG0, RegVal|BIT23);
}
#endif
/* */
/* Config BB and AGC */
@ -1359,7 +1345,6 @@ rtl8188e_PHY_ConfigRFWithParaFile(
static int PHY_ConfigRFExternalPA(PADAPTER Adapter, RF_RADIO_PATH_E eRFPath)
{
int rtStatus = _SUCCESS;
#ifdef CONFIG_USB_HCI
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u16 i=0;
@ -1368,7 +1353,6 @@ static int PHY_ConfigRFExternalPA(PADAPTER Adapter, RF_RADIO_PATH_E eRFPath)
/* 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the */
/* same code as SU. It is already updated in radio_a_1T_HP.txt. */
#endif
return rtStatus;
}
/* */

2
hal/rtl8188e_rf6052.c
View file

@ -190,11 +190,9 @@ rtl8188e_PHY_RF6052SetCckTxPower(
TxAGC[idx1] =
pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
#ifdef CONFIG_USB_HCI
/* 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. */
if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA)
TxAGC[idx1] = 0x20;
#endif
}
}
}

2
hal/rtl8188e_sreset.c
View file

@ -183,7 +183,6 @@ void rtl8188e_sreset_xmit_status_check(_adapter *padapter)
rtw_write32(padapter,REG_TXDMA_STATUS,txdma_status);
rtl8188e_silentreset_for_specific_platform(padapter);
}
#ifdef CONFIG_USB_HCI
/* total xmit irp = 4 */
current_time = rtw_get_current_time();
if (0==pxmitpriv->free_xmitbuf_cnt)
@ -203,7 +202,6 @@ void rtl8188e_sreset_xmit_status_check(_adapter *padapter)
}
}
}
#endif /* CONFIG_USB_HCI */
}
void rtl8188e_sreset_linked_status_check(_adapter *padapter)

2
hal/rtl8188eu_xmit.c
View file

@ -117,11 +117,9 @@ void rtl8188e_fill_fake_txdesc(
/* offset 16 */
ptxdesc->txdw4 |= cpu_to_le32(BIT(8));/* driver uses rate */
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
/* USB interface drop packet if the checksum of descriptor isn't correct. */
/* Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). */
rtl8188eu_cal_txdesc_chksum(ptxdesc);
#endif
}
static void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc)

26
hal/usb_halinit.c
View file

@ -31,12 +31,6 @@
#include <rtw_iol.h>
#endif
#ifndef CONFIG_USB_HCI
#error "CONFIG_USB_HCI shall be on!\n"
#endif
#include <usb_ops.h>
#include <usb_hal.h>
#include <usb_osintf.h>
@ -2124,7 +2118,6 @@ readAdapterInfo_8188EU(
PADAPTER padapter
)
{
#if 1
EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
/* parse the eeprom/efuse content */
@ -2150,28 +2143,9 @@ readAdapterInfo_8188EU(
/* The following part initialize some vars by PG info. */
/* */
Hal_InitChannelPlan(padapter);
#if defined(CONFIG_WOWLAN) && defined(CONFIG_SDIO_HCI)
Hal_DetectWoWMode(padapter);
#endif /* CONFIG_WOWLAN && CONFIG_SDIO_HCI */
Hal_CustomizeByCustomerID_8188EU(padapter);
_ReadLEDSetting(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag);
#else
#ifdef CONFIG_INTEL_PROXIM
/* for intel proximity */
if (pHalData->rf_type== RF_1T1R) {
Adapter->proximity.proxim_support = true;
} else if (pHalData->rf_type== RF_2T2R) {
if ((pHalData->EEPROMPID == 0x8186) &&
(pHalData->EEPROMVID== 0x0bda))
Adapter->proximity.proxim_support = true;
} else {
Adapter->proximity.proxim_support = false;
}
#endif /* CONFIG_INTEL_PROXIM */
#endif
}
static void _ReadPROMContent(

4
include/Hal8188EPhyCfg.h
View file

@ -33,11 +33,7 @@
#define IQK_BB_REG_NUM 9
#define HP_THERMAL_NUM 8
#ifdef CONFIG_PCI_HCI
#define MAX_AGGR_NUM 0x0B
#else
#define MAX_AGGR_NUM 0x07
#endif // CONFIG_PCI_HCI
/*--------------------------Define Parameters-------------------------------*/

58
include/drv_types.h
View file

@ -223,14 +223,6 @@ struct registry_priv
#define MAX_CONTINUAL_URB_ERR 4
#ifdef CONFIG_SDIO_HCI
#include <drv_types_sdio.h>
#define INTF_DATA SDIO_DATA
#elif defined(CONFIG_GSPI_HCI)
#include <drv_types_gspi.h>
#define INTF_DATA GSPI_DATA
#endif
struct dvobj_priv
{
_adapter *if1;
@ -255,8 +247,6 @@ struct dvobj_priv
/*-------- below is for USB INTERFACE --------*/
#ifdef CONFIG_USB_HCI
u8 nr_endpoint;
u8 ishighspeed;
u8 RtNumInPipes;
@ -280,43 +270,6 @@ struct dvobj_priv
struct usb_device *pusbdev;
ATOMIC_T continual_urb_error;
#endif//CONFIG_USB_HCI
/*-------- below is for PCIE INTERFACE --------*/
#ifdef CONFIG_PCI_HCI
struct pci_dev *ppcidev;
//PCI MEM map
unsigned long pci_mem_end; /* shared mem end */
unsigned long pci_mem_start; /* shared mem start */
//PCI IO map
unsigned long pci_base_addr; /* device I/O address */
//PciBridge
struct pci_priv pcipriv;
u16 irqline;
u8 irq_enabled;
RT_ISR_CONTENT isr_content;
_lock irq_th_lock;
//ASPM
u8 const_pci_aspm;
u8 const_amdpci_aspm;
u8 const_hwsw_rfoff_d3;
u8 const_support_pciaspm;
// pci-e bridge */
u8 const_hostpci_aspm_setting;
// pci-e device */
u8 const_devicepci_aspm_setting;
u8 b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00.
u8 b_support_backdoor;
u8 bdma64;
#endif//CONFIG_PCI_HCI
};
static struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
@ -325,18 +278,7 @@ static struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
#ifdef RTW_DVOBJ_CHIP_HW_TYPE
#endif
#ifdef CONFIG_USB_HCI
return &dvobj->pusbintf->dev;
#endif
#ifdef CONFIG_SDIO_HCI
return &dvobj->intf_data.func->dev;
#endif
#ifdef CONFIG_GSPI_HCI
return &dvobj->intf_data.func->dev;
#endif
#ifdef CONFIG_PCI_HCI
return &dvobj->ppcidev->dev;
#endif
}
enum _IFACE_TYPE {

11
include/odm_types.h
View file

@ -103,7 +103,6 @@ typedef enum _RT_SPINLOCK_TYPE{
#define STA_INFO_T RT_WLAN_STA
#define PSTA_INFO_T PRT_WLAN_STA
// typedef unsigned long u4Byte,*pu4Byte;
#define CONFIG_HW_ANTENNA_DIVERSITY
#define CONFIG_SW_ANTENNA_DIVERSITY
@ -187,15 +186,7 @@ typedef enum _RT_SPINLOCK_TYPE{
#define s8Byte s64
#define ps8Byte s64*
#ifdef CONFIG_USB_HCI
#define DEV_BUS_TYPE RT_USB_INTERFACE
#elif defined(CONFIG_PCI_HCI)
#define DEV_BUS_TYPE RT_PCI_INTERFACE
#elif defined(CONFIG_SDIO_HCI)
#define DEV_BUS_TYPE RT_SDIO_INTERFACE
#elif defined(CONFIG_GSPI_HCI)
#define DEV_BUS_TYPE RT_SDIO_INTERFACE
#endif
#define DEV_BUS_TYPE RT_USB_INTERFACE
typedef struct timer_list RT_TIMER, *PRT_TIMER;
typedef void * RT_TIMER_CALL_BACK;

170
include/osdep_ce_service.h
View file

@ -1,170 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __OSDEP_CE_SERVICE_H_
#define __OSDEP_CE_SERVICE_H_
#include <ndis.h>
#include <ntddndis.h>
#ifdef CONFIG_SDIO_HCI
#include "SDCardDDK.h"
#endif
#ifdef CONFIG_USB_HCI
#include <usbdi.h>
#endif
typedef HANDLE _sema;
typedef LIST_ENTRY _list;
typedef NDIS_STATUS _OS_STATUS;
typedef NDIS_SPIN_LOCK _lock;
typedef HANDLE _rwlock; //Mutex
typedef u32 _irqL;
typedef NDIS_HANDLE _nic_hdl;
typedef NDIS_MINIPORT_TIMER _timer;
struct __queue {
LIST_ENTRY queue;
_lock lock;
};
typedef NDIS_PACKET _pkt;
typedef NDIS_BUFFER _buffer;
typedef struct __queue _queue;
typedef HANDLE _thread_hdl_;
typedef DWORD thread_return;
typedef void* thread_context;
typedef NDIS_WORK_ITEM _workitem;
#define thread_exit() ExitThread(STATUS_SUCCESS); return 0;
#define SEMA_UPBND (0x7FFFFFFF) //8192
__inline static _list *get_prev(_list *list)
{
return list->Blink;
}
__inline static _list *get_next(_list *list)
{
return list->Flink;
}
__inline static _list *get_list_head(_queue *queue)
{
return (&(queue->queue));
}
#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member)
__inline static void _enter_critical(_lock *plock, _irqL *pirqL)
{
NdisAcquireSpinLock(plock);
}
__inline static void _exit_critical(_lock *plock, _irqL *pirqL)
{
NdisReleaseSpinLock(plock);
}
__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL)
{
NdisDprAcquireSpinLock(plock);
}
__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL)
{
NdisDprReleaseSpinLock(plock);
}
__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL)
{
WaitForSingleObject(*prwlock, INFINITE );
}
__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL)
{
ReleaseMutex(*prwlock);
}
__inline static void rtw_list_delete(_list *plist)
{
RemoveEntryList(plist);
InitializeListHead(plist);
}
__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,void * cntx)
{
NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx);
}
__inline static void _set_timer(_timer *ptimer,u32 delay_time)
{
NdisMSetTimer(ptimer,delay_time);
}
__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled)
{
NdisMCancelTimer(ptimer,bcancelled);
}
__inline static void _init_workitem(_workitem *pwork, void *pfunc, void * cntx)
{
NdisInitializeWorkItem(pwork, pfunc, cntx);
}
__inline static void _set_workitem(_workitem *pwork)
{
NdisScheduleWorkItem(pwork);
}
#define ATOMIC_INIT(i) { (i) }
//
// Global Mutex: can only be used at PASSIVE level.
//
#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \
{ \
while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\
{ \
NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \
NdisMSleep(10000); \
} \
}
#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \
{ \
NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \
}
#endif

5
include/osdep_intf.h
View file

@ -47,11 +47,7 @@ A protection mechanism is necessary for the io_rwmem(read/write protocol)
Under Async. IRP (SDIO/USB)
The protection mechanism is through the pending queue.
*/
_mutex ioctl_mutex;
#ifdef CONFIG_USB_HCI
// when in USB, IO is through interrupt in/out endpoints
struct usb_device *udev;
PURB piorw_urb;
@ -61,7 +57,6 @@ The protection mechanism is through the pending queue.
_timer io_timer;
u8 bio_irp_timeout;
u8 bio_timer_cancel;
#endif
};

174
include/rtl8188e_hal.h
View file

@ -46,100 +46,33 @@
#define Rtl8188E_FwWoWImgArrayLength ArrayLength_8188E_FW_WoWLAN
#endif //CONFIG_WOWLAN
#ifdef CONFIG_SDIO_HCI
//TODO: We should define 8188ES firmware related macro settings here!!
//TODO: The following need to check!!
#define RTL8188E_FW_UMC_IMG "rtl8188E\\rtl8188efw.bin"
#define RTL8188E_PHY_REG "rtl8188E\\PHY_REG_1T.txt"
#define RTL8188E_PHY_RADIO_A "rtl8188E\\radio_a_1T.txt"
#define RTL8188E_PHY_RADIO_B "rtl8188E\\radio_b_1T.txt"
#define RTL8188E_AGC_TAB "rtl8188E\\AGC_TAB_1T.txt"
#define RTL8188E_PHY_MACREG "rtl8188E\\MAC_REG.txt"
#define RTL8188E_PHY_REG_PG "rtl8188E\\PHY_REG_PG.txt"
#define RTL8188E_PHY_REG_MP "rtl8188E\\PHY_REG_MP.txt"
#define RTL8188E_FW_UMC_IMG "rtl8188E\\rtl8188efw.bin"
#define RTL8188E_PHY_REG "rtl8188E\\PHY_REG_1T.txt"
#define RTL8188E_PHY_RADIO_A "rtl8188E\\radio_a_1T.txt"
#define RTL8188E_PHY_RADIO_B "rtl8188E\\radio_b_1T.txt"
#define RTL8188E_AGC_TAB "rtl8188E\\AGC_TAB_1T.txt"
#define RTL8188E_PHY_MACREG "rtl8188E\\MAC_REG.txt"
#define RTL8188E_PHY_REG_PG "rtl8188E\\PHY_REG_PG.txt"
#define RTL8188E_PHY_REG_MP "rtl8188E\\PHY_REG_MP.txt"
//---------------------------------------------------------------------
// RTL8188E From header
// RTL8188E Power Configuration CMDs for USB/SDIO interfaces
//---------------------------------------------------------------------
//---------------------------------------------------------------------
// RTL8188E Power Configuration CMDs for USB/SDIO interfaces
//---------------------------------------------------------------------
#define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow
#define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow
#define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow
#define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow
#define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow
#define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow
#define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow
#define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow
#define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow
#elif defined(CONFIG_USB_HCI)
#define RTL8188E_FW_UMC_IMG "rtl8188E\\rtl8188efw.bin"
#define RTL8188E_PHY_REG "rtl8188E\\PHY_REG_1T.txt"
#define RTL8188E_PHY_RADIO_A "rtl8188E\\radio_a_1T.txt"
#define RTL8188E_PHY_RADIO_B "rtl8188E\\radio_b_1T.txt"
#define RTL8188E_AGC_TAB "rtl8188E\\AGC_TAB_1T.txt"
#define RTL8188E_PHY_MACREG "rtl8188E\\MAC_REG.txt"
#define RTL8188E_PHY_REG_PG "rtl8188E\\PHY_REG_PG.txt"
#define RTL8188E_PHY_REG_MP "rtl8188E\\PHY_REG_MP.txt"
//---------------------------------------------------------------------
// RTL8188E Power Configuration CMDs for USB/SDIO interfaces
//---------------------------------------------------------------------
#define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow
#define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow
#define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow
#define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow
#define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow
#define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow
#define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow
#define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow
#define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow
#elif defined(CONFIG_PCI_HCI)
#define RTL8188E_FW_UMC_IMG "rtl8188E\\rtl8188efw.bin"
#define RTL8188E_PHY_REG "rtl8188E\\PHY_REG_1T.txt"
#define RTL8188E_PHY_RADIO_A "rtl8188E\\radio_a_1T.txt"
#define RTL8188E_PHY_RADIO_B "rtl8188E\\radio_b_1T.txt"
#define RTL8188E_AGC_TAB "rtl8188E\\AGC_TAB_1T.txt"
#define RTL8188E_PHY_MACREG "rtl8188E\\MAC_REG.txt"
#define RTL8188E_PHY_REG_PG "rtl8188E\\PHY_REG_PG.txt"
#define RTL8188E_PHY_REG_MP "rtl8188E\\PHY_REG_MP.txt"
#define Rtl8188E_PHY_REG_Array_PG Rtl8188EEPHY_REG_Array_PG
#define Rtl8188E_PHY_REG_Array_PGLength Rtl8188EEPHY_REG_Array_PGLength
#ifndef CONFIG_PHY_SETTING_WITH_ODM
#if MP_DRIVER == 1
#define Rtl8188ES_PHY_REG_Array_MP Rtl8188ESPHY_REG_Array_MP
#endif
#endif
//---------------------------------------------------------------------
// RTL8188E Power Configuration CMDs for USB/SDIO/PCIE interfaces
//---------------------------------------------------------------------
#define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow
#define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow
#define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow
#define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow
#define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow
#define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow
#define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow
#define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow
#define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow
#endif //CONFIG_***_HCI
#define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow
#define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow
#define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow
#define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow
#define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow
#define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow
#define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow
#define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow
#define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow
#define DRVINFO_SZ 4 // unit is 8bytes
#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0))
#if 1 // download firmware related data structure
// download firmware related data structure
#define FW_8188E_SIZE 0x4000 //16384,16k
#define FW_8188E_START_ADDRESS 0x1000
#define FW_8188E_END_ADDRESS 0x1FFF //0x5FFF
@ -205,8 +138,6 @@ typedef struct _RT_8188E_FIRMWARE_HDR
u32 Rsvd4;
u32 Rsvd5;
}RT_8188E_FIRMWARE_HDR, *PRT_8188E_FIRMWARE_HDR;
#endif // download firmware related data structure
#define DRIVER_EARLY_INT_TIME 0x05
#define BCN_DMA_ATIME_INT_TIME 0x02
@ -542,40 +473,6 @@ typedef struct hal_data_8188e
// Auto FSM to Turn On, include clock, isolation, power control for MAC only
u8 bMacPwrCtrlOn;
#ifdef CONFIG_SDIO_HCI
//
// For SDIO Interface HAL related
//
//
// SDIO ISR Related
//
// u32 IntrMask[1];
// u32 IntrMaskToSet[1];
// LOG_INTERRUPT InterruptLog;
u32 sdio_himr;
u32 sdio_hisr;
//
// SDIO Tx FIFO related.
//
// HIQ, MID, LOW, PUB free pages; padapter->xmitpriv.free_txpg
u8 SdioTxFIFOFreePage[SDIO_TX_FREE_PG_QUEUE];
_lock SdioTxFIFOFreePageLock;
#ifndef CONFIG_SDIO_TX_TASKLET
_thread_hdl_ SdioXmitThread;
_sema SdioXmitSema;
_sema SdioXmitTerminateSema;
#endif
//
// SDIO Rx FIFO related.
//
u8 SdioRxFIFOCnt;
u16 SdioRxFIFOSize;
#endif //CONFIG_SDIO_HCI
#ifdef CONFIG_USB_HCI
u32 UsbBulkOutSize;
// Interrupt relatd register information.
@ -596,34 +493,6 @@ typedef struct hal_data_8188e
u8 UsbRxAggPageCount; // 8192C DMA page count
u8 UsbRxAggPageTimeout;
#endif
#endif //CONFIG_USB_HCI
#ifdef CONFIG_PCI_HCI
//
// EEPROM setting.
//
u16 EEPROMDID;
u16 EEPROMSMID;
u16 EEPROMChannelPlan;
u8 EEPROMTSSI[2];
u8 EEPROMBoardType;
u32 TransmitConfig;
u32 IntrMask[2];
u32 IntrMaskToSet[2];
u8 bDefaultAntenna;
u8 bIQKInitialized;
u8 bInterruptMigration;
u8 bDisableTxInt;
u8 bGpioHwWpsPbc;
#endif //CONFIG_PCI_HCI
#ifdef CONFIG_TX_EARLY_MODE
u8 bEarlyModeEnable;
@ -643,11 +512,6 @@ typedef struct hal_data_8188e HAL_DATA_TYPE, *PHAL_DATA_TYPE;
//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) )
#ifdef CONFIG_PCI_HCI
void InterruptRecognized8188EE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent);
void UpdateInterruptMask8188EE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1);
#endif //CONFIG_PCI_HCI
// rtl8188e_hal_init.c
#ifdef CONFIG_WOWLAN
s32 rtl8188e_FirmwareDownload(PADAPTER padapter, bool bUsedWoWLANFw);

15
include/rtl8188e_recv.h
View file

@ -149,27 +149,12 @@ typedef struct rxreport_8188e
} RXREPORT, *PRXREPORT;
#ifdef CONFIG_SDIO_HCI
s32 rtl8188es_init_recv_priv(PADAPTER padapter);
void rtl8188es_free_recv_priv(PADAPTER padapter);
void rtl8188es_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf);
#endif
#ifdef CONFIG_USB_HCI
#define INTERRUPT_MSG_FORMAT_LEN 60
void rtl8188eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf);
s32 rtl8188eu_init_recv_priv(PADAPTER padapter);
void rtl8188eu_free_recv_priv(PADAPTER padapter);
void rtl8188eu_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf);
void rtl8188eu_recv_tasklet(void *priv);
#endif
#ifdef CONFIG_PCI_HCI
s32 rtl8188ee_init_recv_priv(PADAPTER padapter);
void rtl8188ee_free_recv_priv(PADAPTER padapter);
#endif
void rtl8188e_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat);
void rtl8188e_process_phy_info(PADAPTER padapter, void *prframe);
void update_recvframe_phyinfo_88e(union recv_frame *precvframe,struct phy_stat *pphy_status);

15
include/rtl8188e_spec.h
View file

@ -747,21 +747,6 @@ Default: 00b.
#define HAL_NIC_UNPLUG_ISR 0xFFFFFFFF // The value when the NIC is unplugged for PCI.
#ifdef CONFIG_PCI_HCI
//#define IMR_RX_MASK (IMR_ROK_88E|IMR_RDU_88E|IMR_RXFOVW_88E)
#define IMR_TX_MASK (IMR_VODOK_88E|IMR_VIDOK_88E|IMR_BEDOK_88E|IMR_BKDOK_88E|IMR_MGNTDOK_88E|IMR_HIGHDOK_88E|IMR_BCNDERR0_88E)
#ifdef CONFIG_CONCURRENT_MODE
#define RT_IBSS_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E | IMR_BCNDMAINT_E_88E)
#else
#define RT_IBSS_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E)
#endif
#define RT_AC_INT_MASKS (IMR_VIDOK_88E | IMR_VODOK_88E | IMR_BEDOK_88E|IMR_BKDOK_88E)
#define RT_BSS_INT_MASKS (RT_IBSS_INT_MASKS)
#endif
// 8192C EFUSE
//----------------------------------------------------------------------------
#define HWSET_MAX_SIZE 256

28
include/rtl8188e_xmit.h
View file

@ -255,21 +255,6 @@ struct txrpt_ccx_88e {
#define txrpt_ccx_qtime_88e(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8))
void rtl8188e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull);
#ifdef CONFIG_SDIO_HCI
s32 rtl8188es_init_xmit_priv(PADAPTER padapter);
void rtl8188es_free_xmit_priv(PADAPTER padapter);
s32 rtl8188es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
s32 rtl8188es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
thread_return rtl8188es_xmit_thread(thread_context context);
s32 rtl8188es_xmit_buf_handler(PADAPTER padapter);
#define hal_xmit_handler rtl8188es_xmit_buf_handler
#ifdef CONFIG_SDIO_TX_TASKLET
void rtl8188es_xmit_tasklet(void *priv);
#endif
#endif
#ifdef CONFIG_USB_HCI
s32 rtl8188eu_init_xmit_priv(PADAPTER padapter);
void rtl8188eu_free_xmit_priv(PADAPTER padapter);
s32 rtl8188eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
@ -278,19 +263,6 @@ s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter);
#define hal_xmit_handler rtl8188eu_xmit_buf_handler
void rtl8188eu_xmit_tasklet(void *priv);
s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
#endif
#ifdef CONFIG_PCI_HCI
s32 rtl8188ee_init_xmit_priv(PADAPTER padapter);
void rtl8188ee_free_xmit_priv(PADAPTER padapter);
struct xmit_buf *rtl8188ee_dequeue_xmitbuf(struct rtw_tx_ring *ring);
void rtl8188ee_xmitframe_resume(_adapter *padapter);
s32 rtl8188ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
s32 rtl8188ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
void rtl8188ee_xmit_tasklet(void *priv);
#endif
#ifdef CONFIG_TX_EARLY_MODE
void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf );

5
include/rtw_cmd.h
View file

@ -103,11 +103,6 @@ struct evt_priv {
u8 *evt_buf; //shall be non-paged, and 4 bytes aligned
u8 *evt_allocated_buf;
u32 evt_done_cnt;
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
u8 *c2h_mem;
u8 *allocated_c2h_mem;
#endif
};
#define init_h2fwcmd_w_parm_no_rsp(pcmd, pparm, code) \

25
include/rtw_eeprom.h
View file

@ -44,11 +44,6 @@
#define EUROPE 0x1 //temp, should be provided later
#define JAPAN 0x2 //temp, should be provided later
#ifdef CONFIG_SDIO_HCI
#define eeprom_cis0_sz 17
#define eeprom_cis1_sz 50
#endif
#define EEPROM_CID_DEFAULT 0x0
#define EEPROM_CID_ALPHA 0x1
#define EEPROM_CID_Senao 0x3
@ -117,38 +112,20 @@ typedef enum _RT_CUSTOMER_ID
RT_CID_819x_ALPHA_WD=41,
}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;
struct eeprom_priv
{
struct eeprom_priv {
u8 bautoload_fail_flag;
u8 bloadfile_fail_flag;
u8 bloadmac_fail_flag;
//u8 bempty;
//u8 sys_config;
u8 mac_addr[6]; //PermanentAddress
//u8 config0;
u16 channel_plan;
//u8 country_string[3];
//u8 tx_power_b[15];
//u8 tx_power_g[15];
//u8 tx_power_a[201];
u8 EepromOrEfuse;
u8 efuse_eeprom_data[HWSET_MAX_SIZE_512]; //92C:256bytes, 88E:512bytes, we use union set (512bytes)
#ifdef CONFIG_RF_GAIN_OFFSET
u8 EEPROMRFGainOffset;
#endif //CONFIG_RF_GAIN_OFFSET
#ifdef CONFIG_SDIO_HCI
u8 sdio_setting;
u32 ocr;
u8 cis0[eeprom_cis0_sz];
u8 cis1[eeprom_cis1_sz];
#endif
};
extern void eeprom_write16(_adapter *padapter, u16 reg, u16 data);
extern u16 eeprom_read16(_adapter *padapter, u16 reg);
extern void read_eeprom_content(_adapter *padapter);

4
include/rtw_io.h
View file

@ -36,7 +36,6 @@
#include <linux/spinlock.h>
#include <asm/atomic.h>
#ifdef CONFIG_USB_HCI
#include <linux/usb.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
#include <linux/usb_ch9.h>
@ -52,9 +51,6 @@
#define rtw_usb_buffer_free(dev, size, addr, dma) usb_buffer_free((dev), (size), (addr), (dma))
#endif
#endif //CONFIG_USB_HCI
#define NUM_IOREQ 8
#define MAX_PROT_SZ (64-16)

32
include/rtw_led.h
View file

@ -119,7 +119,6 @@ typedef struct _LED_871x{
_timer BlinkTimer; // Timer object for led blinking.
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
u8 bSWLedCtrl;
// ALPHA, added by chiyoko, 20090106
@ -131,16 +130,8 @@ typedef struct _LED_871x{
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
_workitem BlinkWorkItem; // Workitem used by BlinkTimer to manipulate H/W to blink LED.
#endif
#endif //defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#if defined(CONFIG_PCI_HCI)
u8 bLedSlowBlinkInProgress;//added by vivi, for led new mode
#endif
} LED_871x, *PLED_871x;
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#define IS_LED_WPS_BLINKING(_LED_871x) (((PLED_871x)_LED_871x)->CurrLedState==LED_BLINK_WPS \
|| ((PLED_871x)_LED_871x)->CurrLedState==LED_BLINK_WPS_STOP \
|| ((PLED_871x)_LED_871x)->bLedWPSBlinkInProgress)
@ -169,29 +160,6 @@ LedControl871x(
_adapter *padapter,
LED_CTL_MODE LedAction
);
#endif //defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#if defined(CONFIG_PCI_HCI)
//================================================================================
// LED customization.
//================================================================================
typedef enum _LED_STRATEGY_871x{
SW_LED_MODE0 = 0, // SW control 1 LED via GPIO0. It is default option.
SW_LED_MODE1 = 1, // SW control for PCI Express
SW_LED_MODE2 = 2, // SW control for Cameo.
SW_LED_MODE3 = 3, // SW contorl for RunTop.
SW_LED_MODE4 = 4, // SW control for Netcore
SW_LED_MODE5 = 5, //added by vivi, for led new mode, DLINK
SW_LED_MODE6 = 6, //added by vivi, for led new mode, PRONET
SW_LED_MODE7 = 7, //added by chiyokolin, for Lenovo, PCI Express Minicard Spec Rev.1.2 spec
SW_LED_MODE8 = 8, //added by chiyokolin, for QMI
SW_LED_MODE9 = 9, //added by chiyokolin, for BITLAND, PCI Express Minicard Spec Rev.1.1
SW_LED_MODE10 = 10, //added by chiyokolin, for Edimax-ASUS
HW_LED = 50, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes)
LED_ST_NONE = 99,
}LED_STRATEGY_871x, *PLED_STRATEGY_871x;
#endif //defined(CONFIG_PCI_HCI)
struct led_priv{
/* add for led controll */

15
include/rtw_mlme_ext.h
View file

@ -44,20 +44,7 @@
#define REASSOC_LIMIT (4)
#define READDBA_LIMIT (2)
#ifdef CONFIG_GSPI_HCI
#define ROAMING_LIMIT 5
#else
#define ROAMING_LIMIT 8
#endif
//#define IOCMD_REG0 0x10250370
//#define IOCMD_REG1 0x10250374
//#define IOCMD_REG2 0x10250378
//#define FW_DYNAMIC_FUN_SWITCH 0x10250364
//#define WRITE_BB_CMD 0xF0000001
//#define SET_CHANNEL_CMD 0xF3000000
//#define UPDATE_RA_CMD 0xFD0000A2
#define ROAMING_LIMIT 8
#define DYNAMIC_FUNC_DISABLE (0x0)

4
include/rtw_mp.h
View file

@ -115,8 +115,6 @@ struct mp_xmit_frame
_adapter *padapter;
#ifdef CONFIG_USB_HCI
//insert urb, irp, and irpcnt info below...
u8 *mem_addr;
u32 sz[8];
@ -126,8 +124,6 @@ struct mp_xmit_frame
sint last[8];
uint irpcnt;
uint fragcnt;
#endif /* CONFIG_USB_HCI */
uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
};

12
include/rtw_pwrctrl.h
View file

@ -211,18 +211,6 @@ struct pwrctrl_priv
//RF OFF Level
u32 cur_ps_level;
u32 reg_rfps_level;
#ifdef CONFIG_PCI_HCI
//just for PCIE ASPM
u8 b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00.
u8 b_support_backdoor;
//just for PCIE ASPM
u8 const_amdpci_aspm;
#endif
uint ips_enter_cnts;
uint ips_leave_cnts;

35
include/rtw_recv.h
View file

@ -200,18 +200,6 @@ struct recv_stat {
#define EOR BIT(30)
#ifdef CONFIG_PCI_HCI
#define PCI_MAX_RX_QUEUE 1// MSDU packet queue, Rx Command Queue
#define PCI_MAX_RX_COUNT 128
struct rtw_rx_ring {
struct recv_stat *desc;
dma_addr_t dma;
unsigned int idx;
struct sk_buff *rx_buf[PCI_MAX_RX_COUNT];
};
#endif
/*
accesser of recv_priv: rtw_recv_entry(dispatch / passive level); recv_thread(passive) ; returnpkt(dispatch)
; halt(passive) ;
@ -243,9 +231,6 @@ struct recv_priv
uint rx_largepacket_crcerr;
uint rx_smallpacket_crcerr;
uint rx_middlepacket_crcerr;
#ifdef CONFIG_USB_HCI
//u8 *pallocated_urb_buf;
_sema allrxreturnevt;
uint ff_hwaddr;
u8 rx_pending_cnt;
@ -254,8 +239,6 @@ struct recv_priv
PURB int_in_urb;
u8 *int_in_buf;
#endif //CONFIG_USB_INTERRUPT_IN_PIPE
#endif
struct tasklet_struct irq_prepare_beacon_tasklet;
struct tasklet_struct recv_tasklet;
struct sk_buff_head free_recv_skb_queue;
@ -273,18 +256,6 @@ struct recv_priv
u8 *precv_buf; // 4 alignment
_queue free_recv_buf_queue;
u32 free_recv_buf_queue_cnt;
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
_queue recv_buf_pending_queue;
#endif
#ifdef CONFIG_PCI_HCI
// Rx
struct rtw_rx_ring rx_ring[PCI_MAX_RX_QUEUE];
int rxringcount;
u16 rxbuffersize;
#endif
//For display the phy informatiom
u8 is_signal_dbg; // for debug
u8 signal_strength_dbg; // for debug
@ -349,18 +320,12 @@ struct recv_buf
u8 *pdata;
u8 *ptail;
u8 *pend;
#ifdef CONFIG_USB_HCI
PURB purb;
dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */
u32 alloc_sz;
u8 irp_pending;
int transfer_len;
#endif
_pkt *pskb;
u8 reuse;
};

116
include/rtw_xmit.h
View file

@ -24,23 +24,6 @@
#include <osdep_service.h>
#include <drv_types.h>
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
//#define MAX_XMITBUF_SZ (30720)// (2048)
#ifdef CONFIG_TX_AGGREGATION
#define MAX_XMITBUF_SZ (20480) // 20k
#else
#define MAX_XMITBUF_SZ (12288) //12k 1536*8
#endif
#if defined CONFIG_SDIO_HCI
#define NR_XMITBUFF (16)
#endif
#if defined(CONFIG_GSPI_HCI)
#define NR_XMITBUFF (128)
#endif
#elif defined (CONFIG_USB_HCI)
#ifdef CONFIG_USB_TX_AGGREGATION
#define MAX_XMITBUF_SZ (20480) // 20k
#else
@ -51,16 +34,8 @@
#else
#define NR_XMITBUFF (4)
#endif //CONFIG_SINGLE_XMIT_BUF
#elif defined (CONFIG_PCI_HCI)
#define MAX_XMITBUF_SZ (1664)
#define NR_XMITBUFF (128)
#endif
#ifdef CONFIG_PCI_HCI
#define XMITBUF_ALIGN_SZ 4
#else
#define XMITBUF_ALIGN_SZ 512
#endif
// xmit extension buff defination
#define MAX_XMIT_EXTBUF_SZ (1536)
@ -84,12 +59,6 @@
#define HW_QUEUE_ENTRY 8
#ifdef CONFIG_PCI_HCI
//#define TXDESC_NUM 64
#define TXDESC_NUM 128
#define TXDESC_NUM_BE_QUEUE 128
#endif
#define WEP_IV(pattrib_iv, dot11txpn, keyidx)\
do{\
pattrib_iv[0] = dot11txpn._byte_.TSC0;\
@ -136,23 +105,8 @@ do{\
#define EARLY_MODE_INFO_SIZE 8
#endif
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#define TXDESC_OFFSET TXDESC_SIZE
#endif
#ifdef CONFIG_USB_HCI
#define PACKET_OFFSET_SZ (8)
#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ)
#endif
#ifdef CONFIG_PCI_HCI
#define TXDESC_OFFSET 0
#define TX_DESC_NEXT_DESC_OFFSET 40
#endif
struct tx_desc{
@ -173,19 +127,6 @@ union txdesc {
unsigned int value[TXDESC_SIZE>>2];
};
#ifdef CONFIG_PCI_HCI
#define PCI_MAX_TX_QUEUE_COUNT 8
struct rtw_tx_ring {
struct tx_desc *desc;
dma_addr_t dma;
unsigned int idx;
unsigned int entries;
_queue queue;
u32 qlen;
};
#endif
struct hw_xmit {
//_lock xmit_lock;
//_list pending;
@ -302,71 +243,37 @@ struct xmit_buf
u16 ext_tag; // 0: Normal xmitbuf, 1: extension xmitbuf.
u16 flags;
u32 alloc_sz;
u32 len;
struct submit_ctx *sctx;
#ifdef CONFIG_USB_HCI
//u32 sz[8];
u32 ff_hwaddr;
PURB pxmit_urb[8];
dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */
u8 bpending[8];
sint last[8];
#endif
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
u8 *phead;
u8 *pdata;
u8 *ptail;
u8 *pend;
u32 ff_hwaddr;
u8 pg_num;
u8 agg_num;
#endif
#if defined(DBG_XMIT_BUF )|| defined(DBG_XMIT_BUF_EXT)
u8 no;
#endif
};
struct xmit_frame
{
_list list;
struct pkt_attrib attrib;
_pkt *pkt;
int frame_tag;
_adapter *padapter;
u8 *buf_addr;
struct xmit_buf *pxmitbuf;
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
u8 pg_num;
u8 agg_num;
#endif
#ifdef CONFIG_USB_HCI
#ifdef CONFIG_USB_TX_AGGREGATION
u8 agg_num;
#endif
s8 pkt_offset;
#endif
#ifdef CONFIG_XMIT_ACK
u8 ack_report;
#endif
};
struct tx_servq {
@ -468,8 +375,6 @@ struct xmit_priv {
u8 hwxmit_entry;
u8 wmm_para_seq[4];//sequence for wmm ac parameter strength from large to small. it's value is 0->vo, 1->vi, 2->be, 3->bk.
#ifdef CONFIG_USB_HCI
_sema tx_retevt;//all tx return event;
u8 txirp_cnt;//
struct tasklet_struct xmit_tasklet;
@ -478,23 +383,6 @@ struct xmit_priv {
int bkq_cnt;
int viq_cnt;
int voq_cnt;
#endif
#ifdef CONFIG_PCI_HCI
// Tx
struct rtw_tx_ring tx_ring[PCI_MAX_TX_QUEUE_COUNT];
int txringcount[PCI_MAX_TX_QUEUE_COUNT];
u8 beaconDMAing; //flag of indicating beacon is transmiting to HW by DMA
struct tasklet_struct xmit_tasklet;
#endif
#ifdef CONFIG_SDIO_HCI
#ifdef CONFIG_SDIO_TX_TASKLET
struct tasklet_struct xmit_tasklet;
#endif
#endif
_queue free_xmitbuf_queue;
_queue pending_xmitbuf_queue;
u8 *pallocated_xmitbuf;
@ -509,11 +397,7 @@ struct xmit_priv {
u16 nqos_ssn;
#ifdef CONFIG_TX_EARLY_MODE
#ifdef CONFIG_SDIO_HCI
#define MAX_AGG_PKT_NUM 20
#else
#define MAX_AGG_PKT_NUM 256 //Max tx ampdu coounts
#endif
struct agg_pkt_info agg_pkt[MAX_AGG_PKT_NUM];
#endif

41
os_dep/ioctl_linux.c
View file

@ -31,24 +31,14 @@
#include <rtw_ioctl_set.h>
#include <rtw_ioctl_query.h>
#include <rtw_mp_ioctl.h>
//#ifdef CONFIG_MP_INCLUDED
#include <rtw_mp_ioctl.h>
//#endif
#ifdef CONFIG_USB_HCI
#include <usb_ops.h>
#endif //CONFIG_USB_HCI
#include <rtw_version.h>
#ifdef CONFIG_MP_INCLUDED
#include <rtw_mp.h>
#endif //#ifdef CONFIG_MP_INCLUDED
#include <rtl8188e_hal.h>
#ifdef CONFIG_GSPI_HCI
#include <gspi_ops.h>
#endif
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27))
#define iwe_stream_add_event(a, b, c, d, e) iwe_stream_add_event(b, c, d, e)
@ -6601,9 +6591,7 @@ static int rtw_dbg_port(struct net_device *dev,
DBG_88E("free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d, free_xmit_extbuf_cnt=%d\n",
pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt, pxmitpriv->free_xmit_extbuf_cnt);
#ifdef CONFIG_USB_HCI
DBG_88E("rx_urb_pending_cn=%d\n", precvpriv->rx_pending_cnt);
#endif
}
break;
case 0x09:
@ -9049,16 +9037,7 @@ static int rtw_mp_efuse_set(struct net_device *dev,
}
//mac,00e04c871200
#ifdef CONFIG_USB_HCI
addr = EEPROM_MAC_ADDR_88EU;
#endif
#ifdef CONFIG_SDIO_HCI
addr = EEPROM_MAC_ADDR_88ES;
#endif
#ifdef CONFIG_PCI_HCI
addr = EEPROM_MAC_ADDR_88EE;
#endif
cnts = strlen(tmp[1]);
if (cnts%2)
{
@ -9111,12 +9090,7 @@ static int rtw_mp_efuse_set(struct net_device *dev,
}
// pidvid,da0b7881
#ifdef CONFIG_USB_HCI
addr = EEPROM_VID_88EE;
#endif
#ifdef CONFIG_PCI_HCI
addr = EEPROM_VID_88EE;
#endif
cnts = strlen(tmp[1]);
if (cnts%2)
{
@ -11271,10 +11245,6 @@ static int rtw_widi_set_probe_request(struct net_device *dev,
#include <rtl8188e_hal.h>
extern void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc);
#define cal_txdesc_chksum rtl8188e_cal_txdesc_chksum
#ifdef CONFIG_SDIO_HCI
extern void rtl8188es_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf);
#define fill_default_txdesc rtl8188es_fill_default_txdesc
#endif // CONFIG_SDIO_HCI
static s32 initLoopback(PADAPTER padapter)
{
@ -11486,17 +11456,6 @@ static struct xmit_frame* createloopbackpkt(PADAPTER padapter, u32 size)
desc->txdw5 = cpu_to_le32(desc->txdw5);
desc->txdw6 = cpu_to_le32(desc->txdw6);
desc->txdw7 = cpu_to_le32(desc->txdw7);
#ifdef CONFIG_PCI_HCI
desc->txdw8 = cpu_to_le32(desc->txdw8);
desc->txdw9 = cpu_to_le32(desc->txdw9);
desc->txdw10 = cpu_to_le32(desc->txdw10);
desc->txdw11 = cpu_to_le32(desc->txdw11);
desc->txdw12 = cpu_to_le32(desc->txdw12);
desc->txdw13 = cpu_to_le32(desc->txdw13);
desc->txdw14 = cpu_to_le32(desc->txdw14);
desc->txdw15 = cpu_to_le32(desc->txdw15);
#endif
cal_txdesc_chksum(desc);
//2 5. coalesce

4
os_dep/os_intfs.c
View file

@ -150,11 +150,7 @@ static int rtw_hwpwrp_detect = 1;
static int rtw_hwpwrp_detect = 0; //HW power ping detect 0:disable , 1:enable
#endif
#ifdef CONFIG_USB_HCI
static int rtw_hw_wps_pbc = 1;
#else
static int rtw_hw_wps_pbc = 0;
#endif
#ifdef CONFIG_TX_MCAST2UNI
int rtw_mc2u_disable = 0;

28
os_dep/recv_linux.c
View file

@ -60,8 +60,6 @@ void rtw_os_recv_resource_free(struct recv_priv *precvpriv)
int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf)
{
int res=_SUCCESS;
#ifdef CONFIG_USB_HCI
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
struct usb_device *pusbd = pdvobjpriv->pusbdev;
@ -90,8 +88,6 @@ int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf)
return _FAIL;
#endif //CONFIG_USE_USB_BUFFER_ALLOC_RX
#endif //CONFIG_USB_HCI
return res;
}
@ -100,10 +96,7 @@ int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf)
{
int ret = _SUCCESS;
#ifdef CONFIG_USB_HCI
#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
struct usb_device *pusbd = pdvobjpriv->pusbdev;
@ -114,20 +107,12 @@ int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf)
#endif //CONFIG_USE_USB_BUFFER_ALLOC_RX
if (precvbuf->purb)
{
//usb_kill_urb(precvbuf->purb);
usb_free_urb(precvbuf->purb);
}
#endif //CONFIG_USB_HCI
if (precvbuf->pskb)
dev_kfree_skb_any(precvbuf->pskb);
return ret;
}
void rtw_handle_tkip_mic_err(_adapter *padapter,u8 bgroup)
@ -412,8 +397,6 @@ void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf)
{
struct recv_priv *precvpriv = &padapter->recvpriv;
#ifdef CONFIG_USB_HCI
precvbuf->ref_cnt--;
//free skb in recv_buf
@ -426,16 +409,9 @@ void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf)
{
rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
}
#endif
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
precvbuf->pskb = NULL;
#endif
}
void _rtw_reordering_ctrl_timeout_handler (void *FunctionContext);
void _rtw_reordering_ctrl_timeout_handler (void *FunctionContext)
void _rtw_reordering_ctrl_timeout_handler(void *FunctionContext)
{
struct recv_reorder_ctrl *preorder_ctrl = (struct recv_reorder_ctrl *)FunctionContext;
rtw_reordering_ctrl_timeout_handler(preorder_ctrl);

36
os_dep/xmit_linux.c
View file

@ -125,7 +125,6 @@ void rtw_set_tx_chksum_offload(_pkt *pkt, struct pkt_attrib *pattrib)
int rtw_os_xmit_resource_alloc(_adapter *padapter, struct xmit_buf *pxmitbuf,u32 alloc_sz)
{
#ifdef CONFIG_USB_HCI
int i;
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
struct usb_device *pusbd = pdvobjpriv->pusbdev;
@ -158,23 +157,11 @@ int rtw_os_xmit_resource_alloc(_adapter *padapter, struct xmit_buf *pxmitbuf,u32
}
}
#endif
#if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
pxmitbuf->pallocated_buf = rtw_zmalloc(alloc_sz);
if (pxmitbuf->pallocated_buf == NULL)
{
return _FAIL;
}
pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ);
#endif
return _SUCCESS;
}
void rtw_os_xmit_resource_free(_adapter *padapter, struct xmit_buf *pxmitbuf,u32 free_sz)
{
#ifdef CONFIG_USB_HCI
int i;
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
struct usb_device *pusbd = pdvobjpriv->pusbdev;
@ -197,12 +184,6 @@ void rtw_os_xmit_resource_free(_adapter *padapter, struct xmit_buf *pxmitbuf,u32
if (pxmitbuf->pallocated_buf)
rtw_mfree(pxmitbuf->pallocated_buf, free_sz);
#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX
#endif
#if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
if (pxmitbuf->pallocated_buf)
rtw_mfree(pxmitbuf->pallocated_buf, free_sz);
#endif
}
#define WMM_XMIT_THRESHOLD (NR_XMITFRAME*2/5)
@ -250,20 +231,6 @@ void rtw_os_xmit_schedule(_adapter *padapter)
{
_adapter *pri_adapter = padapter;
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
if (!padapter)
return;
#ifdef CONFIG_CONCURRENT_MODE
if (padapter->adapter_type > PRIMARY_ADAPTER)
pri_adapter = padapter->pbuddy_adapter;
#endif
if (_rtw_queue_empty(&pri_adapter->xmitpriv.pending_xmitbuf_queue) == false)
_rtw_up_sema(&pri_adapter->xmitpriv.xmit_sema);
#else
_irqL irqL;
struct xmit_priv *pxmitpriv;
@ -275,12 +242,9 @@ void rtw_os_xmit_schedule(_adapter *padapter)
_enter_critical_bh(&pxmitpriv->lock, &irqL);
if (rtw_txframes_pending(padapter))
{
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
}
_exit_critical_bh(&pxmitpriv->lock, &irqL);
#endif
}
static void rtw_check_xmit_resource(_adapter *padapter, _pkt *pkt)