mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2025-05-07 05:53:06 +00:00
rtl8188eu: Remove dead code for other than USB
The vendor code has pieces of code for PCI, SDIO, and GSPI. Remove it and CONFIG_USB_HCI. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
c5e461c221
commit
0e4009c999
46 changed files with 78 additions and 1448 deletions
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@ -33,11 +33,7 @@
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#define IQK_BB_REG_NUM 9
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#define HP_THERMAL_NUM 8
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#ifdef CONFIG_PCI_HCI
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#define MAX_AGGR_NUM 0x0B
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#else
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#define MAX_AGGR_NUM 0x07
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#endif // CONFIG_PCI_HCI
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/*--------------------------Define Parameters-------------------------------*/
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@ -223,14 +223,6 @@ struct registry_priv
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#define MAX_CONTINUAL_URB_ERR 4
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#ifdef CONFIG_SDIO_HCI
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#include <drv_types_sdio.h>
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#define INTF_DATA SDIO_DATA
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#elif defined(CONFIG_GSPI_HCI)
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#include <drv_types_gspi.h>
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#define INTF_DATA GSPI_DATA
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#endif
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struct dvobj_priv
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{
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_adapter *if1;
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@ -255,8 +247,6 @@ struct dvobj_priv
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/*-------- below is for USB INTERFACE --------*/
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#ifdef CONFIG_USB_HCI
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u8 nr_endpoint;
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u8 ishighspeed;
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u8 RtNumInPipes;
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@ -280,43 +270,6 @@ struct dvobj_priv
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struct usb_device *pusbdev;
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ATOMIC_T continual_urb_error;
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#endif//CONFIG_USB_HCI
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/*-------- below is for PCIE INTERFACE --------*/
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#ifdef CONFIG_PCI_HCI
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struct pci_dev *ppcidev;
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//PCI MEM map
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unsigned long pci_mem_end; /* shared mem end */
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unsigned long pci_mem_start; /* shared mem start */
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//PCI IO map
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unsigned long pci_base_addr; /* device I/O address */
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//PciBridge
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struct pci_priv pcipriv;
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u16 irqline;
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u8 irq_enabled;
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RT_ISR_CONTENT isr_content;
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_lock irq_th_lock;
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//ASPM
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u8 const_pci_aspm;
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u8 const_amdpci_aspm;
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u8 const_hwsw_rfoff_d3;
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u8 const_support_pciaspm;
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// pci-e bridge */
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u8 const_hostpci_aspm_setting;
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// pci-e device */
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u8 const_devicepci_aspm_setting;
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u8 b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00.
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u8 b_support_backdoor;
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u8 bdma64;
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#endif//CONFIG_PCI_HCI
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};
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static struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
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@ -325,18 +278,7 @@ static struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
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#ifdef RTW_DVOBJ_CHIP_HW_TYPE
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#endif
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#ifdef CONFIG_USB_HCI
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return &dvobj->pusbintf->dev;
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#endif
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#ifdef CONFIG_SDIO_HCI
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return &dvobj->intf_data.func->dev;
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#endif
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#ifdef CONFIG_GSPI_HCI
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return &dvobj->intf_data.func->dev;
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#endif
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#ifdef CONFIG_PCI_HCI
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return &dvobj->ppcidev->dev;
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#endif
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}
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enum _IFACE_TYPE {
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@ -103,7 +103,6 @@ typedef enum _RT_SPINLOCK_TYPE{
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#define STA_INFO_T RT_WLAN_STA
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#define PSTA_INFO_T PRT_WLAN_STA
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// typedef unsigned long u4Byte,*pu4Byte;
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#define CONFIG_HW_ANTENNA_DIVERSITY
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#define CONFIG_SW_ANTENNA_DIVERSITY
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@ -187,15 +186,7 @@ typedef enum _RT_SPINLOCK_TYPE{
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#define s8Byte s64
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#define ps8Byte s64*
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#ifdef CONFIG_USB_HCI
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#define DEV_BUS_TYPE RT_USB_INTERFACE
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#elif defined(CONFIG_PCI_HCI)
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#define DEV_BUS_TYPE RT_PCI_INTERFACE
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#elif defined(CONFIG_SDIO_HCI)
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#define DEV_BUS_TYPE RT_SDIO_INTERFACE
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#elif defined(CONFIG_GSPI_HCI)
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#define DEV_BUS_TYPE RT_SDIO_INTERFACE
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#endif
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#define DEV_BUS_TYPE RT_USB_INTERFACE
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typedef struct timer_list RT_TIMER, *PRT_TIMER;
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typedef void * RT_TIMER_CALL_BACK;
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@ -1,170 +0,0 @@
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __OSDEP_CE_SERVICE_H_
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#define __OSDEP_CE_SERVICE_H_
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#include <ndis.h>
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#include <ntddndis.h>
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#ifdef CONFIG_SDIO_HCI
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#include "SDCardDDK.h"
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#endif
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#ifdef CONFIG_USB_HCI
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#include <usbdi.h>
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#endif
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typedef HANDLE _sema;
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typedef LIST_ENTRY _list;
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typedef NDIS_STATUS _OS_STATUS;
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typedef NDIS_SPIN_LOCK _lock;
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typedef HANDLE _rwlock; //Mutex
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typedef u32 _irqL;
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typedef NDIS_HANDLE _nic_hdl;
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typedef NDIS_MINIPORT_TIMER _timer;
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struct __queue {
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LIST_ENTRY queue;
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_lock lock;
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};
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typedef NDIS_PACKET _pkt;
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typedef NDIS_BUFFER _buffer;
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typedef struct __queue _queue;
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typedef HANDLE _thread_hdl_;
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typedef DWORD thread_return;
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typedef void* thread_context;
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typedef NDIS_WORK_ITEM _workitem;
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#define thread_exit() ExitThread(STATUS_SUCCESS); return 0;
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#define SEMA_UPBND (0x7FFFFFFF) //8192
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__inline static _list *get_prev(_list *list)
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{
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return list->Blink;
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}
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__inline static _list *get_next(_list *list)
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{
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return list->Flink;
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}
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__inline static _list *get_list_head(_queue *queue)
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{
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return (&(queue->queue));
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}
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#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member)
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__inline static void _enter_critical(_lock *plock, _irqL *pirqL)
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{
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NdisAcquireSpinLock(plock);
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}
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__inline static void _exit_critical(_lock *plock, _irqL *pirqL)
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{
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NdisReleaseSpinLock(plock);
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}
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__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL)
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{
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NdisDprAcquireSpinLock(plock);
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}
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__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL)
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{
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NdisDprReleaseSpinLock(plock);
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}
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__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL)
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{
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WaitForSingleObject(*prwlock, INFINITE );
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}
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__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL)
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{
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ReleaseMutex(*prwlock);
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}
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__inline static void rtw_list_delete(_list *plist)
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{
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RemoveEntryList(plist);
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InitializeListHead(plist);
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}
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__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,void * cntx)
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{
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NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx);
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}
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__inline static void _set_timer(_timer *ptimer,u32 delay_time)
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{
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NdisMSetTimer(ptimer,delay_time);
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}
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__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled)
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{
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NdisMCancelTimer(ptimer,bcancelled);
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}
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__inline static void _init_workitem(_workitem *pwork, void *pfunc, void * cntx)
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{
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NdisInitializeWorkItem(pwork, pfunc, cntx);
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}
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__inline static void _set_workitem(_workitem *pwork)
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{
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NdisScheduleWorkItem(pwork);
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}
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#define ATOMIC_INIT(i) { (i) }
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//
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// Global Mutex: can only be used at PASSIVE level.
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//
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#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \
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{ \
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while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\
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{ \
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NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \
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NdisMSleep(10000); \
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} \
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}
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#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \
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{ \
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NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \
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}
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#endif
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@ -47,11 +47,7 @@ A protection mechanism is necessary for the io_rwmem(read/write protocol)
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Under Async. IRP (SDIO/USB)
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The protection mechanism is through the pending queue.
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*/
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_mutex ioctl_mutex;
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#ifdef CONFIG_USB_HCI
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// when in USB, IO is through interrupt in/out endpoints
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struct usb_device *udev;
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PURB piorw_urb;
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@ -61,7 +57,6 @@ The protection mechanism is through the pending queue.
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_timer io_timer;
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u8 bio_irp_timeout;
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u8 bio_timer_cancel;
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#endif
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};
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@ -46,100 +46,33 @@
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#define Rtl8188E_FwWoWImgArrayLength ArrayLength_8188E_FW_WoWLAN
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#endif //CONFIG_WOWLAN
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#ifdef CONFIG_SDIO_HCI
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//TODO: We should define 8188ES firmware related macro settings here!!
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//TODO: The following need to check!!
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#define RTL8188E_FW_UMC_IMG "rtl8188E\\rtl8188efw.bin"
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#define RTL8188E_PHY_REG "rtl8188E\\PHY_REG_1T.txt"
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#define RTL8188E_PHY_RADIO_A "rtl8188E\\radio_a_1T.txt"
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#define RTL8188E_PHY_RADIO_B "rtl8188E\\radio_b_1T.txt"
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#define RTL8188E_AGC_TAB "rtl8188E\\AGC_TAB_1T.txt"
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#define RTL8188E_PHY_MACREG "rtl8188E\\MAC_REG.txt"
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#define RTL8188E_PHY_REG_PG "rtl8188E\\PHY_REG_PG.txt"
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#define RTL8188E_PHY_REG_MP "rtl8188E\\PHY_REG_MP.txt"
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#define RTL8188E_FW_UMC_IMG "rtl8188E\\rtl8188efw.bin"
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#define RTL8188E_PHY_REG "rtl8188E\\PHY_REG_1T.txt"
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#define RTL8188E_PHY_RADIO_A "rtl8188E\\radio_a_1T.txt"
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#define RTL8188E_PHY_RADIO_B "rtl8188E\\radio_b_1T.txt"
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#define RTL8188E_AGC_TAB "rtl8188E\\AGC_TAB_1T.txt"
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#define RTL8188E_PHY_MACREG "rtl8188E\\MAC_REG.txt"
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#define RTL8188E_PHY_REG_PG "rtl8188E\\PHY_REG_PG.txt"
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#define RTL8188E_PHY_REG_MP "rtl8188E\\PHY_REG_MP.txt"
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//---------------------------------------------------------------------
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// RTL8188E From header
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// RTL8188E Power Configuration CMDs for USB/SDIO interfaces
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//---------------------------------------------------------------------
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//---------------------------------------------------------------------
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// RTL8188E Power Configuration CMDs for USB/SDIO interfaces
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//---------------------------------------------------------------------
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#define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow
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#define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow
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#define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow
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#define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow
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#define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow
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#define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow
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#define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow
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#define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow
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#define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow
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#elif defined(CONFIG_USB_HCI)
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#define RTL8188E_FW_UMC_IMG "rtl8188E\\rtl8188efw.bin"
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#define RTL8188E_PHY_REG "rtl8188E\\PHY_REG_1T.txt"
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#define RTL8188E_PHY_RADIO_A "rtl8188E\\radio_a_1T.txt"
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#define RTL8188E_PHY_RADIO_B "rtl8188E\\radio_b_1T.txt"
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#define RTL8188E_AGC_TAB "rtl8188E\\AGC_TAB_1T.txt"
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#define RTL8188E_PHY_MACREG "rtl8188E\\MAC_REG.txt"
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#define RTL8188E_PHY_REG_PG "rtl8188E\\PHY_REG_PG.txt"
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#define RTL8188E_PHY_REG_MP "rtl8188E\\PHY_REG_MP.txt"
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//---------------------------------------------------------------------
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// RTL8188E Power Configuration CMDs for USB/SDIO interfaces
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//---------------------------------------------------------------------
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#define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow
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#define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow
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#define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow
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#define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow
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#define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow
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#define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow
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#define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow
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#define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow
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#define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow
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#elif defined(CONFIG_PCI_HCI)
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#define RTL8188E_FW_UMC_IMG "rtl8188E\\rtl8188efw.bin"
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#define RTL8188E_PHY_REG "rtl8188E\\PHY_REG_1T.txt"
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#define RTL8188E_PHY_RADIO_A "rtl8188E\\radio_a_1T.txt"
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#define RTL8188E_PHY_RADIO_B "rtl8188E\\radio_b_1T.txt"
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#define RTL8188E_AGC_TAB "rtl8188E\\AGC_TAB_1T.txt"
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#define RTL8188E_PHY_MACREG "rtl8188E\\MAC_REG.txt"
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#define RTL8188E_PHY_REG_PG "rtl8188E\\PHY_REG_PG.txt"
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#define RTL8188E_PHY_REG_MP "rtl8188E\\PHY_REG_MP.txt"
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#define Rtl8188E_PHY_REG_Array_PG Rtl8188EEPHY_REG_Array_PG
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#define Rtl8188E_PHY_REG_Array_PGLength Rtl8188EEPHY_REG_Array_PGLength
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#ifndef CONFIG_PHY_SETTING_WITH_ODM
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#if MP_DRIVER == 1
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#define Rtl8188ES_PHY_REG_Array_MP Rtl8188ESPHY_REG_Array_MP
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#endif
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#endif
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//---------------------------------------------------------------------
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// RTL8188E Power Configuration CMDs for USB/SDIO/PCIE interfaces
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//---------------------------------------------------------------------
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#define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow
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#define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow
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#define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow
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#define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow
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#define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow
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#define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow
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#define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow
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#define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow
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#define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow
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#endif //CONFIG_***_HCI
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#define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow
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#define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow
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#define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow
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||||
#define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow
|
||||
#define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow
|
||||
#define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow
|
||||
#define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow
|
||||
#define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow
|
||||
#define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow
|
||||
|
||||
#define DRVINFO_SZ 4 // unit is 8bytes
|
||||
#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0))
|
||||
|
||||
|
||||
#if 1 // download firmware related data structure
|
||||
// download firmware related data structure
|
||||
#define FW_8188E_SIZE 0x4000 //16384,16k
|
||||
#define FW_8188E_START_ADDRESS 0x1000
|
||||
#define FW_8188E_END_ADDRESS 0x1FFF //0x5FFF
|
||||
|
|
@ -205,8 +138,6 @@ typedef struct _RT_8188E_FIRMWARE_HDR
|
|||
u32 Rsvd4;
|
||||
u32 Rsvd5;
|
||||
}RT_8188E_FIRMWARE_HDR, *PRT_8188E_FIRMWARE_HDR;
|
||||
#endif // download firmware related data structure
|
||||
|
||||
|
||||
#define DRIVER_EARLY_INT_TIME 0x05
|
||||
#define BCN_DMA_ATIME_INT_TIME 0x02
|
||||
|
|
@ -542,40 +473,6 @@ typedef struct hal_data_8188e
|
|||
// Auto FSM to Turn On, include clock, isolation, power control for MAC only
|
||||
u8 bMacPwrCtrlOn;
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
//
|
||||
// For SDIO Interface HAL related
|
||||
//
|
||||
|
||||
//
|
||||
// SDIO ISR Related
|
||||
//
|
||||
// u32 IntrMask[1];
|
||||
// u32 IntrMaskToSet[1];
|
||||
// LOG_INTERRUPT InterruptLog;
|
||||
u32 sdio_himr;
|
||||
u32 sdio_hisr;
|
||||
|
||||
//
|
||||
// SDIO Tx FIFO related.
|
||||
//
|
||||
// HIQ, MID, LOW, PUB free pages; padapter->xmitpriv.free_txpg
|
||||
u8 SdioTxFIFOFreePage[SDIO_TX_FREE_PG_QUEUE];
|
||||
_lock SdioTxFIFOFreePageLock;
|
||||
#ifndef CONFIG_SDIO_TX_TASKLET
|
||||
_thread_hdl_ SdioXmitThread;
|
||||
_sema SdioXmitSema;
|
||||
_sema SdioXmitTerminateSema;
|
||||
#endif
|
||||
|
||||
//
|
||||
// SDIO Rx FIFO related.
|
||||
//
|
||||
u8 SdioRxFIFOCnt;
|
||||
u16 SdioRxFIFOSize;
|
||||
#endif //CONFIG_SDIO_HCI
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
u32 UsbBulkOutSize;
|
||||
|
||||
// Interrupt relatd register information.
|
||||
|
|
@ -596,34 +493,6 @@ typedef struct hal_data_8188e
|
|||
u8 UsbRxAggPageCount; // 8192C DMA page count
|
||||
u8 UsbRxAggPageTimeout;
|
||||
#endif
|
||||
#endif //CONFIG_USB_HCI
|
||||
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
|
||||
//
|
||||
// EEPROM setting.
|
||||
//
|
||||
|
||||
u16 EEPROMDID;
|
||||
u16 EEPROMSMID;
|
||||
u16 EEPROMChannelPlan;
|
||||
|
||||
u8 EEPROMTSSI[2];
|
||||
u8 EEPROMBoardType;
|
||||
u32 TransmitConfig;
|
||||
|
||||
u32 IntrMask[2];
|
||||
u32 IntrMaskToSet[2];
|
||||
|
||||
u8 bDefaultAntenna;
|
||||
u8 bIQKInitialized;
|
||||
|
||||
u8 bInterruptMigration;
|
||||
u8 bDisableTxInt;
|
||||
u8 bGpioHwWpsPbc;
|
||||
#endif //CONFIG_PCI_HCI
|
||||
|
||||
|
||||
#ifdef CONFIG_TX_EARLY_MODE
|
||||
u8 bEarlyModeEnable;
|
||||
|
|
@ -643,11 +512,6 @@ typedef struct hal_data_8188e HAL_DATA_TYPE, *PHAL_DATA_TYPE;
|
|||
|
||||
//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) )
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
void InterruptRecognized8188EE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent);
|
||||
void UpdateInterruptMask8188EE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1);
|
||||
#endif //CONFIG_PCI_HCI
|
||||
|
||||
// rtl8188e_hal_init.c
|
||||
#ifdef CONFIG_WOWLAN
|
||||
s32 rtl8188e_FirmwareDownload(PADAPTER padapter, bool bUsedWoWLANFw);
|
||||
|
|
|
|||
|
|
@ -149,27 +149,12 @@ typedef struct rxreport_8188e
|
|||
} RXREPORT, *PRXREPORT;
|
||||
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
s32 rtl8188es_init_recv_priv(PADAPTER padapter);
|
||||
void rtl8188es_free_recv_priv(PADAPTER padapter);
|
||||
void rtl8188es_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#define INTERRUPT_MSG_FORMAT_LEN 60
|
||||
void rtl8188eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf);
|
||||
s32 rtl8188eu_init_recv_priv(PADAPTER padapter);
|
||||
void rtl8188eu_free_recv_priv(PADAPTER padapter);
|
||||
void rtl8188eu_recv_hdl(PADAPTER padapter, struct recv_buf *precvbuf);
|
||||
void rtl8188eu_recv_tasklet(void *priv);
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
s32 rtl8188ee_init_recv_priv(PADAPTER padapter);
|
||||
void rtl8188ee_free_recv_priv(PADAPTER padapter);
|
||||
#endif
|
||||
|
||||
void rtl8188e_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat);
|
||||
void rtl8188e_process_phy_info(PADAPTER padapter, void *prframe);
|
||||
void update_recvframe_phyinfo_88e(union recv_frame *precvframe,struct phy_stat *pphy_status);
|
||||
|
|
|
|||
|
|
@ -747,21 +747,6 @@ Default: 00b.
|
|||
#define HAL_NIC_UNPLUG_ISR 0xFFFFFFFF // The value when the NIC is unplugged for PCI.
|
||||
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
//#define IMR_RX_MASK (IMR_ROK_88E|IMR_RDU_88E|IMR_RXFOVW_88E)
|
||||
#define IMR_TX_MASK (IMR_VODOK_88E|IMR_VIDOK_88E|IMR_BEDOK_88E|IMR_BKDOK_88E|IMR_MGNTDOK_88E|IMR_HIGHDOK_88E|IMR_BCNDERR0_88E)
|
||||
|
||||
#ifdef CONFIG_CONCURRENT_MODE
|
||||
#define RT_IBSS_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E | IMR_BCNDMAINT_E_88E)
|
||||
#else
|
||||
#define RT_IBSS_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E)
|
||||
#endif
|
||||
|
||||
#define RT_AC_INT_MASKS (IMR_VIDOK_88E | IMR_VODOK_88E | IMR_BEDOK_88E|IMR_BKDOK_88E)
|
||||
#define RT_BSS_INT_MASKS (RT_IBSS_INT_MASKS)
|
||||
#endif
|
||||
|
||||
|
||||
// 8192C EFUSE
|
||||
//----------------------------------------------------------------------------
|
||||
#define HWSET_MAX_SIZE 256
|
||||
|
|
|
|||
|
|
@ -255,21 +255,6 @@ struct txrpt_ccx_88e {
|
|||
#define txrpt_ccx_qtime_88e(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8))
|
||||
|
||||
void rtl8188e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull);
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
s32 rtl8188es_init_xmit_priv(PADAPTER padapter);
|
||||
void rtl8188es_free_xmit_priv(PADAPTER padapter);
|
||||
s32 rtl8188es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
|
||||
s32 rtl8188es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
|
||||
thread_return rtl8188es_xmit_thread(thread_context context);
|
||||
s32 rtl8188es_xmit_buf_handler(PADAPTER padapter);
|
||||
#define hal_xmit_handler rtl8188es_xmit_buf_handler
|
||||
|
||||
#ifdef CONFIG_SDIO_TX_TASKLET
|
||||
void rtl8188es_xmit_tasklet(void *priv);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
s32 rtl8188eu_init_xmit_priv(PADAPTER padapter);
|
||||
void rtl8188eu_free_xmit_priv(PADAPTER padapter);
|
||||
s32 rtl8188eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
|
||||
|
|
@ -278,19 +263,6 @@ s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter);
|
|||
#define hal_xmit_handler rtl8188eu_xmit_buf_handler
|
||||
void rtl8188eu_xmit_tasklet(void *priv);
|
||||
s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
s32 rtl8188ee_init_xmit_priv(PADAPTER padapter);
|
||||
void rtl8188ee_free_xmit_priv(PADAPTER padapter);
|
||||
struct xmit_buf *rtl8188ee_dequeue_xmitbuf(struct rtw_tx_ring *ring);
|
||||
void rtl8188ee_xmitframe_resume(_adapter *padapter);
|
||||
s32 rtl8188ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
|
||||
s32 rtl8188ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
|
||||
void rtl8188ee_xmit_tasklet(void *priv);
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#ifdef CONFIG_TX_EARLY_MODE
|
||||
void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf );
|
||||
|
|
|
|||
|
|
@ -103,11 +103,6 @@ struct evt_priv {
|
|||
u8 *evt_buf; //shall be non-paged, and 4 bytes aligned
|
||||
u8 *evt_allocated_buf;
|
||||
u32 evt_done_cnt;
|
||||
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
u8 *c2h_mem;
|
||||
u8 *allocated_c2h_mem;
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
#define init_h2fwcmd_w_parm_no_rsp(pcmd, pparm, code) \
|
||||
|
|
|
|||
|
|
@ -44,11 +44,6 @@
|
|||
#define EUROPE 0x1 //temp, should be provided later
|
||||
#define JAPAN 0x2 //temp, should be provided later
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
#define eeprom_cis0_sz 17
|
||||
#define eeprom_cis1_sz 50
|
||||
#endif
|
||||
|
||||
#define EEPROM_CID_DEFAULT 0x0
|
||||
#define EEPROM_CID_ALPHA 0x1
|
||||
#define EEPROM_CID_Senao 0x3
|
||||
|
|
@ -117,38 +112,20 @@ typedef enum _RT_CUSTOMER_ID
|
|||
RT_CID_819x_ALPHA_WD=41,
|
||||
}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;
|
||||
|
||||
struct eeprom_priv
|
||||
{
|
||||
struct eeprom_priv {
|
||||
u8 bautoload_fail_flag;
|
||||
u8 bloadfile_fail_flag;
|
||||
u8 bloadmac_fail_flag;
|
||||
//u8 bempty;
|
||||
//u8 sys_config;
|
||||
u8 mac_addr[6]; //PermanentAddress
|
||||
//u8 config0;
|
||||
u16 channel_plan;
|
||||
//u8 country_string[3];
|
||||
//u8 tx_power_b[15];
|
||||
//u8 tx_power_g[15];
|
||||
//u8 tx_power_a[201];
|
||||
|
||||
u8 EepromOrEfuse;
|
||||
|
||||
u8 efuse_eeprom_data[HWSET_MAX_SIZE_512]; //92C:256bytes, 88E:512bytes, we use union set (512bytes)
|
||||
|
||||
#ifdef CONFIG_RF_GAIN_OFFSET
|
||||
u8 EEPROMRFGainOffset;
|
||||
#endif //CONFIG_RF_GAIN_OFFSET
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
u8 sdio_setting;
|
||||
u32 ocr;
|
||||
u8 cis0[eeprom_cis0_sz];
|
||||
u8 cis1[eeprom_cis1_sz];
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
extern void eeprom_write16(_adapter *padapter, u16 reg, u16 data);
|
||||
extern u16 eeprom_read16(_adapter *padapter, u16 reg);
|
||||
extern void read_eeprom_content(_adapter *padapter);
|
||||
|
|
|
|||
|
|
@ -36,7 +36,6 @@
|
|||
#include <linux/spinlock.h>
|
||||
#include <asm/atomic.h>
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#include <linux/usb.h>
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
|
||||
#include <linux/usb_ch9.h>
|
||||
|
|
@ -52,9 +51,6 @@
|
|||
#define rtw_usb_buffer_free(dev, size, addr, dma) usb_buffer_free((dev), (size), (addr), (dma))
|
||||
#endif
|
||||
|
||||
|
||||
#endif //CONFIG_USB_HCI
|
||||
|
||||
#define NUM_IOREQ 8
|
||||
|
||||
#define MAX_PROT_SZ (64-16)
|
||||
|
|
|
|||
|
|
@ -119,7 +119,6 @@ typedef struct _LED_871x{
|
|||
|
||||
_timer BlinkTimer; // Timer object for led blinking.
|
||||
|
||||
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
u8 bSWLedCtrl;
|
||||
|
||||
// ALPHA, added by chiyoko, 20090106
|
||||
|
|
@ -131,16 +130,8 @@ typedef struct _LED_871x{
|
|||
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
|
||||
_workitem BlinkWorkItem; // Workitem used by BlinkTimer to manipulate H/W to blink LED.
|
||||
#endif
|
||||
#endif //defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
|
||||
#if defined(CONFIG_PCI_HCI)
|
||||
u8 bLedSlowBlinkInProgress;//added by vivi, for led new mode
|
||||
#endif
|
||||
|
||||
} LED_871x, *PLED_871x;
|
||||
|
||||
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
|
||||
#define IS_LED_WPS_BLINKING(_LED_871x) (((PLED_871x)_LED_871x)->CurrLedState==LED_BLINK_WPS \
|
||||
|| ((PLED_871x)_LED_871x)->CurrLedState==LED_BLINK_WPS_STOP \
|
||||
|| ((PLED_871x)_LED_871x)->bLedWPSBlinkInProgress)
|
||||
|
|
@ -169,29 +160,6 @@ LedControl871x(
|
|||
_adapter *padapter,
|
||||
LED_CTL_MODE LedAction
|
||||
);
|
||||
#endif //defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
|
||||
#if defined(CONFIG_PCI_HCI)
|
||||
//================================================================================
|
||||
// LED customization.
|
||||
//================================================================================
|
||||
|
||||
typedef enum _LED_STRATEGY_871x{
|
||||
SW_LED_MODE0 = 0, // SW control 1 LED via GPIO0. It is default option.
|
||||
SW_LED_MODE1 = 1, // SW control for PCI Express
|
||||
SW_LED_MODE2 = 2, // SW control for Cameo.
|
||||
SW_LED_MODE3 = 3, // SW contorl for RunTop.
|
||||
SW_LED_MODE4 = 4, // SW control for Netcore
|
||||
SW_LED_MODE5 = 5, //added by vivi, for led new mode, DLINK
|
||||
SW_LED_MODE6 = 6, //added by vivi, for led new mode, PRONET
|
||||
SW_LED_MODE7 = 7, //added by chiyokolin, for Lenovo, PCI Express Minicard Spec Rev.1.2 spec
|
||||
SW_LED_MODE8 = 8, //added by chiyokolin, for QMI
|
||||
SW_LED_MODE9 = 9, //added by chiyokolin, for BITLAND, PCI Express Minicard Spec Rev.1.1
|
||||
SW_LED_MODE10 = 10, //added by chiyokolin, for Edimax-ASUS
|
||||
HW_LED = 50, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes)
|
||||
LED_ST_NONE = 99,
|
||||
}LED_STRATEGY_871x, *PLED_STRATEGY_871x;
|
||||
#endif //defined(CONFIG_PCI_HCI)
|
||||
|
||||
struct led_priv{
|
||||
/* add for led controll */
|
||||
|
|
|
|||
|
|
@ -44,20 +44,7 @@
|
|||
#define REASSOC_LIMIT (4)
|
||||
#define READDBA_LIMIT (2)
|
||||
|
||||
#ifdef CONFIG_GSPI_HCI
|
||||
#define ROAMING_LIMIT 5
|
||||
#else
|
||||
#define ROAMING_LIMIT 8
|
||||
#endif
|
||||
//#define IOCMD_REG0 0x10250370
|
||||
//#define IOCMD_REG1 0x10250374
|
||||
//#define IOCMD_REG2 0x10250378
|
||||
|
||||
//#define FW_DYNAMIC_FUN_SWITCH 0x10250364
|
||||
|
||||
//#define WRITE_BB_CMD 0xF0000001
|
||||
//#define SET_CHANNEL_CMD 0xF3000000
|
||||
//#define UPDATE_RA_CMD 0xFD0000A2
|
||||
#define ROAMING_LIMIT 8
|
||||
|
||||
#define DYNAMIC_FUNC_DISABLE (0x0)
|
||||
|
||||
|
|
|
|||
|
|
@ -115,8 +115,6 @@ struct mp_xmit_frame
|
|||
|
||||
_adapter *padapter;
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
|
||||
//insert urb, irp, and irpcnt info below...
|
||||
u8 *mem_addr;
|
||||
u32 sz[8];
|
||||
|
|
@ -126,8 +124,6 @@ struct mp_xmit_frame
|
|||
sint last[8];
|
||||
uint irpcnt;
|
||||
uint fragcnt;
|
||||
#endif /* CONFIG_USB_HCI */
|
||||
|
||||
uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -211,18 +211,6 @@ struct pwrctrl_priv
|
|||
//RF OFF Level
|
||||
u32 cur_ps_level;
|
||||
u32 reg_rfps_level;
|
||||
|
||||
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
//just for PCIE ASPM
|
||||
u8 b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00.
|
||||
u8 b_support_backdoor;
|
||||
|
||||
//just for PCIE ASPM
|
||||
u8 const_amdpci_aspm;
|
||||
#endif
|
||||
|
||||
uint ips_enter_cnts;
|
||||
uint ips_leave_cnts;
|
||||
|
||||
|
|
|
|||
|
|
@ -200,18 +200,6 @@ struct recv_stat {
|
|||
|
||||
#define EOR BIT(30)
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
#define PCI_MAX_RX_QUEUE 1// MSDU packet queue, Rx Command Queue
|
||||
#define PCI_MAX_RX_COUNT 128
|
||||
|
||||
struct rtw_rx_ring {
|
||||
struct recv_stat *desc;
|
||||
dma_addr_t dma;
|
||||
unsigned int idx;
|
||||
struct sk_buff *rx_buf[PCI_MAX_RX_COUNT];
|
||||
};
|
||||
#endif
|
||||
|
||||
/*
|
||||
accesser of recv_priv: rtw_recv_entry(dispatch / passive level); recv_thread(passive) ; returnpkt(dispatch)
|
||||
; halt(passive) ;
|
||||
|
|
@ -243,9 +231,6 @@ struct recv_priv
|
|||
uint rx_largepacket_crcerr;
|
||||
uint rx_smallpacket_crcerr;
|
||||
uint rx_middlepacket_crcerr;
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
//u8 *pallocated_urb_buf;
|
||||
_sema allrxreturnevt;
|
||||
uint ff_hwaddr;
|
||||
u8 rx_pending_cnt;
|
||||
|
|
@ -254,8 +239,6 @@ struct recv_priv
|
|||
PURB int_in_urb;
|
||||
u8 *int_in_buf;
|
||||
#endif //CONFIG_USB_INTERRUPT_IN_PIPE
|
||||
|
||||
#endif
|
||||
struct tasklet_struct irq_prepare_beacon_tasklet;
|
||||
struct tasklet_struct recv_tasklet;
|
||||
struct sk_buff_head free_recv_skb_queue;
|
||||
|
|
@ -273,18 +256,6 @@ struct recv_priv
|
|||
u8 *precv_buf; // 4 alignment
|
||||
_queue free_recv_buf_queue;
|
||||
u32 free_recv_buf_queue_cnt;
|
||||
|
||||
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
_queue recv_buf_pending_queue;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
// Rx
|
||||
struct rtw_rx_ring rx_ring[PCI_MAX_RX_QUEUE];
|
||||
int rxringcount;
|
||||
u16 rxbuffersize;
|
||||
#endif
|
||||
|
||||
//For display the phy informatiom
|
||||
u8 is_signal_dbg; // for debug
|
||||
u8 signal_strength_dbg; // for debug
|
||||
|
|
@ -349,18 +320,12 @@ struct recv_buf
|
|||
u8 *pdata;
|
||||
u8 *ptail;
|
||||
u8 *pend;
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
|
||||
PURB purb;
|
||||
dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */
|
||||
u32 alloc_sz;
|
||||
|
||||
u8 irp_pending;
|
||||
int transfer_len;
|
||||
|
||||
#endif
|
||||
|
||||
_pkt *pskb;
|
||||
u8 reuse;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -24,23 +24,6 @@
|
|||
#include <osdep_service.h>
|
||||
#include <drv_types.h>
|
||||
|
||||
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
//#define MAX_XMITBUF_SZ (30720)// (2048)
|
||||
#ifdef CONFIG_TX_AGGREGATION
|
||||
#define MAX_XMITBUF_SZ (20480) // 20k
|
||||
#else
|
||||
#define MAX_XMITBUF_SZ (12288) //12k 1536*8
|
||||
#endif
|
||||
|
||||
#if defined CONFIG_SDIO_HCI
|
||||
#define NR_XMITBUFF (16)
|
||||
#endif
|
||||
#if defined(CONFIG_GSPI_HCI)
|
||||
#define NR_XMITBUFF (128)
|
||||
#endif
|
||||
|
||||
#elif defined (CONFIG_USB_HCI)
|
||||
|
||||
#ifdef CONFIG_USB_TX_AGGREGATION
|
||||
#define MAX_XMITBUF_SZ (20480) // 20k
|
||||
#else
|
||||
|
|
@ -51,16 +34,8 @@
|
|||
#else
|
||||
#define NR_XMITBUFF (4)
|
||||
#endif //CONFIG_SINGLE_XMIT_BUF
|
||||
#elif defined (CONFIG_PCI_HCI)
|
||||
#define MAX_XMITBUF_SZ (1664)
|
||||
#define NR_XMITBUFF (128)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
#define XMITBUF_ALIGN_SZ 4
|
||||
#else
|
||||
#define XMITBUF_ALIGN_SZ 512
|
||||
#endif
|
||||
|
||||
// xmit extension buff defination
|
||||
#define MAX_XMIT_EXTBUF_SZ (1536)
|
||||
|
|
@ -84,12 +59,6 @@
|
|||
|
||||
#define HW_QUEUE_ENTRY 8
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
//#define TXDESC_NUM 64
|
||||
#define TXDESC_NUM 128
|
||||
#define TXDESC_NUM_BE_QUEUE 128
|
||||
#endif
|
||||
|
||||
#define WEP_IV(pattrib_iv, dot11txpn, keyidx)\
|
||||
do{\
|
||||
pattrib_iv[0] = dot11txpn._byte_.TSC0;\
|
||||
|
|
@ -136,23 +105,8 @@ do{\
|
|||
#define EARLY_MODE_INFO_SIZE 8
|
||||
#endif
|
||||
|
||||
|
||||
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
#define TXDESC_OFFSET TXDESC_SIZE
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#define PACKET_OFFSET_SZ (8)
|
||||
#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
#define TXDESC_OFFSET 0
|
||||
#define TX_DESC_NEXT_DESC_OFFSET 40
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
struct tx_desc{
|
||||
|
||||
|
|
@ -173,19 +127,6 @@ union txdesc {
|
|||
unsigned int value[TXDESC_SIZE>>2];
|
||||
};
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
#define PCI_MAX_TX_QUEUE_COUNT 8
|
||||
|
||||
struct rtw_tx_ring {
|
||||
struct tx_desc *desc;
|
||||
dma_addr_t dma;
|
||||
unsigned int idx;
|
||||
unsigned int entries;
|
||||
_queue queue;
|
||||
u32 qlen;
|
||||
};
|
||||
#endif
|
||||
|
||||
struct hw_xmit {
|
||||
//_lock xmit_lock;
|
||||
//_list pending;
|
||||
|
|
@ -302,71 +243,37 @@ struct xmit_buf
|
|||
u16 ext_tag; // 0: Normal xmitbuf, 1: extension xmitbuf.
|
||||
u16 flags;
|
||||
u32 alloc_sz;
|
||||
|
||||
u32 len;
|
||||
|
||||
struct submit_ctx *sctx;
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
|
||||
//u32 sz[8];
|
||||
u32 ff_hwaddr;
|
||||
|
||||
PURB pxmit_urb[8];
|
||||
dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */
|
||||
u8 bpending[8];
|
||||
sint last[8];
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
u8 *phead;
|
||||
u8 *pdata;
|
||||
u8 *ptail;
|
||||
u8 *pend;
|
||||
u32 ff_hwaddr;
|
||||
u8 pg_num;
|
||||
u8 agg_num;
|
||||
#endif
|
||||
|
||||
#if defined(DBG_XMIT_BUF )|| defined(DBG_XMIT_BUF_EXT)
|
||||
u8 no;
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
struct xmit_frame
|
||||
{
|
||||
_list list;
|
||||
|
||||
struct pkt_attrib attrib;
|
||||
|
||||
_pkt *pkt;
|
||||
|
||||
int frame_tag;
|
||||
|
||||
_adapter *padapter;
|
||||
|
||||
u8 *buf_addr;
|
||||
|
||||
struct xmit_buf *pxmitbuf;
|
||||
|
||||
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
u8 pg_num;
|
||||
u8 agg_num;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#ifdef CONFIG_USB_TX_AGGREGATION
|
||||
u8 agg_num;
|
||||
#endif
|
||||
s8 pkt_offset;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_XMIT_ACK
|
||||
u8 ack_report;
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
struct tx_servq {
|
||||
|
|
@ -468,8 +375,6 @@ struct xmit_priv {
|
|||
u8 hwxmit_entry;
|
||||
|
||||
u8 wmm_para_seq[4];//sequence for wmm ac parameter strength from large to small. it's value is 0->vo, 1->vi, 2->be, 3->bk.
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
_sema tx_retevt;//all tx return event;
|
||||
u8 txirp_cnt;//
|
||||
struct tasklet_struct xmit_tasklet;
|
||||
|
|
@ -478,23 +383,6 @@ struct xmit_priv {
|
|||
int bkq_cnt;
|
||||
int viq_cnt;
|
||||
int voq_cnt;
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
// Tx
|
||||
struct rtw_tx_ring tx_ring[PCI_MAX_TX_QUEUE_COUNT];
|
||||
int txringcount[PCI_MAX_TX_QUEUE_COUNT];
|
||||
u8 beaconDMAing; //flag of indicating beacon is transmiting to HW by DMA
|
||||
struct tasklet_struct xmit_tasklet;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
#ifdef CONFIG_SDIO_TX_TASKLET
|
||||
struct tasklet_struct xmit_tasklet;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
_queue free_xmitbuf_queue;
|
||||
_queue pending_xmitbuf_queue;
|
||||
u8 *pallocated_xmitbuf;
|
||||
|
|
@ -509,11 +397,7 @@ struct xmit_priv {
|
|||
u16 nqos_ssn;
|
||||
#ifdef CONFIG_TX_EARLY_MODE
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
#define MAX_AGG_PKT_NUM 20
|
||||
#else
|
||||
#define MAX_AGG_PKT_NUM 256 //Max tx ampdu coounts
|
||||
#endif
|
||||
|
||||
struct agg_pkt_info agg_pkt[MAX_AGG_PKT_NUM];
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue