From 0fcf3c2f5e043652c23bd6f6532a60ee7e2471b7 Mon Sep 17 00:00:00 2001 From: Larry Finger Date: Sat, 3 Nov 2018 13:38:59 -0500 Subject: [PATCH] rtl8188eu: Remove dead code for devices other than RTL8188EU This commit handles files in hal/. Signed-off-by: Larry Finger --- hal/efuse_mask.h | 104 --- hal/hal_btcoex.c | 34 - hal/hal_com.c | 332 +-------- hal/hal_com_phycfg.c | 165 ---- hal/hal_intf.c | 15 - hal/hal_mp.c | 1074 +-------------------------- hal/phydm/halphyrf_ap.c | 4 - hal/phydm/phydm_powertracking_ap.c | 55 -- hal/phydm/phydm_powertracking_win.c | 27 - 9 files changed, 9 insertions(+), 1801 deletions(-) diff --git a/hal/efuse_mask.h b/hal/efuse_mask.h index b3fd83b..0669c2e 100644 --- a/hal/efuse_mask.h +++ b/hal/efuse_mask.h @@ -1,106 +1,2 @@ -#if DEV_BUS_TYPE == RT_USB_INTERFACE - -#if defined(CONFIG_RTL8188E) #include "HalEfuseMask8188E_USB.h" -#endif - -#if defined(CONFIG_RTL8812A) - #include "HalEfuseMask8812A_USB.h" -#endif - -#if defined(CONFIG_RTL8821A) - #include "HalEfuseMask8821A_USB.h" -#endif - -#if defined(CONFIG_RTL8192E) - #include "HalEfuseMask8192E_USB.h" -#endif - -#if defined(CONFIG_RTL8723B) - #include "HalEfuseMask8723B_USB.h" -#endif - -#if defined(CONFIG_RTL8814A) - #include "HalEfuseMask8814A_USB.h" -#endif - -#if defined(CONFIG_RTL8703B) - #include "HalEfuseMask8703B_USB.h" -#endif - -#if defined(CONFIG_RTL8723D) - #include "HalEfuseMask8723D_USB.h" -#endif - -#if defined(CONFIG_RTL8188F) - #include "HalEfuseMask8188F_USB.h" -#endif - -#if defined(CONFIG_RTL8822B) - #include "HalEfuseMask8822B_USB.h" -#endif - -#elif DEV_BUS_TYPE == RT_PCI_INTERFACE - -#if defined(CONFIG_RTL8188E) - #include "HalEfuseMask8188E_PCIE.h" -#endif - -#if defined(CONFIG_RTL8812A) - #include "HalEfuseMask8812A_PCIE.h" -#endif - -#if defined(CONFIG_RTL8821A) - #include "HalEfuseMask8821A_PCIE.h" -#endif - -#if defined(CONFIG_RTL8192E) - #include "HalEfuseMask8192E_PCIE.h" -#endif - -#if defined(CONFIG_RTL8723B) - #include "HalEfuseMask8723B_PCIE.h" -#endif - -#if defined(CONFIG_RTL8814A) - #include "HalEfuseMask8814A_PCIE.h" -#endif - -#if defined(CONFIG_RTL8703B) - #include "HalEfuseMask8703B_PCIE.h" -#endif - -#if defined(CONFIG_RTL8822B) - #include "HalEfuseMask8822B_PCIE.h" -#endif -#if defined(CONFIG_RTL8723D) - #include "HalEfuseMask8723D_PCIE.h" -#endif - -#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE - -#if defined(CONFIG_RTL8188E) - #include "HalEfuseMask8188E_SDIO.h" -#endif - -#if defined(CONFIG_RTL8703B) - #include "HalEfuseMask8703B_SDIO.h" -#endif - -#if defined(CONFIG_RTL8188F) - #include "HalEfuseMask8188F_SDIO.h" -#endif - -#if defined(CONFIG_RTL8723D) - #include "HalEfuseMask8723D_SDIO.h" -#endif - -#if defined(CONFIG_RTL8821C) - #include "HalEfuseMask8821C_SDIO.h" -#endif - -#if defined(CONFIG_RTL8822B) - #include "HalEfuseMask8822B_SDIO.h" -#endif -#endif diff --git a/hal/hal_btcoex.c b/hal/hal_btcoex.c index 492f73f..5a4c42e 100644 --- a/hal/hal_btcoex.c +++ b/hal/hal_btcoex.c @@ -2137,38 +2137,6 @@ u32 halbtcoutsrc_GetPhydmVersion(void *pBtcContext) { struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext; PADAPTER Adapter = pBtCoexist->Adapter; - -#ifdef CONFIG_RTL8192E - return RELEASE_VERSION_8192E; -#endif - -#ifdef CONFIG_RTL8821A - return RELEASE_VERSION_8821A; -#endif - -#ifdef CONFIG_RTL8723B - return RELEASE_VERSION_8723B; -#endif - -#ifdef CONFIG_RTL8812A - return RELEASE_VERSION_8812A; -#endif - -#ifdef CONFIG_RTL8703B - return RELEASE_VERSION_8703B; -#endif - -#ifdef CONFIG_RTL8822B - return RELEASE_VERSION_8822B; -#endif - -#ifdef CONFIG_RTL8723D - return RELEASE_VERSION_8723D; -#endif - -#ifdef CONFIG_RTL8821C - return RELEASE_VERSION_8821C; -#endif } void halbtcoutsrc_phydm_modify_RA_PCR_threshold(void *pBtcContext, u8 RA_offset_direction, u8 RA_threshold_offset) @@ -2176,9 +2144,7 @@ void halbtcoutsrc_phydm_modify_RA_PCR_threshold(void *pBtcContext, u8 RA_offset_ struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext; /* switch to #if 0 in case the phydm version does not provide the function */ -#if 1 phydm_modify_RA_PCR_threshold(pBtCoexist->odm_priv, RA_offset_direction, RA_threshold_offset); -#endif } u32 halbtcoutsrc_phydm_query_PHY_counter(void *pBtcContext, u8 info_type) diff --git a/hal/hal_com.c b/hal/hal_com.c index 3308734..14d097f 100644 --- a/hal/hal_com.c +++ b/hal/hal_com.c @@ -2539,22 +2539,12 @@ void rtw_hal_set_macaddr_port(_adapter *adapter, u8 *val) case HW_PORT1: reg_macid = REG_MACID1; break; -#if defined(CONFIG_RTL8814A) - case HW_PORT2: - reg_macid = REG_MACID2; - break; - case HW_PORT3: - reg_macid = REG_MACID3; - break; - case HW_PORT4: - reg_macid = REG_MACID4; - break; -#endif/*defined(CONFIG_RTL8814A)*/ } for (idx = 0; idx < 6; idx++) rtw_write8(GET_PRIMARY_ADAPTER(adapter), (reg_macid + idx), val[idx]); } + void rtw_hal_get_macaddr_port(_adapter *adapter, u8 *mac_addr) { u8 idx = 0; @@ -2572,17 +2562,6 @@ void rtw_hal_get_macaddr_port(_adapter *adapter, u8 *mac_addr) case HW_PORT1: reg_macid = REG_MACID1; break; -#if defined(CONFIG_RTL8814A) - case HW_PORT2: - reg_macid = REG_MACID2; - break; - case HW_PORT3: - reg_macid = REG_MACID3; - break; - case HW_PORT4: - reg_macid = REG_MACID4; - break; -#endif /*defined(CONFIG_RTL8814A)*/ } for (idx = 0; idx < 6; idx++) @@ -2605,17 +2584,6 @@ void rtw_hal_set_bssid(_adapter *adapter, u8 *val) case HW_PORT1: reg_bssid = REG_BSSID1; break; -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) - case HW_PORT2: - reg_bssid = REG_BSSID2; - break; - case HW_PORT3: - reg_bssid = REG_BSSID3; - break; - case HW_PORT4: - reg_bssid = REG_BSSID4; - break; -#endif/*defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)*/ } for (idx = 0 ; idx < 6; idx++) @@ -2635,20 +2603,6 @@ static void rtw_hal_get_msr(_adapter *adapter, u8 *net_type) /*REG_CR - BIT[19:18]-Network Type for port 1*/ *net_type = (rtw_read8(adapter, MSR) & 0x0C) >> 2; break; -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) - case HW_PORT2: - /*REG_CR_EXT- BIT[1:0]-Network Type for port 2*/ - *net_type = rtw_read8(adapter, MSR1) & 0x03; - break; - case HW_PORT3: - /*REG_CR_EXT- BIT[3:2]-Network Type for port 3*/ - *net_type = (rtw_read8(adapter, MSR1) & 0x0C) >> 2; - break; - case HW_PORT4: - /*REG_CR_EXT- BIT[5:4]-Network Type for port 4*/ - *net_type = (rtw_read8(adapter, MSR1) & 0x30) >> 4; - break; -#endif /*#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)*/ default: RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n", ADPT_ARG(adapter), adapter->hw_port); @@ -2680,26 +2634,6 @@ void rtw_hal_set_msr(_adapter *adapter, u8 net_type) val8 |= net_type << 2; rtw_write8(adapter, MSR, val8); break; -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) - case HW_PORT2: - /*REG_CR_EXT- BIT[1:0]-Network Type for port 2*/ - val8 = rtw_read8(adapter, MSR1) & 0xFC; - val8 |= net_type; - rtw_write8(adapter, MSR1, val8); - break; - case HW_PORT3: - /*REG_CR_EXT- BIT[3:2]-Network Type for port 3*/ - val8 = rtw_read8(adapter, MSR1) & 0xF3; - val8 |= net_type << 2; - rtw_write8(adapter, MSR1, val8); - break; - case HW_PORT4: - /*REG_CR_EXT- BIT[5:4]-Network Type for port 4*/ - val8 = rtw_read8(adapter, MSR1) & 0xCF; - val8 |= net_type << 4; - rtw_write8(adapter, MSR1, val8); - break; -#endif /* CONFIG_RTL8814A | CONFIG_RTL8822B */ default: RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n", ADPT_ARG(adapter), adapter->hw_port); @@ -3035,8 +2969,6 @@ s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miraca #ifdef CONFIG_DFS_MASTER post_action: #endif - -#if defined(CONFIG_RTL8188E) if (rtw_get_chip_type(adapter) == RTL8188E) { HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); @@ -3056,17 +2988,6 @@ post_action: } #endif } -#endif - -#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) - /* TODO: this should move to IOT issue area */ - if (rtw_get_chip_type(adapter) == RTL8812 - || rtw_get_chip_type(adapter) == RTL8821 - ) { - if (MLME_IS_STA(adapter)) - Hal_PatchwithJaguar_8812(adapter, opmode); - } -#endif SET_H2CCMD_MSRRPT_PARM_MACID_IND(parm, 0); if (macid_ind == 0) @@ -3346,7 +3267,6 @@ static void rtw_hal_force_enable_rxdma(_adapter *adapter) rtw_write32(adapter, REG_RXPKT_NUM, (rtw_read32(adapter, REG_RXPKT_NUM) & (~RW_RELEASE_EN))); } -#if defined(CONFIG_RTL8188E) static void rtw_hal_disable_tx_report(_adapter *adapter) { rtw_write8(adapter, REG_TX_RPT_CTRL, @@ -3360,7 +3280,7 @@ static void rtw_hal_enable_tx_report(_adapter *adapter) ((rtw_read8(adapter, REG_TX_RPT_CTRL) | BIT(1))) | BIT(5)); RTW_INFO("enable TX_RPT:0x%02x\n", rtw_read8(adapter, REG_TX_RPT_CTRL)); } -#endif + static void rtw_hal_release_rx_dma(_adapter *adapter) { u32 val32 = 0; @@ -4282,10 +4202,8 @@ static void rtw_hal_ap_wow_enable(_adapter *padapter) issue_beacon(padapter, 0); rtw_msleep_os(2); - #if defined(CONFIG_RTL8188E) if (IS_HARDWARE_TYPE_8188E(padapter)) rtw_hal_disable_tx_report(padapter); - #endif /* RX DMA stop */ res = rtw_hal_pause_rx_dma(padapter); if (res == _FAIL) @@ -4343,10 +4261,8 @@ static void rtw_hal_ap_wow_disable(_adapter *padapter) } #endif /*DBG_CHECK_FW_PS_STATE*/ - #if defined(CONFIG_RTL8188E) if (IS_HARDWARE_TYPE_8188E(padapter)) rtw_hal_enable_tx_report(padapter); - #endif rtw_hal_force_enable_rxdma(padapter); @@ -7660,10 +7576,8 @@ static void rtw_hal_wow_enable(_adapter *adapter) rtw_hal_backup_rate(adapter); /* RX DMA stop */ - #if defined(CONFIG_RTL8188E) if (IS_HARDWARE_TYPE_8188E(adapter)) rtw_hal_disable_tx_report(adapter); - #endif res = rtw_hal_pause_rx_dma(adapter); if (res == _FAIL) @@ -7845,10 +7759,8 @@ static void rtw_hal_wow_disable(_adapter *adapter) #endif rtw_hal_release_rx_dma(adapter); - #if defined(CONFIG_RTL8188E) if (IS_HARDWARE_TYPE_8188E(adapter)) rtw_hal_enable_tx_report(adapter); - #endif #ifdef CONFIG_GTK_OL if (((pwrctl->wowlan_wake_reason != RX_DISASSOC) || @@ -8499,7 +8411,7 @@ static void rtw_hal_set_hw_update_tsf(PADAPTER padapter) struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -#if defined(CONFIG_RTL8822B) || defined(CONFIG_MI_WITH_MBSSID_CAM) +#if defined(CONFIG_MI_WITH_MBSSID_CAM) RTW_INFO("[Warn] %s "ADPT_FMT" enter func\n", __func__, ADPT_ARG(padapter)); rtw_warn_on(1); return; @@ -9726,36 +9638,6 @@ int hal_efuse_macaddr_offset(_adapter *adapter) interface_type = rtw_get_intf_type(adapter); switch (rtw_get_chip_type(adapter)) { -#ifdef CONFIG_RTL8723B - case RTL8723B: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8723BU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8723BS; - else if (interface_type == RTW_PCIE) - addr_offset = EEPROM_MAC_ADDR_8723BE; - break; -#endif -#ifdef CONFIG_RTL8703B - case RTL8703B: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8703BU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8703BS; - break; -#endif -#ifdef CONFIG_RTL8723D - case RTL8723D: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8723DU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8723DS; - else if (interface_type == RTW_PCIE) - addr_offset = EEPROM_MAC_ADDR_8723DE; - break; -#endif - -#ifdef CONFIG_RTL8188E case RTL8188E: if (interface_type == RTW_USB) addr_offset = EEPROM_MAC_ADDR_88EU; @@ -9764,73 +9646,6 @@ int hal_efuse_macaddr_offset(_adapter *adapter) else if (interface_type == RTW_PCIE) addr_offset = EEPROM_MAC_ADDR_88EE; break; -#endif -#ifdef CONFIG_RTL8188F - case RTL8188F: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8188FU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8188FS; - break; -#endif -#ifdef CONFIG_RTL8812A - case RTL8812: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8812AU; - else if (interface_type == RTW_PCIE) - addr_offset = EEPROM_MAC_ADDR_8812AE; - break; -#endif -#ifdef CONFIG_RTL8821A - case RTL8821: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8821AU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8821AS; - else if (interface_type == RTW_PCIE) - addr_offset = EEPROM_MAC_ADDR_8821AE; - break; -#endif -#ifdef CONFIG_RTL8192E - case RTL8192E: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8192EU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8192ES; - else if (interface_type == RTW_PCIE) - addr_offset = EEPROM_MAC_ADDR_8192EE; - break; -#endif -#ifdef CONFIG_RTL8814A - case RTL8814A: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8814AU; - else if (interface_type == RTW_PCIE) - addr_offset = EEPROM_MAC_ADDR_8814AE; - break; -#endif - -#ifdef CONFIG_RTL8822B - case RTL8822B: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8822BU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8822BS; - else if (interface_type == RTW_PCIE) - addr_offset = EEPROM_MAC_ADDR_8822BE; - break; -#endif /* CONFIG_RTL8822B */ - -#ifdef CONFIG_RTL8821C - case RTL8821C: - if (interface_type == RTW_USB) - addr_offset = EEPROM_MAC_ADDR_8821CU; - else if (interface_type == RTW_SDIO) - addr_offset = EEPROM_MAC_ADDR_8821CS; - else if (interface_type == RTW_PCIE) - addr_offset = EEPROM_MAC_ADDR_8821CE; - break; -#endif /* CONFIG_RTL8821C */ } if (addr_offset == -1) { @@ -10009,46 +9824,6 @@ void rtw_bb_rf_gain_offset(_adapter *padapter) return; } -#if defined(CONFIG_RTL8723B) - if (value & BIT4 || (registry_par->RegPwrTrimEnable == 1)) { - RTW_INFO("Offset RF Gain.\n"); - RTW_INFO("Offset RF Gain. pHalData->EEPROMRFGainVal=0x%x\n", pHalData->EEPROMRFGainVal); - - if (pHalData->EEPROMRFGainVal != 0xff) { - - if (pHalData->ant_path == ODM_RF_PATH_A) - GainValue = (pHalData->EEPROMRFGainVal & 0x0f); - - else - GainValue = (pHalData->EEPROMRFGainVal & 0xf0) >> 4; - RTW_INFO("Ant PATH_%d GainValue Offset = 0x%x\n", (pHalData->ant_path == ODM_RF_PATH_A) ? (ODM_RF_PATH_A) : (ODM_RF_PATH_B), GainValue); - - for (i = 0; i < ArrayLen; i += 2) { - /* RTW_INFO("ArrayLen in =%d ,Array 1 =0x%x ,Array2 =0x%x\n",i,Array[i],Array[i]+1); */ - v1 = Array[i]; - v2 = Array[i + 1]; - if (v1 == GainValue) { - RTW_INFO("Offset RF Gain. got v1 =0x%x ,v2 =0x%x\n", v1, v2); - target = v2; - break; - } - } - RTW_INFO("pHalData->EEPROMRFGainVal=0x%x ,Gain offset Target Value=0x%x\n", pHalData->EEPROMRFGainVal, target); - - res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff); - RTW_INFO("Offset RF Gain. before reg 0x7f=0x%08x\n", res); - phy_set_rf_reg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18 | BIT17 | BIT16 | BIT15, target); - res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff); - - RTW_INFO("Offset RF Gain. After reg 0x7f=0x%08x\n", res); - - } else - - RTW_INFO("Offset RF Gain. pHalData->EEPROMRFGainVal=0x%x != 0xff, didn't run Kfree\n", pHalData->EEPROMRFGainVal); - } else - RTW_INFO("Using the default RF gain.\n"); - -#elif defined(CONFIG_RTL8188E) if (value & BIT4 || (registry_par->RegPwrTrimEnable == 1)) { RTW_INFO("8188ES Offset RF Gain.\n"); RTW_INFO("8188ES Offset RF Gain. EEPROMRFGainVal=0x%x\n", @@ -10073,12 +9848,6 @@ void rtw_bb_rf_gain_offset(_adapter *padapter) } } else RTW_INFO("Using the default RF gain.\n"); -#else - /* TODO: call this when channel switch */ - if (kfree_data->flag & KFREE_FLAG_ON) - rtw_rf_apply_tx_gain_offset(padapter, 6); /* input ch6 to select BB_GAIN_2G */ -#endif - } #endif /*CONFIG_RF_POWER_TRIM */ @@ -10808,15 +10577,11 @@ u8 rtw_get_current_tx_sgi(_adapter *padapter, u8 macid) struct _rate_adaptive_table_ *pRA_Table = &pDM_Odm->dm_ra_table; u8 curr_tx_sgi = 0; -#if defined(CONFIG_RTL8188E) curr_tx_sgi = odm_ra_get_decision_rate_8188e(pDM_Odm, macid); -#else - curr_tx_sgi = ((pRA_Table->link_tx_rate[macid]) & 0x80) >> 7; -#endif return curr_tx_sgi; - } + u8 rtw_get_current_tx_rate(_adapter *padapter, u8 macid) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); @@ -10895,47 +10660,11 @@ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap) crystal_cap = crystal_cap & 0x3F; switch (rtw_get_chip_type(adapter)) { -#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F) case RTL8188E: case RTL8188F: /* write 0x24[16:11] = 0x24[22:17] = CrystalCap */ phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x007FF800, (crystal_cap | (crystal_cap << 6))); break; -#endif -#if defined(CONFIG_RTL8812A) - case RTL8812: - /* write 0x2C[30:25] = 0x2C[24:19] = CrystalCap */ - phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x7FF80000, (crystal_cap | (crystal_cap << 6))); - break; -#endif -#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || \ - defined(CONFIG_RTL8723D) || defined(CONFIG_RTL8821A) || \ - defined(CONFIG_RTL8192E) - case RTL8723B: - case RTL8703B: - case RTL8723D: - case RTL8821: - case RTL8192E: - /* write 0x2C[23:18] = 0x2C[17:12] = CrystalCap */ - phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x00FFF000, (crystal_cap | (crystal_cap << 6))); - break; -#endif -#if defined(CONFIG_RTL8814A) - case RTL8814A: - /* write 0x2C[26:21] = 0x2C[20:15] = CrystalCap*/ - phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x07FF8000, (crystal_cap | (crystal_cap << 6))); - break; -#endif -#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) - - case RTL8822B: - case RTL8821C: - /* write 0x28[6:1] = 0x24[30:25] = CrystalCap */ - crystal_cap = crystal_cap & 0x3F; - phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x7E000000, crystal_cap); - phy_set_bb_reg(adapter, REG_AFE_PLL_CTRL, 0x7E, crystal_cap); - break; -#endif default: rtw_warn_on(1); } @@ -10949,68 +10678,15 @@ int hal_spec_init(_adapter *adapter) interface_type = rtw_get_intf_type(adapter); switch (rtw_get_chip_type(adapter)) { -#ifdef CONFIG_RTL8723B - case RTL8723B: - init_hal_spec_8723b(adapter); - break; -#endif -#ifdef CONFIG_RTL8703B - case RTL8703B: - init_hal_spec_8703b(adapter); - break; -#endif -#ifdef CONFIG_RTL8723D - case RTL8723D: - init_hal_spec_8723d(adapter); - break; -#endif -#ifdef CONFIG_RTL8188E case RTL8188E: init_hal_spec_8188e(adapter); break; -#endif -#ifdef CONFIG_RTL8188F - case RTL8188F: - init_hal_spec_8188f(adapter); - break; -#endif -#ifdef CONFIG_RTL8812A - case RTL8812: - init_hal_spec_8812a(adapter); - break; -#endif -#ifdef CONFIG_RTL8821A - case RTL8821: - init_hal_spec_8821a(adapter); - break; -#endif -#ifdef CONFIG_RTL8192E - case RTL8192E: - init_hal_spec_8192e(adapter); - break; -#endif -#ifdef CONFIG_RTL8814A - case RTL8814A: - init_hal_spec_8814a(adapter); - break; -#endif -#ifdef CONFIG_RTL8822B - case RTL8822B: - rtl8822b_init_hal_spec(adapter); - break; -#endif -#ifdef CONFIG_RTL8821C - case RTL8821C: - init_hal_spec_rtl8821c(adapter); - break; -#endif default: RTW_ERR("%s: unknown chip_type:%u\n" , __func__, rtw_get_chip_type(adapter)); ret = _FAIL; break; } - return ret; } diff --git a/hal/hal_com_phycfg.c b/hal/hal_com_phycfg.c index 0e12ad4..eb951a0 100644 --- a/hal/hal_com_phycfg.c +++ b/hal/hal_com_phycfg.c @@ -241,124 +241,11 @@ static const struct map_t pg_txpwr_def_info = 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE) ); -#ifdef CONFIG_RTL8188E static const struct map_t rtl8188e_pg_txpwr_def_info = MAP_ENT(0xB8, 1, 0xFF , MAPSEG_ARRAY_ENT(0x10, 12, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24) ); -#endif - -#ifdef CONFIG_RTL8188F -static const struct map_t rtl8188f_pg_txpwr_def_info = - MAP_ENT(0xB8, 1, 0xFF - , MAPSEG_ARRAY_ENT(0x10, 12, - 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x27, 0x27, 0x27, 0x27, 0x27, 0x24) - ); -#endif - -#ifdef CONFIG_RTL8723B -static const struct map_t rtl8723b_pg_txpwr_def_info = - MAP_ENT(0xB8, 2, 0xFF - , MAPSEG_ARRAY_ENT(0x10, 12, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0xE0) - , MAPSEG_ARRAY_ENT(0x3A, 12, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0xE0) - ); -#endif - -#ifdef CONFIG_RTL8703B -static const struct map_t rtl8703b_pg_txpwr_def_info = - MAP_ENT(0xB8, 1, 0xFF - , MAPSEG_ARRAY_ENT(0x10, 12, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02) - ); -#endif - -#ifdef CONFIG_RTL8723D -static const struct map_t rtl8723d_pg_txpwr_def_info = - MAP_ENT(0xB8, 2, 0xFF - , MAPSEG_ARRAY_ENT(0x10, 12, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02) - , MAPSEG_ARRAY_ENT(0x3A, 12, - 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x02) - ); -#endif - -#ifdef CONFIG_RTL8192E -static const struct map_t rtl8192e_pg_txpwr_def_info = - MAP_ENT(0xB8, 2, 0xFF - , MAPSEG_ARRAY_ENT(0x10, 14, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE) - , MAPSEG_ARRAY_ENT(0x3A, 14, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE) - ); -#endif - -#ifdef CONFIG_RTL8821A -static const struct map_t rtl8821a_pg_txpwr_def_info = - MAP_ENT(0xB8, 1, 0xFF - , MAPSEG_ARRAY_ENT(0x10, 39, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, - 0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00) - ); -#endif - -#ifdef CONFIG_RTL8821C -static const struct map_t rtl8821c_pg_txpwr_def_info = - MAP_ENT(0xB8, 1, 0xFF - , MAPSEG_ARRAY_ENT(0x10, 54, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, - 0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEC, 0xFF, 0xFF, 0xFF, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02) - ); -#endif - -#ifdef CONFIG_RTL8812A -static const struct map_t rtl8812a_pg_txpwr_def_info = - MAP_ENT(0xB8, 1, 0xFF - , MAPSEG_ARRAY_ENT(0x10, 82, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF, - 0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, - 0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF, 0x00, 0xEE, 0xFF, 0xFF, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF, 0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, - 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF, - 0x00, 0xEE) - ); -#endif - -#ifdef CONFIG_RTL8822B -static const struct map_t rtl8822b_pg_txpwr_def_info = - MAP_ENT(0xB8, 1, 0xFF - , MAPSEG_ARRAY_ENT(0x10, 82, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF, - 0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, - 0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF, 0xEC, 0xEC, 0xFF, 0xFF, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF, 0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, - 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF, - 0xEC, 0xEC) - ); -#endif - -#ifdef CONFIG_RTL8814A -static const struct map_t rtl8814a_pg_txpwr_def_info = - MAP_ENT(0xB8, 1, 0xFF - , MAPSEG_ARRAY_ENT(0x10, 168, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, - 0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, - 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x00, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A, - 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, - 0x00, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, - 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, - 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x00, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D, - 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, - 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, - 0xEE, 0xEE, 0xEE, 0xEE, 0x00, 0xEE, 0xEE, 0xEE) - ); -#endif const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter) { @@ -368,61 +255,9 @@ const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter) interface_type = rtw_get_intf_type(adapter); switch (rtw_get_chip_type(adapter)) { -#ifdef CONFIG_RTL8723B - case RTL8723B: - map = &rtl8723b_pg_txpwr_def_info; - break; -#endif -#ifdef CONFIG_RTL8703B - case RTL8703B: - map = &rtl8703b_pg_txpwr_def_info; - break; -#endif -#ifdef CONFIG_RTL8723D - case RTL8723D: - map = &rtl8723d_pg_txpwr_def_info; - break; -#endif -#ifdef CONFIG_RTL8188E case RTL8188E: map = &rtl8188e_pg_txpwr_def_info; break; -#endif -#ifdef CONFIG_RTL8188F - case RTL8188F: - map = &rtl8188f_pg_txpwr_def_info; - break; -#endif -#ifdef CONFIG_RTL8812A - case RTL8812: - map = &rtl8812a_pg_txpwr_def_info; - break; -#endif -#ifdef CONFIG_RTL8821A - case RTL8821: - map = &rtl8821a_pg_txpwr_def_info; - break; -#endif -#ifdef CONFIG_RTL8192E - case RTL8192E: - map = &rtl8192e_pg_txpwr_def_info; - break; -#endif -#ifdef CONFIG_RTL8814A - case RTL8814A: - map = &rtl8814a_pg_txpwr_def_info; - break; -#endif -#ifdef CONFIG_RTL8822B - case RTL8822B: - map = &rtl8822b_pg_txpwr_def_info; - break; -#endif -#ifdef CONFIG_RTL8821C - case RTL8821C: - map = &rtl8821c_pg_txpwr_def_info; - break; -#endif } if (map == NULL) { diff --git a/hal/hal_intf.c b/hal/hal_intf.c index 3543c81..6794399 100644 --- a/hal/hal_intf.c +++ b/hal/hal_intf.c @@ -825,9 +825,6 @@ exit: } #endif /* CONFIG_FW_C2H_PKT */ -#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTL8723B) -#include /* for MPTBT_FwC2hBtMpCtrl */ -#endif s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload) { HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); @@ -842,26 +839,20 @@ s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload) case C2H_FW_SCAN_COMPLETE: RTW_INFO("[C2H], FW Scan Complete\n"); break; - #ifdef CONFIG_BT_COEXIST case C2H_BT_INFO: rtw_btcoex_BtInfoNotify(adapter, plen, payload); break; case C2H_BT_MP_INFO: - #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTL8723B) - MPTBT_FwC2hBtMpCtrl(adapter, payload, plen); - #endif rtw_btcoex_BtMpRptNotify(adapter, plen, payload); break; case C2H_MAILBOX_STATUS: RTW_INFO_DUMP("C2H_MAILBOX_STATUS: ", payload, plen); break; #endif /* CONFIG_BT_COEXIST */ - case C2H_IQK_FINISH: c2h_iqk_offload(adapter, payload, plen); break; - #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) case C2H_FW_CHNL_SWITCH_COMPLETE: rtw_tdls_chsw_oper_done(adapter); @@ -870,7 +861,6 @@ s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload) rtw_tdls_ch_sw_back_to_base_chnl(adapter); break; #endif - #ifdef CONFIG_MCC_MODE case C2H_MCC: rtw_hal_mcc_c2h_handler(adapter, plen, payload); @@ -1311,11 +1301,6 @@ u8 rtw_hal_ops_check(_adapter *padapter) rtw_hal_error_msg("hal_mac_c2h_handler"); ret = _FAIL; } -#elif !defined(CONFIG_RTL8188E) - if (NULL == padapter->hal_func.c2h_handler) { - rtw_hal_error_msg("c2h_handler"); - ret = _FAIL; - } #endif #if defined(CONFIG_LPS) || defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) diff --git a/hal/hal_mp.c b/hal/hal_mp.c index 84d5726..aaef910 100644 --- a/hal/hal_mp.c +++ b/hal/hal_mp.c @@ -26,30 +26,7 @@ #ifdef RTW_HALMAC #include /* struct HAL_DATA_TYPE, RF register definition and etc. */ #else /* !RTW_HALMAC */ - #ifdef CONFIG_RTL8188E - #include - #endif - #ifdef CONFIG_RTL8723B - #include - #endif - #ifdef CONFIG_RTL8192E - #include - #endif - #ifdef CONFIG_RTL8814A - #include - #endif - #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) - #include - #endif - #ifdef CONFIG_RTL8703B - #include - #endif - #ifdef CONFIG_RTL8723D - #include - #endif - #ifdef CONFIG_RTL8188F - #include - #endif + #include #endif /* !RTW_HALMAC */ @@ -546,723 +523,10 @@ void hal_mpt_SetDataRate(PADAPTER pAdapter) hal_mpt_SwitchRfSetting(pAdapter); hal_mpt_CCKTxPowerAdjust(pAdapter, pHalData->bCCKinCH14); -#ifdef CONFIG_RTL8723B - if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) { - if (IS_CCK_RATE(DataRate)) { - if (pMptCtx->mpt_rf_path == ODM_RF_PATH_A) - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x51, 0xF, 0x6); - else - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x71, 0xF, 0x6); - } else { - if (pMptCtx->mpt_rf_path == ODM_RF_PATH_A) - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x51, 0xF, 0xE); - else - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x71, 0xF, 0xE); - } - } - - if ((IS_HARDWARE_TYPE_8723BS(pAdapter) && - ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90)))) { - if (pMptCtx->mpt_rf_path == ODM_RF_PATH_A) - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x51, 0xF, 0xE); - else - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x71, 0xF, 0xE); - } -#endif } #define RF_PATH_AB 22 -#ifdef CONFIG_RTL8814A -VOID mpt_ToggleIG_8814A(PADAPTER pAdapter) -{ - u1Byte Path = 0; - u4Byte IGReg = rA_IGI_Jaguar, IGvalue = 0; - - for (Path; Path <= ODM_RF_PATH_D; Path++) { - switch (Path) { - case ODM_RF_PATH_B: - IGReg = rB_IGI_Jaguar; - break; - case ODM_RF_PATH_C: - IGReg = rC_IGI_Jaguar2; - break; - case ODM_RF_PATH_D: - IGReg = rD_IGI_Jaguar2; - break; - default: - IGReg = rA_IGI_Jaguar; - break; - } - - IGvalue = phy_query_bb_reg(pAdapter, IGReg, bMaskByte0); - phy_set_bb_reg(pAdapter, IGReg, bMaskByte0, IGvalue + 2); - phy_set_bb_reg(pAdapter, IGReg, bMaskByte0, IGvalue); - } -} - -VOID mpt_SetRFPath_8814A(PADAPTER pAdapter) -{ - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.mpt_ctx; - R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ - R_ANTENNA_SELECT_CCK *p_cck_txrx; - u8 ForcedDataRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index); - u8 HtStbcCap = pAdapter->registrypriv.stbc_cap; - /*/PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo);*/ - /*/PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pMgntInfo);*/ - - u32 ulAntennaTx = pHalData->antenna_tx_path; - u32 ulAntennaRx = pHalData->AntennaRxPath; - u8 NssforRate = MgntQuery_NssTxRate(ForcedDataRate); - - if ((NssforRate == RF_2TX) || ((NssforRate == RF_1TX) && IS_HT_RATE(ForcedDataRate)) || ((NssforRate == RF_1TX) && IS_VHT_RATE(ForcedDataRate))) { - RTW_INFO("===> SetAntenna 2T ForcedDataRate %d NssforRate %d AntennaTx %d\n", ForcedDataRate, NssforRate, ulAntennaTx); - - switch (ulAntennaTx) { - case ANTENNA_BC: - pMptCtx->mpt_rf_path = ODM_RF_PATH_BC; - /*pHalData->ValidTxPath = 0x06; linux no use */ - phy_set_bb_reg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0000fff0, 0x106); /*/ 0x940[15:4]=12'b0000_0100_0011*/ - break; - - case ANTENNA_CD: - pMptCtx->mpt_rf_path = ODM_RF_PATH_CD; - /*pHalData->ValidTxPath = 0x0C;*/ - phy_set_bb_reg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0000fff0, 0x40c); /*/ 0x940[15:4]=12'b0000_0100_0011*/ - break; - case ANTENNA_AB: - default: - pMptCtx->mpt_rf_path = ODM_RF_PATH_AB; - /*pHalData->ValidTxPath = 0x03;*/ - phy_set_bb_reg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0000fff0, 0x043); /*/ 0x940[15:4]=12'b0000_0100_0011*/ - break; - } - - } else if (NssforRate == RF_3TX) { - RTW_INFO("===> SetAntenna 3T ForcedDataRate %d NssforRate %d AntennaTx %d\n", ForcedDataRate, NssforRate, ulAntennaTx); - - switch (ulAntennaTx) { - case ANTENNA_BCD: - pMptCtx->mpt_rf_path = ODM_RF_PATH_BCD; - /*pHalData->ValidTxPath = 0x0e;*/ - phy_set_bb_reg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0fff0000, 0x90e); /*/ 0x940[27:16]=12'b0010_0100_0111*/ - break; - - case ANTENNA_ABC: - default: - pMptCtx->mpt_rf_path = ODM_RF_PATH_ABC; - /*pHalData->ValidTxPath = 0x0d;*/ - phy_set_bb_reg(pAdapter, rTxAnt_23Nsts_Jaguar2, 0x0fff0000, 0x247); /*/ 0x940[27:16]=12'b0010_0100_0111*/ - break; - } - - } else { /*/if(NssforRate == RF_1TX)*/ - RTW_INFO("===> SetAntenna 1T ForcedDataRate %d NssforRate %d AntennaTx %d\n", ForcedDataRate, NssforRate, ulAntennaTx); - switch (ulAntennaTx) { - case ANTENNA_BCD: - pMptCtx->mpt_rf_path = ODM_RF_PATH_BCD; - /*pHalData->ValidTxPath = 0x0e;*/ - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x7); - phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0x000f00000, 0xe); - phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0xe); - break; - - case ANTENNA_BC: - pMptCtx->mpt_rf_path = ODM_RF_PATH_BC; - /*pHalData->ValidTxPath = 0x06;*/ - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x6); - phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0x000f00000, 0x6); - phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x6); - break; - case ANTENNA_B: - pMptCtx->mpt_rf_path = ODM_RF_PATH_B; - /*pHalData->ValidTxPath = 0x02;*/ - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x4); /*/ 0xa07[7:4] = 4'b0100*/ - phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x002); /*/ 0x93C[31:20]=12'b0000_0000_0010*/ - phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x2); /* 0x80C[7:4] = 4'b0010*/ - break; - - case ANTENNA_C: - pMptCtx->mpt_rf_path = ODM_RF_PATH_C; - /*pHalData->ValidTxPath = 0x04;*/ - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x2); /*/ 0xa07[7:4] = 4'b0010*/ - phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x004); /*/ 0x93C[31:20]=12'b0000_0000_0100*/ - phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x4); /*/ 0x80C[7:4] = 4'b0100*/ - break; - - case ANTENNA_D: - pMptCtx->mpt_rf_path = ODM_RF_PATH_D; - /*pHalData->ValidTxPath = 0x08;*/ - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x1); /*/ 0xa07[7:4] = 4'b0001*/ - phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x008); /*/ 0x93C[31:20]=12'b0000_0000_1000*/ - phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x8); /*/ 0x80C[7:4] = 4'b1000*/ - break; - - case ANTENNA_A: - default: - pMptCtx->mpt_rf_path = ODM_RF_PATH_A; - /*pHalData->ValidTxPath = 0x01;*/ - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0xf0000000, 0x8); /*/ 0xa07[7:4] = 4'b1000*/ - phy_set_bb_reg(pAdapter, rTxAnt_1Nsts_Jaguar2, 0xfff00000, 0x001); /*/ 0x93C[31:20]=12'b0000_0000_0001*/ - phy_set_bb_reg(pAdapter, rTxPath_Jaguar, 0xf0, 0x1); /*/ 0x80C[7:4] = 4'b0001*/ - break; - } - } - - switch (ulAntennaRx) { - case ANTENNA_A: - /*pHalData->ValidRxPath = 0x01;*/ - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); - phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x0); - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_A_0x0[19:16] = 3, RX mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ - /*/ CCA related PD_delay_th*/ - phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); - break; - - case ANTENNA_B: - /*pHalData->ValidRxPath = 0x02;*/ - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); - phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x1); - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ - /*/ CCA related PD_delay_th*/ - phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); - break; - - case ANTENNA_C: - /*pHalData->ValidRxPath = 0x04;*/ - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); - phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x44); - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x2); - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ - /*/ CCA related PD_delay_th*/ - phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); - break; - - case ANTENNA_D: - /*pHalData->ValidRxPath = 0x08;*/ - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); - phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x88); - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0C000000, 0x3); - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_C_0x0[19:16] = 1, Standby mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ - /*/ CCA related PD_delay_th*/ - phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); - break; - - case ANTENNA_BC: - /*pHalData->ValidRxPath = 0x06;*/ - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); - phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x66); - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x6); - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, Rx mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_D_0x0[19:16] = 1, Standby mode*/ - /*/ CCA related PD_delay_th*/ - phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); - break; - - case ANTENNA_CD: - /*pHalData->ValidRxPath = 0x0C;*/ - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); - phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xcc); - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0xB); - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, Rx mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ - /*/ CCA related PD_delay_th*/ - phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x5); - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0xA); - break; - - case ANTENNA_BCD: - /*pHalData->ValidRxPath = 0x0e;*/ - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); - phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xee); - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x6); - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_A_0x0[19:16] = 1, Standby mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, Rx mode*/ - /*/ CCA related PD_delay_th*/ - phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x3); - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0x8); - break; - - case ANTENNA_ABCD: - /*pHalData->ValidRxPath = 0x0f;*/ - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x2); - phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0xff); - phy_set_bb_reg(pAdapter, 0x1000, bMaskByte2, 0x3); - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, 0x0f000000, 0x1); - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_A_0x0[19:16] = 3, RX mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, RX mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_C, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_C_0x0[19:16] = 3, RX mode*/ - phy_set_rf_reg(pAdapter, ODM_RF_PATH_D, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_D_0x0[19:16] = 3, RX mode*/ - /*/ CCA related PD_delay_th*/ - phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x0F000000, 0x3); - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x0000000F, 0x8); - break; - - default: - break; - } - - PHY_Set_SecCCATH_by_RXANT_8814A(pAdapter, ulAntennaRx); - - mpt_ToggleIG_8814A(pAdapter); -} -#endif /* CONFIG_RTL8814A */ -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) -VOID -mpt_SetSingleTone_8814A( - IN PADAPTER pAdapter, - IN BOOLEAN bSingleTone, - IN BOOLEAN bEnPMacTx) -{ - - PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); - u1Byte StartPath = ODM_RF_PATH_A, EndPath = ODM_RF_PATH_A; - static u4Byte regIG0 = 0, regIG1 = 0, regIG2 = 0, regIG3 = 0; - - if (bSingleTone) { - regIG0 = phy_query_bb_reg(pAdapter, rA_TxScale_Jaguar, bMaskDWord); /*/ 0xC1C[31:21]*/ - regIG1 = phy_query_bb_reg(pAdapter, rB_TxScale_Jaguar, bMaskDWord); /*/ 0xE1C[31:21]*/ - regIG2 = phy_query_bb_reg(pAdapter, rC_TxScale_Jaguar2, bMaskDWord); /*/ 0x181C[31:21]*/ - regIG3 = phy_query_bb_reg(pAdapter, rD_TxScale_Jaguar2, bMaskDWord); /*/ 0x1A1C[31:21]*/ - - switch (pMptCtx->mpt_rf_path) { - case ODM_RF_PATH_A: - case ODM_RF_PATH_B: - case ODM_RF_PATH_C: - case ODM_RF_PATH_D: - StartPath = pMptCtx->mpt_rf_path; - EndPath = pMptCtx->mpt_rf_path; - break; - case ODM_RF_PATH_AB: - EndPath = ODM_RF_PATH_B; - break; - case ODM_RF_PATH_BC: - StartPath = ODM_RF_PATH_B; - EndPath = ODM_RF_PATH_C; - break; - case ODM_RF_PATH_ABC: - EndPath = ODM_RF_PATH_C; - break; - case ODM_RF_PATH_BCD: - StartPath = ODM_RF_PATH_B; - EndPath = ODM_RF_PATH_D; - break; - case ODM_RF_PATH_ABCD: - EndPath = ODM_RF_PATH_D; - break; - } - - if (bEnPMacTx == FALSE) { - hal_mpt_SetContinuousTx(pAdapter, _TRUE); - issue_nulldata(pAdapter, NULL, 1, 3, 500); - } - - phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x1); /*/ Disable CCA*/ - - for (StartPath; StartPath <= EndPath; StartPath++) { - phy_set_rf_reg(pAdapter, StartPath, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ - phy_set_rf_reg(pAdapter, StartPath, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ - - phy_set_rf_reg(pAdapter, StartPath, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ - } - - phy_set_bb_reg(pAdapter, rA_TxScale_Jaguar, 0xFFE00000, 0); /*/ 0xC1C[31:21]*/ - phy_set_bb_reg(pAdapter, rB_TxScale_Jaguar, 0xFFE00000, 0); /*/ 0xE1C[31:21]*/ - phy_set_bb_reg(pAdapter, rC_TxScale_Jaguar2, 0xFFE00000, 0); /*/ 0x181C[31:21]*/ - phy_set_bb_reg(pAdapter, rD_TxScale_Jaguar2, 0xFFE00000, 0); /*/ 0x1A1C[31:21]*/ - } else { - switch (pMptCtx->mpt_rf_path) { - case ODM_RF_PATH_A: - case ODM_RF_PATH_B: - case ODM_RF_PATH_C: - case ODM_RF_PATH_D: - StartPath = pMptCtx->mpt_rf_path; - EndPath = pMptCtx->mpt_rf_path; - break; - case ODM_RF_PATH_AB: - EndPath = ODM_RF_PATH_B; - break; - case ODM_RF_PATH_BC: - StartPath = ODM_RF_PATH_B; - EndPath = ODM_RF_PATH_C; - break; - case ODM_RF_PATH_ABC: - EndPath = ODM_RF_PATH_C; - break; - case ODM_RF_PATH_BCD: - StartPath = ODM_RF_PATH_B; - EndPath = ODM_RF_PATH_D; - break; - case ODM_RF_PATH_ABCD: - EndPath = ODM_RF_PATH_D; - break; - } - for (StartPath; StartPath <= EndPath; StartPath++) - phy_set_rf_reg(pAdapter, StartPath, lna_low_gain_3, BIT1, 0x0); /* RF LO disabled */ - - phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, BIT1, 0x0); /* Enable CCA*/ - - if (bEnPMacTx == FALSE) - hal_mpt_SetContinuousTx(pAdapter, _FALSE); - - phy_set_bb_reg(pAdapter, rA_TxScale_Jaguar, bMaskDWord, regIG0); /* 0xC1C[31:21]*/ - phy_set_bb_reg(pAdapter, rB_TxScale_Jaguar, bMaskDWord, regIG1); /* 0xE1C[31:21]*/ - phy_set_bb_reg(pAdapter, rC_TxScale_Jaguar2, bMaskDWord, regIG2); /* 0x181C[31:21]*/ - phy_set_bb_reg(pAdapter, rD_TxScale_Jaguar2, bMaskDWord, regIG3); /* 0x1A1C[31:21]*/ - } -} - -#endif - -#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -void mpt_SetRFPath_8812A(PADAPTER pAdapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.mpt_ctx; - struct mp_priv *pmp = &pAdapter->mppriv; - u8 channel = pmp->channel; - u8 bandwidth = pmp->bandwidth; - u8 eLNA_2g = pHalData->ExternalLNA_2G; - u32 ulAntennaTx, ulAntennaRx; - - ulAntennaTx = pHalData->antenna_tx_path; - ulAntennaRx = pHalData->AntennaRxPath; - - switch (ulAntennaTx) { - case ANTENNA_A: - pMptCtx->mpt_rf_path = ODM_RF_PATH_A; - phy_set_bb_reg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x1111); - if (pHalData->rfe_type == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) - phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); - break; - case ANTENNA_B: - pMptCtx->mpt_rf_path = ODM_RF_PATH_B; - phy_set_bb_reg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x2222); - if (pHalData->rfe_type == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) - phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x1); - break; - case ANTENNA_AB: - pMptCtx->mpt_rf_path = ODM_RF_PATH_AB; - phy_set_bb_reg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x3333); - if (pHalData->rfe_type == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) - phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); - break; - default: - pMptCtx->mpt_rf_path = ODM_RF_PATH_AB; - RTW_INFO("Unknown Tx antenna.\n"); - break; - } - - switch (ulAntennaRx) { - u32 reg0xC50 = 0; - case ANTENNA_A: - phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); - phy_set_rf_reg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, BIT19 | BIT18 | BIT17 | BIT16, 0x3); - - /*/ <20121101, Kordan> To prevent gain table from not switched, asked by Ynlin.*/ - reg0xC50 = phy_query_bb_reg(pAdapter, rA_IGI_Jaguar, bMaskByte0); - phy_set_bb_reg(pAdapter, rA_IGI_Jaguar, bMaskByte0, reg0xC50 + 2); - phy_set_bb_reg(pAdapter, rA_IGI_Jaguar, bMaskByte0, reg0xC50); - - /* set PWED_TH for BB Yn user guide R29 */ - if (IS_HARDWARE_TYPE_8812(pAdapter)) { - if (channel <= 14) { /* 2.4G */ - if (bandwidth == CHANNEL_WIDTH_20 - && eLNA_2g == 0) { - /* 0x830[3:1]=3'b010 */ - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x02); - } else - /* 0x830[3:1]=3'b100 */ - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); - } else - /* 0x830[3:1]=3'b100 for 5G */ - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); - } - break; - case ANTENNA_B: - phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1);/*/ RF_A_0x0[19:16] = 1, Standby mode */ - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x1); - phy_set_rf_reg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, BIT19 | BIT18 | BIT17 | BIT16, 0x3); - - /*/ <20121101, Kordan> To prevent gain table from not switched, asked by Ynlin.*/ - reg0xC50 = phy_query_bb_reg(pAdapter, rB_IGI_Jaguar, bMaskByte0); - phy_set_bb_reg(pAdapter, rB_IGI_Jaguar, bMaskByte0, reg0xC50 + 2); - phy_set_bb_reg(pAdapter, rB_IGI_Jaguar, bMaskByte0, reg0xC50); - - /* set PWED_TH for BB Yn user guide R29 */ - if (IS_HARDWARE_TYPE_8812(pAdapter)) { - if (channel <= 14) { - if (bandwidth == CHANNEL_WIDTH_20 - && eLNA_2g == 0) { - /* 0x830[3:1]=3'b010 */ - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x02); - } else - /* 0x830[3:1]=3'b100 */ - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); - } else - /* 0x830[3:1]=3'b100 for 5G */ - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); - } - break; - case ANTENNA_AB: - phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x33); - phy_set_rf_reg(pAdapter, ODM_RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, Rx mode*/ - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); - /* set PWED_TH for BB Yn user guide R29 */ - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); - break; - default: - RTW_INFO("Unknown Rx antenna.\n"); - break; - } -} -#endif - -#ifdef CONFIG_RTL8723B -void mpt_SetRFPath_8723B(PADAPTER pAdapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u32 ulAntennaTx, ulAntennaRx; - PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); - struct PHY_DM_STRUCT *pDM_Odm = &pHalData->odmpriv; - struct odm_rf_calibration_structure *pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info); - - ulAntennaTx = pHalData->antenna_tx_path; - ulAntennaRx = pHalData->AntennaRxPath; - - if (pHalData->rf_chip >= RF_TYPE_MAX) { - RTW_INFO("This RF chip ID is not supported\n"); - return; - } - - switch (pAdapter->mppriv.antenna_tx) { - u8 p = 0, i = 0; - case ANTENNA_A: { /*/ Actually path S1 (Wi-Fi)*/ - pMptCtx->mpt_rf_path = ODM_RF_PATH_A; - phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x0); - phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ - - /*/<20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten.*/ - if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90)) - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E); - else - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E); - - for (i = 0; i < 3; ++i) { - u4Byte offset = pRFCalibrateInfo->tx_iqc_8723b[ODM_RF_PATH_A][i][0]; - u4Byte data = pRFCalibrateInfo->tx_iqc_8723b[ODM_RF_PATH_A][i][1]; - - if (offset != 0) { - phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); - RTW_INFO("Switch to S1 TxIQC(offset, data) = (0x%X, 0x%X)\n", offset, data); - } - } - for (i = 0; i < 2; ++i) { - u4Byte offset = pRFCalibrateInfo->rx_iqc_8723b[ODM_RF_PATH_A][i][0]; - u4Byte data = pRFCalibrateInfo->rx_iqc_8723b[ODM_RF_PATH_A][i][1]; - - if (offset != 0) { - phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); - RTW_INFO("Switch to S1 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); - } - } - } - break; - case ANTENNA_B: { /*/ Actually path S0 (BT)*/ - u4Byte offset; - u4Byte data; - - pMptCtx->mpt_rf_path = ODM_RF_PATH_B; - phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x5); - phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x1); /*/ AGC Table Sel.*/ - /* <20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten.*/ - if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90)) - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E); - else - phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E); - - for (i = 0; i < 3; ++i) { - /*/ <20130603, Kordan> Because BB suppors only 1T1R, we restore IQC to S1 instead of S0.*/ - offset = pRFCalibrateInfo->tx_iqc_8723b[ODM_RF_PATH_A][i][0]; - data = pRFCalibrateInfo->tx_iqc_8723b[ODM_RF_PATH_B][i][1]; - if (pRFCalibrateInfo->tx_iqc_8723b[ODM_RF_PATH_B][i][0] != 0) { - phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); - RTW_INFO("Switch to S0 TxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); - } - } - /*/ <20130603, Kordan> Because BB suppors only 1T1R, we restore IQC to S1 instead of S0.*/ - for (i = 0; i < 2; ++i) { - offset = pRFCalibrateInfo->rx_iqc_8723b[ODM_RF_PATH_A][i][0]; - data = pRFCalibrateInfo->rx_iqc_8723b[ODM_RF_PATH_B][i][1]; - if (pRFCalibrateInfo->rx_iqc_8723b[ODM_RF_PATH_B][i][0] != 0) { - phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); - RTW_INFO("Switch to S0 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); - } - } - } - break; - default: - pMptCtx->mpt_rf_path = RF_PATH_AB; - break; - } -} -#endif - -#ifdef CONFIG_RTL8703B -void mpt_SetRFPath_8703B(PADAPTER pAdapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u4Byte ulAntennaTx, ulAntennaRx; - PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); - struct PHY_DM_STRUCT *pDM_Odm = &pHalData->odmpriv; - struct odm_rf_calibration_structure *pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info); - - ulAntennaTx = pHalData->antenna_tx_path; - ulAntennaRx = pHalData->AntennaRxPath; - - if (pHalData->rf_chip >= RF_TYPE_MAX) { - RTW_INFO("This RF chip ID is not supported\n"); - return; - } - - switch (pAdapter->mppriv.antenna_tx) { - u1Byte p = 0, i = 0; - - case ANTENNA_A: { /* Actually path S1 (Wi-Fi) */ - pMptCtx->mpt_rf_path = ODM_RF_PATH_A; - phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x0); - phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x0); /* AGC Table Sel*/ - - for (i = 0; i < 3; ++i) { - u4Byte offset = pRFCalibrateInfo->tx_iqc_8703b[i][0]; - u4Byte data = pRFCalibrateInfo->tx_iqc_8703b[i][1]; - - if (offset != 0) { - phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); - RTW_INFO("Switch to S1 TxIQC(offset, data) = (0x%X, 0x%X)\n", offset, data); - } - - } - for (i = 0; i < 2; ++i) { - u4Byte offset = pRFCalibrateInfo->rx_iqc_8703b[i][0]; - u4Byte data = pRFCalibrateInfo->rx_iqc_8703b[i][1]; - - if (offset != 0) { - phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); - RTW_INFO("Switch to S1 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); - } - } - } - break; - case ANTENNA_B: { /* Actually path S0 (BT)*/ - pMptCtx->mpt_rf_path = ODM_RF_PATH_B; - phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9 | BIT8 | BIT7, 0x5); - phy_set_bb_reg(pAdapter, 0xB2C, BIT31, 0x1); /* AGC Table Sel */ - - for (i = 0; i < 3; ++i) { - u4Byte offset = pRFCalibrateInfo->tx_iqc_8703b[i][0]; - u4Byte data = pRFCalibrateInfo->tx_iqc_8703b[i][1]; - - if (pRFCalibrateInfo->tx_iqc_8703b[i][0] != 0) { - phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); - RTW_INFO("Switch to S0 TxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); - } - } - for (i = 0; i < 2; ++i) { - u4Byte offset = pRFCalibrateInfo->rx_iqc_8703b[i][0]; - u4Byte data = pRFCalibrateInfo->rx_iqc_8703b[i][1]; - - if (pRFCalibrateInfo->rx_iqc_8703b[i][0] != 0) { - phy_set_bb_reg(pAdapter, offset, bMaskDWord, data); - RTW_INFO("Switch to S0 RxIQC (offset, data) = (0x%X, 0x%X)\n", offset, data); - } - } - } - break; - default: - pMptCtx->mpt_rf_path = RF_PATH_AB; - break; - } - -} -#endif - -#ifdef CONFIG_RTL8723D -void mpt_SetRFPath_8723D(PADAPTER pAdapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u1Byte p = 0, i = 0; - u4Byte ulAntennaTx, ulAntennaRx, offset = 0, data = 0, val32 = 0; - PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); - struct PHY_DM_STRUCT *pDM_Odm = &pHalData->odmpriv; - struct odm_rf_calibration_structure *pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info); - - ulAntennaTx = pHalData->antenna_tx_path; - ulAntennaRx = pHalData->AntennaRxPath; - - if (pHalData->rf_chip >= RF_TYPE_MAX) { - RTW_INFO("This RF chip ID is not supported\n"); - return; - } - - switch (pAdapter->mppriv.antenna_tx) { - /* Actually path S1 (Wi-Fi) */ - case ANTENNA_A: { - pMptCtx->mpt_rf_path = ODM_RF_PATH_A; - phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7|BIT6, 0); - } - break; - /* Actually path S0 (BT) */ - case ANTENNA_B: { - pMptCtx->mpt_rf_path = ODM_RF_PATH_B; - phy_set_bb_reg(pAdapter, rS0S1_PathSwitch, BIT9|BIT8|BIT7|BIT6, 0xA); - - } - break; - default: - pMptCtx->mpt_rf_path = RF_PATH_AB; - break; - } -} -#endif - static void mpt_SetRFPath_819X(PADAPTER pAdapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -1427,56 +691,6 @@ void hal_mpt_SetAntenna(PADAPTER pAdapter) { RTW_INFO("Do %s\n", __func__); -#ifdef CONFIG_RTL8814A - if (IS_HARDWARE_TYPE_8814A(pAdapter)) { - mpt_SetRFPath_8814A(pAdapter); - return; - } -#endif -#ifdef CONFIG_RTL8822B - if (IS_HARDWARE_TYPE_8822B(pAdapter)) { - rtl8822b_mp_config_rfpath(pAdapter); - return; - } -#endif -#ifdef CONFIG_RTL8821C - if (IS_HARDWARE_TYPE_8821C(pAdapter)) { - rtl8821c_mp_config_rfpath(pAdapter); - return; - } -#endif -#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) - if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { - mpt_SetRFPath_8812A(pAdapter); - return; - } -#endif -#ifdef CONFIG_RTL8723B - if (IS_HARDWARE_TYPE_8723B(pAdapter)) { - mpt_SetRFPath_8723B(pAdapter); - return; - } -#endif - -#ifdef CONFIG_RTL8703B - if (IS_HARDWARE_TYPE_8703B(pAdapter)) { - mpt_SetRFPath_8703B(pAdapter); - return; - } -#endif - -#ifdef CONFIG_RTL8723D - if (IS_HARDWARE_TYPE_8723D(pAdapter)) { - mpt_SetRFPath_8723D(pAdapter); - return; - } -#endif - /* else if (IS_HARDWARE_TYPE_8821B(pAdapter)) - mpt_SetRFPath_8821B(pAdapter); - Prepare for 8822B - else if (IS_HARDWARE_TYPE_8822B(Context)) - mpt_SetRFPath_8822B(Context); - */ mpt_SetRFPath_819X(pAdapter); RTW_INFO("mpt_SetRFPath_819X Do %s\n", __func__); } @@ -1560,23 +774,12 @@ void hal_mpt_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) phy_set_bb_reg(pAdapter, rCCK0_System, bCCKScramble, 1); /*/ 4. Turn On Continue Tx and turn off the other test modes.*/ -#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) - if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) - phy_set_bb_reg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18 | BIT17 | BIT16, OFDM_SingleCarrier); - else -#endif /* CONFIG_RTL8812A || CONFIG_RTL8821A || CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C */ - phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_SingleCarrier); - + phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_SingleCarrier); } else { /*/ Stop Single Carrier.*/ /*/ Stop Single Carrier.*/ /*/ Turn off all test modes.*/ -#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) - if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(pAdapter)) - phy_set_bb_reg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); - else -#endif /* CONFIG_RTL8812A || CONFIG_RTL8821A || CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C */ - phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_ALL_OFF); + phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_ALL_OFF); rtw_msleep_os(10); /*/BB Reset*/ @@ -1655,49 +858,9 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x63, BIT0, 0x1); } } else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8822B(pAdapter)) { -#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8822B) - u1Byte p = ODM_RF_PATH_A; - - regRF = phy_query_rf_reg(pAdapter, ODM_RF_PATH_A, RF_AC_Jaguar, bRFRegOffsetMask); - regBB0 = phy_query_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord); - regBB1 = phy_query_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord); - regBB2 = phy_query_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, bMaskDWord); - regBB3 = phy_query_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, bMaskDWord); - - phy_set_bb_reg(pAdapter, rOFDMCCKEN_Jaguar, BIT29 | BIT28, 0x0); /*/ Disable CCK and OFDM*/ - - if (pMptCtx->mpt_rf_path == ODM_RF_PATH_AB) { - for (p = ODM_RF_PATH_A; p <= ODM_RF_PATH_B; ++p) { - phy_set_rf_reg(pAdapter, p, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ - phy_set_rf_reg(pAdapter, p, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ - phy_set_rf_reg(pAdapter, p, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ - } - } else { - phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC_Jaguar, 0xF0000, 0x2); /*/ Tx mode: RF0x00[19:16]=4'b0010 */ - phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, RF_AC_Jaguar, 0x1F, 0x0); /*/ Lowest RF gain index: RF_0x0[4:0] = 0*/ - phy_set_rf_reg(pAdapter, pMptCtx->mpt_rf_path, lna_low_gain_3, BIT1, 0x1); /*/ RF LO enabled*/ - } - - phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); /*/ 0xCB0[[23:16, 7:4] = 0x77007*/ - phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar, 0xFF00F0, 0x77007); /*/ 0xCB0[[23:16, 7:4] = 0x77007*/ - - if (pHalData->external_pa_5g) { - phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x12); /*/ 0xCB4[23:16] = 0x12*/ - phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x12); /*/ 0xEB4[23:16] = 0x12*/ - } else if (pHalData->ExternalPA_2G) { - phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x11); /*/ 0xCB4[23:16] = 0x11*/ - phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, 0xFF00000, 0x11); /*/ 0xEB4[23:16] = 0x11*/ - } -#endif - } -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8821C) - else if (IS_HARDWARE_TYPE_8814A(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter)) - mpt_SetSingleTone_8814A(pAdapter, TRUE, FALSE); -#endif - - else /*/ Turn On SingleTone and turn off the other test modes.*/ + } else { /*/ Turn On SingleTone and turn off the other test modes.*/ phy_set_bb_reg(pAdapter, rOFDM1_LSTF, BIT30 | BIT29 | BIT28, OFDM_SingleTone); - + } write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500); write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500); @@ -1742,37 +905,9 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x63, BIT0, 0x0); } } else if (IS_HARDWARE_TYPE_JAGUAR(pAdapter) || IS_HARDWARE_TYPE_8822B(pAdapter)) { -#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8822B) - u1Byte p = ODM_RF_PATH_A; - - phy_set_bb_reg(pAdapter, rOFDMCCKEN_Jaguar, BIT29 | BIT28, 0x3); /*/ Disable CCK and OFDM*/ - - if (pMptCtx->mpt_rf_path == ODM_RF_PATH_AB) { - for (p = ODM_RF_PATH_A; p <= ODM_RF_PATH_B; ++p) { - phy_set_rf_reg(pAdapter, p, RF_AC_Jaguar, bRFRegOffsetMask, regRF); - phy_set_rf_reg(pAdapter, p, lna_low_gain_3, BIT1, 0x0); /*/ RF LO disabled*/ - } - } else { - phy_set_rf_reg(pAdapter, p, RF_AC_Jaguar, bRFRegOffsetMask, regRF); - phy_set_rf_reg(pAdapter, p, lna_low_gain_3, BIT1, 0x0); /*/ RF LO disabled*/ - } - - phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, regBB0); - phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, regBB1); - phy_set_bb_reg(pAdapter, rA_RFE_Pinmux_Jaguar + 4, bMaskDWord, regBB2); - phy_set_bb_reg(pAdapter, rB_RFE_Pinmux_Jaguar + 4, bMaskDWord, regBB3); -#endif } -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) - else if (IS_HARDWARE_TYPE_8814A(pAdapter) || IS_HARDWARE_TYPE_8821C(pAdapter)) - mpt_SetSingleTone_8814A(pAdapter, FALSE, FALSE); - - else/*/ Turn off all test modes.*/ - phy_set_bb_reg(pAdapter, rSingleTone_ContTx_Jaguar, BIT18 | BIT17 | BIT16, OFDM_ALL_OFF); -#endif write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100); write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100); - } } @@ -1987,205 +1122,6 @@ static VOID mpt_StartOfdmContTx( pMptCtx->bOfdmContTx = TRUE; } /* mpt_StartOfdmContTx */ - -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8821B) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) -/* for HW TX mode */ -void mpt_ProSetPMacTx(PADAPTER Adapter) -{ - PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); - RT_PMAC_TX_INFO PMacTxInfo = pMptCtx->PMacTxInfo; - u32 u4bTmp; - - dbg_print("SGI %d bSPreamble %d bSTBC %d bLDPC %d NDP_sound %d\n", PMacTxInfo.bSGI, PMacTxInfo.bSPreamble, PMacTxInfo.bSTBC, PMacTxInfo.bLDPC, PMacTxInfo.NDP_sound); - dbg_print("TXSC %d BandWidth %d PacketPeriod %d PacketCount %d PacketLength %d PacketPattern %d\n", PMacTxInfo.TX_SC, PMacTxInfo.BandWidth, PMacTxInfo.PacketPeriod, PMacTxInfo.PacketCount, - PMacTxInfo.PacketLength, PMacTxInfo.PacketPattern); -#if 0 - PRINT_DATA("LSIG ", PMacTxInfo.LSIG, 3); - PRINT_DATA("HT_SIG", PMacTxInfo.HT_SIG, 6); - PRINT_DATA("VHT_SIG_A", PMacTxInfo.VHT_SIG_A, 6); - PRINT_DATA("VHT_SIG_B", PMacTxInfo.VHT_SIG_B, 4); - dbg_print("VHT_SIG_B_CRC %x\n", PMacTxInfo.VHT_SIG_B_CRC); - PRINT_DATA("VHT_Delimiter", PMacTxInfo.VHT_Delimiter, 4); - - PRINT_DATA("Src Address", Adapter->mac_addr, 6); - PRINT_DATA("Dest Address", PMacTxInfo.MacAddress, 6); -#endif - - if (PMacTxInfo.bEnPMacTx == FALSE) { - if (PMacTxInfo.Mode == CONTINUOUS_TX) { - phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ - if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) - mpt_StopCckContTx(Adapter); - else - mpt_StopOfdmContTx(Adapter); - } else if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) { - u4bTmp = phy_query_bb_reg(Adapter, 0xf50, bMaskLWord); - phy_set_bb_reg(Adapter, 0xb1c, bMaskLWord, u4bTmp + 50); - phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /*TX Stop*/ - } else - phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); /* TX Stop*/ - - if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) { - /* Stop HW TX -> Stop Continuous TX -> Stop RF Setting*/ - if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) - mpt_StopCckContTx(Adapter); - else - mpt_StopOfdmContTx(Adapter); - - mpt_SetSingleTone_8814A(Adapter, FALSE, TRUE); - } - - return; - } - - if (PMacTxInfo.Mode == CONTINUOUS_TX) { - PMacTxInfo.PacketCount = 1; - - if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) - mpt_StartCckContTx(Adapter); - else - mpt_StartOfdmContTx(Adapter); - } else if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) { - /* Continuous TX -> HW TX -> RF Setting */ - PMacTxInfo.PacketCount = 1; - - if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) - mpt_StartCckContTx(Adapter); - else - mpt_StartOfdmContTx(Adapter); - } else if (PMacTxInfo.Mode == PACKETS_TX) { - if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE) && PMacTxInfo.PacketCount == 0) - PMacTxInfo.PacketCount = 0xffff; - } - - if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) { - /* 0xb1c[0:15] TX packet count 0xb1C[31:16] SFD*/ - u4bTmp = PMacTxInfo.PacketCount | (PMacTxInfo.SFD << 16); - phy_set_bb_reg(Adapter, 0xb1c, bMaskDWord, u4bTmp); - /* 0xb40 7:0 SIGNAL 15:8 SERVICE 31:16 LENGTH*/ - u4bTmp = PMacTxInfo.SignalField | (PMacTxInfo.ServiceField << 8) | (PMacTxInfo.LENGTH << 16); - phy_set_bb_reg(Adapter, 0xb40, bMaskDWord, u4bTmp); - u4bTmp = PMacTxInfo.CRC16[0] | (PMacTxInfo.CRC16[1] << 8); - phy_set_bb_reg(Adapter, 0xb44, bMaskLWord, u4bTmp); - - if (PMacTxInfo.bSPreamble) - phy_set_bb_reg(Adapter, 0xb0c, BIT27, 0); - else - phy_set_bb_reg(Adapter, 0xb0c, BIT27, 1); - } else { - phy_set_bb_reg(Adapter, 0xb18, 0xfffff, PMacTxInfo.PacketCount); - - u4bTmp = PMacTxInfo.LSIG[0] | ((PMacTxInfo.LSIG[1]) << 8) | ((PMacTxInfo.LSIG[2]) << 16) | ((PMacTxInfo.PacketPattern) << 24); - phy_set_bb_reg(Adapter, 0xb08, bMaskDWord, u4bTmp); /* Set 0xb08[23:0] = LSIG, 0xb08[31:24] = Data init octet*/ - - if (PMacTxInfo.PacketPattern == 0x12) - u4bTmp = 0x3000000; - else - u4bTmp = 0; - } - - if (IS_MPT_HT_RATE(PMacTxInfo.TX_RATE)) { - u4bTmp |= PMacTxInfo.HT_SIG[0] | ((PMacTxInfo.HT_SIG[1]) << 8) | ((PMacTxInfo.HT_SIG[2]) << 16); - phy_set_bb_reg(Adapter, 0xb0c, bMaskDWord, u4bTmp); - u4bTmp = PMacTxInfo.HT_SIG[3] | ((PMacTxInfo.HT_SIG[4]) << 8) | ((PMacTxInfo.HT_SIG[5]) << 16); - phy_set_bb_reg(Adapter, 0xb10, 0xffffff, u4bTmp); - } else if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) { - u4bTmp |= PMacTxInfo.VHT_SIG_A[0] | ((PMacTxInfo.VHT_SIG_A[1]) << 8) | ((PMacTxInfo.VHT_SIG_A[2]) << 16); - phy_set_bb_reg(Adapter, 0xb0c, bMaskDWord, u4bTmp); - u4bTmp = PMacTxInfo.VHT_SIG_A[3] | ((PMacTxInfo.VHT_SIG_A[4]) << 8) | ((PMacTxInfo.VHT_SIG_A[5]) << 16); - phy_set_bb_reg(Adapter, 0xb10, 0xffffff, u4bTmp); - - _rtw_memcpy(&u4bTmp, PMacTxInfo.VHT_SIG_B, 4); - phy_set_bb_reg(Adapter, 0xb14, bMaskDWord, u4bTmp); - } - - if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) { - u4bTmp = (PMacTxInfo.VHT_SIG_B_CRC << 24) | PMacTxInfo.PacketPeriod; /* for TX interval */ - phy_set_bb_reg(Adapter, 0xb20, bMaskDWord, u4bTmp); - - _rtw_memcpy(&u4bTmp, PMacTxInfo.VHT_Delimiter, 4); - phy_set_bb_reg(Adapter, 0xb24, bMaskDWord, u4bTmp); - - /* 0xb28 - 0xb34 24 byte Probe Request MAC Header*/ - /*& Duration & Frame control*/ - phy_set_bb_reg(Adapter, 0xb28, bMaskDWord, 0x00000040); - - /* Address1 [0:3]*/ - u4bTmp = PMacTxInfo.MacAddress[0] | (PMacTxInfo.MacAddress[1] << 8) | (PMacTxInfo.MacAddress[2] << 16) | (PMacTxInfo.MacAddress[3] << 24); - phy_set_bb_reg(Adapter, 0xb2C, bMaskDWord, u4bTmp); - - /* Address3 [3:0]*/ - phy_set_bb_reg(Adapter, 0xb38, bMaskDWord, u4bTmp); - - /* Address2[0:1] & Address1 [5:4]*/ - u4bTmp = PMacTxInfo.MacAddress[4] | (PMacTxInfo.MacAddress[5] << 8) | (Adapter->mac_addr[0] << 16) | (Adapter->mac_addr[1] << 24); - phy_set_bb_reg(Adapter, 0xb30, bMaskDWord, u4bTmp); - - /* Address2 [5:2]*/ - u4bTmp = Adapter->mac_addr[2] | (Adapter->mac_addr[3] << 8) | (Adapter->mac_addr[4] << 16) | (Adapter->mac_addr[5] << 24); - phy_set_bb_reg(Adapter, 0xb34, bMaskDWord, u4bTmp); - - /* Sequence Control & Address3 [5:4]*/ - /*u4bTmp = PMacTxInfo.MacAddress[4]|(PMacTxInfo.MacAddress[5] << 8) ;*/ - /*phy_set_bb_reg(Adapter, 0xb38, bMaskDWord, u4bTmp);*/ - } else { - phy_set_bb_reg(Adapter, 0xb20, bMaskDWord, PMacTxInfo.PacketPeriod); /* for TX interval*/ - /* & Duration & Frame control */ - phy_set_bb_reg(Adapter, 0xb24, bMaskDWord, 0x00000040); - - /* 0xb24 - 0xb38 24 byte Probe Request MAC Header*/ - /* Address1 [0:3]*/ - u4bTmp = PMacTxInfo.MacAddress[0] | (PMacTxInfo.MacAddress[1] << 8) | (PMacTxInfo.MacAddress[2] << 16) | (PMacTxInfo.MacAddress[3] << 24); - phy_set_bb_reg(Adapter, 0xb28, bMaskDWord, u4bTmp); - - /* Address3 [3:0]*/ - phy_set_bb_reg(Adapter, 0xb34, bMaskDWord, u4bTmp); - - /* Address2[0:1] & Address1 [5:4]*/ - u4bTmp = PMacTxInfo.MacAddress[4] | (PMacTxInfo.MacAddress[5] << 8) | (Adapter->mac_addr[0] << 16) | (Adapter->mac_addr[1] << 24); - phy_set_bb_reg(Adapter, 0xb2c, bMaskDWord, u4bTmp); - - /* Address2 [5:2] */ - u4bTmp = Adapter->mac_addr[2] | (Adapter->mac_addr[3] << 8) | (Adapter->mac_addr[4] << 16) | (Adapter->mac_addr[5] << 24); - phy_set_bb_reg(Adapter, 0xb30, bMaskDWord, u4bTmp); - - /* Sequence Control & Address3 [5:4]*/ - u4bTmp = PMacTxInfo.MacAddress[4] | (PMacTxInfo.MacAddress[5] << 8); - phy_set_bb_reg(Adapter, 0xb38, bMaskDWord, u4bTmp); - } - - phy_set_bb_reg(Adapter, 0xb48, bMaskByte3, PMacTxInfo.TX_RATE_HEX); - - /* 0xb4c 3:0 TXSC 5:4 BW 7:6 m_STBC 8 NDP_Sound*/ - u4bTmp = (PMacTxInfo.TX_SC) | ((PMacTxInfo.BandWidth) << 4) | ((PMacTxInfo.m_STBC - 1) << 6) | ((PMacTxInfo.NDP_sound) << 8); - phy_set_bb_reg(Adapter, 0xb4c, 0x1ff, u4bTmp); - - if (IS_HARDWARE_TYPE_8814A(Adapter) || IS_HARDWARE_TYPE_8822B(Adapter)) { - u4Byte offset = 0xb44; - - if (IS_MPT_OFDM_RATE(PMacTxInfo.TX_RATE)) - phy_set_bb_reg(Adapter, offset, 0xc0000000, 0); - else if (IS_MPT_HT_RATE(PMacTxInfo.TX_RATE)) - phy_set_bb_reg(Adapter, offset, 0xc0000000, 1); - else if (IS_MPT_VHT_RATE(PMacTxInfo.TX_RATE)) - phy_set_bb_reg(Adapter, offset, 0xc0000000, 2); - } - - phy_set_bb_reg(Adapter, 0xb00, BIT8, 1); /* Turn on PMAC*/ - /* phy_set_bb_reg(Adapter, 0xb04, 0xf, 2); */ /* TX Stop */ - if (IS_MPT_CCK_RATE(PMacTxInfo.TX_RATE)) { - phy_set_bb_reg(Adapter, 0xb04, 0xf, 8); /*TX CCK ON*/ - phy_set_bb_reg(Adapter, 0xA84, BIT31, 0); - } else - phy_set_bb_reg(Adapter, 0xb04, 0xf, 4); /* TX Ofdm ON */ - - if (PMacTxInfo.Mode == OFDM_Single_Tone_TX) - mpt_SetSingleTone_8814A(Adapter, TRUE, TRUE); - -} - -#endif - void hal_mpt_SetContinuousTx(PADAPTER pAdapter, u8 bStart) { u8 Rate; diff --git a/hal/phydm/halphyrf_ap.c b/hal/phydm/halphyrf_ap.c index ebddba1..de20e67 100644 --- a/hal/phydm/halphyrf_ap.c +++ b/hal/phydm/halphyrf_ap.c @@ -997,10 +997,6 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series( delay_ms(200); /* frequency deviation */ phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 0); phy_set_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, reg0x18); -#ifdef CONFIG_RTL_8812_SUPPORT - if (GET_CHIP_VER(priv) == VERSION_8812E) - update_bbrf_val8812(priv, priv->pmib->dot11RFEntry.dot11channel); -#endif RTL_W8(0x522, 0x0); priv->pshare->thermal_value_lck = thermal_value; } diff --git a/hal/phydm/phydm_powertracking_ap.c b/hal/phydm/phydm_powertracking_ap.c index 42b17a9..9da2136 100644 --- a/hal/phydm/phydm_powertracking_ap.c +++ b/hal/phydm/phydm_powertracking_ap.c @@ -966,7 +966,6 @@ odm_txpowertracking_thermal_meter_init( p_hal_data->txpowertrack_control = true; ODM_RT_TRACE(p_dm_odm, COMP_POWER_TRACKING, DBG_LOUD, ("p_mgnt_info->is_txpowertracking = %d\n", p_mgnt_info->is_txpowertracking)); #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -#ifdef CONFIG_RTL8188E { p_dm_odm->rf_calibrate_info.is_txpowertracking = _TRUE; p_dm_odm->rf_calibrate_info.tx_powercount = 0; @@ -977,38 +976,6 @@ odm_txpowertracking_thermal_meter_init( MSG_8192C("p_dm_odm txpowertrack_control = %d\n", p_dm_odm->rf_calibrate_info.txpowertrack_control); } -#else - { - struct _ADAPTER *adapter = p_dm_odm->adapter; - HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter); - struct dm_priv *pdmpriv = &p_hal_data->dmpriv; - - /* if(IS_HARDWARE_TYPE_8192C(p_hal_data)) */ - { - pdmpriv->is_txpowertracking = _TRUE; - pdmpriv->tx_powercount = 0; - pdmpriv->is_txpowertracking_init = _FALSE; - - if (p_dm_odm->mp_mode == false) /* for mp driver, turn off txpwrtracking as default */ - pdmpriv->txpowertrack_control = _TRUE; - - } - MSG_8192C("pdmpriv->txpowertrack_control = %d\n", pdmpriv->txpowertrack_control); - - } -#endif/* endif (CONFIG_RTL8188E==1) */ -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - -#ifdef RTL8188E_SUPPORT - { - p_dm_odm->rf_calibrate_info.is_txpowertracking = _TRUE; - p_dm_odm->rf_calibrate_info.tx_powercount = 0; - p_dm_odm->rf_calibrate_info.is_txpowertracking_init = _FALSE; - p_dm_odm->rf_calibrate_info.txpowertrack_control = _TRUE; - p_dm_odm->rf_calibrate_info.tm_trigger = 0; - } -#endif -#endif p_dm_odm->rf_calibrate_info.txpowertrack_control = true; p_dm_odm->rf_calibrate_info.delta_power_index = 0; @@ -1017,26 +984,7 @@ odm_txpowertracking_thermal_meter_init( p_dm_odm->rf_calibrate_info.thermal_value = 0; p_rf_calibrate_info->default_ofdm_index = 28; -#if (RTL8197F_SUPPORT == 1) - if (GET_CHIP_VER(priv) == VERSION_8197F) { - p_rf_calibrate_info->default_ofdm_index = (default_swing_index >= (OFDM_TABLE_SIZE_92D - 1)) ? 30 : default_swing_index; - p_rf_calibrate_info->default_cck_index = 28; - } -#endif - -#if (RTL8822B_SUPPORT == 1) - if (GET_CHIP_VER(priv) == VERSION_8822B) { - p_rf_calibrate_info->default_ofdm_index = (default_swing_index >= (TXSCALE_TABLE_SIZE - 1)) ? 24 : default_swing_index; - p_rf_calibrate_info->default_cck_index = 20; - } -#endif - - -#if RTL8188E_SUPPORT p_rf_calibrate_info->default_cck_index = 20; /* -6 dB */ -#elif RTL8192E_SUPPORT - p_rf_calibrate_info->default_cck_index = 8; /* -12 dB */ -#endif p_rf_calibrate_info->bb_swing_idx_ofdm_base = p_rf_calibrate_info->default_ofdm_index; p_rf_calibrate_info->bb_swing_idx_cck_base = p_rf_calibrate_info->default_cck_index; p_dm_odm->rf_calibrate_info.CCK_index = p_rf_calibrate_info->default_cck_index; @@ -1049,11 +997,8 @@ odm_txpowertracking_thermal_meter_init( p_rf_calibrate_info->bb_swing_idx_cck = p_rf_calibrate_info->default_cck_index; ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("p_rf_calibrate_info->default_ofdm_index=%d p_rf_calibrate_info->default_cck_index=%d\n", p_rf_calibrate_info->default_ofdm_index, p_rf_calibrate_info->default_cck_index)); - - } - void odm_txpowertracking_check( void *p_dm_void diff --git a/hal/phydm/phydm_powertracking_win.c b/hal/phydm/phydm_powertracking_win.c index 31841ae..a9c544e 100644 --- a/hal/phydm/phydm_powertracking_win.c +++ b/hal/phydm/phydm_powertracking_win.c @@ -535,7 +535,6 @@ odm_txpowertracking_thermal_meter_init( if (p_dm_odm->mp_mode == false) p_rf_calibrate_info->txpowertrack_control = true; #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -#ifdef CONFIG_RTL8188E { p_rf_calibrate_info->is_txpowertracking = _TRUE; p_rf_calibrate_info->tx_powercount = 0; @@ -546,32 +545,6 @@ odm_txpowertracking_thermal_meter_init( MSG_8192C("p_dm_odm txpowertrack_control = %d\n", p_rf_calibrate_info->txpowertrack_control); } -#else - { - struct _ADAPTER *adapter = p_dm_odm->adapter; - HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter); - struct dm_priv *pdmpriv = &p_hal_data->dmpriv; - - pdmpriv->is_txpowertracking = _TRUE; - pdmpriv->tx_powercount = 0; - pdmpriv->is_txpowertracking_init = _FALSE; - - if (p_dm_odm->mp_mode == false) - pdmpriv->txpowertrack_control = _TRUE; - - MSG_8192C("pdmpriv->txpowertrack_control = %d\n", pdmpriv->txpowertrack_control); - - } -#endif -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -#ifdef RTL8188E_SUPPORT - { - p_rf_calibrate_info->is_txpowertracking = _TRUE; - p_rf_calibrate_info->tx_powercount = 0; - p_rf_calibrate_info->is_txpowertracking_init = _FALSE; - p_rf_calibrate_info->txpowertrack_control = _TRUE; - } -#endif #endif #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)