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rtl8188eu: Remove configuration variable DM_ODM_SUPPORT_TYPE and associated dead code

Browse source 
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2013-07-14 23:50:52 -05:00
parent 951757e916
commit 10dd5cd02b
19 changed files with 399 additions and 9669 deletions
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54
hal/Hal8188ERateAdaptive.c
View file

@ -15,14 +15,9 @@ Major Change History:
--*/
#include "odm_precomp.h"
/* if ( DM_ODM_SUPPORT_TYPE == ODM_MP) */
/* include "Mp_Precomp.h" */
/* endif */
#if (RATE_ADAPTIVE_SUPPORT == 1)
/* Rate adaptive parameters */
static u1Byte RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = {
{5,4,3,2,0,3},/* 92 , idx=0 */
{6,5,4,3,0,4},/* 86 , idx=1 */
@ -52,27 +47,6 @@ static u1Byte RETRY_PENALTY_UP[RETRYSIZE+1]={49,44,16,16,0,48}; /* 12% for rat
static u1Byte PT_PENALTY[RETRYSIZE+1]={34,31,30,24,0,32};
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = {
{4,4,4,5,4,4,5,7,7,7,8,0x0a, /* SS>TH */
4,4,4,4,6,0x0a,0x0b,0x0d,
5,5,7,7,8,0x0b,0x0d,0x0f}, /* 0329 R01 */
{0x0a,0x0a,0x0a,0x0a,0x0c,0x0c,0x0e,0x10,0x11,0x12,0x12,0x13, /* SS<TH */
0x0e,0x0f,0x10,0x10,0x11,0x14,0x14,0x15,
9,9,9,9,0x0c,0x0e,0x11,0x13}};
static u1Byte RETRY_PENALTY_UP_IDX[RATESIZE] = {
0x10,0x10,0x10,0x10,0x11,0x11,0x12,0x12,0x12,0x13,0x13,0x14, /* SS>TH */
0x13,0x13,0x14,0x14,0x15,0x15,0x15,0x15,
0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15};
static u1Byte RSSI_THRESHOLD[RATESIZE] = {
0,0,0,0,
0,0,0,0,0,0x24,0x26,0x2a,
0x13,0x15,0x17,0x18,0x1a,0x1c,0x1d,0x1f,
0,0,0,0x1f,0x23,0x28,0x2a,0x2c};
#else
/* wilson modify */
static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = {
{4,4,4,5,4,4,5,7,7,7,8,0x0a, /* SS>TH */
@ -95,8 +69,6 @@ static u1Byte RSSI_THRESHOLD[RATESIZE] = {
0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,
0,0,0,0x1f,0x23,0x28,0x2a,0x2c};
#endif
static u2Byte N_THRESHOLD_HIGH[RATESIZE] = {
4,4,8,16,
24,36,48,72,96,144,192,216,
@ -599,17 +571,12 @@ odm_RATxRPTTimerSetting(
if (pDM_Odm->CurrminRptTime != minRptTime){
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
(" CurrminRptTime =0x%04x minRptTime=0x%04x\n", pDM_Odm->CurrminRptTime, minRptTime));
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_AP))
ODM_RA_Set_TxRPT_Time(pDM_Odm,minRptTime);
#else
rtw_rpt_timer_cfg_cmd(pDM_Odm->Adapter,minRptTime);
#endif
pDM_Odm->CurrminRptTime = minRptTime;
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,(" <=====odm_RATxRPTTimerSetting()\n"));
}
void
ODM_RASupport_Init(
PDM_ODM_T pDM_Odm
@ -804,9 +771,6 @@ ODM_RA_Set_TxRPT_Time(
u2Byte minRptTime
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
if (minRptTime != 0xffff)
#endif
ODM_Write2Byte(pDM_Odm, REG_TX_RPT_TIME, minRptTime);
}
@ -845,21 +809,12 @@ ODM_RA_TxRPT2Handle_8188E(
if (valid)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
pRAInfo->RTY[0] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer);
pRAInfo->RTY[1] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer);
pRAInfo->RTY[2] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer);
pRAInfo->RTY[3] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_3(pBuffer);
pRAInfo->RTY[4] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer);
pRAInfo->DROP = (u2Byte)GET_TX_REPORT_TYPE1_DROP_0(pBuffer);
#else
pRAInfo->RTY[0] = (unsigned short)(pBuffer[1] << 8 | pBuffer[0]);
pRAInfo->RTY[1] = pBuffer[2];
pRAInfo->RTY[2] = pBuffer[3];
pRAInfo->RTY[3] = pBuffer[4];
pRAInfo->RTY[4] = pBuffer[5];
pRAInfo->DROP = pBuffer[6];
#endif
pRAInfo->TOTAL = pRAInfo->RTY[0] + \
pRAInfo->RTY[1] + \
pRAInfo->RTY[2] + \
@ -905,15 +860,6 @@ ODM_RA_TxRPT2Handle_8188E(
odm_RateDecision_8188E(pDM_Odm, pRAInfo);
#endif
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
extern void RTL8188E_SetStationTxRateInfo(PDM_ODM_T, PODM_RA_INFO_T, int);
RTL8188E_SetStationTxRateInfo(pDM_Odm, pRAInfo, MacId);
#ifdef DETECT_STA_EXISTANCE
void RTL8188E_DetectSTAExistance(PDM_ODM_T pDM_Odm, PODM_RA_INFO_T pRAInfo, int MacID);
RTL8188E_DetectSTAExistance(pDM_Odm, pRAInfo, MacId);
#endif
#endif
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
("macid=%d R0=%d R1=%d R2=%d R3=%d R4=%d drop=%d valid0=%x RateID=%d SGI=%d\n",
MacId,

1470
hal/HalPhyRf.c
View file

File diff suppressed because it is too large Load diff

755
hal/HalPhyRf_8188e.c
View file

File diff suppressed because it is too large Load diff

5947
hal/odm.c
View file

File diff suppressed because it is too large Load diff

178
hal/odm_HWConfig.c
View file

@ -50,7 +50,6 @@ static u1Byte odm_QueryRxPwrPercentage(s1Byte AntPower)
return (100+AntPower);
}
#if (DM_ODM_SUPPORT_TYPE != ODM_MP)
/* */
/* 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */
/* IF other SW team do not support the feature, remove this section.?? */
@ -61,34 +60,6 @@ static s4Byte odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(
)
{
s4Byte RetSig;
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
/* if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) */
{
/* Step 1. Scale mapping. */
/* 20100611 Joseph: Re-tunning RSSI presentation for Lenovo. */
/* 20100426 Joseph: Modify Signal strength mapping. */
/* This modification makes the RSSI indication similar to Intel solution. */
/* 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE. */
if (CurrSig >= 54 && CurrSig <= 100)
RetSig = 100;
else if (CurrSig>=42 && CurrSig <= 53)
RetSig = 95;
else if (CurrSig>=36 && CurrSig <= 41)
RetSig = 74 + ((CurrSig - 36) *20)/6;
else if (CurrSig>=33 && CurrSig <= 35)
RetSig = 65 + ((CurrSig - 33) *8)/2;
else if (CurrSig>=18 && CurrSig <= 32)
RetSig = 62 + ((CurrSig - 18) *2)/15;
else if (CurrSig>=15 && CurrSig <= 17)
RetSig = 33 + ((CurrSig - 15) *28)/2;
else if (CurrSig>=10 && CurrSig <= 14)
RetSig = 39;
else if (CurrSig>=8 && CurrSig <= 9)
RetSig = 33;
else if (CurrSig <= 8)
RetSig = 19;
}
#endif /* ENDIF (DM_ODM_SUPPORT_TYPE == ODM_MP) */
return RetSig;
}
@ -98,60 +69,9 @@ static s4Byte odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(
)
{
s4Byte RetSig;
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
/* if (pDM_Odm->SupportInterface == ODM_ITRF_USB) */
{
/* Netcore request this modification because 2009.04.13 SU driver use it. */
if (CurrSig >= 31 && CurrSig <= 100)
{
RetSig = 100;
}
else if (CurrSig >= 21 && CurrSig <= 30)
{
RetSig = 90 + ((CurrSig - 20) / 1);
}
else if (CurrSig >= 11 && CurrSig <= 20)
{
RetSig = 80 + ((CurrSig - 10) / 1);
}
else if (CurrSig >= 7 && CurrSig <= 10)
{
RetSig = 69 + (CurrSig - 7);
}
else if (CurrSig == 6)
{
RetSig = 54;
}
else if (CurrSig == 5)
{
RetSig = 45;
}
else if (CurrSig == 4)
{
RetSig = 36;
}
else if (CurrSig == 3)
{
RetSig = 27;
}
else if (CurrSig == 2)
{
RetSig = 18;
}
else if (CurrSig == 1)
{
RetSig = 9;
}
else
{
RetSig = CurrSig;
}
}
#endif /* ENDIF (DM_ODM_SUPPORT_TYPE == ODM_MP) */
return RetSig;
}
static s4Byte
odm_SignalScaleMapping_92CSeries(
PDM_ODM_T pDM_Odm,
@ -268,7 +188,6 @@ odm_SignalScaleMapping(
}
}
#endif
/* pMgntInfo->CustomerID == RT_CID_819x_Lenovo */
static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo(
@ -280,39 +199,6 @@ static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo(
)
{
u1Byte SQ;
#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
/* mapping to 5 bars for vista signal strength */
/* signal quality in driver will be displayed to signal strength */
if (isCCKrate){
/* in vista. */
if (PWDB_ALL >= 50)
SQ = 100;
else if (PWDB_ALL >= 35 && PWDB_ALL < 50)
SQ = 80;
else if (PWDB_ALL >= 22 && PWDB_ALL < 35)
SQ = 60;
else if (PWDB_ALL >= 18 && PWDB_ALL < 22)
SQ = 40;
else
SQ = 20;
}
else{/* OFDM rate */
/* mapping to 5 bars for vista signal strength */
/* signal quality in driver will be displayed to signal strength */
/* in vista. */
if (RSSI >= 50)
SQ = 100;
else if (RSSI >= 35 && RSSI < 50)
SQ = 80;
else if (RSSI >= 22 && RSSI < 35)
SQ = 60;
else if (RSSI >= 18 && RSSI < 22)
SQ = 40;
else
SQ = 20;
}
#endif
return SQ;
}
@ -518,10 +404,8 @@ odm_RxPhyStatus92CSeries_Parsing(
}
pPhyInfo->RxPWDBAll = PWDB_ALL;
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
pPhyInfo->RecvSignalPower = rx_pwr_all;
#endif
/* */
/* (3) Get Signal Quality (EVM) */
/* */
@ -571,9 +455,7 @@ odm_RxPhyStatus92CSeries_Parsing(
rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110;
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
pPhyInfo->RxPwr[i] = rx_pwr[i];
#endif
/* Translate DBM to percentage. */
RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
@ -594,10 +476,8 @@ odm_RxPhyStatus92CSeries_Parsing(
pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI;
#if (DM_ODM_SUPPORT_TYPE & (/*ODM_MP|*/ODM_CE|ODM_AP|ODM_ADSL))
/* Get Rx snr value in DB */
pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2);
#endif
/* Record Signal Strength for next packet */
if (pPktinfo->bPacketMatchBSSID)
@ -624,11 +504,9 @@ odm_RxPhyStatus92CSeries_Parsing(
pPhyInfo->RxPWDBAll = PWDB_ALL;
/* ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll)); */
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
pPhyInfo->RxPower = rx_pwr_all;
pPhyInfo->RecvSignalPower = rx_pwr_all;
#endif
if ((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)){
/* do nothing */
@ -664,31 +542,19 @@ odm_RxPhyStatus92CSeries_Parsing(
}
}
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
/* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
/* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
if (isCCKrate)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
/* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ */
pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));/* PWDB_ALL; */
#else
pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/* PWDB_ALL; */
#endif
}
else
{
if (rf_rx_num != 0)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
/* 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ */
pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));/* PWDB_ALL; */
#else
pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num));
#endif
}
}
#endif
/* For 92C/92D HW (Hybrid) Antenna Diversity */
pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;
@ -993,8 +859,6 @@ ODM_MacStatusQuery(
}
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE|ODM_AP))
HAL_STATUS
ODM_ConfigRFWithHeaderFile(
PDM_ODM_T pDM_Odm,
@ -1006,19 +870,6 @@ ODM_ConfigRFWithHeaderFile(
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigRFWithHeaderFile\n"));
#if (RTL8723A_SUPPORT == 1)
if (pDM_Odm->SupportICType == ODM_RTL8723A)
{
if (eRFPath == ODM_RF_PATH_A)
READ_AND_CONFIG_MP(8723A,_RadioA_1T_);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_A:Rtl8723RadioA_1TArray\n"));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_B:Rtl8723RadioB_1TArray\n"));
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("ODM_ConfigRFWithHeaderFile: Radio No %x\n", eRFPath));
/* rtStatus = RT_STATUS_SUCCESS; */
#endif
#if (RTL8188E_SUPPORT == 1)
if (pDM_Odm->SupportICType == ODM_RTL8188E)
{
@ -1043,22 +894,6 @@ ODM_ConfigBBWithHeaderFile(
ODM_BB_Config_Type ConfigType
)
{
#if (RTL8723A_SUPPORT == 1)
if (pDM_Odm->SupportICType == ODM_RTL8723A)
{
if (ConfigType == CONFIG_BB_PHY_REG)
{
READ_AND_CONFIG_MP(8723A,_PHY_REG_1T_);
}
else if (ConfigType == CONFIG_BB_AGC_TAB)
{
READ_AND_CONFIG_MP(8723A,_AGC_TAB_1T_);
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8723AGCTAB_1TArray\n"));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8723PHY_REG_1TArray\n"));
}
#endif
#if (RTL8188E_SUPPORT == 1)
if (pDM_Odm->SupportICType == ODM_RTL8188E)
@ -1068,10 +903,6 @@ ODM_ConfigBBWithHeaderFile(
{
READ_AND_CONFIG(8188E,_PHY_REG_1T_);
}
/* else if (ConfigType == ODM_BaseBand_Config_PHY_REG_MP) */
/* { */
/* READ_AND_CONFIG(8188E,_PHY_REG_MP_); */
/* } */
else if (ConfigType == CONFIG_BB_AGC_TAB)
{
READ_AND_CONFIG(8188E,_AGC_TAB_1T_);
@ -1093,12 +924,6 @@ ODM_ConfigMACWithHeaderFile(
)
{
u1Byte result = HAL_STATUS_SUCCESS;
#if (RTL8723A_SUPPORT == 1)
if (pDM_Odm->SupportICType == ODM_RTL8723A)
{
READ_AND_CONFIG_MP(8723A,_MAC_REG_);
}
#endif
#if (RTL8188E_SUPPORT == 1)
if (pDM_Odm->SupportICType == ODM_RTL8188E)
{
@ -1108,6 +933,3 @@ ODM_ConfigMACWithHeaderFile(
return result;
}
#endif /* end of (#if DM_ODM_SUPPORT_TYPE) */

717
hal/odm_RTL8188E.c
View file

@ -305,7 +305,6 @@ odm_UpdateTxAnt_88E(PDM_ODM_T pDM_Odm, u1Byte Ant, u4Byte MacId)
pDM_FatTable->antsel_c[MacId] , pDM_FatTable->antsel_b[MacId] , pDM_FatTable->antsel_a[MacId] ));
}
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
void
ODM_SetTxAntByTxInfo_88E(
PDM_ODM_T pDM_Odm,
@ -322,14 +321,6 @@ ODM_SetTxAntByTxInfo_88E(
SET_TX_DESC_ANTSEL_C_88E(pDesc, pDM_FatTable->antsel_c[macId]);
}
}
#else/* (DM_ODM_SUPPORT_TYPE == ODM_AP) */
void
ODM_SetTxAntByTxInfo_88E(
PDM_ODM_T pDM_Odm
)
{
}
#endif
void
ODM_AntselStatistics_88E(
@ -440,186 +431,6 @@ odm_HWAntDiv(
pDM_DigTable->RSSI_max = MaxRSSI;
}
#if (!(DM_ODM_SUPPORT_TYPE == ODM_CE))
void
odm_SetNextMACAddrTarget(
PDM_ODM_T pDM_Odm
)
{
pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
PSTA_INFO_T pEntry;
/* u1Byte Bssid[6]; */
u4Byte value32, i;
/* */
/* 2012.03.26 LukeLee: The MAC address is changed according to MACID in turn */
/* */
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SetNextMACAddrTarget() ==>\n"));
if (pDM_Odm->bLinked)
{
for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
{
if ((pDM_FatTable->TrainIdx+1) == ODM_ASSOCIATE_ENTRY_NUM)
pDM_FatTable->TrainIdx = 0;
else
pDM_FatTable->TrainIdx++;
pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx];
if (IS_STA_VALID(pEntry))
{
/* Match MAC ADDR */
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
value32 = (pEntry->hwaddr[5]<<8)|pEntry->hwaddr[4];
#else
value32 = (pEntry->MacAddr[5]<<8)|pEntry->MacAddr[4];
#endif
ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, value32);
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
value32 = (pEntry->hwaddr[3]<<24)|(pEntry->hwaddr[2]<<16) |(pEntry->hwaddr[1]<<8) |pEntry->hwaddr[0];
#else
value32 = (pEntry->MacAddr[3]<<24)|(pEntry->MacAddr[2]<<16) |(pEntry->MacAddr[1]<<8) |pEntry->MacAddr[0];
#endif
ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, value32);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_FatTable->TrainIdx=%d\n",pDM_FatTable->TrainIdx));
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n",
pEntry->hwaddr[5],pEntry->hwaddr[4],pEntry->hwaddr[3],pEntry->hwaddr[2],pEntry->hwaddr[1],pEntry->hwaddr[0]));
#else
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n",
pEntry->MacAddr[5],pEntry->MacAddr[4],pEntry->MacAddr[3],pEntry->MacAddr[2],pEntry->MacAddr[1],pEntry->MacAddr[0]));
#endif
break;
}
}
}
}
void
odm_FastAntTraining(
PDM_ODM_T pDM_Odm
)
{
u4Byte i, MaxRSSI=0;
u1Byte TargetAnt=2;
pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
bool bPktFilterMacth = false;
PSTA_INFO_T pEntry;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("==>odm_FastAntTraining()\n"));
/* 1 TRAINING STATE */
if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Enter FAT_TRAINING_STATE\n"));
/* 2 Caculate RSSI per Antenna */
for (i=0; i<7; i++)
{
if (pDM_FatTable->antRSSIcnt[i] == 0)
pDM_FatTable->antAveRSSI[i] = 0;
else
{
pDM_FatTable->antAveRSSI[i] = pDM_FatTable->antSumRSSI[i] /pDM_FatTable->antRSSIcnt[i];
bPktFilterMacth = true;
}
if (pDM_FatTable->antAveRSSI[i] > MaxRSSI)
{
MaxRSSI = pDM_FatTable->antAveRSSI[i];
TargetAnt = (u1Byte) i;
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_FatTable->antAveRSSI[%d] = %d, pDM_FatTable->antRSSIcnt[%d] = %d\n",
i, pDM_FatTable->antAveRSSI[i], i, pDM_FatTable->antRSSIcnt[i]));
}
/* 2 Select TRX Antenna */
if (bPktFilterMacth == false)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("None Packet is matched\n"));
ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 0); /* RegE08[16]=1'b0 disable fast training */
ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); /* RegC50[7]=1'b0 disable HW AntDiv */
}
else
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TargetAnt=%d, MaxRSSI=%d\n",TargetAnt,MaxRSSI));
ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 0); /* RegE08[16]=1'b0 disable fast training */
ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, TargetAnt); /* Default RX is Omni, Optional RX is the best decision by FAT */
ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 1); /* Reg80c[21]=1'b1 from TX Info */
pDM_FatTable->antsel_a[pDM_FatTable->TrainIdx] = TargetAnt&BIT0;
pDM_FatTable->antsel_b[pDM_FatTable->TrainIdx] = (TargetAnt&BIT1)>>1;
pDM_FatTable->antsel_c[pDM_FatTable->TrainIdx] = (TargetAnt&BIT2)>>2;
if (TargetAnt == 0)
ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); /* RegC50[7]=1'b0 disable HW AntDiv */
}
/* 2 Reset Counter */
for (i=0; i<7; i++)
{
pDM_FatTable->antSumRSSI[i] = 0;
pDM_FatTable->antRSSIcnt[i] = 0;
}
pDM_FatTable->FAT_State = FAT_NORMAL_STATE;
return;
}
/* 1 NORMAL STATE */
if (pDM_FatTable->FAT_State == FAT_NORMAL_STATE)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Enter FAT_NORMAL_STATE\n"));
odm_SetNextMACAddrTarget(pDM_Odm);
/* 2 Prepare Training */
pDM_FatTable->FAT_State = FAT_TRAINING_STATE;
ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 1); /* RegE08[16]=1'b1 enable fast training */
ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 1); /* RegC50[7]=1'b1 enable HW AntDiv */
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Start FAT_TRAINING_STATE\n"));
ODM_SetTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, 500 ); /* ms */
}
}
void
odm_FastAntTrainingCallback(
PDM_ODM_T pDM_Odm
)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PADAPTER padapter = pDM_Odm->Adapter;
if (padapter->net_closed == true)
return;
#endif
#if USE_WORKITEM
ODM_ScheduleWorkItem(&pDM_Odm->FastAntTrainingWorkitem);
#else
odm_FastAntTraining(pDM_Odm);
#endif
}
void
odm_FastAntTrainingWorkItemCallback(
PDM_ODM_T pDM_Odm
)
{
odm_FastAntTraining(pDM_Odm);
}
#endif
void
ODM_AntennaDiversity_88E(
PDM_ODM_T pDM_Odm
@ -697,10 +508,6 @@ ODM_AntennaDiversity_88E(
if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV))
odm_HWAntDiv(pDM_Odm);
#if (!(DM_ODM_SUPPORT_TYPE == ODM_CE))
else if (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)
odm_FastAntTraining(pDM_Odm);
#endif
}
/* 3============================================================ */
@ -738,10 +545,6 @@ odm_DynamicPrimaryCCA(
prtl8192cd_priv priv = pDM_Odm->priv; /* for AP */
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP))
PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
PRT_WLAN_STA pEntry;
#endif
Pfalse_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
pPri_CCA_T PrimaryCCA = &(pDM_Odm->DM_PriCCA);
@ -759,9 +562,7 @@ odm_DynamicPrimaryCCA(
u1Byte SecCHOffset;
u1Byte i;
#if ((DM_ODM_SUPPORT_TYPE==ODM_ADSL) ||( DM_ODM_SUPPORT_TYPE==ODM_CE))
return;
#endif
if (pDM_Odm->SupportICType != ODM_RTL8188E)
return;
@ -770,23 +571,6 @@ odm_DynamicPrimaryCCA(
SecCHOffset = *(pDM_Odm->pSecChOffset);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Second CH Offset = %d\n", SecCHOffset));
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
if (Is40MHz==1)
SecCHOffset = SecCHOffset%2+1; /* NIC's definition is reverse to AP 1:secondary below, 2: secondary above */
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Second CH Offset = %d\n", SecCHOffset));
/* 3 Check Current WLAN Traffic */
curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - lastTxOkCnt;
curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - lastRxOkCnt;
lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast;
lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast;
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
/* 3 Check Current WLAN Traffic */
curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast)-lastTxOkCnt;
curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast)-lastRxOkCnt;
lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast);
lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast);
#endif
/* Debug Message==================== */
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("TP = %llu\n", curTxOkCnt+curRxOkCnt));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Is40MHz = %d\n", Is40MHz));
@ -798,302 +582,251 @@ odm_DynamicPrimaryCCA(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCK FA = %d\n", FalseAlmCnt->Cnt_Cck_fail));
/* */
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
if (ACTING_AS_AP(Adapter)) /* primary cca process only do at AP mode */
#endif
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("bConnected=%d\n", bConnected));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Is Client 40MHz=%d\n", Client_40MHz));
/* 1 Monitor whether the interference exists or not */
if (PrimaryCCA->Monitor_flag == 1)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("ACTING as AP mode=%d\n", ACTING_AS_AP(Adapter)));
/* 3 To get entry's connection and BW infomation status. */
for (i=0;i<ASSOCIATE_ENTRY_NUM;i++)
if (SecCHOffset == 1) /* secondary channel is below the primary channel */
{
if (IsAPModeExist(Adapter)&&GetFirstExtAdapter(Adapter)!=NULL)
pEntry=AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i);
else
pEntry=AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i);
if (pEntry!=NULL)
if ((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_LSC > FalseAlmCnt->Cnt_BW_USC+500))
{
Client_tmp = pEntry->HTInfo.bBw40MHz; /* client BW */
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Client_BW=%d\n", Client_tmp));
if (Client_tmp>Client_40MHz)
Client_40MHz = Client_tmp; /* 40M/20M coexist => 40M priority is High */
if (pEntry->bAssociated)
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
{
bConnected=true; /* client is connected or not */
break;
}
}
else
{
break;
}
}
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
/* 3 To get entry's connection and BW infomation status. */
PSTA_INFO_T pstat;
for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
{
pstat = pDM_Odm->pODM_StaInfo[i];
if (IS_STA_VALID(pstat) )
{
Client_tmp = pstat->tx_bw;
if (Client_tmp>Client_40MHz)
Client_40MHz = Client_tmp; /* 40M/20M coexist => 40M priority is High */
bConnected = true;
}
}
#endif
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("bConnected=%d\n", bConnected));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Is Client 40MHz=%d\n", Client_40MHz));
/* 1 Monitor whether the interference exists or not */
if (PrimaryCCA->Monitor_flag == 1)
{
if (SecCHOffset == 1) /* secondary channel is below the primary channel */
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_LSC > FalseAlmCnt->Cnt_BW_USC+500))
{
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
{
PrimaryCCA->intf_type = 1;
PrimaryCCA->PriCCA_flag = 1;
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2); /* USC MF */
if (PrimaryCCA->DupRTS_flag == 1)
PrimaryCCA->DupRTS_flag = 0;
}
else
{
PrimaryCCA->intf_type = 2;
if (PrimaryCCA->DupRTS_flag == 0)
PrimaryCCA->DupRTS_flag = 1;
}
}
else /* interferecne disappear */
{
PrimaryCCA->DupRTS_flag = 0;
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
}
}
else if (SecCHOffset == 2) /* secondary channel is above the primary channel */
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_USC > FalseAlmCnt->Cnt_BW_LSC+500))
{
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
{
PrimaryCCA->intf_type = 1;
PrimaryCCA->PriCCA_flag = 1;
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1); /* LSC MF */
if (PrimaryCCA->DupRTS_flag == 1)
PrimaryCCA->DupRTS_flag = 0;
}
else
{
PrimaryCCA->intf_type = 2;
if (PrimaryCCA->DupRTS_flag == 0)
PrimaryCCA->DupRTS_flag = 1;
}
}
else /* interferecne disappear */
{
PrimaryCCA->DupRTS_flag = 0;
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
}
}
PrimaryCCA->Monitor_flag = 0;
}
/* 1 Dynamic Primary CCA Main Function */
if (PrimaryCCA->Monitor_flag == 0)
{
if (Is40MHz) /* if RFBW==40M mode which require to process primary cca */
{
/* 2 STA is NOT Connected */
if (!bConnected)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA NOT Connected!!!!\n"));
if (PrimaryCCA->PriCCA_flag == 1) /* reset primary cca when STA is disconnected */
{
PrimaryCCA->PriCCA_flag = 0;
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 0);
}
if (PrimaryCCA->DupRTS_flag == 1) /* reset Duplicate RTS when STA is disconnected */
PrimaryCCA->intf_type = 1;
PrimaryCCA->PriCCA_flag = 1;
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2); /* USC MF */
if (PrimaryCCA->DupRTS_flag == 1)
PrimaryCCA->DupRTS_flag = 0;
if (SecCHOffset == 1) /* secondary channel is below the primary channel */
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9))
{
PrimaryCCA->intf_flag = 1; /* secondary channel interference is detected!!! */
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
}
else
{
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
}
}
else if (SecCHOffset == 2) /* secondary channel is above the primary channel */
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9))
{
PrimaryCCA->intf_flag = 1; /* secondary channel interference is detected!!! */
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
}
else
{
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
}
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("PrimaryCCA=%d\n",PrimaryCCA->PriCCA_flag));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Intf_Type=%d\n", PrimaryCCA->intf_type));
}
/* 2 STA is Connected */
else
{
if (Client_40MHz == 0) /* 3 client BW = 20MHz */
{
if (PrimaryCCA->PriCCA_flag == 0)
{
PrimaryCCA->PriCCA_flag = 1;
if (SecCHOffset==1)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2);
else if (SecCHOffset==2)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1);
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA Connected 20M!!! PrimaryCCA=%d\n", PrimaryCCA->PriCCA_flag));
}
else /* 3 client BW = 40MHz */
{
if (PrimaryCCA->intf_flag == 1) /* interference is detected!! */
{
if (PrimaryCCA->intf_type == 1)
{
if (PrimaryCCA->PriCCA_flag!=1)
{
PrimaryCCA->PriCCA_flag = 1;
if (SecCHOffset==1)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2);
else if (SecCHOffset==2)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1);
}
}
else if (PrimaryCCA->intf_type == 2)
{
if (PrimaryCCA->DupRTS_flag!=1)
PrimaryCCA->DupRTS_flag = 1;
}
}
else /* if intf_flag==0 */
{
if ((curTxOkCnt+curRxOkCnt)<10000) /* idle mode or TP traffic is very low */
{
if (SecCHOffset == 1)
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9))
{
PrimaryCCA->intf_flag = 1;
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
}
}
else if (SecCHOffset == 2)
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9))
{
PrimaryCCA->intf_flag = 1;
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
}
PrimaryCCA->intf_type = 2;
if (PrimaryCCA->DupRTS_flag == 0)
PrimaryCCA->DupRTS_flag = 1;
}
}
}
else /* TP Traffic is High */
{
if (SecCHOffset == 1)
{
if (FalseAlmCnt->Cnt_BW_LSC > (FalseAlmCnt->Cnt_BW_USC+500))
{
if (Delay == 0) /* add delay to avoid interference occurring abruptly, jump one time */
{
PrimaryCCA->intf_flag = 1;
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
Delay = 1;
}
else
Delay = 0;
}
}
else if (SecCHOffset == 2)
{
if (FalseAlmCnt->Cnt_BW_USC > (FalseAlmCnt->Cnt_BW_LSC+500))
{
if (Delay == 0) /* add delay to avoid interference occurring abruptly */
{
PrimaryCCA->intf_flag = 1;
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
Delay = 1;
}
else
Delay = 0;
}
}
}
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Primary CCA=%d\n", PrimaryCCA->PriCCA_flag));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Duplicate RTS=%d\n", PrimaryCCA->DupRTS_flag));
}
}/* end of connected */
}
else /* interferecne disappear */
{
PrimaryCCA->DupRTS_flag = 0;
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
}
}
/* 1 Dynamic Primary CCA Monitor Counter */
if ((PrimaryCCA->PriCCA_flag == 1)||(PrimaryCCA->DupRTS_flag == 1))
else if (SecCHOffset == 2) /* secondary channel is above the primary channel */
{
if (Client_40MHz == 0) /* client=20M no need to monitor primary cca flag */
if ((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_USC > FalseAlmCnt->Cnt_BW_LSC+500))
{
Client_40MHz_pre = Client_40MHz;
return;
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
{
PrimaryCCA->intf_type = 1;
PrimaryCCA->PriCCA_flag = 1;
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1); /* LSC MF */
if (PrimaryCCA->DupRTS_flag == 1)
PrimaryCCA->DupRTS_flag = 0;
}
else
{
PrimaryCCA->intf_type = 2;
if (PrimaryCCA->DupRTS_flag == 0)
PrimaryCCA->DupRTS_flag = 1;
}
}
Counter++;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Counter=%d\n", Counter));
if ((Counter == 30)||((Client_40MHz -Client_40MHz_pre)==1)) /* Every 60 sec to monitor one time */
else /* interferecne disappear */
{
PrimaryCCA->Monitor_flag = 1; /* monitor flag is triggered!!!!! */
if (PrimaryCCA->PriCCA_flag == 1)
PrimaryCCA->DupRTS_flag = 0;
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
}
}
PrimaryCCA->Monitor_flag = 0;
}
/* 1 Dynamic Primary CCA Main Function */
if (PrimaryCCA->Monitor_flag == 0)
{
if (Is40MHz) /* if RFBW==40M mode which require to process primary cca */
{
/* 2 STA is NOT Connected */
if (!bConnected)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA NOT Connected!!!!\n"));
if (PrimaryCCA->PriCCA_flag == 1) /* reset primary cca when STA is disconnected */
{
PrimaryCCA->PriCCA_flag = 0;
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 0);
}
Counter = 0;
if (PrimaryCCA->DupRTS_flag == 1) /* reset Duplicate RTS when STA is disconnected */
PrimaryCCA->DupRTS_flag = 0;
if (SecCHOffset == 1) /* secondary channel is below the primary channel */
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9))
{
PrimaryCCA->intf_flag = 1; /* secondary channel interference is detected!!! */
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
}
else
{
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
}
}
else if (SecCHOffset == 2) /* secondary channel is above the primary channel */
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9))
{
PrimaryCCA->intf_flag = 1; /* secondary channel interference is detected!!! */
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
}
else
{
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
}
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("PrimaryCCA=%d\n",PrimaryCCA->PriCCA_flag));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Intf_Type=%d\n", PrimaryCCA->intf_type));
}
/* 2 STA is Connected */
else
{
if (Client_40MHz == 0) /* 3 client BW = 20MHz */
{
if (PrimaryCCA->PriCCA_flag == 0)
{
PrimaryCCA->PriCCA_flag = 1;
if (SecCHOffset==1)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2);
else if (SecCHOffset==2)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1);
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA Connected 20M!!! PrimaryCCA=%d\n", PrimaryCCA->PriCCA_flag));
}
else /* 3 client BW = 40MHz */
{
if (PrimaryCCA->intf_flag == 1) /* interference is detected!! */
{
if (PrimaryCCA->intf_type == 1)
{
if (PrimaryCCA->PriCCA_flag!=1)
{
PrimaryCCA->PriCCA_flag = 1;
if (SecCHOffset==1)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2);
else if (SecCHOffset==2)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1);
}
}
else if (PrimaryCCA->intf_type == 2)
{
if (PrimaryCCA->DupRTS_flag!=1)
PrimaryCCA->DupRTS_flag = 1;
}
}
else /* if intf_flag==0 */
{
if ((curTxOkCnt+curRxOkCnt)<10000) /* idle mode or TP traffic is very low */
{
if (SecCHOffset == 1)
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9))
{
PrimaryCCA->intf_flag = 1;
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
}
}
else if (SecCHOffset == 2)
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9))
{
PrimaryCCA->intf_flag = 1;
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
}
}
}
else /* TP Traffic is High */
{
if (SecCHOffset == 1)
{
if (FalseAlmCnt->Cnt_BW_LSC > (FalseAlmCnt->Cnt_BW_USC+500))
{
if (Delay == 0) /* add delay to avoid interference occurring abruptly, jump one time */
{
PrimaryCCA->intf_flag = 1;
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
Delay = 1;
}
else
Delay = 0;
}
}
else if (SecCHOffset == 2)
{
if (FalseAlmCnt->Cnt_BW_USC > (FalseAlmCnt->Cnt_BW_LSC+500))
{
if (Delay == 0) /* add delay to avoid interference occurring abruptly */
{
PrimaryCCA->intf_flag = 1;
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
Delay = 1;
}
else
Delay = 0;
}
}
}
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Primary CCA=%d\n", PrimaryCCA->PriCCA_flag));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Duplicate RTS=%d\n", PrimaryCCA->DupRTS_flag));
}
}/* end of connected */
}
}
/* 1 Dynamic Primary CCA Monitor Counter */
if ((PrimaryCCA->PriCCA_flag == 1)||(PrimaryCCA->DupRTS_flag == 1))
{
if (Client_40MHz == 0) /* client=20M no need to monitor primary cca flag */
{
Client_40MHz_pre = Client_40MHz;
return;
}
Counter++;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Counter=%d\n", Counter));
if ((Counter == 30)||((Client_40MHz -Client_40MHz_pre)==1)) /* Every 60 sec to monitor one time */
{
PrimaryCCA->Monitor_flag = 1; /* monitor flag is triggered!!!!! */
if (PrimaryCCA->PriCCA_flag == 1)
{
PrimaryCCA->PriCCA_flag = 0;
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 0);
}
Counter = 0;
}
}

4
hal/odm_RegConfig8188E.c
View file

@ -149,12 +149,8 @@ odm_ConfigBB_PHY_REG_PG_8188E(
}
else{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, ("===> @@@@@@@ ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data));
#if !(DM_ODM_SUPPORT_TYPE&ODM_AP)
storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data);
#endif
}
}
void

512
hal/odm_interface.c
View file

@ -27,227 +27,107 @@
/* ODM IO Relative API. */
/* */
u1Byte
ODM_Read1Byte(
PDM_ODM_T pDM_Odm,
u4Byte RegAddr
)
u1Byte ODM_Read1Byte(PDM_ODM_T pDM_Odm, u4Byte RegAddr)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
return RTL_R8(RegAddr);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
PADAPTER Adapter = pDM_Odm->Adapter;
return rtw_read8(Adapter,RegAddr);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
return PlatformEFIORead1Byte(Adapter, RegAddr);
#endif
}
u2Byte
ODM_Read2Byte(
PDM_ODM_T pDM_Odm,
u4Byte RegAddr
)
u2Byte ODM_Read2Byte(PDM_ODM_T pDM_Odm, u4Byte RegAddr)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
return RTL_R16(RegAddr);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
PADAPTER Adapter = pDM_Odm->Adapter;
return rtw_read16(Adapter,RegAddr);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
return PlatformEFIORead2Byte(Adapter, RegAddr);
#endif
}
u4Byte
ODM_Read4Byte(
PDM_ODM_T pDM_Odm,
u4Byte RegAddr
)
u4Byte ODM_Read4Byte(PDM_ODM_T pDM_Odm, u4Byte RegAddr)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
return RTL_R32(RegAddr);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
PADAPTER Adapter = pDM_Odm->Adapter;
return rtw_read32(Adapter,RegAddr);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
return PlatformEFIORead4Byte(Adapter, RegAddr);
#endif
}
void
ODM_Write1Byte(
PDM_ODM_T pDM_Odm,
u4Byte RegAddr,
u1Byte Data
)
void ODM_Write1Byte(PDM_ODM_T pDM_Odm, u4Byte RegAddr, u1Byte Data)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
RTL_W8(RegAddr, Data);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_write8(Adapter,RegAddr, Data);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformEFIOWrite1Byte(Adapter, RegAddr, Data);
#endif
}
void
ODM_Write2Byte(
PDM_ODM_T pDM_Odm,
u4Byte RegAddr,
u2Byte Data
)
void ODM_Write2Byte(PDM_ODM_T pDM_Odm, u4Byte RegAddr, u2Byte Data)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
RTL_W16(RegAddr, Data);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_write16(Adapter,RegAddr, Data);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformEFIOWrite2Byte(Adapter, RegAddr, Data);
#endif
}
void
ODM_Write4Byte(
PDM_ODM_T pDM_Odm,
u4Byte RegAddr,
u4Byte Data
)
void ODM_Write4Byte(PDM_ODM_T pDM_Odm, u4Byte RegAddr, u4Byte Data)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
RTL_W32(RegAddr, Data);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_write32(Adapter,RegAddr, Data);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformEFIOWrite4Byte(Adapter, RegAddr, Data);
#endif
}
void
ODM_SetMACReg(
PDM_ODM_T pDM_Odm,
u4Byte RegAddr,
u4Byte BitMask,
u4Byte Data
)
void ODM_SetMACReg(PDM_ODM_T pDM_Odm, u4Byte RegAddr, u4Byte BitMask, u4Byte Data)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data);
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
PADAPTER Adapter = pDM_Odm->Adapter;
PADAPTER Adapter = pDM_Odm->Adapter;
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
#endif
}
u4Byte
ODM_GetMACReg(
PDM_ODM_T pDM_Odm,
u4Byte RegAddr,
u4Byte BitMask
PDM_ODM_T pDM_Odm,
u4Byte RegAddr,
u4Byte BitMask
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask);
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
PADAPTER Adapter = pDM_Odm->Adapter;
PADAPTER Adapter = pDM_Odm->Adapter;
return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
#endif
}
void
ODM_SetBBReg(
PDM_ODM_T pDM_Odm,
u4Byte RegAddr,
u4Byte BitMask,
u4Byte Data
PDM_ODM_T pDM_Odm,
u4Byte RegAddr,
u4Byte BitMask,
u4Byte Data
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data);
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
PADAPTER Adapter = pDM_Odm->Adapter;
PADAPTER Adapter = pDM_Odm->Adapter;
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
#endif
}
u4Byte
ODM_GetBBReg(
PDM_ODM_T pDM_Odm,
u4Byte RegAddr,
u4Byte BitMask
PDM_ODM_T pDM_Odm,
u4Byte RegAddr,
u4Byte BitMask
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask);
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
PADAPTER Adapter = pDM_Odm->Adapter;
PADAPTER Adapter = pDM_Odm->Adapter;
return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
#endif
}
void
ODM_SetRFReg(
PDM_ODM_T pDM_Odm,
PDM_ODM_T pDM_Odm,
ODM_RF_RADIO_PATH_E eRFPath,
u4Byte RegAddr,
u4Byte BitMask,
u4Byte Data
u4Byte RegAddr,
u4Byte BitMask,
u4Byte Data
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
PHY_SetRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, Data);
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
PADAPTER Adapter = pDM_Odm->Adapter;
PADAPTER Adapter = pDM_Odm->Adapter;
PHY_SetRFReg(Adapter, (enum _RF_RADIO_PATH)eRFPath, RegAddr, BitMask, Data);
#endif
}
u4Byte
ODM_GetRFReg(
PDM_ODM_T pDM_Odm,
PDM_ODM_T pDM_Odm,
ODM_RF_RADIO_PATH_E eRFPath,
u4Byte RegAddr,
u4Byte BitMask
u4Byte RegAddr,
u4Byte BitMask
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return PHY_QueryRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, 1);
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
PADAPTER Adapter = pDM_Odm->Adapter;
PADAPTER Adapter = pDM_Odm->Adapter;
return PHY_QueryRFReg(Adapter, (enum _RF_RADIO_PATH)eRFPath, RegAddr, BitMask);
#endif
}
@ -258,404 +138,152 @@ ODM_GetRFReg(
/* */
void
ODM_AllocateMemory(
PDM_ODM_T pDM_Odm,
PDM_ODM_T pDM_Odm,
void * *pPtr,
u4Byte length
u4Byte length
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
*pPtr = kmalloc(length, GFP_ATOMIC);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
*pPtr = rtw_zvmalloc(length);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformAllocateMemory(Adapter, pPtr, length);
#endif
}
/* length could be ignored, used to detect memory leakage. */
void
ODM_FreeMemory(
PDM_ODM_T pDM_Odm,
PDM_ODM_T pDM_Odm,
void * pPtr,
u4Byte length
u4Byte length
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
kfree(pPtr);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
rtw_vmfree(pPtr, length);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
/* PADAPTER Adapter = pDM_Odm->Adapter; */
PlatformFreeMemory(pPtr, length);
#endif
}
s4Byte ODM_CompareMemory(
PDM_ODM_T pDM_Odm,
PDM_ODM_T pDM_Odm,
void * pBuf1,
void * pBuf2,
u4Byte length
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return memcmp(pBuf1,pBuf2,length);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
return _rtw_memcmp(pBuf1,pBuf2,length);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
return PlatformCompareMemory(pBuf1,pBuf2,length);
#endif
}
/* */
/* ODM MISC relative API. */
/* */
void
ODM_AcquireSpinLock(
PDM_ODM_T pDM_Odm,
PDM_ODM_T pDM_Odm,
RT_SPINLOCK_TYPE type
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformAcquireSpinLock(Adapter, type);
#endif
}
void
ODM_ReleaseSpinLock(
PDM_ODM_T pDM_Odm,
PDM_ODM_T pDM_Odm,
RT_SPINLOCK_TYPE type
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformReleaseSpinLock(Adapter, type);
#endif
}
/* */
/* Work item relative API. FOr MP driver only~! */
/* */
void
ODM_InitializeWorkItem(
PDM_ODM_T pDM_Odm,
PRT_WORK_ITEM pRtWorkItem,
RT_WORKITEM_CALL_BACK RtWorkItemCallback,
void * pContext,
const char* szID
)
void ODM_InitializeWorkItem(PDM_ODM_T pDM_Odm, PRT_WORK_ITEM pRtWorkItem,
RT_WORKITEM_CALL_BACK RtWorkItemCallback,
void *pContext, const char*szID)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformInitializeWorkItem(Adapter, pRtWorkItem, RtWorkItemCallback, pContext, szID);
#endif
}
void
ODM_StartWorkItem(
PRT_WORK_ITEM pRtWorkItem
PRT_WORK_ITEM pRtWorkItem
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PlatformStartWorkItem(pRtWorkItem);
#endif
}
void
ODM_StopWorkItem(
PRT_WORK_ITEM pRtWorkItem
PRT_WORK_ITEM pRtWorkItem
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PlatformStopWorkItem(pRtWorkItem);
#endif
}
void
ODM_FreeWorkItem(
PRT_WORK_ITEM pRtWorkItem
)
void ODM_FreeWorkItem(PRT_WORK_ITEM pRtWorkItem)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PlatformFreeWorkItem(pRtWorkItem);
#endif
}
void
ODM_ScheduleWorkItem(
PRT_WORK_ITEM pRtWorkItem
)
void ODM_ScheduleWorkItem(PRT_WORK_ITEM pRtWorkItem)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PlatformScheduleWorkItem(pRtWorkItem);
#endif
}
void
ODM_IsWorkItemScheduled(
PRT_WORK_ITEM pRtWorkItem
)
void ODM_IsWorkItemScheduled(PRT_WORK_ITEM pRtWorkItem)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PlatformIsWorkItemScheduled(pRtWorkItem);
#endif
}
/* */
/* ODM Timer relative API. */
/* */
void
ODM_StallExecution(
u4Byte usDelay
)
void ODM_StallExecution(u4Byte usDelay)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_udelay_os(usDelay);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PlatformStallExecution(usDelay);
#endif
}
void
ODM_delay_ms(u4Byte ms)
void ODM_delay_ms(u4Byte ms)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
delay_ms(ms);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_mdelay_os(ms);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
delay_ms(ms);
#endif
}
void
ODM_delay_us(u4Byte us)
void ODM_delay_us(u4Byte us)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
delay_us(us);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_udelay_os(us);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PlatformStallExecution(us);
#endif
}
void
ODM_sleep_ms(u4Byte ms)
void ODM_sleep_ms(u4Byte ms)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_msleep_os(ms);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
#endif
}
void
ODM_sleep_us(u4Byte us)
void ODM_sleep_us(u4Byte us)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_usleep_os(us);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
#endif
}
void
ODM_SetTimer(
PDM_ODM_T pDM_Odm,
PRT_TIMER pTimer,
u4Byte msDelay
)
void ODM_SetTimer(PDM_ODM_T pDM_Odm, PRT_TIMER pTimer, u4Byte msDelay)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
mod_timer(pTimer, jiffies + (msDelay+9)/10);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
_set_timer(pTimer,msDelay ); /* ms */
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformSetTimer(Adapter, pTimer, msDelay);
#endif
}
void
ODM_InitializeTimer(
PDM_ODM_T pDM_Odm,
PRT_TIMER pTimer,
RT_TIMER_CALL_BACK CallBackFunc,
void * pContext,
const char* szID
)
void ODM_InitializeTimer(PDM_ODM_T pDM_Odm, PRT_TIMER pTimer,
RT_TIMER_CALL_BACK CallBackFunc, void *pContext,
const char *szID)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
pTimer->function = CallBackFunc;
pTimer->data = (unsigned long)pDM_Odm;
init_timer(pTimer);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
_init_timer(pTimer,Adapter->pnetdev,CallBackFunc,pDM_Odm);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformInitializeTimer(Adapter, pTimer, CallBackFunc,pContext,szID);
#endif
}
void
ODM_CancelTimer(
PDM_ODM_T pDM_Odm,
PRT_TIMER pTimer
)
void ODM_CancelTimer(PDM_ODM_T pDM_Odm, PRT_TIMER pTimer)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
del_timer_sync(pTimer);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
_cancel_timer_ex(pTimer);
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformCancelTimer(Adapter, pTimer);
#endif
}
void
ODM_ReleaseTimer(
PDM_ODM_T pDM_Odm,
PRT_TIMER pTimer
)
void ODM_ReleaseTimer(PDM_ODM_T pDM_Odm, PRT_TIMER pTimer)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
/* <20120301, Kordan> If the initilization fails, InitializeAdapterXxx will return regardless of InitHalDm. */
/* Hence, uninitialized timers cause BSOD when the driver releases resources since the init fail. */
if (pTimer == 0)
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_SERIOUS, ("=====>ODM_ReleaseTimer(), The timer is NULL! Please check it!\n"));
return;
}
PlatformReleaseTimer(Adapter, pTimer);
#endif
}
/* */
/* ODM FW relative API. */
/* */
#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
void
ODM_FillH2CCmd(
PADAPTER Adapter,
u1Byte ElementID,
u4Byte CmdLen,
pu1Byte pCmdBuffer
)
{
if (IS_HARDWARE_TYPE_JAGUAR(Adapter))
{
switch (ElementID)
{
case ODM_H2C_RSSI_REPORT:
FillH2CCmd8812(Adapter, H2C_8812_RSSI_REPORT, CmdLen, pCmdBuffer);
default:
break;
}
}
else if (IS_HARDWARE_TYPE_8188E(Adapter))
{
switch (ElementID)
{
case ODM_H2C_PSD_RESULT:
FillH2CCmd88E(Adapter, H2C_88E_PSD_RESULT, CmdLen, pCmdBuffer);
default:
break;
}
}
else
{
switch (ElementID)
{
case ODM_H2C_RSSI_REPORT:
FillH2CCmd92C(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer);
case ODM_H2C_PSD_RESULT:
FillH2CCmd92C(Adapter, H2C_92C_PSD_RESULT, CmdLen, pCmdBuffer);
default:
break;
}
}
}
#else
u4Byte
ODM_FillH2CCmd(
pu1Byte pH2CBuffer,
u4Byte H2CBufferLen,
u4Byte CmdNum,
pu4Byte pElementID,
pu4Byte pCmdLen,
pu1Byte pH2CBuffer,
u4Byte H2CBufferLen,
u4Byte CmdNum,
pu4Byte pElementID,
pu4Byte pCmdLen,
pu1Byte* pCmbBuffer,
pu1Byte CmdStartSeq
pu1Byte CmdStartSeq
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
/* FillH2CCmd(pH2CBuffer, H2CBufferLen, CmdNum, pElementID, pCmdLen, pCmbBuffer, CmdStartSeq); */
return false;
#endif
return true;
}
#endif

2
include/Hal8188ERateAdaptive.h
View file

@ -21,7 +21,6 @@ Major Change History:
#define RATESIZE 28
#define TX_RPT2_ITEM_SIZE 8
#if (DM_ODM_SUPPORT_TYPE != ODM_MP)
//
// TX report 2 format in Rx desc
//
@ -36,7 +35,6 @@ Major Change History:
#define GET_TX_REPORT_TYPE1_RERTY_4(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4+1, 0, 8)
#define GET_TX_REPORT_TYPE1_DROP_0(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4+2, 0, 8)
#define GET_TX_REPORT_TYPE1_DROP_1(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4+3, 0, 8)
#endif
// End rate adaptive define

5
include/HalHWImg8188E_FW.h
View file

@ -26,10 +26,6 @@
/******************************************************************************
* FW_AP.TXT
******************************************************************************/
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
void ODM_ReadFirmware_8188E_FW_AP(PDM_ODM_T pDM_Odm, u1Byte *pFirmware, u4Byte *pFirmwareSize);
#else
/******************************************************************************
* FW_WoWLAN.TXT
******************************************************************************/
@ -37,5 +33,4 @@ void ODM_ReadFirmware_8188E_FW_AP(PDM_ODM_T pDM_Odm, u1Byte *pFirmware, u4Byt
extern const u8 Array_8188E_FW_WoWLAN[ArrayLength_8188E_FW_WoWLAN];
#endif
#endif
#endif // end of HWIMG_SUPPORT

35
include/HalPhyRf.h
View file

@ -21,49 +21,16 @@
#ifndef __HAL_PHY_RF_H__
#define __HAL_PHY_RF_H__
#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
#define MAX_TOLERANCE 5
#define IQK_DELAY_TIME 1 //ms
//
// BB/MAC/RF other monitor API
//
void PHY_SetMonitorMode8192C( PADAPTER pAdapter,
bool bEnableMonitorMode );
//
// IQ calibrate
//
void
PHY_IQCalibrate_8192C( PADAPTER pAdapter,
bool bReCovery);
//
// LC calibrate
//
void
PHY_LCCalibrate_8192C( PADAPTER pAdapter);
//
// AP calibrate
//
void
PHY_APCalibrate_8192C( PADAPTER pAdapter,
s1Byte delta);
#endif
#define ODM_TARGET_CHNL_NUM_2G_5G 59
void
ODM_ResetIQKResult(
PDM_ODM_T pDM_Odm
);
u1Byte
ODM_GetRightChnlPlaceforIQK(
u1Byte chnl
);
#endif // #ifndef __HAL_PHY_RF_H__

47
include/HalPhyRf_8188e.h
View file

@ -38,60 +38,33 @@ ODM_TxPwrTrackAdjust88E(
void
odm_TXPowerTrackingCallback_ThermalMeter_8188E(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
PDM_ODM_T pDM_Odm
#else
PADAPTER Adapter
#endif
);
//1 7. IQK
void
PHY_IQCalibrate_8188E(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
PDM_ODM_T pDM_Odm,
#else
PADAPTER Adapter,
#endif
bool bReCovery);
PHY_IQCalibrate_8188E(PADAPTER Adapter, bool bReCovery);
//
// LC calibrate
//
void
PHY_LCCalibrate_8188E(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
PDM_ODM_T pDM_Odm
#else
PADAPTER pAdapter
#endif
);
void PHY_LCCalibrate_8188E( PADAPTER pAdapter);
//
// AP calibrate
//
void
PHY_APCalibrate_8188E(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
PDM_ODM_T pDM_Odm,
#else
PADAPTER pAdapter,
#endif
s1Byte delta);
void PHY_APCalibrate_8188E(PADAPTER pAdapter, s1Byte delta);
void
PHY_DigitalPredistortion_8188E( PADAPTER pAdapter);
void
_PHY_SaveADDARegisters(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
PDM_ODM_T pDM_Odm,
#else
PADAPTER pAdapter,
#endif
pu4Byte ADDAReg,
pu4Byte ADDABackup,
u4Byte RegisterNum
@ -99,11 +72,7 @@ _PHY_SaveADDARegisters(
void
_PHY_PathADDAOn(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
PDM_ODM_T pDM_Odm,
#else
PADAPTER pAdapter,
#endif
pu4Byte ADDAReg,
bool isPathAOn,
bool is2T
@ -111,11 +80,7 @@ _PHY_PathADDAOn(
void
_PHY_MACSettingCalibration(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
PDM_ODM_T pDM_Odm,
#else
PADAPTER pAdapter,
#endif
pu4Byte MACReg,
pu4Byte MACBackup
);
@ -123,11 +88,7 @@ _PHY_MACSettingCalibration(
void
_PHY_PathAStandBy(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
PDM_ODM_T pDM_Odm
#else
PADAPTER pAdapter
#endif
);

4
include/odm_HWConfig.h
View file

@ -170,7 +170,7 @@ ODM_MacStatusQuery(
bool bPacketToSelf,
bool bPacketBeacon
);
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE|ODM_AP))
HAL_STATUS
ODM_ConfigRFWithHeaderFile(
PDM_ODM_T pDM_Odm,
@ -188,7 +188,5 @@ HAL_STATUS
ODM_ConfigMACWithHeaderFile(
PDM_ODM_T pDM_Odm
);
#endif
#endif

46
include/odm_RTL8188E.h
View file

@ -27,57 +27,25 @@
#define MAIN_ANT_CGCS_RX 0
#define AUX_ANT_CGCS_RX 1
void
ODM_DIG_LowerBound_88E(
PDM_ODM_T pDM_Odm
);
#if ( !(DM_ODM_SUPPORT_TYPE == ODM_CE))
void
odm_FastAntTrainingInit(
PDM_ODM_T pDM_Odm
);
#endif
void ODM_DIG_LowerBound_88E(PDM_ODM_T pDM_Odm);
void
ODM_AntennaDiversityInit_88E(
PDM_ODM_T pDM_Odm
);
void ODM_AntennaDiversityInit_88E(PDM_ODM_T pDM_Odm);
void
ODM_AntennaDiversity_88E
(
PDM_ODM_T pDM_Odm
);
void ODM_AntennaDiversity_88E(PDM_ODM_T pDM_Odm);
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
void
ODM_SetTxAntByTxInfo_88E(
PDM_ODM_T pDM_Odm,
void ODM_SetTxAntByTxInfo_88E(PDM_ODM_T pDM_Odm,
pu1Byte pDesc,
u1Byte macId
);
#else// (DM_ODM_SUPPORT_TYPE == ODM_AP)
void
ODM_SetTxAntByTxInfo_88E(
PDM_ODM_T pDM_Odm
);
#endif
void
ODM_UpdateRxIdleAnt_88E(
PDM_ODM_T pDM_Odm,
u1Byte Ant
);
void ODM_UpdateRxIdleAnt_88E(PDM_ODM_T pDM_Odm, u1Byte Ant);
void
ODM_AntselStatistics_88E(
PDM_ODM_T pDM_Odm,
void ODM_AntselStatistics_88E(PDM_ODM_T pDM_Odm,
u1Byte antsel_tr_mux,
u4Byte MacId,
u1Byte RxPWDBAll
);
#if ( !(DM_ODM_SUPPORT_TYPE == ODM_CE))
void
odm_FastAntTraining(
PDM_ODM_T pDM_Odm
@ -92,7 +60,7 @@ void
odm_FastAntTrainingWorkItemCallback(
PDM_ODM_T pDM_Odm
);
#endif
void
odm_PrimaryCCA_Init(
PDM_ODM_T pDM_Odm);

7
include/odm_debug.h
View file

@ -96,15 +96,8 @@
#define ODM_COMP_INIT BIT31
/*------------------------Export Marco Definition---------------------------*/
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
#define RT_PRINTK DbgPrint
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#define DbgPrint printk
#define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __func__, ## args);
#else
#define DbgPrint panic_printk
#define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __func__, ## args);
#endif
#ifndef ASSERT
#define ASSERT(expr)

13
include/odm_interface.h
View file

@ -81,11 +81,9 @@ typedef enum _ODM_H2C_CMD
// 2012/02/17 MH For non-MP compile pass only. Linux does not support workitem.
// Suggest HW team to use thread instead of workitem. Windows also support the feature.
//
#if (DM_ODM_SUPPORT_TYPE != ODM_MP)
typedef void *PRT_WORK_ITEM ;
typedef void RT_WORKITEM_HANDLE,*PRT_WORKITEM_HANDLE;
typedef void (*RT_WORKITEM_CALL_BACK)(void * pContext);
#endif
//
// =========== Extern Variable ??? It should be forbidden.
@ -309,19 +307,9 @@ ODM_ReleaseTimer(
PRT_TIMER pTimer
);
//
// ODM FW relative API.
//
#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
void
ODM_FillH2CCmd(
PADAPTER Adapter,
u1Byte ElementID,
u4Byte CmdLen,
pu1Byte pCmdBuffer
);
#else
u4Byte
ODM_FillH2CCmd(
pu1Byte pH2CBuffer,
@ -332,5 +320,4 @@ ODM_FillH2CCmd(
pu1Byte* pCmbBuffer,
pu1Byte CmdStartSeq
);
#endif
#endif // __ODM_INTERFACE_H__

98
include/odm_precomp.h
View file

@ -23,74 +23,18 @@
#include "odm_types.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
#include "Precomp.h" // We need to include mp_precomp.h due to batch file setting.
#else
#define TEST_FALG___ 1
#endif
//2 Config Flags and Structs - defined by each ODM Type
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#include "../8192cd_cfg.h"
#include "../odm_inc.h"
#include "../8192cd.h"
#include "../8192cd_util.h"
#ifdef AP_BUILD_WORKAROUND
#include "../8192cd_headers.h"
#include "../8192cd_debug.h"
#endif
#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
// Flags
#include "../8192cd_cfg.h" // OUTSRC needs ADSL config flags.
#include "../odm_inc.h" // OUTSRC needs some extra flags.
// Data Structure
#include "../common_types.h" // OUTSRC and rtl8192cd both needs basic type such as UINT8 and BIT0.
#include "../8192cd.h" // OUTSRC needs basic ADSL struct definition.
#include "../8192cd_util.h" // OUTSRC needs basic I/O function.
#ifdef ADSL_AP_BUILD_WORKAROUND
// NESTED_INC: Functions defined outside should not be included!! Marked by Annie, 2011-10-14.
#include "../8192cd_headers.h"
#include "../8192cd_debug.h"
#endif
#elif (DM_ODM_SUPPORT_TYPE ==ODM_CE)
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <hal_intf.h>
#elif (DM_ODM_SUPPORT_TYPE == ODM_MP)
#include "Mp_Precomp.h"
#endif
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <hal_intf.h>
//2 Hardware Parameter Files
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#if (RTL8192C_SUPPORT==1)
#include "rtl8192c/Hal8192CEFWImg_AP.h"
#include "rtl8192c/Hal8192CEPHYImg_AP.h"
#include "rtl8192c/Hal8192CEMACImg_AP.h"
#endif
#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
#include "rtl8192c/Hal8192CEFWImg_ADSL.h"
#include "rtl8192c/Hal8192CEPHYImg_ADSL.h"
#include "rtl8192c/Hal8192CEMACImg_ADSL.h"
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "Hal8188EFWImg_CE.h"
#elif (DM_ODM_SUPPORT_TYPE == ODM_MP)
#endif
#include "Hal8188EFWImg_CE.h"
//2 OutSrc Header Files
@ -101,35 +45,15 @@
#include "odm_RegDefine11AC.h"
#include "odm_RegDefine11N.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#if (RTL8192C_SUPPORT==1)
#include "rtl8192c/HalDMOutSrc8192C_AP.h"
#endif
#if (RTL8188E_SUPPORT==1)
#include "rtl8188e/Hal8188ERateAdaptive.h"//for RA,Power training
#endif
#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
#include "rtl8192c/HalDMOutSrc8192C_ADSL.h"
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "HalPhyRf.h"
#include "HalPhyRf_8188e.h"//for IQK,LCK,Power-tracking
#include "Hal8188ERateAdaptive.h"//for RA,Power training
#include "rtl8188e_hal.h"
#endif
#include "HalPhyRf.h"
#include "HalPhyRf_8188e.h"//for IQK,LCK,Power-tracking
#include "Hal8188ERateAdaptive.h"//for RA,Power training
#include "rtl8188e_hal.h"
#include "odm_interface.h"
#include "odm_reg.h"
#if (RTL8192C_SUPPORT==1)
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#include "rtl8192c/Hal8192CHWImg_MAC.h"
#include "rtl8192c/Hal8192CHWImg_RF.h"
#include "rtl8192c/Hal8192CHWImg_BB.h"
#include "rtl8192c/Hal8192CHWImg_FW.h"
#endif
#include "rtl8192c/odm_RTL8192C.h"
#endif
#if (RTL8192D_SUPPORT==1)
@ -150,10 +74,6 @@
#include "HalHWImg8188E_BB.h"
#include "Hal8188EReg.h"
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
#include "HalPhyRf_8188e.h"
#endif
#if (RTL8188E_FOR_TEST_CHIP >= 1)
#include "HalHWImg8188E_TestChip_MAC.h"
#include "HalHWImg8188E_TestChip_RF.h"

171
include/odm_types.h
View file

@ -28,13 +28,9 @@
#define ODM_CE 0x04 //BIT2
#define ODM_MP 0x08 //BIT3
#define DM_ODM_SUPPORT_TYPE ODM_CE
#if (DM_ODM_SUPPORT_TYPE != ODM_MP)
#define RT_PCI_INTERFACE 1
#define RT_USB_INTERFACE 2
#define RT_SDIO_INTERFACE 3
#endif
typedef enum _HAL_STATUS{
HAL_STATUS_SUCCESS,
@ -47,159 +43,52 @@ typedef enum _HAL_STATUS{
RT_STATUS_OS_API_FAILED,*/
}HAL_STATUS,*PHAL_STATUS;
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
typedef enum _RT_SPINLOCK_TYPE{
RT_TEMP =1,
}RT_SPINLOCK_TYPE;
#elif ( (DM_ODM_SUPPORT_TYPE == ODM_AP) ||(DM_ODM_SUPPORT_TYPE == ODM_ADSL))
#define VISTA_USB_RX_REVISE 0
#include <basic_types.h>
//
// Declare for ODM spin lock defintion temporarily fro compile pass.
//
typedef enum _RT_SPINLOCK_TYPE{
RT_TX_SPINLOCK = 1,
RT_RX_SPINLOCK = 2,
RT_RM_SPINLOCK = 3,
RT_CAM_SPINLOCK = 4,
RT_SCAN_SPINLOCK = 5,
RT_LOG_SPINLOCK = 7,
RT_BW_SPINLOCK = 8,
RT_CHNLOP_SPINLOCK = 9,
RT_RF_OPERATE_SPINLOCK = 10,
RT_INITIAL_SPINLOCK = 11,
RT_RF_STATE_SPINLOCK = 12, // For RF state. Added by Bruce, 2007-10-30.
#if VISTA_USB_RX_REVISE
RT_USBRX_CONTEXT_SPINLOCK = 13,
RT_USBRX_POSTPROC_SPINLOCK = 14, // protect data of Adapter->IndicateW/ IndicateR
#endif
//Shall we define Ndis 6.2 SpinLock Here ?
RT_PORT_SPINLOCK=16,
RT_VNIC_SPINLOCK=17,
RT_HVL_SPINLOCK=18,
RT_H2C_SPINLOCK = 20, // For H2C cmd. Added by tynli. 2009.11.09.
#define u1Byte u8
#define pu1Byte u8*
RT_BTData_SPINLOCK=25,
#define u2Byte u16
#define pu2Byte u16*
RT_WAPI_OPTION_SPINLOCK=26,
RT_WAPI_RX_SPINLOCK=27,
#define u4Byte u32
#define pu4Byte u32*
// add for 92D CCK control issue
RT_CCK_PAGEA_SPINLOCK = 28,
RT_BUFFER_SPINLOCK = 29,
RT_CHANNEL_AND_BANDWIDTH_SPINLOCK = 30,
RT_GEN_TEMP_BUF_SPINLOCK = 31,
RT_AWB_SPINLOCK = 32,
RT_FW_PS_SPINLOCK = 33,
RT_HW_TIMER_SPIN_LOCK = 34,
RT_MPT_WI_SPINLOCK = 35
}RT_SPINLOCK_TYPE;
#define u8Byte u64
#define pu8Byte u64*
#endif
#define s1Byte s8
#define ps1Byte s8*
#define s2Byte s16
#define ps2Byte s16*
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
#define STA_INFO_T RT_WLAN_STA
#define PSTA_INFO_T PRT_WLAN_STA
#define s4Byte s32
#define ps4Byte s32*
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
#define s8Byte s64
#define ps8Byte s64*
// To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07.
#define ADSL_AP_BUILD_WORKAROUND
#define AP_BUILD_WORKAROUND
//
#define DEV_BUS_TYPE RT_USB_INTERFACE
#ifdef AP_BUILD_WORKAROUND
#include "../typedef.h"
#else
typedef void void,*void *;
typedef unsigned char bool,*bool *;
typedef unsigned char u1Byte,*pu1Byte;
typedef unsigned short u2Byte,*pu2Byte;
typedef unsigned int u4Byte,*pu4Byte;
typedef unsigned long long u8Byte,*pu8Byte;
typedef char s1Byte,*ps1Byte;
typedef short s2Byte,*ps2Byte;
typedef long s4Byte,*ps4Byte;
typedef long long s8Byte,*ps8Byte;
#endif
typedef struct timer_list RT_TIMER, *PRT_TIMER;
typedef void * RT_TIMER_CALL_BACK;
#define STA_INFO_T struct sta_info
#define PSTA_INFO_T struct sta_info *
typedef struct rtl8192cd_priv *prtl8192cd_priv;
typedef struct stat_info STA_INFO_T,*PSTA_INFO_T;
typedef struct timer_list RT_TIMER, *PRT_TIMER;
typedef void * RT_TIMER_CALL_BACK;
#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
#define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value)
#define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)
#define DEV_BUS_TYPE RT_PCI_INTERFACE
#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
// To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07.
#define ADSL_AP_BUILD_WORKAROUND
#define ADSL_BUILD_WORKAROUND
//
typedef unsigned char bool,*bool *;
typedef unsigned char u1Byte,*pu1Byte;
typedef unsigned short u2Byte,*pu2Byte;
typedef unsigned int u4Byte,*pu4Byte;
typedef unsigned long long u8Byte,*pu8Byte;
typedef char s1Byte,*ps1Byte;
typedef short s2Byte,*ps2Byte;
typedef long s4Byte,*ps4Byte;
typedef long long s8Byte,*ps8Byte;
typedef struct rtl8192cd_priv *prtl8192cd_priv;
typedef struct stat_info STA_INFO_T,*PSTA_INFO_T;
typedef struct timer_list RT_TIMER, *PRT_TIMER;
typedef void * RT_TIMER_CALL_BACK;
#define DEV_BUS_TYPE RT_PCI_INTERFACE
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include <basic_types.h>
#define u1Byte u8
#define pu1Byte u8*
#define u2Byte u16
#define pu2Byte u16*
#define u4Byte u32
#define pu4Byte u32*
#define u8Byte u64
#define pu8Byte u64*
#define s1Byte s8
#define ps1Byte s8*
#define s2Byte s16
#define ps2Byte s16*
#define s4Byte s32
#define ps4Byte s32*
#define s8Byte s64
#define ps8Byte s64*
#define DEV_BUS_TYPE RT_USB_INTERFACE
typedef struct timer_list RT_TIMER, *PRT_TIMER;
typedef void * RT_TIMER_CALL_BACK;
#define STA_INFO_T struct sta_info
#define PSTA_INFO_T struct sta_info *
#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
#define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value)
#define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)
//define useless flag to avoid compile warning
#define USE_WORKITEM 0
#define FOR_BRAZIL_PRETEST 0
#define BT_30_SUPPORT 0
#define FPGA_TWO_MAC_VERIFICATION 0
#endif
//define useless flag to avoid compile warning
#define USE_WORKITEM 0
#define FOR_BRAZIL_PRETEST 0
#define BT_30_SUPPORT 0
#define FPGA_TWO_MAC_VERIFICATION 0
#endif // __ODM_TYPES_H__

3
include/rtw_recv.h
View file

@ -108,17 +108,14 @@ struct phy_info //ODM_PHY_INFO_T
u8 SignalQuality; // in 0-100 index.
u8 RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; //EVM
u8 RxMIMOSignalStrength[MAX_PATH_NUM_92CS];// in 0~100 index
//#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
s8 RxPower; // in dBm Translate from PWdB
s8 RecvSignalPower;// Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures.
u8 BTRxRSSIPercentage;
u8 SignalStrength; // in 0-100 index.
u8 RxPwr[MAX_PATH_NUM_92CS];//per-path's pwdb
u8 RxSNR[MAX_PATH_NUM_92CS];//per-path's SNR
//#endif
};
struct rx_pkt_attrib {
u16 pkt_len;
u8 physt;