mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2025-05-07 05:53:06 +00:00
rtl8188eu: Remove configuration variable DM_ODM_SUPPORT_TYPE and associated dead code
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
parent
951757e916
commit
10dd5cd02b
19 changed files with 399 additions and 9669 deletions
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@ -21,7 +21,6 @@ Major Change History:
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#define RATESIZE 28
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#define TX_RPT2_ITEM_SIZE 8
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#if (DM_ODM_SUPPORT_TYPE != ODM_MP)
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//
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// TX report 2 format in Rx desc
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//
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@ -36,7 +35,6 @@ Major Change History:
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#define GET_TX_REPORT_TYPE1_RERTY_4(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4+1, 0, 8)
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#define GET_TX_REPORT_TYPE1_DROP_0(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4+2, 0, 8)
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#define GET_TX_REPORT_TYPE1_DROP_1(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4+3, 0, 8)
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#endif
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// End rate adaptive define
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@ -26,10 +26,6 @@
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/******************************************************************************
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* FW_AP.TXT
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******************************************************************************/
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#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
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void ODM_ReadFirmware_8188E_FW_AP(PDM_ODM_T pDM_Odm, u1Byte *pFirmware, u4Byte *pFirmwareSize);
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#else
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/******************************************************************************
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* FW_WoWLAN.TXT
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******************************************************************************/
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@ -37,5 +33,4 @@ void ODM_ReadFirmware_8188E_FW_AP(PDM_ODM_T pDM_Odm, u1Byte *pFirmware, u4Byt
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extern const u8 Array_8188E_FW_WoWLAN[ArrayLength_8188E_FW_WoWLAN];
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#endif
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#endif
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#endif // end of HWIMG_SUPPORT
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@ -21,49 +21,16 @@
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#ifndef __HAL_PHY_RF_H__
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#define __HAL_PHY_RF_H__
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#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
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#define MAX_TOLERANCE 5
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#define IQK_DELAY_TIME 1 //ms
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//
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// BB/MAC/RF other monitor API
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//
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void PHY_SetMonitorMode8192C( PADAPTER pAdapter,
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bool bEnableMonitorMode );
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//
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// IQ calibrate
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//
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void
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PHY_IQCalibrate_8192C( PADAPTER pAdapter,
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bool bReCovery);
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//
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// LC calibrate
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//
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void
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PHY_LCCalibrate_8192C( PADAPTER pAdapter);
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//
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// AP calibrate
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//
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void
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PHY_APCalibrate_8192C( PADAPTER pAdapter,
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s1Byte delta);
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#endif
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#define ODM_TARGET_CHNL_NUM_2G_5G 59
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void
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ODM_ResetIQKResult(
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PDM_ODM_T pDM_Odm
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);
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u1Byte
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ODM_GetRightChnlPlaceforIQK(
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u1Byte chnl
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);
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#endif // #ifndef __HAL_PHY_RF_H__
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@ -38,60 +38,33 @@ ODM_TxPwrTrackAdjust88E(
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void
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odm_TXPowerTrackingCallback_ThermalMeter_8188E(
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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PDM_ODM_T pDM_Odm
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#else
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PADAPTER Adapter
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#endif
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);
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//1 7. IQK
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void
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PHY_IQCalibrate_8188E(
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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PDM_ODM_T pDM_Odm,
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#else
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PADAPTER Adapter,
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#endif
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bool bReCovery);
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PHY_IQCalibrate_8188E(PADAPTER Adapter, bool bReCovery);
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//
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// LC calibrate
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//
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void
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PHY_LCCalibrate_8188E(
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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PDM_ODM_T pDM_Odm
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#else
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PADAPTER pAdapter
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#endif
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);
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void PHY_LCCalibrate_8188E( PADAPTER pAdapter);
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//
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// AP calibrate
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//
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void
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PHY_APCalibrate_8188E(
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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PDM_ODM_T pDM_Odm,
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#else
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PADAPTER pAdapter,
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#endif
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s1Byte delta);
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void PHY_APCalibrate_8188E(PADAPTER pAdapter, s1Byte delta);
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void
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PHY_DigitalPredistortion_8188E( PADAPTER pAdapter);
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void
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_PHY_SaveADDARegisters(
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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PDM_ODM_T pDM_Odm,
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#else
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PADAPTER pAdapter,
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#endif
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pu4Byte ADDAReg,
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pu4Byte ADDABackup,
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u4Byte RegisterNum
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@ -99,11 +72,7 @@ _PHY_SaveADDARegisters(
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void
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_PHY_PathADDAOn(
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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PDM_ODM_T pDM_Odm,
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#else
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PADAPTER pAdapter,
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#endif
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pu4Byte ADDAReg,
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bool isPathAOn,
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bool is2T
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@ -111,11 +80,7 @@ _PHY_PathADDAOn(
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void
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_PHY_MACSettingCalibration(
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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PDM_ODM_T pDM_Odm,
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#else
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PADAPTER pAdapter,
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#endif
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pu4Byte MACReg,
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pu4Byte MACBackup
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);
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@ -123,11 +88,7 @@ _PHY_MACSettingCalibration(
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void
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_PHY_PathAStandBy(
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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PDM_ODM_T pDM_Odm
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#else
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PADAPTER pAdapter
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#endif
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);
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@ -170,7 +170,7 @@ ODM_MacStatusQuery(
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bool bPacketToSelf,
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bool bPacketBeacon
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);
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#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE|ODM_AP))
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HAL_STATUS
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ODM_ConfigRFWithHeaderFile(
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PDM_ODM_T pDM_Odm,
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@ -188,7 +188,5 @@ HAL_STATUS
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ODM_ConfigMACWithHeaderFile(
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PDM_ODM_T pDM_Odm
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);
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#endif
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#endif
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@ -27,57 +27,25 @@
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#define MAIN_ANT_CGCS_RX 0
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#define AUX_ANT_CGCS_RX 1
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void
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ODM_DIG_LowerBound_88E(
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PDM_ODM_T pDM_Odm
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);
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#if ( !(DM_ODM_SUPPORT_TYPE == ODM_CE))
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void
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odm_FastAntTrainingInit(
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PDM_ODM_T pDM_Odm
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);
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#endif
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void ODM_DIG_LowerBound_88E(PDM_ODM_T pDM_Odm);
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void
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ODM_AntennaDiversityInit_88E(
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PDM_ODM_T pDM_Odm
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);
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void ODM_AntennaDiversityInit_88E(PDM_ODM_T pDM_Odm);
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void
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ODM_AntennaDiversity_88E
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(
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PDM_ODM_T pDM_Odm
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);
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void ODM_AntennaDiversity_88E(PDM_ODM_T pDM_Odm);
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#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
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void
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ODM_SetTxAntByTxInfo_88E(
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PDM_ODM_T pDM_Odm,
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void ODM_SetTxAntByTxInfo_88E(PDM_ODM_T pDM_Odm,
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pu1Byte pDesc,
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u1Byte macId
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);
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#else// (DM_ODM_SUPPORT_TYPE == ODM_AP)
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void
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ODM_SetTxAntByTxInfo_88E(
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PDM_ODM_T pDM_Odm
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);
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#endif
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void
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ODM_UpdateRxIdleAnt_88E(
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PDM_ODM_T pDM_Odm,
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u1Byte Ant
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);
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void ODM_UpdateRxIdleAnt_88E(PDM_ODM_T pDM_Odm, u1Byte Ant);
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void
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ODM_AntselStatistics_88E(
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PDM_ODM_T pDM_Odm,
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void ODM_AntselStatistics_88E(PDM_ODM_T pDM_Odm,
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u1Byte antsel_tr_mux,
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u4Byte MacId,
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u1Byte RxPWDBAll
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);
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#if ( !(DM_ODM_SUPPORT_TYPE == ODM_CE))
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void
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odm_FastAntTraining(
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PDM_ODM_T pDM_Odm
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odm_FastAntTrainingWorkItemCallback(
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PDM_ODM_T pDM_Odm
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);
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#endif
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void
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odm_PrimaryCCA_Init(
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PDM_ODM_T pDM_Odm);
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@ -96,15 +96,8 @@
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#define ODM_COMP_INIT BIT31
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/*------------------------Export Marco Definition---------------------------*/
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#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
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#define RT_PRINTK DbgPrint
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#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
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#define DbgPrint printk
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#define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __func__, ## args);
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#else
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#define DbgPrint panic_printk
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#define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __func__, ## args);
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#endif
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#ifndef ASSERT
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#define ASSERT(expr)
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@ -81,11 +81,9 @@ typedef enum _ODM_H2C_CMD
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// 2012/02/17 MH For non-MP compile pass only. Linux does not support workitem.
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// Suggest HW team to use thread instead of workitem. Windows also support the feature.
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//
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#if (DM_ODM_SUPPORT_TYPE != ODM_MP)
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typedef void *PRT_WORK_ITEM ;
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typedef void RT_WORKITEM_HANDLE,*PRT_WORKITEM_HANDLE;
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typedef void (*RT_WORKITEM_CALL_BACK)(void * pContext);
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#endif
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//
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// =========== Extern Variable ??? It should be forbidden.
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@ -309,19 +307,9 @@ ODM_ReleaseTimer(
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PRT_TIMER pTimer
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);
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//
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// ODM FW relative API.
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//
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#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
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void
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ODM_FillH2CCmd(
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PADAPTER Adapter,
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u1Byte ElementID,
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u4Byte CmdLen,
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pu1Byte pCmdBuffer
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);
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#else
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u4Byte
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ODM_FillH2CCmd(
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pu1Byte pH2CBuffer,
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@ -332,5 +320,4 @@ ODM_FillH2CCmd(
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pu1Byte* pCmbBuffer,
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pu1Byte CmdStartSeq
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);
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#endif
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#endif // __ODM_INTERFACE_H__
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@ -23,74 +23,18 @@
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#include "odm_types.h"
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#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
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#include "Precomp.h" // We need to include mp_precomp.h due to batch file setting.
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#else
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#define TEST_FALG___ 1
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#endif
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//2 Config Flags and Structs - defined by each ODM Type
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#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
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#include "../8192cd_cfg.h"
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#include "../odm_inc.h"
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#include "../8192cd.h"
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#include "../8192cd_util.h"
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#ifdef AP_BUILD_WORKAROUND
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#include "../8192cd_headers.h"
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#include "../8192cd_debug.h"
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#endif
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#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
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// Flags
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#include "../8192cd_cfg.h" // OUTSRC needs ADSL config flags.
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#include "../odm_inc.h" // OUTSRC needs some extra flags.
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// Data Structure
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#include "../common_types.h" // OUTSRC and rtl8192cd both needs basic type such as UINT8 and BIT0.
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#include "../8192cd.h" // OUTSRC needs basic ADSL struct definition.
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#include "../8192cd_util.h" // OUTSRC needs basic I/O function.
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#ifdef ADSL_AP_BUILD_WORKAROUND
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// NESTED_INC: Functions defined outside should not be included!! Marked by Annie, 2011-10-14.
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#include "../8192cd_headers.h"
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#include "../8192cd_debug.h"
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#endif
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#elif (DM_ODM_SUPPORT_TYPE ==ODM_CE)
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#include <drv_conf.h>
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#include <osdep_service.h>
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#include <drv_types.h>
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#include <hal_intf.h>
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#elif (DM_ODM_SUPPORT_TYPE == ODM_MP)
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#include "Mp_Precomp.h"
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#endif
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#include <drv_conf.h>
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#include <osdep_service.h>
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#include <drv_types.h>
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#include <hal_intf.h>
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//2 Hardware Parameter Files
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#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
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#if (RTL8192C_SUPPORT==1)
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#include "rtl8192c/Hal8192CEFWImg_AP.h"
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#include "rtl8192c/Hal8192CEPHYImg_AP.h"
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#include "rtl8192c/Hal8192CEMACImg_AP.h"
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#endif
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#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
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#include "rtl8192c/Hal8192CEFWImg_ADSL.h"
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#include "rtl8192c/Hal8192CEPHYImg_ADSL.h"
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#include "rtl8192c/Hal8192CEMACImg_ADSL.h"
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#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
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#include "Hal8188EFWImg_CE.h"
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#elif (DM_ODM_SUPPORT_TYPE == ODM_MP)
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#endif
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#include "Hal8188EFWImg_CE.h"
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//2 OutSrc Header Files
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@ -101,35 +45,15 @@
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#include "odm_RegDefine11AC.h"
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#include "odm_RegDefine11N.h"
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#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
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#if (RTL8192C_SUPPORT==1)
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#include "rtl8192c/HalDMOutSrc8192C_AP.h"
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#endif
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#if (RTL8188E_SUPPORT==1)
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#include "rtl8188e/Hal8188ERateAdaptive.h"//for RA,Power training
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#endif
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#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
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#include "rtl8192c/HalDMOutSrc8192C_ADSL.h"
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#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
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#include "HalPhyRf.h"
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#include "HalPhyRf_8188e.h"//for IQK,LCK,Power-tracking
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#include "Hal8188ERateAdaptive.h"//for RA,Power training
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#include "rtl8188e_hal.h"
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#endif
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#include "HalPhyRf.h"
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#include "HalPhyRf_8188e.h"//for IQK,LCK,Power-tracking
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#include "Hal8188ERateAdaptive.h"//for RA,Power training
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#include "rtl8188e_hal.h"
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#include "odm_interface.h"
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#include "odm_reg.h"
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#if (RTL8192C_SUPPORT==1)
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#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
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#include "rtl8192c/Hal8192CHWImg_MAC.h"
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#include "rtl8192c/Hal8192CHWImg_RF.h"
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#include "rtl8192c/Hal8192CHWImg_BB.h"
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#include "rtl8192c/Hal8192CHWImg_FW.h"
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#endif
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#include "rtl8192c/odm_RTL8192C.h"
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#endif
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#if (RTL8192D_SUPPORT==1)
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@ -150,10 +74,6 @@
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#include "HalHWImg8188E_BB.h"
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#include "Hal8188EReg.h"
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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#include "HalPhyRf_8188e.h"
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#endif
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#if (RTL8188E_FOR_TEST_CHIP >= 1)
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#include "HalHWImg8188E_TestChip_MAC.h"
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#include "HalHWImg8188E_TestChip_RF.h"
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@ -28,13 +28,9 @@
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#define ODM_CE 0x04 //BIT2
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#define ODM_MP 0x08 //BIT3
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#define DM_ODM_SUPPORT_TYPE ODM_CE
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#if (DM_ODM_SUPPORT_TYPE != ODM_MP)
|
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#define RT_PCI_INTERFACE 1
|
||||
#define RT_USB_INTERFACE 2
|
||||
#define RT_SDIO_INTERFACE 3
|
||||
#endif
|
||||
|
||||
typedef enum _HAL_STATUS{
|
||||
HAL_STATUS_SUCCESS,
|
||||
|
@ -47,159 +43,52 @@ typedef enum _HAL_STATUS{
|
|||
RT_STATUS_OS_API_FAILED,*/
|
||||
}HAL_STATUS,*PHAL_STATUS;
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
typedef enum _RT_SPINLOCK_TYPE{
|
||||
RT_TEMP =1,
|
||||
}RT_SPINLOCK_TYPE;
|
||||
#elif ( (DM_ODM_SUPPORT_TYPE == ODM_AP) ||(DM_ODM_SUPPORT_TYPE == ODM_ADSL))
|
||||
|
||||
#define VISTA_USB_RX_REVISE 0
|
||||
#include <basic_types.h>
|
||||
|
||||
//
|
||||
// Declare for ODM spin lock defintion temporarily fro compile pass.
|
||||
//
|
||||
typedef enum _RT_SPINLOCK_TYPE{
|
||||
RT_TX_SPINLOCK = 1,
|
||||
RT_RX_SPINLOCK = 2,
|
||||
RT_RM_SPINLOCK = 3,
|
||||
RT_CAM_SPINLOCK = 4,
|
||||
RT_SCAN_SPINLOCK = 5,
|
||||
RT_LOG_SPINLOCK = 7,
|
||||
RT_BW_SPINLOCK = 8,
|
||||
RT_CHNLOP_SPINLOCK = 9,
|
||||
RT_RF_OPERATE_SPINLOCK = 10,
|
||||
RT_INITIAL_SPINLOCK = 11,
|
||||
RT_RF_STATE_SPINLOCK = 12, // For RF state. Added by Bruce, 2007-10-30.
|
||||
#if VISTA_USB_RX_REVISE
|
||||
RT_USBRX_CONTEXT_SPINLOCK = 13,
|
||||
RT_USBRX_POSTPROC_SPINLOCK = 14, // protect data of Adapter->IndicateW/ IndicateR
|
||||
#endif
|
||||
//Shall we define Ndis 6.2 SpinLock Here ?
|
||||
RT_PORT_SPINLOCK=16,
|
||||
RT_VNIC_SPINLOCK=17,
|
||||
RT_HVL_SPINLOCK=18,
|
||||
RT_H2C_SPINLOCK = 20, // For H2C cmd. Added by tynli. 2009.11.09.
|
||||
#define u1Byte u8
|
||||
#define pu1Byte u8*
|
||||
|
||||
RT_BTData_SPINLOCK=25,
|
||||
#define u2Byte u16
|
||||
#define pu2Byte u16*
|
||||
|
||||
RT_WAPI_OPTION_SPINLOCK=26,
|
||||
RT_WAPI_RX_SPINLOCK=27,
|
||||
#define u4Byte u32
|
||||
#define pu4Byte u32*
|
||||
|
||||
// add for 92D CCK control issue
|
||||
RT_CCK_PAGEA_SPINLOCK = 28,
|
||||
RT_BUFFER_SPINLOCK = 29,
|
||||
RT_CHANNEL_AND_BANDWIDTH_SPINLOCK = 30,
|
||||
RT_GEN_TEMP_BUF_SPINLOCK = 31,
|
||||
RT_AWB_SPINLOCK = 32,
|
||||
RT_FW_PS_SPINLOCK = 33,
|
||||
RT_HW_TIMER_SPIN_LOCK = 34,
|
||||
RT_MPT_WI_SPINLOCK = 35
|
||||
}RT_SPINLOCK_TYPE;
|
||||
#define u8Byte u64
|
||||
#define pu8Byte u64*
|
||||
|
||||
#endif
|
||||
#define s1Byte s8
|
||||
#define ps1Byte s8*
|
||||
|
||||
#define s2Byte s16
|
||||
#define ps2Byte s16*
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
|
||||
#define STA_INFO_T RT_WLAN_STA
|
||||
#define PSTA_INFO_T PRT_WLAN_STA
|
||||
#define s4Byte s32
|
||||
#define ps4Byte s32*
|
||||
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
||||
#define s8Byte s64
|
||||
#define ps8Byte s64*
|
||||
|
||||
// To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07.
|
||||
#define ADSL_AP_BUILD_WORKAROUND
|
||||
#define AP_BUILD_WORKAROUND
|
||||
//
|
||||
#define DEV_BUS_TYPE RT_USB_INTERFACE
|
||||
|
||||
#ifdef AP_BUILD_WORKAROUND
|
||||
#include "../typedef.h"
|
||||
#else
|
||||
typedef void void,*void *;
|
||||
typedef unsigned char bool,*bool *;
|
||||
typedef unsigned char u1Byte,*pu1Byte;
|
||||
typedef unsigned short u2Byte,*pu2Byte;
|
||||
typedef unsigned int u4Byte,*pu4Byte;
|
||||
typedef unsigned long long u8Byte,*pu8Byte;
|
||||
typedef char s1Byte,*ps1Byte;
|
||||
typedef short s2Byte,*ps2Byte;
|
||||
typedef long s4Byte,*ps4Byte;
|
||||
typedef long long s8Byte,*ps8Byte;
|
||||
#endif
|
||||
typedef struct timer_list RT_TIMER, *PRT_TIMER;
|
||||
typedef void * RT_TIMER_CALL_BACK;
|
||||
#define STA_INFO_T struct sta_info
|
||||
#define PSTA_INFO_T struct sta_info *
|
||||
|
||||
typedef struct rtl8192cd_priv *prtl8192cd_priv;
|
||||
typedef struct stat_info STA_INFO_T,*PSTA_INFO_T;
|
||||
typedef struct timer_list RT_TIMER, *PRT_TIMER;
|
||||
typedef void * RT_TIMER_CALL_BACK;
|
||||
#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
|
||||
#define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value)
|
||||
#define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)
|
||||
|
||||
#define DEV_BUS_TYPE RT_PCI_INTERFACE
|
||||
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
|
||||
|
||||
// To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07.
|
||||
#define ADSL_AP_BUILD_WORKAROUND
|
||||
#define ADSL_BUILD_WORKAROUND
|
||||
//
|
||||
|
||||
typedef unsigned char bool,*bool *;
|
||||
typedef unsigned char u1Byte,*pu1Byte;
|
||||
typedef unsigned short u2Byte,*pu2Byte;
|
||||
typedef unsigned int u4Byte,*pu4Byte;
|
||||
typedef unsigned long long u8Byte,*pu8Byte;
|
||||
typedef char s1Byte,*ps1Byte;
|
||||
typedef short s2Byte,*ps2Byte;
|
||||
typedef long s4Byte,*ps4Byte;
|
||||
typedef long long s8Byte,*ps8Byte;
|
||||
|
||||
typedef struct rtl8192cd_priv *prtl8192cd_priv;
|
||||
typedef struct stat_info STA_INFO_T,*PSTA_INFO_T;
|
||||
typedef struct timer_list RT_TIMER, *PRT_TIMER;
|
||||
typedef void * RT_TIMER_CALL_BACK;
|
||||
|
||||
#define DEV_BUS_TYPE RT_PCI_INTERFACE
|
||||
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
#include <basic_types.h>
|
||||
|
||||
#define u1Byte u8
|
||||
#define pu1Byte u8*
|
||||
|
||||
#define u2Byte u16
|
||||
#define pu2Byte u16*
|
||||
|
||||
#define u4Byte u32
|
||||
#define pu4Byte u32*
|
||||
|
||||
#define u8Byte u64
|
||||
#define pu8Byte u64*
|
||||
|
||||
#define s1Byte s8
|
||||
#define ps1Byte s8*
|
||||
|
||||
#define s2Byte s16
|
||||
#define ps2Byte s16*
|
||||
|
||||
#define s4Byte s32
|
||||
#define ps4Byte s32*
|
||||
|
||||
#define s8Byte s64
|
||||
#define ps8Byte s64*
|
||||
|
||||
#define DEV_BUS_TYPE RT_USB_INTERFACE
|
||||
|
||||
typedef struct timer_list RT_TIMER, *PRT_TIMER;
|
||||
typedef void * RT_TIMER_CALL_BACK;
|
||||
#define STA_INFO_T struct sta_info
|
||||
#define PSTA_INFO_T struct sta_info *
|
||||
|
||||
#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
|
||||
#define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value)
|
||||
#define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)
|
||||
|
||||
//define useless flag to avoid compile warning
|
||||
#define USE_WORKITEM 0
|
||||
#define FOR_BRAZIL_PRETEST 0
|
||||
#define BT_30_SUPPORT 0
|
||||
#define FPGA_TWO_MAC_VERIFICATION 0
|
||||
#endif
|
||||
//define useless flag to avoid compile warning
|
||||
#define USE_WORKITEM 0
|
||||
#define FOR_BRAZIL_PRETEST 0
|
||||
#define BT_30_SUPPORT 0
|
||||
#define FPGA_TWO_MAC_VERIFICATION 0
|
||||
|
||||
|
||||
#endif // __ODM_TYPES_H__
|
||||
|
|
|
@ -108,17 +108,14 @@ struct phy_info //ODM_PHY_INFO_T
|
|||
u8 SignalQuality; // in 0-100 index.
|
||||
u8 RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; //EVM
|
||||
u8 RxMIMOSignalStrength[MAX_PATH_NUM_92CS];// in 0~100 index
|
||||
//#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
|
||||
s8 RxPower; // in dBm Translate from PWdB
|
||||
s8 RecvSignalPower;// Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures.
|
||||
u8 BTRxRSSIPercentage;
|
||||
u8 SignalStrength; // in 0-100 index.
|
||||
u8 RxPwr[MAX_PATH_NUM_92CS];//per-path's pwdb
|
||||
u8 RxSNR[MAX_PATH_NUM_92CS];//per-path's SNR
|
||||
//#endif
|
||||
};
|
||||
|
||||
|
||||
struct rx_pkt_attrib {
|
||||
u16 pkt_len;
|
||||
u8 physt;
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue