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rtl8188eu: Change "}else{" and variants to "} else {"

Browse source 
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2015-08-15 13:27:00 -05:00
parent 0a97479cee
commit 16d2a24227
23 changed files with 73 additions and 73 deletions
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12
hal/Hal8188ERateAdaptive.c
View file

@ -188,7 +188,7 @@ RateDownFinish:
}
else if (pRaInfo->RAWaitingCounter== 0) {
}
else{
else {
pRaInfo->RAWaitingCounter=0;
pRaInfo->RAPendingCounter=0;
}
@ -434,7 +434,7 @@ odm_ARFBRefresh_8188E(
}
}
}
else{
else {
pRaInfo->HighestRate=0;
}
/* Lowest rate */
@ -448,7 +448,7 @@ odm_ARFBRefresh_8188E(
}
}
}
else{
else {
pRaInfo->LowestRate=0;
}
@ -524,12 +524,12 @@ odm_PTTryState_8188E(
pRaInfo->PTStopCount=0;
}
else{
else {
pRaInfo->RAstage=0;
pRaInfo->PTStopCount++;
}
}
else{
else {
pRaInfo->PTStage=0;
pRaInfo->RAstage=0;
}
@ -871,7 +871,7 @@ ODM_RA_TxRPT2Handle_8188E(
else
pRAInfo->RAstage=0;
}
else{
else {
odm_RateDecision_8188E(pDM_Odm,pRAInfo);
}
#else

2
hal/HalPhyRf_8188e.c
View file

@ -1026,7 +1026,7 @@ _PHY_PathADDAOn(
pathOn = 0x0bdb25a0;
ODM_SetBBReg(pDM_Odm, ADDAReg[0], bMaskDWord, 0x0b1b25a0);
}
else{
else {
ODM_SetBBReg(pDM_Odm,ADDAReg[0], bMaskDWord, pathOn);
}

4
hal/hal_com.c
View file

@ -215,7 +215,7 @@ _TwoOutPipeMapping(
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
}
else{/* typical setting */
else {/* typical setting */
/* BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA */
@ -260,7 +260,7 @@ static void _ThreeOutPipeMapping(
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
}
else{/* typical setting */
else {/* typical setting */
/* BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA */

2
hal/hal_intf.c
View file

@ -119,7 +119,7 @@ uint rtw_hal_init(struct adapter *padapter)
init_hw_mlme_ext(padapter);
}
else{
else {
for (i = 0; i<dvobj->iface_nums; i++) {
padapter = dvobj->padapters[i];
padapter->hw_init_completed = false;

12
hal/odm.c
View file

@ -1588,7 +1588,7 @@ odm_DIG(
else
pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 10;
}
else{
else {
/* 2 Modify DIG upper bound */
/* 2013.03.19 Luke: Modified upper bound for Netgear rental house test */
@ -2103,13 +2103,13 @@ odm_1R_CCA(
pDM_PSTable->CurCCAState = CCA_2R;
}
else{
else {
if (pDM_Odm->RSSI_Min <= 30)
pDM_PSTable->CurCCAState = CCA_2R;
else
pDM_PSTable->CurCCAState = CCA_1R;
}
} else{
} else {
pDM_PSTable->CurCCAState=CCA_MAX;
}
@ -2162,7 +2162,7 @@ ODM_RF_Saving(
else
pDM_PSTable->CurRFState = RF_Normal;
}
else{
else {
if (pDM_Odm->RSSI_Min <= Rssi_Low_bound)
pDM_PSTable->CurRFState = RF_Normal;
else
@ -2296,7 +2296,7 @@ u32 ODM_Get_Rate_Bitmap(
{
rate_bitmap = 0x000ff000;
}
else{
else {
if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
rate_bitmap = 0x000ff015;
else
@ -2784,7 +2784,7 @@ odm_RSSIMonitorCheckCE(
if (pHalData->fw_ractrl == true)/* Report every sta's RSSI to FW */
{
}
else{
else {
#if (RATE_ADAPTIVE_SUPPORT == 1)
ODM_RA_SetRSSI_8188E(
&(pHalData->odmpriv), (PWDB_rssi[i]&0xFF), (u8)((PWDB_rssi[i]>>16) & 0xFF));

6
hal/odm_HWConfig.c
View file

@ -185,7 +185,7 @@ odm_SignalScaleMapping(
{
return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(pDM_Odm, CurrSig);
}
else{
else {
return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig);
}
@ -419,7 +419,7 @@ odm_RxPhyStatus92CSeries_Parsing(
else if (pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest) {
SQ = 100;
}
else{
else {
SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
if (SQ_rpt > 64)
@ -504,7 +504,7 @@ odm_RxPhyStatus92CSeries_Parsing(
if ((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)) {
/* do nothing */
} else{/* pMgntInfo->CustomerID != RT_CID_819x_Lenovo */
} else {/* pMgntInfo->CustomerID != RT_CID_819x_Lenovo */
/* */
/* (3)EVM of HT rate */
/* */

4
hal/odm_RegConfig8188E.c
View file

@ -139,7 +139,7 @@ odm_ConfigBB_PHY_REG_PG_8188E(
ODM_delay_us(5);
} else if (Addr == 0xf9) {
ODM_delay_us(1);
} else{
} else {
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, ("===> @@@@@@@ ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data));
storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data);
@ -173,7 +173,7 @@ odm_ConfigBB_PHY_8188E(
else if (Addr == 0xf9) {
ODM_delay_us(1);
}
else{
else {
if (Addr == 0xa24)
pDM_Odm->RFCalibrateInfo.RegA24 = Data;
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);

8
hal/rtl8188e_cmd.c
View file

@ -120,7 +120,7 @@ static s32 FillH2CCmd_88E(struct adapter *padapter, u8 ElementID, u32 CmdLen, u8
{
memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer, CmdLen );
}
else{
else {
memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer,3);
ext_cmd_len = CmdLen-3;
memcpy((u8*)(&h2c_cmd_ex), pCmdBuffer+3,ext_cmd_len );
@ -170,7 +170,7 @@ u8 rtl8188e_set_rssi_cmd(struct adapter*padapter, u8 *param)
;
if (pHalData->fw_ractrl == true) {
}else{
} else {
DBG_8192C("==>%s fw dont support RA\n",__FUNCTION__);
res=_FAIL;
}
@ -191,7 +191,7 @@ u8 rtl8188e_set_raid_cmd(struct adapter*padapter, u32 mask)
memcpy(buf, &lmask, 3);
FillH2CCmd_88E(padapter, H2C_DM_MACID_CFG, 3, buf);
}else{
} else {
DBG_8192C("==>%s fw dont support RA\n",__FUNCTION__);
res=_FAIL;
}
@ -943,7 +943,7 @@ u8 rtl8188e_reset_tsf(struct adapter *padapter, u8 reset_port )
;
if (IFACE_PORT0==reset_port) {
buf[0] = 0x1; buf[1] = 0;
} else{
} else {
buf[0] = 0x0; buf[1] = 0x1;
}

18
hal/rtl8188e_hal_init.c
View file

@ -709,7 +709,7 @@ static void _MCUIO_Reset88E(struct adapter *padapter,u8 bReset)
/* Reset MCU IO Wrapper- sugggest by SD1-Gimmy */
u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1);
rtw_write8(padapter,REG_RSV_CTRL+1, (u1bTmp&(~BIT3)));
}else{
} else {
/* Enable MCU IO Wrapper */
u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1);
rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp|BIT3);
@ -1830,18 +1830,18 @@ hal_EfusePgPacketRead_8188e(
}
if (bDataEmpty==false) {
ReadState = PG_STATE_DATA;
}else{/* read next header */
} else {/* read next header */
efuse_addr = efuse_addr + (word_cnts*2)+1;
ReadState = PG_STATE_HEADER;
}
}
else{/* read next header */
else {/* read next header */
efuse_addr = efuse_addr + (word_cnts*2)+1;
ReadState = PG_STATE_HEADER;
}
}
else{
else {
bContinual = false ;
}
}
@ -2526,7 +2526,7 @@ ReadChipVersion8188E(struct adapter *padapter)
} else if (IS_2T2R(ChipVersion)) {
pHalData->rf_type = RF_2T2R;
pHalData->NumTotalRFPath = 2;
} else{
} else {
pHalData->rf_type = RF_1T1R;
pHalData->NumTotalRFPath = 1;
}
@ -2577,7 +2577,7 @@ static void rtl8188e_SetHalODMVar(
ODM_RAInfo_Init(podmpriv,psta->mac_id);
#endif
}
else{
else {
DBG_8192C("### Clean STA_(%d) info\n",psta->mac_id);
ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,NULL);
}
@ -3208,7 +3208,7 @@ Hal_ReadTxPowerInfo88E(
pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); /* bit0~2 */
else
pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x7); /* bit0~2 */
}else{
} else {
pHalData->EEPROMRegulatory = registry_par->regulatory_tid;
}
}
@ -3273,7 +3273,7 @@ Hal_EfuseParseEEPROMVer88E(
if (pHalData->EEPROMVersion == 0xFF)
pHalData->EEPROMVersion = EEPROM_Default_Version;
}
else{
else {
pHalData->EEPROMVersion = 1;
}
RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n",
@ -3352,7 +3352,7 @@ Hal_ReadAntennaDiversity88E(
if (pHalData->TRxAntDivType == 0xFF)
pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; /* For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */
}
else{
else {
pHalData->TRxAntDivType = registry_par->antdiv_type ;
}

2
hal/rtl8188e_phycfg.c
View file

@ -1903,7 +1903,7 @@ static void phy_SpurCalibration_8188E(
PHY_SetBBReg(Adapter, rOFDM1_CFOTracking, BIT(28), 0x1); /* enable CSI Mask */
PHY_SetBBReg(Adapter, rOFDM1_csi_fix_mask, BIT(26)|BIT(25), 0x3); /* Fix CSI Mask Tone */
}
else{
else {
PHY_SetBBReg(Adapter, rOFDM1_CFOTracking, BIT(28), 0x0); /* disable CSI Mask */
PHY_SetBBReg(Adapter, rOFDM1_csi_fix_mask, BIT(26)|BIT(25), 0x0);
}

2
hal/rtl8188e_rxdesc.c
View file

@ -217,7 +217,7 @@ void update_recvframe_phyinfo_88e(
}
else
sa = get_sa(wlanhdr);
} else{
} else {
sa = get_sa(wlanhdr);
}

2
hal/rtl8188e_sreset.c
View file

@ -46,7 +46,7 @@ void rtl8188e_sreset_xmit_status_check(struct adapter *padapter)
if (psrtpriv->last_tx_complete_time == 0) {
psrtpriv->last_tx_complete_time = current_time;
}
else{
else {
diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time);
if (diff_time > 4000) {
u32 ability;

4
hal/rtl8188eu_xmit.c
View file

@ -270,7 +270,7 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bag
if (pattrib->ampdu_en==true) {
ptxdesc->txdw2 |= cpu_to_le32(AGG_EN);/* AGG EN */
ptxdesc->txdw6 = cpu_to_le32(0x6666f800);
} else{
} else {
ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);/* AGG BK */
}
@ -814,7 +814,7 @@ static s32 xmitframe_direct(struct adapter *padapter, struct xmit_frame *pxmitfr
if (res == _SUCCESS) {
rtw_dump_xframe(padapter, pxmitframe);
}
else{
else {
DBG_8192C("==> %s xmitframe_coalsece failed\n",__FUNCTION__);
}

8
hal/usb_halinit.c
View file

@ -517,7 +517,7 @@ _InitNormalChipTwoOutEpPriority(
mgtQ = valueHi;
hiQ = valueHi;
}
else{/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
else {/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
beQ = valueLow;
bkQ = valueHi;
viQ = valueHi;
@ -546,7 +546,7 @@ _InitNormalChipThreeOutEpPriority(
mgtQ = QUEUE_HIGH;
hiQ = QUEUE_HIGH;
}
else{/* for WMM */
else {/* for WMM */
beQ = QUEUE_LOW;
bkQ = QUEUE_NORMAL;
viQ = QUEUE_NORMAL;
@ -2528,7 +2528,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8* val)
pdmpriv->DMFlag = pdmpriv->InitDMFlag;
podmpriv->SupportAbility = pdmpriv->InitODMFlag;
}
else{
else {
podmpriv->SupportAbility |= *((u32 *)val);
}
/* DBG_871X("HW_VAR_DM_FUNC_SET ==> SupportAbility:0x%08x\n",podmpriv->SupportAbility ); */
@ -2741,7 +2741,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8* val)
if (rx_gain == 0xff) {/* restore rx gain */
ODM_Write_DIG(podmpriv,pDigTable->BackupIGValue);
}
else{
else {
pDigTable->BackupIGValue = pDigTable->CurIGValue;
ODM_Write_DIG(podmpriv,rx_gain);
}

2
hal/usb_ops_linux.c
View file

@ -574,7 +574,7 @@ static int recvbuf2recvframe(struct adapter *padapter, struct sk_buff *pskb)
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,
("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n"));
}
} else{ /* pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP */
} else { /* pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP */
/* enqueue recvframe to txrtp queue */
if (pattrib->pkt_rpt_type == TX_REPORT1) {
/* DBG_8192C("rx CCX\n"); */