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rtl8188eu: Backport kernel version

Browse source 
This driver was added to the kernel with version 3.12. The changes in that
version are now brought back to the GitHub repo. Essentually all of the code
is updated.

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2013-10-19 12:45:47 -05:00
parent 868a407435
commit 19db43ecbd
89 changed files with 2026 additions and 5957 deletions
Download patch file Download diff file Expand all files Collapse all files

6
hal/HalHWImg8188E_BB.c
View file

@ -202,7 +202,7 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm)
u32 *array = array_agc_tab_1t_8188e;
bool biol = false;
struct adapter *adapter = dm_odm->Adapter;
struct xmit_frame *pxmit_frame;
struct xmit_frame *pxmit_frame = NULL;
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
@ -480,9 +480,9 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm)
u8 board = dm_odm->BoardType;
u32 arraylen = sizeof(array_phy_reg_1t_8188e)/sizeof(u32);
u32 *array = array_phy_reg_1t_8188e;
bool biol = false;
bool biol = false;
struct adapter *adapter = dm_odm->Adapter;
struct xmit_frame *pxmit_frame;
struct xmit_frame *pxmit_frame = NULL;
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
hex += board;

2
hal/HalHWImg8188E_MAC.c
View file

@ -159,7 +159,7 @@ enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm)
bool biol = false;
struct adapter *adapt = dm_odm->Adapter;
struct xmit_frame *pxmit_frame;
struct xmit_frame *pxmit_frame = NULL;
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
hex += board;

2
hal/HalHWImg8188E_RF.c
View file

@ -170,7 +170,7 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm)
u32 *Array = Array_RadioA_1T_8188E;
bool biol = false;
struct adapter *Adapter = pDM_Odm->Adapter;
struct xmit_frame *pxmit_frame;
struct xmit_frame *pxmit_frame = NULL;
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;

24
hal/HalPhyRf.c
View file

@ -26,30 +26,6 @@
void ODM_ResetIQKResult(struct odm_dm_struct *pDM_Odm)
{
u8 i;
struct adapter *adapt = pDM_Odm->Adapter;
if (!IS_HARDWARE_TYPE_8192D(adapt))
return;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
("PHY_ResetIQKResult:: settings regs %d default regs %d\n",
(u32)(sizeof(pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting) /
sizeof(struct ijk_matrix_regs_set)), IQK_Matrix_Settings_NUM));
/* 0xe94, 0xe9c, 0xea4, 0xeac, 0xeb4, 0xebc, 0xec4, 0xecc */
for (i = 0; i < IQK_Matrix_Settings_NUM; i++) {
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][0] = 0x100;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][2] = 0x100;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][4] = 0x100;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][6] = 0x100;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][1] = 0;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][3] = 0;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][5] = 0;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][7] = 0;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].bIQKDone = false;
}
}
u8 ODM_GetRightChnlPlaceforIQK(u8 chnl)

27
hal/HalPhyRf_8188e.c
View file

@ -1661,9 +1661,8 @@ static void phy_APCalibrate_8188E(struct adapter *adapt, s8 delta, bool is2t)
else
ODM_SetRFReg(dm_odm, path, 0x4, bMaskDWord,
((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05));
if (!IS_HARDWARE_TYPE_8723A(adapt))
ODM_SetRFReg(dm_odm, path, RF_BS_PA_APSET_G9_G11, bMaskDWord,
((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08));
ODM_SetRFReg(dm_odm, path, RF_BS_PA_APSET_G9_G11, bMaskDWord,
((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08));
}
dm_odm->RFCalibrateInfo.bAPKdone = true;
@ -1868,6 +1867,28 @@ void PHY_LCCalibrate_8188E(struct adapter *adapt)
("LCK:Finish!!!interface %d\n", dm_odm->InterfaceIndex));
}
void PHY_APCalibrate_8188E(struct adapter *adapt, s8 delta)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
return;
if (!(dm_odm->SupportAbility & ODM_RF_CALIBRATION))
return;
#if FOR_BRAZIL_PRETEST != 1
if (dm_odm->RFCalibrateInfo.bAPKdone)
#endif
return;
if (dm_odm->RFType == ODM_2T2R) {
phy_APCalibrate_8188E(adapt, delta, true);
} else {
/* For 88C 1T1R */
phy_APCalibrate_8188E(adapt, delta, false);
}
}
static void phy_setrfpathswitch_8188e(struct adapter *adapt, bool main, bool is2t)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);

4
hal/hal_intf.c
View file

@ -268,14 +268,14 @@ void rtw_hal_update_ra_mask(struct adapter *adapt, u32 mac_id, u8 rssi_level)
struct mlme_priv *pmlmepriv = &(adapt->mlmepriv);
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) {
#ifdef CONFIG_88EU_AP_MODE
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &adapt->stapriv;
#ifdef CONFIG_AP_MODE
if ((mac_id-1) > 0)
psta = pstapriv->sta_aid[(mac_id-1) - 1];
#endif
if (psta)
add_RATid(adapt, psta, 0);/* todo: based on rssi_level*/
#endif
} else {
if (adapt->HalFunc.UpdateRAMaskHandler)
adapt->HalFunc.UpdateRAMaskHandler(adapt, mac_id,

298
hal/odm.c
View file

@ -540,51 +540,6 @@ void odm_CmnInfoUpdate_Debug(struct odm_dm_struct *pDM_Odm)
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min=%d\n", pDM_Odm->RSSI_Min));
}
/* 3============================================================ */
/* 3 DIG */
/* 3============================================================ */
/*-----------------------------------------------------------------------------
* Function: odm_DIGInit()
*
* Overview: Set DIG scheme init value.
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
*
*---------------------------------------------------------------------------*/
static void ODM_ChangeDynamicInitGainThresh(struct odm_dm_struct *pDM_Odm, u32 DM_Type, u32 DM_Value)
{
struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
if (DM_Type == DM_DIG_THRESH_HIGH) {
pDM_DigTable->RssiHighThresh = DM_Value;
} else if (DM_Type == DM_DIG_THRESH_LOW) {
pDM_DigTable->RssiLowThresh = DM_Value;
} else if (DM_Type == RT_TYPE_ENABLE) {
pDM_DigTable->Dig_Enable_Flag = true;
} else if (DM_Type == RT_TYPE_DISABLE) {
pDM_DigTable->Dig_Enable_Flag = false;
} else if (DM_Type == RT_TYPE_BACKOFF) {
if (DM_Value > 30)
DM_Value = 30;
pDM_DigTable->BackoffVal = (u8)DM_Value;
} else if (DM_Type == RT_TYPE_RX_GAIN_MIN) {
if (DM_Value == 0)
DM_Value = 0x1;
pDM_DigTable->rx_gain_range_min = (u8)DM_Value;
} else if (DM_Type == RT_TYPE_RX_GAIN_MAX) {
if (DM_Value > 0x50)
DM_Value = 0x50;
pDM_DigTable->rx_gain_range_max = (u8)DM_Value;
}
} /* DM_ChangeDynamicInitGainThresh */
static int getIGIForDiff(int value_IGI)
{
#define ONERCCA_LOW_TH 0x30
@ -1470,39 +1425,6 @@ void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm)
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
}
static void odm_DynamicTxPowerSavePowerIndex(struct odm_dm_struct *pDM_Odm)
{
u8 index;
u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
struct adapter *Adapter = pDM_Odm->Adapter;
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
for (index = 0; index < 6; index++)
pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]);
}
static void odm_DynamicTxPowerRestorePowerIndex(struct odm_dm_struct *pDM_Odm)
{
u8 index;
struct adapter *Adapter = pDM_Odm->Adapter;
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
struct dm_priv *pdmpriv = &pHalData->dmpriv;
for (index = 0; index < 6; index++)
rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]);
}
static void odm_DynamicTxPowerWritePowerIndex(struct odm_dm_struct *pDM_Odm, u8 Value)
{
u8 index;
u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
for (index = 0; index < 6; index++)
ODM_Write1Byte(pDM_Odm, Power_Index_REG[index], Value);
}
void odm_DynamicTxPower(struct odm_dm_struct *pDM_Odm)
{
/* For AP/ADSL use struct rtl8192cd_priv * */
@ -1546,18 +1468,10 @@ void odm_DynamicTxPowerAP(struct odm_dm_struct *pDM_Odm)
{
}
static void odm_DynamicTxPower_92C(struct odm_dm_struct *pDM_Odm)
{
}
/* 3============================================================ */
/* 3 RSSI Monitor */
/* 3============================================================ */
static void odm_RSSIMonitorInit(struct odm_dm_struct *pDM_Odm)
{
}
void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm)
{
if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR))
@ -1589,13 +1503,6 @@ void odm_RSSIMonitorCheckMP(struct odm_dm_struct *pDM_Odm)
{
}
/* */
/* sherry move from DUSC to here 20110517 */
/* */
static void FindMinimumRSSI_Dmsp(struct adapter *pAdapter)
{
}
static void FindMinimumRSSI(struct adapter *pAdapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
@ -1780,10 +1687,6 @@ void odm_SwAntDivChkAntSwitch(struct odm_dm_struct *pDM_Odm, u8 Step)
{
}
static void ODM_SwAntDivResetBeforeLink(struct odm_dm_struct *pDM_Odm)
{
}
void ODM_SwAntDivRestAfterLink(struct odm_dm_struct *pDM_Odm)
{
}
@ -1796,67 +1699,6 @@ void odm_SwAntDivChkAntSwitchCallback(void *FunctionContext)
/* 3 SW Antenna Diversity */
/* 3============================================================ */
static void odm_InitHybridAntDiv_88C_92D(struct odm_dm_struct *pDM_Odm)
{
struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
u8 bTxPathSel = 0; /* 0:Path-A 1:Path-B */
u8 i;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_InitHybridAntDiv==============>\n"));
/* whether to do antenna diversity or not */
if ((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8192D))
return;
bTxPathSel = (pDM_Odm->RFType == ODM_1T1R) ? false : true;
ODM_SetBBReg(pDM_Odm, ODM_REG_BB_PWR_SAV1_11N, BIT23, 0); /* No update ANTSEL during GNT_BT=1 */
ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N, BIT21, 1); /* TX atenna selection from tx_info */
ODM_SetBBReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, BIT23, 1); /* enable LED[1:0] pin as ANTSEL */
ODM_SetBBReg(pDM_Odm, ODM_REG_ANTSEL_CTRL_11N, BIT8|BIT9, 0x01); /* 0x01: left antenna, 0x02: right antenna */
/* check HW setting: ANTSEL pin connection */
/* only AP support different path selection temperarly */
if (!bTxPathSel) { /* PATH-A */
ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N, BIT8|BIT9, 0); /* ANTSEL as HW control */
ODM_SetBBReg(pDM_Odm, ODM_REG_ANTSEL_PATH_11N, BIT13, 1); /* select TX ANTESEL from path A */
} else {
ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N, BIT24|BIT25, 0); /* ANTSEL as HW control */
ODM_SetBBReg(pDM_Odm, ODM_REG_ANTSEL_PATH_11N, BIT13, 0); /* select ANTESEL from path B */
}
/* Set OFDM HW RX Antenna Diversity */
ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N, 0x7FF, 0x0c0); /* Pwdb threshold=8dB */
ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N, BIT11, 0); /* Switch to another antenna by checking pwdb threshold */
ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA3_11N, BIT23, 1); /* Decide final antenna by comparing 2 antennas' pwdb */
/* Set CCK HW RX Antenna Diversity */
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 0); /* Antenna diversity decision period = 32 sample */
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N, 0xf, 0xf); /* Threshold for antenna diversity. Check another antenna power if input power < ANT_lim*4 */
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA3_11N, BIT13, 1); /* polarity ana_A=1 and ana_B=0 */
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA4_11N, 0x1f, 0x8); /* default antenna power = inpwr*(0.5 + r_ant_step/16) */
/* Enable HW Antenna Diversity */
if (!bTxPathSel) /* PATH-A */
ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N, BIT7, 1); /* Enable Hardware antenna switch */
else
ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_B_11N, BIT7, 1); /* Enable Hardware antenna switch */
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 1);/* Enable antenna diversity */
pDM_SWAT_Table->CurAntenna = 0; /* choose left antenna as default antenna */
pDM_SWAT_Table->PreAntenna = 0;
for (i = 0; i < ASSOCIATE_ENTRY_NUM; i++) {
pDM_SWAT_Table->CCK_Ant1_Cnt[i] = 0;
pDM_SWAT_Table->CCK_Ant2_Cnt[i] = 0;
pDM_SWAT_Table->OFDM_Ant1_Cnt[i] = 0;
pDM_SWAT_Table->OFDM_Ant2_Cnt[i] = 0;
pDM_SWAT_Table->RSSI_Ant1_Sum[i] = 0;
pDM_SWAT_Table->RSSI_Ant2_Sum[i] = 0;
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("<==============odm_InitHybridAntDiv\n"));
}
void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm)
{
if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) {
@ -1870,69 +1712,6 @@ void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm)
ODM_AntennaDiversityInit_88E(pDM_Odm);
}
static bool odm_StaDefAntSel(struct odm_dm_struct *pDM_Odm, u32 OFDM_Ant1_Cnt,
u32 OFDM_Ant2_Cnt, u32 CCK_Ant1_Cnt, u32 CCK_Ant2_Cnt, u8 *pDefAnt)
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_StaDefAntSelect==============>\n"));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("OFDM_Ant1_Cnt:%d, OFDM_Ant2_Cnt:%d\n", OFDM_Ant1_Cnt, OFDM_Ant2_Cnt));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("CCK_Ant1_Cnt:%d, CCK_Ant2_Cnt:%d\n", CCK_Ant1_Cnt, CCK_Ant2_Cnt));
if (((OFDM_Ant1_Cnt+OFDM_Ant2_Cnt) == 0) && ((CCK_Ant1_Cnt + CCK_Ant2_Cnt) < 10)) {
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_StaDefAntSelect Fail: No enough packet info!\n"));
return false;
}
if (OFDM_Ant1_Cnt || OFDM_Ant2_Cnt) {
/* if RX OFDM packet number larger than 0 */
if (OFDM_Ant1_Cnt > OFDM_Ant2_Cnt)
(*pDefAnt) = 1;
else
(*pDefAnt) = 0;
} else if ((CCK_Ant1_Cnt + CCK_Ant2_Cnt) >= 10) {
/* else if RX CCK packet number larger than 10 */
if (CCK_Ant1_Cnt > (5*CCK_Ant2_Cnt))
(*pDefAnt) = 1;
else if (CCK_Ant2_Cnt > (5*CCK_Ant1_Cnt))
(*pDefAnt) = 0;
else if (CCK_Ant1_Cnt > CCK_Ant2_Cnt)
(*pDefAnt) = 0;
else
(*pDefAnt) = 1;
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TxAnt = %s\n", ((*pDefAnt) == 1) ? "Ant1" : "Ant2"));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("<==============odm_StaDefAntSelect\n"));
return true;
}
static void odm_SetRxIdleAnt(struct odm_dm_struct *pDM_Odm, u8 Ant, bool bDualPath)
{
struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
if (Ant != pDM_SWAT_Table->RxIdleAnt) {
/* for path-A */
if (Ant == 1)
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N, 0xFFFF, 0x65a9); /* right-side antenna */
else
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N, 0xFFFF, 0x569a); /* left-side antenna */
/* for path-B */
if (bDualPath) {
if (Ant == 0)
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N, 0xFFFF0000, 0x65a9); /* right-side antenna */
else
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N, 0xFFFF0000, 0x569a); /* left-side antenna */
}
}
pDM_SWAT_Table->RxIdleAnt = Ant;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RxIdleAnt: %s Reg858=0x%x\n", (Ant == 1) ? "Ant1" : "Ant2", (Ant == 1) ? 0x65a9 : 0x569a));
}
void ODM_AntselStatistics_88C(struct odm_dm_struct *pDM_Odm, u8 MacId, u32 PWDBAll, bool isCCKrate)
{
struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
@ -1954,78 +1733,6 @@ void ODM_AntselStatistics_88C(struct odm_dm_struct *pDM_Odm, u8 MacId, u32 PWDBA
}
}
static void ODM_SetTxAntByTxInfo_88C_92D(struct odm_dm_struct *pDM_Odm)
{
}
static void odm_HwAntDiv_92C_92D(struct odm_dm_struct *pDM_Odm)
{
struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
u32 RSSI_Min = 0xFF, RSSI, RSSI_Ant1, RSSI_Ant2;
u8 RxIdleAnt, i;
bool bRet = false;
struct sta_info *pEntry;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_HwAntDiv==============>\n"));
if (!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) {
/* if don't support antenna diveristy */
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_HwAntDiv: Not supported!\n"));
return;
}
if ((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8192D)) {
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: IC Type is not 92C or 92D\n"));
return;
}
if (!pDM_Odm->bLinked) {
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: bLinked is false\n"));
return;
}
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
pEntry = pDM_Odm->pODM_StaInfo[i];
if (IS_STA_VALID(pEntry)) {
RSSI_Ant1 = (pDM_SWAT_Table->OFDM_Ant1_Cnt[i] == 0) ? 0 : (pDM_SWAT_Table->RSSI_Ant1_Sum[i]/pDM_SWAT_Table->OFDM_Ant1_Cnt[i]);
RSSI_Ant2 = (pDM_SWAT_Table->OFDM_Ant2_Cnt[i] == 0) ? 0 : (pDM_SWAT_Table->RSSI_Ant2_Sum[i]/pDM_SWAT_Table->OFDM_Ant2_Cnt[i]);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RSSI_Ant1=%d, RSSI_Ant2=%d\n", RSSI_Ant1, RSSI_Ant2));
if (RSSI_Ant1 || RSSI_Ant2) {
RSSI = (RSSI_Ant1 < RSSI_Ant2) ? RSSI_Ant1 : RSSI_Ant2;
if ((!RSSI) || (RSSI < RSSI_Min)) {
pDM_SWAT_Table->TargetSTA = i;
RSSI_Min = RSSI;
}
}
/* STA: found out default antenna */
bRet = odm_StaDefAntSel(pDM_Odm,
pDM_SWAT_Table->OFDM_Ant1_Cnt[i],
pDM_SWAT_Table->OFDM_Ant2_Cnt[i],
pDM_SWAT_Table->CCK_Ant1_Cnt[i],
pDM_SWAT_Table->CCK_Ant2_Cnt[i],
&pDM_SWAT_Table->TxAnt[i]);
/* if Tx antenna selection: successful */
if (bRet) {
pDM_SWAT_Table->RSSI_Ant1_Sum[i] = 0;
pDM_SWAT_Table->RSSI_Ant2_Sum[i] = 0;
pDM_SWAT_Table->OFDM_Ant1_Cnt[i] = 0;
pDM_SWAT_Table->OFDM_Ant2_Cnt[i] = 0;
pDM_SWAT_Table->CCK_Ant1_Cnt[i] = 0;
pDM_SWAT_Table->CCK_Ant2_Cnt[i] = 0;
}
}
}
/* set RX Idle Ant */
RxIdleAnt = pDM_SWAT_Table->TxAnt[pDM_SWAT_Table->TargetSTA];
odm_SetRxIdleAnt(pDM_Odm, RxIdleAnt, false);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("<==============odm_HwAntDiv\n"));
}
void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm)
{
if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) {
@ -2095,11 +1802,6 @@ void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm)
if (pmlmeinfo->assoc_AP_vendor >= HT_IOT_PEER_MAX)
goto dm_CheckEdcaTurbo_EXIT;
#ifdef CONFIG_BT_COEXIST
if (BT_DisableEDCATurbo(Adapter))
goto dm_CheckEdcaTurbo_EXIT;
#endif
/* Check if the status needs to be changed. */
if ((bbtchange) || (!precvpriv->bIsAnyNonBEPkts)) {
cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes;

12
hal/odm_HWConfig.c
View file

@ -41,20 +41,17 @@ static u8 odm_QueryRxPwrPercentage(s8 AntPower)
/* IF other SW team do not support the feature, remove this section.?? */
static s32 odm_sig_patch_lenove(struct odm_dm_struct *dm_odm, s32 CurrSig)
{
s32 RetSig;
return RetSig;
return 0;
}
static s32 odm_sig_patch_netcore(struct odm_dm_struct *dm_odm, s32 CurrSig)
{
s32 RetSig;
return RetSig;
return 0;
}
static s32 odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s32 CurrSig)
{
s32 RetSig;
s32 RetSig = 0;
if ((dm_odm->SupportInterface == ODM_ITRF_USB) ||
(dm_odm->SupportInterface == ODM_ITRF_SDIO)) {
@ -96,8 +93,7 @@ static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig)
static u8 odm_SQ_process_patch_RT_CID_819x_Lenovo(struct odm_dm_struct *dm_odm,
u8 isCCKrate, u8 PWDB_ALL, u8 path, u8 RSSI)
{
u8 SQ;
return SQ;
return 0;
}
static u8 odm_EVMdbToPercentage(s8 Value)

170
hal/rtl8188e_cmd.c
View file

@ -44,9 +44,6 @@ static u8 _is_fw_read_cmd_down(struct adapter *adapt, u8 msgbox_num)
valid = rtw_read8(adapt, REG_HMETFR) & BIT(msgbox_num);
if (0 == valid)
read_down = true;
#ifdef CONFIG_WOWLAN
rtw_msleep_os(2);
#endif
} while ((!read_down) && (retry_cnts--));
return read_down;
@ -101,11 +98,11 @@ _func_enter_;
*(u8 *)(&h2c_cmd) = ElementID;
if (CmdLen <= 3) {
_rtw_memcpy((u8 *)(&h2c_cmd)+1, pCmdBuffer, CmdLen);
memcpy((u8 *)(&h2c_cmd)+1, pCmdBuffer, CmdLen);
} else {
_rtw_memcpy((u8 *)(&h2c_cmd)+1, pCmdBuffer, 3);
memcpy((u8 *)(&h2c_cmd)+1, pCmdBuffer, 3);
ext_cmd_len = CmdLen-3;
_rtw_memcpy((u8 *)(&h2c_cmd_ex), pCmdBuffer+3, ext_cmd_len);
memcpy((u8 *)(&h2c_cmd_ex), pCmdBuffer+3, ext_cmd_len);
/* Write Ext command */
msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num * RTL88E_EX_MESSAGE_BOX_SIZE);
@ -163,7 +160,7 @@ _func_enter_;
_rtw_memset(buf, 0, 3);
lmask = cpu_to_le32(mask);
_rtw_memcpy(buf, &lmask, 3);
memcpy(buf, &lmask, 3);
FillH2CCmd_88E(adapt, H2C_DM_MACID_CFG, 3, buf);
} else {
@ -276,7 +273,7 @@ void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, __le16 mstatus_rpt)
static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength)
{
struct rtw_ieee80211_hdr *pwlanhdr;
u16 *fctrl;
__le16 *fctrl;
u32 rate_len, pktlen;
struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
@ -288,9 +285,9 @@ static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength)
fctrl = &(pwlanhdr->frame_ctl);
*(fctrl) = 0;
_rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN);
memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN);
SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/);
SetFrameSubType(pframe, WIFI_BEACON);
@ -303,20 +300,20 @@ static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength)
pktlen += 8;
/* beacon interval: 2 bytes */
_rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2);
memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2);
pframe += 2;
pktlen += 2;
/* capability info: 2 bytes */
_rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2);
memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2);
pframe += 2;
pktlen += 2;
if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
pktlen += cur_network->IELength - sizeof(struct ndis_802_11_fixed_ie);
_rtw_memcpy(pframe, cur_network->IEs+sizeof(struct ndis_802_11_fixed_ie), pktlen);
memcpy(pframe, cur_network->IEs+sizeof(struct ndis_802_11_fixed_ie), pktlen);
goto _ConstructBeacon;
}
@ -361,9 +358,9 @@ _ConstructBeacon:
static void ConstructPSPoll(struct adapter *adapt, u8 *pframe, u32 *pLength)
{
struct rtw_ieee80211_hdr *pwlanhdr;
u16 *fctrl;
struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
__le16 *fctrl;
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
@ -377,10 +374,10 @@ static void ConstructPSPoll(struct adapter *adapt, u8 *pframe, u32 *pLength)
SetDuration(pframe, (pmlmeinfo->aid | 0xc000));
/* BSSID. */
_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
/* TA. */
_rtw_memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
*pLength = 16;
}
@ -394,7 +391,7 @@ static void ConstructNullFunctionData(struct adapter *adapt, u8 *pframe,
u8 bForcePowerSave)
{
struct rtw_ieee80211_hdr *pwlanhdr;
u16 *fctrl;
__le16 *fctrl;
u32 pktlen;
struct mlme_priv *pmlmepriv = &adapt->mlmepriv;
struct wlan_network *cur_network = &pmlmepriv->cur_network;
@ -411,21 +408,21 @@ static void ConstructNullFunctionData(struct adapter *adapt, u8 *pframe,
switch (cur_network->network.InfrastructureMode) {
case Ndis802_11Infrastructure:
SetToDs(fctrl);
_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN);
memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN);
break;
case Ndis802_11APMode:
SetFrDs(fctrl);
_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr3, myid(&(adapt->eeprompriv)), ETH_ALEN);
memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
memcpy(pwlanhdr->addr3, myid(&(adapt->eeprompriv)), ETH_ALEN);
break;
case Ndis802_11IBSS:
default:
_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
break;
}
@ -453,7 +450,7 @@ static void ConstructNullFunctionData(struct adapter *adapt, u8 *pframe,
static void ConstructProbeRsp(struct adapter *adapt, u8 *pframe, u32 *pLength, u8 *StaAddr, bool bHideSSID)
{
struct rtw_ieee80211_hdr *pwlanhdr;
u16 *fctrl;
__le16 *fctrl;
u8 *mac, *bssid;
u32 pktlen;
struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
@ -467,9 +464,9 @@ static void ConstructProbeRsp(struct adapter *adapt, u8 *pframe, u32 *pLength, u
fctrl = &(pwlanhdr->frame_ctl);
*(fctrl) = 0;
_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN);
memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
memcpy(pwlanhdr->addr2, mac, ETH_ALEN);
memcpy(pwlanhdr->addr3, bssid, ETH_ALEN);
SetSeqNum(pwlanhdr, 0);
SetFrameSubType(fctrl, WIFI_PROBERSP);
@ -480,7 +477,7 @@ static void ConstructProbeRsp(struct adapter *adapt, u8 *pframe, u32 *pLength, u
if (cur_network->IELength > MAX_IE_SZ)
return;
_rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength);
memcpy(pframe, cur_network->IEs, cur_network->IELength);
pframe += cur_network->IELength;
pktlen += cur_network->IELength;
@ -511,7 +508,7 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished)
struct xmit_priv *pxmitpriv;
struct mlme_ext_priv *pmlmeext;
struct mlme_ext_info *pmlmeinfo;
u32 BeaconLength, ProbeRspLength, PSPollLength;
u32 BeaconLength = 0, ProbeRspLength = 0, PSPollLength;
u32 NullDataLength, QosNullLength;
u8 *ReservedPagePacket;
u8 PageNum, PageNeed, TxDescLen;
@ -599,7 +596,7 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished)
pattrib->qsel = 0x10;
pattrib->last_txcmdsz = TotalPacketLen - TXDESC_OFFSET;
pattrib->pktlen = pattrib->last_txcmdsz;
_rtw_memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen);
memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen);
rtw_hal_mgnt_xmit(adapt, pmgntframe);
@ -607,14 +604,11 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished)
FillH2CCmd_88E(adapt, H2C_COM_RSVD_PAGE, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc);
exit:
rtw_mfree(ReservedPagePacket, 1000);
kfree(ReservedPagePacket);
}
void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
{
#ifdef CONFIG_WOWLAN
struct joinbssrpt_parm JoinBssRptParm;
#endif /* CONFIG_WOWLAN */
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
@ -707,21 +701,12 @@ _func_enter_;
haldata->RegCR_1 &= (~BIT0);
rtw_write8(adapt, REG_CR+1, haldata->RegCR_1);
}
#ifdef CONFIG_WOWLAN
if (adapt->pwrctrlpriv.wowlan_mode) {
JoinBssRptParm.OpMode = mstatus;
JoinBssRptParm.MacID = 0;
FillH2CCmd_88E(adapt, H2C_COM_MEDIA_STATUS_RPT, sizeof(JoinBssRptParm), (u8 *)&JoinBssRptParm);
DBG_88E_LEVEL(_drv_info_, "%s opmode:%d MacId:%d\n", __func__, JoinBssRptParm.OpMode, JoinBssRptParm.MacID);
} else {
DBG_88E_LEVEL(_drv_info_, "%s wowlan_mode is off\n", __func__);
}
#endif /* CONFIG_WOWLAN */
_func_exit_;
}
void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state)
{
#ifdef CONFIG_88EU_P2P
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct wifidirect_info *pwdinfo = &(adapt->wdinfo);
struct P2P_PS_Offload_t *p2p_ps_offload = &haldata->p2p_ps_offload;
@ -788,94 +773,7 @@ _func_enter_;
}
FillH2CCmd_88E(adapt, H2C_PS_P2P_OFFLOAD, 1, (u8 *)p2p_ps_offload);
#endif
_func_exit_;
}
#ifdef CONFIG_WOWLAN
void rtl8188es_set_wowlan_cmd(struct adapter *adapt, u8 enable)
{
u8 res = _SUCCESS;
struct setwowlan_parm pwowlan_parm;
struct setaoac_glocal_info paoac_global_info_parm;
struct pwrctrl_priv *pwrpriv = &adapt->pwrctrlpriv;
_func_enter_;
DBG_88E_LEVEL(_drv_info_, "+%s+\n", __func__);
pwowlan_parm.mode = 0;
pwowlan_parm.gpio_index = 0;
pwowlan_parm.gpio_duration = 0;
pwowlan_parm.second_mode = 0;
pwowlan_parm.reserve = 0;
if (enable) {
pwowlan_parm.mode |= FW_WOWLAN_FUN_EN;
pwrpriv->wowlan_magic = true;
pwrpriv->wowlan_unicast = true;
if (pwrpriv->wowlan_pattern) {
pwowlan_parm.mode |= FW_WOWLAN_PATTERN_MATCH;
DBG_88E_LEVEL(_drv_info_, "%s 2.pwowlan_parm.mode=0x%x\n", __func__, pwowlan_parm.mode);
}
if (pwrpriv->wowlan_magic) {
pwowlan_parm.mode |= FW_WOWLAN_MAGIC_PKT;
DBG_88E_LEVEL(_drv_info_, "%s 3.pwowlan_parm.mode=0x%x\n", __func__, pwowlan_parm.mode);
}
if (pwrpriv->wowlan_unicast) {
pwowlan_parm.mode |= FW_WOWLAN_UNICAST;
DBG_88E_LEVEL(_drv_info_, "%s 4.pwowlan_parm.mode=0x%x\n", __func__, pwowlan_parm.mode);
}
if (!(adapt->pwrctrlpriv.wowlan_wake_reason & FWDecisionDisconnect))
rtl8188e_set_FwJoinBssReport_cmd(adapt, 1);
else
DBG_88E_LEVEL(_drv_info_, "%s, disconnected, no FwJoinBssReport\n", __func__);
rtw_msleep_os(2);
/* WOWLAN_GPIO_ACTIVE means GPIO high active */
pwowlan_parm.mode |= FW_WOWLAN_REKEY_WAKEUP;
pwowlan_parm.mode |= FW_WOWLAN_DEAUTH_WAKEUP;
/* DataPinWakeUp */
pwowlan_parm.gpio_index = 0x0;
DBG_88E_LEVEL(_drv_info_, "%s 5.pwowlan_parm.mode=0x%x\n", __func__, pwowlan_parm.mode);
DBG_88E_LEVEL(_drv_info_, "%s 6.pwowlan_parm.index=0x%x\n", __func__, pwowlan_parm.gpio_index);
res = FillH2CCmd_88E(adapt, H2C_COM_WWLAN, 2, (u8 *)&pwowlan_parm);
rtw_msleep_os(2);
/* disconnect decision */
pwowlan_parm.mode = 1;
pwowlan_parm.gpio_index = 0;
pwowlan_parm.gpio_duration = 0;
FillH2CCmd_88E(adapt, H2C_COM_DISCNT_DECISION, 3, (u8 *)&pwowlan_parm);
/* keep alive period = 10 * 10 BCN interval */
pwowlan_parm.mode = 1;
pwowlan_parm.gpio_index = 10;
res = FillH2CCmd_88E(adapt, H2C_COM_KEEP_ALIVE, 2, (u8 *)&pwowlan_parm);
rtw_msleep_os(2);
/* Configure STA security information for GTK rekey wakeup event. */
paoac_global_info_parm.pairwiseEncAlg = adapt->securitypriv.dot11PrivacyAlgrthm;
paoac_global_info_parm.groupEncAlg = adapt->securitypriv.dot118021XGrpPrivacy;
res = FillH2CCmd_88E(adapt, H2C_COM_AOAC_GLOBAL_INFO, 2, (u8 *)&paoac_global_info_parm);
rtw_msleep_os(2);
/* enable Remote wake ctrl */
pwowlan_parm.mode = 1;
pwowlan_parm.gpio_index = 0;
pwowlan_parm.gpio_duration = 0;
res = FillH2CCmd_88E(adapt, H2C_COM_REMOTE_WAKE_CTRL, 3, (u8 *)&pwowlan_parm);
} else {
pwrpriv->wowlan_magic = false;
res = FillH2CCmd_88E(adapt, H2C_COM_WWLAN, 2, (u8 *)&pwowlan_parm);
rtw_msleep_os(2);
res = FillH2CCmd_88E(adapt, H2C_COM_REMOTE_WAKE_CTRL, 3, (u8 *)&pwowlan_parm);
}
_func_exit_;
DBG_88E_LEVEL(_drv_info_, "-%s res:%d-\n", __func__, res);
return;
}
#endif /* CONFIG_WOWLAN */

60
hal/rtl8188e_dm.c
View file

@ -31,75 +31,18 @@
#include <rtl8188e_hal.h>
static void dm_CheckProtection(struct adapter *Adapter)
{
}
static void dm_CheckStatistics(struct adapter *Adapter)
{
}
static void dm_CheckPbcGPIO(struct adapter *padapter)
{
u8 tmp1byte;
u8 bPbcPressed = false;
if (!padapter->registrypriv.hw_wps_pbc)
return;
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as output mode */
tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IN, tmp1byte); /* reset the floating voltage level */
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as input mode */
tmp1byte = rtw_read8(padapter, GPIO_IN);
if (tmp1byte == 0xff)
return;
if (tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)
bPbcPressed = true;
if (bPbcPressed) {
/* Here we only set bPbcPressed to true */
/* After trigger PBC, the variable will be set to false */
DBG_88E("CheckPbcGPIO - PBC is pressed\n");
if (padapter->pid[0] == 0) {
/* 0 is the default value and it means the application
* monitors the HW PBC doesn't privde its pid to driver. */
return;
}
rtw_signal_process(padapter->pid[0], SIGUSR1);
}
}
/* */
/* Initialize GPIO setting registers */
/* */
static void dm_InitGPIOSetting(struct adapter *Adapter)
{
#ifdef CONFIG_BT_COEXIST
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
#endif
u8 tmp1byte;
tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG);
tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
#ifdef CONFIG_BT_COEXIST
/* UMB-B cut bug. We need to support the modification. */
if (IS_81xxC_VENDOR_UMC_B_CUT(hal_data->VersionID) &&
hal_data->bt_coexist.BT_Coexist)
tmp1byte |= BIT5;
#endif
rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
}
@ -114,7 +57,7 @@ static void Init_ODM_ComInfo_88E(struct adapter *Adapter)
u8 cut_ver, fab_ver;
/* Init Value */
_rtw_memset(dm_odm, 0, sizeof(dm_odm));
_rtw_memset(dm_odm, 0, sizeof(*dm_odm));
dm_odm->Adapter = Adapter;
@ -240,7 +183,6 @@ void rtl8188e_HalDmWatchDog(struct adapter *Adapter)
/* Calculate Tx/Rx statistics. */
dm_CheckStatistics(Adapter);
_record_initrate:
_func_exit_;
}

305
hal/rtl8188e_hal_init.c
View file

@ -201,8 +201,7 @@ efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf)
/* */
exit:
if (efuseTbl)
rtw_mfree(efuseTbl, EFUSE_MAP_LEN_88E);
kfree(efuseTbl);
if (eFuseWord)
rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
@ -264,18 +263,18 @@ static void efuse_read_phymap_from_txpktbuf(
DBG_88E("%s len:%u, lenbak:%u, aaa:%u, aaabak:%u\n", __func__, len, lenbak, aaa, aaabak);
_rtw_memcpy(pos, ((u8 *)&lo32)+2, (limit >= count+2) ? 2 : limit-count);
memcpy(pos, ((u8 *)&lo32)+2, (limit >= count+2) ? 2 : limit-count);
count += (limit >= count+2) ? 2 : limit-count;
pos = content+count;
} else {
_rtw_memcpy(pos, ((u8 *)&lo32), (limit >= count+4) ? 4 : limit-count);
memcpy(pos, ((u8 *)&lo32), (limit >= count+4) ? 4 : limit-count);
count += (limit >= count+4) ? 4 : limit-count;
pos = content+count;
}
if (limit > count && len-2 > count) {
_rtw_memcpy(pos, (u8 *)&hi32, (limit >= count+4) ? 4 : limit-count);
memcpy(pos, (u8 *)&hi32, (limit >= count+4) ? 4 : limit-count);
count += (limit >= count+4) ? 4 : limit-count;
pos = content+count;
}
@ -332,9 +331,9 @@ static s32 iol_ioconfig(struct adapter *padapter, u8 iocfg_bndy)
static int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt)
{
struct pkt_attrib *pattrib = &xmit_frame->attrib;
u8 i;
int ret = _FAIL;
struct pkt_attrib *pattrib = &xmit_frame->attrib;
if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS)
goto exit;
@ -378,10 +377,10 @@ void rtw_IOL_cmd_tx_pkt_buf_dump(struct adapter *Adapter, int data_len)
rstatus = (reg_140 = rtw_read32(Adapter, REG_PKTBUF_DBG_CTRL)&BIT24);
if (rstatus) {
fifo_data = rtw_read32(Adapter, REG_PKTBUF_DBG_DATA_L);
_rtw_memcpy(pbuf+(addr*8), &fifo_data, 4);
memcpy(pbuf+(addr*8), &fifo_data, 4);
fifo_data = rtw_read32(Adapter, REG_PKTBUF_DBG_DATA_H);
_rtw_memcpy(pbuf+(addr*8+4), &fifo_data, 4);
memcpy(pbuf+(addr*8+4), &fifo_data, 4);
}
rtw_usleep_os(2);
} while (!rstatus && (loop++ < 10));
@ -499,22 +498,6 @@ static int _PageWrite(struct adapter *padapter, u32 page, void *buffer, u32 size
return _BlockWrite(padapter, buffer, size);
}
static void _FillDummy(u8 *pFwBuf, u32 *pFwLen)
{
u32 FwLen = *pFwLen;
u8 remain = (u8)(FwLen%4);
remain = (remain == 0) ? 0 : (4 - remain);
while (remain > 0) {
pFwBuf[FwLen] = 0;
FwLen++;
remain--;
}
*pFwLen = FwLen;
}
static int _WriteFW(struct adapter *padapter, void *buffer, u32 size)
{
/* Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. */
@ -599,16 +582,7 @@ static s32 _FWFreeToGo(struct adapter *padapter)
#define IS_FW_81xxC(padapter) (((GET_HAL_DATA(padapter))->FirmwareSignature & 0xFFF0) == 0x88C0)
#ifdef CONFIG_WOWLAN
/* */
/* Description: */
/* Download 8192C firmware code. */
/* */
/* */
s32 rtl8188e_FirmwareDownload(struct adapter *padapter, bool bUsedWoWLANFw)
#else
s32 rtl8188e_FirmwareDownload(struct adapter *padapter)
#endif
{
s32 rtStatus = _SUCCESS;
u8 writeFW_retry = 0;
@ -617,10 +591,6 @@ s32 rtl8188e_FirmwareDownload(struct adapter *padapter)
u8 *FwImage;
u32 FwImageLen;
#ifdef CONFIG_WOWLAN
u8 *FwImageWoWLAN;
u32 FwImageWoWLANLen;
#endif
struct rt_firmware *pFirmware = NULL;
struct rt_firmware_hdr *pFwHdr = NULL;
u8 *pFirmwareBuf;
@ -636,11 +606,6 @@ s32 rtl8188e_FirmwareDownload(struct adapter *padapter)
FwImage = (u8 *)Rtl8188E_FwImageArray;
FwImageLen = Rtl8188E_FWImgArrayLength;
#ifdef CONFIG_WOWLAN
FwImageWoWLAN = (u8 *)Rtl8188E_FwWoWImageArray;
FwImageWoWLANLen = Rtl8188E_FwWoWImgArrayLength;
#endif /* CONFIG_WOWLAN */
pFirmware->eFWSource = FW_SOURCE_HEADER_FILE;
switch (pFirmware->eFWSource) {
@ -655,36 +620,22 @@ s32 rtl8188e_FirmwareDownload(struct adapter *padapter)
pFirmware->szFwBuffer = FwImage;
pFirmware->ulFwLength = FwImageLen;
#ifdef CONFIG_WOWLAN
if (bUsedWoWLANFw) {
pFirmware->szWoWLANFwBuffer = FwImageWoWLAN;
pFirmware->ulWoWLANFwLength = FwImageWoWLANLen;
}
#endif /* CONFIG_WOWLAN */
break;
}
#ifdef CONFIG_WOWLAN
if (bUsedWoWLANFw) {
pFirmwareBuf = pFirmware->szWoWLANFwBuffer;
FirmwareLen = pFirmware->ulWoWLANFwLength;
pFwHdr = (struct rt_firmware_hdr *)pFirmware->szWoWLANFwBuffer;
} else
#endif
{
pFirmwareBuf = pFirmware->szFwBuffer;
FirmwareLen = pFirmware->ulFwLength;
DBG_88E_LEVEL(_drv_info_, "+%s: !bUsedWoWLANFw, FmrmwareLen:%d+\n", __func__, FirmwareLen);
/* To Check Fw header. Added by tynli. 2009.12.04. */
pFwHdr = (struct rt_firmware_hdr *)pFirmware->szFwBuffer;
}
pHalData->FirmwareVersion = le16_to_cpu(pFwHdr->Version);
pHalData->FirmwareSubVersion = pFwHdr->Subversion;
pHalData->FirmwareSignature = le16_to_cpu(pFwHdr->Signature);
DBG_88E("%s: fw_ver =%d fw_subver =%d sig = 0x%x\n",
__func__, pHalData->FirmwareVersion, pHalData->FirmwareSubVersion, pHalData->FirmwareSignature);
pr_info("%sFirmware Version %d, SubVersion %d, Signature 0x%x\n",
DRIVER_PREFIX, pHalData->FirmwareVersion,
pHalData->FirmwareSubVersion, pHalData->FirmwareSignature);
if (IS_FW_HEADER_EXIST(pFwHdr)) {
/* Shift 32 bytes for FW header */
@ -730,67 +681,10 @@ s32 rtl8188e_FirmwareDownload(struct adapter *padapter)
Exit:
if (pFirmware)
rtw_mfree((u8 *)pFirmware, sizeof(struct rt_firmware));
#ifdef CONFIG_WOWLAN
if (padapter->pwrctrlpriv.wowlan_mode)
rtl8188e_InitializeFirmwareVars(padapter);
else
DBG_88E_LEVEL(_drv_always_, "%s: wowland_mode:%d wowlan_wake_reason:%d\n",
__func__, padapter->pwrctrlpriv.wowlan_mode,
padapter->pwrctrlpriv.wowlan_wake_reason);
#endif
kfree(pFirmware);
return rtStatus;
}
#ifdef CONFIG_WOWLAN
void rtl8188e_InitializeFirmwareVars(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct pwrctrl_priv *pwrpriv;
pwrpriv = &padapter->pwrctrlpriv;
/* Init Fw LPS related. */
padapter->pwrctrlpriv.bFwCurrentInPSMode = false;
/* Init H2C counter. by tynli. 2009.12.09. */
pHalData->LastHMEBoxNum = 0;
}
/* */
/* */
/* Description: Prepare some information to Fw for WoWLAN. */
/* (1) Download wowlan Fw. */
/* (2) Download RSVD page packets. */
/* (3) Enable AP offload if needed. */
/* */
/* 2011.04.12 by tynli. */
/* */
void
SetFwRelatedForWoWLAN8188ES(
struct adapter *padapter,
u8 bHostIsGoingtoSleep
)
{
int status = _FAIL;
/* */
/* 1. Before WoWLAN we need to re-download WoWLAN Fw. */
/* */
status = rtl8188e_FirmwareDownload(padapter, bHostIsGoingtoSleep);
if (status != _SUCCESS) {
DBG_88E("ConfigFwRelatedForWoWLAN8188ES(): Re-Download Firmware failed!!\n");
return;
} else {
DBG_88E("ConfigFwRelatedForWoWLAN8188ES(): Re-Download Firmware Success !!\n");
}
/* */
/* 2. Re-Init the variables about Fw related setting. */
/* */
rtl8188e_InitializeFirmwareVars(padapter);
}
#else
void rtl8188e_InitializeFirmwareVars(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
@ -801,15 +695,12 @@ void rtl8188e_InitializeFirmwareVars(struct adapter *padapter)
/* Init H2C counter. by tynli. 2009.12.09. */
pHalData->LastHMEBoxNum = 0;
}
#endif /* CONFIG_WOWLAN */
static void rtl8188e_free_hal_data(struct adapter *padapter)
{
_func_enter_;
if (padapter->HalData) {
rtw_mfree(padapter->HalData, sizeof(struct hal_data_8188e));
padapter->HalData = NULL;
}
kfree(padapter->HalData);
padapter->HalData = NULL;
_func_exit_;
}
@ -903,42 +794,7 @@ rtl8188e_EfusePowerSwitch(
}
static bool efuse_read_phymap(
struct adapter *Adapter,
u8 *pbuf, /* buffer to store efuse physical map */
u16 *size /* the max byte to read. will update to byte read */
)
{
u8 *pos = pbuf;
u16 limit = *size;
u16 addr = 0;
bool reach_end = false;
/* */
/* Refresh efuse init map as all 0xFF. */
/* */
_rtw_memset(pbuf, 0xFF, limit);
/* */
/* Read physical efuse content. */
/* */
while (addr < limit) {
ReadEFuseByte(Adapter, addr, pos, false);
if (*pos != 0xFF) {
pos++;
addr++;
} else {
reach_end = true;
break;
}
}
*size = addr;
return reach_end;
}
static void
Hal_EfuseReadEFuse88E(
struct adapter *Adapter,
static void Hal_EfuseReadEFuse88E(struct adapter *Adapter,
u16 _offset,
u16 _size_byte,
u8 *pbuf,
@ -1067,52 +923,12 @@ Hal_EfuseReadEFuse88E(
rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr);
exit:
if (efuseTbl)
rtw_mfree(efuseTbl, EFUSE_MAP_LEN_88E);
kfree(efuseTbl);
if (eFuseWord)
rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
}
static bool Hal_EfuseSwitchToBank(struct adapter *pAdapter, u8 bank, bool bPseudoTest)
{
bool bRet = false;
u32 value32 = 0;
if (bPseudoTest) {
fakeEfuseBank = bank;
bRet = true;
} else {
if (IS_HARDWARE_TYPE_8723A(pAdapter) &&
INCLUDE_MULTI_FUNC_BT(pAdapter)) {
value32 = rtw_read32(pAdapter, EFUSE_TEST);
bRet = true;
switch (bank) {
case 0:
value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
break;
case 1:
value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_0);
break;
case 2:
value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_1);
break;
case 3:
value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_2);
break;
default:
value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
bRet = false;
break;
}
rtw_write32(pAdapter, EFUSE_TEST, value32);
} else {
bRet = true;
}
}
return bRet;
}
static void ReadEFuseByIC(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool bPseudoTest)
{
if (!bPseudoTest) {
@ -1664,6 +1480,7 @@ static bool hal_EfusePgPacketWrite1ByteHeader(struct adapter *pAdapter, u8 efuse
static bool hal_EfusePgPacketWriteData(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest)
{
bool bRet = false;
u16 efuse_addr = *pAddr;
u8 badworden = 0;
u32 PgWriteSuccess = 0;
@ -1681,6 +1498,7 @@ static bool hal_EfusePgPacketWriteData(struct adapter *pAdapter, u8 efuseType, u
else
return true;
}
return bRet;
}
static bool
@ -1701,12 +1519,8 @@ hal_EfusePgPacketWriteHeader(
return bRet;
}
static bool
wordEnMatched(
struct pgpkt *pTargetPkt,
struct pgpkt *pCurPkt,
u8 *pWden
)
static bool wordEnMatched(struct pgpkt *pTargetPkt, struct pgpkt *pCurPkt,
u8 *pWden)
{
u8 match_word_en = 0x0F; /* default all words are disabled */
@ -1857,29 +1671,6 @@ static void hal_EfuseConstructPGPkt(u8 offset, u8 word_en, u8 *pData, struct pgp
pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
}
static bool hal_EfusePgPacketWrite_BT(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *pData, bool bPseudoTest)
{
struct pgpkt targetPkt;
u16 startAddr = 0;
u8 efuseType = EFUSE_BT;
if (!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest))
return false;
hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);
if (!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
return false;
if (!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
return false;
if (!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
return false;
return true;
}
static bool hal_EfusePgPacketWrite_8188e(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *pData, bool bPseudoTest)
{
struct pgpkt targetPkt;
@ -1979,12 +1770,6 @@ static void rtl8188e_read_chip_version(struct adapter *padapter)
static void rtl8188e_GetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
{
switch (eVariable) {
case HAL_ODM_STA_INFO:
break;
default:
break;
}
}
static void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
@ -2018,7 +1803,7 @@ static void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable
void rtl8188e_clone_haldata(struct adapter *dst_adapter, struct adapter *src_adapter)
{
_rtw_memcpy(dst_adapter->HalData, src_adapter->HalData, dst_adapter->hal_data_sz);
memcpy(dst_adapter->HalData, src_adapter->HalData, dst_adapter->hal_data_sz);
}
void rtl8188e_start_thread(struct adapter *padapter)
@ -2210,33 +1995,6 @@ Hal_EfuseParseIDCode88E(
DBG_88E("EEPROM ID = 0x%04x\n", EEPROMId);
}
static void
Hal_EEValueCheck(
u8 EEType,
void *pInValue,
void *pOutValue
)
{
switch (EEType) {
case EETYPE_TX_PWR:
{
s8 *pIn, *pOut;
pIn = (u8 *)pInValue;
pOut = (u8 *)pOutValue;
if (*pIn >= 0 && *pIn <= 63) {
*pOut = *pIn;
} else {
RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("EETYPE_TX_PWR, value =%d is invalid, set to default = 0x%x\n",
*pIn, EEPROM_Default_TxPowerLevel));
*pOut = EEPROM_Default_TxPowerLevel;
}
}
break;
default:
break;
}
}
static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, u8 *PROMContent, bool AutoLoadFail)
{
u32 rfPath, eeAddr = EEPROM_TX_PWR_INX_88E, group, TxCount = 0;
@ -2336,19 +2094,6 @@ static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G,
}
}
static u8 Hal_GetChnlGroup(u8 chnl)
{
u8 group = 0;
if (chnl < 3) /* Cjanel 1-3 */
group = 0;
else if (chnl < 9) /* Channel 4-9 */
group = 1;
else /* Channel 10-14 */
group = 2;
return group;
}
static u8 Hal_GetChnlGroup88E(u8 chnl, u8 *pGroup)
{
u8 bIn24G = true;
@ -2438,7 +2183,7 @@ void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool Auto
pHalData->bTXPowerDataReadFromEEPORM = true;
for (rfPath = 0; rfPath < pHalData->NumTotalRFPath; rfPath++) {
for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
for (ch = 0; ch <= CHANNEL_MAX_NUMBER; ch++) {
bIn24G = Hal_GetChnlGroup88E(ch, &group);
if (bIn24G) {
pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group];
@ -2615,14 +2360,6 @@ bool HalDetectPwrDownMode88E(struct adapter *Adapter)
return pHalData->pwrdown;
} /* HalDetectPwrDownMode */
#ifdef CONFIG_WOWLAN
void Hal_DetectWoWMode(struct adapter *pAdapter)
{
pAdapter->pwrctrlpriv.bSupportRemoteWakeup = true;
DBG_88E("%s\n", __func__);
}
#endif
/* This function is used only for 92C to set REG_BCN_CTRL(0x550) register. */
/* We just reserve the value of the register in variable pHalData->RegBcnCtrlVal and then operate */
/* the value of the register via atomic operation. */

52
hal/rtl8188e_mp.c
View file

@ -27,10 +27,8 @@
s32 Hal_SetPowerTracking(struct adapter *padapter, u8 enable)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct odm_dm_struct *pDM_Odm = &(pHalData->odmpriv);
if (!netif_running(padapter->pnetdev)) {
RT_TRACE(_module_mp_, _drv_warning_,
("SetPowerTracking! Fail: interface not opened!\n"));
@ -54,38 +52,11 @@ s32 Hal_SetPowerTracking(struct adapter *padapter, u8 enable)
void Hal_GetPowerTracking(struct adapter *padapter, u8 *enable)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct odm_dm_struct *pDM_Odm = &(pHalData->odmpriv);
*enable = pDM_Odm->RFCalibrateInfo.TxPowerTrackControl;
}
static void Hal_disable_dm(struct adapter *padapter)
{
u8 v8;
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct odm_dm_struct *pDM_Odm = &(pHalData->odmpriv);
/* 3 1. disable firmware dynamic mechanism */
/* disable Power Training, Rate Adaptive */
v8 = rtw_read8(padapter, REG_BCN_CTRL);
v8 &= ~EN_BCN_FUNCTION;
rtw_write8(padapter, REG_BCN_CTRL, v8);
/* 3 2. disable driver dynamic mechanism */
/* disable Dynamic Initial Gain */
/* disable High Power */
/* disable Power Tracking */
Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, false);
/* enable APK, LCK and IQK but disable power tracking */
pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = false;
Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, true);
}
/*-----------------------------------------------------------------------------
* Function: mpt_SwitchRfSetting
*
@ -105,7 +76,6 @@ static void Hal_disable_dm(struct adapter *padapter)
*---------------------------------------------------------------------------*/
void Hal_mpt_SwitchRfSetting(struct adapter *pAdapter)
{
/* struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); */
struct mp_priv *pmp = &pAdapter->mppriv;
/* <20120525, Kordan> Dynamic mechanism for APK, asked by Dennis. */
@ -188,14 +158,13 @@ void Hal_MPT_CCKTxPowerAdjust(struct adapter *Adapter, bool bInCH14)
void Hal_MPT_CCKTxPowerAdjustbyIndex(struct adapter *pAdapter, bool beven)
{
s32 TempCCk;
u8 CCK_index, CCK_index_old;
u8 Action = 0; /* 0: no action, 1: even->odd, 2:odd->even */
s32 i = 0;
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
struct mpt_context *pMptCtx = &pAdapter->mppriv.MptCtx;
struct odm_dm_struct *pDM_Odm = &(pHalData->odmpriv);
s32 TempCCk;
u8 CCK_index, CCK_index_old = 0;
u8 Action = 0; /* 0: no action, 1: even->odd, 2:odd->even */
s32 i = 0;
if (!IS_92C_SERIAL(pHalData->VersionID))
@ -264,22 +233,15 @@ void Hal_MPT_CCKTxPowerAdjustbyIndex(struct adapter *pAdapter, bool beven)
*/
void Hal_SetChannel(struct adapter *pAdapter)
{
u8 eRFPath;
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
struct mp_priv *pmp = &pAdapter->mppriv;
struct odm_dm_struct *pDM_Odm = &(pHalData->odmpriv);
u8 eRFPath;
u8 channel = pmp->channel;
/* set RF channel register */
for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) {
if (IS_HARDWARE_TYPE_8192D(pAdapter))
_write_rfreg(pAdapter, (enum rf_radio_path)eRFPath, ODM_CHANNEL, 0xFF, channel);
else
_write_rfreg(pAdapter, eRFPath, ODM_CHANNEL, 0x3FF, channel);
}
for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++)
_write_rfreg(pAdapter, eRFPath, ODM_CHANNEL, 0x3FF, channel);
Hal_mpt_SwitchRfSetting(pAdapter);
SelectChannel(pAdapter, channel);

288
hal/rtl8188e_phycfg.c
View file

@ -358,29 +358,6 @@ rtl8188e_PHY_SetRFReg(
/* 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. */
/* */
/*-----------------------------------------------------------------------------
* Function: phy_ConfigMACWithParaFile()
*
* Overview: This function read BB parameters from general file format, and do register
* Read/Write
*
* Input: struct adapter *Adapter
* ps8 pFileName
*
* Output: NONE
*
* Return: RT_STATUS_SUCCESS: configuration file exist
*
* Note: The format of MACPHY_REG.txt is different from PHY and RF.
* [Register][Mask][Value]
*---------------------------------------------------------------------------*/
static int phy_ConfigMACWithParaFile(struct adapter *Adapter, u8 *pFileName)
{
int rtStatus = _FAIL;
return rtStatus;
}
/*-----------------------------------------------------------------------------
* Function: PHY_MACConfig8192C
*
@ -399,8 +376,8 @@ static int phy_ConfigMACWithParaFile(struct adapter *Adapter, u8 *pFileName)
*---------------------------------------------------------------------------*/
s32 PHY_MACConfig8188E(struct adapter *Adapter)
{
int rtStatus = _SUCCESS;
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
int rtStatus = _SUCCESS;
/* */
/* Config MAC */
@ -530,32 +507,6 @@ phy_InitBBRFRegisterDefinition(
pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
}
/*-----------------------------------------------------------------------------
* Function: phy_ConfigBBWithParaFile()
*
* Overview: This function read BB parameters from general file format, and do register
* Read/Write
*
* Input: struct adapter *Adapter
* ps8 pFileName
*
* Output: NONE
*
* Return: RT_STATUS_SUCCESS: configuration file exist
* 2008/11/06 MH For 92S we do not support silent reset now. Disable
* parameter file compare!!!!!!??
*
*---------------------------------------------------------------------------*/
static int phy_ConfigBBWithParaFile(struct adapter *Adapter, u8 *pFileName)
{
return _SUCCESS;
}
/* The following is for High Power PA */
static void phy_ConfigBBExternalPA(struct adapter *Adapter)
{
}
void storePwrIndexDiffRateOffset(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u32 Data)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
@ -599,62 +550,8 @@ void storePwrIndexDiffRateOffset(struct adapter *Adapter, u32 RegAddr, u32 BitMa
pHalData->pwrGroupCnt++;
}
}
/*-----------------------------------------------------------------------------
* Function: phy_ConfigBBWithPgParaFile
*
* Overview:
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/06/2008 MHC Create Version 0.
* 2009/07/29 tynli (porting from 92SE branch)2009/03/11 Add copy parameter file to buffer for silent reset
*---------------------------------------------------------------------------*/
static int phy_ConfigBBWithPgParaFile(struct adapter *Adapter, u8 *pFileName)
{
return _SUCCESS;
}
static void phy_BB8192C_Config_1T(struct adapter *Adapter)
{
/* for path - B */
PHY_SetBBReg(Adapter, rFPGA0_TxInfo, 0x3, 0x2);
PHY_SetBBReg(Adapter, rFPGA1_TxInfo, 0x300033, 0x200022);
/* 20100519 Joseph: Add for 1T2R config. Suggested by Kevin, Jenyu and Yunan. */
PHY_SetBBReg(Adapter, rCCK0_AFESetting, bMaskByte3, 0x45);
PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x23);
PHY_SetBBReg(Adapter, rOFDM0_AGCParameter1, 0x30, 0x1); /* B path first AGC */
PHY_SetBBReg(Adapter, 0xe74, 0x0c000000, 0x2);
PHY_SetBBReg(Adapter, 0xe78, 0x0c000000, 0x2);
PHY_SetBBReg(Adapter, 0xe7c, 0x0c000000, 0x2);
PHY_SetBBReg(Adapter, 0xe80, 0x0c000000, 0x2);
PHY_SetBBReg(Adapter, 0xe88, 0x0c000000, 0x2);
}
/* Joseph test: new initialize order!! */
/* Test only!! This part need to be re-organized. */
/* Now it is just for 8256. */
static int
phy_BB8190_Config_HardCode(
struct adapter *Adapter
)
{
return _SUCCESS;
}
static int
phy_BB8188E_Config_ParaFile(
struct adapter *Adapter
)
static int phy_BB8188E_Config_ParaFile(struct adapter *Adapter)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
@ -755,11 +652,6 @@ int rtl8188e_PHY_ConfigRFWithParaFile(struct adapter *Adapter, u8 *pFileName, en
return _SUCCESS;
}
static int PHY_ConfigRFExternalPA(struct adapter *Adapter, enum rf_radio_path eRFPath)
{
return _SUCCESS;
}
void
rtl8192c_PHY_GetHWRegOriginalValue(
struct adapter *Adapter
@ -1012,8 +904,10 @@ PHY_SetTxPowerLevel8188E(
u8 channel
)
{
u8 cckPowerLevel[MAX_TX_COUNT], ofdmPowerLevel[MAX_TX_COUNT];/* [0]:RF-A, [1]:RF-B */
u8 BW20PowerLevel[MAX_TX_COUNT], BW40PowerLevel[MAX_TX_COUNT];
u8 cckPowerLevel[MAX_TX_COUNT] = {0};
u8 ofdmPowerLevel[MAX_TX_COUNT] = {0};/* [0]:RF-A, [1]:RF-B */
u8 BW20PowerLevel[MAX_TX_COUNT] = {0};
u8 BW40PowerLevel[MAX_TX_COUNT] = {0};
getTxPowerIndex88E(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0], &BW20PowerLevel[0], &BW40PowerLevel[0]);
@ -1229,22 +1123,7 @@ void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel)
bool bResult = true;
if (pHalData->rf_chip == RF_PSEUDO_11N)
return; /* return immediately if it is peudo-phy */
/* */
switch (pHalData->CurrentWirelessMode) {
case WIRELESS_MODE_A:
case WIRELESS_MODE_N_5G:
break;
case WIRELESS_MODE_B:
break;
case WIRELESS_MODE_G:
case WIRELESS_MODE_N_24G:
break;
default:
break;
}
/* */
return; /* return immediately if it is peudo-phy */
if (channel == 0)
channel = 1;
@ -1263,156 +1142,3 @@ void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel)
pHalData->CurrentChannel = tmpchannel;
}
}
static bool
phy_SwChnlStepByStep(
struct adapter *Adapter,
u8 channel,
u8 *stage,
u8 *step,
u32 *delay
)
{
return true;
}
static bool
phy_SetSwChnlCmdArray(
struct sw_chnl_cmd *CmdTable,
u32 CmdTableIdx,
u32 CmdTableSz,
enum sw_chnl_cmd_id CmdID,
u32 Para1,
u32 Para2,
u32 msDelay
)
{
struct sw_chnl_cmd *pCmd;
if (CmdTable == NULL)
return false;
if (CmdTableIdx >= CmdTableSz)
return false;
pCmd = CmdTable + CmdTableIdx;
pCmd->CmdID = CmdID;
pCmd->Para1 = Para1;
pCmd->Para2 = Para2;
pCmd->msDelay = msDelay;
return true;
}
static void phy_FinishSwChnlNow(struct adapter *Adapter, u8 channel)
{
/* We should not call this function directly */
}
/* */
/* Description: */
/* Switch channel synchronously. Called by SwChnlByDelayHandler. */
/* */
/* Implemented by Bruce, 2008-02-14. */
/* The following procedure is operted according to SwChanlCallback8190Pci(). */
/* However, this procedure is performed synchronously which should be running under */
/* passive level. */
/* Only called during initialize */
void PHY_SwChnlPhy8192C(struct adapter *Adapter, u8 channel)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
/* return immediately if it is peudo-phy */
if (pHalData->rf_chip == RF_PSEUDO_11N)
return;
if (channel == 0)
channel = 1;
pHalData->CurrentChannel = channel;
phy_FinishSwChnlNow(Adapter, channel);
}
/* */
/* Description: */
/* Configure H/W functionality to enable/disable Monitor mode. */
/* Note, because we possibly need to configure BB and RF in this function, */
/* so caller should in PASSIVE_LEVEL. 080118, by rcnjko. */
/* */
void
PHY_SetMonitorMode8192C(
struct adapter *pAdapter,
bool bEnableMonitorMode
)
{
}
/*-----------------------------------------------------------------------------
* Function: PHYCheckIsLegalRfPath8190Pci()
*
* Overview: Check different RF type to execute legal judgement. If RF Path is illegal
* We will return false.
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/15/2007 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
bool PHY_CheckIsLegalRfPath8192C(struct adapter *pAdapter, u32 eRFPath)
{
return true;
} /* PHY_CheckIsLegalRfPath8192C */
static void _PHY_SetRFPathSwitch(struct adapter *pAdapter, bool bMain, bool is2T)
{
u8 u1bTmp;
if (!pAdapter->hw_init_completed) {
u1bTmp = rtw_read8(pAdapter, REG_LEDCFG2) | BIT7;
rtw_write8(pAdapter, REG_LEDCFG2, u1bTmp);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
}
if (is2T) {
if (bMain)
PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); /* 92C_Path_A */
else
PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); /* BT */
} else {
if (bMain)
PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x2); /* Main */
else
PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x1); /* Aux */
}
}
static bool _PHY_QueryRFPathSwitch(struct adapter *pAdapter, bool is2T)
{
if (!pAdapter->hw_init_completed) {
PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
}
if (is2T) {
if (PHY_QueryBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01)
return true;
else
return false;
} else {
if (PHY_QueryBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300) == 0x02)
return true;
else
return false;
}
}
static void _PHY_DumpRFReg(struct adapter *pAdapter)
{
}

31
hal/rtl8188e_rf6052.c
View file

@ -46,6 +46,27 @@
#include <rtl8188e_hal.h>
/*---------------------------Define Local Constant---------------------------*/
/* Define local structure for debug!!!!! */
struct rf_shadow {
/* Shadow register value */
u32 Value;
/* Compare or not flag */
u8 Compare;
/* Record If it had ever modified unpredicted */
u8 ErrorOrNot;
/* Recorver Flag */
u8 Recorver;
/* */
u8 Driver_Write;
};
/*---------------------------Define Local Constant---------------------------*/
/*------------------------Define global variable-----------------------------*/
/*------------------------Define local variable------------------------------*/
/*-----------------------------------------------------------------------------
* Function: RF_ChangeTxPath
@ -126,8 +147,8 @@ rtl8188e_PHY_RF6052SetCckTxPower(
u8 *pPowerlevel)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
struct dm_priv *pdmpriv = &pHalData->dmpriv;
struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
u32 TxAGC[2] = {0, 0}, tmpval = 0, pwrtrac_value;
bool TurboScanOff = false;
u8 idx1, idx2;
@ -456,11 +477,11 @@ rtl8188e_PHY_RF6052SetOFDMTxPower(
static int phy_RF6052_Config_ParaFile(struct adapter *Adapter)
{
u32 u4RegValue;
u8 eRFPath;
struct bb_reg_def *pPhyReg;
int rtStatus = _SUCCESS;
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
u32 u4RegValue = 0;
u8 eRFPath;
int rtStatus = _SUCCESS;
/* 3----------------------------------------------------------------- */
/* 3 <2> Initialize RF */

13
hal/rtl8188e_rxdesc.c
View file

@ -23,17 +23,6 @@
#include <drv_types.h>
#include <rtl8188e_hal.h>
static s32 translate2dbm(u8 signal_strength_idx)
{
s32 signal_power; /* in dBm. */
/* Translate to dBm (x=0.5y-95). */
signal_power = (s32)((signal_strength_idx + 1) >> 1);
signal_power -= 95;
return signal_power;
}
static void process_rssi(struct adapter *padapter, union recv_frame *prframe)
{
struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
@ -157,7 +146,7 @@ void update_recvframe_phyinfo_88e(union recv_frame *precvframe, struct phy_stat
struct odm_phy_status_info *pPHYInfo = (struct odm_phy_status_info *)(&pattrib->phy_info);
u8 *wlanhdr;
struct odm_per_pkt_info pkt_info;
u8 *sa;
u8 *sa = NULL;
struct sta_priv *pstapriv;
struct sta_info *psta;

85
hal/rtl8188e_sreset.c
View file

@ -22,91 +22,6 @@
#include <rtl8188e_sreset.h>
#include <rtl8188e_hal.h>
static void _restore_security_setting(struct adapter *padapter)
{
u8 EntryId = 0;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct sta_priv *pstapriv = &padapter->stapriv;
struct sta_info *psta;
struct security_priv *psecuritypriv = &(padapter->securitypriv);
struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
(pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) ?
rtw_write8(padapter, REG_SECCFG, 0xcc) :
rtw_write8(padapter, REG_SECCFG, 0xcf);
if ((padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_) ||
(padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_)) {
for (EntryId = 0; EntryId < 4; EntryId++) {
if (EntryId == psecuritypriv->dot11PrivacyKeyIndex)
rtw_set_key(padapter, &padapter->securitypriv, EntryId, 1);
else
rtw_set_key(padapter, &padapter->securitypriv, EntryId, 0);
}
} else if ((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) ||
(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) {
psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));
if (psta) {
/* pairwise key */
rtw_setstakey_cmd(padapter, (unsigned char *)psta, true);
/* group key */
rtw_set_key(padapter, &padapter->securitypriv, padapter->securitypriv.dot118021XGrpKeyid, 0);
}
}
}
static void _restore_network_status(struct adapter *padapter)
{
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
u8 join_type;
/* */
/* reset related register of Beacon control */
/* set MSR to nolink */
Set_MSR(padapter, _HW_STATE_NOLINK_);
/* reject all data frame */
rtw_write16(padapter, REG_RXFLTMAP2, 0x00);
/* reset TSF */
rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
/* disable update TSF */
SetBcnCtrlReg(padapter, BIT(4), 0);
/* */
rtw_joinbss_reset(padapter);
set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
if (padapter->registrypriv.wifi_spec) {
/* for WiFi test, follow WMM test plan spec */
rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F431C);
rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E541C);
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x0000A525);
rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A549);
/* for WiFi test, mixed mode with intel STA under bg mode throughput issue */
if (padapter->mlmepriv.htpriv.ht_option == 0)
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00004320);
} else {
rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F3217);
rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E4317);
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00105320);
rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A444);
}
rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress);
join_type = 0;
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
Set_MSR(padapter, (pmlmeinfo->state & 0x3));
mlmeext_joinbss_event_callback(padapter, 1);
/* restore Sequence No. */
rtw_write8(padapter, 0x4dc, padapter->xmitpriv.nqos_ssn);
}
void rtl8188e_silentreset_for_specific_platform(struct adapter *padapter)
{
}

2
hal/rtl8188eu_led.c
View file

@ -93,7 +93,7 @@ void rtl8188eu_InitSwLeds(struct adapter *padapter)
{
struct led_priv *pledpriv = &(padapter->ledpriv);
pledpriv->LedControlHandler = LedControl871x;
pledpriv->LedControlHandler = LedControl8188eu;
InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0);

7
hal/rtl8188eu_recv.c
View file

@ -95,11 +95,7 @@ int rtl8188eu_init_recv_priv(struct adapter *padapter)
skb_queue_head_init(&precvpriv->free_recv_skb_queue);
for (i = 0; i < NR_PREALLOC_RECV_SKB; i++) {
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18))
pskb = __dev_alloc_skb(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ, GFP_KERNEL);
#else
pskb = __netdev_alloc_skb(padapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ, GFP_KERNEL);
#endif
if (pskb) {
pskb->dev = padapter->pnetdev;
tmpaddr = (size_t)pskb->data;
@ -128,8 +124,7 @@ void rtl8188eu_free_recv_priv(struct adapter *padapter)
precvbuf++;
}
if (precvpriv->pallocated_recv_buf)
rtw_mfree(precvpriv->pallocated_recv_buf, NR_RECVBUFF * sizeof(struct recv_buf) + 4);
kfree(precvpriv->pallocated_recv_buf);
if (skb_queue_len(&precvpriv->rx_skb_queue))
DBG_88E(KERN_WARNING "rx_skb_queue not empty\n");

436
hal/usb_halinit.c
View file

@ -131,110 +131,6 @@ static u32 rtl8188eu_InitPowerOn(struct adapter *adapt)
return _SUCCESS;
}
static void _dbg_dump_macreg(struct adapter *adapt)
{
u32 offset = 0;
u32 val32 = 0;
u32 index = 0;
for (index = 0; index < 64; index++) {
offset = index*4;
val32 = rtw_read32(adapt, offset);
DBG_88E("offset : 0x%02x ,val:0x%08x\n", offset, val32);
}
}
static void _InitPABias(struct adapter *adapt)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
u8 pa_setting;
bool is92C = IS_92C_SERIAL(haldata->VersionID);
/* FIXED PA current issue */
pa_setting = EFUSE_Read1Byte(adapt, 0x1FA);
if (!(pa_setting & BIT0)) {
PHY_SetRFReg(adapt, RF_PATH_A, 0x15, 0x0FFFFF, 0x0F406);
PHY_SetRFReg(adapt, RF_PATH_A, 0x15, 0x0FFFFF, 0x4F406);
PHY_SetRFReg(adapt, RF_PATH_A, 0x15, 0x0FFFFF, 0x8F406);
PHY_SetRFReg(adapt, RF_PATH_A, 0x15, 0x0FFFFF, 0xCF406);
}
if (!(pa_setting & BIT1) && is92C) {
PHY_SetRFReg(adapt, RF_PATH_B, 0x15, 0x0FFFFF, 0x0F406);
PHY_SetRFReg(adapt, RF_PATH_B, 0x15, 0x0FFFFF, 0x4F406);
PHY_SetRFReg(adapt, RF_PATH_B, 0x15, 0x0FFFFF, 0x8F406);
PHY_SetRFReg(adapt, RF_PATH_B, 0x15, 0x0FFFFF, 0xCF406);
}
if (!(pa_setting & BIT4)) {
pa_setting = rtw_read8(adapt, 0x16);
pa_setting &= 0x0F;
rtw_write8(adapt, 0x16, pa_setting | 0x80);
rtw_write8(adapt, 0x16, pa_setting | 0x90);
}
}
#ifdef CONFIG_BT_COEXIST
static void _InitBTCoexist(struct adapter *adapt)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct btcoexist_priv *pbtpriv = &(haldata->bt_coexist);
u8 u1Tmp;
if (pbtpriv->BT_Coexist && pbtpriv->BT_CoexistType == BT_CSR_BC4) {
if (adapt->registrypriv.mp_mode == 0) {
if (pbtpriv->BT_Ant_isolation) {
rtw_write8(adapt, REG_GPIO_MUXCFG, 0xa0);
DBG_88E("BT write 0x%x = 0x%x\n", REG_GPIO_MUXCFG, 0xa0);
}
}
u1Tmp = rtw_read8(adapt, 0x4fd) & BIT0;
u1Tmp = u1Tmp |
((pbtpriv->BT_Ant_isolation == 1) ? 0 : BIT1) |
((pbtpriv->BT_Service == BT_SCO) ? 0 : BIT2);
rtw_write8(adapt, 0x4fd, u1Tmp);
DBG_88E("BT write 0x%x = 0x%x for non-isolation\n", 0x4fd, u1Tmp);
rtw_write32(adapt, REG_BT_COEX_TABLE+4, 0xaaaa9aaa);
DBG_88E("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+4, 0xaaaa9aaa);
rtw_write32(adapt, REG_BT_COEX_TABLE+8, 0xffbd0040);
DBG_88E("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+8, 0xffbd0040);
rtw_write32(adapt, REG_BT_COEX_TABLE+0xc, 0x40000010);
DBG_88E("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+0xc, 0x40000010);
/* Config to 1T1R */
u1Tmp = rtw_read8(adapt, rOFDM0_TRxPathEnable);
u1Tmp &= ~(BIT1);
rtw_write8(adapt, rOFDM0_TRxPathEnable, u1Tmp);
DBG_88E("BT write 0xC04 = 0x%x\n", u1Tmp);
u1Tmp = rtw_read8(adapt, rOFDM1_TRxPathEnable);
u1Tmp &= ~(BIT1);
rtw_write8(adapt, rOFDM1_TRxPathEnable, u1Tmp);
DBG_88E("BT write 0xD04 = 0x%x\n", u1Tmp);
}
}
#endif
/* MAC init functions */
static void _SetMacID(struct adapter *Adapter, u8 *MacID)
{
u32 i;
for (i = 0; i < MAC_ADDR_LEN; i++)
rtw_write32(Adapter, REG_MACID+i, MacID[i]);
}
static void _SetBSSID(struct adapter *Adapter, u8 *BSSID)
{
u32 i;
for (i = 0; i < MAC_ADDR_LEN; i++)
rtw_write32(Adapter, REG_BSSID+i, BSSID[i]);
}
/* Shall USB interface init this? */
static void _InitInterrupt(struct adapter *Adapter)
{
@ -276,7 +172,7 @@ static void _InitQueueReservedPage(struct adapter *Adapter)
u32 numPubQ;
u32 value32;
u8 value8;
bool bWiFiConfig = pregistrypriv->wifi_spec;
bool bWiFiConfig = pregistrypriv->wifi_spec;
if (bWiFiConfig) {
if (haldata->OutEpQueueSel & TX_SELE_HQ)
@ -303,11 +199,7 @@ static void _InitQueueReservedPage(struct adapter *Adapter)
}
}
static void
_InitTxBufferBoundary(
struct adapter *Adapter,
u8 txpktbuf_bndy
)
static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy)
{
rtw_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
rtw_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
@ -316,10 +208,7 @@ _InitTxBufferBoundary(
rtw_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
}
static void
_InitPageBoundary(
struct adapter *Adapter
)
static void _InitPageBoundary(struct adapter *Adapter)
{
/* RX Page Boundary */
/* */
@ -328,8 +217,9 @@ _InitPageBoundary(
rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
}
static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ, u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ, u16 hiQ
)
static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ,
u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ,
u16 hiQ)
{
u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
@ -447,13 +337,6 @@ static void _InitQueuePriority(struct adapter *Adapter)
}
}
static void _InitHardwareDropIncorrectBulkOut(struct adapter *Adapter)
{
u32 value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK);
value32 |= DROP_DATA_EN;
rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32);
}
static void _InitNetworkType(struct adapter *Adapter)
{
u32 value32;
@ -518,15 +401,6 @@ static void _InitAdaptiveCtrl(struct adapter *Adapter)
rtw_write16(Adapter, REG_RL, value16);
}
static void _InitRateFallback(struct adapter *Adapter)
{
/* Set Data Auto Rate Fallback Retry Count register. */
rtw_write32(Adapter, REG_DARFRC, 0x00000000);
rtw_write32(Adapter, REG_DARFRC+4, 0x10080404);
rtw_write32(Adapter, REG_RARFRC, 0x04030201);
rtw_write32(Adapter, REG_RARFRC+4, 0x08070605);
}
static void _InitEDCA(struct adapter *Adapter)
{
/* Set Spec SIFS (used in NAV) */
@ -724,36 +598,6 @@ static void InitUsbAggregationSetting(struct adapter *Adapter)
/* 201/12/10 MH Add for USB agg mode dynamic switch. */
haldata->UsbRxHighSpeedMode = false;
}
static void
HalRxAggr8188EUsb(
struct adapter *Adapter,
bool Value
)
{
}
/*-----------------------------------------------------------------------------
* Function: USB_AggModeSwitch()
*
* Overview: When RX traffic is more than 40M, we need to adjust some parameters to increase
* RX speed by increasing batch indication size. This will decrease TCP ACK speed, we
* need to monitor the influence of FTP/network share.
* For TX mode, we are still ubder investigation.
*
* Input: struct adapter *
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 12/10/2010 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
static void USB_AggModeSwitch(struct adapter *Adapter)
{
} /* USB_AggModeSwitch */
static void _InitOperationMode(struct adapter *Adapter)
{
@ -781,30 +625,8 @@ static void _InitBeaconParameters(struct adapter *Adapter)
haldata->RegCR_1 = rtw_read8(Adapter, REG_CR+1);
}
static void _InitRFType(struct adapter *Adapter)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
bool is92CU = IS_92C_SERIAL(haldata->VersionID);
haldata->rf_chip = RF_6052;
if (false == is92CU) {
haldata->rf_type = RF_1T1R;
DBG_88E("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n");
return;
}
/* TODO: Consider that EEPROM set 92CU to 1T1R later. */
/* Force to overwrite setting according to chip version. Ignore EEPROM setting. */
MSG_88E("Set RF Chip ID to RF_6052 and RF type to %d.\n", haldata->rf_type);
}
static void
_BeaconFunctionEnable(
struct adapter *Adapter,
bool Enable,
bool Linked
)
static void _BeaconFunctionEnable(struct adapter *Adapter,
bool Enable, bool Linked)
{
rtw_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1));
@ -812,29 +634,19 @@ _BeaconFunctionEnable(
}
/* Set CCK and OFDM Block "ON" */
static void _BBTurnOnBlock(
struct adapter *Adapter
)
static void _BBTurnOnBlock(struct adapter *Adapter)
{
PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
}
static void _RfPowerSave(
struct adapter *Adapter
)
{
}
enum {
Antenna_Lfet = 1,
Antenna_Right = 2,
};
static void
_InitAntenna_Selection(struct adapter *Adapter)
static void _InitAntenna_Selection(struct adapter *Adapter)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
if (haldata->AntDivCfg == 0)
@ -851,17 +663,6 @@ _InitAntenna_Selection(struct adapter *Adapter)
DBG_88E("%s,Cur_ant:(%x)%s\n", __func__, haldata->CurAntenna, (haldata->CurAntenna == Antenna_A) ? "Antenna_A" : "Antenna_B");
}
/* */
/* 2010/08/26 MH Add for selective suspend mode check. */
/* If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and */
/* slim card. */
/* */
static void
HalDetectSelectiveSuspendMode(
struct adapter *Adapter
)
{
} /* HalDetectSelectiveSuspendMode */
/*-----------------------------------------------------------------------------
* Function: HwSuspendModeEnable92Cu()
*
@ -912,37 +713,6 @@ _func_enter_;
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
#ifdef CONFIG_WOWLAN
Adapter->pwrctrlpriv.wowlan_wake_reason = rtw_read8(Adapter, REG_WOWLAN_WAKE_REASON);
DBG_88E("%s wowlan_wake_reason: 0x%02x\n",
__func__, Adapter->pwrctrlpriv.wowlan_wake_reason);
if (rtw_read8(Adapter, REG_MCUFWDL)&BIT7) { /*&&
(Adapter->pwrctrlpriv.wowlan_wake_reason & FWDecisionDisconnect)) {*/
u8 reg_val = 0;
DBG_88E("+Reset Entry+\n");
rtw_write8(Adapter, REG_MCUFWDL, 0x00);
_8051Reset88E(Adapter);
/* reset BB */
reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN);
reg_val &= ~(BIT(0) | BIT(1));
rtw_write8(Adapter, REG_SYS_FUNC_EN, reg_val);
/* reset RF */
rtw_write8(Adapter, REG_RF_CTRL, 0);
/* reset TRX path */
rtw_write16(Adapter, REG_CR, 0);
/* reset MAC, Digital Core */
reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
reg_val &= ~(BIT(4) | BIT(7));
rtw_write8(Adapter, REG_SYS_FUNC_EN+1, reg_val);
reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
reg_val |= BIT(4) | BIT(7);
rtw_write8(Adapter, REG_SYS_FUNC_EN+1, reg_val);
DBG_88E("-Reset Entry-\n");
}
#endif /* CONFIG_WOWLAN */
if (Adapter->pwrctrlpriv.bkeepfwalive) {
_ps_open_RF(Adapter);
@ -998,11 +768,7 @@ _func_enter_;
Adapter->bFWReady = false;
haldata->fw_ractrl = false;
} else {
#ifdef CONFIG_WOWLAN
status = rtl8188e_FirmwareDownload(Adapter, false);
#else
status = rtl8188e_FirmwareDownload(Adapter);
#endif /* CONFIG_WOWLAN */
if (status != _SUCCESS) {
DBG_88E("%s: Download Firmware failed!!\n", __func__);
@ -1287,6 +1053,7 @@ static void rtl8192cu_hw_power_down(struct adapter *adapt)
static u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
{
DBG_88E("==> %s\n", __func__);
rtw_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
@ -1376,14 +1143,6 @@ static void _ReadLEDSetting(struct adapter *Adapter, u8 *PROMContent, bool Autol
haldata->bLedOpenDrain = true;/* Support Open-drain arrangement for controlling the LED. */
}
static void readAntennaDiversity(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct registry_priv *registry_par = &adapt->registrypriv;
haldata->AntDivCfg = registry_par->antdiv_cfg; /* 0:OFF , 1:ON, */
}
static void Hal_EfuseParsePIDVID_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
@ -1420,7 +1179,7 @@ static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool
eeprom->mac_addr[i] = sMacAddr[i];
} else {
/* Read Permanent MAC address */
_rtw_memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
}
RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
@ -1433,11 +1192,6 @@ static void Hal_CustomizeByCustomerID_8188EU(struct adapter *adapt)
{
}
/* Read HW power down mode selection */
static void _ReadPSSetting(struct adapter *Adapter, u8 *PROMContent, u8 AutoloadFail)
{
}
static void
readAdapterInfo_8188EU(
struct adapter *adapt
@ -1536,30 +1290,6 @@ static void ResumeTxBeacon(struct adapter *adapt)
rtw_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
}
static void UpdateInterruptMask8188EU(struct adapter *adapt, u8 bHIMR0 , u32 AddMSR, u32 RemoveMSR)
{
struct hal_data_8188e *haldata;
u32 *himr;
haldata = GET_HAL_DATA(adapt);
if (bHIMR0)
himr = &(haldata->IntrMask[0]);
else
himr = &(haldata->IntrMask[1]);
if (AddMSR)
*himr |= AddMSR;
if (RemoveMSR)
*himr &= (~RemoveMSR);
if (bHIMR0)
rtw_write32(adapt, REG_HIMR_88E, *himr);
else
rtw_write32(adapt, REG_HIMRE_88E, *himr);
}
static void StopTxBeacon(struct adapter *adapt)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
@ -1667,22 +1397,6 @@ static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val)
rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
}
static void hw_var_set_correct_tsf(struct adapter *Adapter, u8 variable, u8 *val)
{
}
static void hw_var_set_mlme_disconnect(struct adapter *Adapter, u8 variable, u8 *val)
{
}
static void hw_var_set_mlme_sitesurvey(struct adapter *Adapter, u8 variable, u8 *val)
{
}
static void hw_var_set_mlme_join(struct adapter *Adapter, u8 variable, u8 *val)
{
}
static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
@ -2060,21 +1774,11 @@ _func_enter_;
case HW_VAR_AMPDU_FACTOR:
{
u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9};
#ifdef CONFIG_BT_COEXIST
u8 RegToSet_BT[4] = {0x31, 0x74, 0x42, 0x97};
#endif
u8 FactorToSet;
u8 *pRegToSet;
u8 index = 0;
#ifdef CONFIG_BT_COEXIST
if ((haldata->bt_coexist.BT_Coexist) &&
(haldata->bt_coexist.BT_CoexistType == BT_CSR_BC4))
pRegToSet = RegToSet_BT; /* 0x97427431; */
else
#endif
pRegToSet = RegToSet_Normal; /* 0xb972a841; */
pRegToSet = RegToSet_Normal; /* 0xb972a841; */
FactorToSet = *((u8 *)val);
if (FactorToSet <= 3) {
FactorToSet = (1<<(FactorToSet + 2));
@ -2120,12 +1824,14 @@ _func_enter_;
rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus);
}
break;
#ifdef CONFIG_88EU_P2P
case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
{
u8 p2p_ps_state = (*(u8 *)val);
rtl8188e_set_p2p_ps_offload_cmd(Adapter, p2p_ps_state);
}
break;
#endif
case HW_VAR_INITIAL_GAIN:
{
struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
@ -2142,20 +1848,6 @@ _func_enter_;
case HW_VAR_TRIGGER_GPIO_0:
rtl8192cu_trigger_gpio_0(Adapter);
break;
#ifdef CONFIG_BT_COEXIST
case HW_VAR_BT_SET_COEXIST:
{
u8 bStart = (*(u8 *)val);
rtl8192c_set_dm_bt_coexist(Adapter, bStart);
}
break;
case HW_VAR_BT_ISSUE_DELBA:
{
u8 dir = (*(u8 *)val);
rtl8192c_issue_delete_ba(Adapter, dir);
}
break;
#endif
case HW_VAR_RPT_TIMER_SETTING:
{
u16 min_rpt_time = (*(u16 *)val);
@ -2212,89 +1904,6 @@ _func_enter_;
haldata->bMacPwrCtrlOn = *val;
DBG_88E("%s: bMacPwrCtrlOn=%d\n", __func__, haldata->bMacPwrCtrlOn);
break;
#ifdef CONFIG_WOWLAN
case HW_VAR_WOWLAN:
{
struct wowlan_ioctl_param *poidparam;
u8 mstatus = (*(u8 *)val);
u8 trycnt = 100;
poidparam = (struct wowlan_ioctl_param *)val;
switch (poidparam->subcode) {
case WOWLAN_ENABLE:
DBG_88E_LEVEL(_drv_always_, "WOWLAN_ENABLE\n");
SetFwRelatedForWoWLAN8188ES(Adapter, true);
/* RX DMA stop */
DBG_88E_LEVEL(_drv_always_, "Pause DMA\n");
rtw_write32(Adapter, REG_RXPKT_NUM, (rtw_read32(Adapter, REG_RXPKT_NUM)|RW_RELEASE_EN));
do {
if ((rtw_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE)) {
DBG_88E_LEVEL(_drv_always_, "RX_DMA_IDLE is true\n");
break;
} else {
/* If RX_DMA is not idle, receive one pkt from DMA */
DBG_88E_LEVEL(_drv_always_, "RX_DMA_IDLE is not true\n");
}
} while (trycnt--);
if (trycnt == 0)
DBG_88E_LEVEL(_drv_always_, "Stop RX DMA failed......\n");
/* Set WOWLAN H2C command. */
DBG_88E_LEVEL(_drv_always_, "Set WOWLan cmd\n");
rtl8188es_set_wowlan_cmd(Adapter, 1);
mstatus = rtw_read8(Adapter, REG_WOW_CTRL);
trycnt = 10;
while (!(mstatus&BIT1) && trycnt > 1) {
mstatus = rtw_read8(Adapter, REG_WOW_CTRL);
DBG_88E_LEVEL(_drv_info_, "Loop index: %d :0x%02x\n", trycnt, mstatus);
trycnt--;
rtw_msleep_os(2);
}
Adapter->pwrctrlpriv.wowlan_wake_reason = rtw_read8(Adapter, REG_WOWLAN_WAKE_REASON);
DBG_88E_LEVEL(_drv_always_, "wowlan_wake_reason: 0x%02x\n",
Adapter->pwrctrlpriv.wowlan_wake_reason);
/* Invoid SE0 reset signal during suspending*/
rtw_write8(Adapter, REG_RSV_CTRL, 0x20);
rtw_write8(Adapter, REG_RSV_CTRL, 0x60);
/* rtw_msleep_os(10); */
break;
case WOWLAN_DISABLE:
DBG_88E_LEVEL(_drv_always_, "WOWLAN_DISABLE\n");
trycnt = 10;
rtl8188es_set_wowlan_cmd(Adapter, 0);
mstatus = rtw_read8(Adapter, REG_WOW_CTRL);
DBG_88E_LEVEL(_drv_info_, "%s mstatus:0x%02x\n", __func__, mstatus);
while (mstatus&BIT1 && trycnt > 1) {
mstatus = rtw_read8(Adapter, REG_WOW_CTRL);
DBG_88E_LEVEL(_drv_always_, "Loop index: %d :0x%02x\n", trycnt, mstatus);
trycnt--;
rtw_msleep_os(2);
}
if (mstatus & BIT1)
printk("System did not release RX_DMA\n");
else
SetFwRelatedForWoWLAN8188ES(Adapter, false);
rtw_msleep_os(2);
if (!(Adapter->pwrctrlpriv.wowlan_wake_reason & FWDecisionDisconnect))
rtl8188e_set_FwJoinBssReport_cmd(Adapter, 1);
break;
default:
break;
}
}
break;
#endif /* CONFIG_WOWLAN */
case HW_VAR_TX_RPT_MAX_MACID:
{
u8 maxMacid = *val;
@ -2542,21 +2151,6 @@ static u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eV
return bResult;
}
static void _update_response_rate(struct adapter *adapt, unsigned int mask)
{
u8 RateIndex = 0;
/* Set RRSR rate table. */
rtw_write8(adapt, REG_RRSR, mask&0xff);
rtw_write8(adapt, REG_RRSR+1, (mask>>8)&0xff);
/* Set RTS initial rate */
while (mask > 0x1) {
mask = (mask >> 1);
RateIndex++;
}
rtw_write8(adapt, REG_INIRTS_RATE_SEL, RateIndex);
}
static void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
{
u8 init_rate = 0;

193
hal/usb_ops_linux.c
View file

@ -31,7 +31,6 @@ static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u
struct adapter *adapt = pintfhdl->padapter;
struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt);
struct usb_device *udev = dvobjpriv->pusbdev;
unsigned int pipe;
int status = 0;
u8 reqtype;
@ -70,7 +69,7 @@ static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u
} else {
pipe = usb_sndctrlpipe(udev, 0);/* write_out */
reqtype = REALTEK_USB_VENQT_WRITE;
_rtw_memcpy(pIo_buf, pdata, len);
memcpy(pIo_buf, pdata, len);
}
status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len, RTW_USB_CONTROL_MSG_TIMEOUT);
@ -78,7 +77,7 @@ static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u
if (status == len) { /* Success this control transfer. */
rtw_reset_continual_urb_error(dvobjpriv);
if (requesttype == 0x01)
_rtw_memcpy(pdata, pIo_buf, len);
memcpy(pdata, pIo_buf, len);
} else { /* error cases */
DBG_88E("reg 0x%x, usb %s %u fail, status:%d value=0x%x, vendorreq_times:%d\n",
value, (requesttype == 0x01) ? "read" : "write",
@ -95,7 +94,7 @@ static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u
if (status > 0) {
if (requesttype == 0x01) {
/* For Control read transfer, we have to copy the read data from pIo_buf to pdata. */
_rtw_memcpy(pdata, pIo_buf, len);
memcpy(pdata, pIo_buf, len);
}
}
}
@ -268,28 +267,54 @@ static int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
static int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata)
{
u8 request;
u8 requesttype;
u16 wvalue;
u16 index;
u16 len;
u8 buf[VENDOR_CMD_MAX_DATA_LEN] = {0};
struct adapter *adapt = pintfhdl->padapter;
struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt);
struct usb_device *udev = dvobjpriv->pusbdev;
u8 request = REALTEK_USB_VENQT_CMD_REQ;
u8 reqtype = REALTEK_USB_VENQT_WRITE;
u16 value = (u16)(addr & 0x0000ffff);
u16 index = REALTEK_USB_VENQT_CMD_IDX;
int pipe = usb_sndctrlpipe(udev, 0); /* write_out */
u8 *buffer;
int ret;
int vendorreq_times = 0;
_func_enter_;
buffer = kmemdup(pdata, length, GFP_ATOMIC);
if (!buffer)
return -ENOMEM;
while (++vendorreq_times <= MAX_USBCTRL_VENDORREQ_TIMES) {
pipe = usb_sndctrlpipe(udev, 0);/* write_out */
request = 0x05;
requesttype = 0x00;/* write_out */
index = 0;/* n/a */
ret = rtw_usb_control_msg(udev, pipe, request, reqtype,
value, index, buffer, length,
RTW_USB_CONTROL_MSG_TIMEOUT);
wvalue = (u16)(addr&0x0000ffff);
len = length;
_rtw_memcpy(buf, pdata, len);
if (ret == length) { /* Success this control transfer. */
rtw_reset_continual_urb_error(dvobjpriv);
} else { /* error cases */
DBG_88E("reg 0x%x, usb %u write fail, status:%d value=0x%x, vendorreq_times:%d\n",
value, length, ret, *(u32 *)pdata, vendorreq_times);
ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, buf, len, requesttype);
_func_exit_;
if (ret < 0) {
if (ret == (-ESHUTDOWN) || ret == -ENODEV) {
adapt->bSurpriseRemoved = true;
} else {
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
haldata->srestpriv.Wifi_Error_Status = USB_VEN_REQ_CMD_FAIL;
}
}
if (rtw_inc_and_chk_continual_urb_error(dvobjpriv)) {
adapt->bSurpriseRemoved = true;
break;
}
}
/* firmware download is checksumed, don't retry */
if ((value >= FW_8188E_START_ADDRESS &&
value <= FW_8188E_END_ADDRESS) || ret == length)
break;
}
kfree(buffer);
return ret;
}
@ -303,17 +328,12 @@ static void interrupt_handler_8188eu(struct adapter *adapt, u16 pkt_len, u8 *pbu
}
/* HISR */
_rtw_memcpy(&(haldata->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4);
_rtw_memcpy(&(haldata->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4);
memcpy(&(haldata->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4);
memcpy(&(haldata->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4);
/* C2H Event */
if (pbuf[0] != 0)
_rtw_memcpy(&(haldata->C2hArray[0]), &(pbuf[USB_INTR_CONTENT_C2H_OFFSET]), 16);
}
static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxstat, struct phy_stat *pphy_status)
{
return _SUCCESS;
memcpy(&(haldata->C2hArray[0]), &(pbuf[USB_INTR_CONTENT_C2H_OFFSET]), 16);
}
static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
@ -402,11 +422,7 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
alloc_sz += 14;
}
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18))
pkt_copy = dev_alloc_skb(alloc_sz);
#else
pkt_copy = netdev_alloc_skb(adapt->pnetdev, alloc_sz);
#endif
if (pkt_copy) {
pkt_copy->dev = adapt->pnetdev;
precvframe->u.hdr.pkt = pkt_copy;
@ -414,7 +430,7 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz;
skb_reserve(pkt_copy, 8 - ((size_t)(pkt_copy->data) & 7));/* force pkt_copy->data at 8-byte alignment address */
skb_reserve(pkt_copy, shift_sz);/* force ip_hdr at 8-byte alignment address according to shift_sz. */
_rtw_memcpy(pkt_copy->data, (pbuf + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len);
memcpy(pkt_copy->data, (pbuf + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len);
precvframe->u.hdr.rx_tail = pkt_copy->data;
precvframe->u.hdr.rx_data = pkt_copy->data;
} else {
@ -555,8 +571,6 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
}
} else {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete : purb->status(%d) != 0\n", purb->status));
skb_put(precvbuf->pskb, purb->actual_length);
precvbuf->pskb = NULL;
DBG_88E("###=> usb_read_port_complete => urb status(%d)\n", purb->status);
@ -596,25 +610,20 @@ _func_exit_;
static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
{
int err;
unsigned int pipe;
size_t tmpaddr = 0;
size_t alignment = 0;
u32 ret = _SUCCESS;
struct urb *purb = NULL;
struct recv_buf *precvbuf = (struct recv_buf *)rmem;
struct adapter *adapter = pintfhdl->padapter;
struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter);
struct recv_priv *precvpriv = &adapter->recvpriv;
struct usb_device *pusbd = pdvobj->pusbdev;
int err;
unsigned int pipe;
size_t tmpaddr = 0;
size_t alignment = 0;
u32 ret = _SUCCESS;
_func_enter_;
if (!precvbuf) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
("usb_read_port:precvbuf ==NULL\n"));
return _FAIL;
}
if (adapter->bDriverStopped || adapter->bSurpriseRemoved ||
adapter->pwrctrlpriv.pnp_bstop_trx) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
@ -628,60 +637,62 @@ _func_enter_;
precvbuf->reuse = true;
}
rtl8188eu_init_recvbuf(adapter, precvbuf);
if (precvbuf != NULL) {
rtl8188eu_init_recvbuf(adapter, precvbuf);
/* re-assign for linux based on skb */
if ((!precvbuf->reuse) || (precvbuf->pskb == NULL)) {
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18))
precvbuf->pskb = dev_alloc_skb(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
#else
precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
#endif
if (precvbuf->pskb == NULL) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("init_recvbuf(): alloc_skb fail!\n"));
DBG_88E("#### usb_read_port() alloc_skb fail!#####\n");
return _FAIL;
/* re-assign for linux based on skb */
if ((!precvbuf->reuse) || (precvbuf->pskb == NULL)) {
precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
if (precvbuf->pskb == NULL) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("init_recvbuf(): alloc_skb fail!\n"));
DBG_88E("#### usb_read_port() alloc_skb fail!#####\n");
return _FAIL;
}
tmpaddr = (size_t)precvbuf->pskb->data;
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment));
precvbuf->phead = precvbuf->pskb->head;
precvbuf->pdata = precvbuf->pskb->data;
precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
precvbuf->pend = skb_end_pointer(precvbuf->pskb);
precvbuf->pbuf = precvbuf->pskb->data;
} else { /* reuse skb */
precvbuf->phead = precvbuf->pskb->head;
precvbuf->pdata = precvbuf->pskb->data;
precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
precvbuf->pend = skb_end_pointer(precvbuf->pskb);
precvbuf->pbuf = precvbuf->pskb->data;
precvbuf->reuse = false;
}
tmpaddr = (size_t)precvbuf->pskb->data;
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment));
precvpriv->rx_pending_cnt++;
precvbuf->phead = precvbuf->pskb->head;
precvbuf->pdata = precvbuf->pskb->data;
precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
precvbuf->pend = skb_end_pointer(precvbuf->pskb);
precvbuf->pbuf = precvbuf->pskb->data;
} else { /* reuse skb */
precvbuf->phead = precvbuf->pskb->head;
precvbuf->pdata = precvbuf->pskb->data;
precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
precvbuf->pend = skb_end_pointer(precvbuf->pskb);
precvbuf->pbuf = precvbuf->pskb->data;
purb = precvbuf->purb;
precvbuf->reuse = false;
}
/* translate DMA FIFO addr to pipehandle */
pipe = ffaddr2pipehdl(pdvobj, addr);
precvpriv->rx_pending_cnt++;
usb_fill_bulk_urb(purb, pusbd, pipe,
precvbuf->pbuf,
MAX_RECVBUF_SZ,
usb_read_port_complete,
precvbuf);/* context is precvbuf */
purb = precvbuf->purb;
/* translate DMA FIFO addr to pipehandle */
pipe = ffaddr2pipehdl(pdvobj, addr);
usb_fill_bulk_urb(purb, pusbd, pipe,
precvbuf->pbuf,
MAX_RECVBUF_SZ,
usb_read_port_complete,
precvbuf);/* context is precvbuf */
err = usb_submit_urb(purb, GFP_ATOMIC);
if ((err) && (err != (-EPERM))) {
err = usb_submit_urb(purb, GFP_ATOMIC);
if ((err) && (err != (-EPERM))) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x",
err, purb->status));
DBG_88E("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",
err, purb->status);
ret = _FAIL;
}
} else {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x",
err, purb->status));
DBG_88E("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",
err, purb->status);
("usb_read_port:precvbuf ==NULL\n"));
ret = _FAIL;
}