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https://github.com/lwfinger/rtl8188eu.git
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rtl8188eu: Backport kernel version
This driver was added to the kernel with version 3.12. The changes in that version are now brought back to the GitHub repo. Essentually all of the code is updated. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
868a407435
commit
19db43ecbd
89 changed files with 2026 additions and 5957 deletions
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@ -358,29 +358,6 @@ rtl8188e_PHY_SetRFReg(
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/* 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. */
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/* */
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/*-----------------------------------------------------------------------------
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* Function: phy_ConfigMACWithParaFile()
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*
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* Overview: This function read BB parameters from general file format, and do register
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* Read/Write
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*
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* Input: struct adapter *Adapter
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* ps8 pFileName
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*
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* Output: NONE
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*
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* Return: RT_STATUS_SUCCESS: configuration file exist
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*
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* Note: The format of MACPHY_REG.txt is different from PHY and RF.
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* [Register][Mask][Value]
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*---------------------------------------------------------------------------*/
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static int phy_ConfigMACWithParaFile(struct adapter *Adapter, u8 *pFileName)
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{
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int rtStatus = _FAIL;
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return rtStatus;
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}
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/*-----------------------------------------------------------------------------
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* Function: PHY_MACConfig8192C
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*
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@ -399,8 +376,8 @@ static int phy_ConfigMACWithParaFile(struct adapter *Adapter, u8 *pFileName)
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*---------------------------------------------------------------------------*/
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s32 PHY_MACConfig8188E(struct adapter *Adapter)
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{
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int rtStatus = _SUCCESS;
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struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
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int rtStatus = _SUCCESS;
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/* */
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/* Config MAC */
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@ -530,32 +507,6 @@ phy_InitBBRFRegisterDefinition(
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pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
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}
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/*-----------------------------------------------------------------------------
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* Function: phy_ConfigBBWithParaFile()
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*
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* Overview: This function read BB parameters from general file format, and do register
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* Read/Write
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*
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* Input: struct adapter *Adapter
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* ps8 pFileName
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*
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* Output: NONE
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*
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* Return: RT_STATUS_SUCCESS: configuration file exist
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* 2008/11/06 MH For 92S we do not support silent reset now. Disable
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* parameter file compare!!!!!!??
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*
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*---------------------------------------------------------------------------*/
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static int phy_ConfigBBWithParaFile(struct adapter *Adapter, u8 *pFileName)
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{
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return _SUCCESS;
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}
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/* The following is for High Power PA */
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static void phy_ConfigBBExternalPA(struct adapter *Adapter)
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{
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}
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void storePwrIndexDiffRateOffset(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u32 Data)
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{
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struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
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@ -599,62 +550,8 @@ void storePwrIndexDiffRateOffset(struct adapter *Adapter, u32 RegAddr, u32 BitMa
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pHalData->pwrGroupCnt++;
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}
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}
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/*-----------------------------------------------------------------------------
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* Function: phy_ConfigBBWithPgParaFile
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*
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* Overview:
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*
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* Input: NONE
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*
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* Output: NONE
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*
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* Return: NONE
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*
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* Revised History:
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* When Who Remark
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* 11/06/2008 MHC Create Version 0.
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* 2009/07/29 tynli (porting from 92SE branch)2009/03/11 Add copy parameter file to buffer for silent reset
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*---------------------------------------------------------------------------*/
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static int phy_ConfigBBWithPgParaFile(struct adapter *Adapter, u8 *pFileName)
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{
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return _SUCCESS;
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}
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static void phy_BB8192C_Config_1T(struct adapter *Adapter)
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{
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/* for path - B */
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PHY_SetBBReg(Adapter, rFPGA0_TxInfo, 0x3, 0x2);
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PHY_SetBBReg(Adapter, rFPGA1_TxInfo, 0x300033, 0x200022);
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/* 20100519 Joseph: Add for 1T2R config. Suggested by Kevin, Jenyu and Yunan. */
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PHY_SetBBReg(Adapter, rCCK0_AFESetting, bMaskByte3, 0x45);
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PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x23);
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PHY_SetBBReg(Adapter, rOFDM0_AGCParameter1, 0x30, 0x1); /* B path first AGC */
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PHY_SetBBReg(Adapter, 0xe74, 0x0c000000, 0x2);
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PHY_SetBBReg(Adapter, 0xe78, 0x0c000000, 0x2);
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PHY_SetBBReg(Adapter, 0xe7c, 0x0c000000, 0x2);
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PHY_SetBBReg(Adapter, 0xe80, 0x0c000000, 0x2);
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PHY_SetBBReg(Adapter, 0xe88, 0x0c000000, 0x2);
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}
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/* Joseph test: new initialize order!! */
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/* Test only!! This part need to be re-organized. */
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/* Now it is just for 8256. */
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static int
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phy_BB8190_Config_HardCode(
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struct adapter *Adapter
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)
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{
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return _SUCCESS;
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}
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static int
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phy_BB8188E_Config_ParaFile(
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struct adapter *Adapter
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)
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static int phy_BB8188E_Config_ParaFile(struct adapter *Adapter)
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{
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struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
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struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
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@ -755,11 +652,6 @@ int rtl8188e_PHY_ConfigRFWithParaFile(struct adapter *Adapter, u8 *pFileName, en
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return _SUCCESS;
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}
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static int PHY_ConfigRFExternalPA(struct adapter *Adapter, enum rf_radio_path eRFPath)
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{
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return _SUCCESS;
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}
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void
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rtl8192c_PHY_GetHWRegOriginalValue(
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struct adapter *Adapter
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@ -1012,8 +904,10 @@ PHY_SetTxPowerLevel8188E(
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u8 channel
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)
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{
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u8 cckPowerLevel[MAX_TX_COUNT], ofdmPowerLevel[MAX_TX_COUNT];/* [0]:RF-A, [1]:RF-B */
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u8 BW20PowerLevel[MAX_TX_COUNT], BW40PowerLevel[MAX_TX_COUNT];
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u8 cckPowerLevel[MAX_TX_COUNT] = {0};
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u8 ofdmPowerLevel[MAX_TX_COUNT] = {0};/* [0]:RF-A, [1]:RF-B */
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u8 BW20PowerLevel[MAX_TX_COUNT] = {0};
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u8 BW40PowerLevel[MAX_TX_COUNT] = {0};
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getTxPowerIndex88E(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0], &BW20PowerLevel[0], &BW40PowerLevel[0]);
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@ -1229,22 +1123,7 @@ void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel)
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bool bResult = true;
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if (pHalData->rf_chip == RF_PSEUDO_11N)
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return; /* return immediately if it is peudo-phy */
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/* */
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switch (pHalData->CurrentWirelessMode) {
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case WIRELESS_MODE_A:
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case WIRELESS_MODE_N_5G:
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break;
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case WIRELESS_MODE_B:
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break;
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case WIRELESS_MODE_G:
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case WIRELESS_MODE_N_24G:
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break;
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default:
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break;
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}
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/* */
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return; /* return immediately if it is peudo-phy */
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if (channel == 0)
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channel = 1;
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@ -1263,156 +1142,3 @@ void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel)
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pHalData->CurrentChannel = tmpchannel;
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}
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}
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static bool
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phy_SwChnlStepByStep(
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struct adapter *Adapter,
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u8 channel,
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u8 *stage,
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u8 *step,
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u32 *delay
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)
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{
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return true;
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}
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static bool
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phy_SetSwChnlCmdArray(
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struct sw_chnl_cmd *CmdTable,
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u32 CmdTableIdx,
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u32 CmdTableSz,
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enum sw_chnl_cmd_id CmdID,
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u32 Para1,
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u32 Para2,
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u32 msDelay
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)
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{
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struct sw_chnl_cmd *pCmd;
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if (CmdTable == NULL)
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return false;
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if (CmdTableIdx >= CmdTableSz)
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return false;
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pCmd = CmdTable + CmdTableIdx;
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pCmd->CmdID = CmdID;
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pCmd->Para1 = Para1;
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pCmd->Para2 = Para2;
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pCmd->msDelay = msDelay;
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return true;
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}
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static void phy_FinishSwChnlNow(struct adapter *Adapter, u8 channel)
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{
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/* We should not call this function directly */
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}
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/* */
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/* Description: */
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/* Switch channel synchronously. Called by SwChnlByDelayHandler. */
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/* */
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/* Implemented by Bruce, 2008-02-14. */
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/* The following procedure is operted according to SwChanlCallback8190Pci(). */
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/* However, this procedure is performed synchronously which should be running under */
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/* passive level. */
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/* Only called during initialize */
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void PHY_SwChnlPhy8192C(struct adapter *Adapter, u8 channel)
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{
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struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
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/* return immediately if it is peudo-phy */
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if (pHalData->rf_chip == RF_PSEUDO_11N)
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return;
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if (channel == 0)
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channel = 1;
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pHalData->CurrentChannel = channel;
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phy_FinishSwChnlNow(Adapter, channel);
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}
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/* */
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/* Description: */
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/* Configure H/W functionality to enable/disable Monitor mode. */
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/* Note, because we possibly need to configure BB and RF in this function, */
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/* so caller should in PASSIVE_LEVEL. 080118, by rcnjko. */
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/* */
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void
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PHY_SetMonitorMode8192C(
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struct adapter *pAdapter,
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bool bEnableMonitorMode
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)
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{
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}
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/*-----------------------------------------------------------------------------
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* Function: PHYCheckIsLegalRfPath8190Pci()
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*
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* Overview: Check different RF type to execute legal judgement. If RF Path is illegal
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* We will return false.
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*
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* Input: NONE
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*
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* Output: NONE
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*
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* Return: NONE
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*
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* Revised History:
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* When Who Remark
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* 11/15/2007 MHC Create Version 0.
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*
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*---------------------------------------------------------------------------*/
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bool PHY_CheckIsLegalRfPath8192C(struct adapter *pAdapter, u32 eRFPath)
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{
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return true;
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} /* PHY_CheckIsLegalRfPath8192C */
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static void _PHY_SetRFPathSwitch(struct adapter *pAdapter, bool bMain, bool is2T)
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{
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u8 u1bTmp;
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if (!pAdapter->hw_init_completed) {
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u1bTmp = rtw_read8(pAdapter, REG_LEDCFG2) | BIT7;
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rtw_write8(pAdapter, REG_LEDCFG2, u1bTmp);
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PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
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}
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if (is2T) {
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if (bMain)
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PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); /* 92C_Path_A */
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else
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PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); /* BT */
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} else {
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if (bMain)
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PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x2); /* Main */
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else
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PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x1); /* Aux */
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}
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}
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static bool _PHY_QueryRFPathSwitch(struct adapter *pAdapter, bool is2T)
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{
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if (!pAdapter->hw_init_completed) {
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PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01);
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PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
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}
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if (is2T) {
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if (PHY_QueryBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01)
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return true;
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else
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return false;
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} else {
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if (PHY_QueryBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300) == 0x02)
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return true;
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else
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return false;
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}
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}
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static void _PHY_DumpRFReg(struct adapter *pAdapter)
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{
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}
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