mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2025-06-23 08:34:20 +00:00
rtl8188eu: Backport kernel version
This driver was added to the kernel with version 3.12. The changes in that version are now brought back to the GitHub repo. Essentually all of the code is updated. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
868a407435
commit
19db43ecbd
89 changed files with 2026 additions and 5957 deletions
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@ -131,110 +131,6 @@ static u32 rtl8188eu_InitPowerOn(struct adapter *adapt)
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return _SUCCESS;
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}
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static void _dbg_dump_macreg(struct adapter *adapt)
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{
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u32 offset = 0;
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u32 val32 = 0;
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u32 index = 0;
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for (index = 0; index < 64; index++) {
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offset = index*4;
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val32 = rtw_read32(adapt, offset);
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DBG_88E("offset : 0x%02x ,val:0x%08x\n", offset, val32);
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}
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}
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static void _InitPABias(struct adapter *adapt)
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{
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struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
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u8 pa_setting;
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bool is92C = IS_92C_SERIAL(haldata->VersionID);
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/* FIXED PA current issue */
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pa_setting = EFUSE_Read1Byte(adapt, 0x1FA);
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if (!(pa_setting & BIT0)) {
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PHY_SetRFReg(adapt, RF_PATH_A, 0x15, 0x0FFFFF, 0x0F406);
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PHY_SetRFReg(adapt, RF_PATH_A, 0x15, 0x0FFFFF, 0x4F406);
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PHY_SetRFReg(adapt, RF_PATH_A, 0x15, 0x0FFFFF, 0x8F406);
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PHY_SetRFReg(adapt, RF_PATH_A, 0x15, 0x0FFFFF, 0xCF406);
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}
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if (!(pa_setting & BIT1) && is92C) {
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PHY_SetRFReg(adapt, RF_PATH_B, 0x15, 0x0FFFFF, 0x0F406);
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PHY_SetRFReg(adapt, RF_PATH_B, 0x15, 0x0FFFFF, 0x4F406);
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PHY_SetRFReg(adapt, RF_PATH_B, 0x15, 0x0FFFFF, 0x8F406);
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PHY_SetRFReg(adapt, RF_PATH_B, 0x15, 0x0FFFFF, 0xCF406);
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}
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if (!(pa_setting & BIT4)) {
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pa_setting = rtw_read8(adapt, 0x16);
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pa_setting &= 0x0F;
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rtw_write8(adapt, 0x16, pa_setting | 0x80);
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rtw_write8(adapt, 0x16, pa_setting | 0x90);
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}
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}
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#ifdef CONFIG_BT_COEXIST
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static void _InitBTCoexist(struct adapter *adapt)
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{
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struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
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struct btcoexist_priv *pbtpriv = &(haldata->bt_coexist);
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u8 u1Tmp;
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if (pbtpriv->BT_Coexist && pbtpriv->BT_CoexistType == BT_CSR_BC4) {
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if (adapt->registrypriv.mp_mode == 0) {
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if (pbtpriv->BT_Ant_isolation) {
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rtw_write8(adapt, REG_GPIO_MUXCFG, 0xa0);
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DBG_88E("BT write 0x%x = 0x%x\n", REG_GPIO_MUXCFG, 0xa0);
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}
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}
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u1Tmp = rtw_read8(adapt, 0x4fd) & BIT0;
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u1Tmp = u1Tmp |
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((pbtpriv->BT_Ant_isolation == 1) ? 0 : BIT1) |
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((pbtpriv->BT_Service == BT_SCO) ? 0 : BIT2);
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rtw_write8(adapt, 0x4fd, u1Tmp);
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DBG_88E("BT write 0x%x = 0x%x for non-isolation\n", 0x4fd, u1Tmp);
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rtw_write32(adapt, REG_BT_COEX_TABLE+4, 0xaaaa9aaa);
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DBG_88E("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+4, 0xaaaa9aaa);
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rtw_write32(adapt, REG_BT_COEX_TABLE+8, 0xffbd0040);
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DBG_88E("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+8, 0xffbd0040);
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rtw_write32(adapt, REG_BT_COEX_TABLE+0xc, 0x40000010);
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DBG_88E("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+0xc, 0x40000010);
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/* Config to 1T1R */
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u1Tmp = rtw_read8(adapt, rOFDM0_TRxPathEnable);
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u1Tmp &= ~(BIT1);
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rtw_write8(adapt, rOFDM0_TRxPathEnable, u1Tmp);
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DBG_88E("BT write 0xC04 = 0x%x\n", u1Tmp);
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u1Tmp = rtw_read8(adapt, rOFDM1_TRxPathEnable);
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u1Tmp &= ~(BIT1);
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rtw_write8(adapt, rOFDM1_TRxPathEnable, u1Tmp);
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DBG_88E("BT write 0xD04 = 0x%x\n", u1Tmp);
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}
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}
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#endif
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/* MAC init functions */
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static void _SetMacID(struct adapter *Adapter, u8 *MacID)
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{
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u32 i;
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for (i = 0; i < MAC_ADDR_LEN; i++)
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rtw_write32(Adapter, REG_MACID+i, MacID[i]);
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}
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static void _SetBSSID(struct adapter *Adapter, u8 *BSSID)
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{
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u32 i;
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for (i = 0; i < MAC_ADDR_LEN; i++)
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rtw_write32(Adapter, REG_BSSID+i, BSSID[i]);
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}
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/* Shall USB interface init this? */
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static void _InitInterrupt(struct adapter *Adapter)
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{
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@ -276,7 +172,7 @@ static void _InitQueueReservedPage(struct adapter *Adapter)
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u32 numPubQ;
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u32 value32;
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u8 value8;
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bool bWiFiConfig = pregistrypriv->wifi_spec;
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bool bWiFiConfig = pregistrypriv->wifi_spec;
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if (bWiFiConfig) {
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if (haldata->OutEpQueueSel & TX_SELE_HQ)
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@ -303,11 +199,7 @@ static void _InitQueueReservedPage(struct adapter *Adapter)
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}
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}
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static void
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_InitTxBufferBoundary(
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struct adapter *Adapter,
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u8 txpktbuf_bndy
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)
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static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy)
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{
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rtw_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
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rtw_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
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@ -316,10 +208,7 @@ _InitTxBufferBoundary(
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rtw_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
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}
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static void
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_InitPageBoundary(
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struct adapter *Adapter
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)
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static void _InitPageBoundary(struct adapter *Adapter)
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{
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/* RX Page Boundary */
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/* */
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@ -328,8 +217,9 @@ _InitPageBoundary(
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rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
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}
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static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ, u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ, u16 hiQ
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)
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static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ,
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u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ,
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u16 hiQ)
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{
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u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
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@ -447,13 +337,6 @@ static void _InitQueuePriority(struct adapter *Adapter)
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}
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}
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static void _InitHardwareDropIncorrectBulkOut(struct adapter *Adapter)
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{
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u32 value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK);
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value32 |= DROP_DATA_EN;
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rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32);
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}
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static void _InitNetworkType(struct adapter *Adapter)
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{
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u32 value32;
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@ -518,15 +401,6 @@ static void _InitAdaptiveCtrl(struct adapter *Adapter)
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rtw_write16(Adapter, REG_RL, value16);
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}
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static void _InitRateFallback(struct adapter *Adapter)
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{
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/* Set Data Auto Rate Fallback Retry Count register. */
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rtw_write32(Adapter, REG_DARFRC, 0x00000000);
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rtw_write32(Adapter, REG_DARFRC+4, 0x10080404);
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rtw_write32(Adapter, REG_RARFRC, 0x04030201);
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rtw_write32(Adapter, REG_RARFRC+4, 0x08070605);
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}
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static void _InitEDCA(struct adapter *Adapter)
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{
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/* Set Spec SIFS (used in NAV) */
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@ -724,36 +598,6 @@ static void InitUsbAggregationSetting(struct adapter *Adapter)
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/* 201/12/10 MH Add for USB agg mode dynamic switch. */
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haldata->UsbRxHighSpeedMode = false;
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}
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static void
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HalRxAggr8188EUsb(
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struct adapter *Adapter,
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bool Value
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)
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{
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}
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/*-----------------------------------------------------------------------------
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* Function: USB_AggModeSwitch()
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*
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* Overview: When RX traffic is more than 40M, we need to adjust some parameters to increase
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* RX speed by increasing batch indication size. This will decrease TCP ACK speed, we
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* need to monitor the influence of FTP/network share.
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* For TX mode, we are still ubder investigation.
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*
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* Input: struct adapter *
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*
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* Output: NONE
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*
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* Return: NONE
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*
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* Revised History:
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* When Who Remark
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* 12/10/2010 MHC Create Version 0.
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*
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*---------------------------------------------------------------------------*/
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static void USB_AggModeSwitch(struct adapter *Adapter)
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{
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} /* USB_AggModeSwitch */
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static void _InitOperationMode(struct adapter *Adapter)
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{
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@ -781,30 +625,8 @@ static void _InitBeaconParameters(struct adapter *Adapter)
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haldata->RegCR_1 = rtw_read8(Adapter, REG_CR+1);
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}
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static void _InitRFType(struct adapter *Adapter)
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{
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struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
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bool is92CU = IS_92C_SERIAL(haldata->VersionID);
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haldata->rf_chip = RF_6052;
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if (false == is92CU) {
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haldata->rf_type = RF_1T1R;
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DBG_88E("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n");
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return;
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}
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/* TODO: Consider that EEPROM set 92CU to 1T1R later. */
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/* Force to overwrite setting according to chip version. Ignore EEPROM setting. */
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MSG_88E("Set RF Chip ID to RF_6052 and RF type to %d.\n", haldata->rf_type);
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}
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static void
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_BeaconFunctionEnable(
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struct adapter *Adapter,
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bool Enable,
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bool Linked
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)
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static void _BeaconFunctionEnable(struct adapter *Adapter,
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bool Enable, bool Linked)
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{
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rtw_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1));
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@ -812,29 +634,19 @@ _BeaconFunctionEnable(
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}
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/* Set CCK and OFDM Block "ON" */
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static void _BBTurnOnBlock(
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struct adapter *Adapter
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)
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static void _BBTurnOnBlock(struct adapter *Adapter)
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{
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PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
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PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
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}
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static void _RfPowerSave(
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struct adapter *Adapter
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)
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{
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}
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enum {
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Antenna_Lfet = 1,
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Antenna_Right = 2,
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};
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static void
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_InitAntenna_Selection(struct adapter *Adapter)
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static void _InitAntenna_Selection(struct adapter *Adapter)
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{
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struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
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if (haldata->AntDivCfg == 0)
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@ -851,17 +663,6 @@ _InitAntenna_Selection(struct adapter *Adapter)
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DBG_88E("%s,Cur_ant:(%x)%s\n", __func__, haldata->CurAntenna, (haldata->CurAntenna == Antenna_A) ? "Antenna_A" : "Antenna_B");
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}
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/* */
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/* 2010/08/26 MH Add for selective suspend mode check. */
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/* If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and */
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/* slim card. */
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/* */
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static void
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HalDetectSelectiveSuspendMode(
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struct adapter *Adapter
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)
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{
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} /* HalDetectSelectiveSuspendMode */
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/*-----------------------------------------------------------------------------
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* Function: HwSuspendModeEnable92Cu()
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*
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@ -912,37 +713,6 @@ _func_enter_;
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HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
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#ifdef CONFIG_WOWLAN
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Adapter->pwrctrlpriv.wowlan_wake_reason = rtw_read8(Adapter, REG_WOWLAN_WAKE_REASON);
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DBG_88E("%s wowlan_wake_reason: 0x%02x\n",
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__func__, Adapter->pwrctrlpriv.wowlan_wake_reason);
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if (rtw_read8(Adapter, REG_MCUFWDL)&BIT7) { /*&&
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(Adapter->pwrctrlpriv.wowlan_wake_reason & FWDecisionDisconnect)) {*/
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u8 reg_val = 0;
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DBG_88E("+Reset Entry+\n");
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rtw_write8(Adapter, REG_MCUFWDL, 0x00);
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_8051Reset88E(Adapter);
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/* reset BB */
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reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN);
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reg_val &= ~(BIT(0) | BIT(1));
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rtw_write8(Adapter, REG_SYS_FUNC_EN, reg_val);
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/* reset RF */
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rtw_write8(Adapter, REG_RF_CTRL, 0);
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/* reset TRX path */
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rtw_write16(Adapter, REG_CR, 0);
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/* reset MAC, Digital Core */
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reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
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reg_val &= ~(BIT(4) | BIT(7));
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rtw_write8(Adapter, REG_SYS_FUNC_EN+1, reg_val);
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reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
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reg_val |= BIT(4) | BIT(7);
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rtw_write8(Adapter, REG_SYS_FUNC_EN+1, reg_val);
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DBG_88E("-Reset Entry-\n");
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}
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#endif /* CONFIG_WOWLAN */
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if (Adapter->pwrctrlpriv.bkeepfwalive) {
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_ps_open_RF(Adapter);
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@ -998,11 +768,7 @@ _func_enter_;
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Adapter->bFWReady = false;
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haldata->fw_ractrl = false;
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} else {
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#ifdef CONFIG_WOWLAN
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status = rtl8188e_FirmwareDownload(Adapter, false);
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#else
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status = rtl8188e_FirmwareDownload(Adapter);
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#endif /* CONFIG_WOWLAN */
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if (status != _SUCCESS) {
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DBG_88E("%s: Download Firmware failed!!\n", __func__);
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@ -1287,6 +1053,7 @@ static void rtl8192cu_hw_power_down(struct adapter *adapt)
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static u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
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{
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DBG_88E("==> %s\n", __func__);
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rtw_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
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@ -1376,14 +1143,6 @@ static void _ReadLEDSetting(struct adapter *Adapter, u8 *PROMContent, bool Autol
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haldata->bLedOpenDrain = true;/* Support Open-drain arrangement for controlling the LED. */
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}
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static void readAntennaDiversity(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
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{
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struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
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struct registry_priv *registry_par = &adapt->registrypriv;
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haldata->AntDivCfg = registry_par->antdiv_cfg; /* 0:OFF , 1:ON, */
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}
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static void Hal_EfuseParsePIDVID_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
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{
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struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
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@ -1420,7 +1179,7 @@ static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool
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eeprom->mac_addr[i] = sMacAddr[i];
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} else {
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/* Read Permanent MAC address */
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_rtw_memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
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memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
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}
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RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
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("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
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@ -1433,11 +1192,6 @@ static void Hal_CustomizeByCustomerID_8188EU(struct adapter *adapt)
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{
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}
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/* Read HW power down mode selection */
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static void _ReadPSSetting(struct adapter *Adapter, u8 *PROMContent, u8 AutoloadFail)
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{
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}
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static void
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readAdapterInfo_8188EU(
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struct adapter *adapt
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@ -1536,30 +1290,6 @@ static void ResumeTxBeacon(struct adapter *adapt)
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rtw_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
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}
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static void UpdateInterruptMask8188EU(struct adapter *adapt, u8 bHIMR0 , u32 AddMSR, u32 RemoveMSR)
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{
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struct hal_data_8188e *haldata;
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u32 *himr;
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haldata = GET_HAL_DATA(adapt);
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|
||||
if (bHIMR0)
|
||||
himr = &(haldata->IntrMask[0]);
|
||||
else
|
||||
himr = &(haldata->IntrMask[1]);
|
||||
|
||||
if (AddMSR)
|
||||
*himr |= AddMSR;
|
||||
|
||||
if (RemoveMSR)
|
||||
*himr &= (~RemoveMSR);
|
||||
|
||||
if (bHIMR0)
|
||||
rtw_write32(adapt, REG_HIMR_88E, *himr);
|
||||
else
|
||||
rtw_write32(adapt, REG_HIMRE_88E, *himr);
|
||||
}
|
||||
|
||||
static void StopTxBeacon(struct adapter *adapt)
|
||||
{
|
||||
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
|
||||
|
|
@ -1667,22 +1397,6 @@ static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val)
|
|||
rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
|
||||
}
|
||||
|
||||
static void hw_var_set_correct_tsf(struct adapter *Adapter, u8 variable, u8 *val)
|
||||
{
|
||||
}
|
||||
|
||||
static void hw_var_set_mlme_disconnect(struct adapter *Adapter, u8 variable, u8 *val)
|
||||
{
|
||||
}
|
||||
|
||||
static void hw_var_set_mlme_sitesurvey(struct adapter *Adapter, u8 variable, u8 *val)
|
||||
{
|
||||
}
|
||||
|
||||
static void hw_var_set_mlme_join(struct adapter *Adapter, u8 variable, u8 *val)
|
||||
{
|
||||
}
|
||||
|
||||
static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
|
||||
{
|
||||
struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
|
||||
|
|
@ -2060,21 +1774,11 @@ _func_enter_;
|
|||
case HW_VAR_AMPDU_FACTOR:
|
||||
{
|
||||
u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9};
|
||||
#ifdef CONFIG_BT_COEXIST
|
||||
u8 RegToSet_BT[4] = {0x31, 0x74, 0x42, 0x97};
|
||||
#endif
|
||||
u8 FactorToSet;
|
||||
u8 *pRegToSet;
|
||||
u8 index = 0;
|
||||
|
||||
#ifdef CONFIG_BT_COEXIST
|
||||
if ((haldata->bt_coexist.BT_Coexist) &&
|
||||
(haldata->bt_coexist.BT_CoexistType == BT_CSR_BC4))
|
||||
pRegToSet = RegToSet_BT; /* 0x97427431; */
|
||||
else
|
||||
#endif
|
||||
pRegToSet = RegToSet_Normal; /* 0xb972a841; */
|
||||
|
||||
pRegToSet = RegToSet_Normal; /* 0xb972a841; */
|
||||
FactorToSet = *((u8 *)val);
|
||||
if (FactorToSet <= 3) {
|
||||
FactorToSet = (1<<(FactorToSet + 2));
|
||||
|
|
@ -2120,12 +1824,14 @@ _func_enter_;
|
|||
rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus);
|
||||
}
|
||||
break;
|
||||
#ifdef CONFIG_88EU_P2P
|
||||
case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
|
||||
{
|
||||
u8 p2p_ps_state = (*(u8 *)val);
|
||||
rtl8188e_set_p2p_ps_offload_cmd(Adapter, p2p_ps_state);
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
case HW_VAR_INITIAL_GAIN:
|
||||
{
|
||||
struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
|
||||
|
|
@ -2142,20 +1848,6 @@ _func_enter_;
|
|||
case HW_VAR_TRIGGER_GPIO_0:
|
||||
rtl8192cu_trigger_gpio_0(Adapter);
|
||||
break;
|
||||
#ifdef CONFIG_BT_COEXIST
|
||||
case HW_VAR_BT_SET_COEXIST:
|
||||
{
|
||||
u8 bStart = (*(u8 *)val);
|
||||
rtl8192c_set_dm_bt_coexist(Adapter, bStart);
|
||||
}
|
||||
break;
|
||||
case HW_VAR_BT_ISSUE_DELBA:
|
||||
{
|
||||
u8 dir = (*(u8 *)val);
|
||||
rtl8192c_issue_delete_ba(Adapter, dir);
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
case HW_VAR_RPT_TIMER_SETTING:
|
||||
{
|
||||
u16 min_rpt_time = (*(u16 *)val);
|
||||
|
|
@ -2212,89 +1904,6 @@ _func_enter_;
|
|||
haldata->bMacPwrCtrlOn = *val;
|
||||
DBG_88E("%s: bMacPwrCtrlOn=%d\n", __func__, haldata->bMacPwrCtrlOn);
|
||||
break;
|
||||
#ifdef CONFIG_WOWLAN
|
||||
case HW_VAR_WOWLAN:
|
||||
{
|
||||
struct wowlan_ioctl_param *poidparam;
|
||||
u8 mstatus = (*(u8 *)val);
|
||||
u8 trycnt = 100;
|
||||
|
||||
poidparam = (struct wowlan_ioctl_param *)val;
|
||||
switch (poidparam->subcode) {
|
||||
case WOWLAN_ENABLE:
|
||||
DBG_88E_LEVEL(_drv_always_, "WOWLAN_ENABLE\n");
|
||||
|
||||
SetFwRelatedForWoWLAN8188ES(Adapter, true);
|
||||
|
||||
/* RX DMA stop */
|
||||
DBG_88E_LEVEL(_drv_always_, "Pause DMA\n");
|
||||
rtw_write32(Adapter, REG_RXPKT_NUM, (rtw_read32(Adapter, REG_RXPKT_NUM)|RW_RELEASE_EN));
|
||||
do {
|
||||
if ((rtw_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE)) {
|
||||
DBG_88E_LEVEL(_drv_always_, "RX_DMA_IDLE is true\n");
|
||||
break;
|
||||
} else {
|
||||
/* If RX_DMA is not idle, receive one pkt from DMA */
|
||||
DBG_88E_LEVEL(_drv_always_, "RX_DMA_IDLE is not true\n");
|
||||
}
|
||||
} while (trycnt--);
|
||||
if (trycnt == 0)
|
||||
DBG_88E_LEVEL(_drv_always_, "Stop RX DMA failed......\n");
|
||||
|
||||
/* Set WOWLAN H2C command. */
|
||||
DBG_88E_LEVEL(_drv_always_, "Set WOWLan cmd\n");
|
||||
rtl8188es_set_wowlan_cmd(Adapter, 1);
|
||||
|
||||
mstatus = rtw_read8(Adapter, REG_WOW_CTRL);
|
||||
trycnt = 10;
|
||||
|
||||
while (!(mstatus&BIT1) && trycnt > 1) {
|
||||
mstatus = rtw_read8(Adapter, REG_WOW_CTRL);
|
||||
DBG_88E_LEVEL(_drv_info_, "Loop index: %d :0x%02x\n", trycnt, mstatus);
|
||||
trycnt--;
|
||||
rtw_msleep_os(2);
|
||||
}
|
||||
|
||||
Adapter->pwrctrlpriv.wowlan_wake_reason = rtw_read8(Adapter, REG_WOWLAN_WAKE_REASON);
|
||||
DBG_88E_LEVEL(_drv_always_, "wowlan_wake_reason: 0x%02x\n",
|
||||
Adapter->pwrctrlpriv.wowlan_wake_reason);
|
||||
|
||||
/* Invoid SE0 reset signal during suspending*/
|
||||
rtw_write8(Adapter, REG_RSV_CTRL, 0x20);
|
||||
rtw_write8(Adapter, REG_RSV_CTRL, 0x60);
|
||||
|
||||
/* rtw_msleep_os(10); */
|
||||
break;
|
||||
case WOWLAN_DISABLE:
|
||||
DBG_88E_LEVEL(_drv_always_, "WOWLAN_DISABLE\n");
|
||||
trycnt = 10;
|
||||
rtl8188es_set_wowlan_cmd(Adapter, 0);
|
||||
mstatus = rtw_read8(Adapter, REG_WOW_CTRL);
|
||||
DBG_88E_LEVEL(_drv_info_, "%s mstatus:0x%02x\n", __func__, mstatus);
|
||||
|
||||
while (mstatus&BIT1 && trycnt > 1) {
|
||||
mstatus = rtw_read8(Adapter, REG_WOW_CTRL);
|
||||
DBG_88E_LEVEL(_drv_always_, "Loop index: %d :0x%02x\n", trycnt, mstatus);
|
||||
trycnt--;
|
||||
rtw_msleep_os(2);
|
||||
}
|
||||
|
||||
if (mstatus & BIT1)
|
||||
printk("System did not release RX_DMA\n");
|
||||
else
|
||||
SetFwRelatedForWoWLAN8188ES(Adapter, false);
|
||||
|
||||
rtw_msleep_os(2);
|
||||
if (!(Adapter->pwrctrlpriv.wowlan_wake_reason & FWDecisionDisconnect))
|
||||
rtl8188e_set_FwJoinBssReport_cmd(Adapter, 1);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
break;
|
||||
#endif /* CONFIG_WOWLAN */
|
||||
|
||||
case HW_VAR_TX_RPT_MAX_MACID:
|
||||
{
|
||||
u8 maxMacid = *val;
|
||||
|
|
@ -2542,21 +2151,6 @@ static u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eV
|
|||
return bResult;
|
||||
}
|
||||
|
||||
static void _update_response_rate(struct adapter *adapt, unsigned int mask)
|
||||
{
|
||||
u8 RateIndex = 0;
|
||||
/* Set RRSR rate table. */
|
||||
rtw_write8(adapt, REG_RRSR, mask&0xff);
|
||||
rtw_write8(adapt, REG_RRSR+1, (mask>>8)&0xff);
|
||||
|
||||
/* Set RTS initial rate */
|
||||
while (mask > 0x1) {
|
||||
mask = (mask >> 1);
|
||||
RateIndex++;
|
||||
}
|
||||
rtw_write8(adapt, REG_INIRTS_RATE_SEL, RateIndex);
|
||||
}
|
||||
|
||||
static void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
|
||||
{
|
||||
u8 init_rate = 0;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue