mirror of
https://github.com/lwfinger/rtl8188eu.git
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rtl8199eu: Remove all PLATFORM_LINUX ifdefs
This option is always chosen. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
parent
bb27b28f6e
commit
1c5cb9ca00
33 changed files with 12 additions and 910 deletions
467
include/odm.h
467
include/odm.h
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@ -85,15 +85,9 @@
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#define Smooth_TH_3 4
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#define Smooth_Step_Size 5
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#define Adaptive_SIR 1
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#if (RTL8723_FPGA_VERIFICATION == 1)
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#define PSD_RESCAN 1
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#else
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#define PSD_RESCAN 4
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#endif
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#define PSD_SCAN_INTERVAL 700 //ms
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//8723A High Power IGI Setting
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#define DM_DIG_HIGH_PWR_IGI_LOWER_BOUND 0x22
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#define DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND 0x28
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@ -119,31 +113,10 @@
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// 2011/09/20 MH Add for AP/ADSLpseudo DM structuer requirement.
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// We need to remove to other position???
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//
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#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
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typedef struct rtl8192cd_priv {
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u1Byte temp;
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}rtl8192cd_priv, *prtl8192cd_priv;
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#endif
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#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
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typedef struct _ADAPTER{
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u1Byte temp;
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#ifdef AP_BUILD_WORKAROUND
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HAL_DATA_TYPE* temp2;
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prtl8192cd_priv priv;
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#endif
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}ADAPTER, *PADAPTER;
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#endif
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#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
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typedef struct _WLAN_STA{
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u1Byte temp;
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} WLAN_STA, *PRT_WLAN_STA;
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#endif
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typedef struct _Dynamic_Initial_Gain_Threshold_
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{
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@ -242,31 +215,11 @@ typedef struct _RX_High_Power_
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bool RXHP_enable;
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u1Byte TP_Mode;
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RT_TIMER PSDTimer;
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#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
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#if USE_WORKITEM
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RT_WORK_ITEM PSDTimeWorkitem;
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#endif
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#endif
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}RXHP_T, *pRXHP_T;
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#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
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#define ASSOCIATE_ENTRY_NUM 32 // Max size of AsocEntry[].
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#define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM
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#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
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#define ASSOCIATE_ENTRY_NUM NUM_STAT
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#define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM+1
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#else
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//
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// 2012/01/12 MH Revise for compatiable with other SW team.
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// 0 is for STA 1-n is for AP clients.
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//
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#define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM+1// Default port only one
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#endif
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//#ifdef CONFIG_ANTENNA_DIVERSITY
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// This indicates two different the steps.
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// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air.
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// In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK
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@ -310,27 +263,6 @@ typedef struct _SW_Antenna_Switch_
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u8Byte RXByteCnt_B;
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u1Byte TrafficLoad;
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RT_TIMER SwAntennaSwitchTimer;
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#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
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#if USE_WORKITEM
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RT_WORK_ITEM SwAntennaSwitchWorkitem;
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#endif
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#endif
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/* CE Platform use
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#ifdef CONFIG_SW_ANTENNA_DIVERSITY
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_timer SwAntennaSwitchTimer;
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u8Byte lastTxOkCnt;
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u8Byte lastRxOkCnt;
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u8Byte TXByteCnt_A;
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u8Byte TXByteCnt_B;
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u8Byte RXByteCnt_A;
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u8Byte RXByteCnt_B;
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u1Byte DoubleComfirm;
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u1Byte TrafficLoad;
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//SW Antenna Switch
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#endif
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*/
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#ifdef CONFIG_HW_ANTENNA_DIVERSITY
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//Hybrid Antenna Diversity
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u4Byte CCK_Ant1_Cnt[ASSOCIATE_ENTRY_NUM];
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@ -347,16 +279,12 @@ typedef struct _SW_Antenna_Switch_
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#endif
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}SWAT_T, *pSWAT_T;
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//#endif
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typedef struct _EDCA_TURBO_
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{
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bool bCurrentTurboEDCA;
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bool bIsCurRDLState;
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#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
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u4Byte prv_traffic_idx; // edca turbo
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#endif
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}EDCA_T,*pEDCA_T;
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typedef struct _ODM_RATE_ADAPTIVE
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@ -369,42 +297,6 @@ typedef struct _ODM_RATE_ADAPTIVE
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} ODM_RATE_ADAPTIVE, *PODM_RATE_ADAPTIVE;
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#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
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#ifdef ADSL_AP_BUILD_WORKAROUND
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#define MAX_TOLERANCE 5
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#define IQK_DELAY_TIME 1 //ms
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#endif
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//
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// Indicate different AP vendor for IOT issue.
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//
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typedef enum _HT_IOT_PEER
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{
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HT_IOT_PEER_UNKNOWN = 0,
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HT_IOT_PEER_REALTEK = 1,
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HT_IOT_PEER_REALTEK_92SE = 2,
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HT_IOT_PEER_BROADCOM = 3,
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HT_IOT_PEER_RALINK = 4,
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HT_IOT_PEER_ATHEROS = 5,
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HT_IOT_PEER_CISCO = 6,
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HT_IOT_PEER_MERU = 7,
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HT_IOT_PEER_MARVELL = 8,
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HT_IOT_PEER_REALTEK_SOFTAP = 9,// peer is RealTek SOFT_AP, by Bohn, 2009.12.17
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HT_IOT_PEER_SELF_SOFTAP = 10, // Self is SoftAP
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HT_IOT_PEER_AIRGO = 11,
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HT_IOT_PEER_INTEL = 12,
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HT_IOT_PEER_RTK_APCLIENT = 13,
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HT_IOT_PEER_REALTEK_81XX = 14,
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HT_IOT_PEER_REALTEK_WOW = 15,
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HT_IOT_PEER_MAX = 16
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}HT_IOT_PEER_E, *PHTIOT_PEER_E;
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#endif//#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
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#define IQK_MAC_REG_NUM 4
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#define IQK_ADDA_REG_NUM 16
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#define IQK_BB_REG_NUM_MAX 10
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@ -435,13 +327,11 @@ typedef struct _ODM_Phy_Status_Info_
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u1Byte SignalQuality; // in 0-100 index.
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u1Byte RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; //EVM
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u1Byte RxMIMOSignalStrength[MAX_PATH_NUM_92CS];// in 0~100 index
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#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
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s1Byte RxPower; // in dBm Translate from PWdB
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s1Byte RecvSignalPower;// Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures.
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u1Byte BTRxRSSIPercentage;
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u1Byte SignalStrength; // in 0-100 index.
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u1Byte RxPwr[MAX_PATH_NUM_92CS];//per-path's pwdb
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#endif
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u1Byte RxSNR[MAX_PATH_NUM_92CS];//per-path's SNR
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}ODM_PHY_INFO_T,*PODM_PHY_INFO_T;
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@ -495,7 +385,6 @@ typedef enum tag_Dynamic_ODM_Support_Ability_Type
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// 2011/20/20 MH For MP driver RT_WLAN_STA = STA_INFO_T
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// Please declare below ODM relative info in your STA info structure.
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//
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#if 1
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typedef struct _ODM_STA_INFO{
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// Driver Write
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bool bUsed; // record the sta status link or not?
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@ -516,7 +405,6 @@ typedef struct _ODM_STA_INFO{
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// ODM Write Wilson will handle this part(said by Luke.Lee)
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}ODM_STA_INFO_T, *PODM_STA_INFO_T;
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#endif
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//
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// 2011/10/20 MH Define Common info enum for all team.
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@ -857,7 +745,6 @@ typedef struct _ODM_RA_Info_
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u2Byte RptTime;
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u1Byte RAWaitingCounter;
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u1Byte RAPendingCounter;
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#if 1 //POWER_TRAINING_ACTIVE == 1 // For compile pass only~!
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u1Byte PTActive; // on or off
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u1Byte PTTryState; // 0 trying state, 1 for decision state
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u1Byte PTStage; // 0~6
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@ -867,7 +754,6 @@ typedef struct _ODM_RA_Info_
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u1Byte PTModeSS; // decide whitch rate should do PT
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u1Byte RAstage; // StageRA, decide how many times RA will be done between PT
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u1Byte PTSmoothFactor;
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#endif
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} ODM_RA_INFO_T,*PODM_RA_INFO_T;
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typedef struct _IQK_MATRIX_REGS_SETTING{
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@ -875,31 +761,6 @@ typedef struct _IQK_MATRIX_REGS_SETTING{
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s4Byte Value[1][IQK_Matrix_REG_NUM];
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}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING;
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#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
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typedef struct _PathDiv_Parameter_define_
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{
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u4Byte org_5g_RegE30;
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u4Byte org_5g_RegC14;
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u4Byte org_5g_RegCA0;
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u4Byte swt_5g_RegE30;
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u4Byte swt_5g_RegC14;
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u4Byte swt_5g_RegCA0;
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//for 2G IQK information
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u4Byte org_2g_RegC80;
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u4Byte org_2g_RegC4C;
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u4Byte org_2g_RegC94;
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u4Byte org_2g_RegC14;
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u4Byte org_2g_RegCA0;
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u4Byte swt_2g_RegC80;
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u4Byte swt_2g_RegC4C;
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u4Byte swt_2g_RegC94;
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u4Byte swt_2g_RegC14;
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u4Byte swt_2g_RegCA0;
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}PATHDIV_PARA,*pPATHDIV_PARA;
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#endif
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typedef struct ODM_RF_Calibration_Structure
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{
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//for tx power tracking
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@ -1033,14 +894,7 @@ typedef enum _ANT_DIV_TYPE
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//
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// 2011/09/22 MH Copy from SD4 defined structure. We use to support PHY DM integration.
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//
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#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
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#if (RT_PLATFORM != PLATFORM_LINUX)
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typedef
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#endif
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struct DM_Out_Source_Dynamic_Mechanism_Structure
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#else// for AP,ADSL,CE Team
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typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
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#endif
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{
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//RT_TIMER FastAntTrainingTimer;
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//
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@ -1051,14 +905,7 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
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// WHen you use Adapter or priv pointer, you must make sure the pointer is ready.
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bool odm_ready;
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#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
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rtl8192cd_priv fake_priv;
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#endif
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#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
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// ADSL_AP_BUILD_WORKAROUND
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ADAPTER fake_adapter;
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#endif
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u8Byte DebugComponents;
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u4Byte DebugLevel;
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@ -1068,18 +915,6 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
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u1Byte ControlChannel;
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//------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------//
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//--------REMOVED COMMON INFO----------//
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//u1Byte PseudoMacPhyMode;
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//bool *BTCoexist;
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//bool PseudoBtCoexist;
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//u1Byte OPMode;
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//bool bAPMode;
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//bool bClientMode;
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//bool bAdHocMode;
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//bool bSlaveOfDMSP;
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//--------REMOVED COMMON INFO----------//
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//1 COMMON INFORMATION
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//
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@ -1217,15 +1052,8 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
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RXHP_T DM_RXHP_Table;
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false_ALARM_STATISTICS FalseAlmCnt;
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false_ALARM_STATISTICS FlaseAlmCntBuddyAdapter;
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//#ifdef CONFIG_ANTENNA_DIVERSITY
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SWAT_T DM_SWAT_Table;
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bool RSSI_test;
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//#endif
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#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
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//Path Div Struct
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PATHDIV_PARA pathIQK;
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#endif
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EDCA_T DM_EDCA_Table;
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u4Byte WMMEDCA_BE;
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@ -1234,17 +1062,6 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
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// ==================================================
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//
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//common
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//u1Byte DM_Type;
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//u1Byte PSD_Report_RXHP[80]; // Add By Gary
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//u1Byte PSD_func_flag; // Add By Gary
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//for DIG
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//u1Byte bDMInitialGainEnable;
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//u1Byte binitialized; // for dm_initial_gain_Multi_STA use.
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//for Antenna diversity
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//u8 AntDivCfg;// 0:OFF , 1:ON, 2:by efuse
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//PSTA_INFO_T RSSI_target;
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bool *pbDriverStopped;
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bool *pbDriverIsGoingToPnpSetPowerSleep;
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bool *pinit_adpt_in_progress;
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@ -1285,42 +1102,15 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
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//2011.09.27 add for Path Diversity
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RT_TIMER CCKPathDiversityTimer;
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RT_TIMER FastAntTrainingTimer;
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// ODM relative workitem.
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#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
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#if USE_WORKITEM
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RT_WORK_ITEM PathDivSwitchWorkitem;
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RT_WORK_ITEM CCKPathDiversityWorkitem;
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RT_WORK_ITEM FastAntTrainingWorkitem;
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#endif
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#endif
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#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
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#if (RT_PLATFORM != PLATFORM_LINUX)
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} DM_ODM_T, *PDM_ODM_T; // DM_Dynamic_Mechanism_Structure
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#else
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};
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#endif
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#else// for AP,ADSL,CE Team
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} DM_ODM_T, *PDM_ODM_T; // DM_Dynamic_Mechanism_Structure
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#endif
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#if 1 //92c-series
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#define ODM_RF_PATH_MAX 2
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#else //jaguar - series
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#define ODM_RF_PATH_MAX 4
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#endif
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typedef enum _ODM_RF_RADIO_PATH {
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ODM_RF_PATH_A = 0, //Radio Path A
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ODM_RF_PATH_B = 1, //Radio Path B
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ODM_RF_PATH_C = 2, //Radio Path C
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ODM_RF_PATH_D = 3, //Radio Path D
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// ODM_RF_PATH_MAX, //Max RF number 90 support
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} ODM_RF_RADIO_PATH_E, *PODM_RF_RADIO_PATH_E;
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typedef enum _ODM_RF_CONTENT{
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@ -1339,7 +1129,6 @@ typedef enum _ODM_BB_Config_Type{
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} ODM_BB_Config_Type, *PODM_BB_Config_Type;
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// Status code
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#if (DM_ODM_SUPPORT_TYPE != ODM_MP)
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typedef enum _RT_STATUS{
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RT_STATUS_SUCCESS,
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RT_STATUS_FAILURE,
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@ -1350,7 +1139,6 @@ typedef enum _RT_STATUS{
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RT_STATUS_NOT_SUPPORT,
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RT_STATUS_OS_API_FAILED,
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}RT_STATUS,*PRT_STATUS;
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#endif // end of RT_STATUS definition
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#ifdef REMOVE_PACK
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#pragma pack()
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@ -1432,11 +1220,7 @@ typedef enum tag_DIG_Connect_Definition
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//vivi 92c&92d has different definition, 20110504
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//this is for 92c
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#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
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#define DM_DIG_FA_TH0 0x80//0x20
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#else
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#define DM_DIG_FA_TH0 0x200//0x20
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#endif
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#define DM_DIG_FA_TH1 0x300//0x100
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#define DM_DIG_FA_TH2 0x400//0x200
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//this is for 92d
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@ -1541,13 +1325,7 @@ extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8];
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//
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// check Sta pointer valid or not
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//
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#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
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#define IS_STA_VALID(pSta) (pSta && pSta->expire_to)
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#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
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#define IS_STA_VALID(pSta) (pSta && pSta->bUsed)
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#else
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#define IS_STA_VALID(pSta) (pSta)
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#endif
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// 20100514 Joseph: Add definition for antenna switching test after link.
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// This indicates two different the steps.
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// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air.
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@ -1586,81 +1364,9 @@ ODM_RAStateCheck(
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pu1Byte pRATRState
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);
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#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_AP|ODM_ADSL))
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//============================================================
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// function prototype
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//============================================================
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//#define DM_ChangeDynamicInitGainThresh ODM_ChangeDynamicInitGainThresh
|
||||
//void ODM_ChangeDynamicInitGainThresh( PADAPTER pAdapter,
|
||||
// INT32 DM_Type,
|
||||
// INT32 DM_Value);
|
||||
void
|
||||
ODM_ChangeDynamicInitGainThresh(
|
||||
PDM_ODM_T pDM_Odm,
|
||||
u4Byte DM_Type,
|
||||
u4Byte DM_Value
|
||||
);
|
||||
|
||||
bool
|
||||
ODM_CheckPowerStatus(
|
||||
PADAPTER Adapter
|
||||
);
|
||||
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE != ODM_ADSL)
|
||||
void
|
||||
ODM_RateAdaptiveStateApInit(
|
||||
PADAPTER Adapter ,
|
||||
PRT_WLAN_STA pEntry
|
||||
);
|
||||
#endif
|
||||
#define AP_InitRateAdaptiveState ODM_RateAdaptiveStateApInit
|
||||
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
#ifdef WIFI_WMM
|
||||
void
|
||||
ODM_IotEdcaSwitch(
|
||||
PDM_ODM_T pDM_Odm,
|
||||
unsigned char enable
|
||||
);
|
||||
#endif
|
||||
|
||||
bool
|
||||
ODM_ChooseIotMainSTA(
|
||||
PDM_ODM_T pDM_Odm,
|
||||
PSTA_INFO_T pstat
|
||||
);
|
||||
#endif
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE==ODM_AP)
|
||||
#ifdef HW_ANT_SWITCH
|
||||
u1Byte
|
||||
ODM_Diversity_AntennaSelect(
|
||||
PDM_ODM_T pDM_Odm,
|
||||
u1Byte *data
|
||||
);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define SwAntDivResetBeforeLink ODM_SwAntDivResetBeforeLink
|
||||
void ODM_SwAntDivResetBeforeLink( PDM_ODM_T pDM_Odm);
|
||||
|
||||
//#define SwAntDivCheckBeforeLink8192C ODM_SwAntDivCheckBeforeLink8192C
|
||||
#define SwAntDivCheckBeforeLink ODM_SwAntDivCheckBeforeLink8192C
|
||||
bool
|
||||
ODM_SwAntDivCheckBeforeLink8192C(
|
||||
PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#define dm_SWAW_RSSI_Check ODM_SwAntDivChkPerPktRssi
|
||||
void ODM_SwAntDivChkPerPktRssi(PDM_ODM_T pDM_Odm, u1Byte StationID, PODM_PHY_INFO_T pPhyInfo);
|
||||
|
||||
#if ((DM_ODM_SUPPORT_TYPE==ODM_MP)||(DM_ODM_SUPPORT_TYPE==ODM_CE))
|
||||
|
||||
u4Byte ConvertTo_dB(u4Byte Value);
|
||||
|
||||
u4Byte
|
||||
|
@ -1669,10 +1375,6 @@ GetPSDData(
|
|||
unsigned int point,
|
||||
u1Byte initial_gain_psd);
|
||||
|
||||
#endif
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
|
||||
void
|
||||
odm_DIGbyRSSI_LPS(
|
||||
PDM_ODM_T pDM_Odm
|
||||
|
@ -1683,42 +1385,6 @@ u4Byte ODM_Get_Rate_Bitmap(
|
|||
u4Byte macid,
|
||||
u4Byte ra_mask,
|
||||
u1Byte rssi_level);
|
||||
#endif
|
||||
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP))
|
||||
#define dm_PSDMonitorCallback odm_PSDMonitorCallback
|
||||
void odm_PSDMonitorCallback(PRT_TIMER pTimer);
|
||||
|
||||
void
|
||||
odm_PSDMonitorWorkItemCallback(
|
||||
void *pContext
|
||||
);
|
||||
|
||||
|
||||
void
|
||||
PatchDCTone(
|
||||
PDM_ODM_T pDM_Odm,
|
||||
pu4Byte PSD_report,
|
||||
u1Byte initial_gain_psd
|
||||
);
|
||||
void
|
||||
ODM_PSDMonitor(
|
||||
PDM_ODM_T pDM_Odm
|
||||
);
|
||||
void odm_PSD_Monitor(PDM_ODM_T pDM_Odm);
|
||||
void odm_PSDMonitorInit(PDM_ODM_T pDM_Odm);
|
||||
|
||||
void
|
||||
ODM_PSDDbgControl(
|
||||
PADAPTER Adapter,
|
||||
u4Byte mode,
|
||||
u4Byte btRssi
|
||||
);
|
||||
|
||||
#endif // DM_ODM_SUPPORT_TYPE
|
||||
|
||||
|
||||
|
||||
void ODM_DMInit( PDM_ODM_T pDM_Odm);
|
||||
|
||||
|
@ -1776,133 +1442,6 @@ ODM_ResetIQKResult(
|
|||
PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
|
||||
void ODM_InitAllWorkItems(PDM_ODM_T pDM_Odm );
|
||||
void ODM_FreeAllWorkItems(PDM_ODM_T pDM_Odm );
|
||||
|
||||
void odm_PathDivChkAntSwitch(PDM_ODM_T pDM_Odm);
|
||||
void ODM_PathDivRestAfterLink(
|
||||
PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
|
||||
//===========================================//
|
||||
// Neil Chen----2011--06--15--
|
||||
|
||||
//3 Path Diversity
|
||||
//===========================================================
|
||||
|
||||
#define TP_MODE 0
|
||||
#define RSSI_MODE 1
|
||||
#define TRAFFIC_LOW 0
|
||||
#define TRAFFIC_HIGH 1
|
||||
|
||||
//#define PATHDIV_ENABLE 1
|
||||
|
||||
//void odm_PathDivChkAntSwitch(PADAPTER Adapter,u1Byte Step);
|
||||
void ODM_PathDivRestAfterLink(
|
||||
PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
#define dm_PathDiv_RSSI_Check ODM_PathDivChkPerPktRssi
|
||||
void ODM_PathDivChkPerPktRssi(PADAPTER Adapter,
|
||||
bool bIsDefPort,
|
||||
bool bMatchBSSID,
|
||||
PRT_WLAN_STA pEntry,
|
||||
PRT_RFD pRfd );
|
||||
|
||||
u8Byte
|
||||
PlatformDivision64(
|
||||
u8Byte x,
|
||||
u8Byte y
|
||||
);
|
||||
|
||||
|
||||
// 20100514 Joseph: Add definition for antenna switching test after link.
|
||||
// This indicates two different the steps.
|
||||
// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air.
|
||||
// In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK
|
||||
// with original RSSI to determine if it is necessary to switch antenna.
|
||||
#define SWAW_STEP_PEAK 0
|
||||
#define SWAW_STEP_DETERMINE 1
|
||||
|
||||
//====================================================
|
||||
//3 PathDiV End
|
||||
//====================================================
|
||||
|
||||
#define PathDivCheckBeforeLink8192C ODM_PathDiversityBeforeLink92C
|
||||
bool
|
||||
ODM_PathDiversityBeforeLink92C(
|
||||
// PADAPTER Adapter
|
||||
PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
#define DM_ChangeDynamicInitGainThresh ODM_ChangeDynamicInitGainThresh
|
||||
//void ODM_ChangeDynamicInitGainThresh( PADAPTER pAdapter,
|
||||
// INT32 DM_Type,
|
||||
// INT32 DM_Value);
|
||||
//
|
||||
|
||||
|
||||
void
|
||||
ODM_CCKPathDiversityChkPerPktRssi(
|
||||
PADAPTER Adapter,
|
||||
bool bIsDefPort,
|
||||
bool bMatchBSSID,
|
||||
PRT_WLAN_STA pEntry,
|
||||
PRT_RFD pRfd,
|
||||
pu1Byte pDesc
|
||||
);
|
||||
|
||||
|
||||
typedef enum tag_DIG_Connect_Definition
|
||||
{
|
||||
DIG_STA_DISCONNECT = 0,
|
||||
DIG_STA_CONNECT = 1,
|
||||
DIG_STA_BEFORE_CONNECT = 2,
|
||||
DIG_MultiSTA_DISCONNECT = 3,
|
||||
DIG_MultiSTA_CONNECT = 4,
|
||||
DIG_CONNECT_MAX
|
||||
}DM_DIG_CONNECT_E;
|
||||
|
||||
|
||||
void
|
||||
ODM_FillTXPathInTXDESC(
|
||||
PADAPTER Adapter,
|
||||
PRT_TCB pTcb,
|
||||
pu1Byte pDesc
|
||||
);
|
||||
|
||||
|
||||
#define dm_SWAW_RSSI_Check ODM_SwAntDivChkPerPktRssi
|
||||
|
||||
//
|
||||
// 2012/01/12 MH Check afapter status. Temp fix BSOD.
|
||||
//
|
||||
#define HAL_ADAPTER_STS_CHK(pDM_Odm)\
|
||||
if (pDM_Odm->Adapter == NULL)\
|
||||
{\
|
||||
return;\
|
||||
}\
|
||||
|
||||
|
||||
//
|
||||
// For new definition in MP temporarily fro power tracking,
|
||||
//
|
||||
#define odm_TXPowerTrackingDirectCall(_Adapter) \
|
||||
IS_HARDWARE_TYPE_8192D(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_92D(_Adapter) : \
|
||||
IS_HARDWARE_TYPE_8192C(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_92C(_Adapter) : \
|
||||
IS_HARDWARE_TYPE_8723A(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_8723A(_Adapter) :\
|
||||
odm_TXPowerTrackingCallback_ThermalMeter_8188E(_Adapter)
|
||||
|
||||
void
|
||||
ODM_SetTxAntByTxInfo_88C_92D(
|
||||
PDM_ODM_T pDM_Odm,
|
||||
pu1Byte pDesc,
|
||||
u1Byte macId
|
||||
);
|
||||
#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP)
|
||||
void
|
||||
ODM_AntselStatistics_88C(
|
||||
PDM_ODM_T pDM_Odm,
|
||||
|
@ -1911,8 +1450,6 @@ ODM_AntselStatistics_88C(
|
|||
bool isCCKrate
|
||||
);
|
||||
|
||||
#if ( DM_ODM_SUPPORT_TYPE & (ODM_MP |ODM_CE))
|
||||
|
||||
void
|
||||
ODM_SingleDualAntennaDefaultSetting(
|
||||
PDM_ODM_T pDM_Odm
|
||||
|
@ -1924,10 +1461,6 @@ ODM_SingleDualAntennaDetection(
|
|||
u1Byte mode
|
||||
);
|
||||
|
||||
#endif // #if ((DM_ODM_SUPPORT_TYPE==ODM_MP)||(DM_ODM_SUPPORT_TYPE==ODM_CE))
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
void odm_dtc(PDM_ODM_T pDM_Odm);
|
||||
#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */
|
||||
|
||||
#endif
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue