mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2024-11-10 07:29:40 +00:00
rtl8188eu: Remove MP_DRIVER conditionals - selected
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
parent
caeea00c03
commit
1e96c9a1d4
8 changed files with 53 additions and 141 deletions
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@ -1136,13 +1136,9 @@ EFUSE_ShadowWrite(
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u16 Offset,
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u32 Value)
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{
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#if (MP_DRIVER == 0)
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return;
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#endif
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if ( pAdapter->registrypriv.mp_mode == 0)
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return;
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if (Type == 1)
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efuse_ShadowWrite1Byte(pAdapter, Offset, (u8)Value);
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else if (Type == 2)
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@ -1152,14 +1148,7 @@ EFUSE_ShadowWrite(
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} /* EFUSE_ShadowWrite */
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void
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Efuse_InitSomeVar(
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struct adapter * pAdapter
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);
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void
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Efuse_InitSomeVar(
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struct adapter * pAdapter
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)
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void Efuse_InitSomeVar(struct adapter *pAdapter)
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{
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u8 i;
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@ -34,10 +34,8 @@ void ips_enter(struct adapter * padapter)
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struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
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struct xmit_priv *pxmit_priv = &padapter->xmitpriv;
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#if (MP_DRIVER == 1)
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if (padapter->registrypriv.mp_mode == 1)
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return;
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#endif
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if (pxmit_priv->free_xmitbuf_cnt != NR_XMITBUFF ||
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pxmit_priv->free_xmit_extbuf_cnt != NR_XMIT_EXTBUFF) {
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@ -189,10 +189,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
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pDM_Odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; /* cosa add for debug */
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pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = true;
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#if (MP_DRIVER == 1)
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/* <Kordan> RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. */
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pDM_Odm->RFCalibrateInfo.RegA24 = 0x090e1317;
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#endif
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD,("===>dm_TXPowerTrackingCallback_ThermalMeter_8188E txpowercontrol %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl));
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@ -1223,11 +1221,7 @@ static void phy_IQCalibrate_8188E(
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rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD
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};
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#if MP_DRIVER
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u4Byte retryCount = 9;
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#else
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u4Byte retryCount = 2;
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#endif
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if ( *(pDM_Odm->mp_mode) == 1)
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retryCount = 9;
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else
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@ -1544,18 +1538,13 @@ static void phy_APCalibrate_8188E(
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};
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u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; /* val_1_1a, val_1_2a, val_2a, val_3a, val_4a */
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/* u4Byte AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; */
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s4Byte BB_offset, delta_V, delta_offset;
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#if MP_DRIVER == 1
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if ( *(pDM_Odm->mp_mode) == 1)
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{
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if ( *(pDM_Odm->mp_mode) == 1) {
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struct mpt_context * pMptCtx = &(pAdapter->mppriv.MptCtx);
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pMptCtx->APK_bound[0] = 45;
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pMptCtx->APK_bound[1] = 52;
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}
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#endif
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_APCalibrate_8188E() delta %d\n", delta));
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R")));
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@ -1568,10 +1557,8 @@ if ( *(pDM_Odm->mp_mode) == 1)
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/* and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal */
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/* will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the */
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/* root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. */
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/* if MP_DRIVER != 1 */
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if (*(pDM_Odm->mp_mode) != 1)
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return;
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/* endif */
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/* settings adjust for normal chip */
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for (index = 0; index < PATH_NUM; index ++)
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{
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@ -1884,13 +1871,8 @@ PHY_IQCalibrate_8188E(
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)
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{
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struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
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struct odm_dm_struct * pDM_Odm = &pHalData->odmpriv;
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#if (MP_DRIVER == 1)
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struct mpt_context * pMptCtx = &(pAdapter->mppriv.MptCtx);
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#endif/* MP_DRIVER == 1) */
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s4Byte result[4][8]; /* last is final result */
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u1Byte i, final_candidate, Indexforchannel;
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u1Byte channelToIQK = 7;
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@ -1913,13 +1895,10 @@ PHY_IQCalibrate_8188E(
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if (!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION))
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return;
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#if MP_DRIVER == 1
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if (*(pDM_Odm->mp_mode) == 1)
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{
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if (*(pDM_Odm->mp_mode) == 1) {
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bSingleTone = pMptCtx->bSingleTone;
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bCarrierSuppression = pMptCtx->bCarrierSuppression;
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}
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#endif
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/* 20120213<Kordan> Turn on when continuous Tx to pass lab testing. (required by Edlu) */
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if (bSingleTone || bCarrierSuppression)
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@ -2069,22 +2048,14 @@ PHY_LCCalibrate_8188E(
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{
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bool bSingleTone = false, bCarrierSuppression = false;
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u4Byte timeout = 2000, timecount = 0;
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struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
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struct odm_dm_struct * pDM_Odm = &pHalData->odmpriv;
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#if (MP_DRIVER == 1)
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struct mpt_context *pMptCtx = &(pAdapter->mppriv.MptCtx);
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#endif/* MP_DRIVER == 1) */
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#if MP_DRIVER == 1
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if (*(pDM_Odm->mp_mode) == 1)
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{
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if (*(pDM_Odm->mp_mode) == 1) {
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bSingleTone = pMptCtx->bSingleTone;
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bCarrierSuppression = pMptCtx->bCarrierSuppression;
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}
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#endif
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if (!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION))
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{
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return;
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@ -51,7 +51,7 @@ odm_RX_HWAntDivInit(
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{
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u4Byte value32;
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struct adapter *Adapter = pDM_Odm->Adapter;
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#if (MP_DRIVER == 1)
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if (*(pDM_Odm->mp_mode) == 1)
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{
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pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV;
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@ -59,7 +59,6 @@ odm_RX_HWAntDivInit(
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ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); /* 1:CG, 0:CS */
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return;
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}
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#endif
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_RX_HWAntDivInit()\n"));
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/* MAC Setting */
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@ -87,7 +86,6 @@ odm_TRX_HWAntDivInit(
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u4Byte value32;
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struct adapter * Adapter = pDM_Odm->Adapter;
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#if (MP_DRIVER == 1)
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if (*(pDM_Odm->mp_mode) == 1)
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{
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pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV;
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@ -95,9 +93,6 @@ odm_TRX_HWAntDivInit(
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ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, 0); /* Default RX (0/1) */
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return;
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}
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#endif
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_TRX_HWAntDivInit()\n"));
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/* MAC Setting */
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@ -138,16 +133,13 @@ odm_FastAntTrainingInit(
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struct adapter * Adapter = pDM_Odm->Adapter;
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_FastAntTrainingInit()\n"));
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#if (MP_DRIVER == 1)
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if (*(pDM_Odm->mp_mode) == 1)
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{
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("pDM_Odm->AntDivType: %d\n", pDM_Odm->AntDivType));
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return;
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}
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#endif
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for (i=0; i<6; i++)
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{
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for (i=0; i<6; i++) {
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pDM_FatTable->Bssid[i] = 0;
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pDM_FatTable->antSumRSSI[i] = 0;
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pDM_FatTable->antRSSIcnt[i] = 0;
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@ -204,13 +204,10 @@ static void Update_ODM_ComInfo_88E(struct adapter * Adapter)
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if (pHalData->AntDivCfg)
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pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV;
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#if (MP_DRIVER==1)
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if (Adapter->registrypriv.mp_mode == 1)
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{
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if (Adapter->registrypriv.mp_mode == 1) {
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pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
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ODM_RF_TX_PWR_TRACK;
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}
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#endif/* MP_DRIVER==1) */
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ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag);
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@ -209,7 +209,6 @@ static void _InitBTCoexist(struct adapter *padapter)
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if (pbtpriv->BT_Coexist && pbtpriv->BT_CoexistType == BT_CSR_BC4)
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{
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/* if MP_DRIVER != 1 */
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if (padapter->registrypriv.mp_mode == 0)
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{
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if (pbtpriv->BT_Ant_isolation)
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@ -218,7 +217,6 @@ static void _InitBTCoexist(struct adapter *padapter)
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DBG_88E("BT write 0x%x = 0x%x\n", REG_GPIO_MUXCFG, 0xa0);
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}
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}
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/* endif */
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u1Tmp = rtw_read8(padapter, 0x4fd) & BIT0;
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u1Tmp = u1Tmp |
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@ -252,13 +250,7 @@ static void _InitBTCoexist(struct adapter *padapter)
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}
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#endif
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/* */
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/* */
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/* MAC init functions */
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/* */
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/* */
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static void
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_SetMacID(
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struct adapter * Adapter, u8* MacID
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@ -611,10 +603,6 @@ _InitWMACSetting(
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pHalData->ReceiveConfig =
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RCR_AAP | RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS;
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#if (1 == RTL8188E_RX_PACKET_INCLUDE_CRC)
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pHalData->ReceiveConfig |= ACRC32;
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#endif
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/* some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */
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rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig);
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@ -1193,7 +1181,6 @@ _func_enter_;
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_InitTxBufferBoundary(Adapter, 0);
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HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
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#if (MP_DRIVER == 1)
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if (Adapter->registrypriv.mp_mode == 1)
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{
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_InitRxSetting(Adapter);
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@ -1201,7 +1188,6 @@ _func_enter_;
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pHalData->fw_ractrl = false;
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}
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else
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#endif /* MP_DRIVER == 1 */
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{
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#ifdef CONFIG_WOWLAN
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status = rtl8188e_FirmwareDownload(Adapter, false);
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@ -1355,14 +1341,12 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
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HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
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rtl8188e_InitHalDm(Adapter);
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#if (MP_DRIVER == 1)
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if (Adapter->registrypriv.mp_mode == 1)
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{
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Adapter->mppriv.channel = pHalData->CurrentChannel;
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MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel);
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}
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else
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#endif /* if (MP_DRIVER == 1) */
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{
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/* */
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/* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */
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@ -22,12 +22,9 @@
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/*
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* Public General Config
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*/
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#define AUTOCONF_INCLUDED
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#define RTL871X_MODULE_NAME "88EU"
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#define DRV_NAME "rtl8188eu"
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#define CONFIG_RTL8188E
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/*
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* Internal General Config
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*/
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@ -42,20 +39,6 @@
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#define CONFIG_BR_EXT_BRNAME "br0"
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/*
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* Interface Related Config
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*/
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#define CONFIG_VENDOR_REQ_RETRY
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/*
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* HAL Related Config
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*/
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#define RTL8188E_RX_PACKET_INCLUDE_CRC 0
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#define MP_DRIVER 1
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/*
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* Outsource Related Config
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*/
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@ -43,10 +43,8 @@ static void _dynamic_check_timer_handlder (void *FunctionContext)
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{
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struct adapter *adapter = (struct adapter *)FunctionContext;
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#if (MP_DRIVER == 1)
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if (adapter->registrypriv.mp_mode == 1)
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return;
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#endif
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rtw_dynamic_check_timer_handlder(adapter);
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_set_timer(&adapter->mlmepriv.dynamic_chk_timer, 2000);
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