mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2024-11-22 12:33:40 +00:00
rtl8188eu: Remove all configuration variables that use RTL8188E*
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
efaf0dce64
commit
1eb356210f
7 changed files with 2 additions and 123 deletions
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@ -24,18 +24,7 @@
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#include "odm_precomp.h"
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#if (RTL8188E_FOR_TEST_CHIP > 1)
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#define READ_AND_CONFIG(ic, txt) do {\
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if (pDM_Odm->bIsMPChip)\
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READ_AND_CONFIG_MP(ic,txt);\
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else\
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READ_AND_CONFIG_TC(ic,txt);\
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} while(0)
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#elif (RTL8188E_FOR_TEST_CHIP == 1)
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#define READ_AND_CONFIG READ_AND_CONFIG_TC
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#else
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#define READ_AND_CONFIG READ_AND_CONFIG_MP
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#endif
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#define READ_AND_CONFIG READ_AND_CONFIG_MP
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#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(pDM_Odm))
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#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(pDM_Odm))
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@ -58,12 +58,6 @@
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#include "HalHWImg8188E_BB.h"
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#include "Hal8188EReg.h"
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#if (RTL8188E_FOR_TEST_CHIP >= 1)
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#include "HalHWImg8188E_TestChip_MAC.h"
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#include "HalHWImg8188E_TestChip_RF.h"
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#include "HalHWImg8188E_TestChip_BB.h"
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#endif
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#ifdef CONFIG_WOWLAN
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#include "HalHWImg8188E_FW.h"
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#endif /* CONFIG_WOWLAN */
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@ -110,12 +110,7 @@ void _dbg_dump_tx_info(struct adapter *padapter,int frame_tag,struct tx_desc *pt
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/* define DBG_EMINFO */
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#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
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#define EARLY_MODE_MAX_PKT_NUM 10
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#else
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#define EARLY_MODE_MAX_PKT_NUM 5
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#endif
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#define EARLY_MODE_MAX_PKT_NUM 5
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struct EMInfo{
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u8 EMPktNum;
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@ -128,12 +123,6 @@ InsertEMContent_8188E(
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struct EMInfo *pEMInfo,
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IN u8 * VirtualAddress)
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{
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#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
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u8 index=0;
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u32 dwtmp=0;
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#endif
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memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE);
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if(pEMInfo->EMPktNum==0)
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return;
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@ -149,51 +138,6 @@ InsertEMContent_8188E(
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}
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#endif
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#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
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SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
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if(pEMInfo->EMPktNum == 1){
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dwtmp = pEMInfo->EMPktLen[0];
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}else{
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dwtmp = pEMInfo->EMPktLen[0];
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dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
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dwtmp += pEMInfo->EMPktLen[1];
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}
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SET_EARLYMODE_LEN0(VirtualAddress, dwtmp);
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if(pEMInfo->EMPktNum <= 3){
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dwtmp = pEMInfo->EMPktLen[2];
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}else{
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dwtmp = pEMInfo->EMPktLen[2];
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dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
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dwtmp += pEMInfo->EMPktLen[3];
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}
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SET_EARLYMODE_LEN1(VirtualAddress, dwtmp);
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if(pEMInfo->EMPktNum <= 5){
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dwtmp = pEMInfo->EMPktLen[4];
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}else{
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dwtmp = pEMInfo->EMPktLen[4];
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dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
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dwtmp += pEMInfo->EMPktLen[5];
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}
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SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp&0xF);
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SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp>>4);
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if(pEMInfo->EMPktNum <= 7){
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dwtmp = pEMInfo->EMPktLen[6];
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}else{
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dwtmp = pEMInfo->EMPktLen[6];
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dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
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dwtmp += pEMInfo->EMPktLen[7];
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}
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SET_EARLYMODE_LEN3(VirtualAddress, dwtmp);
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if(pEMInfo->EMPktNum <= 9){
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dwtmp = pEMInfo->EMPktLen[8];
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}else{
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dwtmp = pEMInfo->EMPktLen[8];
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dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
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dwtmp += pEMInfo->EMPktLen[9];
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}
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SET_EARLYMODE_LEN4(VirtualAddress, dwtmp);
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#else
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SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
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SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]);
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SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]);
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@ -201,13 +145,8 @@ InsertEMContent_8188E(
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SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2]>>4);
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SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]);
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SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]);
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#endif
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/* RT_PRINT_DATA(COMP_SEND, DBG_LOUD, "EMHdr:", VirtualAddress, 8); */
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}
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void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf )
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{
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/* struct adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq */
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@ -662,10 +662,6 @@ _InitWMACSetting(
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/* don't turn on AAP, it will allow all packets to driver */
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pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS;
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#if (1 == RTL8188E_RX_PACKET_INCLUDE_CRC)
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pHalData->ReceiveConfig |= ACRC32;
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#endif
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/* some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */
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rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig);
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@ -1539,11 +1535,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
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RT_TRACE(_module_hci_hal_init_c_, _drv_info_,("EarlyMode Enabled!!!\n"));
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value8 = rtw_read8(Adapter, REG_EARLY_MODE_CONTROL);
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#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
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value8 = value8|0x1f;
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#else
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value8 = value8|0xf;
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#endif
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rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, value8);
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rtw_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x80);
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@ -355,7 +355,6 @@ storePwrIndexDiffRateOffset(
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#if(SIC_HW_SUPPORT == 1)
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#define SIC_CMD_READY 0
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#define SIC_CMD_PREWRITE 0x1
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#if(RTL8188E_SUPPORT == 1)
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#define SIC_CMD_WRITE 0x40
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#define SIC_CMD_PREREAD 0x2
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#define SIC_CMD_READ 0x80
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@ -367,36 +366,17 @@ storePwrIndexDiffRateOffset(
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#define SIC_ADDR_REG 0x1E8 // 1b4~1b5, 2 bytes
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#define SIC_DATA_REG 0x1EC // 1b0~1b3
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#else
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#define SIC_CMD_WRITE 0x11
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#define SIC_CMD_PREREAD 0x2
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#define SIC_CMD_READ 0x12
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#define SIC_CMD_INIT 0x1f
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#define SIC_INIT_VAL 0xff
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#define SIC_INIT_REG 0x1b7
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#define SIC_CMD_REG 0x1b6 // 1byte
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#define SIC_ADDR_REG 0x1b4 // 1b4~1b5, 2 bytes
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#define SIC_DATA_REG 0x1b0 // 1b0~1b3
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#endif
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#else
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#define SIC_CMD_READY 0
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#define SIC_CMD_WRITE 1
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#define SIC_CMD_READ 2
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#if(RTL8188E_SUPPORT == 1)
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#define SIC_CMD_REG 0x1EB // 1byte
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#define SIC_ADDR_REG 0x1E8 // 1b9~1ba, 2 bytes
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#define SIC_DATA_REG 0x1EC // 1bc~1bf
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#else
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#define SIC_CMD_REG 0x1b8 // 1byte
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#define SIC_ADDR_REG 0x1b9 // 1b9~1ba, 2 bytes
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#define SIC_DATA_REG 0x1bc // 1bc~1bf
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#endif
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#endif
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#if(SIC_ENABLE == 1)
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void SIC_Init(IN struct adapter *Adapter);
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#endif
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#endif // __INC_HAL8192CPHYCFG_H
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@ -80,8 +80,6 @@
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* HAL Related Config
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*/
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#define RTL8188E_RX_PACKET_INCLUDE_CRC 0
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#define CONFIG_OUT_EP_WIFI_MODE 0
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#define ENABLE_USB_DROP_INCORRECT_OUT
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@ -95,18 +93,9 @@
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* Outsource Related Config
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*/
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#define RTL8188EE_SUPPORT 0
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#define RTL8188EU_SUPPORT 1
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#define RTL8188ES_SUPPORT 0
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#define RTL8188E_SUPPORT (RTL8188EE_SUPPORT|RTL8188EU_SUPPORT|RTL8188ES_SUPPORT)
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#define RTL8188E_FOR_TEST_CHIP 0
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#define RATE_ADAPTIVE_SUPPORT 1
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#define POWER_TRAINING_ACTIVE 1
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#ifdef CONFIG_TX_EARLY_MODE
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#define RTL8188E_EARLY_MODE_PKT_NUM_10 0
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#endif
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#define CONFIG_80211D
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#define CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR
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@ -1602,11 +1602,7 @@ Current IOREG MAP
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#define EEPROM_Default_AntTxPowerDiff 0x0
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#define EEPROM_Default_TxPwDiff_CrystalCap 0x5
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#if (RTL8188ES_SUPPORT==1) //for SDIO
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#define EEPROM_Default_TxPowerLevel 0x25
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#else //for USB/PCIE
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#define EEPROM_Default_TxPowerLevel 0x2A
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#endif
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#define EEPROM_Default_HT40_2SDiff 0x0
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#define EEPROM_Default_HT20_Diff 2 // HT20<->40 default Tx Power Index Difference
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