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rtl8188eu: Remove all configuration variables that use RTL8188E*
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
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parent
efaf0dce64
commit
1eb356210f
7 changed files with 2 additions and 123 deletions
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@ -355,7 +355,6 @@ storePwrIndexDiffRateOffset(
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#if(SIC_HW_SUPPORT == 1)
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#define SIC_CMD_READY 0
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#define SIC_CMD_PREWRITE 0x1
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#if(RTL8188E_SUPPORT == 1)
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#define SIC_CMD_WRITE 0x40
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#define SIC_CMD_PREREAD 0x2
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#define SIC_CMD_READ 0x80
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@ -367,36 +366,17 @@ storePwrIndexDiffRateOffset(
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#define SIC_ADDR_REG 0x1E8 // 1b4~1b5, 2 bytes
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#define SIC_DATA_REG 0x1EC // 1b0~1b3
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#else
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#define SIC_CMD_WRITE 0x11
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#define SIC_CMD_PREREAD 0x2
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#define SIC_CMD_READ 0x12
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#define SIC_CMD_INIT 0x1f
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#define SIC_INIT_VAL 0xff
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#define SIC_INIT_REG 0x1b7
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#define SIC_CMD_REG 0x1b6 // 1byte
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#define SIC_ADDR_REG 0x1b4 // 1b4~1b5, 2 bytes
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#define SIC_DATA_REG 0x1b0 // 1b0~1b3
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#endif
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#else
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#define SIC_CMD_READY 0
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#define SIC_CMD_WRITE 1
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#define SIC_CMD_READ 2
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#if(RTL8188E_SUPPORT == 1)
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#define SIC_CMD_REG 0x1EB // 1byte
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#define SIC_ADDR_REG 0x1E8 // 1b9~1ba, 2 bytes
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#define SIC_DATA_REG 0x1EC // 1bc~1bf
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#else
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#define SIC_CMD_REG 0x1b8 // 1byte
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#define SIC_ADDR_REG 0x1b9 // 1b9~1ba, 2 bytes
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#define SIC_DATA_REG 0x1bc // 1bc~1bf
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#endif
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#endif
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#if(SIC_ENABLE == 1)
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void SIC_Init(IN struct adapter *Adapter);
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#endif
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#endif // __INC_HAL8192CPHYCFG_H
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@ -80,8 +80,6 @@
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* HAL Related Config
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*/
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#define RTL8188E_RX_PACKET_INCLUDE_CRC 0
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#define CONFIG_OUT_EP_WIFI_MODE 0
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#define ENABLE_USB_DROP_INCORRECT_OUT
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@ -95,18 +93,9 @@
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* Outsource Related Config
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*/
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#define RTL8188EE_SUPPORT 0
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#define RTL8188EU_SUPPORT 1
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#define RTL8188ES_SUPPORT 0
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#define RTL8188E_SUPPORT (RTL8188EE_SUPPORT|RTL8188EU_SUPPORT|RTL8188ES_SUPPORT)
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#define RTL8188E_FOR_TEST_CHIP 0
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#define RATE_ADAPTIVE_SUPPORT 1
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#define POWER_TRAINING_ACTIVE 1
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#ifdef CONFIG_TX_EARLY_MODE
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#define RTL8188E_EARLY_MODE_PKT_NUM_10 0
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#endif
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#define CONFIG_80211D
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#define CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR
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@ -1602,11 +1602,7 @@ Current IOREG MAP
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#define EEPROM_Default_AntTxPowerDiff 0x0
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#define EEPROM_Default_TxPwDiff_CrystalCap 0x5
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#if (RTL8188ES_SUPPORT==1) //for SDIO
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#define EEPROM_Default_TxPowerLevel 0x25
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#else //for USB/PCIE
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#define EEPROM_Default_TxPowerLevel 0x2A
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#endif
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#define EEPROM_Default_HT40_2SDiff 0x0
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#define EEPROM_Default_HT20_Diff 2 // HT20<->40 default Tx Power Index Difference
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