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rtl8188eu: Remove all configuration variables that use RTL8188E*

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Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2015-02-28 12:34:59 -06:00
parent efaf0dce64
commit 1eb356210f
7 changed files with 2 additions and 123 deletions
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11
hal/odm_HWConfig.c
View file

@ -24,18 +24,7 @@
#include "odm_precomp.h" #include "odm_precomp.h"
#if (RTL8188E_FOR_TEST_CHIP > 1)
#define READ_AND_CONFIG(ic, txt) do {\
if (pDM_Odm->bIsMPChip)\
READ_AND_CONFIG_MP(ic,txt);\
else\
READ_AND_CONFIG_TC(ic,txt);\
} while(0)
#elif (RTL8188E_FOR_TEST_CHIP == 1)
#define READ_AND_CONFIG READ_AND_CONFIG_TC
#else
#define READ_AND_CONFIG READ_AND_CONFIG_MP #define READ_AND_CONFIG READ_AND_CONFIG_MP
#endif
#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(pDM_Odm)) #define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(pDM_Odm))
#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(pDM_Odm)) #define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(pDM_Odm))

6
hal/odm_precomp.h
View file

@ -58,12 +58,6 @@
#include "HalHWImg8188E_BB.h" #include "HalHWImg8188E_BB.h"
#include "Hal8188EReg.h" #include "Hal8188EReg.h"
#if (RTL8188E_FOR_TEST_CHIP >= 1)
#include "HalHWImg8188E_TestChip_MAC.h"
#include "HalHWImg8188E_TestChip_RF.h"
#include "HalHWImg8188E_TestChip_BB.h"
#endif
#ifdef CONFIG_WOWLAN #ifdef CONFIG_WOWLAN
#include "HalHWImg8188E_FW.h" #include "HalHWImg8188E_FW.h"
#endif /* CONFIG_WOWLAN */ #endif /* CONFIG_WOWLAN */

61
hal/rtl8188e_xmit.c
View file

@ -110,12 +110,7 @@ void _dbg_dump_tx_info(struct adapter *padapter,int frame_tag,struct tx_desc *pt
/* define DBG_EMINFO */ /* define DBG_EMINFO */
#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
#define EARLY_MODE_MAX_PKT_NUM 10
#else
#define EARLY_MODE_MAX_PKT_NUM 5 #define EARLY_MODE_MAX_PKT_NUM 5
#endif
struct EMInfo{ struct EMInfo{
u8 EMPktNum; u8 EMPktNum;
@ -128,12 +123,6 @@ InsertEMContent_8188E(
struct EMInfo *pEMInfo, struct EMInfo *pEMInfo,
IN u8 * VirtualAddress) IN u8 * VirtualAddress)
{ {
#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
u8 index=0;
u32 dwtmp=0;
#endif
memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE); memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE);
if(pEMInfo->EMPktNum==0) if(pEMInfo->EMPktNum==0)
return; return;
@ -149,51 +138,6 @@ InsertEMContent_8188E(
} }
#endif #endif
#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
if(pEMInfo->EMPktNum == 1){
dwtmp = pEMInfo->EMPktLen[0];
}else{
dwtmp = pEMInfo->EMPktLen[0];
dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
dwtmp += pEMInfo->EMPktLen[1];
}
SET_EARLYMODE_LEN0(VirtualAddress, dwtmp);
if(pEMInfo->EMPktNum <= 3){
dwtmp = pEMInfo->EMPktLen[2];
}else{
dwtmp = pEMInfo->EMPktLen[2];
dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
dwtmp += pEMInfo->EMPktLen[3];
}
SET_EARLYMODE_LEN1(VirtualAddress, dwtmp);
if(pEMInfo->EMPktNum <= 5){
dwtmp = pEMInfo->EMPktLen[4];
}else{
dwtmp = pEMInfo->EMPktLen[4];
dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
dwtmp += pEMInfo->EMPktLen[5];
}
SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp&0xF);
SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp>>4);
if(pEMInfo->EMPktNum <= 7){
dwtmp = pEMInfo->EMPktLen[6];
}else{
dwtmp = pEMInfo->EMPktLen[6];
dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
dwtmp += pEMInfo->EMPktLen[7];
}
SET_EARLYMODE_LEN3(VirtualAddress, dwtmp);
if(pEMInfo->EMPktNum <= 9){
dwtmp = pEMInfo->EMPktLen[8];
}else{
dwtmp = pEMInfo->EMPktLen[8];
dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4;
dwtmp += pEMInfo->EMPktLen[9];
}
SET_EARLYMODE_LEN4(VirtualAddress, dwtmp);
#else
SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]); SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]);
SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]); SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]);
@ -201,13 +145,8 @@ InsertEMContent_8188E(
SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2]>>4); SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2]>>4);
SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]); SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]);
SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]); SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]);
#endif
/* RT_PRINT_DATA(COMP_SEND, DBG_LOUD, "EMHdr:", VirtualAddress, 8); */
} }
void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ) void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf )
{ {
/* struct adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq */ /* struct adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq */

8
hal/usb_halinit.c
View file

@ -662,10 +662,6 @@ _InitWMACSetting(
/* don't turn on AAP, it will allow all packets to driver */ /* don't turn on AAP, it will allow all packets to driver */
pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS; pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS;
#if (1 == RTL8188E_RX_PACKET_INCLUDE_CRC)
pHalData->ReceiveConfig |= ACRC32;
#endif
/* some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */ /* some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */
rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig); rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig);
@ -1539,11 +1535,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,("EarlyMode Enabled!!!\n")); RT_TRACE(_module_hci_hal_init_c_, _drv_info_,("EarlyMode Enabled!!!\n"));
value8 = rtw_read8(Adapter, REG_EARLY_MODE_CONTROL); value8 = rtw_read8(Adapter, REG_EARLY_MODE_CONTROL);
#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
value8 = value8|0x1f;
#else
value8 = value8|0xf; value8 = value8|0xf;
#endif
rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, value8); rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, value8);
rtw_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x80); rtw_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x80);

20
include/Hal8188EPhyCfg.h
View file

@ -355,7 +355,6 @@ storePwrIndexDiffRateOffset(
#if(SIC_HW_SUPPORT == 1) #if(SIC_HW_SUPPORT == 1)
#define SIC_CMD_READY 0 #define SIC_CMD_READY 0
#define SIC_CMD_PREWRITE 0x1 #define SIC_CMD_PREWRITE 0x1
#if(RTL8188E_SUPPORT == 1)
#define SIC_CMD_WRITE 0x40 #define SIC_CMD_WRITE 0x40
#define SIC_CMD_PREREAD 0x2 #define SIC_CMD_PREREAD 0x2
#define SIC_CMD_READ 0x80 #define SIC_CMD_READ 0x80
@ -367,36 +366,17 @@ storePwrIndexDiffRateOffset(
#define SIC_ADDR_REG 0x1E8 // 1b4~1b5, 2 bytes #define SIC_ADDR_REG 0x1E8 // 1b4~1b5, 2 bytes
#define SIC_DATA_REG 0x1EC // 1b0~1b3 #define SIC_DATA_REG 0x1EC // 1b0~1b3
#else #else
#define SIC_CMD_WRITE 0x11
#define SIC_CMD_PREREAD 0x2
#define SIC_CMD_READ 0x12
#define SIC_CMD_INIT 0x1f
#define SIC_INIT_VAL 0xff
#define SIC_INIT_REG 0x1b7
#define SIC_CMD_REG 0x1b6 // 1byte
#define SIC_ADDR_REG 0x1b4 // 1b4~1b5, 2 bytes
#define SIC_DATA_REG 0x1b0 // 1b0~1b3
#endif
#else
#define SIC_CMD_READY 0 #define SIC_CMD_READY 0
#define SIC_CMD_WRITE 1 #define SIC_CMD_WRITE 1
#define SIC_CMD_READ 2 #define SIC_CMD_READ 2
#if(RTL8188E_SUPPORT == 1)
#define SIC_CMD_REG 0x1EB // 1byte #define SIC_CMD_REG 0x1EB // 1byte
#define SIC_ADDR_REG 0x1E8 // 1b9~1ba, 2 bytes #define SIC_ADDR_REG 0x1E8 // 1b9~1ba, 2 bytes
#define SIC_DATA_REG 0x1EC // 1bc~1bf #define SIC_DATA_REG 0x1EC // 1bc~1bf
#else
#define SIC_CMD_REG 0x1b8 // 1byte
#define SIC_ADDR_REG 0x1b9 // 1b9~1ba, 2 bytes
#define SIC_DATA_REG 0x1bc // 1bc~1bf
#endif
#endif #endif
#if(SIC_ENABLE == 1) #if(SIC_ENABLE == 1)
void SIC_Init(IN struct adapter *Adapter); void SIC_Init(IN struct adapter *Adapter);
#endif #endif
#endif // __INC_HAL8192CPHYCFG_H #endif // __INC_HAL8192CPHYCFG_H

11
include/autoconf.h
View file

@ -80,8 +80,6 @@
* HAL Related Config * HAL Related Config
*/ */
#define RTL8188E_RX_PACKET_INCLUDE_CRC 0
#define CONFIG_OUT_EP_WIFI_MODE 0 #define CONFIG_OUT_EP_WIFI_MODE 0
#define ENABLE_USB_DROP_INCORRECT_OUT #define ENABLE_USB_DROP_INCORRECT_OUT
@ -95,18 +93,9 @@
* Outsource Related Config * Outsource Related Config
*/ */
#define RTL8188EE_SUPPORT 0
#define RTL8188EU_SUPPORT 1
#define RTL8188ES_SUPPORT 0
#define RTL8188E_SUPPORT (RTL8188EE_SUPPORT|RTL8188EU_SUPPORT|RTL8188ES_SUPPORT)
#define RTL8188E_FOR_TEST_CHIP 0
#define RATE_ADAPTIVE_SUPPORT 1 #define RATE_ADAPTIVE_SUPPORT 1
#define POWER_TRAINING_ACTIVE 1 #define POWER_TRAINING_ACTIVE 1
#ifdef CONFIG_TX_EARLY_MODE
#define RTL8188E_EARLY_MODE_PKT_NUM_10 0
#endif
#define CONFIG_80211D #define CONFIG_80211D
#define CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR #define CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR

4
include/rtl8188e_spec.h
View file

@ -1602,11 +1602,7 @@ Current IOREG MAP
#define EEPROM_Default_AntTxPowerDiff 0x0 #define EEPROM_Default_AntTxPowerDiff 0x0
#define EEPROM_Default_TxPwDiff_CrystalCap 0x5 #define EEPROM_Default_TxPwDiff_CrystalCap 0x5
#if (RTL8188ES_SUPPORT==1) //for SDIO
#define EEPROM_Default_TxPowerLevel 0x25
#else //for USB/PCIE
#define EEPROM_Default_TxPowerLevel 0x2A #define EEPROM_Default_TxPowerLevel 0x2A
#endif
#define EEPROM_Default_HT40_2SDiff 0x0 #define EEPROM_Default_HT40_2SDiff 0x0
#define EEPROM_Default_HT20_Diff 2 // HT20<->40 default Tx Power Index Difference #define EEPROM_Default_HT20_Diff 2 // HT20<->40 default Tx Power Index Difference