rtl8188eu: FRemove dead code for other than USB

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2014-12-28 11:13:03 -06:00
parent 5a2939fa9e
commit 2d60bad9ad
66 changed files with 229 additions and 4045 deletions

View file

@ -34,11 +34,6 @@ Major Change History:
--*/
#include <HalPwrSeqCmd.h>
#ifdef CONFIG_SDIO_HCI
#include <sdio_ops.h>
#elif defined(CONFIG_GSPI_HCI)
#include <gspi_ops.h>
#endif
//
// Description:
@ -93,56 +88,22 @@ u8 HalPwrSeqCmdParsing(
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n"));
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
#ifdef CONFIG_SDIO_HCI
//
// <Roger_Notes> We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface
// 2011.07.07.
//
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
{
// Read Back SDIO Local value
value = SdioLocalCmd52Read1Byte(padapter, offset);
// Read the value from system register
value = rtw_read8(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
// Write Back SDIO Local value
SdioLocalCmd52Write1Byte(padapter, offset, value);
}
else
#endif
{
#ifdef CONFIG_GSPI_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
offset = SPI_LOCAL_OFFSET | offset;
#endif
// Read the value from system register
value = rtw_read8(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
// Write the value back to sytem register
rtw_write8(padapter, offset, value);
}
// Write the value back to sytem register
rtw_write8(padapter, offset, value);
break;
case PWR_CMD_POLLING:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n"));
bPollingBit = _FALSE;
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
#ifdef CONFIG_GSPI_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
offset = SPI_LOCAL_OFFSET | offset;
#endif
do {
#ifdef CONFIG_SDIO_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
value = SdioLocalCmd52Read1Byte(padapter, offset);
else
#endif
value = rtw_read8(padapter, offset);
value = rtw_read8(padapter, offset);
value &= GET_PWR_CFG_MASK(PwrCfgCmd);
if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)))

View file

@ -23,16 +23,8 @@
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_byteorder.h>
#include <hal_intf.h>
#ifdef CONFIG_SDIO_HCI
#include <sdio_hal.h>
#elif defined(CONFIG_USB_HCI)
#include <usb_hal.h>
#elif defined(CONFIG_GSPI_HCI)
#include <gspi_hal.h>
#endif
#include <usb_hal.h>
void rtw_hal_chip_configure(struct adapter *padapter)
{

View file

@ -4160,7 +4160,6 @@ odm_DynamicTxPowerInit(
pdmpriv->bDynamicTxPowerEnable = _FALSE;
#if (RTL8192C_SUPPORT==1)
#ifdef CONFIG_USB_HCI
#ifdef CONFIG_INTEL_PROXIM
if((pHalData->BoardType == BOARD_USB_High_PA)||(Adapter->proximity.proxim_support==_TRUE))
@ -4174,9 +4173,6 @@ odm_DynamicTxPowerInit(
pdmpriv->bDynamicTxPowerEnable = _TRUE;
}
else
#else
pdmpriv->bDynamicTxPowerEnable = _FALSE;
#endif
#endif
pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal;
@ -7528,25 +7524,17 @@ odm_EdcaTurboCheckCE(
}
#endif
#ifdef CONFIG_PCI_HCI
if(IS_92C_SERIAL(pHalData->VersionID))
{
edca_param = 0x60a42b;
}
else
{
edca_param = 0x6ea42b;
}
#endif
rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);
pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex;
}
pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _TRUE;
}
else
{
} else {
//
// Turn Off EDCA turbo here.
// Restore original EDCA according to the declaration of AP.

View file

@ -208,16 +208,7 @@ typedef enum _RT_SPINLOCK_TYPE{
#define ps8Byte s64*
#endif
#ifdef CONFIG_USB_HCI
#define DEV_BUS_TYPE RT_USB_INTERFACE
#elif defined(CONFIG_PCI_HCI)
#define DEV_BUS_TYPE RT_PCI_INTERFACE
#elif defined(CONFIG_SDIO_HCI)
#define DEV_BUS_TYPE RT_SDIO_INTERFACE
#elif defined(CONFIG_GSPI_HCI)
#define DEV_BUS_TYPE RT_SDIO_INTERFACE
#endif
#define DEV_BUS_TYPE RT_USB_INTERFACE
#if defined(CONFIG_LITTLE_ENDIAN)
#define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE

View file

@ -1423,14 +1423,7 @@ _func_enter_;
pwowlan_parm.mode |=FW_WOWLAN_DEAUTH_WAKEUP;
//DataPinWakeUp
#ifdef CONFIG_USB_HCI
pwowlan_parm.gpio_index=0x0;
#endif //CONFIG_USB_HCI
#ifdef CONFIG_SDIO_HCI
pwowlan_parm.gpio_index = 0x80;
#endif //CONFIG_SDIO_HCI
#ifdef CONFIG_GPIO_WAKEUP
pwowlan_parm.gpio_index = gpio_wake_pin;

View file

@ -97,7 +97,6 @@ static void dm_CheckPbcGPIO(struct adapter *padapter)
if(!padapter->registrypriv.hw_wps_pbc)
return;
#ifdef CONFIG_USB_HCI
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
tmp1byte |= (HAL_8188E_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as output mode
@ -118,19 +117,6 @@ static void dm_CheckPbcGPIO(struct adapter *padapter)
{
bPbcPressed = _TRUE;
}
#else
tmp1byte = rtw_read8(padapter, GPIO_IN);
//RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte));
if (tmp1byte == 0xff || padapter->init_adpt_in_progress)
return ;
if((tmp1byte&HAL_8188E_HW_GPIO_WPS_BIT)==0)
{
bPbcPressed = _TRUE;
}
#endif
if( _TRUE == bPbcPressed)
{
// Here we only set bPbcPressed to true
@ -154,91 +140,6 @@ static void dm_CheckPbcGPIO(struct adapter *padapter)
}
}
#ifdef CONFIG_PCI_HCI
//
// Description:
// Perform interrupt migration dynamically to reduce CPU utilization.
//
// Assumption:
// 1. Do not enable migration under WIFI test.
//
// Created by Roger, 2010.03.05.
//
VOID
dm_InterruptMigration(
IN struct adapter *Adapter
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
BOOLEAN bCurrentIntMt, bCurrentACIntDisable;
BOOLEAN IntMtToSet = _FALSE;
BOOLEAN ACIntToSet = _FALSE;
// Retrieve current interrupt migration and Tx four ACs IMR settings first.
bCurrentIntMt = pHalData->bInterruptMigration;
bCurrentACIntDisable = pHalData->bDisableTxInt;
//
// <Roger_Notes> Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics
// when interrupt migration is set before. 2010.03.05.
//
if(!Adapter->registrypriv.wifi_spec &&
(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) &&
pmlmepriv->LinkDetectInfo.bHigherBusyTraffic)
{
IntMtToSet = _TRUE;
// To check whether we should disable Tx interrupt or not.
if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic )
ACIntToSet = _TRUE;
}
//Update current settings.
if( bCurrentIntMt != IntMtToSet ){
DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet);
if(IntMtToSet)
{
//
// <Roger_Notes> Set interrrupt migration timer and corresponging Tx/Rx counter.
// timer 25ns*0xfa0=100us for 0xf packets.
// 2010.03.05.
//
rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx
pHalData->bInterruptMigration = IntMtToSet;
}
else
{
// Reset all interrupt migration settings.
rtw_write32(Adapter, REG_INT_MIG, 0);
pHalData->bInterruptMigration = IntMtToSet;
}
}
/*if( bCurrentACIntDisable != ACIntToSet ){
DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet);
if(ACIntToSet) // Disable four ACs interrupts.
{
//
// <Roger_Notes> Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization.
// When extremely highly Rx OK occurs, we will disable Tx interrupts.
// 2010.03.05.
//
UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS );
pHalData->bDisableTxInt = ACIntToSet;
}
else// Enable four ACs interrupts.
{
UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 );
pHalData->bDisableTxInt = ACIntToSet;
}
}*/
}
#endif
//
// Initialize GPIO setting registers
//
@ -301,15 +202,6 @@ static void Init_ODM_ComInfo_88E(struct adapter *Adapter)
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP,IS_NORMAL_CHIP(pHalData->VersionID));
#if 0
//#ifdef CONFIG_USB_HCI
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BOARD_TYPE,pHalData->BoardType);
if(pHalData->BoardType == BOARD_USB_High_PA){
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_LNA,_TRUE);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_PA,_TRUE);
}
#endif
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PATCH_ID,pHalData->CustomerID);
// ODM_CMNINFO_BINHCT_TEST only for MP Team
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BWIFI_TEST,Adapter->registrypriv.wifi_spec);
@ -434,9 +326,7 @@ rtl8188e_InitHalDm(
PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
u8 i;
#ifdef CONFIG_USB_HCI
dm_InitGPIOSetting(Adapter);
#endif
pdmpriv->DM_Type = DM_Type_ByDriver;
pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE;
@ -490,21 +380,6 @@ rtl8188e_HalDmWatchDog(
// Calculate Tx/Rx statistics.
//
dm_CheckStatistics(Adapter);
//
// Dynamically switch RTS/CTS protection.
//
//dm_CheckProtection(Adapter);
#ifdef CONFIG_PCI_HCI
// 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput.
// Tx Migration settings.
//dm_InterruptMigration(Adapter);
//if(Adapter->HalFunc.TxCheckStuckHandler(Adapter))
// PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem));
#endif
}
@ -544,13 +419,6 @@ skip_dm:
// Check GPIO to determine current RF on/off and Pbc status.
// Check Hardware Radio ON/OFF or not
#ifdef CONFIG_PCI_HCI
if(pHalData->bGpioHwWpsPbc)
#endif
{
//temp removed
//dm_CheckPbcGPIO(Adapter);
}
return;
}

View file

@ -28,9 +28,8 @@
#include <rtw_iol.h>
#if defined(CONFIG_IOL)
#ifdef CONFIG_USB_HCI
#include <usb_ops.h>
#endif
static void iol_mode_enable(struct adapter *padapter, u8 enable)
{
u8 reg_0xf0 = 0;
@ -487,7 +486,6 @@ int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter, struct xmit_frame *xmit
//printk("===> %s ,bndy_cnt = %d \n",__FUNCTION__,bndy_cnt);
if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS)
goto exit;
#ifdef CONFIG_USB_HCI
{
struct pkt_attrib *pattrib = &xmit_frame->attrib;
if(rtw_usb_bulk_size_boundary(adapter,TXDESC_SIZE+pattrib->last_txcmdsz))
@ -496,11 +494,6 @@ int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter, struct xmit_frame *xmit
goto exit;
}
}
#endif //CONFIG_USB_HCI
//rtw_IOL_cmd_buf_dump(adapter,xmit_frame->attrib.pktlen+TXDESC_OFFSET,xmit_frame->buf_addr);
//rtw_hal_mgnt_xmit(adapter, xmit_frame);
//rtw_dump_xframe_sync(adapter, xmit_frame);
dump_mgntframe_and_wait(adapter, xmit_frame, max_wating_ms);
@ -612,14 +605,7 @@ _BlockWrite(
u32 remainSize_p1 = 0, remainSize_p2 = 0;
u8 *bufferPtr = (u8*)buffer;
u32 i=0, offset=0;
#ifdef CONFIG_PCI_HCI
u8 remainFW[4] = {0, 0, 0, 0};
u8 *p = NULL;
#endif
#ifdef CONFIG_USB_HCI
blockSize_p1 = MAX_REG_BOLCK_SIZE;
#endif
//3 Phase #1
blockCount_p1 = buffSize / blockSize_p1;
@ -633,35 +619,11 @@ _BlockWrite(
for (i = 0; i < blockCount_p1; i++)
{
#ifdef CONFIG_USB_HCI
ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1));
#else
ret = rtw_write32(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), le32_to_cpu(*((u32*)(bufferPtr + i * blockSize_p1))));
#endif
if(ret == _FAIL)
goto exit;
}
#ifdef CONFIG_PCI_HCI
p = (u8*)((u32*)(bufferPtr + blockCount_p1 * blockSize_p1));
if (remainSize_p1) {
switch (remainSize_p1) {
case 0:
break;
case 3:
remainFW[2]=*(p+2);
case 2:
remainFW[1]=*(p+1);
case 1:
remainFW[0]=*(p);
ret = rtw_write32(padapter, (FW_8188E_START_ADDRESS + blockCount_p1 * blockSize_p1),
le32_to_cpu(*(u32*)remainFW));
}
return ret;
}
#endif
//3 Phase #2
if (remainSize_p1)
{
@ -676,14 +638,12 @@ _BlockWrite(
(buffSize-offset), blockSize_p2 ,blockCount_p2, remainSize_p2));
}
#ifdef CONFIG_USB_HCI
for (i = 0; i < blockCount_p2; i++) {
ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + offset + i*blockSize_p2), blockSize_p2, (bufferPtr + offset + i*blockSize_p2));
if(ret == _FAIL)
goto exit;
}
#endif
}
//3 Phase #3
@ -760,14 +720,7 @@ _WriteFW(
u32 page, offset;
u8 *bufferPtr = (u8*)buffer;
#ifdef CONFIG_PCI_HCI
// 20100120 Joseph: Add for 88CE normal chip.
// Fill in zero to make firmware image to dword alignment.
// _FillDummy(bufferPtr, &size);
#endif
pageNums = size / MAX_PAGE_SIZE ;
//RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4 \n"));
remainSize = size % MAX_PAGE_SIZE;
for (page = 0; page < pageNums; page++) {
@ -2814,34 +2767,12 @@ void rtl8188e_SetHalODMVar(
void rtl8188e_start_thread(struct adapter *padapter)
{
#ifdef CONFIG_SDIO_HCI
#ifndef CONFIG_SDIO_TX_TASKLET
struct xmit_priv *xmitpriv = &padapter->xmitpriv;
xmitpriv->SdioXmitThread = kthread_run(rtl8188es_xmit_thread, padapter, "RTWHALXT");
if (IS_ERR(xmitpriv->SdioXmitThread))
{
RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: start rtl8188es_xmit_thread FAIL!!\n", __FUNCTION__));
}
#endif
#endif
}
void rtl8188e_stop_thread(struct adapter *padapter)
{
#ifdef CONFIG_SDIO_HCI
#ifndef CONFIG_SDIO_TX_TASKLET
struct xmit_priv *xmitpriv = &padapter->xmitpriv;
// stop xmit_buf_thread
if (xmitpriv->SdioXmitThread ) {
_rtw_up_sema(&xmitpriv->SdioXmitSema);
_rtw_down_sema(&xmitpriv->SdioXmitTerminateSema);
xmitpriv->SdioXmitThread = 0;
}
#endif
#endif
}
void hal_notch_filter_8188e(struct adapter *adapter, bool enable)
{
if (enable) {
@ -2930,7 +2861,6 @@ u8 GetEEPROMSize8188E(struct adapter *padapter)
return size;
}
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_PCI_HCI)
//-------------------------------------------------------------------------
//
// LLT R/W/Init function
@ -3049,8 +2979,6 @@ s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
return status;
}
#endif
void
Hal_InitPGData88E(struct adapter *padapter)
@ -3396,12 +3324,7 @@ void Hal_ReadPowerSavingMode88E(
// decide hw if support remote wakeup function
// if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume
#ifdef CONFIG_USB_HCI
pwrctl->bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT1)?_TRUE :_FALSE;
#endif //CONFIG_USB_HCI
//if(SUPPORT_HW_RADIO_DETECT(Adapter))
//Adapter->registrypriv.usbss_enable = pwrctl->bSupportRemoteWakeup ;
DBG_8192C("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) ,bSupportRemoteWakeup(%x)\n",__FUNCTION__,
pwrctl->bHWPwrPindetect, pwrctl->bHWPowerdown, pwrctl->bSupportRemoteWakeup);
@ -3789,11 +3712,5 @@ void SetBcnCtrlReg(
pHalData->RegBcnCtrlVal |= SetBits;
pHalData->RegBcnCtrlVal &= ~ClearBits;
#if 0
//#ifdef CONFIG_SDIO_HCI
if (pHalData->sdio_himr & (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK))
pHalData->RegBcnCtrlVal |= EN_TXBCN_RPT;
#endif
rtw_write8(padapter, REG_BCN_CTRL, (u8)pHalData->RegBcnCtrlVal);
}

View file

@ -692,31 +692,11 @@ rtl8188e_PHY_QueryRFReg(
return 0;
#endif
//RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), BitMask(%#lx)\n", RegAddr, eRFPath,BitMask));
#ifdef CONFIG_USB_HCI
//PlatformAcquireMutex(&pHalData->mxRFOperate);
#else
//_enter_critical(&pHalData->rf_lock, &irqL);
#endif
Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
Readback_Value = (Original_Value & BitMask) >> BitShift;
#ifdef CONFIG_USB_HCI
//PlatformReleaseMutex(&pHalData->mxRFOperate);
#else
//_exit_critical(&pHalData->rf_lock, &irqL);
#endif
//RTPRINT(FPHY, PHY_RFR, ("RFR-%d MASK=0x%lx Addr[0x%lx]=0x%lx\n", eRFPath, BitMask, RegAddr, Original_Value));//BitMask(%#lx),BitMask,
//RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), Original_Value(%#lx)\n",
// RegAddr, eRFPath, Original_Value));
return (Readback_Value);
}
@ -757,19 +737,6 @@ rtl8188e_PHY_SetRFReg(
return;
#endif
//RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n",
// RegAddr, BitMask, Data, eRFPath));
//RTPRINT(FINIT, INIT_RF, ("PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n",
// RegAddr, BitMask, Data, eRFPath));
#ifdef CONFIG_USB_HCI
//PlatformAcquireMutex(&pHalData->mxRFOperate);
#else
//_enter_critical(&pHalData->rf_lock, &irqL);
#endif
// RF data is 12 bits only
if (BitMask != bRFRegOffsetMask)
{
@ -779,18 +746,6 @@ rtl8188e_PHY_SetRFReg(
}
phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data);
#ifdef CONFIG_USB_HCI
//PlatformReleaseMutex(&pHalData->mxRFOperate);
#else
//_exit_critical(&pHalData->rf_lock, &irqL);
#endif
//PHY_QueryRFReg(Adapter,eRFPath,RegAddr,BitMask);
//RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n",
// RegAddr, BitMask, Data, eRFPath));
}
@ -1093,29 +1048,6 @@ phy_ConfigBBExternalPA(
IN struct adapter * Adapter
)
{
#ifdef CONFIG_USB_HCI
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u16 i=0;
u32 temp=0;
if(!pHalData->ExternalPA)
{
return;
}
// 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the
// same code as SU. It is already updated in PHY_REG_1T_HP.txt.
#if 0
PHY_SetBBReg(Adapter, 0xee8, BIT28, 1);
temp = PHY_QueryBBReg(Adapter, 0x860, bMaskDWord);
temp |= (BIT26|BIT21|BIT10|BIT5);
PHY_SetBBReg(Adapter, 0x860, bMaskDWord, temp);
PHY_SetBBReg(Adapter, 0x870, BIT10, 0);
PHY_SetBBReg(Adapter, 0xc80, bMaskDWord, 0x20000080);
PHY_SetBBReg(Adapter, 0xc88, bMaskDWord, 0x40000100);
#endif
#endif
}
/*-----------------------------------------------------------------------------
@ -1662,36 +1594,7 @@ PHY_BBConfig8188E(
rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB);
#ifdef CONFIG_USB_HCI
rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB);
#else
rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB);
#endif
#if 0
#ifdef CONFIG_USB_HCI
//To Fix MAC loopback mode fail. Suggested by SD4 Johnny. 2010.03.23.
rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x0f);
rtw_write8(Adapter, 0x15, 0xe9);
#endif
rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, 0x80);
#endif
#ifdef CONFIG_USB_HCI
//rtw_write8(Adapter, 0x15, 0xe9);
#endif
#ifdef CONFIG_PCI_HCI
// Force use left antenna by default for 88C.
// if(!IS_92C_SERIAL(pHalData->VersionID) || IS_92C_1T2R(pHalData->VersionID))
if(Adapter->ledpriv.LedStrategy != SW_LED_MODE10)
{
RegVal = rtw_read32(Adapter, REG_LEDCFG0);
rtw_write32(Adapter, REG_LEDCFG0, RegVal|BIT23);
}
#endif
//
// Config BB and AGC
@ -1801,27 +1704,11 @@ PHY_ConfigRFExternalPA(
)
{
int rtStatus = _SUCCESS;
#ifdef CONFIG_USB_HCI
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u16 i=0;
if(!pHalData->ExternalPA)
{
return rtStatus;
}
// 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the
// same code as SU. It is already updated in radio_a_1T_HP.txt.
#if 0
//add for SU High Power PA
for(i = 0;i<HighPowerRadioAArrayLen; i=i+2)
{
RT_TRACE(COMP_INIT, DBG_LOUD, ("External PA, write RF 0x%lx=0x%lx\n", Rtl8192S_HighPower_RadioA_Array[i], Rtl8192S_HighPower_RadioA_Array[i+1]));
PHY_SetRFReg(Adapter, eRFPath, Rtl8192S_HighPower_RadioA_Array[i], bRFRegOffsetMask, Rtl8192S_HighPower_RadioA_Array[i+1]);
}
#endif
#endif
return rtStatus;
}
//****************************************
@ -1973,19 +1860,11 @@ rtl8188e_PHY_ConfigRFWithHeaderFile(
{
if(Rtl819XRadioB_Array_Table[i] == 0xfe)
{ // Deay specific ms. Only RF configuration require delay.
#if 0//#ifdef CONFIG_USB_HCI
#ifdef CONFIG_LONG_DELAY_ISSUE
rtw_msleep_os(1000);
#else
rtw_mdelay_os(1000);
#endif
#else
#ifdef CONFIG_LONG_DELAY_ISSUE
rtw_msleep_os(50);
#else
rtw_mdelay_os(50);
#endif
#endif
}
else if (Rtl819XRadioB_Array_Table[i] == 0xfd)
rtw_mdelay_os(5);
@ -3505,7 +3384,6 @@ _PHY_DumpRFReg(IN struct adapter *pAdapter)
// Move from phycfg.c to gen.c to be code independent later
//
//-------------------------Move to other DIR later----------------------------*/
#ifdef CONFIG_USB_HCI
//
// Description:
@ -3517,35 +3395,12 @@ DumpBBDbgPort_92CU(
IN struct adapter * Adapter
)
{
//RT_TRACE(COMP_SEND, DBG_WARNING, ("\n>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>\n"));
//RT_TRACE(COMP_SEND, DBG_WARNING, ("BaseBand Debug Ports:\n"));
PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0000);
//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord)));
PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0803);
//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord)));
PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0a06);
//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord)));
PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0007);
//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord)));
PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100);
PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x000f0000);
//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord)));
PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100);
PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x00150000);
//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord)));
//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x800, PHY_QueryBBReg(Adapter, 0x0800, bMaskDWord)));
//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x900, PHY_QueryBBReg(Adapter, 0x0900, bMaskDWord)));
//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa00, PHY_QueryBBReg(Adapter, 0x0a00, bMaskDWord)));
//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa54, PHY_QueryBBReg(Adapter, 0x0a54, bMaskDWord)));
//RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa58, PHY_QueryBBReg(Adapter, 0x0a58, bMaskDWord)));
}
#endif

View file

@ -235,11 +235,9 @@ rtl8188e_PHY_RF6052SetCckTxPower(
TxAGC[idx1] =
pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
#ifdef CONFIG_USB_HCI
// 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20.
if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA)
TxAGC[idx1] = 0x20;
#endif
}
}
}

View file

@ -38,7 +38,6 @@ void rtl8188e_sreset_xmit_status_check(struct adapter *padapter)
DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status);
rtw_hal_sreset_reset(padapter);
}
#ifdef CONFIG_USB_HCI
//total xmit irp = 4
//DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt);
//if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1)
@ -69,8 +68,6 @@ void rtl8188e_sreset_xmit_status_check(struct adapter *padapter)
}
}
}
#endif //CONFIG_USB_HCI
if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) {
psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
rtw_hal_sreset_reset(padapter);

View file

@ -121,11 +121,9 @@ void rtl8188e_fill_fake_txdesc(
//offset 16
ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
// USB interface drop packet if the checksum of descriptor isn't correct.
// Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.).
rtl8188eu_cal_txdesc_chksum(ptxdesc);
#endif
}
void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc)

View file

@ -31,12 +31,6 @@
#include <rtw_iol.h>
#endif
#ifndef CONFIG_USB_HCI
#error "CONFIG_USB_HCI shall be on!\n"
#endif
#include <usb_ops.h>
#include <usb_hal.h>
#include <usb_osintf.h>
@ -2902,7 +2896,6 @@ readAdapterInfo_8188EU(
IN struct adapter *padapter
)
{
#if 1
EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
/* parse the eeprom/efuse content */
@ -2928,28 +2921,9 @@ readAdapterInfo_8188EU(
// The following part initialize some vars by PG info.
//
Hal_InitChannelPlan(padapter);
#if defined(CONFIG_WOWLAN) && defined(CONFIG_SDIO_HCI)
Hal_DetectWoWMode(padapter);
#endif //CONFIG_WOWLAN && CONFIG_SDIO_HCI
Hal_CustomizeByCustomerID_8188EU(padapter);
_ReadLEDSetting(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag);
#else
#ifdef CONFIG_INTEL_PROXIM
/* for intel proximity */
if (pHalData->rf_type== RF_1T1R) {
Adapter->proximity.proxim_support = _TRUE;
} else if (pHalData->rf_type== RF_2T2R) {
if ((pHalData->EEPROMPID == 0x8186) &&
(pHalData->EEPROMVID== 0x0bda))
Adapter->proximity.proxim_support = _TRUE;
} else {
Adapter->proximity.proxim_support = _FALSE;
}
#endif //CONFIG_INTEL_PROXIM
#endif
}
static void _ReadPROMContent(