diff --git a/core/rtw_mlme.c b/core/rtw_mlme.c index 34f26d8..c3fa7e3 100644 --- a/core/rtw_mlme.c +++ b/core/rtw_mlme.c @@ -631,7 +631,7 @@ void rtw_update_scanned_network(struct adapter *adapter, struct wlan_bssid_ex *t { unsigned long irqL; struct list_head *plist, *phead; - ULONG bssid_ex_sz; + u32 bssid_ex_sz; struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); struct __queue *queue = &(pmlmepriv->scanned_queue); struct wlan_network *pnetwork = NULL; diff --git a/core/rtw_mp.c b/core/rtw_mp.c index d4568fc..5926c32 100644 --- a/core/rtw_mp.c +++ b/core/rtw_mp.c @@ -270,11 +270,11 @@ s32 MPT_InitializeAdapter(struct adapter *pAdapter, u8 Channel) dm_CheckTXPowerTracking(&pHalData->odmpriv); /* trigger thermal meter */ PHY_LCCalibrate(pAdapter); - pMptCtx->backup0xc50 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0); - pMptCtx->backup0xc58 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0); - pMptCtx->backup0xc30 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_RxDetector1, bMaskByte0); - pMptCtx->backup0x52_RF_A = (u1Byte)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); - pMptCtx->backup0x52_RF_B = (u1Byte)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); + pMptCtx->backup0xc50 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0); + pMptCtx->backup0xc58 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0); + pMptCtx->backup0xc30 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_RxDetector1, bMaskByte0); + pMptCtx->backup0x52_RF_A = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); + pMptCtx->backup0x52_RF_B = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); /* set ant to wifi side in mp mode */ rtw_write16(pAdapter, 0x870, 0x300); diff --git a/core/rtw_mp_ioctl.c b/core/rtw_mp_ioctl.c index 43db047..90527e3 100644 --- a/core/rtw_mp_ioctl.c +++ b/core/rtw_mp_ioctl.c @@ -481,8 +481,8 @@ _func_enter_; return status; } - if (poid_par_priv->information_buf_len == sizeof(ULONG)) { - *(ULONG *)poid_par_priv->information_buf = Adapter->mppriv.tx_pktcount; + if (poid_par_priv->information_buf_len == sizeof(u32)) { + *(u32 *)poid_par_priv->information_buf = Adapter->mppriv.tx_pktcount; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; } else { status = NDIS_STATUS_INVALID_LENGTH; @@ -505,8 +505,8 @@ _func_enter_; return status; } RT_TRACE(_module_mp_, _drv_alert_, ("===> oid_rt_pro_query_rx_packet_received_hdl.\n")); - if (poid_par_priv->information_buf_len == sizeof(ULONG)) { - *(ULONG *)poid_par_priv->information_buf = Adapter->mppriv.rx_pktcount; + if (poid_par_priv->information_buf_len == sizeof(u32)) { + *(u32 *)poid_par_priv->information_buf = Adapter->mppriv.rx_pktcount; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_alert_, ("recv_ok:%d\n", Adapter->mppriv.rx_pktcount)); } else { @@ -530,8 +530,8 @@ _func_enter_; return status; } RT_TRACE(_module_mp_, _drv_alert_, ("===> oid_rt_pro_query_rx_packet_crc32_error_hdl.\n")); - if (poid_par_priv->information_buf_len == sizeof(ULONG)) { - *(ULONG *)poid_par_priv->information_buf = Adapter->mppriv.rx_crcerrpktcount; + if (poid_par_priv->information_buf_len == sizeof(u32)) { + *(u32 *)poid_par_priv->information_buf = Adapter->mppriv.rx_crcerrpktcount; *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_alert_, ("recv_err:%d\n", Adapter->mppriv.rx_crcerrpktcount)); } else { @@ -576,7 +576,7 @@ _func_enter_; return status; } - if (poid_par_priv->information_buf_len == sizeof(ULONG)) { + if (poid_par_priv->information_buf_len == sizeof(u32)) { Adapter->mppriv.rx_pktcount = 0; Adapter->mppriv.rx_crcerrpktcount = 0; } else { @@ -621,16 +621,16 @@ _func_enter_; if (poid_par_priv->type_of_oid != QUERY_OID) return NDIS_STATUS_NOT_ACCEPTED; - if (poid_par_priv->information_buf_len != sizeof(ULONG)) + if (poid_par_priv->information_buf_len != sizeof(u32)) return NDIS_STATUS_INVALID_LENGTH; _irqlevel_changed_(&oldirql, LOWER); - *(ULONG *)poid_par_priv->information_buf = GetPhyRxPktReceived(Adapter); + *(u32 *)poid_par_priv->information_buf = GetPhyRxPktReceived(Adapter); _irqlevel_changed_(&oldirql, RAISE); *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; - RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_get_phy_rx_packet_received_hdl: recv_ok=%d\n", *(ULONG *)poid_par_priv->information_buf)); + RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_get_phy_rx_packet_received_hdl: recv_ok=%d\n", *(u32 *)poid_par_priv->information_buf)); _func_exit_; @@ -650,18 +650,18 @@ _func_enter_; return NDIS_STATUS_NOT_ACCEPTED; - if (poid_par_priv->information_buf_len != sizeof(ULONG)) + if (poid_par_priv->information_buf_len != sizeof(u32)) return NDIS_STATUS_INVALID_LENGTH; _irqlevel_changed_(&oldirql, LOWER); - *(ULONG *)poid_par_priv->information_buf = GetPhyRxPktCRC32Error(Adapter); + *(u32 *)poid_par_priv->information_buf = GetPhyRxPktCRC32Error(Adapter); _irqlevel_changed_(&oldirql, RAISE); *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_get_phy_rx_packet_crc32_error_hdl: recv_err =%d\n", - *(ULONG *)poid_par_priv->information_buf)); + *(u32 *)poid_par_priv->information_buf)); _func_exit_; diff --git a/core/rtw_security.c b/core/rtw_security.c index f7baa7f..e7140bf 100644 --- a/core/rtw_security.c +++ b/core/rtw_security.c @@ -259,7 +259,7 @@ _func_exit_; /* 3 ===== TKIP related ===== */ static u32 secmicgetuint32(u8 *p) -/* Convert from Byte[] to Us4Byte32 in a portable way */ +/* Convert from Byte[] to Us3232 in a portable way */ { s32 i; u32 res = 0; @@ -271,7 +271,7 @@ _func_exit_; } static void secmicputuint32(u8 *p, u32 val) -/* Convert from Us4Byte32 to Byte[] in a portable way */ +/* Convert from Us3232 to Byte[] in a portable way */ { long i; _func_enter_; diff --git a/hal/Hal8188ERateAdaptive.c b/hal/Hal8188ERateAdaptive.c index ef81bb2..abb8d6e 100644 --- a/hal/Hal8188ERateAdaptive.c +++ b/hal/Hal8188ERateAdaptive.c @@ -17,7 +17,7 @@ Major Change History: /* Rate adaptive parameters */ -static u1Byte RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = { +static u8 RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = { {5, 4, 3, 2, 0, 3}, /* 92 , idx = 0 */ {6, 5, 4, 3, 0, 4}, /* 86 , idx = 1 */ {6, 5, 4, 2, 0, 4}, /* 81 , idx = 2 */ @@ -43,12 +43,12 @@ static u1Byte RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = { {49, 16, 16, 0, 0, 48} }; /* 3, idx = 0x16 */ -static u1Byte RETRY_PENALTY_UP[RETRYSIZE+1] = {49, 44, 16, 16, 0, 48}; /* 12% for rate up */ +static u8 RETRY_PENALTY_UP[RETRYSIZE+1] = {49, 44, 16, 16, 0, 48}; /* 12% for rate up */ -static u1Byte PT_PENALTY[RETRYSIZE+1] = {34, 31, 30, 24, 0, 32}; +static u8 PT_PENALTY[RETRYSIZE+1] = {34, 31, 30, 24, 0, 32}; /* wilson modify */ -static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = { +static u8 RETRY_PENALTY_IDX[2][RATESIZE] = { {4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */ 4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d, 5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f}, /* 0329 R01 */ @@ -58,41 +58,41 @@ static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = { 9, 9, 9, 9, 0x0c, 0x0e, 0x11, 0x13} }; -static u1Byte RETRY_PENALTY_UP_IDX[RATESIZE] = { +static u8 RETRY_PENALTY_UP_IDX[RATESIZE] = { 0x0c, 0x0d, 0x0d, 0x0f, 0x0d, 0x0e, 0x0f, 0x0f, 0x10, 0x12, 0x13, 0x14, /* SS>TH */ 0x0f, 0x10, 0x10, 0x12, 0x12, 0x13, 0x14, 0x15, 0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15}; -static u1Byte RSSI_THRESHOLD[RATESIZE] = { +static u8 RSSI_THRESHOLD[RATESIZE] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x24, 0x26, 0x2a, 0x18, 0x1a, 0x1d, 0x1f, 0x21, 0x27, 0x29, 0x2a, 0, 0, 0, 0x1f, 0x23, 0x28, 0x2a, 0x2c}; -static u2Byte N_THRESHOLD_HIGH[RATESIZE] = { +static u16 N_THRESHOLD_HIGH[RATESIZE] = { 4, 4, 8, 16, 24, 36, 48, 72, 96, 144, 192, 216, 60, 80, 100, 160, 240, 400, 560, 640, 300, 320, 480, 720, 1000, 1200, 1600, 2000}; -static u2Byte N_THRESHOLD_LOW[RATESIZE] = { +static u16 N_THRESHOLD_LOW[RATESIZE] = { 2, 2, 4, 8, 12, 18, 24, 36, 48, 72, 96, 108, 30, 40, 50, 80, 120, 200, 280, 320, 150, 160, 240, 360, 500, 600, 800, 1000}; -static u1Byte TRYING_NECESSARY[RATESIZE] = { +static u8 TRYING_NECESSARY[RATESIZE] = { 2, 2, 2, 2, 2, 2, 3, 3, 4, 4, 5, 7, 4, 4, 7, 10, 10, 12, 12, 18, 5, 7, 7, 8, 11, 18, 36, 60}; /* 0329 1207 */ -static u1Byte DROPING_NECESSARY[RATESIZE] = { +static u8 DROPING_NECESSARY[RATESIZE] = { 1, 1, 1, 1, 1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8, 5, 6, 7, 8, 9, 10, 11, 12}; -static u4Byte INIT_RATE_FALLBACK_TABLE[16] = { +static u32 INIT_RATE_FALLBACK_TABLE[16] = { 0x0f8ff015, /* 0: 40M BGN mode */ 0x0f8ff010, /* 1: 40M GN mode */ 0x0f8ff005, /* 2: BN mode/ 40M BGN mode */ @@ -111,8 +111,8 @@ static u4Byte INIT_RATE_FALLBACK_TABLE[16] = { 0, /* 15: */ }; -static u1Byte PendingForRateUpFail[5] = {2, 10, 24, 40, 60}; -static u2Byte DynamicTxRPTTiming[6] = { +static u8 PendingForRateUpFail[5] = {2, 10, 24, 40, 60}; +static u16 DynamicTxRPTTiming[6] = { 0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12 , 0x927c}; /* 200ms-1200ms */ /* End Rate adaptive parameters */ @@ -120,10 +120,10 @@ static u2Byte DynamicTxRPTTiming[6] = { static void odm_SetTxRPTTiming_8188E( struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo, - u1Byte extend + u8 extend ) { - u1Byte idx = 0; + u8 idx = 0; for (idx = 0; idx < 5; idx++) if (DynamicTxRPTTiming[idx] == pRaInfo->RptTime) @@ -146,8 +146,8 @@ static void odm_SetTxRPTTiming_8188E( static int odm_RateDown_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo) { - u1Byte RateID, LowestRate, HighestRate; - u1Byte i; + u8 RateID, LowestRate, HighestRate; + u8 i; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDown_8188E()\n")); if (NULL == pRaInfo) { @@ -205,8 +205,8 @@ static int odm_RateUp_8188E( struct odm_ra_info *pRaInfo ) { - u1Byte RateID, HighestRate; - u1Byte i; + u8 RateID, HighestRate; + u8 i; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateUp_8188E()\n")); if (NULL == pRaInfo) { @@ -258,7 +258,7 @@ RateUpfinish: static void odm_ResetRaCounter_8188E(struct odm_ra_info *pRaInfo) { - u1Byte RateID; + u8 RateID; RateID = pRaInfo->DecisionRate; pRaInfo->NscUp = (N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1; @@ -269,9 +269,9 @@ static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo ) { - u1Byte RateID = 0, RtyPtID = 0, PenaltyID1 = 0, PenaltyID2 = 0; - /* u4Byte pool_retry; */ - static u1Byte DynamicTxRPTTimingCounter; + u8 RateID = 0, RtyPtID = 0, PenaltyID1 = 0, PenaltyID2 = 0; + /* u32 pool_retry; */ + static u8 DynamicTxRPTTimingCounter; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDecision_8188E()\n")); @@ -357,8 +357,8 @@ static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm, static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo) { /* Wilson 2011/10/26 */ - u4Byte MaskFromReg; - s1Byte i; + u32 MaskFromReg; + s8 i; switch (pRaInfo->RateID) { case RATR_INX_WIRELESS_NGB: @@ -498,11 +498,11 @@ static void odm_PTTryState_8188E(struct odm_ra_info *pRaInfo) static void odm_PTDecision_8188E(struct odm_ra_info *pRaInfo) { - u1Byte j; - u1Byte temp_stage; - u4Byte numsc; - u4Byte num_total; - u1Byte stage_id; + u8 j; + u8 temp_stage; + u32 numsc; + u32 num_total; + u8 stage_id; numsc = 0; num_total = pRaInfo->TOTAL * PT_PENALTY[5]; @@ -534,7 +534,7 @@ static void odm_PTDecision_8188E(struct odm_ra_info *pRaInfo) static void odm_RATxRPTTimerSetting( struct odm_dm_struct *dm_odm, - u2Byte minRptTime + u16 minRptTime ) { ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, (" =====>odm_RATxRPTTimerSetting()\n")); @@ -560,11 +560,11 @@ ODM_RASupport_Init( dm_odm->RaSupport88E = true; } -int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u1Byte macid) +int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid) { struct odm_ra_info *pRaInfo = &dm_odm->RAInfo[macid]; - u1Byte WirelessMode = 0xFF; /* invalid value */ - u1Byte max_rate_idx = 0x13; /* MCS7 */ + u8 WirelessMode = 0xFF; /* invalid value */ + u8 max_rate_idx = 0x13; /* MCS7 */ if (dm_odm->pWirelessMode != NULL) WirelessMode = *(dm_odm->pWirelessMode); @@ -619,7 +619,7 @@ int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u1Byte macid) int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm) { - u1Byte macid = 0; + u8 macid = 0; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>\n")); dm_odm->CurrminRptTime = 0; @@ -630,7 +630,7 @@ int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm) return 0; } -u1Byte ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u1Byte macid) +u8 ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u8 macid) { if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) return 0; @@ -639,9 +639,9 @@ u1Byte ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u1Byte macid) return dm_odm->RAInfo[macid].RateSGI; } -u1Byte ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u1Byte macid) +u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 macid) { - u1Byte DecisionRate = 0; + u8 DecisionRate = 0; if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) return 0; @@ -651,9 +651,9 @@ u1Byte ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u1Byte macid) return DecisionRate; } -u1Byte ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u1Byte macid) +u8 ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u8 macid) { - u1Byte PTStage = 5; + u8 PTStage = 5; if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) return 0; @@ -663,7 +663,7 @@ u1Byte ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u1Byte macid) return PTStage; } -void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u1Byte macid, u1Byte RateID, u4Byte RateMask, u1Byte SGIEnable) +void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 RateID, u32 RateMask, u8 SGIEnable) { struct odm_ra_info *pRaInfo = NULL; @@ -680,7 +680,7 @@ void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u1Byte macid, u1B odm_ARFBRefresh_8188E(dm_odm, pRaInfo); } -void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u1Byte macid, u1Byte Rssi) +void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rssi) { struct odm_ra_info *pRaInfo = NULL; @@ -693,18 +693,18 @@ void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u1Byte macid, u1Byte Rss pRaInfo->RssiStaRA = Rssi; } -void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u2Byte minRptTime) +void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u16 minRptTime) { ODM_Write2Byte(dm_odm, REG_TX_RPT_TIME, minRptTime); } -void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, pu1Byte TxRPT_Buf, u2Byte TxRPT_Len, u4Byte macid_entry0, u4Byte macid_entry1) +void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16 TxRPT_Len, u32 macid_entry0, u32 macid_entry1) { struct odm_ra_info *pRAInfo = NULL; - u1Byte MacId = 0; - pu1Byte pBuffer = NULL; - u4Byte valid = 0, ItemNum = 0; - u2Byte minRptTime = 0x927c; + u8 MacId = 0; + u8 *pBuffer = NULL; + u32 valid = 0, ItemNum = 0; + u16 minRptTime = 0x927c; ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RA_TxRPT2Handle_8188E(): valid0 =%d valid1 =%d BufferLength =%d\n", @@ -723,12 +723,12 @@ void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, pu1Byte TxRPT_Buf, pRAInfo = &(dm_odm->RAInfo[MacId]); if (valid) { - pRAInfo->RTY[0] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer); - pRAInfo->RTY[1] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer); - pRAInfo->RTY[2] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer); - pRAInfo->RTY[3] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_3(pBuffer); - pRAInfo->RTY[4] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer); - pRAInfo->DROP = (u2Byte)GET_TX_REPORT_TYPE1_DROP_0(pBuffer); + pRAInfo->RTY[0] = (u16)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer); + pRAInfo->RTY[1] = (u16)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer); + pRAInfo->RTY[2] = (u16)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer); + pRAInfo->RTY[3] = (u16)GET_TX_REPORT_TYPE1_RERTY_3(pBuffer); + pRAInfo->RTY[4] = (u16)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer); + pRAInfo->DROP = (u16)GET_TX_REPORT_TYPE1_DROP_0(pBuffer); pRAInfo->TOTAL = pRAInfo->RTY[0] + pRAInfo->RTY[1] + pRAInfo->RTY[2] + pRAInfo->RTY[3] + pRAInfo->RTY[4] + pRAInfo->DROP; diff --git a/hal/HalHWImg8188E_BB.c b/hal/HalHWImg8188E_BB.c index 3b558df..991b834 100644 --- a/hal/HalHWImg8188E_BB.c +++ b/hal/HalHWImg8188E_BB.c @@ -29,12 +29,12 @@ v2 = array[i+1]; \ } while (0) -static bool CheckCondition(const u4Byte condition, const u4Byte hex) +static bool CheckCondition(const u32 condition, const u32 hex) { - u4Byte _board = (hex & 0x000000FF); - u4Byte _interface = (hex & 0x0000FF00) >> 8; - u4Byte _platform = (hex & 0x00FF0000) >> 16; - u4Byte cond = condition; + u32 _board = (hex & 0x000000FF); + u32 _interface = (hex & 0x0000FF00) >> 8; + u32 _platform = (hex & 0x00FF0000) >> 16; + u32 cond = condition; if (condition == 0xCDCDCDCD) return true; @@ -60,7 +60,7 @@ static bool CheckCondition(const u4Byte condition, const u4Byte hex) * AGC_TAB_1T.TXT ******************************************************************************/ -static u4Byte array_agc_tab_1t_8188e[] = { +static u32 array_agc_tab_1t_8188e[] = { 0xC78, 0xFB000001, 0xC78, 0xFB010001, 0xC78, 0xFB020001, @@ -193,15 +193,15 @@ static u4Byte array_agc_tab_1t_8188e[] = { enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm) { - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = dm_odm->SupportPlatform; - u1Byte interfaceValue = dm_odm->SupportInterface; - u1Byte board = dm_odm->BoardType; - u4Byte arraylen = sizeof(array_agc_tab_1t_8188e)/sizeof(u4Byte); - pu4Byte array = array_agc_tab_1t_8188e; + u32 hex = 0; + u32 i = 0; + u16 count = 0; + u32 *ptr_array = NULL; + u8 platform = dm_odm->SupportPlatform; + u8 interfaceValue = dm_odm->SupportInterface; + u8 board = dm_odm->BoardType; + u32 arraylen = sizeof(array_agc_tab_1t_8188e)/sizeof(u32); + u32 *array = array_agc_tab_1t_8188e; bool biol = false; struct adapter *adapter = dm_odm->Adapter; struct xmit_frame *pxmit_frame; @@ -223,15 +223,15 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm) } for (i = 0; i < arraylen; i += 2) { - u4Byte v1 = array[i]; - u4Byte v2 = array[i+1]; + u32 v1 = array[i]; + u32 v2 = array[i+1]; /* This (offset, data) pair meets the condition. */ if (v1 < 0xCDCDCDCD) { if (biol) { if (rtw_IOL_cmd_boundary_handle(pxmit_frame)) bndy_cnt++; - rtw_IOL_append_WD_cmd(pxmit_frame, (u2Byte)v1, v2, bMaskDWord); + rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord); } else { odm_ConfigBB_AGC_8188E(dm_odm, v1, bMaskDWord, v2); } @@ -254,7 +254,7 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm) if (biol) { if (rtw_IOL_cmd_boundary_handle(pxmit_frame)) bndy_cnt++; - rtw_IOL_append_WD_cmd(pxmit_frame, (u2Byte)v1, v2, bMaskDWord); + rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord); } else { odm_ConfigBB_AGC_8188E(dm_odm, v1, bMaskDWord, v2); } @@ -279,7 +279,7 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm) * PHY_REG_1T.TXT ******************************************************************************/ -static u4Byte array_phy_reg_1t_8188e[] = { +static u32 array_phy_reg_1t_8188e[] = { 0x800, 0x80040000, 0x804, 0x00000003, 0x808, 0x0000FC00, @@ -475,15 +475,15 @@ static u4Byte array_phy_reg_1t_8188e[] = { enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm) { - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = dm_odm->SupportPlatform; - u1Byte interfaceValue = dm_odm->SupportInterface; - u1Byte board = dm_odm->BoardType; - u4Byte arraylen = sizeof(array_phy_reg_1t_8188e)/sizeof(u4Byte); - pu4Byte array = array_phy_reg_1t_8188e; + u32 hex = 0; + u32 i = 0; + u16 count = 0; + u32 *ptr_array = NULL; + u8 platform = dm_odm->SupportPlatform; + u8 interfaceValue = dm_odm->SupportInterface; + u8 board = dm_odm->BoardType; + u32 arraylen = sizeof(array_phy_reg_1t_8188e)/sizeof(u32); + u32 *array = array_phy_reg_1t_8188e; bool biol = false; struct adapter *adapter = dm_odm->Adapter; struct xmit_frame *pxmit_frame; @@ -504,8 +504,8 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm) } for (i = 0; i < arraylen; i += 2) { - u4Byte v1 = array[i]; - u4Byte v2 = array[i+1]; + u32 v1 = array[i]; + u32 v2 = array[i+1]; /* This (offset, data) pair meets the condition. */ if (v1 < 0xCDCDCDCD) { @@ -527,7 +527,7 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm) } else { if (v1 == 0xa24) dm_odm->RFCalibrateInfo.RegA24 = v2; - rtw_IOL_append_WD_cmd(pxmit_frame, (u2Byte)v1, v2, bMaskDWord); + rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord); } } else { odm_ConfigBB_PHY_8188E(dm_odm, v1, bMaskDWord, v2); @@ -566,7 +566,7 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm) if (v1 == 0xa24) dm_odm->RFCalibrateInfo.RegA24 = v2; - rtw_IOL_append_WD_cmd(pxmit_frame, (u2Byte)v1, v2, bMaskDWord); + rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord); } } else { odm_ConfigBB_PHY_8188E(dm_odm, v1, bMaskDWord, v2); @@ -592,7 +592,7 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm) * PHY_REG_PG.TXT ******************************************************************************/ -static u4Byte array_phy_reg_pg_8188e[] = { +static u32 array_phy_reg_pg_8188e[] = { 0xE00, 0xFFFFFFFF, 0x06070809, 0xE04, 0xFFFFFFFF, 0x02020405, 0xE08, 0x0000FF00, 0x00000006, @@ -686,24 +686,24 @@ static u4Byte array_phy_reg_pg_8188e[] = { void ODM_ReadAndConfig_PHY_REG_PG_8188E(struct odm_dm_struct *dm_odm) { - u4Byte hex; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = dm_odm->SupportPlatform; - u1Byte interfaceValue = dm_odm->SupportInterface; - u1Byte board = dm_odm->BoardType; - u4Byte arraylen = sizeof(array_phy_reg_pg_8188e) / sizeof(u4Byte); - pu4Byte array = array_phy_reg_pg_8188e; + u32 hex; + u32 i = 0; + u16 count = 0; + u32 *ptr_array = NULL; + u8 platform = dm_odm->SupportPlatform; + u8 interfaceValue = dm_odm->SupportInterface; + u8 board = dm_odm->BoardType; + u32 arraylen = sizeof(array_phy_reg_pg_8188e) / sizeof(u32); + u32 *array = array_phy_reg_pg_8188e; bool biol = false; hex = board + (interfaceValue << 8); hex += (platform << 16) + 0xFF000000; for (i = 0; i < arraylen; i += 3) { - u4Byte v1 = array[i]; - u4Byte v2 = array[i+1]; - u4Byte v3 = array[i+2]; + u32 v1 = array[i]; + u32 v2 = array[i+1]; + u32 v3 = array[i+2]; /* this line is a line of pure_body */ if (v1 < 0xCDCDCDCD) { diff --git a/hal/HalHWImg8188E_MAC.c b/hal/HalHWImg8188E_MAC.c index 879bb7d..6d7f5a8 100644 --- a/hal/HalHWImg8188E_MAC.c +++ b/hal/HalHWImg8188E_MAC.c @@ -21,12 +21,12 @@ #include "odm_precomp.h" #include -static bool Checkcondition(const u4Byte condition, const u4Byte hex) +static bool Checkcondition(const u32 condition, const u32 hex) { - u4Byte _board = (hex & 0x000000FF); - u4Byte _interface = (hex & 0x0000FF00) >> 8; - u4Byte _platform = (hex & 0x00FF0000) >> 16; - u4Byte cond = condition; + u32 _board = (hex & 0x000000FF); + u32 _interface = (hex & 0x0000FF00) >> 8; + u32 _platform = (hex & 0x00FF0000) >> 16; + u32 cond = condition; if (condition == 0xCDCDCDCD) return true; @@ -52,7 +52,7 @@ static bool Checkcondition(const u4Byte condition, const u4Byte hex) * MAC_REG.TXT ******************************************************************************/ -static u4Byte array_MAC_REG_8188E[] = { +static u32 array_MAC_REG_8188E[] = { 0x026, 0x00000041, 0x027, 0x00000035, 0x428, 0x0000000A, @@ -149,15 +149,15 @@ enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm) { #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = array[i]; v2 = array[i+1]; } while (0) - u4Byte hex = 0; - u4Byte i; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = dm_odm->SupportPlatform; - u1Byte interface_val = dm_odm->SupportInterface; - u1Byte board = dm_odm->BoardType; - u4Byte array_len = sizeof(array_MAC_REG_8188E)/sizeof(u4Byte); - pu4Byte array = array_MAC_REG_8188E; + u32 hex = 0; + u32 i; + u16 count = 0; + u32 *ptr_array = NULL; + u8 platform = dm_odm->SupportPlatform; + u8 interface_val = dm_odm->SupportInterface; + u8 board = dm_odm->BoardType; + u32 array_len = sizeof(array_MAC_REG_8188E)/sizeof(u32); + u32 *array = array_MAC_REG_8188E; bool biol = false; struct adapter *adapt = dm_odm->Adapter; @@ -180,17 +180,17 @@ enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm) } for (i = 0; i < array_len; i += 2) { - u4Byte v1 = array[i]; - u4Byte v2 = array[i+1]; + u32 v1 = array[i]; + u32 v2 = array[i+1]; /* This (offset, data) pair meets the condition. */ if (v1 < 0xCDCDCDCD) { if (biol) { if (rtw_IOL_cmd_boundary_handle(pxmit_frame)) bndy_cnt++; - rtw_IOL_append_WB_cmd(pxmit_frame, (u2Byte)v1, (u1Byte)v2, 0xFF); + rtw_IOL_append_WB_cmd(pxmit_frame, (u16)v1, (u8)v2, 0xFF); } else { - odm_ConfigMAC_8188E(dm_odm, v1, (u1Byte)v2); + odm_ConfigMAC_8188E(dm_odm, v1, (u8)v2); } continue; } else { /* This line is the start line of branch. */ @@ -211,9 +211,9 @@ enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm) if (biol) { if (rtw_IOL_cmd_boundary_handle(pxmit_frame)) bndy_cnt++; - rtw_IOL_append_WB_cmd(pxmit_frame, (u2Byte)v1, (u1Byte)v2, 0xFF); + rtw_IOL_append_WB_cmd(pxmit_frame, (u16)v1, (u8)v2, 0xFF); } else { - odm_ConfigMAC_8188E(dm_odm, v1, (u1Byte)v2); + odm_ConfigMAC_8188E(dm_odm, v1, (u8)v2); } READ_NEXT_PAIR(v1, v2, i); diff --git a/hal/HalHWImg8188E_RF.c b/hal/HalHWImg8188E_RF.c index e7fe440..06c363b 100644 --- a/hal/HalHWImg8188E_RF.c +++ b/hal/HalHWImg8188E_RF.c @@ -22,12 +22,12 @@ #include -static bool CheckCondition(const u4Byte Condition, const u4Byte Hex) +static bool CheckCondition(const u32 Condition, const u32 Hex) { - u4Byte _board = (Hex & 0x000000FF); - u4Byte _interface = (Hex & 0x0000FF00) >> 8; - u4Byte _platform = (Hex & 0x00FF0000) >> 16; - u4Byte cond = Condition; + u32 _board = (Hex & 0x000000FF); + u32 _interface = (Hex & 0x0000FF00) >> 8; + u32 _platform = (Hex & 0x00FF0000) >> 16; + u32 cond = Condition; if (Condition == 0xCDCDCDCD) return true; @@ -53,7 +53,7 @@ static bool CheckCondition(const u4Byte Condition, const u4Byte Hex) * RadioA_1T.TXT ******************************************************************************/ -static u4Byte Array_RadioA_1T_8188E[] = { +static u32 Array_RadioA_1T_8188E[] = { 0x000, 0x00030000, 0x008, 0x00084000, 0x018, 0x00000407, @@ -161,15 +161,15 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm) { i += 2; v1 = Array[i]; \ v2 = Array[i+1]; } while (0) - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = pDM_Odm->SupportPlatform; - u1Byte interfaceValue = pDM_Odm->SupportInterface; - u1Byte board = pDM_Odm->BoardType; - u4Byte ArrayLen = sizeof(Array_RadioA_1T_8188E)/sizeof(u4Byte); - pu4Byte Array = Array_RadioA_1T_8188E; + u32 hex = 0; + u32 i = 0; + u16 count = 0; + u32 *ptr_array = NULL; + u8 platform = pDM_Odm->SupportPlatform; + u8 interfaceValue = pDM_Odm->SupportInterface; + u8 board = pDM_Odm->BoardType; + u32 ArrayLen = sizeof(Array_RadioA_1T_8188E)/sizeof(u32); + u32 *Array = Array_RadioA_1T_8188E; bool biol = false; struct adapter *Adapter = pDM_Odm->Adapter; struct xmit_frame *pxmit_frame; @@ -191,8 +191,8 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm) } for (i = 0; i < ArrayLen; i += 2) { - u4Byte v1 = Array[i]; - u4Byte v2 = Array[i+1]; + u32 v1 = Array[i]; + u32 v2 = Array[i+1]; /* This (offset, data) pair meets the condition. */ if (v1 < 0xCDCDCDCD) { @@ -213,7 +213,7 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm) else if (v1 == 0xf9) rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 1); else - rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A, (u2Byte)v1, v2, bRFRegOffsetMask); + rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A, (u16)v1, v2, bRFRegOffsetMask); } else { odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2); } @@ -249,7 +249,7 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm) else if (v1 == 0xf9) rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 1); else - rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A, (u2Byte)v1, v2, bRFRegOffsetMask); + rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A, (u16)v1, v2, bRFRegOffsetMask); } else { odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2); } diff --git a/hal/HalPhyRf.c b/hal/HalPhyRf.c index 7bfdc63..a11d711 100644 --- a/hal/HalPhyRf.c +++ b/hal/HalPhyRf.c @@ -26,7 +26,7 @@ void ODM_ResetIQKResult(struct odm_dm_struct *pDM_Odm) { - u1Byte i; + u8 i; struct adapter *adapt = pDM_Odm->Adapter; if (!IS_HARDWARE_TYPE_8192D(adapt)) @@ -52,16 +52,16 @@ void ODM_ResetIQKResult(struct odm_dm_struct *pDM_Odm) } } -u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) +u8 ODM_GetRightChnlPlaceforIQK(u8 chnl) { - u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = { + u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, 161, 163, 165 }; - u1Byte place = chnl; + u8 place = chnl; if (chnl > 14) { for (place = 14; place < sizeof(channel_all); place++) { diff --git a/hal/HalPhyRf_8188e.c b/hal/HalPhyRf_8188e.c index 084b841..4095d52 100644 --- a/hal/HalPhyRf_8188e.c +++ b/hal/HalPhyRf_8188e.c @@ -48,12 +48,12 @@ * 04/23/2012 MHC Adjust TX agc directly not throughput BB digital. * *---------------------------------------------------------------------------*/ -void ODM_TxPwrTrackAdjust88E(struct odm_dm_struct *dm_odm, u1Byte Type,/* 0 = OFDM, 1 = CCK */ - pu1Byte pDirection, /* 1 = +(increase) 2 = -(decrease) */ - pu4Byte pOutWriteVal /* Tx tracking CCK/OFDM BB swing index adjust */ +void ODM_TxPwrTrackAdjust88E(struct odm_dm_struct *dm_odm, u8 Type,/* 0 = OFDM, 1 = CCK */ + u8 *pDirection, /* 1 = +(increase) 2 = -(decrease) */ + u32 *pOutWriteVal /* Tx tracking CCK/OFDM BB swing index adjust */ ) { - u1Byte pwr_value = 0; + u8 pwr_value = 0; /* Tx power tracking BB swing table. */ /* The base index = 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB */ if (Type == 0) { /* For OFDM afjust */ @@ -130,20 +130,20 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( ) { struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, offset; - u1Byte ThermalValue_AVG_count = 0; - u4Byte ThermalValue_AVG = 0; - s4Byte ele_A = 0, ele_D, TempCCk, X, value32; - s4Byte Y, ele_C = 0; - s1Byte OFDM_index[2], CCK_index = 0; - s1Byte OFDM_index_old[2] = {0, 0}, CCK_index_old = 0; - u4Byte i = 0, j = 0; + u8 ThermalValue = 0, delta, delta_LCK, delta_IQK, offset; + u8 ThermalValue_AVG_count = 0; + u32 ThermalValue_AVG = 0; + s32 ele_A = 0, ele_D, TempCCk, X, value32; + s32 Y, ele_C = 0; + s8 OFDM_index[2], CCK_index = 0; + s8 OFDM_index_old[2] = {0, 0}, CCK_index_old = 0; + u32 i = 0, j = 0; bool is2t = false; bool bInteralPA = false; - u1Byte OFDM_min_index = 6, rf; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */ - u1Byte Indexforchannel = 0/*GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/; - s1Byte OFDM_index_mapping[2][index_mapping_NUM_88E] = { + u8 OFDM_min_index = 6, rf; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */ + u8 Indexforchannel = 0/*GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/; + s8 OFDM_index_mapping[2][index_mapping_NUM_88E] = { {0, 0, 2, 3, 4, 4, /* 2.4G, decrease power */ 5, 6, 7, 7, 8, 9, 10, 10, 11}, /* For lower temperature, 20120220 updated on 20120220. */ @@ -151,7 +151,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( -4, -4, -4, -5, -7, -8, -9, -9, -10}, }; - u1Byte Thermal_mapping[2][index_mapping_NUM_88E] = { + u8 Thermal_mapping[2][index_mapping_NUM_88E] = { {0, 2, 4, 6, 8, 10, /* 2.4G, decrease power */ 12, 14, 16, 18, 20, 22, 24, 26, 27}, @@ -174,7 +174,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( ("===>dm_TXPowerTrackingCallback_ThermalMeter_8188E txpowercontrol %d\n", dm_odm->RFCalibrateInfo.TxPowerTrackControl)); - ThermalValue = (u1Byte)ODM_GetRFReg(dm_odm, RF_PATH_A, RF_T_METER_88E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ + ThermalValue = (u8)ODM_GetRFReg(dm_odm, RF_PATH_A, RF_T_METER_88E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", @@ -190,8 +190,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( ele_D = ODM_GetBBReg(dm_odm, rOFDM0_XATxIQImbalance, bMaskDWord)&bMaskOFDM_D; for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) { /* find the index */ if (ele_D == (OFDMSwingTable[i]&bMaskOFDM_D)) { - OFDM_index_old[0] = (u1Byte)i; - dm_odm->BbSwingIdxOfdmBase = (u1Byte)i; + OFDM_index_old[0] = (u8)i; + dm_odm->BbSwingIdxOfdmBase = (u8)i; ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Initial pathA ele_D reg0x%x = 0x%x, OFDM_index=0x%x\n", rOFDM0_XATxIQImbalance, ele_D, OFDM_index_old[0])); @@ -204,7 +204,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( ele_D = ODM_GetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, bMaskDWord)&bMaskOFDM_D; for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) { /* find the index */ if (ele_D == (OFDMSwingTable[i]&bMaskOFDM_D)) { - OFDM_index_old[1] = (u1Byte)i; + OFDM_index_old[1] = (u8)i; ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Initial pathB ele_D reg0x%x = 0x%x, OFDM_index=0x%x\n", rOFDM0_XBTxIQImbalance, ele_D, OFDM_index_old[1])); @@ -219,8 +219,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( for (i = 0; i < CCK_TABLE_SIZE; i++) { if (dm_odm->RFCalibrateInfo.bCCKinCH14) { if (ODM_CompareMemory(dm_odm, (void *)&TempCCk, (void *)&CCKSwingTable_Ch14[i][2], 4) == 0) { - CCK_index_old = (u1Byte)i; - dm_odm->BbSwingIdxCckBase = (u1Byte)i; + CCK_index_old = (u8)i; + dm_odm->BbSwingIdxCckBase = (u8)i; ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch 14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, dm_odm->RFCalibrateInfo.bCCKinCH14)); @@ -231,8 +231,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( ("RegA24: 0x%X, CCKSwingTable_Ch1_Ch13[%d][2]: CCKSwingTable_Ch1_Ch13[i][2]: 0x%X\n", TempCCk, i, CCKSwingTable_Ch1_Ch13[i][2])); if (ODM_CompareMemory(dm_odm, (void *)&TempCCk, (void *)&CCKSwingTable_Ch1_Ch13[i][2], 4) == 0) { - CCK_index_old = (u1Byte)i; - dm_odm->BbSwingIdxCckBase = (u1Byte)i; + CCK_index_old = (u8)i; + dm_odm->BbSwingIdxCckBase = (u8)i; ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, dm_odm->RFCalibrateInfo.bCCKinCH14)); @@ -269,7 +269,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( } if (ThermalValue_AVG_count) { - ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count); + ThermalValue = (u8)(ThermalValue_AVG / ThermalValue_AVG_count); ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("AVG Thermal Meter = 0x%x\n", ThermalValue)); } @@ -374,13 +374,13 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( dm_odm->RFCalibrateInfo.bDoneTxpower = true; /* Adujst OFDM Ant_A according to IQK result */ - ele_D = (OFDMSwingTable[(u1Byte)OFDM_index[0]] & 0xFFC00000)>>22; + ele_D = (OFDMSwingTable[(u8)OFDM_index[0]] & 0xFFC00000)>>22; X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][0]; Y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][1]; /* Revse TX power table. */ - dm_odm->BbSwingIdxOfdm = (u1Byte)OFDM_index[0]; - dm_odm->BbSwingIdxCck = (u1Byte)CCK_index; + dm_odm->BbSwingIdxOfdm = (u8)OFDM_index[0]; + dm_odm->BbSwingIdxCck = (u8)CCK_index; if (dm_odm->BbSwingIdxOfdmCurrent != dm_odm->BbSwingIdxOfdm) { dm_odm->BbSwingIdxOfdmCurrent = dm_odm->BbSwingIdxOfdm; @@ -408,10 +408,10 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("TxPwrTracking for path A: X=0x%x, Y=0x%x ele_A=0x%x ele_C=0x%x ele_D=0x%x 0xe94=0x%x 0xe9c=0x%x\n", - (u4Byte)X, (u4Byte)Y, (u4Byte)ele_A, (u4Byte)ele_C, (u4Byte)ele_D, (u4Byte)X, (u4Byte)Y)); + (u32)X, (u32)Y, (u32)ele_A, (u32)ele_C, (u32)ele_D, (u32)X, (u32)Y)); if (is2t) { - ele_D = (OFDMSwingTable[(u1Byte)OFDM_index[1]] & 0xFFC00000)>>22; + ele_D = (OFDMSwingTable[(u8)OFDM_index[1]] & 0xFFC00000)>>22; /* new element A = element D x X */ X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][4]; @@ -437,15 +437,15 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( value32 = ((X * ele_D)>>7)&0x01; ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT28, value32); } else { - ODM_SetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[(u1Byte)OFDM_index[1]]); + ODM_SetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)OFDM_index[1]]); ODM_SetBBReg(dm_odm, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT28, 0x00); } ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("TxPwrTracking path B: X=0x%x, Y=0x%x ele_A=0x%x ele_C=0x%x ele_D=0x%x 0xeb4=0x%x 0xebc=0x%x\n", - (u4Byte)X, (u4Byte)Y, (u4Byte)ele_A, - (u4Byte)ele_C, (u4Byte)ele_D, (u4Byte)X, (u4Byte)Y)); + (u32)X, (u32)Y, (u32)ele_A, + (u32)ele_C, (u32)ele_D, (u32)X, (u32)Y)); } ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, @@ -474,11 +474,11 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( #define MAX_TOLERANCE 5 #define IQK_DELAY_TIME 1 /* ms */ -static u1Byte /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ +static u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ phy_PathA_IQK_8188E(struct adapter *adapt, bool configPathB) { - u4Byte regeac, regE94, regE9C, regEA4; - u1Byte result = 0x00; + u32 regeac, regE94, regE9C, regEA4; + u8 result = 0x00; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK!\n")); @@ -522,11 +522,11 @@ phy_PathA_IQK_8188E(struct adapter *adapt, bool configPathB) return result; } -static u1Byte /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ +static u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ phy_PathA_RxIQK(struct adapter *adapt, bool configPathB) { - u4Byte regeac, regE94, regE9C, regEA4, u4tmp; - u1Byte result = 0x00; + u32 regeac, regE94, regE9C, regEA4, u4tmp; + u8 result = 0x00; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK!\n")); @@ -650,11 +650,11 @@ phy_PathA_RxIQK(struct adapter *adapt, bool configPathB) return result; } -static u1Byte /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ +static u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ phy_PathB_IQK_8188E(struct adapter *adapt) { - u4Byte regeac, regeb4, regebc, regec4, regecc; - u1Byte result = 0x00; + u32 regeac, regeb4, regebc, regec4, regecc; + u8 result = 0x00; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK!\n")); @@ -703,10 +703,10 @@ phy_PathB_IQK_8188E(struct adapter *adapt) return result; } -static void patha_fill_iqk(struct adapter *adapt, bool iqkok, s4Byte result[][8], u1Byte final_candidate, bool txonly) +static void patha_fill_iqk(struct adapter *adapt, bool iqkok, s32 result[][8], u8 final_candidate, bool txonly) { - u4Byte Oldval_0, X, TX0_A, reg; - s4Byte Y, TX0_C; + u32 Oldval_0, X, TX0_A, reg; + s32 Y, TX0_C; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, @@ -756,10 +756,10 @@ static void patha_fill_iqk(struct adapter *adapt, bool iqkok, s4Byte result[][8] } } -static void pathb_fill_iqk(struct adapter *adapt, bool iqkok, s4Byte result[][8], u1Byte final_candidate, bool txonly) +static void pathb_fill_iqk(struct adapter *adapt, bool iqkok, s32 result[][8], u8 final_candidate, bool txonly) { - u4Byte Oldval_1, X, TX1_A, reg; - s4Byte Y, TX1_C; + u32 Oldval_1, X, TX1_A, reg; + s32 Y, TX1_C; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, @@ -814,9 +814,9 @@ static bool ODM_CheckPowerStatus(struct adapter *Adapter) return true; } -void _PHY_SaveADDARegisters(struct adapter *adapt, pu4Byte ADDAReg, pu4Byte ADDABackup, u4Byte RegisterNum) +void _PHY_SaveADDARegisters(struct adapter *adapt, u32 *ADDAReg, u32 *ADDABackup, u32 RegisterNum) { - u4Byte i; + u32 i; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; @@ -831,11 +831,11 @@ void _PHY_SaveADDARegisters(struct adapter *adapt, pu4Byte ADDAReg, pu4Byte ADDA static void _PHY_SaveMACRegisters( struct adapter *adapt, - pu4Byte MACReg, - pu4Byte MACBackup + u32 *MACReg, + u32 *MACBackup ) { - u4Byte i; + u32 i; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n")); @@ -845,9 +845,9 @@ static void _PHY_SaveMACRegisters( MACBackup[i] = ODM_Read4Byte(dm_odm, MACReg[i]); } -static void reload_adda_reg(struct adapter *adapt, pu4Byte ADDAReg, pu4Byte ADDABackup, u4Byte RegiesterNum) +static void reload_adda_reg(struct adapter *adapt, u32 *ADDAReg, u32 *ADDABackup, u32 RegiesterNum) { - u4Byte i; + u32 i; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; @@ -859,17 +859,17 @@ static void reload_adda_reg(struct adapter *adapt, pu4Byte ADDAReg, pu4Byte ADDA static void _PHY_ReloadMACRegisters( struct adapter *adapt, - pu4Byte MACReg, - pu4Byte MACBackup + u32 *MACReg, + u32 *MACBackup ) { - u4Byte i; + u32 i; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n")); for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) { - ODM_Write1Byte(dm_odm, MACReg[i], (u1Byte)MACBackup[i]); + ODM_Write1Byte(dm_odm, MACReg[i], (u8)MACBackup[i]); } ODM_Write4Byte(dm_odm, MACReg[i], MACBackup[i]); } @@ -877,13 +877,13 @@ _PHY_ReloadMACRegisters( void _PHY_PathADDAOn( struct adapter *adapt, - pu4Byte ADDAReg, + u32 *ADDAReg, bool isPathAOn, bool is2t ) { - u4Byte pathOn; - u4Byte i; + u32 pathOn; + u32 i; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ADDA ON.\n")); @@ -903,11 +903,11 @@ _PHY_PathADDAOn( void _PHY_MACSettingCalibration( struct adapter *adapt, - pu4Byte MACReg, - pu4Byte MACBackup + u32 *MACReg, + u32 *MACBackup ) { - u4Byte i = 0; + u32 i = 0; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; @@ -916,9 +916,9 @@ _PHY_MACSettingCalibration( ODM_Write1Byte(dm_odm, MACReg[i], 0x3F); for (i = 1; i < (IQK_MAC_REG_NUM - 1); i++) { - ODM_Write1Byte(dm_odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT3))); + ODM_Write1Byte(dm_odm, MACReg[i], (u8)(MACBackup[i]&(~BIT3))); } - ODM_Write1Byte(dm_odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT5))); + ODM_Write1Byte(dm_odm, MACReg[i], (u8)(MACBackup[i]&(~BIT5))); } void @@ -941,7 +941,7 @@ static void _PHY_PIModeSwitch( bool PIMode ) { - u4Byte mode; + u32 mode; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; @@ -954,18 +954,18 @@ static void _PHY_PIModeSwitch( static bool phy_SimularityCompare_8188E( struct adapter *adapt, - s4Byte resulta[][8], - u1Byte c1, - u1Byte c2 + s32 resulta[][8], + u8 c1, + u8 c2 ) { - u4Byte i, j, diff, sim_bitmap, bound = 0; + u32 i, j, diff, sim_bitmap, bound = 0; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - u1Byte final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */ + u8 final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */ bool result = true; bool is2t; - s4Byte tmp1 = 0, tmp2 = 0; + s32 tmp1 = 0, tmp2 = 0; if ((dm_odm->RFType == ODM_2T2R) || (dm_odm->RFType == ODM_2T3R) || (dm_odm->RFType == ODM_2T4R)) is2t = true; @@ -1051,13 +1051,13 @@ static bool phy_SimularityCompare_8188E( } } -static void phy_IQCalibrate_8188E(struct adapter *adapt, s4Byte result[][8], u1Byte t, bool is2t) +static void phy_IQCalibrate_8188E(struct adapter *adapt, s32 result[][8], u8 t, bool is2t) { struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - u4Byte i; - u1Byte PathAOK, PathBOK; - u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = { + u32 i; + u8 PathAOK, PathBOK; + u32 ADDA_REG[IQK_ADDA_REG_NUM] = { rFPGA0_XCD_SwitchControl, rBlue_Tooth, rRx_Wait_CCA, rTx_CCK_RFON, rTx_CCK_BBON, rTx_OFDM_RFON, @@ -1066,19 +1066,19 @@ static void phy_IQCalibrate_8188E(struct adapter *adapt, s4Byte result[][8], u1B rRx_OFDM, rRx_Wait_RIFS, rRx_TO_Rx, rStandby, rSleep, rPMPD_ANAEN }; - u4Byte IQK_MAC_REG[IQK_MAC_REG_NUM] = { + u32 IQK_MAC_REG[IQK_MAC_REG_NUM] = { REG_TXPAUSE, REG_BCN_CTRL, REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; /* since 92C & 92D have the different define in IQK_BB_REG */ - u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { + u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = { rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD }; - u4Byte retryCount = 9; + u32 retryCount = 9; if (*(dm_odm->mp_mode) == 1) retryCount = 9; else @@ -1098,7 +1098,7 @@ static void phy_IQCalibrate_8188E(struct adapter *adapt, s4Byte result[][8], u1B _PHY_PathADDAOn(adapt, ADDA_REG, true, is2t); if (t == 0) - dm_odm->RFCalibrateInfo.bRfPiEnable = (u1Byte)ODM_GetBBReg(dm_odm, rFPGA0_XA_HSSIParameter1, BIT(8)); + dm_odm->RFCalibrateInfo.bRfPiEnable = (u8)ODM_GetBBReg(dm_odm, rFPGA0_XA_HSSIParameter1, BIT(8)); if (!dm_odm->RFCalibrateInfo.bRfPiEnable) { /* Switch BB to PI mode to do IQ Calibration. */ @@ -1222,8 +1222,8 @@ static void phy_IQCalibrate_8188E(struct adapter *adapt, s4Byte result[][8], u1B static void phy_LCCalibrate_8188E(struct adapter *adapt, bool is2t) { - u1Byte tmpreg; - u4Byte RF_Amode = 0, RF_Bmode = 0, LC_Cal; + u8 tmpreg; + u32 RF_Amode = 0, RF_Bmode = 0, LC_Cal; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; @@ -1282,28 +1282,28 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt, bool is2t) #define APK_CURVE_REG_NUM 4 #define PATH_NUM 2 -static void phy_APCalibrate_8188E(struct adapter *adapt, s1Byte delta, bool is2t) +static void phy_APCalibrate_8188E(struct adapter *adapt, s8 delta, bool is2t) { struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - u4Byte regD[PATH_NUM]; - u4Byte tmpreg, index, offset, apkbound; - u1Byte path, i, pathbound = PATH_NUM; - u4Byte BB_backup[APK_BB_REG_NUM]; - u4Byte BB_REG[APK_BB_REG_NUM] = { + u32 regD[PATH_NUM]; + u32 tmpreg, index, offset, apkbound; + u8 path, i, pathbound = PATH_NUM; + u32 BB_backup[APK_BB_REG_NUM]; + u32 BB_REG[APK_BB_REG_NUM] = { rFPGA1_TxBlock, rOFDM0_TRxPathEnable, rFPGA0_RFMOD, rOFDM0_TRMuxPar, rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; - u4Byte BB_AP_MODE[APK_BB_REG_NUM] = { + u32 BB_AP_MODE[APK_BB_REG_NUM] = { 0x00000020, 0x00a05430, 0x02040000, 0x000800e4, 0x00204000 }; - u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = { + u32 BB_normal_AP_MODE[APK_BB_REG_NUM] = { 0x00000020, 0x00a05430, 0x02040000, 0x000800e4, 0x22204000 }; - u4Byte AFE_backup[IQK_ADDA_REG_NUM]; - u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { + u32 AFE_backup[IQK_ADDA_REG_NUM]; + u32 AFE_REG[IQK_ADDA_REG_NUM] = { rFPGA0_XCD_SwitchControl, rBlue_Tooth, rRx_Wait_CCA, rTx_CCK_RFON, rTx_CCK_BBON, rTx_OFDM_RFON, @@ -1313,47 +1313,47 @@ static void phy_APCalibrate_8188E(struct adapter *adapt, s1Byte delta, bool is2t rRx_TO_Rx, rStandby, rSleep, rPMPD_ANAEN }; - u4Byte MAC_backup[IQK_MAC_REG_NUM]; - u4Byte MAC_REG[IQK_MAC_REG_NUM] = { + u32 MAC_backup[IQK_MAC_REG_NUM]; + u32 MAC_REG[IQK_MAC_REG_NUM] = { REG_TXPAUSE, REG_BCN_CTRL, REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; - u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { + u32 APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} }; - u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { + u32 APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, /* path settings equal to path b settings */ {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} }; - u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { + u32 APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} }; - u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { + u32 APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, /* path settings equal to path b settings */ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} }; - u4Byte AFE_on_off[PATH_NUM] = { + u32 AFE_on_off[PATH_NUM] = { 0x04db25a4, 0x0b1b25a4}; /* path A on path B off / path A off path B on */ - u4Byte APK_offset[PATH_NUM] = { + u32 APK_offset[PATH_NUM] = { rConfig_AntA, rConfig_AntB}; - u4Byte APK_normal_offset[PATH_NUM] = { + u32 APK_normal_offset[PATH_NUM] = { rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; - u4Byte APK_value[PATH_NUM] = { + u32 APK_value[PATH_NUM] = { 0x92fc0000, 0x12fc0000}; - u4Byte APK_normal_value[PATH_NUM] = { + u32 APK_normal_value[PATH_NUM] = { 0x92680000, 0x12680000}; - s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { + s8 APK_delta_mapping[APK_BB_REG_NUM][13] = { {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, @@ -1361,21 +1361,21 @@ static void phy_APCalibrate_8188E(struct adapter *adapt, s1Byte delta, bool is2t {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} }; - u4Byte APK_normal_setting_value_1[13] = { + u32 APK_normal_setting_value_1[13] = { 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, 0x12680000, 0x00880000, 0x00880000 }; - u4Byte APK_normal_setting_value_2[16] = { + u32 APK_normal_setting_value_2[16] = { 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, 0x00050006 }; - u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; /* val_1_1a, val_1_2a, val_2a, val_3a, val_4a */ - s4Byte BB_offset, delta_V, delta_offset; + u32 APK_result[PATH_NUM][APK_BB_REG_NUM]; /* val_1_1a, val_1_2a, val_2a, val_3a, val_4a */ + s32 BB_offset, delta_V, delta_offset; if (*(dm_odm->mp_mode) == 1) { struct mpt_context *pMptCtx = &(adapt->mppriv.MptCtx); @@ -1684,13 +1684,13 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery) struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; struct mpt_context *pMptCtx = &(adapt->mppriv.MptCtx); - s4Byte result[4][8]; /* last is final result */ - u1Byte i, final_candidate, Indexforchannel; + s32 result[4][8]; /* last is final result */ + u8 i, final_candidate, Indexforchannel; bool pathaok, pathbok; - s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC; + s32 RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC; bool is12simular, is13simular, is23simular; bool singletone = false, carrier_sup = false; - u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { + u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = { rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, @@ -1834,7 +1834,7 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery) void PHY_LCCalibrate_8188E(struct adapter *adapt) { bool singletone = false, carrier_sup = false; - u4Byte timeout = 2000, timecount = 0; + u32 timeout = 2000, timecount = 0; struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; struct mpt_context *pMptCtx = &(adapt->mppriv.MptCtx); @@ -1869,7 +1869,7 @@ void PHY_LCCalibrate_8188E(struct adapter *adapt) ("LCK:Finish!!!interface %d\n", dm_odm->InterfaceIndex)); } -void PHY_APCalibrate_8188E(struct adapter *adapt, s1Byte delta) +void PHY_APCalibrate_8188E(struct adapter *adapt, s8 delta) { struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); struct odm_dm_struct *dm_odm = &pHalData->odmpriv; @@ -1897,7 +1897,7 @@ static void phy_setrfpathswitch_8188e(struct adapter *adapt, bool main, bool is2 struct odm_dm_struct *dm_odm = &pHalData->odmpriv; if (!adapt->hw_init_completed) { - u1Byte u1btmp; + u8 u1btmp; u1btmp = ODM_Read1Byte(dm_odm, REG_LEDCFG2) | BIT7; ODM_Write1Byte(dm_odm, REG_LEDCFG2, u1btmp); ODM_SetBBReg(dm_odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); diff --git a/hal/odm.c b/hal/odm.c index 77443fc..f047f90 100644 --- a/hal/odm.c +++ b/hal/odm.c @@ -22,7 +22,7 @@ #include "odm_precomp.h" -static const u2Byte dB_Invert_Table[8][12] = { +static const u16 dB_Invert_Table[8][12] = { {1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4}, {4, 5, 6, 6, 7, 8, 9, 10, 11, 13, 14, 16}, {18, 20, 22, 25, 28, 32, 35, 40, 45, 50, 56, 63}, @@ -34,7 +34,7 @@ static const u2Byte dB_Invert_Table[8][12] = { }; /* avoid to warn in FreeBSD ==> To DO modify */ -static u4Byte EDCAParam[HT_IOT_PEER_MAX][3] = { +static u32 EDCAParam[HT_IOT_PEER_MAX][3] = { /* UL DL */ {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 0:unknown AP */ {0xa44f, 0x5ea44f, 0x5e431c}, /* 1:realtek AP */ @@ -49,7 +49,7 @@ static u4Byte EDCAParam[HT_IOT_PEER_MAX][3] = { }; /* Global var */ -u4Byte OFDMSwingTable[OFDM_TABLE_SIZE_92D] = { +u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = { 0x7f8001fe, /* 0, +6.0dB */ 0x788001e2, /* 1, +5.5dB */ 0x71c001c7, /* 2, +5.0dB */ @@ -95,7 +95,7 @@ u4Byte OFDMSwingTable[OFDM_TABLE_SIZE_92D] = { 0x0b40002d,/* 42, -15.0dB */ }; -u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { +u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */ @@ -131,7 +131,7 @@ u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */ }; -u1Byte CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = { +u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = { {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */ @@ -254,52 +254,52 @@ void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm) } /* Init /.. Fixed HW value. Only init time. */ -void ODM_CmnInfoInit(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u4Byte Value) +void ODM_CmnInfoInit(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u32 Value) { /* This section is used for init value */ switch (CmnInfo) { /* Fixed ODM value. */ case ODM_CMNINFO_ABILITY: - pDM_Odm->SupportAbility = (u4Byte)Value; + pDM_Odm->SupportAbility = (u32)Value; break; case ODM_CMNINFO_PLATFORM: - pDM_Odm->SupportPlatform = (u1Byte)Value; + pDM_Odm->SupportPlatform = (u8)Value; break; case ODM_CMNINFO_INTERFACE: - pDM_Odm->SupportInterface = (u1Byte)Value; + pDM_Odm->SupportInterface = (u8)Value; break; case ODM_CMNINFO_MP_TEST_CHIP: - pDM_Odm->bIsMPChip = (u1Byte)Value; + pDM_Odm->bIsMPChip = (u8)Value; break; case ODM_CMNINFO_IC_TYPE: pDM_Odm->SupportICType = Value; break; case ODM_CMNINFO_CUT_VER: - pDM_Odm->CutVersion = (u1Byte)Value; + pDM_Odm->CutVersion = (u8)Value; break; case ODM_CMNINFO_FAB_VER: - pDM_Odm->FabVersion = (u1Byte)Value; + pDM_Odm->FabVersion = (u8)Value; break; case ODM_CMNINFO_RF_TYPE: - pDM_Odm->RFType = (u1Byte)Value; + pDM_Odm->RFType = (u8)Value; break; case ODM_CMNINFO_RF_ANTENNA_TYPE: - pDM_Odm->AntDivType = (u1Byte)Value; + pDM_Odm->AntDivType = (u8)Value; break; case ODM_CMNINFO_BOARD_TYPE: - pDM_Odm->BoardType = (u1Byte)Value; + pDM_Odm->BoardType = (u8)Value; break; case ODM_CMNINFO_EXT_LNA: - pDM_Odm->ExtLNA = (u1Byte)Value; + pDM_Odm->ExtLNA = (u8)Value; break; case ODM_CMNINFO_EXT_PA: - pDM_Odm->ExtPA = (u1Byte)Value; + pDM_Odm->ExtPA = (u8)Value; break; case ODM_CMNINFO_EXT_TRSW: - pDM_Odm->ExtTRSW = (u1Byte)Value; + pDM_Odm->ExtTRSW = (u8)Value; break; case ODM_CMNINFO_PATCH_ID: - pDM_Odm->PatchID = (u1Byte)Value; + pDM_Odm->PatchID = (u8)Value; break; case ODM_CMNINFO_BINHCT_TEST: pDM_Odm->bInHctTest = (bool)Value; @@ -331,31 +331,31 @@ void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def Cmn switch (CmnInfo) { /* Dynamic call by reference pointer. */ case ODM_CMNINFO_MAC_PHY_MODE: - pDM_Odm->pMacPhyMode = (u1Byte *)pValue; + pDM_Odm->pMacPhyMode = (u8 *)pValue; break; case ODM_CMNINFO_TX_UNI: - pDM_Odm->pNumTxBytesUnicast = (u8Byte *)pValue; + pDM_Odm->pNumTxBytesUnicast = (u64 *)pValue; break; case ODM_CMNINFO_RX_UNI: - pDM_Odm->pNumRxBytesUnicast = (u8Byte *)pValue; + pDM_Odm->pNumRxBytesUnicast = (u64 *)pValue; break; case ODM_CMNINFO_WM_MODE: - pDM_Odm->pWirelessMode = (u1Byte *)pValue; + pDM_Odm->pWirelessMode = (u8 *)pValue; break; case ODM_CMNINFO_BAND: - pDM_Odm->pBandType = (u1Byte *)pValue; + pDM_Odm->pBandType = (u8 *)pValue; break; case ODM_CMNINFO_SEC_CHNL_OFFSET: - pDM_Odm->pSecChOffset = (u1Byte *)pValue; + pDM_Odm->pSecChOffset = (u8 *)pValue; break; case ODM_CMNINFO_SEC_MODE: - pDM_Odm->pSecurity = (u1Byte *)pValue; + pDM_Odm->pSecurity = (u8 *)pValue; break; case ODM_CMNINFO_BW: - pDM_Odm->pBandWidth = (u1Byte *)pValue; + pDM_Odm->pBandWidth = (u8 *)pValue; break; case ODM_CMNINFO_CHNL: - pDM_Odm->pChannel = (u1Byte *)pValue; + pDM_Odm->pChannel = (u8 *)pValue; break; case ODM_CMNINFO_DMSP_GET_VALUE: pDM_Odm->pbGetValueFromOtherMac = (bool *)pValue; @@ -373,7 +373,7 @@ void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def Cmn pDM_Odm->pbPowerSaving = (bool *)pValue; break; case ODM_CMNINFO_ONE_PATH_CCA: - pDM_Odm->pOnePathCCA = (u1Byte *)pValue; + pDM_Odm->pOnePathCCA = (u8 *)pValue; break; case ODM_CMNINFO_DRV_STOP: pDM_Odm->pbDriverStopped = (bool *)pValue; @@ -385,13 +385,13 @@ void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def Cmn pDM_Odm->pinit_adpt_in_progress = (bool *)pValue; break; case ODM_CMNINFO_ANT_TEST: - pDM_Odm->pAntennaTest = (u1Byte *)pValue; + pDM_Odm->pAntennaTest = (u8 *)pValue; break; case ODM_CMNINFO_NET_CLOSED: pDM_Odm->pbNet_closed = (bool *)pValue; break; case ODM_CMNINFO_MP_MODE: - pDM_Odm->mp_mode = (u1Byte *)pValue; + pDM_Odm->mp_mode = (u8 *)pValue; break; /* To remove the compiler warning, must add an empty default statement to handle the other values. */ default: @@ -400,7 +400,7 @@ void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def Cmn } } -void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u2Byte Index, void *pValue) +void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u16 Index, void *pValue) { /* Hook call by reference pointer. */ switch (CmnInfo) { @@ -416,17 +416,17 @@ void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info } /* Update Band/CHannel/.. The values are dynamic but non-per-packet. */ -void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u4Byte CmnInfo, u8Byte Value) +void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value) { /* */ /* This init variable may be changed in run time. */ /* */ switch (CmnInfo) { case ODM_CMNINFO_ABILITY: - pDM_Odm->SupportAbility = (u4Byte)Value; + pDM_Odm->SupportAbility = (u32)Value; break; case ODM_CMNINFO_RF_TYPE: - pDM_Odm->RFType = (u1Byte)Value; + pDM_Odm->RFType = (u8)Value; break; case ODM_CMNINFO_WIFI_DIRECT: pDM_Odm->bWIFI_Direct = (bool)Value; @@ -438,19 +438,19 @@ void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u4Byte CmnInfo, u8Byte Val pDM_Odm->bLinked = (bool)Value; break; case ODM_CMNINFO_RSSI_MIN: - pDM_Odm->RSSI_Min = (u1Byte)Value; + pDM_Odm->RSSI_Min = (u8)Value; break; case ODM_CMNINFO_DBG_COMP: pDM_Odm->DebugComponents = Value; break; case ODM_CMNINFO_DBG_LEVEL: - pDM_Odm->DebugLevel = (u4Byte)Value; + pDM_Odm->DebugLevel = (u32)Value; break; case ODM_CMNINFO_RA_THRESHOLD_HIGH: - pDM_Odm->RateAdaptive.HighRSSIThresh = (u1Byte)Value; + pDM_Odm->RateAdaptive.HighRSSIThresh = (u8)Value; break; case ODM_CMNINFO_RA_THRESHOLD_LOW: - pDM_Odm->RateAdaptive.LowRSSIThresh = (u1Byte)Value; + pDM_Odm->RateAdaptive.LowRSSIThresh = (u8)Value; break; } } @@ -458,7 +458,7 @@ void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u4Byte CmnInfo, u8Byte Val void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm) { pDM_Odm->bCckHighPower = (bool) ODM_GetBBReg(pDM_Odm, 0x824, BIT9); - pDM_Odm->RFPathRxEnable = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xc04, 0x0F); + pDM_Odm->RFPathRxEnable = (u8) ODM_GetBBReg(pDM_Odm, 0xc04, 0x0F); if (pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D)) pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; if (pDM_Odm->SupportICType & (ODM_RTL8723A)) @@ -469,8 +469,8 @@ void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm) void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm) { - u1Byte EntryCnt = 0; - u1Byte i; + u8 EntryCnt = 0; + u8 i; struct sta_info *pEntry; if (*(pDM_Odm->pBandWidth) == ODM_BW40M) { @@ -558,7 +558,7 @@ void odm_CmnInfoUpdate_Debug(struct odm_dm_struct *pDM_Odm) * When Who Remark * *---------------------------------------------------------------------------*/ -static void ODM_ChangeDynamicInitGainThresh(struct odm_dm_struct *pDM_Odm, u4Byte DM_Type, u4Byte DM_Value) +static void ODM_ChangeDynamicInitGainThresh(struct odm_dm_struct *pDM_Odm, u32 DM_Type, u32 DM_Value) { struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; @@ -573,15 +573,15 @@ static void ODM_ChangeDynamicInitGainThresh(struct odm_dm_struct *pDM_Odm, u4Byt } else if (DM_Type == RT_TYPE_BACKOFF) { if (DM_Value > 30) DM_Value = 30; - pDM_DigTable->BackoffVal = (u1Byte)DM_Value; + pDM_DigTable->BackoffVal = (u8)DM_Value; } else if (DM_Type == RT_TYPE_RX_GAIN_MIN) { if (DM_Value == 0) DM_Value = 0x1; - pDM_DigTable->rx_gain_range_min = (u1Byte)DM_Value; + pDM_DigTable->rx_gain_range_min = (u8)DM_Value; } else if (DM_Type == RT_TYPE_RX_GAIN_MAX) { if (DM_Value > 0x50) DM_Value = 0x50; - pDM_DigTable->rx_gain_range_max = (u1Byte)DM_Value; + pDM_DigTable->rx_gain_range_max = (u8)DM_Value; } } /* DM_ChangeDynamicInitGainThresh */ @@ -600,7 +600,7 @@ static int getIGIForDiff(int value_IGI) } } -void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u1Byte CurrentIGI) +void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI) { struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; @@ -649,9 +649,9 @@ void odm_DIGbyRSSI_LPS(struct odm_dm_struct *pDM_Odm) struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; struct false_alarm_stats *pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; - u1Byte RSSI_Lower = DM_DIG_MIN_NIC; /* 0x1E or 0x1C */ - u1Byte bFwCurrentInPSMode = false; - u1Byte CurrentIGI = pDM_Odm->RSSI_Min; + u8 RSSI_Lower = DM_DIG_MIN_NIC; /* 0x1E or 0x1C */ + u8 bFwCurrentInPSMode = false; + u8 CurrentIGI = pDM_Odm->RSSI_Min; if (!(pDM_Odm->SupportICType & (ODM_RTL8723A | ODM_RTL8188E))) return; @@ -694,7 +694,7 @@ void odm_DIGInit(struct odm_dm_struct *pDM_Odm) { struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; - pDM_DigTable->CurIGValue = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm)); + pDM_DigTable->CurIGValue = (u8) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm)); pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; pDM_DigTable->FALowThresh = DM_false_ALARM_THRESH_LOW; @@ -728,11 +728,11 @@ void odm_DIG(struct odm_dm_struct *pDM_Odm) struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; struct false_alarm_stats *pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; struct rx_hpc *pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - u1Byte DIG_Dynamic_MIN; - u1Byte DIG_MaxOfMin; + u8 DIG_Dynamic_MIN; + u8 DIG_MaxOfMin; bool FirstConnect, FirstDisConnect; - u1Byte dm_dig_max, dm_dig_min; - u1Byte CurrentIGI = pDM_DigTable->CurIGValue; + u8 dm_dig_max, dm_dig_min; + u8 CurrentIGI = pDM_DigTable->CurIGValue; ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()==>\n")); if ((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) || (!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) { @@ -840,7 +840,7 @@ void odm_DIG(struct odm_dm_struct *pDM_Odm) (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) { /* 1 Lower Bound for 88E AntDiv */ if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) { - DIG_Dynamic_MIN = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; + DIG_Dynamic_MIN = (u8) pDM_DigTable->AntDiv_RSSI_max; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d\n", pDM_DigTable->AntDiv_RSSI_max)); @@ -963,7 +963,7 @@ void odm_DIG(struct odm_dm_struct *pDM_Odm) void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm) { - u4Byte ret_value; + u32 ret_value; struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) @@ -1071,7 +1071,7 @@ void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm) void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm) { struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; - u1Byte CurCCK_CCAThres; + u8 CurCCK_CCAThres; struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); if (!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD|ODM_BB_FA_CNT))) @@ -1098,7 +1098,7 @@ void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm) ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); } -void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u1Byte CurCCK_CCAThres) +void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres) { struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; @@ -1176,11 +1176,11 @@ void odm_1R_CCA(struct odm_dm_struct *pDM_Odm) } } -void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u1Byte bForceInNormal) +void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) { struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; - u1Byte Rssi_Up_bound = 30; - u1Byte Rssi_Low_bound = 25; + u8 Rssi_Up_bound = 30; + u8 Rssi_Low_bound = 25; if (pDM_Odm->PatchID == 40) { /* RT_CID_819x_FUNAI_TV */ Rssi_Up_bound = 50; @@ -1263,11 +1263,11 @@ void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm) pOdmRA->LowRSSIThresh = 20; } -u4Byte ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u4Byte macid, u4Byte ra_mask, u1Byte rssi_level) +u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u8 rssi_level) { struct sta_info *pEntry; - u4Byte rate_bitmap = 0x0fffffff; - u1Byte WirelessMode; + u32 rate_bitmap = 0x0fffffff; + u8 WirelessMode; pEntry = pDM_Odm->pODM_StaInfo[macid]; if (!IS_STA_VALID(pEntry)) @@ -1384,7 +1384,7 @@ void odm_RefreshRateAdaptiveMaskMP(struct odm_dm_struct *pDM_Odm) void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm) { - u1Byte i; + u8 i; struct adapter *pAdapter = pDM_Odm->Adapter; if (pAdapter->bDriverStopped) { @@ -1416,13 +1416,13 @@ void odm_RefreshRateAdaptiveMaskAPADSL(struct odm_dm_struct *pDM_Odm) /* Return Value: bool */ /* - true: RATRState is changed. */ -bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s4Byte RSSI, bool bForceUpdate, pu1Byte pRATRState) +bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate, u8 *pRATRState) { struct odm_rate_adapt *pRA = &pDM_Odm->RateAdaptive; - const u1Byte GoUpGap = 5; - u1Byte HighRSSIThreshForRA = pRA->HighRSSIThresh; - u1Byte LowRSSIThreshForRA = pRA->LowRSSIThresh; - u1Byte RATRState; + const u8 GoUpGap = 5; + u8 HighRSSIThreshForRA = pRA->HighRSSIThresh; + u8 LowRSSIThreshForRA = pRA->LowRSSIThresh; + u8 RATRState; /* Threshold Adjustment: */ /* when RSSI state trends to go up one or two levels, make sure RSSI is high enough. */ @@ -1475,8 +1475,8 @@ void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm) static void odm_DynamicTxPowerSavePowerIndex(struct odm_dm_struct *pDM_Odm) { - u1Byte index; - u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; + u8 index; + u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; struct adapter *Adapter = pDM_Odm->Adapter; struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); @@ -1487,20 +1487,20 @@ static void odm_DynamicTxPowerSavePowerIndex(struct odm_dm_struct *pDM_Odm) static void odm_DynamicTxPowerRestorePowerIndex(struct odm_dm_struct *pDM_Odm) { - u1Byte index; + u8 index; struct adapter *Adapter = pDM_Odm->Adapter; struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; + u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; struct dm_priv *pdmpriv = &pHalData->dmpriv; for (index = 0; index < 6; index++) rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]); } -static void odm_DynamicTxPowerWritePowerIndex(struct odm_dm_struct *pDM_Odm, u1Byte Value) +static void odm_DynamicTxPowerWritePowerIndex(struct odm_dm_struct *pDM_Odm, u8 Value) { - u1Byte index; - u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; + u8 index; + u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; for (index = 0; index < 6; index++) ODM_Write1Byte(pDM_Odm, Power_Index_REG[index], Value); @@ -1788,11 +1788,11 @@ void odm_SwAntDivInit(struct odm_dm_struct *pDM_Odm) { } -void ODM_SwAntDivChkPerPktRssi(struct odm_dm_struct *pDM_Odm, u1Byte StationID, struct odm_phy_status_info *pPhyInfo) +void ODM_SwAntDivChkPerPktRssi(struct odm_dm_struct *pDM_Odm, u8 StationID, struct odm_phy_status_info *pPhyInfo) { } -void odm_SwAntDivChkAntSwitch(struct odm_dm_struct *pDM_Odm, u1Byte Step) +void odm_SwAntDivChkAntSwitch(struct odm_dm_struct *pDM_Odm, u8 Step) { } @@ -1815,8 +1815,8 @@ void odm_SwAntDivChkAntSwitchCallback(void *FunctionContext) static void odm_InitHybridAntDiv_88C_92D(struct odm_dm_struct *pDM_Odm) { struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - u1Byte bTxPathSel = 0; /* 0:Path-A 1:Path-B */ - u1Byte i; + u8 bTxPathSel = 0; /* 0:Path-A 1:Path-B */ + u8 i; ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_InitHybridAntDiv==============>\n")); @@ -1887,8 +1887,8 @@ void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm) } -static bool odm_StaDefAntSel(struct odm_dm_struct *pDM_Odm, u4Byte OFDM_Ant1_Cnt, - u4Byte OFDM_Ant2_Cnt, u4Byte CCK_Ant1_Cnt, u4Byte CCK_Ant2_Cnt, u1Byte *pDefAnt) +static bool odm_StaDefAntSel(struct odm_dm_struct *pDM_Odm, u32 OFDM_Ant1_Cnt, + u32 OFDM_Ant2_Cnt, u32 CCK_Ant1_Cnt, u32 CCK_Ant2_Cnt, u8 *pDefAnt) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_StaDefAntSelect==============>\n")); @@ -1926,7 +1926,7 @@ static bool odm_StaDefAntSel(struct odm_dm_struct *pDM_Odm, u4Byte OFDM_Ant1_Cnt return true; } -static void odm_SetRxIdleAnt(struct odm_dm_struct *pDM_Odm, u1Byte Ant, bool bDualPath) +static void odm_SetRxIdleAnt(struct odm_dm_struct *pDM_Odm, u8 Ant, bool bDualPath) { struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; @@ -1949,7 +1949,7 @@ static void odm_SetRxIdleAnt(struct odm_dm_struct *pDM_Odm, u1Byte Ant, bool bDu ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RxIdleAnt: %s Reg858=0x%x\n", (Ant == 1) ? "Ant1" : "Ant2", (Ant == 1) ? 0x65a9 : 0x569a)); } -void ODM_AntselStatistics_88C(struct odm_dm_struct *pDM_Odm, u1Byte MacId, u4Byte PWDBAll, bool isCCKrate) +void ODM_AntselStatistics_88C(struct odm_dm_struct *pDM_Odm, u8 MacId, u32 PWDBAll, bool isCCKrate) { struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; @@ -1977,8 +1977,8 @@ static void ODM_SetTxAntByTxInfo_88C_92D(struct odm_dm_struct *pDM_Odm) static void odm_HwAntDiv_92C_92D(struct odm_dm_struct *pDM_Odm) { struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - u4Byte RSSI_Min = 0xFF, RSSI, RSSI_Ant1, RSSI_Ant2; - u1Byte RxIdleAnt, i; + u32 RSSI_Min = 0xFF, RSSI, RSSI_Ant1, RSSI_Ant2; + u8 RxIdleAnt, i; bool bRet = false; struct sta_info *pEntry; @@ -2177,9 +2177,9 @@ dm_CheckEdcaTurbo_EXIT: /* need to ODM CE Platform */ /* move to here for ANT detection mechanism using */ -u4Byte GetPSDData(struct odm_dm_struct *pDM_Odm, unsigned int point, u1Byte initial_gain_psd) +u32 GetPSDData(struct odm_dm_struct *pDM_Odm, unsigned int point, u8 initial_gain_psd) { - u4Byte psd_report; + u32 psd_report; /* Set DCO frequency index, offset=(40MHz/SamplePts)*point */ ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); @@ -2192,16 +2192,16 @@ u4Byte GetPSDData(struct odm_dm_struct *pDM_Odm, unsigned int point, u1Byte init /* Read PSD report, Reg8B4[15:0] */ psd_report = ODM_GetBBReg(pDM_Odm, 0x8B4, bMaskDWord) & 0x0000FFFF; - psd_report = (u4Byte) (ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c); + psd_report = (u32) (ConvertTo_dB(psd_report))+(u32)(initial_gain_psd-0x1c); return psd_report; } -u4Byte ConvertTo_dB(u4Byte Value) +u32 ConvertTo_dB(u32 Value) { - u1Byte i; - u1Byte j; - u4Byte dB; + u8 i; + u8 j; + u32 dB; Value = Value & 0xFFFF; for (i = 0; i < 8; i++) { @@ -2241,18 +2241,18 @@ void ODM_SingleDualAntennaDefaultSetting(struct odm_dm_struct *pDM_Odm) /* 2 8723A ANT DETECT */ -static void odm_PHY_SaveAFERegisters(struct odm_dm_struct *pDM_Odm, pu4Byte AFEReg, pu4Byte AFEBackup, u4Byte RegisterNum) +static void odm_PHY_SaveAFERegisters(struct odm_dm_struct *pDM_Odm, u32 *AFEReg, u32 *AFEBackup, u32 RegisterNum) { - u4Byte i; + u32 i; /* RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n")); */ for (i = 0; i < RegisterNum; i++) AFEBackup[i] = ODM_GetBBReg(pDM_Odm, AFEReg[i], bMaskDWord); } -static void odm_PHY_ReloadAFERegisters(struct odm_dm_struct *pDM_Odm, pu4Byte AFEReg, pu4Byte AFEBackup, u4Byte RegiesterNum) +static void odm_PHY_ReloadAFERegisters(struct odm_dm_struct *pDM_Odm, u32 *AFEReg, u32 *AFEBackup, u32 RegiesterNum) { - u4Byte i; + u32 i; for (i = 0; i < RegiesterNum; i++) ODM_SetBBReg(pDM_Odm, AFEReg[i], bMaskDWord, AFEBackup[i]); @@ -2262,18 +2262,18 @@ static void odm_PHY_ReloadAFERegisters(struct odm_dm_struct *pDM_Odm, pu4Byte AF /* Description: */ /* Implement IQK single tone for RF DPK loopback and BB PSD scanning. */ /* This function is cooperated with BB team Neil. */ -bool ODM_SingleDualAntennaDetection(struct odm_dm_struct *pDM_Odm, u1Byte mode) +bool ODM_SingleDualAntennaDetection(struct odm_dm_struct *pDM_Odm, u8 mode) { struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - u4Byte CurrentChannel, RfLoopReg; - u1Byte n; - u4Byte Reg88c, Regc08, Reg874, Regc50; - u1Byte initial_gain = 0x5a; - u4Byte PSD_report_tmp; - u4Byte AntA_report = 0x0, AntB_report = 0x0, AntO_report = 0x0; + u32 CurrentChannel, RfLoopReg; + u8 n; + u32 Reg88c, Regc08, Reg874, Regc50; + u8 initial_gain = 0x5a; + u32 PSD_report_tmp; + u32 AntA_report = 0x0, AntB_report = 0x0, AntO_report = 0x0; bool bResult = true; - u4Byte AFE_Backup[16]; - u4Byte AFE_REG_8723A[16] = { + u32 AFE_Backup[16]; + u32 AFE_REG_8723A[16] = { rRx_Wait_CCA, rTx_CCK_RFON, rTx_CCK_BBON, rTx_OFDM_RFON, rTx_OFDM_BBON, rTx_To_Rx, diff --git a/hal/odm_HWConfig.c b/hal/odm_HWConfig.c index 0f65618..b53c333 100644 --- a/hal/odm_HWConfig.c +++ b/hal/odm_HWConfig.c @@ -27,7 +27,7 @@ #define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm)) #define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm)) -static u1Byte odm_QueryRxPwrPercentage(s1Byte AntPower) +static u8 odm_QueryRxPwrPercentage(s8 AntPower) { if ((AntPower <= -100) || (AntPower >= 20)) return 0; @@ -39,22 +39,22 @@ static u1Byte odm_QueryRxPwrPercentage(s1Byte AntPower) /* 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */ /* IF other SW team do not support the feature, remove this section.?? */ -static s4Byte odm_sig_patch_lenove(struct odm_dm_struct *dm_odm, s4Byte CurrSig) +static s32 odm_sig_patch_lenove(struct odm_dm_struct *dm_odm, s32 CurrSig) { - s4Byte RetSig; + s32 RetSig; return RetSig; } -static s4Byte odm_sig_patch_netcore(struct odm_dm_struct *dm_odm, s4Byte CurrSig) +static s32 odm_sig_patch_netcore(struct odm_dm_struct *dm_odm, s32 CurrSig) { - s4Byte RetSig; + s32 RetSig; return RetSig; } -static s4Byte odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s4Byte CurrSig) +static s32 odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s32 CurrSig) { - s4Byte RetSig; + s32 RetSig; if ((dm_odm->SupportInterface == ODM_ITRF_USB) || (dm_odm->SupportInterface == ODM_ITRF_SDIO)) { @@ -78,7 +78,7 @@ static s4Byte odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s4B return RetSig; } -static s4Byte odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s4Byte CurrSig) +static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig) { if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->SupportInterface != ODM_ITRF_PCIE) && /* USB & SDIO */ @@ -93,17 +93,17 @@ static s4Byte odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s4Byte CurrSi } /* pMgntInfo->CustomerID == RT_CID_819x_Lenovo */ -static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo(struct odm_dm_struct *dm_odm, - u1Byte isCCKrate, u1Byte PWDB_ALL, u1Byte path, u1Byte RSSI) +static u8 odm_SQ_process_patch_RT_CID_819x_Lenovo(struct odm_dm_struct *dm_odm, + u8 isCCKrate, u8 PWDB_ALL, u8 path, u8 RSSI) { - u1Byte SQ; + u8 SQ; return SQ; } -static u1Byte odm_EVMdbToPercentage(s1Byte Value) +static u8 odm_EVMdbToPercentage(s8 Value) { /* -33dB~0dB to 0%~99% */ - s1Byte ret_val; + s8 ret_val; ret_val = Value; @@ -122,18 +122,18 @@ static u1Byte odm_EVMdbToPercentage(s1Byte Value) static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, struct odm_phy_status_info *pPhyInfo, - pu1Byte pPhyStatus, + u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo) { struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table; - u1Byte i, Max_spatial_stream; - s1Byte rx_pwr[4], rx_pwr_all = 0; - u1Byte EVM, PWDB_ALL = 0, PWDB_ALL_BT; - u1Byte RSSI, total_rssi = 0; - u1Byte isCCKrate = 0; - u1Byte rf_rx_num = 0; - u1Byte cck_highpwr = 0; - u1Byte LNA_idx, VGA_idx; + u8 i, Max_spatial_stream; + s8 rx_pwr[4], rx_pwr_all = 0; + u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT; + u8 RSSI, total_rssi = 0; + u8 isCCKrate = 0; + u8 rf_rx_num = 0; + u8 cck_highpwr = 0; + u8 LNA_idx, VGA_idx; struct phy_status_rpt *pPhyStaRpt = (struct phy_status_rpt *)pPhyStatus; @@ -143,8 +143,8 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; if (isCCKrate) { - u1Byte report; - u1Byte cck_agc_rpt; + u8 report; + u8 cck_agc_rpt; dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++; /* (1)Hardware does not provide RSSI for CCK */ @@ -271,7 +271,7 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, pPhyInfo->RecvSignalPower = rx_pwr_all; /* (3) Get Signal Quality (EVM) */ if (pPktinfo->bPacketMatchBSSID) { - u1Byte SQ, SQ_rpt; + u8 SQ, SQ_rpt; if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) { SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, 0, 0); @@ -320,11 +320,11 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, RSSI -= 4; } - pPhyInfo->RxMIMOSignalStrength[i] = (u1Byte)RSSI; + pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI; /* Get Rx snr value in DB */ - pPhyInfo->RxSNR[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2); - dm_odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2); + pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2); + dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2); /* Record Signal Strength for next packet */ if (pPktinfo->bPacketMatchBSSID) { @@ -362,8 +362,8 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, if (pPktinfo->bPacketMatchBSSID) { if (i == ODM_RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */ - pPhyInfo->SignalQuality = (u1Byte)(EVM & 0xff); - pPhyInfo->RxMIMOSignalQuality[i] = (u1Byte)(EVM & 0xff); + pPhyInfo->SignalQuality = (u8)(EVM & 0xff); + pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff); } } } @@ -371,10 +371,10 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */ /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */ if (isCCKrate) { - pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */ + pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */ } else { if (rf_rx_num != 0) - pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(dm_odm, total_rssi /= rf_rx_num)); + pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, total_rssi /= rf_rx_num)); } /* For 92C/92D HW (Hybrid) Antenna Diversity */ @@ -393,12 +393,12 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, struct odm_phy_status_info *pPhyInfo, struct odm_per_pkt_info *pPktinfo) { - s4Byte UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK; - s4Byte UndecoratedSmoothedOFDM, RSSI_Ave; - u1Byte isCCKrate = 0; - u1Byte RSSI_max, RSSI_min, i; - u4Byte OFDM_pkt = 0; - u4Byte Weighting = 0; + s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK; + s32 UndecoratedSmoothedOFDM, RSSI_Ave; + u8 isCCKrate = 0; + u8 RSSI_max, RSSI_min, i; + u32 OFDM_pkt = 0; + u32 Weighting = 0; struct sta_info *pEntry; if (pPktinfo->StationID == 0xFF) @@ -413,7 +413,7 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, /* Smart Antenna Debug Message------------------ */ if (dm_odm->SupportICType == ODM_RTL8188E) { - u1Byte antsel_tr_mux; + u8 antsel_tr_mux; struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable; if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) { @@ -466,7 +466,7 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, if (UndecoratedSmoothedOFDM <= 0) { /* initialize */ UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll; } else { - if (pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedOFDM) { + if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM) { UndecoratedSmoothedOFDM = (((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + (RSSI_Ave)) / (Rx_Smooth_Factor); @@ -487,7 +487,7 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, if (UndecoratedSmoothedCCK <= 0) { /* initialize */ UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll; } else { - if (pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedCCK) { + if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedCCK) { UndecoratedSmoothedCCK = ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) + pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor; @@ -507,7 +507,7 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, pEntry->rssi_stat.ValidBit++; for (i = 0; i < pEntry->rssi_stat.ValidBit; i++) - OFDM_pkt += (u1Byte)(pEntry->rssi_stat.PacketMap>>i)&BIT0; + OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i)&BIT0; if (pEntry->rssi_stat.ValidBit == 64) { Weighting = ((OFDM_pkt<<4) > 64) ? 64 : (OFDM_pkt<<4); @@ -529,7 +529,7 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, /* Endianness before calling this API */ static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm, struct odm_phy_status_info *pPhyInfo, - pu1Byte pPhyStatus, + u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo) { odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus, @@ -545,14 +545,14 @@ static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm, void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm, struct odm_phy_status_info *pPhyInfo, - pu1Byte pPhyStatus, struct odm_per_pkt_info *pPktinfo) + u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo) { ODM_PhyStatusQuery_92CSeries(dm_odm, pPhyInfo, pPhyStatus, pPktinfo); } /* For future use. */ -void ODM_MacStatusQuery(struct odm_dm_struct *dm_odm, pu1Byte mac_stat, - u1Byte macid, bool pkt_match_bssid, +void ODM_MacStatusQuery(struct odm_dm_struct *dm_odm, u8 *mac_stat, + u8 macid, bool pkt_match_bssid, bool pkttoself, bool pkt_beacon) { /* 2011/10/19 Driver team will handle in the future. */ @@ -593,7 +593,7 @@ enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *dm_odm, enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *dm_odm) { - u1Byte result = HAL_STATUS_SUCCESS; + u8 result = HAL_STATUS_SUCCESS; if (dm_odm->SupportICType == ODM_RTL8188E) result = READ_AND_CONFIG(8188E, _MAC_REG_); return result; diff --git a/hal/odm_RTL8188E.c b/hal/odm_RTL8188E.c index 160c72b..fba8a64 100644 --- a/hal/odm_RTL8188E.c +++ b/hal/odm_RTL8188E.c @@ -25,7 +25,7 @@ void ODM_DIG_LowerBound_88E(struct odm_dm_struct *dm_odm) struct rtw_dig *pDM_DigTable = &dm_odm->DM_DigTable; if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) { - pDM_DigTable->rx_gain_range_min = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; + pDM_DigTable->rx_gain_range_min = (u8) pDM_DigTable->AntDiv_RSSI_max; ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_DIG_LowerBound_88E(): pDM_DigTable->AntDiv_RSSI_max=%d\n", pDM_DigTable->AntDiv_RSSI_max)); } @@ -34,7 +34,7 @@ void ODM_DIG_LowerBound_88E(struct odm_dm_struct *dm_odm) static void odm_RX_HWAntDivInit(struct odm_dm_struct *dm_odm) { - u4Byte value32; + u32 value32; struct adapter *Adapter = dm_odm->Adapter; if (*(dm_odm->mp_mode) == 1) { @@ -64,7 +64,7 @@ static void odm_RX_HWAntDivInit(struct odm_dm_struct *dm_odm) static void odm_TRX_HWAntDivInit(struct odm_dm_struct *dm_odm) { - u4Byte value32; + u32 value32; struct adapter *Adapter = dm_odm->Adapter; if (*(dm_odm->mp_mode) == 1) { @@ -103,9 +103,9 @@ static void odm_TRX_HWAntDivInit(struct odm_dm_struct *dm_odm) static void odm_FastAntTrainingInit(struct odm_dm_struct *dm_odm) { - u4Byte value32, i; + u32 value32, i; struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - u4Byte AntCombination = 2; + u32 AntCombination = 2; struct adapter *Adapter = dm_odm->Adapter; ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_FastAntTrainingInit()\n")); @@ -198,10 +198,10 @@ void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *dm_odm) odm_FastAntTrainingInit(dm_odm); } -void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *dm_odm, u1Byte Ant) +void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant) { struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - u4Byte DefaultAnt, OptionalAnt; + u32 DefaultAnt, OptionalAnt; if (dm_fat_tbl->RxIdleAnt != Ant) { ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Update Rx Idle Ant\n")); @@ -228,10 +228,10 @@ void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *dm_odm, u1Byte Ant) pr_info("RxIdleAnt=%s\n", (Ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); } -static void odm_UpdateTxAnt_88E(struct odm_dm_struct *dm_odm, u1Byte Ant, u4Byte MacId) +static void odm_UpdateTxAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant, u32 MacId) { struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - u1Byte TargetAnt; + u8 TargetAnt; if (Ant == MAIN_ANT) TargetAnt = MAIN_ANT_CG_TRX; @@ -249,7 +249,7 @@ static void odm_UpdateTxAnt_88E(struct odm_dm_struct *dm_odm, u1Byte Ant, u4Byte dm_fat_tbl->antsel_c[MacId], dm_fat_tbl->antsel_b[MacId], dm_fat_tbl->antsel_a[MacId])); } -void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *dm_odm, pu1Byte pDesc, u1Byte macId) +void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *dm_odm, u8 *pDesc, u8 macId) { struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; @@ -260,7 +260,7 @@ void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *dm_odm, pu1Byte pDesc, u1Byt } } -void ODM_AntselStatistics_88E(struct odm_dm_struct *dm_odm, u1Byte antsel_tr_mux, u4Byte MacId, u1Byte RxPWDBAll) +void ODM_AntselStatistics_88E(struct odm_dm_struct *dm_odm, u8 antsel_tr_mux, u32 MacId, u8 RxPWDBAll) { struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) { @@ -284,9 +284,9 @@ void ODM_AntselStatistics_88E(struct odm_dm_struct *dm_odm, u1Byte antsel_tr_mux static void odm_HWAntDiv(struct odm_dm_struct *dm_odm) { - u4Byte i, MinRSSI = 0xFF, AntDivMaxRSSI = 0, MaxRSSI = 0, LocalMinRSSI, LocalMaxRSSI; - u4Byte Main_RSSI, Aux_RSSI; - u1Byte RxIdleAnt = 0, TargetAnt = 7; + u32 i, MinRSSI = 0xFF, AntDivMaxRSSI = 0, MaxRSSI = 0, LocalMinRSSI, LocalMaxRSSI; + u32 Main_RSSI, Aux_RSSI; + u8 RxIdleAnt = 0, TargetAnt = 7; struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; struct rtw_dig *pDM_DigTable = &dm_odm->DM_DigTable; bool bMatchBSSID; diff --git a/hal/odm_RegConfig8188E.c b/hal/odm_RegConfig8188E.c index a8e09d3..18c0533 100644 --- a/hal/odm_RegConfig8188E.c +++ b/hal/odm_RegConfig8188E.c @@ -20,9 +20,9 @@ #include "odm_precomp.h" -void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, - u4Byte Data, enum ODM_RF_RADIO_PATH RF_PATH, - u4Byte RegAddr) +void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, + u32 Data, enum ODM_RF_RADIO_PATH RF_PATH, + u32 RegAddr) { if (Addr == 0xffe) { ODM_sleep_ms(50); @@ -43,32 +43,32 @@ void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, } } -void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, u4Byte Data) +void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data) { - u4Byte content = 0x1000; /* RF_Content: radioa_txt */ - u4Byte maskforPhySet = (u4Byte)(content&0xE000); + u32 content = 0x1000; /* RF_Content: radioa_txt */ + u32 maskforPhySet = (u32)(content&0xE000); odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_A, Addr|maskforPhySet); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data)); } -void odm_ConfigRF_RadioB_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, u4Byte Data) +void odm_ConfigRF_RadioB_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data) { - u4Byte content = 0x1001; /* RF_Content: radiob_txt */ - u4Byte maskforPhySet = (u4Byte)(content&0xE000); + u32 content = 0x1001; /* RF_Content: radiob_txt */ + u32 maskforPhySet = (u32)(content&0xE000); odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data)); } -void odm_ConfigMAC_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, u1Byte Data) +void odm_ConfigMAC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u8 Data) { ODM_Write1Byte(pDM_Odm, Addr, Data); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data)); } -void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, u4Byte Bitmask, u4Byte Data) +void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data) { ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); /* Add 1us delay between BB/RF register setting. */ @@ -79,8 +79,8 @@ void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, u4Byte B Addr, Data)); } -void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, - u4Byte Bitmask, u4Byte Data) +void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, + u32 Bitmask, u32 Data) { if (Addr == 0xfe) { ODM_sleep_ms(50); @@ -102,7 +102,7 @@ void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, } } -void odm_ConfigBB_PHY_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, u4Byte Bitmask, u4Byte Data) +void odm_ConfigBB_PHY_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data) { if (Addr == 0xfe) { ODM_sleep_ms(50); diff --git a/hal/odm_interface.c b/hal/odm_interface.c index fd271fd..59ad5bf 100644 --- a/hal/odm_interface.c +++ b/hal/odm_interface.c @@ -21,91 +21,91 @@ #include "odm_precomp.h" /* ODM IO Relative API. */ -u1Byte ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr) +u8 ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr) { struct adapter *Adapter = pDM_Odm->Adapter; return rtw_read8(Adapter, RegAddr); } -u2Byte ODM_Read2Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr) +u16 ODM_Read2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr) { struct adapter *Adapter = pDM_Odm->Adapter; return rtw_read16(Adapter, RegAddr); } -u4Byte ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr) +u32 ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr) { struct adapter *Adapter = pDM_Odm->Adapter; return rtw_read32(Adapter, RegAddr); } -void ODM_Write1Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u1Byte Data) +void ODM_Write1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u8 Data) { struct adapter *Adapter = pDM_Odm->Adapter; rtw_write8(Adapter, RegAddr, Data); } -void ODM_Write2Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u2Byte Data) +void ODM_Write2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u16 Data) { struct adapter *Adapter = pDM_Odm->Adapter; rtw_write16(Adapter, RegAddr, Data); } -void ODM_Write4Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte Data) +void ODM_Write4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 Data) { struct adapter *Adapter = pDM_Odm->Adapter; rtw_write32(Adapter, RegAddr, Data); } -void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask, u4Byte Data) +void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data) { struct adapter *Adapter = pDM_Odm->Adapter; PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); } -u4Byte ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask) +u32 ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask) { struct adapter *Adapter = pDM_Odm->Adapter; return PHY_QueryBBReg(Adapter, RegAddr, BitMask); } -void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask, u4Byte Data) +void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data) { struct adapter *Adapter = pDM_Odm->Adapter; PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); } -u4Byte ODM_GetBBReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask) +u32 ODM_GetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask) { struct adapter *Adapter = pDM_Odm->Adapter; return PHY_QueryBBReg(Adapter, RegAddr, BitMask); } -void ODM_SetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u4Byte RegAddr, u4Byte BitMask, u4Byte Data) +void ODM_SetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u32 RegAddr, u32 BitMask, u32 Data) { struct adapter *Adapter = pDM_Odm->Adapter; PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask, Data); } -u4Byte ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u4Byte RegAddr, u4Byte BitMask) +u32 ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u32 RegAddr, u32 BitMask) { struct adapter *Adapter = pDM_Odm->Adapter; return PHY_QueryRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask); } /* ODM Memory relative API. */ -void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u4Byte length) +void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u32 length) { *pPtr = rtw_zvmalloc(length); } /* length could be ignored, used to detect memory leakage. */ -void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u4Byte length) +void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u32 length) { rtw_vmfree(pPtr, length); } -s4Byte ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2, u4Byte length) +s32 ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2, u32 length) { return _rtw_memcmp(pBuf1, pBuf2, length); } @@ -147,32 +147,32 @@ void ODM_IsWorkItemScheduled(void *pRtWorkItem) } /* ODM Timer relative API. */ -void ODM_StallExecution(u4Byte usDelay) +void ODM_StallExecution(u32 usDelay) { rtw_udelay_os(usDelay); } -void ODM_delay_ms(u4Byte ms) +void ODM_delay_ms(u32 ms) { rtw_mdelay_os(ms); } -void ODM_delay_us(u4Byte us) +void ODM_delay_us(u32 us) { rtw_udelay_os(us); } -void ODM_sleep_ms(u4Byte ms) +void ODM_sleep_ms(u32 ms) { rtw_msleep_os(ms); } -void ODM_sleep_us(u4Byte us) +void ODM_sleep_us(u32 us) { rtw_usleep_os(us); } -void ODM_SetTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer, u4Byte msDelay) +void ODM_SetTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer, u32 msDelay) { _set_timer(pTimer, msDelay); /* ms */ } @@ -195,9 +195,9 @@ void ODM_ReleaseTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer) } /* ODM FW relative API. */ -u4Byte ODM_FillH2CCmd(pu1Byte pH2CBuffer, u4Byte H2CBufferLen, u4Byte CmdNum, - pu4Byte pElementID, pu4Byte pCmdLen, - pu1Byte *pCmbBuffer, pu1Byte CmdStartSeq) +u32 ODM_FillH2CCmd(u8 *pH2CBuffer, u32 H2CBufferLen, u32 CmdNum, + u32 *pElementID, u32 *pCmdLen, + u8 **pCmbBuffer, u8 *CmdStartSeq) { return true; } diff --git a/hal/rtl8188e_hal_init.c b/hal/rtl8188e_hal_init.c index e4f56a8..f990a3d 100644 --- a/hal/rtl8188e_hal_init.c +++ b/hal/rtl8188e_hal_init.c @@ -163,7 +163,7 @@ efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf) rtemp8 = *(phymap+eFuse_Addr); eFuse_Addr++; efuse_utilized++; - eFuseWord[offset][i] |= (((u2Byte)rtemp8 << 8) & 0xff00); + eFuseWord[offset][i] |= (((u16)rtemp8 << 8) & 0xff00); if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) break; @@ -1044,7 +1044,7 @@ Hal_EfuseReadEFuse88E( ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); eFuse_Addr++; efuse_utilized++; - eFuseWord[offset][i] |= (((u2Byte)*rtemp8 << 8) & 0xff00); + eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00); if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) break; } @@ -1160,7 +1160,7 @@ static void rtl8188e_ReadEFuse(struct adapter *Adapter, u8 efuseType, } /* Do not support BT */ -static void Hal_EFUSEGetEfuseDefinition88E(struct adapter *pAdapter, u1Byte efuseType, u1Byte type, void *pOut) +static void Hal_EFUSEGetEfuseDefinition88E(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut) { switch (type) { case TYPE_EFUSE_MAX_SECTION: @@ -1228,43 +1228,43 @@ static void Hal_EFUSEGetEfuseDefinition_Pseudo88E(struct adapter *pAdapter, u8 e case TYPE_EFUSE_MAX_SECTION: { u8 *pMax_section; - pMax_section = (pu1Byte)pOut; + pMax_section = (u8 *)pOut; *pMax_section = EFUSE_MAX_SECTION_88E; } break; case TYPE_EFUSE_REAL_CONTENT_LEN: { u16 *pu2Tmp; - pu2Tmp = (pu2Byte)pOut; + pu2Tmp = (u16 *)pOut; *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; } break; case TYPE_EFUSE_CONTENT_LEN_BANK: { u16 *pu2Tmp; - pu2Tmp = (pu2Byte)pOut; + pu2Tmp = (u16 *)pOut; *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; } break; case TYPE_AVAILABLE_EFUSE_BYTES_BANK: { u16 *pu2Tmp; - pu2Tmp = (pu2Byte)pOut; - *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); + pu2Tmp = (u16 *)pOut; + *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); } break; case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: { u16 *pu2Tmp; - pu2Tmp = (pu2Byte)pOut; - *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); + pu2Tmp = (u16 *)pOut; + *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); } break; case TYPE_EFUSE_MAP_LEN: { u16 *pu2Tmp; - pu2Tmp = (pu2Byte)pOut; - *pu2Tmp = (u2Byte)EFUSE_MAP_LEN_88E; + pu2Tmp = (u16 *)pOut; + *pu2Tmp = (u16)EFUSE_MAP_LEN_88E; } break; case TYPE_EFUSE_PROTECT_BYTES_BANK: @@ -2600,7 +2600,7 @@ void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail) { struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u1Byte tempval; + u8 tempval; /* ThermalMeter from EEPROM */ if (!AutoloadFail) diff --git a/hal/rtl8188e_mp.c b/hal/rtl8188e_mp.c index 92e79cf..e072931 100644 --- a/hal/rtl8188e_mp.c +++ b/hal/rtl8188e_mp.c @@ -110,14 +110,14 @@ void Hal_mpt_SwitchRfSetting(struct adapter *pAdapter) { /* struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); */ struct mp_priv *pmp = &pAdapter->mppriv; - u1Byte ChannelToSw = pmp->channel; - ULONG ulRateIdx = pmp->rateidx; - ULONG ulbandwidth = pmp->bandwidth; + u8 ChannelToSw = pmp->channel; + u32 ulRateIdx = pmp->rateidx; + u32 ulbandwidth = pmp->bandwidth; struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); /* <20120525, Kordan> Dynamic mechanism for APK, asked by Dennis. */ - pmp->MptCtx.backup0x52_RF_A = (u1Byte)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); - pmp->MptCtx.backup0x52_RF_B = (u1Byte)PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0); + pmp->MptCtx.backup0x52_RF_A = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); + pmp->MptCtx.backup0x52_RF_B = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0); PHY_SetRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xD); PHY_SetRFReg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0xD); diff --git a/hal/rtl8188e_phycfg.c b/hal/rtl8188e_phycfg.c index 84566bb..b753a80 100644 --- a/hal/rtl8188e_phycfg.c +++ b/hal/rtl8188e_phycfg.c @@ -55,10 +55,10 @@ * OverView: Get shifted position of the BitMask * * Input: -* u4Byte BitMask, +* u32 BitMask, * * Output: none -* Return: u4Byte Return the shift bit bit position of the mask +* Return: u32 Return the shift bit bit position of the mask */ static u32 phy_CalculateBitShift(u32 BitMask) { @@ -78,11 +78,11 @@ static u32 phy_CalculateBitShift(u32 BitMask) * * Input: * struct adapter *Adapter, -* u4Byte RegAddr, The target address to be readback -* u4Byte BitMask The target bit position in the target address +* u32 RegAddr, The target address to be readback +* u32 BitMask The target bit position in the target address * to be readback * Output: None -* Return: u4Byte Data The readback register value +* Return: u32 Data The readback register value * Note: This function is equal to "GetRegSetting" in PHY programming guide */ u32 @@ -109,10 +109,10 @@ rtl8188e_PHY_QueryBBReg( * * Input: * struct adapter *Adapter, -* u4Byte RegAddr, The target address to be modified -* u4Byte BitMask The target bit position in the target address +* u32 RegAddr, The target address to be modified +* u32 BitMask The target bit position in the target address * to be modified -* u4Byte Data The new register value in the target bit position +* u32 Data The new register value in the target bit position * of the target address * * Output: None @@ -146,10 +146,10 @@ void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u3 * Input: * struct adapter *Adapter, * enum rf_radio_path eRFPath, Radio path of A/B/C/D -* u4Byte Offset, The target address to be read +* u32 Offset, The target address to be read * * Output: None -* Return: u4Byte reback value +* Return: u32 reback value * Note: Threre are three types of serial operations: * 1. Software serial write * 2. Hardware LSSI-Low Speed Serial Interface @@ -220,8 +220,8 @@ phy_RFSerialRead( * Input: * struct adapter *Adapter, * enum rf_radio_path eRFPath, Radio path of A/B/C/D -* u4Byte Offset, The target address to be read -* u4Byte Data The new register Data in the target bit position +* u32 Offset, The target address to be read +* u32 Data The new register Data in the target bit position * of the target to be read * * Output: None @@ -297,12 +297,12 @@ phy_RFSerialWrite( * Input: * struct adapter *Adapter, * enum rf_radio_path eRFPath, Radio path of A/B/C/D -* u4Byte RegAddr, The target address to be read -* u4Byte BitMask The target bit position in the target address +* u32 RegAddr, The target address to be read +* u32 BitMask The target bit position in the target address * to be read * * Output: None -* Return: u4Byte Readback value +* Return: u32 Readback value * Note: This function is equal to "GetRFRegSetting" in PHY programming guide */ u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum rf_radio_path eRFPath, @@ -325,10 +325,10 @@ u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum rf_radio_path eRFPath, * Input: * struct adapter *Adapter, * enum rf_radio_path eRFPath, Radio path of A/B/C/D -* u4Byte RegAddr, The target address to be modified -* u4Byte BitMask The target bit position in the target address +* u32 RegAddr, The target address to be modified +* u32 BitMask The target bit position in the target address * to be modified -* u4Byte Data The new register Data in the target bit position +* u32 Data The new register Data in the target bit position * of the target address * * Output: None @@ -367,7 +367,7 @@ rtl8188e_PHY_SetRFReg( * Read/Write * * Input: struct adapter *Adapter - * ps1Byte pFileName + * ps8 pFileName * * Output: NONE * @@ -542,7 +542,7 @@ phy_InitBBRFRegisterDefinition( * Read/Write * * Input: struct adapter *Adapter - * ps1Byte pFileName + * ps8 pFileName * * Output: NONE * @@ -753,7 +753,7 @@ int PHY_RFConfig8188E(struct adapter *Adapter) * Overview: This function read RF parameters from general file format, and do RF 3-wire * * Input: struct adapter *Adapter - * ps1Byte pFileName + * ps8 pFileName * enum rf_radio_path eRFPath * * Output: NONE @@ -1008,7 +1008,7 @@ static void phy_PowerIndexCheck88E(struct adapter *Adapter, u8 channel, u8 *cckP * We must consider RF path later!!!!!!! * * Input: struct adapter *Adapter - * u1Byte channel + * u8 channel * * Output: NONE * diff --git a/hal/rtl8188e_rf6052.c b/hal/rtl8188e_rf6052.c index 54f0404..475b3e6 100644 --- a/hal/rtl8188e_rf6052.c +++ b/hal/rtl8188e_rf6052.c @@ -79,7 +79,7 @@ static struct rf_shadow RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG]; * * Overview: For RL6052, we must change some RF settign for 1T or 2T. * - * Input: u2Byte DataRate 0x80-8f, 0x90-9f + * Input: u16 DataRate 0x80-8f, 0x90-9f * * Output: NONE * @@ -281,10 +281,10 @@ static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel, { struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; - u1Byte i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit; - s1Byte pwr_diff = 0; - u4Byte writeVal, customer_limit, rf; - u1Byte Regulatory = pHalData->EEPROMRegulatory; + u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit; + s8 pwr_diff = 0; + u32 writeVal, customer_limit, rf; + u8 Regulatory = pHalData->EEPROMRegulatory; /* Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate */ @@ -341,7 +341,7 @@ static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel, pwr_diff = customer_pwr_limit - pwr_diff; for (i = 0; i < 4; i++) { - pwr_diff_limit[i] = (u1Byte)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)]&(0x7f<<(i*8)))>>(i*8)); + pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)]&(0x7f<<(i*8)))>>(i*8)); if (pwr_diff_limit[i] > pwr_diff) pwr_diff_limit[i] = pwr_diff; diff --git a/hal/usb_halinit.c b/hal/usb_halinit.c index 44438a7..b104da3 100644 --- a/hal/usb_halinit.c +++ b/hal/usb_halinit.c @@ -2472,7 +2472,7 @@ GetHalDefVar8188EUsb( break; case HW_DEF_ODM_DBG_FLAG: { - u8Byte DebugComponents = *((u32 *)pValue); + u64 DebugComponents = *((u32 *)pValue); struct odm_dm_struct *dm_ocm = &(haldata->odmpriv); pr_info("dm_ocm->DebugComponents = 0x%llx\n", dm_ocm->DebugComponents); } @@ -2548,7 +2548,7 @@ static u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eV break; case HW_DEF_ODM_DBG_FLAG: { - u8Byte DebugComponents = *((u8Byte *)pValue); + u64 DebugComponents = *((u64 *)pValue); struct odm_dm_struct *dm_ocm = &(haldata->odmpriv); dm_ocm->DebugComponents = DebugComponents; } diff --git a/include/Hal8188ERateAdaptive.h b/include/Hal8188ERateAdaptive.h index 31456ae..87aad81 100644 --- a/include/Hal8188ERateAdaptive.h +++ b/include/Hal8188ERateAdaptive.h @@ -52,24 +52,24 @@ void ODM_RASupport_Init(struct odm_dm_struct *dm_odm); int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm); -int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u1Byte MacID); +int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 MacID); -u1Byte ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u1Byte MacID); +u8 ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u8 MacID); -u1Byte ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u1Byte MacID); +u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 MacID); -u1Byte ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u1Byte MacID); -void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u1Byte MacID, - u1Byte RateID, u4Byte RateMask, - u1Byte SGIEnable); +u8 ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u8 MacID); +void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 MacID, + u8 RateID, u32 RateMask, + u8 SGIEnable); -void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u1Byte macid, - u1Byte rssi); +void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid, + u8 rssi); void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, - u1Byte *txrpt_buf, u2Byte txrpt_len, - u4Byte validentry0, u4Byte validentry1); + u8 *txrpt_buf, u16 txrpt_len, + u32 validentry0, u32 validentry1); -void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u2Byte minRptTime); +void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u16 minRptTime); #endif diff --git a/include/HalHWImg8188E_BB.h b/include/HalHWImg8188E_BB.h index ff0cc50..e574521 100644 --- a/include/HalHWImg8188E_BB.h +++ b/include/HalHWImg8188E_BB.h @@ -21,7 +21,7 @@ #ifndef __INC_BB_8188E_HW_IMG_H #define __INC_BB_8188E_HW_IMG_H -/* static bool CheckCondition(const u4Byte Condition, const u4Byte Hex); */ +/* static bool CheckCondition(const u32 Condition, const u32 Hex); */ /****************************************************************************** * AGC_TAB_1T.TXT diff --git a/include/HalPhyRf.h b/include/HalPhyRf.h index 7909c0b..1ec4971 100644 --- a/include/HalPhyRf.h +++ b/include/HalPhyRf.h @@ -25,6 +25,6 @@ void ODM_ResetIQKResult(struct odm_dm_struct *pDM_Odm); -u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl); +u8 ODM_GetRightChnlPlaceforIQK(u8 chnl); #endif /* #ifndef __HAL_PHY_RF_H__ */ diff --git a/include/HalPhyRf_8188e.h b/include/HalPhyRf_8188e.h index a156d73..4cf5d76 100644 --- a/include/HalPhyRf_8188e.h +++ b/include/HalPhyRf_8188e.h @@ -28,9 +28,9 @@ void ODM_TxPwrTrackAdjust88E(struct odm_dm_struct *pDM_Odm, - u1Byte Type, /* 0 = OFDM, 1 = CCK */ - pu1Byte pDirection,/* 1 = +(incr) 2 = -(decr) */ - pu4Byte pOutWriteVal); /* Tx tracking CCK/OFDM BB + u8 Type, /* 0 = OFDM, 1 = CCK */ + u8 *pDirection,/* 1 = +(incr) 2 = -(decr) */ + u32 *pOutWriteVal); /* Tx tracking CCK/OFDM BB * swing index adjust */ @@ -45,18 +45,18 @@ void PHY_IQCalibrate_8188E(struct adapter *Adapter, bool ReCovery); void PHY_LCCalibrate_8188E(struct adapter *pAdapter); /* AP calibrate */ -void PHY_APCalibrate_8188E(struct adapter *pAdapter, s1Byte delta); +void PHY_APCalibrate_8188E(struct adapter *pAdapter, s8 delta); -void PHY_DigitalPredistortion_8188E(struct adapter * pAdapter); +void PHY_DigitalPredistortion_8188E(struct adapter *pAdapter); -void _PHY_SaveADDARegisters(struct adapter *pAdapter, pu4Byte ADDAReg, - pu4Byte ADDABackup, u4Byte RegisterNum); +void _PHY_SaveADDARegisters(struct adapter *pAdapter, u32 *ADDAReg, + u32 *ADDABackup, u32 RegisterNum); -void _PHY_PathADDAOn(struct adapter *pAdapter, pu4Byte ADDAReg, +void _PHY_PathADDAOn(struct adapter *pAdapter, u32 *ADDAReg, bool isPathAOn, bool is2T); -void _PHY_MACSettingCalibration(struct adapter *pAdapter, pu4Byte MACReg, - pu4Byte MACBackup); +void _PHY_MACSettingCalibration(struct adapter *pAdapter, u32 *MACReg, + u32 *MACBackup); void _PHY_PathAStandBy(struct adapter *pAdapter); diff --git a/include/basic_types.h b/include/basic_types.h index 069e438..49bd5ff 100644 --- a/include/basic_types.h +++ b/include/basic_types.h @@ -26,11 +26,6 @@ #include #define NDIS_OID uint -#define UCHAR u8 -#define USHORT u16 -#define UINT u32 -#define ULONG u32 - typedef void (*proc_t)(void *); #define FIELD_OFFSET(s, field) ((ssize_t)&((s *)(0))->field) diff --git a/include/drv_types.h b/include/drv_types.h index 3627d59..5b38f2c 100644 --- a/include/drv_types.h +++ b/include/drv_types.h @@ -158,9 +158,9 @@ struct registry_priv { }; /* For registry parameters */ -#define RGTRY_OFT(field) ((ULONG)FIELD_OFFSET(struct registry_priv, field)) +#define RGTRY_OFT(field) ((u32)FIELD_OFFSET(struct registry_priv, field)) #define RGTRY_SZ(field) sizeof(((struct registry_priv *)0)->field) -#define BSSID_OFT(field) ((ULONG)FIELD_OFFSET(struct wlan_bssid_ex, field)) +#define BSSID_OFT(field) ((u32)FIELD_OFFSET(struct wlan_bssid_ex, field)) #define BSSID_SZ(field) sizeof(((struct wlan_bssid_ex *)0)->field) #define MAX_CONTINUAL_URB_ERR 4 diff --git a/include/ethernet.h b/include/ethernet.h index ca7d70d..a59f912 100644 --- a/include/ethernet.h +++ b/include/ethernet.h @@ -29,14 +29,14 @@ #define MAXIMUM_ETHERNET_PACKET_SIZE 1514 /* Max Ethernet Packet Size */ /* Is Multicast Address? */ -#define RT_ETH_IS_MULTICAST(_addr) ((((UCHAR *)(_addr))[0]&0x01) != 0) +#define RT_ETH_IS_MULTICAST(_addr) ((((u8 *)(_addr))[0]&0x01) != 0) #define RT_ETH_IS_BROADCAST(_addr) ( \ - ((UCHAR *)(_addr))[0] == 0xff && \ - ((UCHAR *)(_addr))[1] == 0xff && \ - ((UCHAR *)(_addr))[2] == 0xff && \ - ((UCHAR *)(_addr))[3] == 0xff && \ - ((UCHAR *)(_addr))[4] == 0xff && \ - ((UCHAR *)(_addr))[5] == 0xff) /* Is Broadcast Address? */ + ((u8 *)(_addr))[0] == 0xff && \ + ((u8 *)(_addr))[1] == 0xff && \ + ((u8 *)(_addr))[2] == 0xff && \ + ((u8 *)(_addr))[3] == 0xff && \ + ((u8 *)(_addr))[4] == 0xff && \ + ((u8 *)(_addr))[5] == 0xff) /* Is Broadcast Address? */ #endif /* #ifndef __INC_ETHERNET_H */ diff --git a/include/odm.h b/include/odm.h index f9ed8a6..2c495a9 100644 --- a/include/odm.h +++ b/include/odm.h @@ -114,102 +114,102 @@ /* We need to remove to other position??? */ /* */ struct rtl8192cd_priv { - u1Byte temp; + u8 temp; }; struct rtw_dig { - u1Byte Dig_Enable_Flag; - u1Byte Dig_Ext_Port_Stage; + u8 Dig_Enable_Flag; + u8 Dig_Ext_Port_Stage; int RssiLowThresh; int RssiHighThresh; - u4Byte FALowThresh; - u4Byte FAHighThresh; + u32 FALowThresh; + u32 FAHighThresh; - u1Byte CurSTAConnectState; - u1Byte PreSTAConnectState; - u1Byte CurMultiSTAConnectState; + u8 CurSTAConnectState; + u8 PreSTAConnectState; + u8 CurMultiSTAConnectState; - u1Byte PreIGValue; - u1Byte CurIGValue; - u1Byte BackupIGValue; + u8 PreIGValue; + u8 CurIGValue; + u8 BackupIGValue; - s1Byte BackoffVal; - s1Byte BackoffVal_range_max; - s1Byte BackoffVal_range_min; - u1Byte rx_gain_range_max; - u1Byte rx_gain_range_min; - u1Byte Rssi_val_min; + s8 BackoffVal; + s8 BackoffVal_range_max; + s8 BackoffVal_range_min; + u8 rx_gain_range_max; + u8 rx_gain_range_min; + u8 Rssi_val_min; - u1Byte PreCCK_CCAThres; - u1Byte CurCCK_CCAThres; - u1Byte PreCCKPDState; - u1Byte CurCCKPDState; + u8 PreCCK_CCAThres; + u8 CurCCK_CCAThres; + u8 PreCCKPDState; + u8 CurCCKPDState; - u1Byte LargeFAHit; - u1Byte ForbiddenIGI; - u4Byte Recover_cnt; + u8 LargeFAHit; + u8 ForbiddenIGI; + u32 Recover_cnt; - u1Byte DIG_Dynamic_MIN_0; - u1Byte DIG_Dynamic_MIN_1; + u8 DIG_Dynamic_MIN_0; + u8 DIG_Dynamic_MIN_1; bool bMediaConnect_0; bool bMediaConnect_1; - u4Byte AntDiv_RSSI_max; - u4Byte RSSI_max; + u32 AntDiv_RSSI_max; + u32 RSSI_max; }; struct rtl_ps { - u1Byte PreCCAState; - u1Byte CurCCAState; + u8 PreCCAState; + u8 CurCCAState; - u1Byte PreRFState; - u1Byte CurRFState; + u8 PreRFState; + u8 CurRFState; int Rssi_val_min; - u1Byte initialize; - u4Byte Reg874,RegC70,Reg85C,RegA74; + u8 initialize; + u32 Reg874,RegC70,Reg85C,RegA74; }; struct false_alarm_stats { - u4Byte Cnt_Parity_Fail; - u4Byte Cnt_Rate_Illegal; - u4Byte Cnt_Crc8_fail; - u4Byte Cnt_Mcs_fail; - u4Byte Cnt_Ofdm_fail; - u4Byte Cnt_Cck_fail; - u4Byte Cnt_all; - u4Byte Cnt_Fast_Fsync; - u4Byte Cnt_SB_Search_fail; - u4Byte Cnt_OFDM_CCA; - u4Byte Cnt_CCK_CCA; - u4Byte Cnt_CCA_all; - u4Byte Cnt_BW_USC; /* Gary */ - u4Byte Cnt_BW_LSC; /* Gary */ + u32 Cnt_Parity_Fail; + u32 Cnt_Rate_Illegal; + u32 Cnt_Crc8_fail; + u32 Cnt_Mcs_fail; + u32 Cnt_Ofdm_fail; + u32 Cnt_Cck_fail; + u32 Cnt_all; + u32 Cnt_Fast_Fsync; + u32 Cnt_SB_Search_fail; + u32 Cnt_OFDM_CCA; + u32 Cnt_CCK_CCA; + u32 Cnt_CCA_all; + u32 Cnt_BW_USC; /* Gary */ + u32 Cnt_BW_LSC; /* Gary */ }; struct dyn_primary_cca { - u1Byte PriCCA_flag; - u1Byte intf_flag; - u1Byte intf_type; - u1Byte DupRTS_flag; - u1Byte Monitor_flag; + u8 PriCCA_flag; + u8 intf_flag; + u8 intf_type; + u8 DupRTS_flag; + u8 Monitor_flag; }; struct rx_hpc { - u1Byte RXHP_flag; - u1Byte PSD_func_trigger; - u1Byte PSD_bitmap_RXHP[80]; - u1Byte Pre_IGI; - u1Byte Cur_IGI; - u1Byte Pre_pw_th; - u1Byte Cur_pw_th; + u8 RXHP_flag; + u8 PSD_func_trigger; + u8 PSD_bitmap_RXHP[80]; + u8 Pre_IGI; + u8 Cur_IGI; + u8 Pre_pw_th; + u8 Cur_pw_th; bool First_time_enter; bool RXHP_enable; - u1Byte TP_Mode; + u8 TP_Mode; struct timer_list PSDTimer; }; @@ -229,60 +229,60 @@ struct rx_hpc { #define TRAFFIC_HIGH 1 struct sw_ant_switch { - u1Byte try_flag; - s4Byte PreRSSI; - u1Byte CurAntenna; - u1Byte PreAntenna; - u1Byte RSSI_Trying; - u1Byte TestMode; - u1Byte bTriggerAntennaSwitch; - u1Byte SelectAntennaMap; - u1Byte RSSI_target; + u8 try_flag; + s32 PreRSSI; + u8 CurAntenna; + u8 PreAntenna; + u8 RSSI_Trying; + u8 TestMode; + u8 bTriggerAntennaSwitch; + u8 SelectAntennaMap; + u8 RSSI_target; /* Before link Antenna Switch check */ - u1Byte SWAS_NoLink_State; - u4Byte SWAS_NoLink_BK_Reg860; + u8 SWAS_NoLink_State; + u32 SWAS_NoLink_BK_Reg860; bool ANTA_ON; /* To indicate Ant A is or not */ bool ANTB_ON; /* To indicate Ant B is on or not */ - s4Byte RSSI_sum_A; - s4Byte RSSI_sum_B; - s4Byte RSSI_cnt_A; - s4Byte RSSI_cnt_B; + s32 RSSI_sum_A; + s32 RSSI_sum_B; + s32 RSSI_cnt_A; + s32 RSSI_cnt_B; - u8Byte lastTxOkCnt; - u8Byte lastRxOkCnt; - u8Byte TXByteCnt_A; - u8Byte TXByteCnt_B; - u8Byte RXByteCnt_A; - u8Byte RXByteCnt_B; - u1Byte TrafficLoad; + u64 lastTxOkCnt; + u64 lastRxOkCnt; + u64 TXByteCnt_A; + u64 TXByteCnt_B; + u64 RXByteCnt_A; + u64 RXByteCnt_B; + u8 TrafficLoad; struct timer_list SwAntennaSwitchTimer; /* Hybrid Antenna Diversity */ - u4Byte CCK_Ant1_Cnt[ASSOCIATE_ENTRY_NUM]; - u4Byte CCK_Ant2_Cnt[ASSOCIATE_ENTRY_NUM]; - u4Byte OFDM_Ant1_Cnt[ASSOCIATE_ENTRY_NUM]; - u4Byte OFDM_Ant2_Cnt[ASSOCIATE_ENTRY_NUM]; - u4Byte RSSI_Ant1_Sum[ASSOCIATE_ENTRY_NUM]; - u4Byte RSSI_Ant2_Sum[ASSOCIATE_ENTRY_NUM]; - u1Byte TxAnt[ASSOCIATE_ENTRY_NUM]; - u1Byte TargetSTA; - u1Byte antsel; - u1Byte RxIdleAnt; + u32 CCK_Ant1_Cnt[ASSOCIATE_ENTRY_NUM]; + u32 CCK_Ant2_Cnt[ASSOCIATE_ENTRY_NUM]; + u32 OFDM_Ant1_Cnt[ASSOCIATE_ENTRY_NUM]; + u32 OFDM_Ant2_Cnt[ASSOCIATE_ENTRY_NUM]; + u32 RSSI_Ant1_Sum[ASSOCIATE_ENTRY_NUM]; + u32 RSSI_Ant2_Sum[ASSOCIATE_ENTRY_NUM]; + u8 TxAnt[ASSOCIATE_ENTRY_NUM]; + u8 TargetSTA; + u8 antsel; + u8 RxIdleAnt; }; struct edca_turbo { bool bCurrentTurboEDCA; bool bIsCurRDLState; - u4Byte prv_traffic_idx; /* edca turbo */ + u32 prv_traffic_idx; /* edca turbo */ }; struct odm_rate_adapt { - u1Byte Type; /* DM_Type_ByFW/DM_Type_ByDriver */ - u1Byte HighRSSIThresh; /* if RSSI > HighRSSIThresh => RATRState is DM_RATR_STA_HIGH */ - u1Byte LowRSSIThresh; /* if RSSI <= LowRSSIThresh => RATRState is DM_RATR_STA_LOW */ - u1Byte RATRState; /* Current RSSI level, DM_RATR_STA_HIGH/DM_RATR_STA_MIDDLE/DM_RATR_STA_LOW */ - u4Byte LastRATR; /* RATR Register Content */ + u8 Type; /* DM_Type_ByFW/DM_Type_ByDriver */ + u8 HighRSSIThresh; /* if RSSI > HighRSSIThresh => RATRState is DM_RATR_STA_HIGH */ + u8 LowRSSIThresh; /* if RSSI <= LowRSSIThresh => RATRState is DM_RATR_STA_LOW */ + u8 RATRState; /* Current RSSI level, DM_RATR_STA_HIGH/DM_RATR_STA_MIDDLE/DM_RATR_STA_LOW */ + u32 LastRATR; /* RATR Register Content */ }; @@ -307,27 +307,27 @@ struct odm_rate_adapt { #define MAX_PATH_NUM_92CS 2 struct odm_phy_status_info { - u1Byte RxPWDBAll; - u1Byte SignalQuality; /* in 0-100 index. */ - u1Byte RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; /* EVM */ - u1Byte RxMIMOSignalStrength[MAX_PATH_NUM_92CS];/* in 0~100 index */ - s1Byte RxPower; /* in dBm Translate from PWdB */ - s1Byte RecvSignalPower;/* Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures. */ - u1Byte BTRxRSSIPercentage; - u1Byte SignalStrength; /* in 0-100 index. */ - u1Byte RxPwr[MAX_PATH_NUM_92CS];/* per-path's pwdb */ - u1Byte RxSNR[MAX_PATH_NUM_92CS];/* per-path's SNR */ + u8 RxPWDBAll; + u8 SignalQuality; /* in 0-100 index. */ + u8 RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; /* EVM */ + u8 RxMIMOSignalStrength[MAX_PATH_NUM_92CS];/* in 0~100 index */ + s8 RxPower; /* in dBm Translate from PWdB */ + s8 RecvSignalPower;/* Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures. */ + u8 BTRxRSSIPercentage; + u8 SignalStrength; /* in 0-100 index. */ + u8 RxPwr[MAX_PATH_NUM_92CS];/* per-path's pwdb */ + u8 RxSNR[MAX_PATH_NUM_92CS];/* per-path's SNR */ }; struct odm_phy_dbg_info { /* ODM Write,debug info */ - s1Byte RxSNRdB[MAX_PATH_NUM_92CS]; - u8Byte NumQryPhyStatus; - u8Byte NumQryPhyStatusCCK; - u8Byte NumQryPhyStatusOFDM; + s8 RxSNRdB[MAX_PATH_NUM_92CS]; + u64 NumQryPhyStatus; + u64 NumQryPhyStatusCCK; + u64 NumQryPhyStatusOFDM; /* Others */ - s4Byte RxEVM[MAX_PATH_NUM_92CS]; + s32 RxEVM[MAX_PATH_NUM_92CS]; }; @@ -340,7 +340,7 @@ struct odm_per_pkt_info { }; struct odm_mac_status_info { - u1Byte test; + u8 test; }; @@ -367,14 +367,14 @@ enum odm_ability { struct odm_sta_info { /* Driver Write */ bool bUsed; /* record the sta status link or not? */ - u1Byte IOTPeer; /* Enum value. HT_IOT_PEER_E */ + u8 IOTPeer; /* Enum value. HT_IOT_PEER_E */ /* ODM Write */ /* 1 PHY_STATUS_INFO */ - u1Byte RSSI_Path[4]; /* */ - u1Byte RSSI_Ave; - u1Byte RXEVM[4]; - u1Byte RXSNR[4]; + u8 RSSI_Path[4]; /* */ + u8 RSSI_Ave; + u8 RXEVM[4]; + u8 RXSNR[4]; /* */ /* Please use compile flag to disable the struictrue for other IC except 88E. */ @@ -445,11 +445,11 @@ enum odm_common_info_def { ODM_CMNINFO_WIFI_DISPLAY, ODM_CMNINFO_LINK, ODM_CMNINFO_RSSI_MIN, - ODM_CMNINFO_DBG_COMP, /* u8Byte */ - ODM_CMNINFO_DBG_LEVEL, /* u4Byte */ - ODM_CMNINFO_RA_THRESHOLD_HIGH, /* u1Byte */ - ODM_CMNINFO_RA_THRESHOLD_LOW, /* u1Byte */ - ODM_CMNINFO_RF_ANTENNA_TYPE, /* u1Byte */ + ODM_CMNINFO_DBG_COMP, /* u64 */ + ODM_CMNINFO_DBG_LEVEL, /* u32 */ + ODM_CMNINFO_RA_THRESHOLD_HIGH, /* u8 */ + ODM_CMNINFO_RA_THRESHOLD_LOW, /* u8 */ + ODM_CMNINFO_RF_ANTENNA_TYPE, /* u8 */ ODM_CMNINFO_BT_DISABLED, ODM_CMNINFO_BT_OPERATION, ODM_CMNINFO_BT_DIG, @@ -659,136 +659,136 @@ enum odm_cca_path { }; struct odm_ra_info { - u1Byte RateID; - u4Byte RateMask; - u4Byte RAUseRate; - u1Byte RateSGI; - u1Byte RssiStaRA; - u1Byte PreRssiStaRA; - u1Byte SGIEnable; - u1Byte DecisionRate; - u1Byte PreRate; - u1Byte HighestRate; - u1Byte LowestRate; - u4Byte NscUp; - u4Byte NscDown; - u2Byte RTY[5]; - u4Byte TOTAL; - u2Byte DROP; - u1Byte Active; - u2Byte RptTime; - u1Byte RAWaitingCounter; - u1Byte RAPendingCounter; - u1Byte PTActive; /* on or off */ - u1Byte PTTryState; /* 0 trying state, 1 for decision state */ - u1Byte PTStage; /* 0~6 */ - u1Byte PTStopCount; /* Stop PT counter */ - u1Byte PTPreRate; /* if rate change do PT */ - u1Byte PTPreRssi; /* if RSSI change 5% do PT */ - u1Byte PTModeSS; /* decide whitch rate should do PT */ - u1Byte RAstage; /* StageRA, decide how many times RA will be done between PT */ - u1Byte PTSmoothFactor; + u8 RateID; + u32 RateMask; + u32 RAUseRate; + u8 RateSGI; + u8 RssiStaRA; + u8 PreRssiStaRA; + u8 SGIEnable; + u8 DecisionRate; + u8 PreRate; + u8 HighestRate; + u8 LowestRate; + u32 NscUp; + u32 NscDown; + u16 RTY[5]; + u32 TOTAL; + u16 DROP; + u8 Active; + u16 RptTime; + u8 RAWaitingCounter; + u8 RAPendingCounter; + u8 PTActive; /* on or off */ + u8 PTTryState; /* 0 trying state, 1 for decision state */ + u8 PTStage; /* 0~6 */ + u8 PTStopCount; /* Stop PT counter */ + u8 PTPreRate; /* if rate change do PT */ + u8 PTPreRssi; /* if RSSI change 5% do PT */ + u8 PTModeSS; /* decide whitch rate should do PT */ + u8 RAstage; /* StageRA, decide how many times RA will be done between PT */ + u8 PTSmoothFactor; }; struct ijk_matrix_regs_set { bool bIQKDone; - s4Byte Value[1][IQK_Matrix_REG_NUM]; + s32 Value[1][IQK_Matrix_REG_NUM]; }; struct odm_rf_cal { /* for tx power tracking */ - u4Byte RegA24; /* for TempCCK */ - s4Byte RegE94; - s4Byte RegE9C; - s4Byte RegEB4; - s4Byte RegEBC; + u32 RegA24; /* for TempCCK */ + s32 RegE94; + s32 RegE9C; + s32 RegEB4; + s32 RegEBC; - /* u1Byte bTXPowerTracking; */ - u1Byte TXPowercount; + /* u8 bTXPowerTracking; */ + u8 TXPowercount; bool bTXPowerTrackingInit; bool bTXPowerTracking; - u1Byte TxPowerTrackControl; /* for mp mode, turn off txpwrtracking as default */ - u1Byte TM_Trigger; - u1Byte InternalPA5G[2]; /* pathA / pathB */ + u8 TxPowerTrackControl; /* for mp mode, turn off txpwrtracking as default */ + u8 TM_Trigger; + u8 InternalPA5G[2]; /* pathA / pathB */ - u1Byte ThermalMeter[2]; /* ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 */ - u1Byte ThermalValue; - u1Byte ThermalValue_LCK; - u1Byte ThermalValue_IQK; - u1Byte ThermalValue_DPK; - u1Byte ThermalValue_AVG[AVG_THERMAL_NUM]; - u1Byte ThermalValue_AVG_index; - u1Byte ThermalValue_RxGain; - u1Byte ThermalValue_Crystal; - u1Byte ThermalValue_DPKstore; - u1Byte ThermalValue_DPKtrack; + u8 ThermalMeter[2]; /* ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 */ + u8 ThermalValue; + u8 ThermalValue_LCK; + u8 ThermalValue_IQK; + u8 ThermalValue_DPK; + u8 ThermalValue_AVG[AVG_THERMAL_NUM]; + u8 ThermalValue_AVG_index; + u8 ThermalValue_RxGain; + u8 ThermalValue_Crystal; + u8 ThermalValue_DPKstore; + u8 ThermalValue_DPKtrack; bool TxPowerTrackingInProgress; bool bDPKenable; bool bReloadtxpowerindex; - u1Byte bRfPiEnable; - u4Byte TXPowerTrackingCallbackCnt; /* cosa add for debug */ + u8 bRfPiEnable; + u32 TXPowerTrackingCallbackCnt; /* cosa add for debug */ - u1Byte bCCKinCH14; - u1Byte CCK_index; - u1Byte OFDM_index[2]; + u8 bCCKinCH14; + u8 CCK_index; + u8 OFDM_index[2]; bool bDoneTxpower; - u1Byte ThermalValue_HP[HP_THERMAL_NUM]; - u1Byte ThermalValue_HP_index; + u8 ThermalValue_HP[HP_THERMAL_NUM]; + u8 ThermalValue_HP_index; struct ijk_matrix_regs_set IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; - u1Byte Delta_IQK; - u1Byte Delta_LCK; + u8 Delta_IQK; + u8 Delta_LCK; /* for IQK */ - u4Byte RegC04; - u4Byte Reg874; - u4Byte RegC08; - u4Byte RegB68; - u4Byte RegB6C; - u4Byte Reg870; - u4Byte Reg860; - u4Byte Reg864; + u32 RegC04; + u32 Reg874; + u32 RegC08; + u32 RegB68; + u32 RegB6C; + u32 Reg870; + u32 Reg860; + u32 Reg864; bool bIQKInitialized; bool bLCKInProgress; bool bAntennaDetected; - u4Byte ADDA_backup[IQK_ADDA_REG_NUM]; - u4Byte IQK_MAC_backup[IQK_MAC_REG_NUM]; - u4Byte IQK_BB_backup_recover[9]; - u4Byte IQK_BB_backup[IQK_BB_REG_NUM]; + u32 ADDA_backup[IQK_ADDA_REG_NUM]; + u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; + u32 IQK_BB_backup_recover[9]; + u32 IQK_BB_backup[IQK_BB_REG_NUM]; /* for APK */ - u4Byte APKoutput[2][2]; /* path A/B; output1_1a/output1_2a */ - u1Byte bAPKdone; - u1Byte bAPKThermalMeterIgnore; - u1Byte bDPdone; - u1Byte bDPPathAOK; - u1Byte bDPPathBOK; + u32 APKoutput[2][2]; /* path A/B; output1_1a/output1_2a */ + u8 bAPKdone; + u8 bAPKThermalMeterIgnore; + u8 bDPdone; + u8 bDPPathAOK; + u8 bDPPathBOK; }; /* ODM Dynamic common info value definition */ struct fast_ant_train { - u1Byte Bssid[6]; - u1Byte antsel_rx_keep_0; - u1Byte antsel_rx_keep_1; - u1Byte antsel_rx_keep_2; - u4Byte antSumRSSI[7]; - u4Byte antRSSIcnt[7]; - u4Byte antAveRSSI[7]; - u1Byte FAT_State; - u4Byte TrainIdx; - u1Byte antsel_a[ODM_ASSOCIATE_ENTRY_NUM]; - u1Byte antsel_b[ODM_ASSOCIATE_ENTRY_NUM]; - u1Byte antsel_c[ODM_ASSOCIATE_ENTRY_NUM]; - u4Byte MainAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM]; - u4Byte AuxAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM]; - u4Byte MainAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; - u4Byte AuxAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; - u1Byte RxIdleAnt; + u8 Bssid[6]; + u8 antsel_rx_keep_0; + u8 antsel_rx_keep_1; + u8 antsel_rx_keep_2; + u32 antSumRSSI[7]; + u32 antRSSIcnt[7]; + u32 antAveRSSI[7]; + u8 FAT_State; + u32 TrainIdx; + u8 antsel_a[ODM_ASSOCIATE_ENTRY_NUM]; + u8 antsel_b[ODM_ASSOCIATE_ENTRY_NUM]; + u8 antsel_c[ODM_ASSOCIATE_ENTRY_NUM]; + u32 MainAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM]; + u32 AuxAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM]; + u32 MainAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; + u32 AuxAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM]; + u8 RxIdleAnt; bool bBecomeLinked; }; @@ -815,47 +815,47 @@ struct odm_dm_struct { bool odm_ready; struct rtl8192cd_priv *fake_priv; - u8Byte DebugComponents; - u4Byte DebugLevel; + u64 DebugComponents; + u32 DebugLevel; /* ODM HANDLE, DRIVER NEEDS NOT TO HOOK------ */ bool bCckHighPower; - u1Byte RFPathRxEnable; /* ODM_CMNINFO_RFPATH_ENABLE */ - u1Byte ControlChannel; + u8 RFPathRxEnable; /* ODM_CMNINFO_RFPATH_ENABLE */ + u8 ControlChannel; /* ODM HANDLE, DRIVER NEEDS NOT TO HOOK------ */ /* 1 COMMON INFORMATION */ /* Init Value */ /* HOOK BEFORE REG INIT----------- */ /* ODM Platform info AP/ADSL/CE/MP = 1/2/3/4 */ - u1Byte SupportPlatform; + u8 SupportPlatform; /* ODM Support Ability DIG/RATR/TX_PWR_TRACK/ ¡K¡K = 1/2/3/¡K */ - u4Byte SupportAbility; + u32 SupportAbility; /* ODM PCIE/USB/SDIO/GSPI = 0/1/2/3 */ - u1Byte SupportInterface; + u8 SupportInterface; /* ODM composite or independent. Bit oriented/ 92C+92D+ .... or any other type = 1/2/3/... */ - u4Byte SupportICType; + u32 SupportICType; /* Cut Version TestChip/A-cut/B-cut... = 0/1/2/3/... */ - u1Byte CutVersion; + u8 CutVersion; /* Fab Version TSMC/UMC = 0/1 */ - u1Byte FabVersion; + u8 FabVersion; /* RF Type 4T4R/3T3R/2T2R/1T2R/1T1R/... */ - u1Byte RFType; + u8 RFType; /* Board Type Normal/HighPower/MiniCard/SLIM/Combo/... = 0/1/2/3/4/... */ - u1Byte BoardType; + u8 BoardType; /* with external LNA NO/Yes = 0/1 */ - u1Byte ExtLNA; + u8 ExtLNA; /* with external PA NO/Yes = 0/1 */ - u1Byte ExtPA; + u8 ExtPA; /* with external TRSW NO/Yes = 0/1 */ - u1Byte ExtTRSW; - u1Byte PatchID; /* Customer ID */ + u8 ExtTRSW; + u8 PatchID; /* Customer ID */ bool bInHctTest; bool bWIFITest; bool bDualMacSmartConcurrent; - u4Byte BK_SupportAbility; - u1Byte AntDivType; + u32 BK_SupportAbility; + u8 AntDivType; /* HOOK BEFORE REG INIT----------- */ /* */ @@ -863,28 +863,28 @@ struct odm_dm_struct { /* */ /* POINTER REFERENCE----------- */ - u1Byte u1Byte_temp; + u8 u8_temp; bool bool_temp; struct adapter *adapter_temp; /* MAC PHY Mode SMSP/DMSP/DMDP = 0/1/2 */ - u1Byte *pMacPhyMode; + u8 *pMacPhyMode; /* TX Unicast byte count */ - u8Byte *pNumTxBytesUnicast; + u64 *pNumTxBytesUnicast; /* RX Unicast byte count */ - u8Byte *pNumRxBytesUnicast; + u64 *pNumRxBytesUnicast; /* Wireless mode B/G/A/N = BIT0/BIT1/BIT2/BIT3 */ - u1Byte *pWirelessMode; /* ODM_WIRELESS_MODE_E */ + u8 *pWirelessMode; /* ODM_WIRELESS_MODE_E */ /* Frequence band 2.4G/5G = 0/1 */ - u1Byte *pBandType; + u8 *pBandType; /* Secondary channel offset don't_care/below/above = 0/1/2 */ - u1Byte *pSecChOffset; + u8 *pSecChOffset; /* Security mode Open/WEP/AES/TKIP = 0/1/2/3 */ - u1Byte *pSecurity; + u8 *pSecurity; /* BW info 20M/40M/80M = 0/1/2 */ - u1Byte *pBandWidth; + u8 *pBandWidth; /* Central channel location Ch1/Ch2/.... */ - u1Byte *pChannel; /* central channel number */ + u8 *pChannel; /* central channel number */ /* Common info for 92D DMSP */ bool *pbGetValueFromOtherMac; @@ -894,9 +894,9 @@ struct odm_dm_struct { bool *pbScanInProcess; bool *pbPowerSaving; /* CCA Path 2-path/path-A/path-B = 0/1/2; using ODM_CCA_PATH_E. */ - u1Byte *pOnePathCCA; + u8 *pOnePathCCA; /* pMgntInfo->AntennaTest */ - u1Byte *pAntennaTest; + u8 *pAntennaTest; bool *pbNet_closed; /* POINTER REFERENCE----------- */ /* */ @@ -904,14 +904,14 @@ struct odm_dm_struct { bool bWIFI_Direct; bool bWIFI_Display; bool bLinked; - u1Byte RSSI_Min; - u1Byte InterfaceIndex; /* Add for 92D dual MAC: 0--Mac0 1--Mac1 */ + u8 RSSI_Min; + u8 InterfaceIndex; /* Add for 92D dual MAC: 0--Mac0 1--Mac1 */ bool bIsMPChip; bool bOneEntryOnly; /* Common info for BTDM */ bool bBtDisabled; /* BT is disabled */ bool bBtHsOperation; /* BT HS mode is under progress */ - u1Byte btHsDigVal; /* use BT rssi to decide the DIG value */ + u8 btHsDigVal; /* use BT rssi to decide the DIG value */ bool bBtDisableEdcaTurbo; /* Under some condition, don't enable the EDCA Turbo */ bool bBtBusy; /* BT is busy. */ /* CALL BY VALUE------------- */ @@ -921,7 +921,7 @@ struct odm_dm_struct { /* 2012/01/12 MH For MP, we need to reduce one array pointer for default port.?? */ struct sta_info *pODM_StaInfo[ODM_ASSOCIATE_ENTRY_NUM]; - u2Byte CurrminRptTime; + u16 CurrminRptTime; struct odm_ra_info RAInfo[ODM_ASSOCIATE_ENTRY_NUM]; /* Use MacID as array index. STA MacID=0, VWiFi Client MacID={1, ODM_ASSOCIATE_ENTRY_NUM-1} */ /* */ /* 2012/02/14 MH Add to share 88E ra with other SW team. */ @@ -951,7 +951,7 @@ struct odm_dm_struct { bool RSSI_test; struct edca_turbo DM_EDCA_Table; - u4Byte WMMEDCA_BE; + u32 WMMEDCA_BE; /* Copy from SD4 structure */ /* */ /* ================================================== */ @@ -964,12 +964,12 @@ struct odm_dm_struct { /* PSD */ bool bUserAssignLevel; struct timer_list PSDTimer; - u1Byte RSSI_BT; /* come from BT */ + u8 RSSI_BT; /* come from BT */ bool bPSDinProcess; bool bDMInitialGainEnable; /* for rate adaptive, in fact, 88c/92c fw will handle this */ - u1Byte bUseRAMask; + u8 bUseRAMask; struct odm_rate_adapt RateAdaptive; @@ -979,15 +979,15 @@ struct odm_dm_struct { /* */ /* TX power tracking */ /* */ - u1Byte BbSwingIdxOfdm; - u1Byte BbSwingIdxOfdmCurrent; - u1Byte BbSwingIdxOfdmBase; + u8 BbSwingIdxOfdm; + u8 BbSwingIdxOfdmCurrent; + u8 BbSwingIdxOfdmBase; bool BbSwingFlagOfdm; - u1Byte BbSwingIdxCck; - u1Byte BbSwingIdxCckCurrent; - u1Byte BbSwingIdxCckBase; + u8 BbSwingIdxCck; + u8 BbSwingIdxCckCurrent; + u8 BbSwingIdxCckBase; bool BbSwingFlagCck; - u1Byte *mp_mode; + u8 *mp_mode; /* */ /* ODM system resource. */ /* */ @@ -1166,9 +1166,9 @@ enum dm_swas { #define OFDM_TABLE_SIZE_92D 43 #define CCK_TABLE_SIZE 33 -extern u4Byte OFDMSwingTable[OFDM_TABLE_SIZE_92D]; -extern u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; -extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; +extern u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D]; +extern u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; +extern u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; @@ -1184,18 +1184,18 @@ extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; #define SWAW_STEP_PEAK 0 #define SWAW_STEP_DETERMINE 1 -void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u1Byte CurrentIGI); -void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u1Byte CurCCK_CCAThres); +void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI); +void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres); void ODM_SetAntenna( struct odm_dm_struct *pDM_Odm, - u1Byte Antenna); + u8 Antenna); #define dm_RF_Saving ODM_RF_Saving void ODM_RF_Saving( struct odm_dm_struct *pDM_Odm, - u1Byte bForceInNormal ); + u8 bForceInNormal ); #define SwAntDivRestAfterLink ODM_SwAntDivRestAfterLink void ODM_SwAntDivRestAfterLink( struct odm_dm_struct *pDM_Odm); @@ -1206,35 +1206,30 @@ ODM_TXPowerTrackingCheck( struct odm_dm_struct *pDM_Odm ); -bool -ODM_RAStateCheck( - struct odm_dm_struct *pDM_Odm, - s4Byte RSSI, - bool bForceUpdate, - pu1Byte pRATRState - ); +bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, + bool bForceUpdate, u8 *pRATRState); #define dm_SWAW_RSSI_Check ODM_SwAntDivChkPerPktRssi -void ODM_SwAntDivChkPerPktRssi(struct odm_dm_struct *pDM_Odm, u1Byte StationID, struct odm_phy_status_info *pPhyInfo); +void ODM_SwAntDivChkPerPktRssi(struct odm_dm_struct *pDM_Odm, u8 StationID, struct odm_phy_status_info *pPhyInfo); -u4Byte ConvertTo_dB(u4Byte Value); +u32 ConvertTo_dB(u32 Value); -u4Byte +u32 GetPSDData( struct odm_dm_struct *pDM_Odm, unsigned int point, - u1Byte initial_gain_psd); + u8 initial_gain_psd); void odm_DIGbyRSSI_LPS( struct odm_dm_struct *pDM_Odm ); -u4Byte ODM_Get_Rate_Bitmap( +u32 ODM_Get_Rate_Bitmap( struct odm_dm_struct *pDM_Odm, - u4Byte macid, - u4Byte ra_mask, - u1Byte rssi_level); + u32 macid, + u32 ra_mask, + u8 rssi_level); void ODM_DMInit( struct odm_dm_struct *pDM_Odm); @@ -1247,7 +1242,7 @@ void ODM_CmnInfoInit( struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, - u4Byte Value + u32 Value ); void @@ -1261,15 +1256,15 @@ void ODM_CmnInfoPtrArrayHook( struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, - u2Byte Index, + u16 Index, void * pValue ); void ODM_CmnInfoUpdate( struct odm_dm_struct *pDM_Odm, - u4Byte CmnInfo, - u8Byte Value + u32 CmnInfo, + u64 Value ); void @@ -1295,8 +1290,8 @@ ODM_ResetIQKResult( void ODM_AntselStatistics_88C( struct odm_dm_struct *pDM_Odm, - u1Byte MacId, - u4Byte PWDBAll, + u8 MacId, + u32 PWDBAll, bool isCCKrate ); @@ -1308,7 +1303,7 @@ ODM_SingleDualAntennaDefaultSetting( bool ODM_SingleDualAntennaDetection( struct odm_dm_struct *pDM_Odm, - u1Byte mode + u8 mode ); void odm_dtc(struct odm_dm_struct *pDM_Odm); diff --git a/include/odm_HWConfig.h b/include/odm_HWConfig.h index 9afaca1..49e90f2 100644 --- a/include/odm_HWConfig.h +++ b/include/odm_HWConfig.h @@ -70,47 +70,47 @@ struct phy_rx_agc_info { #ifdef __LITTLE_ENDIAN - u1Byte gain:7,trsw:1; + u8 gain:7,trsw:1; #else - u1Byte trsw:1,gain:7; + u8 trsw:1,gain:7; #endif }; struct phy_status_rpt { struct phy_rx_agc_info path_agc[2]; - u1Byte ch_corr[2]; - u1Byte cck_sig_qual_ofdm_pwdb_all; - u1Byte cck_agc_rpt_ofdm_cfosho_a; - u1Byte cck_rpt_b_ofdm_cfosho_b; - u1Byte rsvd_1;/* ch_corr_msb; */ - u1Byte noise_power_db_msb; - u1Byte path_cfotail[2]; - u1Byte pcts_mask[2]; - s1Byte stream_rxevm[2]; - u1Byte path_rxsnr[2]; - u1Byte noise_power_db_lsb; - u1Byte rsvd_2[3]; - u1Byte stream_csi[2]; - u1Byte stream_target_csi[2]; - s1Byte sig_evm; - u1Byte rsvd_3; + u8 ch_corr[2]; + u8 cck_sig_qual_ofdm_pwdb_all; + u8 cck_agc_rpt_ofdm_cfosho_a; + u8 cck_rpt_b_ofdm_cfosho_b; + u8 rsvd_1;/* ch_corr_msb; */ + u8 noise_power_db_msb; + u8 path_cfotail[2]; + u8 pcts_mask[2]; + s8 stream_rxevm[2]; + u8 path_rxsnr[2]; + u8 noise_power_db_lsb; + u8 rsvd_2[3]; + u8 stream_csi[2]; + u8 stream_target_csi[2]; + s8 sig_evm; + u8 rsvd_3; #ifdef __LITTLE_ENDIAN - u1Byte antsel_rx_keep_2:1; /* ex_intf_flg:1; */ - u1Byte sgi_en:1; - u1Byte rxsc:2; - u1Byte idle_long:1; - u1Byte r_ant_train_en:1; - u1Byte ant_sel_b:1; - u1Byte ant_sel:1; + u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */ + u8 sgi_en:1; + u8 rxsc:2; + u8 idle_long:1; + u8 r_ant_train_en:1; + u8 ant_sel_b:1; + u8 ant_sel:1; #else /* _BIG_ENDIAN_ */ - u1Byte ant_sel:1; - u1Byte ant_sel_b:1; - u1Byte r_ant_train_en:1; - u1Byte idle_long:1; - u1Byte rxsc:2; - u1Byte sgi_en:1; - u1Byte antsel_rx_keep_2:1; /* ex_intf_flg:1; */ + u8 ant_sel:1; + u8 ant_sel_b:1; + u8 r_ant_train_en:1; + u8 idle_long:1; + u8 rxsc:2; + u8 sgi_en:1; + u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */ #endif }; @@ -123,15 +123,15 @@ void ODM_PhyStatusQuery( struct odm_dm_struct * pDM_Odm, struct odm_phy_status_info *pPhyInfo, - pu1Byte pPhyStatus, + u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo ); void ODM_MacStatusQuery( struct odm_dm_struct * pDM_Odm, - pu1Byte pMacStatus, - u1Byte MacID, + u8 *pMacStatus, + u8 MacID, bool bPacketMatchBSSID, bool bPacketToSelf, bool bPacketBeacon diff --git a/include/odm_RTL8188E.h b/include/odm_RTL8188E.h index 26d73f9..46ae6d5 100644 --- a/include/odm_RTL8188E.h +++ b/include/odm_RTL8188E.h @@ -33,17 +33,14 @@ void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *pDM_Odm); void ODM_AntennaDiversity_88E(struct odm_dm_struct *pDM_Odm); -void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *pDM_Odm, - pu1Byte pDesc, - u1Byte macId -); +void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *pDM_Odm, u8 *pDesc, u8 macId); -void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *pDM_Odm, u1Byte Ant); +void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *pDM_Odm, u8 Ant); void ODM_AntselStatistics_88E(struct odm_dm_struct *pDM_Odm, - u1Byte antsel_tr_mux, - u4Byte MacId, - u1Byte RxPWDBAll + u8 antsel_tr_mux, + u32 MacId, + u8 RxPWDBAll ); void diff --git a/include/odm_RegConfig8188E.h b/include/odm_RegConfig8188E.h index 6fbeb5d..482bdbf 100644 --- a/include/odm_RegConfig8188E.h +++ b/include/odm_RegConfig8188E.h @@ -20,51 +20,51 @@ #ifndef __INC_ODM_REGCONFIG_H_8188E #define __INC_ODM_REGCONFIG_H_8188E -void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, u4Byte Data, - enum ODM_RF_RADIO_PATH RF_PATH, u4Byte RegAddr); +void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data, + enum ODM_RF_RADIO_PATH RF_PATH, u32 RegAddr); void odm_ConfigRF_RadioA_8188E( struct odm_dm_struct *pDM_Odm, - u4Byte Addr, - u4Byte Data + u32 Addr, + u32 Data ); void odm_ConfigRF_RadioB_8188E( struct odm_dm_struct *pDM_Odm, - u4Byte Addr, - u4Byte Data + u32 Addr, + u32 Data ); void odm_ConfigMAC_8188E( struct odm_dm_struct *pDM_Odm, - u4Byte Addr, - u1Byte Data + u32 Addr, + u8 Data ); void odm_ConfigBB_AGC_8188E( struct odm_dm_struct *pDM_Odm, - u4Byte Addr, - u4Byte Bitmask, - u4Byte Data + u32 Addr, + u32 Bitmask, + u32 Data ); void odm_ConfigBB_PHY_REG_PG_8188E( struct odm_dm_struct *pDM_Odm, - u4Byte Addr, - u4Byte Bitmask, - u4Byte Data + u32 Addr, + u32 Bitmask, + u32 Data ); void odm_ConfigBB_PHY_8188E( struct odm_dm_struct *pDM_Odm, - u4Byte Addr, - u4Byte Bitmask, - u4Byte Data + u32 Addr, + u32 Bitmask, + u32 Data ); #endif diff --git a/include/odm_debug.h b/include/odm_debug.h index 504100d..fdfe12f 100644 --- a/include/odm_debug.h +++ b/include/odm_debug.h @@ -143,7 +143,7 @@ if (((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \ { \ int __i; \ - pu1Byte __ptr = (pu1Byte)ptr; \ + pu8 __ptr = (pu8)ptr; \ DbgPrint("[ODM] "); \ DbgPrint(title_str); \ DbgPrint(" "); \ diff --git a/include/odm_interface.h b/include/odm_interface.h index 3c39824..8e19342 100644 --- a/include/odm_interface.h +++ b/include/odm_interface.h @@ -83,37 +83,37 @@ typedef void (*RT_WORKITEM_CALL_BACK)(void * pContext); /* =========== EXtern Function Prototype */ /* */ -u1Byte ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr); +u8 ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr); -u2Byte ODM_Read2Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr); +u16 ODM_Read2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr); -u4Byte ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr); +u32 ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr); -void ODM_Write1Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u1Byte Data); +void ODM_Write1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u8 Data); -void ODM_Write2Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u2Byte Data); +void ODM_Write2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u16 Data); -void ODM_Write4Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte Data); +void ODM_Write4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 Data); -void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask, u4Byte Data); +void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data); -u4Byte ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask); +u32 ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask); -void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask, u4Byte Data); +void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data); -u4Byte ODM_GetBBReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask); +u32 ODM_GetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask); -void ODM_SetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u4Byte RegAddr, u4Byte BitMask, u4Byte Data); +void ODM_SetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u32 RegAddr, u32 BitMask, u32 Data); -u4Byte ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u4Byte RegAddr, u4Byte BitMask); +u32 ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u32 RegAddr, u32 BitMask); /* */ /* Memory Relative Function. */ /* */ -void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u4Byte length); -void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u4Byte length); +void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u32 length); +void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u32 length); -s4Byte ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2, u4Byte length); +s32 ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2, u32 length); /* */ /* ODM MISC-spin lock relative API. */ @@ -142,17 +142,17 @@ void ODM_IsWorkItemScheduled(void *pRtWorkItem); /* */ /* ODM Timer relative API. */ /* */ -void ODM_StallExecution(u4Byte usDelay); +void ODM_StallExecution(u32 usDelay); -void ODM_delay_ms(u4Byte ms); +void ODM_delay_ms(u32 ms); -void ODM_delay_us(u4Byte us); +void ODM_delay_us(u32 us); -void ODM_sleep_ms(u4Byte ms); +void ODM_sleep_ms(u32 ms); -void ODM_sleep_us(u4Byte us); +void ODM_sleep_us(u32 us); -void ODM_SetTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer, u4Byte msDelay); +void ODM_SetTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer, u32 msDelay); void ODM_InitializeTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer, void *CallBackFunc, void *pContext, const char *szID); @@ -163,6 +163,6 @@ void ODM_ReleaseTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer); /* */ /* ODM FW relative API. */ /* */ -u4Byte ODM_FillH2CCmd(pu1Byte pH2CBuffer, u4Byte H2CBufferLen, u4Byte CmdNum, pu4Byte pElementID, pu4Byte pCmdLen, pu1Byte *pCmbBuffer, pu1Byte CmdStartSeq); +u32 ODM_FillH2CCmd(u8 *pH2CBuffer, u32 H2CBufferLen, u32 CmdNum, u32 *pElementID, u32 *pCmdLen, u8 **pCmbBuffer, u8 *CmdStartSeq); #endif /* __ODM_INTERFACE_H__ */ diff --git a/include/odm_precomp.h b/include/odm_precomp.h index 0eb79eb..5648d01 100644 --- a/include/odm_precomp.h +++ b/include/odm_precomp.h @@ -81,7 +81,7 @@ void odm_DIG(struct odm_dm_struct *pDM_Odm); void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm); void odm_RefreshRateAdaptiveMaskMP(struct odm_dm_struct *pDM_Odm); void odm_DynamicBBPowerSaving(struct odm_dm_struct *pDM_Odm); -void odm_SwAntDivChkAntSwitch(struct odm_dm_struct *pDM_Odm, u1Byte Step); +void odm_SwAntDivChkAntSwitch(struct odm_dm_struct *pDM_Odm, u8 Step); void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm); void odm_DynamicTxPower(struct odm_dm_struct *pDM_Odm); void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm); diff --git a/include/odm_types.h b/include/odm_types.h index f2b4a4b..0a1bf60 100644 --- a/include/odm_types.h +++ b/include/odm_types.h @@ -43,30 +43,6 @@ enum RT_SPINLOCK_TYPE { #include -#define u1Byte u8 -#define pu1Byte u8* - -#define u2Byte u16 -#define pu2Byte u16* - -#define u4Byte u32 -#define pu4Byte u32* - -#define u8Byte u64 -#define pu8Byte u64* - -#define s1Byte s8 -#define ps1Byte s8* - -#define s2Byte s16 -#define ps2Byte s16* - -#define s4Byte s32 -#define ps4Byte s32* - -#define s8Byte s64 -#define ps8Byte s64* - #define DEV_BUS_TYPE RT_USB_INTERFACE #define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value) diff --git a/include/rtl8188e_hal.h b/include/rtl8188e_hal.h index 4c60b71..8369f9f 100644 --- a/include/rtl8188e_hal.h +++ b/include/rtl8188e_hal.h @@ -194,13 +194,13 @@ enum ChannelPlan }; struct txpowerinfo24g { - u1Byte IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; - u1Byte IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G-1]; + u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; + u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G-1]; /* If only one tx, only BW20 and OFDM are used. */ - s1Byte CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT]; - s1Byte OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; - s1Byte BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; - s1Byte BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; + s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT]; + s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; + s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; + s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; }; #define EFUSE_REAL_CONTENT_LEN 512 diff --git a/include/rtw_mp.h b/include/rtw_mp.h index e179910..74cd62a 100644 --- a/include/rtw_mp.h +++ b/include/rtw_mp.h @@ -81,44 +81,38 @@ #define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((int)0xC0010029L) /* cause 3 */ enum antenna_path { - ANTENNA_NONE = 0x00, - ANTENNA_D , - ANTENNA_C , - ANTENNA_CD , - ANTENNA_B , - ANTENNA_BD , - ANTENNA_BC , - ANTENNA_BCD , - ANTENNA_A , - ANTENNA_AD , - ANTENNA_AC , - ANTENNA_ACD , - ANTENNA_AB , - ANTENNA_ABD , - ANTENNA_ABC , - ANTENNA_ABCD + ANTENNA_NONE = 0x00, + ANTENNA_D, + ANTENNA_C, + ANTENNA_CD, + ANTENNA_B, + ANTENNA_BD, + ANTENNA_BC, + ANTENNA_BCD, + ANTENNA_A, + ANTENNA_AD, + ANTENNA_AC, + ANTENNA_ACD, + ANTENNA_AB, + ANTENNA_ABD, + ANTENNA_ABC, + ANTENNA_ABCD }; #define MAX_MP_XMITBUF_SZ 2048 #define NR_MP_XMITFRAME 8 -struct mp_xmit_frame -{ +struct mp_xmit_frame { struct list_head list; - struct pkt_attrib attrib; - struct sk_buff *pkt; - int frame_tag; - struct adapter *padapter; - + struct urb *pxmit_urb[8]; /* insert urb, irp, and irpcnt info below... */ u8 *mem_addr; u32 sz[8]; - struct urb * pxmit_urb[8]; u8 bpending[8]; int ac_tag[8]; int last[8]; @@ -127,15 +121,14 @@ struct mp_xmit_frame uint mem[(MAX_MP_XMITBUF_SZ >> 2)]; }; -struct mp_wiparam -{ +struct mp_wiparam { u32 bcompleted; u32 act_type; u32 io_offset; u32 io_value; }; -typedef void(*wi_act_func)(void* padapter); +typedef void(*wi_act_func)(void *padapter); struct mp_tx { u8 stop; @@ -153,41 +146,6 @@ struct mp_tx { #define MP_MAX_LINES 1000 #define MP_MAX_LINES_BYTES 256 -#define u1Byte u8 -#define s1Byte s8 -#define u4Byte u32 -#define s4Byte s32 -#define u1Byte u8 -#define pu1Byte u8* - -#define u2Byte u16 -#define pu2Byte u16* - -#define u4Byte u32 -#define pu4Byte u32* - -#define u8Byte u64 -#define pu8Byte u64* - -#define s1Byte s8 -#define ps1Byte s8* - -#define s2Byte s16 -#define ps2Byte s16* - -#define s4Byte s32 -#define ps4Byte s32* - -#define s8Byte s64 -#define ps8Byte s64* - -#define UCHAR u8 -#define USHORT u16 -#define UINT u32 -#define ULONG u32 -#define PULONG u32* - - typedef void (*MPT_WORK_ITEM_HANDLER)(void *Adapter); @@ -215,23 +173,23 @@ struct mpt_context { MPT_WORK_ITEM_HANDLER CurrMptAct; /* 1=Start, 0=Stop from UI. */ - ULONG MptTestStart; + u32 MptTestStart; /* _TEST_MODE, defined in MPT_Req2.h */ - ULONG MptTestItem; + u32 MptTestItem; /* Variable needed in each implementation of CurrMptAct. */ - ULONG MptActType; /* Type of action performed in CurrMptAct. */ + u32 MptActType; /* Type of action performed in CurrMptAct. */ /* The Offset of IO operation is depend of MptActType. */ - ULONG MptIoOffset; + u32 MptIoOffset; /* The Value of IO operation is depend of MptActType. */ - ULONG MptIoValue; + u32 MptIoValue; /* The RfPath of IO operation is depend of MptActType. */ - ULONG MptRfPath; + u32 MptRfPath; enum wireless_mode MptWirelessModeToSw; /* Wireless mode to switch. */ u8 MptChannelToSw; /* Channel to switch. */ u8 MptInitGainToSet; /* Initial gain to set. */ - ULONG MptBandWidth; /* bandwidth to switch. */ - ULONG MptRateIndex; /* rate index. */ + u32 MptBandWidth; /* bandwidth to switch. */ + u32 MptRateIndex; /* rate index. */ /* Register value kept for Single Carrier Tx test. */ u8 btMpCckTxPower; /* Register value kept for Single Carrier Tx test. */ @@ -240,13 +198,13 @@ struct mpt_context { u8 TxPwrLevel[2]; /* rf-A, rf-B */ /* Content of RCR Regsiter for Mass Production Test. */ - ULONG MptRCR; + u32 MptRCR; /* true if we only receive packets with specific pattern. */ bool bMptFilterPattern; /* Rx OK count, statistics used in Mass Production Test. */ - ULONG MptRxOkCnt; + u32 MptRxOkCnt; /* Rx CRC32 error count, statistics used in Mass Production Test. */ - ULONG MptRxCrcErrCnt; + u32 MptRxCrcErrCnt; bool bCckContTx; /* true if we are in CCK Continuous Tx test. */ bool bOfdmContTx; /* true if we are in OFDM Continuous Tx test. */ @@ -260,12 +218,12 @@ struct mpt_context { /* ACK counter asked by K.Y.. */ bool bMptEnableAckCounter; - ULONG MptAckCounter; + u32 MptAckCounter; /* SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~! */ - /* s1Byte BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT]; */ - /* s1Byte BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES]; */ - /* s4Byte RfReadLine[2]; */ + /* s8 BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT]; */ + /* s8 BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES]; */ + /* s32 RfReadLine[2]; */ u8 APK_bound[2]; /* for APK path A/path B */ bool bMptIndexEven; @@ -276,12 +234,12 @@ struct mpt_context { u8 backup0x52_RF_A; u8 backup0x52_RF_B; - u1Byte h2cReqNum; - u1Byte c2hBuf[20]; + u8 h2cReqNum; + u8 c2hBuf[20]; - u1Byte btInBuf[100]; - ULONG mptOutLen; - u1Byte mptOutBuf[100]; + u8 btInBuf[100]; + u32 mptOutLen; + u8 mptOutBuf[100]; }; diff --git a/include/usb_osintf.h b/include/usb_osintf.h index 46f8255..9de99ca 100644 --- a/include/usb_osintf.h +++ b/include/usb_osintf.h @@ -27,7 +27,7 @@ extern char *rtw_initmac; extern int rtw_mc2u_disable; -#define USBD_HALTED(Status) ((ULONG)(Status) >> 30 == 3) +#define USBD_HALTED(Status) ((u32)(Status) >> 30 == 3) u8 usbvendorrequest(struct dvobj_priv *pdvobjpriv, enum bt_usb_request brequest, enum rt_usb_wvalue wvalue, u8 windex, void *data, diff --git a/include/wlan_bssdef.h b/include/wlan_bssdef.h index a4a2bf8..e70075d 100644 --- a/include/wlan_bssdef.h +++ b/include/wlan_bssdef.h @@ -30,8 +30,8 @@ #define NDIS_802_11_RSSI long /* in dBm */ struct ndis_802_11_ssid { - ULONG SsidLength; - UCHAR Ssid[32]; + u32 SsidLength; + u8 Ssid[32]; }; enum NDIS_802_11_NETWORK_TYPE { @@ -43,10 +43,10 @@ enum NDIS_802_11_NETWORK_TYPE { }; struct ndis_802_11_config_fh { - ULONG Length; /* Length of structure */ - ULONG HopPattern; /* As defined by 802.11, MSB set */ - ULONG HopSet; /* to one if non-802.11 */ - ULONG DwellTime; /* units are Kusec */ + u32 Length; /* Length of structure */ + u32 HopPattern; /* As defined by 802.11, MSB set */ + u32 HopSet; /* to one if non-802.11 */ + u32 DwellTime; /* units are Kusec */ }; /* @@ -54,10 +54,10 @@ struct ndis_802_11_config_fh { * ODI Handler will convert the channel number to freq. number. */ struct ndis_802_11_config { - ULONG Length; /* Length of structure */ - ULONG BeaconPeriod; /* units are Kusec */ - ULONG ATIMWindow; /* units are Kusec */ - ULONG DSConfig; /* Frequency, units are kHz */ + u32 Length; /* Length of structure */ + u32 BeaconPeriod; /* units are Kusec */ + u32 ATIMWindow; /* units are Kusec */ + u32 DSConfig; /* Frequency, units are kHz */ struct ndis_802_11_config_fh FHConfig; }; @@ -70,22 +70,22 @@ enum ndis_802_11_network_infra { }; struct ndis_802_11_fixed_ie { - UCHAR Timestamp[8]; - USHORT BeaconInterval; - USHORT Capabilities; + u8 Timestamp[8]; + u16 BeaconInterval; + u16 Capabilities; }; struct ndis_802_11_var_ie { - UCHAR ElementID; - UCHAR Length; - UCHAR data[1]; + u8 ElementID; + u8 Length; + u8 data[1]; }; /* * Length is the 4 bytes multiples of the sume of - * [ETH_ALEN] + 2 + sizeof (struct ndis_802_11_ssid) + sizeof (ULONG) + * [ETH_ALEN] + 2 + sizeof (struct ndis_802_11_ssid) + sizeof (u32) * + sizeof (NDIS_802_11_RSSI) + sizeof (enum NDIS_802_11_NETWORK_TYPE) * + sizeof (struct ndis_802_11_config) * + NDIS_802_11_LENGTH_RATES_EX + IELength @@ -129,27 +129,27 @@ enum ndis_802_11_wep_status { #define NDIS_802_11_AI_RESFI_ASSOCIATIONID 4 struct ndis_802_11_ai_reqfi { - USHORT Capabilities; - USHORT ListenInterval; + u16 Capabilities; + u16 ListenInterval; unsigned char CurrentAPAddress[ETH_ALEN]; }; struct ndis_802_11_ai_resfi { - USHORT Capabilities; - USHORT StatusCode; - USHORT AssociationId; + u16 Capabilities; + u16 StatusCode; + u16 AssociationId; }; struct ndis_802_11_assoc_info { - ULONG Length; - USHORT AvailableRequestFixedIEs; + u32 Length; + u16 AvailableRequestFixedIEs; struct ndis_802_11_ai_reqfi RequestFixedIEs; - ULONG RequestIELength; - ULONG OffsetRequestIEs; - USHORT AvailableResponseFixedIEs; + u32 RequestIELength; + u32 OffsetRequestIEs; + u16 AvailableResponseFixedIEs; struct ndis_802_11_ai_resfi ResponseFixedIEs; - ULONG ResponseIELength; - ULONG OffsetResponseIEs; + u32 ResponseIELength; + u32 OffsetResponseIEs; }; enum ndis_802_11_reload_def { @@ -158,32 +158,32 @@ enum ndis_802_11_reload_def { /* Key mapping keys require a BSSID */ struct ndis_802_11_key { - ULONG Length; /* Length of this structure */ - ULONG KeyIndex; - ULONG KeyLength; /* length of key in bytes */ + u32 Length; /* Length of this structure */ + u32 KeyIndex; + u32 KeyLength; /* length of key in bytes */ unsigned char BSSID[ETH_ALEN]; unsigned long long KeyRSC; - UCHAR KeyMaterial[32]; /* var len depending on above field */ + u8 KeyMaterial[32]; /* var len depending on above field */ }; struct ndis_802_11_remove_key { - ULONG Length; /* Length */ - ULONG KeyIndex; + u32 Length; /* Length */ + u32 KeyIndex; unsigned char BSSID[ETH_ALEN]; }; struct ndis_802_11_wep { - ULONG Length; /* Length of this structure */ - ULONG KeyIndex; /* 0 is the per-client key, + u32 Length; /* Length of this structure */ + u32 KeyIndex; /* 0 is the per-client key, * 1-N are the global keys */ - ULONG KeyLength; /* length of key in bytes */ - UCHAR KeyMaterial[16];/* variable len depending on above field */ + u32 KeyLength; /* length of key in bytes */ + u8 KeyMaterial[16];/* variable len depending on above field */ }; struct ndis_802_11_auth_req { - ULONG Length; /* Length of structure */ + u32 Length; /* Length of structure */ unsigned char Bssid[ETH_ALEN]; - ULONG Flags; + u32 Flags; }; enum ndis_802_11_status_type { @@ -214,8 +214,8 @@ struct ndis_802_11_auth_evt { }; struct ndis_802_11_test { - ULONG Length; - ULONG Type; + u32 Length; + u32 Type; union { struct ndis_802_11_auth_evt AuthenticationEvent; NDIS_802_11_RSSI RssiTrigger; @@ -251,19 +251,19 @@ struct wlan_bcn_info { * struct wlan_bssid_ex and get_struct wlan_bssid_ex_sz() */ struct wlan_bssid_ex { - ULONG Length; + u32 Length; unsigned char MacAddress[ETH_ALEN]; - UCHAR Reserved[2];/* 0]: IS beacon frame */ + u8 Reserved[2];/* 0]: IS beacon frame */ struct ndis_802_11_ssid Ssid; - ULONG Privacy; + u32 Privacy; NDIS_802_11_RSSI Rssi;/* in dBM,raw data ,get from PHY) */ enum NDIS_802_11_NETWORK_TYPE NetworkTypeInUse; struct ndis_802_11_config Configuration; enum ndis_802_11_network_infra InfrastructureMode; unsigned char SupportedRates[NDIS_802_11_LENGTH_RATES_EX]; struct wlan_phy_info PhyInfo; - ULONG IELength; - UCHAR IEs[MAX_IE_SZ]; /* timestamp, beacon interval, and + u32 IELength; + u8 IEs[MAX_IE_SZ]; /* timestamp, beacon interval, and * capability information) */ } __packed; @@ -318,12 +318,12 @@ enum UAPSD_MAX_SP { struct pmkid_candidate { unsigned char BSSID[ETH_ALEN]; - ULONG Flags; + u32 Flags; }; struct ndis_802_11_pmkid_list { - ULONG Version; /* Version of the structure */ - ULONG NumCandidates; /* No. of pmkid candidates */ + u32 Version; /* Version of the structure */ + u32 NumCandidates; /* No. of pmkid candidates */ struct pmkid_candidate CandidateList[1]; }; @@ -333,10 +333,10 @@ struct ndis_802_11_auth_encrypt { }; struct ndis_802_11_cap { - ULONG Length; - ULONG Version; - ULONG NoOfPMKIDs; - ULONG NoOfAuthEncryptPairsSupported; + u32 Length; + u32 Version; + u32 NoOfPMKIDs; + u32 NoOfAuthEncryptPairsSupported; struct ndis_802_11_auth_encrypt AuthenticationEncryptionSupported[1]; };