From 3a518f1886678d25798c5610140b5c9d84e29d1e Mon Sep 17 00:00:00 2001 From: Larry Finger Date: Tue, 30 Dec 2014 13:48:00 -0600 Subject: [PATCH] rtl8188eu: Remove remainder of code that depends on DM_ODM_SUPPORT_TYPE Signed-off-by: Larry Finger --- hal/Hal8188ERateAdaptive.c | 184 +- hal/Hal8188ERateAdaptive.h | 2 - hal/HalPhyRf.c | 1476 -------- hal/HalPhyRf.h | 48 +- hal/HalPhyRf_8188e.c | 774 +---- hal/HalPhyRf_8188e.h | 37 +- hal/odm.c | 6758 +----------------------------------- hal/odm_HWConfig.c | 158 +- hal/odm_RegConfig8188E.c | 20 +- hal/odm_debug.h | 8 - hal/odm_precomp.h | 85 - hal/odm_types.h | 2 - 12 files changed, 152 insertions(+), 9400 deletions(-) diff --git a/hal/Hal8188ERateAdaptive.c b/hal/Hal8188ERateAdaptive.c index 90934cf..c47efde 100755 --- a/hal/Hal8188ERateAdaptive.c +++ b/hal/Hal8188ERateAdaptive.c @@ -15,128 +15,88 @@ Major Change History: --*/ #include "odm_precomp.h" -//#if( DM_ODM_SUPPORT_TYPE == ODM_MP) -//#include "Mp_Precomp.h" -//#endif - #if (RATE_ADAPTIVE_SUPPORT == 1) // Rate adaptive parameters static u1Byte RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = {{5,4,3,2,0,3},//92 , idx=0 - {6,5,4,3,0,4},//86 , idx=1 - {6,5,4,2,0,4},//81 , idx=2 - {8,7,6,4,0,6},//75 , idx=3 - {10,9,8,6,0,8},//71 , idx=4 - {10,9,8,4,0,8},//66 , idx=5 - {10,9,8,2,0,8},//62 , idx=6 - {10,9,8,0,0,8},//59 , idx=7 - {18,17,16,8,0,16},//53 , idx=8 - {26,25,24,16,0,24},//50 , idx=9 - {34,33,32,24,0,32},//47 , idx=0x0a - //{34,33,32,16,0,32},//43 , idx=0x0b - //{34,33,32,8,0,32},//40 , idx=0x0c - //{34,33,28,8,0,32},//37 , idx=0x0d - //{34,33,20,8,0,32},//32 , idx=0x0e - //{34,32,24,8,0,32},//26 , idx=0x0f - //{49,48,32,16,0,48},//20 , idx=0x10 - //{49,48,24,0,0,48},//17 , idx=0x11 - //{49,47,16,16,0,48},//15 , idx=0x12 - //{49,44,16,16,0,48},//12 , idx=0x13 - //{49,40,16,0,0,48},//9 , idx=0x14 - {34,31,28,20,0,32},//43 , idx=0x0b - {34,31,27,18,0,32},//40 , idx=0x0c - {34,31,26,16,0,32},//37 , idx=0x0d - {34,30,22,16,0,32},//32 , idx=0x0e - {34,30,24,16,0,32},//26 , idx=0x0f - {49,46,40,16,0,48},//20 , idx=0x10 - {49,45,32,0,0,48},//17 , idx=0x11 - {49,45,22,18,0,48},//15 , idx=0x12 - {49,40,24,16,0,48},//12 , idx=0x13 - {49,32,18,12,0,48},//9 , idx=0x14 - {49,22,18,14,0,48},//6 , idx=0x15 - {49,16,16,0,0,48}};//3 //3, idx=0x16 + {6,5,4,3,0,4},//86 , idx=1 + {6,5,4,2,0,4},//81 , idx=2 + {8,7,6,4,0,6},//75 , idx=3 + {10,9,8,6,0,8},//71 , idx=4 + {10,9,8,4,0,8},//66 , idx=5 + {10,9,8,2,0,8},//62 , idx=6 + {10,9,8,0,0,8},//59 , idx=7 + {18,17,16,8,0,16},//53 , idx=8 + {26,25,24,16,0,24},//50 , idx=9 + {34,33,32,24,0,32},//47 , idx=0x0a + {34,31,28,20,0,32},//43 , idx=0x0b + {34,31,27,18,0,32},//40 , idx=0x0c + {34,31,26,16,0,32},//37 , idx=0x0d + {34,30,22,16,0,32},//32 , idx=0x0e + {34,30,24,16,0,32},//26 , idx=0x0f + {49,46,40,16,0,48},//20 , idx=0x10 + {49,45,32,0,0,48},//17 , idx=0x11 + {49,45,22,18,0,48},//15 , idx=0x12 + {49,40,24,16,0,48},//12 , idx=0x13 + {49,32,18,12,0,48},//9 , idx=0x14 + {49,22,18,14,0,48},//6 , idx=0x15 + {49,16,16,0,0,48}};//3 //3, idx=0x16 static u1Byte RETRY_PENALTY_UP[RETRYSIZE+1]={49,44,16,16,0,48}; // 12% for rate up static u1Byte PT_PENALTY[RETRYSIZE+1]={34,31,30,24,0,32}; -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = {{4,4,4,5,4,4,5,7,7,7,8,0x0a, // SS>TH - 4,4,4,4,6,0x0a,0x0b,0x0d, - 5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01 - {0x0a,0x0a,0x0a,0x0a,0x0c,0x0c,0x0e,0x10,0x11,0x12,0x12,0x13, // SSTH - 0x13,0x13,0x14,0x14,0x15,0x15,0x15,0x15, - 0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15}; - -static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0, - 0,0,0,0,0,0x24,0x26,0x2a, - 0x13,0x15,0x17,0x18,0x1a,0x1c,0x1d,0x1f, - 0,0,0,0x1f,0x23,0x28,0x2a,0x2c}; -#else // wilson modify static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = {{4,4,4,5,4,4,5,7,7,7,8,0x0a, // SS>TH - 4,4,4,4,6,0x0a,0x0b,0x0d, - 5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01 - {0x0a,0x0a,0x0b,0x0c,0x0a,0x0a,0x0b,0x0c,0x0d,0x10,0x13,0x14, // SSTH - 0x0f,0x10,0x10,0x12,0x12,0x13,0x14,0x15, - 0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15}; + 0x0f,0x10,0x10,0x12,0x12,0x13,0x14,0x15, + 0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15}; static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0, - 0,0,0,0,0,0x24,0x26,0x2a, - 0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a, - 0,0,0,0x1f,0x23,0x28,0x2a,0x2c}; + 0,0,0,0,0,0x24,0x26,0x2a, + 0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a, + 0,0,0,0x1f,0x23,0x28,0x2a,0x2c}; -#endif - -/*static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0, - 0,0,0,0,0,0x24,0x26,0x2a, - 0x1a,0x1c,0x1e,0x21,0x24,0x2a,0x2b,0x2d, - 0,0,0,0x1f,0x23,0x28,0x2a,0x2c};*/ static u2Byte N_THRESHOLD_HIGH[RATESIZE] = {4,4,8,16, - 24,36,48,72,96,144,192,216, - 60,80,100,160,240,400,560,640, - 300,320,480,720,1000,1200,1600,2000}; + 24,36,48,72,96,144,192,216, + 60,80,100,160,240,400,560,640, + 300,320,480,720,1000,1200,1600,2000}; static u2Byte N_THRESHOLD_LOW[RATESIZE] = {2,2,4,8, - 12,18,24,36,48,72,96,108, - 30,40,50,80,120,200,280,320, - 150,160,240,360,500,600,800,1000}; + 12,18,24,36,48,72,96,108, + 30,40,50,80,120,200,280,320, + 150,160,240,360,500,600,800,1000}; static u1Byte TRYING_NECESSARY[RATESIZE] = {2,2,2,2, - 2,2,3,3,4,4,5,7, - 4,4,7,10,10,12,12,18, - 5,7,7,8,11,18,36,60}; // 0329 // 1207 + 2,2,3,3,4,4,5,7, + 4,4,7,10,10,12,12,18, + 5,7,7,8,11,18,36,60}; // 0329 // 1207 static u1Byte DROPING_NECESSARY[RATESIZE] = {1,1,1,1, - 1,2,3,4,5,6,7,8, - 1,2,3,4,5,6,7,8, - 5,6,7,8,9,10,11,12}; - - + 1,2,3,4,5,6,7,8, + 1,2,3,4,5,6,7,8, + 5,6,7,8,9,10,11,12}; static u4Byte INIT_RATE_FALLBACK_TABLE[16]={0x0f8ff015, // 0: 40M BGN mode - 0x0f8ff010, // 1: 40M GN mode - 0x0f8ff005, // 2: BN mode/ 40M BGN mode - 0x0f8ff000, // 3: N mode - 0x00000ff5, // 4: BG mode - 0x00000ff0, // 5: G mode - 0x0000000d, // 6: B mode - 0, // 7: - 0, // 8: - 0, // 9: - 0, // 10: - 0, // 11: - 0, // 12: - 0, // 13: - 0, // 14: - 0, // 15: - + 0x0f8ff010, // 1: 40M GN mode + 0x0f8ff005, // 2: BN mode/ 40M BGN mode + 0x0f8ff000, // 3: N mode + 0x00000ff5, // 4: BG mode + 0x00000ff0, // 5: G mode + 0x0000000d, // 6: B mode + 0, // 7: + 0, // 8: + 0, // 9: + 0, // 10: + 0, // 11: + 0, // 12: + 0, // 13: + 0, // 14: + 0, // 15: }; static u1Byte PendingForRateUpFail[5]={2,10,24,40,60}; static u2Byte DynamicTxRPTTiming[6]={0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12 ,0x927c}; // 200ms-1200ms @@ -631,11 +591,7 @@ odm_RATxRPTTimerSetting( if(pDM_Odm->CurrminRptTime != minRptTime){ ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, (" CurrminRptTime =0x%04x minRptTime=0x%04x\n", pDM_Odm->CurrminRptTime, minRptTime)); - #if(DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_AP)) - ODM_RA_Set_TxRPT_Time(pDM_Odm,minRptTime); - #else rtw_rpt_timer_cfg_cmd(pDM_Odm->Adapter,minRptTime); - #endif pDM_Odm->CurrminRptTime = minRptTime; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,(" <=====odm_RATxRPTTimerSetting()\n")); @@ -838,9 +794,6 @@ ODM_RA_Set_TxRPT_Time( IN u2Byte minRptTime ) { -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP)) - if (minRptTime != 0xffff) -#endif ODM_Write2Byte(pDM_Odm, REG_TX_RPT_TIME, minRptTime); } @@ -879,7 +832,6 @@ ODM_RA_TxRPT2Handle_8188E( if(valid) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) pRAInfo->RTY[0] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer); pRAInfo->RTY[1] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer); pRAInfo->RTY[2] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer); @@ -887,15 +839,6 @@ ODM_RA_TxRPT2Handle_8188E( pRAInfo->RTY[4] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer); pRAInfo->DROP = (u2Byte)GET_TX_REPORT_TYPE1_DROP_0(pBuffer); pRAInfo->DROP1= (u2Byte)GET_TX_REPORT_TYPE1_DROP_1(pBuffer); -#else - pRAInfo->RTY[0] = (unsigned short)(pBuffer[1] << 8 | pBuffer[0]); - pRAInfo->RTY[1] = pBuffer[2]; - pRAInfo->RTY[2] = pBuffer[3]; - pRAInfo->RTY[3] = pBuffer[4]; - pRAInfo->RTY[4] = pBuffer[5]; - pRAInfo->DROP = pBuffer[6]; - pRAInfo->DROP1= pBuffer[7]; -#endif pRAInfo->TOTAL = pRAInfo->RTY[0] + \ pRAInfo->RTY[1] + \ pRAInfo->RTY[2] + \ @@ -941,15 +884,6 @@ ODM_RA_TxRPT2Handle_8188E( odm_RateDecision_8188E(pDM_Odm, pRAInfo); #endif -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - extern void RTL8188E_SetStationTxRateInfo(PDM_ODM_T, PODM_RA_INFO_T, int); - RTL8188E_SetStationTxRateInfo(pDM_Odm, pRAInfo, MacId); -#ifdef DETECT_STA_EXISTANCE - void RTL8188E_DetectSTAExistance(PDM_ODM_T pDM_Odm, PODM_RA_INFO_T pRAInfo, int MacID); - RTL8188E_DetectSTAExistance(pDM_Odm, pRAInfo, MacId); -#endif -#endif - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("macid=%d R0=%d R1=%d R2=%d R3=%d R4=%d drop=%d valid0=%x RateID=%d SGI=%d\n", MacId, diff --git a/hal/Hal8188ERateAdaptive.h b/hal/Hal8188ERateAdaptive.h index 77fa524..ba4968f 100755 --- a/hal/Hal8188ERateAdaptive.h +++ b/hal/Hal8188ERateAdaptive.h @@ -21,7 +21,6 @@ Major Change History: #define RATESIZE 28 #define TX_RPT2_ITEM_SIZE 8 -#if (DM_ODM_SUPPORT_TYPE != ODM_MP) // // TX report 2 format in Rx desc // @@ -36,7 +35,6 @@ Major Change History: #define GET_TX_REPORT_TYPE1_RERTY_4(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4+1, 0, 8) #define GET_TX_REPORT_TYPE1_DROP_0(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4+2, 0, 8) #define GET_TX_REPORT_TYPE1_DROP_1(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4+3, 0, 8) -#endif // End rate adaptive define diff --git a/hal/HalPhyRf.c b/hal/HalPhyRf.c index 3420e17..a57ff06 100755 --- a/hal/HalPhyRf.c +++ b/hal/HalPhyRf.c @@ -20,1478 +20,6 @@ #include "odm_precomp.h" -#if(DM_ODM_SUPPORT_TYPE & ODM_MP) -#include "Mp_Precomp.h" - -void -phy_PathAStandBy( - IN struct adapter *pAdapter - ) -{ - RTPRINT(FINIT, INIT_IQK, ("Path-A standby mode!\n")); - - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x0); - PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000); - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000); -} - -//1 7. IQK -//#define MAX_TOLERANCE 5 -//#define IQK_DELAY_TIME 1 //ms - -u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK -phy_PathA_IQK_8192C( - IN struct adapter *pAdapter, - IN BOOLEAN configPathB - ) -{ - - u4Byte regEAC, regE94, regE9C, regEA4; - u1Byte result = 0x00; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - RTPRINT(FINIT, INIT_IQK, ("Path A IQK!\n")); - - //path-A IQK setting - RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n")); - if(pAdapter->interfaceIndex == 0) - { - PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1f); - PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); - } - else - { - PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c22); - PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c22); - } - - PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82140102); - - PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, configPathB ? 0x28160202 : - IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)?0x28160202:0x28160502); - - //path-B IQK setting - if(configPathB) - { - PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x10008c22); - PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x10008c22); - PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140102); - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160206); - else - PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160202); - } - - //LO calibration setting - RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n")); - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); - else - PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x001028d1); - - //One shot, path A LOK & IQK - RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); - PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); - PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); - - // delay x ms - RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME)); - PlatformStallExecution(IQK_DELAY_TIME*1000); - - // Check failed - regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); - regE94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x\n", regE94)); - regE9C= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x\n", regE9C)); - regEA4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", regEA4)); - - if(!(regEAC & BIT28) && - (((regE94 & 0x03FF0000)>>16) != 0x142) && - (((regE9C & 0x03FF0000)>>16) != 0x42) ) - result |= 0x01; - else //if Tx not OK, ignore Rx - return result; - - if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK - (((regEA4 & 0x03FF0000)>>16) != 0x132) && - (((regEAC & 0x03FF0000)>>16) != 0x36)) - result |= 0x02; - else - RTPRINT(FINIT, INIT_IQK, ("Path A Rx IQK fail!!\n")); - - return result; - - -} - -u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK -phy_PathB_IQK_8192C( - IN struct adapter *pAdapter - ) -{ - u4Byte regEAC, regEB4, regEBC, regEC4, regECC; - u1Byte result = 0x00; - RTPRINT(FINIT, INIT_IQK, ("Path B IQK!\n")); - - //One shot, path B LOK & IQK - RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); - PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000002); - PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000000); - - // delay x ms - RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME)); - PlatformStallExecution(IQK_DELAY_TIME*1000); - - // Check failed - regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); - regEB4 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%x\n", regEB4)); - regEBC= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%x\n", regEBC)); - regEC4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%x\n", regEC4)); - regECC= PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", regECC)); - - if(!(regEAC & BIT31) && - (((regEB4 & 0x03FF0000)>>16) != 0x142) && - (((regEBC & 0x03FF0000)>>16) != 0x42)) - result |= 0x01; - else - return result; - - if(!(regEAC & BIT30) && - (((regEC4 & 0x03FF0000)>>16) != 0x132) && - (((regECC & 0x03FF0000)>>16) != 0x36)) - result |= 0x02; - else - RTPRINT(FINIT, INIT_IQK, ("Path B Rx IQK fail!!\n")); - - - return result; - -} - -void -phy_PathAFillIQKMatrix( - IN struct adapter *pAdapter, - IN BOOLEAN bIQKOK, - IN s4Byte result[][8], - IN u1Byte final_candidate, - IN BOOLEAN bTxOnly - ) -{ - u4Byte Oldval_0, X, TX0_A, reg; - s4Byte Y, TX0_C; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - RTPRINT(FINIT, INIT_IQK, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); - - if(final_candidate == 0xFF) - return; - - else if(bIQKOK) - { - Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; - - X = result[final_candidate][0]; - if ((X & 0x00000200) != 0) - X = X | 0xFFFFFC00; - TX0_A = (X * Oldval_0) >> 8; - RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", X, TX0_A, Oldval_0)); - PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT24, ((X* Oldval_0>>7) & 0x1)); - else - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1)); - - Y = result[final_candidate][1]; - if ((Y & 0x00000200) != 0) - Y = Y | 0xFFFFFC00; - - //path B IQK result + 3 - if(pAdapter->interfaceIndex == 1 && pHalData->CurrentBandType92D == BAND_ON_5G) - Y += 3; - - TX0_C = (Y * Oldval_0) >> 8; - RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C)); - PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); - PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); - if(IS_HARDWARE_TYPE_8192D(pAdapter)/*&&is2T*/) - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT26, ((Y* Oldval_0>>7) & 0x1)); - else - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1)); - - if(bTxOnly) - { - RTPRINT(FINIT, INIT_IQK, ("phy_PathAFillIQKMatrix only Tx OK\n")); - return; - } - - reg = result[final_candidate][2]; - PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0x3FF, reg); - - reg = result[final_candidate][3] & 0x3F; - PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0xFC00, reg); - - reg = (result[final_candidate][3] >> 6) & 0xF; - PHY_SetBBReg(pAdapter, rOFDM0_RxIQExtAnta, 0xF0000000, reg); - } -} - -void -phy_PathBFillIQKMatrix( - IN struct adapter *pAdapter, - IN BOOLEAN bIQKOK, - IN s4Byte result[][8], - IN u1Byte final_candidate, - IN BOOLEAN bTxOnly //do Tx only - ) -{ - u4Byte Oldval_1, X, TX1_A, reg; - s4Byte Y, TX1_C; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - RTPRINT(FINIT, INIT_IQK, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); - - if(final_candidate == 0xFF) - return; - - else if(bIQKOK) - { - Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; - - X = result[final_candidate][4]; - if ((X & 0x00000200) != 0) - X = X | 0xFFFFFC00; - TX1_A = (X * Oldval_1) >> 8; - RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); - PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT28, ((X* Oldval_1>>7) & 0x1)); - else - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1)); - - Y = result[final_candidate][5]; - if ((Y & 0x00000200) != 0) - Y = Y | 0xFFFFFC00; - if(pHalData->CurrentBandType92D == BAND_ON_5G) - Y += 3; //temp modify for preformance - TX1_C = (Y * Oldval_1) >> 8; - RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C)); - PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); - PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT30, ((Y* Oldval_1>>7) & 0x1)); - else - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1)); - - if(bTxOnly) - return; - - reg = result[final_candidate][6]; - PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg); - - reg = result[final_candidate][7] & 0x3F; - PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg); - - reg = (result[final_candidate][7] >> 6) & 0xF; - PHY_SetBBReg(pAdapter, rOFDM0_AGCRSSITable, 0x0000F000, reg); - } -} - - -BOOLEAN -phy_SimularityCompare_92C( - IN struct adapter *pAdapter, - IN s4Byte result[][8], - IN u1Byte c1, - IN u1Byte c2 - ) -{ - u4Byte i, j, diff, SimularityBitMap, bound = 0; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B - BOOLEAN bResult = TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID); - - if(is2T) - bound = 8; - else - bound = 4; - - SimularityBitMap = 0; - - for( i = 0; i < bound; i++ ) - { - diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); - if (diff > MAX_TOLERANCE) - { - if((i == 2 || i == 6) && !SimularityBitMap) - { - if(result[c1][i]+result[c1][i+1] == 0) - final_candidate[(i/4)] = c2; - else if (result[c2][i]+result[c2][i+1] == 0) - final_candidate[(i/4)] = c1; - else - SimularityBitMap = SimularityBitMap|(1< do IQK again -*/ -BOOLEAN -phy_SimularityCompare( - IN struct adapter *pAdapter, - IN s4Byte result[][8], - IN u1Byte c1, - IN u1Byte c2 - ) -{ - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - return phy_SimularityCompare_92D(pAdapter, result, c1, c2); - else - return phy_SimularityCompare_92C(pAdapter, result, c1, c2); - -} - -void -phy_IQCalibrate_8192C( - IN struct adapter *pAdapter, - IN s4Byte result[][8], - IN u1Byte t, - IN BOOLEAN is2T - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u4Byte i; - u1Byte PathAOK, PathBOK; - u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = { - rFPGA0_XCD_SwitchControl, rBlue_Tooth, - rRx_Wait_CCA, rTx_CCK_RFON, - rTx_CCK_BBON, rTx_OFDM_RFON, - rTx_OFDM_BBON, rTx_To_Rx, - rTx_To_Tx, rRx_CCK, - rRx_OFDM, rRx_Wait_RIFS, - rRx_TO_Rx, rStandby, - rSleep, rPMPD_ANAEN }; - u4Byte IQK_MAC_REG[IQK_MAC_REG_NUM] = { - REG_TXPAUSE, REG_BCN_CTRL, - REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; - - //since 92C & 92D have the different define in IQK_BB_REG - u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { - rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, - rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, - rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, - rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD - }; - - u4Byte IQK_BB_REG_92D[IQK_BB_REG_NUM_92D] = { //for normal - rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, - rFPGA0_XB_RFInterfaceOE, rOFDM0_TRMuxPar, - rFPGA0_XCD_RFInterfaceSW, rOFDM0_TRxPathEnable, - rFPGA0_RFMOD, rFPGA0_AnalogParameter4, - rOFDM0_XAAGCCore1, rOFDM0_XBAGCCore1 - }; - u4Byte retryCount; -#if MP_DRIVER - if (pAdapter->registrypriv.mp_mode == 1) - retryCount = 9; - else -#endif - retryCount = 2; - - - //Neil Chen--2011--05--19-- - //3 Path Div - u1Byte rfPathSwitch=0x0; - - // Note: IQ calibration must be performed after loading - // PHY_REG.txt , and radio_a, radio_b.txt - - u4Byte bbvalue; - - if(t==0) - { - bbvalue = PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8192C()==>0x%08x\n",bbvalue)); - - RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); - - // Save ADDA parameters, turn Path A ADDA on - phy_SaveADDARegisters(pAdapter, ADDA_REG, pHalData->ADDA_backup, IQK_ADDA_REG_NUM); - phy_SaveMACRegisters(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92D, pHalData->IQK_BB_backup, IQK_BB_REG_NUM_92D); - else - phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM); - } - - phy_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T); - - - - if(IS_HARDWARE_TYPE_8192D(pAdapter)){ - //============================== - //3 Path Diversity - ////Neil Chen--2011--05--20 - rfPathSwitch =(u1Byte) (PHY_QueryBBReg(pAdapter, 0xB30, bMaskDWord)>>27); - //rfPathSwitch = (u1Byte) DataB30; - rfPathSwitch = rfPathSwitch&(0x01); - - if(rfPathSwitch) // Path Div On - { - phy_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T); - //DbgPrint("=STEP= change ADDA Path from B to A Path\n"); - } - else - { - phy_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T); - } - //3 end - //===================================== - - PHY_SetBBReg(pAdapter, rPdp_AntA, bMaskDWord, 0x01017038); - } - - if(t==0) - { - pHalData->bRfPiEnable = (u1Byte)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8)); - } - - if(!pHalData->bRfPiEnable){ - // Switch BB to PI mode to do IQ Calibration. - phy_PIModeSwitch(pAdapter, TRUE); - } - - PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, BIT24, 0x00); - PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); - PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); - PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xf00000, 0x0f); - else - { - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); - PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); - PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); - } - - if(is2T) - { - PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); - PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000); - } - - //MAC settings - phy_MACSettingCalibration(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); - - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - { - PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x0f600000); - - if(is2T) - { - PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x0f600000); - } - } - else - { - //Page B init - PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x00080000); - - if(is2T) - { - PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x00080000); - } - } - // IQ calibration setting - RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n")); - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000); - PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x01007c00); - PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800); - - for(i = 0 ; i < retryCount ; i++){ - PathAOK = phy_PathA_IQK_8192C(pAdapter, is2T); - if(PathAOK == 0x03){ - RTPRINT(FINIT, INIT_IQK, ("Path A IQK Success!!\n")); - result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; - result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; - result[t][2] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; - result[t][3] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; - break; - } - else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK - { - RTPRINT(FINIT, INIT_IQK, ("Path A IQK Only Tx Success!!\n")); - - result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; - result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; - } - } - - if(0x00 == PathAOK){ - RTPRINT(FINIT, INIT_IQK, ("Path A IQK failed!!\n")); - } - - if(is2T){ - phy_PathAStandBy(pAdapter); - - // Turn Path B ADDA on - phy_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T); - - for(i = 0 ; i < retryCount ; i++){ - PathBOK = phy_PathB_IQK_8192C(pAdapter); - if(PathBOK == 0x03){ - RTPRINT(FINIT, INIT_IQK, ("Path B IQK Success!!\n")); - result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; - result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; - result[t][6] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; - result[t][7] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; - break; - } - else if (i == (retryCount - 1) && PathBOK == 0x01) //Tx IQK OK - { - RTPRINT(FINIT, INIT_IQK, ("Path B Only Tx IQK Success!!\n")); - result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; - result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; - } - } - - if(0x00 == PathBOK){ - RTPRINT(FINIT, INIT_IQK, ("Path B IQK failed!!\n")); - } - } - - //Back to BB mode, load original value - RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n")); - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0); - - if(t!=0) - { - if(!pHalData->bRfPiEnable){ - // Switch back BB to SI mode after finish IQ Calibration. - phy_PIModeSwitch(pAdapter, FALSE); - } - - // Reload ADDA power saving parameters - phy_ReloadADDARegisters(pAdapter, ADDA_REG, pHalData->ADDA_backup, IQK_ADDA_REG_NUM); - - // Reload MAC parameters - phy_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); - - // Reload BB parameters - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - { - if(is2T) - phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92D, pHalData->IQK_BB_backup, IQK_BB_REG_NUM_92D); - else - phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92D, pHalData->IQK_BB_backup, IQK_BB_REG_NUM_92D -1); - } - else - phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM); - - if(!IS_HARDWARE_TYPE_8192D(pAdapter)) - { - // Restore RX initial gain - PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); - if(is2T){ - PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); - } - } - //load 0xe30 IQC default value - PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); - PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); - - } - RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8192C() <==\n")); - -} - - -void -phy_LCCalibrate92C( - IN struct adapter *pAdapter, - IN BOOLEAN is2T - ) -{ - u1Byte tmpReg; - u4Byte RF_Amode=0, RF_Bmode=0, LC_Cal; -// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - //Check continuous TX and Packet TX - tmpReg = PlatformEFIORead1Byte(pAdapter, 0xd03); - - if((tmpReg&0x70) != 0) //Deal with contisuous TX case - PlatformEFIOWrite1Byte(pAdapter, 0xd03, tmpReg&0x8F); //disable all continuous TX - else // Deal with Packet TX case - PlatformEFIOWrite1Byte(pAdapter, REG_TXPAUSE, 0xFF); // block all queues - - if((tmpReg&0x70) != 0) - { - //1. Read original RF mode - //Path-A - RF_Amode = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits); - - //Path-B - if(is2T) - RF_Bmode = PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits); - - //2. Set RF mode = standby mode - //Path-A - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); - - //Path-B - if(is2T) - PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); - } - - //3. Read RF reg18 - LC_Cal = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits); - - //4. Set LC calibration begin bit15 - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); - - delay_ms(100); - - - //Restore original situation - if((tmpReg&0x70) != 0) //Deal with contisuous TX case - { - //Path-A - PlatformEFIOWrite1Byte(pAdapter, 0xd03, tmpReg); - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); - - //Path-B - if(is2T) - PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); - } - else // Deal with Packet TX case - { - PlatformEFIOWrite1Byte(pAdapter, REG_TXPAUSE, 0x00); - } -} - - -void -phy_LCCalibrate( - IN struct adapter *pAdapter, - IN BOOLEAN is2T - ) -{ - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - { -#if SWLCK == 1 - phy_LCCalibrate92DSW(pAdapter, is2T); -#else - phy_LCCalibrate92D(pAdapter, is2T); -#endif - } - else - { - phy_LCCalibrate92C(pAdapter, is2T); - } -} - - - -//Analog Pre-distortion calibration -#define APK_BB_REG_NUM 8 -#define APK_CURVE_REG_NUM 4 -#define PATH_NUM 2 - -void -phy_APCalibrate_8192C( - IN struct adapter *pAdapter, - IN s1Byte delta, - IN BOOLEAN is2T - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - u4Byte regD[PATH_NUM]; - u4Byte tmpReg, index, offset, i, apkbound; - u1Byte path, pathbound = PATH_NUM; - u4Byte BB_backup[APK_BB_REG_NUM]; - u4Byte BB_REG[APK_BB_REG_NUM] = { - rFPGA1_TxBlock, rOFDM0_TRxPathEnable, - rFPGA0_RFMOD, rOFDM0_TRMuxPar, - rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, - rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; - u4Byte BB_AP_MODE[APK_BB_REG_NUM] = { - 0x00000020, 0x00a05430, 0x02040000, - 0x000800e4, 0x00204000 }; - u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = { - 0x00000020, 0x00a05430, 0x02040000, - 0x000800e4, 0x22204000 }; - - u4Byte AFE_backup[IQK_ADDA_REG_NUM]; - u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { - rFPGA0_XCD_SwitchControl, rBlue_Tooth, - rRx_Wait_CCA, rTx_CCK_RFON, - rTx_CCK_BBON, rTx_OFDM_RFON, - rTx_OFDM_BBON, rTx_To_Rx, - rTx_To_Tx, rRx_CCK, - rRx_OFDM, rRx_Wait_RIFS, - rRx_TO_Rx, rStandby, - rSleep, rPMPD_ANAEN }; - - u4Byte MAC_backup[IQK_MAC_REG_NUM]; - u4Byte MAC_REG[IQK_MAC_REG_NUM] = { - REG_TXPAUSE, REG_BCN_CTRL, - REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; - - u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { - {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, - {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} - }; - - u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { - {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings - {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} - }; - - u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { - {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, - {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} - }; - - u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { - {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings - {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} - }; - u4Byte AFE_on_off[PATH_NUM] = { - 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on - - u4Byte APK_offset[PATH_NUM] = { - rConfig_AntA, rConfig_AntB}; - - u4Byte APK_normal_offset[PATH_NUM] = { - rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; - - u4Byte APK_value[PATH_NUM] = { - 0x92fc0000, 0x12fc0000}; - - u4Byte APK_normal_value[PATH_NUM] = { - 0x92680000, 0x12680000}; - - s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { - {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} - }; - - u4Byte APK_normal_setting_value_1[13] = { - 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, - 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, - 0x12680000, 0x00880000, 0x00880000 - }; - - u4Byte APK_normal_setting_value_2[16] = { - 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, - 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, - 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, - 0x00050006 - }; - - u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a -// u4Byte AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; - - s4Byte BB_offset, delta_V, delta_offset; - -#if MP_DRIVER == 1 -if (pAdapter->registrypriv.mp_mode == 1) -{ - PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); - - pMptCtx->APK_bound[0] = 45; - pMptCtx->APK_bound[1] = 52; -} -#endif - - RTPRINT(FINIT, INIT_IQK, ("==>phy_APCalibrate_8192C() delta %d\n", delta)); - RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); - if(!is2T) - pathbound = 1; - - //2 FOR NORMAL CHIP SETTINGS - -// Temporarily do not allow normal driver to do the following settings because these offset -// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal -// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the -// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. -#if MP_DRIVER != 1 - return; -#endif - - if (pAdapter->registrypriv.mp_mode != 1) - return; - - //settings adjust for normal chip - for(index = 0; index < PATH_NUM; index ++) - { - APK_offset[index] = APK_normal_offset[index]; - APK_value[index] = APK_normal_value[index]; - AFE_on_off[index] = 0x6fdb25a4; - } - - for(index = 0; index < APK_BB_REG_NUM; index ++) - { - for(path = 0; path < pathbound; path++) - { - APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; - APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; - } - BB_AP_MODE[index] = BB_normal_AP_MODE[index]; - } - - apkbound = 6; - - //save BB default value - for(index = 0; index < APK_BB_REG_NUM ; index++) - { - if(index == 0) //skip - continue; - BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord); - } - - //save MAC default value - phy_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); - - //save AFE default value - phy_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); - - for(path = 0; path < pathbound; path++) - { - - - if(path == RF_PATH_A) - { - //path A APK - //load APK setting - //path-A - offset = rPdp_AntA; - for(index = 0; index < 11; index ++) - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - - PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); - - offset = rConfig_AntA; - for(; index < 13; index ++) - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - - //page-B1 - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x40000000); - - //path A - offset = rPdp_AntA; - for(index = 0; index < 16; index++) - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000); - } - else if(path == RF_PATH_B) - { - //path B APK - //load APK setting - //path-B - offset = rPdp_AntB; - for(index = 0; index < 10; index ++) - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); - - PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); - - offset = rConfig_AntA; - index = 11; - for(; index < 13; index ++) //offset 0xb68, 0xb6c - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - - //page-B1 - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x40000000); - - //path B - offset = 0xb60; - for(index = 0; index < 16; index++) - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000); - } - - //save RF default value - regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask); - - //Path A AFE all on, path B AFE All off or vise versa - for(index = 0; index < IQK_ADDA_REG_NUM ; index++) - PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, AFE_on_off[path]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xe70 %x\n", PHY_QueryBBReg(pAdapter, rRx_Wait_CCA, bMaskDWord))); - - //BB to AP mode - if(path == 0) - { - for(index = 0; index < APK_BB_REG_NUM ; index++) - { - - if(index == 0) //skip - continue; - else if (index < 5) - PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); - else if (BB_REG[index] == 0x870) - PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); - else - PHY_SetBBReg(pAdapter, BB_REG[index], BIT10, 0x0); - } - - PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); - PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); - } - else //path B - { - PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); - PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); - - } - - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x800 %x\n", PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord))); - - //MAC settings - phy_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); - - if(path == RF_PATH_A) //Path B to standby mode - { - PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bRFRegOffsetMask, 0x10000); - } - else //Path A to standby mode - { - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x10000); - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f); - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20103); - } - - delta_offset = ((delta+14)/2); - if(delta_offset < 0) - delta_offset = 0; - else if (delta_offset > 12) - delta_offset = 12; - - //AP calibration - for(index = 0; index < APK_BB_REG_NUM; index++) - { - if(index != 1) //only DO PA11+PAD01001, AP RF setting - continue; - - tmpReg = APK_RF_init_value[path][index]; -#if 1 - if(!pHalData->bAPKThermalMeterIgnore) - { - BB_offset = (tmpReg & 0xF0000) >> 16; - - if(!(tmpReg & BIT15)) //sign bit 0 - { - BB_offset = -BB_offset; - } - - delta_V = APK_delta_mapping[index][delta_offset]; - - BB_offset += delta_V; - - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, delta_V, delta_offset)); - - if(BB_offset < 0) - { - tmpReg = tmpReg & (~BIT15); - BB_offset = -BB_offset; - } - else - { - tmpReg = tmpReg | BIT15; - } - tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); - } -#endif - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - if(IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) - PHY_SetRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask, 0x894ae); - else -#endif - PHY_SetRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask, 0x8992e); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask))); - PHY_SetRFReg(pAdapter, path, RF_AC, bRFRegOffsetMask, APK_RF_value_0[path][index]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bRFRegOffsetMask))); - PHY_SetRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask, tmpReg); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask))); - - // PA11+PAD01111, one shot - i = 0; - do - { - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80000000); - { - PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[0]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); - delay_ms(3); - PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[1]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); - - delay_ms(20); - } - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000); - - if(path == RF_PATH_A) - tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0x03E00000); - else - tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0xF8000000); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xbd8[25:21] %x\n", tmpReg)); - - - i++; - } - while(tmpReg > apkbound && i < 4); - - APK_result[path][index] = tmpReg; - } - } - - //reload MAC default value - phy_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); - - //reload BB default value - for(index = 0; index < APK_BB_REG_NUM ; index++) - { - - if(index == 0) //skip - continue; - PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]); - } - - //reload AFE default value - phy_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); - - //reload RF path default value - for(path = 0; path < pathbound; path++) - { - PHY_SetRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask, regD[path]); - if(path == RF_PATH_B) - { - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f); - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20101); - } - - //note no index == 0 - if (APK_result[path][1] > 6) - APK_result[path][1] = 6; - RTPRINT(FINIT, INIT_IQK, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); - } - - RTPRINT(FINIT, INIT_IQK, ("\n")); - - - for(path = 0; path < pathbound; path++) - { - PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G1_G4, bRFRegOffsetMask, - ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); - if(path == RF_PATH_A) - PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, - ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); - else - PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, - ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); - - if(!IS_HARDWARE_TYPE_8723A(pAdapter)) - PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G9_G11, bRFRegOffsetMask, - ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); - } - - pHalData->bAPKdone = TRUE; - - RTPRINT(FINIT, INIT_IQK, ("<==phy_APCalibrate_8192C()\n")); -} - - -void -PHY_IQCalibrate_8192C( - IN struct adapter *pAdapter, - IN BOOLEAN bReCovery - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - s4Byte result[4][8]; //last is final result - u1Byte i, final_candidate, Indexforchannel; - BOOLEAN bPathAOK, bPathBOK; - s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; - BOOLEAN is12simular, is13simular, is23simular; - BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; - u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { - rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, - rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, - rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, - rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, - rOFDM0_RxIQExtAnta}; - - if (ODM_CheckPowerStatus(pAdapter) == FALSE) - return; - -#if MP_DRIVER == 1 -if (pAdapter->registrypriv.mp_mode == 1) -{ - bStartContTx = pAdapter->MptCtx.bStartContTx; - bSingleTone = pAdapter->MptCtx.bSingleTone; - bCarrierSuppression = pAdapter->MptCtx.bCarrierSuppression; -} -#endif - - //ignore IQK when continuous Tx - if(bStartContTx || bSingleTone || bCarrierSuppression) - return; - -#if DISABLE_BB_RF - return; -#endif - if(pAdapter->bSlaveOfDMSP) - return; - - if(!IS_HARDWARE_TYPE_8192D(pAdapter)) - { - if(bReCovery) - { - phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup_recover, 9); - return; - - } - } - RTPRINT(FINIT, INIT_IQK, ("IQK:Start!!!\n")); - - for(i = 0; i < 8; i++) - { - result[0][i] = 0; - result[1][i] = 0; - result[2][i] = 0; - result[3][i] = 0; - } - final_candidate = 0xff; - bPathAOK = FALSE; - bPathBOK = FALSE; - is12simular = FALSE; - is23simular = FALSE; - is13simular = FALSE; - - - RTPRINT(FINIT, INIT_IQK, ("IQK !!!interface %d currentband %d ishardwareD %d \n", pAdapter->interfaceIndex, pHalData->CurrentBandType92D, IS_HARDWARE_TYPE_8192D(pAdapter))); - AcquireCCKAndRWPageAControl(pAdapter); -// RT_TRACE(COMP_INIT,DBG_LOUD,("Acquire Mutex in IQCalibrate \n")); - for (i=0; i<3; i++) - { -// if(IS_HARDWARE_TYPE_8192C(pAdapter) || IS_HARDWARE_TYPE_8723A(pAdapter)) - if(!IS_HARDWARE_TYPE_8192D(pAdapter)) - { - if(IS_92C_SERIAL( pHalData->VersionID)) - { - phy_IQCalibrate_8192C(pAdapter, result, i, TRUE); - } - else - { - // For 88C 1T1R - phy_IQCalibrate_8192C(pAdapter, result, i, FALSE); - } - } - else/* if(IS_HARDWARE_TYPE_8192D(pAdapter))*/ - { - if(pHalData->CurrentBandType92D == BAND_ON_5G) - { - phy_IQCalibrate_5G_Normal(pAdapter, result, i); - } - else if(pHalData->CurrentBandType92D == BAND_ON_2_4G) - { - if(IS_92D_SINGLEPHY(pHalData->VersionID)) - phy_IQCalibrate_8192C(pAdapter, result, i, TRUE); - else - phy_IQCalibrate_8192C(pAdapter, result, i, FALSE); - } - } - - if(i == 1) - { - is12simular = phy_SimularityCompare(pAdapter, result, 0, 1); - if(is12simular) - { - final_candidate = 0; - break; - } - } - - if(i == 2) - { - is13simular = phy_SimularityCompare(pAdapter, result, 0, 2); - if(is13simular) - { - final_candidate = 0; - break; - } - - is23simular = phy_SimularityCompare(pAdapter, result, 1, 2); - if(is23simular) - final_candidate = 1; - else - { - for(i = 0; i < 8; i++) - RegTmp += result[3][i]; - - if(RegTmp != 0) - final_candidate = 3; - else - final_candidate = 0xFF; - } - } - } -// RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate \n")); - ReleaseCCKAndRWPageAControl(pAdapter); - - for (i=0; i<4; i++) - { - RegE94 = result[i][0]; - RegE9C = result[i][1]; - RegEA4 = result[i][2]; - RegEAC = result[i][3]; - RegEB4 = result[i][4]; - RegEBC = result[i][5]; - RegEC4 = result[i][6]; - RegECC = result[i][7]; - RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); - } - - if(final_candidate != 0xff) - { - pHalData->RegE94 = RegE94 = result[final_candidate][0]; - pHalData->RegE9C = RegE9C = result[final_candidate][1]; - RegEA4 = result[final_candidate][2]; - RegEAC = result[final_candidate][3]; - pHalData->RegEB4 = RegEB4 = result[final_candidate][4]; - pHalData->RegEBC = RegEBC = result[final_candidate][5]; - RegEC4 = result[final_candidate][6]; - RegECC = result[final_candidate][7]; - RTPRINT(FINIT, INIT_IQK, ("IQK: final_candidate is %x\n",final_candidate)); - RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); - bPathAOK = bPathBOK = TRUE; - } - else - { - RegE94 = RegEB4 = pHalData->RegE94 = pHalData->RegEB4 = 0x100; //X default value - RegE9C = RegEBC = pHalData->RegE9C = pHalData->RegEBC = 0x0; //Y default value - } - - if((RegE94 != 0)/*&&(RegEA4 != 0)*/) - { - if(pHalData->CurrentBandType92D == BAND_ON_5G) - phy_PathAFillIQKMatrix_5G_Normal(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); - else - phy_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); - - } - - if (IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID)) - { - if((RegEB4 != 0)/*&&(RegEC4 != 0)*/) - { - if(pHalData->CurrentBandType92D == BAND_ON_5G) - phy_PathBFillIQKMatrix_5G_Normal(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); - else - phy_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); - } - } - - if(IS_HARDWARE_TYPE_8192D(pAdapter) && final_candidate != 0xFF) - { - Indexforchannel = GetRightChnlPlaceforIQK(pHalData->CurrentChannel); - - for(i = 0; i < IQK_Matrix_REG_NUM; i++) - pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][i] = - result[final_candidate][i]; - - pHalData->IQKMatrixRegSetting[Indexforchannel].bIQKDone = TRUE; - - RTPRINT(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); - } - - if(!IS_HARDWARE_TYPE_8192D(pAdapter)) - phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup_recover, 9); - -} - - -void -PHY_LCCalibrate_8192C( - IN struct adapter *pAdapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; - PMGNT_INFO pMgntInfo=&pAdapter->MgntInfo; - PMGNT_INFO pMgntInfoBuddyAdapter; - u4Byte timeout = 2000, timecount = 0; - struct adapter *BuddyAdapter = pAdapter->BuddyAdapter; - -#if MP_DRIVER == 1 -if (pAdapter->registrypriv.mp_mode == 1) -{ - bStartContTx = pAdapter->MptCtx.bStartContTx; - bSingleTone = pAdapter->MptCtx.bSingleTone; - bCarrierSuppression = pAdapter->MptCtx.bCarrierSuppression; -} -#endif - -#if DISABLE_BB_RF - return; -#endif - - //ignore LCK when continuous Tx - if(bStartContTx || bSingleTone || bCarrierSuppression) - return; - - if(BuddyAdapter != NULL && - ((pAdapter->interfaceIndex == 0 && pHalData->CurrentBandType92D == BAND_ON_2_4G) || - (pAdapter->interfaceIndex == 1 && pHalData->CurrentBandType92D == BAND_ON_5G))) - { - pMgntInfoBuddyAdapter=&BuddyAdapter->MgntInfo; - while(pMgntInfoBuddyAdapter->bScanInProgress && timecount < timeout) - { - delay_ms(50); - timecount += 50; - } - } - - while(pMgntInfo->bScanInProgress && timecount < timeout) - { - delay_ms(50); - timecount += 50; - } - - pHalData->bLCKInProgress = TRUE; - - RTPRINT(FINIT, INIT_IQK, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pAdapter->interfaceIndex, pHalData->CurrentBandType92D, timecount)); - - //if(IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID)) - if(IS_2T2R(pHalData->VersionID)) - { - phy_LCCalibrate(pAdapter, TRUE); - } - else{ - // For 88C 1T1R - phy_LCCalibrate(pAdapter, FALSE); - } - - pHalData->bLCKInProgress = FALSE; - - RTPRINT(FINIT, INIT_IQK, ("LCK:Finish!!!interface %d\n", pAdapter->interfaceIndex)); - - -} - -void -PHY_APCalibrate_8192C( - IN struct adapter *pAdapter, - IN s1Byte delta - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - //default disable APK, because Tx NG issue, suggest by Jenyu, 2011.11.25 - return; - -#if DISABLE_BB_RF - return; -#endif - - if(IS_HARDWARE_TYPE_8192D(pAdapter) || IS_HARDWARE_TYPE_8723A(pAdapter)) - return; - -#if FOR_BRAZIL_PRETEST != 1 - if(pHalData->bAPKdone) -#endif - return; - - if(IS_92C_SERIAL( pHalData->VersionID)){ - phy_APCalibrate_8192C(pAdapter, delta, TRUE); - } - else{ - // For 88C 1T1R - phy_APCalibrate_8192C(pAdapter, delta, FALSE); - } -} - - -#endif - - //3============================================================ //3 IQ Calibration //3============================================================ @@ -1502,12 +30,10 @@ ODM_ResetIQKResult( ) { u1Byte i; -#if (DM_ODM_SUPPORT_TYPE == ODM_MP || DM_ODM_SUPPORT_TYPE == ODM_CE) struct adapter *Adapter = pDM_Odm->Adapter; if (!IS_HARDWARE_TYPE_8192D(Adapter)) return; -#endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD,("PHY_ResetIQKResult:: settings regs %d default regs %d\n", (u32)(sizeof(pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting)/sizeof(IQK_MATRIX_REGS_SETTING)), IQK_Matrix_Settings_NUM)); //0xe94, 0xe9c, 0xea4, 0xeac, 0xeb4, 0xebc, 0xec4, 0xecc @@ -1530,7 +56,6 @@ ODM_ResetIQKResult( } } -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) { u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = @@ -1551,4 +76,3 @@ u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) return 0; } -#endif diff --git a/hal/HalPhyRf.h b/hal/HalPhyRf.h index 9c59c5a..d2b388b 100755 --- a/hal/HalPhyRf.h +++ b/hal/HalPhyRf.h @@ -18,53 +18,13 @@ * ******************************************************************************/ - #ifndef __HAL_PHY_RF_H__ - #define __HAL_PHY_RF_H__ +#ifndef __HAL_PHY_RF_H__ +#define __HAL_PHY_RF_H__ - #if(DM_ODM_SUPPORT_TYPE & ODM_MP) - #define MAX_TOLERANCE 5 - #define IQK_DELAY_TIME 1 //ms - - // -// BB/MAC/RF other monitor API -// - -void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter, - IN BOOLEAN bEnableMonitorMode ); - -// -// IQ calibrate -// -void -PHY_IQCalibrate_8192C( IN PADAPTER pAdapter, - IN BOOLEAN bReCovery); - -// -// LC calibrate -// -void -PHY_LCCalibrate_8192C( IN PADAPTER pAdapter); - -// -// AP calibrate -// -void -PHY_APCalibrate_8192C( IN PADAPTER pAdapter, - IN s1Byte delta); -#endif - #define ODM_TARGET_CHNL_NUM_2G_5G 59 - -void -ODM_ResetIQKResult( - IN PDM_ODM_T pDM_Odm -); -u1Byte -ODM_GetRightChnlPlaceforIQK( - IN u1Byte chnl -); - +void ODM_ResetIQKResult(PDM_ODM_T pDM_Odm ); +u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl); #endif // #ifndef __HAL_PHY_RF_H__ diff --git a/hal/HalPhyRf_8188e.c b/hal/HalPhyRf_8188e.c index 473d360..3158051 100755 --- a/hal/HalPhyRf_8188e.c +++ b/hal/HalPhyRf_8188e.c @@ -138,41 +138,13 @@ void doIQK( u1Byte Threshold ) { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) struct adapter * Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -#endif ODM_ResetIQKResult(pDM_Odm); -#if(DM_ODM_SUPPORT_TYPE & ODM_MP) -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) -#if USE_WORKITEM - PlatformAcquireMutex(&pHalData->mxChnlBwControl); -#else - PlatformAcquireSpinLock(Adapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); -#endif -#elif((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) - PlatformAcquireMutex(&pHalData->mxChnlBwControl); -#endif -#endif - - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK= ThermalValue; PHY_IQCalibrate_8188E(Adapter, FALSE); - - -#if(DM_ODM_SUPPORT_TYPE & ODM_MP) -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) -#if USE_WORKITEM - PlatformReleaseMutex(&pHalData->mxChnlBwControl); -#else - PlatformReleaseSpinLock(Adapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); -#endif -#elif((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) - PlatformReleaseMutex(&pHalData->mxChnlBwControl); -#endif -#endif } /*----------------------------------------------------------------------------- @@ -284,8 +256,7 @@ odm_TxPwrTrackSetPwr88E( u1Byte ChannelMappedIndex ) { - if (Method == TXAGC) - { + if (Method == TXAGC) { u1Byte cckPowerLevel[MAX_TX_COUNT], ofdmPowerLevel[MAX_TX_COUNT]; u1Byte BW20PowerLevel[MAX_TX_COUNT], BW40PowerLevel[MAX_TX_COUNT]; u1Byte rf = 0; @@ -293,14 +264,12 @@ odm_TxPwrTrackSetPwr88E( struct adapter *Adapter = pDM_Odm->Adapter; //printk("odm_TxPwrTrackSetPwr88E CH=%d, modify TXAGC \n", *(pDM_Odm->pChannel)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("odm_TxPwrTrackSetPwr88E CH=%d\n", *(pDM_Odm->pChannel))); -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE )) //#if (MP_DRIVER != 1) if ( *(pDM_Odm->mp_mode) != 1){ PHY_SetTxPowerLevel8188E(pDM_Odm->Adapter, *pDM_Odm->pChannel); } else - //#else { pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); pwr += (pDM_Odm->BbSwingIdxCck - pDM_Odm->BbSwingIdxCckBase); @@ -320,20 +289,10 @@ odm_TxPwrTrackSetPwr88E( PHY_SetBBReg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); DBG_871X("ODM_TxPwrTrackSetPwr88E: OFDM Tx-rf(A) Power = 0x%x\n", TxAGC); } - //#endif - -#endif -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - PHY_RF6052SetCCKTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel)); - PHY_RF6052SetOFDMTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel)); -#endif } else if (Method == BBSWING) { - //printk("odm_TxPwrTrackSetPwr88E CH=%d, modify BBSWING BbSwingIdxCck:%d \n", *(pDM_Odm->pChannel),pDM_Odm->BbSwingIdxCck); - // Adjust BB swing by CCK filter coefficient - //if(!pDM_Odm->RFCalibrateInfo.bCCKinCH14) if(* (pDM_Odm->pChannel) < 14) { ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][0]); @@ -381,19 +340,11 @@ odm_TxPwrTrackSetPwr88E( void odm_TXPowerTrackingCallback_ThermalMeter_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm -#else IN struct adapter *Adapter -#endif ) { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -#endif - u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, offset; u1Byte ThermalValue_AVG_count = 0; u4Byte ThermalValue_AVG = 0; @@ -408,13 +359,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( u1Byte OFDM_min_index = 6, rf = (is2T) ? 2 : 1; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur u1Byte Indexforchannel = 0;/*GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/ enum _POWER_DEC_INC { POWER_DEC, POWER_INC }; - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; struct dm_priv *pdmpriv = &pHalData->dmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif //4 0.1 The following TWO tables decide the final index of OFDM/CCK swing table. s1Byte deltaSwingTableIdx[2][index_mapping_NUM_88E] = { @@ -432,9 +378,6 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = TRUE; #if (MP_DRIVER == 1) -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = pHalData->TxPowerTrackControl; // We should keep updating the control variable according to HalData. -#endif // RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. pDM_Odm->RFCalibrateInfo.RegA24 = 0x090e1317; #endif @@ -491,31 +434,18 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( if ((delta_LCK >= 8)) // Delta temperature is equal to or larger than 20 centigrade. { pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) PHY_LCCalibrate_8188E(Adapter); -#else - PHY_LCCalibrate_8188E(pDM_Odm); -#endif } //3 7. If necessary, move the index of swing table to adjust Tx power. if (delta > 0 && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) - delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); -#else - delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue); -#endif - + delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); //4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) if(ThermalValue > pHalData->EEPROMThermalMeter) { -#else - if(ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) { -#endif CALCULATE_SWINGTALBE_OFFSET(offset, POWER_INC, index_mapping_NUM_88E, delta); pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex; pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = -1 * deltaSwingTableIdx[POWER_INC][offset]; @@ -616,13 +546,11 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( } -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) // if((delta_IQK > pHalData->Delta_IQK) && (pHalData->Delta_IQK != 0)) if ((delta_IQK >= 8)){ // Delta temperature is equal to or larger than 20 centigrade. //printk("delta_IQK(%d) >=8 do_IQK\n",delta_IQK); doIQK(pDM_Odm, delta_IQK, ThermalValue, 8); } -#endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("<===dm_TXPowerTrackingCallback_ThermalMeter_8188E\n")); @@ -640,25 +568,14 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK phy_PathA_IQK_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN BOOLEAN configPathB ) { u4Byte regEAC, regE94, regE9C, regEA4; u1Byte result = 0x00; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK!\n")); //1 Tx IQK @@ -704,25 +621,14 @@ phy_PathA_IQK_8188E( u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK phy_PathA_RxIQK( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN BOOLEAN configPathB ) { u4Byte regEAC, regE94, regE9C, regEA4, u4tmp; u1Byte result = 0x00; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK!\n")); //1 Get TXIMR setting @@ -852,24 +758,13 @@ phy_PathA_RxIQK( u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK phy_PathB_IQK_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm -#else IN struct adapter *pAdapter -#endif ) { u4Byte regEAC, regEB4, regEBC, regEC4, regECC; u1Byte result = 0x00; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK!\n")); //One shot, path B LOK & IQK @@ -915,11 +810,7 @@ phy_PathB_IQK_8188E( void _PHY_PathAFillIQKMatrix( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN BOOLEAN bIQKOK, IN s4Byte result[][8], IN u1Byte final_candidate, @@ -928,15 +819,8 @@ _PHY_PathAFillIQKMatrix( { u4Byte Oldval_0, X, TX0_A, reg; s4Byte Y, TX0_C; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); if(final_candidate == 0xFF) @@ -974,10 +858,6 @@ _PHY_PathAFillIQKMatrix( } reg = result[final_candidate][2]; -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - if( RTL_ABS(reg ,0x100) >= 16) - reg = 0x100; -#endif ODM_SetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, 0x3FF, reg); reg = result[final_candidate][3] & 0x3F; @@ -990,11 +870,7 @@ _PHY_PathAFillIQKMatrix( void _PHY_PathBFillIQKMatrix( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN BOOLEAN bIQKOK, IN s4Byte result[][8], IN u1Byte final_candidate, @@ -1003,15 +879,8 @@ _PHY_PathBFillIQKMatrix( { u4Byte Oldval_1, X, TX1_A, reg; s4Byte Y, TX1_C; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); if(final_candidate == 0xFF) @@ -1059,65 +928,27 @@ _PHY_PathBFillIQKMatrix( // 2011/07/26 MH Add an API for testing IQK fail case. // // MP Already declare in odm.c -#if !(DM_ODM_SUPPORT_TYPE & ODM_MP) BOOLEAN ODM_CheckPowerStatus( IN struct adapter * Adapter) { -/* - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - RT_RF_POWER_STATE rtState; - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - - // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. - if (pMgntInfo->init_adpt_in_progress == TRUE) - { - ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); - return TRUE; - } - - // - // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. - // - Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); - if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) - { - ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", - Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); - return FALSE; - } -*/ return TRUE; } -#endif void _PHY_SaveADDARegisters( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN pu4Byte ADDAReg, IN pu4Byte ADDABackup, IN u4Byte RegisterNum ) { u4Byte i; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif if (ODM_CheckPowerStatus(pAdapter) == FALSE) return; -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save ADDA parameters.\n")); for( i = 0 ; i < RegisterNum ; i++){ ADDABackup[i] = ODM_GetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord); @@ -1127,25 +958,15 @@ _PHY_SaveADDARegisters( void _PHY_SaveMACRegisters( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN pu4Byte MACReg, IN pu4Byte MACBackup ) { u4Byte i; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n")); for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ MACBackup[i] = ODM_Read1Byte(pDM_Odm, MACReg[i]); @@ -1157,26 +978,15 @@ _PHY_SaveMACRegisters( void _PHY_ReloadADDARegisters( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN pu4Byte ADDAReg, IN pu4Byte ADDABackup, IN u4Byte RegiesterNum ) { u4Byte i; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload ADDA power saving parameters !\n")); for(i = 0 ; i < RegiesterNum; i++) @@ -1187,25 +997,15 @@ _PHY_ReloadADDARegisters( void _PHY_ReloadMACRegisters( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN pu4Byte MACReg, IN pu4Byte MACBackup ) { u4Byte i; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n")); for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)MACBackup[i]); @@ -1216,11 +1016,7 @@ _PHY_ReloadMACRegisters( void _PHY_PathADDAOn( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN pu4Byte ADDAReg, IN BOOLEAN isPathAOn, IN BOOLEAN is2T @@ -1228,15 +1024,9 @@ _PHY_PathADDAOn( { u4Byte pathOn; u4Byte i; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ADDA ON.\n")); pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4; @@ -1256,25 +1046,15 @@ _PHY_PathADDAOn( void _PHY_MACSettingCalibration( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN pu4Byte MACReg, IN pu4Byte MACBackup ) { u4Byte i = 0; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("MAC settings for Calibration.\n")); ODM_Write1Byte(pDM_Odm, MACReg[i], 0x3F); @@ -1288,22 +1068,12 @@ _PHY_MACSettingCalibration( void _PHY_PathAStandBy( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm -#else IN struct adapter *pAdapter -#endif ) { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A standby mode!\n")); ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x0); @@ -1313,24 +1083,14 @@ _PHY_PathAStandBy( void _PHY_PIModeSwitch( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN BOOLEAN PIMode ) { u4Byte mode; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI"))); mode = PIMode ? 0x01000100 : 0x01000000; @@ -1340,26 +1100,15 @@ _PHY_PIModeSwitch( BOOLEAN phy_SimularityCompare_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN s4Byte result[][8], IN u1Byte c1, IN u1Byte c2 ) { u4Byte i, j, diff, SimularityBitMap, bound = 0; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B BOOLEAN bResult = TRUE; BOOLEAN is2T; @@ -1475,25 +1224,14 @@ phy_SimularityCompare_8188E( void phy_IQCalibrate_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN s4Byte result[][8], IN u1Byte t, IN BOOLEAN is2T ) { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif u4Byte i; u1Byte PathAOK, PathBOK; u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = { @@ -1517,15 +1255,11 @@ phy_IQCalibrate_8188E( rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD }; -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - u4Byte retryCount = 2; -#else #if MP_DRIVER u4Byte retryCount = 9; #else u4Byte retryCount = 2; #endif -#endif if ( *(pDM_Odm->mp_mode) == 1) retryCount = 9; else @@ -1533,56 +1267,26 @@ else // Note: IQ calibration must be performed after loading // PHY_REG.txt , and radio_a, radio_b.txt - //u4Byte bbvalue; - -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -#ifdef MP_TEST - if(pDM_Odm->priv->pshare->rf_ft_var.mp_specific) - retryCount = 9; -#endif -#endif - - if(t==0) { -// bbvalue = ODM_GetBBReg(pDM_Odm, rFPGA0_RFMOD, bMaskDWord); -// RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8188E()==>0x%08x\n",bbvalue)); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); // Save ADDA parameters, turn Path A ADDA on -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) _PHY_SaveADDARegisters(pAdapter, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); _PHY_SaveMACRegisters(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); -#else - _PHY_SaveADDARegisters(pDM_Odm, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); - _PHY_SaveMACRegisters(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); - _PHY_SaveADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); -#endif } ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - _PHY_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T); -#else - _PHY_PathADDAOn(pDM_Odm, ADDA_REG, TRUE, is2T); -#endif - - if(t==0) - { + if(t==0) { pDM_Odm->RFCalibrateInfo.bRfPiEnable = (u1Byte)ODM_GetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, BIT(8)); } if(!pDM_Odm->RFCalibrateInfo.bRfPiEnable){ // Switch BB to PI mode to do IQ Calibration. -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) _PHY_PIModeSwitch(pAdapter, TRUE); -#else - _PHY_PIModeSwitch(pDM_Odm, TRUE); -#endif } //BB setting @@ -1605,12 +1309,7 @@ else } //MAC settings -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) _PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); -#else - _PHY_MACSettingCalibration(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); -#endif - //Page B init //AP or IQK @@ -1628,12 +1327,7 @@ else ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x81004800); for(i = 0 ; i < retryCount ; i++){ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) PathAOK = phy_PathA_IQK_8188E(pAdapter, is2T); -#else - PathAOK = phy_PathA_IQK_8188E(pDM_Odm, is2T); -#endif -// if(PathAOK == 0x03){ if(PathAOK == 0x01){ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Tx IQK Success!!\n")); result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; @@ -1643,21 +1337,13 @@ else } for(i = 0 ; i < retryCount ; i++){ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) PathAOK = phy_PathA_RxIQK(pAdapter, is2T); -#else - PathAOK = phy_PathA_RxIQK(pDM_Odm, is2T); -#endif if(PathAOK == 0x03){ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Success!!\n")); -// result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; -// result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; - result[t][2] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; - result[t][3] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; + result[t][2] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; + result[t][3] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; break; - } - else - { + } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Fail!!\n")); } } @@ -1667,24 +1353,13 @@ else } if(is2T){ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) _PHY_PathAStandBy(pAdapter); // Turn Path B ADDA on _PHY_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T); -#else - _PHY_PathAStandBy(pDM_Odm); - - // Turn Path B ADDA on - _PHY_PathADDAOn(pDM_Odm, ADDA_REG, FALSE, is2T); -#endif for(i = 0 ; i < retryCount ; i++){ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) PathBOK = phy_PathB_IQK_8188E(pAdapter); -#else - PathBOK = phy_PathB_IQK_8188E(pDM_Odm); -#endif if(PathBOK == 0x03){ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK Success!!\n")); result[t][4] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; @@ -1710,17 +1385,11 @@ else ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Back to BB mode, load original value!\n")); ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0); - if(t!=0) - { + if(t!=0) { if(!pDM_Odm->RFCalibrateInfo.bRfPiEnable){ // Switch back BB to SI mode after finish IQ Calibration. -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) _PHY_PIModeSwitch(pAdapter, FALSE); -#else - _PHY_PIModeSwitch(pDM_Odm, FALSE); -#endif } -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) // Reload ADDA power saving parameters _PHY_ReloadADDARegisters(pAdapter, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); @@ -1729,22 +1398,13 @@ else _PHY_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); -#else - // Reload ADDA power saving parameters - _PHY_ReloadADDARegisters(pDM_Odm, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); - - // Reload MAC parameters - _PHY_ReloadMACRegisters(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); - - _PHY_ReloadADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); -#endif - // Restore RX initial gain - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); - if(is2T){ - ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); - } + // Restore RX initial gain + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); + if(is2T){ + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); + } //load 0xe30 IQC default value ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); @@ -1756,28 +1416,17 @@ else } - void phy_LCCalibrate_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN BOOLEAN is2T ) { u1Byte tmpReg; u4Byte RF_Amode=0, RF_Bmode=0, LC_Cal; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif + //Check continuous TX and Packet TX tmpReg = ODM_Read1Byte(pDM_Odm, 0xd03); @@ -1790,19 +1439,11 @@ phy_LCCalibrate_8188E( { //1. Read original RF mode //Path-A -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) RF_Amode = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits); //Path-B if(is2T) RF_Bmode = PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits); -#else - RF_Amode = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMask12Bits); - - //Path-B - if(is2T) - RF_Bmode = ODM_GetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMask12Bits); -#endif //2. Set RF mode = standby mode //Path-A @@ -1814,11 +1455,7 @@ phy_LCCalibrate_8188E( } //3. Read RF reg18 -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) LC_Cal = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits); -#else - LC_Cal = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bMask12Bits); -#endif //4. Set LC calibration begin bit15 ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); @@ -1850,24 +1487,13 @@ phy_LCCalibrate_8188E( void phy_APCalibrate_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN s1Byte delta, IN BOOLEAN is2T ) { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif u4Byte regD[PATH_NUM]; u4Byte tmpReg, index, offset, apkbound; u1Byte path, i, pathbound = PATH_NUM; @@ -1964,11 +1590,7 @@ phy_APCalibrate_8188E( #if MP_DRIVER == 1 if ( *(pDM_Odm->mp_mode) == 1) { -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); -#else - PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); -#endif pMptCtx->APK_bound[0] = 45; pMptCtx->APK_bound[1] = 52; } @@ -2018,17 +1640,10 @@ if (*(pDM_Odm->mp_mode) != 1) } //save MAC default value -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) _PHY_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); //save AFE default value _PHY_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); -#else - _PHY_SaveMACRegisters(pDM_Odm, MAC_REG, MAC_backup); - - //save AFE default value - _PHY_SaveADDARegisters(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); -#endif for(path = 0; path < pathbound; path++) { @@ -2087,11 +1702,7 @@ if (*(pDM_Odm->mp_mode) != 1) offset += 0x04; } ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); -#else - PHY_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); -#endif offset = rConfig_AntA; index = 11; @@ -2119,11 +1730,7 @@ if (*(pDM_Odm->mp_mode) != 1) } //save RF default value -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord); -#else - regD[path] = ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord); -#endif //Path A AFE all on, path B AFE All off or vise versa for(index = 0; index < IQK_ADDA_REG_NUM ; index++) @@ -2159,11 +1766,7 @@ if (*(pDM_Odm->mp_mode) != 1) ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x800 %x\n", ODM_GetBBReg(pDM_Odm, 0x800, bMaskDWord))); //MAC settings -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) _PHY_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); -#else - _PHY_MACSettingCalibration(pDM_Odm, MAC_REG, MAC_backup); -#endif if(path == RF_PATH_A) //Path B to standby mode { @@ -2219,19 +1822,11 @@ if (*(pDM_Odm->mp_mode) != 1) #endif ODM_SetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord, 0x8992e); -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bMaskDWord))); ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bMaskDWord))); ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord))); -#else - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", ODM_GetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord))); - ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", ODM_GetRFReg(pDM_Odm, path, RF_AC, bMaskDWord))); - ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord))); -#endif // PA11+PAD01111, one shot i = 0; @@ -2265,11 +1860,7 @@ if (*(pDM_Odm->mp_mode) != 1) } //reload MAC default value -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) _PHY_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); -#else - _PHY_ReloadMACRegisters(pDM_Odm, MAC_REG, MAC_backup); -#endif //reload BB default value for(index = 0; index < APK_BB_REG_NUM ; index++) @@ -2281,11 +1872,7 @@ if (*(pDM_Odm->mp_mode) != 1) } //reload AFE default value -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) _PHY_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); -#else - _PHY_ReloadADDARegisters(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); -#endif //reload RF path default value for(path = 0; path < pathbound; path++) @@ -2316,11 +1903,9 @@ if (*(pDM_Odm->mp_mode) != 1) else ODM_SetRFReg(pDM_Odm, path, 0x4, bMaskDWord, ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) if(!IS_HARDWARE_TYPE_8723A(pAdapter)) ODM_SetRFReg(pDM_Odm, path, RF_BS_PA_APSET_G9_G11, bMaskDWord, ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); -#endif } pDM_Odm->RFCalibrateInfo.bAPKdone = TRUE; @@ -2343,31 +1928,17 @@ if (*(pDM_Odm->mp_mode) != 1) void PHY_IQCalibrate_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN BOOLEAN bReCovery ) { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #else // (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif #if (MP_DRIVER == 1) - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); - #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); - #endif #endif//(MP_DRIVER == 1) -#endif s4Byte result[4][8]; //last is final result u1Byte i, final_candidate, Indexforchannel; @@ -2385,32 +1956,13 @@ PHY_IQCalibrate_8188E( BOOLEAN is2T; is2T = (pDM_Odm->RFType == ODM_2T2R)?TRUE:FALSE; -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE) ) if (ODM_CheckPowerStatus(pAdapter) == FALSE) return; -#else - prtl8192cd_priv priv = pDM_Odm->priv; -#ifdef MP_TEST - if(priv->pshare->rf_ft_var.mp_specific) - { - if((OPMODE & WIFI_MP_CTX_PACKET) || (OPMODE & WIFI_MP_CTX_ST)) - return; - } -#endif - - if(priv->pshare->IQK_88E_done) - bReCovery= 1; - priv->pshare->IQK_88E_done = 1; - -#endif - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) { return; } -#endif #if MP_DRIVER == 1 if (*(pDM_Odm->mp_mode) == 1) @@ -2429,18 +1981,10 @@ if (*(pDM_Odm->mp_mode) == 1) return; #endif -#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) if(bReCovery) -#else//for ODM_MP - if(bReCovery && (!pAdapter->bInHctTest)) //YJ,add for PowerTest,120405 -#endif { ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("PHY_IQCalibrate_8188E: Return due to bReCovery!\n")); -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); -#else - _PHY_ReloadADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); -#endif return; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Start!!!\n")); @@ -2467,22 +2011,10 @@ if (*(pDM_Odm->mp_mode) == 1) for (i=0; i<3; i++) { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) phy_IQCalibrate_8188E(pAdapter, result, i, is2T); -#else - phy_IQCalibrate_8188E(pDM_Odm, result, i, is2T); -#endif - - - if(i == 1) - { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + if(i == 1) { is12simular = phy_SimularityCompare_8188E(pAdapter, result, 0, 1); -#else - is12simular = phy_SimularityCompare_8188E(pDM_Odm, result, 0, 1); -#endif - if(is12simular) - { + if(is12simular) { final_candidate = 0; ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is12simular final_candidate is %x\n",final_candidate)); break; @@ -2491,25 +2023,15 @@ if (*(pDM_Odm->mp_mode) == 1) if(i == 2) { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) is13simular = phy_SimularityCompare_8188E(pAdapter, result, 0, 2); -#else - is13simular = phy_SimularityCompare_8188E(pDM_Odm, result, 0, 2); -#endif - if(is13simular) - { + if(is13simular) { final_candidate = 0; ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is13simular final_candidate is %x\n",final_candidate)); break; } -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) is23simular = phy_SimularityCompare_8188E(pAdapter, result, 1, 2); -#else - is23simular = phy_SimularityCompare_8188E(pDM_Odm, result, 1, 2); -#endif - if(is23simular) - { + if(is23simular) { final_candidate = 1; ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is23simular final_candidate is %x\n",final_candidate)); } @@ -2556,9 +2078,7 @@ if (*(pDM_Odm->mp_mode) == 1) ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: final_candidate is %x\n",final_candidate)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); bPathAOK = bPathBOK = TRUE; - } - else - { + } else { ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: FAIL use default value\n")); pDM_Odm->RFCalibrateInfo.RegE94 = pDM_Odm->RFCalibrateInfo.RegEB4 = 0x100; //X default value @@ -2566,29 +2086,14 @@ if (*(pDM_Odm->mp_mode) == 1) } if((RegE94 != 0)/*&&(RegEA4 != 0)*/) - { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) _PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); -#else - _PHY_PathAFillIQKMatrix(pDM_Odm, bPathAOK, result, final_candidate, (RegEA4 == 0)); -#endif - } -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - if (is2T) - { + if (is2T) { if((RegEB4 != 0)/*&&(RegEC4 != 0)*/) - { _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); - } } -#endif -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) Indexforchannel = ODM_GetRightChnlPlaceforIQK(pHalData->CurrentChannel); -#else - Indexforchannel = 0; -#endif //To Fix BSOD when final_candidate is 0xff //by sherry 20120321 @@ -2600,45 +2105,25 @@ if (*(pDM_Odm->mp_mode) == 1) } //RTPRINT(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); -#else - _PHY_SaveADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, IQK_BB_REG_NUM); -#endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK finished\n")); } void PHY_LCCalibrate_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm -#else IN struct adapter *pAdapter -#endif ) { BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; u4Byte timeout = 2000, timecount = 0; - -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #else // (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif #if (MP_DRIVER == 1) - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); - #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); - #endif #endif//(MP_DRIVER == 1) -#endif @@ -2657,12 +2142,10 @@ if (*(pDM_Odm->mp_mode) == 1) return; #endif -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) { return; } -#endif // 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) if(bSingleTone || bCarrierSuppression) return; @@ -2676,21 +2159,15 @@ if (*(pDM_Odm->mp_mode) == 1) pDM_Odm->RFCalibrateInfo.bLCKInProgress = TRUE; //ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pDM_Odm->interfaceIndex, pHalData->CurrentBandType92D, timecount)); -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) if(pDM_Odm->RFType == ODM_2T2R) { phy_LCCalibrate_8188E(pAdapter, TRUE); } else -#endif { // For 88C 1T1R -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) phy_LCCalibrate_8188E(pAdapter, FALSE); -#else - phy_LCCalibrate_8188E(pDM_Odm, FALSE); -#endif } pDM_Odm->RFCalibrateInfo.bLCKInProgress = FALSE; @@ -2701,78 +2178,44 @@ if (*(pDM_Odm->mp_mode) == 1) void PHY_APCalibrate_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN s1Byte delta ) { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif #if DISABLE_BB_RF return; #endif return; -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) - { return; - } -#endif #if FOR_BRAZIL_PRETEST != 1 if(pDM_Odm->RFCalibrateInfo.bAPKdone) #endif return; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) if(pDM_Odm->RFType == ODM_2T2R){ phy_APCalibrate_8188E(pAdapter, delta, TRUE); } else -#endif { // For 88C 1T1R -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) phy_APCalibrate_8188E(pAdapter, delta, FALSE); -#else - phy_APCalibrate_8188E(pDM_Odm, delta, FALSE); -#endif } } void phy_SetRFPathSwitch_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN BOOLEAN bMain, IN BOOLEAN is2T ) { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #elif (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - if(!pAdapter->bHWInitReady) - #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) if(pAdapter->hw_init_completed == false) - #endif { u1Byte u1bTmp; u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; @@ -2780,9 +2223,6 @@ void phy_SetRFPathSwitch_8188E( //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); } - -#endif - if(is2T) //92C { if(bMain) @@ -2800,186 +2240,24 @@ void phy_SetRFPathSwitch_8188E( } } void PHY_SetRFPathSwitch_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter *pAdapter, -#endif IN BOOLEAN bMain ) { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - #if DISABLE_BB_RF return; #endif -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) if(pDM_Odm->RFType == ODM_2T2R) { phy_SetRFPathSwitch_8188E(pAdapter, bMain, TRUE); } else -#endif { // For 88C 1T1R -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) phy_SetRFPathSwitch_8188E(pAdapter, bMain, FALSE); -#else - phy_SetRFPathSwitch_8188E(pDM_Odm, bMain, FALSE); -#endif } } - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -//digital predistortion -void -phy_DigitalPredistortion( -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - IN struct adapter *pAdapter, -#else - IN PDM_ODM_T pDM_Odm, -#endif - IN BOOLEAN is2T - ) -{ -} - -void -PHY_DigitalPredistortion_8188E( -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - IN struct adapter *pAdapter -#else - IN PDM_ODM_T pDM_Odm -#endif - ) -{ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif -#if DISABLE_BB_RF - return; -#endif - - return; - - if(pDM_Odm->RFCalibrateInfo.bDPdone) - return; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - - if(pDM_Odm->RFType == ODM_2T2R){ - phy_DigitalPredistortion(pAdapter, TRUE); - } - else -#endif - { - // For 88C 1T1R - phy_DigitalPredistortion(pAdapter, FALSE); - } -} - - - -//return value TRUE => Main; FALSE => Aux - -BOOLEAN phy_QueryRFPathSwitch_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN struct adapter *pAdapter, -#endif - IN BOOLEAN is2T - ) -{ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - if(!pAdapter->bHWInitReady) - { - u1Byte u1bTmp; - u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; - ODM_Write1Byte(pDM_Odm, REG_LEDCFG2, u1bTmp); - //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); - ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); - } - - if(is2T) // - { - if(ODM_GetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) - return TRUE; - else - return FALSE; - } - else - { - if(ODM_GetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9) == 0x02) - return TRUE; - else - return FALSE; - } -} - - - -//return value TRUE => Main; FALSE => Aux -BOOLEAN PHY_QueryRFPathSwitch_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm -#else - IN struct adapter *pAdapter -#endif - ) -{ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - - -#if DISABLE_BB_RF - return TRUE; -#endif -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - - //if(IS_92C_SERIAL( pHalData->VersionID)){ - if(pDM_Odm->RFType == ODM_2T2R){ - return phy_QueryRFPathSwitch_8188E(pAdapter, TRUE); - } - else -#endif - { - // For 88C 1T1R -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - return phy_QueryRFPathSwitch_8188E(pAdapter, FALSE); -#else - return phy_QueryRFPathSwitch_8188E(pDM_Odm, FALSE); -#endif - } -} -#endif diff --git a/hal/HalPhyRf_8188e.h b/hal/HalPhyRf_8188e.h index 9f26041..aeda375 100755 --- a/hal/HalPhyRf_8188e.h +++ b/hal/HalPhyRf_8188e.h @@ -44,11 +44,7 @@ ODM_TxPwrTrackAdjust88E( void odm_TXPowerTrackingCallback_ThermalMeter_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm -#else IN struct adapter * Adapter -#endif ); @@ -56,12 +52,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E( void PHY_IQCalibrate_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter * Adapter, -#endif - IN BOOLEAN bReCovery); + IN BOOLEAN bReCovery); // @@ -69,11 +61,7 @@ PHY_IQCalibrate_8188E( // void PHY_LCCalibrate_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm -#else IN struct adapter * pAdapter -#endif ); // @@ -81,23 +69,16 @@ PHY_LCCalibrate_8188E( // void PHY_APCalibrate_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter * pAdapter, -#endif - IN s1Byte delta); + IN s1Byte delta); + void PHY_DigitalPredistortion_8188E( IN struct adapter * pAdapter); void _PHY_SaveADDARegisters( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter * pAdapter, -#endif IN pu4Byte ADDAReg, IN pu4Byte ADDABackup, IN u4Byte RegisterNum @@ -105,11 +86,7 @@ _PHY_SaveADDARegisters( void _PHY_PathADDAOn( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter * pAdapter, -#endif IN pu4Byte ADDAReg, IN BOOLEAN isPathAOn, IN BOOLEAN is2T @@ -117,11 +94,7 @@ _PHY_PathADDAOn( void _PHY_MACSettingCalibration( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else IN struct adapter * pAdapter, -#endif IN pu4Byte MACReg, IN pu4Byte MACBackup ); @@ -129,11 +102,7 @@ _PHY_MACSettingCalibration( void _PHY_PathAStandBy( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm -#else IN struct adapter * pAdapter -#endif ); diff --git a/hal/odm.c b/hal/odm.c index 3565c67..ea96dc7 100755 --- a/hal/odm.c +++ b/hal/odm.c @@ -40,24 +40,7 @@ const u2Byte dB_Invert_Table[8][12] = { //u1Byte tmpNumBssDesc; //RT_WLAN_BSS tmpbssDesc[MAX_BSS_DESC]; -#if (DM_ODM_SUPPORT_TYPE==ODM_MP) -static u4Byte edca_setting_UL[HT_IOT_PEER_MAX] = -// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MARVELL 92U_AP SELF_AP(DownLink/Tx) -{ 0x5e4322, 0xa44f, 0x5e4322, 0x5ea32b, 0x5ea422, 0x5ea322, 0x3ea430, 0x5ea44f, 0x5e4322, 0x5e4322}; - - -static u4Byte edca_setting_DL[HT_IOT_PEER_MAX] = -// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MARVELL 92U_AP SELF_AP(UpLink/Rx) -{ 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea42b, 0xa44f, 0xa630, 0x5ea630, 0xa44f, 0xa42b, 0xa42b}; - -static u4Byte edca_setting_DL_GMode[HT_IOT_PEER_MAX] = -// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MARVELL 92U_AP SELF_AP -{ 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0xa44f, 0x5e4322, 0x5ea42b}; - - //============================================================ -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - //avoid to warn in FreeBSD ==> To DO modify u4Byte EDCAParam[HT_IOT_PEER_MAX][3] = @@ -77,34 +60,6 @@ u4Byte EDCAParam[HT_IOT_PEER_MAX][3] = {0x5ea42b, 0xa630, 0x5e431c}, // 11:airgocap AP // {0x5e4322, 0x00a44f, 0x5ea44f}, // 12:unknown AP }; -//============================================================ -// EDCA Paramter for AP/ADSL by Mingzhi 2011-11-22 -//============================================================ -#elif (DM_ODM_SUPPORT_TYPE &ODM_ADSL) -enum qos_prio { BK, BE, VI, VO, VI_AG, VO_AG }; - -static const struct ParaRecord rtl_ap_EDCA[] = -{ -//ACM,AIFSN, ECWmin, ECWmax, TXOplimit - {0, 7, 4, 10, 0}, //BK - {0, 3, 4, 6, 0}, //BE - {0, 1, 3, 4, 188}, //VI - {0, 1, 2, 3, 102}, //VO - {0, 1, 3, 4, 94}, //VI_AG - {0, 1, 2, 3, 47}, //VO_AG -}; - -static const struct ParaRecord rtl_sta_EDCA[] = -{ -//ACM,AIFSN, ECWmin, ECWmax, TXOplimit - {0, 7, 4, 10, 0}, - {0, 3, 4, 10, 0}, - {0, 2, 3, 4, 188}, - {0, 2, 2, 3, 102}, - {0, 2, 3, 4, 94}, - {0, 2, 2, 3, 47}, -}; -#endif //============================================================ // Global var @@ -364,64 +319,6 @@ odm_Adaptivity( ); //END---------BB POWER SAVE-----------------------// -//START-----------------PSD-----------------------// -#if(DM_ODM_SUPPORT_TYPE & (ODM_MP)) -//============================================================ -// Function predefine. -//============================================================ -void odm_PathDiversityInit_92C( IN struct adapter *Adapter); -void odm_2TPathDiversityInit_92C( IN struct adapter *Adapter); -void odm_1TPathDiversityInit_92C( IN struct adapter *Adapter); -BOOLEAN odm_IsConnected_92C(IN struct adapter *Adapter); -void odm_PathDiversityAfterLink_92C( IN struct adapter *Adapter); - -void -odm_CCKTXPathDiversityCallback( - PRT_TIMER pTimer - ); - -void -odm_CCKTXPathDiversityWorkItemCallback( - IN void * pContext - ); - -void -odm_PathDivChkAntSwitchCallback( - PRT_TIMER pTimer - ); - -void -odm_PathDivChkAntSwitchWorkitemCallback( - IN void * pContext - ); - -void odm_SetRespPath_92C( IN struct adapter *Adapter, IN u1Byte DefaultRespPath); -void odm_OFDMTXPathDiversity_92C( IN struct adapter *Adapter); -void odm_CCKTXPathDiversity_92C( IN struct adapter *Adapter); -void odm_ResetPathDiversity_92C( IN struct adapter *Adapter); - -//Start-------------------- RX High Power------------------------// -void odm_RXHPInit( IN PDM_ODM_T pDM_Odm); -void odm_RXHP( IN PDM_ODM_T pDM_Odm); -void odm_Write_RXHP( IN PDM_ODM_T pDM_Odm); - -void odm_PSD_RXHP( IN PDM_ODM_T pDM_Odm); -void odm_PSD_RXHPCallback( PRT_TIMER pTimer); -void odm_PSD_RXHPWorkitemCallback( IN void * pContext); -//End--------------------- RX High Power -----------------------// - -void -odm_PathDivInit( IN PDM_ODM_T pDM_Odm); - -void -odm_SetRespPath_92C( - IN struct adapter *Adapter, - IN u1Byte DefaultRespPath - ); - -#endif -//END-------------------PSD-----------------------// - void odm_RefreshRateAdaptiveMaskMP( IN PDM_ODM_T pDM_Odm @@ -452,7 +349,6 @@ odm_DynamicTxPowerNIC( IN PDM_ODM_T pDM_Odm ); -#if(DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) void odm_DynamicTxPowerSavePowerIndex( IN PDM_ODM_T pDM_Odm @@ -472,8 +368,6 @@ void odm_DynamicTxPower_92D( IN PDM_ODM_T pDM_Odm ); -#endif - void odm_RSSIMonitorInit( @@ -534,22 +428,7 @@ odm_SwAntDivChkAntSwitchNIC( ); -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -void -odm_SwAntDivChkAntSwitchCallback( - PRT_TIMER pTimer -); -void -odm_SwAntDivChkAntSwitchWorkitemCallback( - IN void * pContext - ); -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) void odm_SwAntDivChkAntSwitchCallback(void *FunctionContext); -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -void odm_SwAntDivChkAntSwitchCallback(void *FunctionContext); -#endif - - void odm_GlobalAdapterCheck( @@ -604,41 +483,6 @@ odm_TXPowerTrackingCheckCE( IN PDM_ODM_T pDM_Odm ); -#if(DM_ODM_SUPPORT_TYPE & (ODM_MP)) - -void -ODM_RateAdaptiveStateApInit( - IN struct adapter *Adapter , - IN PRT_WLAN_STA pEntry - ); - -void -odm_TXPowerTrackingCallbackThermalMeter92C( - IN struct adapter *Adapter - ); - -void -odm_TXPowerTrackingCallbackRXGainThermalMeter92D( - IN struct adapter * Adapter - ); - -void -odm_TXPowerTrackingCallbackThermalMeter92D( - IN struct adapter *Adapter - ); - -void -odm_TXPowerTrackingDirectCall92C( - IN struct adapter * Adapter - ); - -void -odm_TXPowerTrackingThermalMeterCheck( - IN struct adapter * Adapter - ); - -#endif - void odm_EdcaTurboCheck( IN PDM_ODM_T pDM_Odm @@ -648,52 +492,10 @@ ODM_EdcaTurboInit( IN PDM_ODM_T pDM_Odm ); -#if(DM_ODM_SUPPORT_TYPE==ODM_MP) -void -odm_EdcaTurboCheckMP( - IN PDM_ODM_T pDM_Odm - ); - -//check if edca turbo is disabled -BOOLEAN -odm_IsEdcaTurboDisable( - IN PDM_ODM_T pDM_Odm -); -//choose edca paramter for special IOT case -void -ODM_EdcaParaSelByIot( - IN PDM_ODM_T pDM_Odm, - OUT u4Byte *EDCA_BE_UL, - OUT u4Byte *EDCA_BE_DL - ); -//check if it is UL or DL -void -odm_EdcaChooseTrafficIdx( - IN PDM_ODM_T pDM_Odm, - IN u8Byte cur_tx_bytes, - IN u8Byte cur_rx_bytes, - IN BOOLEAN bBiasOnRx, - OUT BOOLEAN *pbIsCurRDLState - ); - -#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) void odm_EdcaTurboCheckCE( IN PDM_ODM_T pDM_Odm ); -#else -void -odm_IotEngine( - IN PDM_ODM_T pDM_Odm - ); - -void -odm_EdcaParaInit( - IN PDM_ODM_T pDM_Odm - ); -#endif - - #define RxDefaultAnt1 0x65a9 #define RxDefaultAnt2 0x569a @@ -764,11 +566,6 @@ ODM_DMInit( odm_DynamicBBPowerSavingInit(pDM_Odm); odm_DynamicTxPowerInit(pDM_Odm); odm_TXPowerTrackingInit(pDM_Odm); - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - odm_PSDMonitorInit(pDM_Odm); - odm_RXHPInit(pDM_Odm); - odm_PathDivInit(pDM_Odm); //92D Path Div Init //Neil Chen - #endif ODM_EdcaTurboInit(pDM_Odm); #if (RTL8188E_SUPPORT == 1) ODM_RAInfo_Init_all(pDM_Odm); @@ -804,11 +601,6 @@ ODM_DMWatchdog( odm_FalseAlarmCounterStatistics(pDM_Odm); odm_RSSIMonitorCheck(pDM_Odm); -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -//#ifdef CONFIG_PLATFORM_SPRD - //For CE Platform(SPRD or Tablet) - //8723A or 8189ES platform - //NeilChen--2012--08--24-- //Fix Leave LPS issue if( (adapter_to_pwrctl(pDM_Odm->Adapter)->pwr_mode != PS_MODE_ACTIVE) &&// in LPS mode ( @@ -818,14 +610,10 @@ ODM_DMWatchdog( ) ) { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("----Step1: odm_DIG is in LPS mode\n")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("---Step2: 8723AS is in LPS mode\n")); - odm_DIGbyRSSI_LPS(pDM_Odm); - } - else -//#endif -#endif - { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("----Step1: odm_DIG is in LPS mode\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("---Step2: 8723AS is in LPS mode\n")); + odm_DIGbyRSSI_LPS(pDM_Odm); + } else { odm_DIG(pDM_Odm); } @@ -867,14 +655,9 @@ ODM_DMWatchdog( ODM_TXPowerTrackingCheck(pDM_Odm); odm_EdcaTurboCheck(pDM_Odm); odm_DynamicTxPower(pDM_Odm); - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - odm_RXHP(pDM_Odm); - #endif } -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) odm_dtc(pDM_Odm); -#endif } @@ -1213,9 +996,6 @@ odm_CommonInfoSelfInit( { pDM_Odm->bCckHighPower = (BOOLEAN) ODM_GetBBReg(pDM_Odm, 0x824, BIT9); pDM_Odm->RFPathRxEnable = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xc04, 0x0F); -#if (DM_ODM_SUPPORT_TYPE != ODM_CE) - pDM_Odm->pbNet_closed = &pDM_Odm->BOOLEAN_temp; -#endif if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D)) { #if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) @@ -1239,39 +1019,15 @@ odm_CommonInfoSelfUpdate( u1Byte i; PSTA_INFO_T pEntry; -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - - struct adapter *Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - - pEntry = pDM_Odm->pODM_StaInfo[0]; - if(pMgntInfo->mAssoc) - { - pEntry->bUsed=TRUE; - for (i=0; i<6; i++) - pEntry->MacAddr[i] = pMgntInfo->Bssid[i]; - } - else - { - pEntry->bUsed=FALSE; - for (i=0; i<6; i++) - pEntry->MacAddr[i] = 0; - } -#endif - - - if(*(pDM_Odm->pBandWidth) == ODM_BW40M) - { + if(*(pDM_Odm->pBandWidth) == ODM_BW40M) { if(*(pDM_Odm->pSecChOffset) == 1) pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) -2; else if(*(pDM_Odm->pSecChOffset) == 2) pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) +2; - } - else + } else pDM_Odm->ControlChannel = *(pDM_Odm->pChannel); - for (i=0; ipODM_StaInfo[i]; if(IS_STA_VALID(pEntry)) EntryCnt++; @@ -1351,118 +1107,6 @@ odm_CmnInfoUpdate_Debug( ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min=%d\n",pDM_Odm->RSSI_Min) ); } -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -void -ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm ) -{ -#if USE_WORKITEM - struct adapter * pAdapter = pDM_Odm->Adapter; - - ODM_InitializeWorkItem( pDM_Odm, - &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem, - (RT_WORKITEM_CALL_BACK)odm_SwAntDivChkAntSwitchWorkitemCallback, - (void *)pAdapter, - "AntennaSwitchWorkitem" - ); - - ODM_InitializeWorkItem( - pDM_Odm, - &(pDM_Odm->PathDivSwitchWorkitem), - (RT_WORKITEM_CALL_BACK)odm_PathDivChkAntSwitchWorkitemCallback, - (void *)pAdapter, - "SWAS_WorkItem"); - - ODM_InitializeWorkItem( - pDM_Odm, - &(pDM_Odm->CCKPathDiversityWorkitem), - (RT_WORKITEM_CALL_BACK)odm_CCKTXPathDiversityWorkItemCallback, - (void *)pAdapter, - "CCKTXPathDiversityWorkItem"); -#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) -#if (RTL8188E_SUPPORT == 1) - ODM_InitializeWorkItem( - pDM_Odm, - &(pDM_Odm->FastAntTrainingWorkitem), - (RT_WORKITEM_CALL_BACK)odm_FastAntTrainingWorkItemCallback, - (void *)pAdapter, - "FastAntTrainingWorkitem"); -#endif -#endif - ODM_InitializeWorkItem( - pDM_Odm, - &(pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem), - (RT_WORKITEM_CALL_BACK)odm_PSD_RXHPWorkitemCallback, - (void *)pAdapter, - "PSDRXHP_WorkItem"); -#endif -} - -void -ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm ) -{ -#if USE_WORKITEM - ODM_FreeWorkItem( &(pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem)); - - ODM_FreeWorkItem(&(pDM_Odm->PathDivSwitchWorkitem)); - - ODM_FreeWorkItem(&(pDM_Odm->CCKPathDiversityWorkitem)); - - ODM_FreeWorkItem(&(pDM_Odm->FastAntTrainingWorkitem)); - - ODM_FreeWorkItem((&pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem)); -#endif - -} -#endif - -/* -void -odm_FindMinimumRSSI( - IN PDM_ODM_T pDM_Odm - ) -{ - u4Byte i; - u1Byte RSSI_Min = 0xFF; - - for(i=0; ipODM_StaInfo[i] != NULL) - if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) ) - { - if(pDM_Odm->pODM_StaInfo[i]->RSSI_Ave < RSSI_Min) - { - RSSI_Min = pDM_Odm->pODM_StaInfo[i]->RSSI_Ave; - } - } - } - - pDM_Odm->RSSI_Min = RSSI_Min; - -} - -void -odm_IsLinked( - IN PDM_ODM_T pDM_Odm - ) -{ - u4Byte i; - BOOLEAN Linked = FALSE; - - for(i=0; ipODM_StaInfo[i]) ) - { - Linked = TRUE; - break; - } - - } - - pDM_Odm->bLinked = Linked; -} -*/ - - //3============================================================ //3 DIG //3============================================================ @@ -1541,93 +1185,6 @@ int getIGIForDiff(int value_IGI) } } - -// Add by Neil Chen to enable edcca to MP Platform -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -void -odm_EnableEDCCA( - IN PDM_ODM_T pDM_Odm -) -{ - - // This should be moved out of OUTSRC - struct adapter * pAdapter = pDM_Odm->Adapter; - // Enable EDCCA. The value is suggested by SD3 Wilson. - - // - // Revised for ASUS 11b/g performance issues, suggested by BB Neil, 2012.04.13. - // - if((pDM_Odm->SupportICType == ODM_RTL8723A)&&(IS_WIRELESS_MODE_G(pAdapter))) - { - //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold, 0x00); - ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold,0x00); - ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold+2,0xFD); - - } - else - { - //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold, 0x03); - ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold,0x03); - ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold+2,0x00); - } - - //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold+2, 0x00); -} - -void -odm_DisableEDCCA( - IN PDM_ODM_T pDM_Odm -) -{ - // Disable EDCCA.. - ODM_Write1Byte(pDM_Odm, rOFDM0_ECCAThreshold, 0x7f); - ODM_Write1Byte(pDM_Odm, rOFDM0_ECCAThreshold+2, 0x7f); -} - -// -// Description: According to initial gain value to determine to enable or disable EDCCA. -// -// Suggested by SD3 Wilson. Added by tynli. 2011.11.25. -// -void -odm_DynamicEDCCA( - IN PDM_ODM_T pDM_Odm -) -{ - struct adapter * pAdapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u1Byte RegC50, RegC58; - BOOLEAN bEDCCAenable = FALSE; - - RegC50 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0); - RegC58 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0); - - - if((RegC50 > 0x28 && RegC58 > 0x28) || - ((pDM_Odm->SupportICType == ODM_RTL8723A && IS_WIRELESS_MODE_G(pAdapter) && RegC50>0x26)) || - (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 > 0x28)) - { - if(!pHalData->bPreEdccaEnable) - { - odm_EnableEDCCA(pDM_Odm); - pHalData->bPreEdccaEnable = TRUE; - } - - } - else if((RegC50 < 0x25 && RegC58 < 0x25) || (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 < 0x25)) - { - if(pHalData->bPreEdccaEnable) - { - odm_DisableEDCCA(pDM_Odm); - pHalData->bPreEdccaEnable = FALSE; - } - } -} - - -#endif // end MP platform support - void ODM_Write_DIG( IN PDM_ODM_T pDM_Odm, @@ -1673,21 +1230,10 @@ ODM_Write_DIG( pDM_DigTable->CurIGValue = CurrentIGI; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG():CurrentIGI=0x%x \n",CurrentIGI)); - -// Add by Neil Chen to enable edcca to MP Platform -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - // Adjust EDCCA. - if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) - odm_DynamicEDCCA(pDM_Odm); -#endif - - } - //Need LPS mode for CE platform --2012--08--24--- //8723AS/8189ES -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) void odm_DIGbyRSSI_LPS( @@ -1745,7 +1291,6 @@ odm_DIGbyRSSI_LPS( ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); } -#endif void odm_AdaptivityInit( @@ -1788,28 +1333,8 @@ odm_Adaptivity( u4Byte value32; BOOLEAN EDCCA_State = 0; -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - struct adapter * pAdapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - BOOLEAN bFwCurrentInPSMode=FALSE; - PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); - - pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_FW_PSMODE_STATUS, (pu1Byte)(&bFwCurrentInPSMode)); - - // Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14. - if(bFwCurrentInPSMode) - return; -#endif - - if(!(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)) - { + if(!(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Go to odm_DynamicEDCCA() \n")); - // Add by Neil Chen to enable edcca to MP Platform -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - // Adjust EDCCA. - if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) - odm_DynamicEDCCA(pDM_Odm); -#endif return; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_Adaptivity() =====> \n")); @@ -1831,15 +1356,7 @@ odm_Adaptivity( ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, 0xFFFF, (0x7f<<8) | 0x7f); return; } - -#if (DM_ODM_SUPPORT_TYPE==ODM_MP) - if(pMgntInfo->IOTPeer == HT_IOT_PEER_BROADCOM) - ODM_Write1Byte(pDM_Odm, REG_TRX_SIFS_OFDM, 0x0a); - else - ODM_Write1Byte(pDM_Odm, REG_TRX_SIFS_OFDM, 0x0e); -#endif - if(!pDM_Odm->ForceEDCCA) - { + if(!pDM_Odm->ForceEDCCA) { if(pDM_Odm->RSSI_Min > pDM_Odm->AdapEn_RSSI) EDCCA_State = 1; else if(pDM_Odm->RSSI_Min < (pDM_Odm->AdapEn_RSSI - 5)) @@ -1847,9 +1364,6 @@ odm_Adaptivity( } else EDCCA_State = 1; - //if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (*pDM_Odm->pBandType == BAND_ON_5G)) - //IGI_target = pDM_Odm->IGI_Base; - //else { if(*pDM_Odm->pBandWidth == ODM_BW20M) //CHANNEL_WIDTH_20 @@ -1945,39 +1459,6 @@ odm_DigForBtHsMode( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - pDIG_T pDM_DigTable=&pDM_Odm->DM_DigTable; - u1Byte digForBtHs=0; - u1Byte digUpBound=0x5a; - - if(pDM_Odm->bBtConnectProcess) - { - if(pDM_Odm->SupportICType&(ODM_RTL8723A)) - digForBtHs = 0x28; - else - digForBtHs = 0x22; - } - else - { - // - // Decide DIG value by BT HS RSSI. - // - digForBtHs = pDM_Odm->btHsRssi+4; - - //DIG Bound - if(pDM_Odm->SupportICType&(ODM_RTL8723A)) - digUpBound = 0x3e; - - if(digForBtHs > digUpBound) - digForBtHs = digUpBound; - if(digForBtHs < 0x1c) - digForBtHs = 0x1c; - - // update Current IGI - pDM_DigTable->BT30_CurIGI = digForBtHs; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DigForBtHsMode() : set DigValue=0x%x\n", digForBtHs)); -#endif } void @@ -1995,36 +1476,6 @@ odm_DIG( u1Byte CurrentIGI = pDM_DigTable->CurIGValue; u1Byte Adap_IGI_Upper = pDM_Odm->IGI_target + 30 + (u1Byte) pDM_Odm->TH_L2H_ini -(u1Byte) pDM_Odm->TH_EDCCA_HL_diff; -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -// This should be moved out of OUTSRC - struct adapter * pAdapter = pDM_Odm->Adapter; -#if OS_WIN_FROM_WIN7(OS_VERSION) - if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Is AP mode or In HCT Test \n")); - return; - } -#endif -/* - if (pDM_Odm->SupportICType==ODM_RTL8723B) - return; -*/ -#if(BT_30_SUPPORT == 1) - if(pDM_Odm->bBtHsOperation) - { - odm_DigForBtHsMode(pDM_Odm); - } -#endif - if(!(pDM_Odm->SupportICType &(ODM_RTL8723A|ODM_RTL8188E))) - { - if(pRX_HP_Table->RXHP_flag == 1) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In RXHP Operation \n")); - return; - } - } -#endif -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV if((pDM_Odm->bLinked) && (pDM_Odm->Adapter->registrypriv.force_igi !=0)) { @@ -2033,15 +1484,6 @@ odm_DIG( return; } #endif -#endif -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - prtl8192cd_priv priv = pDM_Odm->priv; - if (!((priv->up_time > 5) && (priv->up_time % 2)) ) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Not In DIG Operation Period \n")); - return; - } -#endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()==>\n")); //if(!(pDM_Odm->SupportAbility & (ODM_BB_DIG|ODM_BB_FA_CNT))) @@ -2127,25 +1569,6 @@ odm_DIG( { if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -#ifdef DFS - if (!priv->pmib->dot11DFSEntry.disable_DFS && - (OPMODE & WIFI_AP_STATE) && - (((pDM_Odm->ControlChannel >= 52) && - (pDM_Odm->ControlChannel <= 64)) || - ((pDM_Odm->ControlChannel >= 100) && - (pDM_Odm->ControlChannel <= 140)))) - dm_dig_max = 0x24; - else -#endif - if (priv->pmib->dot11RFEntry.tx2path) { - if (*(pDM_Odm->pWirelessMode) == ODM_WM_B)//(priv->pmib->dot11BssType.net_work_type == WIRELESS_11B) - dm_dig_max = 0x2A; - else - dm_dig_max = 0x32; - } - else -#endif dm_dig_max = DM_DIG_MAX_AP; dm_dig_min = DM_DIG_MIN_AP; DIG_MaxOfMin = dm_dig_max; @@ -2455,48 +1878,6 @@ odm_DIG( ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x\n", CurrentIGI)); //2 High power RSSI threshold -#if (DM_ODM_SUPPORT_TYPE & ODM_MP) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); - //PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); - // for LC issue to dymanic modify DIG lower bound----------LC Mocca Issue - u8Byte curTxOkCnt=0, curRxOkCnt=0; - static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; - - //u8Byte OKCntAll=0; - //static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; - //u8Byte CurByteCnt=0, PreByteCnt=0; - - curTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; - curRxOkCnt =pAdapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; - lastTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast; - lastRxOkCnt = pAdapter->RxStats.NumRxBytesUnicast; - //----------------------------------------------------------end for LC Mocca issue - if((pDM_Odm->SupportICType == ODM_RTL8723A)&& (pHalData->UndecoratedSmoothedPWDB > DM_DIG_HIGH_PWR_THRESHOLD)) - { - // High power IGI lower bound - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB)); - if(CurrentIGI < DM_DIG_HIGH_PWR_IGI_LOWER_BOUND) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", pDM_DigTable->CurIGValue)); - //pDM_DigTable->CurIGValue = DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; - CurrentIGI=DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; - } - } - if((pDM_Odm->SupportICType & ODM_RTL8723A) && - IS_WIRELESS_MODE_G(pAdapter)) - { - if(pHalData->UndecoratedSmoothedPWDB > 0x28) - { - if(CurrentIGI < DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND) - { - //pDM_DigTable->CurIGValue = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; - CurrentIGI = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; - } - } - } -} -#endif #if (RTL8192D_SUPPORT==1) if(pDM_Odm->SupportICType == ODM_RTL8192D) @@ -2583,31 +1964,7 @@ odm_DigAbort( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -// This should be moved out of OUTSRC - struct adapter * pAdapter = pDM_Odm->Adapter; - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - -#if OS_WIN_FROM_WIN7(OS_VERSION) - if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Is AP mode or In HCT Test \n")); - return TRUE; - } -#endif - - if(pRX_HP_Table->RXHP_flag == 1) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In RXHP Operation \n")); - return TRUE; - } - return FALSE; -#else // For Other team any special case for DIG? - return FALSE; -#endif - - } @@ -2619,12 +1976,7 @@ odm_DIGInit( { pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - //pDM_DigTable->Dig_Enable_Flag = TRUE; - //pDM_DigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; pDM_DigTable->CurIGValue = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm)); - //pDM_DigTable->PreIGValue = 0x0; - //pDM_DigTable->CurSTAConnectState = pDM_DigTable->PreSTAConnectState = DIG_STA_DISCONNECT; - //pDM_DigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT; pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; pDM_DigTable->FALowThresh = DMfalseALARM_THRESH_LOW; @@ -2673,32 +2025,6 @@ odm_DIG( u1Byte dm_dig_max, dm_dig_min; u1Byte CurrentIGI = pDM_DigTable->CurIGValue; -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -// This should be moved out of OUTSRC - struct adapter * pAdapter = pDM_Odm->Adapter; -#if OS_WIN_FROM_WIN7(OS_VERSION) - if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Is AP mode or In HCT Test \n")); - return; - } -#endif -#if(BT_30_SUPPORT == 1) - if(pDM_Odm->bBtHsOperation) - { - odm_DigForBtHsMode(pDM_Odm); - return; - } -#endif - - if(pRX_HP_Table->RXHP_flag == 1) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In RXHP Operation \n")); - return; - } -#endif //end ODM_MP type - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV if((pDM_Odm->bLinked) && (pDM_Odm->Adapter->registrypriv.force_igi !=0)) { @@ -2707,18 +2033,7 @@ odm_DIG( return; } #endif -#endif -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - prtl8192cd_priv priv = pDM_Odm->priv; - if (!((priv->up_time > 5) && (priv->up_time % 2)) ) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Not In DIG Operation Period \n")); - return; - } -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()==>\n")); - //if(!(pDM_Odm->SupportAbility & (ODM_BB_DIG|ODM_BB_FA_CNT))) if((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) ||(!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) { ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n")); @@ -2799,25 +2114,6 @@ odm_DIG( { if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -#ifdef DFS - if (!priv->pmib->dot11DFSEntry.disable_DFS && - (OPMODE & WIFI_AP_STATE) && - (((pDM_Odm->ControlChannel >= 52) && - (pDM_Odm->ControlChannel <= 64)) || - ((pDM_Odm->ControlChannel >= 100) && - (pDM_Odm->ControlChannel <= 140)))) - dm_dig_max = 0x24; - else -#endif - if (priv->pmib->dot11RFEntry.tx2path) { - if (*(pDM_Odm->pWirelessMode) == ODM_WM_B)//(priv->pmib->dot11BssType.net_work_type == WIRELESS_11B) - dm_dig_max = 0x2A; - else - dm_dig_max = 0x32; - } - else -#endif dm_dig_max = DM_DIG_MAX_AP; dm_dig_min = DM_DIG_MIN_AP; DIG_MaxOfMin = dm_dig_max; @@ -3060,48 +2356,6 @@ odm_DIG( ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x\n", CurrentIGI)); //2 High power RSSI threshold -#if (DM_ODM_SUPPORT_TYPE & ODM_MP) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); - - // for LC issue to dymanic modify DIG lower bound----------LC Mocca Issue - u8Byte curTxOkCnt=0, curRxOkCnt=0; - static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; - - u8Byte OKCntAll=0; - //static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; - //u8Byte CurByteCnt=0, PreByteCnt=0; - - curTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; - curRxOkCnt =pAdapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; - lastTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast; - lastRxOkCnt = pAdapter->RxStats.NumRxBytesUnicast; - //----------------------------------------------------------end for LC Mocca issue - if((pDM_Odm->SupportICType == ODM_RTL8723A)&& (pHalData->UndecoratedSmoothedPWDB > DM_DIG_HIGH_PWR_THRESHOLD)) - { - // High power IGI lower bound - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB)); - if(CurrentIGI < DM_DIG_HIGH_PWR_IGI_LOWER_BOUND) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", pDM_DigTable->CurIGValue)); - //pDM_DigTable->CurIGValue = DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; - CurrentIGI=DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; - } - } - if((pDM_Odm->SupportICType & ODM_RTL8723A) && IS_WIRELESS_MODE_G(pAdapter)) - { - if(pHalData->UndecoratedSmoothedPWDB > 0x28) - { - if(CurrentIGI < DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND) - { - //pDM_DigTable->CurIGValue = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; - CurrentIGI = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; - } - } - } -} -#endif - #if (RTL8192D_SUPPORT==1) if(pDM_Odm->SupportICType == ODM_RTL8192D) { @@ -3157,26 +2411,9 @@ odm_FalseAlarmCounterStatistics( u4Byte ret_value; PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - prtl8192cd_priv priv = pDM_Odm->priv; - if( (priv->auto_channel != 0) && (priv->auto_channel != 2) ) - return; -#endif - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - if((pDM_Odm->SupportICType == ODM_RTL8192D) && - (*(pDM_Odm->pMacPhyMode)==ODM_DMSP)&& ////modify by Guo.Mingzhi 2011-12-29 - (!(*(pDM_Odm->pbMasterOfDMSP)))) - { - odm_FalseAlarmCounterStatistics_ForSlaveOfDMSP(pDM_Odm); - return; - } -#endif - if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) return; -// if(pDM_Odm->SupportICType != ODM_RTL8812) if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { @@ -3310,21 +2547,6 @@ odm_CCKPacketDetectionThresh( u1Byte CurCCK_CCAThres; PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -//modify by Guo.Mingzhi 2011-12-29 - if (pDM_Odm->bDualMacSmartConcurrent == TRUE) -// if (pDM_Odm->bDualMacSmartConcurrent == FALSE) - return; -#if(BT_30_SUPPORT == 1) - if(pDM_Odm->bBtHsOperation) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() write 0xcd for BT HS mode!!\n")); - ODM_Write_CCK_CCA_Thres(pDM_Odm, 0xcd); - return; - } -#endif -#endif - if(!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD|ODM_BB_FA_CNT))) return; @@ -3402,8 +2624,6 @@ odm_DynamicBBPowerSaving( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) - if ((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8723A)) return; if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)) @@ -3424,8 +2644,6 @@ odm_DynamicBBPowerSaving( { ODM_RF_Saving(pDM_Odm, FALSE); } -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - } void @@ -3488,17 +2706,14 @@ ODM_RF_Saving( IN u1Byte bForceInNormal ) { -#if (DM_ODM_SUPPORT_TYPE != ODM_AP) pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; u1Byte Rssi_Up_bound = 30 ; u1Byte Rssi_Low_bound = 25; - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) if(pDM_Odm->PatchID == 40 ) //RT_CID_819x_FUNAI_TV { Rssi_Up_bound = 50 ; Rssi_Low_bound = 45; } - #endif if(pDM_PSTable->initialize == 0){ pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14; @@ -3570,7 +2785,6 @@ ODM_RF_Saving( } pDM_PSTable->PreRFState =pDM_PSTable->CurRFState; } -#endif } @@ -3588,43 +2802,16 @@ odm_RateAdaptiveMaskInit( { PODM_RATE_ADAPTIVE pOdmRA = &pDM_Odm->RateAdaptive; -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PMGNT_INFO pMgntInfo = &pDM_Odm->Adapter->MgntInfo; - PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pMgntInfo->RateAdaptive; - - pRA->RATRState = DM_RATR_STA_INIT; - if (pMgntInfo->DM_Type == DM_Type_ByDriver) - pMgntInfo->bUseRAMask = TRUE; - else - pMgntInfo->bUseRAMask = FALSE; - -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) pOdmRA->Type = DM_Type_ByDriver; if (pOdmRA->Type == DM_Type_ByDriver) pDM_Odm->bUseRAMask = true; else pDM_Odm->bUseRAMask = false; - -#endif - pOdmRA->RATRState = DM_RATR_STA_INIT; pOdmRA->HighRSSIThresh = 50; pOdmRA->LowRSSIThresh = 20; } -#if (DM_ODM_SUPPORT_TYPE & ODM_MP) -void -ODM_RateAdaptiveStateApInit( - IN struct adapter *Adapter , - IN PRT_WLAN_STA pEntry - ) -{ - PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pEntry->RateAdaptive; - pRA->RATRState = DM_RATR_STA_INIT; -} -#endif - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) u4Byte ODM_Get_Rate_Bitmap( IN PDM_ODM_T pDM_Odm, IN u4Byte macid, @@ -3726,7 +2913,6 @@ u4Byte ODM_Get_Rate_Bitmap( return rate_bitmap; } -#endif /*----------------------------------------------------------------------------- * Function: odm_RefreshRateAdaptiveMask() @@ -3779,103 +2965,13 @@ odm_RefreshRateAdaptiveMaskMP( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - struct adapter *pAdapter = pDM_Odm->Adapter; - struct adapter * pTargetAdapter = NULL; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter); - //PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pMgntInfo->RateAdaptive; - PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; - - if(pAdapter->bDriverStopped) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); - return; - } - - if(!pMgntInfo->bUseRAMask) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); - return; - } - - // if default port is connected, update RA table for default port (infrastructure mode only) - if(pAdapter->MgntInfo.mAssoc && (!ACTING_AS_AP(pAdapter))) - { - if( ODM_RAStateCheck(pDM_Odm, pHalData->UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pRA->RATRState) ) - { - ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pHalData->UndecoratedSmoothedPWDB, pRA->RATRState)); - pAdapter->HalFunc.UpdateHalRAMaskHandler( - pAdapter, - FALSE, - 0, - NULL, - NULL, - pRA->RATRState, - RAMask_Normal); - } - } - - // - // The following part configure AP/VWifi/IBSS rate adaptive mask. - // - - if(pMgntInfo->mIbss) - { - // Target: AP/IBSS peer. - pTargetAdapter = GetDefaultAdapter(pAdapter); - } - else - { - pTargetAdapter = GetFirstAPAdapter(pAdapter); - } - - // if extension port (softap) is started, updaet RA table for more than one clients associate - if(pTargetAdapter != NULL) - { - int i; - PRT_WLAN_STA pEntry; - PRATE_ADAPTIVE pEntryRA; - - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { - pEntry = AsocEntry_EnumStation(pTargetAdapter, i); - if(NULL != pEntry) - { - if(pEntry->bAssociated) - { - pEntryRA = &pEntry->RateAdaptive; - if( ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pEntryRA->RATRState) ) - { - ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->MacAddr); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntryRA->RATRState)); - pAdapter->HalFunc.UpdateHalRAMaskHandler( - pTargetAdapter, - FALSE, - pEntry->AID+1, - pEntry->MacAddr, - pEntry, - pEntryRA->RATRState, - RAMask_Normal); - } - } - } - } - } - - if(pMgntInfo->bSetTXPowerTrainingByOid) - pMgntInfo->bSetTXPowerTrainingByOid = FALSE; -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) } - void odm_RefreshRateAdaptiveMaskCE( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) u1Byte i; struct adapter *pAdapter = pDM_Odm->Adapter; @@ -3885,14 +2981,10 @@ odm_RefreshRateAdaptiveMaskCE( return; } - if(!pDM_Odm->bUseRAMask) - { + if(!pDM_Odm->bUseRAMask) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); return; } - - //printk("==> %s \n",__FUNCTION__); - for(i=0; ipODM_StaInfo[i]; if(IS_STA_VALID(pstat) ) { @@ -3907,8 +2999,6 @@ odm_RefreshRateAdaptiveMaskCE( } } - -#endif } void @@ -3916,29 +3006,6 @@ odm_RefreshRateAdaptiveMaskAPADSL( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - struct rtl8192cd_priv *priv = pDM_Odm->priv; - struct stat_info *pstat; - - if (!priv->pmib->dot11StationConfigEntry.autoRate) - return; - - if (list_empty(&priv->asoc_list)) - return; - - list_for_each_entry(pstat, &priv->asoc_list, asoc_list) { - if(ODM_RAStateCheck(pDM_Odm, (s4Byte)pstat->rssi, FALSE, &pstat->rssi_level) ) { - ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pstat->hwaddr); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi, pstat->rssi_level)); - - if (GET_CHIP_VER(priv)==VERSION_8188E) { -#ifdef TXREPORT - add_RATid(priv, pstat); -#endif - } - } - } -#endif } // Return Value: BOOLEAN @@ -4011,30 +3078,6 @@ odm_DynamicTxPowerInit( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - struct adapter *Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - #if DEV_BUS_TYPE==RT_USB_INTERFACE - if(RT_GetInterfaceSelection(Adapter) == INTF_SEL1_USB_High_Power) - { - odm_DynamicTxPowerSavePowerIndex(pDM_Odm); - pMgntInfo->bDynamicTxPowerEnable = TRUE; - } - else - #else - //so 92c pci do not need dynamic tx power? vivi check it later - if(IS_HARDWARE_TYPE_8192D(Adapter)) - pMgntInfo->bDynamicTxPowerEnable = TRUE; - else - pMgntInfo->bDynamicTxPowerEnable = FALSE; - #endif - - - pHalData->LastDTPLvl = TxHighPwrLevel_Normal; - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) struct adapter *Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; @@ -4058,9 +3101,6 @@ odm_DynamicTxPowerInit( pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal; pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - -#endif - } void @@ -4071,18 +3111,11 @@ odm_DynamicTxPowerSavePowerIndex( u1Byte index; u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - struct adapter *Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - for(index = 0; index< 6; index++) - pHalData->PowerIndex_backup[index] = PlatformEFIORead1Byte(Adapter, Power_Index_REG[index]); -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) struct adapter *Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; for(index = 0; index< 6; index++) pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]); -#endif } void @@ -4093,18 +3126,11 @@ odm_DynamicTxPowerRestorePowerIndex( u1Byte index; struct adapter * Adapter = pDM_Odm->Adapter; -#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP)) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - for(index = 0; index< 6; index++) - PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], pHalData->PowerIndex_backup[index]); -#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) struct dm_priv *pdmpriv = &pHalData->dmpriv; for(index = 0; index< 6; index++) rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]); -#endif -#endif } void @@ -4175,8 +3201,6 @@ odm_DynamicTxPowerNIC( if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) return; -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) - if(pDM_Odm->SupportICType == ODM_RTL8192C) { odm_DynamicTxPower_92C(pDM_Odm); @@ -4194,7 +3218,6 @@ odm_DynamicTxPowerNIC( // ??? // This part need to be redefined. } -#endif } void @@ -4203,160 +3226,13 @@ odm_DynamicTxPowerAP( ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - prtl8192cd_priv priv = pDM_Odm->priv; - s4Byte i; - - if(!priv->pshare->rf_ft_var.tx_pwr_ctrl) - return; - -#ifdef HIGH_POWER_EXT_PA - if(pDM_Odm->ExtPA) - tx_power_control(priv); -#endif - - /* - * Check if station is near by to use lower tx power - */ - - if ((priv->up_time % 3) == 0 ) { - for(i=0; ipODM_StaInfo[i]; - if(IS_STA_VALID(pstat) ) { - if ((pstat->hp_level == 0) && (pstat->rssi > TX_POWER_NEAR_FIELD_THRESH_AP+4)) - pstat->hp_level = 1; - else if ((pstat->hp_level == 1) && (pstat->rssi < TX_POWER_NEAR_FIELD_THRESH_AP)) - pstat->hp_level = 0; - } - } - } - -#endif } - void odm_DynamicTxPower_92C( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - struct adapter *Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - s4Byte UndecoratedSmoothedPWDB; - - - // STA not connected and AP not connected - if((!pMgntInfo->bMediaConnect) && - (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) - { - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - - //the LastDTPlvl should reset when disconnect, - //otherwise the tx power level wouldn't change when disconnect and connect again. - // Maddest 20091220. - pHalData->LastDTPLvl=TxHighPwrLevel_Normal; - return; - } - -#if (INTEL_PROXIMITY_SUPPORT == 1) - // Intel set fixed tx power - if(pMgntInfo->IntelProximityModeInfo.PowerOutput > 0) - { - switch(pMgntInfo->IntelProximityModeInfo.PowerOutput){ - case 1: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); - break; - case 2: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_70; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_70\n")); - break; - case 3: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_50; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_50\n")); - break; - case 4: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_35; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_35\n")); - break; - case 5: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_15; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_15\n")); - break; - default: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); - break; - } - } - else -#endif - { - if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || - (pHalData->DMFlag & HAL_DM_HIPWR_DISABLE) || - pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - } - else - { - if(pMgntInfo->bMediaConnect) // Default port - { - if(ACTING_AS_AP(Adapter) || ACTING_AS_IBSS(Adapter)) - { - UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - else - { - UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - } - else // associated entry pwdb - { - UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - - if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && - (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); - } - else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); - } - } - } - if( pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl ) - { - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192C() Channel = %d \n" , pHalData->CurrentChannel)); - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - if( (pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) && - (pHalData->LastDTPLvl == TxHighPwrLevel_Level1 || pHalData->LastDTPLvl == TxHighPwrLevel_Level2)) //TxHighPwrLevel_Normal - odm_DynamicTxPowerRestorePowerIndex(pDM_Odm); - else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) - odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14); - else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) - odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10); - } - pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; - - -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - #if (RTL8192C_SUPPORT==1) struct adapter *Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -4462,174 +3338,13 @@ odm_DynamicTxPower_92C( } pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; #endif -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - } - void odm_DynamicTxPower_92D( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - struct adapter *Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - s4Byte UndecoratedSmoothedPWDB; - - struct adapter *BuddyAdapter = Adapter->BuddyAdapter; - BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(Adapter); - u1Byte HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1; - - - // If dynamic high power is disabled. - if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || - (pHalData->DMFlag & HAL_DM_HIPWR_DISABLE) || - pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - return; - } - - // STA not connected and AP not connected - if((!pMgntInfo->bMediaConnect) && - (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) - { - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - - //the LastDTPlvl should reset when disconnect, - //otherwise the tx power level wouldn't change when disconnect and connect again. - // Maddest 20091220. - pHalData->LastDTPLvl=TxHighPwrLevel_Normal; - return; - } - - if(pMgntInfo->bMediaConnect) // Default port - { - if(ACTING_AS_AP(Adapter) || pMgntInfo->mIbss) - { - UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - else - { - UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - } - else // associated entry pwdb - { - UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - - if(IS_HARDWARE_TYPE_8192D(Adapter) && GET_HAL_DATA(Adapter)->CurrentBandType92D == 1){ - if(UndecoratedSmoothedPWDB >= 0x33) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB <0x33) && - (UndecoratedSmoothedPWDB >= 0x2b) ) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); - } - else if(UndecoratedSmoothedPWDB < 0x2b) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n")); - } - - } - else - - { - if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && - (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); - } - else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); - } - - } - -//sherry delete flag 20110517 - if(bGetValueFromBuddyAdapter) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n")); - if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() change value \n")); - HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl; - pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP; - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0; - Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = FALSE; - } - } - - if( (pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl) ) - { - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel)); - if(Adapter->DualMacSmartConcurrent == TRUE) - { - if(BuddyAdapter == NULL) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n")); - if(!Adapter->bSlaveOfDMSP) - { - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - } - } - else - { - if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n")); - if(Adapter->bSlaveOfDMSP) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() bslave case \n")); - BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = TRUE; - BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl; - } - else - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() master case \n")); - if(!bGetValueFromBuddyAdapter) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n")); - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - } - } - } - else - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n")); - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - } - } - } - else - { - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - } - - } - pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #if (RTL8192D_SUPPORT==1) struct adapter *Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); @@ -4773,8 +3488,6 @@ odm_DynamicTxPower_92D( } pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; #endif -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - } @@ -4836,88 +3549,8 @@ odm_RSSIMonitorCheckMP( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - struct adapter *Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PRT_WLAN_STA pEntry; - u1Byte i; - s4Byte tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff; - - RTPRINT(FDM, DM_PWDB, ("pHalData->UndecoratedSmoothedPWDB = 0x%x( %d)\n", - pHalData->UndecoratedSmoothedPWDB, - pHalData->UndecoratedSmoothedPWDB)); - - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { - if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - { - pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); - } - else - { - pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); - } - - if(pEntry!=NULL) - { - if(pEntry->bAssociated) - { - RTPRINT_ADDR(FDM, DM_PWDB, ("pEntry->MacAddr ="), pEntry->MacAddr); - RTPRINT(FDM, DM_PWDB, ("pEntry->rssi = 0x%x(%d)\n", - pEntry->rssi_stat.UndecoratedSmoothedPWDB, - pEntry->rssi_stat.UndecoratedSmoothedPWDB)); - if(pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) - tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; - if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) - tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; - } - } - else - { - break; - } - } - - if(tmpEntryMaxPWDB != 0) // If associated entry is found - { - pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; - RTPRINT(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n", - tmpEntryMaxPWDB, tmpEntryMaxPWDB)); - } - else - { - pHalData->EntryMaxUndecoratedSmoothedPWDB = 0; - } - if(tmpEntryMinPWDB != 0xff) // If associated entry is found - { - pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; - RTPRINT(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", - tmpEntryMinPWDB, tmpEntryMinPWDB)); - } - else - { - pHalData->EntryMinUndecoratedSmoothedPWDB = 0; - } - - // Indicate Rx signal strength to FW. - if(Adapter->MgntInfo.bUseRAMask) - { - u1Byte H2C_Parameter[3] ={0}; - // DbgPrint("RxSS: %lx =%ld\n", pHalData->UndecoratedSmoothedPWDB, pHalData->UndecoratedSmoothedPWDB); - H2C_Parameter[2] = (u1Byte)(pHalData->UndecoratedSmoothedPWDB & 0xFF); - H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 - - ODM_FillH2CCmd(Adapter, ODM_H2C_RSSI_REPORT, 3, H2C_Parameter); - } - else - { - PlatformEFIOWrite1Byte(Adapter, 0x4fe, (u1Byte)pHalData->UndecoratedSmoothedPWDB); - //DbgPrint("0x4fe write %x %d\n", pHalData->UndecoratedSmoothedPWDB, pHalData->UndecoratedSmoothedPWDB); - } -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) } -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) // //sherry move from DUSC to here 20110517 // @@ -4945,14 +3578,12 @@ IN struct adapter *pAdapter else pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; } -#endif void odm_RSSIMonitorCheckCE( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) struct adapter *Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; @@ -4964,85 +3595,30 @@ odm_RSSIMonitorCheckCE( if(pDM_Odm->bLinked != true) return; - //if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == true) { - #if 1 struct sta_info *psta; for(i=0; ipODM_StaInfo[i])) { + if(IS_MCAST( psta->hwaddr)) //if(psta->mac_id ==1) + continue; - if (IS_STA_VALID(psta = pDM_Odm->pODM_StaInfo[i])) - { - if(IS_MCAST( psta->hwaddr)) //if(psta->mac_id ==1) - continue; + if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) + tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) - tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; + if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) + tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) - tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - - if(psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)) { - #if(RTL8192D_SUPPORT==1) - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) | ((Adapter->stapriv.asoc_sta_count+1) << 8)); - #else - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) ); - #endif - } - } - } - #else - _irqL irqL; - _list *plist, *phead; - struct sta_info *psta; - struct sta_priv *pstapriv = &Adapter->stapriv; - u8 bcast_addr[ETH_ALEN]= {0xff,0xff,0xff,0xff,0xff,0xff}; - - _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); - - for(i=0; i< NUM_STA; i++) - { - phead = &(pstapriv->sta_hash[i]); - plist = get_next(phead); - - while ((rtw_end_of_queue_search(phead, plist)) == false) - { - psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); - - plist = get_next(plist); - - if(_rtw_memcmp(psta->hwaddr, bcast_addr, ETH_ALEN) || - _rtw_memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) - continue; - - if(psta->state & WIFI_ASOC_STATE) - { - - if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) - tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - - if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) - tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - - if(psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)){ - //printk("%s==> mac_id(%d),rssi(%d)\n",__FUNCTION__,psta->mac_id,psta->rssi_stat.UndecoratedSmoothedPWDB); - #if(RTL8192D_SUPPORT==1) - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) | ((Adapter->stapriv.asoc_sta_count+1) << 8)); - #else - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) ); - #endif - } + if(psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)) { + #if(RTL8192D_SUPPORT==1) + PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) | ((Adapter->stapriv.asoc_sta_count+1) << 8)); + #else + PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) ); + #endif } - } - } - _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); - #endif - - //printk("%s==> sta_cnt(%d)\n",__FUNCTION__,sta_cnt); - for(i=0; i< sta_cnt; i++) { if(PWDB_rssi[i] != (0)){ @@ -5088,8 +3664,6 @@ odm_RSSIMonitorCheckCE( FindMinimumRSSI_Dmsp(Adapter); #endif pDM_Odm->RSSI_Min = pdmpriv->MinUndecoratedPWDBForDM; - //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); -#endif//if (DM_ODM_SUPPORT_TYPE == ODM_CE) } void odm_RSSIMonitorCheckAP( @@ -5107,32 +3681,6 @@ ODM_InitAllTimers( { ODM_InitializeTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer, (RT_TIMER_CALL_BACK)odm_SwAntDivChkAntSwitchCallback, NULL, "SwAntennaSwitchTimer"); - -#if (!(DM_ODM_SUPPORT_TYPE == ODM_CE)) -#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) -#if (RTL8188E_SUPPORT == 1) - ODM_InitializeTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, - (RT_TIMER_CALL_BACK)odm_FastAntTrainingCallback, NULL, "FastAntTrainingTimer"); -#endif -#endif -#endif - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PSDTimer, - (RT_TIMER_CALL_BACK)dm_PSDMonitorCallback, NULL, "PSDTimer"); - // - //Path Diversity - //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. - // - ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer, - (RT_TIMER_CALL_BACK)odm_PathDivChkAntSwitchCallback, NULL, "PathDivTimer"); - - ODM_InitializeTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, - (RT_TIMER_CALL_BACK)odm_CCKTXPathDiversityCallback, NULL, "CCKPathDiversityTimer"); - - ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer, - (RT_TIMER_CALL_BACK)odm_PSD_RXHPCallback, NULL, "PSDRXHPTimer"); -#endif } void @@ -5140,32 +3688,7 @@ ODM_CancelAllTimers( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - // - // 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in - // win7 platform. - // - HAL_ADAPTER_STS_CHK(pDM_Odm) -#endif - ODM_CancelTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -#if (RTL8188E_SUPPORT == 1) - ODM_CancelTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); -#endif - ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); - // - //Path Diversity - //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. - // - ODM_CancelTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); - - ODM_CancelTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); - - ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); -#endif } @@ -5179,25 +3702,8 @@ ODM_ReleaseAllTimers( #if (RTL8188E_SUPPORT == 1) ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); #endif - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PSDTimer); - // - //Path Diversity - //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. - // - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); - - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); - - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); -#endif } - - -//#endif //3============================================================ //3 Tx Power Tracking //3============================================================ @@ -5216,19 +3722,6 @@ odm_TXPowerTrackingThermalMeterInit( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - struct adapter * Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - pMgntInfo->bTXPowerTracking = TRUE; - pHalData->TXPowercount = 0; - pHalData->bTXPowerTrackingInit = FALSE; - #if MP_DRIVER != 1 //for mp driver, turn off txpwrtracking as default - pHalData->TxPowerTrackControl = TRUE; - #endif//#if (MP_DRIVER != 1) - ODM_RT_TRACE(pDM_Odm,COMP_POWER_TRACKING, DBG_LOUD, ("pMgntInfo->bTXPowerTracking = %d\n", pMgntInfo->bTXPowerTracking)); -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) { pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true; pDM_Odm->RFCalibrateInfo.TXPowercount = 0; @@ -5239,17 +3732,6 @@ odm_TXPowerTrackingThermalMeterInit( //#endif//#if (MP_DRIVER != 1) MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl); } -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - #ifdef RTL8188E_SUPPORT - { - pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true; - pDM_Odm->RFCalibrateInfo.TXPowercount = 0; - pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = false; - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true; - } - #endif -#endif - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = TRUE; pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = 0; pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = 0; @@ -5315,7 +3797,6 @@ odm_TXPowerTrackingCheckCE( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) struct adapter *Adapter = pDM_Odm->Adapter; #if( (RTL8192C_SUPPORT==1) || (RTL8723A_SUPPORT==1) ) rtl8192c_odm_CheckTXPowerTracking(Adapter); @@ -5353,8 +3834,6 @@ odm_TXPowerTrackingCheckCE( pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; } #endif - -#endif } void @@ -5362,37 +3841,15 @@ odm_TXPowerTrackingCheckMP( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - struct adapter *Adapter = pDM_Odm->Adapter; - - if (ODM_CheckPowerStatus(Adapter) == FALSE) - return; - - if(IS_HARDWARE_TYPE_8723A(Adapter)) - return; - - if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE) - odm_TXPowerTrackingThermalMeterCheck(Adapter); -#endif - } - void odm_TXPowerTrackingCheckAP( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - prtl8192cd_priv priv = pDM_Odm->priv; - - } -#endif - } - - //antenna mapping info // 1: right-side antenna // 2/0: left-side antenna @@ -5401,52 +3858,6 @@ odm_TXPowerTrackingCheckAP( // We select left antenna as default antenna in initial process, modify it as needed // -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -void -odm_TXPowerTrackingThermalMeterCheck( - IN struct adapter * Adapter - ) -{ -#ifndef AP_BUILD_WORKAROUND -#if (HAL_CODE_BASE==RTL8192_C) - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - static u1Byte TM_Trigger = 0; - //u1Byte TxPowerCheckCnt = 5; //10 sec - - if(!pMgntInfo->bTXPowerTracking /*|| (!pHalData->TxPowerTrackControl && pHalData->bAPKdone)*/) - { - return; - } - - if(!TM_Trigger) //at least delay 1 sec - { - if(IS_HARDWARE_TYPE_8192D(Adapter)) - PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_92D, BIT17 | BIT16, 0x03); - else if(IS_HARDWARE_TYPE_8188E(Adapter)) - PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); - else - PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); - RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger 92C Thermal Meter!!\n")); - - TM_Trigger = 1; - return; - } - else - { - RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n")); - odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. - TM_Trigger = 0; - } -#endif -#endif -} - -#endif - - - //3============================================================ //3 SW Antenna Diversity //3============================================================ @@ -5456,11 +3867,7 @@ odm_SwAntDivInit( IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) odm_SwAntDivInit_NIC(pDM_Odm); -#elif(DM_ODM_SUPPORT_TYPE == ODM_AP) - dm_SW_AntennaSwitchInit(pDM_Odm->priv); -#endif } #if (RTL8723A_SUPPORT==1) // Only for 8723A SW ANT DIV INIT--2012--07--17 @@ -5496,7 +3903,6 @@ odm_SwAntDivInit_NIC( pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; // Init SW ANT DIV mechanism for 8723AE/AU/AS// Neil Chen--2012--07--17--- // CE/AP/ADSL no using SW ANT DIV for 8723A Series IC -//#if (DM_ODM_SUPPORT_TYPE==ODM_MP) #if (RTL8723A_SUPPORT==1) if(pDM_Odm->SupportICType == ODM_RTL8723A) { @@ -5609,22 +4015,15 @@ odm_SwAntDivChkAntSwitch( // at the same time. In the stage2/3, we need to prive universal interface and merge all // HW dynamic mechanism. // - switch (pDM_Odm->SupportPlatform) - { - case ODM_MP: - case ODM_CE: - odm_SwAntDivChkAntSwitchNIC(pDM_Odm, Step); - break; - - case ODM_AP: - case ODM_ADSL: -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP |ODM_ADSL)) - if (priv->pshare->rf_ft_var.antSw_enable && (priv->up_time % 4==1)) - dm_SW_AntennaSwitch(priv, SWAW_STEP_PEAK); -#endif - break; + switch (pDM_Odm->SupportPlatform) { + case ODM_MP: + case ODM_CE: + odm_SwAntDivChkAntSwitchNIC(pDM_Odm, Step); + break; + case ODM_AP: + case ODM_ADSL: + break; } - } // @@ -5709,13 +4108,10 @@ odm_SwAntDivChkAntSwitchNIC( ODM_SwAntDivRestAfterLink(pDM_Odm); } -#if (DM_ODM_SUPPORT_TYPE &( ODM_MP| ODM_CE )) - if(pDM_SWAT_Table->try_flag == 0xff) { pDM_SWAT_Table->RSSI_target = 0xff; - #if(DM_ODM_SUPPORT_TYPE & ODM_CE) { u1Byte index = 0; PSTA_INFO_T pEntry = NULL; @@ -5740,66 +4136,6 @@ odm_SwAntDivChkAntSwitchNIC( ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); } } - #elif (DM_ODM_SUPPORT_TYPE & ODM_MP) - { - struct adapter *pAdapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo=&pAdapter->MgntInfo; - - // Select RSSI checking target - if(pMgntInfo->mAssoc && !ACTING_AS_AP(pAdapter)) - { - // Target: Infrastructure mode AP. - //pDM_SWAT_Table->RSSI_target = NULL; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("odm_SwAntDivChkAntSwitch(): RSSI_target is DEF AP!\n")); - } - else - { - u1Byte index = 0; - PSTA_INFO_T pEntry = NULL; - struct adapter * pTargetAdapter = NULL; - - if(pMgntInfo->mIbss ) - { - // Target: AP/IBSS peer. - pTargetAdapter = pAdapter; - } - else - { - pTargetAdapter = GetFirstAPAdapter(pAdapter); - } - - if(pTargetAdapter != NULL) - { - for(index=0; indexbAssociated) - break; - } - - } - - } - - if(pEntry == NULL) - { - ODM_SwAntDivRestAfterLink(pDM_Odm); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); - return; - } - else - { - //pDM_SWAT_Table->RSSI_target = pEntry; - pDM_SWAT_Table->RSSI_target = index; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); - } - }//end if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) - - } - #endif pDM_SWAT_Table->RSSI_cnt_A = 0; pDM_SWAT_Table->RSSI_cnt_B = 0; @@ -5809,19 +4145,11 @@ odm_SwAntDivChkAntSwitchNIC( } else { -#if (DM_ODM_SUPPORT_TYPE &( ODM_MP)) - //struct adapter *Adapter = pDM_Odm->Adapter; - curTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast - pDM_SWAT_Table->lastTxOkCnt; - curRxOkCnt =pAdapter->RxStats.NumRxBytesUnicast - pDM_SWAT_Table->lastRxOkCnt; - pDM_SWAT_Table->lastTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast; - pDM_SWAT_Table->lastRxOkCnt = pAdapter->RxStats.NumRxBytesUnicast; -#else curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - pDM_SWAT_Table->lastTxOkCnt; curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - pDM_SWAT_Table->lastRxOkCnt; pDM_SWAT_Table->lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); pDM_SWAT_Table->lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); -#endif - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("curTxOkCnt = %lld\n",curTxOkCnt)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("curTxOkCnt = %lld\n",curTxOkCnt)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("curRxOkCnt = %lld\n",curRxOkCnt)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("lastTxOkCnt = %lld\n",pDM_SWAT_Table->lastTxOkCnt)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("lastRxOkCnt = %lld\n",pDM_SWAT_Table->lastRxOkCnt)); @@ -6029,16 +4357,11 @@ odm_SwAntDivChkAntSwitchNIC( { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Change TX Antenna!\n ")); //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, nextAntenna); - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - ODM_SetAntenna(pDM_Odm,nextAntenna); - #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) { BOOLEAN bEnqueue; bEnqueue = (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)?FALSE :TRUE; rtw_antenna_select_cmd(pDM_Odm->Adapter, nextAntenna, bEnqueue); } - #endif - } //1 5.Reset Statistics @@ -6096,135 +4419,13 @@ odm_SwAntDivChkAntSwitchNIC( ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 500 ); //ms } } -#endif // #if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) #endif // #if (RTL8192C_SUPPORT==1) } - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -u1Byte -odm_SwAntDivSelectChkChnl( - IN struct adapter *Adapter - ) -{ -#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) - u1Byte index, target_chnl=0; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - u1Byte chnl_peer_cnt[14] = {0}; - - if(Adapter->MgntInfo.tmpNumBssDesc==0) - { - return 0; - } - else - { - // 20100519 Joseph: Select checking channel from current scan list. - // We just choose the channel with most APs to be the test scan channel. - for(index=0; indexMgntInfo.tmpNumBssDesc; index++) - { - // Add by hpfan: prevent access invalid channel number - // TODO: Verify channel number by channel plan - if(Adapter->MgntInfo.tmpbssDesc[index].ChannelNumber == 0 || - Adapter->MgntInfo.tmpbssDesc[index].ChannelNumber > 13) - continue; - - chnl_peer_cnt[Adapter->MgntInfo.tmpbssDesc[index].ChannelNumber-1]++; - } - for(index=0; index<14; index++) - { - if(chnl_peer_cnt[index]>chnl_peer_cnt[target_chnl]) - target_chnl = index; - } - target_chnl+=1; - ODM_RT_TRACE(pDM_Odm,COMP_SWAS, DBG_LOUD, - ("odm_SwAntDivSelectChkChnl(): Channel %d is select as test channel.\n", target_chnl)); - - return target_chnl; - } -#else - return 0; -#endif -} - - -void -odm_SwAntDivConsructChkScanChnl( - IN struct adapter *Adapter, - IN u1Byte ChkChnl - ) -{ - - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - PRT_CHANNEL_LIST pChannelList = GET_RT_CHANNEL_LIST(pMgntInfo); - u1Byte index; - - if(ChkChnl==0) - { - // 20100519 Joseph: Original antenna scanned nothing. - // Test antenna shall scan all channel with half period in this condition. - RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, NULL, NULL); - for(index=0; indexChannelLen; index++) - pChannelList->ChannelInfo[index].ScanPeriod /= 2; - } - else - { - // The using of this CustomizedScanRequest is a trick to rescan the two channels - // under the NORMAL scanning process. It will not affect MGNT_INFO.CustomizedScanRequest. - CUSTOMIZED_SCAN_REQUEST CustomScanReq; - - CustomScanReq.bEnabled = TRUE; - CustomScanReq.Channels[0] = ChkChnl; - CustomScanReq.Channels[1] = pMgntInfo->dot11CurrentChannelNumber; - CustomScanReq.nChannels = 2; - CustomScanReq.ScanType = SCAN_ACTIVE; - CustomScanReq.Duration = DEFAULT_ACTIVE_SCAN_PERIOD; - - RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, &CustomScanReq, NULL); - } - -} -#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - // // 20100514 Luke/Joseph: // Callback function for 500ms antenna test trying. // -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -void -odm_SwAntDivChkAntSwitchCallback( - PRT_TIMER pTimer -) -{ - struct adapter * Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - pSWAT_T pDM_SWAT_Table = &pHalData->DM_OutSrc.DM_SWAT_Table; - - #if DEV_BUS_TYPE==RT_PCI_INTERFACE - #if USE_WORKITEM - ODM_ScheduleWorkItem(&pDM_SWAT_Table->SwAntennaSwitchWorkitem); - #else - odm_SwAntDivChkAntSwitch(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); - #endif -#else - ODM_ScheduleWorkItem(&pDM_SWAT_Table->SwAntennaSwitchWorkitem); - #endif - -} -void -odm_SwAntDivChkAntSwitchWorkitemCallback( - IN void * pContext - ) -{ - - struct adapter * pAdapter = (PADAPTER)pContext; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - odm_SwAntDivChkAntSwitch(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); - -} -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) void odm_SwAntDivChkAntSwitchCallback(void *FunctionContext) { PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; @@ -6233,13 +4434,6 @@ void odm_SwAntDivChkAntSwitchCallback(void *FunctionContext) return; odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_DETERMINE); } -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -void odm_SwAntDivChkAntSwitchCallback(void *FunctionContext) -{ - PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; - odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_DETERMINE); -} -#endif #else //#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) @@ -6255,246 +4449,10 @@ void odm_SwAntDivChkAntSwitch( ) {} void ODM_SwAntDivResetBeforeLink( IN PDM_ODM_T pDM_Odm ){} void ODM_SwAntDivRestAfterLink( IN PDM_ODM_T pDM_Odm ){} -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -u1Byte odm_SwAntDivSelectChkChnl( IN struct adapter *Adapter ){ return 0;} -void -odm_SwAntDivConsructChkScanChnl( - IN struct adapter *Adapter, - IN u1Byte ChkChnl - ){} -#endif -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -void odm_SwAntDivChkAntSwitchCallback( PRT_TIMER pTimer){} -void odm_SwAntDivChkAntSwitchWorkitemCallback( IN void * pContext ){} -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) void odm_SwAntDivChkAntSwitchCallback(void *FunctionContext){} -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -void odm_SwAntDivChkAntSwitchCallback(void *FunctionContext){} -#endif #endif //#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -#if((defined(CONFIG_SW_ANTENNA_DIVERSITY))||(defined(CONFIG_HW_ANTENNA_DIVERSITY))) -BOOLEAN -ODM_SwAntDivCheckBeforeLink8192C( - IN PDM_ODM_T pDM_Odm - ) -{ - -#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) - struct adapter *Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData=NULL; - PMGNT_INFO pMgntInfo = NULL; - //pSWAT_T pDM_SWAT_Table = &Adapter->DM_SWAT_Table; - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; - - s1Byte Score = 0; - PRT_WLAN_BSS pTmpBssDesc; - PRT_WLAN_BSS pTestBssDesc; - - u1Byte target_chnl = 0; - u1Byte index; - -return FALSE; - if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 - { // The ODM structure is not initialized. - return FALSE; - } - // 2012/04/26 MH Prevent no-checked IC to execute antenna diversity. - if(pDM_Odm->SupportICType == ODM_RTL8188E && pDM_Odm->SupportInterface != ODM_ITRF_PCIE) - return FALSE; - pHalData = GET_HAL_DATA(Adapter); - pMgntInfo = &Adapter->MgntInfo; - - // Condition that does not need to use antenna diversity. - if(IS_8723_SERIES(pHalData->VersionID) || - IS_92C_SERIAL(pHalData->VersionID) || - (pHalData->AntDivCfg==0) || - pMgntInfo->AntennaTest || - Adapter->bInHctTest) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C(): No AntDiv Mechanism.\n")); - return FALSE; - } - - if(IS_8723_SERIES(pHalData->VersionID) || IS_92C_SERIAL(pHalData->VersionID) ) - { - if((pDM_SWAT_Table->ANTA_ON == FALSE) ||(pDM_SWAT_Table->ANTB_ON == FALSE)) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C(): No AntDiv Mechanism, Antenna A or B is off\n")); - return FALSE; - } - } - - // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. - PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) - { - PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", - pMgntInfo->RFChangeInProgress, - pHalData->eRFPowerState)); - - pDM_SWAT_Table->SWAS_NoLink_State = 0; - - return FALSE; - } - else - { - PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - } - - //1 Run AntDiv mechanism "Before Link" part. - if(pDM_SWAT_Table->SWAS_NoLink_State == 0) - { - //1 Prepare to do Scan again to check current antenna state. - - // Set check state to next step. - pDM_SWAT_Table->SWAS_NoLink_State = 1; - - // Copy Current Scan list. - Adapter->MgntInfo.tmpNumBssDesc = pMgntInfo->NumBssDesc; - PlatformMoveMemory((void *)Adapter->MgntInfo.tmpbssDesc, (void *)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); - - if(pDM_Odm->SupportICType == ODM_RTL8188E) - { - if(pDM_FatTable->RxIdleAnt == MAIN_ANT) - ODM_UpdateRxIdleAnt_88E(pDM_Odm, AUX_ANT); - else - ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C: Change to %s for testing.\n", ((pDM_FatTable->RxIdleAnt == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"))); - } - if(pDM_Odm->SupportICType != ODM_RTL8188E) - { - // Switch Antenna to another one. - pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C: Change to Ant(%s) for testing.\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B")); - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); - pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); - } - // Go back to scan function again. - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink8192C: Scan one more time\n")); - pMgntInfo->ScanStep=0; - target_chnl = odm_SwAntDivSelectChkChnl(Adapter); - odm_SwAntDivConsructChkScanChnl(Adapter, target_chnl); - HTReleaseChnlOpLock(Adapter); - PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); - - return TRUE; - } - else - { - //1 ScanComple() is called after antenna swiched. - //1 Check scan result and determine which antenna is going - //1 to be used. - - for(index=0; indexMgntInfo.tmpNumBssDesc; index++) - { - pTmpBssDesc = &(Adapter->MgntInfo.tmpbssDesc[index]); - pTestBssDesc = &(pMgntInfo->bssDesc[index]); - - if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink8192C(): ERROR!! This shall not happen.\n")); - continue; - } - - if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink8192C: Compare scan entry: Score++\n")); - RT_PRINT_STR(ODM_COMP_ANT_DIV, ODM_DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - - Score++; - PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); - } - else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink8192C: Compare scan entry: Score--\n")); - RT_PRINT_STR(ODM_COMP_ANT_DIV, ODM_DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - Score--; - } - - } - - if(pDM_Odm->SupportICType == ODM_RTL8188E) - { - if(pMgntInfo->NumBssDesc!=0 && Score<=0) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C(): Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); - } - else - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C(): Remain Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT")); - - if(pDM_FatTable->RxIdleAnt == MAIN_ANT) - ODM_UpdateRxIdleAnt_88E(pDM_Odm, AUX_ANT); - else - ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT); - } - } - - if(pDM_Odm->SupportICType != ODM_RTL8188E) - { - if(pMgntInfo->NumBssDesc!=0 && Score<=0) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C(): Using Ant(%s)\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"Antenna_A":"Antenna_B")); - - pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - } - else - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C(): Remain Ant(%s)\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"Antenna_B":"Antenna_A")); - - pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; - - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); - pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); - PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); - } - } - // Check state reset to default and wait for next time. - pDM_SWAT_Table->SWAS_NoLink_State = 0; - - return FALSE; - } -#else - return FALSE; -#endif - -return FALSE; -} -#else -BOOLEAN -ODM_SwAntDivCheckBeforeLink8192C( - IN PDM_ODM_T pDM_Odm - ) -{ - - return FALSE; - -} -#endif //#if((defined(CONFIG_SW_ANTENNA_DIVERSITY))||(defined(CONFIG_HW_ANTENNA_DIVERSITY))) -#endif //#if(DM_ODM_SUPPORT_TYPE==ODM_MP) - - //3============================================================ //3 SW Antenna Diversity //3============================================================ @@ -6505,10 +4463,6 @@ odm_InitHybridAntDiv_88C_92D( IN PDM_ODM_T pDM_Odm ) { - -#if((DM_ODM_SUPPORT_TYPE==ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) - struct rtl8192cd_priv *priv=pDM_Odm->priv; -#endif SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; u1Byte bTxPathSel=0; //0:Path-A 1:Path-B u1Byte i; @@ -6516,30 +4470,15 @@ odm_InitHybridAntDiv_88C_92D( ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_InitHybridAntDiv==============>\n")); //whether to do antenna diversity or not -#if(DM_ODM_SUPPORT_TYPE==ODM_AP) - if(priv==NULL) return; - if(!priv->pshare->rf_ft_var.antHw_enable) - return; - - #ifdef SW_ANT_SWITCH - priv->pshare->rf_ft_var.antSw_enable =0; - #endif -#endif - if((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8192D)) return; - bTxPathSel=(pDM_Odm->RFType==ODM_1T1R)?FALSE:TRUE; ODM_SetBBReg(pDM_Odm,ODM_REG_BB_PWR_SAV1_11N, BIT23, 0); //No update ANTSEL during GNT_BT=1 ODM_SetBBReg(pDM_Odm,ODM_REG_TX_ANT_CTRL_11N, BIT21, 1); //TX atenna selection from tx_info ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PIN_11N, BIT23, 1); //enable LED[1:0] pin as ANTSEL ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_CTRL_11N, BIT8|BIT9, 0x01); // 0x01: left antenna, 0x02: right antenna - // check HW setting: ANTSEL pin connection - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - ODM_Write2Byte(pDM_Odm,ODM_REG_RF_PIN_11N, (ODM_Read2Byte(pDM_Odm,0x804)&0xf0ff )| BIT(8) ); // b11-b8=0001,update RFPin setting - #endif // only AP support different path selection temperarly if(!bTxPathSel){ //PATH-A @@ -6740,33 +4679,6 @@ ODM_AntselStatistics_88C( } - - - -#if(DM_ODM_SUPPORT_TYPE==ODM_MP) -void -ODM_SetTxAntByTxInfo_88C_92D( - IN PDM_ODM_T pDM_Odm, - IN pu1Byte pDesc, - IN u1Byte macId -) -{ - SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - u1Byte antsel; - - if(!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) - return; - - if(pDM_SWAT_Table->RxIdleAnt == 1) - antsel=(pDM_SWAT_Table->TxAnt[macId] == 1)?0:1; - else - antsel=(pDM_SWAT_Table->TxAnt[macId] == 1)?1:0; - - SET_TX_DESC_ANTSEL_A_92C(pDesc, antsel); - //SET_TX_DESC_ANTSEL_B_92C(pDesc, antsel); - //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("SET_TX_DESC_ANTSEL_A_92C=%d\n", pDM_SWAT_Table->TxAnt[macId])); -} -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) void ODM_SetTxAntByTxInfo_88C_92D( IN PDM_ODM_T pDM_Odm @@ -6774,15 +4686,6 @@ ODM_SetTxAntByTxInfo_88C_92D( { } -#elif(DM_ODM_SUPPORT_TYPE==ODM_AP) -void -ODM_SetTxAntByTxInfo_88C_92D( - IN PDM_ODM_T pDM_Odm -) -{ - -} -#endif void odm_HwAntDiv_92C_92D( @@ -6795,13 +4698,6 @@ odm_HwAntDiv_92C_92D( BOOLEAN bRet=FALSE; PSTA_INFO_T pEntry; -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - struct rtl8192cd_priv *priv=pDM_Odm->priv; - //if test, return - if(priv->pshare->rf_ft_var.CurAntenna & 0x80) - return; -#endif - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv==============>\n")); if(!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) //if don't support antenna diveristy @@ -6810,19 +4706,15 @@ odm_HwAntDiv_92C_92D( return; } - if((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8192D)) - { + if((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8192D)) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: IC Type is not 92C or 92D\n")); return; } -#if (DM_ODM_SUPPORT_TYPE&(ODM_MP|ODM_CE)) - if(!pDM_Odm->bLinked) - { + if(!pDM_Odm->bLinked) { ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: bLinked is FALSE\n")); return; } -#endif for (i=0; ipODM_StaInfo[i]->expire_to) -#endif - { - RSSI = (RSSI_Ant1 < RSSI_Ant2) ? RSSI_Ant1 : RSSI_Ant2; - if((!RSSI) || ( RSSI < RSSI_Min) ) { - pDM_SWAT_Table->TargetSTA = i; - RSSI_Min = RSSI; - } + RSSI = (RSSI_Ant1 < RSSI_Ant2) ? RSSI_Ant1 : RSSI_Ant2; + if((!RSSI) || ( RSSI < RSSI_Min) ) { + pDM_SWAT_Table->TargetSTA = i; + RSSI_Min = RSSI; } - } + } ///STA: found out default antenna bRet=odm_StaDefAntSel(pDM_Odm, pDM_SWAT_Table->OFDM_Ant1_Cnt[i], @@ -6872,35 +4759,7 @@ odm_HwAntDiv_92C_92D( RxIdleAnt = pDM_SWAT_Table->TxAnt[pDM_SWAT_Table->TargetSTA]; odm_SetRxIdleAnt(pDM_Odm, RxIdleAnt, FALSE); -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) -#ifdef TX_SHORTCUT - if (!priv->pmib->dot11OperationEntry.disable_txsc) { - plist = phead->next; - while(plist != phead) { - pstat = list_entry(plist, struct stat_info, asoc_list); - if(pstat->expire_to) { - for (i=0; itx_sc_ent[i].hwdesc1); - pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); - if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) - pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); - pdesc= &(pstat->tx_sc_ent[i].hwdesc2); - pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); - if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) - pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); - } - } - - if (plist == plist->next) - break; - plist = plist->next; - }; - } -#endif -#endif - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("<==============odm_HwAntDiv\n")); - } void @@ -6929,110 +4788,11 @@ odm_HwAntDiv( } -#if(DM_ODM_SUPPORT_TYPE==ODM_AP) -u1Byte -ODM_Diversity_AntennaSelect( - IN PDM_ODM_T pDM_Odm, - IN u1Byte *data -) -{ - struct rtl8192cd_priv *priv=pDM_Odm->priv; - - int ant = _atoi(data, 16); - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("ODM_Diversity_AntennaSelect==============>\n")); - - #ifdef PCIE_POWER_SAVING - PCIeWakeUp(priv, POWER_DOWN_T0); - #endif - - if (ant==Antenna_B || ant==Antenna_A) - { - if ( !priv->pshare->rf_ft_var.antSw_select) { - ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) | BIT(8)| BIT(9) ); // ANTSEL A as SW control - ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) & (~ BIT(7))); // rx OFDM SW control - PHY_SetBBReg(priv, 0x860, 0x300, ant); - } else { - ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) | BIT(24)| BIT(25) ); // ANTSEL B as HW control - PHY_SetBBReg(priv, 0x864, 0x300, ant); - ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) & (~ BIT(7))); // rx OFDM SW control - } - - ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) & (~ BIT(7))); // rx CCK SW control - ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) & (~ BIT(21))); // select ant by tx desc - ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a); - - priv->pshare->rf_ft_var.antHw_enable = 0; - priv->pshare->rf_ft_var.CurAntenna = (ant%2); - - #ifdef SW_ANT_SWITCH - priv->pshare->rf_ft_var.antSw_enable = 0; - priv->pshare->DM_SWAT_Table.CurAntenna = ant; - priv->pshare->RSSI_test =0; - #endif - } - else if(ant==0){ - - if ( !priv->pshare->rf_ft_var.antSw_select) { - ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) & ~(BIT(8)| BIT(9)) ); - ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) | BIT(7)); // OFDM HW control - } else { - ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) & ~(BIT(24)| BIT(25)) ); - ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) | BIT(7)); // OFDM HW control - } - - ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) | BIT(7)); // CCK HW control - ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) | BIT(21) ); // by tx desc - priv->pshare->rf_ft_var.CurAntenna = 0; - ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a); - priv->pshare->rf_ft_var.antHw_enable = 1; -#ifdef SW_ANT_SWITCH - priv->pshare->rf_ft_var.antSw_enable = 0; - priv->pshare->RSSI_test =0; -#endif - } -#ifdef SW_ANT_SWITCH - else if(ant==3) { - if(!priv->pshare->rf_ft_var.antSw_enable) { - - dm_SW_AntennaSwitchInit(priv); - ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a); - priv->pshare->lastTxOkCnt = priv->net_stats.tx_bytes; - priv->pshare->lastRxOkCnt = priv->net_stats.rx_bytes; - } - if ( !priv->pshare->rf_ft_var.antSw_select) - ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) & (~ BIT(7))); // rx OFDM SW control - else - ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) & (~ BIT(7))); // rx OFDM SW control - - ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) & (~ BIT(7))); // rx CCK SW control - ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) & (~ BIT(21))); // select ant by tx desc - priv->pshare->rf_ft_var.antHw_enable = 0; - priv->pshare->rf_ft_var.antSw_enable = 1; - - } -#endif - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============ODM_Diversity_AntennaSelect\n")); - - return 1; -} -#endif - #else //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) void odm_InitHybridAntDiv( IN PDM_ODM_T pDM_Odm ){} void odm_HwAntDiv( IN PDM_ODM_T pDM_Odm){} -#if(DM_ODM_SUPPORT_TYPE==ODM_MP) -void ODM_SetTxAntByTxInfo_88C_92D( - IN PDM_ODM_T pDM_Odm, - IN pu1Byte pDesc, - IN u1Byte macId -){} -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) void ODM_SetTxAntByTxInfo_88C_92D( IN PDM_ODM_T pDM_Odm){ } -#elif(DM_ODM_SUPPORT_TYPE==ODM_AP) -void ODM_SetTxAntByTxInfo_88C_92D( IN PDM_ODM_T pDM_Odm){ } -#endif #endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) @@ -7045,38 +4805,14 @@ void ODM_EdcaTurboInit( IN PDM_ODM_T pDM_Odm) { - -#if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) - odm_EdcaParaInit(pDM_Odm); -#elif (DM_ODM_SUPPORT_TYPE==ODM_MP) - struct adapter *Adapter = NULL; - HAL_DATA_TYPE *pHalData = NULL; - - if(pDM_Odm->Adapter==NULL) { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EdcaTurboInit fail!!!\n")); - return; - } - - Adapter=pDM_Odm->Adapter; - pHalData=GET_HAL_DATA(Adapter); - - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; - pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; - pHalData->bIsAnyNonBEPkts = FALSE; - -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) struct adapter *Adapter = pDM_Odm->Adapter; pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; Adapter->recvpriv.bIsAnyNonBEPkts =FALSE; - -#endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VO PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VO_PARAM))); ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VI PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VI_PARAM))); ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BK PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BK_PARAM))); - - } // ODM_InitEdcaTurbo void @@ -7101,44 +4837,26 @@ odm_EdcaTurboCheck( if(!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO )) return; - switch (pDM_Odm->SupportPlatform) - { - case ODM_MP: - -#if(DM_ODM_SUPPORT_TYPE==ODM_MP) - odm_EdcaTurboCheckMP(pDM_Odm); -#endif - break; - - case ODM_CE: -#if(DM_ODM_SUPPORT_TYPE==ODM_CE) - odm_EdcaTurboCheckCE(pDM_Odm); -#endif - break; - - case ODM_AP: - case ODM_ADSL: - -#if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) - odm_IotEngine(pDM_Odm); -#endif - break; + switch (pDM_Odm->SupportPlatform) { + case ODM_MP: + break; + case ODM_CE: + odm_EdcaTurboCheckCE(pDM_Odm); + break; + case ODM_AP: + case ODM_ADSL: + break; } ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("<========================odm_EdcaTurboCheck\n")); } // odm_CheckEdcaTurbo -#if(DM_ODM_SUPPORT_TYPE==ODM_CE) - - void odm_EdcaTurboCheckCE( IN PDM_ODM_T pDM_Odm ) { -#if(DM_ODM_SUPPORT_TYPE==ODM_CE) - struct adapter * Adapter = pDM_Odm->Adapter; u32 trafficIndex; @@ -7238,1250 +4956,10 @@ dm_CheckEdcaTurbo_EXIT: precvpriv->bIsAnyNonBEPkts = false; pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; precvpriv->last_rx_bytes = precvpriv->rx_bytes; -#endif } - -#elif(DM_ODM_SUPPORT_TYPE==ODM_MP) -void -odm_EdcaTurboCheckMP( - IN PDM_ODM_T pDM_Odm - ) -{ - - - struct adapter * Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - -#if(DM_ODM_SUPPORT_TYPE==ODM_MP) - struct adapter * pDefaultAdapter = GetDefaultAdapter(Adapter); - struct adapter * pExtAdapter = GetFirstExtAdapter(Adapter);//NULL; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos; - //[Win7 Count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's Adapter is always Default. 2009.08.20, by Bohn - u8Byte Ext_curTxOkCnt = 0; - u8Byte Ext_curRxOkCnt = 0; - static u8Byte Ext_lastTxOkCnt = 0; - static u8Byte Ext_lastRxOkCnt = 0; - //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. - u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; - -#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); - struct recv_priv *precvpriv = &(Adapter->recvpriv); - struct registry_priv *pregpriv = &Adapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - #ifdef CONFIG_BT_COEXIST - struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); - #endif - u1Byte bbtchange =FALSE; -#endif - // Keep past Tx/Rx packet count for RT-to-RT EDCA turbo. - u8Byte curTxOkCnt = 0; - u8Byte curRxOkCnt = 0; - u8Byte lastTxOkCnt = 0; - u8Byte lastRxOkCnt = 0; - u4Byte EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer]; - u4Byte EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer]; - u4Byte EDCA_BE = 0x5ea42b; - u4Byte IOTPeer=0; - BOOLEAN *pbIsCurRDLState=NULL; - BOOLEAN bLastIsCurRDLState=FALSE; - BOOLEAN bBiasOnRx=FALSE; - BOOLEAN bEdcaTurboOn=FALSE; - - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheckMP========================>")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); - -////=============================== -////list paramter for different platform -////=============================== - bLastIsCurRDLState=pDM_Odm->DM_EDCA_Table.bIsCurRDLState; - pbIsCurRDLState=&(pDM_Odm->DM_EDCA_Table.bIsCurRDLState); -#if (DM_ODM_SUPPORT_TYPE==ODM_MP) - // Caculate TX/RX TP: - curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt; - curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt; - if(pExtAdapter == NULL) - pExtAdapter = pDefaultAdapter; - - Ext_curTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->Ext_lastTxOkCnt; - Ext_curRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->Ext_lastRxOkCnt; - GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); - //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. - if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) - { - curTxOkCnt = Ext_curTxOkCnt ; - curRxOkCnt = Ext_curRxOkCnt ; - } - // - IOTPeer=pMgntInfo->IOTPeer; - bBiasOnRx=(pMgntInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)?TRUE:FALSE; - bEdcaTurboOn=((!pHalData->bIsAnyNonBEPkts) && (!pMgntInfo->bDisableFrameBursting))?TRUE:FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bIsAnyNonBEPkts : 0x%lx bDisableFrameBursting : 0x%lx \n",pHalData->bIsAnyNonBEPkts,pMgntInfo->bDisableFrameBursting)); - -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - // Caculate TX/RX TP: - curTxOkCnt = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; - curRxOkCnt = precvpriv->rx_bytes - precvpriv->last_rx_bytes; - #ifdef CONFIG_BT_COEXIST - if(pbtpriv->BT_Coexist) - { - if( (pbtpriv->BT_EDCA[UP_LINK]!=0) || (pbtpriv->BT_EDCA[DOWN_LINK]!=0)) - bbtchange = TRUE; - } - #endif - IOTPeer=pmlmeinfo->assoc_AP_vendor; - bBiasOnRx=((IOTPeer == HT_IOT_PEER_RALINK)||(IOTPeer == HT_IOT_PEER_ATHEROS))?TRUE:FALSE; - bEdcaTurboOn=(bbtchange || (!precvpriv->bIsAnyNonBEPkts))?TRUE:FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bbtchange : 0x%lx bIsAnyNonBEPkts : 0x%lx \n",bbtchange,precvpriv->bIsAnyNonBEPkts)); -#endif - - -////=============================== -////check if edca turbo is disabled -////=============================== - if(odm_IsEdcaTurboDisable(pDM_Odm)) - goto dm_CheckEdcaTurbo_EXIT; - - -////=============================== -////remove iot case out -////=============================== - ODM_EdcaParaSelByIot(pDM_Odm, &EDCA_BE_UL, &EDCA_BE_DL); - - -////=============================== -////Check if the status needs to be changed. -////=============================== - if(bEdcaTurboOn) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bEdcaTurboOn : 0x%x bBiasOnRx : 0x%x\n",bEdcaTurboOn,bBiasOnRx)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curTxOkCnt : 0x%lx \n",curTxOkCnt)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curRxOkCnt : 0x%lx \n",curRxOkCnt)); - if(bBiasOnRx) - odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, TRUE, pbIsCurRDLState); - else - odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, FALSE, pbIsCurRDLState); - -//modify by Guo.Mingzhi 2011-12-29 - EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL; - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA Turbo on: EDCA_BE:0x%lx\n",EDCA_BE)); - -// if(((*pbIsCurRDLState)!=bLastIsCurRDLState)||(!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) -// { -// EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL; -// ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); - // } - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = TRUE; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA_BE_DL : 0x%lx EDCA_BE_UL : 0x%lx EDCA_BE : 0x%lx \n",EDCA_BE_DL,EDCA_BE_UL,EDCA_BE)); - - } - else - { - // Turn Off EDCA turbo here. - // Restore original EDCA according to the declaration of AP. - if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) - { -#if (DM_ODM_SUPPORT_TYPE==ODM_MP) - Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(pStaQos->WMMParamEle, AC0_BE) ); -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, pHalData->AcParam_BE); -#endif - - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Restore EDCA BE: 0x%lx \n",pDM_Odm->WMMEDCA_BE)); - - } - } - -////=============================== -////Set variables for next time. -////=============================== -dm_CheckEdcaTurbo_EXIT: -#if (DM_ODM_SUPPORT_TYPE==ODM_MP) - pHalData->bIsAnyNonBEPkts = FALSE; - pMgntInfo->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; - pMgntInfo->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; - pMgntInfo->Ext_lastTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast; - pMgntInfo->Ext_lastRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast; -#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) - precvpriv->bIsAnyNonBEPkts = FALSE; - pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; - precvpriv->last_rx_bytes = precvpriv->rx_bytes; -#endif - -} - - -//check if edca turbo is disabled -BOOLEAN -odm_IsEdcaTurboDisable( - IN PDM_ODM_T pDM_Odm -) -{ - struct adapter * Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - -#if(DM_ODM_SUPPORT_TYPE==ODM_MP) - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - u4Byte IOTPeer=pMgntInfo->IOTPeer; -#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) - struct registry_priv *pregpriv = &Adapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - u4Byte IOTPeer=pmlmeinfo->assoc_AP_vendor; - u1Byte WirelessMode=0xFF; //invalid value - - if(pDM_Odm->pWirelessMode!=NULL) - WirelessMode=*(pDM_Odm->pWirelessMode); - -#endif - -#if(BT_30_SUPPORT == 1) - if(pDM_Odm->bBtDisableEdcaTurbo) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable for BT!!\n")); - return TRUE; - } -#endif - - if((!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))|| - (pDM_Odm->bWIFITest)|| - (IOTPeer>= HT_IOT_PEER_MAX)) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable\n")); - return TRUE; - } - - -#if (DM_ODM_SUPPORT_TYPE ==ODM_MP) - // 1. We do not turn on EDCA turbo mode for some AP that has IOT issue - // 2. User may disable EDCA Turbo mode with OID settings. - if((pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO) ||pHalData->bForcedDisableTurboEDCA){ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("IOTAction:EdcaTurboDisable\n")); - return TRUE; - } - -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - //suggested by Jr.Luke: open TXOP for B/G/BG/A mode 2012-0215 - if((WirelessMode==ODM_WM_B)||(WirelessMode==(ODM_WM_B|ODM_WM_G)||(WirelessMode==ODM_WM_G)||(WirelessMode=ODM_WM_A)) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, ODM_Read4Byte(pDM_Odm, ODM_EDCA_BE_PARAM)|0x5E0000); - - if(pDM_Odm->SupportICType==ODM_RTL8192D) { - if ((pregpriv->wifi_spec == 1) || (pmlmeext->cur_wireless_mode == WIRELESS_11B)) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("92D:EdcaTurboDisable\n")); - return TRUE; - } - } - else - { - if((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0)){ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("Others:EdcaTurboDisable\n")); - return TRUE; - } - } -#ifdef CONFIG_BT_COEXIST - if (BT_DisableEDCATurbo(Adapter)) - { - goto dm_CheckEdcaTurbo_EXIT; - } -#endif - -#endif - - return FALSE; - - -} - -//add iot case here: for MP/CE -void -ODM_EdcaParaSelByIot( - IN PDM_ODM_T pDM_Odm, - OUT u4Byte *EDCA_BE_UL, - OUT u4Byte *EDCA_BE_DL - ) -{ - - struct adapter * Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u4Byte IOTPeer=0; - u4Byte ICType=pDM_Odm->SupportICType; - u1Byte WirelessMode=0xFF; //invalid value - u4Byte RFType=pDM_Odm->RFType; - -#if(DM_ODM_SUPPORT_TYPE==ODM_MP) - struct adapter * pDefaultAdapter = GetDefaultAdapter(Adapter); - struct adapter * pExtAdapter = GetFirstExtAdapter(Adapter);//NULL; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; - -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - #ifdef CONFIG_BT_COEXIST - struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); - #endif - u1Byte bbtchange =FALSE; -#endif - - if(pDM_Odm->pWirelessMode!=NULL) - WirelessMode=*(pDM_Odm->pWirelessMode); - -/////////////////////////////////////////////////////////// -////list paramter for different platform -#if (DM_ODM_SUPPORT_TYPE==ODM_MP) - IOTPeer=pMgntInfo->IOTPeer; - GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); - -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - IOTPeer=pmlmeinfo->assoc_AP_vendor; - #ifdef CONFIG_BT_COEXIST - if(pbtpriv->BT_Coexist) - { - if( (pbtpriv->BT_EDCA[UP_LINK]!=0) || (pbtpriv->BT_EDCA[DOWN_LINK]!=0)) - bbtchange = TRUE; - } - #endif - -#endif - - if(ICType==ODM_RTL8192D) - { - // Single PHY - if(pDM_Odm->RFType==ODM_2T2R) - { - (*EDCA_BE_UL) = 0x60a42b; //0x5ea42b; - (*EDCA_BE_DL) = 0x60a42b; //0x5ea42b; - - } - else - { - (*EDCA_BE_UL) = 0x6ea42b; - (*EDCA_BE_DL) = 0x6ea42b; - } - - } -////============================ -/// IOT case for MP -////============================ -#if (DM_ODM_SUPPORT_TYPE==ODM_MP) - else - { - - if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE){ - if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) { - (*EDCA_BE_UL) = 0x60a42b; - (*EDCA_BE_DL) = 0x60a42b; - } - else - { - (*EDCA_BE_UL) = 0x6ea42b; - (*EDCA_BE_DL) = 0x6ea42b; - } - } - } - - if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) - { - (*EDCA_BE_UL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[ExtAdapter->MgntInfo.IOTPeer]; - (*EDCA_BE_DL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[ExtAdapter->MgntInfo.IOTPeer]; - } - - #if (INTEL_PROXIMITY_SUPPORT == 1) - if(pMgntInfo->IntelClassModeInfo.bEnableCA == TRUE) - { - (*EDCA_BE_UL) = (*EDCA_BE_DL) = 0xa44f; - } - else - #endif - { - if((!pMgntInfo->bDisableFrameBursting) && - (pMgntInfo->IOTAction & (HT_IOT_ACT_FORCED_ENABLE_BE_TXOP|HT_IOT_ACT_AMSDU_ENABLE))) - {// To check whether we shall force turn on TXOP configuration. - if(!((*EDCA_BE_UL) & 0xffff0000)) - (*EDCA_BE_UL) |= 0x005e0000; // Force TxOP limit to 0x005e for UL. - if(!((*EDCA_BE_DL) & 0xffff0000)) - (*EDCA_BE_DL) |= 0x005e0000; // Force TxOP limit to 0x005e for DL. - } - - //92D txop can't be set to 0x3e for cisco1250 - if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) - { - (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; - (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; - } - //merge from 92s_92c_merge temp brunch v2445 20120215 - else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B))) - { - (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer]; - } - else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A))) - { - (*EDCA_BE_DL) = 0xa630; - } - - else if(IOTPeer == HT_IOT_PEER_MARVELL) - { - (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; - (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; - } - else if(IOTPeer == HT_IOT_PEER_ATHEROS) - { - // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. - (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; - } - } -////============================ -/// IOT case for CE -////============================ -#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) - - if(RFType==ODM_RTL8192D) - { - if((IOTPeer == HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) - { - (*EDCA_BE_UL) = EDCAParam[IOTPeer][UP_LINK]; - (*EDCA_BE_DL)=EDCAParam[IOTPeer][DOWN_LINK]; - } - else if((IOTPeer == HT_IOT_PEER_AIRGO) && - ((WirelessMode==ODM_WM_B)||(WirelessMode==(ODM_WM_B|ODM_WM_G)))) - (*EDCA_BE_DL)=0x00a630; - - else if((IOTPeer== HT_IOT_PEER_ATHEROS) && - (WirelessMode&ODM_WM_N5G) && - (Adapter->securitypriv.dot11PrivacyAlgrthm == _AES_ )) - (*EDCA_BE_DL)=0xa42b; - - } - //92C IOT case: - else - { - #ifdef CONFIG_BT_COEXIST - if(bbtchange) - { - (*EDCA_BE_UL) = pbtpriv->BT_EDCA[UP_LINK]; - (*EDCA_BE_DL) = pbtpriv->BT_EDCA[DOWN_LINK]; - } - else - #endif - { - if((IOTPeer == HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) - { - (*EDCA_BE_UL) = EDCAParam[IOTPeer][UP_LINK]; - (*EDCA_BE_DL)=EDCAParam[IOTPeer][DOWN_LINK]; - } - else - { - (*EDCA_BE_UL)=EDCAParam[HT_IOT_PEER_UNKNOWN][UP_LINK]; - (*EDCA_BE_DL)=EDCAParam[HT_IOT_PEER_UNKNOWN][DOWN_LINK]; - } - } - if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE){ - if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) - { - (*EDCA_BE_UL) = 0x60a42b; - (*EDCA_BE_DL) = 0x60a42b; - } - else - { - (*EDCA_BE_UL) = 0x6ea42b; - (*EDCA_BE_DL) = 0x6ea42b; - } - } - - } -#endif - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Special: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx",(*EDCA_BE_UL),(*EDCA_BE_DL))); - -} - - -void -odm_EdcaChooseTrafficIdx( - IN PDM_ODM_T pDM_Odm, - IN u8Byte cur_tx_bytes, - IN u8Byte cur_rx_bytes, - IN BOOLEAN bBiasOnRx, - OUT BOOLEAN *pbIsCurRDLState - ) -{ - - - if(bBiasOnRx) - { - - if(cur_tx_bytes>(cur_rx_bytes*4)) - { - *pbIsCurRDLState=FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Uplink Traffic\n ")); - - } - else - { - *pbIsCurRDLState=TRUE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); - - } - } - else - { - if(cur_rx_bytes>(cur_tx_bytes*4)) - { - *pbIsCurRDLState=TRUE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Downlink Traffic\n")); - - } - else - { - *pbIsCurRDLState=FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); - } - } - - return ; -} - -#endif - -#if((DM_ODM_SUPPORT_TYPE==ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) - -void odm_EdcaParaInit( - IN PDM_ODM_T pDM_Odm - ) -{ - prtl8192cd_priv priv = pDM_Odm->priv; - int mode=priv->pmib->dot11BssType.net_work_type; - - static unsigned int slot_time, VO_TXOP, VI_TXOP, sifs_time; - struct ParaRecord EDCA[4]; - - memset(EDCA, 0, 4*sizeof(struct ParaRecord)); - - sifs_time = 10; - slot_time = 20; - - if (mode & (ODM_WM_N24G|ODM_WM_N5G)) - sifs_time = 16; - - if (mode & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G|ODM_WM_A)) - slot_time = 9; - - -#if((defined(RTL_MANUAL_EDCA))&&(DM_ODM_SUPPORT_TYPE==ODM_AP)) - if( priv->pmib->dot11QosEntry.ManualEDCA ) { - if( OPMODE & WIFI_AP_STATE ) - memcpy(EDCA, priv->pmib->dot11QosEntry.AP_manualEDCA, 4*sizeof(struct ParaRecord)); - else - memcpy(EDCA, priv->pmib->dot11QosEntry.STA_manualEDCA, 4*sizeof(struct ParaRecord)); - - #ifdef WIFI_WMM - if (QOS_ENABLE) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); - else - #endif - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); - - }else - #endif //RTL_MANUAL_EDCA - { - - if(OPMODE & WIFI_AP_STATE) - { - memcpy(EDCA, rtl_ap_EDCA, 2*sizeof(struct ParaRecord)); - - if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G)) - memcpy(&EDCA[VI], &rtl_ap_EDCA[VI_AG], 2*sizeof(struct ParaRecord)); - else - memcpy(&EDCA[VI], &rtl_ap_EDCA[VI], 2*sizeof(struct ParaRecord)); - } - else - { - memcpy(EDCA, rtl_sta_EDCA, 2*sizeof(struct ParaRecord)); - - if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G)) - memcpy(&EDCA[VI], &rtl_sta_EDCA[VI_AG], 2*sizeof(struct ParaRecord)); - else - memcpy(&EDCA[VI], &rtl_sta_EDCA[VI], 2*sizeof(struct ParaRecord)); - } - - #ifdef WIFI_WMM - if (QOS_ENABLE) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); - else - #endif - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); -#elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + 2* slot_time)); -#endif - - - } - - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VO_PARAM, (EDCA[VO].TXOPlimit<< 16) | (EDCA[VO].ECWmax<< 12) | (EDCA[VO].ECWmin<< 8) | (sifs_time + EDCA[VO].AIFSN* slot_time)); - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[BE].AIFSN* slot_time)); - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (EDCA[BK].TXOPlimit<< 16) | (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[BK].AIFSN* slot_time)); -// ODM_Write1Byte(pDM_Odm,ACMHWCTRL, 0x00); - - priv->pshare->iot_mode_enable = 0; -#if(DM_ODM_SUPPORT_TYPE==ODM_AP) - if (priv->pshare->rf_ft_var.wifi_beq_iot) - priv->pshare->iot_mode_VI_exist = 0; - - #ifdef WMM_VIBE_PRI - priv->pshare->iot_mode_BE_exist = 0; - #endif - - #ifdef LOW_TP_TXOP - priv->pshare->BE_cwmax_enhance = 0; - #endif - -#elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL) - priv->pshare->iot_mode_BE_exist = 0; -#endif - priv->pshare->iot_mode_VO_exist = 0; -} - -BOOLEAN -ODM_ChooseIotMainSTA( - IN PDM_ODM_T pDM_Odm, - IN PSTA_INFO_T pstat - ) -{ - prtl8192cd_priv priv = pDM_Odm->priv; - BOOLEAN bhighTP_found_pstat=FALSE; - - if ((GET_ROOT(priv)->up_time % 2) == 0) { - unsigned int tx_2s_avg = 0; - unsigned int rx_2s_avg = 0; - int i=0, aggReady=0; - unsigned long total_sum = (priv->pshare->current_tx_bytes+priv->pshare->current_rx_bytes); - - pstat->current_tx_bytes += pstat->tx_byte_cnt; - pstat->current_rx_bytes += pstat->rx_byte_cnt; - - if (total_sum != 0) { - if (total_sum <= 100) { - tx_2s_avg = (unsigned int)((pstat->current_tx_bytes*100) / total_sum); - rx_2s_avg = (unsigned int)((pstat->current_rx_bytes*100) / total_sum); - } else { - tx_2s_avg = (unsigned int)(pstat->current_tx_bytes / (total_sum / 100)); - rx_2s_avg = (unsigned int)(pstat->current_rx_bytes / (total_sum / 100)); - } - - } - -#if(DM_ODM_SUPPORT_TYPE==ODM_ADSL) - if (pstat->ht_cap_len) { - if ((tx_2s_avg + rx_2s_avg) >=25 /*50*/) { - - priv->pshare->highTP_found_pstat = pstat; - bhighTP_found_pstat=TRUE; - } - } -#elif(DM_ODM_SUPPORT_TYPE==ODM_AP) - for(i=0; i<8; i++) - aggReady += (pstat->ADDBA_ready[i]); - if (pstat->ht_cap_len && aggReady) - { - if ((tx_2s_avg + rx_2s_avg >= 25)) { - priv->pshare->highTP_found_pstat = pstat; - } - - #ifdef CLIENT_MODE - if (OPMODE & WIFI_STATION_STATE) { -#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) - if ((pstat->IOTPeer==HT_IOT_PEER_RALINK) && ((tx_2s_avg + rx_2s_avg) >= 45)) -#else - if(pstat->is_ralink_sta && ((tx_2s_avg + rx_2s_avg) >= 45)) -#endif - priv->pshare->highTP_found_pstat = pstat; - } - #endif - } -#endif - } else { - pstat->current_tx_bytes = pstat->tx_byte_cnt; - pstat->current_rx_bytes = pstat->rx_byte_cnt; - } - - return bhighTP_found_pstat; -} - - -#ifdef WIFI_WMM -void -ODM_IotEdcaSwitch( - IN PDM_ODM_T pDM_Odm, - IN unsigned char enable - ) -{ - prtl8192cd_priv priv = pDM_Odm->priv; - int mode=priv->pmib->dot11BssType.net_work_type; - unsigned int slot_time = 20, sifs_time = 10, BE_TXOP = 47, VI_TXOP = 94; - unsigned int vi_cw_max = 4, vi_cw_min = 3, vi_aifs; - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - if (!(!priv->pmib->dot11OperationEntry.wifi_specific || - ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - #ifdef CLIENT_MODE - || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - #endif - )) - return; -#endif - - if ((mode & (ODM_WM_N24G|ODM_WM_N5G)) && (priv->pshare->ht_sta_num - #ifdef WDS - || ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum) - #endif - )) - sifs_time = 16; - - if (mode & (ODM_WM_N24G|ODM_WM_N5G|ODM_WM_G|ODM_WM_A)) { - slot_time = 9; - } - else - { - BE_TXOP = 94; - VI_TXOP = 188; - } - -#if (DM_ODM_SUPPORT_TYPE==ODM_ADSL) - if (priv->pshare->iot_mode_VO_exist) { - // to separate AC_VI and AC_BE to avoid using the same EDCA settings - if (priv->pshare->iot_mode_BE_exist) { - vi_cw_max = 5; - vi_cw_min = 3; - } else { - vi_cw_max = 6; - vi_cw_min = 4; - } - } - vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); - - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)| (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs); - - -#elif (DM_ODM_SUPPORT_TYPE==ODM_AP) - if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific) { - if (priv->pshare->iot_mode_VO_exist) { - #ifdef WMM_VIBE_PRI - if (priv->pshare->iot_mode_BE_exist) - { - vi_cw_max = 5; - vi_cw_min = 3; - vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); - } - else - #endif - { - vi_cw_max = 6; - vi_cw_min = 4; - vi_aifs = 0x2b; - } - } - else { - vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); - } - - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16) - | (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs); - } -#endif - - - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - if (priv->pshare->rf_ft_var.wifi_beq_iot && priv->pshare->iot_mode_VI_exist) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (10 << 12) | (4 << 8) | 0x4f); - else if(!enable) -#elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) - if(!enable) //if iot is disable ,maintain original BEQ PARAM -#endif - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (((OPMODE & WIFI_AP_STATE)?6:10) << 12) | (4 << 8) - | (sifs_time + 3 * slot_time)); - else - { - int txop_enlarge; - int txop; - unsigned int cw_max; - unsigned int txop_close; - - #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP)) - cw_max = ((priv->pshare->BE_cwmax_enhance) ? 10 : 6); - txop_close = ((priv->pshare->rf_ft_var.low_tp_txop && priv->pshare->rf_ft_var.low_tp_txop_close) ? 1 : 0); - - if(priv->pshare->txop_enlarge == 0xe) //if intel case - txop = (txop_close ? 0 : (BE_TXOP*2)); - else //if other case - txop = (txop_close ? 0: (BE_TXOP*priv->pshare->txop_enlarge)); - #else - cw_max=6; - if((priv->pshare->txop_enlarge==0xe)||(priv->pshare->txop_enlarge==0xd)) - txop=BE_TXOP*2; - else - txop=BE_TXOP*priv->pshare->txop_enlarge; - - #endif - - if (priv->pshare->ht_sta_num - #ifdef WDS - || ((OPMODE & WIFI_AP_STATE) && (mode & (ODM_WM_N24G|ODM_WM_N5G)) && - priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum) - #endif - ) - { - - if (priv->pshare->txop_enlarge == 0xe) { - // is intel client, use a different edca value - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop<< 16) | (cw_max<< 12) | (4 << 8) | 0x1f); - priv->pshare->txop_enlarge = 2; - } -#if(DM_ODM_SUPPORT_TYPE==ODM_AP) - #ifndef LOW_TP_TXOP - else if (priv->pshare->txop_enlarge == 0xd) { - // is intel ralink, use a different edca value - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (4 << 12) | (3 << 8) | 0x19); - priv->pshare->txop_enlarge = 2; - } - #endif -#endif - else - { - if (pDM_Odm->RFType==ODM_2T2R) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | - (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); - else - #if(DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | - (((priv->pshare->BE_cwmax_enhance) ? 10 : 5) << 12) | (3 << 8) | (sifs_time + 2 * slot_time)); - #else - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | - (5 << 12) | (3 << 8) | (sifs_time + 2 * slot_time)); - - #endif - } - } - else - { - #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP)) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); - #else - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP*2 << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); - #endif - } - - } -} -#endif - -void -odm_IotEngine( - IN PDM_ODM_T pDM_Odm - ) -{ - - struct rtl8192cd_priv *priv=pDM_Odm->priv; - PSTA_INFO_T pstat = NULL; - u4Byte i; - -#ifdef WIFI_WMM - unsigned int switch_turbo = 0; -#endif -//////////////////////////////////////////////////////// -// if EDCA Turbo function is not supported or Manual EDCA Setting -// then return -//////////////////////////////////////////////////////// - if(!(pDM_Odm->SupportAbility&ODM_MAC_EDCA_TURBO)){ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO NOT SUPPORTED\n")); - return; - } - -#if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined(RTL_MANUAL_EDCA) && defined(WIFI_WMM)) - if(priv->pmib->dot11QosEntry.ManualEDCA){ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: MANUAL SETTING\n")); - return ; - } -#endif - -#if !(DM_ODM_SUPPORT_TYPE &ODM_AP) - ////////////////////////////////////////////////////// - //find high TP STA every 2s -////////////////////////////////////////////////////// - if ((GET_ROOT(priv)->up_time % 2) == 0) - priv->pshare->highTP_found_pstat==NULL; - - //find highTP STA - for(i=0; ipODM_StaInfo[i]; - if(IS_STA_VALID(pstat) && (ODM_ChooseIotMainSTA(pDM_Odm, pstat))) //find the correct station - break; - } - - ////////////////////////////////////////////////////// - //if highTP STA is not found, then return - ////////////////////////////////////////////////////// - if(priv->pshare->highTP_found_pstat==NULL) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: NO HT STA FOUND\n")); - return; - } -#endif - - pstat=priv->pshare->highTP_found_pstat; - - -#ifdef WIFI_WMM - if (QOS_ENABLE) { - if (!priv->pmib->dot11OperationEntry.wifi_specific - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - ||((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - #elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) - || (priv->pmib->dot11OperationEntry.wifi_specific == 2) - #endif - ) { - if (priv->pshare->iot_mode_enable && - ((priv->pshare->phw->VO_pkt_count > 50) || - (priv->pshare->phw->VI_pkt_count > 50) || - (priv->pshare->phw->BK_pkt_count > 50))) { - priv->pshare->iot_mode_enable = 0; - switch_turbo++; - } else if ((!priv->pshare->iot_mode_enable) && - ((priv->pshare->phw->VO_pkt_count < 50) && - (priv->pshare->phw->VI_pkt_count < 50) && - (priv->pshare->phw->BK_pkt_count < 50))) { - priv->pshare->iot_mode_enable++; - switch_turbo++; - } - } - - - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific) - #elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL) - if (priv->pmib->dot11OperationEntry.wifi_specific) - #endif - { - if (!priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count > 50)) { - priv->pshare->iot_mode_VO_exist++; - switch_turbo++; - } else if (priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count < 50)) { - priv->pshare->iot_mode_VO_exist = 0; - switch_turbo++; - } -#if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI))) - if (priv->pshare->iot_mode_VO_exist) { - //printk("[%s %d] BE_pkt_count=%d\n", __FUNCTION__, __LINE__, priv->pshare->phw->BE_pkt_count); - if (!priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count > 250)) { - priv->pshare->iot_mode_BE_exist++; - switch_turbo++; - } else if (priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count < 250)) { - priv->pshare->iot_mode_BE_exist = 0; - switch_turbo++; - } - } -#endif - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - if (priv->pshare->rf_ft_var.wifi_beq_iot) - { - if (!priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count > 50)) { - priv->pshare->iot_mode_VI_exist++; - switch_turbo++; - } else if (priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count < 50)) { - priv->pshare->iot_mode_VI_exist = 0; - switch_turbo++; - } - } -#endif - - } - else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower) { - if (priv->pshare->txop_enlarge) { - priv->pshare->txop_enlarge = 0; - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } - } - -#if(defined(CLIENT_MODE) && (DM_ODM_SUPPORT_TYPE==ODM_AP)) - if ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - { - if (priv->pshare->iot_mode_enable && - (((priv->pshare->phw->VO_pkt_count > 50) || - (priv->pshare->phw->VI_pkt_count > 50) || - (priv->pshare->phw->BK_pkt_count > 50)) || - (pstat && (!pstat->ADDBA_ready[0]) & (!pstat->ADDBA_ready[3])))) - { - priv->pshare->iot_mode_enable = 0; - switch_turbo++; - } - else if ((!priv->pshare->iot_mode_enable) && - (((priv->pshare->phw->VO_pkt_count < 50) && - (priv->pshare->phw->VI_pkt_count < 50) && - (priv->pshare->phw->BK_pkt_count < 50)) && - (pstat && (pstat->ADDBA_ready[0] | pstat->ADDBA_ready[3])))) - { - priv->pshare->iot_mode_enable++; - switch_turbo++; - } - } -#endif - - priv->pshare->phw->VO_pkt_count = 0; - priv->pshare->phw->VI_pkt_count = 0; - priv->pshare->phw->BK_pkt_count = 0; - - #if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI))) - priv->pshare->phw->BE_pkt_count = 0; - #endif - - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - if (priv->pshare->rf_ft_var.wifi_beq_iot) - priv->pshare->phw->VI_rx_pkt_count = 0; - #endif - - } -#endif - - if ((priv->up_time % 2) == 0) { - /* - * decide EDCA content for different chip vendor - */ -#ifdef WIFI_WMM - #if(DM_ODM_SUPPORT_TYPE==ODM_ADSL) - if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2) - - #elif(DM_ODM_SUPPORT_TYPE==ODM_AP) - if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific || - ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - #ifdef CLIENT_MODE - || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - #endif - #endif - )) - - { - - if (pstat && pstat->rssi >= priv->pshare->rf_ft_var.txop_enlarge_upper) { -#ifdef LOW_TP_TXOP -#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) - if (pstat->IOTPeer==HT_IOT_PEER_INTEL) -#else - if (pstat->is_intel_sta) -#endif - { - if (priv->pshare->txop_enlarge != 0xe) - { - priv->pshare->txop_enlarge = 0xe; - - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } - } - else if (priv->pshare->txop_enlarge != 2) - { - priv->pshare->txop_enlarge = 2; - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } -#else - if (priv->pshare->txop_enlarge != 2) - { -#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) - if (pstat->IOTPeer==HT_IOT_PEER_INTEL) -#else - if (pstat->is_intel_sta) -#endif - priv->pshare->txop_enlarge = 0xe; -#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) - else if (pstat->IOTPeer==HT_IOT_PEER_RALINK) -#else - else if (pstat->is_ralink_sta) -#endif - priv->pshare->txop_enlarge = 0xd; - else - priv->pshare->txop_enlarge = 2; - - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } -#endif - } - else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower) - { - if (priv->pshare->txop_enlarge) { - priv->pshare->txop_enlarge = 0; - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } - } - -#if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&( defined LOW_TP_TXOP)) - // for Intel IOT, need to enlarge CW MAX from 6 to 10 - if (pstat && pstat->is_intel_sta && (((pstat->tx_avarage+pstat->rx_avarage)>>10) < - priv->pshare->rf_ft_var.cwmax_enhance_thd)) - { - if (!priv->pshare->BE_cwmax_enhance && priv->pshare->iot_mode_enable) - { - priv->pshare->BE_cwmax_enhance = 1; - switch_turbo++; - } - } else { - if (priv->pshare->BE_cwmax_enhance) { - priv->pshare->BE_cwmax_enhance = 0; - switch_turbo++; - } - } -#endif - } -#endif - priv->pshare->current_tx_bytes = 0; - priv->pshare->current_rx_bytes = 0; - } - -#if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined( SW_TX_QUEUE)) - if ((priv->assoc_num > 1) && (AMPDU_ENABLE)) - { - if (priv->swq_txmac_chg >= priv->pshare->rf_ft_var.swq_en_highthd){ - if ((priv->swq_en == 0)){ - switch_turbo++; - if (priv->pshare->txop_enlarge == 0) - priv->pshare->txop_enlarge = 2; - priv->swq_en = 1; - } - else - { - if ((switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) - { - priv->pshare->txop_enlarge = 2; - switch_turbo--; - } - } - } - else if(priv->swq_txmac_chg <= priv->pshare->rf_ft_var.swq_dis_lowthd){ - priv->swq_en = 0; - } - else if ((priv->swq_en == 1) && (switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) { - priv->pshare->txop_enlarge = 2; - switch_turbo--; - } - } -#endif - -#ifdef WIFI_WMM -#ifdef LOW_TP_TXOP - if ((!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - && QOS_ENABLE) { - if (switch_turbo || priv->pshare->rf_ft_var.low_tp_txop) { - unsigned int thd_tp; - unsigned char under_thd; - unsigned int curr_tp; - - if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G)) - { - // Determine the upper bound throughput threshold. - if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G)) { - if (priv->assoc_num && priv->assoc_num != priv->pshare->ht_sta_num) - thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g; - else - thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_n; - } - else - thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g; - - // Determine to close txop. - curr_tp = (unsigned int)(priv->ext_stats.tx_avarage>>17) + (unsigned int)(priv->ext_stats.rx_avarage>>17); - if (curr_tp <= thd_tp && curr_tp >= priv->pshare->rf_ft_var.low_tp_txop_thd_low) - under_thd = 1; - else - under_thd = 0; - } - else - { - under_thd = 0; - } - - if (switch_turbo) - { - priv->pshare->rf_ft_var.low_tp_txop_close = under_thd; - priv->pshare->rf_ft_var.low_tp_txop_count = 0; - } - else if (priv->pshare->iot_mode_enable && (priv->pshare->rf_ft_var.low_tp_txop_close != under_thd)) { - priv->pshare->rf_ft_var.low_tp_txop_count++; - if (priv->pshare->rf_ft_var.low_tp_txop_close) { - priv->pshare->rf_ft_var.low_tp_txop_count = priv->pshare->rf_ft_var.low_tp_txop_delay;; - } - if (priv->pshare->rf_ft_var.low_tp_txop_count ==priv->pshare->rf_ft_var.low_tp_txop_delay) - - { - priv->pshare->rf_ft_var.low_tp_txop_count = 0; - priv->pshare->rf_ft_var.low_tp_txop_close = under_thd; - switch_turbo++; - } - } - else - { - priv->pshare->rf_ft_var.low_tp_txop_count = 0; - } - } - } -#endif - - if (switch_turbo) - ODM_IotEdcaSwitch( pDM_Odm, priv->pshare->iot_mode_enable ); -#endif -} -#endif - - -#if( DM_ODM_SUPPORT_TYPE == ODM_MP) -// -// 2011/07/26 MH Add an API for testing IQK fail case. -// -BOOLEAN -ODM_CheckPowerStatus( - IN struct adapter * Adapter) -{ - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - RT_RF_POWER_STATE rtState; - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - - // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. - if (pMgntInfo->init_adpt_in_progress == TRUE) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); - return TRUE; - } - - // - // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. - // - Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); - if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", - Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); - return FALSE; - } - return TRUE; -} -#endif - -// need to ODM CE Platform //move to here for ANT detection mechanism using -#if ((DM_ODM_SUPPORT_TYPE == ODM_MP)||(DM_ODM_SUPPORT_TYPE == ODM_CE)) u4Byte GetPSDData( IN PDM_ODM_T pDM_Odm, @@ -8492,16 +4970,6 @@ GetPSDData( //int psd_report; u4Byte psd_report; - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //Debug Message - //val = PHY_QueryBBReg(Adapter,0x908, bMaskDWord); - //DbgPrint("Reg908 = 0x%x\n",val); - //val = PHY_QueryBBReg(Adapter,0xDF4, bMaskDWord); - //rfval = PHY_QueryRFReg(Adapter, RF_PATH_A, 0x00, bRFRegOffsetMask); - //DbgPrint("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval); - //DbgPrint("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n", - //(val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval); - //Set DCO frequency index, offset=(40MHz/SamplePts)*point ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); @@ -8528,1720 +4996,24 @@ ConvertTo_dB( Value = Value & 0xFFFF; - for (i=0;i<8;i++) - { + for (i=0;i<8;i++) { if (Value <= dB_Invert_Table[i][11]) - { break; - } } if (i >= 8) - { - return (96); // maximum 96 dB - } + return 96; // maximum 96 dB - for (j=0;j<12;j++) - { + for (j=0;j<12;j++) { if (Value <= dB_Invert_Table[i][j]) - { break; - } } dB = i*12 + j + 1; - return (dB); + return dB; } -#endif - -// -// LukeLee: -// PSD function will be moved to FW in future IC, but now is only implemented in MP platform -// So PSD function will not be incorporated to common ODM -// -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -#define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD -#define MODE_40M 0 //0:20M, 1:40M -#define PSD_TH2 3 -#define PSD_CHMIN 20 // Minimum channel number for BT AFH -#define SIR_STEP_SIZE 3 -#define Smooth_Size_1 5 -#define Smooth_TH_1 3 -#define Smooth_Size_2 10 -#define Smooth_TH_2 4 -#define Smooth_Size_3 20 -#define Smooth_TH_3 4 -#define Smooth_Step_Size 5 -#define Adaptive_SIR 1 -//#if(RTL8723_FPGA_VERIFICATION == 1) -//#define PSD_RESCAN 1 -//#else -//#define PSD_RESCAN 4 -//#endif -#define SCAN_INTERVAL 700 //ms -#define SYN_Length 5 // for 92D - -#define LNA_Low_Gain_1 0x64 -#define LNA_Low_Gain_2 0x5A -#define LNA_Low_Gain_3 0x58 - -#define pw_th_10dB 0x0 -#define pw_th_16dB 0x3 - -#define FA_RXHP_TH1 5000 -#define FA_RXHP_TH2 1500 -#define FA_RXHP_TH3 800 -#define FA_RXHP_TH4 600 -#define FA_RXHP_TH5 500 - -#define Idle_Mode 0 -#define High_TP_Mode 1 -#define Low_TP_Mode 2 - - -void -odm_PSDMonitorInit( - IN PDM_ODM_T pDM_Odm) -{ -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //PSD Monitor Setting - //Which path in ADC/DAC is turnned on for PSD: both I/Q - ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT10|BIT11, 0x3); - //Ageraged number: 8 - ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT12|BIT13, 0x1); - pDM_Odm->bPSDinProcess = FALSE; - pDM_Odm->bUserAssignLevel = FALSE; - - //pDM_Odm->bDMInitialGainEnable=TRUE; //change the initialization to DIGinit - //Set Debug Port - //PHY_SetBBReg(Adapter, 0x908, bMaskDWord, 0x803); - //PHY_SetBBReg(Adapter, 0xB34, bMaskByte0, 0x00); // pause PSD - //PHY_SetBBReg(Adapter, 0xB38, bMaskByte0, 10); //rescan - //PHY_SetBBReg(Adapter, 0xB38, bMaskByte1, 0x32); // PSDDelay - //PHY_SetBBReg(Adapter, 0xB38, bMaskByte2|bMaskByte3, 100); //interval - - //PlatformSetTimer( Adapter, &pHalData->PSDTriggerTimer, 0); //ms -#endif -} - -void -PatchDCTone( - IN PDM_ODM_T pDM_Odm, - pu4Byte PSD_report, - u1Byte initial_gain_psd -) -{ - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //struct adapter *pAdapter; - - u4Byte psd_report; - - //2 Switch to CH11 to patch CH9 and CH13 DC tone - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, 11); - - if(pDM_Odm->SupportICType== ODM_RTL8192D) - { - if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) - { - ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_CHNLBW, 0x3FF, 11); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x25, 0xfffff, 0x643BC); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x26, 0xfffff, 0xFC038); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x27, 0xfffff, 0x77C1A); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x2B, 0xfffff, 0x41289); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x2C, 0xfffff, 0x01840); - } - else - { - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x25, 0xfffff, 0x643BC); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x26, 0xfffff, 0xFC038); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x27, 0xfffff, 0x77C1A); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x2B, 0xfffff, 0x41289); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x2C, 0xfffff, 0x01840); - } - } - - //Ch9 DC tone patch - psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); - PSD_report[50] = psd_report; - //Ch13 DC tone patch - psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); - PSD_report[70] = psd_report; - - //2 Switch to CH3 to patch CH1 and CH5 DC tone - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, 3); - - - if(pDM_Odm->SupportICType==ODM_RTL8192D) - { - if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) - { - ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_CHNLBW, 0x3FF, 3); - //PHY_SetRFReg(Adapter, RF_PATH_B, 0x25, 0xfffff, 0x643BC); - //PHY_SetRFReg(Adapter, RF_PATH_B, 0x26, 0xfffff, 0xFC038); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x27, 0xfffff, 0x07C1A); - //PHY_SetRFReg(Adapter, RF_PATH_B, 0x2B, 0xfffff, 0x61289); - //PHY_SetRFReg(Adapter, RF_PATH_B, 0x2C, 0xfffff, 0x01C41); - } - else - { - //PHY_SetRFReg(Adapter, RF_PATH_A, 0x25, 0xfffff, 0x643BC); - //PHY_SetRFReg(Adapter, RF_PATH_A, 0x26, 0xfffff, 0xFC038); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x27, 0xfffff, 0x07C1A); - //PHY_SetRFReg(Adapter, RF_PATH_A, 0x2B, 0xfffff, 0x61289); - //PHY_SetRFReg(Adapter, RF_PATH_A, 0x2C, 0xfffff, 0x01C41); - } - } - - //Ch1 DC tone patch - psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); - PSD_report[10] = psd_report; - //Ch5 DC tone patch - psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); - PSD_report[30] = psd_report; - -} - - -void -GoodChannelDecision( - PDM_ODM_T pDM_Odm, - ps4Byte PSD_report, - pu1Byte PSD_bitmap, - u1Byte RSSI_BT, - pu1Byte PSD_bitmap_memory) -{ - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - //s4Byte TH1 = SSBT-0x15; // modify TH by Neil Chen - s4Byte TH1= RSSI_BT+0x14; - s4Byte TH2 = RSSI_BT+85; - //u2Byte TH3; -// s4Byte RegB34; - u1Byte bitmap, Smooth_size[3], Smooth_TH[3]; - //u1Byte psd_bit; - u4Byte i,n,j, byte_idx, bit_idx, good_cnt, good_cnt_smoothing, Smooth_Interval[3]; - int start_byte_idx,start_bit_idx,cur_byte_idx, cur_bit_idx,NOW_byte_idx ; - -// RegB34 = PHY_QueryBBReg(Adapter,0xB34, bMaskDWord)&0xFF; - - if((pDM_Odm->SupportICType == ODM_RTL8192C)||(pDM_Odm->SupportICType == ODM_RTL8192D)) - { - TH1 = RSSI_BT + 0x14; - } - - Smooth_size[0]=Smooth_Size_1; - Smooth_size[1]=Smooth_Size_2; - Smooth_size[2]=Smooth_Size_3; - Smooth_TH[0]=Smooth_TH_1; - Smooth_TH[1]=Smooth_TH_2; - Smooth_TH[2]=Smooth_TH_3; - Smooth_Interval[0]=16; - Smooth_Interval[1]=15; - Smooth_Interval[2]=13; - good_cnt = 0; - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - //2 Threshold - - if(RSSI_BT >=41) - TH1 = 113; - else if(RSSI_BT >=38) // >= -15dBm - TH1 = 105; //0x69 - else if((RSSI_BT >=33)&(RSSI_BT <38)) - TH1 = 99+(RSSI_BT-33); //0x63 - else if((RSSI_BT >=26)&(RSSI_BT<33)) - TH1 = 99-(33-RSSI_BT)+2; //0x5e - else if((RSSI_BT >=24)&(RSSI_BT<26)) - TH1 = 88-((RSSI_BT-24)*3); //0x58 - else if((RSSI_BT >=18)&(RSSI_BT<24)) - TH1 = 77+((RSSI_BT-18)*2); - else if((RSSI_BT >=14)&(RSSI_BT<18)) - TH1 = 63+((RSSI_BT-14)*2); - else if((RSSI_BT >=8)&(RSSI_BT<14)) - TH1 = 58+((RSSI_BT-8)*2); - else if((RSSI_BT >=3)&(RSSI_BT<8)) - TH1 = 52+(RSSI_BT-3); - else - TH1 = 51; - } - - for (i = 0; i< 10; i++) - PSD_bitmap[i] = 0; - - - // Add By Gary - for (i=0; i<80; i++) - pRX_HP_Table->PSD_bitmap_RXHP[i] = 0; - // End - - - - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - TH1 =TH1-SIR_STEP_SIZE; - } - while (good_cnt < PSD_CHMIN) - { - good_cnt = 0; - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - if(TH1 ==TH2) - break; - if((TH1+SIR_STEP_SIZE) < TH2) - TH1 += SIR_STEP_SIZE; - else - TH1 = TH2; - } - else - { - if(TH1==(RSSI_BT+0x1E)) - break; - if((TH1+2) < (RSSI_BT+0x1E)) - TH1+=3; - else - TH1 = RSSI_BT+0x1E; - - } - ODM_RT_TRACE(pDM_Odm,COMP_PSD,DBG_LOUD,("PSD: decision threshold is: %d", TH1)); - - for (i = 0; i< 80; i++) - { - if(PSD_report[i] < TH1) - { - byte_idx = i / 8; - bit_idx = i -8*byte_idx; - bitmap = PSD_bitmap[byte_idx]; - PSD_bitmap[byte_idx] = bitmap | (u1Byte) (1 << bit_idx); - } - } - -#if DBG - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: before smoothing\n")); - for(n=0;n<10;n++) - { - //DbgPrint("PSD_bitmap[%u]=%x\n", n, PSD_bitmap[n]); - for (i = 0; i<8; i++) - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); - } -#endif - - //1 Start of smoothing function - - for (j=0;j<3;j++) - { - start_byte_idx=0; - start_bit_idx=0; - for(n=0; n 7 ) - { - start_byte_idx= start_byte_idx+start_bit_idx/8; - start_bit_idx = start_bit_idx%8; - } - } - - ODM_RT_TRACE( pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: after %u smoothing", j+1)); - for(n=0;n<10;n++) - { - for (i = 0; i<8; i++) - { - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); - - if ( ((PSD_bitmap[n]&BIT(i))>>i) ==1) //----- Add By Gary - { - pRX_HP_Table->PSD_bitmap_RXHP[8*n+i] = 1; - } // ------end by Gary - } - } - - } - - - good_cnt = 0; - for ( i = 0; i < 10; i++) - { - for (n = 0; n < 8; n++) - if((PSD_bitmap[i]& BIT(n)) != 0) - good_cnt++; - } - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: good channel cnt = %u",good_cnt)); - } - - //RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: SSBT=%d, TH2=%d, TH1=%d",SSBT,TH2,TH1)); - for (i = 0; i <10; i++) - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: PSD_bitmap[%u]=%x",i,PSD_bitmap[i])); -/* - //Update bitmap memory - for(i = 0; i < 80; i++) - { - byte_idx = i / 8; - bit_idx = i -8*byte_idx; - psd_bit = (PSD_bitmap[byte_idx] & BIT(bit_idx)) >> bit_idx; - bitmap = PSD_bitmap_memory[i]; - PSD_bitmap_memory[i] = (bitmap << 1) |psd_bit; - } -*/ -} - - - -void -odm_PSD_Monitor( - PDM_ODM_T pDM_Odm -) -{ - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - - unsigned int pts, start_point, stop_point, initial_gain ; - static u1Byte PSD_bitmap_memory[80], init_memory = 0; - static u1Byte psd_cnt=0; - static u4Byte PSD_report[80], PSD_report_tmp; - static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; - u1Byte H2C_PSD_DATA[5]={0,0,0,0,0}; - static u1Byte H2C_PSD_DATA_last[5] ={0,0,0,0,0}; - u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, - 0,3,6,10,13,16,19,22,26,29}; - u1Byte n, i, channel, BBReset,tone_idx; - u1Byte PSD_bitmap[10], SSBT=0,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; - s4Byte PSD_skip_start, PSD_skip_stop; - u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; - u4Byte ReScan, Interval, Is40MHz; - u8Byte curTxOkCnt, curRxOkCnt; - int cur_byte_idx, cur_bit_idx; - struct adapter * Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - //--------------2G band synthesizer for 92D switch RF channel using----------------- - u1Byte group_idx=0; - u4Byte SYN_RF25=0, SYN_RF26=0, SYN_RF27=0, SYN_RF2B=0, SYN_RF2C=0; - u4Byte SYN[5] = {0x25, 0x26, 0x27, 0x2B, 0x2C}; // synthesizer RF register for 2G channel - u4Byte SYN_group[3][5] = {{0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840}, // For CH1,2,4,9,10.11.12 {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840} - {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840}, // For CH3,13,14 - {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}}; // For Ch5,6,7,8 - //--------------------- Add by Gary for Debug setting ---------------------- - s4Byte psd_result = 0; - u1Byte RSSI_BT_new = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB9C, 0xFF); - u1Byte rssi_ctrl = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB38, 0xFF); - //--------------------------------------------------------------------- - - if(*(pDM_Odm->pbScanInProcess)) - { - if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) - { - //pHalData->bPSDactive=FALSE; - //ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 100 ) - ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 900); //ms - //psd_cnt=0; - } - return; - } - - ReScan = PSD_RESCAN; - Interval = SCAN_INTERVAL; - - - //1 Initialization - if(init_memory == 0) - { - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("Init memory\n")); - for(i = 0; i < 80; i++) - PSD_bitmap_memory[i] = 0xFF; // channel is always good - init_memory = 1; - } - if(psd_cnt == 0) - { - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); - for(i = 0; i < 80; i++) - PSD_report[i] = 0; - } - //1 Backup Current Settings - CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); - //RXIQI = PHY_QueryBBReg(Adapter, 0xC14, bMaskDWord); - RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); - - //RxIdleLowPwr = (PHY_QueryBBReg(Adapter, 0x818, bMaskDWord)&BIT28)>>28; - RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; - - //2??? - Is40MHz = pMgntInfo->pHTInfo->bCurBW40MHz; - - ODM_RT_TRACE(pDM_Odm, COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); - //1 Turn off CCK - //PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT24, 0); - ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); - //1 Turn off TX - //Pause TX Queue - //PlatformEFIOWrite1Byte(Adapter, REG_TXPAUSE, 0xFF); - ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0xFF); - - //Force RX to stop TX immediately - //PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); - - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); - //1 Turn off RX - //Rx AGC off RegC70[0]=0, RegC7C[20]=0 - //PHY_SetBBReg(Adapter, 0xC70, BIT0, 0); - //PHY_SetBBReg(Adapter, 0xC7C, BIT20, 0); - - ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); - ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); - - - //Turn off CCA - //PHY_SetBBReg(Adapter, 0xC14, bMaskDWord, 0x0); - ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); - - //BB Reset - //BBReset = PlatformEFIORead1Byte(Adapter, 0x02); - BBReset = ODM_Read1Byte(pDM_Odm, 0x02); - - //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset&(~BIT0)); - //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset|BIT0); - - ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); - ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); - - //1 Leave RX idle low power - //PHY_SetBBReg(Adapter, 0x818, BIT28, 0x0); - - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); - //1 Fix initial gain - //if (IS_HARDWARE_TYPE_8723AE(Adapter)) - //RSSI_BT = pHalData->RSSI_BT; - //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary - // RSSI_BT = RSSI_BT_new; - - if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) - RSSI_BT=pDM_Odm->RSSI_BT; //need to check C2H to pDM_Odm RSSI BT - - else if((pDM_Odm->SupportICType==ODM_RTL8192C)||(pDM_Odm->SupportICType==ODM_RTL8192D)) - RSSI_BT = RSSI_BT_new; - - - - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); - - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - //Neil add--2011--10--12 - //2 Initial Gain index - if(RSSI_BT >=35) // >= -15dBm - initial_gain_psd = RSSI_BT*2; - else if((RSSI_BT >=33)&(RSSI_BT<35)) - initial_gain_psd = RSSI_BT*2+6; - else if((RSSI_BT >=24)&(RSSI_BT<33)) - initial_gain_psd = 70-(31-RSSI_BT); - else if((RSSI_BT >=19)&(RSSI_BT<24)) - initial_gain_psd = 64-((24-RSSI_BT)*4); - else if((RSSI_BT >=14)&(RSSI_BT<19)) - initial_gain_psd = 44-((18-RSSI_BT)*2); - else if((RSSI_BT >=8)&(RSSI_BT<14)) - initial_gain_psd = 35-(14-RSSI_BT); - else - initial_gain_psd = 0x1B; - } - else - { - if(rssi_ctrl == 1) // just for debug!! - initial_gain_psd = RSSI_BT_new ; - else - { - //need to do - initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI - } - } - //if(RSSI_BT<0x17) - // RSSI_BT +=3; - //DbgPrint("PSD: RSSI_BT= %d\n", RSSI_BT); - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); - - //initialGainUpper = 0x5E; //Modify by neil chen - - if(pDM_Odm->bUserAssignLevel) - { - pDM_Odm->bUserAssignLevel = FALSE; - initialGainUpper = 0x7f; - } - else - { - initialGainUpper = 0x5E; - } - - /* - if (initial_gain_psd < 0x1a) - initial_gain_psd = 0x1a; - if (initial_gain_psd > initialGainUpper) - initial_gain_psd = initialGainUpper; - */ - - if(pDM_Odm->SupportICType==ODM_RTL8723A) - SSBT = RSSI_BT * 2 +0x3E; - else if((pDM_Odm->SupportICType==ODM_RTL8192C)||(pDM_Odm->SupportICType==ODM_RTL8192D)) - { - RSSI_BT = initial_gain_psd; - SSBT = RSSI_BT; - } - - //if(IS_HARDWARE_TYPE_8723AE(Adapter)) - // SSBT = RSSI_BT * 2 +0x3E; - //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary - //{ - // RSSI_BT = initial_gain_psd; - // SSBT = RSSI_BT; - //} - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); - ODM_RT_TRACE( pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); - //DbgPrint("PSD: SSBT= %d", SSBT); - //need to do - //pMgntInfo->bDMInitialGainEnable = FALSE; - pDM_Odm->bDMInitialGainEnable = FALSE; - initial_gain = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F; - ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain_psd); - //1 Turn off 3-wire - ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); - - //pts value = 128, 256, 512, 1024 - pts = 128; - - if(pts == 128) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); - start_point = 64; - stop_point = 192; - } - else if(pts == 256) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); - start_point = 128; - stop_point = 384; - } - else if(pts == 512) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); - start_point = 256; - stop_point = 768; - } - else - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); - start_point = 512; - stop_point = 1536; - } - - -//3 Skip WLAN channels if WLAN busy - - curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; - curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; - lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); - lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); - - PSD_skip_start=80; - PSD_skip_stop = 0; - wlan_channel = CurrentChannel & 0x0f; - - ODM_RT_TRACE(pDM_Odm,COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { -#if(BT_30_SUPPORT == 1) - if(pDM_Odm->bBtHsOperation) - { - if(pDM_Odm->bLinked) - { - if(Is40MHz) - { - PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask - PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; - } - else - { - PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask - PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; - } - } - else - { - // mask for 40MHz - PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask - PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; - } - if(PSD_skip_start < 0) - PSD_skip_start = 0; - if(PSD_skip_stop >80) - PSD_skip_stop = 80; - } - else -#endif - { - if((curRxOkCnt+curTxOkCnt) > 5) - { - if(Is40MHz) - { - PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask - PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; - } - else - { - PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask - PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; - } - - if(PSD_skip_start < 0) - PSD_skip_start = 0; - if(PSD_skip_stop >80) - PSD_skip_stop = 80; - } - } - } - else - { - if((curRxOkCnt+curTxOkCnt) > 1000) - { - PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; - PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; - } - } - - ODM_RT_TRACE(pDM_Odm,COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); - - for (n=0;n<80;n++) - { - if((n%20)==0) - { - channel = (n/20)*4 + 1; - /* - if(pDM_Odm->SupportICType==ODM_RTL8192D) - { - switch(channel) - { - case 1: - case 9: - group_idx = 0; - break; - case 5: - group_idx = 2; - break; - case 13: - group_idx = 1; - break; - } - - if((pHalData->MacPhyMode92D == SINGLEMAC_SINGLEPHY)||(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)) - { - for(i = 0; i < SYN_Length; i++) - ODM_SetRFReg(pDM_Odm, RF_PATH_B, SYN[i], bMaskDWord, SYN_group[group_idx][i]); - - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_CHNLBW, 0x3FF, channel); - } - else // DualMAC_DualPHY 2G - { - for(i = 0; i < SYN_Length; i++) - ODM_SetRFReg(pDM_Odm, RF_PATH_A, SYN[i], bMaskDWord, SYN_group[group_idx][i]); - - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - } - } - else */ - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - } - tone_idx = n%20; - if ((n>=PSD_skip_start) && (n PSD_report[n]) - PSD_report[n] = PSD_report_tmp; - - } - } - - PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); - - //----end - //1 Turn on RX - //Rx AGC on - ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); - ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); - //CCK on - ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); - //1 Turn on TX - //Resume TX Queue - - ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0x00); - //Turn on 3-wire - ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); - //1 Restore Current Settings - //Resume DIG - pDM_Odm->bDMInitialGainEnable = TRUE; - ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain); - // restore originl center frequency - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); - - /* - if(pDM_Odm->SupportICType==ODM_RTL8192D) - { - if((pHalData->MacPhyMode92D == SINGLEMAC_SINGLEPHY)||(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)) - { - PHY_SetRFReg(Adapter, RF_PATH_B, RF_CHNLBW, bMaskDWord, CurrentChannel); - PHY_SetRFReg(Adapter, RF_PATH_B, 0x25, bMaskDWord, SYN_RF25); - PHY_SetRFReg(Adapter, RF_PATH_B, 0x26, bMaskDWord, SYN_RF26); - PHY_SetRFReg(Adapter, RF_PATH_B, 0x27, bMaskDWord, SYN_RF27); - PHY_SetRFReg(Adapter, RF_PATH_B, 0x2B, bMaskDWord, SYN_RF2B); - PHY_SetRFReg(Adapter, RF_PATH_B, 0x2C, bMaskDWord, SYN_RF2C); - } - else // DualMAC_DualPHY - { - PHY_SetRFReg(Adapter, RF_PATH_A, 0x25, bMaskDWord, SYN_RF25); - PHY_SetRFReg(Adapter, RF_PATH_A, 0x26, bMaskDWord, SYN_RF26); - PHY_SetRFReg(Adapter, RF_PATH_A, 0x27, bMaskDWord, SYN_RF27); - PHY_SetRFReg(Adapter, RF_PATH_A, 0x2B, bMaskDWord, SYN_RF2B); - PHY_SetRFReg(Adapter, RF_PATH_A, 0x2C, bMaskDWord, SYN_RF2C); - } - }*/ - //Turn on CCA - ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); - //Restore RX idle low power - if(RxIdleLowPwr == TRUE) - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); - - psd_cnt++; - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); - if (psd_cnt < ReScan) - ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, Interval); - else - { - psd_cnt = 0; - for(i=0;i<80;i++) - //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); - RT_TRACE( COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); - - - GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); - - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - cur_byte_idx=0; - cur_bit_idx=0; - - //2 Restore H2C PSD Data to Last Data - H2C_PSD_DATA_last[0] = H2C_PSD_DATA[0]; - H2C_PSD_DATA_last[1] = H2C_PSD_DATA[1]; - H2C_PSD_DATA_last[2] = H2C_PSD_DATA[2]; - H2C_PSD_DATA_last[3] = H2C_PSD_DATA[3]; - H2C_PSD_DATA_last[4] = H2C_PSD_DATA[4]; - - - //2 Translate 80bit channel map to 40bit channel - for ( i=0;i<5;i++) - { - for(n=0;n<8;n++) - { - cur_byte_idx = i*2 + n/4; - cur_bit_idx = (n%4)*2; - if ( ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx)) != 0) && ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx+1)) != 0)) - H2C_PSD_DATA[i] = H2C_PSD_DATA[i] | (u1Byte) (1 << n); - } - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("H2C_PSD_DATA[%d]=0x%x\n" ,i, H2C_PSD_DATA[i])); - } - - //3 To Compare the difference - for ( i=0;i<5;i++) - { - if(H2C_PSD_DATA[i] !=H2C_PSD_DATA_last[i]) - { - FillH2CCmd(Adapter, H2C_92C_PSD_RESULT, 5, H2C_PSD_DATA); - ODM_RT_TRACE(pDM_Odm, COMP_PSD, DBG_LOUD,("Need to Update the AFH Map \n")); - break; - } - else - { - if(i==5) - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("Not need to Update\n")); - } - } - //pHalData->bPSDactive=FALSE; - ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 900); - ODM_RT_TRACE( pDM_Odm,COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n")); - } - } -} -/* -//Neil for Get BT RSSI -// Be Triggered by BT C2H CMD -void -ODM_PSDGetRSSI( - IN u1Byte RSSI_BT) -{ - - -} - -*/ - -void -ODM_PSDMonitor( - IN PDM_ODM_T pDM_Odm - ) -{ - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - //if(IS_HARDWARE_TYPE_8723AE(Adapter)) - - if(pDM_Odm->SupportICType == ODM_RTL8723A) //may need to add other IC type - { - if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) - { -#if(BT_30_SUPPORT == 1) - if(pDM_Odm->bBtDisabled) //need to check upper layer connection - { - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD, ("odm_PSDMonitor, return for BT is disabled!!!\n")); - return; - } -#endif - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD, ("odm_PSDMonitor\n")); - //if(pHalData->bPSDactive ==FALSE) - //{ - pDM_Odm->bPSDinProcess = TRUE; - //pHalData->bPSDactive=TRUE; - odm_PSD_Monitor(pDM_Odm); - pDM_Odm->bPSDinProcess = FALSE; - } - } - -} -void -odm_PSDMonitorCallback( - PRT_TIMER pTimer -) -{ - struct adapter * Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - -#if USE_WORKITEM - PlatformScheduleWorkItem(&pHalData->PSDMonitorWorkitem); -#else - ODM_PSDMonitor(pDM_Odm); -#endif -} - -void -odm_PSDMonitorWorkItemCallback( - IN void * pContext - ) -{ - struct adapter *Adapter = (PADAPTER)pContext; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - - ODM_PSDMonitor(pDM_Odm); -} - - - - //cosa debug tool need to modify - -void -ODM_PSDDbgControl( - IN struct adapter *Adapter, - IN u4Byte mode, - IN u4Byte btRssi - ) -{ -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD, (" Monitor mode=%d, btRssi=%d\n", mode, btRssi)); - if(mode) - { - pDM_Odm->RSSI_BT = (u1Byte)btRssi; - pDM_Odm->bUserAssignLevel = TRUE; - ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 0); //ms - } - else - { - ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); - } -#endif -} - - -//#if(DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) - -void odm_RXHPInit( - IN PDM_ODM_T pDM_Odm) -{ -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - u1Byte index; - - pRX_HP_Table->RXHP_enable = TRUE; - pRX_HP_Table->RXHP_flag = 0; - pRX_HP_Table->PSD_func_trigger = 0; - pRX_HP_Table->Pre_IGI = 0x20; - pRX_HP_Table->Cur_IGI = 0x20; - pRX_HP_Table->Cur_pw_th = pw_th_10dB; - pRX_HP_Table->Pre_pw_th = pw_th_10dB; - for(index=0; index<80; index++) - pRX_HP_Table->PSD_bitmap_RXHP[index] = 1; - -#if(DEV_BUS_TYPE == RT_USB_INTERFACE) - pRX_HP_Table->TP_Mode = Idle_Mode; -#endif -#endif -} - -void odm_RXHP( - IN PDM_ODM_T pDM_Odm) -{ -#if( DM_ODM_SUPPORT_TYPE & (ODM_MP)) -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) - struct adapter *Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); - - u1Byte i, j, sum; - u1Byte Is40MHz; - s1Byte Intf_diff_idx, MIN_Intf_diff_idx = 16; - s4Byte cur_channel; - u1Byte ch_map_intf_5M[17] = {0}; - static u4Byte FA_TH = 0; - static u1Byte psd_intf_flag = 0; - static s4Byte curRssi = 0; - static s4Byte preRssi = 0; - static u1Byte PSDTriggerCnt = 1; - - u1Byte RX_HP_enable = (u1Byte)(ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, bMaskDWord)>>31); // for debug!! - -#if(DEV_BUS_TYPE == RT_USB_INTERFACE) - static s8Byte lastTxOkCnt = 0, lastRxOkCnt = 0; - s8Byte curTxOkCnt, curRxOkCnt; - s8Byte curTPOkCnt; - s8Byte TP_Acc3, TP_Acc5; - static s8Byte TP_Buff[5] = {0}; - static u1Byte pre_state = 0, pre_state_flag = 0; - static u1Byte Intf_HighTP_flag = 0, De_counter = 16; - static u1Byte TP_Degrade_flag = 0; -#endif - static u1Byte LatchCnt = 0; - - if((pDM_Odm->SupportICType == ODM_RTL8723A)||(pDM_Odm->SupportICType == ODM_RTL8188E)) - return; - //AGC RX High Power Mode is only applied on 2G band in 92D!!! - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - if(*(pDM_Odm->pBandType) != ODM_BAND_2_4G) - return; - } - - if(!(pDM_Odm->SupportAbility==ODM_BB_RXHP)) - return; - - - //RX HP ON/OFF - if(RX_HP_enable == 1) - pRX_HP_Table->RXHP_enable = FALSE; - else - pRX_HP_Table->RXHP_enable = TRUE; - - if(pRX_HP_Table->RXHP_enable == FALSE) - { - if(pRX_HP_Table->RXHP_flag == 1) - { - pRX_HP_Table->RXHP_flag = 0; - psd_intf_flag = 0; - } - return; - } - -#if(DEV_BUS_TYPE == RT_USB_INTERFACE) - //2 Record current TP for USB interface - curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast)-lastTxOkCnt; - curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast)-lastRxOkCnt; - lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); - lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); - - curTPOkCnt = curTxOkCnt+curRxOkCnt; - TP_Buff[0] = curTPOkCnt; // current TP - TP_Acc3 = PlatformDivision64((TP_Buff[1]+TP_Buff[2]+TP_Buff[3]), 3); - TP_Acc5 = PlatformDivision64((TP_Buff[0]+TP_Buff[1]+TP_Buff[2]+TP_Buff[3]+TP_Buff[4]), 5); - - if(TP_Acc5 < 1000) - pRX_HP_Table->TP_Mode = Idle_Mode; - else if((1000 < TP_Acc5)&&(TP_Acc5 < 3750000)) - pRX_HP_Table->TP_Mode = Low_TP_Mode; - else - pRX_HP_Table->TP_Mode = High_TP_Mode; - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP TP Mode = %d\n", pRX_HP_Table->TP_Mode)); - // Since TP result would be sampled every 2 sec, it needs to delay 4sec to wait PSD processing. - // When LatchCnt = 0, we would Get PSD result. - if(TP_Degrade_flag == 1) - { - LatchCnt--; - if(LatchCnt == 0) - { - TP_Degrade_flag = 0; - } - } - // When PSD function triggered by TP degrade 20%, and Interference Flag = 1 - // Set a De_counter to wait IGI = upper bound. If time is UP, the Interference flag will be pull down. - if(Intf_HighTP_flag == 1) - { - De_counter--; - if(De_counter == 0) - { - Intf_HighTP_flag = 0; - psd_intf_flag = 0; - } - } -#endif - - //2 AGC RX High Power Mode by PSD only applied to STA Mode - //3 NOT applied 1. Ad Hoc Mode. - //3 NOT applied 2. AP Mode - if ((pMgntInfo->mAssoc) && (!pMgntInfo->mIbss) && (!ACTING_AS_AP(Adapter))) - { - Is40MHz = *(pDM_Odm->pBandWidth); - curRssi = pDM_Odm->RSSI_Min; - cur_channel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x0fff) & 0x0f; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP RX HP flag = %d\n", pRX_HP_Table->RXHP_flag)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP FA = %d\n", FalseAlmCnt->Cnt_all)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP cur RSSI = %d, pre RSSI=%d\n", curRssi, preRssi)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP current CH = %d\n", cur_channel)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP Is 40MHz = %d\n", Is40MHz)); - //2 PSD function would be triggered - //3 1. Every 4 sec for PCIE - //3 2. Before TP Mode (Idle TP<4kbps) for USB - //3 3. After TP Mode (High TP) for USB - if((curRssi > 68) && (pRX_HP_Table->RXHP_flag == 0)) // Only RSSI>TH and RX_HP_flag=0 will Do PSD process - { -#if (DEV_BUS_TYPE == RT_USB_INTERFACE) - //2 Before TP Mode ==> PSD would be trigger every 4 sec - if(pRX_HP_Table->TP_Mode == Idle_Mode) //2.1 less wlan traffic <4kbps - { -#endif - if(PSDTriggerCnt == 1) - { - odm_PSD_RXHP(pDM_Odm); - pRX_HP_Table->PSD_func_trigger = 1; - PSDTriggerCnt = 0; - } - else - { - PSDTriggerCnt++; - } -#if(DEV_BUS_TYPE == RT_USB_INTERFACE) - } - //2 After TP Mode ==> Check if TP degrade larger than 20% would trigger PSD function - if(pRX_HP_Table->TP_Mode == High_TP_Mode) - { - if((pre_state_flag == 0)&&(LatchCnt == 0)) - { - // TP var < 5% - if((((curTPOkCnt-TP_Acc3)*20)<(TP_Acc3))&&(((curTPOkCnt-TP_Acc3)*20)>(-TP_Acc3))) - { - pre_state++; - if(pre_state == 3) // hit pre_state condition => consecutive 3 times - { - pre_state_flag = 1; - pre_state = 0; - } - - } - else - { - pre_state = 0; - } - } - //3 If pre_state_flag=1 ==> start to monitor TP degrade 20% - if(pre_state_flag == 1) - { - if(((TP_Acc3-curTPOkCnt)*5)>(TP_Acc3)) // degrade 20% - { - odm_PSD_RXHP(pDM_Odm); - pRX_HP_Table->PSD_func_trigger = 1; - TP_Degrade_flag = 1; - LatchCnt = 2; - pre_state_flag = 0; - } - else if(((TP_Buff[2]-curTPOkCnt)*5)>TP_Buff[2]) - { - odm_PSD_RXHP(pDM_Odm); - pRX_HP_Table->PSD_func_trigger = 1; - TP_Degrade_flag = 1; - LatchCnt = 2; - pre_state_flag = 0; - } - else if(((TP_Buff[3]-curTPOkCnt)*5)>TP_Buff[3]) - { - odm_PSD_RXHP(pDM_Odm); - pRX_HP_Table->PSD_func_trigger = 1; - TP_Degrade_flag = 1; - LatchCnt = 2; - pre_state_flag = 0; - } - } - } -#endif -} - -#if (DEV_BUS_TYPE == RT_USB_INTERFACE) - for (i=0;i<4;i++) - { - TP_Buff[4-i] = TP_Buff[3-i]; - } -#endif - //2 Update PSD bitmap according to PSD report - if((pRX_HP_Table->PSD_func_trigger == 1)&&(LatchCnt == 0)) - { - //2 Separate 80M bandwidth into 16 group with smaller 5M BW. - for (i = 0 ; i < 16 ; i++) - { - sum = 0; - for(j = 0; j < 5 ; j++) - sum += pRX_HP_Table->PSD_bitmap_RXHP[5*i + j]; - - if(sum < 5) - { - ch_map_intf_5M[i] = 1; // interference flag - } - } - //=============just for debug========================= - //for(i=0;i<16;i++) - //DbgPrint("RX HP: ch_map_intf_5M[%d] = %d\n", i, ch_map_intf_5M[i]); - //=============================================== - //2 Mask target channel 5M index - for(i = 0; i < (4+4*Is40MHz) ; i++) - { - ch_map_intf_5M[cur_channel - (1+2*Is40MHz) + i] = 0; - } - - psd_intf_flag = 0; - for(i = 0; i < 16; i++) - { - if(ch_map_intf_5M[i] == 1) - { - psd_intf_flag = 1; // interference is detected!!! - break; - } - } - -#if (DEV_BUS_TYPE == RT_USB_INTERFACE) - if(pRX_HP_Table->TP_Mode!=Idle_Mode) - { - if(psd_intf_flag == 1) // to avoid psd_intf_flag always 1 - { - Intf_HighTP_flag = 1; - De_counter = 32; // 0x1E -> 0x3E needs 32 times by each IGI step =1 - } - } -#endif - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP psd_intf_flag = %d\n", psd_intf_flag)); - //2 Distance between target channel and interference - for(i = 0; i < 16; i++) - { - if(ch_map_intf_5M[i] == 1) - { - Intf_diff_idx = ((cur_channel+Is40MHz-(i+1))>0) ? (s1Byte)(cur_channel-2*Is40MHz-(i-2)) : (s1Byte)((i+1)-(cur_channel+2*Is40MHz)); - if(Intf_diff_idx < MIN_Intf_diff_idx) - MIN_Intf_diff_idx = Intf_diff_idx; // the min difference index between interference and target - } - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP MIN_Intf_diff_idx = %d\n", MIN_Intf_diff_idx)); - //2 Choose False Alarm Threshold - switch (MIN_Intf_diff_idx){ - case 0: - case 1: - case 2: - case 3: - FA_TH = FA_RXHP_TH1; - break; - case 4: // CH5 - case 5: // CH6 - FA_TH = FA_RXHP_TH2; - break; - case 6: // CH7 - case 7: // CH8 - FA_TH = FA_RXHP_TH3; - break; - case 8: // CH9 - case 9: //CH10 - FA_TH = FA_RXHP_TH4; - break; - case 10: - case 11: - case 12: - case 13: - case 14: - case 15: - FA_TH = FA_RXHP_TH5; - break; - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP FA_TH = %d\n", FA_TH)); - pRX_HP_Table->PSD_func_trigger = 0; - } - //1 Monitor RSSI variation to choose the suitable IGI or Exit AGC RX High Power Mode - if(pRX_HP_Table->RXHP_flag == 1) - { - if ((curRssi > 80)&&(preRssi < 80)) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; - } - else if ((curRssi < 80)&&(preRssi > 80)) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; - } - else if ((curRssi > 72)&&(preRssi < 72)) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; - } - else if ((curRssi < 72)&&( preRssi > 72)) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; - } - else if (curRssi < 68) //RSSI is NOT large enough!!==> Exit AGC RX High Power Mode - { - pRX_HP_Table->Cur_pw_th = pw_th_10dB; - pRX_HP_Table->RXHP_flag = 0; // Back to Normal DIG Mode - psd_intf_flag = 0; - } - } - else // pRX_HP_Table->RXHP_flag == 0 - { - //1 Decide whether to enter AGC RX High Power Mode - if ((curRssi > 70) && (psd_intf_flag == 1) && (FalseAlmCnt->Cnt_all > FA_TH) && - (pDM_DigTable->CurIGValue == pDM_DigTable->rx_gain_range_max)) - { - if (curRssi > 80) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; - } - else if (curRssi > 72) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; - } - else - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; - } - pRX_HP_Table->Cur_pw_th = pw_th_16dB; //RegC54[9:8]=2'b11: to enter AGC Flow 3 - pRX_HP_Table->First_time_enter = TRUE; - pRX_HP_Table->RXHP_flag = 1; // RXHP_flag=1: AGC RX High Power Mode, RXHP_flag=0: Normal DIG Mode - } - } - preRssi = curRssi; - odm_Write_RXHP(pDM_Odm); - } -#endif //#if( DM_ODM_SUPPORT_TYPE & (ODM_MP)) -#endif //#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) -} - -void odm_Write_RXHP( - IN PDM_ODM_T pDM_Odm) -{ - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - u4Byte currentIGI; - - if(pRX_HP_Table->Cur_IGI != pRX_HP_Table->Pre_IGI) - { - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); - ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); - } - - if(pRX_HP_Table->Cur_pw_th != pRX_HP_Table->Pre_pw_th) -{ - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, BIT8|BIT9, pRX_HP_Table->Cur_pw_th); // RegC54[9:8]=2'b11: AGC Flow 3 - } - - if(pRX_HP_Table->RXHP_flag == 0) - { - pRX_HP_Table->Cur_IGI = 0x20; - } - else - { - currentIGI = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0); - if(currentIGI<0x50) - { - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); - ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); - } - } - pRX_HP_Table->Pre_IGI = pRX_HP_Table->Cur_IGI; - pRX_HP_Table->Pre_pw_th = pRX_HP_Table->Cur_pw_th; - -} - -void -odm_PSD_RXHP( - IN PDM_ODM_T pDM_Odm -) -{ - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - struct adapter * Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - unsigned int pts, start_point, stop_point, initial_gain ; - static u1Byte PSD_bitmap_memory[80], init_memory = 0; - static u1Byte psd_cnt=0; - static u4Byte PSD_report[80], PSD_report_tmp; - static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; - u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, - 0,3,6,10,13,16,19,22,26,29}; - u1Byte n, i, channel, BBReset,tone_idx; - u1Byte PSD_bitmap[10], SSBT=0,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; - s4Byte PSD_skip_start, PSD_skip_stop; - u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; - u4Byte ReScan, Interval, Is40MHz; - u8Byte curTxOkCnt, curRxOkCnt; - //--------------2G band synthesizer for 92D switch RF channel using----------------- - u1Byte group_idx=0; - u4Byte SYN_RF25=0, SYN_RF26=0, SYN_RF27=0, SYN_RF2B=0, SYN_RF2C=0; - u4Byte SYN[5] = {0x25, 0x26, 0x27, 0x2B, 0x2C}; // synthesizer RF register for 2G channel - u4Byte SYN_group[3][5] = {{0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840}, // For CH1,2,4,9,10.11.12 {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840} - {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840}, // For CH3,13,14 - {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}}; // For Ch5,6,7,8 - //--------------------- Add by Gary for Debug setting ---------------------- - s4Byte psd_result = 0; - u1Byte RSSI_BT_new = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB9C, 0xFF); - u1Byte rssi_ctrl = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB38, 0xFF); - //--------------------------------------------------------------------- - - if(pMgntInfo->bScanInProgress) - { - return; - } - - ReScan = PSD_RESCAN; - Interval = SCAN_INTERVAL; - - - //1 Initialization - if(init_memory == 0) - { - RT_TRACE( COMP_PSD, DBG_LOUD,("Init memory\n")); - for(i = 0; i < 80; i++) - PSD_bitmap_memory[i] = 0xFF; // channel is always good - init_memory = 1; - } - if(psd_cnt == 0) - { - RT_TRACE(COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); - for(i = 0; i < 80; i++) - PSD_report[i] = 0; - } - - //1 Backup Current Settings - CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - //2 Record Current synthesizer parameters based on current channel - if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) - { - SYN_RF25 = ODM_GetRFReg(pDM_Odm, RF_PATH_B, 0x25, bMaskDWord); - SYN_RF26 = ODM_GetRFReg(pDM_Odm, RF_PATH_B, 0x26, bMaskDWord); - SYN_RF27 = ODM_GetRFReg(pDM_Odm, RF_PATH_B, 0x27, bMaskDWord); - SYN_RF2B = ODM_GetRFReg(pDM_Odm, RF_PATH_B, 0x2B, bMaskDWord); - SYN_RF2C = ODM_GetRFReg(pDM_Odm, RF_PATH_B, 0x2C, bMaskDWord); - } - else // DualMAC_DualPHY 2G - { - SYN_RF25 = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x25, bMaskDWord); - SYN_RF26 = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x26, bMaskDWord); - SYN_RF27 = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x27, bMaskDWord); - SYN_RF2B = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x2B, bMaskDWord); - SYN_RF2C = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x2C, bMaskDWord); - } - } - RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); - RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; - Is40MHz = *(pDM_Odm->pBandWidth); - ODM_RT_TRACE(pDM_Odm, COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); - //1 Turn off CCK - ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); - //1 Turn off TX - //Pause TX Queue - ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); - //Force RX to stop TX immediately - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); - //1 Turn off RX - //Rx AGC off RegC70[0]=0, RegC7C[20]=0 - ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); - ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); - //Turn off CCA - ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); - //BB Reset - BBReset = ODM_Read1Byte(pDM_Odm, 0x02); - ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); - ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); - //1 Leave RX idle low power - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); - //1 Fix initial gain - RSSI_BT = RSSI_BT_new; - RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); - - if(rssi_ctrl == 1) // just for debug!! - initial_gain_psd = RSSI_BT_new; - else - initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI - - RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); - - initialGainUpper = 0x54; - - RSSI_BT = initial_gain_psd; - //SSBT = RSSI_BT; - - //RT_TRACE( COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); - RT_TRACE( COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); - - pDM_Odm->bDMInitialGainEnable = FALSE; - initial_gain = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F; - ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain_psd); - //1 Turn off 3-wire - ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); - - //pts value = 128, 256, 512, 1024 - pts = 128; - - if(pts == 128) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); - start_point = 64; - stop_point = 192; - } - else if(pts == 256) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); - start_point = 128; - stop_point = 384; - } - else if(pts == 512) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); - start_point = 256; - stop_point = 768; - } - else - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); - start_point = 512; - stop_point = 1536; - } - - -//3 Skip WLAN channels if WLAN busy - curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; - curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; - lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); - lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); - - PSD_skip_start=80; - PSD_skip_stop = 0; - wlan_channel = CurrentChannel & 0x0f; - - RT_TRACE(COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); - - if((curRxOkCnt+curTxOkCnt) > 1000) - { - PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; - PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; - } - - RT_TRACE(COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); - - for (n=0;n<80;n++) - { - if((n%20)==0) - { - channel = (n/20)*4 + 1; - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - switch(channel) - { - case 1: - case 9: - group_idx = 0; - break; - case 5: - group_idx = 2; - break; - case 13: - group_idx = 1; - break; - } - if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) - { - for(i = 0; i < SYN_Length; i++) - ODM_SetRFReg(pDM_Odm, RF_PATH_B, SYN[i], bMaskDWord, SYN_group[group_idx][i]); - - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_CHNLBW, 0x3FF, channel); - } - else // DualMAC_DualPHY 2G - { - for(i = 0; i < SYN_Length; i++) - ODM_SetRFReg(pDM_Odm, RF_PATH_A, SYN[i], bMaskDWord, SYN_group[group_idx][i]); - - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - } - } - else - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - } - tone_idx = n%20; - if ((n>=PSD_skip_start) && (n PSD_report[n]) - PSD_report[n] = PSD_report_tmp; - - } - } - - PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); - - //----end - //1 Turn on RX - //Rx AGC on - ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); - ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); - //CCK on - ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); - //1 Turn on TX - //Resume TX Queue - ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); - //Turn on 3-wire - ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); - //1 Restore Current Settings - //Resume DIG - pDM_Odm->bDMInitialGainEnable= TRUE; - ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain); - // restore originl center frequency - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) - { - ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_CHNLBW, bMaskDWord, CurrentChannel); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x25, bMaskDWord, SYN_RF25); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x26, bMaskDWord, SYN_RF26); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x27, bMaskDWord, SYN_RF27); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x2B, bMaskDWord, SYN_RF2B); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x2C, bMaskDWord, SYN_RF2C); - } - else // DualMAC_DualPHY - { - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x25, bMaskDWord, SYN_RF25); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x26, bMaskDWord, SYN_RF26); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x27, bMaskDWord, SYN_RF27); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x2B, bMaskDWord, SYN_RF2B); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x2C, bMaskDWord, SYN_RF2C); - } - } - //Turn on CCA - ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); - //Restore RX idle low power - if(RxIdleLowPwr == TRUE) - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); - - psd_cnt++; - //gPrint("psd cnt=%d\n", psd_cnt); - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); - if (psd_cnt < ReScan) - { - ODM_SetTimer(pDM_Odm, &pRX_HP_Table->PSDTimer, Interval); //ms - } - else - { - psd_cnt = 0; - for(i=0;i<80;i++) - RT_TRACE( COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); - //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); - - GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); - - } - } - -void -odm_PSD_RXHPCallback( - PRT_TIMER pTimer -) -{ - struct adapter * Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - #if USE_WORKITEM - ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); - #else - odm_PSD_RXHP(pDM_Odm); - #endif -#else - ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); -#endif - - } - -void -odm_PSD_RXHPWorkitemCallback( - IN void * pContext - ) -{ - struct adapter *pAdapter = (PADAPTER)pContext; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - odm_PSD_RXHP(pDM_Odm); -} - -#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - // // 2011/09/22 MH Add for 92D global spin lock utilization. // @@ -10250,1428 +5022,8 @@ odm_GlobalAdapterCheck( IN void ) { - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - - //sherry delete flag 20110517 -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) - ACQUIRE_GLOBAL_SPINLOCK(&GlobalSpinlockForGlobalAdapterList); -#else - ACQUIRE_GLOBAL_MUTEX(GlobalMutexForGlobalAdapterList); -#endif - -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) - RELEASE_GLOBAL_SPINLOCK(&GlobalSpinlockForGlobalAdapterList); -#else - RELEASE_GLOBAL_MUTEX(GlobalMutexForGlobalAdapterList); -#endif - -#endif - } // odm_GlobalAdapterCheck - - -// -// 2011/12/02 MH Copy from MP oursrc for temporarily test. -// -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -void -odm_OFDMTXPathDiversity_92C( - IN struct adapter *Adapter) -{ -// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - PRT_WLAN_STA pEntry; - u1Byte i, DefaultRespPath = 0; - s4Byte MinRSSI = 0xFF; - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - pDM_PDTable->OFDMTXPath = 0; - - //1 Default Port - if(pMgntInfo->mAssoc) - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port RSSI[0]=%d, RSSI[1]=%d\n", - Adapter->RxStats.RxRSSIPercentage[0], Adapter->RxStats.RxRSSIPercentage[1])); - if(Adapter->RxStats.RxRSSIPercentage[0] > Adapter->RxStats.RxRSSIPercentage[1]) - { - pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & (~BIT0); - MinRSSI = Adapter->RxStats.RxRSSIPercentage[1]; - DefaultRespPath = 0; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-0\n")); - } - else - { - pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT0; - MinRSSI = Adapter->RxStats.RxRSSIPercentage[0]; - DefaultRespPath = 1; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-1\n")); - } - //RT_TRACE( COMP_SWAS, DBG_LOUD, ("pDM_PDTable->OFDMTXPath =0x%x\n",pDM_PDTable->OFDMTXPath)); - } - //1 Extension Port - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { - if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); - else - pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); - - if(pEntry!=NULL) - { - if(pEntry->bAssociated) - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d, RSSI_0=%d, RSSI_1=%d\n", - pEntry->AID+1, pEntry->rssi_stat.RxRSSIPercentage[0], pEntry->rssi_stat.RxRSSIPercentage[1])); - - if(pEntry->rssi_stat.RxRSSIPercentage[0] > pEntry->rssi_stat.RxRSSIPercentage[1]) - { - pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & ~(BIT(pEntry->AID+1)); - //pHalData->TXPath = pHalData->TXPath & ~(1<<(pEntry->AID+1)); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-0\n", pEntry->AID+1)); - if(pEntry->rssi_stat.RxRSSIPercentage[1] < MinRSSI) - { - MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[1]; - DefaultRespPath = 0; - } - } - else - { - pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT(pEntry->AID+1); - //pHalData->TXPath = pHalData->TXPath | (1 << (pEntry->AID+1)); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-1\n", pEntry->AID+1)); - if(pEntry->rssi_stat.RxRSSIPercentage[0] < MinRSSI) - { - MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[0]; - DefaultRespPath = 1; - } - } - } - } - else - { - break; - } - } - - pDM_PDTable->OFDMDefaultRespPath = DefaultRespPath; -} - - -BOOLEAN -odm_IsConnected_92C( - IN struct adapter *Adapter -) -{ - PRT_WLAN_STA pEntry; - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - u4Byte i; - BOOLEAN bConnected=FALSE; - - if(pMgntInfo->mAssoc) - { - bConnected = TRUE; - } - else - { - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { - if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); - else - pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); - - if(pEntry!=NULL) - { - if(pEntry->bAssociated) - { - bConnected = TRUE; - break; - } - } - else - { - break; - } - } - } - return bConnected; -} - - -void -odm_ResetPathDiversity_92C( - IN struct adapter *Adapter -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - PRT_WLAN_STA pEntry; - u4Byte i; - - pHalData->RSSI_test = FALSE; - pDM_PDTable->CCK_Pkt_Cnt = 0; - pDM_PDTable->OFDM_Pkt_Cnt = 0; - pHalData->CCK_Pkt_Cnt =0; - pHalData->OFDM_Pkt_Cnt =0; - - if(pDM_PDTable->CCKPathDivEnable == TRUE) - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); //RX path = PathAB - - for(i=0; i<2; i++) - { - pDM_PDTable->RSSI_CCK_Path_cnt[i]=0; - pDM_PDTable->RSSI_CCK_Path[i] = 0; - } - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { - if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); - else - pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); - - if(pEntry!=NULL) - { - pEntry->rssi_stat.CCK_Pkt_Cnt = 0; - pEntry->rssi_stat.OFDM_Pkt_Cnt = 0; - for(i=0; i<2; i++) - { - pEntry->rssi_stat.RSSI_CCK_Path_cnt[i] = 0; - pEntry->rssi_stat.RSSI_CCK_Path[i] = 0; - } - } - else - break; - } -} - - -void -odm_CCKTXPathDiversity_92C( - IN struct adapter *Adapter -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - PRT_WLAN_STA pEntry; - s4Byte MinRSSI = 0xFF; - u1Byte i, DefaultRespPath = 0; -// BOOLEAN bBModePathDiv = FALSE; - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - - //1 Default Port - if(pMgntInfo->mAssoc) - { - if(pHalData->OFDM_Pkt_Cnt == 0) - { - for(i=0; i<2; i++) - { - if(pDM_PDTable->RSSI_CCK_Path_cnt[i] > 1) //Because the first packet is discarded - pDM_PDTable->RSSI_CCK_Path[i] = pDM_PDTable->RSSI_CCK_Path[i] / (pDM_PDTable->RSSI_CCK_Path_cnt[i]-1); - else - pDM_PDTable->RSSI_CCK_Path[i] = 0; - } - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path[0]=%d, pDM_PDTable->RSSI_CCK_Path[1]=%d\n", - pDM_PDTable->RSSI_CCK_Path[0], pDM_PDTable->RSSI_CCK_Path[1])); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path_cnt[0]=%d, pDM_PDTable->RSSI_CCK_Path_cnt[1]=%d\n", - pDM_PDTable->RSSI_CCK_Path_cnt[0], pDM_PDTable->RSSI_CCK_Path_cnt[1])); - - if(pDM_PDTable->RSSI_CCK_Path[0] > pDM_PDTable->RSSI_CCK_Path[1]) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); - MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; - DefaultRespPath = 0; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); - } - else if(pDM_PDTable->RSSI_CCK_Path[0] < pDM_PDTable->RSSI_CCK_Path[1]) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT0; - MinRSSI = pDM_PDTable->RSSI_CCK_Path[0]; - DefaultRespPath = 1; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-1\n")); - } - else - { - if((pDM_PDTable->RSSI_CCK_Path[0] != 0) && (pDM_PDTable->RSSI_CCK_Path[0] < MinRSSI)) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); - MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; - DefaultRespPath = 0; - } - else - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port unchange CCK Path\n")); - } - } - } - else //Follow OFDM decision - { - pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~BIT0)) | (pDM_PDTable->OFDMTXPath &BIT0); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, Default port Select CCK Path-%d\n", - pDM_PDTable->CCKTXPath &BIT0)); - } - } - //1 Extension Port - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { - if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); - else - pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); - - if(pEntry!=NULL) - { - if(pEntry->bAssociated) - { - if(pEntry->rssi_stat.OFDM_Pkt_Cnt == 0) - { - for(i=0; i<2; i++) - { - if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[i] > 1) - pEntry->rssi_stat.RSSI_CCK_Path[i] = pEntry->rssi_stat.RSSI_CCK_Path[i] / (pEntry->rssi_stat.RSSI_CCK_Path_cnt[i]-1); - else - pEntry->rssi_stat.RSSI_CCK_Path[i] = 0; - } - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d, RSSI_CCK0=%d, RSSI_CCK1=%d\n", - pEntry->AID+1, pEntry->rssi_stat.RSSI_CCK_Path[0], pEntry->rssi_stat.RSSI_CCK_Path[1])); - - if(pEntry->rssi_stat.RSSI_CCK_Path[0] >pEntry->rssi_stat.RSSI_CCK_Path[1]) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AID+1)); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AID+1)); - if(pEntry->rssi_stat.RSSI_CCK_Path[1] < MinRSSI) - { - MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; - DefaultRespPath = 0; - } - } - else if(pEntry->rssi_stat.RSSI_CCK_Path[0] rssi_stat.RSSI_CCK_Path[1]) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT(pEntry->AID+1); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-1\n", pEntry->AID+1)); - if(pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI) - { - MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[0]; - DefaultRespPath = 1; - } - } - else - { - if((pEntry->rssi_stat.RSSI_CCK_Path[0] != 0) && (pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI)) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AID+1)); - MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; - DefaultRespPath = 0; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AID+1)); - } - else - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d unchange CCK Path\n", pEntry->AID+1)); - } - } - } - else //Follow OFDM decision - { - pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~(BIT(pEntry->AID+1)))) | (pDM_PDTable->OFDMTXPath & BIT(pEntry->AID+1)); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, MACID=%d Select CCK Path-%d\n", - pEntry->AID+1, (pDM_PDTable->CCKTXPath & BIT(pEntry->AID+1))>>(pEntry->AID+1))); - } - } - } - else - { - break; - } - } - - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C:MinRSSI=%d\n",MinRSSI)); - - if(MinRSSI == 0xFF) - DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; - - pDM_PDTable->CCKDefaultRespPath = DefaultRespPath; -} - - - -void -odm_PathDiversityAfterLink_92C( - IN struct adapter *Adapter -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - u1Byte DefaultRespPath=0; - - if((!IS_92C_SERIAL(pHalData->VersionID)) || (pHalData->PathDivCfg != 1) || (pHalData->eRFPowerState == eRfOff)) - { - if(pHalData->PathDivCfg == 0) - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("No ODM_TXPathDiversity()\n")); - } - else - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("2T ODM_TXPathDiversity()\n")); - } - return; - } - if(!odm_IsConnected_92C(Adapter)) - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity(): No Connections\n")); - return; - } - - - if(pDM_PDTable->TrainingState == 0) - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity() ==>\n")); - odm_OFDMTXPathDiversity_92C(Adapter); - - if((pDM_PDTable->CCKPathDivEnable == TRUE) && (pDM_PDTable->OFDM_Pkt_Cnt < 100)) - { - //RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=0\n")); - - if(pDM_PDTable->CCK_Pkt_Cnt > 300) - pDM_PDTable->Timer = 20; - else if(pDM_PDTable->CCK_Pkt_Cnt > 100) - pDM_PDTable->Timer = 60; - else - pDM_PDTable->Timer = 250; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: timer=%d\n",pDM_PDTable->Timer)); - - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // RX path = PathA - pDM_PDTable->TrainingState = 1; - pHalData->RSSI_test = TRUE; - ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms - } - else - { - pDM_PDTable->CCKTXPath = pDM_PDTable->OFDMTXPath; - DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: Skip odm_CCKTXPathDiversity_92C, DefaultRespPath is OFDM\n")); - odm_SetRespPath_92C(Adapter, DefaultRespPath); - odm_ResetPathDiversity_92C(Adapter); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); - } - } - else if(pDM_PDTable->TrainingState == 1) - { - //RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=1\n")); - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // RX path = PathB - pDM_PDTable->TrainingState = 2; - ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms - } - else - { - //RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=2\n")); - pDM_PDTable->TrainingState = 0; - odm_CCKTXPathDiversity_92C(Adapter); - if(pDM_PDTable->OFDM_Pkt_Cnt != 0) - { - DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is OFDM\n")); - } - else - { - DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is CCK\n")); - } - odm_SetRespPath_92C(Adapter, DefaultRespPath); - odm_ResetPathDiversity_92C(Adapter); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); - } - -} - - - -void -odm_CCKTXPathDiversityCallback( - PRT_TIMER pTimer -) -{ -#if USE_WORKITEM - struct adapter *Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -#else - struct adapter *Adapter = (PADAPTER)pTimer->Adapter; -#endif - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE -#if USE_WORKITEM - PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); -#else - odm_PathDiversityAfterLink_92C(Adapter); -#endif -#else - PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); -#endif - -} - - -void -odm_CCKTXPathDiversityWorkItemCallback( - IN void * pContext - ) -{ - struct adapter *Adapter = (PADAPTER)pContext; - - odm_CCKTXPathDiversity_92C(Adapter); -} - - -void -ODM_CCKPathDiversityChkPerPktRssi( - struct adapter * Adapter, - BOOLEAN bIsDefPort, - BOOLEAN bMatchBSSID, - PRT_WLAN_STA pEntry, - PRT_RFD pRfd, - pu1Byte pDesc - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - BOOLEAN bCount = FALSE; - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - //BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE_92C(pDesc); -#if DEV_BUS_TYPE != RT_SDIO_INTERFACE - BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE(Adapter, pDesc); -#else //below code would be removed if we have verified SDIO - BOOLEAN isCCKrate = IS_HARDWARE_TYPE_8188E(Adapter) ? RX_HAL_IS_CCK_RATE_88E(pDesc) : RX_HAL_IS_CCK_RATE_92C(pDesc); -#endif - - if((pHalData->PathDivCfg != 1) || (pHalData->RSSI_test == FALSE)) - return; - - if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) - bCount = TRUE; - else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) - bCount = TRUE; - - if(bCount && isCCKrate) - { - if(pDM_PDTable->TrainingState == 1 ) - { - if(pEntry) - { - if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[0] != 0) - pEntry->rssi_stat.RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; - pEntry->rssi_stat.RSSI_CCK_Path_cnt[0]++; - } - else - { - if(pDM_PDTable->RSSI_CCK_Path_cnt[0] != 0) - pDM_PDTable->RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; - pDM_PDTable->RSSI_CCK_Path_cnt[0]++; - } - } - else if(pDM_PDTable->TrainingState == 2 ) - { - if(pEntry) - { - if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[1] != 0) - pEntry->rssi_stat.RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; - pEntry->rssi_stat.RSSI_CCK_Path_cnt[1]++; - } - else - { - if(pDM_PDTable->RSSI_CCK_Path_cnt[1] != 0) - pDM_PDTable->RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; - pDM_PDTable->RSSI_CCK_Path_cnt[1]++; - } - } - } -} - - -BOOLEAN -ODM_PathDiversityBeforeLink92C( - //IN struct adapter *Adapter - IN PDM_ODM_T pDM_Odm - ) -{ -#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) - struct adapter * Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE* pHalData = NULL; - PMGNT_INFO pMgntInfo = NULL; - //pSWAT_T pDM_SWAT_Table = &Adapter->DM_SWAT_Table; - pPD_T pDM_PDTable = NULL; - - s1Byte Score = 0; - PRT_WLAN_BSS pTmpBssDesc; - PRT_WLAN_BSS pTestBssDesc; - - u1Byte target_chnl = 0; - u1Byte index; - - if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 - { // The ODM structure is not initialized. - return FALSE; - } - pHalData = GET_HAL_DATA(Adapter); - pMgntInfo = &Adapter->MgntInfo; - pDM_PDTable = &Adapter->DM_PDTable; - - // Condition that does not need to use path diversity. - if((!IS_92C_SERIAL(pHalData->VersionID)) || (pHalData->PathDivCfg!=1) || pMgntInfo->AntennaTest ) - { - RT_TRACE(COMP_SWAS, DBG_LOUD, - ("ODM_PathDiversityBeforeLink92C(): No PathDiv Mechanism before link.\n")); - return FALSE; - } - - // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. - PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) - { - PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - - RT_TRACE(COMP_SWAS, DBG_LOUD, - ("ODM_PathDiversityBeforeLink92C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", - pMgntInfo->RFChangeInProgress, - pHalData->eRFPowerState)); - - //pDM_SWAT_Table->SWAS_NoLink_State = 0; - pDM_PDTable->PathDiv_NoLink_State = 0; - - return FALSE; - } - else - { - PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - } - - //1 Run AntDiv mechanism "Before Link" part. - //if(pDM_SWAT_Table->SWAS_NoLink_State == 0) - if(pDM_PDTable->PathDiv_NoLink_State == 0) - { - //1 Prepare to do Scan again to check current antenna state. - - // Set check state to next step. - //pDM_SWAT_Table->SWAS_NoLink_State = 1; - pDM_PDTable->PathDiv_NoLink_State = 1; - - // Copy Current Scan list. - Adapter->MgntInfo.tmpNumBssDesc = pMgntInfo->NumBssDesc; - PlatformMoveMemory((void *)Adapter->MgntInfo.tmpbssDesc, (void *)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); - - // Switch Antenna to another one. - if(pDM_PDTable->DefaultRespPath == 0) - { - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // TRX path = PathB - odm_SetRespPath_92C(Adapter, 1); - pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; - pDM_PDTable->CCKTXPath = 0xFFFFFFFF; - } - else - { - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // TRX path = PathA - odm_SetRespPath_92C(Adapter, 0); - pDM_PDTable->OFDMTXPath = 0x0; - pDM_PDTable->CCKTXPath = 0x0; - } - // Go back to scan function again. - RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Scan one more time\n")); - pMgntInfo->ScanStep=0; - target_chnl = odm_SwAntDivSelectChkChnl(Adapter); - odm_SwAntDivConsructChkScanChnl(Adapter, target_chnl); - HTReleaseChnlOpLock(Adapter); - PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); - - return TRUE; - } - else - { - //1 ScanComple() is called after antenna swiched. - //1 Check scan result and determine which antenna is going - //1 to be used. - - for(index=0; indexMgntInfo.tmpNumBssDesc; index++) - { - pTmpBssDesc = &(Adapter->MgntInfo.tmpbssDesc[index]); - pTestBssDesc = &(pMgntInfo->bssDesc[index]); - - if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) - { - RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C(): ERROR!! This shall not happen.\n")); - continue; - } - - if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) - { - RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score++\n")); - RT_PRINT_STR(COMP_SWAS, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); - RT_TRACE(COMP_SWAS, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - - Score++; - PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); - } - else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) - { - RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score--\n")); - RT_PRINT_STR(COMP_SWAS, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); - RT_TRACE(COMP_SWAS, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - Score--; - } - - } - - if(pMgntInfo->NumBssDesc!=0 && Score<=0) - { - RT_TRACE(COMP_SWAS, DBG_LOUD, - ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); - - //pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - } - else - { - RT_TRACE(COMP_SWAS, DBG_LOUD, - ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); - - if(pDM_PDTable->DefaultRespPath == 0) - { - pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; - pDM_PDTable->CCKTXPath = 0xFFFFFFFF; - odm_SetRespPath_92C(Adapter, 1); - } - else - { - pDM_PDTable->OFDMTXPath = 0x0; - pDM_PDTable->CCKTXPath = 0x0; - odm_SetRespPath_92C(Adapter, 0); - } - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); // RX path = PathAB - - //pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; - - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); - //pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); - } - - // Check state reset to default and wait for next time. - //pDM_SWAT_Table->SWAS_NoLink_State = 0; - pDM_PDTable->PathDiv_NoLink_State = 0; - - return FALSE; - } -#else - return FALSE; -#endif - -} - - -//Neil Chen---2011--06--22 -//----92D Path Diversity----// -//#ifdef PathDiv92D -//================================== -//3 Path Diversity -//================================== -// -// 20100514 Luke/Joseph: -// Add new function for antenna diversity after link. -// This is the main function of antenna diversity after link. -// This function is called in HalDmWatchDog() and ODM_SwAntDivChkAntSwitchCallback(). -// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. -// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. -// After 500ms, ODM_SwAntDivChkAntSwitchCallback() calls this function to compare the signal just -// listened on the air with the RSSI of original antenna. -// It chooses the antenna with better RSSI. -// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting -// penalty to get next try. -// -// -// 20100503 Joseph: -// Add new function SwAntDivCheck8192C(). -// This is the main function of Antenna diversity function before link. -// Mainly, it just retains last scan result and scan again. -// After that, it compares the scan result to see which one gets better RSSI. -// It selects antenna with better receiving power and returns better scan result. -// - - -// -// 20100514 Luke/Joseph: -// This function is used to gather the RSSI information for antenna testing. -// It selects the RSSI of the peer STA that we want to know. -// -void -ODM_PathDivChkPerPktRssi( - struct adapter * Adapter, - BOOLEAN bIsDefPort, - BOOLEAN bMatchBSSID, - PRT_WLAN_STA pEntry, - PRT_RFD pRfd - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - BOOLEAN bCount = FALSE; - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) - bCount = TRUE; - else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) - bCount = TRUE; - - if(bCount) - { - //1 RSSI for SW Antenna Switch - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - { - pHalData->RSSI_sum_A += pRfd->Status.RxPWDBAll; - pHalData->RSSI_cnt_A++; - } - else - { - pHalData->RSSI_sum_B += pRfd->Status.RxPWDBAll; - pHalData->RSSI_cnt_B++; - - } - } -} - - - -// -// 20100514 Luke/Joseph: -// Add new function to reset antenna diversity state after link. -// -void -ODM_PathDivRestAfterLink( - IN PDM_ODM_T pDM_Odm - ) -{ - struct adapter * Adapter=pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - pHalData->RSSI_cnt_A = 0; - pHalData->RSSI_cnt_B = 0; - pHalData->RSSI_test = FALSE; - pDM_SWAT_Table->try_flag = 0x0; // NOT 0xff - pDM_SWAT_Table->RSSI_Trying = 0; - pDM_SWAT_Table->SelectAntennaMap=0xAA; - pDM_SWAT_Table->CurAntenna = Antenna_A; -} - - -// -// 20100514 Luke/Joseph: -// Callback function for 500ms antenna test trying. -// -void -odm_PathDivChkAntSwitchCallback( - PRT_TIMER pTimer -) -{ - struct adapter * Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - -#if USE_WORKITEM - PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); -#else - odm_PathDivChkAntSwitch(pDM_Odm); -#endif -#else - PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); -#endif - -//odm_SwAntDivChkAntSwitch(Adapter, SWAW_STEP_DETERMINE); - -} - - -void -odm_PathDivChkAntSwitchWorkitemCallback( - IN void * pContext - ) -{ - struct adapter *pAdapter = (PADAPTER)pContext; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - odm_PathDivChkAntSwitch(pDM_Odm); -} - - - //MAC0_ACCESS_PHY1 - -// 2011-06-22 Neil Chen & Gary Hsin -// Refer to Jr.Luke's SW ANT DIV -// 92D Path Diversity Main function -// refer to 88C software antenna diversity -// -void -odm_PathDivChkAntSwitch( - PDM_ODM_T pDM_Odm - //struct adapter * Adapter, - //u1Byte Step -) -{ - struct adapter * Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - - - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - s4Byte curRSSI=100, RSSI_A, RSSI_B; - u1Byte nextAntenna=Antenna_B; - static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; - u8Byte curTxOkCnt, curRxOkCnt; - static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; - u8Byte CurByteCnt=0, PreByteCnt=0; - static u1Byte TrafficLoad = TRAFFIC_LOW; - u1Byte Score_A=0, Score_B=0; - u1Byte i=0x0; - // Neil Chen - static u1Byte pathdiv_para=0x0; - static u1Byte switchfirsttime=0x00; - // u1Byte regB33 = (u1Byte) PHY_QueryBBReg(Adapter, 0xB30,BIT27); - u1Byte regB33 = (u1Byte)ODM_GetBBReg(pDM_Odm, PATHDIV_REG, BIT27); - - - //u1Byte reg637 =0x0; - static u1Byte fw_value=0x0; - u1Byte n=0; - static u8Byte lastTxOkCnt_tmp=0, lastRxOkCnt_tmp=0; - //u8Byte curTxOkCnt_tmp, curRxOkCnt_tmp; - struct adapter * BuddyAdapter = Adapter->BuddyAdapter; // another adapter MAC - // Path Diversity //Neil Chen--2011--06--22 - - //u1Byte PathDiv_Trigger = (u1Byte) PHY_QueryBBReg(Adapter, 0xBA0,BIT31); - u1Byte PathDiv_Trigger = (u1Byte) ODM_GetBBReg(pDM_Odm, PATHDIV_TRI,BIT31); - u1Byte PathDiv_Enable = pHalData->bPathDiv_Enable; - - - //DbgPrint("Path Div PG Value:%x \n",PathDiv_Enable); - if((BuddyAdapter==NULL)||(!PathDiv_Enable)||(PathDiv_Trigger)||(pHalData->CurrentBandType92D == BAND_ON_2_4G)) - { - return; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD,("===================>odm_PathDivChkAntSwitch()\n")); - - // The first time to switch path excluding 2nd, 3rd, ....etc.... - if(switchfirsttime==0) - { - if(regB33==0) - { - pDM_SWAT_Table->CurAntenna = Antenna_A; // Default MAC0_5G-->Path A (current antenna) - } - } - - // Condition that does not need to use antenna diversity. - if(pDM_Odm->SupportICType != ODM_RTL8192D) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDiversityMechanims(): No PathDiv Mechanism.\n")); - return; - } - - // Radio off: Status reset to default and return. - if(pHalData->eRFPowerState==eRfOff) - { - //ODM_SwAntDivRestAfterLink(Adapter); - return; - } - - /* - // Handling step mismatch condition. - // Peak step is not finished at last time. Recover the variable and check again. - if( Step != pDM_SWAT_Table->try_flag ) - { - ODM_SwAntDivRestAfterLink(Adapter); - } */ - - if(pDM_SWAT_Table->try_flag == 0xff) - { - // Select RSSI checking target - if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) - { - // Target: Infrastructure mode AP. - pHalData->RSSI_target = NULL; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDivMechanism(): RSSI_target is DEF AP!\n")); - } - else - { - u1Byte index = 0; - PRT_WLAN_STA pEntry = NULL; - struct adapter * pTargetAdapter = NULL; - - if( pMgntInfo->mIbss || ACTING_AS_AP(Adapter) ) - { - // Target: AP/IBSS peer. - pTargetAdapter = Adapter; - } - else if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - { - // Target: VWIFI peer. - pTargetAdapter = GetFirstExtAdapter(Adapter); - } - - if(pTargetAdapter != NULL) - { - for(index=0; indexbAssociated) - break; - } - } - } - - if(pEntry == NULL) - { - ODM_PathDivRestAfterLink(pDM_Odm); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); - return; - } - else - { - pHalData->RSSI_target = pEntry; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); - } - } - - pHalData->RSSI_cnt_A = 0; - pHalData->RSSI_cnt_B = 0; - pDM_SWAT_Table->try_flag = 0; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): Set try_flag to 0 prepare for peak!\n")); - return; - } - else - { - // 1st step - curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; - curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; - lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; - lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; - - if(pDM_SWAT_Table->try_flag == 1) // Training State - { - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - { - TXByteCnt_A += curTxOkCnt; - RXByteCnt_A += curRxOkCnt; - } - else - { - TXByteCnt_B += curTxOkCnt; - RXByteCnt_B += curRxOkCnt; - } - - nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; - pDM_SWAT_Table->RSSI_Trying--; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying)); - if(pDM_SWAT_Table->RSSI_Trying == 0) - { - CurByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (TXByteCnt_A+RXByteCnt_A) : (TXByteCnt_B+RXByteCnt_B); - PreByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (TXByteCnt_B+RXByteCnt_B) : (TXByteCnt_A+RXByteCnt_A); - - if(TrafficLoad == TRAFFIC_HIGH) - { - //CurByteCnt = PlatformDivision64(CurByteCnt, 9); - PreByteCnt =PreByteCnt*9; - } - else if(TrafficLoad == TRAFFIC_LOW) - { - //CurByteCnt = PlatformDivision64(CurByteCnt, 2); - PreByteCnt =PreByteCnt*2; - } - if(pHalData->RSSI_cnt_A > 0) - RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; - else - RSSI_A = 0; - if(pHalData->RSSI_cnt_B > 0) - RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; - else - RSSI_B = 0; - curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; - pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_B : RSSI_A; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", - (pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"))); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", - RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); - } - - } - else // try_flag=0 - { - - if(pHalData->RSSI_cnt_A > 0) - RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; - else - RSSI_A = 0; - if(pHalData->RSSI_cnt_B > 0) - RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; - else - RSSI_B = 0; - curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; - pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == Antenna_A)? RSSI_A : RSSI_B; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", - (pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"))); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", - RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); - } - - //1 Trying State - if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) - { - - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = TP_MODE")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:CurByteCnt = %"i64fmt"d,", CurByteCnt)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:PreByteCnt = %"i64fmt"d\n",PreByteCnt)); - if(CurByteCnt < PreByteCnt) - { - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; - else - pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; - } - else - { - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; - else - pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; - } - for (i= 0; i<8; i++) - { - if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) - Score_A++; - else - Score_B++; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Score_A=%d, Score_B=%d\n", Score_A, Score_B)); - - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - { - nextAntenna = (Score_A >= Score_B)?Antenna_A:Antenna_B; - } - else - { - nextAntenna = (Score_B >= Score_A)?Antenna_B:Antenna_A; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: nextAntenna=%s\n",(nextAntenna==Antenna_A)?"A":"B")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: preAntenna= %s, curAntenna= %s \n", - (pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"))); - - if(nextAntenna != pDM_SWAT_Table->CurAntenna) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Switch back to another antenna")); - } - else - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: current anntena is good\n")); - } - } - - - if(pDM_SWAT_Table->TestMode == RSSI_MODE) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = RSSI_MODE")); - pDM_SWAT_Table->SelectAntennaMap=0xAA; - if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna - { - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: Switch back to another antenna")); - nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; - } - else // current anntena is good - { - nextAntenna =pDM_SWAT_Table->CurAntenna; - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: current anntena is good\n")); - } - } - - pDM_SWAT_Table->try_flag = 0; - pHalData->RSSI_test = FALSE; - pHalData->RSSI_sum_A = 0; - pHalData->RSSI_cnt_A = 0; - pHalData->RSSI_sum_B = 0; - pHalData->RSSI_cnt_B = 0; - TXByteCnt_A = 0; - TXByteCnt_B = 0; - RXByteCnt_A = 0; - RXByteCnt_B = 0; - - } - - //1 Normal State - else if(pDM_SWAT_Table->try_flag == 0) - { - if(TrafficLoad == TRAFFIC_HIGH) - { - if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) - TrafficLoad = TRAFFIC_HIGH; - else - TrafficLoad = TRAFFIC_LOW; - } - else if(TrafficLoad == TRAFFIC_LOW) - { - if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) - TrafficLoad = TRAFFIC_HIGH; - else - TrafficLoad = TRAFFIC_LOW; - } - if(TrafficLoad == TRAFFIC_HIGH) - pDM_SWAT_Table->bTriggerAntennaSwitch = 0; - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Normal:TrafficLoad = %llu\n", curTxOkCnt+curRxOkCnt)); - - //Prepare To Try Antenna - nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; - pDM_SWAT_Table->try_flag = 1; - pHalData->RSSI_test = TRUE; - if((curRxOkCnt+curTxOkCnt) > 1000) - { -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - pDM_SWAT_Table->RSSI_Trying = 4; -#else - pDM_SWAT_Table->RSSI_Trying = 2; -#endif - pDM_SWAT_Table->TestMode = TP_MODE; - } - else - { - pDM_SWAT_Table->RSSI_Trying = 2; - pDM_SWAT_Table->TestMode = RSSI_MODE; - - } - - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: Normal State -> Begin Trying!\n")); - pHalData->RSSI_sum_A = 0; - pHalData->RSSI_cnt_A = 0; - pHalData->RSSI_sum_B = 0; - pHalData->RSSI_cnt_B = 0; - } // end of try_flag=0 - } - - //1 4.Change TRX antenna - if(nextAntenna != pDM_SWAT_Table->CurAntenna) - { - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Change TX Antenna!\n ")); - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, nextAntenna); for 88C - if(nextAntenna==Antenna_A) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH A\n ")); - pathdiv_para = 0x02; //02 to switchback to RF path A - fw_value = 0x03; -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); -#else - ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); -#endif - } - else if(nextAntenna==Antenna_B) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH B\n ")); - if(switchfirsttime==0) // First Time To Enter Path Diversity - { - switchfirsttime=0x01; - pathdiv_para = 0x00; - fw_value=0x00; // to backup RF Path A Releated Registers - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); -#else - ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); - //for(u1Byte n=0; n<80,n++) - //{ - //delay_us(500); - ODM_delay_ms(500); - odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); - - fw_value=0x01; // to backup RF Path A Releated Registers - ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: FIRST TIME To DO PATH SWITCH!\n ")); - } - else - { - pathdiv_para = 0x01; - fw_value = 0x02; -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); -#else - ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); -#endif - } - } - // odm_PathDiversity_8192D(Adapter, pathdiv_para); - } - - //1 5.Reset Statistics - pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - pDM_SWAT_Table->CurAntenna = nextAntenna; - pDM_SWAT_Table->PreRSSI = curRSSI; - //lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; - //lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; - - //1 6.Set next timer - - if(pDM_SWAT_Table->RSSI_Trying == 0) - return; - - if(pDM_SWAT_Table->RSSI_Trying%2 == 0) - { - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - if(TrafficLoad == TRAFFIC_HIGH) - { -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 10 ); //ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 10 ms\n")); -#else - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 20 ); //ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 20 ms\n")); -#endif - } - else if(TrafficLoad == TRAFFIC_LOW) - { - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 50 ); //ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 50 ms\n")); - } - } - else // TestMode == RSSI_MODE - { - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 500 ms\n")); - } - } - else - { - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - if(TrafficLoad == TRAFFIC_HIGH) - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 90 ); //ms - //ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 90 ms\n")); -#else - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 180); //ms -#endif - else if(TrafficLoad == TRAFFIC_LOW) - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 100 ); //ms - } - else - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms - } -} - -//================================================== -//3 PathDiv End -//================================================== - -void -odm_SetRespPath_92C( - IN struct adapter *Adapter, - IN u1Byte DefaultRespPath - ) -{ - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: Select Response Path=%d\n",DefaultRespPath)); - if(DefaultRespPath != pDM_PDTable->DefaultRespPath) - { - if(DefaultRespPath == 0) - { - PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x15); - } - else - { - PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x2A); - } - } - pDM_PDTable->DefaultRespPath = DefaultRespPath; -} - - -void -ODM_FillTXPathInTXDESC( - IN struct adapter *Adapter, - IN PRT_TCB pTcb, - IN pu1Byte pDesc -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u4Byte TXPath; - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - - //2011.09.05 Add by Luke Lee for path diversity - if(pHalData->PathDivCfg == 1) - { - TXPath = (pDM_PDTable->OFDMTXPath >> pTcb->macId) & BIT0; - //RT_TRACE( COMP_SWAS, DBG_LOUD, ("Fill TXDESC: macID=%d, TXPath=%d\n", pTcb->macId, TXPath)); - //SET_TX_DESC_TX_ANT_CCK(pDesc,TXPath); - if(TXPath == 0) - { - SET_TX_DESC_TX_ANTL_92C(pDesc,1); - SET_TX_DESC_TX_ANT_HT_92C(pDesc,1); - } - else - { - SET_TX_DESC_TX_ANTL_92C(pDesc,2); - SET_TX_DESC_TX_ANT_HT_92C(pDesc,2); - } - TXPath = (pDM_PDTable->CCKTXPath >> pTcb->macId) & BIT0; - if(TXPath == 0) - { - SET_TX_DESC_TX_ANT_CCK_92C(pDesc,1); - } - else - { - SET_TX_DESC_TX_ANT_CCK_92C(pDesc,2); - } - } -} - -//Only for MP //Neil Chen--2012--0502-- -void -odm_PathDivInit( -IN PDM_ODM_T pDM_Odm) -{ - pPATHDIV_PARA pathIQK = &pDM_Odm->pathIQK; - - pathIQK->org_2g_RegC14=0x0; - pathIQK->org_2g_RegC4C=0x0; - pathIQK->org_2g_RegC80=0x0; - pathIQK->org_2g_RegC94=0x0; - pathIQK->org_2g_RegCA0=0x0; - pathIQK->org_5g_RegC14=0x0; - pathIQK->org_5g_RegCA0=0x0; - pathIQK->org_5g_RegE30=0x0; - pathIQK->swt_2g_RegC14=0x0; - pathIQK->swt_2g_RegC4C=0x0; - pathIQK->swt_2g_RegC80=0x0; - pathIQK->swt_2g_RegC94=0x0; - pathIQK->swt_2g_RegCA0=0x0; - pathIQK->swt_5g_RegC14=0x0; - pathIQK->swt_5g_RegCA0=0x0; - pathIQK->swt_5g_RegE30=0x0; - -} -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -#if ((DM_ODM_SUPPORT_TYPE == ODM_MP)||(DM_ODM_SUPPORT_TYPE == ODM_CE)) - - // // Description: // Set Single/Dual Antenna default setting for products that do not do detection in advance. @@ -11998,10 +5350,6 @@ ODM_SingleDualAntennaDetection( } - -#endif // end odm_CE - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) /* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */ void odm_dtc(PDM_ODM_T pDM_Odm) { @@ -12061,5 +5409,3 @@ void odm_dtc(PDM_ODM_T pDM_Odm) __func__, pDM_Odm->RSSI_Min, sign?"minus":"plus", dtc_steps); #endif /* CONFIG_RESP_TXAGC_ADJUST */ } - -#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */ diff --git a/hal/odm_HWConfig.c b/hal/odm_HWConfig.c index 1f0da2c..f0e5518 100755 --- a/hal/odm_HWConfig.c +++ b/hal/odm_HWConfig.c @@ -71,52 +71,6 @@ odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo( ) { s4Byte RetSig; -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - //if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) - { - // Step 1. Scale mapping. - // 20100611 Joseph: Re-tunning RSSI presentation for Lenovo. - // 20100426 Joseph: Modify Signal strength mapping. - // This modification makes the RSSI indication similar to Intel solution. - // 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE. - if(CurrSig >= 54 && CurrSig <= 100) - { - RetSig = 100; - } - else if(CurrSig>=42 && CurrSig <= 53 ) - { - RetSig = 95; - } - else if(CurrSig>=36 && CurrSig <= 41 ) - { - RetSig = 74 + ((CurrSig - 36) *20)/6; - } - else if(CurrSig>=33 && CurrSig <= 35 ) - { - RetSig = 65 + ((CurrSig - 33) *8)/2; - } - else if(CurrSig>=18 && CurrSig <= 32 ) - { - RetSig = 62 + ((CurrSig - 18) *2)/15; - } - else if(CurrSig>=15 && CurrSig <= 17 ) - { - RetSig = 33 + ((CurrSig - 15) *28)/2; - } - else if(CurrSig>=10 && CurrSig <= 14 ) - { - RetSig = 39; - } - else if(CurrSig>=8 && CurrSig <= 9 ) - { - RetSig = 33; - } - else if(CurrSig <= 8 ) - { - RetSig = 19; - } - } -#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_MP) return RetSig; } @@ -127,56 +81,6 @@ odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore( ) { s4Byte RetSig; -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - //if(pDM_Odm->SupportInterface == ODM_ITRF_USB) - { - // Netcore request this modification because 2009.04.13 SU driver use it. - if(CurrSig >= 31 && CurrSig <= 100) - { - RetSig = 100; - } - else if(CurrSig >= 21 && CurrSig <= 30) - { - RetSig = 90 + ((CurrSig - 20) / 1); - } - else if(CurrSig >= 11 && CurrSig <= 20) - { - RetSig = 80 + ((CurrSig - 10) / 1); - } - else if(CurrSig >= 7 && CurrSig <= 10) - { - RetSig = 69 + (CurrSig - 7); - } - else if(CurrSig == 6) - { - RetSig = 54; - } - else if(CurrSig == 5) - { - RetSig = 45; - } - else if(CurrSig == 4) - { - RetSig = 36; - } - else if(CurrSig == 3) - { - RetSig = 27; - } - else if(CurrSig == 2) - { - RetSig = 18; - } - else if(CurrSig == 1) - { - RetSig = 9; - } - else - { - RetSig = CurrSig; - } - } -#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_MP) return RetSig; } @@ -308,39 +212,6 @@ static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo( ) { u1Byte SQ; -#if (DM_ODM_SUPPORT_TYPE & ODM_MP) - // mapping to 5 bars for vista signal strength - // signal quality in driver will be displayed to signal strength - if(isCCKrate){ - // in vista. - if(PWDB_ALL >= 50) - SQ = 100; - else if(PWDB_ALL >= 35 && PWDB_ALL < 50) - SQ = 80; - else if(PWDB_ALL >= 22 && PWDB_ALL < 35) - SQ = 60; - else if(PWDB_ALL >= 18 && PWDB_ALL < 22) - SQ = 40; - else - SQ = 20; - } - else{//OFDM rate - - // mapping to 5 bars for vista signal strength - // signal quality in driver will be displayed to signal strength - // in vista. - if(RSSI >= 50) - SQ = 100; - else if(RSSI >= 35 && RSSI < 50) - SQ = 80; - else if(RSSI >= 22 && RSSI < 35) - SQ = 60; - else if(RSSI >= 18 && RSSI < 22) - SQ = 40; - else - SQ = 20; - } -#endif return SQ; } @@ -554,10 +425,8 @@ odm_RxPhyStatus92CSeries_Parsing( } pPhyInfo->RxPWDBAll = PWDB_ALL; -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) pPhyInfo->BTRxRSSIPercentage = PWDB_ALL; pPhyInfo->RecvSignalPower = rx_pwr_all; -#endif // // (3) Get Signal Quality (EVM) // @@ -607,9 +476,7 @@ odm_RxPhyStatus92CSeries_Parsing( rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110; - #if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) pPhyInfo->RxPwr[i] = rx_pwr[i]; - #endif /* Translate DBM to percentage. */ RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); @@ -630,10 +497,8 @@ odm_RxPhyStatus92CSeries_Parsing( pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI; - #if (DM_ODM_SUPPORT_TYPE & (/*ODM_MP|*/ODM_CE|ODM_AP|ODM_ADSL)) //Get Rx snr value in DB pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2); - #endif /* Record Signal Strength for next packet */ if(pPktinfo->bPacketMatchBSSID) @@ -653,23 +518,17 @@ odm_RxPhyStatus92CSeries_Parsing( // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) // rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1 )& 0x7f) -110; - //RTPRINT(FRX, RX_PHY_SS, ("PWDB_ALL=%d\n", PWDB_ALL)); PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); - //RTPRINT(FRX, RX_PHY_SS, ("PWDB_ALL=%d\n",PWDB_ALL)); pPhyInfo->RxPWDBAll = PWDB_ALL; - //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll)); - #if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT; pPhyInfo->RxPower = rx_pwr_all; pPhyInfo->RecvSignalPower = rx_pwr_all; - #endif if((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)){ //do nothing - } - else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo + } else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo // // (3)EVM of HT rate // @@ -678,8 +537,7 @@ odm_RxPhyStatus92CSeries_Parsing( else Max_spatial_stream = 1; //only spatial stream 1 makes sense - for(i=0; i>= 1" because the compilor of free build environment // fill most significant bit to "zero" when doing shifting operation which may change a negative // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. @@ -700,31 +558,19 @@ odm_RxPhyStatus92CSeries_Parsing( } } -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) //UI BSS List signal strength(in percentage), make it good looking, from 0~100. //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). if(isCCKrate) { -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ - pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));//PWDB_ALL; -#else pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));//PWDB_ALL; -#endif } else { if (rf_rx_num != 0) { -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ - pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));//PWDB_ALL; -#else pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num)); -#endif } } -#endif //For 92C/92D HW (Hybrid) Antenna Diversity #if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) diff --git a/hal/odm_RegConfig8188E.c b/hal/odm_RegConfig8188E.c index 9e5caf1..057800f 100755 --- a/hal/odm_RegConfig8188E.c +++ b/hal/odm_RegConfig8188E.c @@ -139,28 +139,20 @@ odm_ConfigBB_PHY_REG_PG_8188E( #else ODM_delay_ms(50); #endif - } - else if (Addr == 0xfd){ + } else if (Addr == 0xfd){ ODM_delay_ms(5); - } - else if (Addr == 0xfc){ + } else if (Addr == 0xfc){ ODM_delay_ms(1); - } - else if (Addr == 0xfb){ + } else if (Addr == 0xfb){ ODM_delay_us(50); - } - else if (Addr == 0xfa){ + } else if (Addr == 0xfa){ ODM_delay_us(5); - } - else if (Addr == 0xf9){ + } else if (Addr == 0xf9){ ODM_delay_us(1); - } - else{ + } else{ ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, ("===> @@@@@@@ ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data)); - #if !(DM_ODM_SUPPORT_TYPE&ODM_AP) storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data); - #endif } } diff --git a/hal/odm_debug.h b/hal/odm_debug.h index 4c32f40..426a848 100755 --- a/hal/odm_debug.h +++ b/hal/odm_debug.h @@ -96,16 +96,8 @@ #define ODM_COMP_INIT BIT31 /*------------------------Export Marco Definition---------------------------*/ -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -#define RT_PRINTK DbgPrint -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #define DbgPrint printk #define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args); -#else - #define DbgPrint panic_printk -#define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args); -#endif - #ifndef ASSERT #define ASSERT(expr) #endif diff --git a/hal/odm_precomp.h b/hal/odm_precomp.h index a09943d..a59a6c1 100755 --- a/hal/odm_precomp.h +++ b/hal/odm_precomp.h @@ -23,82 +23,19 @@ #include "odm_types.h" -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -#include "Precomp.h" // We need to include mp_precomp.h due to batch file setting. - -#else - #define TEST_FALG___ 1 -#endif - //2 Config Flags and Structs - defined by each ODM Type -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - #include "../8192cd_cfg.h" - #include "../odm_inc.h" - - #include "../8192cd.h" - #include "../8192cd_util.h" - #ifdef _BIG_ENDIAN_ - #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG - #else - #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE - #endif - - #ifdef AP_BUILD_WORKAROUND - #include "../8192cd_headers.h" - #include "../8192cd_debug.h" - #endif - -#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL) - // Flags - #include "../8192cd_cfg.h" // OUTSRC needs ADSL config flags. - #include "../odm_inc.h" // OUTSRC needs some extra flags. - // Data Structure - #include "../common_types.h" // OUTSRC and rtl8192cd both needs basic type such as UINT8 and BIT0. - #include "../8192cd.h" // OUTSRC needs basic ADSL struct definition. - #include "../8192cd_util.h" // OUTSRC needs basic I/O function. - #ifdef _BIG_ENDIAN_ - #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG - #else - #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE - #endif - - #ifdef ADSL_AP_BUILD_WORKAROUND - // NESTED_INC: Functions defined outside should not be included!! Marked by Annie, 2011-10-14. - #include "../8192cd_headers.h" - #include "../8192cd_debug.h" - #endif - -#elif (DM_ODM_SUPPORT_TYPE ==ODM_CE) #include #include #include #include #include -#elif (DM_ODM_SUPPORT_TYPE == ODM_MP) - #include "Mp_Precomp.h" - #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE -#endif - //2 Hardware Parameter Files - -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -#if (RTL8192C_SUPPORT==1) - #include "rtl8192c/Hal8192CEFWImg_AP.h" - #include "rtl8192c/Hal8192CEPHYImg_AP.h" - #include "rtl8192c/Hal8192CEMACImg_AP.h" -#endif -#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL) - #include "rtl8192c/Hal8192CEFWImg_ADSL.h" - #include "rtl8192c/Hal8192CEPHYImg_ADSL.h" - #include "rtl8192c/Hal8192CEMACImg_ADSL.h" - -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #if(RTL8192CE_SUPPORT ==1) #include "rtl8192c/Hal8192CEFWImg_CE.h" #include "rtl8192c/Hal8192CEPHYImg_CE.h" @@ -122,10 +59,6 @@ #elif(RTL8188E_SUPPORT==1) #include "Hal8188EFWImg_CE.h" #endif -#elif (DM_ODM_SUPPORT_TYPE == ODM_MP) - -#endif - //2 OutSrc Header Files @@ -135,18 +68,6 @@ #include "odm_RegDefine11AC.h" #include "odm_RegDefine11N.h" -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -#if (RTL8192C_SUPPORT==1) - #include "rtl8192c/HalDMOutSrc8192C_AP.h" -#endif -#if (RTL8188E_SUPPORT==1) - #include "rtl8188e/Hal8188ERateAdaptive.h"//for RA,Power training -#endif - -#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL) - #include "rtl8192c/HalDMOutSrc8192C_ADSL.h" - -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #include "HalPhyRf.h" #if (RTL8192C_SUPPORT==1) #ifdef CONFIG_INTEL_PROXIM @@ -166,8 +87,6 @@ #include "rtl8188e_hal.h" #endif -#endif - #include "odm_interface.h" #include "odm_reg.h" @@ -176,10 +95,6 @@ #include "HalHWImg8188E_BB.h" #include "Hal8188EReg.h" -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) -#include "HalPhyRf_8188e.h" -#endif - #if (RTL8188E_FOR_TEST_CHIP >= 1) #include "HalHWImg8188E_TestChip_MAC.h" #include "HalHWImg8188E_TestChip_RF.h" diff --git a/hal/odm_types.h b/hal/odm_types.h index 5369655..95dc93d 100755 --- a/hal/odm_types.h +++ b/hal/odm_types.h @@ -28,8 +28,6 @@ #define ODM_CE 0x04 //BIT2 #define ODM_MP 0x08 //BIT3 -#define DM_ODM_SUPPORT_TYPE ODM_CE - // Deifne HW endian support #define ODM_ENDIAN_BIG 0 #define ODM_ENDIAN_LITTLE 1