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rtl8188eu: Remove code that is used for DM_ODM_SUPPORT_TYPE other than ODM_CE
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
9bfd2a3556
commit
3fc952a0d5
12 changed files with 20 additions and 13838 deletions
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@ -22,7 +22,6 @@
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#include "mp_precomp.h"
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#include "mp_precomp.h"
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#include "phydm_precomp.h"
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#include "phydm_precomp.h"
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#if (RTL8188E_SUPPORT == 1)
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static bool
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static bool
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check_positive(
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check_positive(
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struct PHY_DM_STRUCT *p_dm_odm,
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struct PHY_DM_STRUCT *p_dm_odm,
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@ -726,126 +725,22 @@ odm_get_version_mp_8188e_radioa(void)
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* TxPowerTrack_AP.TXT
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* TxPowerTrack_AP.TXT
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******************************************************************************/
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******************************************************************************/
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#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
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u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_ap_8188e[][DELTA_SWINGIDX_SIZE] = {
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{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
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{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
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{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
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};
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u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_ap_8188e[][DELTA_SWINGIDX_SIZE] = {
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{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
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{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
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{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
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};
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u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_ap_8188e[][DELTA_SWINGIDX_SIZE] = {
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{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
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{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
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{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
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};
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u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_ap_8188e[][DELTA_SWINGIDX_SIZE] = {
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{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
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{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
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{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
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};
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u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_ap_8188e[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11};
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u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_ap_8188e[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9};
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u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_ap_8188e[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11};
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u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_ap_8188e[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9};
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u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_ap_8188e[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11};
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u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_ap_8188e[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9};
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u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_ap_8188e[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11};
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u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_ap_8188e[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9};
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#endif
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void
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void
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odm_read_and_config_mp_8188e_txpowertrack_ap(
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odm_read_and_config_mp_8188e_txpowertrack_ap(
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struct PHY_DM_STRUCT *p_dm_odm
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struct PHY_DM_STRUCT *p_dm_odm
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)
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)
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{
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{
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#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
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struct odm_rf_calibration_structure *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8188E\n"));
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_ap_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_ap_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_ap_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_ap_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_ap_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_ap_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_ap_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_ap_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_ap_8188e, DELTA_SWINGIDX_SIZE * 3);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_ap_8188e, DELTA_SWINGIDX_SIZE * 3);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_ap_8188e, DELTA_SWINGIDX_SIZE * 3);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_ap_8188e, DELTA_SWINGIDX_SIZE * 3);
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#endif
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}
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}
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/******************************************************************************
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/******************************************************************************
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* TxPowerTrack_PCIE.TXT
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* TxPowerTrack_PCIE.TXT
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******************************************************************************/
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******************************************************************************/
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#if DEV_BUS_TYPE == RT_PCI_INTERFACE
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u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_pcie_8188e[][DELTA_SWINGIDX_SIZE] = {
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{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
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{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
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{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
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};
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u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_pcie_8188e[][DELTA_SWINGIDX_SIZE] = {
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{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
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{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
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{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
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};
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u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_pcie_8188e[][DELTA_SWINGIDX_SIZE] = {
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{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
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{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
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{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
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};
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u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_pcie_8188e[][DELTA_SWINGIDX_SIZE] = {
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{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
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{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
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{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
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};
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u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_pcie_8188e[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
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u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_pcie_8188e[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8};
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u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_pcie_8188e[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
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u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_pcie_8188e[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8};
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u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_pcie_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
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u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_pcie_8188e[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7};
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u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_pcie_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
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u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_pcie_8188e[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7};
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#endif
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void
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void
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odm_read_and_config_mp_8188e_txpowertrack_pcie(
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odm_read_and_config_mp_8188e_txpowertrack_pcie(
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struct PHY_DM_STRUCT *p_dm_odm
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struct PHY_DM_STRUCT *p_dm_odm
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)
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)
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{
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{
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#if DEV_BUS_TYPE == RT_PCI_INTERFACE
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struct odm_rf_calibration_structure *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8188E\n"));
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_pcie_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_pcie_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_pcie_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_pcie_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_pcie_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_pcie_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_pcie_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_pcie_8188e, DELTA_SWINGIDX_SIZE);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_pcie_8188e, DELTA_SWINGIDX_SIZE * 3);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_pcie_8188e, DELTA_SWINGIDX_SIZE * 3);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_pcie_8188e, DELTA_SWINGIDX_SIZE * 3);
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odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_pcie_8188e, DELTA_SWINGIDX_SIZE * 3);
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#endif
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}
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}
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/******************************************************************************
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/******************************************************************************
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}
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}
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}
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}
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#endif /* end of HWIMG_SUPPORT*/
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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||||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
||||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
||||||
* more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License along with
|
|
||||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
|
||||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
|
||||||
*
|
|
||||||
*
|
|
||||||
******************************************************************************/
|
|
||||||
|
|
||||||
/*Image2HeaderVersion: 2.16*/
|
|
||||||
#if (RTL8188E_S_SUPPORT == 1)
|
|
||||||
#ifndef __INC_MP_FW_HW_IMG_8188E_S_H
|
|
||||||
#define __INC_MP_FW_HW_IMG_8188E_S_H
|
|
||||||
|
|
||||||
|
|
||||||
/******************************************************************************
|
|
||||||
* FW_AP.TXT
|
|
||||||
******************************************************************************/
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_read_firmware_mp_8188e_s_fw_ap(
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
u8 *p_firmware,
|
|
||||||
u32 *p_firmware_size
|
|
||||||
);
|
|
||||||
|
|
||||||
/******************************************************************************
|
|
||||||
* FW_NIC.TXT
|
|
||||||
******************************************************************************/
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_read_firmware_mp_8188e_s_fw_nic(
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
u8 *p_firmware,
|
|
||||||
u32 *p_firmware_size
|
|
||||||
);
|
|
||||||
|
|
||||||
/******************************************************************************
|
|
||||||
* FW_WoWLAN.TXT
|
|
||||||
******************************************************************************/
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_read_firmware_mp_8188e_s_fw_wowlan(
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
u8 *p_firmware,
|
|
||||||
u32 *p_firmware_size
|
|
||||||
);
|
|
||||||
|
|
||||||
#endif
|
|
||||||
#endif /* end of HWIMG_SUPPORT*/
|
|
||||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,72 +0,0 @@
|
||||||
/******************************************************************************
|
|
||||||
*
|
|
||||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify it
|
|
||||||
* under the terms of version 2 of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
|
||||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
||||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
||||||
* more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License along with
|
|
||||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
|
||||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
|
||||||
*
|
|
||||||
*
|
|
||||||
******************************************************************************/
|
|
||||||
|
|
||||||
/*Image2HeaderVersion: 2.16*/
|
|
||||||
#if (RTL8188E_T_SUPPORT == 1)
|
|
||||||
#ifndef __INC_MP_FW_HW_IMG_8188E_T_H
|
|
||||||
#define __INC_MP_FW_HW_IMG_8188E_T_H
|
|
||||||
|
|
||||||
|
|
||||||
/******************************************************************************
|
|
||||||
* FW_AP.TXT
|
|
||||||
******************************************************************************/
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_read_firmware_mp_8188e_t_fw_ap(
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
u8 *p_firmware,
|
|
||||||
u32 *p_firmware_size
|
|
||||||
);
|
|
||||||
|
|
||||||
/******************************************************************************
|
|
||||||
* FW_NIC.TXT
|
|
||||||
******************************************************************************/
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_read_firmware_mp_8188e_t_fw_nic(
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
u8 *p_firmware,
|
|
||||||
u32 *p_firmware_size
|
|
||||||
);
|
|
||||||
|
|
||||||
/******************************************************************************
|
|
||||||
* FW_NIC_89EM.TXT
|
|
||||||
******************************************************************************/
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_read_firmware_mp_8188e_t_fw_nic_89e_m(
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
u8 *p_firmware,
|
|
||||||
u32 *p_firmware_size
|
|
||||||
);
|
|
||||||
|
|
||||||
/******************************************************************************
|
|
||||||
* FW_WoWLAN.TXT
|
|
||||||
******************************************************************************/
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_read_firmware_mp_8188e_t_fw_wowlan(
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
u8 *p_firmware,
|
|
||||||
u32 *p_firmware_size
|
|
||||||
);
|
|
||||||
|
|
||||||
#endif
|
|
||||||
#endif /* end of HWIMG_SUPPORT*/
|
|
||||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,135 +0,0 @@
|
||||||
/******************************************************************************
|
|
||||||
*
|
|
||||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify it
|
|
||||||
* under the terms of version 2 of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
|
||||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
||||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
||||||
* more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License along with
|
|
||||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
|
||||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
|
||||||
*
|
|
||||||
*
|
|
||||||
******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef __HAL_PHY_RF_8188E_H__
|
|
||||||
#define __HAL_PHY_RF_8188E_H__
|
|
||||||
|
|
||||||
/*--------------------------Define Parameters-------------------------------*/
|
|
||||||
#define IQK_DELAY_TIME_88E 10 /* ms */
|
|
||||||
#define index_mapping_NUM_88E 15
|
|
||||||
#define AVG_THERMAL_NUM_88E 4
|
|
||||||
|
|
||||||
#include "../halphyrf_ap.h"
|
|
||||||
|
|
||||||
void configure_txpower_track_8188e(
|
|
||||||
struct _TXPWRTRACK_CFG *p_config
|
|
||||||
);
|
|
||||||
|
|
||||||
void do_iqk_8188e(
|
|
||||||
void *p_dm_void,
|
|
||||||
u8 delta_thermal_index,
|
|
||||||
u8 thermal_value,
|
|
||||||
u8 threshold
|
|
||||||
);
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_tx_pwr_track_set_pwr88_e(
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
enum pwrtrack_method method,
|
|
||||||
u8 rf_path,
|
|
||||||
u8 channel_mapped_index
|
|
||||||
);
|
|
||||||
|
|
||||||
/* 1 7. IQK */
|
|
||||||
|
|
||||||
void
|
|
||||||
phy_iq_calibrate_8188e(
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
#else
|
|
||||||
struct _ADAPTER *adapter,
|
|
||||||
#endif
|
|
||||||
bool is_recovery);
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* LC calibrate
|
|
||||||
* */
|
|
||||||
void
|
|
||||||
phy_lc_calibrate_8188e(
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm
|
|
||||||
#else
|
|
||||||
struct _ADAPTER *p_adapter
|
|
||||||
#endif
|
|
||||||
);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* AP calibrate
|
|
||||||
* */
|
|
||||||
void
|
|
||||||
phy_ap_calibrate_8188e(
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
#else
|
|
||||||
struct _ADAPTER *p_adapter,
|
|
||||||
#endif
|
|
||||||
s8 delta);
|
|
||||||
void
|
|
||||||
phy_digital_predistortion_8188e(struct _ADAPTER *p_adapter);
|
|
||||||
|
|
||||||
|
|
||||||
void
|
|
||||||
_phy_save_adda_registers(
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
#else
|
|
||||||
struct _ADAPTER *p_adapter,
|
|
||||||
#endif
|
|
||||||
u32 *adda_reg,
|
|
||||||
u32 *adda_backup,
|
|
||||||
u32 register_num
|
|
||||||
);
|
|
||||||
|
|
||||||
void
|
|
||||||
_phy_path_adda_on(
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
#else
|
|
||||||
struct _ADAPTER *p_adapter,
|
|
||||||
#endif
|
|
||||||
u32 *adda_reg,
|
|
||||||
bool is_path_a_on,
|
|
||||||
bool is2T
|
|
||||||
);
|
|
||||||
|
|
||||||
void
|
|
||||||
_phy_mac_setting_calibration(
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
#else
|
|
||||||
struct _ADAPTER *p_adapter,
|
|
||||||
#endif
|
|
||||||
u32 *mac_reg,
|
|
||||||
u32 *mac_backup
|
|
||||||
);
|
|
||||||
|
|
||||||
|
|
||||||
void
|
|
||||||
_phy_path_a_stand_by(
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm
|
|
||||||
#else
|
|
||||||
struct _ADAPTER *p_adapter
|
|
||||||
#endif
|
|
||||||
);
|
|
||||||
|
|
||||||
|
|
||||||
#endif /* #ifndef __HAL_PHY_RF_8188E_H__ */
|
|
||||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,143 +0,0 @@
|
||||||
/******************************************************************************
|
|
||||||
*
|
|
||||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify it
|
|
||||||
* under the terms of version 2 of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
|
||||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
||||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
||||||
* more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License along with
|
|
||||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
|
||||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
|
||||||
*
|
|
||||||
*
|
|
||||||
******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef __HAL_PHY_RF_8188E_H__
|
|
||||||
#define __HAL_PHY_RF_8188E_H__
|
|
||||||
|
|
||||||
/*--------------------------Define Parameters-------------------------------*/
|
|
||||||
#define IQK_DELAY_TIME_88E 15 /* ms */
|
|
||||||
#define IQK_DELAY_TIME_8723B 10 /* ms */
|
|
||||||
|
|
||||||
#define index_mapping_NUM_88E 15
|
|
||||||
#define AVG_THERMAL_NUM_88E 4
|
|
||||||
|
|
||||||
#include "halphyrf_win.h"
|
|
||||||
|
|
||||||
void configure_txpower_track_8188e(
|
|
||||||
struct _TXPWRTRACK_CFG *p_config
|
|
||||||
);
|
|
||||||
|
|
||||||
void
|
|
||||||
get_delta_swing_table_8188e(
|
|
||||||
void *p_dm_void,
|
|
||||||
u8 **temperature_up_a,
|
|
||||||
u8 **temperature_down_a,
|
|
||||||
u8 **temperature_up_b,
|
|
||||||
u8 **temperature_down_b
|
|
||||||
);
|
|
||||||
|
|
||||||
void do_iqk_8188e(
|
|
||||||
void *p_dm_void,
|
|
||||||
u8 delta_thermal_index,
|
|
||||||
u8 thermal_value,
|
|
||||||
u8 threshold
|
|
||||||
);
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_tx_pwr_track_set_pwr88_e(
|
|
||||||
void *p_dm_void,
|
|
||||||
enum pwrtrack_method method,
|
|
||||||
u8 rf_path,
|
|
||||||
u8 channel_mapped_index
|
|
||||||
);
|
|
||||||
|
|
||||||
/* 1 7. IQK */
|
|
||||||
|
|
||||||
void
|
|
||||||
phy_iq_calibrate_8188e(
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
#else
|
|
||||||
struct _ADAPTER *adapter,
|
|
||||||
#endif
|
|
||||||
bool is_recovery);
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* LC calibrate
|
|
||||||
* */
|
|
||||||
void
|
|
||||||
phy_lc_calibrate_8188e(
|
|
||||||
void *p_dm_void
|
|
||||||
);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* AP calibrate
|
|
||||||
* */
|
|
||||||
void
|
|
||||||
phy_ap_calibrate_8188e(
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
#else
|
|
||||||
struct _ADAPTER *p_adapter,
|
|
||||||
#endif
|
|
||||||
s8 delta);
|
|
||||||
void
|
|
||||||
phy_digital_predistortion_8188e(struct _ADAPTER *p_adapter);
|
|
||||||
|
|
||||||
#define phy_dp_calibrate_8821a phy_dp_calibrate_8812a
|
|
||||||
|
|
||||||
void
|
|
||||||
_phy_save_adda_registers(
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
#else
|
|
||||||
struct _ADAPTER *p_adapter,
|
|
||||||
#endif
|
|
||||||
u32 *adda_reg,
|
|
||||||
u32 *adda_backup,
|
|
||||||
u32 register_num
|
|
||||||
);
|
|
||||||
|
|
||||||
void
|
|
||||||
_phy_path_adda_on(
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
#else
|
|
||||||
struct _ADAPTER *p_adapter,
|
|
||||||
#endif
|
|
||||||
u32 *adda_reg,
|
|
||||||
bool is_path_a_on,
|
|
||||||
bool is2T
|
|
||||||
);
|
|
||||||
|
|
||||||
void
|
|
||||||
_phy_mac_setting_calibration(
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
|
||||||
#else
|
|
||||||
struct _ADAPTER *p_adapter,
|
|
||||||
#endif
|
|
||||||
u32 *mac_reg,
|
|
||||||
u32 *mac_backup
|
|
||||||
);
|
|
||||||
|
|
||||||
|
|
||||||
void
|
|
||||||
_phy_path_a_stand_by(
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm
|
|
||||||
#else
|
|
||||||
struct _ADAPTER *p_adapter
|
|
||||||
#endif
|
|
||||||
);
|
|
||||||
|
|
||||||
|
|
||||||
#endif /* #ifndef __HAL_PHY_RF_8188E_H__ */
|
|
||||||
|
|
@ -46,23 +46,10 @@
|
||||||
#include "phydm_adc_sampling.h"
|
#include "phydm_adc_sampling.h"
|
||||||
#include "phydm_dynamic_rx_path.h"
|
#include "phydm_dynamic_rx_path.h"
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
|
#include "phydm_beamforming.h"
|
||||||
#include "phydm_beamforming.h"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
|
#include "phydm_noisemonitor.h"
|
||||||
#include "halphyrf_ap.h"
|
#include "halphyrf_ce.h"
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
|
|
||||||
#include "phydm_noisemonitor.h"
|
|
||||||
#include "halphyrf_ce.h"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
|
|
||||||
#include "halphyrf_win.h"
|
|
||||||
#include "phydm_noisemonitor.h"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*============================================================*/
|
/*============================================================*/
|
||||||
/*Definition */
|
/*Definition */
|
||||||
|
|
@ -105,11 +92,7 @@
|
||||||
#define FREQ_POSITIVE 1
|
#define FREQ_POSITIVE 1
|
||||||
#define FREQ_NEGATIVE 2
|
#define FREQ_NEGATIVE 2
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
#define PHYDM_WATCH_DOG_PERIOD 2
|
||||||
#define PHYDM_WATCH_DOG_PERIOD 1
|
|
||||||
#else
|
|
||||||
#define PHYDM_WATCH_DOG_PERIOD 2
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*============================================================*/
|
/*============================================================*/
|
||||||
/*structure and define*/
|
/*structure and define*/
|
||||||
|
|
@ -118,30 +101,9 @@
|
||||||
/*2011/09/20 MH Add for AP/ADSLpseudo DM structuer requirement.*/
|
/*2011/09/20 MH Add for AP/ADSLpseudo DM structuer requirement.*/
|
||||||
/*We need to remove to other position???*/
|
/*We need to remove to other position???*/
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
|
|
||||||
struct rtl8192cd_priv {
|
struct rtl8192cd_priv {
|
||||||
u8 temp;
|
u8 temp;
|
||||||
|
|
||||||
};
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
||||||
struct _ADAPTER {
|
|
||||||
u8 temp;
|
|
||||||
#ifdef AP_BUILD_WORKAROUND
|
|
||||||
HAL_DATA_TYPE *temp2;
|
|
||||||
struct rtl8192cd_priv *priv;
|
|
||||||
#endif
|
|
||||||
};
|
};
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
|
||||||
|
|
||||||
struct _WLAN_STA {
|
|
||||||
u8 temp;
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
struct _dynamic_primary_cca {
|
struct _dynamic_primary_cca {
|
||||||
u8 pri_cca_flag;
|
u8 pri_cca_flag;
|
||||||
|
|
@ -153,13 +115,6 @@ struct _dynamic_primary_cca {
|
||||||
u8 MF_state;
|
u8 MF_state;
|
||||||
};
|
};
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
|
||||||
#ifdef ADSL_AP_BUILD_WORKAROUND
|
|
||||||
#define MAX_TOLERANCE 5
|
|
||||||
#define IQK_DELAY_TIME 1 /*ms*/
|
|
||||||
#endif
|
|
||||||
#endif /*#if(DM_ODM_SUPPORT_TYPE & (ODM_AP))*/
|
|
||||||
|
|
||||||
#define dm_type_by_fw 0
|
#define dm_type_by_fw 0
|
||||||
#define dm_type_by_driver 1
|
#define dm_type_by_driver 1
|
||||||
|
|
||||||
|
|
@ -168,44 +123,12 @@ struct _dynamic_primary_cca {
|
||||||
#define IQK_THRESHOLD 8
|
#define IQK_THRESHOLD 8
|
||||||
#define DPK_THRESHOLD 4
|
#define DPK_THRESHOLD 4
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
|
|
||||||
__PACK struct _odm_phy_status_info_ {
|
|
||||||
u8 rx_pwdb_all;
|
|
||||||
u8 signal_quality; /* in 0-100 index. */
|
|
||||||
u8 rx_mimo_signal_strength[4]; /* in 0~100 index */
|
|
||||||
s8 rx_mimo_signal_quality[4]; /* EVM */
|
|
||||||
s8 rx_snr[4]; /* per-path's SNR */
|
|
||||||
#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
|
|
||||||
u8 rx_count:2; /* RX path counter---*/
|
|
||||||
u8 band_width:2;
|
|
||||||
u8 rxsc:4; /* sub-channel---*/
|
|
||||||
#else
|
|
||||||
u8 band_width;
|
|
||||||
#endif
|
|
||||||
#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
|
|
||||||
u8 channel; /* channel number---*/
|
|
||||||
bool is_mu_packet; /* is MU packet or not---*/
|
|
||||||
bool is_beamformed; /* BF packet---*/
|
|
||||||
#endif
|
|
||||||
};
|
|
||||||
|
|
||||||
struct _odm_phy_status_info_append_ {
|
|
||||||
u8 MAC_CRC32;
|
|
||||||
|
|
||||||
};
|
|
||||||
|
|
||||||
#else
|
|
||||||
|
|
||||||
struct _odm_phy_status_info_ {
|
struct _odm_phy_status_info_ {
|
||||||
/* */
|
/* */
|
||||||
/* Be care, if you want to add any element please insert between */
|
/* Be care, if you want to add any element please insert between */
|
||||||
/* rx_pwdb_all & signal_strength. */
|
/* rx_pwdb_all & signal_strength. */
|
||||||
/* */
|
/* */
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
|
|
||||||
u32 rx_pwdb_all;
|
|
||||||
#else
|
|
||||||
u8 rx_pwdb_all;
|
u8 rx_pwdb_all;
|
||||||
#endif
|
|
||||||
u8 signal_quality; /* in 0-100 index. */
|
u8 signal_quality; /* in 0-100 index. */
|
||||||
s8 rx_mimo_signal_quality[4]; /* per-path's EVM translate to 0~100% */
|
s8 rx_mimo_signal_quality[4]; /* per-path's EVM translate to 0~100% */
|
||||||
u8 rx_mimo_evm_dbm[4]; /* per-path's original EVM (dbm) */
|
u8 rx_mimo_evm_dbm[4]; /* per-path's original EVM (dbm) */
|
||||||
|
|
@ -226,16 +149,13 @@ struct _odm_phy_status_info_ {
|
||||||
#else
|
#else
|
||||||
u8 band_width;
|
u8 band_width;
|
||||||
#endif
|
#endif
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
|
|
||||||
u8 bt_coex_pwr_adjust;
|
u8 bt_coex_pwr_adjust;
|
||||||
#endif
|
|
||||||
#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
|
#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
|
||||||
u8 channel; /* channel number---*/
|
u8 channel; /* channel number---*/
|
||||||
bool is_mu_packet; /* is MU packet or not---*/
|
bool is_mu_packet; /* is MU packet or not---*/
|
||||||
bool is_beamformed; /* BF packet---*/
|
bool is_beamformed; /* BF packet---*/
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
#endif
|
|
||||||
|
|
||||||
struct _odm_per_pkt_info_ {
|
struct _odm_per_pkt_info_ {
|
||||||
u8 data_rate;
|
u8 data_rate;
|
||||||
|
|
@ -391,11 +311,6 @@ enum odm_cmninfo_e {
|
||||||
ODM_CMNINFO_BT_DIG,
|
ODM_CMNINFO_BT_DIG,
|
||||||
ODM_CMNINFO_BT_BUSY,
|
ODM_CMNINFO_BT_BUSY,
|
||||||
ODM_CMNINFO_BT_DISABLE_EDCA,
|
ODM_CMNINFO_BT_DISABLE_EDCA,
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP) /*for repeater mode add by YuChen 2014.06.23*/
|
|
||||||
#ifdef UNIVERSAL_REPEATER
|
|
||||||
ODM_CMNINFO_VXD_LINK,
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
ODM_CMNINFO_AP_TOTAL_NUM,
|
ODM_CMNINFO_AP_TOTAL_NUM,
|
||||||
ODM_CMNINFO_POWER_TRAINING,
|
ODM_CMNINFO_POWER_TRAINING,
|
||||||
ODM_CMNINFO_DFS_REGION_DOMAIN,
|
ODM_CMNINFO_DFS_REGION_DOMAIN,
|
||||||
|
|
@ -635,11 +550,6 @@ enum phy_reg_pg_type {
|
||||||
bool is_wifi_display;
|
bool is_wifi_display;
|
||||||
bool is_linked;
|
bool is_linked;
|
||||||
bool bsta_state;
|
bool bsta_state;
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP) /*for repeater mode add by YuChen 2014.06.23*/
|
|
||||||
#ifdef UNIVERSAL_REPEATER
|
|
||||||
bool vxd_linked;
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
u8 rssi_min;
|
u8 rssi_min;
|
||||||
u8 interface_index; /*Add for 92D dual MAC: 0--Mac0 1--Mac1*/
|
u8 interface_index; /*Add for 92D dual MAC: 0--Mac0 1--Mac1*/
|
||||||
bool is_mp_chip;
|
bool is_mp_chip;
|
||||||
|
|
@ -757,10 +667,7 @@ enum phy_reg_pg_type {
|
||||||
bool pre_b_noisy;
|
bool pre_b_noisy;
|
||||||
u32 noisy_decision_smooth;
|
u32 noisy_decision_smooth;
|
||||||
bool is_disable_dym_ecs;
|
bool is_disable_dym_ecs;
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
|
|
||||||
struct _ODM_NOISE_MONITOR_ noise_level;
|
struct _ODM_NOISE_MONITOR_ noise_level;
|
||||||
#endif
|
|
||||||
/*Define STA info.*/
|
/*Define STA info.*/
|
||||||
/*_ODM_STA_INFO*/
|
/*_ODM_STA_INFO*/
|
||||||
/*2012/01/12 MH For MP, we need to reduce one array pointer for default port.??*/
|
/*2012/01/12 MH For MP, we need to reduce one array pointer for default port.??*/
|
||||||
|
|
@ -786,9 +693,6 @@ enum phy_reg_pg_type {
|
||||||
|
|
||||||
/*ODM Structure*/
|
/*ODM Structure*/
|
||||||
#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
|
#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
|
|
||||||
struct _BF_DIV_COEX_ dm_bdc_table;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
|
#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
|
||||||
struct _SMART_ANTENNA_TRAINNING_ dm_sat_table;
|
struct _SMART_ANTENNA_TRAINNING_ dm_sat_table;
|
||||||
|
|
@ -819,10 +723,6 @@ enum phy_reg_pg_type {
|
||||||
struct _IQK_INFORMATION IQK_info;
|
struct _IQK_INFORMATION IQK_info;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
|
||||||
/*path Div Struct*/
|
|
||||||
struct _path_div_parameter_define_ path_iqk;
|
|
||||||
#endif
|
|
||||||
#if (defined(CONFIG_PATH_DIVERSITY))
|
#if (defined(CONFIG_PATH_DIVERSITY))
|
||||||
struct _ODM_PATH_DIVERSITY_ dm_path_div;
|
struct _ODM_PATH_DIVERSITY_ dm_path_div;
|
||||||
#endif
|
#endif
|
||||||
|
|
@ -858,14 +758,12 @@ enum phy_reg_pg_type {
|
||||||
u32 n_iqk_ok_cnt;
|
u32 n_iqk_ok_cnt;
|
||||||
u32 n_iqk_fail_cnt;
|
u32 n_iqk_fail_cnt;
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
|
|
||||||
/*Power Training*/
|
/*Power Training*/
|
||||||
u8 force_power_training_state;
|
u8 force_power_training_state;
|
||||||
bool is_change_state;
|
bool is_change_state;
|
||||||
u32 PT_score;
|
u32 PT_score;
|
||||||
u64 ofdm_rx_cnt;
|
u64 ofdm_rx_cnt;
|
||||||
u64 cck_rx_cnt;
|
u64 cck_rx_cnt;
|
||||||
#endif
|
|
||||||
bool is_disable_power_training;
|
bool is_disable_power_training;
|
||||||
u8 dynamic_tx_high_power_lvl;
|
u8 dynamic_tx_high_power_lvl;
|
||||||
u8 last_dtp_lvl;
|
u8 last_dtp_lvl;
|
||||||
|
|
@ -883,22 +781,9 @@ enum phy_reg_pg_type {
|
||||||
struct timer_list sbdcnt_timer;
|
struct timer_list sbdcnt_timer;
|
||||||
|
|
||||||
/*ODM relative workitem.*/
|
/*ODM relative workitem.*/
|
||||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
|
||||||
#if USE_WORKITEM
|
|
||||||
RT_WORK_ITEM path_div_switch_workitem;
|
|
||||||
RT_WORK_ITEM cck_path_diversity_workitem;
|
|
||||||
RT_WORK_ITEM fast_ant_training_workitem;
|
|
||||||
RT_WORK_ITEM mpt_dig_workitem;
|
|
||||||
RT_WORK_ITEM ra_rpt_workitem;
|
|
||||||
RT_WORK_ITEM sbdcnt_workitem;
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
|
|
||||||
#if (BEAMFORMING_SUPPORT == 1)
|
#if (BEAMFORMING_SUPPORT == 1)
|
||||||
struct _RT_BEAMFORMING_INFO beamforming_info;
|
struct _RT_BEAMFORMING_INFO beamforming_info;
|
||||||
#endif
|
#endif
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef CONFIG_PHYDM_DFS_MASTER
|
#ifdef CONFIG_PHYDM_DFS_MASTER
|
||||||
u8 dfs_region_domain;
|
u8 dfs_region_domain;
|
||||||
|
|
@ -957,7 +842,6 @@ enum odm_fw_config_type {
|
||||||
};
|
};
|
||||||
|
|
||||||
/*status code*/
|
/*status code*/
|
||||||
#if (DM_ODM_SUPPORT_TYPE != ODM_WIN)
|
|
||||||
enum rt_status {
|
enum rt_status {
|
||||||
RT_STATUS_SUCCESS,
|
RT_STATUS_SUCCESS,
|
||||||
RT_STATUS_FAILURE,
|
RT_STATUS_FAILURE,
|
||||||
|
|
@ -968,7 +852,6 @@ enum rt_status {
|
||||||
RT_STATUS_NOT_SUPPORT,
|
RT_STATUS_NOT_SUPPORT,
|
||||||
RT_STATUS_OS_API_FAILED,
|
RT_STATUS_OS_API_FAILED,
|
||||||
};
|
};
|
||||||
#endif /*end of enum rt_status definition*/
|
|
||||||
|
|
||||||
#ifdef REMOVE_PACK
|
#ifdef REMOVE_PACK
|
||||||
#pragma pack()
|
#pragma pack()
|
||||||
|
|
@ -1001,44 +884,18 @@ enum dm_rf_e {
|
||||||
|
|
||||||
/*check Sta pointer valid or not*/
|
/*check Sta pointer valid or not*/
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
|
#define IS_STA_VALID(p_sta) (p_sta)
|
||||||
#define IS_STA_VALID(p_sta) (p_sta && p_sta->expire_to)
|
|
||||||
#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
|
||||||
#define IS_STA_VALID(p_sta) (p_sta && p_sta->bUsed)
|
|
||||||
#else
|
|
||||||
#define IS_STA_VALID(p_sta) (p_sta)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP))
|
|
||||||
|
|
||||||
bool
|
|
||||||
odm_check_power_status(
|
|
||||||
struct _ADAPTER *adapter
|
|
||||||
);
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
u32 odm_convert_to_db(u32 value);
|
u32 odm_convert_to_db(u32 value);
|
||||||
|
|
||||||
u32 odm_convert_to_linear(u32 value);
|
u32 odm_convert_to_linear(u32 value);
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
|
|
||||||
|
|
||||||
u32
|
u32
|
||||||
get_psd_data(
|
get_psd_data(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
struct PHY_DM_STRUCT *p_dm_odm,
|
||||||
unsigned int point,
|
unsigned int point,
|
||||||
u8 initial_gain_psd);
|
u8 initial_gain_psd);
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
|
||||||
void
|
|
||||||
odm_dm_watchdog_lps(
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm
|
|
||||||
);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
s32
|
s32
|
||||||
odm_pwdb_conversion(
|
odm_pwdb_conversion(
|
||||||
s32 X,
|
s32 X,
|
||||||
|
|
@ -1150,18 +1007,6 @@ phydm_cmn_info_query(
|
||||||
enum phydm_info_query_e info_type
|
enum phydm_info_query_e info_type
|
||||||
);
|
);
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
|
||||||
void
|
|
||||||
odm_init_all_threads(
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm
|
|
||||||
);
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_stop_all_threads(
|
|
||||||
struct PHY_DM_STRUCT *p_dm_odm
|
|
||||||
);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
void
|
void
|
||||||
odm_init_all_timers(
|
odm_init_all_timers(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm
|
struct PHY_DM_STRUCT *p_dm_odm
|
||||||
|
|
@ -1177,38 +1022,6 @@ odm_release_all_timers(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm
|
struct PHY_DM_STRUCT *p_dm_odm
|
||||||
);
|
);
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
|
||||||
void odm_init_all_work_items(struct PHY_DM_STRUCT *p_dm_odm);
|
|
||||||
void odm_free_all_work_items(struct PHY_DM_STRUCT *p_dm_odm);
|
|
||||||
|
|
||||||
u64
|
|
||||||
platform_division64(
|
|
||||||
u64 x,
|
|
||||||
u64 y
|
|
||||||
);
|
|
||||||
|
|
||||||
#define dm_change_dynamic_init_gain_thresh odm_change_dynamic_init_gain_thresh
|
|
||||||
|
|
||||||
enum dm_dig_connect_e {
|
|
||||||
DIG_STA_DISCONNECT = 0,
|
|
||||||
DIG_STA_CONNECT = 1,
|
|
||||||
DIG_STA_BEFORE_CONNECT = 2,
|
|
||||||
DIG_MULTI_STA_DISCONNECT = 3,
|
|
||||||
DIG_MULTI_STA_CONNECT = 4,
|
|
||||||
DIG_CONNECT_MAX
|
|
||||||
};
|
|
||||||
|
|
||||||
/*2012/01/12 MH Check afapter status. Temp fix BSOD.*/
|
|
||||||
|
|
||||||
#define HAL_ADAPTER_STS_CHK(p_dm_odm) do {\
|
|
||||||
if (p_dm_odm->adapter == NULL) { \
|
|
||||||
\
|
|
||||||
return;\
|
|
||||||
} \
|
|
||||||
} while (0)
|
|
||||||
|
|
||||||
#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
|
|
||||||
|
|
||||||
void
|
void
|
||||||
odm_asoc_entry_init(
|
odm_asoc_entry_init(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm
|
struct PHY_DM_STRUCT *p_dm_odm
|
||||||
|
|
@ -1220,7 +1033,6 @@ phydm_get_structure(
|
||||||
u8 structure_type
|
u8 structure_type
|
||||||
);
|
);
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) || (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
|
||||||
/*===========================================================*/
|
/*===========================================================*/
|
||||||
/* The following is for compile only*/
|
/* The following is for compile only*/
|
||||||
/*===========================================================*/
|
/*===========================================================*/
|
||||||
|
|
@ -1237,16 +1049,9 @@ phydm_get_structure(
|
||||||
|
|
||||||
#define TARGET_CHNL_NUM_2G_5G 59
|
#define TARGET_CHNL_NUM_2G_5G 59
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
|
||||||
u8 get_right_chnl_place_for_iqk(u8 chnl);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* *********************************************************** */
|
/* *********************************************************** */
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
|
||||||
void odm_dtc(struct PHY_DM_STRUCT *p_dm_odm);
|
void odm_dtc(struct PHY_DM_STRUCT *p_dm_odm);
|
||||||
#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */
|
|
||||||
|
|
||||||
void phydm_noisy_detection(struct PHY_DM_STRUCT *p_dm_odm);
|
void phydm_noisy_detection(struct PHY_DM_STRUCT *p_dm_odm);
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,351 +0,0 @@
|
||||||
/******************************************************************************
|
|
||||||
*
|
|
||||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify it
|
|
||||||
* under the terms of version 2 of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
|
||||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
||||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
||||||
* more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License along with
|
|
||||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
|
||||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
|
||||||
*
|
|
||||||
*
|
|
||||||
******************************************************************************/
|
|
||||||
|
|
||||||
#ifndef __PHYDMPOWERTRACKING_H__
|
|
||||||
#define __PHYDMPOWERTRACKING_H__
|
|
||||||
|
|
||||||
#define POWRTRACKING_VERSION "1.1"
|
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
|
||||||
#ifdef RTK_AC_SUPPORT
|
|
||||||
#define ODM_IC_11AC_SERIES_SUPPORT 1
|
|
||||||
#else
|
|
||||||
#define ODM_IC_11AC_SERIES_SUPPORT 0
|
|
||||||
#endif
|
|
||||||
#else
|
|
||||||
#define ODM_IC_11AC_SERIES_SUPPORT 1
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define DPK_DELTA_MAPPING_NUM 13
|
|
||||||
#define index_mapping_HP_NUM 15
|
|
||||||
#define DELTA_SWINGIDX_SIZE 30
|
|
||||||
#define DELTA_SWINTSSI_SIZE 61
|
|
||||||
#define BAND_NUM 3
|
|
||||||
#define MAX_RF_PATH 4
|
|
||||||
#define TXSCALE_TABLE_SIZE 37
|
|
||||||
#define CCK_TABLE_SIZE_8723D 41
|
|
||||||
|
|
||||||
#define IQK_MAC_REG_NUM 4
|
|
||||||
#define IQK_ADDA_REG_NUM 16
|
|
||||||
#define IQK_BB_REG_NUM_MAX 10
|
|
||||||
|
|
||||||
#define IQK_BB_REG_NUM 9
|
|
||||||
|
|
||||||
#define HP_THERMAL_NUM 8
|
|
||||||
|
|
||||||
#define AVG_THERMAL_NUM 8
|
|
||||||
#define iqk_matrix_reg_num 8
|
|
||||||
/* #define IQK_MATRIX_SETTINGS_NUM 1+24+21 */
|
|
||||||
#define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
|
|
||||||
|
|
||||||
#if !defined(_OUTSRC_COEXIST)
|
|
||||||
#define OFDM_TABLE_SIZE_92D 43
|
|
||||||
#define OFDM_TABLE_SIZE 37
|
|
||||||
#define CCK_TABLE_SIZE 33
|
|
||||||
#define CCK_TABLE_SIZE_88F 21
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* #define OFDM_TABLE_SIZE_92E 54 */
|
|
||||||
/* #define CCK_TABLE_SIZE_92E 54 */
|
|
||||||
extern u32 ofdm_swing_table[OFDM_TABLE_SIZE_92D];
|
|
||||||
extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
|
|
||||||
extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
|
|
||||||
|
|
||||||
|
|
||||||
extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE_92D];
|
|
||||||
extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
|
|
||||||
extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
|
|
||||||
extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
|
|
||||||
extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
|
|
||||||
extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define ODM_OFDM_TABLE_SIZE 37
|
|
||||||
#define ODM_CCK_TABLE_SIZE 33
|
|
||||||
/* <20140613, YuChen> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
|
|
||||||
extern u8 delta_swing_table_idx_2ga_p_default[DELTA_SWINGIDX_SIZE];
|
|
||||||
extern u8 delta_swing_table_idx_2ga_n_default[DELTA_SWINGIDX_SIZE];
|
|
||||||
|
|
||||||
static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9};
|
|
||||||
static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11};
|
|
||||||
|
|
||||||
/* extern u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E];
|
|
||||||
* extern u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8];
|
|
||||||
* extern u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8]; */
|
|
||||||
|
|
||||||
#ifdef CONFIG_WLAN_HAL_8192EE
|
|
||||||
#define OFDM_TABLE_SIZE_92E 54
|
|
||||||
#define CCK_TABLE_SIZE_92E 54
|
|
||||||
extern u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E];
|
|
||||||
extern u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8];
|
|
||||||
extern u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8];
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define OFDM_TABLE_SIZE_8812 43
|
|
||||||
#define AVG_THERMAL_NUM_8812 4
|
|
||||||
|
|
||||||
#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
|
|
||||||
extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
|
|
||||||
#elif(ODM_IC_11AC_SERIES_SUPPORT)
|
|
||||||
extern unsigned int ofdm_swing_table_8812[OFDM_TABLE_SIZE_8812];
|
|
||||||
#endif
|
|
||||||
|
|
||||||
extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
|
|
||||||
|
|
||||||
#define dm_check_txpowertracking odm_txpowertracking_check
|
|
||||||
|
|
||||||
struct _IQK_MATRIX_REGS_SETTING {
|
|
||||||
bool is_iqk_done;
|
|
||||||
s32 value[1][iqk_matrix_reg_num];
|
|
||||||
};
|
|
||||||
|
|
||||||
struct odm_rf_calibration_structure {
|
|
||||||
/* for tx power tracking */
|
|
||||||
|
|
||||||
u32 rega24; /* for TempCCK */
|
|
||||||
s32 rege94;
|
|
||||||
s32 rege9c;
|
|
||||||
s32 regeb4;
|
|
||||||
s32 regebc;
|
|
||||||
|
|
||||||
/* u8 is_txpowertracking; */
|
|
||||||
u8 tx_powercount;
|
|
||||||
bool is_txpowertracking_init;
|
|
||||||
bool is_txpowertracking;
|
|
||||||
u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
|
|
||||||
u8 tm_trigger;
|
|
||||||
u8 internal_pa_5g[2]; /* pathA / pathB */
|
|
||||||
|
|
||||||
u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
|
|
||||||
u8 thermal_value;
|
|
||||||
u8 thermal_value_lck;
|
|
||||||
u8 thermal_value_iqk;
|
|
||||||
s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */
|
|
||||||
u8 thermal_value_dpk;
|
|
||||||
u8 thermal_value_avg[AVG_THERMAL_NUM];
|
|
||||||
u8 thermal_value_avg_index;
|
|
||||||
u8 thermal_value_rx_gain;
|
|
||||||
u8 thermal_value_crystal;
|
|
||||||
u8 thermal_value_dpk_store;
|
|
||||||
u8 thermal_value_dpk_track;
|
|
||||||
bool txpowertracking_in_progress;
|
|
||||||
bool is_dpk_enable;
|
|
||||||
|
|
||||||
bool is_reloadtxpowerindex;
|
|
||||||
u8 is_rf_pi_enable;
|
|
||||||
u32 txpowertracking_callback_cnt; /* cosa add for debug */
|
|
||||||
|
|
||||||
u8 is_cck_in_ch14;
|
|
||||||
u8 CCK_index;
|
|
||||||
u8 OFDM_index[MAX_RF_PATH];
|
|
||||||
s8 power_index_offset;
|
|
||||||
s8 delta_power_index;
|
|
||||||
s8 delta_power_index_last;
|
|
||||||
bool is_tx_power_changed;
|
|
||||||
|
|
||||||
u8 thermal_value_hp[HP_THERMAL_NUM];
|
|
||||||
u8 thermal_value_hp_index;
|
|
||||||
struct _IQK_MATRIX_REGS_SETTING iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
|
|
||||||
u8 delta_lck;
|
|
||||||
u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
|
|
||||||
u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
|
|
||||||
u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
|
|
||||||
u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
|
|
||||||
u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
|
|
||||||
u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
|
|
||||||
u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
|
|
||||||
u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
|
|
||||||
u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
|
|
||||||
u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
|
|
||||||
u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
|
|
||||||
u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
|
|
||||||
u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
|
|
||||||
|
|
||||||
u8 bb_swing_idx_ofdm[MAX_RF_PATH];
|
|
||||||
u8 bb_swing_idx_ofdm_current;
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
|
|
||||||
u8 bb_swing_idx_ofdm_base[MAX_RF_PATH];
|
|
||||||
#else
|
|
||||||
u8 bb_swing_idx_ofdm_base;
|
|
||||||
#endif
|
|
||||||
bool bb_swing_flag_ofdm;
|
|
||||||
u8 bb_swing_idx_cck;
|
|
||||||
u8 bb_swing_idx_cck_current;
|
|
||||||
u8 bb_swing_idx_cck_base;
|
|
||||||
u8 default_ofdm_index;
|
|
||||||
u8 default_cck_index;
|
|
||||||
bool bb_swing_flag_cck;
|
|
||||||
|
|
||||||
s8 absolute_ofdm_swing_idx[MAX_RF_PATH];
|
|
||||||
s8 remnant_ofdm_swing_idx[MAX_RF_PATH];
|
|
||||||
s8 absolute_cck_swing_idx[MAX_RF_PATH];
|
|
||||||
s8 remnant_cck_swing_idx;
|
|
||||||
s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */
|
|
||||||
bool modify_tx_agc_flag_path_a;
|
|
||||||
bool modify_tx_agc_flag_path_b;
|
|
||||||
bool modify_tx_agc_flag_path_c;
|
|
||||||
bool modify_tx_agc_flag_path_d;
|
|
||||||
bool modify_tx_agc_flag_path_a_cck;
|
|
||||||
|
|
||||||
s8 kfree_offset[MAX_RF_PATH];
|
|
||||||
|
|
||||||
/* -------------------------------------------------------------------- */
|
|
||||||
|
|
||||||
/* for IQK */
|
|
||||||
u32 regc04;
|
|
||||||
u32 reg874;
|
|
||||||
u32 regc08;
|
|
||||||
u32 regb68;
|
|
||||||
u32 regb6c;
|
|
||||||
u32 reg870;
|
|
||||||
u32 reg860;
|
|
||||||
u32 reg864;
|
|
||||||
|
|
||||||
bool is_iqk_initialized;
|
|
||||||
bool is_lck_in_progress;
|
|
||||||
bool is_antenna_detected;
|
|
||||||
bool is_need_iqk;
|
|
||||||
bool is_iqk_in_progress;
|
|
||||||
bool is_iqk_pa_off;
|
|
||||||
u8 delta_iqk;
|
|
||||||
u32 ADDA_backup[IQK_ADDA_REG_NUM];
|
|
||||||
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
|
|
||||||
u32 IQK_BB_backup_recover[9];
|
|
||||||
u32 IQK_BB_backup[IQK_BB_REG_NUM];
|
|
||||||
u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
|
|
||||||
u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
|
|
||||||
u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
|
|
||||||
u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
|
|
||||||
|
|
||||||
u64 iqk_start_time;
|
|
||||||
u64 iqk_total_progressing_time;
|
|
||||||
u64 iqk_progressing_time;
|
|
||||||
u32 lok_result;
|
|
||||||
u8 iqk_step;
|
|
||||||
u8 kcount;
|
|
||||||
u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
|
|
||||||
bool is_mp_mode;
|
|
||||||
|
|
||||||
/* for APK */
|
|
||||||
u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
|
|
||||||
u8 is_ap_kdone;
|
|
||||||
u8 is_apk_thermal_meter_ignore;
|
|
||||||
u8 is_dp_done;
|
|
||||||
u8 is_dp_path_aok;
|
|
||||||
u8 is_dp_path_bok;
|
|
||||||
|
|
||||||
/*Add by Yuchen for Kfree Phydm*/
|
|
||||||
u8 reg_rf_kfree_enable; /*for registry*/
|
|
||||||
u8 rf_kfree_enable; /*for efuse enable check*/
|
|
||||||
u32 tx_lok[2];
|
|
||||||
};
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_txpowertracking_check_ap(
|
|
||||||
void *p_dm_void
|
|
||||||
);
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_txpowertracking_check(
|
|
||||||
void *p_dm_void
|
|
||||||
);
|
|
||||||
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_txpowertracking_thermal_meter_init(
|
|
||||||
void *p_dm_void
|
|
||||||
);
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_txpowertracking_init(
|
|
||||||
void *p_dm_void
|
|
||||||
);
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_txpowertracking_check_mp(
|
|
||||||
void *p_dm_void
|
|
||||||
);
|
|
||||||
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_txpowertracking_check_ce(
|
|
||||||
void *p_dm_void
|
|
||||||
);
|
|
||||||
|
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_txpowertracking_callback_thermal_meter92c(
|
|
||||||
struct _ADAPTER *adapter
|
|
||||||
);
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_txpowertracking_callback_rx_gain_thermal_meter92d(
|
|
||||||
struct _ADAPTER *adapter
|
|
||||||
);
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_txpowertracking_callback_thermal_meter92d(
|
|
||||||
struct _ADAPTER *adapter
|
|
||||||
);
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_txpowertracking_direct_call92c(
|
|
||||||
struct _ADAPTER *adapter
|
|
||||||
);
|
|
||||||
|
|
||||||
void
|
|
||||||
odm_txpowertracking_thermal_meter_check(
|
|
||||||
struct _ADAPTER *adapter
|
|
||||||
);
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
@ -55,185 +55,22 @@ phy_set_tx_power_limit(
|
||||||
u8 *power_limit
|
u8 *power_limit
|
||||||
);
|
);
|
||||||
|
|
||||||
#if RTL8188E_SUPPORT == 1
|
#define RTL8188E_T_SUPPORT 1
|
||||||
#define RTL8188E_T_SUPPORT 1
|
#ifdef CONFIG_SFW_SUPPORTED
|
||||||
#ifdef CONFIG_SFW_SUPPORTED
|
|
||||||
#define RTL8188E_S_SUPPORT 1
|
#define RTL8188E_S_SUPPORT 1
|
||||||
#else
|
#else
|
||||||
#define RTL8188E_S_SUPPORT 0
|
#define RTL8188E_S_SUPPORT 0
|
||||||
#endif
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if (RTL8188E_SUPPORT == 1)
|
#include "hal8188erateadaptive.h" /* for RA,Power training */
|
||||||
#include "hal8188erateadaptive.h" /* for RA,Power training */
|
#include "halhwimg8188e_mac.h"
|
||||||
#include "halhwimg8188e_mac.h"
|
#include "halhwimg8188e_rf.h"
|
||||||
#include "halhwimg8188e_rf.h"
|
#include "halhwimg8188e_bb.h"
|
||||||
#include "halhwimg8188e_bb.h"
|
#include "phydm_regconfig8188e.h"
|
||||||
#include "halhwimg8188e_t_fw.h"
|
#include "phydm_rtl8188e.h"
|
||||||
#include "halhwimg8188e_s_fw.h"
|
#include "hal8188ereg.h"
|
||||||
#include "phydm_regconfig8188e.h"
|
#include "version_rtl8188e.h"
|
||||||
#include "phydm_rtl8188e.h"
|
#include "rtl8188e_hal.h"
|
||||||
#include "hal8188ereg.h"
|
#include "halphyrf_8188e_ce.h"
|
||||||
#include "version_rtl8188e.h"
|
|
||||||
#include "rtl8188e_hal.h"
|
|
||||||
#include "halphyrf_8188e_ce.h"
|
|
||||||
#endif /* 88E END */
|
|
||||||
|
|
||||||
#if (RTL8192E_SUPPORT == 1)
|
|
||||||
#include "rtl8192e/halphyrf_8192e_ce.h" /*FOR_8192E_IQK*/
|
|
||||||
|
|
||||||
#include "rtl8192e/phydm_rtl8192e.h" /* FOR_8192E_IQK */
|
|
||||||
#include "rtl8192e/version_rtl8192e.h"
|
|
||||||
#include "rtl8192e/halhwimg8192e_bb.h"
|
|
||||||
#include "rtl8192e/halhwimg8192e_mac.h"
|
|
||||||
#include "rtl8192e/halhwimg8192e_rf.h"
|
|
||||||
#include "rtl8192e/phydm_regconfig8192e.h"
|
|
||||||
#include "rtl8192e/halhwimg8192e_fw.h"
|
|
||||||
#include "rtl8192e/hal8192ereg.h"
|
|
||||||
#include "rtl8192e_hal.h"
|
|
||||||
#endif /* 92E END */
|
|
||||||
|
|
||||||
#if (RTL8812A_SUPPORT == 1)
|
|
||||||
|
|
||||||
#include "rtl8812a/halphyrf_8812a_ce.h"
|
|
||||||
|
|
||||||
/* #include "rtl8812a/HalPhyRf_8812A.h" */ /* FOR_8812_IQK */
|
|
||||||
#include "rtl8812a/halhwimg8812a_bb.h"
|
|
||||||
#include "rtl8812a/halhwimg8812a_mac.h"
|
|
||||||
#include "rtl8812a/halhwimg8812a_rf.h"
|
|
||||||
#include "rtl8812a/phydm_regconfig8812a.h"
|
|
||||||
#include "rtl8812a/halhwimg8812a_fw.h"
|
|
||||||
#include "rtl8812a/phydm_rtl8812a.h"
|
|
||||||
|
|
||||||
#include "rtl8812a_hal.h"
|
|
||||||
#include "rtl8812a/version_rtl8812a.h"
|
|
||||||
|
|
||||||
#endif /* 8812 END */
|
|
||||||
|
|
||||||
#if (RTL8814A_SUPPORT == 1)
|
|
||||||
|
|
||||||
#include "rtl8814a/halhwimg8814a_mac.h"
|
|
||||||
#include "rtl8814a/halhwimg8814a_rf.h"
|
|
||||||
#include "rtl8814a/halhwimg8814a_bb.h"
|
|
||||||
#include "rtl8814a/version_rtl8814a.h"
|
|
||||||
#include "rtl8814a/phydm_rtl8814a.h"
|
|
||||||
#include "rtl8814a/halhwimg8814a_fw.h"
|
|
||||||
#include "rtl8814a/halphyrf_8814a_ce.h"
|
|
||||||
#include "rtl8814a/phydm_regconfig8814a.h"
|
|
||||||
#include "rtl8814a_hal.h"
|
|
||||||
#include "rtl8814a/phydm_iqk_8814a.h"
|
|
||||||
#endif /* 8814 END */
|
|
||||||
|
|
||||||
#if (RTL8881A_SUPPORT == 1)/* FOR_8881_IQK */
|
|
||||||
#include "rtl8821a/phydm_iqk_8821a_ce.h"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (RTL8723B_SUPPORT == 1)
|
|
||||||
#include "rtl8723b/halhwimg8723b_mac.h"
|
|
||||||
#include "rtl8723b/halhwimg8723b_rf.h"
|
|
||||||
#include "rtl8723b/halhwimg8723b_bb.h"
|
|
||||||
#include "rtl8723b/halhwimg8723b_fw.h"
|
|
||||||
#include "rtl8723b/phydm_regconfig8723b.h"
|
|
||||||
#include "rtl8723b/phydm_rtl8723b.h"
|
|
||||||
#include "rtl8723b/hal8723breg.h"
|
|
||||||
#include "rtl8723b/version_rtl8723b.h"
|
|
||||||
#include "rtl8723b/halphyrf_8723b_ce.h"
|
|
||||||
#include "rtl8723b/halhwimg8723b_mp.h"
|
|
||||||
#include "rtl8723b_hal.h"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (RTL8821A_SUPPORT == 1)
|
|
||||||
#include "rtl8821a/halhwimg8821a_mac.h"
|
|
||||||
#include "rtl8821a/halhwimg8821a_rf.h"
|
|
||||||
#include "rtl8821a/halhwimg8821a_bb.h"
|
|
||||||
#include "rtl8821a/halhwimg8821a_fw.h"
|
|
||||||
#include "rtl8821a/phydm_regconfig8821a.h"
|
|
||||||
#include "rtl8821a/phydm_rtl8821a.h"
|
|
||||||
#include "rtl8821a/version_rtl8821a.h"
|
|
||||||
#include "rtl8821a/halphyrf_8821a_ce.h"
|
|
||||||
#include "rtl8821a/phydm_iqk_8821a_ce.h"/*for IQK*/
|
|
||||||
#include "rtl8812a/halphyrf_8812a_ce.h"/*for IQK,LCK,Power-tracking*/
|
|
||||||
#include "rtl8812a_hal.h"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (RTL8822B_SUPPORT == 1)
|
|
||||||
#include "rtl8822b/halhwimg8822b_mac.h"
|
|
||||||
#include "rtl8822b/halhwimg8822b_rf.h"
|
|
||||||
#include "rtl8822b/halhwimg8822b_bb.h"
|
|
||||||
#include "rtl8822b/halhwimg8822b_fw.h"
|
|
||||||
#include "rtl8822b/phydm_regconfig8822b.h"
|
|
||||||
#include "rtl8822b/halphyrf_8822b.h"
|
|
||||||
#include "rtl8822b/phydm_rtl8822b.h"
|
|
||||||
#include "rtl8822b/phydm_hal_api8822b.h"
|
|
||||||
#include "rtl8822b/version_rtl8822b.h"
|
|
||||||
|
|
||||||
#include <hal_data.h> /* struct HAL_DATA_TYPE */
|
|
||||||
#include <rtl8822b_hal.h> /* RX_SMOOTH_FACTOR, reg definition and etc.*/
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (RTL8703B_SUPPORT == 1)
|
|
||||||
#include "rtl8703b/phydm_regconfig8703b.h"
|
|
||||||
#include "rtl8703b/halhwimg8703b_mac.h"
|
|
||||||
#include "rtl8703b/halhwimg8703b_rf.h"
|
|
||||||
#include "rtl8703b/halhwimg8703b_bb.h"
|
|
||||||
#include "rtl8703b/halhwimg8703b_fw.h"
|
|
||||||
#include "rtl8703b/halphyrf_8703b.h"
|
|
||||||
#include "rtl8703b/version_rtl8703b.h"
|
|
||||||
#include "rtl8703b_hal.h"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (RTL8188F_SUPPORT == 1)
|
|
||||||
#include "rtl8188f/halhwimg8188f_mac.h"
|
|
||||||
#include "rtl8188f/halhwimg8188f_rf.h"
|
|
||||||
#include "rtl8188f/halhwimg8188f_bb.h"
|
|
||||||
#include "rtl8188f/halhwimg8188f_fw.h"
|
|
||||||
#include "rtl8188f/hal8188freg.h"
|
|
||||||
#include "rtl8188f/phydm_rtl8188f.h"
|
|
||||||
#include "rtl8188f/phydm_regconfig8188f.h"
|
|
||||||
#include "rtl8188f/halphyrf_8188f.h" /* for IQK,LCK,Power-tracking */
|
|
||||||
#include "rtl8188f/version_rtl8188f.h"
|
|
||||||
#include "rtl8188f_hal.h"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (RTL8723D_SUPPORT == 1)
|
|
||||||
#include "rtl8723d/halhwimg8723d_bb.h"
|
|
||||||
#include "rtl8723d/halhwimg8723d_mac.h"
|
|
||||||
#include "rtl8723d/halhwimg8723d_rf.h"
|
|
||||||
#include "rtl8723d/phydm_regconfig8723d.h"
|
|
||||||
#include "rtl8723d/halhwimg8723d_fw.h"
|
|
||||||
#include "rtl8723d/hal8723dreg.h"
|
|
||||||
#include "rtl8723d/phydm_rtl8723d.h"
|
|
||||||
#include "rtl8723d/halphyrf_8723d.h"
|
|
||||||
#include "rtl8723d/version_rtl8723d.h"
|
|
||||||
#include "rtl8723d_hal.h"
|
|
||||||
#endif /* 8723D End */
|
|
||||||
|
|
||||||
#if (RTL8197F_SUPPORT == 1)
|
|
||||||
#include "rtl8197f/halhwimg8197f_mac.h"
|
|
||||||
#include "rtl8197f/halhwimg8197f_rf.h"
|
|
||||||
#include "rtl8197f/halhwimg8197f_bb.h"
|
|
||||||
#include "rtl8197f/phydm_hal_api8197f.h"
|
|
||||||
#include "rtl8197f/version_rtl8197f.h"
|
|
||||||
#include "rtl8197f/phydm_rtl8197f.h"
|
|
||||||
#include "rtl8197f/phydm_regconfig8197f.h"
|
|
||||||
#include "rtl8197f/halphyrf_8197f.h"
|
|
||||||
#include "rtl8197f/phydm_iqk_8197f.h"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (RTL8821C_SUPPORT == 1)
|
|
||||||
#include "rtl8821c/phydm_hal_api8821c.h"
|
|
||||||
#include "rtl8821c/halhwimg8821c_testchip_mac.h"
|
|
||||||
#include "rtl8821c/halhwimg8821c_testchip_rf.h"
|
|
||||||
#include "rtl8821c/halhwimg8821c_testchip_bb.h"
|
|
||||||
#include "rtl8821c/halhwimg8821c_mac.h"
|
|
||||||
#include "rtl8821c/halhwimg8821c_rf.h"
|
|
||||||
#include "rtl8821c/halhwimg8821c_bb.h"
|
|
||||||
#include "rtl8821c/halhwimg8821c_fw.h"
|
|
||||||
#include "rtl8821c/phydm_regconfig8821c.h"
|
|
||||||
#include "rtl8821c/halphyrf_8821c.h"
|
|
||||||
#include "rtl8821c/version_rtl8821c.h"
|
|
||||||
#include "rtl8821c_hal.h"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif /* __ODM_PRECOMP_H__ */
|
#endif /* __ODM_PRECOMP_H__ */
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue