skyfall/rtl8188eu
1
0
Fork 0
mirror of https://github.com/lwfinger/rtl8188eu.git synced 2024-11-22 04:23:39 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

rtl8188eu: Fix some sparse errors

Browse source 
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2013-05-27 17:32:24 -05:00
parent 78adabf36d
commit 4342c7358c
29 changed files with 721 additions and 727 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
core/rtw_cmd.c
View file

@ -127,7 +127,7 @@ _func_enter_;
pevtpriv->c2h_mem = pevtpriv->allocated_c2h_mem + 4\
- ( (u32)(pevtpriv->allocated_c2h_mem) & 3);
#ifdef PLATFORM_OS_XP
pevtpriv->pc2h_mdl= IoAllocateMdl((u8 *)pevtpriv->c2h_mem, C2H_MEM_SZ , FALSE, FALSE, NULL);
pevtpriv->pc2h_mdl= IoAllocateMdl((u8 *)pevtpriv->c2h_mem, C2H_MEM_SZ , false, false, NULL);
if (pevtpriv->pc2h_mdl == NULL){
res= _FAIL;

2
hal/Hal8188ERateAdaptive.c
View file

@ -652,7 +652,7 @@ ODM_RASupport_Init(
// 2012/02/14 MH Be noticed, the init must be after IC type is recognized!!!!!
if (pDM_Odm->SupportICType == ODM_RTL8188E)
pDM_Odm->RaSupport88E = TRUE;
pDM_Odm->RaSupport88E = true;
}

16
hal/HalHWImg8188E_BB.c
View file

@ -37,22 +37,22 @@ CheckCondition(
u4Byte cond = Condition;
if ( Condition == 0xCDCDCDCD )
return TRUE;
return true;
cond = Condition & 0x000000FF;
if ( (_board == cond) && cond != 0x00)
return FALSE;
return false;
cond = Condition & 0x0000FF00;
cond = cond >> 8;
if ( (_interface & cond) == 0 && cond != 0x07)
return FALSE;
return false;
cond = Condition & 0x00FF0000;
cond = cond >> 16;
if ( (_platform & cond) == 0 && cond != 0x0F)
return FALSE;
return TRUE;
return false;
return true;
}
@ -207,7 +207,7 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
u1Byte board = pDM_Odm->BoardType;
u4Byte ArrayLen = sizeof(Array_AGC_TAB_1T_8188E)/sizeof(u4Byte);
pu4Byte Array = Array_AGC_TAB_1T_8188E;
bool biol = FALSE;
bool biol = false;
#ifdef CONFIG_IOL_IOREG_CFG
PADAPTER Adapter = pDM_Odm->Adapter;
struct xmit_frame *pxmit_frame;
@ -538,7 +538,7 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
u1Byte board = pDM_Odm->BoardType;
u4Byte ArrayLen = sizeof(Array_PHY_REG_1T_8188E)/sizeof(u4Byte);
pu4Byte Array = Array_PHY_REG_1T_8188E;
bool biol = FALSE;
bool biol = false;
#ifdef CONFIG_IOL_IOREG_CFG
PADAPTER Adapter = pDM_Odm->Adapter;
struct xmit_frame *pxmit_frame;
@ -843,7 +843,7 @@ ODM_ReadAndConfig_PHY_REG_PG_8188E(
u1Byte board = pDM_Odm->BoardType;
u4Byte ArrayLen = sizeof(Array_PHY_REG_PG_8188E)/sizeof(u4Byte);
pu4Byte Array = Array_PHY_REG_PG_8188E;
bool biol = FALSE;
bool biol = false;
hex += board;
hex += interfaceValue << 8;

12
hal/HalHWImg8188E_MAC.c
View file

@ -35,22 +35,22 @@ CheckCondition(
u4Byte cond = Condition;
if ( Condition == 0xCDCDCDCD )
return TRUE;
return true;
cond = Condition & 0x000000FF;
if ( (_board == cond) && cond != 0x00)
return FALSE;
return false;
cond = Condition & 0x0000FF00;
cond = cond >> 8;
if ( (_interface & cond) == 0 && cond != 0x07)
return FALSE;
return false;
cond = Condition & 0x00FF0000;
cond = cond >> 16;
if ( (_platform & cond) == 0 && cond != 0x0F)
return FALSE;
return TRUE;
return false;
return true;
}
@ -167,7 +167,7 @@ ODM_ReadAndConfig_MAC_REG_8188E(
u1Byte board = pDM_Odm->BoardType;
u4Byte ArrayLen = sizeof(Array_MAC_REG_8188E)/sizeof(u4Byte);
pu4Byte Array = Array_MAC_REG_8188E;
bool biol = FALSE;
bool biol = false;
#ifdef CONFIG_IOL_IOREG_CFG
PADAPTER Adapter = pDM_Odm->Adapter;

12
hal/HalHWImg8188E_RF.c
View file

@ -37,22 +37,22 @@ CheckCondition(
u4Byte cond = Condition;
if ( Condition == 0xCDCDCDCD )
return TRUE;
return true;
cond = Condition & 0x000000FF;
if ( (_board == cond) && cond != 0x00)
return FALSE;
return false;
cond = Condition & 0x0000FF00;
cond = cond >> 8;
if ( (_interface & cond) == 0 && cond != 0x07)
return FALSE;
return false;
cond = Condition & 0x00FF0000;
cond = cond >> 16;
if ( (_platform & cond) == 0 && cond != 0x0F)
return FALSE;
return TRUE;
return false;
return true;
}
@ -175,7 +175,7 @@ HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(PDM_ODM_T pDM_Odm)
u1Byte board = pDM_Odm->BoardType;
u4Byte ArrayLen = sizeof(Array_RadioA_1T_8188E)/sizeof(u4Byte);
pu4Byte Array = Array_RadioA_1T_8188E;
bool biol = FALSE;
bool biol = false;
#ifdef CONFIG_IOL_IOREG_CFG
PADAPTER Adapter = pDM_Odm->Adapter;
struct xmit_frame *pxmit_frame;

68
hal/HalPhyRf.c
View file

@ -316,7 +316,7 @@ phy_SimularityCompare_92C(
u4Byte i, j, diff, SimularityBitMap, bound = 0;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B
bool bResult = TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID);
bool bResult = true, is2T = IS_92C_SERIAL( pHalData->VersionID);
if (is2T)
bound = 8;
@ -352,7 +352,7 @@ phy_SimularityCompare_92C(
{
for ( j = i*4; j < (i+1)*4-2; j++)
result[3][j] = result[final_candidate[i]][j];
bResult = FALSE;
bResult = false;
}
}
return bResult;
@ -361,21 +361,21 @@ phy_SimularityCompare_92C(
{
for (i = 0; i < 4; i++)
result[3][i] = result[c1][i];
return FALSE;
return false;
}
else if (!(SimularityBitMap & 0xF0) && is2T) //path B OK
{
for (i = 4; i < 8; i++)
result[3][i] = result[c1][i];
return FALSE;
return false;
}
else
return FALSE;
return false;
}
/*
return FALSE => do IQK again
return false => do IQK again
*/
bool
phy_SimularityCompare(
@ -465,7 +465,7 @@ phy_IQCalibrate_8192C(
phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM);
}
phy_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T);
phy_PathADDAOn(pAdapter, ADDA_REG, true, is2T);
@ -479,12 +479,12 @@ phy_IQCalibrate_8192C(
if (rfPathSwitch) // Path Div On
{
phy_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T);
phy_PathADDAOn(pAdapter, ADDA_REG, true, is2T);
//DbgPrint("=STEP= change ADDA Path from B to A Path\n");
}
else
{
phy_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T);
phy_PathADDAOn(pAdapter, ADDA_REG, false, is2T);
}
//3 end
//=====================================
@ -499,7 +499,7 @@ phy_IQCalibrate_8192C(
if (!pHalData->bRfPiEnable){
// Switch BB to PI mode to do IQ Calibration.
phy_PIModeSwitch(pAdapter, TRUE);
phy_PIModeSwitch(pAdapter, true);
}
PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, BIT24, 0x00);
@ -577,7 +577,7 @@ phy_IQCalibrate_8192C(
phy_PathAStandBy(pAdapter);
// Turn Path B ADDA on
phy_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T);
phy_PathADDAOn(pAdapter, ADDA_REG, false, is2T);
for (i = 0 ; i < retryCount ; i++){
PathBOK = phy_PathB_IQK_8192C(pAdapter);
@ -610,7 +610,7 @@ phy_IQCalibrate_8192C(
{
if (!pHalData->bRfPiEnable){
// Switch back BB to SI mode after finish IQ Calibration.
phy_PIModeSwitch(pAdapter, FALSE);
phy_PIModeSwitch(pAdapter, false);
}
// Reload ADDA power saving parameters
@ -1172,7 +1172,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08));
}
pHalData->bAPKdone = TRUE;
pHalData->bAPKdone = true;
RTPRINT(FINIT, INIT_IQK, ("<==phy_APCalibrate_8192C()\n"));
}
@ -1190,7 +1190,7 @@ PHY_IQCalibrate_8192C(
bool bPathAOK, bPathBOK;
s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0;
bool is12simular, is13simular, is23simular;
bool bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE;
bool bStartContTx = false, bSingleTone = false, bCarrierSuppression = false;
u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance,
rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable,
@ -1198,7 +1198,7 @@ PHY_IQCalibrate_8192C(
rOFDM0_XCTxAFE, rOFDM0_XDTxAFE,
rOFDM0_RxIQExtAnta};
if (ODM_CheckPowerStatus(pAdapter) == FALSE)
if (ODM_CheckPowerStatus(pAdapter) == false)
return;
#if MP_DRIVER == 1
@ -1239,11 +1239,11 @@ if (pAdapter->registrypriv.mp_mode == 1)
result[3][i] = 0;
}
final_candidate = 0xff;
bPathAOK = FALSE;
bPathBOK = FALSE;
is12simular = FALSE;
is23simular = FALSE;
is13simular = FALSE;
bPathAOK = false;
bPathBOK = false;
is12simular = false;
is23simular = false;
is13simular = false;
RTPRINT(FINIT, INIT_IQK, ("IQK !!!interface %d currentband %d ishardwareD %d\n", pAdapter->interfaceIndex, pHalData->CurrentBandType92D, IS_HARDWARE_TYPE_8192D(pAdapter)));
@ -1256,12 +1256,12 @@ if (pAdapter->registrypriv.mp_mode == 1)
{
if (IS_92C_SERIAL( pHalData->VersionID))
{
phy_IQCalibrate_8192C(pAdapter, result, i, TRUE);
phy_IQCalibrate_8192C(pAdapter, result, i, true);
}
else
{
// For 88C 1T1R
phy_IQCalibrate_8192C(pAdapter, result, i, FALSE);
phy_IQCalibrate_8192C(pAdapter, result, i, false);
}
}
else/* if (IS_HARDWARE_TYPE_8192D(pAdapter))*/
@ -1273,9 +1273,9 @@ if (pAdapter->registrypriv.mp_mode == 1)
else if (pHalData->CurrentBandType92D == BAND_ON_2_4G)
{
if (IS_92D_SINGLEPHY(pHalData->VersionID))
phy_IQCalibrate_8192C(pAdapter, result, i, TRUE);
phy_IQCalibrate_8192C(pAdapter, result, i, true);
else
phy_IQCalibrate_8192C(pAdapter, result, i, FALSE);
phy_IQCalibrate_8192C(pAdapter, result, i, false);
}
}
@ -1341,7 +1341,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
RegECC = result[final_candidate][7];
RTPRINT(FINIT, INIT_IQK, ("IQK: final_candidate is %x\n",final_candidate));
RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC));
bPathAOK = bPathBOK = TRUE;
bPathAOK = bPathBOK = true;
}
else
{
@ -1377,7 +1377,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][i] =
result[final_candidate][i];
pHalData->IQKMatrixRegSetting[Indexforchannel].bIQKDone = TRUE;
pHalData->IQKMatrixRegSetting[Indexforchannel].bIQKDone = true;
RTPRINT(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel));
}
@ -1394,7 +1394,7 @@ PHY_LCCalibrate_8192C(
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
bool bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE;
bool bStartContTx = false, bSingleTone = false, bCarrierSuppression = false;
PMGNT_INFO pMgntInfo=&pAdapter->MgntInfo;
PMGNT_INFO pMgntInfoBuddyAdapter;
u4Byte timeout = 2000, timecount = 0;
@ -1435,21 +1435,21 @@ if (pAdapter->registrypriv.mp_mode == 1)
timecount += 50;
}
pHalData->bLCKInProgress = TRUE;
pHalData->bLCKInProgress = true;
RTPRINT(FINIT, INIT_IQK, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pAdapter->interfaceIndex, pHalData->CurrentBandType92D, timecount));
//if (IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID))
if (IS_2T2R(pHalData->VersionID))
{
phy_LCCalibrate(pAdapter, TRUE);
phy_LCCalibrate(pAdapter, true);
}
else{
// For 88C 1T1R
phy_LCCalibrate(pAdapter, FALSE);
phy_LCCalibrate(pAdapter, false);
}
pHalData->bLCKInProgress = FALSE;
pHalData->bLCKInProgress = false;
RTPRINT(FINIT, INIT_IQK, ("LCK:Finish!!!interface %d\n", pAdapter->interfaceIndex));
@ -1480,11 +1480,11 @@ PHY_APCalibrate_8192C(
return;
if (IS_92C_SERIAL( pHalData->VersionID)){
phy_APCalibrate_8192C(pAdapter, delta, TRUE);
phy_APCalibrate_8192C(pAdapter, delta, true);
}
else{
// For 88C 1T1R
phy_APCalibrate_8192C(pAdapter, delta, FALSE);
phy_APCalibrate_8192C(pAdapter, delta, false);
}
}
@ -1524,7 +1524,7 @@ ODM_ResetIQKResult(
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][5] =
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][7] = 0x0;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].bIQKDone = FALSE;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].bIQKDone = false;
}
}

142
hal/HalPhyRf_8188e.c
View file

@ -135,7 +135,7 @@ odm_TxPwrTrackSetPwr88E(
PDM_ODM_T pDM_Odm
)
{
if (pDM_Odm->BbSwingFlagOfdm == TRUE || pDM_Odm->BbSwingFlagCck == TRUE)
if (pDM_Odm->BbSwingFlagOfdm == true || pDM_Odm->BbSwingFlagCck == true)
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("odm_TxPwrTrackSetPwr88E CH=%d\n", *(pDM_Odm->pChannel)));
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE ))
@ -145,8 +145,8 @@ odm_TxPwrTrackSetPwr88E(
PHY_RF6052SetCCKTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel));
PHY_RF6052SetOFDMTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel));
#endif
pDM_Odm->BbSwingFlagOfdm = FALSE;
pDM_Odm->BbSwingFlagCck = FALSE;
pDM_Odm->BbSwingFlagOfdm = false;
pDM_Odm->BbSwingFlagCck = false;
}
} // odm_TxPwrTrackSetPwr88E
@ -174,8 +174,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
s4Byte Y, ele_C=0;
s1Byte OFDM_index[2], CCK_index=0, OFDM_index_old[2]={0,0}, CCK_index_old=0, index;
u4Byte i = 0, j = 0;
bool is2T = FALSE;
bool bInteralPA = FALSE;
bool is2T = false;
bool bInteralPA = false;
u1Byte OFDM_min_index = 6, rf; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur
u1Byte Indexforchannel = 0/*GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/;
@ -206,7 +206,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
odm_TxPwrTrackSetPwr88E(pDM_Odm);
pDM_Odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; //cosa add for debug
pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = TRUE;
pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = true;
#if (MP_DRIVER == 1)
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
@ -349,8 +349,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
#else
delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue);
#endif
pDM_Odm->RFCalibrateInfo.bReloadtxpowerindex = FALSE;
pDM_Odm->RFCalibrateInfo.bDoneTxpower = FALSE;
pDM_Odm->RFCalibrateInfo.bReloadtxpowerindex = false;
pDM_Odm->RFCalibrateInfo.bDoneTxpower = false;
}
else if (pDM_Odm->RFCalibrateInfo.bDoneTxpower)
{
@ -470,7 +470,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
//Config by SwingTable
if (pDM_Odm->RFCalibrateInfo.TxPowerTrackControl /*&& !pHalData->bNOPG*/)
{
pDM_Odm->RFCalibrateInfo.bDoneTxpower = TRUE;
pDM_Odm->RFCalibrateInfo.bDoneTxpower = true;
//Adujst OFDM Ant_A according to IQK result
ele_D = (OFDMSwingTable[(u1Byte)OFDM_index[0]] & 0xFFC00000)>>22;
@ -488,13 +488,13 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
if (pDM_Odm->BbSwingIdxOfdmCurrent != pDM_Odm->BbSwingIdxOfdm)
{
pDM_Odm->BbSwingIdxOfdmCurrent = pDM_Odm->BbSwingIdxOfdm;
pDM_Odm->BbSwingFlagOfdm = TRUE;
pDM_Odm->BbSwingFlagOfdm = true;
}
if (pDM_Odm->BbSwingIdxCckCurrent != pDM_Odm->BbSwingIdxCck)
{
pDM_Odm->BbSwingIdxCckCurrent = pDM_Odm->BbSwingIdxCck;
pDM_Odm->BbSwingFlagCck = TRUE;
pDM_Odm->BbSwingFlagCck = true;
}
if (X != 0)
@ -589,7 +589,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
#endif
#endif
pDM_Odm->RFCalibrateInfo.ThermalValue_IQK= ThermalValue;
PHY_IQCalibrate_8188E(Adapter, FALSE);
PHY_IQCalibrate_8188E(Adapter, false);
#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
@ -1057,10 +1057,10 @@ ODM_CheckPowerStatus(
PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
// 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence.
if (pMgntInfo->init_adpt_in_progress == TRUE)
if (pMgntInfo->init_adpt_in_progress == true)
{
ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter"));
return TRUE;
ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return true, due to initadapter"));
return true;
}
//
@ -1069,12 +1069,12 @@ ODM_CheckPowerStatus(
Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
if (Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff)
{
ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n",
ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return false, due to %d/%d/%d\n",
Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState));
return FALSE;
return false;
}
*/
return TRUE;
return true;
}
#endif
@ -1100,7 +1100,7 @@ _PHY_SaveADDARegisters(
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
#endif
if (ODM_CheckPowerStatus(pAdapter) == FALSE)
if (ODM_CheckPowerStatus(pAdapter) == false)
return;
#endif
@ -1226,7 +1226,7 @@ _PHY_PathADDAOn(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ADDA ON.\n"));
pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4;
if (FALSE == is2T){
if (false == is2T){
pathOn = 0x0bdb25a0;
ODM_SetBBReg(pDM_Odm, ADDAReg[0], bMaskDWord, 0x0b1b25a0);
}
@ -1347,14 +1347,14 @@ phy_SimularityCompare_8188E(
#endif
#endif
u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B
bool bResult = TRUE;
bool bResult = true;
bool is2T;
s4Byte tmp1 = 0,tmp2 = 0;
if ( (pDM_Odm->RFType ==ODM_2T2R )||(pDM_Odm->RFType ==ODM_2T3R )||(pDM_Odm->RFType ==ODM_2T4R ))
is2T = TRUE;
is2T = true;
else
is2T = FALSE;
is2T = false;
if (is2T)
bound = 8;
@ -1419,7 +1419,7 @@ phy_SimularityCompare_8188E(
{
for ( j = i*4; j < (i+1)*4-2; j++)
result[3][j] = result[final_candidate[i]][j];
bResult = FALSE;
bResult = false;
}
}
return bResult;
@ -1452,7 +1452,7 @@ phy_SimularityCompare_8188E(
result[3][i] = result[c1][i];
}
return FALSE;
return false;
}
}
@ -1551,9 +1551,9 @@ else
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
_PHY_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T);
_PHY_PathADDAOn(pAdapter, ADDA_REG, true, is2T);
#else
_PHY_PathADDAOn(pDM_Odm, ADDA_REG, TRUE, is2T);
_PHY_PathADDAOn(pDM_Odm, ADDA_REG, true, is2T);
#endif
@ -1565,9 +1565,9 @@ else
if (!pDM_Odm->RFCalibrateInfo.bRfPiEnable){
// Switch BB to PI mode to do IQ Calibration.
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
_PHY_PIModeSwitch(pAdapter, TRUE);
_PHY_PIModeSwitch(pAdapter, true);
#else
_PHY_PIModeSwitch(pDM_Odm, TRUE);
_PHY_PIModeSwitch(pDM_Odm, true);
#endif
}
@ -1653,12 +1653,12 @@ else
_PHY_PathAStandBy(pAdapter);
// Turn Path B ADDA on
_PHY_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T);
_PHY_PathADDAOn(pAdapter, ADDA_REG, false, is2T);
#else
_PHY_PathAStandBy(pDM_Odm);
// Turn Path B ADDA on
_PHY_PathADDAOn(pDM_Odm, ADDA_REG, FALSE, is2T);
_PHY_PathADDAOn(pDM_Odm, ADDA_REG, false, is2T);
#endif
for (i = 0 ; i < retryCount ; i++){
@ -1697,9 +1697,9 @@ else
if (!pDM_Odm->RFCalibrateInfo.bRfPiEnable){
// Switch back BB to SI mode after finish IQ Calibration.
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
_PHY_PIModeSwitch(pAdapter, FALSE);
_PHY_PIModeSwitch(pAdapter, false);
#else
_PHY_PIModeSwitch(pDM_Odm, FALSE);
_PHY_PIModeSwitch(pDM_Odm, false);
#endif
}
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
@ -2305,7 +2305,7 @@ if (*(pDM_Odm->mp_mode) != 1)
#endif
}
pDM_Odm->RFCalibrateInfo.bAPKdone = TRUE;
pDM_Odm->RFCalibrateInfo.bAPKdone = true;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_APCalibrate_8188E()\n"));
}
@ -2357,7 +2357,7 @@ PHY_IQCalibrate_8188E(
bool bPathAOK, bPathBOK;
s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0;
bool is12simular, is13simular, is23simular;
bool bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE;
bool bStartContTx = false, bSingleTone = false, bCarrierSuppression = false;
u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance,
rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable,
@ -2366,9 +2366,9 @@ PHY_IQCalibrate_8188E(
rOFDM0_RxIQExtAnta};
bool is2T;
is2T = (pDM_Odm->RFType == ODM_2T2R)?TRUE:FALSE;
is2T = (pDM_Odm->RFType == ODM_2T2R)?true:false;
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE) )
if (ODM_CheckPowerStatus(pAdapter) == FALSE)
if (ODM_CheckPowerStatus(pAdapter) == false)
return;
#else
prtl8192cd_priv priv = pDM_Odm->priv;
@ -2437,11 +2437,11 @@ if (*(pDM_Odm->mp_mode) == 1)
result[3][i] = 0;
}
final_candidate = 0xff;
bPathAOK = FALSE;
bPathBOK = FALSE;
is12simular = FALSE;
is23simular = FALSE;
is13simular = FALSE;
bPathAOK = false;
bPathBOK = false;
is12simular = false;
is23simular = false;
is13simular = false;
for (i=0; i<3; i++) {
@ -2533,7 +2533,7 @@ if (*(pDM_Odm->mp_mode) == 1)
RegECC = result[final_candidate][7];
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: final_candidate is %x\n",final_candidate));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC));
bPathAOK = bPathBOK = TRUE;
bPathAOK = bPathBOK = true;
}
else
{
@ -2574,7 +2574,7 @@ if (*(pDM_Odm->mp_mode) == 1)
{
for (i = 0; i < IQK_Matrix_REG_NUM; i++)
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][i] = result[final_candidate][i];
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].bIQKDone = TRUE;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].bIQKDone = true;
}
//RTPRINT(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel));
@ -2598,7 +2598,7 @@ PHY_LCCalibrate_8188E(
#endif
)
{
bool bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE;
bool bStartContTx = false, bSingleTone = false, bCarrierSuppression = false;
u4Byte timeout = 2000, timecount = 0;
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
@ -2652,27 +2652,27 @@ if (*(pDM_Odm->mp_mode) == 1)
timecount += 50;
}
pDM_Odm->RFCalibrateInfo.bLCKInProgress = TRUE;
pDM_Odm->RFCalibrateInfo.bLCKInProgress = true;
//ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pDM_Odm->interfaceIndex, pHalData->CurrentBandType92D, timecount));
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
if (pDM_Odm->RFType == ODM_2T2R)
{
phy_LCCalibrate_8188E(pAdapter, TRUE);
phy_LCCalibrate_8188E(pAdapter, true);
}
else
#endif
{
// For 88C 1T1R
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
phy_LCCalibrate_8188E(pAdapter, FALSE);
phy_LCCalibrate_8188E(pAdapter, false);
#else
phy_LCCalibrate_8188E(pDM_Odm, FALSE);
phy_LCCalibrate_8188E(pDM_Odm, false);
#endif
}
pDM_Odm->RFCalibrateInfo.bLCKInProgress = FALSE;
pDM_Odm->RFCalibrateInfo.bLCKInProgress = false;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Finish!!!interface %d\n", pDM_Odm->InterfaceIndex));
@ -2716,16 +2716,16 @@ PHY_APCalibrate_8188E(
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
if (pDM_Odm->RFType == ODM_2T2R){
phy_APCalibrate_8188E(pAdapter, delta, TRUE);
phy_APCalibrate_8188E(pAdapter, delta, true);
}
else
#endif
{
// For 88C 1T1R
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
phy_APCalibrate_8188E(pAdapter, delta, FALSE);
phy_APCalibrate_8188E(pAdapter, delta, false);
#else
phy_APCalibrate_8188E(pDM_Odm, delta, FALSE);
phy_APCalibrate_8188E(pDM_Odm, delta, false);
#endif
}
}
@ -2805,16 +2805,16 @@ void PHY_SetRFPathSwitch_8188E(
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
if (pDM_Odm->RFType == ODM_2T2R)
{
phy_SetRFPathSwitch_8188E(pAdapter, bMain, TRUE);
phy_SetRFPathSwitch_8188E(pAdapter, bMain, true);
}
else
#endif
{
// For 88C 1T1R
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
phy_SetRFPathSwitch_8188E(pAdapter, bMain, FALSE);
phy_SetRFPathSwitch_8188E(pAdapter, bMain, false);
#else
phy_SetRFPathSwitch_8188E(pDM_Odm, bMain, FALSE);
phy_SetRFPathSwitch_8188E(pDM_Odm, bMain, false);
#endif
}
}
@ -3041,7 +3041,7 @@ phy_DigitalPredistortion(
else
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK Sucess\n"));
pDM_Odm->RFCalibrateInfo.bDPPathAOK = TRUE;
pDM_Odm->RFCalibrateInfo.bDPPathAOK = true;
break;
}
}
@ -3180,7 +3180,7 @@ phy_DigitalPredistortion(
else
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK Success\n"));
pDM_Odm->RFCalibrateInfo.bDPPathBOK = TRUE;
pDM_Odm->RFCalibrateInfo.bDPPathBOK = true;
break;
}
}
@ -3251,7 +3251,7 @@ phy_DigitalPredistortion(
_PHY_ReloadMACRegisters(pDM_Odm, MAC_REG, MAC_backup);
#endif
pDM_Odm->RFCalibrateInfo.bDPdone = TRUE;
pDM_Odm->RFCalibrateInfo.bDPdone = true;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_DigitalPredistortion()\n"));
#endif
}
@ -3285,19 +3285,19 @@ PHY_DigitalPredistortion_8188E(
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
if (pDM_Odm->RFType == ODM_2T2R){
phy_DigitalPredistortion(pAdapter, TRUE);
phy_DigitalPredistortion(pAdapter, true);
}
else
#endif
{
// For 88C 1T1R
phy_DigitalPredistortion(pAdapter, FALSE);
phy_DigitalPredistortion(pAdapter, false);
}
}
//return value TRUE => Main; FALSE => Aux
//return value true => Main; false => Aux
bool phy_QueryRFPathSwitch_8188E(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
@ -3329,22 +3329,22 @@ bool phy_QueryRFPathSwitch_8188E(
if (is2T) //
{
if (ODM_GetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01)
return TRUE;
return true;
else
return FALSE;
return false;
}
else
{
if (ODM_GetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9) == 0x02)
return TRUE;
return true;
else
return FALSE;
return false;
}
}
//return value TRUE => Main; FALSE => Aux
//return value true => Main; false => Aux
bool PHY_QueryRFPathSwitch_8188E(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
PDM_ODM_T pDM_Odm
@ -3365,22 +3365,22 @@ bool PHY_QueryRFPathSwitch_8188E(
#if DISABLE_BB_RF
return TRUE;
return true;
#endif
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
//if (IS_92C_SERIAL( pHalData->VersionID)){
if (pDM_Odm->RFType == ODM_2T2R){
return phy_QueryRFPathSwitch_8188E(pAdapter, TRUE);
return phy_QueryRFPathSwitch_8188E(pAdapter, true);
}
else
#endif
{
// For 88C 1T1R
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
return phy_QueryRFPathSwitch_8188E(pAdapter, FALSE);
return phy_QueryRFPathSwitch_8188E(pAdapter, false);
#else
return phy_QueryRFPathSwitch_8188E(pDM_Odm, FALSE);
return phy_QueryRFPathSwitch_8188E(pDM_Odm, false);
#endif
}
}

4
hal/hal_com.c
View file

@ -41,8 +41,8 @@
void dump_chip_info(HAL_VERSION ChipVersion)
{
int cnt = 0;
u8 buf[128];
uint cnt = 0;
char buf[128];
if (IS_81XXC(ChipVersion)){
cnt += sprintf((buf+cnt), "Chip Version Info: %s_", IS_92C_SERIAL(ChipVersion)?"CHIP_8192C":"CHIP_8188C");

414
hal/odm.c
View file

File diff suppressed because it is too large Load diff

10
hal/odm_HWConfig.c
View file

@ -397,7 +397,7 @@ odm_RxPhyStatus92CSeries_Parsing(
PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus;
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M))?TRUE :FALSE;
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M))?true :false;
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
@ -417,7 +417,7 @@ odm_RxPhyStatus92CSeries_Parsing(
//if (pHalData->eRFPowerState == eRfOn)
cck_highpwr = pDM_Odm->bCckHighPower;
//else
// cck_highpwr = FALSE;
// cck_highpwr = false;
cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;
@ -467,7 +467,7 @@ odm_RxPhyStatus92CSeries_Parsing(
}
rx_pwr_all += 6;
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
if (cck_highpwr == FALSE)
if (cck_highpwr == false)
{
if (PWDB_ALL >= 80)
PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
@ -780,7 +780,7 @@ odm_Process_RSSIForDM(
return;
}
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M))?TRUE :FALSE;
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M))?true :false;
#if (defined(CONFIG_HW_ANTENNA_DIVERSITY))
#if ((RTL8192C_SUPPORT == 1) ||(RTL8192D_SUPPORT == 1))
@ -983,7 +983,7 @@ ODM_PhyStatusQuery_92CSeries(
pPhyStatus,
pPktinfo);
if (pDM_Odm->RSSI_test == TRUE) {
if (pDM_Odm->RSSI_test == true) {
// Select the packets to do RSSI checking for antenna switching.
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
ODM_SwAntDivChkPerPktRssi(pDM_Odm,pPktinfo->StationID,pPhyInfo);

28
hal/odm_RTL8188E.c
View file

@ -265,7 +265,7 @@ ODM_AntennaDiversityInit_88E(
//ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->AntDivType=%d, pHalData->AntDivCfg=%d\n",
// pDM_Odm->AntDivType, pHalData->AntDivCfg));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->AntDivType=%d\n",pDM_Odm->AntDivType));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->bIsMPChip=%s\n",(pDM_Odm->bIsMPChip?"TRUE":"FALSE")));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->bIsMPChip=%s\n",(pDM_Odm->bIsMPChip?"true":"false")));
if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)
odm_RX_HWAntDivInit(pDM_Odm);
@ -418,7 +418,7 @@ odm_HWAntDiv(
pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
bool bMatchBSSID;
bool bPktFilterMacth = FALSE;
bool bPktFilterMacth = false;
PSTA_INFO_T pEntry;
for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
@ -541,7 +541,7 @@ odm_FastAntTraining(
u4Byte i, MaxRSSI=0;
u1Byte TargetAnt=2;
pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
bool bPktFilterMacth = FALSE;
bool bPktFilterMacth = false;
PSTA_INFO_T pEntry;
@ -559,7 +559,7 @@ odm_FastAntTraining(
else
{
pDM_FatTable->antAveRSSI[i] = pDM_FatTable->antSumRSSI[i] /pDM_FatTable->antRSSIcnt[i];
bPktFilterMacth = TRUE;
bPktFilterMacth = true;
}
if (pDM_FatTable->antAveRSSI[i] > MaxRSSI)
{
@ -572,7 +572,7 @@ odm_FastAntTraining(
}
//2 Select TRX Antenna
if (bPktFilterMacth == FALSE)
if (bPktFilterMacth == false)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("None Packet is matched\n"));
@ -638,7 +638,7 @@ odm_FastAntTrainingCallback(
PADAPTER padapter = pDM_Odm->Adapter;
if (padapter->net_closed == true)
return;
//if (*pDM_Odm->pbNet_closed == TRUE)
//if (*pDM_Odm->pbNet_closed == true)
// return;
#endif
@ -704,7 +704,7 @@ ODM_AntennaDiversity_88E(
if (!pDM_Odm->bLinked)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_AntennaDiversity_88E(): No Link.\n"));
if (pDM_FatTable->bBecomeLinked == TRUE)
if (pDM_FatTable->bBecomeLinked == true)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn off HW AntDiv\n"));
ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); //RegC50[7]=1'b1 //enable HW AntDiv
@ -717,7 +717,7 @@ ODM_AntennaDiversity_88E(
}
else
{
if (pDM_FatTable->bBecomeLinked ==FALSE)
if (pDM_FatTable->bBecomeLinked ==false)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn on HW AntDiv\n"));
//Because HW AntDiv is disabled before Link, we enable HW AntDiv after link
@ -846,12 +846,12 @@ odm_DynamicPrimaryCCA(
PRT_WLAN_STA pEntry;
#endif
PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
Pfalse_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
pPri_CCA_T PrimaryCCA = &(pDM_Odm->DM_PriCCA);
bool Is40MHz;
bool Client_40MHz = FALSE, Client_tmp = FALSE; // connected client BW
bool bConnected = FALSE; // connected or not
bool Client_40MHz = false, Client_tmp = false; // connected client BW
bool bConnected = false; // connected or not
static u1Byte Client_40MHz_pre = 0;
static u8Byte lastTxOkCnt = 0;
static u8Byte lastRxOkCnt = 0;
@ -924,7 +924,7 @@ odm_DynamicPrimaryCCA(
if (pEntry->bAssociated)
{
bConnected=TRUE; // client is connected or not
bConnected=true; // client is connected or not
break;
}
}
@ -947,7 +947,7 @@ odm_DynamicPrimaryCCA(
if (Client_tmp>Client_40MHz)
Client_40MHz = Client_tmp; // 40M/20M coexist => 40M priority is High
bConnected = TRUE;
bConnected = true;
}
}
#endif
@ -1223,6 +1223,6 @@ ODM_DynamicPrimaryCCA_DupRTS(
PDM_ODM_T pDM_Odm
)
{
return FALSE;
return false;
}
#endif //#if (RTL8188E_SUPPORT == 1)

4
hal/odm_interface.c
View file

@ -653,9 +653,9 @@ ODM_FillH2CCmd(
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
//FillH2CCmd(pH2CBuffer, H2CBufferLen, CmdNum, pElementID, pCmdLen, pCmbBuffer, CmdStartSeq);
return FALSE;
return false;
#endif
return TRUE;
return true;
}
#endif

4
hal/rtl8188e_cmd.c
View file

@ -650,9 +650,9 @@ CheckFwRsvdPageContent(
// Now we just send 4 types packet to rsvd page.
// (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp.
// Input:
// bDLFinished - FALSE: At the first time we will send all the packets as a large packet to Hw,
// bDLFinished - false: At the first time we will send all the packets as a large packet to Hw,
// so we need to set the packet length to total lengh.
// TRUE: At the second time, we should send the first packet (default:beacon)
// true: At the second time, we should send the first packet (default:beacon)
// to Hw again and set the lengh in descriptor to the real beacon lengh.
// 2009.10.15 by tynli.
static void SetFwRsvdPagePkt(PADAPTER padapter, bool bDLFinished)

8
hal/rtl8188e_hal_init.c
View file

@ -868,7 +868,7 @@ void rtl8188e_InitializeFirmwareVars(PADAPTER padapter)
pHalData->LastHMEBoxNum = 0;
// pHalData->H2CQueueHead = 0;
// pHalData->H2CQueueTail = 0;
// pHalData->H2CStopInsertQueue = FALSE;
// pHalData->H2CStopInsertQueue = false;
}
#endif //CONFIG_WOWLAN
@ -2968,7 +2968,7 @@ Hal_ReadPowerValueFromPROM_8188E(
}
//pHalData->bNOPG = TRUE;
//pHalData->bNOPG = true;
return;
}
@ -2981,7 +2981,7 @@ Hal_ReadPowerValueFromPROM_8188E(
if (pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF)
{
pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
// pHalData->bNOPG = TRUE;
// pHalData->bNOPG = true;
}
}
for (group = 0 ; group < MAX_CHNL_GROUP_24G-1; group++)
@ -3182,7 +3182,7 @@ Hal_ReadTxPowerInfo88E(
Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail);
if (!AutoLoadFail)
pHalData->bTXPowerDataReadFromEEPORM = TRUE;
pHalData->bTXPowerDataReadFromEEPORM = true;
//for (rfPath = 0 ; rfPath < MAX_RF_PATH ; rfPath++)
for (rfPath = 0 ; rfPath < pHalData->NumTotalRFPath ; rfPath++)

34
hal/rtl8188e_phycfg.c
View file

@ -96,7 +96,7 @@ sic_IsSICReady(
{
if (retryCnt++ >= SIC_MAX_POLL_CNT)
{
//RTPRINT(FPHY, (PHY_SICR|PHY_SICW), ("[SIC], sic_IsSICReady() return FALSE\n"));
//RTPRINT(FPHY, (PHY_SICR|PHY_SICW), ("[SIC], sic_IsSICReady() return false\n"));
return false;
}
@ -258,7 +258,7 @@ SIC_SetBBReg(
delay_ms(10); // 1 ms
if ((BBWaitCounter > 100) || RT_CANNOT_IO(Adapter))
{// Wait too long, return FALSE to avoid to be stuck here.
{// Wait too long, return false to avoid to be stuck here.
RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg(), Fail to set BB offset(%#x)!!, WaitCnt(%d)\n", RegAddr, BBWaitCounter));
return;
}
@ -303,7 +303,7 @@ SIC_QueryBBReg(
delay_ms(10); // 10 ms
if ((BBWaitCounter > 100) || RT_CANNOT_IO(Adapter))
{// Wait too long, return FALSE to avoid to be stuck here.
{// Wait too long, return false to avoid to be stuck here.
RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_QueryBBReg(), Fail to query BB offset(%#x)!!, WaitCnt(%d)\n", RegAddr, BBWaitCounter));
return ReturnValue;
}
@ -1461,7 +1461,7 @@ phy_BB8190_Config_HardCode(
PADAPTER Adapter
)
{
//RT_ASSERT(FALSE, ("This function is not implement yet!!\n"));
//RT_ASSERT(false, ("This function is not implement yet!!\n"));
return _SUCCESS;
}
@ -1946,7 +1946,7 @@ PHY_CheckBBAndRFOK(
switch (CheckBlock)
{
case HW90_BLOCK_MAC:
//RT_ASSERT(FALSE, ("PHY_CheckBBRFOK(): Never Write 0x100 here!"));
//RT_ASSERT(false, ("PHY_CheckBBRFOK(): Never Write 0x100 here!"));
//RT_TRACE(COMP_INIT, DBG_LOUD, ("PHY_CheckBBRFOK(): Never Write 0x100 here!\n"));
break;
@ -2532,11 +2532,11 @@ _PHY_SetBWMode92C(
break;
default:
//RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID));
//RT_ASSERT(false, ("Unknown RFChipID: %d\n", pHalData->RFChipID));
break;
}
//pHalData->SetBWModeInProgress= FALSE;
//pHalData->SetBWModeInProgress= false;
//RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SetBWModeCallback8192C()\n" ));
}
@ -2590,7 +2590,7 @@ PHY_SetBWMode8188E(
//if (pHalData->SetBWModeInProgress)
// return;
//pHalData->SetBWModeInProgress= TRUE;
//pHalData->SetBWModeInProgress= true;
pHalData->CurrentChannelBW = Bandwidth;
@ -2644,7 +2644,7 @@ PHY_SwChnl8188E( // Call after initialization
if (pHalData->rf_chip == RF_PSEUDO_11N)
{
//pHalData->SwChnlInProgress=FALSE;
//pHalData->SwChnlInProgress=false;
return; //return immediately if it is peudo-phy
}
@ -2672,12 +2672,12 @@ PHY_SwChnl8188E( // Call after initialization
break;
default:
//RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode));
//RT_ASSERT(false, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode));
break;
}
//--------------------------------------------
//pHalData->SwChnlInProgress = TRUE;
//pHalData->SwChnlInProgress = true;
if (channel == 0)
channel = 1;
@ -2695,10 +2695,10 @@ PHY_SwChnl8188E( // Call after initialization
}
else
{
//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE driver sleep or unload\n"));
//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress false driver sleep or unload\n"));
//if (IS_HARDWARE_TYPE_8192SU(Adapter))
//{
// pHalData->SwChnlInProgress = FALSE;
// pHalData->SwChnlInProgress = false;
pHalData->CurrentChannel = tmpchannel;
//}
}
@ -2784,11 +2784,11 @@ PHY_SwChnlPhy8192C( // Only called during initialize
//return immediately if it is peudo-phy
if (pHalData->rf_chip == RF_PSEUDO_11N)
{
//pHalData->SwChnlInProgress=FALSE;
//pHalData->SwChnlInProgress=false;
return;
}
//pHalData->SwChnlInProgress = TRUE;
//pHalData->SwChnlInProgress = true;
if ( channel == 0)
channel = 1;
@ -2799,7 +2799,7 @@ PHY_SwChnlPhy8192C( // Only called during initialize
phy_FinishSwChnlNow(Adapter,channel);
//pHalData->SwChnlInProgress = FALSE;
//pHalData->SwChnlInProgress = false;
}
@ -2882,7 +2882,7 @@ static void _PHY_SetRFPathSwitch(
}
//return value TRUE => Main; FALSE => Aux
//return value true => Main; false => Aux
static bool _PHY_QueryRFPathSwitch(
PADAPTER pAdapter,

57
hal/usb_halinit.c
View file

@ -121,7 +121,7 @@ static bool HalUsbSetQueuePipeMapping8188EUsb(
}
void rtl8188eu_interface_configure(_adapter *padapter)
static void rtl8188eu_interface_configure(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
@ -204,9 +204,9 @@ static void _dbg_dump_macreg(_adapter *padapter)
static void _InitPABias(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
u8 pa_setting;
bool is92C = IS_92C_SERIAL(pHalData->VersionID);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
u8 pa_setting;
bool is92C = IS_92C_SERIAL(pHalData->VersionID);
//FIXED PA current issue
//efuse_one_byte_read(padapter, 0x1FA, &pa_setting);
@ -498,7 +498,7 @@ _InitNormalChipOneOutEpPriority(
value = QUEUE_NORMAL;
break;
default:
//RT_ASSERT(FALSE,("Shall not reach here!\n"));
//RT_ASSERT(false,("Shall not reach here!\n"));
break;
}
@ -541,7 +541,7 @@ _InitNormalChipTwoOutEpPriority(
valueLow = QUEUE_NORMAL;
break;
default:
//RT_ASSERT(FALSE,("Shall not reach here!\n"));
//RT_ASSERT(false,("Shall not reach here!\n"));
break;
}
@ -612,7 +612,7 @@ _InitQueuePriority(
_InitNormalChipThreeOutEpPriority(Adapter);
break;
default:
//RT_ASSERT(FALSE,("Shall not reach here!\n"));
//RT_ASSERT(false,("Shall not reach here!\n"));
break;
}
@ -969,7 +969,7 @@ usb_AggSettingRxUpdate(
pHalData->HwRxPageSize = 1024;
break;
default:
//RT_ASSERT(FALSE, ("RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n"));
//RT_ASSERT(false, ("RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n"));
break;
}
#endif
@ -991,7 +991,7 @@ InitUsbAggregationSetting(
// 201/12/10 MH Add for USB agg mode dynamic switch.
pHalData->UsbRxHighSpeedMode = false;
}
void
static void
HalRxAggr8188EUsb(
PADAPTER Adapter,
bool Value
@ -1018,7 +1018,7 @@ HalRxAggr8188EUsb(
* 12/10/2010 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
void
static void
USB_AggModeSwitch(
PADAPTER Adapter
)
@ -1241,7 +1241,7 @@ rt_rf_power_state RfOnOffDetect( PADAPTER pAdapter )
void _ps_open_RF(_adapter *padapter);
u32 rtl8188eu_hal_init(PADAPTER Adapter)
static u32 rtl8188eu_hal_init(PADAPTER Adapter)
{
u8 value8 = 0;
u16 value16;
@ -1741,18 +1741,14 @@ void _ps_open_RF(_adapter *padapter) {
//phy_SsPwrSwitch92CU(padapter, rf_on, 1);
}
void _ps_close_RF(_adapter *padapter){
static void _ps_close_RF(_adapter *padapter){
//here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified
//phy_SsPwrSwitch92CU(padapter, rf_off, 1);
}
void
CardDisableRTL8188EU(
PADAPTER Adapter
)
static void CardDisableRTL8188EU(PADAPTER Adapter)
{
// PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
u8 val8;
u16 val16;
u32 val32;
@ -1822,8 +1818,8 @@ static void rtl8192cu_hw_power_down(_adapter *padapter)
rtw_write16(padapter, REG_APS_FSMCO, 0x8812);
}
u32 rtl8188eu_hal_deinit(PADAPTER Adapter)
{
static u32 rtl8188eu_hal_deinit(PADAPTER Adapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
DBG_88E("==> %s\n",__func__);
@ -1856,7 +1852,7 @@ u32 rtl8188eu_hal_deinit(PADAPTER Adapter)
}
unsigned int rtl8188eu_inirp_init(PADAPTER Adapter)
static unsigned int rtl8188eu_inirp_init(PADAPTER Adapter)
{
u8 i;
struct recv_buf *precvbuf;
@ -1919,7 +1915,7 @@ _func_exit_;
}
unsigned int rtl8188eu_inirp_deinit(PADAPTER Adapter)
static unsigned int rtl8188eu_inirp_deinit(PADAPTER Adapter)
{
RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n ===> usb_rx_deinit\n"));
@ -2372,7 +2368,8 @@ static void ResumeTxBeacon(_adapter *padapter)
pHalData->RegReg542 |= BIT0;
rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542);
}
void UpdateInterruptMask8188EU(PADAPTER padapter,u8 bHIMR0 ,u32 AddMSR, u32 RemoveMSR)
static void UpdateInterruptMask8188EU(PADAPTER padapter,u8 bHIMR0 ,u32 AddMSR, u32 RemoveMSR)
{
HAL_DATA_TYPE *pHalData;
@ -2982,7 +2979,7 @@ static void hw_var_set_mlme_join(PADAPTER Adapter, u8 variable, u8* val)
#endif
}
void SetHwReg8188EU(PADAPTER Adapter, u8 variable, u8* val)
static void SetHwReg8188EU(PADAPTER Adapter, u8 variable, u8* val)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
@ -3822,7 +3819,7 @@ _func_enter_;
_func_exit_;
}
void GetHwReg8188EU(PADAPTER Adapter, u8 variable, u8* val)
static void GetHwReg8188EU(PADAPTER Adapter, u8 variable, u8* val)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
DM_ODM_T *podmpriv = &pHalData->odmpriv;
@ -3891,7 +3888,7 @@ _func_exit_;
// Description:
// Query setting of specified variable.
//
u8
static u8
GetHalDefVar8188EUsb(
PADAPTER Adapter,
HAL_DEF_VARIABLE eVariable,
@ -4026,8 +4023,7 @@ GetHalDefVar8188EUsb(
// Description:
// Change default setting of specified variable.
//
u8
SetHalDefVar8188EUsb(
static u8 SetHalDefVar8188EUsb(
PADAPTER Adapter,
HAL_DEF_VARIABLE eVariable,
void * pValue
@ -4138,7 +4134,7 @@ u32 _update_92cu_basic_rate(_adapter *padapter, unsigned int mask)
return BrateCfg;
}
*/
void _update_response_rate(_adapter *padapter,unsigned int mask)
static void _update_response_rate(_adapter *padapter,unsigned int mask)
{
u8 RateIndex = 0;
// Set RRSR rate table.
@ -4154,7 +4150,7 @@ void _update_response_rate(_adapter *padapter,unsigned int mask)
rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex);
}
void UpdateHalRAMask8188EUsb(PADAPTER padapter, u32 mac_id, u8 rssi_level)
static void UpdateHalRAMask8188EUsb(PADAPTER padapter, u32 mac_id, u8 rssi_level)
{
//volatile unsigned int result;
u8 init_rate=0;
@ -4300,8 +4296,7 @@ void UpdateHalRAMask8188EUsb(PADAPTER padapter, u32 mac_id, u8 rssi_level)
}
void SetBeaconRelatedRegisters8188EUsb(PADAPTER padapter)
static void SetBeaconRelatedRegisters8188EUsb(PADAPTER padapter)
{
u32 value32;
//HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);

12
hal/usb_ops_linux.c
View file

@ -492,10 +492,10 @@ static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs)
case -ENODEV:
case -ESHUTDOWN:
//padapter->bSurpriseRemoved=true;
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n"));
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=true\n"));
case -ENOENT:
padapter->bDriverStopped=true;
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n"));
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=true\n"));
break;
case -EPROTO:
break;
@ -978,10 +978,10 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
case -ENODEV:
case -ESHUTDOWN:
//padapter->bSurpriseRemoved=true;
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n"));
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=true\n"));
case -ENOENT:
padapter->bDriverStopped=true;
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n"));
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=true\n"));
break;
case -EPROTO:
case -EOVERFLOW:
@ -1415,10 +1415,10 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
case -ENODEV:
case -ESHUTDOWN:
//padapter->bSurpriseRemoved=true;
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n"));
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=true\n"));
case -ENOENT:
padapter->bDriverStopped=true;
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n"));
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=true\n"));
break;
case -EPROTO:
case -EOVERFLOW:

2
include/Hal8188EPhyCfg.h
View file

@ -361,7 +361,7 @@ storePwrIndexDiffRateOffset(
// 2) "#define RTL8723_FPGA_VERIFICATION 1" in Precomp.h.WlanE.Windows
// 3) "#define RTL8190_Download_Firmware_From_Header 0" in Precomp.h.WlanE.Windows if needed.
//
#if (RTL8188E_SUPPORT == 1) && (RTL8188E_FPGA_TRUE_PHY_VERIFICATION == 1)
#if (RTL8188E_SUPPORT == 1) && (RTL8188E_FPGA_true_PHY_VERIFICATION == 1)
#define SIC_ENABLE 1
#define SIC_HW_SUPPORT 1
#else

59
include/HalVerDef.h
View file

@ -20,9 +20,6 @@
#ifndef __HAL_VERSION_DEF_H__
#define __HAL_VERSION_DEF_H__
#define TRUE true
#define FALSE false
// HAL_IC_TYPE_E
typedef enum tag_HAL_IC_Type_Definition
{
@ -105,51 +102,51 @@ typedef struct tag_HAL_VERSION
//HAL_VERSION VersionID
// HAL_IC_TYPE_E
#define IS_81XXC(version) (((GET_CVID_IC_TYPE(version) == CHIP_8192C)||(GET_CVID_IC_TYPE(version) == CHIP_8188C))? TRUE : FALSE)
#define IS_8723_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723A)? TRUE : FALSE)
#define IS_92D(version) ((GET_CVID_IC_TYPE(version) == CHIP_8192D)? TRUE : FALSE)
#define IS_8188E(version) ((GET_CVID_IC_TYPE(version) == CHIP_8188E)? TRUE : FALSE)
#define IS_81XXC(version) (((GET_CVID_IC_TYPE(version) == CHIP_8192C)||(GET_CVID_IC_TYPE(version) == CHIP_8188C))? true : false)
#define IS_8723_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723A)? true : false)
#define IS_92D(version) ((GET_CVID_IC_TYPE(version) == CHIP_8192D)? true : false)
#define IS_8188E(version) ((GET_CVID_IC_TYPE(version) == CHIP_8188E)? true : false)
//HAL_CHIP_TYPE_E
#define IS_TEST_CHIP(version) ((GET_CVID_CHIP_TYPE(version)==TEST_CHIP)? TRUE: FALSE)
#define IS_NORMAL_CHIP(version) ((GET_CVID_CHIP_TYPE(version)==NORMAL_CHIP)? TRUE: FALSE)
#define IS_TEST_CHIP(version) ((GET_CVID_CHIP_TYPE(version)==TEST_CHIP)? true: false)
#define IS_NORMAL_CHIP(version) ((GET_CVID_CHIP_TYPE(version)==NORMAL_CHIP)? true: false)
//HAL_CUT_VERSION_E
#define IS_A_CUT(version) ((GET_CVID_CUT_VERSION(version) == A_CUT_VERSION) ? TRUE : FALSE)
#define IS_B_CUT(version) ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? TRUE : FALSE)
#define IS_C_CUT(version) ((GET_CVID_CUT_VERSION(version) == C_CUT_VERSION) ? TRUE : FALSE)
#define IS_D_CUT(version) ((GET_CVID_CUT_VERSION(version) == D_CUT_VERSION) ? TRUE : FALSE)
#define IS_E_CUT(version) ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? TRUE : FALSE)
#define IS_A_CUT(version) ((GET_CVID_CUT_VERSION(version) == A_CUT_VERSION) ? true : false)
#define IS_B_CUT(version) ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? true : false)
#define IS_C_CUT(version) ((GET_CVID_CUT_VERSION(version) == C_CUT_VERSION) ? true : false)
#define IS_D_CUT(version) ((GET_CVID_CUT_VERSION(version) == D_CUT_VERSION) ? true : false)
#define IS_E_CUT(version) ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? true : false)
//HAL_VENDOR_E
#define IS_CHIP_VENDOR_TSMC(version) ((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_TSMC)? TRUE: FALSE)
#define IS_CHIP_VENDOR_UMC(version) ((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_UMC)? TRUE: FALSE)
#define IS_CHIP_VENDOR_TSMC(version) ((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_TSMC)? true: false)
#define IS_CHIP_VENDOR_UMC(version) ((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_UMC)? true: false)
//HAL_RF_TYPE_E
#define IS_1T1R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T1R)? TRUE : FALSE )
#define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)? TRUE : FALSE)
#define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)? TRUE : FALSE)
#define IS_1T1R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T1R)? true : false )
#define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)? true : false)
#define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)? true : false)
//----------------------------------------------------------------------------
//Chip version Macro. --
//----------------------------------------------------------------------------
#define IS_81XXC_TEST_CHIP(version) ((IS_81XXC(version) && (!IS_NORMAL_CHIP(version)))? TRUE: FALSE)
#define IS_81XXC_TEST_CHIP(version) ((IS_81XXC(version) && (!IS_NORMAL_CHIP(version)))? true: false)
#define IS_92C_SERIAL(version) ((IS_81XXC(version) && IS_2T2R(version)) ? TRUE : FALSE)
#define IS_81xxC_VENDOR_UMC_A_CUT(version) (IS_81XXC(version)?(IS_CHIP_VENDOR_UMC(version) ? (IS_A_CUT(version) ? TRUE : FALSE) : FALSE): FALSE)
#define IS_81xxC_VENDOR_UMC_B_CUT(version) (IS_81XXC(version)?(IS_CHIP_VENDOR_UMC(version) ? (IS_B_CUT(version) ? TRUE : FALSE) : FALSE): FALSE)
#define IS_81xxC_VENDOR_UMC_C_CUT(version) (IS_81XXC(version)?(IS_CHIP_VENDOR_UMC(version) ? (IS_C_CUT(version) ? TRUE : FALSE) : FALSE): FALSE)
#define IS_92C_SERIAL(version) ((IS_81XXC(version) && IS_2T2R(version)) ? true : false)
#define IS_81xxC_VENDOR_UMC_A_CUT(version) (IS_81XXC(version)?(IS_CHIP_VENDOR_UMC(version) ? (IS_A_CUT(version) ? true : false) : false): false)
#define IS_81xxC_VENDOR_UMC_B_CUT(version) (IS_81XXC(version)?(IS_CHIP_VENDOR_UMC(version) ? (IS_B_CUT(version) ? true : false) : false): false)
#define IS_81xxC_VENDOR_UMC_C_CUT(version) (IS_81XXC(version)?(IS_CHIP_VENDOR_UMC(version) ? (IS_C_CUT(version) ? true : false) : false): false)
#define IS_NORMAL_CHIP92D(version) (( IS_92D(version))?((GET_CVID_CHIP_TYPE(version)==NORMAL_CHIP)? TRUE: FALSE):FALSE)
#define IS_NORMAL_CHIP92D(version) (( IS_92D(version))?((GET_CVID_CHIP_TYPE(version)==NORMAL_CHIP)? true: false):false)
#define IS_92D_SINGLEPHY(version) ((IS_92D(version)) ? (IS_2T2R(version) ? TRUE: FALSE) : FALSE)
#define IS_92D_C_CUT(version) ((IS_92D(version)) ? (IS_C_CUT(version) ? TRUE : FALSE) : FALSE)
#define IS_92D_D_CUT(version) ((IS_92D(version)) ? (IS_D_CUT(version) ? TRUE : FALSE) : FALSE)
#define IS_92D_E_CUT(version) ((IS_92D(version)) ? (IS_E_CUT(version) ? TRUE : FALSE) : FALSE)
#define IS_92D_SINGLEPHY(version) ((IS_92D(version)) ? (IS_2T2R(version) ? true: false) : false)
#define IS_92D_C_CUT(version) ((IS_92D(version)) ? (IS_C_CUT(version) ? true : false) : false)
#define IS_92D_D_CUT(version) ((IS_92D(version)) ? (IS_D_CUT(version) ? true : false) : false)
#define IS_92D_E_CUT(version) ((IS_92D(version)) ? (IS_E_CUT(version) ? true : false) : false)
#define IS_8723A_A_CUT(version) ((IS_8723_SERIES(version)) ? ( IS_A_CUT(version)?TRUE : FALSE) : FALSE)
#define IS_8723A_B_CUT(version) ((IS_8723_SERIES(version)) ? ( IS_B_CUT(version)?TRUE : FALSE) : FALSE)
#define IS_8723A_A_CUT(version) ((IS_8723_SERIES(version)) ? ( IS_A_CUT(version)?true : false) : false)
#define IS_8723A_B_CUT(version) ((IS_8723_SERIES(version)) ? ( IS_B_CUT(version)?true : false) : false)
#endif

2
include/autoconf.h
View file

@ -23,7 +23,7 @@
#define CONFIG_ODM_REFRESH_RAMASK
#define CONFIG_PHY_SETTING_WITH_ODM
//for FPGA VERIFICATION config
#define RTL8188E_FPGA_TRUE_PHY_VERIFICATION 0
#define RTL8188E_FPGA_true_PHY_VERIFICATION 0
//***** temporarily flag *******
/*

2
include/mp_custom_oid.h
View file

@ -98,7 +98,7 @@
// by Owen for RTL8185 Phy Status Report Utility
#define OID_RT_UTILITY_FALSE_ALARM_COUNTERS 0xFF818580
#define OID_RT_UTILITY_false_ALARM_COUNTERS 0xFF818580
#define OID_RT_UTILITY_SELECT_DEBUG_MODE 0xFF818581
#define OID_RT_UTILITY_SELECT_SUBCARRIER_NUMBER 0xFF818582
#define OID_RT_UTILITY_GET_RSSI_STATUS 0xFF818583

14
include/odm.h
View file

@ -204,7 +204,7 @@ typedef struct _Dynamic_Power_Saving_
}PS_T,*pPS_T;
typedef struct _FALSE_ALARM_STATISTICS{
typedef struct _false_ALARM_STATISTICS{
u4Byte Cnt_Parity_Fail;
u4Byte Cnt_Rate_Illegal;
u4Byte Cnt_Crc8_fail;
@ -219,7 +219,7 @@ typedef struct _FALSE_ALARM_STATISTICS{
u4Byte Cnt_CCA_all;
u4Byte Cnt_BW_USC; //Gary
u4Byte Cnt_BW_LSC; //Gary
}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;
}false_ALARM_STATISTICS, *Pfalse_ALARM_STATISTICS;
typedef struct _Dynamic_Primary_CCA{
u1Byte PriCCA_flag;
@ -544,7 +544,7 @@ typedef enum _ODM_Common_Info_Definition
ODM_CMNINFO_FAB_VER, // ODM_FAB_E
ODM_CMNINFO_RF_TYPE, // ODM_RF_PATH_E or ODM_RF_TYPE_E?
ODM_CMNINFO_BOARD_TYPE, // ODM_BOARD_TYPE_E
ODM_CMNINFO_EXT_LNA, // TRUE
ODM_CMNINFO_EXT_LNA, // true
ODM_CMNINFO_EXT_PA,
ODM_CMNINFO_EXT_TRSW,
ODM_CMNINFO_PATCH_ID, //CUSTOMER ID
@ -1215,8 +1215,8 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
PS_T DM_PSTable;
Pri_CCA_T DM_PriCCA;
RXHP_T DM_RXHP_Table;
FALSE_ALARM_STATISTICS FalseAlmCnt;
FALSE_ALARM_STATISTICS FlaseAlmCntBuddyAdapter;
false_ALARM_STATISTICS FalseAlmCnt;
false_ALARM_STATISTICS FlaseAlmCntBuddyAdapter;
//#ifdef CONFIG_ANTENNA_DIVERSITY
SWAT_T DM_SWAT_Table;
bool RSSI_test;
@ -1415,8 +1415,8 @@ typedef enum tag_DIG_Connect_Definition
#define DM_SCAN_RSSI_TH 0x14 //scan return issue for LC
#define DM_FALSE_ALARM_THRESH_LOW 400
#define DM_FALSE_ALARM_THRESH_HIGH 1000
#define DM_false_ALARM_THRESH_LOW 400
#define DM_false_ALARM_THRESH_HIGH 1000
#define DM_DIG_MAX_NIC 0x3e
#define DM_DIG_MIN_NIC 0x1e //0x22//0x1c

2
include/odm_debug.h
View file

@ -140,7 +140,7 @@
DbgPrint( "Assertion failed! %s at ......\n", #expr); \
DbgPrint( " ......%s,%s,line=%d\n",__FILE__,__func__,__LINE__); \
RT_PRINTK fmt; \
ASSERT(FALSE); \
ASSERT(false); \
}
#define ODM_dbg_enter() { DbgPrint("==> %s\n", __func__); }
#define ODM_dbg_exit() { DbgPrint("<== %s\n", __func__); }

2
include/osdep_service.h
View file

@ -234,7 +234,7 @@ __inline static void _set_timer(_timer *ptimer,u32 delay_time)
__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled)
{
del_timer_sync(ptimer);
*bcancelled= true;//TRUE ==1; FALSE==0
*bcancelled= true;//true ==1; false==0
}
#ifdef PLATFORM_LINUX

6
include/rtl8188e_spec.h
View file

@ -401,15 +401,15 @@
//RXERR_RPT
#define RXERR_TYPE_OFDM_PPDU 0
#define RXERR_TYPE_OFDM_FALSE_ALARM 1
#define RXERR_TYPE_OFDM_false_ALARM 1
#define RXERR_TYPE_OFDM_MPDU_OK 2
#define RXERR_TYPE_OFDM_MPDU_FAIL 3
#define RXERR_TYPE_CCK_PPDU 4
#define RXERR_TYPE_CCK_FALSE_ALARM 5
#define RXERR_TYPE_CCK_false_ALARM 5
#define RXERR_TYPE_CCK_MPDU_OK 6
#define RXERR_TYPE_CCK_MPDU_FAIL 7
#define RXERR_TYPE_HT_PPDU 8
#define RXERR_TYPE_HT_FALSE_ALARM 9
#define RXERR_TYPE_HT_false_ALARM 9
#define RXERR_TYPE_HT_MPDU_TOTAL 10
#define RXERR_TYPE_HT_MPDU_OK 11
#define RXERR_TYPE_HT_MPDU_FAIL 12

16
include/rtw_mp.h
View file

@ -268,7 +268,7 @@ typedef struct _MPT_CONTEXT
WIRELESS_MODE MptWirelessModeToSw; // Wireless mode to switch.
u8 MptChannelToSw; // Channel to switch.
u8 MptInitGainToSet; // Initial gain to set.
//ULONG bMptAntennaA; // TRUE if we want to use antenna A.
//ULONG bMptAntennaA; // true if we want to use antenna A.
ULONG MptBandWidth; // bandwidth to switch.
ULONG MptRateIndex; // rate index.
// Register value kept for Single Carrier Tx test.
@ -280,21 +280,21 @@ typedef struct _MPT_CONTEXT
// Content of RCR Regsiter for Mass Production Test.
ULONG MptRCR;
// TRUE if we only receive packets with specific pattern.
// true if we only receive packets with specific pattern.
bool bMptFilterPattern;
// Rx OK count, statistics used in Mass Production Test.
ULONG MptRxOkCnt;
// Rx CRC32 error count, statistics used in Mass Production Test.
ULONG MptRxCrcErrCnt;
bool bCckContTx; // TRUE if we are in CCK Continuous Tx test.
bool bOfdmContTx; // TRUE if we are in OFDM Continuous Tx test.
bool bStartContTx; // TRUE if we have start Continuous Tx test.
// TRUE if we are in Single Carrier Tx test.
bool bCckContTx; // true if we are in CCK Continuous Tx test.
bool bOfdmContTx; // true if we are in OFDM Continuous Tx test.
bool bStartContTx; // true if we have start Continuous Tx test.
// true if we are in Single Carrier Tx test.
bool bSingleCarrier;
// TRUE if we are in Carrier Suppression Tx Test.
// true if we are in Carrier Suppression Tx Test.
bool bCarrierSuppression;
//TRUE if we are in Single Tone Tx test.
//true if we are in Single Tone Tx test.
bool bSingleTone;
// ACK counter asked by K.Y..

504
os_dep/ioctl_linux.c
View file

@ -197,7 +197,7 @@ static void request_wps_pbc_event(_adapter *padapter)
p=buff;
p+=sprintf(p, "WPS_PBC_START.request=TRUE");
p+=sprintf(p, "WPS_PBC_START.request=true");
_rtw_memset(&wrqu,0,sizeof(wrqu));
@ -4801,7 +4801,7 @@ static int rtw_p2p_get_device_type(struct net_device *dev,
{
u16 type = 0;
_rtw_memcpy(&type, dev_type, 2);
memcpy(&type, dev_type, 2);
type = be16_to_cpu(type);
sprintf(dev_type_str, "\n\nN=%.2d", type);
blnMatch = 1;
@ -6194,7 +6194,7 @@ static int rtw_p2p_get2(struct net_device *dev,
struct wifidirect_info *pwdinfo= &(padapter->wdinfo);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
DBG_88E("[%s] extra = %s\n", __func__, (char*) wrqu->data.pointer);
DBG_88E("[%s] extra = %s\n", __func__, (char *)wrqu->data.pointer);
if (_rtw_memcmp(extra, "wpsCM=", 6))
{
@ -9663,132 +9663,122 @@ static int rtw_mp_read_reg(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra)
{
char input[wrqu->length];
PADAPTER padapter = rtw_netdev_priv(dev);
char *input = kmalloc(wrqu->length, GFP_KERNEL);
char *pch, *pnext, *ptmp;
char *width_str;
char width;
char data[20],tmp[20];
u32 addr;
//u32 *data = (u32*)extra;
u32 ret, i=0, j=0, strtout=0;
PADAPTER padapter = rtw_netdev_priv(dev);
if (wrqu->length > 128)
if (!input)
return -ENOMEM;
if (copy_from_user(input, wrqu->pointer, wrqu->length)) {
kfree(input);
return -EFAULT;
if (copy_from_user(input, wrqu->pointer, wrqu->length))
return -EFAULT;
}
_rtw_memset(data, 0, 20);
_rtw_memset(tmp, 0, 20);
_rtw_memset(extra, 0, wrqu->length);
pch = input;
pnext = strpbrk(pch, " ,.-");
if (pnext == NULL) return -EINVAL;
if (pnext == NULL) {
kfree(input);
return -EINVAL;
}
*pnext = 0;
width_str = pch;
pch = pnext + 1;
if ((pch - input) >= wrqu->length) return -EINVAL;
if ((pch - input) >= wrqu->length) {
kfree(input);
return -EINVAL;
}
kfree(input);
addr = simple_strtoul(pch, &ptmp, 16);
if (addr > 0x3FFF) return -EINVAL;
if (addr > 0x3FFF)
return -EINVAL;
ret = 0;
width = width_str[0];
switch (width)
{
case 'b':
// 1 byte
// *(u8*)data = rtw_read8(padapter, addr);
sprintf(extra, "%d\n", rtw_read8(padapter, addr));
wrqu->length = strlen(extra);
break;
case 'w':
// 2 bytes
//*(u16*)data = rtw_read16(padapter, addr);
sprintf(data, "%04x\n", rtw_read16(padapter, addr));
for (i=0 ; i <= strlen(data) ; i++)
{
if (i%2==0)
{
tmp[j]=' ';
j++;
}
if (data[i] != '\0')
tmp[j] = data[i];
switch (width) {
case 'b':
// 1 byte
// *(u8*)data = rtw_read8(padapter, addr);
sprintf(extra, "%d\n", rtw_read8(padapter, addr));
wrqu->length = strlen(extra);
break;
case 'w':
// 2 bytes
//*(u16*)data = rtw_read16(padapter, addr);
sprintf(data, "%04x\n", rtw_read16(padapter, addr));
for (i=0 ; i <= strlen(data) ; i++) {
if (i%2==0) {
tmp[j]=' ';
j++;
}
if (data[i] != '\0')
tmp[j] = data[i];
j++;
}
pch = tmp;
DBG_88E("pch=%s",pch);
j++;
}
pch = tmp;
DBG_88E("pch=%s",pch);
while (*pch != '\0') {
pnext = strpbrk(pch, " ");
if (!pnext)
break;
while (*pch != '\0')
{
pnext = strpbrk(pch, " ");
if (!pnext)
break;
pnext++;
if (*pnext != '\0') {
strtout = simple_strtoul (pnext , &ptmp, 16);
sprintf(extra, "%s %d" ,extra ,strtout);
} else {
break;
}
pch = pnext;
}
wrqu->length = 6;
break;
case 'd':
// 4 bytes
//*data = rtw_read32(padapter, addr);
sprintf(data, "%08x", rtw_read32(padapter, addr));
//add read data format blank
for (i=0 ; i <= strlen(data) ; i++) {
if (i%2==0) {
tmp[j]=' ';
j++;
}
if (data[i] != '\0')
tmp[j] = data[i];
pnext++;
if (*pnext != '\0')
{
strtout = simple_strtoul (pnext , &ptmp, 16);
sprintf(extra, "%s %d" ,extra ,strtout);
}
else{
break;
}
pch = pnext;
}
wrqu->length = 6;
break;
case 'd':
// 4 bytes
//*data = rtw_read32(padapter, addr);
sprintf(data, "%08x", rtw_read32(padapter, addr));
//add read data format blank
for (i=0 ; i <= strlen(data) ; i++)
{
if (i%2==0)
{
tmp[j]=' ';
j++;
}
if (data[i] != '\0')
tmp[j] = data[i];
j++;
}
pch = tmp;
DBG_88E("pch=%s",pch);
while (*pch != '\0')
{
pnext = strpbrk(pch, " ");
if (!pnext)
break;
pnext++;
if (*pnext != '\0')
{
strtout = simple_strtoul (pnext , &ptmp, 16);
sprintf(extra, "%s %d" ,extra ,strtout);
}
else{
break;
}
pch = pnext;
}
wrqu->length = strlen(extra);
break;
default:
wrqu->length = 0;
ret = -EINVAL;
break;
j++;
}
pch = tmp;
DBG_88E("pch=%s",pch);
while (*pch != '\0') {
pnext = strpbrk(pch, " ");
if (!pnext)
break;
pnext++;
if (*pnext != '\0') {
strtout = simple_strtoul (pnext , &ptmp, 16);
sprintf(extra, "%s %d" ,extra ,strtout);
} else {
break;
}
pch = pnext;
}
wrqu->length = strlen(extra);
break;
default:
wrqu->length = 0;
ret = -EINVAL;
break;
}
return ret;
@ -9842,7 +9832,7 @@ static int rtw_mp_read_rf(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra)
{
char input[wrqu->length];
char *input = kmalloc(wrqu->length, GFP_KERNEL);
char *pch, *pnext, *ptmp;
char data[20],tmp[20];
//u32 *data = (u32*)extra;
@ -9850,51 +9840,49 @@ static int rtw_mp_read_rf(struct net_device *dev,
u32 ret,i=0 ,j=0,strtou=0;
PADAPTER padapter = rtw_netdev_priv(dev);
if (wrqu->length > 128) return -EFAULT;
if (copy_from_user(input, wrqu->pointer, wrqu->length))
if (!input)
return -ENOMEM;
if (copy_from_user(input, wrqu->pointer, wrqu->length)) {
kfree(input);
return -EFAULT;
}
ret = sscanf(input, "%d,%x", &path, &addr);
if (ret < 2) return -EINVAL;
kfree(input);
if (ret < 2)
return -EINVAL;
if (path >= MAX_RF_PATH_NUMS) return -EINVAL;
if (addr > 0xFF) return -EINVAL;
if (path >= MAX_RF_PATH_NUMS)
return -EINVAL;
if (addr > 0xFF)
return -EINVAL;
_rtw_memset(extra, 0, wrqu->length);
//*data = read_rfreg(padapter, path, addr);
sprintf(data, "%08x", read_rfreg(padapter, path, addr));
//add read data format blank
for (i=0 ; i <= strlen(data) ; i++)
{
if (i%2==0)
{
tmp[j]=' ';
j++;
}
tmp[j] = data[i];
j++;
}
pch = tmp;
DBG_88E("pch=%s",pch);
while (*pch != '\0')
{
pnext = strpbrk(pch, " ");
pnext++;
if (*pnext != '\0')
{
strtou = simple_strtoul (pnext , &ptmp, 16);
sprintf(extra, "%s %d" ,extra ,strtou);
}
else{
break;
}
pch = pnext;
}
wrqu->length = strlen(extra);
//add read data format blank
for (i=0 ; i <= strlen(data) ; i++) {
if (i%2==0) {
tmp[j]=' ';
j++;
}
tmp[j] = data[i];
j++;
}
pch = tmp;
DBG_88E("pch=%s",pch);
while (*pch != '\0') {
pnext = strpbrk(pch, " ");
pnext++;
if (*pnext != '\0') {
strtou = simple_strtoul (pnext , &ptmp, 16);
sprintf(extra, "%s %d" ,extra ,strtou);
} else{
break;
}
pch = pnext;
}
wrqu->length = strlen(extra);
return 0;
}
@ -9964,24 +9952,25 @@ static int rtw_mp_rate(struct net_device *dev,
struct iw_point *wrqu, char *extra)
{
u32 rate = MPT_RATE_1M;
u8 input[wrqu->length];
char *input = kmalloc(wrqu->length, GFP_KERNEL);
PADAPTER padapter = rtw_netdev_priv(dev);
if (copy_from_user(input, wrqu->pointer, wrqu->length))
return -EFAULT;
if (!input)
return -ENOMEM;
if (copy_from_user(input, wrqu->pointer, wrqu->length)) {
kfree(input);
return -EFAULT;
}
rate = rtw_atoi(input);
sprintf(extra, "Set data rate to %d" , rate);
kfree(input);
if (rate <= 0x7f)
rate = wifirate2_ratetbl_inx((u8)rate);
else
rate =(rate-0x80+MPT_RATE_MCS0);
//DBG_88E("%s: rate=%d\n", __func__, rate);
if (rate >= MPT_RATE_LAST)
return -EINVAL;
return -EINVAL;
padapter->mppriv.rateidx = rate;
Hal_SetDataRate(padapter);
@ -9996,20 +9985,23 @@ static int rtw_mp_channel(struct net_device *dev,
{
PADAPTER padapter = rtw_netdev_priv(dev);
u8 input[wrqu->length];
char *input = kmalloc(wrqu->length, GFP_KERNEL);
u32 channel = 1;
if (copy_from_user(input, wrqu->pointer, wrqu->length))
return -EFAULT;
if (!input)
return -ENOMEM;
if (copy_from_user(input, wrqu->pointer, wrqu->length)) {
kfree(input);
return -EFAULT;
}
channel = rtw_atoi(input);
//DBG_88E("%s: channel=%d\n", __func__, channel);
sprintf(extra, "Change channel %d to channel %d", padapter->mppriv.channel , channel);
padapter->mppriv.channel = channel;
Hal_SetChannel(padapter);
wrqu->length = strlen(extra) + 1;
kfree(input);
return 0;
}
@ -10045,16 +10037,16 @@ static int rtw_mp_txpower(struct net_device *dev,
struct iw_point *wrqu, char *extra)
{
u32 idx_a=0,idx_b=0;
u8 input[wrqu->length];
char *input = kmalloc(wrqu->length, GFP_KERNEL);
PADAPTER padapter = rtw_netdev_priv(dev);
if (copy_from_user(input, wrqu->pointer, wrqu->length))
return -EFAULT;
if (!input)
return -ENOMEM;
if (copy_from_user(input, wrqu->pointer, wrqu->length)) {
kfree(input);
return -EFAULT;
}
sscanf(input,"patha=%d,pathb=%d",&idx_a,&idx_b);
//DBG_88E("%s: tx_pwr_idx_a=%x b=%x\n", __func__, idx_a, idx_b);
sprintf(extra, "Set power level path_A:%d path_B:%d", idx_a , idx_b);
padapter->mppriv.txpoweridx = (u8)idx_a;
@ -10063,6 +10055,7 @@ static int rtw_mp_txpower(struct net_device *dev,
Hal_SetAntennaPathPower(padapter);
wrqu->length = strlen(extra) + 1;
kfree(input);
return 0;
}
@ -10071,37 +10064,35 @@ static int rtw_mp_ant_tx(struct net_device *dev,
struct iw_point *wrqu, char *extra)
{
u8 i;
u8 input[wrqu->length];
char *input = kmalloc(wrqu->length, GFP_KERNEL);
u16 antenna = 0;
PADAPTER padapter = rtw_netdev_priv(dev);
if (copy_from_user(input, wrqu->pointer, wrqu->length))
return -EFAULT;
//DBG_88E("%s: input=%s\n", __func__, input);
if (!input)
return -ENOMEM;
if (copy_from_user(input, wrqu->pointer, wrqu->length)) {
kfree(input);
return -EFAULT;
}
sprintf(extra, "switch Tx antenna to %s", input);
for (i=0; i < strlen(input); i++)
{
switch (input[i])
{
case 'a' :
antenna|=ANTENNA_A;
break;
case 'b':
antenna|=ANTENNA_B;
break;
}
for (i=0; i < strlen(input); i++) {
switch (input[i]) {
case 'a':
antenna|=ANTENNA_A;
break;
case 'b':
antenna|=ANTENNA_B;
break;
}
}
//antenna |= BIT(extra[i]-'a');
//DBG_88E("%s: antenna=0x%x\n", __func__, antenna);
padapter->mppriv.antenna_tx = antenna;
//DBG_88E("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_tx);
Hal_SetAntenna(padapter);
wrqu->length = strlen(extra) + 1;
kfree(input);
return 0;
}
@ -10111,35 +10102,34 @@ static int rtw_mp_ant_rx(struct net_device *dev,
{
u8 i;
u16 antenna = 0;
u8 input[wrqu->length];
char *input = kmalloc(wrqu->length, GFP_KERNEL);
PADAPTER padapter = rtw_netdev_priv(dev);
if (copy_from_user(input, wrqu->pointer, wrqu->length))
return -EFAULT;
//DBG_88E("%s: input=%s\n", __func__, input);
if (!input)
return -ENOMEM;
if (copy_from_user(input, wrqu->pointer, wrqu->length)) {
kfree(input);
return -EFAULT;
}
_rtw_memset(extra, 0, wrqu->length);
sprintf(extra, "switch Rx antenna to %s", input);
for (i=0; i < strlen(input); i++) {
switch (input[i])
{
case 'a' :
antenna|=ANTENNA_A;
break;
case 'b':
antenna|=ANTENNA_B;
break;
}
switch (input[i]) {
case 'a' :
antenna|=ANTENNA_A;
break;
case 'b':
antenna|=ANTENNA_B;
break;
}
}
//DBG_88E("%s: antenna=0x%x\n", __func__, antenna);
padapter->mppriv.antenna_rx = antenna;
//DBG_88E("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_rx);
Hal_SetAntenna(padapter);
wrqu->length = strlen(extra);
kfree(input);
return 0;
}
@ -10163,7 +10153,7 @@ static int rtw_mp_ctx(struct net_device *dev,
DBG_88E("%s: in=%s\n", __func__, extra);
countPkTx = strncmp(extra, "count=", 5); // strncmp TRUE is 0
countPkTx = strncmp(extra, "count=", 5); // strncmp true is 0
cotuTx = strncmp(extra, "background", 20);
CarrSprTx = strncmp(extra, "background,cs", 20);
scTx = strncmp(extra, "background,sc", 20);
@ -10296,32 +10286,29 @@ static int rtw_mp_arx(struct net_device *dev,
{
u8 bStartRx=0,bStopRx=0,bQueryPhy;
u32 cckok=0,cckcrc=0,ofdmok=0,ofdmcrc=0,htok=0,htcrc=0,OFDM_FA=0,CCK_FA=0;
u8 input[wrqu->length];
char *input = kmalloc(wrqu->length, GFP_KERNEL);
PADAPTER padapter = rtw_netdev_priv(dev);
if (!input)
return -ENOMEM;
if (copy_from_user(input, wrqu->pointer, wrqu->length))
return -EFAULT;
if (copy_from_user(input, wrqu->pointer, wrqu->length)) {
kfree(input);
return -EFAULT;
}
DBG_88E("%s: %s\n", __func__, input);
bStartRx = (strncmp(input, "start", 5)==0)?1:0; // strncmp TRUE is 0
bStopRx = (strncmp(input, "stop", 5)==0)?1:0; // strncmp TRUE is 0
bQueryPhy = (strncmp(input, "phy", 3)==0)?1:0; // strncmp TRUE is 0
bStartRx = (strncmp(input, "start", 5)==0)?1:0; // strncmp true is 0
bStopRx = (strncmp(input, "stop", 5)==0)?1:0; // strncmp true is 0
bQueryPhy = (strncmp(input, "phy", 3)==0)?1:0; // strncmp true is 0
if (bStartRx)
{
if (bStartRx) {
sprintf(extra, "start");
SetPacketRx(padapter, bStartRx);
}
else if (bStopRx)
{
} else if (bStopRx) {
SetPacketRx(padapter, 0);
sprintf(extra, "Received packet OK:%d CRC error:%d",padapter->mppriv.rx_pktcount,padapter->mppriv.rx_crcerrpktcount);
}
else if (bQueryPhy)
{
} else if (bQueryPhy) {
/*
OFDM FA
RegCF0[15:0]
@ -10350,7 +10337,8 @@ static int rtw_mp_arx(struct net_device *dev,
sprintf(extra, "Phy Received packet OK:%d CRC error:%d FA Counter: %d",cckok+ofdmok+htok,cckcrc+ofdmcrc+htcrc,OFDM_FA+CCK_FA);
}
wrqu->length = strlen(extra) + 1;
wrqu->length = strlen(extra) + 1;
kfree(input);
return 0;
}
@ -10385,34 +10373,37 @@ static int rtw_mp_pwrtrk(struct net_device *dev,
u32 thermal;
s32 ret;
PADAPTER padapter = rtw_netdev_priv(dev);
u8 input[wrqu->length];
if (copy_from_user(input, wrqu->pointer, wrqu->length))
return -EFAULT;
char *input = kmalloc(wrqu->length, GFP_KERNEL);
if (!input)
return -ENOMEM;
if (copy_from_user(input, wrqu->pointer, wrqu->length)) {
kfree(input);
return -EFAULT;
}
_rtw_memset(extra, 0, wrqu->length);
enable = 1;
if (wrqu->length > 1) { // not empty string
if (strncmp(input, "stop", 4) == 0)
{
if (strncmp(input, "stop", 4) == 0) {
enable = 0;
sprintf(extra, "mp tx power tracking stop");
}
else if (sscanf(input, "ther=%d", &thermal)) {
} else if (sscanf(input, "ther=%d", &thermal)) {
ret = Hal_SetThermalMeter(padapter, (u8)thermal);
if (ret == _FAIL) return -EPERM;
sprintf(extra, "mp tx power tracking start,target value=%d ok ",thermal);
}else {
return -EINVAL;
} else {
kfree(input);
return -EINVAL;
}
}
kfree(input);
ret = Hal_SetPowerTracking(padapter, enable);
if (ret == _FAIL) return -EPERM;
if (ret == _FAIL)
return -EPERM;
wrqu->length = strlen(extra);
return 0;
}
@ -10421,15 +10412,19 @@ static int rtw_mp_psd(struct net_device *dev,
struct iw_point *wrqu, char *extra)
{
PADAPTER padapter = rtw_netdev_priv(dev);
u8 input[wrqu->length];
char *input = kmalloc(wrqu->length, GFP_KERNEL);
if (copy_from_user(input, wrqu->pointer, wrqu->length))
if (!input)
return -ENOMEM;
if (copy_from_user(input, wrqu->pointer, wrqu->length)) {
kfree(input);
return -EFAULT;
}
strcpy(extra,input);
wrqu->length = mp_query_psd(padapter, extra);
kfree(input);
return 0;
}
@ -10459,7 +10454,7 @@ static int rtw_mp_thermal(struct net_device *dev,
//DBG_88E("print extra %s\n",extra);
bwrite = strncmp(extra, "write", 6); // strncmp TRUE is 0
bwrite = strncmp(extra, "write", 6); // strncmp true is 0
Hal_GetThermalMeter(padapter, &val);
@ -10581,27 +10576,30 @@ static int rtw_mp_phypara(struct net_device *dev,
{
PADAPTER padapter = rtw_netdev_priv(dev);
char input[wrqu->length];
char *input = kmalloc(wrqu->length, GFP_KERNEL);
u32 valxcap;
if (copy_from_user(input, wrqu->pointer, wrqu->length))
return -EFAULT;
if (!input)
return -ENOMEM;
if (copy_from_user(input, wrqu->pointer, wrqu->length)) {
kfree(input);
return -EFAULT;
}
DBG_88E("%s:iwpriv in=%s\n", __func__, input);
sscanf(input, "xcap=%d", &valxcap);
kfree(input);
if (!IS_HARDWARE_TYPE_8192D(padapter))
return 0;
return 0;
#ifdef CONFIG_RTL8192D
Hal_ProSetCrystalCap(padapter , valxcap);
#endif
sprintf(extra, "Set xcap=%d",valxcap);
wrqu->length = strlen(extra) + 1;
return 0;
return 0;
}
static int rtw_mp_SetRFPath(struct net_device *dev,
@ -10609,27 +10607,29 @@ static int rtw_mp_SetRFPath(struct net_device *dev,
union iwreq_data *wrqu, char *extra)
{
PADAPTER padapter = rtw_netdev_priv(dev);
char input[wrqu->data.length];
char *input = kmalloc(wrqu->data.length, GFP_KERNEL);
u8 bMain=1,bTurnoff=1;
if (!input)
return -ENOMEM;
if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length))
return -EFAULT;
DBG_88E("%s:iwpriv in=%s\n", __func__, input);
bMain = strncmp(input, "1", 2); // strncmp TRUE is 0
bTurnoff = strncmp(input, "0", 3); // strncmp TRUE is 0
bMain = strncmp(input, "1", 2); // strncmp true is 0
bTurnoff = strncmp(input, "0", 3); // strncmp true is 0
if (bMain==0)
{
MP_PHY_SetRFPathSwitch(padapter,true);
DBG_88E("%s:PHY_SetRFPathSwitch=TRUE\n", __func__);
DBG_88E("%s:PHY_SetRFPathSwitch=true\n", __func__);
}
else if (bTurnoff==0)
{
MP_PHY_SetRFPathSwitch(padapter,false);
DBG_88E("%s:PHY_SetRFPathSwitch=FALSE\n", __func__);
DBG_88E("%s:PHY_SetRFPathSwitch=false\n", __func__);
}
kfree(input);
return 0;
}
@ -10638,19 +10638,20 @@ static int rtw_mp_QueryDrv(struct net_device *dev,
union iwreq_data *wrqu, char *extra)
{
PADAPTER padapter = rtw_netdev_priv(dev);
char input[wrqu->data.length];
char *input = kmalloc(wrqu->data.length, GFP_KERNEL);
u8 qAutoLoad=1;
EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
if (!input)
return -ENOMEM;
if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length))
return -EFAULT;
DBG_88E("%s:iwpriv in=%s\n", __func__, input);
qAutoLoad = strncmp(input, "autoload", 8); // strncmp TRUE is 0
qAutoLoad = strncmp(input, "autoload", 8); // strncmp true is 0
if (qAutoLoad==0)
{
if (qAutoLoad==0) {
DBG_88E("%s:qAutoLoad\n", __func__);
if (pEEPROM->bautoload_fail_flag)
@ -10658,7 +10659,8 @@ static int rtw_mp_QueryDrv(struct net_device *dev,
else
sprintf(extra, "ok");
}
wrqu->data.length = strlen(extra) + 1;
wrqu->data.length = strlen(extra) + 1;
kfree(input);
return 0;
}
@ -10698,7 +10700,7 @@ static int rtw_mp_SetBT(struct net_device *dev,
DBG_88E("%s:iwpriv in=%s\n", __func__, extra);
ready = strncmp(extra, "ready", 5);
testmode = strncmp(extra, "testmode", 8); // strncmp TRUE is 0
testmode = strncmp(extra, "testmode", 8); // strncmp true is 0
trxparam = strncmp(extra, "trxparam", 8);
setgen = strncmp(extra, "setgen", 6);
getgen = strncmp(extra, "getgen", 6);

4
os_dep/rtw_android.c
View file

@ -426,11 +426,11 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd)
break;
case ANDROID_WIFI_CMD_RXFILTER_ADD:
//int filter_num = *(command + strlen(CMD_RXFILTER_ADD) + 1) - '0';
//bytes_written = net_os_rxfilter_add_remove(net, TRUE, filter_num);
//bytes_written = net_os_rxfilter_add_remove(net, true, filter_num);
break;
case ANDROID_WIFI_CMD_RXFILTER_REMOVE:
//int filter_num = *(command + strlen(CMD_RXFILTER_REMOVE) + 1) - '0';
//bytes_written = net_os_rxfilter_add_remove(net, FALSE, filter_num);
//bytes_written = net_os_rxfilter_add_remove(net, false, filter_num);
break;
case ANDROID_WIFI_CMD_BTCOEXSCAN_START:

6
os_dep/usb_ops_linux.c
View file

@ -417,16 +417,16 @@ _func_enter_;
} else if (purb->status == -ESHUTDOWN) {
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: ESHUTDOWN\n"));
padapter->bDriverStopped=true;
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped=TRUE\n"));
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped=true\n"));
goto check_completion;
}
else
{
padapter->bSurpriseRemoved=true;
DBG_88E("bSurpriseRemoved=TRUE\n");
DBG_88E("bSurpriseRemoved=true\n");
//rtl8192cu_trigger_gpio_0(padapter);
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bSurpriseRemoved=TRUE\n"));
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bSurpriseRemoved=true\n"));
goto check_completion;
}