mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2025-05-06 21:43:06 +00:00
rtl8188eu: Fix some sparse errors
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
78adabf36d
commit
4342c7358c
29 changed files with 721 additions and 727 deletions
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@ -652,7 +652,7 @@ ODM_RASupport_Init(
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// 2012/02/14 MH Be noticed, the init must be after IC type is recognized!!!!!
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if (pDM_Odm->SupportICType == ODM_RTL8188E)
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pDM_Odm->RaSupport88E = TRUE;
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pDM_Odm->RaSupport88E = true;
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}
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@ -37,22 +37,22 @@ CheckCondition(
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u4Byte cond = Condition;
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if ( Condition == 0xCDCDCDCD )
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return TRUE;
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return true;
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cond = Condition & 0x000000FF;
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if ( (_board == cond) && cond != 0x00)
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return FALSE;
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return false;
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cond = Condition & 0x0000FF00;
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cond = cond >> 8;
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if ( (_interface & cond) == 0 && cond != 0x07)
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return FALSE;
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return false;
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cond = Condition & 0x00FF0000;
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cond = cond >> 16;
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if ( (_platform & cond) == 0 && cond != 0x0F)
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return FALSE;
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return TRUE;
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return false;
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return true;
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}
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@ -207,7 +207,7 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
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u1Byte board = pDM_Odm->BoardType;
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u4Byte ArrayLen = sizeof(Array_AGC_TAB_1T_8188E)/sizeof(u4Byte);
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pu4Byte Array = Array_AGC_TAB_1T_8188E;
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bool biol = FALSE;
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bool biol = false;
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#ifdef CONFIG_IOL_IOREG_CFG
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PADAPTER Adapter = pDM_Odm->Adapter;
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struct xmit_frame *pxmit_frame;
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@ -538,7 +538,7 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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u1Byte board = pDM_Odm->BoardType;
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u4Byte ArrayLen = sizeof(Array_PHY_REG_1T_8188E)/sizeof(u4Byte);
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pu4Byte Array = Array_PHY_REG_1T_8188E;
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bool biol = FALSE;
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bool biol = false;
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#ifdef CONFIG_IOL_IOREG_CFG
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PADAPTER Adapter = pDM_Odm->Adapter;
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struct xmit_frame *pxmit_frame;
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@ -843,7 +843,7 @@ ODM_ReadAndConfig_PHY_REG_PG_8188E(
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u1Byte board = pDM_Odm->BoardType;
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u4Byte ArrayLen = sizeof(Array_PHY_REG_PG_8188E)/sizeof(u4Byte);
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pu4Byte Array = Array_PHY_REG_PG_8188E;
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bool biol = FALSE;
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bool biol = false;
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hex += board;
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hex += interfaceValue << 8;
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@ -35,22 +35,22 @@ CheckCondition(
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u4Byte cond = Condition;
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if ( Condition == 0xCDCDCDCD )
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return TRUE;
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return true;
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cond = Condition & 0x000000FF;
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if ( (_board == cond) && cond != 0x00)
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return FALSE;
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return false;
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cond = Condition & 0x0000FF00;
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cond = cond >> 8;
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if ( (_interface & cond) == 0 && cond != 0x07)
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return FALSE;
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return false;
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cond = Condition & 0x00FF0000;
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cond = cond >> 16;
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if ( (_platform & cond) == 0 && cond != 0x0F)
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return FALSE;
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return TRUE;
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return false;
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return true;
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}
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@ -167,7 +167,7 @@ ODM_ReadAndConfig_MAC_REG_8188E(
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u1Byte board = pDM_Odm->BoardType;
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u4Byte ArrayLen = sizeof(Array_MAC_REG_8188E)/sizeof(u4Byte);
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pu4Byte Array = Array_MAC_REG_8188E;
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bool biol = FALSE;
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bool biol = false;
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#ifdef CONFIG_IOL_IOREG_CFG
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PADAPTER Adapter = pDM_Odm->Adapter;
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@ -37,22 +37,22 @@ CheckCondition(
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u4Byte cond = Condition;
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if ( Condition == 0xCDCDCDCD )
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return TRUE;
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return true;
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cond = Condition & 0x000000FF;
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if ( (_board == cond) && cond != 0x00)
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return FALSE;
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return false;
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cond = Condition & 0x0000FF00;
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cond = cond >> 8;
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if ( (_interface & cond) == 0 && cond != 0x07)
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return FALSE;
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return false;
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cond = Condition & 0x00FF0000;
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cond = cond >> 16;
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if ( (_platform & cond) == 0 && cond != 0x0F)
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return FALSE;
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return TRUE;
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return false;
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return true;
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}
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@ -175,7 +175,7 @@ HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(PDM_ODM_T pDM_Odm)
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u1Byte board = pDM_Odm->BoardType;
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u4Byte ArrayLen = sizeof(Array_RadioA_1T_8188E)/sizeof(u4Byte);
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pu4Byte Array = Array_RadioA_1T_8188E;
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bool biol = FALSE;
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bool biol = false;
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#ifdef CONFIG_IOL_IOREG_CFG
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PADAPTER Adapter = pDM_Odm->Adapter;
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struct xmit_frame *pxmit_frame;
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@ -316,7 +316,7 @@ phy_SimularityCompare_92C(
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u4Byte i, j, diff, SimularityBitMap, bound = 0;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
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u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B
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bool bResult = TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID);
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bool bResult = true, is2T = IS_92C_SERIAL( pHalData->VersionID);
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if (is2T)
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bound = 8;
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@ -352,7 +352,7 @@ phy_SimularityCompare_92C(
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{
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for ( j = i*4; j < (i+1)*4-2; j++)
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result[3][j] = result[final_candidate[i]][j];
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bResult = FALSE;
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bResult = false;
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}
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}
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return bResult;
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@ -361,21 +361,21 @@ phy_SimularityCompare_92C(
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{
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for (i = 0; i < 4; i++)
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result[3][i] = result[c1][i];
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return FALSE;
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return false;
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}
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else if (!(SimularityBitMap & 0xF0) && is2T) //path B OK
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{
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for (i = 4; i < 8; i++)
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result[3][i] = result[c1][i];
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return FALSE;
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return false;
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}
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else
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return FALSE;
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return false;
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}
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/*
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return FALSE => do IQK again
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return false => do IQK again
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*/
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bool
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phy_SimularityCompare(
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@ -465,7 +465,7 @@ phy_IQCalibrate_8192C(
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phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM);
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}
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phy_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T);
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phy_PathADDAOn(pAdapter, ADDA_REG, true, is2T);
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@ -479,12 +479,12 @@ phy_IQCalibrate_8192C(
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if (rfPathSwitch) // Path Div On
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{
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phy_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T);
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phy_PathADDAOn(pAdapter, ADDA_REG, true, is2T);
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//DbgPrint("=STEP= change ADDA Path from B to A Path\n");
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}
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else
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{
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phy_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T);
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phy_PathADDAOn(pAdapter, ADDA_REG, false, is2T);
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}
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//3 end
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//=====================================
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@ -499,7 +499,7 @@ phy_IQCalibrate_8192C(
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if (!pHalData->bRfPiEnable){
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// Switch BB to PI mode to do IQ Calibration.
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phy_PIModeSwitch(pAdapter, TRUE);
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phy_PIModeSwitch(pAdapter, true);
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}
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PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, BIT24, 0x00);
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@ -577,7 +577,7 @@ phy_IQCalibrate_8192C(
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phy_PathAStandBy(pAdapter);
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// Turn Path B ADDA on
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phy_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T);
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phy_PathADDAOn(pAdapter, ADDA_REG, false, is2T);
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for (i = 0 ; i < retryCount ; i++){
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PathBOK = phy_PathB_IQK_8192C(pAdapter);
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@ -610,7 +610,7 @@ phy_IQCalibrate_8192C(
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{
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if (!pHalData->bRfPiEnable){
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// Switch back BB to SI mode after finish IQ Calibration.
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phy_PIModeSwitch(pAdapter, FALSE);
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phy_PIModeSwitch(pAdapter, false);
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}
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// Reload ADDA power saving parameters
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@ -1172,7 +1172,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
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((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08));
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}
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pHalData->bAPKdone = TRUE;
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pHalData->bAPKdone = true;
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RTPRINT(FINIT, INIT_IQK, ("<==phy_APCalibrate_8192C()\n"));
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}
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@ -1190,7 +1190,7 @@ PHY_IQCalibrate_8192C(
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bool bPathAOK, bPathBOK;
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s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0;
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bool is12simular, is13simular, is23simular;
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bool bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE;
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bool bStartContTx = false, bSingleTone = false, bCarrierSuppression = false;
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u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
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rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance,
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rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable,
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@ -1198,7 +1198,7 @@ PHY_IQCalibrate_8192C(
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rOFDM0_XCTxAFE, rOFDM0_XDTxAFE,
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rOFDM0_RxIQExtAnta};
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if (ODM_CheckPowerStatus(pAdapter) == FALSE)
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if (ODM_CheckPowerStatus(pAdapter) == false)
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return;
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#if MP_DRIVER == 1
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@ -1239,11 +1239,11 @@ if (pAdapter->registrypriv.mp_mode == 1)
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result[3][i] = 0;
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}
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final_candidate = 0xff;
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bPathAOK = FALSE;
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bPathBOK = FALSE;
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is12simular = FALSE;
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is23simular = FALSE;
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is13simular = FALSE;
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bPathAOK = false;
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bPathBOK = false;
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is12simular = false;
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is23simular = false;
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is13simular = false;
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RTPRINT(FINIT, INIT_IQK, ("IQK !!!interface %d currentband %d ishardwareD %d\n", pAdapter->interfaceIndex, pHalData->CurrentBandType92D, IS_HARDWARE_TYPE_8192D(pAdapter)));
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@ -1256,12 +1256,12 @@ if (pAdapter->registrypriv.mp_mode == 1)
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{
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if (IS_92C_SERIAL( pHalData->VersionID))
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{
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phy_IQCalibrate_8192C(pAdapter, result, i, TRUE);
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phy_IQCalibrate_8192C(pAdapter, result, i, true);
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}
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else
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{
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// For 88C 1T1R
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phy_IQCalibrate_8192C(pAdapter, result, i, FALSE);
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phy_IQCalibrate_8192C(pAdapter, result, i, false);
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}
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}
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else/* if (IS_HARDWARE_TYPE_8192D(pAdapter))*/
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@ -1273,9 +1273,9 @@ if (pAdapter->registrypriv.mp_mode == 1)
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else if (pHalData->CurrentBandType92D == BAND_ON_2_4G)
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{
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if (IS_92D_SINGLEPHY(pHalData->VersionID))
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phy_IQCalibrate_8192C(pAdapter, result, i, TRUE);
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phy_IQCalibrate_8192C(pAdapter, result, i, true);
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else
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phy_IQCalibrate_8192C(pAdapter, result, i, FALSE);
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phy_IQCalibrate_8192C(pAdapter, result, i, false);
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}
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}
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@ -1341,7 +1341,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
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RegECC = result[final_candidate][7];
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RTPRINT(FINIT, INIT_IQK, ("IQK: final_candidate is %x\n",final_candidate));
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RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC));
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bPathAOK = bPathBOK = TRUE;
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bPathAOK = bPathBOK = true;
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}
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else
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{
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@ -1377,7 +1377,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
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pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][i] =
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result[final_candidate][i];
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pHalData->IQKMatrixRegSetting[Indexforchannel].bIQKDone = TRUE;
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pHalData->IQKMatrixRegSetting[Indexforchannel].bIQKDone = true;
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RTPRINT(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel));
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}
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@ -1394,7 +1394,7 @@ PHY_LCCalibrate_8192C(
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)
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
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bool bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE;
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bool bStartContTx = false, bSingleTone = false, bCarrierSuppression = false;
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PMGNT_INFO pMgntInfo=&pAdapter->MgntInfo;
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PMGNT_INFO pMgntInfoBuddyAdapter;
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u4Byte timeout = 2000, timecount = 0;
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@ -1435,21 +1435,21 @@ if (pAdapter->registrypriv.mp_mode == 1)
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timecount += 50;
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}
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pHalData->bLCKInProgress = TRUE;
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pHalData->bLCKInProgress = true;
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RTPRINT(FINIT, INIT_IQK, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pAdapter->interfaceIndex, pHalData->CurrentBandType92D, timecount));
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//if (IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID))
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if (IS_2T2R(pHalData->VersionID))
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{
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phy_LCCalibrate(pAdapter, TRUE);
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phy_LCCalibrate(pAdapter, true);
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}
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else{
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// For 88C 1T1R
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phy_LCCalibrate(pAdapter, FALSE);
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phy_LCCalibrate(pAdapter, false);
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}
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pHalData->bLCKInProgress = FALSE;
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pHalData->bLCKInProgress = false;
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RTPRINT(FINIT, INIT_IQK, ("LCK:Finish!!!interface %d\n", pAdapter->interfaceIndex));
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@ -1480,11 +1480,11 @@ PHY_APCalibrate_8192C(
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return;
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if (IS_92C_SERIAL( pHalData->VersionID)){
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phy_APCalibrate_8192C(pAdapter, delta, TRUE);
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phy_APCalibrate_8192C(pAdapter, delta, true);
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}
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else{
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// For 88C 1T1R
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phy_APCalibrate_8192C(pAdapter, delta, FALSE);
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phy_APCalibrate_8192C(pAdapter, delta, false);
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}
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}
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@ -1524,7 +1524,7 @@ ODM_ResetIQKResult(
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pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][5] =
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pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][7] = 0x0;
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pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].bIQKDone = FALSE;
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pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].bIQKDone = false;
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}
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}
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@ -135,7 +135,7 @@ odm_TxPwrTrackSetPwr88E(
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PDM_ODM_T pDM_Odm
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)
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{
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if (pDM_Odm->BbSwingFlagOfdm == TRUE || pDM_Odm->BbSwingFlagCck == TRUE)
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if (pDM_Odm->BbSwingFlagOfdm == true || pDM_Odm->BbSwingFlagCck == true)
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{
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("odm_TxPwrTrackSetPwr88E CH=%d\n", *(pDM_Odm->pChannel)));
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#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE ))
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@ -145,8 +145,8 @@ odm_TxPwrTrackSetPwr88E(
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PHY_RF6052SetCCKTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel));
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PHY_RF6052SetOFDMTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel));
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#endif
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pDM_Odm->BbSwingFlagOfdm = FALSE;
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pDM_Odm->BbSwingFlagCck = FALSE;
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pDM_Odm->BbSwingFlagOfdm = false;
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pDM_Odm->BbSwingFlagCck = false;
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}
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} // odm_TxPwrTrackSetPwr88E
|
||||
|
||||
|
|
@ -174,8 +174,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
|
|||
s4Byte Y, ele_C=0;
|
||||
s1Byte OFDM_index[2], CCK_index=0, OFDM_index_old[2]={0,0}, CCK_index_old=0, index;
|
||||
u4Byte i = 0, j = 0;
|
||||
bool is2T = FALSE;
|
||||
bool bInteralPA = FALSE;
|
||||
bool is2T = false;
|
||||
bool bInteralPA = false;
|
||||
|
||||
u1Byte OFDM_min_index = 6, rf; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur
|
||||
u1Byte Indexforchannel = 0/*GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/;
|
||||
|
|
@ -206,7 +206,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
|
|||
odm_TxPwrTrackSetPwr88E(pDM_Odm);
|
||||
|
||||
pDM_Odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; //cosa add for debug
|
||||
pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = TRUE;
|
||||
pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = true;
|
||||
|
||||
#if (MP_DRIVER == 1)
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
|
||||
|
|
@ -349,8 +349,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
|
|||
#else
|
||||
delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue);
|
||||
#endif
|
||||
pDM_Odm->RFCalibrateInfo.bReloadtxpowerindex = FALSE;
|
||||
pDM_Odm->RFCalibrateInfo.bDoneTxpower = FALSE;
|
||||
pDM_Odm->RFCalibrateInfo.bReloadtxpowerindex = false;
|
||||
pDM_Odm->RFCalibrateInfo.bDoneTxpower = false;
|
||||
}
|
||||
else if (pDM_Odm->RFCalibrateInfo.bDoneTxpower)
|
||||
{
|
||||
|
|
@ -470,7 +470,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
|
|||
//Config by SwingTable
|
||||
if (pDM_Odm->RFCalibrateInfo.TxPowerTrackControl /*&& !pHalData->bNOPG*/)
|
||||
{
|
||||
pDM_Odm->RFCalibrateInfo.bDoneTxpower = TRUE;
|
||||
pDM_Odm->RFCalibrateInfo.bDoneTxpower = true;
|
||||
|
||||
//Adujst OFDM Ant_A according to IQK result
|
||||
ele_D = (OFDMSwingTable[(u1Byte)OFDM_index[0]] & 0xFFC00000)>>22;
|
||||
|
|
@ -488,13 +488,13 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
|
|||
if (pDM_Odm->BbSwingIdxOfdmCurrent != pDM_Odm->BbSwingIdxOfdm)
|
||||
{
|
||||
pDM_Odm->BbSwingIdxOfdmCurrent = pDM_Odm->BbSwingIdxOfdm;
|
||||
pDM_Odm->BbSwingFlagOfdm = TRUE;
|
||||
pDM_Odm->BbSwingFlagOfdm = true;
|
||||
}
|
||||
|
||||
if (pDM_Odm->BbSwingIdxCckCurrent != pDM_Odm->BbSwingIdxCck)
|
||||
{
|
||||
pDM_Odm->BbSwingIdxCckCurrent = pDM_Odm->BbSwingIdxCck;
|
||||
pDM_Odm->BbSwingFlagCck = TRUE;
|
||||
pDM_Odm->BbSwingFlagCck = true;
|
||||
}
|
||||
|
||||
if (X != 0)
|
||||
|
|
@ -589,7 +589,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
|
|||
#endif
|
||||
#endif
|
||||
pDM_Odm->RFCalibrateInfo.ThermalValue_IQK= ThermalValue;
|
||||
PHY_IQCalibrate_8188E(Adapter, FALSE);
|
||||
PHY_IQCalibrate_8188E(Adapter, false);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
|
||||
|
|
@ -1057,10 +1057,10 @@ ODM_CheckPowerStatus(
|
|||
PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
|
||||
|
||||
// 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence.
|
||||
if (pMgntInfo->init_adpt_in_progress == TRUE)
|
||||
if (pMgntInfo->init_adpt_in_progress == true)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter"));
|
||||
return TRUE;
|
||||
ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return true, due to initadapter"));
|
||||
return true;
|
||||
}
|
||||
|
||||
//
|
||||
|
|
@ -1069,12 +1069,12 @@ ODM_CheckPowerStatus(
|
|||
Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
|
||||
if (Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n",
|
||||
ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return false, due to %d/%d/%d\n",
|
||||
Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState));
|
||||
return FALSE;
|
||||
return false;
|
||||
}
|
||||
*/
|
||||
return TRUE;
|
||||
return true;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
@ -1100,7 +1100,7 @@ _PHY_SaveADDARegisters(
|
|||
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
|
||||
#endif
|
||||
|
||||
if (ODM_CheckPowerStatus(pAdapter) == FALSE)
|
||||
if (ODM_CheckPowerStatus(pAdapter) == false)
|
||||
return;
|
||||
#endif
|
||||
|
||||
|
|
@ -1226,7 +1226,7 @@ _PHY_PathADDAOn(
|
|||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ADDA ON.\n"));
|
||||
|
||||
pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4;
|
||||
if (FALSE == is2T){
|
||||
if (false == is2T){
|
||||
pathOn = 0x0bdb25a0;
|
||||
ODM_SetBBReg(pDM_Odm, ADDAReg[0], bMaskDWord, 0x0b1b25a0);
|
||||
}
|
||||
|
|
@ -1347,14 +1347,14 @@ phy_SimularityCompare_8188E(
|
|||
#endif
|
||||
#endif
|
||||
u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B
|
||||
bool bResult = TRUE;
|
||||
bool bResult = true;
|
||||
bool is2T;
|
||||
s4Byte tmp1 = 0,tmp2 = 0;
|
||||
|
||||
if ( (pDM_Odm->RFType ==ODM_2T2R )||(pDM_Odm->RFType ==ODM_2T3R )||(pDM_Odm->RFType ==ODM_2T4R ))
|
||||
is2T = TRUE;
|
||||
is2T = true;
|
||||
else
|
||||
is2T = FALSE;
|
||||
is2T = false;
|
||||
|
||||
if (is2T)
|
||||
bound = 8;
|
||||
|
|
@ -1419,7 +1419,7 @@ phy_SimularityCompare_8188E(
|
|||
{
|
||||
for ( j = i*4; j < (i+1)*4-2; j++)
|
||||
result[3][j] = result[final_candidate[i]][j];
|
||||
bResult = FALSE;
|
||||
bResult = false;
|
||||
}
|
||||
}
|
||||
return bResult;
|
||||
|
|
@ -1452,7 +1452,7 @@ phy_SimularityCompare_8188E(
|
|||
result[3][i] = result[c1][i];
|
||||
}
|
||||
|
||||
return FALSE;
|
||||
return false;
|
||||
}
|
||||
|
||||
}
|
||||
|
|
@ -1551,9 +1551,9 @@ else
|
|||
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
|
||||
_PHY_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T);
|
||||
_PHY_PathADDAOn(pAdapter, ADDA_REG, true, is2T);
|
||||
#else
|
||||
_PHY_PathADDAOn(pDM_Odm, ADDA_REG, TRUE, is2T);
|
||||
_PHY_PathADDAOn(pDM_Odm, ADDA_REG, true, is2T);
|
||||
#endif
|
||||
|
||||
|
||||
|
|
@ -1565,9 +1565,9 @@ else
|
|||
if (!pDM_Odm->RFCalibrateInfo.bRfPiEnable){
|
||||
// Switch BB to PI mode to do IQ Calibration.
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
_PHY_PIModeSwitch(pAdapter, TRUE);
|
||||
_PHY_PIModeSwitch(pAdapter, true);
|
||||
#else
|
||||
_PHY_PIModeSwitch(pDM_Odm, TRUE);
|
||||
_PHY_PIModeSwitch(pDM_Odm, true);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -1653,12 +1653,12 @@ else
|
|||
_PHY_PathAStandBy(pAdapter);
|
||||
|
||||
// Turn Path B ADDA on
|
||||
_PHY_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T);
|
||||
_PHY_PathADDAOn(pAdapter, ADDA_REG, false, is2T);
|
||||
#else
|
||||
_PHY_PathAStandBy(pDM_Odm);
|
||||
|
||||
// Turn Path B ADDA on
|
||||
_PHY_PathADDAOn(pDM_Odm, ADDA_REG, FALSE, is2T);
|
||||
_PHY_PathADDAOn(pDM_Odm, ADDA_REG, false, is2T);
|
||||
#endif
|
||||
|
||||
for (i = 0 ; i < retryCount ; i++){
|
||||
|
|
@ -1697,9 +1697,9 @@ else
|
|||
if (!pDM_Odm->RFCalibrateInfo.bRfPiEnable){
|
||||
// Switch back BB to SI mode after finish IQ Calibration.
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
_PHY_PIModeSwitch(pAdapter, FALSE);
|
||||
_PHY_PIModeSwitch(pAdapter, false);
|
||||
#else
|
||||
_PHY_PIModeSwitch(pDM_Odm, FALSE);
|
||||
_PHY_PIModeSwitch(pDM_Odm, false);
|
||||
#endif
|
||||
}
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
|
|
@ -2305,7 +2305,7 @@ if (*(pDM_Odm->mp_mode) != 1)
|
|||
#endif
|
||||
}
|
||||
|
||||
pDM_Odm->RFCalibrateInfo.bAPKdone = TRUE;
|
||||
pDM_Odm->RFCalibrateInfo.bAPKdone = true;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_APCalibrate_8188E()\n"));
|
||||
}
|
||||
|
|
@ -2357,7 +2357,7 @@ PHY_IQCalibrate_8188E(
|
|||
bool bPathAOK, bPathBOK;
|
||||
s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0;
|
||||
bool is12simular, is13simular, is23simular;
|
||||
bool bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE;
|
||||
bool bStartContTx = false, bSingleTone = false, bCarrierSuppression = false;
|
||||
u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
|
||||
rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance,
|
||||
rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable,
|
||||
|
|
@ -2366,9 +2366,9 @@ PHY_IQCalibrate_8188E(
|
|||
rOFDM0_RxIQExtAnta};
|
||||
bool is2T;
|
||||
|
||||
is2T = (pDM_Odm->RFType == ODM_2T2R)?TRUE:FALSE;
|
||||
is2T = (pDM_Odm->RFType == ODM_2T2R)?true:false;
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE) )
|
||||
if (ODM_CheckPowerStatus(pAdapter) == FALSE)
|
||||
if (ODM_CheckPowerStatus(pAdapter) == false)
|
||||
return;
|
||||
#else
|
||||
prtl8192cd_priv priv = pDM_Odm->priv;
|
||||
|
|
@ -2437,11 +2437,11 @@ if (*(pDM_Odm->mp_mode) == 1)
|
|||
result[3][i] = 0;
|
||||
}
|
||||
final_candidate = 0xff;
|
||||
bPathAOK = FALSE;
|
||||
bPathBOK = FALSE;
|
||||
is12simular = FALSE;
|
||||
is23simular = FALSE;
|
||||
is13simular = FALSE;
|
||||
bPathAOK = false;
|
||||
bPathBOK = false;
|
||||
is12simular = false;
|
||||
is23simular = false;
|
||||
is13simular = false;
|
||||
|
||||
for (i=0; i<3; i++) {
|
||||
|
||||
|
|
@ -2533,7 +2533,7 @@ if (*(pDM_Odm->mp_mode) == 1)
|
|||
RegECC = result[final_candidate][7];
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: final_candidate is %x\n",final_candidate));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC));
|
||||
bPathAOK = bPathBOK = TRUE;
|
||||
bPathAOK = bPathBOK = true;
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -2574,7 +2574,7 @@ if (*(pDM_Odm->mp_mode) == 1)
|
|||
{
|
||||
for (i = 0; i < IQK_Matrix_REG_NUM; i++)
|
||||
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][i] = result[final_candidate][i];
|
||||
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].bIQKDone = TRUE;
|
||||
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].bIQKDone = true;
|
||||
}
|
||||
//RTPRINT(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel));
|
||||
|
|
@ -2598,7 +2598,7 @@ PHY_LCCalibrate_8188E(
|
|||
#endif
|
||||
)
|
||||
{
|
||||
bool bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE;
|
||||
bool bStartContTx = false, bSingleTone = false, bCarrierSuppression = false;
|
||||
u4Byte timeout = 2000, timecount = 0;
|
||||
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
|
|
@ -2652,27 +2652,27 @@ if (*(pDM_Odm->mp_mode) == 1)
|
|||
timecount += 50;
|
||||
}
|
||||
|
||||
pDM_Odm->RFCalibrateInfo.bLCKInProgress = TRUE;
|
||||
pDM_Odm->RFCalibrateInfo.bLCKInProgress = true;
|
||||
|
||||
//ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pDM_Odm->interfaceIndex, pHalData->CurrentBandType92D, timecount));
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
|
||||
if (pDM_Odm->RFType == ODM_2T2R)
|
||||
{
|
||||
phy_LCCalibrate_8188E(pAdapter, TRUE);
|
||||
phy_LCCalibrate_8188E(pAdapter, true);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
// For 88C 1T1R
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
phy_LCCalibrate_8188E(pAdapter, FALSE);
|
||||
phy_LCCalibrate_8188E(pAdapter, false);
|
||||
#else
|
||||
phy_LCCalibrate_8188E(pDM_Odm, FALSE);
|
||||
phy_LCCalibrate_8188E(pDM_Odm, false);
|
||||
#endif
|
||||
}
|
||||
|
||||
pDM_Odm->RFCalibrateInfo.bLCKInProgress = FALSE;
|
||||
pDM_Odm->RFCalibrateInfo.bLCKInProgress = false;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Finish!!!interface %d\n", pDM_Odm->InterfaceIndex));
|
||||
|
||||
|
|
@ -2716,16 +2716,16 @@ PHY_APCalibrate_8188E(
|
|||
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
if (pDM_Odm->RFType == ODM_2T2R){
|
||||
phy_APCalibrate_8188E(pAdapter, delta, TRUE);
|
||||
phy_APCalibrate_8188E(pAdapter, delta, true);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
// For 88C 1T1R
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
phy_APCalibrate_8188E(pAdapter, delta, FALSE);
|
||||
phy_APCalibrate_8188E(pAdapter, delta, false);
|
||||
#else
|
||||
phy_APCalibrate_8188E(pDM_Odm, delta, FALSE);
|
||||
phy_APCalibrate_8188E(pDM_Odm, delta, false);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
|
@ -2805,16 +2805,16 @@ void PHY_SetRFPathSwitch_8188E(
|
|||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
if (pDM_Odm->RFType == ODM_2T2R)
|
||||
{
|
||||
phy_SetRFPathSwitch_8188E(pAdapter, bMain, TRUE);
|
||||
phy_SetRFPathSwitch_8188E(pAdapter, bMain, true);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
// For 88C 1T1R
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
phy_SetRFPathSwitch_8188E(pAdapter, bMain, FALSE);
|
||||
phy_SetRFPathSwitch_8188E(pAdapter, bMain, false);
|
||||
#else
|
||||
phy_SetRFPathSwitch_8188E(pDM_Odm, bMain, FALSE);
|
||||
phy_SetRFPathSwitch_8188E(pDM_Odm, bMain, false);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
|
@ -3041,7 +3041,7 @@ phy_DigitalPredistortion(
|
|||
else
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK Sucess\n"));
|
||||
pDM_Odm->RFCalibrateInfo.bDPPathAOK = TRUE;
|
||||
pDM_Odm->RFCalibrateInfo.bDPPathAOK = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -3180,7 +3180,7 @@ phy_DigitalPredistortion(
|
|||
else
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK Success\n"));
|
||||
pDM_Odm->RFCalibrateInfo.bDPPathBOK = TRUE;
|
||||
pDM_Odm->RFCalibrateInfo.bDPPathBOK = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -3251,7 +3251,7 @@ phy_DigitalPredistortion(
|
|||
_PHY_ReloadMACRegisters(pDM_Odm, MAC_REG, MAC_backup);
|
||||
#endif
|
||||
|
||||
pDM_Odm->RFCalibrateInfo.bDPdone = TRUE;
|
||||
pDM_Odm->RFCalibrateInfo.bDPdone = true;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_DigitalPredistortion()\n"));
|
||||
#endif
|
||||
}
|
||||
|
|
@ -3285,19 +3285,19 @@ PHY_DigitalPredistortion_8188E(
|
|||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
|
||||
if (pDM_Odm->RFType == ODM_2T2R){
|
||||
phy_DigitalPredistortion(pAdapter, TRUE);
|
||||
phy_DigitalPredistortion(pAdapter, true);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
// For 88C 1T1R
|
||||
phy_DigitalPredistortion(pAdapter, FALSE);
|
||||
phy_DigitalPredistortion(pAdapter, false);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
//return value TRUE => Main; FALSE => Aux
|
||||
//return value true => Main; false => Aux
|
||||
|
||||
bool phy_QueryRFPathSwitch_8188E(
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
|
|
@ -3329,22 +3329,22 @@ bool phy_QueryRFPathSwitch_8188E(
|
|||
if (is2T) //
|
||||
{
|
||||
if (ODM_GetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01)
|
||||
return TRUE;
|
||||
return true;
|
||||
else
|
||||
return FALSE;
|
||||
return false;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (ODM_GetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9) == 0x02)
|
||||
return TRUE;
|
||||
return true;
|
||||
else
|
||||
return FALSE;
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
//return value TRUE => Main; FALSE => Aux
|
||||
//return value true => Main; false => Aux
|
||||
bool PHY_QueryRFPathSwitch_8188E(
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
PDM_ODM_T pDM_Odm
|
||||
|
|
@ -3365,22 +3365,22 @@ bool PHY_QueryRFPathSwitch_8188E(
|
|||
|
||||
|
||||
#if DISABLE_BB_RF
|
||||
return TRUE;
|
||||
return true;
|
||||
#endif
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
|
||||
//if (IS_92C_SERIAL( pHalData->VersionID)){
|
||||
if (pDM_Odm->RFType == ODM_2T2R){
|
||||
return phy_QueryRFPathSwitch_8188E(pAdapter, TRUE);
|
||||
return phy_QueryRFPathSwitch_8188E(pAdapter, true);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
// For 88C 1T1R
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
return phy_QueryRFPathSwitch_8188E(pAdapter, FALSE);
|
||||
return phy_QueryRFPathSwitch_8188E(pAdapter, false);
|
||||
#else
|
||||
return phy_QueryRFPathSwitch_8188E(pDM_Odm, FALSE);
|
||||
return phy_QueryRFPathSwitch_8188E(pDM_Odm, false);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -41,8 +41,8 @@
|
|||
|
||||
void dump_chip_info(HAL_VERSION ChipVersion)
|
||||
{
|
||||
int cnt = 0;
|
||||
u8 buf[128];
|
||||
uint cnt = 0;
|
||||
char buf[128];
|
||||
|
||||
if (IS_81XXC(ChipVersion)){
|
||||
cnt += sprintf((buf+cnt), "Chip Version Info: %s_", IS_92C_SERIAL(ChipVersion)?"CHIP_8192C":"CHIP_8188C");
|
||||
|
|
|
|||
|
|
@ -397,7 +397,7 @@ odm_RxPhyStatus92CSeries_Parsing(
|
|||
|
||||
PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus;
|
||||
|
||||
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M))?TRUE :FALSE;
|
||||
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M))?true :false;
|
||||
|
||||
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;
|
||||
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
|
||||
|
|
@ -417,7 +417,7 @@ odm_RxPhyStatus92CSeries_Parsing(
|
|||
//if (pHalData->eRFPowerState == eRfOn)
|
||||
cck_highpwr = pDM_Odm->bCckHighPower;
|
||||
//else
|
||||
// cck_highpwr = FALSE;
|
||||
// cck_highpwr = false;
|
||||
|
||||
cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;
|
||||
|
||||
|
|
@ -467,7 +467,7 @@ odm_RxPhyStatus92CSeries_Parsing(
|
|||
}
|
||||
rx_pwr_all += 6;
|
||||
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
|
||||
if (cck_highpwr == FALSE)
|
||||
if (cck_highpwr == false)
|
||||
{
|
||||
if (PWDB_ALL >= 80)
|
||||
PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
|
||||
|
|
@ -780,7 +780,7 @@ odm_Process_RSSIForDM(
|
|||
return;
|
||||
}
|
||||
|
||||
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M))?TRUE :FALSE;
|
||||
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M))?true :false;
|
||||
|
||||
#if (defined(CONFIG_HW_ANTENNA_DIVERSITY))
|
||||
#if ((RTL8192C_SUPPORT == 1) ||(RTL8192D_SUPPORT == 1))
|
||||
|
|
@ -983,7 +983,7 @@ ODM_PhyStatusQuery_92CSeries(
|
|||
pPhyStatus,
|
||||
pPktinfo);
|
||||
|
||||
if (pDM_Odm->RSSI_test == TRUE) {
|
||||
if (pDM_Odm->RSSI_test == true) {
|
||||
// Select the packets to do RSSI checking for antenna switching.
|
||||
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
|
||||
ODM_SwAntDivChkPerPktRssi(pDM_Odm,pPktinfo->StationID,pPhyInfo);
|
||||
|
|
|
|||
|
|
@ -265,7 +265,7 @@ ODM_AntennaDiversityInit_88E(
|
|||
//ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->AntDivType=%d, pHalData->AntDivCfg=%d\n",
|
||||
// pDM_Odm->AntDivType, pHalData->AntDivCfg));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->AntDivType=%d\n",pDM_Odm->AntDivType));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->bIsMPChip=%s\n",(pDM_Odm->bIsMPChip?"TRUE":"FALSE")));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->bIsMPChip=%s\n",(pDM_Odm->bIsMPChip?"true":"false")));
|
||||
|
||||
if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)
|
||||
odm_RX_HWAntDivInit(pDM_Odm);
|
||||
|
|
@ -418,7 +418,7 @@ odm_HWAntDiv(
|
|||
pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
|
||||
pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
|
||||
bool bMatchBSSID;
|
||||
bool bPktFilterMacth = FALSE;
|
||||
bool bPktFilterMacth = false;
|
||||
PSTA_INFO_T pEntry;
|
||||
|
||||
for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
|
||||
|
|
@ -541,7 +541,7 @@ odm_FastAntTraining(
|
|||
u4Byte i, MaxRSSI=0;
|
||||
u1Byte TargetAnt=2;
|
||||
pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
|
||||
bool bPktFilterMacth = FALSE;
|
||||
bool bPktFilterMacth = false;
|
||||
PSTA_INFO_T pEntry;
|
||||
|
||||
|
||||
|
|
@ -559,7 +559,7 @@ odm_FastAntTraining(
|
|||
else
|
||||
{
|
||||
pDM_FatTable->antAveRSSI[i] = pDM_FatTable->antSumRSSI[i] /pDM_FatTable->antRSSIcnt[i];
|
||||
bPktFilterMacth = TRUE;
|
||||
bPktFilterMacth = true;
|
||||
}
|
||||
if (pDM_FatTable->antAveRSSI[i] > MaxRSSI)
|
||||
{
|
||||
|
|
@ -572,7 +572,7 @@ odm_FastAntTraining(
|
|||
}
|
||||
|
||||
//2 Select TRX Antenna
|
||||
if (bPktFilterMacth == FALSE)
|
||||
if (bPktFilterMacth == false)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("None Packet is matched\n"));
|
||||
|
||||
|
|
@ -638,7 +638,7 @@ odm_FastAntTrainingCallback(
|
|||
PADAPTER padapter = pDM_Odm->Adapter;
|
||||
if (padapter->net_closed == true)
|
||||
return;
|
||||
//if (*pDM_Odm->pbNet_closed == TRUE)
|
||||
//if (*pDM_Odm->pbNet_closed == true)
|
||||
// return;
|
||||
#endif
|
||||
|
||||
|
|
@ -704,7 +704,7 @@ ODM_AntennaDiversity_88E(
|
|||
if (!pDM_Odm->bLinked)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_AntennaDiversity_88E(): No Link.\n"));
|
||||
if (pDM_FatTable->bBecomeLinked == TRUE)
|
||||
if (pDM_FatTable->bBecomeLinked == true)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn off HW AntDiv\n"));
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); //RegC50[7]=1'b1 //enable HW AntDiv
|
||||
|
|
@ -717,7 +717,7 @@ ODM_AntennaDiversity_88E(
|
|||
}
|
||||
else
|
||||
{
|
||||
if (pDM_FatTable->bBecomeLinked ==FALSE)
|
||||
if (pDM_FatTable->bBecomeLinked ==false)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn on HW AntDiv\n"));
|
||||
//Because HW AntDiv is disabled before Link, we enable HW AntDiv after link
|
||||
|
|
@ -846,12 +846,12 @@ odm_DynamicPrimaryCCA(
|
|||
PRT_WLAN_STA pEntry;
|
||||
#endif
|
||||
|
||||
PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
|
||||
Pfalse_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
|
||||
pPri_CCA_T PrimaryCCA = &(pDM_Odm->DM_PriCCA);
|
||||
|
||||
bool Is40MHz;
|
||||
bool Client_40MHz = FALSE, Client_tmp = FALSE; // connected client BW
|
||||
bool bConnected = FALSE; // connected or not
|
||||
bool Client_40MHz = false, Client_tmp = false; // connected client BW
|
||||
bool bConnected = false; // connected or not
|
||||
static u1Byte Client_40MHz_pre = 0;
|
||||
static u8Byte lastTxOkCnt = 0;
|
||||
static u8Byte lastRxOkCnt = 0;
|
||||
|
|
@ -924,7 +924,7 @@ odm_DynamicPrimaryCCA(
|
|||
|
||||
if (pEntry->bAssociated)
|
||||
{
|
||||
bConnected=TRUE; // client is connected or not
|
||||
bConnected=true; // client is connected or not
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -947,7 +947,7 @@ odm_DynamicPrimaryCCA(
|
|||
if (Client_tmp>Client_40MHz)
|
||||
Client_40MHz = Client_tmp; // 40M/20M coexist => 40M priority is High
|
||||
|
||||
bConnected = TRUE;
|
||||
bConnected = true;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
|
@ -1223,6 +1223,6 @@ ODM_DynamicPrimaryCCA_DupRTS(
|
|||
PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
return FALSE;
|
||||
return false;
|
||||
}
|
||||
#endif //#if (RTL8188E_SUPPORT == 1)
|
||||
|
|
|
|||
|
|
@ -653,9 +653,9 @@ ODM_FillH2CCmd(
|
|||
|
||||
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
//FillH2CCmd(pH2CBuffer, H2CBufferLen, CmdNum, pElementID, pCmdLen, pCmbBuffer, CmdStartSeq);
|
||||
return FALSE;
|
||||
return false;
|
||||
#endif
|
||||
|
||||
return TRUE;
|
||||
return true;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -650,9 +650,9 @@ CheckFwRsvdPageContent(
|
|||
// Now we just send 4 types packet to rsvd page.
|
||||
// (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp.
|
||||
// Input:
|
||||
// bDLFinished - FALSE: At the first time we will send all the packets as a large packet to Hw,
|
||||
// bDLFinished - false: At the first time we will send all the packets as a large packet to Hw,
|
||||
// so we need to set the packet length to total lengh.
|
||||
// TRUE: At the second time, we should send the first packet (default:beacon)
|
||||
// true: At the second time, we should send the first packet (default:beacon)
|
||||
// to Hw again and set the lengh in descriptor to the real beacon lengh.
|
||||
// 2009.10.15 by tynli.
|
||||
static void SetFwRsvdPagePkt(PADAPTER padapter, bool bDLFinished)
|
||||
|
|
|
|||
|
|
@ -868,7 +868,7 @@ void rtl8188e_InitializeFirmwareVars(PADAPTER padapter)
|
|||
pHalData->LastHMEBoxNum = 0;
|
||||
// pHalData->H2CQueueHead = 0;
|
||||
// pHalData->H2CQueueTail = 0;
|
||||
// pHalData->H2CStopInsertQueue = FALSE;
|
||||
// pHalData->H2CStopInsertQueue = false;
|
||||
}
|
||||
#endif //CONFIG_WOWLAN
|
||||
|
||||
|
|
@ -2968,7 +2968,7 @@ Hal_ReadPowerValueFromPROM_8188E(
|
|||
|
||||
}
|
||||
|
||||
//pHalData->bNOPG = TRUE;
|
||||
//pHalData->bNOPG = true;
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
@ -2981,7 +2981,7 @@ Hal_ReadPowerValueFromPROM_8188E(
|
|||
if (pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF)
|
||||
{
|
||||
pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
|
||||
// pHalData->bNOPG = TRUE;
|
||||
// pHalData->bNOPG = true;
|
||||
}
|
||||
}
|
||||
for (group = 0 ; group < MAX_CHNL_GROUP_24G-1; group++)
|
||||
|
|
@ -3182,7 +3182,7 @@ Hal_ReadTxPowerInfo88E(
|
|||
Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail);
|
||||
|
||||
if (!AutoLoadFail)
|
||||
pHalData->bTXPowerDataReadFromEEPORM = TRUE;
|
||||
pHalData->bTXPowerDataReadFromEEPORM = true;
|
||||
|
||||
//for (rfPath = 0 ; rfPath < MAX_RF_PATH ; rfPath++)
|
||||
for (rfPath = 0 ; rfPath < pHalData->NumTotalRFPath ; rfPath++)
|
||||
|
|
|
|||
|
|
@ -96,7 +96,7 @@ sic_IsSICReady(
|
|||
{
|
||||
if (retryCnt++ >= SIC_MAX_POLL_CNT)
|
||||
{
|
||||
//RTPRINT(FPHY, (PHY_SICR|PHY_SICW), ("[SIC], sic_IsSICReady() return FALSE\n"));
|
||||
//RTPRINT(FPHY, (PHY_SICR|PHY_SICW), ("[SIC], sic_IsSICReady() return false\n"));
|
||||
return false;
|
||||
}
|
||||
|
||||
|
|
@ -258,7 +258,7 @@ SIC_SetBBReg(
|
|||
delay_ms(10); // 1 ms
|
||||
|
||||
if ((BBWaitCounter > 100) || RT_CANNOT_IO(Adapter))
|
||||
{// Wait too long, return FALSE to avoid to be stuck here.
|
||||
{// Wait too long, return false to avoid to be stuck here.
|
||||
RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg(), Fail to set BB offset(%#x)!!, WaitCnt(%d)\n", RegAddr, BBWaitCounter));
|
||||
return;
|
||||
}
|
||||
|
|
@ -303,7 +303,7 @@ SIC_QueryBBReg(
|
|||
delay_ms(10); // 10 ms
|
||||
|
||||
if ((BBWaitCounter > 100) || RT_CANNOT_IO(Adapter))
|
||||
{// Wait too long, return FALSE to avoid to be stuck here.
|
||||
{// Wait too long, return false to avoid to be stuck here.
|
||||
RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_QueryBBReg(), Fail to query BB offset(%#x)!!, WaitCnt(%d)\n", RegAddr, BBWaitCounter));
|
||||
return ReturnValue;
|
||||
}
|
||||
|
|
@ -1461,7 +1461,7 @@ phy_BB8190_Config_HardCode(
|
|||
PADAPTER Adapter
|
||||
)
|
||||
{
|
||||
//RT_ASSERT(FALSE, ("This function is not implement yet!!\n"));
|
||||
//RT_ASSERT(false, ("This function is not implement yet!!\n"));
|
||||
return _SUCCESS;
|
||||
}
|
||||
|
||||
|
|
@ -1946,7 +1946,7 @@ PHY_CheckBBAndRFOK(
|
|||
switch (CheckBlock)
|
||||
{
|
||||
case HW90_BLOCK_MAC:
|
||||
//RT_ASSERT(FALSE, ("PHY_CheckBBRFOK(): Never Write 0x100 here!"));
|
||||
//RT_ASSERT(false, ("PHY_CheckBBRFOK(): Never Write 0x100 here!"));
|
||||
//RT_TRACE(COMP_INIT, DBG_LOUD, ("PHY_CheckBBRFOK(): Never Write 0x100 here!\n"));
|
||||
break;
|
||||
|
||||
|
|
@ -2532,11 +2532,11 @@ _PHY_SetBWMode92C(
|
|||
break;
|
||||
|
||||
default:
|
||||
//RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID));
|
||||
//RT_ASSERT(false, ("Unknown RFChipID: %d\n", pHalData->RFChipID));
|
||||
break;
|
||||
}
|
||||
|
||||
//pHalData->SetBWModeInProgress= FALSE;
|
||||
//pHalData->SetBWModeInProgress= false;
|
||||
|
||||
//RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SetBWModeCallback8192C()\n" ));
|
||||
}
|
||||
|
|
@ -2590,7 +2590,7 @@ PHY_SetBWMode8188E(
|
|||
//if (pHalData->SetBWModeInProgress)
|
||||
// return;
|
||||
|
||||
//pHalData->SetBWModeInProgress= TRUE;
|
||||
//pHalData->SetBWModeInProgress= true;
|
||||
|
||||
pHalData->CurrentChannelBW = Bandwidth;
|
||||
|
||||
|
|
@ -2644,7 +2644,7 @@ PHY_SwChnl8188E( // Call after initialization
|
|||
|
||||
if (pHalData->rf_chip == RF_PSEUDO_11N)
|
||||
{
|
||||
//pHalData->SwChnlInProgress=FALSE;
|
||||
//pHalData->SwChnlInProgress=false;
|
||||
return; //return immediately if it is peudo-phy
|
||||
}
|
||||
|
||||
|
|
@ -2672,12 +2672,12 @@ PHY_SwChnl8188E( // Call after initialization
|
|||
break;
|
||||
|
||||
default:
|
||||
//RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode));
|
||||
//RT_ASSERT(false, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode));
|
||||
break;
|
||||
}
|
||||
//--------------------------------------------
|
||||
|
||||
//pHalData->SwChnlInProgress = TRUE;
|
||||
//pHalData->SwChnlInProgress = true;
|
||||
if (channel == 0)
|
||||
channel = 1;
|
||||
|
||||
|
|
@ -2695,10 +2695,10 @@ PHY_SwChnl8188E( // Call after initialization
|
|||
}
|
||||
else
|
||||
{
|
||||
//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE driver sleep or unload\n"));
|
||||
//RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress false driver sleep or unload\n"));
|
||||
//if (IS_HARDWARE_TYPE_8192SU(Adapter))
|
||||
//{
|
||||
// pHalData->SwChnlInProgress = FALSE;
|
||||
// pHalData->SwChnlInProgress = false;
|
||||
pHalData->CurrentChannel = tmpchannel;
|
||||
//}
|
||||
}
|
||||
|
|
@ -2784,11 +2784,11 @@ PHY_SwChnlPhy8192C( // Only called during initialize
|
|||
//return immediately if it is peudo-phy
|
||||
if (pHalData->rf_chip == RF_PSEUDO_11N)
|
||||
{
|
||||
//pHalData->SwChnlInProgress=FALSE;
|
||||
//pHalData->SwChnlInProgress=false;
|
||||
return;
|
||||
}
|
||||
|
||||
//pHalData->SwChnlInProgress = TRUE;
|
||||
//pHalData->SwChnlInProgress = true;
|
||||
if ( channel == 0)
|
||||
channel = 1;
|
||||
|
||||
|
|
@ -2799,7 +2799,7 @@ PHY_SwChnlPhy8192C( // Only called during initialize
|
|||
|
||||
phy_FinishSwChnlNow(Adapter,channel);
|
||||
|
||||
//pHalData->SwChnlInProgress = FALSE;
|
||||
//pHalData->SwChnlInProgress = false;
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -2882,7 +2882,7 @@ static void _PHY_SetRFPathSwitch(
|
|||
|
||||
}
|
||||
|
||||
//return value TRUE => Main; FALSE => Aux
|
||||
//return value true => Main; false => Aux
|
||||
|
||||
static bool _PHY_QueryRFPathSwitch(
|
||||
PADAPTER pAdapter,
|
||||
|
|
|
|||
|
|
@ -121,7 +121,7 @@ static bool HalUsbSetQueuePipeMapping8188EUsb(
|
|||
|
||||
}
|
||||
|
||||
void rtl8188eu_interface_configure(_adapter *padapter)
|
||||
static void rtl8188eu_interface_configure(_adapter *padapter)
|
||||
{
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
|
||||
|
|
@ -204,9 +204,9 @@ static void _dbg_dump_macreg(_adapter *padapter)
|
|||
|
||||
static void _InitPABias(_adapter *padapter)
|
||||
{
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||
u8 pa_setting;
|
||||
bool is92C = IS_92C_SERIAL(pHalData->VersionID);
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||
u8 pa_setting;
|
||||
bool is92C = IS_92C_SERIAL(pHalData->VersionID);
|
||||
|
||||
//FIXED PA current issue
|
||||
//efuse_one_byte_read(padapter, 0x1FA, &pa_setting);
|
||||
|
|
@ -498,7 +498,7 @@ _InitNormalChipOneOutEpPriority(
|
|||
value = QUEUE_NORMAL;
|
||||
break;
|
||||
default:
|
||||
//RT_ASSERT(FALSE,("Shall not reach here!\n"));
|
||||
//RT_ASSERT(false,("Shall not reach here!\n"));
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -541,7 +541,7 @@ _InitNormalChipTwoOutEpPriority(
|
|||
valueLow = QUEUE_NORMAL;
|
||||
break;
|
||||
default:
|
||||
//RT_ASSERT(FALSE,("Shall not reach here!\n"));
|
||||
//RT_ASSERT(false,("Shall not reach here!\n"));
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -612,7 +612,7 @@ _InitQueuePriority(
|
|||
_InitNormalChipThreeOutEpPriority(Adapter);
|
||||
break;
|
||||
default:
|
||||
//RT_ASSERT(FALSE,("Shall not reach here!\n"));
|
||||
//RT_ASSERT(false,("Shall not reach here!\n"));
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -969,7 +969,7 @@ usb_AggSettingRxUpdate(
|
|||
pHalData->HwRxPageSize = 1024;
|
||||
break;
|
||||
default:
|
||||
//RT_ASSERT(FALSE, ("RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n"));
|
||||
//RT_ASSERT(false, ("RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n"));
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
|
@ -991,7 +991,7 @@ InitUsbAggregationSetting(
|
|||
// 201/12/10 MH Add for USB agg mode dynamic switch.
|
||||
pHalData->UsbRxHighSpeedMode = false;
|
||||
}
|
||||
void
|
||||
static void
|
||||
HalRxAggr8188EUsb(
|
||||
PADAPTER Adapter,
|
||||
bool Value
|
||||
|
|
@ -1018,7 +1018,7 @@ HalRxAggr8188EUsb(
|
|||
* 12/10/2010 MHC Create Version 0.
|
||||
*
|
||||
*---------------------------------------------------------------------------*/
|
||||
void
|
||||
static void
|
||||
USB_AggModeSwitch(
|
||||
PADAPTER Adapter
|
||||
)
|
||||
|
|
@ -1241,7 +1241,7 @@ rt_rf_power_state RfOnOffDetect( PADAPTER pAdapter )
|
|||
|
||||
void _ps_open_RF(_adapter *padapter);
|
||||
|
||||
u32 rtl8188eu_hal_init(PADAPTER Adapter)
|
||||
static u32 rtl8188eu_hal_init(PADAPTER Adapter)
|
||||
{
|
||||
u8 value8 = 0;
|
||||
u16 value16;
|
||||
|
|
@ -1741,18 +1741,14 @@ void _ps_open_RF(_adapter *padapter) {
|
|||
//phy_SsPwrSwitch92CU(padapter, rf_on, 1);
|
||||
}
|
||||
|
||||
void _ps_close_RF(_adapter *padapter){
|
||||
static void _ps_close_RF(_adapter *padapter){
|
||||
//here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified
|
||||
//phy_SsPwrSwitch92CU(padapter, rf_off, 1);
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
CardDisableRTL8188EU(
|
||||
PADAPTER Adapter
|
||||
)
|
||||
static void CardDisableRTL8188EU(PADAPTER Adapter)
|
||||
{
|
||||
// PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
|
||||
u8 val8;
|
||||
u16 val16;
|
||||
u32 val32;
|
||||
|
|
@ -1822,8 +1818,8 @@ static void rtl8192cu_hw_power_down(_adapter *padapter)
|
|||
rtw_write16(padapter, REG_APS_FSMCO, 0x8812);
|
||||
}
|
||||
|
||||
u32 rtl8188eu_hal_deinit(PADAPTER Adapter)
|
||||
{
|
||||
static u32 rtl8188eu_hal_deinit(PADAPTER Adapter)
|
||||
{
|
||||
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
DBG_88E("==> %s\n",__func__);
|
||||
|
|
@ -1856,7 +1852,7 @@ u32 rtl8188eu_hal_deinit(PADAPTER Adapter)
|
|||
}
|
||||
|
||||
|
||||
unsigned int rtl8188eu_inirp_init(PADAPTER Adapter)
|
||||
static unsigned int rtl8188eu_inirp_init(PADAPTER Adapter)
|
||||
{
|
||||
u8 i;
|
||||
struct recv_buf *precvbuf;
|
||||
|
|
@ -1919,7 +1915,7 @@ _func_exit_;
|
|||
|
||||
}
|
||||
|
||||
unsigned int rtl8188eu_inirp_deinit(PADAPTER Adapter)
|
||||
static unsigned int rtl8188eu_inirp_deinit(PADAPTER Adapter)
|
||||
{
|
||||
RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n ===> usb_rx_deinit\n"));
|
||||
|
||||
|
|
@ -2372,7 +2368,8 @@ static void ResumeTxBeacon(_adapter *padapter)
|
|||
pHalData->RegReg542 |= BIT0;
|
||||
rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542);
|
||||
}
|
||||
void UpdateInterruptMask8188EU(PADAPTER padapter,u8 bHIMR0 ,u32 AddMSR, u32 RemoveMSR)
|
||||
|
||||
static void UpdateInterruptMask8188EU(PADAPTER padapter,u8 bHIMR0 ,u32 AddMSR, u32 RemoveMSR)
|
||||
{
|
||||
HAL_DATA_TYPE *pHalData;
|
||||
|
||||
|
|
@ -2982,7 +2979,7 @@ static void hw_var_set_mlme_join(PADAPTER Adapter, u8 variable, u8* val)
|
|||
#endif
|
||||
}
|
||||
|
||||
void SetHwReg8188EU(PADAPTER Adapter, u8 variable, u8* val)
|
||||
static void SetHwReg8188EU(PADAPTER Adapter, u8 variable, u8* val)
|
||||
{
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
struct dm_priv *pdmpriv = &pHalData->dmpriv;
|
||||
|
|
@ -3822,7 +3819,7 @@ _func_enter_;
|
|||
_func_exit_;
|
||||
}
|
||||
|
||||
void GetHwReg8188EU(PADAPTER Adapter, u8 variable, u8* val)
|
||||
static void GetHwReg8188EU(PADAPTER Adapter, u8 variable, u8* val)
|
||||
{
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
DM_ODM_T *podmpriv = &pHalData->odmpriv;
|
||||
|
|
@ -3891,7 +3888,7 @@ _func_exit_;
|
|||
// Description:
|
||||
// Query setting of specified variable.
|
||||
//
|
||||
u8
|
||||
static u8
|
||||
GetHalDefVar8188EUsb(
|
||||
PADAPTER Adapter,
|
||||
HAL_DEF_VARIABLE eVariable,
|
||||
|
|
@ -4026,8 +4023,7 @@ GetHalDefVar8188EUsb(
|
|||
// Description:
|
||||
// Change default setting of specified variable.
|
||||
//
|
||||
u8
|
||||
SetHalDefVar8188EUsb(
|
||||
static u8 SetHalDefVar8188EUsb(
|
||||
PADAPTER Adapter,
|
||||
HAL_DEF_VARIABLE eVariable,
|
||||
void * pValue
|
||||
|
|
@ -4138,7 +4134,7 @@ u32 _update_92cu_basic_rate(_adapter *padapter, unsigned int mask)
|
|||
return BrateCfg;
|
||||
}
|
||||
*/
|
||||
void _update_response_rate(_adapter *padapter,unsigned int mask)
|
||||
static void _update_response_rate(_adapter *padapter,unsigned int mask)
|
||||
{
|
||||
u8 RateIndex = 0;
|
||||
// Set RRSR rate table.
|
||||
|
|
@ -4154,7 +4150,7 @@ void _update_response_rate(_adapter *padapter,unsigned int mask)
|
|||
rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex);
|
||||
}
|
||||
|
||||
void UpdateHalRAMask8188EUsb(PADAPTER padapter, u32 mac_id, u8 rssi_level)
|
||||
static void UpdateHalRAMask8188EUsb(PADAPTER padapter, u32 mac_id, u8 rssi_level)
|
||||
{
|
||||
//volatile unsigned int result;
|
||||
u8 init_rate=0;
|
||||
|
|
@ -4300,8 +4296,7 @@ void UpdateHalRAMask8188EUsb(PADAPTER padapter, u32 mac_id, u8 rssi_level)
|
|||
|
||||
}
|
||||
|
||||
|
||||
void SetBeaconRelatedRegisters8188EUsb(PADAPTER padapter)
|
||||
static void SetBeaconRelatedRegisters8188EUsb(PADAPTER padapter)
|
||||
{
|
||||
u32 value32;
|
||||
//HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||
|
|
|
|||
|
|
@ -492,10 +492,10 @@ static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs)
|
|||
case -ENODEV:
|
||||
case -ESHUTDOWN:
|
||||
//padapter->bSurpriseRemoved=true;
|
||||
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n"));
|
||||
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=true\n"));
|
||||
case -ENOENT:
|
||||
padapter->bDriverStopped=true;
|
||||
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n"));
|
||||
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=true\n"));
|
||||
break;
|
||||
case -EPROTO:
|
||||
break;
|
||||
|
|
@ -978,10 +978,10 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
|
|||
case -ENODEV:
|
||||
case -ESHUTDOWN:
|
||||
//padapter->bSurpriseRemoved=true;
|
||||
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n"));
|
||||
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=true\n"));
|
||||
case -ENOENT:
|
||||
padapter->bDriverStopped=true;
|
||||
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n"));
|
||||
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=true\n"));
|
||||
break;
|
||||
case -EPROTO:
|
||||
case -EOVERFLOW:
|
||||
|
|
@ -1415,10 +1415,10 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
|
|||
case -ENODEV:
|
||||
case -ESHUTDOWN:
|
||||
//padapter->bSurpriseRemoved=true;
|
||||
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n"));
|
||||
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=true\n"));
|
||||
case -ENOENT:
|
||||
padapter->bDriverStopped=true;
|
||||
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n"));
|
||||
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=true\n"));
|
||||
break;
|
||||
case -EPROTO:
|
||||
case -EOVERFLOW:
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue