From 494792ba07fe4645fd0deedf9b15187eab07da01 Mon Sep 17 00:00:00 2001 From: Larry Finger Date: Tue, 16 Dec 2014 22:09:56 -0600 Subject: [PATCH] rtl8188eu: Flatten directory hal/ Signed-off-by: Larry Finger --- Makefile | 86 +- hal/{OUTSRC/rtl8188e => }/Hal8188EFWImg_CE.c | 2 +- hal/{OUTSRC/rtl8188e => }/Hal8188EFWImg_CE.h | 0 hal/Hal8188EPwrSeq.c | 183 +- hal/Hal8188ERateAdaptive.c | 1422 +- .../rtl8188e => }/Hal8188ERateAdaptive.h | 0 hal/{OUTSRC/rtl8188e => }/Hal8188EReg.h | 0 hal/HalHWImg8188E_BB.c | 2168 ++- hal/{OUTSRC/rtl8188e => }/HalHWImg8188E_BB.h | 0 hal/{OUTSRC/rtl8188e => }/HalHWImg8188E_FW.c | 0 hal/{OUTSRC/rtl8188e => }/HalHWImg8188E_FW.h | 0 hal/HalHWImg8188E_MAC.c | 732 +- hal/{OUTSRC/rtl8188e => }/HalHWImg8188E_MAC.h | 0 hal/HalHWImg8188E_RF.c | 837 +- hal/{OUTSRC/rtl8188e => }/HalHWImg8188E_RF.h | 0 hal/HalPhyRf.c | 1554 +- hal/{OUTSRC => }/HalPhyRf.h | 0 hal/HalPhyRf_8188e.c | 4550 ++++-- hal/{OUTSRC/rtl8188e => }/HalPhyRf_8188e.h | 0 hal/OUTSRC/HalPhyRf.c | 1561 -- hal/OUTSRC/odm.c | 12495 --------------- hal/OUTSRC/odm_HWConfig.c | 1198 -- hal/OUTSRC/odm_debug.c | 627 - hal/OUTSRC/odm_interface.c | 666 - hal/OUTSRC/rtl8188e/Hal8188ERateAdaptive.c | 1108 -- hal/OUTSRC/rtl8188e/HalHWImg8188E_BB.c | 1448 -- hal/OUTSRC/rtl8188e/HalHWImg8188E_MAC.c | 502 - hal/OUTSRC/rtl8188e/HalHWImg8188E_RF.c | 569 - hal/OUTSRC/rtl8188e/HalPhyRf_8188e.c | 3045 ---- hal/OUTSRC/rtl8188e/odm_RTL8188E.c | 1290 -- hal/OUTSRC/rtl8188e/odm_RegConfig8188E.c | 209 - hal/odm.c | 13209 ++++++++++++++-- hal/{OUTSRC => }/odm.h | 0 hal/odm_HWConfig.c | 1799 ++- hal/{OUTSRC => }/odm_HWConfig.h | 0 hal/odm_RTL8188E.c | 1689 +- hal/{OUTSRC/rtl8188e => }/odm_RTL8188E.h | 0 hal/odm_RegConfig8188E.c | 205 +- .../rtl8188e => }/odm_RegConfig8188E.h | 0 hal/{OUTSRC => }/odm_RegDefine11AC.h | 0 hal/{OUTSRC => }/odm_RegDefine11N.h | 0 hal/odm_debug.c | 659 +- hal/{OUTSRC => }/odm_debug.h | 0 hal/odm_interface.c | 869 +- hal/{OUTSRC => }/odm_interface.h | 0 hal/{OUTSRC => }/odm_precomp.h | 51 +- hal/{OUTSRC => }/odm_reg.h | 0 hal/{OUTSRC => }/odm_types.h | 0 hal/rtl8188e/Hal8188EPwrSeq.c | 97 - hal/rtl8188e/rtl8188e_cmd.c | 1493 -- hal/rtl8188e/rtl8188e_dm.c | 647 - hal/rtl8188e/rtl8188e_hal_init.c | 3800 ----- hal/rtl8188e/rtl8188e_phycfg.c | 3552 ----- hal/rtl8188e/rtl8188e_rf6052.c | 1272 -- hal/rtl8188e/rtl8188e_rxdesc.c | 350 - hal/rtl8188e/rtl8188e_sreset.c | 125 - hal/rtl8188e/rtl8188e_xmit.c | 292 - hal/rtl8188e/sdio/rtl8189es_led.c | 124 - hal/rtl8188e/sdio/rtl8189es_recv.c | 824 - hal/rtl8188e/sdio/rtl8189es_xmit.c | 1699 -- hal/rtl8188e/sdio/sdio_halinit.c | 4218 ----- hal/rtl8188e/sdio/sdio_ops.c | 1957 --- hal/rtl8188e/usb/rtl8188eu_led.c | 170 - hal/rtl8188e/usb/rtl8188eu_recv.c | 212 - hal/rtl8188e/usb/rtl8188eu_xmit.c | 1327 -- hal/rtl8188e/usb/usb_halinit.c | 5220 ------ hal/rtl8188e/usb/usb_ops_linux.c | 1737 -- hal/rtl8188e_cmd.c | 2255 ++- hal/rtl8188e_dm.c | 914 +- hal/rtl8188e_hal_init.c | 3905 +++-- hal/rtl8188e_phycfg.c | 4687 ++++-- hal/rtl8188e_rf6052.c | 1841 ++- hal/rtl8188e_rxdesc.c | 340 +- hal/rtl8188e_sreset.c | 205 +- hal/rtl8188e_xmit.c | 279 +- hal/rtl8188eu_led.c | 171 +- hal/rtl8188eu_recv.c | 174 +- hal/rtl8188eu_xmit.c | 1348 +- hal/usb_halinit.c | 6039 +++++-- hal/usb_ops_linux.c | 1717 +- include/rtl8188e_hal.h | 2 +- 81 files changed, 41103 insertions(+), 66623 deletions(-) rename hal/{OUTSRC/rtl8188e => }/Hal8188EFWImg_CE.c (98%) rename hal/{OUTSRC/rtl8188e => }/Hal8188EFWImg_CE.h (100%) mode change 100644 => 100755 hal/Hal8188EPwrSeq.c mode change 100644 => 100755 hal/Hal8188ERateAdaptive.c rename hal/{OUTSRC/rtl8188e => }/Hal8188ERateAdaptive.h (100%) rename hal/{OUTSRC/rtl8188e => }/Hal8188EReg.h (100%) mode change 100644 => 100755 hal/HalHWImg8188E_BB.c rename hal/{OUTSRC/rtl8188e => }/HalHWImg8188E_BB.h (100%) rename hal/{OUTSRC/rtl8188e => }/HalHWImg8188E_FW.c (100%) rename hal/{OUTSRC/rtl8188e => }/HalHWImg8188E_FW.h (100%) mode change 100644 => 100755 hal/HalHWImg8188E_MAC.c rename hal/{OUTSRC/rtl8188e => }/HalHWImg8188E_MAC.h (100%) mode change 100644 => 100755 hal/HalHWImg8188E_RF.c rename hal/{OUTSRC/rtl8188e => }/HalHWImg8188E_RF.h (100%) mode change 100644 => 100755 hal/HalPhyRf.c rename hal/{OUTSRC => }/HalPhyRf.h (100%) mode change 100644 => 100755 hal/HalPhyRf_8188e.c rename hal/{OUTSRC/rtl8188e => }/HalPhyRf_8188e.h (100%) delete mode 100755 hal/OUTSRC/HalPhyRf.c delete mode 100755 hal/OUTSRC/odm.c delete mode 100755 hal/OUTSRC/odm_HWConfig.c delete mode 100755 hal/OUTSRC/odm_debug.c delete mode 100755 hal/OUTSRC/odm_interface.c delete mode 100755 hal/OUTSRC/rtl8188e/Hal8188ERateAdaptive.c delete mode 100755 hal/OUTSRC/rtl8188e/HalHWImg8188E_BB.c delete mode 100755 hal/OUTSRC/rtl8188e/HalHWImg8188E_MAC.c delete mode 100755 hal/OUTSRC/rtl8188e/HalHWImg8188E_RF.c delete mode 100755 hal/OUTSRC/rtl8188e/HalPhyRf_8188e.c delete mode 100755 hal/OUTSRC/rtl8188e/odm_RTL8188E.c delete mode 100755 hal/OUTSRC/rtl8188e/odm_RegConfig8188E.c mode change 100644 => 100755 hal/odm.c rename hal/{OUTSRC => }/odm.h (100%) mode change 100644 => 100755 hal/odm_HWConfig.c rename hal/{OUTSRC => }/odm_HWConfig.h (100%) mode change 100644 => 100755 hal/odm_RTL8188E.c rename hal/{OUTSRC/rtl8188e => }/odm_RTL8188E.h (100%) mode change 100644 => 100755 hal/odm_RegConfig8188E.c rename hal/{OUTSRC/rtl8188e => }/odm_RegConfig8188E.h (100%) rename hal/{OUTSRC => }/odm_RegDefine11AC.h (100%) rename hal/{OUTSRC => }/odm_RegDefine11N.h (100%) mode change 100644 => 100755 hal/odm_debug.c rename hal/{OUTSRC => }/odm_debug.h (100%) mode change 100644 => 100755 hal/odm_interface.c rename hal/{OUTSRC => }/odm_interface.h (100%) rename hal/{OUTSRC => }/odm_precomp.h (78%) rename hal/{OUTSRC => }/odm_reg.h (100%) rename hal/{OUTSRC => }/odm_types.h (100%) delete mode 100755 hal/rtl8188e/Hal8188EPwrSeq.c delete mode 100755 hal/rtl8188e/rtl8188e_cmd.c delete mode 100755 hal/rtl8188e/rtl8188e_dm.c delete mode 100755 hal/rtl8188e/rtl8188e_hal_init.c delete mode 100755 hal/rtl8188e/rtl8188e_phycfg.c delete mode 100755 hal/rtl8188e/rtl8188e_rf6052.c delete mode 100755 hal/rtl8188e/rtl8188e_rxdesc.c delete mode 100755 hal/rtl8188e/rtl8188e_sreset.c delete mode 100755 hal/rtl8188e/rtl8188e_xmit.c delete mode 100755 hal/rtl8188e/sdio/rtl8189es_led.c delete mode 100755 hal/rtl8188e/sdio/rtl8189es_recv.c delete mode 100755 hal/rtl8188e/sdio/rtl8189es_xmit.c delete mode 100755 hal/rtl8188e/sdio/sdio_halinit.c delete mode 100755 hal/rtl8188e/sdio/sdio_ops.c delete mode 100755 hal/rtl8188e/usb/rtl8188eu_led.c delete mode 100755 hal/rtl8188e/usb/rtl8188eu_recv.c delete mode 100755 hal/rtl8188e/usb/rtl8188eu_xmit.c delete mode 100755 hal/rtl8188e/usb/usb_halinit.c delete mode 100755 hal/rtl8188e/usb/usb_ops_linux.c mode change 100644 => 100755 hal/rtl8188e_cmd.c mode change 100644 => 100755 hal/rtl8188e_dm.c mode change 100644 => 100755 hal/rtl8188e_hal_init.c mode change 100644 => 100755 hal/rtl8188e_phycfg.c mode change 100644 => 100755 hal/rtl8188e_rf6052.c mode change 100644 => 100755 hal/rtl8188e_rxdesc.c mode change 100644 => 100755 hal/rtl8188e_sreset.c mode change 100644 => 100755 hal/rtl8188e_xmit.c mode change 100644 => 100755 hal/rtl8188eu_led.c mode change 100644 => 100755 hal/rtl8188eu_recv.c mode change 100644 => 100755 hal/rtl8188eu_xmit.c mode change 100644 => 100755 hal/usb_halinit.c mode change 100644 => 100755 hal/usb_ops_linux.c diff --git a/Makefile b/Makefile index cbf1bf8..f5dde03 100755 --- a/Makefile +++ b/Makefile @@ -77,15 +77,15 @@ CONFIG_DRVEXT_MODULE = n export TopDIR ?= $(shell pwd) -OUTSRC_FILES := hal/OUTSRC/odm_debug.o \ - hal/OUTSRC/odm_interface.o\ - hal/OUTSRC/odm_HWConfig.o\ - hal/OUTSRC/odm.o\ - hal/OUTSRC/HalPhyRf.o +OUTSRC_FILES := hal/odm_debug.o \ + hal/odm_interface.o\ + hal/odm_HWConfig.o\ + hal/odm.o\ + hal/HalPhyRf.o RTL871X = rtl8188e -HAL_COMM_FILES := hal/$(RTL871X)/$(RTL871X)_xmit.o\ - hal/$(RTL871X)/$(RTL871X)_sreset.o +HAL_COMM_FILES := hal/rtl8188e_xmit.o\ + hal/rtl8188e_sreset.o ifeq ($(CONFIG_SDIO_HCI), y) MODULE_NAME = 8189es @@ -99,24 +99,23 @@ ifeq ($(CONFIG_PCI_HCI), y) MODULE_NAME = 8188ee endif -#hal/OUTSRC/$(RTL871X)/HalHWImg8188E_FW.o -OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8188E_MAC.o\ - hal/OUTSRC/$(RTL871X)/HalHWImg8188E_BB.o\ - hal/OUTSRC/$(RTL871X)/HalHWImg8188E_RF.o\ - hal/OUTSRC/$(RTL871X)/Hal8188EFWImg_CE.o\ - hal/OUTSRC/$(RTL871X)/HalPhyRf_8188e.o\ - hal/OUTSRC/$(RTL871X)/odm_RegConfig8188E.o\ - hal/OUTSRC/$(RTL871X)/Hal8188ERateAdaptive.o\ - hal/OUTSRC/$(RTL871X)/odm_RTL8188E.o +OUTSRC_FILES += hal/HalHWImg8188E_MAC.o\ + hal/HalHWImg8188E_BB.o\ + hal/HalHWImg8188E_RF.o\ + hal/Hal8188EFWImg_CE.o\ + hal/HalPhyRf_8188e.o\ + hal/odm_RegConfig8188E.o\ + hal/Hal8188ERateAdaptive.o\ + hal/odm_RTL8188E.o ifeq ($(CONFIG_RTL8188E), y) ifeq ($(CONFIG_WOWLAN), y) -OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8188E_FW.o +OUTSRC_FILES += hal/HalHWImg8188E_FW.o endif endif PWRSEQ_FILES := hal/HalPwrSeqCmd.o \ - hal/$(RTL871X)/Hal8188EPwrSeq.o + hal/Hal8188EPwrSeq.o CHIP_FILES += $(HAL_COMM_FILES) $(OUTSRC_FILES) $(PWRSEQ_FILES) @@ -160,40 +159,21 @@ endif _HAL_INTFS_FILES := hal/hal_intf.o \ hal/hal_com.o \ - hal/$(RTL871X)/$(RTL871X)_hal_init.o \ - hal/$(RTL871X)/$(RTL871X)_phycfg.o \ - hal/$(RTL871X)/$(RTL871X)_rf6052.o \ - hal/$(RTL871X)/$(RTL871X)_dm.o \ - hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ - hal/$(RTL871X)/$(RTL871X)_cmd.o \ - hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ - hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ - hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ - hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o + hal/rtl8188e_hal_init.o \ + hal/rtl8188e_phycfg.o \ + hal/rtl8188e_rf6052.o \ + hal/rtl8188e_dm.o \ + hal/rtl8188e_rxdesc.o \ + hal/rtl8188e_cmd.o \ + hal/$(HCI_NAME)_halinit.o \ + hal/rtl$(MODULE_NAME)_led.o \ + hal//rtl$(MODULE_NAME)_xmit.o \ + hal/rtl$(MODULE_NAME)_recv.o -ifeq ($(CONFIG_SDIO_HCI), y) -_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -else -ifeq ($(CONFIG_GSPI_HCI), y) -_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -else -_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -endif -endif +_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops_linux.o _HAL_INTFS_FILES += $(CHIP_FILES) - -ifeq ($(CONFIG_AUTOCFG_CP), y) - -#ifeq ($(CONFIG_RTL8188E)$(CONFIG_SDIO_HCI),yy) -#$(shell cp $(TopDIR)/autoconf_rtl8189e_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) -#else -#$(shell cp $(TopDIR)/autoconf_$(RTL871X)_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) -#endif -endif - - ifeq ($(CONFIG_USB_HCI), y) ifeq ($(CONFIG_USB_AUTOSUSPEND), y) EXTRA_CFLAGS += -DCONFIG_USB_AUTOSUSPEND @@ -663,7 +643,7 @@ $(MODULE_NAME)-y += $(rtk_core) $(MODULE_NAME)-$(CONFIG_INTEL_WIDI) += core/rtw_intel_widi.o $(MODULE_NAME)-$(CONFIG_WAPI_SUPPORT) += core/rtw_wapi.o \ - core/rtw_wapi_sms4.o + core/rtw_wapi_sms4.o $(MODULE_NAME)-y += core/efuse/rtw_efuse.o @@ -699,21 +679,13 @@ config_r: .PHONY: modules clean clean_odm-8192c -clean_odm-8192c: - cd hal/OUTSRC/rtl8192c ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko - clean: $(clean_more) rm -fr *.mod.c *.mod *.o .*.cmd *.ko *~ rm -fr .tmp_versions rm -fr Module.symvers ; rm -fr Module.markers ; rm -fr modules.order cd core/efuse ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko cd core ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko - cd hal/$(RTL871X)/$(HCI_NAME) ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko - cd hal/$(RTL871X) ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko - cd hal/OUTSRC/$(RTL871X) ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko - cd hal/OUTSRC/ ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko cd hal ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko - cd os_dep/linux ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko cd os_dep ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko endif diff --git a/hal/OUTSRC/rtl8188e/Hal8188EFWImg_CE.c b/hal/Hal8188EFWImg_CE.c similarity index 98% rename from hal/OUTSRC/rtl8188e/Hal8188EFWImg_CE.c rename to hal/Hal8188EFWImg_CE.c index 815a357..cd309f4 100755 --- a/hal/OUTSRC/rtl8188e/Hal8188EFWImg_CE.c +++ b/hal/Hal8188EFWImg_CE.c @@ -17,7 +17,7 @@ * * ******************************************************************************/ -#include "../odm_precomp.h" +#include "odm_precomp.h" const u8 Rtl8188EFwImgArray[Rtl8188EFWImgArrayLength] = { 0xE1, 0x88, 0x10, 0x00, 0x0B, 0x00, 0x01, 0x00, 0x01, 0x21, 0x11, 0x27, 0x30, 0x36, 0x00, 0x00, diff --git a/hal/OUTSRC/rtl8188e/Hal8188EFWImg_CE.h b/hal/Hal8188EFWImg_CE.h similarity index 100% rename from hal/OUTSRC/rtl8188e/Hal8188EFWImg_CE.h rename to hal/Hal8188EFWImg_CE.h diff --git a/hal/Hal8188EPwrSeq.c b/hal/Hal8188EPwrSeq.c old mode 100644 new mode 100755 index fc23bf1..c38c25a --- a/hal/Hal8188EPwrSeq.c +++ b/hal/Hal8188EPwrSeq.c @@ -1,86 +1,97 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -#include "Hal8188EPwrSeq.h" -#include - -/* - drivers should parse below arrays and do the corresponding actions -*/ -/* 3 Power on Array */ -struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_CARDEMU_TO_ACT - RTL8188E_TRANS_END -}; - -/* 3Radio off Array */ -struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_END -}; - -/* 3Card Disable Array */ -struct wl_pwr_cfg rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_CARDDIS - RTL8188E_TRANS_END -}; - -/* 3 Card Enable Array */ -struct wl_pwr_cfg rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_CARDDIS_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_ACT - RTL8188E_TRANS_END -}; - -/* 3Suspend Array */ -struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_SUS - RTL8188E_TRANS_END -}; - -/* 3 Resume Array */ -struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_SUS_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_ACT - RTL8188E_TRANS_END -}; - -/* 3HWPDN Array */ -struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = { - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_PDN - RTL8188E_TRANS_END -}; - -/* 3 Enter LPS */ -struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS + RTL8188E_TRANS_END_STEPS] = { - /* FW behavior */ - RTL8188E_TRANS_ACT_TO_LPS - RTL8188E_TRANS_END -}; - -/* 3 Leave LPS */ -struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS] = { - /* FW behavior */ - RTL8188E_TRANS_LPS_TO_ACT - RTL8188E_TRANS_END -}; +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#include "Hal8188EPwrSeq.h" +#include + +/* + drivers should parse below arrays and do the corresponding actions +*/ +//3 Power on Array +WLAN_PWR_CFG rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]= +{ + RTL8188E_TRANS_CARDEMU_TO_ACT + RTL8188E_TRANS_END +}; + +//3Radio off Array +WLAN_PWR_CFG rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_END_STEPS]= +{ + RTL8188E_TRANS_ACT_TO_CARDEMU + RTL8188E_TRANS_END +}; + +//3Card Disable Array +WLAN_PWR_CFG rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]= +{ + RTL8188E_TRANS_ACT_TO_CARDEMU + RTL8188E_TRANS_CARDEMU_TO_CARDDIS + RTL8188E_TRANS_END +}; + +//3 Card Enable Array +WLAN_PWR_CFG rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]= +{ + RTL8188E_TRANS_CARDDIS_TO_CARDEMU + RTL8188E_TRANS_CARDEMU_TO_ACT + RTL8188E_TRANS_END +}; + +//3Suspend Array +WLAN_PWR_CFG rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]= +{ + RTL8188E_TRANS_ACT_TO_CARDEMU + RTL8188E_TRANS_CARDEMU_TO_SUS + RTL8188E_TRANS_END +}; + +//3 Resume Array +WLAN_PWR_CFG rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]= +{ + RTL8188E_TRANS_SUS_TO_CARDEMU + RTL8188E_TRANS_CARDEMU_TO_ACT + RTL8188E_TRANS_END +}; + + +//3HWPDN Array +WLAN_PWR_CFG rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]= +{ + RTL8188E_TRANS_ACT_TO_CARDEMU + RTL8188E_TRANS_CARDEMU_TO_PDN + RTL8188E_TRANS_END +}; + +//3 Enter LPS +WLAN_PWR_CFG rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS+RTL8188E_TRANS_END_STEPS]= +{ + //FW behavior + RTL8188E_TRANS_ACT_TO_LPS + RTL8188E_TRANS_END +}; + +//3 Leave LPS +WLAN_PWR_CFG rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]= +{ + //FW behavior + RTL8188E_TRANS_LPS_TO_ACT + RTL8188E_TRANS_END +}; + diff --git a/hal/Hal8188ERateAdaptive.c b/hal/Hal8188ERateAdaptive.c old mode 100644 new mode 100755 index aaa2617..11a1ead --- a/hal/Hal8188ERateAdaptive.c +++ b/hal/Hal8188ERateAdaptive.c @@ -3,758 +3,1106 @@ Copyright (c) Realtek Semiconductor Corp. All rights reserved. Module Name: RateAdaptive.c - + Abstract: Implement Rate Adaptive functions for common operations. - + Major Change History: When Who What - ---------- --------------- ------------------------------- - 2011-08-12 Page Create. + ---------- --------------- ------------------------------- + 2011-08-12 Page Create. --*/ #include "odm_precomp.h" -/* Rate adaptive parameters */ +//#if( DM_ODM_SUPPORT_TYPE == ODM_MP) +//#include "Mp_Precomp.h" +//#endif -static u8 RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = { - {5, 4, 3, 2, 0, 3}, /* 92 , idx = 0 */ - {6, 5, 4, 3, 0, 4}, /* 86 , idx = 1 */ - {6, 5, 4, 2, 0, 4}, /* 81 , idx = 2 */ - {8, 7, 6, 4, 0, 6}, /* 75 , idx = 3 */ - {10, 9, 8, 6, 0, 8}, /* 71 , idx = 4 */ - {10, 9, 8, 4, 0, 8}, /* 66 , idx = 5 */ - {10, 9, 8, 2, 0, 8}, /* 62 , idx = 6 */ - {10, 9, 8, 0, 0, 8}, /* 59 , idx = 7 */ - {18, 17, 16, 8, 0, 16}, /* 53 , idx = 8 */ - {26, 25, 24, 16, 0, 24}, /* 50 , idx = 9 */ - {34, 33, 32, 24, 0, 32}, /* 47 , idx = 0x0a */ - {34, 31, 28, 20, 0, 32}, /* 43 , idx = 0x0b */ - {34, 31, 27, 18, 0, 32}, /* 40 , idx = 0x0c */ - {34, 31, 26, 16, 0, 32}, /* 37 , idx = 0x0d */ - {34, 30, 22, 16, 0, 32}, /* 32 , idx = 0x0e */ - {34, 30, 24, 16, 0, 32}, /* 26 , idx = 0x0f */ - {49, 46, 40, 16, 0, 48}, /* 20 , idx = 0x10 */ - {49, 45, 32, 0, 0, 48}, /* 17 , idx = 0x11 */ - {49, 45, 22, 18, 0, 48}, /* 15 , idx = 0x12 */ - {49, 40, 24, 16, 0, 48}, /* 12 , idx = 0x13 */ - {49, 32, 18, 12, 0, 48}, /* 9 , idx = 0x14 */ - {49, 22, 18, 14, 0, 48}, /* 6 , idx = 0x15 */ - {49, 16, 16, 0, 0, 48} - }; /* 3, idx = 0x16 */ +#if (RATE_ADAPTIVE_SUPPORT == 1) +// Rate adaptive parameters -static u8 PT_PENALTY[RETRYSIZE+1] = {34, 31, 30, 24, 0, 32}; -/* wilson modify */ -static u8 RETRY_PENALTY_IDX[2][RATESIZE] = { - {4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */ - 4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d, - 5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f}, /* 0329 R01 */ - {0x0a, 0x0a, 0x0b, 0x0c, 0x0a, - 0x0a, 0x0b, 0x0c, 0x0d, 0x10, 0x13, 0x14, /* SSTH + 4,4,4,4,6,0x0a,0x0b,0x0d, + 5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01 + {4,4,4,5,7,7,9,9,0x0c,0x0e,0x10,0x12, // SSTH + 4,4,4,4,6,0x0a,0x0b,0x0d, + 5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01 + {0x0a,0x0a,0x0a,0x0a,0x0c,0x0c,0x0e,0x10,0x11,0x12,0x12,0x13, // SSTH + 0x13,0x13,0x14,0x14,0x15,0x15,0x15,0x15, + 0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15}; + +static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0, + 0,0,0,0,0,0x24,0x26,0x2a, + 0x13,0x15,0x17,0x18,0x1a,0x1c,0x1d,0x1f, + 0,0,0,0x1f,0x23,0x28,0x2a,0x2c}; +#else + +// wilson modify +static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = {{4,4,4,5,4,4,5,7,7,7,8,0x0a, // SS>TH + 4,4,4,4,6,0x0a,0x0b,0x0d, + 5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01 + {0x0a,0x0a,0x0b,0x0c,0x0a,0x0a,0x0b,0x0c,0x0d,0x10,0x13,0x14, // SSTH + 0x0f,0x10,0x10,0x12,0x12,0x13,0x14,0x15, + 0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15}; + +static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0, + 0,0,0,0,0,0x24,0x26,0x2a, + 0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a, + 0,0,0,0x1f,0x23,0x28,0x2a,0x2c}; + +#endif + +/*static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0, + 0,0,0,0,0,0x24,0x26,0x2a, + 0x1a,0x1c,0x1e,0x21,0x24,0x2a,0x2b,0x2d, + 0,0,0,0x1f,0x23,0x28,0x2a,0x2c};*/ +static u2Byte N_THRESHOLD_HIGH[RATESIZE] = {4,4,8,16, + 24,36,48,72,96,144,192,216, + 60,80,100,160,240,400,560,640, + 300,320,480,720,1000,1200,1600,2000}; +static u2Byte N_THRESHOLD_LOW[RATESIZE] = {2,2,4,8, + 12,18,24,36,48,72,96,108, + 30,40,50,80,120,200,280,320, + 150,160,240,360,500,600,800,1000}; +static u1Byte TRYING_NECESSARY[RATESIZE] = {2,2,2,2, + 2,2,3,3,4,4,5,7, + 4,4,7,10,10,12,12,18, + 5,7,7,8,11,18,36,60}; // 0329 // 1207 +#if 0 +static u1Byte POOL_RETRY_TH[RATESIZE] = {30,30,30,30, + 30,30,25,25,20,15,15,10, + 30,25,25,20,15,10,10,10, + 30,25,25,20,15,10,10,10}; +#endif + +static u1Byte DROPING_NECESSARY[RATESIZE] = {1,1,1,1, + 1,2,3,4,5,6,7,8, + 1,2,3,4,5,6,7,8, + 5,6,7,8,9,10,11,12}; + + +static u4Byte INIT_RATE_FALLBACK_TABLE[16]={0x0f8ff015, // 0: 40M BGN mode + 0x0f8ff010, // 1: 40M GN mode + 0x0f8ff005, // 2: BN mode/ 40M BGN mode + 0x0f8ff000, // 3: N mode + 0x00000ff5, // 4: BG mode + 0x00000ff0, // 5: G mode + 0x0000000d, // 6: B mode + 0, // 7: + 0, // 8: + 0, // 9: + 0, // 10: + 0, // 11: + 0, // 12: + 0, // 13: + 0, // 14: + 0, // 15: + }; +static u1Byte PendingForRateUpFail[5]={2,10,24,40,60}; +static u2Byte DynamicTxRPTTiming[6]={0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12 ,0x927c}; // 200ms-1200ms -static u8 RETRY_PENALTY_UP_IDX[RATESIZE] = { - 0x0c, 0x0d, 0x0d, 0x0f, 0x0d, 0x0e, - 0x0f, 0x0f, 0x10, 0x12, 0x13, 0x14, /* SS>TH */ - 0x0f, 0x10, 0x10, 0x12, 0x12, 0x13, 0x14, 0x15, - 0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15}; +// End Rate adaptive parameters -static u8 RSSI_THRESHOLD[RATESIZE] = { - 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0x24, 0x26, 0x2a, - 0x18, 0x1a, 0x1d, 0x1f, 0x21, 0x27, 0x29, 0x2a, - 0, 0, 0, 0x1f, 0x23, 0x28, 0x2a, 0x2c}; - -static u16 N_THRESHOLD_HIGH[RATESIZE] = { - 4, 4, 8, 16, - 24, 36, 48, 72, 96, 144, 192, 216, - 60, 80, 100, 160, 240, 400, 560, 640, - 300, 320, 480, 720, 1000, 1200, 1600, 2000}; -static u16 N_THRESHOLD_LOW[RATESIZE] = { - 2, 2, 4, 8, - 12, 18, 24, 36, 48, 72, 96, 108, - 30, 40, 50, 80, 120, 200, 280, 320, - 150, 160, 240, 360, 500, 600, 800, 1000}; - -static u8 DROPING_NECESSARY[RATESIZE] = { - 1, 1, 1, 1, - 1, 2, 3, 4, 5, 6, 7, 8, - 1, 2, 3, 4, 5, 6, 7, 8, - 5, 6, 7, 8, 9, 10, 11, 12}; - -static u8 PendingForRateUpFail[5] = {2, 10, 24, 40, 60}; -static u16 DynamicTxRPTTiming[6] = { - 0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12 , 0x927c}; /* 200ms-1200ms */ - -/* End Rate adaptive parameters */ - -static void odm_SetTxRPTTiming_8188E( - struct odm_dm_struct *dm_odm, - struct odm_ra_info *pRaInfo, - u8 extend +static void +odm_SetTxRPTTiming_8188E( + IN PDM_ODM_T pDM_Odm, + IN PODM_RA_INFO_T pRaInfo, + IN u1Byte extend ) { - u8 idx = 0; + u1Byte idx = 0; - for (idx = 0; idx < 5; idx++) - if (DynamicTxRPTTiming[idx] == pRaInfo->RptTime) + for(idx=0; idx<5; idx++) + if(DynamicTxRPTTiming[idx] == pRaInfo->RptTime) break; - if (extend == 0) { /* back to default timing */ - idx = 0; /* 200ms */ - } else if (extend == 1) {/* increase the timing */ - idx += 1; - if (idx > 5) - idx = 5; - } else if (extend == 2) {/* decrease the timing */ - if (idx != 0) - idx -= 1; + if (extend==0) // back to default timing + idx=0; //200ms + else if (extend==1) {// increase the timing + idx+=1; + if (idx>5) + idx=5; } - pRaInfo->RptTime = DynamicTxRPTTiming[idx]; - - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pRaInfo->RptTime = 0x%x\n", pRaInfo->RptTime)); + else if (extend==2) {// decrease the timing + if(idx!=0) + idx-=1; + } + pRaInfo->RptTime=DynamicTxRPTTiming[idx]; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pRaInfo->RptTime=0x%x\n", pRaInfo->RptTime)); } -static int odm_RateDown_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo) +static int +odm_RateDown_8188E( + IN PDM_ODM_T pDM_Odm, + IN PODM_RA_INFO_T pRaInfo + ) { - u8 RateID, LowestRate, HighestRate; - u8 i; + u1Byte RateID, LowestRate, HighestRate; + u1Byte i; - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDown_8188E()\n")); - if (NULL == pRaInfo) { - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateDown_8188E(): pRaInfo is NULL\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDown_8188E()\n")); + if(NULL == pRaInfo) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateDown_8188E(): pRaInfo is NULL\n")); return -1; } RateID = pRaInfo->PreRate; LowestRate = pRaInfo->LowestRate; HighestRate = pRaInfo->HighestRate; - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - (" RateID =%d LowestRate =%d HighestRate =%d RateSGI =%d\n", - RateID, LowestRate, HighestRate, pRaInfo->RateSGI)); - if (RateID > HighestRate) { - RateID = HighestRate; - } else if (pRaInfo->RateSGI) { - pRaInfo->RateSGI = 0; - } else if (RateID > LowestRate) { - if (RateID > 0) { - for (i = RateID-1; i > LowestRate; i--) { - if (pRaInfo->RAUseRate & BIT(i)) { - RateID = i; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, + (" RateID=%d LowestRate=%d HighestRate=%d RateSGI=%d\n", + RateID, LowestRate, HighestRate, pRaInfo->RateSGI)); + if (RateID > HighestRate) + { + RateID=HighestRate; + } + else if(pRaInfo->RateSGI) + { + pRaInfo->RateSGI=0; + } + else if (RateID > LowestRate) + { + if (RateID > 0) + { + for (i=RateID-1; i>LowestRate;i--) + { + if (pRaInfo->RAUseRate & BIT(i)) + { + RateID=i; goto RateDownFinish; + } } } - } else if (RateID <= LowestRate) { + } + else if (RateID <= LowestRate) + { RateID = LowestRate; } RateDownFinish: - if (pRaInfo->RAWaitingCounter == 1) { - pRaInfo->RAWaitingCounter += 1; - pRaInfo->RAPendingCounter += 1; - } else if (pRaInfo->RAWaitingCounter == 0) { - ; - } else { - pRaInfo->RAWaitingCounter = 0; - pRaInfo->RAPendingCounter = 0; + if (pRaInfo->RAWaitingCounter==1){ + pRaInfo->RAWaitingCounter+=1; + pRaInfo->RAPendingCounter+=1; + } + else if(pRaInfo->RAWaitingCounter==0){ + } + else{ + pRaInfo->RAWaitingCounter=0; + pRaInfo->RAPendingCounter=0; } - if (pRaInfo->RAPendingCounter >= 4) - pRaInfo->RAPendingCounter = 4; - - pRaInfo->DecisionRate = RateID; - odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 2); - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down, RPT Timing default\n")); - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d", pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter)); - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down to RateID %d RateSGI %d\n", RateID, pRaInfo->RateSGI)); - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<===== odm_RateDown_8188E()\n")); + if(pRaInfo->RAPendingCounter>=4) + pRaInfo->RAPendingCounter=4; + + pRaInfo->DecisionRate=RateID; + odm_SetTxRPTTiming_8188E(pDM_Odm,pRaInfo, 2); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down, RPT Timing default\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d",pRaInfo->RAWaitingCounter,pRaInfo->RAPendingCounter)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down to RateID %d RateSGI %d\n", RateID, pRaInfo->RateSGI)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateDown_8188E() \n")); return 0; } -static int odm_RateUp_8188E( - struct odm_dm_struct *dm_odm, - struct odm_ra_info *pRaInfo +static int +odm_RateUp_8188E( + IN PDM_ODM_T pDM_Odm, + IN PODM_RA_INFO_T pRaInfo ) { - u8 RateID, HighestRate; - u8 i; + u1Byte RateID, HighestRate; + u1Byte i; - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateUp_8188E()\n")); - if (NULL == pRaInfo) { - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E(): pRaInfo is NULL\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateUp_8188E() \n")); + if(NULL == pRaInfo) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E(): pRaInfo is NULL\n")); return -1; } RateID = pRaInfo->PreRate; HighestRate = pRaInfo->HighestRate; - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - (" RateID =%d HighestRate =%d\n", - RateID, HighestRate)); - if (pRaInfo->RAWaitingCounter == 1) { - pRaInfo->RAWaitingCounter = 0; - pRaInfo->RAPendingCounter = 0; - } else if (pRaInfo->RAWaitingCounter > 1) { - pRaInfo->PreRssiStaRA = pRaInfo->RssiStaRA; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, + (" RateID=%d HighestRate=%d\n", + RateID, HighestRate)); + if (pRaInfo->RAWaitingCounter==1){ + pRaInfo->RAWaitingCounter=0; + pRaInfo->RAPendingCounter=0; + } + else if (pRaInfo->RAWaitingCounter>1){ + pRaInfo->PreRssiStaRA=pRaInfo->RssiStaRA; goto RateUpfinish; } - odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 0); - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E():Decrease RPT Timing\n")); - - if (RateID < HighestRate) { - for (i = RateID+1; i <= HighestRate; i++) { - if (pRaInfo->RAUseRate & BIT(i)) { - RateID = i; + odm_SetTxRPTTiming_8188E(pDM_Odm,pRaInfo, 0); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E():Decrease RPT Timing\n")); + + if (RateID < HighestRate) + { + for (i=RateID+1; i<=HighestRate; i++) + { + if (pRaInfo->RAUseRate & BIT(i)) + { + RateID=i; goto RateUpfinish; } } - } else if (RateID == HighestRate) { + } + else if(RateID == HighestRate) + { if (pRaInfo->SGIEnable && (pRaInfo->RateSGI != 1)) pRaInfo->RateSGI = 1; - else if ((pRaInfo->SGIEnable) != 1) + else if((pRaInfo->SGIEnable) !=1 ) pRaInfo->RateSGI = 0; - } else { + } + else //if((sta_info_ra->Decision_rate) > (sta_info_ra->Highest_rate)) + { RateID = HighestRate; + } RateUpfinish: - if (pRaInfo->RAWaitingCounter == (4+PendingForRateUpFail[pRaInfo->RAPendingCounter])) - pRaInfo->RAWaitingCounter = 0; + //if(pRaInfo->RAWaitingCounter==10) + if(pRaInfo->RAWaitingCounter==(4+PendingForRateUpFail[pRaInfo->RAPendingCounter])) + pRaInfo->RAWaitingCounter=0; else pRaInfo->RAWaitingCounter++; - pRaInfo->DecisionRate = RateID; - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate up to RateID %d\n", RateID)); - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d", pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter)); - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<===== odm_RateUp_8188E()\n")); + pRaInfo->DecisionRate=RateID; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate up to RateID %d\n", RateID)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d",pRaInfo->RAWaitingCounter,pRaInfo->RAPendingCounter)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateUp_8188E() \n")); return 0; } -static void odm_ResetRaCounter_8188E(struct odm_ra_info *pRaInfo) -{ - u8 RateID; - - RateID = pRaInfo->DecisionRate; - pRaInfo->NscUp = (N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1; - pRaInfo->NscDown = (N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1; +static void odm_ResetRaCounter_8188E( IN PODM_RA_INFO_T pRaInfo){ + u1Byte RateID; + RateID=pRaInfo->DecisionRate; + pRaInfo->NscUp=(N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1; + pRaInfo->NscDown=(N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1; } -static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm, - struct odm_ra_info *pRaInfo +static void +odm_RateDecision_8188E( + IN PDM_ODM_T pDM_Odm, + IN PODM_RA_INFO_T pRaInfo ) { - u8 RateID = 0, RtyPtID = 0, PenaltyID1 = 0, PenaltyID2 = 0; - /* u32 pool_retry; */ - static u8 DynamicTxRPTTimingCounter; - - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDecision_8188E()\n")); - - if (pRaInfo->Active && (pRaInfo->TOTAL > 0)) { /* STA used and data packet exits */ - if ((pRaInfo->RssiStaRA < (pRaInfo->PreRssiStaRA - 3)) || - (pRaInfo->RssiStaRA > (pRaInfo->PreRssiStaRA + 3))) { - pRaInfo->RAWaitingCounter = 0; - pRaInfo->RAPendingCounter = 0; + u1Byte RateID = 0, RtyPtID = 0, PenaltyID1 = 0, PenaltyID2 = 0; + //u4Byte pool_retry; + static u1Byte DynamicTxRPTTimingCounter=0; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDecision_8188E() \n")); + + if (pRaInfo->Active && (pRaInfo->TOTAL > 0)) // STA used and data packet exits + { + if ( (pRaInfo->RssiStaRA<(pRaInfo->PreRssiStaRA-3))|| (pRaInfo->RssiStaRA>(pRaInfo->PreRssiStaRA+3))){ + pRaInfo->RAWaitingCounter=0; + pRaInfo->RAPendingCounter=0; } - /* Start RA decision */ + // Start RA decision if (pRaInfo->PreRate > pRaInfo->HighestRate) RateID = pRaInfo->HighestRate; - else + else RateID = pRaInfo->PreRate; if (pRaInfo->RssiStaRA > RSSI_THRESHOLD[RateID]) - RtyPtID = 0; + RtyPtID=0; else - RtyPtID = 1; - PenaltyID1 = RETRY_PENALTY_IDX[RtyPtID][RateID]; /* TODO by page */ - - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - (" NscDown init is %d\n", pRaInfo->NscDown)); + RtyPtID=1; + PenaltyID1 = RETRY_PENALTY_IDX[RtyPtID][RateID]; //TODO by page + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, + (" NscDown init is %d\n", pRaInfo->NscDown)); + //pool_retry=pRaInfo->RTY[2]+pRaInfo->RTY[3]+pRaInfo->RTY[4]+pRaInfo->DROP; pRaInfo->NscDown += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID1][0]; pRaInfo->NscDown += pRaInfo->RTY[1] * RETRY_PENALTY[PenaltyID1][1]; pRaInfo->NscDown += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID1][2]; pRaInfo->NscDown += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID1][3]; pRaInfo->NscDown += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID1][4]; - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - (" NscDown is %d, total*penalty[5] is %d\n", - pRaInfo->NscDown, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5]))); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, + (" NscDown is %d, total*penalty[5] is %d\n", + pRaInfo->NscDown, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5]))); if (pRaInfo->NscDown > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5])) pRaInfo->NscDown -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5]; else - pRaInfo->NscDown = 0; - - /* rate up */ + pRaInfo->NscDown=0; + + // rate up PenaltyID2 = RETRY_PENALTY_UP_IDX[RateID]; - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - (" NscUp init is %d\n", pRaInfo->NscUp)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, + (" NscUp init is %d\n", pRaInfo->NscUp)); pRaInfo->NscUp += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID2][0]; pRaInfo->NscUp += pRaInfo->RTY[1] * RETRY_PENALTY[PenaltyID2][1]; pRaInfo->NscUp += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID2][2]; pRaInfo->NscUp += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID2][3]; pRaInfo->NscUp += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID2][4]; - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - ("NscUp is %d, total*up[5] is %d\n", - pRaInfo->NscUp, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5]))); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, + ("NscUp is %d, total*up[5] is %d\n", + pRaInfo->NscUp, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5]))); if (pRaInfo->NscUp > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5])) pRaInfo->NscUp -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5]; else pRaInfo->NscUp = 0; - - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE|ODM_COMP_INIT, ODM_DBG_LOUD, - (" RssiStaRa = %d RtyPtID =%d PenaltyID1 = 0x%x PenaltyID2 = 0x%x RateID =%d NscDown =%d NscUp =%d SGI =%d\n", - pRaInfo->RssiStaRA, RtyPtID, PenaltyID1, PenaltyID2, RateID, pRaInfo->NscDown, pRaInfo->NscUp, pRaInfo->RateSGI)); - if ((pRaInfo->NscDown < N_THRESHOLD_LOW[RateID]) || - (pRaInfo->DROP > DROPING_NECESSARY[RateID])) - odm_RateDown_8188E(dm_odm, pRaInfo); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE|ODM_COMP_INIT, ODM_DBG_LOUD, + (" RssiStaRa= %d RtyPtID=%d PenaltyID1=0x%x PenaltyID2=0x%x RateID=%d NscDown=%d NscUp=%d SGI=%d\n", + pRaInfo->RssiStaRA,RtyPtID, PenaltyID1,PenaltyID2, RateID, pRaInfo->NscDown, pRaInfo->NscUp, pRaInfo->RateSGI)); + if ((pRaInfo->NscDown < N_THRESHOLD_LOW[RateID]) ||(pRaInfo->DROP>DROPING_NECESSARY[RateID])) + odm_RateDown_8188E(pDM_Odm,pRaInfo); + //else if ((pRaInfo->NscUp > N_THRESHOLD_HIGH[RateID])&&(pool_retryNscUp > N_THRESHOLD_HIGH[RateID]) - odm_RateUp_8188E(dm_odm, pRaInfo); + odm_RateUp_8188E(pDM_Odm,pRaInfo); - if (pRaInfo->DecisionRate > pRaInfo->HighestRate) + if(pRaInfo->DecisionRate > pRaInfo->HighestRate) pRaInfo->DecisionRate = pRaInfo->HighestRate; - - if ((pRaInfo->DecisionRate) == (pRaInfo->PreRate)) - DynamicTxRPTTimingCounter += 1; + + if ((pRaInfo->DecisionRate)==(pRaInfo->PreRate)) + DynamicTxRPTTimingCounter+=1; else - DynamicTxRPTTimingCounter = 0; + DynamicTxRPTTimingCounter=0; - if (DynamicTxRPTTimingCounter >= 4) { - odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 1); - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, - ODM_DBG_LOUD, ("<===== Rate don't change 4 times, Extend RPT Timing\n")); - DynamicTxRPTTimingCounter = 0; + if (DynamicTxRPTTimingCounter>=4) { + odm_SetTxRPTTiming_8188E(pDM_Odm,pRaInfo, 1); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("<=====Rate don't change 4 times, Extend RPT Timing\n")); + DynamicTxRPTTimingCounter=0; } - pRaInfo->PreRate = pRaInfo->DecisionRate; /* YJ, add, 120120 */ + pRaInfo->PreRate = pRaInfo->DecisionRate; //YJ,add,120120 - odm_ResetRaCounter_8188E(pRaInfo); + odm_ResetRaCounter_8188E( pRaInfo); } - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<===== odm_RateDecision_8188E()\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateDecision_8188E() \n")); } -static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo) -{ /* Wilson 2011/10/26 */ - u32 MaskFromReg; - s8 i; +static int +odm_ARFBRefresh_8188E( + IN PDM_ODM_T pDM_Odm, + IN PODM_RA_INFO_T pRaInfo + ) +{ // Wilson 2011/10/26 + u4Byte MaskFromReg; + s1Byte i; - switch (pRaInfo->RateID) { - case RATR_INX_WIRELESS_NGB: - pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff015; - break; - case RATR_INX_WIRELESS_NG: - pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff010; - break; - case RATR_INX_WIRELESS_NB: - pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff005; - break; - case RATR_INX_WIRELESS_N: - pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff000; - break; - case RATR_INX_WIRELESS_GB: - pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x00000ff5; - break; - case RATR_INX_WIRELESS_G: - pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x00000ff0; - break; - case RATR_INX_WIRELESS_B: - pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0000000d; - break; - case 12: - MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR0); - pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg; - break; - case 13: - MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR1); - pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg; - break; - case 14: - MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR2); - pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg; - break; - case 15: - MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR3); - pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg; - break; - default: - pRaInfo->RAUseRate = (pRaInfo->RateMask); - break; + switch(pRaInfo->RateID){ + case RATR_INX_WIRELESS_NGB: + pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0f8ff015; + break; + case RATR_INX_WIRELESS_NG: + pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0f8ff010; + break; + case RATR_INX_WIRELESS_NB: + pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0f8ff005; + break; + case RATR_INX_WIRELESS_N: + pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0f8ff000; + break; + case RATR_INX_WIRELESS_GB: + pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x00000ff5; + break; + case RATR_INX_WIRELESS_G: + pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x00000ff0; + break; + case RATR_INX_WIRELESS_B: + pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0000000d; + break; + case 12: + MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR0); + pRaInfo->RAUseRate=(pRaInfo->RateMask)&MaskFromReg; + break; + case 13: + MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR1); + pRaInfo->RAUseRate=(pRaInfo->RateMask)&MaskFromReg; + break; + case 14: + MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR2); + pRaInfo->RAUseRate=(pRaInfo->RateMask)&MaskFromReg; + break; + case 15: + MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR3); + pRaInfo->RAUseRate=(pRaInfo->RateMask)&MaskFromReg; + break; + + default: + pRaInfo->RAUseRate=(pRaInfo->RateMask); + break; } - /* Highest rate */ - if (pRaInfo->RAUseRate) { - for (i = RATESIZE; i >= 0; i--) { - if ((pRaInfo->RAUseRate)&BIT(i)) { - pRaInfo->HighestRate = i; + // Highest rate + if (pRaInfo->RAUseRate){ + for (i=RATESIZE;i>=0;i--) + { + if((pRaInfo->RAUseRate)&BIT(i)){ + pRaInfo->HighestRate=i; break; } } - } else { - pRaInfo->HighestRate = 0; } - /* Lowest rate */ - if (pRaInfo->RAUseRate) { - for (i = 0; i < RATESIZE; i++) { - if ((pRaInfo->RAUseRate) & BIT(i)) { - pRaInfo->LowestRate = i; + else{ + pRaInfo->HighestRate=0; + } + // Lowest rate + if (pRaInfo->RAUseRate){ + for (i=0;iRAUseRate)&BIT(i)) + { + pRaInfo->LowestRate=i; break; } } - } else { - pRaInfo->LowestRate = 0; } - if (pRaInfo->HighestRate > 0x13) - pRaInfo->PTModeSS = 3; - else if (pRaInfo->HighestRate > 0x0b) - pRaInfo->PTModeSS = 2; - else if (pRaInfo->HighestRate > 0x0b) - pRaInfo->PTModeSS = 1; + else{ + pRaInfo->LowestRate=0; + } + +#if POWER_TRAINING_ACTIVE == 1 + if (pRaInfo->HighestRate >0x13) + pRaInfo->PTModeSS=3; + else if(pRaInfo->HighestRate >0x0b) + pRaInfo->PTModeSS=2; + else if(pRaInfo->HighestRate >0x0b) + pRaInfo->PTModeSS=1; else - pRaInfo->PTModeSS = 0; - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("ODM_ARFBRefresh_8188E(): PTModeSS =%d\n", pRaInfo->PTModeSS)); + pRaInfo->PTModeSS=0; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, + ("ODM_ARFBRefresh_8188E(): PTModeSS=%d\n", pRaInfo->PTModeSS)); + +#endif - if (pRaInfo->DecisionRate > pRaInfo->HighestRate) + if(pRaInfo->DecisionRate > pRaInfo->HighestRate) pRaInfo->DecisionRate = pRaInfo->HighestRate; - - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("ODM_ARFBRefresh_8188E(): RateID =%d RateMask =%8.8x RAUseRate =%8.8x HighestRate =%d, DecisionRate =%d\n", - pRaInfo->RateID, pRaInfo->RateMask, pRaInfo->RAUseRate, pRaInfo->HighestRate, pRaInfo->DecisionRate)); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, + ("ODM_ARFBRefresh_8188E(): RateID=%d RateMask=%8.8x RAUseRate=%8.8x HighestRate=%d,DecisionRate=%d \n", + pRaInfo->RateID, pRaInfo->RateMask, pRaInfo->RAUseRate, pRaInfo->HighestRate,pRaInfo->DecisionRate)); return 0; } -static void odm_PTTryState_8188E(struct odm_ra_info *pRaInfo) +#if POWER_TRAINING_ACTIVE == 1 +static void +odm_PTTryState_8188E( + IN PODM_RA_INFO_T pRaInfo + ) { - pRaInfo->PTTryState = 0; - switch (pRaInfo->PTModeSS) { - case 3: - if (pRaInfo->DecisionRate >= 0x19) - pRaInfo->PTTryState = 1; - break; - case 2: - if (pRaInfo->DecisionRate >= 0x11) - pRaInfo->PTTryState = 1; - break; - case 1: - if (pRaInfo->DecisionRate >= 0x0a) - pRaInfo->PTTryState = 1; - break; - case 0: - if (pRaInfo->DecisionRate >= 0x03) - pRaInfo->PTTryState = 1; - break; - default: - pRaInfo->PTTryState = 0; - break; + pRaInfo->PTTryState=0; + switch (pRaInfo->PTModeSS) + { + case 3: + if (pRaInfo->DecisionRate>=0x19) + pRaInfo->PTTryState=1; + break; + case 2: + if (pRaInfo->DecisionRate>=0x11) + pRaInfo->PTTryState=1; + break; + case 1: + if (pRaInfo->DecisionRate>=0x0a) + pRaInfo->PTTryState=1; + break; + case 0: + if (pRaInfo->DecisionRate>=0x03) + pRaInfo->PTTryState=1; + break; + default: + pRaInfo->PTTryState=0; } - if (pRaInfo->RssiStaRA < 48) { - pRaInfo->PTStage = 0; - } else if (pRaInfo->PTTryState == 1) { - if ((pRaInfo->PTStopCount >= 10) || - (pRaInfo->PTPreRssi > pRaInfo->RssiStaRA + 5) || - (pRaInfo->PTPreRssi < pRaInfo->RssiStaRA - 5) || - (pRaInfo->DecisionRate != pRaInfo->PTPreRate)) { - if (pRaInfo->PTStage == 0) - pRaInfo->PTStage = 1; - else if (pRaInfo->PTStage == 1) - pRaInfo->PTStage = 3; + if (pRaInfo->RssiStaRA<48) + { + pRaInfo->PTStage=0; + } + else if (pRaInfo->PTTryState==1) + { + if ((pRaInfo->PTStopCount>=10)||(pRaInfo->PTPreRssi>pRaInfo->RssiStaRA+5) + ||(pRaInfo->PTPreRssiRssiStaRA-5)||(pRaInfo->DecisionRate!=pRaInfo->PTPreRate)) + { + if (pRaInfo->PTStage==0) + pRaInfo->PTStage=1; + else if(pRaInfo->PTStage==1) + pRaInfo->PTStage=3; else - pRaInfo->PTStage = 5; + pRaInfo->PTStage=5; - pRaInfo->PTPreRssi = pRaInfo->RssiStaRA; - pRaInfo->PTStopCount = 0; - } else { - pRaInfo->RAstage = 0; + pRaInfo->PTPreRssi=pRaInfo->RssiStaRA; + pRaInfo->PTStopCount=0; + + } + else{ + pRaInfo->RAstage=0; pRaInfo->PTStopCount++; } - } else { - pRaInfo->PTStage = 0; - pRaInfo->RAstage = 0; } - pRaInfo->PTPreRate = pRaInfo->DecisionRate; + else{ + pRaInfo->PTStage=0; + pRaInfo->RAstage=0; + } + pRaInfo->PTPreRate=pRaInfo->DecisionRate; } -static void odm_PTDecision_8188E(struct odm_ra_info *pRaInfo) +static void +odm_PTDecision_8188E( + IN PODM_RA_INFO_T pRaInfo + ) { - u8 j; - u8 temp_stage; - u32 numsc; - u32 num_total; - u8 stage_id; - + u1Byte stage_BUF; + u1Byte j; + u1Byte temp_stage; + u4Byte numsc; + u4Byte num_total; + u1Byte stage_id; + + stage_BUF=pRaInfo->PTStage; numsc = 0; - num_total = pRaInfo->TOTAL * PT_PENALTY[5]; - for (j = 0; j <= 4; j++) { + num_total= pRaInfo->TOTAL* PT_PENALTY[5]; + for(j=0;j<=4;j++) + { numsc += pRaInfo->RTY[j] * PT_PENALTY[j]; - if (numsc > num_total) + if(numsc>num_total) break; } - j = j >> 1; - temp_stage = (pRaInfo->PTStage + 1) >> 1; - if (temp_stage > j) - stage_id = temp_stage-j; + j=j>>1; + temp_stage= (pRaInfo->PTStage +1)>>1; + if (temp_stage>j) + stage_id=temp_stage-j; else - stage_id = 0; + stage_id=0; + + pRaInfo->PTSmoothFactor=(pRaInfo->PTSmoothFactor>>1) + (pRaInfo->PTSmoothFactor>>2) + stage_id*16+2; + if (pRaInfo->PTSmoothFactor>192) + pRaInfo->PTSmoothFactor=192; + stage_id =pRaInfo->PTSmoothFactor>>6; + temp_stage=stage_id*2; + if (temp_stage!=0) + temp_stage-=1; + if (pRaInfo->DROP>3) + temp_stage=0; + pRaInfo->PTStage=temp_stage; - pRaInfo->PTSmoothFactor = (pRaInfo->PTSmoothFactor>>1) + (pRaInfo->PTSmoothFactor>>2) + stage_id*16+2; - if (pRaInfo->PTSmoothFactor > 192) - pRaInfo->PTSmoothFactor = 192; - stage_id = pRaInfo->PTSmoothFactor >> 6; - temp_stage = stage_id*2; - if (temp_stage != 0) - temp_stage -= 1; - if (pRaInfo->DROP > 3) - temp_stage = 0; - pRaInfo->PTStage = temp_stage; } +#endif -static void +static VOID odm_RATxRPTTimerSetting( - struct odm_dm_struct *dm_odm, - u16 minRptTime + IN PDM_ODM_T pDM_Odm, + IN u2Byte minRptTime ) { - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, (" =====>odm_RATxRPTTimerSetting()\n")); - - if (dm_odm->CurrminRptTime != minRptTime) { - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - (" CurrminRptTime = 0x%04x minRptTime = 0x%04x\n", dm_odm->CurrminRptTime, minRptTime)); - rtw_rpt_timer_cfg_cmd(dm_odm->Adapter, minRptTime); - dm_odm->CurrminRptTime = minRptTime; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,(" =====>odm_RATxRPTTimerSetting()\n")); + + + if(pDM_Odm->CurrminRptTime != minRptTime){ + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, + (" CurrminRptTime =0x%04x minRptTime=0x%04x\n", pDM_Odm->CurrminRptTime, minRptTime)); + #if(DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_AP)) + ODM_RA_Set_TxRPT_Time(pDM_Odm,minRptTime); + #else + rtw_rpt_timer_cfg_cmd(pDM_Odm->Adapter,minRptTime); + #endif + pDM_Odm->CurrminRptTime = minRptTime; } - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, (" <===== odm_RATxRPTTimerSetting()\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,(" <=====odm_RATxRPTTimerSetting()\n")); +} + + +VOID +ODM_RASupport_Init( + IN PDM_ODM_T pDM_Odm + ) +{ + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RASupport_Init()\n")); + + // 2012/02/14 MH Be noticed, the init must be after IC type is recognized!!!!! + if (pDM_Odm->SupportICType == ODM_RTL8188E) + pDM_Odm->RaSupport88E = TRUE; + } -void -ODM_RASupport_Init( - struct odm_dm_struct *dm_odm + + +int +ODM_RAInfo_Init( + IN PDM_ODM_T pDM_Odm, + IN u1Byte MacID ) { - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RASupport_Init()\n")); - - /* 2012/02/14 MH Be noticed, the init must be after IC type is recognized!!!!! */ - if (dm_odm->SupportICType == ODM_RTL8188E) - dm_odm->RaSupport88E = true; -} - -int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid) -{ - struct odm_ra_info *pRaInfo = &dm_odm->RAInfo[macid]; - u8 WirelessMode = 0xFF; /* invalid value */ - u8 max_rate_idx = 0x13; /* MCS7 */ - if (dm_odm->pWirelessMode != NULL) - WirelessMode = *(dm_odm->pWirelessMode); - - if (WirelessMode != 0xFF) { - if (WirelessMode & ODM_WM_N24G) - max_rate_idx = 0x13; - else if (WirelessMode & ODM_WM_G) - max_rate_idx = 0x0b; - else if (WirelessMode & ODM_WM_B) - max_rate_idx = 0x03; + PODM_RA_INFO_T pRaInfo = &pDM_Odm->RAInfo[MacID]; + #if 1 + u1Byte WirelessMode=0xFF; //invalid value + u1Byte max_rate_idx = 0x13; //MCS7 + if(pDM_Odm->pWirelessMode!=NULL){ + WirelessMode=*(pDM_Odm->pWirelessMode); } - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("ODM_RAInfo_Init(): WirelessMode:0x%08x , max_raid_idx:0x%02x\n", - WirelessMode, max_rate_idx)); - + if(WirelessMode != 0xFF ){ + if(WirelessMode & ODM_WM_N24G) + max_rate_idx = 0x13; + else if(WirelessMode & ODM_WM_G) + max_rate_idx = 0x0b; + else if(WirelessMode & ODM_WM_B) + max_rate_idx = 0x03; + } + + //printk("%s ==>WirelessMode:0x%08x ,max_raid_idx:0x%02x\n ",__FUNCTION__,WirelessMode,max_rate_idx); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, + ("ODM_RAInfo_Init(): WirelessMode:0x%08x ,max_raid_idx:0x%02x \n", + WirelessMode,max_rate_idx)); + pRaInfo->DecisionRate = max_rate_idx; pRaInfo->PreRate = max_rate_idx; - pRaInfo->HighestRate = max_rate_idx; - pRaInfo->LowestRate = 0; - pRaInfo->RateID = 0; - pRaInfo->RateMask = 0xffffffff; - pRaInfo->RssiStaRA = 0; - pRaInfo->PreRssiStaRA = 0; - pRaInfo->SGIEnable = 0; - pRaInfo->RAUseRate = 0xffffffff; - pRaInfo->NscDown = (N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2; - pRaInfo->NscUp = (N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2; - pRaInfo->RateSGI = 0; - pRaInfo->Active = 1; /* Active is not used at present. by page, 110819 */ + pRaInfo->HighestRate=max_rate_idx; + #else + pRaInfo->DecisionRate = 0x13; + pRaInfo->PreRate = 0x13; + pRaInfo->HighestRate= 0x13; + #endif + pRaInfo->LowestRate=0; + pRaInfo->RateID=0; + pRaInfo->RateMask=0xffffffff; + pRaInfo->RssiStaRA=0; + pRaInfo->PreRssiStaRA=0; + pRaInfo->SGIEnable=0; + pRaInfo->RAUseRate=0xffffffff; + pRaInfo->NscDown=(N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2; + pRaInfo->NscUp=(N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2; + pRaInfo->RateSGI=0; + pRaInfo->Active=1; //Active is not used at present. by page, 110819 pRaInfo->RptTime = 0x927c; - pRaInfo->DROP = 0; - pRaInfo->RTY[0] = 0; - pRaInfo->RTY[1] = 0; - pRaInfo->RTY[2] = 0; - pRaInfo->RTY[3] = 0; - pRaInfo->RTY[4] = 0; - pRaInfo->TOTAL = 0; - pRaInfo->RAWaitingCounter = 0; - pRaInfo->RAPendingCounter = 0; - pRaInfo->PTActive = 1; /* Active when this STA is use */ - pRaInfo->PTTryState = 0; - pRaInfo->PTStage = 5; /* Need to fill into HW_PWR_STATUS */ - pRaInfo->PTSmoothFactor = 192; - pRaInfo->PTStopCount = 0; - pRaInfo->PTPreRate = 0; - pRaInfo->PTPreRssi = 0; - pRaInfo->PTModeSS = 0; - pRaInfo->RAstage = 0; - return 0; + pRaInfo->DROP=0; + pRaInfo->DROP1=0; + pRaInfo->RTY[0]=0; + pRaInfo->RTY[1]=0; + pRaInfo->RTY[2]=0; + pRaInfo->RTY[3]=0; + pRaInfo->RTY[4]=0; + pRaInfo->TOTAL=0; + pRaInfo->RAWaitingCounter=0; + pRaInfo->RAPendingCounter=0; +#if POWER_TRAINING_ACTIVE == 1 + pRaInfo->PTActive=1; // Active when this STA is use + pRaInfo->PTTryState=0; + pRaInfo->PTStage=5; // Need to fill into HW_PWR_STATUS + pRaInfo->PTSmoothFactor=192; + pRaInfo->PTStopCount=0; + pRaInfo->PTPreRate=0; + pRaInfo->PTPreRssi=0; + pRaInfo->PTModeSS=0; + pRaInfo->RAstage=0; +#endif + return 0; } -int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm) +int +ODM_RAInfo_Init_all( + IN PDM_ODM_T pDM_Odm + ) { - u8 macid = 0; + u1Byte MacID = 0; - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>\n")); - dm_odm->CurrminRptTime = 0; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>\n")); + pDM_Odm->CurrminRptTime = 0; - for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) - ODM_RAInfo_Init(dm_odm, macid); + for(MacID=0; MacID= ASSOCIATE_ENTRY_NUM)) + if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM)) return 0; - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - ("macid =%d SGI =%d\n", macid, dm_odm->RAInfo[macid].RateSGI)); - return dm_odm->RAInfo[macid].RateSGI; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, + ("MacID=%d SGI=%d\n", MacID, pDM_Odm->RAInfo[MacID].RateSGI)); + return pDM_Odm->RAInfo[MacID].RateSGI; } -u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 macid) +u1Byte +ODM_RA_GetDecisionRate_8188E( + IN PDM_ODM_T pDM_Odm, + IN u1Byte MacID + ) { - u8 DecisionRate = 0; + u1Byte DecisionRate = 0; - if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) + if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM)) return 0; - DecisionRate = (dm_odm->RAInfo[macid].DecisionRate); - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - (" macid =%d DecisionRate = 0x%x\n", macid, DecisionRate)); + DecisionRate = (pDM_Odm->RAInfo[MacID].DecisionRate); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, + (" MacID=%d DecisionRate=0x%x\n", MacID, DecisionRate)); return DecisionRate; } -u8 ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u8 macid) +u1Byte +ODM_RA_GetHwPwrStatus_8188E( + IN PDM_ODM_T pDM_Odm, + IN u1Byte MacID + ) { - u8 PTStage = 5; - - if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) + u1Byte PTStage = 5; + if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM)) return 0; - PTStage = (dm_odm->RAInfo[macid].PTStage); - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - ("macid =%d PTStage = 0x%x\n", macid, PTStage)); + PTStage = (pDM_Odm->RAInfo[MacID].PTStage); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, + ("MacID=%d PTStage=0x%x\n", MacID, PTStage)); return PTStage; } -void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 RateID, u32 RateMask, u8 SGIEnable) +VOID +ODM_RA_UpdateRateInfo_8188E( + IN PDM_ODM_T pDM_Odm, + IN u1Byte MacID, + IN u1Byte RateID, + IN u4Byte RateMask, + IN u1Byte SGIEnable + ) { - struct odm_ra_info *pRaInfo = NULL; + PODM_RA_INFO_T pRaInfo = NULL; - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("macid =%d RateID = 0x%x RateMask = 0x%x SGIEnable =%d\n", - macid, RateID, RateMask, SGIEnable)); - if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, + ("MacID=%d RateID=0x%x RateMask=0x%x SGIEnable=%d\n", + MacID, RateID, RateMask, SGIEnable)); + if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM)) return; - - pRaInfo = &(dm_odm->RAInfo[macid]); + + pRaInfo = &(pDM_Odm->RAInfo[MacID]); pRaInfo->RateID = RateID; pRaInfo->RateMask = RateMask; pRaInfo->SGIEnable = SGIEnable; - odm_ARFBRefresh_8188E(dm_odm, pRaInfo); + odm_ARFBRefresh_8188E(pDM_Odm, pRaInfo); } -void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rssi) +VOID +ODM_RA_SetRSSI_8188E( + IN PDM_ODM_T pDM_Odm, + IN u1Byte MacID, + IN u1Byte Rssi + ) { - struct odm_ra_info *pRaInfo = NULL; + PODM_RA_INFO_T pRaInfo = NULL; - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - (" macid =%d Rssi =%d\n", macid, Rssi)); - if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM)) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, + (" MacID=%d Rssi=%d\n", MacID, Rssi)); + if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM)) return; - pRaInfo = &(dm_odm->RAInfo[macid]); + pRaInfo = &(pDM_Odm->RAInfo[MacID]); pRaInfo->RssiStaRA = Rssi; } -void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u16 minRptTime) +VOID +ODM_RA_Set_TxRPT_Time( + IN PDM_ODM_T pDM_Odm, + IN u2Byte minRptTime + ) { - ODM_Write2Byte(dm_odm, REG_TX_RPT_TIME, minRptTime); +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP)) + if (minRptTime != 0xffff) +#endif + ODM_Write2Byte(pDM_Odm, REG_TX_RPT_TIME, minRptTime); } -void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16 TxRPT_Len, u32 macid_entry0, u32 macid_entry1) + +VOID +ODM_RA_TxRPT2Handle_8188E( + IN PDM_ODM_T pDM_Odm, + IN pu1Byte TxRPT_Buf, + IN u2Byte TxRPT_Len, + IN u4Byte MacIDValidEntry0, + IN u4Byte MacIDValidEntry1 + ) { - struct odm_ra_info *pRAInfo = NULL; - u8 MacId = 0; - u8 *pBuffer = NULL; - u32 valid = 0, ItemNum = 0; - u16 minRptTime = 0x927c; - - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("=====>ODM_RA_TxRPT2Handle_8188E(): valid0 =%d valid1 =%d BufferLength =%d\n", - macid_entry0, macid_entry1, TxRPT_Len)); + PODM_RA_INFO_T pRAInfo = NULL; + u1Byte MacId = 0; + pu1Byte pBuffer = NULL; + u4Byte valid = 0, ItemNum = 0; + u2Byte minRptTime = 0x927c; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RA_TxRPT2Handle_8188E(): valid0=%d valid1=%d BufferLength=%d\n", + MacIDValidEntry0, MacIDValidEntry1, TxRPT_Len)); + ItemNum = TxRPT_Len >> 3; pBuffer = TxRPT_Buf; - do { - if (MacId >= ASSOCIATE_ENTRY_NUM) + do + { + if(MacId >= ASSOCIATE_ENTRY_NUM) valid = 0; - else if (MacId >= 32) - valid = (1 << (MacId - 32)) & macid_entry1; + else if(MacId >= 32) + valid = (1<<(MacId-32)) & MacIDValidEntry1; else - valid = (1 << MacId) & macid_entry0; + valid = (1<RAInfo[MacId]); - if (valid) { - pRAInfo->RTY[0] = (u16)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer); - pRAInfo->RTY[1] = (u16)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer); - pRAInfo->RTY[2] = (u16)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer); - pRAInfo->RTY[3] = (u16)GET_TX_REPORT_TYPE1_RERTY_3(pBuffer); - pRAInfo->RTY[4] = (u16)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer); - pRAInfo->DROP = (u16)GET_TX_REPORT_TYPE1_DROP_0(pBuffer); - pRAInfo->TOTAL = pRAInfo->RTY[0] + pRAInfo->RTY[1] + - pRAInfo->RTY[2] + pRAInfo->RTY[3] + - pRAInfo->RTY[4] + pRAInfo->DROP; - if (pRAInfo->TOTAL != 0) { - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("macid =%d Total =%d R0 =%d R1 =%d R2 =%d R3 =%d R4 =%d D0 =%d valid0 =%x valid1 =%x\n", - MacId, pRAInfo->TOTAL, - pRAInfo->RTY[0], pRAInfo->RTY[1], - pRAInfo->RTY[2], pRAInfo->RTY[3], - pRAInfo->RTY[4], pRAInfo->DROP, - macid_entry0 , macid_entry1)); - if (pRAInfo->PTActive) { - if (pRAInfo->RAstage < 5) - odm_RateDecision_8188E(dm_odm, pRAInfo); - else if (pRAInfo->RAstage == 5) /* Power training try state */ + pRAInfo = &(pDM_Odm->RAInfo[MacId]); + if(valid) + { + +#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) + pRAInfo->RTY[0] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer); + pRAInfo->RTY[1] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer); + pRAInfo->RTY[2] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer); + pRAInfo->RTY[3] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_3(pBuffer); + pRAInfo->RTY[4] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer); + pRAInfo->DROP = (u2Byte)GET_TX_REPORT_TYPE1_DROP_0(pBuffer); + pRAInfo->DROP1= (u2Byte)GET_TX_REPORT_TYPE1_DROP_1(pBuffer); +#else + pRAInfo->RTY[0] = (unsigned short)(pBuffer[1] << 8 | pBuffer[0]); + pRAInfo->RTY[1] = pBuffer[2]; + pRAInfo->RTY[2] = pBuffer[3]; + pRAInfo->RTY[3] = pBuffer[4]; + pRAInfo->RTY[4] = pBuffer[5]; + pRAInfo->DROP = pBuffer[6]; + pRAInfo->DROP1= pBuffer[7]; +#endif + pRAInfo->TOTAL = pRAInfo->RTY[0] + \ + pRAInfo->RTY[1] + \ + pRAInfo->RTY[2] + \ + pRAInfo->RTY[3] + \ + pRAInfo->RTY[4] + \ + pRAInfo->DROP; + if(pRAInfo->TOTAL != 0) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, + ("macid=%d Total=%d R0=%d R1=%d R2=%d R3=%d R4=%d D0=%d valid0=%x valid1=%x\n", + MacId, + pRAInfo->TOTAL, + pRAInfo->RTY[0], + pRAInfo->RTY[1], + pRAInfo->RTY[2], + pRAInfo->RTY[3], + pRAInfo->RTY[4], + pRAInfo->DROP, + MacIDValidEntry0 , + MacIDValidEntry1)); +#if POWER_TRAINING_ACTIVE == 1 + if (pRAInfo->PTActive){ + if(pRAInfo->RAstage<5){ + odm_RateDecision_8188E(pDM_Odm,pRAInfo); + } + else if(pRAInfo->RAstage==5){ // Power training try state odm_PTTryState_8188E(pRAInfo); - else /* RAstage == 6 */ + } + else {// RAstage==6 odm_PTDecision_8188E(pRAInfo); + } - /* Stage_RA counter */ - if (pRAInfo->RAstage <= 5) + // Stage_RA counter + if (pRAInfo->RAstage<=5) pRAInfo->RAstage++; else - pRAInfo->RAstage = 0; - } else { - odm_RateDecision_8188E(dm_odm, pRAInfo); + pRAInfo->RAstage=0; } - ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, - ("macid =%d R0 =%d R1 =%d R2 =%d R3 =%d R4 =%d drop =%d valid0 =%x RateID =%d SGI =%d\n", - MacId, - pRAInfo->RTY[0], - pRAInfo->RTY[1], - pRAInfo->RTY[2], - pRAInfo->RTY[3], - pRAInfo->RTY[4], - pRAInfo->DROP, - macid_entry0, - pRAInfo->DecisionRate, - pRAInfo->RateSGI)); - } else { - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, (" TOTAL = 0!!!!\n")); + else{ + odm_RateDecision_8188E(pDM_Odm,pRAInfo); + } +#else + odm_RateDecision_8188E(pDM_Odm, pRAInfo); +#endif + +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + extern void RTL8188E_SetStationTxRateInfo(PDM_ODM_T, PODM_RA_INFO_T, int); + RTL8188E_SetStationTxRateInfo(pDM_Odm, pRAInfo, MacId); +#ifdef DETECT_STA_EXISTANCE + void RTL8188E_DetectSTAExistance(PDM_ODM_T pDM_Odm, PODM_RA_INFO_T pRAInfo, int MacID); + RTL8188E_DetectSTAExistance(pDM_Odm, pRAInfo, MacId); +#endif +#endif + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, + ("macid=%d R0=%d R1=%d R2=%d R3=%d R4=%d drop=%d valid0=%x RateID=%d SGI=%d\n", + MacId, + pRAInfo->RTY[0], + pRAInfo->RTY[1], + pRAInfo->RTY[2], + pRAInfo->RTY[3], + pRAInfo->RTY[4], + pRAInfo->DROP, + MacIDValidEntry0, + pRAInfo->DecisionRate, + pRAInfo->RateSGI)); } + else + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, (" TOTAL=0!!!!\n")); } - if (minRptTime > pRAInfo->RptTime) - minRptTime = pRAInfo->RptTime; + if(minRptTime > pRAInfo->RptTime) + minRptTime = pRAInfo->RptTime; pBuffer += TX_RPT2_ITEM_SIZE; MacId++; - } while (MacId < ItemNum); + }while(MacId < ItemNum); + + odm_RATxRPTTimerSetting(pDM_Odm,minRptTime); + - odm_RATxRPTTimerSetting(dm_odm, minRptTime); - - ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("<===== ODM_RA_TxRPT2Handle_8188E()\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("<===== ODM_RA_TxRPT2Handle_8188E()\n")); } + +#else + +static VOID +odm_RATxRPTTimerSetting( + IN PDM_ODM_T pDM_Odm, + IN u2Byte minRptTime +) +{ + return; +} + + +VOID +ODM_RASupport_Init( + IN PDM_ODM_T pDM_Odm + ) +{ + return; +} + +int +ODM_RAInfo_Init( + IN PDM_ODM_T pDM_Odm, + IN u1Byte MacID + ) +{ + return 0; +} + +int +ODM_RAInfo_Init_all( + IN PDM_ODM_T pDM_Odm + ) +{ + return 0; +} + +u1Byte +ODM_RA_GetShortGI_8188E( + IN PDM_ODM_T pDM_Odm, + IN u1Byte MacID + ) +{ + return 0; +} + +u1Byte +ODM_RA_GetDecisionRate_8188E( + IN PDM_ODM_T pDM_Odm, + IN u1Byte MacID + ) +{ + return 0; +} +u1Byte +ODM_RA_GetHwPwrStatus_8188E( + IN PDM_ODM_T pDM_Odm, + IN u1Byte MacID + ) +{ + return 0; +} + +VOID +ODM_RA_UpdateRateInfo_8188E( + IN PDM_ODM_T pDM_Odm, + IN u1Byte MacID, + IN u1Byte RateID, + IN u4Byte RateMask, + IN u1Byte SGIEnable + ) +{ + return; +} + +VOID +ODM_RA_SetRSSI_8188E( + IN PDM_ODM_T pDM_Odm, + IN u1Byte MacID, + IN u1Byte Rssi + ) +{ + return; +} + +VOID +ODM_RA_Set_TxRPT_Time( + IN PDM_ODM_T pDM_Odm, + IN u2Byte minRptTime + ) +{ + return; +} + +VOID +ODM_RA_TxRPT2Handle_8188E( + IN PDM_ODM_T pDM_Odm, + IN pu1Byte TxRPT_Buf, + IN u2Byte TxRPT_Len, + IN u4Byte MacIDValidEntry0, + IN u4Byte MacIDValidEntry1 + ) +{ + return; +} + + +#endif + diff --git a/hal/OUTSRC/rtl8188e/Hal8188ERateAdaptive.h b/hal/Hal8188ERateAdaptive.h similarity index 100% rename from hal/OUTSRC/rtl8188e/Hal8188ERateAdaptive.h rename to hal/Hal8188ERateAdaptive.h diff --git a/hal/OUTSRC/rtl8188e/Hal8188EReg.h b/hal/Hal8188EReg.h similarity index 100% rename from hal/OUTSRC/rtl8188e/Hal8188EReg.h rename to hal/Hal8188EReg.h diff --git a/hal/HalHWImg8188E_BB.c b/hal/HalHWImg8188E_BB.c old mode 100644 new mode 100755 index f06c14c..f6d559f --- a/hal/HalHWImg8188E_BB.c +++ b/hal/HalHWImg8188E_BB.c @@ -1,720 +1,1448 @@ -/****************************************************************************** -* -* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -* -* This program is free software; you can redistribute it and/or modify it -* under the terms of version 2 of the GNU General Public License as -* published by the Free Software Foundation. -* -* This program is distributed in the hope that it will be useful, but WITHOUT -* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -* more details. -* -* You should have received a copy of the GNU General Public License along with -* this program; if not, write to the Free Software Foundation, Inc., -* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -* -* -******************************************************************************/ - -#include "odm_precomp.h" - -#include - -#define read_next_pair(array, v1, v2, i) \ - do { \ - i += 2; \ - v1 = array[i]; \ - v2 = array[i+1]; \ - } while (0) - -static bool CheckCondition(const u32 condition, const u32 hex) -{ - u32 _board = (hex & 0x000000FF); - u32 _interface = (hex & 0x0000FF00) >> 8; - u32 _platform = (hex & 0x00FF0000) >> 16; - u32 cond = condition; - - if (condition == 0xCDCDCDCD) - return true; - - cond = condition & 0x000000FF; - if ((_board == cond) && cond != 0x00) - return false; - - cond = condition & 0x0000FF00; - cond = cond >> 8; - if ((_interface & cond) == 0 && cond != 0x07) - return false; - - cond = condition & 0x00FF0000; - cond = cond >> 16; - if ((_platform & cond) == 0 && cond != 0x0F) - return false; - return true; -} - -/****************************************************************************** -* AGC_TAB_1T.TXT -******************************************************************************/ - -static u32 array_agc_tab_1t_8188e[] = { - 0xC78, 0xFB000001, - 0xC78, 0xFB010001, - 0xC78, 0xFB020001, - 0xC78, 0xFB030001, - 0xC78, 0xFB040001, - 0xC78, 0xFB050001, - 0xC78, 0xFA060001, - 0xC78, 0xF9070001, - 0xC78, 0xF8080001, - 0xC78, 0xF7090001, - 0xC78, 0xF60A0001, - 0xC78, 0xF50B0001, - 0xC78, 0xF40C0001, - 0xC78, 0xF30D0001, - 0xC78, 0xF20E0001, - 0xC78, 0xF10F0001, - 0xC78, 0xF0100001, - 0xC78, 0xEF110001, - 0xC78, 0xEE120001, - 0xC78, 0xED130001, - 0xC78, 0xEC140001, - 0xC78, 0xEB150001, - 0xC78, 0xEA160001, - 0xC78, 0xE9170001, - 0xC78, 0xE8180001, - 0xC78, 0xE7190001, - 0xC78, 0xE61A0001, - 0xC78, 0xE51B0001, - 0xC78, 0xE41C0001, - 0xC78, 0xE31D0001, - 0xC78, 0xE21E0001, - 0xC78, 0xE11F0001, - 0xC78, 0x8A200001, - 0xC78, 0x89210001, - 0xC78, 0x88220001, - 0xC78, 0x87230001, - 0xC78, 0x86240001, - 0xC78, 0x85250001, - 0xC78, 0x84260001, - 0xC78, 0x83270001, - 0xC78, 0x82280001, - 0xC78, 0x6B290001, - 0xC78, 0x6A2A0001, - 0xC78, 0x692B0001, - 0xC78, 0x682C0001, - 0xC78, 0x672D0001, - 0xC78, 0x662E0001, - 0xC78, 0x652F0001, - 0xC78, 0x64300001, - 0xC78, 0x63310001, - 0xC78, 0x62320001, - 0xC78, 0x61330001, - 0xC78, 0x46340001, - 0xC78, 0x45350001, - 0xC78, 0x44360001, - 0xC78, 0x43370001, - 0xC78, 0x42380001, - 0xC78, 0x41390001, - 0xC78, 0x403A0001, - 0xC78, 0x403B0001, - 0xC78, 0x403C0001, - 0xC78, 0x403D0001, - 0xC78, 0x403E0001, - 0xC78, 0x403F0001, - 0xC78, 0xFB400001, - 0xC78, 0xFB410001, - 0xC78, 0xFB420001, - 0xC78, 0xFB430001, - 0xC78, 0xFB440001, - 0xC78, 0xFB450001, - 0xC78, 0xFB460001, - 0xC78, 0xFB470001, - 0xC78, 0xFB480001, - 0xC78, 0xFA490001, - 0xC78, 0xF94A0001, - 0xC78, 0xF84B0001, - 0xC78, 0xF74C0001, - 0xC78, 0xF64D0001, - 0xC78, 0xF54E0001, - 0xC78, 0xF44F0001, - 0xC78, 0xF3500001, - 0xC78, 0xF2510001, - 0xC78, 0xF1520001, - 0xC78, 0xF0530001, - 0xC78, 0xEF540001, - 0xC78, 0xEE550001, - 0xC78, 0xED560001, - 0xC78, 0xEC570001, - 0xC78, 0xEB580001, - 0xC78, 0xEA590001, - 0xC78, 0xE95A0001, - 0xC78, 0xE85B0001, - 0xC78, 0xE75C0001, - 0xC78, 0xE65D0001, - 0xC78, 0xE55E0001, - 0xC78, 0xE45F0001, - 0xC78, 0xE3600001, - 0xC78, 0xE2610001, - 0xC78, 0xC3620001, - 0xC78, 0xC2630001, - 0xC78, 0xC1640001, - 0xC78, 0x8B650001, - 0xC78, 0x8A660001, - 0xC78, 0x89670001, - 0xC78, 0x88680001, - 0xC78, 0x87690001, - 0xC78, 0x866A0001, - 0xC78, 0x856B0001, - 0xC78, 0x846C0001, - 0xC78, 0x676D0001, - 0xC78, 0x666E0001, - 0xC78, 0x656F0001, - 0xC78, 0x64700001, - 0xC78, 0x63710001, - 0xC78, 0x62720001, - 0xC78, 0x61730001, - 0xC78, 0x60740001, - 0xC78, 0x46750001, - 0xC78, 0x45760001, - 0xC78, 0x44770001, - 0xC78, 0x43780001, - 0xC78, 0x42790001, - 0xC78, 0x417A0001, - 0xC78, 0x407B0001, - 0xC78, 0x407C0001, - 0xC78, 0x407D0001, - 0xC78, 0x407E0001, - 0xC78, 0x407F0001, -}; - -enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm) -{ - u32 hex = 0; - u32 i = 0; - u8 platform = dm_odm->SupportPlatform; - u8 interfaceValue = dm_odm->SupportInterface; - u8 board = dm_odm->BoardType; - u32 arraylen = sizeof(array_agc_tab_1t_8188e)/sizeof(u32); - u32 *array = array_agc_tab_1t_8188e; - bool biol = false; - struct adapter *adapter = dm_odm->Adapter; - struct xmit_frame *pxmit_frame = NULL; - u8 bndy_cnt = 1; - enum HAL_STATUS rst = HAL_STATUS_SUCCESS; - - hex += board; - hex += interfaceValue << 8; - hex += platform << 16; - hex += 0xFF000000; - biol = rtw_IOL_applied(adapter); - - if (biol) { - pxmit_frame = rtw_IOL_accquire_xmit_frame(adapter); - if (pxmit_frame == NULL) { - pr_info("rtw_IOL_accquire_xmit_frame failed\n"); - return HAL_STATUS_FAILURE; - } - } - - for (i = 0; i < arraylen; i += 2) { - u32 v1 = array[i]; - u32 v2 = array[i+1]; - - /* This (offset, data) pair meets the condition. */ - if (v1 < 0xCDCDCDCD) { - if (biol) { - if (rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord); - } else { - odm_ConfigBB_AGC_8188E(dm_odm, v1, bMaskDWord, v2); - } - continue; - } else { - /* This line is the start line of branch. */ - if (!CheckCondition(array[i], hex)) { - /* Discard the following (offset, data) pairs. */ - read_next_pair(array, v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < arraylen - 2) - read_next_pair(array, v1, v2, i); - i -= 2; /* prevent from for-loop += 2 */ - } else { /* Configure matched pairs and skip to end of if-else. */ - read_next_pair(array, v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < arraylen - 2) { - if (biol) { - if (rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord); - } else { - odm_ConfigBB_AGC_8188E(dm_odm, v1, bMaskDWord, v2); - } - read_next_pair(array, v1, v2, i); - } - - while (v2 != 0xDEAD && i < arraylen - 2) - read_next_pair(array, v1, v2, i); - } - } - } - if (biol) { - if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) { - printk("~~~ %s IOL_exec_cmds Failed !!!\n", __func__); - rst = HAL_STATUS_FAILURE; - } - } - return rst; -} - -/****************************************************************************** -* PHY_REG_1T.TXT -******************************************************************************/ - -static u32 array_phy_reg_1t_8188e[] = { - 0x800, 0x80040000, - 0x804, 0x00000003, - 0x808, 0x0000FC00, - 0x80C, 0x0000000A, - 0x810, 0x10001331, - 0x814, 0x020C3D10, - 0x818, 0x02200385, - 0x81C, 0x00000000, - 0x820, 0x01000100, - 0x824, 0x00390204, - 0x828, 0x00000000, - 0x82C, 0x00000000, - 0x830, 0x00000000, - 0x834, 0x00000000, - 0x838, 0x00000000, - 0x83C, 0x00000000, - 0x840, 0x00010000, - 0x844, 0x00000000, - 0x848, 0x00000000, - 0x84C, 0x00000000, - 0x850, 0x00000000, - 0x854, 0x00000000, - 0x858, 0x569A11A9, - 0x85C, 0x01000014, - 0x860, 0x66F60110, - 0x864, 0x061F0649, - 0x868, 0x00000000, - 0x86C, 0x27272700, - 0x870, 0x07000760, - 0x874, 0x25004000, - 0x878, 0x00000808, - 0x87C, 0x00000000, - 0x880, 0xB0000C1C, - 0x884, 0x00000001, - 0x888, 0x00000000, - 0x88C, 0xCCC000C0, - 0x890, 0x00000800, - 0x894, 0xFFFFFFFE, - 0x898, 0x40302010, - 0x89C, 0x00706050, - 0x900, 0x00000000, - 0x904, 0x00000023, - 0x908, 0x00000000, - 0x90C, 0x81121111, - 0x910, 0x00000002, - 0x914, 0x00000201, - 0xA00, 0x00D047C8, - 0xA04, 0x80FF000C, - 0xA08, 0x8C838300, - 0xA0C, 0x2E7F120F, - 0xA10, 0x9500BB78, - 0xA14, 0x1114D028, - 0xA18, 0x00881117, - 0xA1C, 0x89140F00, - 0xA20, 0x1A1B0000, - 0xA24, 0x090E1317, - 0xA28, 0x00000204, - 0xA2C, 0x00D30000, - 0xA70, 0x101FBF00, - 0xA74, 0x00000007, - 0xA78, 0x00000900, - 0xA7C, 0x225B0606, - 0xA80, 0x218075B1, - 0xB2C, 0x80000000, - 0xC00, 0x48071D40, - 0xC04, 0x03A05611, - 0xC08, 0x000000E4, - 0xC0C, 0x6C6C6C6C, - 0xC10, 0x08800000, - 0xC14, 0x40000100, - 0xC18, 0x08800000, - 0xC1C, 0x40000100, - 0xC20, 0x00000000, - 0xC24, 0x00000000, - 0xC28, 0x00000000, - 0xC2C, 0x00000000, - 0xC30, 0x69E9AC47, - 0xC34, 0x469652AF, - 0xC38, 0x49795994, - 0xC3C, 0x0A97971C, - 0xC40, 0x1F7C403F, - 0xC44, 0x000100B7, - 0xC48, 0xEC020107, - 0xC4C, 0x007F037F, - 0xC50, 0x69553420, - 0xC54, 0x43BC0094, - 0xC58, 0x00013169, - 0xC5C, 0x00250492, - 0xC60, 0x00000000, - 0xC64, 0x7112848B, - 0xC68, 0x47C00BFF, - 0xC6C, 0x00000036, - 0xC70, 0x2C7F000D, - 0xC74, 0x020610DB, - 0xC78, 0x0000001F, - 0xC7C, 0x00B91612, - 0xC80, 0x390000E4, - 0xC84, 0x20F60000, - 0xC88, 0x40000100, - 0xC8C, 0x20200000, - 0xC90, 0x00091521, - 0xC94, 0x00000000, - 0xC98, 0x00121820, - 0xC9C, 0x00007F7F, - 0xCA0, 0x00000000, - 0xCA4, 0x000300A0, - 0xCA8, 0x00000000, - 0xCAC, 0x00000000, - 0xCB0, 0x00000000, - 0xCB4, 0x00000000, - 0xCB8, 0x00000000, - 0xCBC, 0x28000000, - 0xCC0, 0x00000000, - 0xCC4, 0x00000000, - 0xCC8, 0x00000000, - 0xCCC, 0x00000000, - 0xCD0, 0x00000000, - 0xCD4, 0x00000000, - 0xCD8, 0x64B22427, - 0xCDC, 0x00766932, - 0xCE0, 0x00222222, - 0xCE4, 0x00000000, - 0xCE8, 0x37644302, - 0xCEC, 0x2F97D40C, - 0xD00, 0x00000740, - 0xD04, 0x00020401, - 0xD08, 0x0000907F, - 0xD0C, 0x20010201, - 0xD10, 0xA0633333, - 0xD14, 0x3333BC43, - 0xD18, 0x7A8F5B6F, - 0xD2C, 0xCC979975, - 0xD30, 0x00000000, - 0xD34, 0x80608000, - 0xD38, 0x00000000, - 0xD3C, 0x00127353, - 0xD40, 0x00000000, - 0xD44, 0x00000000, - 0xD48, 0x00000000, - 0xD4C, 0x00000000, - 0xD50, 0x6437140A, - 0xD54, 0x00000000, - 0xD58, 0x00000282, - 0xD5C, 0x30032064, - 0xD60, 0x4653DE68, - 0xD64, 0x04518A3C, - 0xD68, 0x00002101, - 0xD6C, 0x2A201C16, - 0xD70, 0x1812362E, - 0xD74, 0x322C2220, - 0xD78, 0x000E3C24, - 0xE00, 0x2D2D2D2D, - 0xE04, 0x2D2D2D2D, - 0xE08, 0x0390272D, - 0xE10, 0x2D2D2D2D, - 0xE14, 0x2D2D2D2D, - 0xE18, 0x2D2D2D2D, - 0xE1C, 0x2D2D2D2D, - 0xE28, 0x00000000, - 0xE30, 0x1000DC1F, - 0xE34, 0x10008C1F, - 0xE38, 0x02140102, - 0xE3C, 0x681604C2, - 0xE40, 0x01007C00, - 0xE44, 0x01004800, - 0xE48, 0xFB000000, - 0xE4C, 0x000028D1, - 0xE50, 0x1000DC1F, - 0xE54, 0x10008C1F, - 0xE58, 0x02140102, - 0xE5C, 0x28160D05, - 0xE60, 0x00000008, - 0xE68, 0x001B25A4, - 0xE6C, 0x00C00014, - 0xE70, 0x00C00014, - 0xE74, 0x01000014, - 0xE78, 0x01000014, - 0xE7C, 0x01000014, - 0xE80, 0x01000014, - 0xE84, 0x00C00014, - 0xE88, 0x01000014, - 0xE8C, 0x00C00014, - 0xED0, 0x00C00014, - 0xED4, 0x00C00014, - 0xED8, 0x00C00014, - 0xEDC, 0x00000014, - 0xEE0, 0x00000014, - 0xEEC, 0x01C00014, - 0xF14, 0x00000003, - 0xF4C, 0x00000000, - 0xF00, 0x00000300, -}; - -enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm) -{ - u32 hex = 0; - u32 i = 0; - u8 platform = dm_odm->SupportPlatform; - u8 interfaceValue = dm_odm->SupportInterface; - u8 board = dm_odm->BoardType; - u32 arraylen = sizeof(array_phy_reg_1t_8188e)/sizeof(u32); - u32 *array = array_phy_reg_1t_8188e; - bool biol = false; - struct adapter *adapter = dm_odm->Adapter; - struct xmit_frame *pxmit_frame = NULL; - u8 bndy_cnt = 1; - enum HAL_STATUS rst = HAL_STATUS_SUCCESS; - hex += board; - hex += interfaceValue << 8; - hex += platform << 16; - hex += 0xFF000000; - biol = rtw_IOL_applied(adapter); - - if (biol) { - pxmit_frame = rtw_IOL_accquire_xmit_frame(adapter); - if (pxmit_frame == NULL) { - pr_info("rtw_IOL_accquire_xmit_frame failed\n"); - return HAL_STATUS_FAILURE; - } - } - - for (i = 0; i < arraylen; i += 2) { - u32 v1 = array[i]; - u32 v2 = array[i+1]; - - /* This (offset, data) pair meets the condition. */ - if (v1 < 0xCDCDCDCD) { - if (biol) { - if (rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - if (v1 == 0xfe) { - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 50); - } else if (v1 == 0xfd) { - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 5); - } else if (v1 == 0xfc) { - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 1); - } else if (v1 == 0xfb) { - rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 50); - } else if (v1 == 0xfa) { - rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 5); - } else if (v1 == 0xf9) { - rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 1); - } else { - if (v1 == 0xa24) - dm_odm->RFCalibrateInfo.RegA24 = v2; - rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord); - } - } else { - odm_ConfigBB_PHY_8188E(dm_odm, v1, bMaskDWord, v2); - } - continue; - } else { /* This line is the start line of branch. */ - if (!CheckCondition(array[i], hex)) { - /* Discard the following (offset, data) pairs. */ - read_next_pair(array, v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < arraylen - 2) - read_next_pair(array, v1, v2, i); - i -= 2; /* prevent from for-loop += 2 */ - } else { /* Configure matched pairs and skip to end of if-else. */ - read_next_pair(array, v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < arraylen - 2) { - if (biol) { - if (rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - if (v1 == 0xfe) { - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 50); - } else if (v1 == 0xfd) { - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 5); - } else if (v1 == 0xfc) { - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 1); - } else if (v1 == 0xfb) { - rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 50); - } else if (v1 == 0xfa) { - rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 5); - } else if (v1 == 0xf9) { - rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 1); - } else{ - if (v1 == 0xa24) - dm_odm->RFCalibrateInfo.RegA24 = v2; - - rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord); - } - } else { - odm_ConfigBB_PHY_8188E(dm_odm, v1, bMaskDWord, v2); - } - read_next_pair(array, v1, v2, i); - } - - while (v2 != 0xDEAD && i < arraylen - 2) - read_next_pair(array, v1, v2, i); - } - } - } - if (biol) { - if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) { - rst = HAL_STATUS_FAILURE; - pr_info("~~~ IOL Config %s Failed !!!\n", __func__); - } - } - return rst; -} - -/****************************************************************************** -* PHY_REG_PG.TXT -******************************************************************************/ - -static u32 array_phy_reg_pg_8188e[] = { - 0xE00, 0xFFFFFFFF, 0x06070809, - 0xE04, 0xFFFFFFFF, 0x02020405, - 0xE08, 0x0000FF00, 0x00000006, - 0x86C, 0xFFFFFF00, 0x00020400, - 0xE10, 0xFFFFFFFF, 0x08090A0B, - 0xE14, 0xFFFFFFFF, 0x01030607, - 0xE18, 0xFFFFFFFF, 0x08090A0B, - 0xE1C, 0xFFFFFFFF, 0x01030607, - 0xE00, 0xFFFFFFFF, 0x00000000, - 0xE04, 0xFFFFFFFF, 0x00000000, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x00000000, - 0xE14, 0xFFFFFFFF, 0x00000000, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x02020202, - 0xE04, 0xFFFFFFFF, 0x00020202, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x04040404, - 0xE14, 0xFFFFFFFF, 0x00020404, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x02020202, - 0xE04, 0xFFFFFFFF, 0x00020202, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x04040404, - 0xE14, 0xFFFFFFFF, 0x00020404, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x00000000, - 0xE04, 0xFFFFFFFF, 0x00000000, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x00000000, - 0xE14, 0xFFFFFFFF, 0x00000000, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x02020202, - 0xE04, 0xFFFFFFFF, 0x00020202, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x04040404, - 0xE14, 0xFFFFFFFF, 0x00020404, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x00000000, - 0xE04, 0xFFFFFFFF, 0x00000000, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x00000000, - 0xE14, 0xFFFFFFFF, 0x00000000, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x00000000, - 0xE04, 0xFFFFFFFF, 0x00000000, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x00000000, - 0xE14, 0xFFFFFFFF, 0x00000000, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x00000000, - 0xE04, 0xFFFFFFFF, 0x00000000, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x00000000, - 0xE14, 0xFFFFFFFF, 0x00000000, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x00000000, - 0xE04, 0xFFFFFFFF, 0x00000000, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x00000000, - 0xE14, 0xFFFFFFFF, 0x00000000, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - 0xE00, 0xFFFFFFFF, 0x00000000, - 0xE04, 0xFFFFFFFF, 0x00000000, - 0xE08, 0x0000FF00, 0x00000000, - 0x86C, 0xFFFFFF00, 0x00000000, - 0xE10, 0xFFFFFFFF, 0x00000000, - 0xE14, 0xFFFFFFFF, 0x00000000, - 0xE18, 0xFFFFFFFF, 0x00000000, - 0xE1C, 0xFFFFFFFF, 0x00000000, - -}; - -void ODM_ReadAndConfig_PHY_REG_PG_8188E(struct odm_dm_struct *dm_odm) -{ - u32 hex; - u32 i = 0; - u8 platform = dm_odm->SupportPlatform; - u8 interfaceValue = dm_odm->SupportInterface; - u8 board = dm_odm->BoardType; - u32 arraylen = sizeof(array_phy_reg_pg_8188e) / sizeof(u32); - u32 *array = array_phy_reg_pg_8188e; - - hex = board + (interfaceValue << 8); - hex += (platform << 16) + 0xFF000000; - - for (i = 0; i < arraylen; i += 3) { - u32 v1 = array[i]; - u32 v2 = array[i+1]; - u32 v3 = array[i+2]; - - /* this line is a line of pure_body */ - if (v1 < 0xCDCDCDCD) { - odm_ConfigBB_PHY_REG_PG_8188E(dm_odm, v1, v2, v3); - continue; - } else { /* this line is the start of branch */ - if (!CheckCondition(array[i], hex)) { - /* don't need the hw_body */ - i += 2; /* skip the pair of expression */ - v1 = array[i]; - v2 = array[i+1]; - v3 = array[i+2]; - while (v2 != 0xDEAD) { - i += 3; - v1 = array[i]; - v2 = array[i+1]; - v3 = array[i+1]; - } - } - } - } -} +/****************************************************************************** +* +* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of version 2 of the GNU General Public License as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along with +* this program; if not, write to the Free Software Foundation, Inc., +* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +* +* +******************************************************************************/ + +#include "odm_precomp.h" + +#ifdef CONFIG_IOL_IOREG_CFG +#include +#endif + +#if (RTL8188E_SUPPORT == 1) +static BOOLEAN +CheckCondition( + const u4Byte Condition, + const u4Byte Hex + ) +{ + u4Byte _board = (Hex & 0x000000FF); + u4Byte _interface = (Hex & 0x0000FF00) >> 8; + u4Byte _platform = (Hex & 0x00FF0000) >> 16; + u4Byte cond = Condition; + + if ( Condition == 0xCDCDCDCD ) + return TRUE; + + cond = Condition & 0x000000FF; + if ( (_board != cond) && (cond != 0xFF) ) + return FALSE; + + cond = Condition & 0x0000FF00; + cond = cond >> 8; + if ( ((_interface & cond) == 0) && (cond != 0x07) ) + return FALSE; + + cond = Condition & 0x00FF0000; + cond = cond >> 16; + if ( ((_platform & cond) == 0) && (cond != 0x0F) ) + return FALSE; + return TRUE; +} + + +/****************************************************************************** +* AGC_TAB_1T.TXT +******************************************************************************/ + +u4Byte Array_AGC_TAB_1T_8188E[] = { +0xFF0F0718, 0xABCD, + 0xC78, 0xF7000001, + 0xC78, 0xF6010001, + 0xC78, 0xF5020001, + 0xC78, 0xF4030001, + 0xC78, 0xF3040001, + 0xC78, 0xF2050001, + 0xC78, 0xF1060001, + 0xC78, 0xF0070001, + 0xC78, 0xEF080001, + 0xC78, 0xEE090001, + 0xC78, 0xED0A0001, + 0xC78, 0xEC0B0001, + 0xC78, 0xEB0C0001, + 0xC78, 0xEA0D0001, + 0xC78, 0xE90E0001, + 0xC78, 0xE80F0001, + 0xC78, 0xE7100001, + 0xC78, 0xE6110001, + 0xC78, 0xE5120001, + 0xC78, 0xE4130001, + 0xC78, 0xE3140001, + 0xC78, 0xE2150001, + 0xC78, 0xE1160001, + 0xC78, 0x89170001, + 0xC78, 0x88180001, + 0xC78, 0x87190001, + 0xC78, 0x861A0001, + 0xC78, 0x851B0001, + 0xC78, 0x841C0001, + 0xC78, 0x831D0001, + 0xC78, 0x821E0001, + 0xC78, 0x811F0001, + 0xC78, 0x6B200001, + 0xC78, 0x6A210001, + 0xC78, 0x69220001, + 0xC78, 0x68230001, + 0xC78, 0x67240001, + 0xC78, 0x66250001, + 0xC78, 0x65260001, + 0xC78, 0x64270001, + 0xC78, 0x63280001, + 0xC78, 0x62290001, + 0xC78, 0x612A0001, + 0xC78, 0x462B0001, + 0xC78, 0x452C0001, + 0xC78, 0x442D0001, + 0xC78, 0x432E0001, + 0xC78, 0x422F0001, + 0xC78, 0x41300001, + 0xC78, 0x40310001, + 0xC78, 0x40320001, + 0xC78, 0x40330001, + 0xC78, 0x40340001, + 0xC78, 0x40350001, + 0xC78, 0x40360001, + 0xC78, 0x40370001, + 0xC78, 0x40380001, + 0xC78, 0x40390001, + 0xC78, 0x403A0001, + 0xC78, 0x403B0001, + 0xC78, 0x403C0001, + 0xC78, 0x403D0001, + 0xC78, 0x403E0001, + 0xC78, 0x403F0001, + 0xCDCDCDCD, 0xCDCD, + 0xC78, 0xFB000001, + 0xC78, 0xFB010001, + 0xC78, 0xFB020001, + 0xC78, 0xFB030001, + 0xC78, 0xFB040001, + 0xC78, 0xFB050001, + 0xC78, 0xFA060001, + 0xC78, 0xF9070001, + 0xC78, 0xF8080001, + 0xC78, 0xF7090001, + 0xC78, 0xF60A0001, + 0xC78, 0xF50B0001, + 0xC78, 0xF40C0001, + 0xC78, 0xF30D0001, + 0xC78, 0xF20E0001, + 0xC78, 0xF10F0001, + 0xC78, 0xF0100001, + 0xC78, 0xEF110001, + 0xC78, 0xEE120001, + 0xC78, 0xED130001, + 0xC78, 0xEC140001, + 0xC78, 0xEB150001, + 0xC78, 0xEA160001, + 0xC78, 0xE9170001, + 0xC78, 0xE8180001, + 0xC78, 0xE7190001, + 0xC78, 0xE61A0001, + 0xC78, 0xE51B0001, + 0xC78, 0xE41C0001, + 0xC78, 0xE31D0001, + 0xC78, 0xE21E0001, + 0xC78, 0xE11F0001, + 0xC78, 0x8A200001, + 0xC78, 0x89210001, + 0xC78, 0x88220001, + 0xC78, 0x87230001, + 0xC78, 0x86240001, + 0xC78, 0x85250001, + 0xC78, 0x84260001, + 0xC78, 0x83270001, + 0xC78, 0x82280001, + 0xC78, 0x6B290001, + 0xC78, 0x6A2A0001, + 0xC78, 0x692B0001, + 0xC78, 0x682C0001, + 0xC78, 0x672D0001, + 0xC78, 0x662E0001, + 0xC78, 0x652F0001, + 0xC78, 0x64300001, + 0xC78, 0x63310001, + 0xC78, 0x62320001, + 0xC78, 0x61330001, + 0xC78, 0x46340001, + 0xC78, 0x45350001, + 0xC78, 0x44360001, + 0xC78, 0x43370001, + 0xC78, 0x42380001, + 0xC78, 0x41390001, + 0xC78, 0x403A0001, + 0xC78, 0x403B0001, + 0xC78, 0x403C0001, + 0xC78, 0x403D0001, + 0xC78, 0x403E0001, + 0xC78, 0x403F0001, + 0xFF0F0718, 0xDEAD, + 0xFF0F0718, 0xABCD, + 0xC78, 0xFB400001, + 0xC78, 0xFA410001, + 0xC78, 0xF9420001, + 0xC78, 0xF8430001, + 0xC78, 0xF7440001, + 0xC78, 0xF6450001, + 0xC78, 0xF5460001, + 0xC78, 0xF4470001, + 0xC78, 0xF3480001, + 0xC78, 0xF2490001, + 0xC78, 0xF14A0001, + 0xC78, 0xF04B0001, + 0xC78, 0xEF4C0001, + 0xC78, 0xEE4D0001, + 0xC78, 0xED4E0001, + 0xC78, 0xEC4F0001, + 0xC78, 0xEB500001, + 0xC78, 0xEA510001, + 0xC78, 0xE9520001, + 0xC78, 0xE8530001, + 0xC78, 0xE7540001, + 0xC78, 0xE6550001, + 0xC78, 0xE5560001, + 0xC78, 0xE4570001, + 0xC78, 0xE3580001, + 0xC78, 0xE2590001, + 0xC78, 0xC35A0001, + 0xC78, 0xC25B0001, + 0xC78, 0xC15C0001, + 0xC78, 0x8B5D0001, + 0xC78, 0x8A5E0001, + 0xC78, 0x895F0001, + 0xC78, 0x88600001, + 0xC78, 0x87610001, + 0xC78, 0x86620001, + 0xC78, 0x85630001, + 0xC78, 0x84640001, + 0xC78, 0x67650001, + 0xC78, 0x66660001, + 0xC78, 0x65670001, + 0xC78, 0x64680001, + 0xC78, 0x63690001, + 0xC78, 0x626A0001, + 0xC78, 0x616B0001, + 0xC78, 0x606C0001, + 0xC78, 0x466D0001, + 0xC78, 0x456E0001, + 0xC78, 0x446F0001, + 0xC78, 0x43700001, + 0xC78, 0x42710001, + 0xC78, 0x41720001, + 0xC78, 0x40730001, + 0xC78, 0x40740001, + 0xC78, 0x40750001, + 0xC78, 0x40760001, + 0xC78, 0x40770001, + 0xC78, 0x40780001, + 0xC78, 0x40790001, + 0xC78, 0x407A0001, + 0xC78, 0x407B0001, + 0xC78, 0x407C0001, + 0xC78, 0x407D0001, + 0xC78, 0x407E0001, + 0xC78, 0x407F0001, + 0xCDCDCDCD, 0xCDCD, + 0xC78, 0xFB400001, + 0xC78, 0xFB410001, + 0xC78, 0xFB420001, + 0xC78, 0xFB430001, + 0xC78, 0xFB440001, + 0xC78, 0xFB450001, + 0xC78, 0xFB460001, + 0xC78, 0xFB470001, + 0xC78, 0xFB480001, + 0xC78, 0xFA490001, + 0xC78, 0xF94A0001, + 0xC78, 0xF84B0001, + 0xC78, 0xF74C0001, + 0xC78, 0xF64D0001, + 0xC78, 0xF54E0001, + 0xC78, 0xF44F0001, + 0xC78, 0xF3500001, + 0xC78, 0xF2510001, + 0xC78, 0xF1520001, + 0xC78, 0xF0530001, + 0xC78, 0xEF540001, + 0xC78, 0xEE550001, + 0xC78, 0xED560001, + 0xC78, 0xEC570001, + 0xC78, 0xEB580001, + 0xC78, 0xEA590001, + 0xC78, 0xE95A0001, + 0xC78, 0xE85B0001, + 0xC78, 0xE75C0001, + 0xC78, 0xE65D0001, + 0xC78, 0xE55E0001, + 0xC78, 0xE45F0001, + 0xC78, 0xE3600001, + 0xC78, 0xE2610001, + 0xC78, 0xC3620001, + 0xC78, 0xC2630001, + 0xC78, 0xC1640001, + 0xC78, 0x8B650001, + 0xC78, 0x8A660001, + 0xC78, 0x89670001, + 0xC78, 0x88680001, + 0xC78, 0x87690001, + 0xC78, 0x866A0001, + 0xC78, 0x856B0001, + 0xC78, 0x846C0001, + 0xC78, 0x676D0001, + 0xC78, 0x666E0001, + 0xC78, 0x656F0001, + 0xC78, 0x64700001, + 0xC78, 0x63710001, + 0xC78, 0x62720001, + 0xC78, 0x61730001, + 0xC78, 0x60740001, + 0xC78, 0x46750001, + 0xC78, 0x45760001, + 0xC78, 0x44770001, + 0xC78, 0x43780001, + 0xC78, 0x42790001, + 0xC78, 0x417A0001, + 0xC78, 0x407B0001, + 0xC78, 0x407C0001, + 0xC78, 0x407D0001, + 0xC78, 0x407E0001, + 0xC78, 0x407F0001, + 0xFF0F0718, 0xDEAD, + 0xC50, 0x69553422, + 0xC50, 0x69553420, + +}; + +HAL_STATUS +ODM_ReadAndConfig_AGC_TAB_1T_8188E( + IN PDM_ODM_T pDM_Odm + ) +{ + #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) + + u4Byte hex = 0; + u4Byte i = 0; + u2Byte count = 0; + pu4Byte ptr_array = NULL; + u1Byte platform = pDM_Odm->SupportPlatform; + u1Byte interfaceValue = pDM_Odm->SupportInterface; + u1Byte board = pDM_Odm->BoardType; + u4Byte ArrayLen = sizeof(Array_AGC_TAB_1T_8188E)/sizeof(u4Byte); + pu4Byte Array = Array_AGC_TAB_1T_8188E; + BOOLEAN biol = FALSE; +#ifdef CONFIG_IOL_IOREG_CFG + PADAPTER Adapter = pDM_Odm->Adapter; + struct xmit_frame *pxmit_frame; + u8 bndy_cnt=1; +#endif//#ifdef CONFIG_IOL_IOREG_CFG + HAL_STATUS rst =HAL_STATUS_SUCCESS; + + hex += board; + hex += interfaceValue << 8; + hex += platform << 16; + hex += 0xFF000000; +#ifdef CONFIG_IOL_IOREG_CFG + biol = rtw_IOL_applied(Adapter); + + if(biol){ + if((pxmit_frame= rtw_IOL_accquire_xmit_frame(Adapter)) == NULL){ + printk("rtw_IOL_accquire_xmit_frame failed\n"); + return HAL_STATUS_FAILURE; + } + } +#endif//#ifdef CONFIG_IOL_IOREG_CFG + + for (i = 0; i < ArrayLen; i += 2 ) + { + u4Byte v1 = Array[i]; + u4Byte v2 = Array[i+1]; + + // This (offset, data) pair meets the condition. + if ( v1 < 0xCDCDCDCD ) + { + #ifdef CONFIG_IOL_IOREG_CFG + if(biol){ + if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) + bndy_cnt++; + rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord); + } + else + #endif //#ifdef CONFIG_IOL_IOREG_CFG + { + odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2); + } + continue; + } + else + { // This line is the start line of branch. + if ( !CheckCondition(Array[i], hex) ) + { // Discard the following (offset, data) pairs. + READ_NEXT_PAIR(v1, v2, i); + while ( v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + i -= 2; // prevent from for-loop += 2 + } + else // Configure matched pairs and skip to end of if-else. + { + READ_NEXT_PAIR(v1, v2, i); + while ( v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + #ifdef CONFIG_IOL_IOREG_CFG + if(biol){ + if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) + bndy_cnt++; + rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord); + } + else + #endif //#ifdef CONFIG_IOL_IOREG_CFG + { + odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2); + } + READ_NEXT_PAIR(v1, v2, i); + } + + while (v2 != 0xDEAD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + + } + } + } +#ifdef CONFIG_IOL_IOREG_CFG + if(biol){ + //printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt); + if(rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) + { + #ifdef CONFIG_IOL_IOREG_CFG_DBG + printk("~~~ %s Success !!! \n",__FUNCTION__); + { + //dump data from TX packet buffer + rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); + } + #endif //CONFIG_IOL_IOREG_CFG_DBG + + } + else{ + printk("~~~ %s IOL_exec_cmds Failed !!! \n",__FUNCTION__); + #ifdef CONFIG_IOL_IOREG_CFG_DBG + { + //dump data from TX packet buffer + rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); + } + #endif //CONFIG_IOL_IOREG_CFG_DBG + + rst = HAL_STATUS_FAILURE; + } + } +#endif //#ifdef CONFIG_IOL_IOREG_CFG + return rst; +} + +/****************************************************************************** +* AGC_TAB_1T_ICUT.TXT +******************************************************************************/ + +u4Byte Array_MP_8188E_AGC_TAB_1T_ICUT[] = { + 0xC78, 0xFB000001, + 0xC78, 0xFB010001, + 0xC78, 0xFB020001, + 0xC78, 0xFB030001, + 0xC78, 0xFB040001, + 0xC78, 0xFA050001, + 0xC78, 0xF9060001, + 0xC78, 0xF8070001, + 0xC78, 0xF7080001, + 0xC78, 0xF6090001, + 0xC78, 0xF50A0001, + 0xC78, 0xF40B0001, + 0xC78, 0xF30C0001, + 0xC78, 0xF20D0001, + 0xC78, 0xF10E0001, + 0xC78, 0xF00F0001, + 0xC78, 0xEF100001, + 0xC78, 0xEE110001, + 0xC78, 0xED120001, + 0xC78, 0xEC130001, + 0xC78, 0xEB140001, + 0xC78, 0xEA150001, + 0xC78, 0xE9160001, + 0xC78, 0xE8170001, + 0xC78, 0xE7180001, + 0xC78, 0xE6190001, + 0xC78, 0xE51A0001, + 0xC78, 0xE41B0001, + 0xC78, 0xC71C0001, + 0xC78, 0xC61D0001, + 0xC78, 0xC51E0001, + 0xC78, 0xC41F0001, + 0xC78, 0xC3200001, + 0xC78, 0xC2210001, + 0xC78, 0x88220001, + 0xC78, 0x87230001, + 0xC78, 0x86240001, + 0xC78, 0x85250001, + 0xC78, 0x84260001, + 0xC78, 0x83270001, + 0xC78, 0x82280001, + 0xC78, 0x81290001, + 0xC78, 0x242A0001, + 0xC78, 0x232B0001, + 0xC78, 0x222C0001, + 0xC78, 0x672D0001, + 0xC78, 0x662E0001, + 0xC78, 0x652F0001, + 0xC78, 0x64300001, + 0xC78, 0x63310001, + 0xC78, 0x62320001, + 0xC78, 0x61330001, + 0xC78, 0x60340001, + 0xC78, 0x4A350001, + 0xC78, 0x49360001, + 0xC78, 0x48370001, + 0xC78, 0x47380001, + 0xC78, 0x46390001, + 0xC78, 0x453A0001, + 0xC78, 0x443B0001, + 0xC78, 0x433C0001, + 0xC78, 0x423D0001, + 0xC78, 0x413E0001, + 0xC78, 0x403F0001, + 0xC78, 0xFB400001, + 0xC78, 0xFB410001, + 0xC78, 0xFB420001, + 0xC78, 0xFB430001, + 0xC78, 0xFB440001, + 0xC78, 0xFB450001, + 0xC78, 0xFB460001, + 0xC78, 0xFB470001, + 0xC78, 0xFA480001, + 0xC78, 0xF9490001, + 0xC78, 0xF84A0001, + 0xC78, 0xF74B0001, + 0xC78, 0xF64C0001, + 0xC78, 0xF54D0001, + 0xC78, 0xF44E0001, + 0xC78, 0xF34F0001, + 0xC78, 0xF2500001, + 0xC78, 0xF1510001, + 0xC78, 0xF0520001, + 0xC78, 0xEF530001, + 0xC78, 0xEE540001, + 0xC78, 0xED550001, + 0xC78, 0xEC560001, + 0xC78, 0xEB570001, + 0xC78, 0xEA580001, + 0xC78, 0xE9590001, + 0xC78, 0xE85A0001, + 0xC78, 0xE75B0001, + 0xC78, 0xE65C0001, + 0xC78, 0xE55D0001, + 0xC78, 0xC65E0001, + 0xC78, 0xC55F0001, + 0xC78, 0xC4600001, + 0xC78, 0xC3610001, + 0xC78, 0xC2620001, + 0xC78, 0xC1630001, + 0xC78, 0xC0640001, + 0xC78, 0xA3650001, + 0xC78, 0xA2660001, + 0xC78, 0xA1670001, + 0xC78, 0x88680001, + 0xC78, 0x87690001, + 0xC78, 0x866A0001, + 0xC78, 0x856B0001, + 0xC78, 0x846C0001, + 0xC78, 0x836D0001, + 0xC78, 0x826E0001, + 0xC78, 0x666F0001, + 0xC78, 0x65700001, + 0xC78, 0x64710001, + 0xC78, 0x63720001, + 0xC78, 0x62730001, + 0xC78, 0x61740001, + 0xC78, 0x48750001, + 0xC78, 0x47760001, + 0xC78, 0x46770001, + 0xC78, 0x45780001, + 0xC78, 0x44790001, + 0xC78, 0x437A0001, + 0xC78, 0x427B0001, + 0xC78, 0x417C0001, + 0xC78, 0x407D0001, + 0xC78, 0x407E0001, + 0xC78, 0x407F0001, + 0xC50, 0x69553422, + 0xC50, 0x69553420, + +}; + +void +ODM_ReadAndConfig_AGC_TAB_1T_ICUT_8188E( + IN PDM_ODM_T pDM_Odm + ) +{ + #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) + + u4Byte hex = 0; + u4Byte i = 0; + u2Byte count = 0; + pu4Byte ptr_array = NULL; + u1Byte platform = pDM_Odm->SupportPlatform; + u1Byte _interface = pDM_Odm->SupportInterface; + u1Byte board = pDM_Odm->BoardType; + u4Byte ArrayLen = sizeof(Array_MP_8188E_AGC_TAB_1T_ICUT)/sizeof(u4Byte); + pu4Byte Array = Array_MP_8188E_AGC_TAB_1T_ICUT; + + + hex += board; + hex += _interface << 8; + hex += platform << 16; + hex += 0xFF000000; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_8188E_AGC_TAB_1T_ICUT, hex = 0x%X\n", hex)); + + for (i = 0; i < ArrayLen; i += 2 ) + { + u4Byte v1 = Array[i]; + u4Byte v2 = Array[i+1]; + + // This (offset, data) pair meets the condition. + if ( v1 < 0xCDCDCDCD ) + { + odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2); + continue; + } + else + { // This line is the start line of branch. + if ( !CheckCondition(Array[i], hex) ) + { // Discard the following (offset, data) pairs. + READ_NEXT_PAIR(v1, v2, i); + while (v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + i -= 2; // prevent from for-loop += 2 + } + else // Configure matched pairs and skip to end of if-else. + { + READ_NEXT_PAIR(v1, v2, i); + while (v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2); + READ_NEXT_PAIR(v1, v2, i); + } + + while (v2 != 0xDEAD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + + } + } + } + +} + +/****************************************************************************** +* PHY_REG_1T.TXT +******************************************************************************/ + +u4Byte Array_PHY_REG_1T_8188E[] = { + 0x800, 0x80040000, + 0x804, 0x00000003, + 0x808, 0x0000FC00, + 0x80C, 0x0000000A, + 0x810, 0x10001331, + 0x814, 0x020C3D10, + 0x818, 0x02200385, + 0x81C, 0x00000000, + 0x820, 0x01000100, + 0x824, 0x00390204, + 0x828, 0x00000000, + 0x82C, 0x00000000, + 0x830, 0x00000000, + 0x834, 0x00000000, + 0x838, 0x00000000, + 0x83C, 0x00000000, + 0x840, 0x00010000, + 0x844, 0x00000000, + 0x848, 0x00000000, + 0x84C, 0x00000000, + 0x850, 0x00000000, + 0x854, 0x00000000, + 0x858, 0x569A11A9, + 0x85C, 0x01000014, + 0x860, 0x66F60110, + 0x864, 0x061F0649, + 0x868, 0x00000000, + 0x86C, 0x27272700, + 0xFF0F0718, 0xABCD, + 0x870, 0x07000300, + 0xCDCDCDCD, 0xCDCD, + 0x870, 0x07000760, + 0xFF0F0718, 0xDEAD, + 0x874, 0x25004000, + 0x878, 0x00000808, + 0x87C, 0x00000000, + 0x880, 0xB0000C1C, + 0x884, 0x00000001, + 0x888, 0x00000000, + 0x88C, 0xCCC000C0, + 0x890, 0x00000800, + 0x894, 0xFFFFFFFE, + 0x898, 0x40302010, + 0x89C, 0x00706050, + 0x900, 0x00000000, + 0x904, 0x00000023, + 0x908, 0x00000000, + 0x90C, 0x81121111, + 0x910, 0x00000002, + 0x914, 0x00000201, + 0xA00, 0x00D047C8, + 0xA04, 0x80FF000C, + 0xA08, 0x8C838300, + 0xA0C, 0x2E7F120F, + 0xA10, 0x9500BB78, + 0xA14, 0x1114D028, + 0xA18, 0x00881117, + 0xA1C, 0x89140F00, + 0xFF0F0718, 0xABCD, + 0xA20, 0x13130000, + 0xA24, 0x060A0D10, + 0xA28, 0x00000103, + 0xCDCDCDCD, 0xCDCD, + 0xA20, 0x1A1B0000, + 0xA24, 0x090E1317, + 0xA28, 0x00000204, + 0xFF0F0718, 0xDEAD, + 0xA2C, 0x00D30000, + 0xA70, 0x101FBF00, + 0xA74, 0x00000007, + 0xA78, 0x00000900, + 0xA7C, 0x225B0606, + 0xA80, 0x218075B1, + 0xFF0F0718, 0xABCD, + 0xB2C, 0x00000000, + 0xCDCDCDCD, 0xCDCD, + 0xB2C, 0x80000000, + 0xFF0F0718, 0xDEAD, + 0xC00, 0x48071D40, + 0xC04, 0x03A05611, + 0xC08, 0x000000E4, + 0xC0C, 0x6C6C6C6C, + 0xC10, 0x08800000, + 0xC14, 0x40000100, + 0xC18, 0x08800000, + 0xC1C, 0x40000100, + 0xC20, 0x00000000, + 0xC24, 0x00000000, + 0xC28, 0x00000000, + 0xC2C, 0x00000000, + 0xC30, 0x69E9AC47, + 0xC34, 0x469652AF, + 0xC38, 0x49795994, + 0xC3C, 0x0A97971C, + 0xC40, 0x1F7C403F, + 0xC44, 0x000100B7, + 0xC48, 0xEC020107, + 0xC4C, 0x007F037F, + 0xC50, 0x69553420, + 0xC54, 0x43BC0094, + 0xC58, 0x00013169, + 0xC5C, 0x00250492, + 0xC60, 0x00000000, + 0xC64, 0x7112848B, + 0xC68, 0x47C00BFF, + 0xC6C, 0x00000036, + 0xC70, 0x2C7F000D, + 0xC74, 0x020610DB, + 0xC78, 0x0000001F, + 0xC7C, 0x00B91612, + 0xFF0F0718, 0xABCD, + 0xC80, 0x2D4000B5, + 0xCDCDCDCD, 0xCDCD, + 0xC80, 0x390000E4, + 0xFF0F0718, 0xDEAD, + 0xC84, 0x20F60000, + 0xC88, 0x40000100, + 0xC8C, 0x20200000, + 0xC90, 0x00091521, + 0xC94, 0x00000000, + 0xC98, 0x00121820, + 0xC9C, 0x00007F7F, + 0xCA0, 0x00000000, + 0xCA4, 0x000300A0, + 0xCA8, 0x00000000, + 0xCAC, 0x00000000, + 0xCB0, 0x00000000, + 0xCB4, 0x00000000, + 0xCB8, 0x00000000, + 0xCBC, 0x28000000, + 0xCC0, 0x00000000, + 0xCC4, 0x00000000, + 0xCC8, 0x00000000, + 0xCCC, 0x00000000, + 0xCD0, 0x00000000, + 0xCD4, 0x00000000, + 0xCD8, 0x64B22427, + 0xCDC, 0x00766932, + 0xCE0, 0x00222222, + 0xCE4, 0x00000000, + 0xCE8, 0x37644302, + 0xCEC, 0x2F97D40C, + 0xD00, 0x00000740, + 0xD04, 0x00020401, + 0xD08, 0x0000907F, + 0xD0C, 0x20010201, + 0xD10, 0xA0633333, + 0xD14, 0x3333BC43, + 0xD18, 0x7A8F5B6F, + 0xD2C, 0xCC979975, + 0xD30, 0x00000000, + 0xD34, 0x80608000, + 0xD38, 0x00000000, + 0xD3C, 0x00127353, + 0xD40, 0x00000000, + 0xD44, 0x00000000, + 0xD48, 0x00000000, + 0xD4C, 0x00000000, + 0xD50, 0x6437140A, + 0xD54, 0x00000000, + 0xD58, 0x00000282, + 0xD5C, 0x30032064, + 0xD60, 0x4653DE68, + 0xD64, 0x04518A3C, + 0xD68, 0x00002101, + 0xD6C, 0x2A201C16, + 0xD70, 0x1812362E, + 0xD74, 0x322C2220, + 0xD78, 0x000E3C24, + 0xE00, 0x2D2D2D2D, + 0xE04, 0x2D2D2D2D, + 0xE08, 0x0390272D, + 0xE10, 0x2D2D2D2D, + 0xE14, 0x2D2D2D2D, + 0xE18, 0x2D2D2D2D, + 0xE1C, 0x2D2D2D2D, + 0xE28, 0x00000000, + 0xE30, 0x1000DC1F, + 0xE34, 0x10008C1F, + 0xE38, 0x02140102, + 0xE3C, 0x681604C2, + 0xE40, 0x01007C00, + 0xE44, 0x01004800, + 0xE48, 0xFB000000, + 0xE4C, 0x000028D1, + 0xE50, 0x1000DC1F, + 0xE54, 0x10008C1F, + 0xE58, 0x02140102, + 0xE5C, 0x28160D05, + 0xE60, 0x00000008, + 0xE68, 0x001B25A4, + 0xE6C, 0x00C00014, + 0xE70, 0x00C00014, + 0xE74, 0x01000014, + 0xE78, 0x01000014, + 0xE7C, 0x01000014, + 0xE80, 0x01000014, + 0xE84, 0x00C00014, + 0xE88, 0x01000014, + 0xE8C, 0x00C00014, + 0xED0, 0x00C00014, + 0xED4, 0x00C00014, + 0xED8, 0x00C00014, + 0xEDC, 0x00000014, + 0xEE0, 0x00000014, + 0xFF0F0718, 0xABCD, + 0xEE8, 0x32555448, + 0xCDCDCDCD, 0xCDCD, + 0xEE8, 0x21555448, + 0xFF0F0718, 0xDEAD, + 0xEEC, 0x01C00014, + 0xF14, 0x00000003, + 0xF4C, 0x00000000, + 0xF00, 0x00000300, +}; + + +HAL_STATUS +ODM_ReadAndConfig_PHY_REG_1T_8188E( + IN PDM_ODM_T pDM_Odm + ) +{ + #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) + + u4Byte hex = 0; + u4Byte i = 0; + u2Byte count = 0; + pu4Byte ptr_array = NULL; + u1Byte platform = pDM_Odm->SupportPlatform; + u1Byte interfaceValue = pDM_Odm->SupportInterface; + u1Byte board = pDM_Odm->BoardType; + u4Byte ArrayLen = sizeof(Array_PHY_REG_1T_8188E)/sizeof(u4Byte); + pu4Byte Array = Array_PHY_REG_1T_8188E; + BOOLEAN biol = FALSE; +#ifdef CONFIG_IOL_IOREG_CFG + PADAPTER Adapter = pDM_Odm->Adapter; + struct xmit_frame *pxmit_frame; + u8 bndy_cnt=1; + #ifdef CONFIG_IOL_IOREG_CFG_DBG + struct cmd_cmp cmpdata[ArrayLen]; + u4Byte cmpdata_idx=0; + #endif +#endif//#ifdef CONFIG_IOL_IOREG_CFG + HAL_STATUS rst =HAL_STATUS_SUCCESS; + hex += board; + hex += interfaceValue << 8; + hex += platform << 16; + hex += 0xFF000000; +#ifdef CONFIG_IOL_IOREG_CFG + biol = rtw_IOL_applied(Adapter); + + if(biol){ + if((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) + { + printk("rtw_IOL_accquire_xmit_frame failed\n"); + return HAL_STATUS_FAILURE; + } + } +#endif//#ifdef CONFIG_IOL_IOREG_CFG + + for (i = 0; i < ArrayLen; i += 2 ) + { + u4Byte v1 = Array[i]; + u4Byte v2 = Array[i+1]; + + + // This (offset, data) pair meets the condition. + if ( v1 < 0xCDCDCDCD ) + { + #ifdef CONFIG_IOL_IOREG_CFG + if(biol){ + if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) + bndy_cnt++; + + + if (v1 == 0xfe){ + rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,50); + } + else if (v1 == 0xfd){ + rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,5); + } + else if (v1 == 0xfc){ + rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,1); + } + else if (v1 == 0xfb){ + rtw_IOL_append_DELAY_US_cmd(pxmit_frame,50); + } + else if (v1 == 0xfa){ + rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 5); + } + else if (v1 == 0xf9){ + rtw_IOL_append_DELAY_US_cmd(pxmit_frame,1); + } + else{ + if (v1 == 0xa24) + pDM_Odm->RFCalibrateInfo.RegA24 = v2; + + rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord); + #ifdef CONFIG_IOL_IOREG_CFG_DBG + cmpdata[cmpdata_idx].addr = v1; + cmpdata[cmpdata_idx].value= v2; + cmpdata_idx++; + #endif + } + } + else + #endif //#ifdef CONFIG_IOL_IOREG_CFG + { + odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2); + } + continue; + } + else + { // This line is the start line of branch. + if ( !CheckCondition(Array[i], hex) ) + { // Discard the following (offset, data) pairs. + READ_NEXT_PAIR(v1, v2, i); + while (v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + i -= 2; // prevent from for-loop += 2 + } + else // Configure matched pairs and skip to end of if-else. + { + READ_NEXT_PAIR(v1, v2, i); + while (v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + #ifdef CONFIG_IOL_IOREG_CFG + if(biol){ + if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) + bndy_cnt++; + if (v1 == 0xfe){ + rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,50); + } + else if (v1 == 0xfd){ + rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,5); + } + else if (v1 == 0xfc){ + rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,1); + } + else if (v1 == 0xfb){ + rtw_IOL_append_DELAY_US_cmd(pxmit_frame,50); + } + else if (v1 == 0xfa){ + rtw_IOL_append_DELAY_US_cmd(pxmit_frame,5); + } + else if (v1 == 0xf9){ + rtw_IOL_append_DELAY_US_cmd(pxmit_frame,1); + } + else{ + if (v1 == 0xa24) + pDM_Odm->RFCalibrateInfo.RegA24 = v2; + + rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord); + #ifdef CONFIG_IOL_IOREG_CFG_DBG + cmpdata[cmpdata_idx].addr = v1; + cmpdata[cmpdata_idx].value= v2; + cmpdata_idx++; + #endif + } + } + else + #endif //#ifdef CONFIG_IOL_IOREG_CFG + { + odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2); + } + READ_NEXT_PAIR(v1, v2, i); + } + + while (v2 != 0xDEAD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + + } + } + } +#ifdef CONFIG_IOL_IOREG_CFG + if(biol){ + //printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt); + if(rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) + { + #ifdef CONFIG_IOL_IOREG_CFG_DBG + printk("~~~ %s IOL_exec_cmds Success !!! \n",__FUNCTION__); + { + u4Byte idx; + u4Byte cdata; + printk(" %s data compare => array_len:%d \n",__FUNCTION__,cmpdata_idx); + printk("### %s data compared !!###\n",__FUNCTION__); + for(idx=0;idx< cmpdata_idx;idx++) + { + cdata = ODM_Read4Byte(pDM_Odm, cmpdata[idx].addr); + if(cdata != cmpdata[idx].value){ + printk(" addr:0x%04x, data:(0x%02x : 0x%02x) \n", + cmpdata[idx].addr,cmpdata[idx].value,cdata); + rst = HAL_STATUS_FAILURE; + } + } + printk("### %s data compared !!###\n",__FUNCTION__); + //if(rst == HAL_STATUS_FAILURE) + {//dump data from TX packet buffer + rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); + } + + } + #endif //CONFIG_IOL_IOREG_CFG_DBG + + } + else{ + rst = HAL_STATUS_FAILURE; + printk("~~~ IOL Config %s Failed !!! \n",__FUNCTION__); + #ifdef CONFIG_IOL_IOREG_CFG_DBG + { + //dump data from TX packet buffer + rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); + } + #endif //CONFIG_IOL_IOREG_CFG_DBG + } + } +#endif //#ifdef CONFIG_IOL_IOREG_CFG + return rst; +} +/****************************************************************************** +* PHY_REG_1T_ICUT.TXT +******************************************************************************/ + +u4Byte Array_MP_8188E_PHY_REG_1T_ICUT[] = { + 0x800, 0x80040000, + 0x804, 0x00000003, + 0x808, 0x0000FC00, + 0x80C, 0x0000000A, + 0x810, 0x10001331, + 0x814, 0x020C3D10, + 0x818, 0x02200385, + 0x81C, 0x00000000, + 0x820, 0x01000100, + 0x824, 0x00390204, + 0x828, 0x00000000, + 0x82C, 0x00000000, + 0x830, 0x00000000, + 0x834, 0x00000000, + 0x838, 0x00000000, + 0x83C, 0x00000000, + 0x840, 0x00010000, + 0x844, 0x00000000, + 0x848, 0x00000000, + 0x84C, 0x00000000, + 0x850, 0x00000000, + 0x854, 0x00000000, + 0x858, 0x569A11A9, + 0x85C, 0x01000014, + 0x860, 0x66F60110, + 0x864, 0x061F0649, + 0x868, 0x00000000, + 0x86C, 0x27272700, + 0x870, 0x07000760, + 0x874, 0x25004000, + 0x878, 0x00000808, + 0x87C, 0x00000000, + 0x880, 0xB0000C1C, + 0x884, 0x00000001, + 0x888, 0x00000000, + 0x88C, 0xCCC000C0, + 0x890, 0x00000800, + 0x894, 0xFFFFFFFE, + 0x898, 0x40302010, + 0x89C, 0x00706050, + 0x900, 0x00000000, + 0x904, 0x00000023, + 0x908, 0x00000000, + 0x90C, 0x81121111, + 0x910, 0x00000002, + 0x914, 0x00000201, + 0xA00, 0x00D047C8, + 0xA04, 0x80FF000C, + 0xA08, 0x8C838300, + 0xA0C, 0x2E7F120F, + 0xA10, 0x9500BB78, + 0xA14, 0x1114D028, + 0xA18, 0x00881117, + 0xA1C, 0x89140F00, + 0xA20, 0x1A1B0000, + 0xA24, 0x090E1317, + 0xA28, 0x00000204, + 0xA2C, 0x00D30000, + 0xA70, 0x101FBF00, + 0xA74, 0x00000007, + 0xA78, 0x00000900, + 0xA7C, 0x225B0606, + 0xA80, 0x218075B1, + 0xB2C, 0x80000000, + 0xC00, 0x48071D40, + 0xC04, 0x03A05611, + 0xC08, 0x000000E4, + 0xC0C, 0x6C6C6C6C, + 0xC10, 0x08800000, + 0xC14, 0x40000100, + 0xC18, 0x08800000, + 0xC1C, 0x40000100, + 0xC20, 0x00000000, + 0xC24, 0x00000000, + 0xC28, 0x00000000, + 0xC2C, 0x00000000, + 0xC30, 0x69E9AC47, + 0xC34, 0x469652AF, + 0xC38, 0x49795994, + 0xC3C, 0x0A97971C, + 0xC40, 0x1F7C403F, + 0xC44, 0x000100B7, + 0xC48, 0xEC020107, + 0xC4C, 0x007F037F, + 0xC50, 0x69553420, + 0xC54, 0x43BC0094, + 0xC58, 0x00013159, + 0xC5C, 0x00250492, + 0xC60, 0x00000000, + 0xC64, 0x7112848B, + 0xC68, 0x47C00BFF, + 0xC6C, 0x00000036, + 0xC70, 0x2C7F000D, + 0xC74, 0x028610DB, + 0xC78, 0x0000001F, + 0xC7C, 0x00B91612, + 0xC80, 0x390000E4, + 0xC84, 0x20F60000, + 0xC88, 0x40000100, + 0xC8C, 0x20200000, + 0xC90, 0x00091521, + 0xC94, 0x00000000, + 0xC98, 0x00121820, + 0xC9C, 0x00007F7F, + 0xCA0, 0x00000000, + 0xCA4, 0x000300A0, + 0xCA8, 0xFFFF0000, + 0xCAC, 0x00000000, + 0xCB0, 0x00000000, + 0xCB4, 0x00000000, + 0xCB8, 0x00000000, + 0xCBC, 0x28000000, + 0xCC0, 0x00000000, + 0xCC4, 0x00000000, + 0xCC8, 0x00000000, + 0xCCC, 0x00000000, + 0xCD0, 0x00000000, + 0xCD4, 0x00000000, + 0xCD8, 0x64B22427, + 0xCDC, 0x00766932, + 0xCE0, 0x00222222, + 0xCE4, 0x00000000, + 0xCE8, 0x37644302, + 0xCEC, 0x2F97D40C, + 0xD00, 0x00000740, + 0xD04, 0x00020401, + 0xD08, 0x0000907F, + 0xD0C, 0x20010201, + 0xD10, 0xA0633333, + 0xD14, 0x3333BC43, + 0xD18, 0x7A8F5B6F, + 0xD2C, 0xCC979975, + 0xD30, 0x00000000, + 0xD34, 0x80608000, + 0xD38, 0x00000000, + 0xD3C, 0x00127353, + 0xD40, 0x00000000, + 0xD44, 0x00000000, + 0xD48, 0x00000000, + 0xD4C, 0x00000000, + 0xD50, 0x6437140A, + 0xD54, 0x00000000, + 0xD58, 0x00000282, + 0xD5C, 0x30032064, + 0xD60, 0x4653DE68, + 0xD64, 0x04518A3C, + 0xD68, 0x00002101, + 0xD6C, 0x2A201C16, + 0xD70, 0x1812362E, + 0xD74, 0x322C2220, + 0xD78, 0x000E3C24, + 0xE00, 0x2D2D2D2D, + 0xE04, 0x2D2D2D2D, + 0xE08, 0x0390272D, + 0xE10, 0x2D2D2D2D, + 0xE14, 0x2D2D2D2D, + 0xE18, 0x2D2D2D2D, + 0xE1C, 0x2D2D2D2D, + 0xE28, 0x00000000, + 0xE30, 0x1000DC1F, + 0xE34, 0x10008C1F, + 0xE38, 0x02140102, + 0xE3C, 0x681604C2, + 0xE40, 0x01007C00, + 0xE44, 0x01004800, + 0xE48, 0xFB000000, + 0xE4C, 0x000028D1, + 0xE50, 0x1000DC1F, + 0xE54, 0x10008C1F, + 0xE58, 0x02140102, + 0xE5C, 0x28160D05, + 0xE60, 0x00000008, + 0xE68, 0x001B25A4, + 0xE6C, 0x00C00014, + 0xE70, 0x00C00014, + 0xE74, 0x01000014, + 0xE78, 0x01000014, + 0xE7C, 0x01000014, + 0xE80, 0x01000014, + 0xE84, 0x00C00014, + 0xE88, 0x01000014, + 0xE8C, 0x00C00014, + 0xED0, 0x00C00014, + 0xED4, 0x00C00014, + 0xED8, 0x00C00014, + 0xEDC, 0x00000014, + 0xEE0, 0x00000014, + 0xEEC, 0x01C00014, + 0xF14, 0x00000003, + 0xF4C, 0x00000000, + 0xF00, 0x00000300, + +}; + +void +ODM_ReadAndConfig_PHY_REG_1T_ICUT_8188E( + IN PDM_ODM_T pDM_Odm + ) +{ + #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) + + u4Byte hex = 0; + u4Byte i = 0; + u2Byte count = 0; + pu4Byte ptr_array = NULL; + u1Byte platform = pDM_Odm->SupportPlatform; + u1Byte _interface = pDM_Odm->SupportInterface; + u1Byte board = pDM_Odm->BoardType; + u4Byte ArrayLen = sizeof(Array_MP_8188E_PHY_REG_1T_ICUT)/sizeof(u4Byte); + pu4Byte Array = Array_MP_8188E_PHY_REG_1T_ICUT; + + + hex += board; + hex += _interface << 8; + hex += platform << 16; + hex += 0xFF000000; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_8188E_PHY_REG_1T_ICUT, hex = 0x%X\n", hex)); + + for (i = 0; i < ArrayLen; i += 2 ) + { + u4Byte v1 = Array[i]; + u4Byte v2 = Array[i+1]; + + // This (offset, data) pair meets the condition. + if ( v1 < 0xCDCDCDCD ) + { + odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2); + continue; + } + else + { // This line is the start line of branch. + if ( !CheckCondition(Array[i], hex) ) + { // Discard the following (offset, data) pairs. + READ_NEXT_PAIR(v1, v2, i); + while (v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + i -= 2; // prevent from for-loop += 2 + } + else // Configure matched pairs and skip to end of if-else. + { + READ_NEXT_PAIR(v1, v2, i); + while (v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2); + READ_NEXT_PAIR(v1, v2, i); + } + + while (v2 != 0xDEAD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + + } + } + } + +} + + +/****************************************************************************** +* PHY_REG_PG.TXT +******************************************************************************/ + +u4Byte Array_PHY_REG_PG_8188E[] = { + 0, 0, 0, 0x00000e08, 0x0000ff00, 0x00004000, + 0, 0, 0, 0x0000086c, 0xffffff00, 0x34363800, + 0, 0, 0, 0x00000e00, 0xffffffff, 0x42444646, + 0, 0, 0, 0x00000e04, 0xffffffff, 0x30343840, + 0, 0, 0, 0x00000e10, 0xffffffff, 0x38404244, + 0, 0, 0, 0x00000e14, 0xffffffff, 0x26303436 + +}; + +void +ODM_ReadAndConfig_PHY_REG_PG_8188E( + IN PDM_ODM_T pDM_Odm + ) +{ + u4Byte hex = 0; + u4Byte i = 0; + u2Byte count = 0; + pu4Byte ptr_array = NULL; + u1Byte platform = pDM_Odm->SupportPlatform; + u1Byte interfaceValue = pDM_Odm->SupportInterface; + u1Byte board = pDM_Odm->BoardType; + u4Byte ArrayLen = sizeof(Array_PHY_REG_PG_8188E)/sizeof(u4Byte); + pu4Byte Array = Array_PHY_REG_PG_8188E; + BOOLEAN biol = FALSE; + + hex += board; + hex += interfaceValue << 8; + hex += platform << 16; + hex += 0xFF000000; + for (i = 0; i < ArrayLen; i += 6 ) + { + u4Byte v1 = Array[i]; + u4Byte v2 = Array[i+1]; + u4Byte v3 = Array[i+2]; + u4Byte v4 = Array[i+3]; + u4Byte v5 = Array[i+4]; + u4Byte v6 = Array[i+5]; + + // this line is a line of pure_body + if ( v1 < 0xCDCDCDCD ) + { + + odm_ConfigBB_PHY_REG_PG_8188E(pDM_Odm, v1, v2, v3); + + continue; + } + else + { // this line is the start of branch + if ( !CheckCondition(Array[i], hex) ) + { // don't need the hw_body + i += 2; // skip the pair of expression + v1 = Array[i]; + v2 = Array[i+1]; + v3 = Array[i+2]; + while (v2 != 0xDEAD) + { + i += 3; + v1 = Array[i]; + v2 = Array[i+1]; + v3 = Array[i+1]; + } + } + } + } + +} + + + +#endif // end of HWIMG_SUPPORT + diff --git a/hal/OUTSRC/rtl8188e/HalHWImg8188E_BB.h b/hal/HalHWImg8188E_BB.h similarity index 100% rename from hal/OUTSRC/rtl8188e/HalHWImg8188E_BB.h rename to hal/HalHWImg8188E_BB.h diff --git a/hal/OUTSRC/rtl8188e/HalHWImg8188E_FW.c b/hal/HalHWImg8188E_FW.c similarity index 100% rename from hal/OUTSRC/rtl8188e/HalHWImg8188E_FW.c rename to hal/HalHWImg8188E_FW.c diff --git a/hal/OUTSRC/rtl8188e/HalHWImg8188E_FW.h b/hal/HalHWImg8188E_FW.h similarity index 100% rename from hal/OUTSRC/rtl8188e/HalHWImg8188E_FW.h rename to hal/HalHWImg8188E_FW.h diff --git a/hal/HalHWImg8188E_MAC.c b/hal/HalHWImg8188E_MAC.c old mode 100644 new mode 100755 index bac0238..4a60c63 --- a/hal/HalHWImg8188E_MAC.c +++ b/hal/HalHWImg8188E_MAC.c @@ -1,230 +1,502 @@ -/****************************************************************************** -* -* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -* -* This program is free software; you can redistribute it and/or modify it -* under the terms of version 2 of the GNU General Public License as -* published by the Free Software Foundation. -* -* This program is distributed in the hope that it will be useful, but WITHOUT -* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -* more details. -* -* You should have received a copy of the GNU General Public License along with -* this program; if not, write to the Free Software Foundation, Inc., -* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -* -* -******************************************************************************/ - -#include "odm_precomp.h" -#include - -static bool Checkcondition(const u32 condition, const u32 hex) -{ - u32 _board = (hex & 0x000000FF); - u32 _interface = (hex & 0x0000FF00) >> 8; - u32 _platform = (hex & 0x00FF0000) >> 16; - u32 cond = condition; - - if (condition == 0xCDCDCDCD) - return true; - - cond = condition & 0x000000FF; - if ((_board == cond) && cond != 0x00) - return false; - - cond = condition & 0x0000FF00; - cond = cond >> 8; - if ((_interface & cond) == 0 && cond != 0x07) - return false; - - cond = condition & 0x00FF0000; - cond = cond >> 16; - if ((_platform & cond) == 0 && cond != 0x0F) - return false; - return true; -} - -/****************************************************************************** -* MAC_REG.TXT -******************************************************************************/ - -static u32 array_MAC_REG_8188E[] = { - 0x026, 0x00000041, - 0x027, 0x00000035, - 0x428, 0x0000000A, - 0x429, 0x00000010, - 0x430, 0x00000000, - 0x431, 0x00000001, - 0x432, 0x00000002, - 0x433, 0x00000004, - 0x434, 0x00000005, - 0x435, 0x00000006, - 0x436, 0x00000007, - 0x437, 0x00000008, - 0x438, 0x00000000, - 0x439, 0x00000000, - 0x43A, 0x00000001, - 0x43B, 0x00000002, - 0x43C, 0x00000004, - 0x43D, 0x00000005, - 0x43E, 0x00000006, - 0x43F, 0x00000007, - 0x440, 0x0000005D, - 0x441, 0x00000001, - 0x442, 0x00000000, - 0x444, 0x00000015, - 0x445, 0x000000F0, - 0x446, 0x0000000F, - 0x447, 0x00000000, - 0x458, 0x00000041, - 0x459, 0x000000A8, - 0x45A, 0x00000072, - 0x45B, 0x000000B9, - 0x460, 0x00000066, - 0x461, 0x00000066, - 0x480, 0x00000008, - 0x4C8, 0x000000FF, - 0x4C9, 0x00000008, - 0x4CC, 0x000000FF, - 0x4CD, 0x000000FF, - 0x4CE, 0x00000001, - 0x4D3, 0x00000001, - 0x500, 0x00000026, - 0x501, 0x000000A2, - 0x502, 0x0000002F, - 0x503, 0x00000000, - 0x504, 0x00000028, - 0x505, 0x000000A3, - 0x506, 0x0000005E, - 0x507, 0x00000000, - 0x508, 0x0000002B, - 0x509, 0x000000A4, - 0x50A, 0x0000005E, - 0x50B, 0x00000000, - 0x50C, 0x0000004F, - 0x50D, 0x000000A4, - 0x50E, 0x00000000, - 0x50F, 0x00000000, - 0x512, 0x0000001C, - 0x514, 0x0000000A, - 0x516, 0x0000000A, - 0x525, 0x0000004F, - 0x550, 0x00000010, - 0x551, 0x00000010, - 0x559, 0x00000002, - 0x55D, 0x000000FF, - 0x605, 0x00000030, - 0x608, 0x0000000E, - 0x609, 0x0000002A, - 0x620, 0x000000FF, - 0x621, 0x000000FF, - 0x622, 0x000000FF, - 0x623, 0x000000FF, - 0x624, 0x000000FF, - 0x625, 0x000000FF, - 0x626, 0x000000FF, - 0x627, 0x000000FF, - 0x652, 0x00000020, - 0x63C, 0x0000000A, - 0x63D, 0x0000000A, - 0x63E, 0x0000000E, - 0x63F, 0x0000000E, - 0x640, 0x00000040, - 0x66E, 0x00000005, - 0x700, 0x00000021, - 0x701, 0x00000043, - 0x702, 0x00000065, - 0x703, 0x00000087, - 0x708, 0x00000021, - 0x709, 0x00000043, - 0x70A, 0x00000065, - 0x70B, 0x00000087, -}; - -enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm) -{ - #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = array[i]; v2 = array[i+1]; } while (0) - - u32 hex = 0; - u32 i; - u8 platform = dm_odm->SupportPlatform; - u8 interface_val = dm_odm->SupportInterface; - u8 board = dm_odm->BoardType; - u32 array_len = sizeof(array_MAC_REG_8188E)/sizeof(u32); - u32 *array = array_MAC_REG_8188E; - bool biol = false; - - struct adapter *adapt = dm_odm->Adapter; - struct xmit_frame *pxmit_frame = NULL; - u8 bndy_cnt = 1; - enum HAL_STATUS rst = HAL_STATUS_SUCCESS; - hex += board; - hex += interface_val << 8; - hex += platform << 16; - hex += 0xFF000000; - - biol = rtw_IOL_applied(adapt); - - if (biol) { - pxmit_frame = rtw_IOL_accquire_xmit_frame(adapt); - if (pxmit_frame == NULL) { - pr_info("rtw_IOL_accquire_xmit_frame failed\n"); - return HAL_STATUS_FAILURE; - } - } - - for (i = 0; i < array_len; i += 2) { - u32 v1 = array[i]; - u32 v2 = array[i+1]; - - /* This (offset, data) pair meets the condition. */ - if (v1 < 0xCDCDCDCD) { - if (biol) { - if (rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - rtw_IOL_append_WB_cmd(pxmit_frame, (u16)v1, (u8)v2, 0xFF); - } else { - odm_ConfigMAC_8188E(dm_odm, v1, (u8)v2); - } - continue; - } else { /* This line is the start line of branch. */ - if (!Checkcondition(array[i], hex)) { - /* Discard the following (offset, data) pairs. */ - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < array_len - 2) { - READ_NEXT_PAIR(v1, v2, i); - } - i -= 2; /* prevent from for-loop += 2 */ - } else { /* Configure matched pairs and skip to end of if-else. */ - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < array_len - 2) { - if (biol) { - if (rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - rtw_IOL_append_WB_cmd(pxmit_frame, (u16)v1, (u8)v2, 0xFF); - } else { - odm_ConfigMAC_8188E(dm_odm, v1, (u8)v2); - } - - READ_NEXT_PAIR(v1, v2, i); - } - while (v2 != 0xDEAD && i < array_len - 2) - READ_NEXT_PAIR(v1, v2, i); - } - } - } - if (biol) { - if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) { - pr_info("~~~ MAC IOL_exec_cmds Failed !!!\n"); - rst = HAL_STATUS_FAILURE; - } - } - return rst; -} +/****************************************************************************** +* +* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of version 2 of the GNU General Public License as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along with +* this program; if not, write to the Free Software Foundation, Inc., +* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +* +* +******************************************************************************/ + +#include "odm_precomp.h" +#ifdef CONFIG_IOL_IOREG_CFG +#include +#endif +#if (RTL8188E_SUPPORT == 1) +static BOOLEAN +CheckCondition( + const u4Byte Condition, + const u4Byte Hex + ) +{ + u4Byte _board = (Hex & 0x000000FF); + u4Byte _interface = (Hex & 0x0000FF00) >> 8; + u4Byte _platform = (Hex & 0x00FF0000) >> 16; + u4Byte cond = Condition; + + if ( Condition == 0xCDCDCDCD ) + return TRUE; + + cond = Condition & 0x000000FF; + if ( (_board != cond) && (cond != 0xFF) ) + return FALSE; + + cond = Condition & 0x0000FF00; + cond = cond >> 8; + if ( ((_interface & cond) == 0) && (cond != 0x07) ) + return FALSE; + + cond = Condition & 0x00FF0000; + cond = cond >> 16; + if ( ((_platform & cond) == 0) && (cond != 0x0F) ) + return FALSE; + return TRUE; +} + + +/****************************************************************************** +* MAC_REG.TXT +******************************************************************************/ + +u4Byte Array_MAC_REG_8188E[] = { + 0x026, 0x00000041, + 0x027, 0x00000035, + 0xFF0F0718, 0xABCD, + 0x040, 0x0000000C, + 0xCDCDCDCD, 0xCDCD, + 0x040, 0x00000000, + 0xFF0F0718, 0xDEAD, + 0x428, 0x0000000A, + 0x429, 0x00000010, + 0x430, 0x00000000, + 0x431, 0x00000001, + 0x432, 0x00000002, + 0x433, 0x00000004, + 0x434, 0x00000005, + 0x435, 0x00000006, + 0x436, 0x00000007, + 0x437, 0x00000008, + 0x438, 0x00000000, + 0x439, 0x00000000, + 0x43A, 0x00000001, + 0x43B, 0x00000002, + 0x43C, 0x00000004, + 0x43D, 0x00000005, + 0x43E, 0x00000006, + 0x43F, 0x00000007, + 0x440, 0x0000005D, + 0x441, 0x00000001, + 0x442, 0x00000000, + 0x444, 0x00000015, + 0x445, 0x000000F0, + 0x446, 0x0000000F, + 0x447, 0x00000000, + 0x458, 0x00000041, + 0x459, 0x000000A8, + 0x45A, 0x00000072, + 0x45B, 0x000000B9, + 0x460, 0x00000066, + 0x461, 0x00000066, + 0x480, 0x00000008, + 0x4C8, 0x000000FF, + 0x4C9, 0x00000008, + 0x4CC, 0x000000FF, + 0x4CD, 0x000000FF, + 0x4CE, 0x00000001, + 0x4D3, 0x00000001, + 0x500, 0x00000026, + 0x501, 0x000000A2, + 0x502, 0x0000002F, + 0x503, 0x00000000, + 0x504, 0x00000028, + 0x505, 0x000000A3, + 0x506, 0x0000005E, + 0x507, 0x00000000, + 0x508, 0x0000002B, + 0x509, 0x000000A4, + 0x50A, 0x0000005E, + 0x50B, 0x00000000, + 0x50C, 0x0000004F, + 0x50D, 0x000000A4, + 0x50E, 0x00000000, + 0x50F, 0x00000000, + 0x512, 0x0000001C, + 0x514, 0x0000000A, + 0x516, 0x0000000A, + 0x525, 0x0000004F, + 0x550, 0x00000010, + 0x551, 0x00000010, + 0x559, 0x00000002, + 0x55D, 0x000000FF, + 0x605, 0x00000030, + 0x608, 0x0000000E, + 0x609, 0x0000002A, + 0x620, 0x000000FF, + 0x621, 0x000000FF, + 0x622, 0x000000FF, + 0x623, 0x000000FF, + 0x624, 0x000000FF, + 0x625, 0x000000FF, + 0x626, 0x000000FF, + 0x627, 0x000000FF, + 0x652, 0x00000020, + 0x63C, 0x0000000A, + 0x63D, 0x0000000A, + 0x63E, 0x0000000E, + 0x63F, 0x0000000E, + 0x640, 0x00000040, + 0x66E, 0x00000005, + 0x700, 0x00000021, + 0x701, 0x00000043, + 0x702, 0x00000065, + 0x703, 0x00000087, + 0x708, 0x00000021, + 0x709, 0x00000043, + 0x70A, 0x00000065, + 0x70B, 0x00000087, +}; + +HAL_STATUS +ODM_ReadAndConfig_MAC_REG_8188E( + IN PDM_ODM_T pDM_Odm + ) +{ + #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) + + u4Byte hex = 0; + u4Byte i = 0; + u2Byte count = 0; + pu4Byte ptr_array = NULL; + u1Byte platform = pDM_Odm->SupportPlatform; + u1Byte interfaceValue = pDM_Odm->SupportInterface; + u1Byte board = pDM_Odm->BoardType; + u4Byte ArrayLen = sizeof(Array_MAC_REG_8188E)/sizeof(u4Byte); + pu4Byte Array = Array_MAC_REG_8188E; + BOOLEAN biol = FALSE; + +#ifdef CONFIG_IOL_IOREG_CFG + PADAPTER Adapter = pDM_Odm->Adapter; + struct xmit_frame *pxmit_frame; + u8 bndy_cnt = 1; + #ifdef CONFIG_IOL_IOREG_CFG_DBG + struct cmd_cmp cmpdata[ArrayLen]; + u4Byte cmpdata_idx=0; + #endif +#endif //CONFIG_IOL_IOREG_CFG + HAL_STATUS rst =HAL_STATUS_SUCCESS; + hex += board; + hex += interfaceValue << 8; + hex += platform << 16; + hex += 0xFF000000; + +#ifdef CONFIG_IOL_IOREG_CFG + biol = rtw_IOL_applied(Adapter); + + if(biol){ + if((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) + { + printk("rtw_IOL_accquire_xmit_frame failed\n"); + return HAL_STATUS_FAILURE; + } + } + +#endif //CONFIG_IOL_IOREG_CFG + + for (i = 0; i < ArrayLen; i += 2 ) + { + u4Byte v1 = Array[i]; + u4Byte v2 = Array[i+1]; + + // This (offset, data) pair meets the condition. + if ( v1 < 0xCDCDCDCD ) + { + #ifdef CONFIG_IOL_IOREG_CFG + + if(biol){ + + if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) + bndy_cnt++; + rtw_IOL_append_WB_cmd(pxmit_frame,(u2Byte)v1, (u1Byte)v2,0xFF); + #ifdef CONFIG_IOL_IOREG_CFG_DBG + cmpdata[cmpdata_idx].addr = v1; + cmpdata[cmpdata_idx].value= v2; + cmpdata_idx++; + #endif + } + else + #endif //endif CONFIG_IOL_IOREG_CFG + { + odm_ConfigMAC_8188E(pDM_Odm, v1, (u1Byte)v2); + } + continue; + } + else + { // This line is the start line of branch. + if ( !CheckCondition(Array[i], hex) ) + { // Discard the following (offset, data) pairs. + READ_NEXT_PAIR(v1, v2, i); + while ( v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + i -= 2; // prevent from for-loop += 2 + } + else // Configure matched pairs and skip to end of if-else. + { + READ_NEXT_PAIR(v1, v2, i); + while ( v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + #ifdef CONFIG_IOL_IOREG_CFG + if(biol){ + if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) + bndy_cnt++; + rtw_IOL_append_WB_cmd(pxmit_frame,(u2Byte)v1, (u1Byte)v2,0xFF); + #ifdef CONFIG_IOL_IOREG_CFG_DBG + cmpdata[cmpdata_idx].addr = v1; + cmpdata[cmpdata_idx].value= v2; + cmpdata_idx++; + #endif + } + else + #endif //#ifdef CONFIG_IOL_IOREG_CFG + { + odm_ConfigMAC_8188E(pDM_Odm, v1, (u1Byte)v2); + } + + READ_NEXT_PAIR(v1, v2, i); + } + + while (v2 != 0xDEAD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + + } + } + } + +#ifdef CONFIG_IOL_IOREG_CFG + if(biol){ + //printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt); + + if(rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) + { + #ifdef CONFIG_IOL_IOREG_CFG_DBG + printk("~~~ IOL Config MAC Success !!! \n"); + //compare writed data + { + u4Byte idx; + u1Byte cdata; + // HAL_STATUS_FAILURE; + printk(" MAC data compare => array_len:%d \n",cmpdata_idx); + for(idx=0;idx< cmpdata_idx;idx++) + { + cdata = ODM_Read1Byte(pDM_Odm, cmpdata[idx].addr); + if(cdata != cmpdata[idx].value){ + printk("### MAC data compared failed !! addr:0x%04x, data:(0x%02x : 0x%02x) ###\n", + cmpdata[idx].addr,cmpdata[idx].value,cdata); + //rst = HAL_STATUS_FAILURE; + } + } + + + //dump data from TX packet buffer + //if(rst == HAL_STATUS_FAILURE) + { + rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); + } + + } + #endif //CONFIG_IOL_IOREG_CFG_DBG + + } + else{ + printk("~~~ MAC IOL_exec_cmds Failed !!! \n"); + #ifdef CONFIG_IOL_IOREG_CFG_DBG + { + //dump data from TX packet buffer + rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); + } + #endif //CONFIG_IOL_IOREG_CFG_DBG + rst = HAL_STATUS_FAILURE; + } + + } +#endif //#ifdef CONFIG_IOL_IOREG_CFG + return rst; +} + +/****************************************************************************** +* MAC_REG_ICUT.TXT +******************************************************************************/ + +u4Byte Array_MP_8188E_MAC_REG_ICUT[] = { + 0x026, 0x00000041, + 0x027, 0x00000035, + 0x428, 0x0000000A, + 0x429, 0x00000010, + 0x430, 0x00000000, + 0x431, 0x00000001, + 0x432, 0x00000002, + 0x433, 0x00000004, + 0x434, 0x00000005, + 0x435, 0x00000006, + 0x436, 0x00000007, + 0x437, 0x00000008, + 0x438, 0x00000000, + 0x439, 0x00000000, + 0x43A, 0x00000001, + 0x43B, 0x00000002, + 0x43C, 0x00000004, + 0x43D, 0x00000005, + 0x43E, 0x00000006, + 0x43F, 0x00000007, + 0x440, 0x0000005D, + 0x441, 0x00000001, + 0x442, 0x00000000, + 0x444, 0x00000015, + 0x445, 0x000000F0, + 0x446, 0x0000000F, + 0x447, 0x00000000, + 0x458, 0x00000041, + 0x459, 0x000000A8, + 0x45A, 0x00000072, + 0x45B, 0x000000B9, + 0x460, 0x00000066, + 0x461, 0x00000066, + 0x480, 0x00000008, + 0x4C8, 0x000000FF, + 0x4C9, 0x00000008, + 0x4CC, 0x000000FF, + 0x4CD, 0x000000FF, + 0x4CE, 0x00000001, + 0x4D3, 0x00000001, + 0x500, 0x00000026, + 0x501, 0x000000A2, + 0x502, 0x0000002F, + 0x503, 0x00000000, + 0x504, 0x00000028, + 0x505, 0x000000A3, + 0x506, 0x0000005E, + 0x507, 0x00000000, + 0x508, 0x0000002B, + 0x509, 0x000000A4, + 0x50A, 0x0000005E, + 0x50B, 0x00000000, + 0x50C, 0x0000004F, + 0x50D, 0x000000A4, + 0x50E, 0x00000000, + 0x50F, 0x00000000, + 0x512, 0x0000001C, + 0x514, 0x0000000A, + 0x516, 0x0000000A, + 0x525, 0x0000004F, + 0x550, 0x00000010, + 0x551, 0x00000010, + 0x559, 0x00000002, + 0x55D, 0x000000FF, + 0x605, 0x00000030, + 0x608, 0x0000000E, + 0x609, 0x0000002A, + 0x620, 0x000000FF, + 0x621, 0x000000FF, + 0x622, 0x000000FF, + 0x623, 0x000000FF, + 0x624, 0x000000FF, + 0x625, 0x000000FF, + 0x626, 0x000000FF, + 0x627, 0x000000FF, + 0x652, 0x00000020, + 0x63C, 0x0000000A, + 0x63D, 0x0000000A, + 0x63E, 0x0000000E, + 0x63F, 0x0000000E, + 0x640, 0x00000040, + 0x66E, 0x00000005, + 0x700, 0x00000021, + 0x701, 0x00000043, + 0x702, 0x00000065, + 0x703, 0x00000087, + 0x708, 0x00000021, + 0x709, 0x00000043, + 0x70A, 0x00000065, + 0x70B, 0x00000087, + +}; + +void +ODM_ReadAndConfig_MAC_REG_ICUT_8188E( + IN PDM_ODM_T pDM_Odm + ) +{ + #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) + + u4Byte hex = 0; + u4Byte i = 0; + u2Byte count = 0; + pu4Byte ptr_array = NULL; + u1Byte platform = pDM_Odm->SupportPlatform; + u1Byte _interface = pDM_Odm->SupportInterface; + u1Byte board = pDM_Odm->BoardType; + u4Byte ArrayLen = sizeof(Array_MP_8188E_MAC_REG_ICUT)/sizeof(u4Byte); + pu4Byte Array = Array_MP_8188E_MAC_REG_ICUT; + + + hex += board; + hex += _interface << 8; + hex += platform << 16; + hex += 0xFF000000; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_8188E_MAC_REG_ICUT, hex = 0x%X\n", hex)); + + for (i = 0; i < ArrayLen; i += 2 ) + { + u4Byte v1 = Array[i]; + u4Byte v2 = Array[i+1]; + + // This (offset, data) pair meets the condition. + if ( v1 < 0xCDCDCDCD ) + { + odm_ConfigMAC_8188E(pDM_Odm, v1, (u1Byte)v2); + continue; + } + else + { // This line is the start line of branch. + if ( !CheckCondition(Array[i], hex) ) + { // Discard the following (offset, data) pairs. + READ_NEXT_PAIR(v1, v2, i); + while (v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + i -= 2; // prevent from for-loop += 2 + } + else // Configure matched pairs and skip to end of if-else. + { + READ_NEXT_PAIR(v1, v2, i); + while (v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + odm_ConfigMAC_8188E(pDM_Odm, v1, (u1Byte)v2); + READ_NEXT_PAIR(v1, v2, i); + } + + while (v2 != 0xDEAD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + + } + } + } + +} + +#endif // end of HWIMG_SUPPORT + diff --git a/hal/OUTSRC/rtl8188e/HalHWImg8188E_MAC.h b/hal/HalHWImg8188E_MAC.h similarity index 100% rename from hal/OUTSRC/rtl8188e/HalHWImg8188E_MAC.h rename to hal/HalHWImg8188E_MAC.h diff --git a/hal/HalHWImg8188E_RF.c b/hal/HalHWImg8188E_RF.c old mode 100644 new mode 100755 index 51ac3a7..8b91daa --- a/hal/HalHWImg8188E_RF.c +++ b/hal/HalHWImg8188E_RF.c @@ -1,268 +1,569 @@ -/****************************************************************************** -* -* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -* -* This program is free software; you can redistribute it and/or modify it -* under the terms of version 2 of the GNU General Public License as -* published by the Free Software Foundation. -* -* This program is distributed in the hope that it will be useful, but WITHOUT -* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -* more details. -* -* You should have received a copy of the GNU General Public License along with -* this program; if not, write to the Free Software Foundation, Inc., -* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -* -* -******************************************************************************/ - -#include "odm_precomp.h" - -#include - -static bool CheckCondition(const u32 Condition, const u32 Hex) -{ - u32 _board = (Hex & 0x000000FF); - u32 _interface = (Hex & 0x0000FF00) >> 8; - u32 _platform = (Hex & 0x00FF0000) >> 16; - u32 cond = Condition; - - if (Condition == 0xCDCDCDCD) - return true; - - cond = Condition & 0x000000FF; - if ((_board == cond) && cond != 0x00) - return false; - - cond = Condition & 0x0000FF00; - cond = cond >> 8; - if ((_interface & cond) == 0 && cond != 0x07) - return false; - - cond = Condition & 0x00FF0000; - cond = cond >> 16; - if ((_platform & cond) == 0 && cond != 0x0F) - return false; - return true; -} - -/****************************************************************************** -* RadioA_1T.TXT -******************************************************************************/ - -static u32 Array_RadioA_1T_8188E[] = { - 0x000, 0x00030000, - 0x008, 0x00084000, - 0x018, 0x00000407, - 0x019, 0x00000012, - 0x01E, 0x00080009, - 0x01F, 0x00000880, - 0x02F, 0x0001A060, - 0x03F, 0x00000000, - 0x042, 0x000060C0, - 0x057, 0x000D0000, - 0x058, 0x000BE180, - 0x067, 0x00001552, - 0x083, 0x00000000, - 0x0B0, 0x000FF8FC, - 0x0B1, 0x00054400, - 0x0B2, 0x000CCC19, - 0x0B4, 0x00043003, - 0x0B6, 0x0004953E, - 0x0B7, 0x0001C718, - 0x0B8, 0x000060FF, - 0x0B9, 0x00080001, - 0x0BA, 0x00040000, - 0x0BB, 0x00000400, - 0x0BF, 0x000C0000, - 0x0C2, 0x00002400, - 0x0C3, 0x00000009, - 0x0C4, 0x00040C91, - 0x0C5, 0x00099999, - 0x0C6, 0x000000A3, - 0x0C7, 0x00088820, - 0x0C8, 0x00076C06, - 0x0C9, 0x00000000, - 0x0CA, 0x00080000, - 0x0DF, 0x00000180, - 0x0EF, 0x000001A0, - 0x051, 0x0006B27D, - 0xFF0F041F, 0xABCD, - 0x052, 0x0007E4DD, - 0xCDCDCDCD, 0xCDCD, - 0x052, 0x0007E49D, - 0xFF0F041F, 0xDEAD, - 0x053, 0x00000073, - 0x056, 0x00051FF3, - 0x035, 0x00000086, - 0x035, 0x00000186, - 0x035, 0x00000286, - 0x036, 0x00001C25, - 0x036, 0x00009C25, - 0x036, 0x00011C25, - 0x036, 0x00019C25, - 0x0B6, 0x00048538, - 0x018, 0x00000C07, - 0x05A, 0x0004BD00, - 0x019, 0x000739D0, - 0x034, 0x0000ADF3, - 0x034, 0x00009DF0, - 0x034, 0x00008DED, - 0x034, 0x00007DEA, - 0x034, 0x00006DE7, - 0x034, 0x000054EE, - 0x034, 0x000044EB, - 0x034, 0x000034E8, - 0x034, 0x0000246B, - 0x034, 0x00001468, - 0x034, 0x0000006D, - 0x000, 0x00030159, - 0x084, 0x00068200, - 0x086, 0x000000CE, - 0x087, 0x00048A00, - 0x08E, 0x00065540, - 0x08F, 0x00088000, - 0x0EF, 0x000020A0, - 0x03B, 0x000F02B0, - 0x03B, 0x000EF7B0, - 0x03B, 0x000D4FB0, - 0x03B, 0x000CF060, - 0x03B, 0x000B0090, - 0x03B, 0x000A0080, - 0x03B, 0x00090080, - 0x03B, 0x0008F780, - 0x03B, 0x000722B0, - 0x03B, 0x0006F7B0, - 0x03B, 0x00054FB0, - 0x03B, 0x0004F060, - 0x03B, 0x00030090, - 0x03B, 0x00020080, - 0x03B, 0x00010080, - 0x03B, 0x0000F780, - 0x0EF, 0x000000A0, - 0x000, 0x00010159, - 0x018, 0x0000F407, - 0xFFE, 0x00000000, - 0xFFE, 0x00000000, - 0x01F, 0x00080003, - 0xFFE, 0x00000000, - 0xFFE, 0x00000000, - 0x01E, 0x00000001, - 0x01F, 0x00080000, - 0x000, 0x00033E60, -}; - -enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm) -{ - #define READ_NEXT_PAIR(v1, v2, i) do \ - { i += 2; v1 = Array[i]; \ - v2 = Array[i+1]; } while (0) - - u32 hex = 0; - u32 i = 0; - u8 platform = pDM_Odm->SupportPlatform; - u8 interfaceValue = pDM_Odm->SupportInterface; - u8 board = pDM_Odm->BoardType; - u32 ArrayLen = sizeof(Array_RadioA_1T_8188E)/sizeof(u32); - u32 *Array = Array_RadioA_1T_8188E; - bool biol = false; - struct adapter *Adapter = pDM_Odm->Adapter; - struct xmit_frame *pxmit_frame = NULL; - u8 bndy_cnt = 1; - enum HAL_STATUS rst = HAL_STATUS_SUCCESS; - - hex += board; - hex += interfaceValue << 8; - hex += platform << 16; - hex += 0xFF000000; - biol = rtw_IOL_applied(Adapter); - - if (biol) { - pxmit_frame = rtw_IOL_accquire_xmit_frame(Adapter); - if (pxmit_frame == NULL) { - pr_info("rtw_IOL_accquire_xmit_frame failed\n"); - return HAL_STATUS_FAILURE; - } - } - - for (i = 0; i < ArrayLen; i += 2) { - u32 v1 = Array[i]; - u32 v2 = Array[i+1]; - - /* This (offset, data) pair meets the condition. */ - if (v1 < 0xCDCDCDCD) { - if (biol) { - if (rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - - if (v1 == 0xffe) - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 50); - else if (v1 == 0xfd) - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 5); - else if (v1 == 0xfc) - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 1); - else if (v1 == 0xfb) - rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 50); - else if (v1 == 0xfa) - rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 5); - else if (v1 == 0xf9) - rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 1); - else - rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A, (u16)v1, v2, bRFRegOffsetMask); - } else { - odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2); - } - continue; - } else { /* This line is the start line of branch. */ - if (!CheckCondition(Array[i], hex)) { - /* Discard the following (offset, data) pairs. */ - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen - 2) - READ_NEXT_PAIR(v1, v2, i); - i -= 2; /* prevent from for-loop += 2 */ - } else { /* Configure matched pairs and skip to end of if-else. */ - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen - 2) { - if (biol) { - if (rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - - if (v1 == 0xffe) - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 50); - else if (v1 == 0xfd) - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 5); - else if (v1 == 0xfc) - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 1); - else if (v1 == 0xfb) - rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 50); - else if (v1 == 0xfa) - rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 5); - else if (v1 == 0xf9) - rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 1); - else - rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A, (u16)v1, v2, bRFRegOffsetMask); - } else { - odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2); - } - READ_NEXT_PAIR(v1, v2, i); - } - - while (v2 != 0xDEAD && i < ArrayLen - 2) - READ_NEXT_PAIR(v1, v2, i); - } - } - } - if (biol) { - if (!rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) { - rst = HAL_STATUS_FAILURE; - pr_info("~~~ IOL Config %s Failed !!!\n", __func__); - } - } - return rst; -} +/****************************************************************************** +* +* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of version 2 of the GNU General Public License as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along with +* this program; if not, write to the Free Software Foundation, Inc., +* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +* +* +******************************************************************************/ + +#include "odm_precomp.h" + +#ifdef CONFIG_IOL_IOREG_CFG +#include +#endif + +#if (RTL8188E_SUPPORT == 1) +static BOOLEAN +CheckCondition( + const u4Byte Condition, + const u4Byte Hex + ) +{ + u4Byte _board = (Hex & 0x000000FF); + u4Byte _interface = (Hex & 0x0000FF00) >> 8; + u4Byte _platform = (Hex & 0x00FF0000) >> 16; + u4Byte cond = Condition; + + if ( Condition == 0xCDCDCDCD ) + return TRUE; + + cond = Condition & 0x000000FF; + if ( (_board != cond) && (cond != 0xFF) ) + return FALSE; + + cond = Condition & 0x0000FF00; + cond = cond >> 8; + if ( ((_interface & cond) == 0) && (cond != 0x07) ) + return FALSE; + + cond = Condition & 0x00FF0000; + cond = cond >> 16; + if ( ((_platform & cond) == 0) && (cond != 0x0F) ) + return FALSE; + return TRUE; +} + + +/****************************************************************************** +* RadioA_1T.TXT +******************************************************************************/ + +u4Byte Array_RadioA_1T_8188E[] = { + 0x000, 0x00030000, + 0x008, 0x00084000, + 0x018, 0x00000407, + 0x019, 0x00000012, + 0x01E, 0x00080009, + 0x01F, 0x00000880, + 0x02F, 0x0001A060, + 0x03F, 0x00000000, + 0x042, 0x000060C0, + 0x057, 0x000D0000, + 0x058, 0x000BE180, + 0x067, 0x00001552, + 0x083, 0x00000000, + 0x0B0, 0x000FF8FC, + 0x0B1, 0x00054400, + 0x0B2, 0x000CCC19, + 0x0B4, 0x00043003, + 0x0B6, 0x0004953E, + 0x0B7, 0x0001C718, + 0x0B8, 0x000060FF, + 0x0B9, 0x00080001, + 0x0BA, 0x00040000, + 0x0BB, 0x00000400, + 0x0BF, 0x000C0000, + 0x0C2, 0x00002400, + 0x0C3, 0x00000009, + 0x0C4, 0x00040C91, + 0x0C5, 0x00099999, + 0x0C6, 0x000000A3, + 0x0C7, 0x00088820, + 0x0C8, 0x00076C06, + 0x0C9, 0x00000000, + 0x0CA, 0x00080000, + 0x0DF, 0x00000180, + 0x0EF, 0x000001A0, + 0x051, 0x0006B27D, + 0xFF0F0400, 0xABCD, + 0x052, 0x0007E4DD, + 0xCDCDCDCD, 0xCDCD, + 0x052, 0x0007E49D, + 0xFF0F0400, 0xDEAD, + 0x053, 0x00000073, + 0x056, 0x00051FF3, + 0x035, 0x00000086, + 0x035, 0x00000186, + 0x035, 0x00000286, + 0x036, 0x00001C25, + 0x036, 0x00009C25, + 0x036, 0x00011C25, + 0x036, 0x00019C25, + 0x0B6, 0x00048538, + 0x018, 0x00000C07, + 0x05A, 0x0004BD00, + 0x019, 0x000739D0, + 0xFF0F0718, 0xABCD, + 0x034, 0x0000A093, + 0x034, 0x0000908F, + 0x034, 0x0000808C, + 0x034, 0x0000704F, + 0x034, 0x0000604C, + 0x034, 0x00005049, + 0x034, 0x0000400C, + 0x034, 0x00003009, + 0x034, 0x00002006, + 0x034, 0x00001003, + 0x034, 0x00000000, + 0xCDCDCDCD, 0xCDCD, + 0x034, 0x0000ADF3, + 0x034, 0x00009DF0, + 0x034, 0x00008DED, + 0x034, 0x00007DEA, + 0x034, 0x00006DE7, + 0x034, 0x000054EE, + 0x034, 0x000044EB, + 0x034, 0x000034E8, + 0x034, 0x0000246B, + 0x034, 0x00001468, + 0x034, 0x0000006D, + 0xFF0F0718, 0xDEAD, + 0x000, 0x00030159, + 0x084, 0x00068200, + 0x086, 0x000000CE, + 0x087, 0x00048A00, + 0x08E, 0x00065540, + 0x08F, 0x00088000, + 0x0EF, 0x000020A0, + 0x03B, 0x000F02B0, + 0x03B, 0x000EF7B0, + 0x03B, 0x000D4FB0, + 0x03B, 0x000CF060, + 0x03B, 0x000B0090, + 0x03B, 0x000A0080, + 0x03B, 0x00090080, + 0x03B, 0x0008F780, + 0x03B, 0x000722B0, + 0x03B, 0x0006F7B0, + 0x03B, 0x00054FB0, + 0x03B, 0x0004F060, + 0x03B, 0x00030090, + 0x03B, 0x00020080, + 0x03B, 0x00010080, + 0x03B, 0x0000F780, + 0x0EF, 0x000000A0, + 0x000, 0x00010159, + 0x018, 0x0000F407, + 0xFFE, 0x00000000, + 0xFFE, 0x00000000, + 0x01F, 0x00080003, + 0xFFE, 0x00000000, + 0xFFE, 0x00000000, + 0x01E, 0x00000001, + 0x01F, 0x00080000, + 0x000, 0x00033E60, + +}; + +HAL_STATUS +ODM_ReadAndConfig_RadioA_1T_8188E( + IN PDM_ODM_T pDM_Odm + ) +{ + #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) + + u4Byte hex = 0; + u4Byte i = 0; + u2Byte count = 0; + pu4Byte ptr_array = NULL; + u1Byte platform = pDM_Odm->SupportPlatform; + u1Byte interfaceValue = pDM_Odm->SupportInterface; + u1Byte board = pDM_Odm->BoardType; + u4Byte ArrayLen = sizeof(Array_RadioA_1T_8188E)/sizeof(u4Byte); + pu4Byte Array = Array_RadioA_1T_8188E; + BOOLEAN biol = FALSE; +#ifdef CONFIG_IOL_IOREG_CFG + PADAPTER Adapter = pDM_Odm->Adapter; + struct xmit_frame *pxmit_frame; + u8 bndy_cnt = 1; + #ifdef CONFIG_IOL_IOREG_CFG_DBG + struct cmd_cmp cmpdata[ArrayLen]; + u4Byte cmpdata_idx=0; + #endif +#endif//#ifdef CONFIG_IOL_IOREG_CFG + HAL_STATUS rst =HAL_STATUS_SUCCESS; + + hex += board; + hex += interfaceValue << 8; + hex += platform << 16; + hex += 0xFF000000; +#ifdef CONFIG_IOL_IOREG_CFG + biol = rtw_IOL_applied(Adapter); + + if(biol){ + if((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) + { + printk("rtw_IOL_accquire_xmit_frame failed\n"); + return HAL_STATUS_FAILURE; + } + } +#endif//#ifdef CONFIG_IOL_IOREG_CFG + + for (i = 0; i < ArrayLen; i += 2 ) + { + u4Byte v1 = Array[i]; + u4Byte v2 = Array[i+1]; + + // This (offset, data) pair meets the condition. + if ( v1 < 0xCDCDCDCD ) + { + #ifdef CONFIG_IOL_IOREG_CFG + if(biol){ + if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) + bndy_cnt++; + + if(v1 == 0xffe) + { + rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,50); + } + else if (v1 == 0xfd){ + rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,5); + } + else if (v1 == 0xfc){ + rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,1); + } + else if (v1 == 0xfb){ + rtw_IOL_append_DELAY_US_cmd(pxmit_frame,50); + } + else if (v1 == 0xfa){ + rtw_IOL_append_DELAY_US_cmd(pxmit_frame,5); + } + else if (v1 == 0xf9){ + rtw_IOL_append_DELAY_US_cmd(pxmit_frame,1); + } + else{ + rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A,(u2Byte)v1, v2,bRFRegOffsetMask) ; + #ifdef CONFIG_IOL_IOREG_CFG_DBG + cmpdata[cmpdata_idx].addr = v1; + cmpdata[cmpdata_idx].value= v2; + cmpdata_idx++; + #endif + } + + } + else + #endif //#ifdef CONFIG_IOL_IOREG_CFG + { + odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2); + } + continue; + } + else + { // This line is the start line of branch. + if ( !CheckCondition(Array[i], hex) ) + { // Discard the following (offset, data) pairs. + READ_NEXT_PAIR(v1, v2, i); + while (v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + i -= 2; // prevent from for-loop += 2 + } + else // Configure matched pairs and skip to end of if-else. + { + READ_NEXT_PAIR(v1, v2, i); + while (v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + #ifdef CONFIG_IOL_IOREG_CFG + if(biol){ + if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) + bndy_cnt++; + + if(v1 == 0xffe) + { + rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,50); + } + else if (v1 == 0xfd){ + rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,5); + } + else if (v1 == 0xfc){ + rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,1); + } + else if (v1 == 0xfb){ + rtw_IOL_append_DELAY_US_cmd(pxmit_frame,50); + } + else if (v1 == 0xfa){ + rtw_IOL_append_DELAY_US_cmd(pxmit_frame,5); + } + else if (v1 == 0xf9){ + rtw_IOL_append_DELAY_US_cmd(pxmit_frame,1); + } + else{ + rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A,(u2Byte)v1, v2,bRFRegOffsetMask) ; + #ifdef CONFIG_IOL_IOREG_CFG_DBG + cmpdata[cmpdata_idx].addr = v1; + cmpdata[cmpdata_idx].value= v2; + cmpdata_idx++; + #endif + + } + + } + else + #endif //#ifdef CONFIG_IOL_IOREG_CFG + { + odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2); + } + READ_NEXT_PAIR(v1, v2, i); + } + + while (v2 != 0xDEAD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + + } + } + } +#ifdef CONFIG_IOL_IOREG_CFG + if(biol){ + //printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt); + if(rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) + { + #ifdef CONFIG_IOL_IOREG_CFG_DBG + printk("~~~ %s Success !!! \n",__FUNCTION__); + { + u4Byte idx; + u4Byte cdata; + printk(" %s data compare => array_len:%d \n",__FUNCTION__,cmpdata_idx); + printk("### %s data compared !!###\n",__FUNCTION__); + for(idx=0;idx< cmpdata_idx;idx++) + { + cdata = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A,cmpdata[idx].addr,bRFRegOffsetMask); + if(cdata != cmpdata[idx].value){ + printk("addr:0x%04x, data:(0x%02x : 0x%02x) \n", + cmpdata[idx].addr,cmpdata[idx].value,cdata); + rst = HAL_STATUS_FAILURE; + } + } + printk("### %s data compared !!###\n",__FUNCTION__); + //if(rst == HAL_STATUS_FAILURE) + {//dump data from TX packet buffer + rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); + } + } + #endif //CONFIG_IOL_IOREG_CFG_DBG + + } + else{ + rst = HAL_STATUS_FAILURE; + printk("~~~ IOL Config %s Failed !!! \n",__FUNCTION__); + #ifdef CONFIG_IOL_IOREG_CFG_DBG + { + //dump data from TX packet buffer + rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); + } + #endif //CONFIG_IOL_IOREG_CFG_DBG + } + } + + +#endif //#ifdef CONFIG_IOL_IOREG_CFG + return rst; +} +/****************************************************************************** +* RadioA_1T_ICUT.TXT +******************************************************************************/ + +u4Byte Array_MP_8188E_RadioA_1T_ICUT[] = { + 0x000, 0x00030000, + 0x008, 0x00084000, + 0x018, 0x00000407, + 0x019, 0x00000012, + 0x01E, 0x00080009, + 0x01F, 0x00000880, + 0x02F, 0x0001A060, + 0x03F, 0x00000000, + 0x042, 0x000060C0, + 0x057, 0x000D0000, + 0x058, 0x000BE180, + 0x067, 0x00001552, + 0x083, 0x00000000, + 0x0B0, 0x000FF8FC, + 0x0B1, 0x00054400, + 0x0B2, 0x000CCC19, + 0x0B4, 0x00043003, + 0x0B6, 0x0004953E, + 0x0B7, 0x0001C718, + 0x0B8, 0x000060FF, + 0x0B9, 0x00080001, + 0x0BA, 0x00040000, + 0x0BB, 0x00000400, + 0x0BF, 0x000C0000, + 0x0C2, 0x00002400, + 0x0C3, 0x00000009, + 0x0C4, 0x00040C91, + 0x0C5, 0x00099999, + 0x0C6, 0x000000A3, + 0x0C7, 0x00088820, + 0x0C8, 0x00076C06, + 0x0C9, 0x00000000, + 0x0CA, 0x00080000, + 0x0DF, 0x00000180, + 0x0EF, 0x000001A0, + 0x051, 0x0006B27D, + 0xFF0F0400, 0xABCD, + 0x052, 0x0007E4DD, + 0xCDCDCDCD, 0xCDCD, + 0x052, 0x0007E49D, + 0xFF0F0400, 0xDEAD, + 0x053, 0x00000073, + 0x056, 0x00051FF3, + 0x035, 0x00000086, + 0x035, 0x00000186, + 0x035, 0x00000286, + 0x036, 0x00001C25, + 0x036, 0x00009C25, + 0x036, 0x00011C25, + 0x036, 0x00019C25, + 0x0B6, 0x00048538, + 0x018, 0x00000C07, + 0x05A, 0x0004BD00, + 0x019, 0x000739D0, + 0x034, 0x0000ADF3, + 0x034, 0x00009DF0, + 0x034, 0x00008DED, + 0x034, 0x00007DEA, + 0x034, 0x00006DE7, + 0x034, 0x000054EE, + 0x034, 0x000044EB, + 0x034, 0x000034E8, + 0x034, 0x0000246B, + 0x034, 0x00001468, + 0x034, 0x0000006D, + 0x000, 0x00030159, + 0x084, 0x00068200, + 0x086, 0x000000CE, + 0x087, 0x00048A00, + 0x08E, 0x00065540, + 0x08F, 0x00088000, + 0x0EF, 0x000020A0, + 0x03B, 0x000F02B0, + 0x03B, 0x000EF7B0, + 0x03B, 0x000D4FB0, + 0x03B, 0x000CF060, + 0x03B, 0x000B0090, + 0x03B, 0x000A0080, + 0x03B, 0x00090080, + 0x03B, 0x0008F780, + 0x03B, 0x000722B0, + 0x03B, 0x0006F7B0, + 0x03B, 0x00054FB0, + 0x03B, 0x0004F060, + 0x03B, 0x00030090, + 0x03B, 0x00020080, + 0x03B, 0x00010080, + 0x03B, 0x0000F780, + 0x0EF, 0x000000A0, + 0x000, 0x00010159, + 0x018, 0x0000F407, + 0xFFE, 0x00000000, + 0xFFE, 0x00000000, + 0x01F, 0x00080003, + 0xFFE, 0x00000000, + 0xFFE, 0x00000000, + 0x01E, 0x00000001, + 0x01F, 0x00080000, + 0x000, 0x00033E60, + +}; + +void +ODM_ReadAndConfig_RadioA_1T_ICUT_8188E( + IN PDM_ODM_T pDM_Odm + ) +{ + #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) + + u4Byte hex = 0; + u4Byte i = 0; + u2Byte count = 0; + pu4Byte ptr_array = NULL; + u1Byte platform = pDM_Odm->SupportPlatform; + u1Byte _interface = pDM_Odm->SupportInterface; + u1Byte board = pDM_Odm->BoardType; + u4Byte ArrayLen = sizeof(Array_MP_8188E_RadioA_1T_ICUT)/sizeof(u4Byte); + pu4Byte Array = Array_MP_8188E_RadioA_1T_ICUT; + + + hex += board; + hex += _interface << 8; + hex += platform << 16; + hex += 0xFF000000; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_8188E_RadioA_1T_ICUT, hex = 0x%X\n", hex)); + + for (i = 0; i < ArrayLen; i += 2 ) + { + u4Byte v1 = Array[i]; + u4Byte v2 = Array[i+1]; + + // This (offset, data) pair meets the condition. + if ( v1 < 0xCDCDCDCD ) + { + odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2); + continue; + } + else + { // This line is the start line of branch. + if ( !CheckCondition(Array[i], hex) ) + { // Discard the following (offset, data) pairs. + READ_NEXT_PAIR(v1, v2, i); + while (v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + i -= 2; // prevent from for-loop += 2 + } + else // Configure matched pairs and skip to end of if-else. + { + READ_NEXT_PAIR(v1, v2, i); + while (v2 != 0xDEAD && + v2 != 0xCDEF && + v2 != 0xCDCD && i < ArrayLen -2) + { + odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2); + READ_NEXT_PAIR(v1, v2, i); + } + + while (v2 != 0xDEAD && i < ArrayLen -2) + { + READ_NEXT_PAIR(v1, v2, i); + } + + } + } + } + +} + + +#endif // end of HWIMG_SUPPORT + diff --git a/hal/OUTSRC/rtl8188e/HalHWImg8188E_RF.h b/hal/HalHWImg8188E_RF.h similarity index 100% rename from hal/OUTSRC/rtl8188e/HalHWImg8188E_RF.h rename to hal/HalHWImg8188E_RF.h diff --git a/hal/HalPhyRf.c b/hal/HalPhyRf.c old mode 100644 new mode 100755 index 980f7da..ceed28c --- a/hal/HalPhyRf.c +++ b/hal/HalPhyRf.c @@ -17,33 +17,1545 @@ * * ******************************************************************************/ - + #include "odm_precomp.h" + +#if(DM_ODM_SUPPORT_TYPE & ODM_MP) +#include "Mp_Precomp.h" -/* 3============================================================ */ -/* 3 IQ Calibration */ -/* 3============================================================ */ - -void ODM_ResetIQKResult(struct odm_dm_struct *pDM_Odm) +VOID +phy_PathAStandBy( + IN PADAPTER pAdapter + ) { + RTPRINT(FINIT, INIT_IQK, ("Path-A standby mode!\n")); + + PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x0); + PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000); + PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000); } -u8 ODM_GetRightChnlPlaceforIQK(u8 chnl) -{ - u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = { - 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, - 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, - 100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, - 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, - 155, 157, 159, 161, 163, 165 - }; - u8 place = chnl; +//1 7. IQK +//#define MAX_TOLERANCE 5 +//#define IQK_DELAY_TIME 1 //ms - if (chnl > 14) { - for (place = 14; place < sizeof(channel_all); place++) { - if (channel_all[place] == chnl) - return place-13; +u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK +phy_PathA_IQK_8192C( + IN PADAPTER pAdapter, + IN BOOLEAN configPathB + ) +{ + + u4Byte regEAC, regE94, regE9C, regEA4; + u1Byte result = 0x00; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + RTPRINT(FINIT, INIT_IQK, ("Path A IQK!\n")); + + //path-A IQK setting + RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n")); + if(pAdapter->interfaceIndex == 0) + { + PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1f); + PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); + } + else + { + PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c22); + PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c22); + } + + PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82140102); + + PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, configPathB ? 0x28160202 : + IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)?0x28160202:0x28160502); + + //path-B IQK setting + if(configPathB) + { + PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x10008c22); + PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x10008c22); + PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140102); + if(IS_HARDWARE_TYPE_8192D(pAdapter)) + PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160206); + else + PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160202); + } + + //LO calibration setting + RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n")); + if(IS_HARDWARE_TYPE_8192D(pAdapter)) + PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); + else + PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x001028d1); + + //One shot, path A LOK & IQK + RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); + PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); + PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); + + // delay x ms + RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME)); + PlatformStallExecution(IQK_DELAY_TIME*1000); + + // Check failed + regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); + RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); + regE94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord); + RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x\n", regE94)); + regE9C= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord); + RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x\n", regE9C)); + regEA4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord); + RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", regEA4)); + + if(!(regEAC & BIT28) && + (((regE94 & 0x03FF0000)>>16) != 0x142) && + (((regE9C & 0x03FF0000)>>16) != 0x42) ) + result |= 0x01; + else //if Tx not OK, ignore Rx + return result; + + if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK + (((regEA4 & 0x03FF0000)>>16) != 0x132) && + (((regEAC & 0x03FF0000)>>16) != 0x36)) + result |= 0x02; + else + RTPRINT(FINIT, INIT_IQK, ("Path A Rx IQK fail!!\n")); + + return result; + + +} + +u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK +phy_PathB_IQK_8192C( + IN PADAPTER pAdapter + ) +{ + u4Byte regEAC, regEB4, regEBC, regEC4, regECC; + u1Byte result = 0x00; + RTPRINT(FINIT, INIT_IQK, ("Path B IQK!\n")); + + //One shot, path B LOK & IQK + RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); + PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000002); + PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000000); + + // delay x ms + RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME)); + PlatformStallExecution(IQK_DELAY_TIME*1000); + + // Check failed + regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); + RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); + regEB4 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord); + RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%x\n", regEB4)); + regEBC= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord); + RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%x\n", regEBC)); + regEC4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord); + RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%x\n", regEC4)); + regECC= PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord); + RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", regECC)); + + if(!(regEAC & BIT31) && + (((regEB4 & 0x03FF0000)>>16) != 0x142) && + (((regEBC & 0x03FF0000)>>16) != 0x42)) + result |= 0x01; + else + return result; + + if(!(regEAC & BIT30) && + (((regEC4 & 0x03FF0000)>>16) != 0x132) && + (((regECC & 0x03FF0000)>>16) != 0x36)) + result |= 0x02; + else + RTPRINT(FINIT, INIT_IQK, ("Path B Rx IQK fail!!\n")); + + + return result; + +} + +VOID +phy_PathAFillIQKMatrix( + IN PADAPTER pAdapter, + IN BOOLEAN bIQKOK, + IN s4Byte result[][8], + IN u1Byte final_candidate, + IN BOOLEAN bTxOnly + ) +{ + u4Byte Oldval_0, X, TX0_A, reg; + s4Byte Y, TX0_C; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + RTPRINT(FINIT, INIT_IQK, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); + + if(final_candidate == 0xFF) + return; + + else if(bIQKOK) + { + Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; + + X = result[final_candidate][0]; + if ((X & 0x00000200) != 0) + X = X | 0xFFFFFC00; + TX0_A = (X * Oldval_0) >> 8; + RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", X, TX0_A, Oldval_0)); + PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); + if(IS_HARDWARE_TYPE_8192D(pAdapter)) + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT24, ((X* Oldval_0>>7) & 0x1)); + else + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1)); + + Y = result[final_candidate][1]; + if ((Y & 0x00000200) != 0) + Y = Y | 0xFFFFFC00; + + //path B IQK result + 3 + if(pAdapter->interfaceIndex == 1 && pHalData->CurrentBandType92D == BAND_ON_5G) + Y += 3; + + TX0_C = (Y * Oldval_0) >> 8; + RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C)); + PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); + PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); + if(IS_HARDWARE_TYPE_8192D(pAdapter)/*&&is2T*/) + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT26, ((Y* Oldval_0>>7) & 0x1)); + else + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1)); + + if(bTxOnly) + { + RTPRINT(FINIT, INIT_IQK, ("phy_PathAFillIQKMatrix only Tx OK\n")); + return; + } + + reg = result[final_candidate][2]; + PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0x3FF, reg); + + reg = result[final_candidate][3] & 0x3F; + PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0xFC00, reg); + + reg = (result[final_candidate][3] >> 6) & 0xF; + PHY_SetBBReg(pAdapter, rOFDM0_RxIQExtAnta, 0xF0000000, reg); + } +} + +VOID +phy_PathBFillIQKMatrix( + IN PADAPTER pAdapter, + IN BOOLEAN bIQKOK, + IN s4Byte result[][8], + IN u1Byte final_candidate, + IN BOOLEAN bTxOnly //do Tx only + ) +{ + u4Byte Oldval_1, X, TX1_A, reg; + s4Byte Y, TX1_C; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + RTPRINT(FINIT, INIT_IQK, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); + + if(final_candidate == 0xFF) + return; + + else if(bIQKOK) + { + Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; + + X = result[final_candidate][4]; + if ((X & 0x00000200) != 0) + X = X | 0xFFFFFC00; + TX1_A = (X * Oldval_1) >> 8; + RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); + PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); + if(IS_HARDWARE_TYPE_8192D(pAdapter)) + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT28, ((X* Oldval_1>>7) & 0x1)); + else + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1)); + + Y = result[final_candidate][5]; + if ((Y & 0x00000200) != 0) + Y = Y | 0xFFFFFC00; + if(pHalData->CurrentBandType92D == BAND_ON_5G) + Y += 3; //temp modify for preformance + TX1_C = (Y * Oldval_1) >> 8; + RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C)); + PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); + PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); + if(IS_HARDWARE_TYPE_8192D(pAdapter)) + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT30, ((Y* Oldval_1>>7) & 0x1)); + else + PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1)); + + if(bTxOnly) + return; + + reg = result[final_candidate][6]; + PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg); + + reg = result[final_candidate][7] & 0x3F; + PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg); + + reg = (result[final_candidate][7] >> 6) & 0xF; + PHY_SetBBReg(pAdapter, rOFDM0_AGCRSSITable, 0x0000F000, reg); + } +} + + +BOOLEAN +phy_SimularityCompare_92C( + IN PADAPTER pAdapter, + IN s4Byte result[][8], + IN u1Byte c1, + IN u1Byte c2 + ) +{ + u4Byte i, j, diff, SimularityBitMap, bound = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B + BOOLEAN bResult = TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID); + + if(is2T) + bound = 8; + else + bound = 4; + + SimularityBitMap = 0; + + for( i = 0; i < bound; i++ ) + { + diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); + if (diff > MAX_TOLERANCE) + { + if((i == 2 || i == 6) && !SimularityBitMap) + { + if(result[c1][i]+result[c1][i+1] == 0) + final_candidate[(i/4)] = c2; + else if (result[c2][i]+result[c2][i+1] == 0) + final_candidate[(i/4)] = c1; + else + SimularityBitMap = SimularityBitMap|(1< do IQK again +*/ +BOOLEAN +phy_SimularityCompare( + IN PADAPTER pAdapter, + IN s4Byte result[][8], + IN u1Byte c1, + IN u1Byte c2 + ) +{ + if(IS_HARDWARE_TYPE_8192D(pAdapter)) + return phy_SimularityCompare_92D(pAdapter, result, c1, c2); + else + return phy_SimularityCompare_92C(pAdapter, result, c1, c2); + +} + +VOID +phy_IQCalibrate_8192C( + IN PADAPTER pAdapter, + IN s4Byte result[][8], + IN u1Byte t, + IN BOOLEAN is2T + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + u4Byte i; + u1Byte PathAOK, PathBOK; + u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = { + rFPGA0_XCD_SwitchControl, rBlue_Tooth, + rRx_Wait_CCA, rTx_CCK_RFON, + rTx_CCK_BBON, rTx_OFDM_RFON, + rTx_OFDM_BBON, rTx_To_Rx, + rTx_To_Tx, rRx_CCK, + rRx_OFDM, rRx_Wait_RIFS, + rRx_TO_Rx, rStandby, + rSleep, rPMPD_ANAEN }; + u4Byte IQK_MAC_REG[IQK_MAC_REG_NUM] = { + REG_TXPAUSE, REG_BCN_CTRL, + REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; + + //since 92C & 92D have the different define in IQK_BB_REG + u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { + rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, + rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, + rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, + rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD + }; + + u4Byte IQK_BB_REG_92D[IQK_BB_REG_NUM_92D] = { //for normal + rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, + rFPGA0_XB_RFInterfaceOE, rOFDM0_TRMuxPar, + rFPGA0_XCD_RFInterfaceSW, rOFDM0_TRxPathEnable, + rFPGA0_RFMOD, rFPGA0_AnalogParameter4, + rOFDM0_XAAGCCore1, rOFDM0_XBAGCCore1 + }; + u4Byte retryCount; +#if MP_DRIVER + if (pAdapter->registrypriv.mp_mode == 1) + retryCount = 9; + else +#endif + retryCount = 2; + + + //Neil Chen--2011--05--19-- + //3 Path Div + u1Byte rfPathSwitch=0x0; + + // Note: IQ calibration must be performed after loading + // PHY_REG.txt , and radio_a, radio_b.txt + + u4Byte bbvalue; + + if(t==0) + { + bbvalue = PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bMaskDWord); + RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8192C()==>0x%08x\n",bbvalue)); + + RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); + + // Save ADDA parameters, turn Path A ADDA on + phy_SaveADDARegisters(pAdapter, ADDA_REG, pHalData->ADDA_backup, IQK_ADDA_REG_NUM); + phy_SaveMACRegisters(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); + if(IS_HARDWARE_TYPE_8192D(pAdapter)) + phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92D, pHalData->IQK_BB_backup, IQK_BB_REG_NUM_92D); + else + phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM); + } + + phy_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T); + + + + if(IS_HARDWARE_TYPE_8192D(pAdapter)){ + //============================== + //3 Path Diversity + ////Neil Chen--2011--05--20 + rfPathSwitch =(u1Byte) (PHY_QueryBBReg(pAdapter, 0xB30, bMaskDWord)>>27); + //rfPathSwitch = (u1Byte) DataB30; + rfPathSwitch = rfPathSwitch&(0x01); + + if(rfPathSwitch) // Path Div On + { + phy_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T); + //DbgPrint("=STEP= change ADDA Path from B to A Path\n"); + } + else + { + phy_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T); + } + //3 end + //===================================== + + PHY_SetBBReg(pAdapter, rPdp_AntA, bMaskDWord, 0x01017038); + } + + if(t==0) + { + pHalData->bRfPiEnable = (u1Byte)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8)); + } + + if(!pHalData->bRfPiEnable){ + // Switch BB to PI mode to do IQ Calibration. + phy_PIModeSwitch(pAdapter, TRUE); + } + + PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, BIT24, 0x00); + PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); + PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); + PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); + if(IS_HARDWARE_TYPE_8192D(pAdapter)) + PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xf00000, 0x0f); + else + { + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); + PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); + PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); + } + + if(is2T) + { + PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); + PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000); + } + + //MAC settings + phy_MACSettingCalibration(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); + + if(IS_HARDWARE_TYPE_8192D(pAdapter)) + { + PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x0f600000); + + if(is2T) + { + PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x0f600000); + } + } + else + { + //Page B init + PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x00080000); + + if(is2T) + { + PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x00080000); + } + } + // IQ calibration setting + RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n")); + PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000); + PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x01007c00); + PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800); + + for(i = 0 ; i < retryCount ; i++){ + PathAOK = phy_PathA_IQK_8192C(pAdapter, is2T); + if(PathAOK == 0x03){ + RTPRINT(FINIT, INIT_IQK, ("Path A IQK Success!!\n")); + result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; + result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; + result[t][2] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; + result[t][3] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; + break; + } + else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK + { + RTPRINT(FINIT, INIT_IQK, ("Path A IQK Only Tx Success!!\n")); + + result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; + result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; + } + } + + if(0x00 == PathAOK){ + RTPRINT(FINIT, INIT_IQK, ("Path A IQK failed!!\n")); + } + + if(is2T){ + phy_PathAStandBy(pAdapter); + + // Turn Path B ADDA on + phy_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T); + + for(i = 0 ; i < retryCount ; i++){ + PathBOK = phy_PathB_IQK_8192C(pAdapter); + if(PathBOK == 0x03){ + RTPRINT(FINIT, INIT_IQK, ("Path B IQK Success!!\n")); + result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; + result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; + result[t][6] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; + result[t][7] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; + break; + } + else if (i == (retryCount - 1) && PathBOK == 0x01) //Tx IQK OK + { + RTPRINT(FINIT, INIT_IQK, ("Path B Only Tx IQK Success!!\n")); + result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; + result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; + } + } + + if(0x00 == PathBOK){ + RTPRINT(FINIT, INIT_IQK, ("Path B IQK failed!!\n")); + } + } + + //Back to BB mode, load original value + RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n")); + PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0); + + if(t!=0) + { + if(!pHalData->bRfPiEnable){ + // Switch back BB to SI mode after finish IQ Calibration. + phy_PIModeSwitch(pAdapter, FALSE); + } + + // Reload ADDA power saving parameters + phy_ReloadADDARegisters(pAdapter, ADDA_REG, pHalData->ADDA_backup, IQK_ADDA_REG_NUM); + + // Reload MAC parameters + phy_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); + + // Reload BB parameters + if(IS_HARDWARE_TYPE_8192D(pAdapter)) + { + if(is2T) + phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92D, pHalData->IQK_BB_backup, IQK_BB_REG_NUM_92D); + else + phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92D, pHalData->IQK_BB_backup, IQK_BB_REG_NUM_92D -1); + } + else + phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM); + + if(!IS_HARDWARE_TYPE_8192D(pAdapter)) + { + // Restore RX initial gain + PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); + if(is2T){ + PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); + } + } + //load 0xe30 IQC default value + PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); + PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); + + } + RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8192C() <==\n")); + +} + + +VOID +phy_LCCalibrate92C( + IN PADAPTER pAdapter, + IN BOOLEAN is2T + ) +{ + u1Byte tmpReg; + u4Byte RF_Amode=0, RF_Bmode=0, LC_Cal; +// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + //Check continuous TX and Packet TX + tmpReg = PlatformEFIORead1Byte(pAdapter, 0xd03); + + if((tmpReg&0x70) != 0) //Deal with contisuous TX case + PlatformEFIOWrite1Byte(pAdapter, 0xd03, tmpReg&0x8F); //disable all continuous TX + else // Deal with Packet TX case + PlatformEFIOWrite1Byte(pAdapter, REG_TXPAUSE, 0xFF); // block all queues + + if((tmpReg&0x70) != 0) + { + //1. Read original RF mode + //Path-A + RF_Amode = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits); + + //Path-B + if(is2T) + RF_Bmode = PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits); + + //2. Set RF mode = standby mode + //Path-A + PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); + + //Path-B + if(is2T) + PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); + } + + //3. Read RF reg18 + LC_Cal = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits); + + //4. Set LC calibration begin bit15 + PHY_SetRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); + + delay_ms(100); + + + //Restore original situation + if((tmpReg&0x70) != 0) //Deal with contisuous TX case + { + //Path-A + PlatformEFIOWrite1Byte(pAdapter, 0xd03, tmpReg); + PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); + + //Path-B + if(is2T) + PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); + } + else // Deal with Packet TX case + { + PlatformEFIOWrite1Byte(pAdapter, REG_TXPAUSE, 0x00); + } +} + + +VOID +phy_LCCalibrate( + IN PADAPTER pAdapter, + IN BOOLEAN is2T + ) +{ + if(IS_HARDWARE_TYPE_8192D(pAdapter)) + { +#if SWLCK == 1 + phy_LCCalibrate92DSW(pAdapter, is2T); +#else + phy_LCCalibrate92D(pAdapter, is2T); +#endif + } + else + { + phy_LCCalibrate92C(pAdapter, is2T); + } +} + + + +//Analog Pre-distortion calibration +#define APK_BB_REG_NUM 8 +#define APK_CURVE_REG_NUM 4 +#define PATH_NUM 2 + +VOID +phy_APCalibrate_8192C( + IN PADAPTER pAdapter, + IN s1Byte delta, + IN BOOLEAN is2T + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + u4Byte regD[PATH_NUM]; + u4Byte tmpReg, index, offset, i, apkbound; + u1Byte path, pathbound = PATH_NUM; + u4Byte BB_backup[APK_BB_REG_NUM]; + u4Byte BB_REG[APK_BB_REG_NUM] = { + rFPGA1_TxBlock, rOFDM0_TRxPathEnable, + rFPGA0_RFMOD, rOFDM0_TRMuxPar, + rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, + rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; + u4Byte BB_AP_MODE[APK_BB_REG_NUM] = { + 0x00000020, 0x00a05430, 0x02040000, + 0x000800e4, 0x00204000 }; + u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = { + 0x00000020, 0x00a05430, 0x02040000, + 0x000800e4, 0x22204000 }; + + u4Byte AFE_backup[IQK_ADDA_REG_NUM]; + u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { + rFPGA0_XCD_SwitchControl, rBlue_Tooth, + rRx_Wait_CCA, rTx_CCK_RFON, + rTx_CCK_BBON, rTx_OFDM_RFON, + rTx_OFDM_BBON, rTx_To_Rx, + rTx_To_Tx, rRx_CCK, + rRx_OFDM, rRx_Wait_RIFS, + rRx_TO_Rx, rStandby, + rSleep, rPMPD_ANAEN }; + + u4Byte MAC_backup[IQK_MAC_REG_NUM]; + u4Byte MAC_REG[IQK_MAC_REG_NUM] = { + REG_TXPAUSE, REG_BCN_CTRL, + REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; + + u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { + {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, + {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} + }; + + u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { + {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings + {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} + }; + + u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { + {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, + {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} + }; + + u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { + {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings + {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} + }; +#if 0 + u4Byte APK_RF_value_A[PATH_NUM][APK_BB_REG_NUM] = { + {0x1adb0, 0x1adb0, 0x1ada0, 0x1ad90, 0x1ad80}, + {0x00fb0, 0x00fb0, 0x00fa0, 0x00f90, 0x00f80} + }; +#endif + u4Byte AFE_on_off[PATH_NUM] = { + 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on + + u4Byte APK_offset[PATH_NUM] = { + rConfig_AntA, rConfig_AntB}; + + u4Byte APK_normal_offset[PATH_NUM] = { + rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; + + u4Byte APK_value[PATH_NUM] = { + 0x92fc0000, 0x12fc0000}; + + u4Byte APK_normal_value[PATH_NUM] = { + 0x92680000, 0x12680000}; + + s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { + {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} + }; + + u4Byte APK_normal_setting_value_1[13] = { + 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, + 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, + 0x12680000, 0x00880000, 0x00880000 + }; + + u4Byte APK_normal_setting_value_2[16] = { + 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, + 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, + 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, + 0x00050006 + }; + + u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a +// u4Byte AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; + + s4Byte BB_offset, delta_V, delta_offset; + +#if MP_DRIVER == 1 +if (pAdapter->registrypriv.mp_mode == 1) +{ + PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); + + pMptCtx->APK_bound[0] = 45; + pMptCtx->APK_bound[1] = 52; +} +#endif + + RTPRINT(FINIT, INIT_IQK, ("==>phy_APCalibrate_8192C() delta %d\n", delta)); + RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); + if(!is2T) + pathbound = 1; + + //2 FOR NORMAL CHIP SETTINGS + +// Temporarily do not allow normal driver to do the following settings because these offset +// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal +// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the +// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. +#if MP_DRIVER != 1 + return; +#endif + + if (pAdapter->registrypriv.mp_mode != 1) + return; + + //settings adjust for normal chip + for(index = 0; index < PATH_NUM; index ++) + { + APK_offset[index] = APK_normal_offset[index]; + APK_value[index] = APK_normal_value[index]; + AFE_on_off[index] = 0x6fdb25a4; + } + + for(index = 0; index < APK_BB_REG_NUM; index ++) + { + for(path = 0; path < pathbound; path++) + { + APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; + APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; + } + BB_AP_MODE[index] = BB_normal_AP_MODE[index]; + } + + apkbound = 6; + + //save BB default value + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + if(index == 0) //skip + continue; + BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord); + } + + //save MAC default value + phy_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); + + //save AFE default value + phy_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); + + for(path = 0; path < pathbound; path++) + { + + + if(path == RF_PATH_A) + { + //path A APK + //load APK setting + //path-A + offset = rPdp_AntA; + for(index = 0; index < 11; index ++) + { + PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); + RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); + + offset += 0x04; + } + + PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); + + offset = rConfig_AntA; + for(; index < 13; index ++) + { + PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); + RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); + + offset += 0x04; + } + + //page-B1 + PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x40000000); + + //path A + offset = rPdp_AntA; + for(index = 0; index < 16; index++) + { + PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); + RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); + + offset += 0x04; + } + PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000); + } + else if(path == RF_PATH_B) + { + //path B APK + //load APK setting + //path-B + offset = rPdp_AntB; + for(index = 0; index < 10; index ++) + { + PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); + RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); + + offset += 0x04; + } + PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); + + PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); + + offset = rConfig_AntA; + index = 11; + for(; index < 13; index ++) //offset 0xb68, 0xb6c + { + PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); + RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); + + offset += 0x04; + } + + //page-B1 + PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x40000000); + + //path B + offset = 0xb60; + for(index = 0; index < 16; index++) + { + PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); + RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); + + offset += 0x04; + } + PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000); + } + + //save RF default value + regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask); + + //Path A AFE all on, path B AFE All off or vise versa + for(index = 0; index < IQK_ADDA_REG_NUM ; index++) + PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, AFE_on_off[path]); + RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xe70 %x\n", PHY_QueryBBReg(pAdapter, rRx_Wait_CCA, bMaskDWord))); + + //BB to AP mode + if(path == 0) + { + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + + if(index == 0) //skip + continue; + else if (index < 5) + PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); + else if (BB_REG[index] == 0x870) + PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); + else + PHY_SetBBReg(pAdapter, BB_REG[index], BIT10, 0x0); + } + + PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); + PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); + } + else //path B + { + PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); + PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); + + } + + RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x800 %x\n", PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord))); + + //MAC settings + phy_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); + + if(path == RF_PATH_A) //Path B to standby mode + { + PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bRFRegOffsetMask, 0x10000); + } + else //Path A to standby mode + { + PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x10000); + PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f); + PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20103); + } + + delta_offset = ((delta+14)/2); + if(delta_offset < 0) + delta_offset = 0; + else if (delta_offset > 12) + delta_offset = 12; + + //AP calibration + for(index = 0; index < APK_BB_REG_NUM; index++) + { + if(index != 1) //only DO PA11+PAD01001, AP RF setting + continue; + + tmpReg = APK_RF_init_value[path][index]; +#if 1 + if(!pHalData->bAPKThermalMeterIgnore) + { + BB_offset = (tmpReg & 0xF0000) >> 16; + + if(!(tmpReg & BIT15)) //sign bit 0 + { + BB_offset = -BB_offset; + } + + delta_V = APK_delta_mapping[index][delta_offset]; + + BB_offset += delta_V; + + RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, delta_V, delta_offset)); + + if(BB_offset < 0) + { + tmpReg = tmpReg & (~BIT15); + BB_offset = -BB_offset; + } + else + { + tmpReg = tmpReg | BIT15; + } + tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); + } +#endif + +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + if(IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) + PHY_SetRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask, 0x894ae); + else +#endif + PHY_SetRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask, 0x8992e); + RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask))); + PHY_SetRFReg(pAdapter, path, RF_AC, bRFRegOffsetMask, APK_RF_value_0[path][index]); + RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bRFRegOffsetMask))); + PHY_SetRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask, tmpReg); + RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask))); + + // PA11+PAD01111, one shot + i = 0; + do + { + PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80000000); + { + PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[0]); + RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); + delay_ms(3); + PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[1]); + RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); + + delay_ms(20); + } + PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000); + + if(path == RF_PATH_A) + tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0x03E00000); + else + tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0xF8000000); + RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xbd8[25:21] %x\n", tmpReg)); + + + i++; + } + while(tmpReg > apkbound && i < 4); + + APK_result[path][index] = tmpReg; + } + } + + //reload MAC default value + phy_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); + + //reload BB default value + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + + if(index == 0) //skip + continue; + PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]); + } + + //reload AFE default value + phy_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); + + //reload RF path default value + for(path = 0; path < pathbound; path++) + { + PHY_SetRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask, regD[path]); + if(path == RF_PATH_B) + { + PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f); + PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20101); + } + + //note no index == 0 + if (APK_result[path][1] > 6) + APK_result[path][1] = 6; + RTPRINT(FINIT, INIT_IQK, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); + } + + RTPRINT(FINIT, INIT_IQK, ("\n")); + + + for(path = 0; path < pathbound; path++) + { + PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G1_G4, bRFRegOffsetMask, + ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); + if(path == RF_PATH_A) + PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, + ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); + else + PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, + ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); + + if(!IS_HARDWARE_TYPE_8723A(pAdapter)) + PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G9_G11, bRFRegOffsetMask, + ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); + } + + pHalData->bAPKdone = TRUE; + + RTPRINT(FINIT, INIT_IQK, ("<==phy_APCalibrate_8192C()\n")); +} + + +VOID +PHY_IQCalibrate_8192C( + IN PADAPTER pAdapter, + IN BOOLEAN bReCovery + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + s4Byte result[4][8]; //last is final result + u1Byte i, final_candidate, Indexforchannel; + BOOLEAN bPathAOK, bPathBOK; + s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; + BOOLEAN is12simular, is13simular, is23simular; + BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; + u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { + rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, + rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, + rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, + rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, + rOFDM0_RxIQExtAnta}; + + if (ODM_CheckPowerStatus(pAdapter) == FALSE) + return; + +#if MP_DRIVER == 1 +if (pAdapter->registrypriv.mp_mode == 1) +{ + bStartContTx = pAdapter->MptCtx.bStartContTx; + bSingleTone = pAdapter->MptCtx.bSingleTone; + bCarrierSuppression = pAdapter->MptCtx.bCarrierSuppression; +} +#endif + + //ignore IQK when continuous Tx + if(bStartContTx || bSingleTone || bCarrierSuppression) + return; + +#if DISABLE_BB_RF + return; +#endif + if(pAdapter->bSlaveOfDMSP) + return; + + if(!IS_HARDWARE_TYPE_8192D(pAdapter)) + { + if(bReCovery) + { + phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup_recover, 9); + return; + + } + } + RTPRINT(FINIT, INIT_IQK, ("IQK:Start!!!\n")); + + for(i = 0; i < 8; i++) + { + result[0][i] = 0; + result[1][i] = 0; + result[2][i] = 0; + result[3][i] = 0; + } + final_candidate = 0xff; + bPathAOK = FALSE; + bPathBOK = FALSE; + is12simular = FALSE; + is23simular = FALSE; + is13simular = FALSE; + + + RTPRINT(FINIT, INIT_IQK, ("IQK !!!interface %d currentband %d ishardwareD %d \n", pAdapter->interfaceIndex, pHalData->CurrentBandType92D, IS_HARDWARE_TYPE_8192D(pAdapter))); + AcquireCCKAndRWPageAControl(pAdapter); +// RT_TRACE(COMP_INIT,DBG_LOUD,("Acquire Mutex in IQCalibrate \n")); + for (i=0; i<3; i++) + { +// if(IS_HARDWARE_TYPE_8192C(pAdapter) || IS_HARDWARE_TYPE_8723A(pAdapter)) + if(!IS_HARDWARE_TYPE_8192D(pAdapter)) + { + if(IS_92C_SERIAL( pHalData->VersionID)) + { + phy_IQCalibrate_8192C(pAdapter, result, i, TRUE); + } + else + { + // For 88C 1T1R + phy_IQCalibrate_8192C(pAdapter, result, i, FALSE); + } + } + else/* if(IS_HARDWARE_TYPE_8192D(pAdapter))*/ + { + if(pHalData->CurrentBandType92D == BAND_ON_5G) + { + phy_IQCalibrate_5G_Normal(pAdapter, result, i); + } + else if(pHalData->CurrentBandType92D == BAND_ON_2_4G) + { + if(IS_92D_SINGLEPHY(pHalData->VersionID)) + phy_IQCalibrate_8192C(pAdapter, result, i, TRUE); + else + phy_IQCalibrate_8192C(pAdapter, result, i, FALSE); + } + } + + if(i == 1) + { + is12simular = phy_SimularityCompare(pAdapter, result, 0, 1); + if(is12simular) + { + final_candidate = 0; + break; + } + } + + if(i == 2) + { + is13simular = phy_SimularityCompare(pAdapter, result, 0, 2); + if(is13simular) + { + final_candidate = 0; + break; + } + + is23simular = phy_SimularityCompare(pAdapter, result, 1, 2); + if(is23simular) + final_candidate = 1; + else + { + for(i = 0; i < 8; i++) + RegTmp += result[3][i]; + + if(RegTmp != 0) + final_candidate = 3; + else + final_candidate = 0xFF; + } + } + } +// RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate \n")); + ReleaseCCKAndRWPageAControl(pAdapter); + + for (i=0; i<4; i++) + { + RegE94 = result[i][0]; + RegE9C = result[i][1]; + RegEA4 = result[i][2]; + RegEAC = result[i][3]; + RegEB4 = result[i][4]; + RegEBC = result[i][5]; + RegEC4 = result[i][6]; + RegECC = result[i][7]; + RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); + } + + if(final_candidate != 0xff) + { + pHalData->RegE94 = RegE94 = result[final_candidate][0]; + pHalData->RegE9C = RegE9C = result[final_candidate][1]; + RegEA4 = result[final_candidate][2]; + RegEAC = result[final_candidate][3]; + pHalData->RegEB4 = RegEB4 = result[final_candidate][4]; + pHalData->RegEBC = RegEBC = result[final_candidate][5]; + RegEC4 = result[final_candidate][6]; + RegECC = result[final_candidate][7]; + RTPRINT(FINIT, INIT_IQK, ("IQK: final_candidate is %x\n",final_candidate)); + RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); + bPathAOK = bPathBOK = TRUE; + } + else + { + RegE94 = RegEB4 = pHalData->RegE94 = pHalData->RegEB4 = 0x100; //X default value + RegE9C = RegEBC = pHalData->RegE9C = pHalData->RegEBC = 0x0; //Y default value + } + + if((RegE94 != 0)/*&&(RegEA4 != 0)*/) + { + if(pHalData->CurrentBandType92D == BAND_ON_5G) + phy_PathAFillIQKMatrix_5G_Normal(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); + else + phy_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); + + } + + if (IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID)) + { + if((RegEB4 != 0)/*&&(RegEC4 != 0)*/) + { + if(pHalData->CurrentBandType92D == BAND_ON_5G) + phy_PathBFillIQKMatrix_5G_Normal(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); + else + phy_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); + } + } + + if(IS_HARDWARE_TYPE_8192D(pAdapter) && final_candidate != 0xFF) + { + Indexforchannel = GetRightChnlPlaceforIQK(pHalData->CurrentChannel); + + for(i = 0; i < IQK_Matrix_REG_NUM; i++) + pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][i] = + result[final_candidate][i]; + + pHalData->IQKMatrixRegSetting[Indexforchannel].bIQKDone = TRUE; + + RTPRINT(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); + } + + if(!IS_HARDWARE_TYPE_8192D(pAdapter)) + phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup_recover, 9); + +} + + +VOID +PHY_LCCalibrate_8192C( + IN PADAPTER pAdapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; + PMGNT_INFO pMgntInfo=&pAdapter->MgntInfo; + PMGNT_INFO pMgntInfoBuddyAdapter; + u4Byte timeout = 2000, timecount = 0; + PADAPTER BuddyAdapter = pAdapter->BuddyAdapter; + +#if MP_DRIVER == 1 +if (pAdapter->registrypriv.mp_mode == 1) +{ + bStartContTx = pAdapter->MptCtx.bStartContTx; + bSingleTone = pAdapter->MptCtx.bSingleTone; + bCarrierSuppression = pAdapter->MptCtx.bCarrierSuppression; +} +#endif + +#if DISABLE_BB_RF + return; +#endif + + //ignore LCK when continuous Tx + if(bStartContTx || bSingleTone || bCarrierSuppression) + return; + + if(BuddyAdapter != NULL && + ((pAdapter->interfaceIndex == 0 && pHalData->CurrentBandType92D == BAND_ON_2_4G) || + (pAdapter->interfaceIndex == 1 && pHalData->CurrentBandType92D == BAND_ON_5G))) + { + pMgntInfoBuddyAdapter=&BuddyAdapter->MgntInfo; + while(pMgntInfoBuddyAdapter->bScanInProgress && timecount < timeout) + { + delay_ms(50); + timecount += 50; + } + } + + while(pMgntInfo->bScanInProgress && timecount < timeout) + { + delay_ms(50); + timecount += 50; + } + + pHalData->bLCKInProgress = TRUE; + + RTPRINT(FINIT, INIT_IQK, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pAdapter->interfaceIndex, pHalData->CurrentBandType92D, timecount)); + + //if(IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID)) + if(IS_2T2R(pHalData->VersionID)) + { + phy_LCCalibrate(pAdapter, TRUE); + } + else{ + // For 88C 1T1R + phy_LCCalibrate(pAdapter, FALSE); + } + + pHalData->bLCKInProgress = FALSE; + + RTPRINT(FINIT, INIT_IQK, ("LCK:Finish!!!interface %d\n", pAdapter->interfaceIndex)); + + +} + +VOID +PHY_APCalibrate_8192C( + IN PADAPTER pAdapter, + IN s1Byte delta + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + //default disable APK, because Tx NG issue, suggest by Jenyu, 2011.11.25 + return; + +#if DISABLE_BB_RF + return; +#endif + + if(IS_HARDWARE_TYPE_8192D(pAdapter) || IS_HARDWARE_TYPE_8723A(pAdapter)) + return; + +#if FOR_BRAZIL_PRETEST != 1 + if(pHalData->bAPKdone) +#endif + return; + + if(IS_92C_SERIAL( pHalData->VersionID)){ + phy_APCalibrate_8192C(pAdapter, delta, TRUE); + } + else{ + // For 88C 1T1R + phy_APCalibrate_8192C(pAdapter, delta, FALSE); + } +} + + +#endif + + +//3============================================================ +//3 IQ Calibration +//3============================================================ + +VOID +ODM_ResetIQKResult( + IN PDM_ODM_T pDM_Odm +) +{ + u1Byte i; +#if (DM_ODM_SUPPORT_TYPE == ODM_MP || DM_ODM_SUPPORT_TYPE == ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + + if (!IS_HARDWARE_TYPE_8192D(Adapter)) + return; +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD,("PHY_ResetIQKResult:: settings regs %d default regs %d\n", (u32)(sizeof(pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting)/sizeof(IQK_MATRIX_REGS_SETTING)), IQK_Matrix_Settings_NUM)); + //0xe94, 0xe9c, 0xea4, 0xeac, 0xeb4, 0xebc, 0xec4, 0xecc + + for(i = 0; i < IQK_Matrix_Settings_NUM; i++) + { + { + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][0] = + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][2] = + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][4] = + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][6] = 0x100; + + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][1] = + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][3] = + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][5] = + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][7] = 0x0; + + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].bIQKDone = FALSE; + + } + } + +} +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) +u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) +{ + u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = + {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165}; + u1Byte place = chnl; + + + if(chnl > 14) + { + for(place = 14; placeBbSwingIdxOfdm, dm_odm->BbSwingFlagOfdm)); - - if (dm_odm->BbSwingIdxOfdm <= dm_odm->BbSwingIdxOfdmBase) { - *pDirection = 1; - pwr_value = (dm_odm->BbSwingIdxOfdmBase - dm_odm->BbSwingIdxOfdm); - } else { - *pDirection = 2; - pwr_value = (dm_odm->BbSwingIdxOfdm - dm_odm->BbSwingIdxOfdmBase); - } - - ODM_RT_TRACE(dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, - ("BbSwingIdxOfdm = %d BbSwingFlagOfdm=%d\n", - dm_odm->BbSwingIdxOfdm, dm_odm->BbSwingFlagOfdm)); - } else if (Type == 1) { /* For CCK adjust. */ - ODM_RT_TRACE(dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, - ("dm_odm->BbSwingIdxCck = %d dm_odm->BbSwingIdxCckBase = %d\n", - dm_odm->BbSwingIdxCck, dm_odm->BbSwingIdxCckBase)); - - if (dm_odm->BbSwingIdxCck <= dm_odm->BbSwingIdxCckBase) { - *pDirection = 1; - pwr_value = (dm_odm->BbSwingIdxCckBase - dm_odm->BbSwingIdxCck); - } else { - *pDirection = 2; - pwr_value = (dm_odm->BbSwingIdxCck - dm_odm->BbSwingIdxCckBase); - } - } - - /* */ - /* 2012/04/25 MH According to Ed/Luke.Lees estimate for EVM the max tx power tracking */ - /* need to be less than 6 power index for 88E. */ - /* */ - if (pwr_value >= ODM_TXPWRTRACK_MAX_IDX_88E && *pDirection == 1) - pwr_value = ODM_TXPWRTRACK_MAX_IDX_88E; - - *pOutWriteVal = pwr_value | (pwr_value<<8) | (pwr_value<<16) | (pwr_value<<24); -} /* ODM_TxPwrTrackAdjust88E */ - -/*----------------------------------------------------------------------------- - * Function: odm_TxPwrTrackSetPwr88E() - * - * Overview: 88E change all channel tx power accordign to flag. - * OFDM & CCK are all different. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 04/23/2012 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -static void odm_TxPwrTrackSetPwr88E(struct odm_dm_struct *dm_odm) -{ - if (dm_odm->BbSwingFlagOfdm || dm_odm->BbSwingFlagCck) { - ODM_RT_TRACE(dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("odm_TxPwrTrackSetPwr88E CH=%d\n", *(dm_odm->pChannel))); - PHY_SetTxPowerLevel8188E(dm_odm->Adapter, *(dm_odm->pChannel)); - dm_odm->BbSwingFlagOfdm = false; - dm_odm->BbSwingFlagCck = false; - } -} /* odm_TxPwrTrackSetPwr88E */ - -/* 091212 chiyokolin */ -void -odm_TXPowerTrackingCallback_ThermalMeter_8188E( - struct adapter *Adapter - ) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u8 ThermalValue = 0, delta, delta_LCK, delta_IQK, offset; - u8 ThermalValue_AVG_count = 0; - u32 ThermalValue_AVG = 0; - s32 ele_A = 0, ele_D, TempCCk, X, value32; - s32 Y, ele_C = 0; - s8 OFDM_index[2], CCK_index = 0; - s8 OFDM_index_old[2] = {0, 0}, CCK_index_old = 0; - u32 i = 0, j = 0; - bool is2t = false; - - u8 OFDM_min_index = 6, rf; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */ - u8 Indexforchannel = 0/*GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/; - s8 OFDM_index_mapping[2][index_mapping_NUM_88E] = { - {0, 0, 2, 3, 4, 4, /* 2.4G, decrease power */ - 5, 6, 7, 7, 8, 9, - 10, 10, 11}, /* For lower temperature, 20120220 updated on 20120220. */ - {0, 0, -1, -2, -3, -4, /* 2.4G, increase power */ - -4, -4, -4, -5, -7, -8, - -9, -9, -10}, - }; - u8 Thermal_mapping[2][index_mapping_NUM_88E] = { - {0, 2, 4, 6, 8, 10, /* 2.4G, decrease power */ - 12, 14, 16, 18, 20, 22, - 24, 26, 27}, - {0, 2, 4, 6, 8, 10, /* 2.4G,, increase power */ - 12, 14, 16, 18, 20, 22, - 25, 25, 25}, - }; - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - - /* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */ - odm_TxPwrTrackSetPwr88E(dm_odm); - - dm_odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; /* cosa add for debug */ - dm_odm->RFCalibrateInfo.bTXPowerTrackingInit = true; - - /* RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. */ - dm_odm->RFCalibrateInfo.RegA24 = 0x090e1317; - - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("===>dm_TXPowerTrackingCallback_ThermalMeter_8188E txpowercontrol %d\n", - dm_odm->RFCalibrateInfo.TxPowerTrackControl)); - - ThermalValue = (u8)ODM_GetRFReg(dm_odm, RF_PATH_A, RF_T_METER_88E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ - - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n", - ThermalValue, dm_odm->RFCalibrateInfo.ThermalValue, pHalData->EEPROMThermalMeter)); - - if (is2t) - rf = 2; - else - rf = 1; - - if (ThermalValue) { - /* Query OFDM path A default setting */ - ele_D = ODM_GetBBReg(dm_odm, rOFDM0_XATxIQImbalance, bMaskDWord)&bMaskOFDM_D; - for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) { /* find the index */ - if (ele_D == (OFDMSwingTable[i]&bMaskOFDM_D)) { - OFDM_index_old[0] = (u8)i; - dm_odm->BbSwingIdxOfdmBase = (u8)i; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("Initial pathA ele_D reg0x%x = 0x%x, OFDM_index=0x%x\n", - rOFDM0_XATxIQImbalance, ele_D, OFDM_index_old[0])); - break; - } - } - - /* Query OFDM path B default setting */ - if (is2t) { - ele_D = ODM_GetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, bMaskDWord)&bMaskOFDM_D; - for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) { /* find the index */ - if (ele_D == (OFDMSwingTable[i]&bMaskOFDM_D)) { - OFDM_index_old[1] = (u8)i; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("Initial pathB ele_D reg0x%x = 0x%x, OFDM_index=0x%x\n", - rOFDM0_XBTxIQImbalance, ele_D, OFDM_index_old[1])); - break; - } - } - } - - /* Query CCK default setting From 0xa24 */ - TempCCk = dm_odm->RFCalibrateInfo.RegA24; - - for (i = 0; i < CCK_TABLE_SIZE; i++) { - if (dm_odm->RFCalibrateInfo.bCCKinCH14) { - if (ODM_CompareMemory(dm_odm, (void *)&TempCCk, (void *)&CCKSwingTable_Ch14[i][2], 4) == 0) { - CCK_index_old = (u8)i; - dm_odm->BbSwingIdxCckBase = (u8)i; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch 14 %d\n", - rCCK0_TxFilter2, TempCCk, CCK_index_old, dm_odm->RFCalibrateInfo.bCCKinCH14)); - break; - } - } else { - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("RegA24: 0x%X, CCKSwingTable_Ch1_Ch13[%d][2]: CCKSwingTable_Ch1_Ch13[i][2]: 0x%X\n", - TempCCk, i, CCKSwingTable_Ch1_Ch13[i][2])); - if (ODM_CompareMemory(dm_odm, (void *)&TempCCk, (void *)&CCKSwingTable_Ch1_Ch13[i][2], 4) == 0) { - CCK_index_old = (u8)i; - dm_odm->BbSwingIdxCckBase = (u8)i; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch14 %d\n", - rCCK0_TxFilter2, TempCCk, CCK_index_old, dm_odm->RFCalibrateInfo.bCCKinCH14)); - break; - } - } - } - - if (!dm_odm->RFCalibrateInfo.ThermalValue) { - dm_odm->RFCalibrateInfo.ThermalValue = pHalData->EEPROMThermalMeter; - dm_odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; - dm_odm->RFCalibrateInfo.ThermalValue_IQK = ThermalValue; - - for (i = 0; i < rf; i++) - dm_odm->RFCalibrateInfo.OFDM_index[i] = OFDM_index_old[i]; - dm_odm->RFCalibrateInfo.CCK_index = CCK_index_old; - } - - if (dm_odm->RFCalibrateInfo.bReloadtxpowerindex) - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("reload ofdm index for band switch\n")); - - /* calculate average thermal meter */ - dm_odm->RFCalibrateInfo.ThermalValue_AVG[dm_odm->RFCalibrateInfo.ThermalValue_AVG_index] = ThermalValue; - dm_odm->RFCalibrateInfo.ThermalValue_AVG_index++; - if (dm_odm->RFCalibrateInfo.ThermalValue_AVG_index == AVG_THERMAL_NUM_88E) - dm_odm->RFCalibrateInfo.ThermalValue_AVG_index = 0; - - for (i = 0; i < AVG_THERMAL_NUM_88E; i++) { - if (dm_odm->RFCalibrateInfo.ThermalValue_AVG[i]) { - ThermalValue_AVG += dm_odm->RFCalibrateInfo.ThermalValue_AVG[i]; - ThermalValue_AVG_count++; - } - } - - if (ThermalValue_AVG_count) { - ThermalValue = (u8)(ThermalValue_AVG / ThermalValue_AVG_count); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("AVG Thermal Meter = 0x%x\n", ThermalValue)); - } - - if (dm_odm->RFCalibrateInfo.bReloadtxpowerindex) { - delta = ThermalValue > pHalData->EEPROMThermalMeter ? - (ThermalValue - pHalData->EEPROMThermalMeter) : - (pHalData->EEPROMThermalMeter - ThermalValue); - dm_odm->RFCalibrateInfo.bReloadtxpowerindex = false; - dm_odm->RFCalibrateInfo.bDoneTxpower = false; - } else if (dm_odm->RFCalibrateInfo.bDoneTxpower) { - delta = (ThermalValue > dm_odm->RFCalibrateInfo.ThermalValue) ? - (ThermalValue - dm_odm->RFCalibrateInfo.ThermalValue) : - (dm_odm->RFCalibrateInfo.ThermalValue - ThermalValue); - } else { - delta = ThermalValue > pHalData->EEPROMThermalMeter ? - (ThermalValue - pHalData->EEPROMThermalMeter) : - (pHalData->EEPROMThermalMeter - ThermalValue); - } - delta_LCK = (ThermalValue > dm_odm->RFCalibrateInfo.ThermalValue_LCK) ? - (ThermalValue - dm_odm->RFCalibrateInfo.ThermalValue_LCK) : - (dm_odm->RFCalibrateInfo.ThermalValue_LCK - ThermalValue); - delta_IQK = (ThermalValue > dm_odm->RFCalibrateInfo.ThermalValue_IQK) ? - (ThermalValue - dm_odm->RFCalibrateInfo.ThermalValue_IQK) : - (dm_odm->RFCalibrateInfo.ThermalValue_IQK - ThermalValue); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x delta 0x%x delta_LCK 0x%x delta_IQK 0x%x\n", - ThermalValue, dm_odm->RFCalibrateInfo.ThermalValue, - pHalData->EEPROMThermalMeter, delta, delta_LCK, delta_IQK)); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("pre thermal meter LCK 0x%x pre thermal meter IQK 0x%x delta_LCK_bound 0x%x delta_IQK_bound 0x%x\n", - dm_odm->RFCalibrateInfo.ThermalValue_LCK, - dm_odm->RFCalibrateInfo.ThermalValue_IQK, - dm_odm->RFCalibrateInfo.Delta_LCK, - dm_odm->RFCalibrateInfo.Delta_IQK)); - - if ((delta_LCK >= 8)) { /* Delta temperature is equal to or larger than 20 centigrade. */ - dm_odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; - PHY_LCCalibrate_8188E(Adapter); - } - - if (delta > 0 && dm_odm->RFCalibrateInfo.TxPowerTrackControl) { - delta = ThermalValue > pHalData->EEPROMThermalMeter ? - (ThermalValue - pHalData->EEPROMThermalMeter) : - (pHalData->EEPROMThermalMeter - ThermalValue); - /* calculate new OFDM / CCK offset */ - if (ThermalValue > pHalData->EEPROMThermalMeter) - j = 1; - else - j = 0; - for (offset = 0; offset < index_mapping_NUM_88E; offset++) { - if (delta < Thermal_mapping[j][offset]) { - if (offset != 0) - offset--; - break; - } - } - if (offset >= index_mapping_NUM_88E) - offset = index_mapping_NUM_88E-1; - for (i = 0; i < rf; i++) - OFDM_index[i] = dm_odm->RFCalibrateInfo.OFDM_index[i] + OFDM_index_mapping[j][offset]; - CCK_index = dm_odm->RFCalibrateInfo.CCK_index + OFDM_index_mapping[j][offset]; - - if (is2t) { - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("temp OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", - dm_odm->RFCalibrateInfo.OFDM_index[0], - dm_odm->RFCalibrateInfo.OFDM_index[1], - dm_odm->RFCalibrateInfo.CCK_index)); - } else { - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("temp OFDM_A_index=0x%x, CCK_index=0x%x\n", - dm_odm->RFCalibrateInfo.OFDM_index[0], - dm_odm->RFCalibrateInfo.CCK_index)); - } - - for (i = 0; i < rf; i++) { - if (OFDM_index[i] > OFDM_TABLE_SIZE_92D-1) - OFDM_index[i] = OFDM_TABLE_SIZE_92D-1; - else if (OFDM_index[i] < OFDM_min_index) - OFDM_index[i] = OFDM_min_index; - } - - if (CCK_index > CCK_TABLE_SIZE-1) - CCK_index = CCK_TABLE_SIZE-1; - else if (CCK_index < 0) - CCK_index = 0; - - if (is2t) { - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("new OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", - OFDM_index[0], OFDM_index[1], CCK_index)); - } else { - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("new OFDM_A_index=0x%x, CCK_index=0x%x\n", - OFDM_index[0], CCK_index)); - } - - /* 2 temporarily remove bNOPG */ - /* Config by SwingTable */ - if (dm_odm->RFCalibrateInfo.TxPowerTrackControl) { - dm_odm->RFCalibrateInfo.bDoneTxpower = true; - - /* Adujst OFDM Ant_A according to IQK result */ - ele_D = (OFDMSwingTable[(u8)OFDM_index[0]] & 0xFFC00000)>>22; - X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][0]; - Y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][1]; - - /* Revse TX power table. */ - dm_odm->BbSwingIdxOfdm = (u8)OFDM_index[0]; - dm_odm->BbSwingIdxCck = (u8)CCK_index; - - if (dm_odm->BbSwingIdxOfdmCurrent != dm_odm->BbSwingIdxOfdm) { - dm_odm->BbSwingIdxOfdmCurrent = dm_odm->BbSwingIdxOfdm; - dm_odm->BbSwingFlagOfdm = true; - } - - if (dm_odm->BbSwingIdxCckCurrent != dm_odm->BbSwingIdxCck) { - dm_odm->BbSwingIdxCckCurrent = dm_odm->BbSwingIdxCck; - dm_odm->BbSwingFlagCck = true; - } - - if (X != 0) { - if ((X & 0x00000200) != 0) - X = X | 0xFFFFFC00; - ele_A = ((X * ele_D)>>8)&0x000003FF; - - /* new element C = element D x Y */ - if ((Y & 0x00000200) != 0) - Y = Y | 0xFFFFFC00; - ele_C = ((Y * ele_D)>>8)&0x000003FF; - - /* 2012/04/23 MH According to Luke's suggestion, we can not write BB digital */ - /* to increase TX power. Otherwise, EVM will be bad. */ - } - - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("TxPwrTracking for path A: X=0x%x, Y=0x%x ele_A=0x%x ele_C=0x%x ele_D=0x%x 0xe94=0x%x 0xe9c=0x%x\n", - (u32)X, (u32)Y, (u32)ele_A, (u32)ele_C, (u32)ele_D, (u32)X, (u32)Y)); - - if (is2t) { - ele_D = (OFDMSwingTable[(u8)OFDM_index[1]] & 0xFFC00000)>>22; - - /* new element A = element D x X */ - X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][4]; - Y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][5]; - - if ((X != 0) && (*(dm_odm->pBandType) == ODM_BAND_2_4G)) { - if ((X & 0x00000200) != 0) /* consider minus */ - X = X | 0xFFFFFC00; - ele_A = ((X * ele_D)>>8)&0x000003FF; - - /* new element C = element D x Y */ - if ((Y & 0x00000200) != 0) - Y = Y | 0xFFFFFC00; - ele_C = ((Y * ele_D)>>8)&0x00003FF; - - /* wtite new elements A, C, D to regC88 and regC9C, element B is always 0 */ - value32 = (ele_D<<22) | ((ele_C&0x3F)<<16) | ele_A; - ODM_SetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); - - value32 = (ele_C&0x000003C0)>>6; - ODM_SetBBReg(dm_odm, rOFDM0_XDTxAFE, bMaskH4Bits, value32); - - value32 = ((X * ele_D)>>7)&0x01; - ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT28, value32); - } else { - ODM_SetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)OFDM_index[1]]); - ODM_SetBBReg(dm_odm, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); - ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT28, 0x00); - } - - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("TxPwrTracking path B: X=0x%x, Y=0x%x ele_A=0x%x ele_C=0x%x ele_D=0x%x 0xeb4=0x%x 0xebc=0x%x\n", - (u32)X, (u32)Y, (u32)ele_A, - (u32)ele_C, (u32)ele_D, (u32)X, (u32)Y)); - } - - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n", - ODM_GetBBReg(dm_odm, 0xc80, bMaskDWord), ODM_GetBBReg(dm_odm, - 0xc94, bMaskDWord), ODM_GetRFReg(dm_odm, RF_PATH_A, 0x24, bRFRegOffsetMask))); - } - } - - if (delta_IQK >= 8) { /* Delta temperature is equal to or larger than 20 centigrade. */ - ODM_ResetIQKResult(dm_odm); - - dm_odm->RFCalibrateInfo.ThermalValue_IQK = ThermalValue; - PHY_IQCalibrate_8188E(Adapter, false); - } - /* update thermal meter value */ - if (dm_odm->RFCalibrateInfo.TxPowerTrackControl) - dm_odm->RFCalibrateInfo.ThermalValue = ThermalValue; - } - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("<===dm_TXPowerTrackingCallback_ThermalMeter_8188E\n")); - dm_odm->RFCalibrateInfo.TXPowercount = 0; -} - -/* 1 7. IQK */ -#define MAX_TOLERANCE 5 -#define IQK_DELAY_TIME 1 /* ms */ - -static u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ -phy_PathA_IQK_8188E(struct adapter *adapt, bool configPathB) -{ - u32 regeac, regE94, regE9C, regEA4; - u8 result = 0x00; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK!\n")); - - /* 1 Tx IQK */ - /* path-A IQK setting */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A IQK setting!\n")); - ODM_SetBBReg(dm_odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); - ODM_SetBBReg(dm_odm, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); - ODM_SetBBReg(dm_odm, rTx_IQK_PI_A, bMaskDWord, 0x8214032a); - ODM_SetBBReg(dm_odm, rRx_IQK_PI_A, bMaskDWord, 0x28160000); - - /* LO calibration setting */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); - ODM_SetBBReg(dm_odm, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); - - /* One shot, path A LOK & IQK */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); - ODM_SetBBReg(dm_odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); - ODM_SetBBReg(dm_odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); - - /* delay x ms */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); - /* PlatformStallExecution(IQK_DELAY_TIME_88E*1000); */ - ODM_delay_ms(IQK_DELAY_TIME_88E); - - /* Check failed */ - regeac = ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_A_2, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regeac)); - regE94 = ODM_GetBBReg(dm_odm, rTx_Power_Before_IQK_A, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); - regE9C = ODM_GetBBReg(dm_odm, rTx_Power_After_IQK_A, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); - regEA4 = ODM_GetBBReg(dm_odm, rRx_Power_Before_IQK_A_2, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x\n", regEA4)); - - if (!(regeac & BIT28) && - (((regE94 & 0x03FF0000)>>16) != 0x142) && - (((regE9C & 0x03FF0000)>>16) != 0x42)) - result |= 0x01; - return result; -} - -static u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ -phy_PathA_RxIQK(struct adapter *adapt, bool configPathB) -{ - u32 regeac, regE94, regE9C, regEA4, u4tmp; - u8 result = 0x00; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK!\n")); - - /* 1 Get TXIMR setting */ - /* modify RXIQK mode table */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table!\n")); - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B); - - /* PA,PAD off */ - ODM_SetRFReg(dm_odm, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980); - ODM_SetRFReg(dm_odm, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000); - - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x80800000); - - /* IQK setting */ - ODM_SetBBReg(dm_odm, rTx_IQK, bMaskDWord, 0x01007c00); - ODM_SetBBReg(dm_odm, rRx_IQK, bMaskDWord, 0x81004800); - - /* path-A IQK setting */ - ODM_SetBBReg(dm_odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); - ODM_SetBBReg(dm_odm, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); - ODM_SetBBReg(dm_odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f); - ODM_SetBBReg(dm_odm, rRx_IQK_PI_A, bMaskDWord, 0x28160000); - - /* LO calibration setting */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); - ODM_SetBBReg(dm_odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); - - /* One shot, path A LOK & IQK */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); - ODM_SetBBReg(dm_odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); - ODM_SetBBReg(dm_odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); - - /* delay x ms */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("Delay %d ms for One shot, path A LOK & IQK.\n", - IQK_DELAY_TIME_88E)); - ODM_delay_ms(IQK_DELAY_TIME_88E); - - /* Check failed */ - regeac = ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_A_2, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("0xeac = 0x%x\n", regeac)); - regE94 = ODM_GetBBReg(dm_odm, rTx_Power_Before_IQK_A, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("0xe94 = 0x%x\n", regE94)); - regE9C = ODM_GetBBReg(dm_odm, rTx_Power_After_IQK_A, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("0xe9c = 0x%x\n", regE9C)); - - if (!(regeac & BIT28) && - (((regE94 & 0x03FF0000)>>16) != 0x142) && - (((regE9C & 0x03FF0000)>>16) != 0x42)) - result |= 0x01; - else /* if Tx not OK, ignore Rx */ - return result; - - u4tmp = 0x80007C00 | (regE94&0x3FF0000) | ((regE9C&0x3FF0000) >> 16); - ODM_SetBBReg(dm_odm, rTx_IQK, bMaskDWord, u4tmp); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe40 = 0x%x u4tmp = 0x%x\n", ODM_GetBBReg(dm_odm, rTx_IQK, bMaskDWord), u4tmp)); - - /* 1 RX IQK */ - /* modify RXIQK mode table */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table 2!\n")); - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa); - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x80800000); - - /* IQK setting */ - ODM_SetBBReg(dm_odm, rRx_IQK, bMaskDWord, 0x01004800); - - /* path-A IQK setting */ - ODM_SetBBReg(dm_odm, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c); - ODM_SetBBReg(dm_odm, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c); - ODM_SetBBReg(dm_odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c05); - ODM_SetBBReg(dm_odm, rRx_IQK_PI_A, bMaskDWord, 0x28160c1f); - - /* LO calibration setting */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); - ODM_SetBBReg(dm_odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); - - /* One shot, path A LOK & IQK */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); - ODM_SetBBReg(dm_odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); - ODM_SetBBReg(dm_odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); - - /* delay x ms */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); - /* PlatformStallExecution(IQK_DELAY_TIME_88E*1000); */ - ODM_delay_ms(IQK_DELAY_TIME_88E); - - /* Check failed */ - regeac = ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_A_2, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regeac)); - regE94 = ODM_GetBBReg(dm_odm, rTx_Power_Before_IQK_A, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); - regE9C = ODM_GetBBReg(dm_odm, rTx_Power_After_IQK_A, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); - regEA4 = ODM_GetBBReg(dm_odm, rRx_Power_Before_IQK_A_2, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x\n", regEA4)); - - /* reload RF 0xdf */ - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - ODM_SetRFReg(dm_odm, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180); - - if (!(regeac & BIT27) && /* if Tx is OK, check whether Rx is OK */ - (((regEA4 & 0x03FF0000)>>16) != 0x132) && - (((regeac & 0x03FF0000)>>16) != 0x36)) - result |= 0x02; - else - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK fail!!\n")); - - return result; -} - -static u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */ -phy_PathB_IQK_8188E(struct adapter *adapt) -{ - u32 regeac, regeb4, regebc, regec4, regecc; - u8 result = 0x00; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK!\n")); - - /* One shot, path B LOK & IQK */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); - ODM_SetBBReg(dm_odm, rIQK_AGC_Cont, bMaskDWord, 0x00000002); - ODM_SetBBReg(dm_odm, rIQK_AGC_Cont, bMaskDWord, 0x00000000); - - /* delay x ms */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("Delay %d ms for One shot, path B LOK & IQK.\n", - IQK_DELAY_TIME_88E)); - ODM_delay_ms(IQK_DELAY_TIME_88E); - - /* Check failed */ - regeac = ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_A_2, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("0xeac = 0x%x\n", regeac)); - regeb4 = ODM_GetBBReg(dm_odm, rTx_Power_Before_IQK_B, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("0xeb4 = 0x%x\n", regeb4)); - regebc = ODM_GetBBReg(dm_odm, rTx_Power_After_IQK_B, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("0xebc = 0x%x\n", regebc)); - regec4 = ODM_GetBBReg(dm_odm, rRx_Power_Before_IQK_B_2, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("0xec4 = 0x%x\n", regec4)); - regecc = ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_B_2, bMaskDWord); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("0xecc = 0x%x\n", regecc)); - - if (!(regeac & BIT31) && - (((regeb4 & 0x03FF0000)>>16) != 0x142) && - (((regebc & 0x03FF0000)>>16) != 0x42)) - result |= 0x01; - else - return result; - - if (!(regeac & BIT30) && - (((regec4 & 0x03FF0000)>>16) != 0x132) && - (((regecc & 0x03FF0000)>>16) != 0x36)) - result |= 0x02; - else - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK fail!!\n")); - return result; -} - -static void patha_fill_iqk(struct adapter *adapt, bool iqkok, s32 result[][8], u8 final_candidate, bool txonly) -{ - u32 Oldval_0, X, TX0_A, reg; - s32 Y, TX0_C; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("Path A IQ Calibration %s !\n", - (iqkok) ? "Success" : "Failed")); - - if (final_candidate == 0xFF) { - return; - } else if (iqkok) { - Oldval_0 = (ODM_GetBBReg(dm_odm, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; - - X = result[final_candidate][0]; - if ((X & 0x00000200) != 0) - X = X | 0xFFFFFC00; - TX0_A = (X * Oldval_0) >> 8; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", - X, TX0_A, Oldval_0)); - ODM_SetBBReg(dm_odm, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); - - ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT(31), ((X * Oldval_0>>7) & 0x1)); - - Y = result[final_candidate][1]; - if ((Y & 0x00000200) != 0) - Y = Y | 0xFFFFFC00; - - TX0_C = (Y * Oldval_0) >> 8; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C)); - ODM_SetBBReg(dm_odm, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); - ODM_SetBBReg(dm_odm, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); - - ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT(29), ((Y * Oldval_0>>7) & 0x1)); - - if (txonly) { - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("patha_fill_iqk only Tx OK\n")); - return; - } - - reg = result[final_candidate][2]; - ODM_SetBBReg(dm_odm, rOFDM0_XARxIQImbalance, 0x3FF, reg); - - reg = result[final_candidate][3] & 0x3F; - ODM_SetBBReg(dm_odm, rOFDM0_XARxIQImbalance, 0xFC00, reg); - - reg = (result[final_candidate][3] >> 6) & 0xF; - ODM_SetBBReg(dm_odm, rOFDM0_RxIQExtAnta, 0xF0000000, reg); - } -} - -static void pathb_fill_iqk(struct adapter *adapt, bool iqkok, s32 result[][8], u8 final_candidate, bool txonly) -{ - u32 Oldval_1, X, TX1_A, reg; - s32 Y, TX1_C; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("Path B IQ Calibration %s !\n", - (iqkok) ? "Success" : "Failed")); - - if (final_candidate == 0xFF) { - return; - } else if (iqkok) { - Oldval_1 = (ODM_GetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; - - X = result[final_candidate][4]; - if ((X & 0x00000200) != 0) - X = X | 0xFFFFFC00; - TX1_A = (X * Oldval_1) >> 8; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); - ODM_SetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); - - ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT(27), ((X * Oldval_1>>7) & 0x1)); - - Y = result[final_candidate][5]; - if ((Y & 0x00000200) != 0) - Y = Y | 0xFFFFFC00; - - TX1_C = (Y * Oldval_1) >> 8; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C)); - ODM_SetBBReg(dm_odm, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); - ODM_SetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); - - ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT(25), ((Y * Oldval_1>>7) & 0x1)); - - if (txonly) - return; - - reg = result[final_candidate][6]; - ODM_SetBBReg(dm_odm, rOFDM0_XBRxIQImbalance, 0x3FF, reg); - - reg = result[final_candidate][7] & 0x3F; - ODM_SetBBReg(dm_odm, rOFDM0_XBRxIQImbalance, 0xFC00, reg); - - reg = (result[final_candidate][7] >> 6) & 0xF; - ODM_SetBBReg(dm_odm, rOFDM0_AGCRSSITable, 0x0000F000, reg); - } -} - -/* */ -/* 2011/07/26 MH Add an API for testing IQK fail case. */ -/* */ -/* MP Already declare in odm.c */ -static bool ODM_CheckPowerStatus(struct adapter *Adapter) -{ - return true; -} - -void _PHY_SaveADDARegisters(struct adapter *adapt, u32 *ADDAReg, u32 *ADDABackup, u32 RegisterNum) -{ - u32 i; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - - if (!ODM_CheckPowerStatus(adapt)) - return; - - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save ADDA parameters.\n")); - for (i = 0; i < RegisterNum; i++) { - ADDABackup[i] = ODM_GetBBReg(dm_odm, ADDAReg[i], bMaskDWord); - } -} - -static void _PHY_SaveMACRegisters( - struct adapter *adapt, - u32 *MACReg, - u32 *MACBackup - ) -{ - u32 i; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n")); - for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) { - MACBackup[i] = ODM_Read1Byte(dm_odm, MACReg[i]); - } - MACBackup[i] = ODM_Read4Byte(dm_odm, MACReg[i]); -} - -static void reload_adda_reg(struct adapter *adapt, u32 *ADDAReg, u32 *ADDABackup, u32 RegiesterNum) -{ - u32 i; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload ADDA power saving parameters !\n")); - for (i = 0; i < RegiesterNum; i++) - ODM_SetBBReg(dm_odm, ADDAReg[i], bMaskDWord, ADDABackup[i]); -} - -static void -_PHY_ReloadMACRegisters( - struct adapter *adapt, - u32 *MACReg, - u32 *MACBackup - ) -{ - u32 i; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n")); - for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) { - ODM_Write1Byte(dm_odm, MACReg[i], (u8)MACBackup[i]); - } - ODM_Write4Byte(dm_odm, MACReg[i], MACBackup[i]); -} - -void -_PHY_PathADDAOn( - struct adapter *adapt, - u32 *ADDAReg, - bool isPathAOn, - bool is2t - ) -{ - u32 pathOn; - u32 i; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ADDA ON.\n")); - - pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4; - if (!is2t) { - pathOn = 0x0bdb25a0; - ODM_SetBBReg(dm_odm, ADDAReg[0], bMaskDWord, 0x0b1b25a0); - } else { - ODM_SetBBReg(dm_odm, ADDAReg[0], bMaskDWord, pathOn); - } - - for (i = 1; i < IQK_ADDA_REG_NUM; i++) - ODM_SetBBReg(dm_odm, ADDAReg[i], bMaskDWord, pathOn); -} - -void -_PHY_MACSettingCalibration( - struct adapter *adapt, - u32 *MACReg, - u32 *MACBackup - ) -{ - u32 i = 0; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("MAC settings for Calibration.\n")); - - ODM_Write1Byte(dm_odm, MACReg[i], 0x3F); - - for (i = 1; i < (IQK_MAC_REG_NUM - 1); i++) { - ODM_Write1Byte(dm_odm, MACReg[i], (u8)(MACBackup[i]&(~BIT3))); - } - ODM_Write1Byte(dm_odm, MACReg[i], (u8)(MACBackup[i]&(~BIT5))); -} - -void -_PHY_PathAStandBy( - struct adapter *adapt - ) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A standby mode!\n")); - - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x0); - ODM_SetBBReg(dm_odm, 0x840, bMaskDWord, 0x00010000); - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x80800000); -} - -static void _PHY_PIModeSwitch( - struct adapter *adapt, - bool PIMode - ) -{ - u32 mode; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI"))); - - mode = PIMode ? 0x01000100 : 0x01000000; - ODM_SetBBReg(dm_odm, rFPGA0_XA_HSSIParameter1, bMaskDWord, mode); - ODM_SetBBReg(dm_odm, rFPGA0_XB_HSSIParameter1, bMaskDWord, mode); -} - -static bool phy_SimularityCompare_8188E( - struct adapter *adapt, - s32 resulta[][8], - u8 c1, - u8 c2 - ) -{ - u32 i, j, diff, sim_bitmap, bound = 0; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - u8 final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */ - bool result = true; - bool is2t; - s32 tmp1 = 0, tmp2 = 0; - - if ((dm_odm->RFType == ODM_2T2R) || (dm_odm->RFType == ODM_2T3R) || (dm_odm->RFType == ODM_2T4R)) - is2t = true; - else - is2t = false; - - if (is2t) - bound = 8; - else - bound = 4; - - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> IQK:phy_SimularityCompare_8188E c1 %d c2 %d!!!\n", c1, c2)); - - sim_bitmap = 0; - - for (i = 0; i < bound; i++) { - if ((i == 1) || (i == 3) || (i == 5) || (i == 7)) { - if ((resulta[c1][i] & 0x00000200) != 0) - tmp1 = resulta[c1][i] | 0xFFFFFC00; - else - tmp1 = resulta[c1][i]; - - if ((resulta[c2][i] & 0x00000200) != 0) - tmp2 = resulta[c2][i] | 0xFFFFFC00; - else - tmp2 = resulta[c2][i]; - } else { - tmp1 = resulta[c1][i]; - tmp2 = resulta[c2][i]; - } - - diff = (tmp1 > tmp2) ? (tmp1 - tmp2) : (tmp2 - tmp1); - - if (diff > MAX_TOLERANCE) { - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("IQK:phy_SimularityCompare_8188E differnece overflow index %d compare1 0x%x compare2 0x%x!!!\n", - i, resulta[c1][i], resulta[c2][i])); - - if ((i == 2 || i == 6) && !sim_bitmap) { - if (resulta[c1][i] + resulta[c1][i+1] == 0) - final_candidate[(i/4)] = c2; - else if (resulta[c2][i] + resulta[c2][i+1] == 0) - final_candidate[(i/4)] = c1; - else - sim_bitmap = sim_bitmap | (1<odmpriv; - u32 i; - u8 PathAOK, PathBOK; - u32 ADDA_REG[IQK_ADDA_REG_NUM] = { - rFPGA0_XCD_SwitchControl, rBlue_Tooth, - rRx_Wait_CCA, rTx_CCK_RFON, - rTx_CCK_BBON, rTx_OFDM_RFON, - rTx_OFDM_BBON, rTx_To_Rx, - rTx_To_Tx, rRx_CCK, - rRx_OFDM, rRx_Wait_RIFS, - rRx_TO_Rx, rStandby, - rSleep, rPMPD_ANAEN }; - u32 IQK_MAC_REG[IQK_MAC_REG_NUM] = { - REG_TXPAUSE, REG_BCN_CTRL, - REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; - - /* since 92C & 92D have the different define in IQK_BB_REG */ - u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = { - rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, - rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, - rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, - rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD - }; - - u32 retryCount = 9; - if (*(dm_odm->mp_mode) == 1) - retryCount = 9; - else - retryCount = 2; - /* Note: IQ calibration must be performed after loading */ - /* PHY_REG.txt , and radio_a, radio_b.txt */ - - if (t == 0) { - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2t ? "2T2R" : "1T1R"), t)); - - /* Save ADDA parameters, turn Path A ADDA on */ - _PHY_SaveADDARegisters(adapt, ADDA_REG, dm_odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); - _PHY_SaveMACRegisters(adapt, IQK_MAC_REG, dm_odm->RFCalibrateInfo.IQK_MAC_backup); - _PHY_SaveADDARegisters(adapt, IQK_BB_REG_92C, dm_odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); - } - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2t ? "2T2R" : "1T1R"), t)); - - _PHY_PathADDAOn(adapt, ADDA_REG, true, is2t); - if (t == 0) - dm_odm->RFCalibrateInfo.bRfPiEnable = (u8)ODM_GetBBReg(dm_odm, rFPGA0_XA_HSSIParameter1, BIT(8)); - - if (!dm_odm->RFCalibrateInfo.bRfPiEnable) { - /* Switch BB to PI mode to do IQ Calibration. */ - _PHY_PIModeSwitch(adapt, true); - } - - /* BB setting */ - ODM_SetBBReg(dm_odm, rFPGA0_RFMOD, BIT24, 0x00); - ODM_SetBBReg(dm_odm, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); - ODM_SetBBReg(dm_odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); - ODM_SetBBReg(dm_odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); - - ODM_SetBBReg(dm_odm, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); - ODM_SetBBReg(dm_odm, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); - ODM_SetBBReg(dm_odm, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); - ODM_SetBBReg(dm_odm, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); - - if (is2t) { - ODM_SetBBReg(dm_odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); - ODM_SetBBReg(dm_odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000); - } - - /* MAC settings */ - _PHY_MACSettingCalibration(adapt, IQK_MAC_REG, dm_odm->RFCalibrateInfo.IQK_MAC_backup); - - /* Page B init */ - /* AP or IQK */ - ODM_SetBBReg(dm_odm, rConfig_AntA, bMaskDWord, 0x0f600000); - - if (is2t) - ODM_SetBBReg(dm_odm, rConfig_AntB, bMaskDWord, 0x0f600000); - - /* IQ calibration setting */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK setting!\n")); - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0x80800000); - ODM_SetBBReg(dm_odm, rTx_IQK, bMaskDWord, 0x01007c00); - ODM_SetBBReg(dm_odm, rRx_IQK, bMaskDWord, 0x81004800); - - for (i = 0; i < retryCount; i++) { - PathAOK = phy_PathA_IQK_8188E(adapt, is2t); - if (PathAOK == 0x01) { - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Tx IQK Success!!\n")); - result[t][0] = (ODM_GetBBReg(dm_odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; - result[t][1] = (ODM_GetBBReg(dm_odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; - break; - } - } - - for (i = 0; i < retryCount; i++) { - PathAOK = phy_PathA_RxIQK(adapt, is2t); - if (PathAOK == 0x03) { - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Success!!\n")); - result[t][2] = (ODM_GetBBReg(dm_odm, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; - result[t][3] = (ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; - break; - } else { - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Fail!!\n")); - } - } - - if (0x00 == PathAOK) { - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK failed!!\n")); - } - - if (is2t) { - _PHY_PathAStandBy(adapt); - - /* Turn Path B ADDA on */ - _PHY_PathADDAOn(adapt, ADDA_REG, false, is2t); - - for (i = 0; i < retryCount; i++) { - PathBOK = phy_PathB_IQK_8188E(adapt); - if (PathBOK == 0x03) { - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK Success!!\n")); - result[t][4] = (ODM_GetBBReg(dm_odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; - result[t][5] = (ODM_GetBBReg(dm_odm, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; - result[t][6] = (ODM_GetBBReg(dm_odm, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; - result[t][7] = (ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; - break; - } else if (i == (retryCount - 1) && PathBOK == 0x01) { /* Tx IQK OK */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Only Tx IQK Success!!\n")); - result[t][4] = (ODM_GetBBReg(dm_odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; - result[t][5] = (ODM_GetBBReg(dm_odm, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; - } - } - - if (0x00 == PathBOK) { - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK failed!!\n")); - } - } - - /* Back to BB mode, load original value */ - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Back to BB mode, load original value!\n")); - ODM_SetBBReg(dm_odm, rFPGA0_IQK, bMaskDWord, 0); - - if (t != 0) { - if (!dm_odm->RFCalibrateInfo.bRfPiEnable) { - /* Switch back BB to SI mode after finish IQ Calibration. */ - _PHY_PIModeSwitch(adapt, false); - } - - /* Reload ADDA power saving parameters */ - reload_adda_reg(adapt, ADDA_REG, dm_odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); - - /* Reload MAC parameters */ - _PHY_ReloadMACRegisters(adapt, IQK_MAC_REG, dm_odm->RFCalibrateInfo.IQK_MAC_backup); - - reload_adda_reg(adapt, IQK_BB_REG_92C, dm_odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); - - /* Restore RX initial gain */ - ODM_SetBBReg(dm_odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); - if (is2t) - ODM_SetBBReg(dm_odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); - - /* load 0xe30 IQC default value */ - ODM_SetBBReg(dm_odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); - ODM_SetBBReg(dm_odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); - } - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_IQCalibrate_8188E() <==\n")); -} - -static void phy_LCCalibrate_8188E(struct adapter *adapt, bool is2t) -{ - u8 tmpreg; - u32 RF_Amode = 0, RF_Bmode = 0, LC_Cal; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - - /* Check continuous TX and Packet TX */ - tmpreg = ODM_Read1Byte(dm_odm, 0xd03); - - if ((tmpreg&0x70) != 0) /* Deal with contisuous TX case */ - ODM_Write1Byte(dm_odm, 0xd03, tmpreg&0x8F); /* disable all continuous TX */ - else /* Deal with Packet TX case */ - ODM_Write1Byte(dm_odm, REG_TXPAUSE, 0xFF); /* block all queues */ - - if ((tmpreg&0x70) != 0) { - /* 1. Read original RF mode */ - /* Path-A */ - RF_Amode = PHY_QueryRFReg(adapt, RF_PATH_A, RF_AC, bMask12Bits); - - /* Path-B */ - if (is2t) - RF_Bmode = PHY_QueryRFReg(adapt, RF_PATH_B, RF_AC, bMask12Bits); - - /* 2. Set RF mode = standby mode */ - /* Path-A */ - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); - - /* Path-B */ - if (is2t) - ODM_SetRFReg(dm_odm, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); - } - - /* 3. Read RF reg18 */ - LC_Cal = PHY_QueryRFReg(adapt, RF_PATH_A, RF_CHNLBW, bMask12Bits); - - /* 4. Set LC calibration begin bit15 */ - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); - - ODM_sleep_ms(100); - - /* Restore original situation */ - if ((tmpreg&0x70) != 0) { - /* Deal with continuous TX case */ - /* Path-A */ - ODM_Write1Byte(dm_odm, 0xd03, tmpreg); - ODM_SetRFReg(dm_odm, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); - - /* Path-B */ - if (is2t) - ODM_SetRFReg(dm_odm, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); - } else { - /* Deal with Packet TX case */ - ODM_Write1Byte(dm_odm, REG_TXPAUSE, 0x00); - } -} - -void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - struct mpt_context *pMptCtx = &(adapt->mppriv.MptCtx); - s32 result[4][8]; /* last is final result */ - u8 i, final_candidate, Indexforchannel; - bool pathaok, pathbok; - s32 RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC; - bool is12simular, is13simular, is23simular; - bool singletone = false, carrier_sup = false; - u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = { - rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, - rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, - rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, - rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, - rOFDM0_RxIQExtAnta}; - bool is2t; - - is2t = (dm_odm->RFType == ODM_2T2R) ? true : false; - if (!ODM_CheckPowerStatus(adapt)) - return; - - if (!(dm_odm->SupportAbility & ODM_RF_CALIBRATION)) - return; - - if (*(dm_odm->mp_mode) == 1) { - singletone = pMptCtx->bSingleTone; - carrier_sup = pMptCtx->bCarrierSuppression; - } - - /* 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) */ - if (singletone || carrier_sup) - return; - - if (recovery) { - ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("PHY_IQCalibrate_8188E: Return due to recovery!\n")); - reload_adda_reg(adapt, IQK_BB_REG_92C, dm_odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); - return; - } - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Start!!!\n")); - - for (i = 0; i < 8; i++) { - result[0][i] = 0; - result[1][i] = 0; - result[2][i] = 0; - if ((i == 0) || (i == 2) || (i == 4) || (i == 6)) - result[3][i] = 0x100; - else - result[3][i] = 0; - } - final_candidate = 0xff; - pathaok = false; - pathbok = false; - is12simular = false; - is23simular = false; - is13simular = false; - - for (i = 0; i < 3; i++) { - phy_IQCalibrate_8188E(adapt, result, i, is2t); - - if (i == 1) { - is12simular = phy_SimularityCompare_8188E(adapt, result, 0, 1); - if (is12simular) { - final_candidate = 0; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is12simular final_candidate is %x\n", final_candidate)); - break; - } - } - - if (i == 2) { - is13simular = phy_SimularityCompare_8188E(adapt, result, 0, 2); - if (is13simular) { - final_candidate = 0; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is13simular final_candidate is %x\n", final_candidate)); - - break; - } - is23simular = phy_SimularityCompare_8188E(adapt, result, 1, 2); - if (is23simular) { - final_candidate = 1; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is23simular final_candidate is %x\n", final_candidate)); - } else { - final_candidate = 3; - } - } - } - - for (i = 0; i < 4; i++) { - RegE94 = result[i][0]; - RegE9C = result[i][1]; - RegEA4 = result[i][2]; - RegEAC = result[i][3]; - RegEB4 = result[i][4]; - RegEBC = result[i][5]; - RegEC4 = result[i][6]; - RegECC = result[i][7]; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n", - RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); - } - - if (final_candidate != 0xff) { - RegE94 = result[final_candidate][0]; - RegE9C = result[final_candidate][1]; - RegEA4 = result[final_candidate][2]; - RegEAC = result[final_candidate][3]; - RegEB4 = result[final_candidate][4]; - RegEBC = result[final_candidate][5]; - dm_odm->RFCalibrateInfo.RegE94 = RegE94; - dm_odm->RFCalibrateInfo.RegE9C = RegE9C; - dm_odm->RFCalibrateInfo.RegEB4 = RegEB4; - dm_odm->RFCalibrateInfo.RegEBC = RegEBC; - RegEC4 = result[final_candidate][6]; - RegECC = result[final_candidate][7]; - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("IQK: final_candidate is %x\n", final_candidate)); - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n", - RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); - pathaok = true; - pathbok = true; - } else { - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: FAIL use default value\n")); - dm_odm->RFCalibrateInfo.RegE94 = 0x100; - dm_odm->RFCalibrateInfo.RegEB4 = 0x100; /* X default value */ - dm_odm->RFCalibrateInfo.RegE9C = 0x0; - dm_odm->RFCalibrateInfo.RegEBC = 0x0; /* Y default value */ - } - if (RegE94 != 0) - patha_fill_iqk(adapt, pathaok, result, final_candidate, (RegEA4 == 0)); - if (is2t) { - if (RegEB4 != 0) - pathb_fill_iqk(adapt, pathbok, result, final_candidate, (RegEC4 == 0)); - } - - Indexforchannel = ODM_GetRightChnlPlaceforIQK(pHalData->CurrentChannel); - -/* To Fix BSOD when final_candidate is 0xff */ -/* by sherry 20120321 */ - if (final_candidate < 4) { - for (i = 0; i < IQK_Matrix_REG_NUM; i++) - dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][i] = result[final_candidate][i]; - dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].bIQKDone = true; - } - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); - - _PHY_SaveADDARegisters(adapt, IQK_BB_REG_92C, dm_odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); - - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK finished\n")); -} - -void PHY_LCCalibrate_8188E(struct adapter *adapt) -{ - bool singletone = false, carrier_sup = false; - u32 timeout = 2000, timecount = 0; - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - struct mpt_context *pMptCtx = &(adapt->mppriv.MptCtx); - - if (*(dm_odm->mp_mode) == 1) { - singletone = pMptCtx->bSingleTone; - carrier_sup = pMptCtx->bCarrierSuppression; - } - if (!(dm_odm->SupportAbility & ODM_RF_CALIBRATION)) - return; - /* 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) */ - if (singletone || carrier_sup) - return; - - while (*(dm_odm->pbScanInProcess) && timecount < timeout) { - ODM_delay_ms(50); - timecount += 50; - } - - dm_odm->RFCalibrateInfo.bLCKInProgress = true; - - if (dm_odm->RFType == ODM_2T2R) { - phy_LCCalibrate_8188E(adapt, true); - } else { - /* For 88C 1T1R */ - phy_LCCalibrate_8188E(adapt, false); - } - - dm_odm->RFCalibrateInfo.bLCKInProgress = false; - - ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, - ("LCK:Finish!!!interface %d\n", dm_odm->InterfaceIndex)); -} - -static void phy_setrfpathswitch_8188e(struct adapter *adapt, bool main, bool is2t) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - - if (!adapt->hw_init_completed) { - u8 u1btmp; - u1btmp = ODM_Read1Byte(dm_odm, REG_LEDCFG2) | BIT7; - ODM_Write1Byte(dm_odm, REG_LEDCFG2, u1btmp); - ODM_SetBBReg(dm_odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); - } - - if (is2t) { /* 92C */ - if (main) - ODM_SetBBReg(dm_odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); /* 92C_Path_A */ - else - ODM_SetBBReg(dm_odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); /* BT */ - } else { /* 88C */ - if (main) - ODM_SetBBReg(dm_odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x2); /* Main */ - else - ODM_SetBBReg(dm_odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x1); /* Aux */ - } -} - -void PHY_SetRFPathSwitch_8188E(struct adapter *adapt, bool main) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt); - struct odm_dm_struct *dm_odm = &pHalData->odmpriv; - - if (dm_odm->RFType == ODM_2T2R) { - phy_setrfpathswitch_8188e(adapt, main, true); - } else { - /* For 88C 1T1R */ - phy_setrfpathswitch_8188e(adapt, main, false); - } -} + +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#include "odm_precomp.h" + + + +/*---------------------------Define Local Constant---------------------------*/ +// 2010/04/25 MH Define the max tx power tracking tx agc power. +#define ODM_TXPWRTRACK_MAX_IDX_88E 6 + +#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \ + do {\ + for(_offset = 0; _offset < _size; _offset++)\ + {\ + if(_deltaThermal < thermalThreshold[_direction][_offset])\ + {\ + if(_offset != 0)\ + _offset--;\ + break;\ + }\ + } \ + if(_offset >= _size)\ + _offset = _size-1;\ + } while(0) + +//3============================================================ +//3 Tx Power Tracking +//3============================================================ +void setIqkMatrix( + PDM_ODM_T pDM_Odm, + u1Byte OFDM_index, + u1Byte RFPath, + s4Byte IqkResult_X, + s4Byte IqkResult_Y + ) +{ + s4Byte ele_A=0, ele_D, ele_C=0, TempCCk, value32; + + //printk("%s==> OFDM_index:%d \n",__FUNCTION__,OFDM_index); + + //if(OFDM_index> OFDM_TABLE_SIZE_92D) + //{ + //printk("%s==> OFDM_index> 43\n",__FUNCTION__); + //} + ele_D = (OFDMSwingTable[OFDM_index] & 0xFFC00000)>>22; + + //new element A = element D x X + if((IqkResult_X != 0) && (*(pDM_Odm->pBandType) == ODM_BAND_2_4G)) + { + if ((IqkResult_X & 0x00000200) != 0) //consider minus + IqkResult_X = IqkResult_X | 0xFFFFFC00; + ele_A = ((IqkResult_X * ele_D)>>8)&0x000003FF; + + //new element C = element D x Y + if ((IqkResult_Y & 0x00000200) != 0) + IqkResult_Y = IqkResult_Y | 0xFFFFFC00; + ele_C = ((IqkResult_Y * ele_D)>>8)&0x000003FF; + + if (RFPath == RF_PATH_A) + switch (RFPath) + { + case RF_PATH_A: + //wirte new elements A, C, D to regC80 and regC94, element B is always 0 + value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A; + ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, value32); + + value32 = (ele_C&0x000003C0)>>6; + ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, value32); + + value32 = ((IqkResult_X * ele_D)>>7)&0x01; + ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT24, value32); + break; + case RF_PATH_B: + //wirte new elements A, C, D to regC88 and regC9C, element B is always 0 + value32=(ele_D<<22)|((ele_C&0x3F)<<16) |ele_A; + ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); + + value32 = (ele_C&0x000003C0)>>6; + ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, bMaskH4Bits, value32); + + value32 = ((IqkResult_X * ele_D)>>7)&0x01; + ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT28, value32); + + break; + default: + break; + } + } + else + { + switch (RFPath) + { + case RF_PATH_A: + ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[OFDM_index]); + ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); + ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT24, 0x00); + break; + + case RF_PATH_B: + ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[OFDM_index]); + ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); + ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT28, 0x00); + break; + + default: + break; + } + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xeb4 = 0x%x 0xebc = 0x%x\n", + (u4Byte)IqkResult_X, (u4Byte)IqkResult_Y, (u4Byte)ele_A, (u4Byte)ele_C, (u4Byte)ele_D, (u4Byte)IqkResult_X, (u4Byte)IqkResult_Y)); +} + + +void doIQK( + PDM_ODM_T pDM_Odm, + u1Byte DeltaThermalIndex, + u1Byte ThermalValue, + u1Byte Threshold + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +#endif + + ODM_ResetIQKResult(pDM_Odm); + +#if(DM_ODM_SUPPORT_TYPE & ODM_MP) +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) +#if USE_WORKITEM + PlatformAcquireMutex(&pHalData->mxChnlBwControl); +#else + PlatformAcquireSpinLock(Adapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); +#endif +#elif((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) + PlatformAcquireMutex(&pHalData->mxChnlBwControl); +#endif +#endif + + + pDM_Odm->RFCalibrateInfo.ThermalValue_IQK= ThermalValue; + PHY_IQCalibrate_8188E(Adapter, FALSE); + + +#if(DM_ODM_SUPPORT_TYPE & ODM_MP) +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) +#if USE_WORKITEM + PlatformReleaseMutex(&pHalData->mxChnlBwControl); +#else + PlatformReleaseSpinLock(Adapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); +#endif +#elif((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) + PlatformReleaseMutex(&pHalData->mxChnlBwControl); +#endif +#endif +} + +/*----------------------------------------------------------------------------- + * Function: ODM_TxPwrTrackAdjust88E() + * + * Overview: 88E we can not write 0xc80/c94/c4c/ 0xa2x. Instead of write TX agc. + * No matter OFDM & CCK use the same method. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 04/23/2012 MHC Create Version 0. + * 04/23/2012 MHC Adjust TX agc directly not throughput BB digital. + * + *---------------------------------------------------------------------------*/ +VOID +ODM_TxPwrTrackAdjust88E( + PDM_ODM_T pDM_Odm, + u1Byte Type, // 0 = OFDM, 1 = CCK + pu1Byte pDirection, // 1 = +(increase) 2 = -(decrease) + pu4Byte pOutWriteVal // Tx tracking CCK/OFDM BB swing index adjust + ) +{ + u1Byte pwr_value = 0; + // + // Tx power tracking BB swing table. + // The base index = 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB + // + if (Type == 0) // For OFDM afjust + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("BbSwingIdxOfdm = %d BbSwingFlagOfdm=%d\n", pDM_Odm->BbSwingIdxOfdm, pDM_Odm->BbSwingFlagOfdm)); + + //printk("BbSwingIdxOfdm = %d BbSwingFlagOfdm=%d\n", pDM_Odm->BbSwingIdxOfdm, pDM_Odm->BbSwingFlagOfdm); + if (pDM_Odm->BbSwingIdxOfdm <= pDM_Odm->BbSwingIdxOfdmBase) + { + *pDirection = 1; + pwr_value = (pDM_Odm->BbSwingIdxOfdmBase - pDM_Odm->BbSwingIdxOfdm); + } + else + { + *pDirection = 2; + pwr_value = (pDM_Odm->BbSwingIdxOfdm - pDM_Odm->BbSwingIdxOfdmBase); + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("BbSwingIdxOfdm = %d BbSwingIdxOfdmBase=%d\n", pDM_Odm->BbSwingIdxOfdm, pDM_Odm->BbSwingIdxOfdmBase)); + //printk("BbSwingIdxOfdm = %d BbSwingIdxOfdmBase=%d pwr_value=%d\n", pDM_Odm->BbSwingIdxOfdm, pDM_Odm->BbSwingIdxOfdmBase,pwr_value); + + } + else if (Type == 1) // For CCK adjust. + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("pDM_Odm->BbSwingIdxCck = %d pDM_Odm->BbSwingIdxCckBase = %d\n", pDM_Odm->BbSwingIdxCck, pDM_Odm->BbSwingIdxCckBase)); + + //printk("pDM_Odm->BbSwingIdxCck = %d pDM_Odm->BbSwingIdxCckBase = %d\n", pDM_Odm->BbSwingIdxCck, pDM_Odm->BbSwingIdxCckBase); + if (pDM_Odm->BbSwingIdxCck <= pDM_Odm->BbSwingIdxCckBase) + { + *pDirection = 1; + pwr_value = (pDM_Odm->BbSwingIdxCckBase - pDM_Odm->BbSwingIdxCck); + } + else + { + *pDirection = 2; + pwr_value = (pDM_Odm->BbSwingIdxCck - pDM_Odm->BbSwingIdxCckBase); + } + //printk("pDM_Odm->BbSwingIdxCck = %d pDM_Odm->BbSwingIdxCckBase = %d pwr_value:%d\n", pDM_Odm->BbSwingIdxCck, pDM_Odm->BbSwingIdxCckBase,pwr_value); + } + + // + // 2012/04/25 MH According to Ed/Luke.Lees estimate for EVM the max tx power tracking + // need to be less than 6 power index for 88E. + // + if (pwr_value >= ODM_TXPWRTRACK_MAX_IDX_88E && *pDirection == 1) + pwr_value = ODM_TXPWRTRACK_MAX_IDX_88E; + + *pOutWriteVal = pwr_value | (pwr_value<<8) | (pwr_value<<16) | (pwr_value<<24); + +} // ODM_TxPwrTrackAdjust88E + + +/*----------------------------------------------------------------------------- + * Function: odm_TxPwrTrackSetPwr88E() + * + * Overview: 88E change all channel tx power accordign to flag. + * OFDM & CCK are all different. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 04/23/2012 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +VOID +odm_TxPwrTrackSetPwr88E( + PDM_ODM_T pDM_Odm, + PWRTRACK_METHOD Method, + u1Byte RFPath, + u1Byte ChannelMappedIndex + ) +{ + if (Method == TXAGC) + { + u1Byte cckPowerLevel[MAX_TX_COUNT], ofdmPowerLevel[MAX_TX_COUNT]; + u1Byte BW20PowerLevel[MAX_TX_COUNT], BW40PowerLevel[MAX_TX_COUNT]; + u1Byte rf = 0; + u4Byte pwr = 0, TxAGC = 0; + PADAPTER Adapter = pDM_Odm->Adapter; + //printk("odm_TxPwrTrackSetPwr88E CH=%d, modify TXAGC \n", *(pDM_Odm->pChannel)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("odm_TxPwrTrackSetPwr88E CH=%d\n", *(pDM_Odm->pChannel))); +#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE )) + + //#if (MP_DRIVER != 1) + if ( *(pDM_Odm->mp_mode) != 1){ + PHY_SetTxPowerLevel8188E(pDM_Odm->Adapter, *pDM_Odm->pChannel); + } + else + //#else + { + pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); + pwr += (pDM_Odm->BbSwingIdxCck - pDM_Odm->BbSwingIdxCckBase); + PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pwr); + TxAGC = (pwr<<16)|(pwr<<8)|(pwr); + PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, TxAGC); + DBG_871X("ODM_TxPwrTrackSetPwr88E: CCK Tx-rf(A) Power = 0x%x\n", TxAGC); + + pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); + pwr += (pDM_Odm->BbSwingIdxOfdm - pDM_Odm->BbSwingIdxOfdmBase); + TxAGC |= ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); + PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); + PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); + PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); + PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); + PHY_SetBBReg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); + PHY_SetBBReg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); + DBG_871X("ODM_TxPwrTrackSetPwr88E: OFDM Tx-rf(A) Power = 0x%x\n", TxAGC); + } + //#endif + +#endif +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + PHY_RF6052SetCCKTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel)); + PHY_RF6052SetOFDMTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel)); +#endif + + } + else if (Method == BBSWING) + { + //printk("odm_TxPwrTrackSetPwr88E CH=%d, modify BBSWING BbSwingIdxCck:%d \n", *(pDM_Odm->pChannel),pDM_Odm->BbSwingIdxCck); + // Adjust BB swing by CCK filter coefficient + //if(!pDM_Odm->RFCalibrateInfo.bCCKinCH14) + if(* (pDM_Odm->pChannel) < 14) + { + ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][0]); + ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][1]); + ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][2]); + ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][3]); + ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][4]); + ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][5]); + ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][6]); + ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][7]); + } + else + { + ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][0]); + ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][1]); + ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][2]); + ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][3]); + ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][4]); + ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][5]); + ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][6]); + ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][7]); + } + + // Adjust BB swing by OFDM IQ matrix + if (RFPath == RF_PATH_A) + { + setIqkMatrix(pDM_Odm, pDM_Odm->BbSwingIdxOfdm, RF_PATH_A, + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); + } + /* + else if (RFPath == RF_PATH_B) + { + setIqkMatrix(pDM_Odm, pDM_Odm->BbSwingIdxOfdm[RF_PATH_B], RF_PATH_B, + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][4], + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][5]); + }*/ + } + else + { + return; + } +} // odm_TxPwrTrackSetPwr88E + + +VOID +odm_TXPowerTrackingCallback_ThermalMeter_8188E( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm +#else + IN PADAPTER Adapter +#endif + ) +{ + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; +#endif + + u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, offset; + u1Byte ThermalValue_AVG_count = 0; + u4Byte ThermalValue_AVG = 0; + s4Byte ele_A=0, ele_D, TempCCk, X, value32; + s4Byte Y, ele_C=0; + s1Byte OFDM_index[2], CCK_index=0, OFDM_index_old[2]={0,0}, CCK_index_old=0, index; + s1Byte deltaPowerIndex = 0; + u4Byte i = 0, j = 0; + BOOLEAN is2T = FALSE; + BOOLEAN bInteralPA = FALSE; + + u1Byte OFDM_min_index = 6, rf = (is2T) ? 2 : 1; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur + u1Byte Indexforchannel = 0;/*GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/ + enum _POWER_DEC_INC { POWER_DEC, POWER_INC }; + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + struct dm_priv *pdmpriv = &pHalData->dmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif + + //4 0.1 The following TWO tables decide the final index of OFDM/CCK swing table. + s1Byte deltaSwingTableIdx[2][index_mapping_NUM_88E] = { + // {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} + {0,0,2,3,4,4,5,6,7,7,8,9,10,10,11}, {0,0,-1,-2,-3,-4,-4,-4,-4,-5,-7,-8,-9,-9,-10} + }; + u1Byte thermalThreshold[2][index_mapping_NUM_88E]={ + // {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} + {0,2,4,6,8,10,12,14,16,18,20,22,24,26,27}, {0,2,4,6,8,10,12,14,16,18,20,22,25,25,25} + }; + + //4 0.1 Initilization ( 7 steps in total ) + + pDM_Odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; //cosa add for debug + pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = TRUE; + +#if (MP_DRIVER == 1) +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = pHalData->TxPowerTrackControl; // We should keep updating the control variable according to HalData. +#endif + // RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. + pDM_Odm->RFCalibrateInfo.RegA24 = 0x090e1317; +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("===>odm_TXPowerTrackingCallback_ThermalMeter_8188E, pDM_Odm->BbSwingIdxCckBase: %d, pDM_Odm->BbSwingIdxOfdmBase: %d \n", pDM_Odm->BbSwingIdxCckBase, pDM_Odm->BbSwingIdxOfdmBase)); + ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_T_METER_88E, 0xfc00); //0x42: RF Reg[15:10] 88E + if( ! ThermalValue || ! pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) + return; + + //4 3. Initialize ThermalValues of RFCalibrateInfo + + if( ! pDM_Odm->RFCalibrateInfo.ThermalValue) + { + pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; + pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = ThermalValue; + } + + if(pDM_Odm->RFCalibrateInfo.bReloadtxpowerindex) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("reload ofdm index for band switch\n")); + } + + //4 4. Calculate average thermal meter + + pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index] = ThermalValue; + pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index++; + if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index == AVG_THERMAL_NUM_88E) + pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index = 0; + + for(i = 0; i < AVG_THERMAL_NUM_88E; i++) + { + if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]) + { + ThermalValue_AVG += pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]; + ThermalValue_AVG_count++; + } + } + + if(ThermalValue_AVG_count) + { + ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("AVG Thermal Meter = 0x%x \n", ThermalValue)); + } + + //4 5. Calculate delta, delta_LCK, delta_IQK. + + delta = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue):(pDM_Odm->RFCalibrateInfo.ThermalValue - ThermalValue); + delta_LCK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_LCK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_LCK):(pDM_Odm->RFCalibrateInfo.ThermalValue_LCK - ThermalValue); + delta_IQK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_IQK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK):(pDM_Odm->RFCalibrateInfo.ThermalValue_IQK - ThermalValue); + + //4 6. If necessary, do LCK. + + //if((delta_LCK > pHalData->Delta_LCK) && (pHalData->Delta_LCK != 0)) + if ((delta_LCK >= 8)) // Delta temperature is equal to or larger than 20 centigrade. + { + pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + PHY_LCCalibrate_8188E(Adapter); +#else + PHY_LCCalibrate_8188E(pDM_Odm); +#endif + } + + //3 7. If necessary, move the index of swing table to adjust Tx power. + + if (delta > 0 && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) + { +#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) + delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); +#else + delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue); +#endif + + + //4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset + +#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) + if(ThermalValue > pHalData->EEPROMThermalMeter) { +#else + if(ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) { +#endif + CALCULATE_SWINGTALBE_OFFSET(offset, POWER_INC, index_mapping_NUM_88E, delta); + pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex; + pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = -1 * deltaSwingTableIdx[POWER_INC][offset]; + + } else { + + CALCULATE_SWINGTALBE_OFFSET(offset, POWER_DEC, index_mapping_NUM_88E, delta); + pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex; + pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = -1 * deltaSwingTableIdx[POWER_DEC][offset]; + } + + if (pDM_Odm->RFCalibrateInfo.DeltaPowerIndex == pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast) + pDM_Odm->RFCalibrateInfo.PowerIndexOffset = 0; + else + pDM_Odm->RFCalibrateInfo.PowerIndexOffset = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex - pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast; + + for(i = 0; i < rf; i++) + pDM_Odm->RFCalibrateInfo.OFDM_index[i] = pDM_Odm->BbSwingIdxOfdmBase + pDM_Odm->RFCalibrateInfo.PowerIndexOffset; + pDM_Odm->RFCalibrateInfo.CCK_index = pDM_Odm->BbSwingIdxCckBase + pDM_Odm->RFCalibrateInfo.PowerIndexOffset; + + pDM_Odm->BbSwingIdxCck = pDM_Odm->RFCalibrateInfo.CCK_index; + pDM_Odm->BbSwingIdxOfdm = pDM_Odm->RFCalibrateInfo.OFDM_index[RF_PATH_A]; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pDM_Odm->BbSwingIdxCck, pDM_Odm->BbSwingIdxCckBase, pDM_Odm->RFCalibrateInfo.PowerIndexOffset)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("The 'OFDM' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pDM_Odm->BbSwingIdxOfdm, pDM_Odm->BbSwingIdxOfdmBase, pDM_Odm->RFCalibrateInfo.PowerIndexOffset)); + + //4 7.1 Handle boundary conditions of index. + + + for(i = 0; i < rf; i++) + { + if(pDM_Odm->RFCalibrateInfo.OFDM_index[i] > OFDM_TABLE_SIZE_92D-1) + { + pDM_Odm->RFCalibrateInfo.OFDM_index[i] = OFDM_TABLE_SIZE_92D-1; + } + else if (pDM_Odm->RFCalibrateInfo.OFDM_index[i] < OFDM_min_index) + { + pDM_Odm->RFCalibrateInfo.OFDM_index[i] = OFDM_min_index; + } + } + + if(pDM_Odm->RFCalibrateInfo.CCK_index > CCK_TABLE_SIZE-1) + pDM_Odm->RFCalibrateInfo.CCK_index = CCK_TABLE_SIZE-1; + else if (pDM_Odm->RFCalibrateInfo.CCK_index < 0) + pDM_Odm->RFCalibrateInfo.CCK_index = 0; + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("The thermal meter is unchanged or TxPowerTracking OFF: ThermalValue: %d , pDM_Odm->RFCalibrateInfo.ThermalValue: %d)\n", ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue)); + pDM_Odm->RFCalibrateInfo.PowerIndexOffset = 0; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n", pDM_Odm->RFCalibrateInfo.CCK_index, pDM_Odm->BbSwingIdxCckBase)); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index: %d\n", pDM_Odm->RFCalibrateInfo.OFDM_index[RF_PATH_A], pDM_Odm->BbSwingIdxOfdmBase)); + + if (pDM_Odm->RFCalibrateInfo.PowerIndexOffset != 0 && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) + { + //4 7.2 Configure the Swing Table to adjust Tx Power. + + pDM_Odm->RFCalibrateInfo.bTxPowerChanged = TRUE; // Always TRUE after Tx Power is adjusted by power tracking. + // + // 2012/04/23 MH According to Luke's suggestion, we can not write BB digital + // to increase TX power. Otherwise, EVM will be bad. + // + // 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. + if (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("Temperature Increasing: delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", + pDM_Odm->RFCalibrateInfo.PowerIndexOffset, delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); + } + else if (ThermalValue < pDM_Odm->RFCalibrateInfo.ThermalValue)// Low temperature + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("Temperature Decreasing: delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", + pDM_Odm->RFCalibrateInfo.PowerIndexOffset, delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); + } + + if (ThermalValue > pHalData->EEPROMThermalMeter) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) hugher than PG value(%d), increases the power by TxAGC\n", ThermalValue, pHalData->EEPROMThermalMeter)); + odm_TxPwrTrackSetPwr88E(pDM_Odm, TXAGC, 0, 0); + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) lower than PG value(%d), increases the power by TxAGC\n", ThermalValue, pHalData->EEPROMThermalMeter)); + odm_TxPwrTrackSetPwr88E(pDM_Odm, BBSWING, RF_PATH_A, Indexforchannel); + //if(is2T) + // odm_TxPwrTrackSetPwr88E(pDM_Odm, BBSWING, RF_PATH_B, Indexforchannel); + } + + pDM_Odm->BbSwingIdxCckBase = pDM_Odm->BbSwingIdxCck; + pDM_Odm->BbSwingIdxOfdmBase = pDM_Odm->BbSwingIdxOfdm; + pDM_Odm->RFCalibrateInfo.ThermalValue = ThermalValue; + + } + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + // if((delta_IQK > pHalData->Delta_IQK) && (pHalData->Delta_IQK != 0)) + if ((delta_IQK >= 8)){ // Delta temperature is equal to or larger than 20 centigrade. + //printk("delta_IQK(%d) >=8 do_IQK\n",delta_IQK); + doIQK(pDM_Odm, delta_IQK, ThermalValue, 8); + } +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("<===dm_TXPowerTrackingCallback_ThermalMeter_8188E\n")); + + pDM_Odm->RFCalibrateInfo.TXPowercount = 0; +} + + + + + + +//1 7. IQK +#define MAX_TOLERANCE 5 +#define IQK_DELAY_TIME 1 //ms + +u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK +phy_PathA_IQK_8188E( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN configPathB + ) +{ + u4Byte regEAC, regE94, regE9C, regEA4; + u1Byte result = 0x00; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK!\n")); + + //1 Tx IQK + //path-A IQK setting + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A IQK setting!\n")); + ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); + ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); + ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x8214032a); + ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28160000); + + //LO calibration setting + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); + ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); + + //One shot, path A LOK & IQK + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); + ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); + ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); + + // delay x ms + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); + //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); + ODM_delay_ms(IQK_DELAY_TIME_88E); + + // Check failed + regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); + regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); + regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); + regEA4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x\n", regEA4)); + + if(!(regEAC & BIT28) && + (((regE94 & 0x03FF0000)>>16) != 0x142) && + (((regE9C & 0x03FF0000)>>16) != 0x42) ) + result |= 0x01; + else //if Tx not OK, ignore Rx + return result; + +#if 0 + if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK + (((regEA4 & 0x03FF0000)>>16) != 0x132) && + (((regEAC & 0x03FF0000)>>16) != 0x36)) + result |= 0x02; + else + RTPRINT(FINIT, INIT_IQK, ("Path A Rx IQK fail!!\n")); +#endif + + return result; + + + } + +u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK +phy_PathA_RxIQK( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN configPathB + ) +{ + u4Byte regEAC, regE94, regE9C, regEA4, u4tmp; + u1Byte result = 0x00; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK!\n")); + + //1 Get TXIMR setting + //modify RXIQK mode table + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table!\n")); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0 ); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f ); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B ); + + //PA,PAD off + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980 ); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000 ); + + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); + + //IQK setting + ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); + ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x81004800); + + //path-A IQK setting + ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); + ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); + ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f); + ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28160000); + + //LO calibration setting + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); + ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); + + //One shot, path A LOK & IQK + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); + ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); + ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); + + // delay x ms + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); + //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); + ODM_delay_ms(IQK_DELAY_TIME_88E); + + + // Check failed + regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); + regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); + regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); + + if(!(regEAC & BIT28) && + (((regE94 & 0x03FF0000)>>16) != 0x142) && + (((regE9C & 0x03FF0000)>>16) != 0x42) ) + { + result |= 0x01; + } + else + { + //reload RF 0xdf + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180 );//if Tx not OK, ignore Rx + return result; + } + + u4tmp = 0x80007C00 | (regE94&0x3FF0000) | ((regE9C&0x3FF0000) >> 16); + ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, u4tmp); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe40 = 0x%x u4tmp = 0x%x \n", ODM_GetBBReg(pDM_Odm, rTx_IQK, bMaskDWord), u4tmp)); + + + //1 RX IQK + //modify RXIQK mode table + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table 2!\n")); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0 ); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f ); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa ); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); + + //IQK setting + ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); + + //path-A IQK setting + ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c); + ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c); + ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c05); + ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28160c1f); + + //LO calibration setting + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); + ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); + + //One shot, path A LOK & IQK + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); + ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); + ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); + + // delay x ms + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); + //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); + ODM_delay_ms(IQK_DELAY_TIME_88E); + + + // Check failed + regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); + regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); + regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); + regEA4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x\n", regEA4)); + + //reload RF 0xdf + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180 ); + +#if 0 + if(!(regEAC & BIT28) && + (((regE94 & 0x03FF0000)>>16) != 0x142) && + (((regE9C & 0x03FF0000)>>16) != 0x42) ) + result |= 0x01; + else //if Tx not OK, ignore Rx + return result; +#endif + + if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK + (((regEA4 & 0x03FF0000)>>16) != 0x132) && + (((regEAC & 0x03FF0000)>>16) != 0x36)) + result |= 0x02; + else + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK fail!!\n")); + + return result; + + + + +} + +u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK +phy_PathB_IQK_8188E( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm +#else + IN PADAPTER pAdapter +#endif + ) +{ + u4Byte regEAC, regEB4, regEBC, regEC4, regECC; + u1Byte result = 0x00; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK!\n")); + + //One shot, path B LOK & IQK + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); + ODM_SetBBReg(pDM_Odm, rIQK_AGC_Cont, bMaskDWord, 0x00000002); + ODM_SetBBReg(pDM_Odm, rIQK_AGC_Cont, bMaskDWord, 0x00000000); + + // delay x ms + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME_88E)); + //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); + ODM_delay_ms(IQK_DELAY_TIME_88E); + + // Check failed + regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); + regEB4 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeb4 = 0x%x\n", regEB4)); + regEBC= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xebc = 0x%x\n", regEBC)); + regEC4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_B_2, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xec4 = 0x%x\n", regEC4)); + regECC= ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_B_2, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xecc = 0x%x\n", regECC)); + + if(!(regEAC & BIT31) && + (((regEB4 & 0x03FF0000)>>16) != 0x142) && + (((regEBC & 0x03FF0000)>>16) != 0x42)) + result |= 0x01; + else + return result; + + if(!(regEAC & BIT30) && + (((regEC4 & 0x03FF0000)>>16) != 0x132) && + (((regECC & 0x03FF0000)>>16) != 0x36)) + result |= 0x02; + else + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK fail!!\n")); + + + return result; + +} + +VOID +_PHY_PathAFillIQKMatrix( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bIQKOK, + IN s4Byte result[][8], + IN u1Byte final_candidate, + IN BOOLEAN bTxOnly + ) +{ + u4Byte Oldval_0, X, TX0_A, reg; + s4Byte Y, TX0_C; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); + + if(final_candidate == 0xFF) + return; + + else if(bIQKOK) + { + Oldval_0 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; + + X = result[final_candidate][0]; + if ((X & 0x00000200) != 0) + X = X | 0xFFFFFC00; + TX0_A = (X * Oldval_0) >> 8; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", X, TX0_A, Oldval_0)); + ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); + + ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1)); + + Y = result[final_candidate][1]; + if ((Y & 0x00000200) != 0) + Y = Y | 0xFFFFFC00; + + + TX0_C = (Y * Oldval_0) >> 8; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C)); + ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); + ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); + + ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1)); + + if(bTxOnly) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("_PHY_PathAFillIQKMatrix only Tx OK\n")); + return; + } + + reg = result[final_candidate][2]; +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) + if( RTL_ABS(reg ,0x100) >= 16) + reg = 0x100; +#endif + ODM_SetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, 0x3FF, reg); + + reg = result[final_candidate][3] & 0x3F; + ODM_SetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, 0xFC00, reg); + + reg = (result[final_candidate][3] >> 6) & 0xF; + ODM_SetBBReg(pDM_Odm, rOFDM0_RxIQExtAnta, 0xF0000000, reg); + } +} + +VOID +_PHY_PathBFillIQKMatrix( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bIQKOK, + IN s4Byte result[][8], + IN u1Byte final_candidate, + IN BOOLEAN bTxOnly //do Tx only + ) +{ + u4Byte Oldval_1, X, TX1_A, reg; + s4Byte Y, TX1_C; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); + + if(final_candidate == 0xFF) + return; + + else if(bIQKOK) + { + Oldval_1 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; + + X = result[final_candidate][4]; + if ((X & 0x00000200) != 0) + X = X | 0xFFFFFC00; + TX1_A = (X * Oldval_1) >> 8; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); + ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); + + ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1)); + + Y = result[final_candidate][5]; + if ((Y & 0x00000200) != 0) + Y = Y | 0xFFFFFC00; + + TX1_C = (Y * Oldval_1) >> 8; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C)); + ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); + ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); + + ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1)); + + if(bTxOnly) + return; + + reg = result[final_candidate][6]; + ODM_SetBBReg(pDM_Odm, rOFDM0_XBRxIQImbalance, 0x3FF, reg); + + reg = result[final_candidate][7] & 0x3F; + ODM_SetBBReg(pDM_Odm, rOFDM0_XBRxIQImbalance, 0xFC00, reg); + + reg = (result[final_candidate][7] >> 6) & 0xF; + ODM_SetBBReg(pDM_Odm, rOFDM0_AGCRSSITable, 0x0000F000, reg); + } +} + +// +// 2011/07/26 MH Add an API for testing IQK fail case. +// +// MP Already declare in odm.c +#if !(DM_ODM_SUPPORT_TYPE & ODM_MP) +BOOLEAN +ODM_CheckPowerStatus( + IN PADAPTER Adapter) +{ +/* + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + RT_RF_POWER_STATE rtState; + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + + // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. + if (pMgntInfo->init_adpt_in_progress == TRUE) + { + ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); + return TRUE; + } + + // + // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. + // + Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); + if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) + { + ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", + Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); + return FALSE; + } +*/ + return TRUE; +} +#endif + +VOID +_PHY_SaveADDARegisters( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte ADDAReg, + IN pu4Byte ADDABackup, + IN u4Byte RegisterNum + ) +{ + u4Byte i; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif + + if (ODM_CheckPowerStatus(pAdapter) == FALSE) + return; +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save ADDA parameters.\n")); + for( i = 0 ; i < RegisterNum ; i++){ + ADDABackup[i] = ODM_GetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord); + } +} + + +VOID +_PHY_SaveMACRegisters( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte MACReg, + IN pu4Byte MACBackup + ) +{ + u4Byte i; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n")); + for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ + MACBackup[i] = ODM_Read1Byte(pDM_Odm, MACReg[i]); + } + MACBackup[i] = ODM_Read4Byte(pDM_Odm, MACReg[i]); + +} + + +VOID +_PHY_ReloadADDARegisters( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte ADDAReg, + IN pu4Byte ADDABackup, + IN u4Byte RegiesterNum + ) +{ + u4Byte i; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload ADDA power saving parameters !\n")); + for(i = 0 ; i < RegiesterNum; i++) + { + ODM_SetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord, ADDABackup[i]); + } +} + +VOID +_PHY_ReloadMACRegisters( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte MACReg, + IN pu4Byte MACBackup + ) +{ + u4Byte i; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n")); + for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ + ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)MACBackup[i]); + } + ODM_Write4Byte(pDM_Odm, MACReg[i], MACBackup[i]); +} + + +VOID +_PHY_PathADDAOn( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte ADDAReg, + IN BOOLEAN isPathAOn, + IN BOOLEAN is2T + ) +{ + u4Byte pathOn; + u4Byte i; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ADDA ON.\n")); + + pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4; + if(FALSE == is2T){ + pathOn = 0x0bdb25a0; + ODM_SetBBReg(pDM_Odm, ADDAReg[0], bMaskDWord, 0x0b1b25a0); + } + else{ + ODM_SetBBReg(pDM_Odm,ADDAReg[0], bMaskDWord, pathOn); + } + + for( i = 1 ; i < IQK_ADDA_REG_NUM ; i++){ + ODM_SetBBReg(pDM_Odm,ADDAReg[i], bMaskDWord, pathOn); + } + +} + +VOID +_PHY_MACSettingCalibration( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte MACReg, + IN pu4Byte MACBackup + ) +{ + u4Byte i = 0; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("MAC settings for Calibration.\n")); + + ODM_Write1Byte(pDM_Odm, MACReg[i], 0x3F); + + for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){ + ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT3))); + } + ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT5))); + +} + +VOID +_PHY_PathAStandBy( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm +#else + IN PADAPTER pAdapter +#endif + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A standby mode!\n")); + + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x0); + ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x00010000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); +} + +VOID +_PHY_PIModeSwitch( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN PIMode + ) +{ + u4Byte mode; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI"))); + + mode = PIMode ? 0x01000100 : 0x01000000; + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, bMaskDWord, mode); + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_HSSIParameter1, bMaskDWord, mode); +} + +BOOLEAN +phy_SimularityCompare_8188E( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s4Byte result[][8], + IN u1Byte c1, + IN u1Byte c2 + ) +{ + u4Byte i, j, diff, SimularityBitMap, bound = 0; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B + BOOLEAN bResult = TRUE; + BOOLEAN is2T; + s4Byte tmp1 = 0,tmp2 = 0; + + if( (pDM_Odm->RFType ==ODM_2T2R )||(pDM_Odm->RFType ==ODM_2T3R )||(pDM_Odm->RFType ==ODM_2T4R )) + is2T = TRUE; + else + is2T = FALSE; + + if(is2T) + bound = 8; + else + bound = 4; + + + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> IQK:phy_SimularityCompare_8188E c1 %d c2 %d!!!\n", c1, c2)); + + + SimularityBitMap = 0; + + for( i = 0; i < bound; i++ ) + { +// diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); + if((i==1) || (i==3) || (i==5) || (i==7)) + { + if((result[c1][i]& 0x00000200) != 0) + tmp1 = result[c1][i] | 0xFFFFFC00; + else + tmp1 = result[c1][i]; + + if((result[c2][i]& 0x00000200) != 0) + tmp2 = result[c2][i] | 0xFFFFFC00; + else + tmp2 = result[c2][i]; + } + else + { + tmp1 = result[c1][i]; + tmp2 = result[c2][i]; + } + + diff = (tmp1 > tmp2) ? (tmp1 - tmp2) : (tmp2 - tmp1); + + if (diff > MAX_TOLERANCE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:phy_SimularityCompare_8188E differnece overflow index %d compare1 0x%x compare2 0x%x!!!\n", i, result[c1][i], result[c2][i])); + + if((i == 2 || i == 6) && !SimularityBitMap) + { + if(result[c1][i]+result[c1][i+1] == 0) + final_candidate[(i/4)] = c2; + else if (result[c2][i]+result[c2][i+1] == 0) + final_candidate[(i/4)] = c1; + else + SimularityBitMap = SimularityBitMap|(1<odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + u4Byte i; + u1Byte PathAOK, PathBOK; + u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = { + rFPGA0_XCD_SwitchControl, rBlue_Tooth, + rRx_Wait_CCA, rTx_CCK_RFON, + rTx_CCK_BBON, rTx_OFDM_RFON, + rTx_OFDM_BBON, rTx_To_Rx, + rTx_To_Tx, rRx_CCK, + rRx_OFDM, rRx_Wait_RIFS, + rRx_TO_Rx, rStandby, + rSleep, rPMPD_ANAEN }; + u4Byte IQK_MAC_REG[IQK_MAC_REG_NUM] = { + REG_TXPAUSE, REG_BCN_CTRL, + REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; + + //since 92C & 92D have the different define in IQK_BB_REG + u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { + rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, + rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, + rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, + rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD + }; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + u4Byte retryCount = 2; +#else +#if MP_DRIVER + u4Byte retryCount = 9; +#else + u4Byte retryCount = 2; +#endif +#endif +if ( *(pDM_Odm->mp_mode) == 1) + retryCount = 9; +else + retryCount = 2; + // Note: IQ calibration must be performed after loading + // PHY_REG.txt , and radio_a, radio_b.txt + + //u4Byte bbvalue; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) +#ifdef MP_TEST + if(pDM_Odm->priv->pshare->rf_ft_var.mp_specific) + retryCount = 9; +#endif +#endif + + + if(t==0) + { +// bbvalue = ODM_GetBBReg(pDM_Odm, rFPGA0_RFMOD, bMaskDWord); +// RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8188E()==>0x%08x\n",bbvalue)); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); + + // Save ADDA parameters, turn Path A ADDA on +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_SaveADDARegisters(pAdapter, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); + _PHY_SaveMACRegisters(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); + _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); +#else + _PHY_SaveADDARegisters(pDM_Odm, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); + _PHY_SaveMACRegisters(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); + _PHY_SaveADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); +#endif + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + + _PHY_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T); +#else + _PHY_PathADDAOn(pDM_Odm, ADDA_REG, TRUE, is2T); +#endif + + + if(t==0) + { + pDM_Odm->RFCalibrateInfo.bRfPiEnable = (u1Byte)ODM_GetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, BIT(8)); + } + + if(!pDM_Odm->RFCalibrateInfo.bRfPiEnable){ + // Switch BB to PI mode to do IQ Calibration. +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_PIModeSwitch(pAdapter, TRUE); +#else + _PHY_PIModeSwitch(pDM_Odm, TRUE); +#endif + } + + //BB setting + ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0x00); + ODM_SetBBReg(pDM_Odm, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); + ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); + ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); + + + ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); + ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); + + + if(is2T) + { + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000); + } + + //MAC settings +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); +#else + _PHY_MACSettingCalibration(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); +#endif + + + //Page B init + //AP or IQK + ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); + + if(is2T) + { + ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x0f600000); + } + + // IQ calibration setting + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK setting!\n")); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); + ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); + ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x81004800); + + for(i = 0 ; i < retryCount ; i++){ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + PathAOK = phy_PathA_IQK_8188E(pAdapter, is2T); +#else + PathAOK = phy_PathA_IQK_8188E(pDM_Odm, is2T); +#endif +// if(PathAOK == 0x03){ + if(PathAOK == 0x01){ + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Tx IQK Success!!\n")); + result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; + result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; + break; + } +#if 0 + else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK + { + RTPRINT(FINIT, INIT_IQK, ("Path A IQK Only Tx Success!!\n")); + + result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; + result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; + } +#endif + } + + for(i = 0 ; i < retryCount ; i++){ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + PathAOK = phy_PathA_RxIQK(pAdapter, is2T); +#else + PathAOK = phy_PathA_RxIQK(pDM_Odm, is2T); +#endif + if(PathAOK == 0x03){ + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Success!!\n")); +// result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; +// result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; + result[t][2] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; + result[t][3] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; + break; + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Fail!!\n")); + } + } + + if(0x00 == PathAOK){ + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK failed!!\n")); + } + + if(is2T){ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_PathAStandBy(pAdapter); + + // Turn Path B ADDA on + _PHY_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T); +#else + _PHY_PathAStandBy(pDM_Odm); + + // Turn Path B ADDA on + _PHY_PathADDAOn(pDM_Odm, ADDA_REG, FALSE, is2T); +#endif + + for(i = 0 ; i < retryCount ; i++){ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + PathBOK = phy_PathB_IQK_8188E(pAdapter); +#else + PathBOK = phy_PathB_IQK_8188E(pDM_Odm); +#endif + if(PathBOK == 0x03){ + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK Success!!\n")); + result[t][4] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; + result[t][5] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; + result[t][6] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; + result[t][7] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; + break; + } + else if (i == (retryCount - 1) && PathBOK == 0x01) //Tx IQK OK + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Only Tx IQK Success!!\n")); + result[t][4] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; + result[t][5] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; + } + } + + if(0x00 == PathBOK){ + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK failed!!\n")); + } + } + + //Back to BB mode, load original value + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Back to BB mode, load original value!\n")); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0); + + if(t!=0) + { + if(!pDM_Odm->RFCalibrateInfo.bRfPiEnable){ + // Switch back BB to SI mode after finish IQ Calibration. +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_PIModeSwitch(pAdapter, FALSE); +#else + _PHY_PIModeSwitch(pDM_Odm, FALSE); +#endif + } +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + + // Reload ADDA power saving parameters + _PHY_ReloadADDARegisters(pAdapter, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); + + // Reload MAC parameters + _PHY_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); + + _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); +#else + // Reload ADDA power saving parameters + _PHY_ReloadADDARegisters(pDM_Odm, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); + + // Reload MAC parameters + _PHY_ReloadMACRegisters(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); + + _PHY_ReloadADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); +#endif + + + // Restore RX initial gain + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); + if(is2T){ + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); + } + + //load 0xe30 IQC default value + ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); + ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); + + + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_IQCalibrate_8188E() <==\n")); + +} + + +VOID +phy_LCCalibrate_8188E( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN is2T + ) +{ + u1Byte tmpReg; + u4Byte RF_Amode=0, RF_Bmode=0, LC_Cal; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + //Check continuous TX and Packet TX + tmpReg = ODM_Read1Byte(pDM_Odm, 0xd03); + + if((tmpReg&0x70) != 0) //Deal with contisuous TX case + ODM_Write1Byte(pDM_Odm, 0xd03, tmpReg&0x8F); //disable all continuous TX + else // Deal with Packet TX case + ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); // block all queues + + if((tmpReg&0x70) != 0) + { + //1. Read original RF mode + //Path-A +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + RF_Amode = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits); + + //Path-B + if(is2T) + RF_Bmode = PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits); +#else + RF_Amode = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMask12Bits); + + //Path-B + if(is2T) + RF_Bmode = ODM_GetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMask12Bits); +#endif + + //2. Set RF mode = standby mode + //Path-A + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); + + //Path-B + if(is2T) + ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); + } + + //3. Read RF reg18 +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + LC_Cal = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits); +#else + LC_Cal = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bMask12Bits); +#endif + + //4. Set LC calibration begin bit15 + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); + + ODM_sleep_ms(100); + + + //Restore original situation + if((tmpReg&0x70) != 0) //Deal with contisuous TX case + { + //Path-A + ODM_Write1Byte(pDM_Odm, 0xd03, tmpReg); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); + + //Path-B + if(is2T) + ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); + } + else // Deal with Packet TX case + { + ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); + } +} + +//Analog Pre-distortion calibration +#define APK_BB_REG_NUM 8 +#define APK_CURVE_REG_NUM 4 +#define PATH_NUM 2 + +VOID +phy_APCalibrate_8188E( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta, + IN BOOLEAN is2T + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + u4Byte regD[PATH_NUM]; + u4Byte tmpReg, index, offset, apkbound; + u1Byte path, i, pathbound = PATH_NUM; + u4Byte BB_backup[APK_BB_REG_NUM]; + u4Byte BB_REG[APK_BB_REG_NUM] = { + rFPGA1_TxBlock, rOFDM0_TRxPathEnable, + rFPGA0_RFMOD, rOFDM0_TRMuxPar, + rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, + rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; + u4Byte BB_AP_MODE[APK_BB_REG_NUM] = { + 0x00000020, 0x00a05430, 0x02040000, + 0x000800e4, 0x00204000 }; + u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = { + 0x00000020, 0x00a05430, 0x02040000, + 0x000800e4, 0x22204000 }; + + u4Byte AFE_backup[IQK_ADDA_REG_NUM]; + u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { + rFPGA0_XCD_SwitchControl, rBlue_Tooth, + rRx_Wait_CCA, rTx_CCK_RFON, + rTx_CCK_BBON, rTx_OFDM_RFON, + rTx_OFDM_BBON, rTx_To_Rx, + rTx_To_Tx, rRx_CCK, + rRx_OFDM, rRx_Wait_RIFS, + rRx_TO_Rx, rStandby, + rSleep, rPMPD_ANAEN }; + + u4Byte MAC_backup[IQK_MAC_REG_NUM]; + u4Byte MAC_REG[IQK_MAC_REG_NUM] = { + REG_TXPAUSE, REG_BCN_CTRL, + REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; + + u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { + {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, + {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} + }; + + u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { + {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings + {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} + }; + + u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { + {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, + {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} + }; + + u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { + {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings + {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} + }; + + u4Byte AFE_on_off[PATH_NUM] = { + 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on + + u4Byte APK_offset[PATH_NUM] = { + rConfig_AntA, rConfig_AntB}; + + u4Byte APK_normal_offset[PATH_NUM] = { + rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; + + u4Byte APK_value[PATH_NUM] = { + 0x92fc0000, 0x12fc0000}; + + u4Byte APK_normal_value[PATH_NUM] = { + 0x92680000, 0x12680000}; + + s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { + {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} + }; + + u4Byte APK_normal_setting_value_1[13] = { + 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, + 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, + 0x12680000, 0x00880000, 0x00880000 + }; + + u4Byte APK_normal_setting_value_2[16] = { + 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, + 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, + 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, + 0x00050006 + }; + + u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a +// u4Byte AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; + + s4Byte BB_offset, delta_V, delta_offset; + +#if MP_DRIVER == 1 +if ( *(pDM_Odm->mp_mode) == 1) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); +#else + PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); +#endif + pMptCtx->APK_bound[0] = 45; + pMptCtx->APK_bound[1] = 52; +} +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_APCalibrate_8188E() delta %d\n", delta)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); + if(!is2T) + pathbound = 1; + + //2 FOR NORMAL CHIP SETTINGS + +// Temporarily do not allow normal driver to do the following settings because these offset +// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal +// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the +// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. +//#if MP_DRIVER != 1 +if (*(pDM_Odm->mp_mode) != 1) + return; +//#endif + //settings adjust for normal chip + for(index = 0; index < PATH_NUM; index ++) + { + APK_offset[index] = APK_normal_offset[index]; + APK_value[index] = APK_normal_value[index]; + AFE_on_off[index] = 0x6fdb25a4; + } + + for(index = 0; index < APK_BB_REG_NUM; index ++) + { + for(path = 0; path < pathbound; path++) + { + APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; + APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; + } + BB_AP_MODE[index] = BB_normal_AP_MODE[index]; + } + + apkbound = 6; + + //save BB default value + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + if(index == 0) //skip + continue; + BB_backup[index] = ODM_GetBBReg(pDM_Odm, BB_REG[index], bMaskDWord); + } + + //save MAC default value +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); + + //save AFE default value + _PHY_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); +#else + _PHY_SaveMACRegisters(pDM_Odm, MAC_REG, MAC_backup); + + //save AFE default value + _PHY_SaveADDARegisters(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); +#endif + + for(path = 0; path < pathbound; path++) + { + + + if(path == RF_PATH_A) + { + //path A APK + //load APK setting + //path-A + offset = rPdp_AntA; + for(index = 0; index < 11; index ++) + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); + + offset = rConfig_AntA; + for(; index < 13; index ++) + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + + //page-B1 + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + + //path A + offset = rPdp_AntA; + for(index = 0; index < 16; index++) + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + } + else if(path == RF_PATH_B) + { + //path B APK + //load APK setting + //path-B + offset = rPdp_AntB; + for(index = 0; index < 10; index ++) + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); +#else + PHY_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); +#endif + + offset = rConfig_AntA; + index = 11; + for(; index < 13; index ++) //offset 0xb68, 0xb6c + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + + //page-B1 + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + + //path B + offset = 0xb60; + for(index = 0; index < 16; index++) + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0); + } + + //save RF default value +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord); +#else + regD[path] = ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord); +#endif + + //Path A AFE all on, path B AFE All off or vise versa + for(index = 0; index < IQK_ADDA_REG_NUM ; index++) + ODM_SetBBReg(pDM_Odm, AFE_REG[index], bMaskDWord, AFE_on_off[path]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xe70 %x\n", ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord))); + + //BB to AP mode + if(path == 0) + { + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + + if(index == 0) //skip + continue; + else if (index < 5) + ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); + else if (BB_REG[index] == 0x870) + ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); + else + ODM_SetBBReg(pDM_Odm, BB_REG[index], BIT10, 0x0); + } + + ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); + ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); + } + else //path B + { + ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); + ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); + + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x800 %x\n", ODM_GetBBReg(pDM_Odm, 0x800, bMaskDWord))); + + //MAC settings +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); +#else + _PHY_MACSettingCalibration(pDM_Odm, MAC_REG, MAC_backup); +#endif + + if(path == RF_PATH_A) //Path B to standby mode + { + ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMaskDWord, 0x10000); + } + else //Path A to standby mode + { + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMaskDWord, 0x10000); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE2, bMaskDWord, 0x20103); + } + + delta_offset = ((delta+14)/2); + if(delta_offset < 0) + delta_offset = 0; + else if (delta_offset > 12) + delta_offset = 12; + + //AP calibration + for(index = 0; index < APK_BB_REG_NUM; index++) + { + if(index != 1) //only DO PA11+PAD01001, AP RF setting + continue; + + tmpReg = APK_RF_init_value[path][index]; +#if 1 + if(!pDM_Odm->RFCalibrateInfo.bAPKThermalMeterIgnore) + { + BB_offset = (tmpReg & 0xF0000) >> 16; + + if(!(tmpReg & BIT15)) //sign bit 0 + { + BB_offset = -BB_offset; + } + + delta_V = APK_delta_mapping[index][delta_offset]; + + BB_offset += delta_V; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, delta_V, delta_offset)); + + if(BB_offset < 0) + { + tmpReg = tmpReg & (~BIT15); + BB_offset = -BB_offset; + } + else + { + tmpReg = tmpReg | BIT15; + } + tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); + } +#endif + + ODM_SetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord, 0x8992e); +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bMaskDWord))); + ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bMaskDWord))); + ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord))); +#else + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", ODM_GetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord))); + ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", ODM_GetRFReg(pDM_Odm, path, RF_AC, bMaskDWord))); + ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord))); +#endif + + // PA11+PAD01111, one shot + i = 0; + do + { + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80000000); + { + ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[0]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); + ODM_delay_ms(3); + ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[1]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); + + ODM_delay_ms(20); + } + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + + if(path == RF_PATH_A) + tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0x03E00000); + else + tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0xF8000000); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xbd8[25:21] %x\n", tmpReg)); + + + i++; + } + while(tmpReg > apkbound && i < 4); + + APK_result[path][index] = tmpReg; + } + } + + //reload MAC default value +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); +#else + _PHY_ReloadMACRegisters(pDM_Odm, MAC_REG, MAC_backup); +#endif + + //reload BB default value + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + + if(index == 0) //skip + continue; + ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]); + } + + //reload AFE default value +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); +#else + _PHY_ReloadADDARegisters(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); +#endif + + //reload RF path default value + for(path = 0; path < pathbound; path++) + { + ODM_SetRFReg(pDM_Odm, path, 0xd, bMaskDWord, regD[path]); + if(path == RF_PATH_B) + { + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE2, bMaskDWord, 0x20101); + } + + //note no index == 0 + if (APK_result[path][1] > 6) + APK_result[path][1] = 6; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\n")); + + + for(path = 0; path < pathbound; path++) + { + ODM_SetRFReg(pDM_Odm, path, 0x3, bMaskDWord, + ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); + if(path == RF_PATH_A) + ODM_SetRFReg(pDM_Odm, path, 0x4, bMaskDWord, + ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); + else + ODM_SetRFReg(pDM_Odm, path, 0x4, bMaskDWord, + ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + if(!IS_HARDWARE_TYPE_8723A(pAdapter)) + ODM_SetRFReg(pDM_Odm, path, RF_BS_PA_APSET_G9_G11, bMaskDWord, + ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); +#endif + } + + pDM_Odm->RFCalibrateInfo.bAPKdone = TRUE; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_APCalibrate_8188E()\n")); +} + + + +#define DP_BB_REG_NUM 7 +#define DP_RF_REG_NUM 1 +#define DP_RETRY_LIMIT 10 +#define DP_PATH_NUM 2 +#define DP_DPK_NUM 3 +#define DP_DPK_VALUE_NUM 2 + + + + + +VOID +PHY_IQCalibrate_8188E( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bReCovery + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #else // (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + + #if (MP_DRIVER == 1) + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); + #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) + PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); + #endif + #endif//(MP_DRIVER == 1) +#endif + + s4Byte result[4][8]; //last is final result + u1Byte i, final_candidate, Indexforchannel; + u1Byte channelToIQK = 7; + BOOLEAN bPathAOK, bPathBOK; + s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; + BOOLEAN is12simular, is13simular, is23simular; + BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; + u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { + rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, + rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, + rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, + rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, + rOFDM0_RxIQExtAnta}; + BOOLEAN is2T; + + is2T = (pDM_Odm->RFType == ODM_2T2R)?TRUE:FALSE; +#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE) ) + if (ODM_CheckPowerStatus(pAdapter) == FALSE) + return; +#else + prtl8192cd_priv priv = pDM_Odm->priv; + +#ifdef MP_TEST + if(priv->pshare->rf_ft_var.mp_specific) + { + if((OPMODE & WIFI_MP_CTX_PACKET) || (OPMODE & WIFI_MP_CTX_ST)) + return; + } +#endif + + if(priv->pshare->IQK_88E_done) + bReCovery= 1; + priv->pshare->IQK_88E_done = 1; + +#endif + +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) + { + return; + } +#endif + +#if MP_DRIVER == 1 +if (*(pDM_Odm->mp_mode) == 1) +{ + bStartContTx = pMptCtx->bStartContTx; + bSingleTone = pMptCtx->bSingleTone; + bCarrierSuppression = pMptCtx->bCarrierSuppression; +} +#endif + + // 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) + if(bSingleTone || bCarrierSuppression) + return; + +#if DISABLE_BB_RF + return; +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) + if(bReCovery) +#else//for ODM_MP + if(bReCovery && (!pAdapter->bInHctTest)) //YJ,add for PowerTest,120405 +#endif + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("PHY_IQCalibrate_8188E: Return due to bReCovery!\n")); +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); +#else + _PHY_ReloadADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); +#endif + return; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Start!!!\n")); + +#if 0//Suggested by Edlu,120413 + + // IQK on channel 7, should switch back when completed. + //originChannel = pHalData->CurrentChannel; + originChannel = *(pDM_Odm->pChannel); + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + pAdapter->HalFunc.SwChnlByTimerHandler(pAdapter, channelToIQK); +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + pAdapter->HalFunc.set_channel_handler(pAdapter, channelToIQK); +#endif + +#endif + + for(i = 0; i < 8; i++) + { + result[0][i] = 0; + result[1][i] = 0; + result[2][i] = 0; + if((i==0) ||(i==2) || (i==4) || (i==6)) + result[3][i] = 0x100; + else + result[3][i] = 0; + } + final_candidate = 0xff; + bPathAOK = FALSE; + bPathBOK = FALSE; + is12simular = FALSE; + is23simular = FALSE; + is13simular = FALSE; + + + //ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK !!!interface %d currentband %d ishardwareD %d \n", pDM_Odm->interfaceIndex, pHalData->CurrentBandType92D, IS_HARDWARE_TYPE_8192D(pAdapter))); +// RT_TRACE(COMP_INIT,DBG_LOUD,("Acquire Mutex in IQCalibrate \n")); + for (i=0; i<3; i++) + { + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + phy_IQCalibrate_8188E(pAdapter, result, i, is2T); +#else + phy_IQCalibrate_8188E(pDM_Odm, result, i, is2T); +#endif + + + if(i == 1) + { +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + is12simular = phy_SimularityCompare_8188E(pAdapter, result, 0, 1); +#else + is12simular = phy_SimularityCompare_8188E(pDM_Odm, result, 0, 1); +#endif + if(is12simular) + { + final_candidate = 0; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is12simular final_candidate is %x\n",final_candidate)); + break; + } + } + + if(i == 2) + { +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + is13simular = phy_SimularityCompare_8188E(pAdapter, result, 0, 2); +#else + is13simular = phy_SimularityCompare_8188E(pDM_Odm, result, 0, 2); +#endif + if(is13simular) + { + final_candidate = 0; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is13simular final_candidate is %x\n",final_candidate)); + + break; + } +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + is23simular = phy_SimularityCompare_8188E(pAdapter, result, 1, 2); +#else + is23simular = phy_SimularityCompare_8188E(pDM_Odm, result, 1, 2); +#endif + if(is23simular) + { + final_candidate = 1; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is23simular final_candidate is %x\n",final_candidate)); + } + else + { + /* + for(i = 0; i < 8; i++) + RegTmp += result[3][i]; + + if(RegTmp != 0) + final_candidate = 3; + else + final_candidate = 0xFF; + */ + final_candidate = 3; + } + } + } +// RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate \n")); + + for (i=0; i<4; i++) + { + RegE94 = result[i][0]; + RegE9C = result[i][1]; + RegEA4 = result[i][2]; + RegEAC = result[i][3]; + RegEB4 = result[i][4]; + RegEBC = result[i][5]; + RegEC4 = result[i][6]; + RegECC = result[i][7]; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); + } + + if(final_candidate != 0xff) + { + pDM_Odm->RFCalibrateInfo.RegE94 = RegE94 = result[final_candidate][0]; + pDM_Odm->RFCalibrateInfo.RegE9C = RegE9C = result[final_candidate][1]; + RegEA4 = result[final_candidate][2]; + RegEAC = result[final_candidate][3]; + pDM_Odm->RFCalibrateInfo.RegEB4 = RegEB4 = result[final_candidate][4]; + pDM_Odm->RFCalibrateInfo.RegEBC = RegEBC = result[final_candidate][5]; + RegEC4 = result[final_candidate][6]; + RegECC = result[final_candidate][7]; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: final_candidate is %x\n",final_candidate)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); + bPathAOK = bPathBOK = TRUE; + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: FAIL use default value\n")); + + pDM_Odm->RFCalibrateInfo.RegE94 = pDM_Odm->RFCalibrateInfo.RegEB4 = 0x100; //X default value + pDM_Odm->RFCalibrateInfo.RegE9C = pDM_Odm->RFCalibrateInfo.RegEBC = 0x0; //Y default value + } + + if((RegE94 != 0)/*&&(RegEA4 != 0)*/) + { +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); +#else + _PHY_PathAFillIQKMatrix(pDM_Odm, bPathAOK, result, final_candidate, (RegEA4 == 0)); +#endif + } + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + if (is2T) + { + if((RegEB4 != 0)/*&&(RegEC4 != 0)*/) + { + _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); + } + } +#endif + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + Indexforchannel = ODM_GetRightChnlPlaceforIQK(pHalData->CurrentChannel); +#else + Indexforchannel = 0; +#endif + +//To Fix BSOD when final_candidate is 0xff +//by sherry 20120321 + if(final_candidate < 4) + { + for(i = 0; i < IQK_Matrix_REG_NUM; i++) + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][i] = result[final_candidate][i]; + pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].bIQKDone = TRUE; + } + //RTPRINT(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + + _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); +#else + _PHY_SaveADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, IQK_BB_REG_NUM); +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK finished\n")); +#if 0 //Suggested by Edlu,120413 + + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + pAdapter->HalFunc.SwChnlByTimerHandler(pAdapter, originChannel); + #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + pAdapter->HalFunc.set_channel_handler(pAdapter, originChannel); + #endif + +#endif + +} + + +VOID +PHY_LCCalibrate_8188E( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm +#else + IN PADAPTER pAdapter +#endif + ) +{ + BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; + u4Byte timeout = 2000, timecount = 0; + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #else // (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + + #if (MP_DRIVER == 1) + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); + #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) + PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); + #endif + #endif//(MP_DRIVER == 1) +#endif + + + + +#if MP_DRIVER == 1 +if (*(pDM_Odm->mp_mode) == 1) +{ + bStartContTx = pMptCtx->bStartContTx; + bSingleTone = pMptCtx->bSingleTone; + bCarrierSuppression = pMptCtx->bCarrierSuppression; +} +#endif + + +#if DISABLE_BB_RF + return; +#endif + +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) + { + return; + } +#endif + // 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) + if(bSingleTone || bCarrierSuppression) + return; + + while(*(pDM_Odm->pbScanInProcess) && timecount < timeout) + { + ODM_delay_ms(50); + timecount += 50; + } + + pDM_Odm->RFCalibrateInfo.bLCKInProgress = TRUE; + + //ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pDM_Odm->interfaceIndex, pHalData->CurrentBandType92D, timecount)); +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + + if(pDM_Odm->RFType == ODM_2T2R) + { + phy_LCCalibrate_8188E(pAdapter, TRUE); + } + else +#endif + { + // For 88C 1T1R +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + phy_LCCalibrate_8188E(pAdapter, FALSE); +#else + phy_LCCalibrate_8188E(pDM_Odm, FALSE); +#endif + } + + pDM_Odm->RFCalibrateInfo.bLCKInProgress = FALSE; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Finish!!!interface %d\n", pDM_Odm->InterfaceIndex)); + +} + +VOID +PHY_APCalibrate_8188E( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif +#if DISABLE_BB_RF + return; +#endif + + return; +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) + { + return; + } +#endif + +#if FOR_BRAZIL_PRETEST != 1 + if(pDM_Odm->RFCalibrateInfo.bAPKdone) +#endif + return; + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + if(pDM_Odm->RFType == ODM_2T2R){ + phy_APCalibrate_8188E(pAdapter, delta, TRUE); + } + else +#endif + { + // For 88C 1T1R +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + phy_APCalibrate_8188E(pAdapter, delta, FALSE); +#else + phy_APCalibrate_8188E(pDM_Odm, delta, FALSE); +#endif + } +} +VOID phy_SetRFPathSwitch_8188E( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bMain, + IN BOOLEAN is2T + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #elif (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif + + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + if(!pAdapter->bHWInitReady) + #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + if(pAdapter->hw_init_completed == _FALSE) + #endif + { + u1Byte u1bTmp; + u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; + ODM_Write1Byte(pDM_Odm, REG_LEDCFG2, u1bTmp); + //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); + ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); + } + +#endif + + if(is2T) //92C + { + if(bMain) + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); //92C_Path_A + else + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); //BT + } + else //88C + { + + if(bMain) + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x2); //Main + else + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x1); //Aux + } +} +VOID PHY_SetRFPathSwitch_8188E( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bMain + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + + +#if DISABLE_BB_RF + return; +#endif + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + if(pDM_Odm->RFType == ODM_2T2R) + { + phy_SetRFPathSwitch_8188E(pAdapter, bMain, TRUE); + } + else +#endif + { + // For 88C 1T1R +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + phy_SetRFPathSwitch_8188E(pAdapter, bMain, FALSE); +#else + phy_SetRFPathSwitch_8188E(pDM_Odm, bMain, FALSE); +#endif + } +} + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) +//digital predistortion +VOID +phy_DigitalPredistortion( +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PADAPTER pAdapter, +#else + IN PDM_ODM_T pDM_Odm, +#endif + IN BOOLEAN is2T + ) +{ +} + +VOID +PHY_DigitalPredistortion_8188E( +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PADAPTER pAdapter +#else + IN PDM_ODM_T pDM_Odm +#endif + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif +#if DISABLE_BB_RF + return; +#endif + + return; + + if(pDM_Odm->RFCalibrateInfo.bDPdone) + return; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + + if(pDM_Odm->RFType == ODM_2T2R){ + phy_DigitalPredistortion(pAdapter, TRUE); + } + else +#endif + { + // For 88C 1T1R + phy_DigitalPredistortion(pAdapter, FALSE); + } +} + + + +//return value TRUE => Main; FALSE => Aux + +BOOLEAN phy_QueryRFPathSwitch_8188E( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN is2T + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + if(!pAdapter->bHWInitReady) + { + u1Byte u1bTmp; + u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; + ODM_Write1Byte(pDM_Odm, REG_LEDCFG2, u1bTmp); + //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); + ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); + } + + if(is2T) // + { + if(ODM_GetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) + return TRUE; + else + return FALSE; + } + else + { + if(ODM_GetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9) == 0x02) + return TRUE; + else + return FALSE; + } +} + + + +//return value TRUE => Main; FALSE => Aux +BOOLEAN PHY_QueryRFPathSwitch_8188E( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm +#else + IN PADAPTER pAdapter +#endif + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + #endif + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + #endif +#endif + + +#if DISABLE_BB_RF + return TRUE; +#endif +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + + //if(IS_92C_SERIAL( pHalData->VersionID)){ + if(pDM_Odm->RFType == ODM_2T2R){ + return phy_QueryRFPathSwitch_8188E(pAdapter, TRUE); + } + else +#endif + { + // For 88C 1T1R +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + return phy_QueryRFPathSwitch_8188E(pAdapter, FALSE); +#else + return phy_QueryRFPathSwitch_8188E(pDM_Odm, FALSE); +#endif + } +} +#endif diff --git a/hal/OUTSRC/rtl8188e/HalPhyRf_8188e.h b/hal/HalPhyRf_8188e.h similarity index 100% rename from hal/OUTSRC/rtl8188e/HalPhyRf_8188e.h rename to hal/HalPhyRf_8188e.h diff --git a/hal/OUTSRC/HalPhyRf.c b/hal/OUTSRC/HalPhyRf.c deleted file mode 100755 index ceed28c..0000000 --- a/hal/OUTSRC/HalPhyRf.c +++ /dev/null @@ -1,1561 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - - #include "odm_precomp.h" - -#if(DM_ODM_SUPPORT_TYPE & ODM_MP) -#include "Mp_Precomp.h" - -VOID -phy_PathAStandBy( - IN PADAPTER pAdapter - ) -{ - RTPRINT(FINIT, INIT_IQK, ("Path-A standby mode!\n")); - - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x0); - PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000); - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000); -} - -//1 7. IQK -//#define MAX_TOLERANCE 5 -//#define IQK_DELAY_TIME 1 //ms - -u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK -phy_PathA_IQK_8192C( - IN PADAPTER pAdapter, - IN BOOLEAN configPathB - ) -{ - - u4Byte regEAC, regE94, regE9C, regEA4; - u1Byte result = 0x00; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - RTPRINT(FINIT, INIT_IQK, ("Path A IQK!\n")); - - //path-A IQK setting - RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n")); - if(pAdapter->interfaceIndex == 0) - { - PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1f); - PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); - } - else - { - PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c22); - PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c22); - } - - PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82140102); - - PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, configPathB ? 0x28160202 : - IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)?0x28160202:0x28160502); - - //path-B IQK setting - if(configPathB) - { - PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x10008c22); - PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x10008c22); - PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140102); - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160206); - else - PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160202); - } - - //LO calibration setting - RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n")); - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); - else - PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x001028d1); - - //One shot, path A LOK & IQK - RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); - PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); - PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); - - // delay x ms - RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME)); - PlatformStallExecution(IQK_DELAY_TIME*1000); - - // Check failed - regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); - regE94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x\n", regE94)); - regE9C= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x\n", regE9C)); - regEA4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", regEA4)); - - if(!(regEAC & BIT28) && - (((regE94 & 0x03FF0000)>>16) != 0x142) && - (((regE9C & 0x03FF0000)>>16) != 0x42) ) - result |= 0x01; - else //if Tx not OK, ignore Rx - return result; - - if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK - (((regEA4 & 0x03FF0000)>>16) != 0x132) && - (((regEAC & 0x03FF0000)>>16) != 0x36)) - result |= 0x02; - else - RTPRINT(FINIT, INIT_IQK, ("Path A Rx IQK fail!!\n")); - - return result; - - -} - -u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK -phy_PathB_IQK_8192C( - IN PADAPTER pAdapter - ) -{ - u4Byte regEAC, regEB4, regEBC, regEC4, regECC; - u1Byte result = 0x00; - RTPRINT(FINIT, INIT_IQK, ("Path B IQK!\n")); - - //One shot, path B LOK & IQK - RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); - PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000002); - PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000000); - - // delay x ms - RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME)); - PlatformStallExecution(IQK_DELAY_TIME*1000); - - // Check failed - regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); - regEB4 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%x\n", regEB4)); - regEBC= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%x\n", regEBC)); - regEC4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%x\n", regEC4)); - regECC= PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", regECC)); - - if(!(regEAC & BIT31) && - (((regEB4 & 0x03FF0000)>>16) != 0x142) && - (((regEBC & 0x03FF0000)>>16) != 0x42)) - result |= 0x01; - else - return result; - - if(!(regEAC & BIT30) && - (((regEC4 & 0x03FF0000)>>16) != 0x132) && - (((regECC & 0x03FF0000)>>16) != 0x36)) - result |= 0x02; - else - RTPRINT(FINIT, INIT_IQK, ("Path B Rx IQK fail!!\n")); - - - return result; - -} - -VOID -phy_PathAFillIQKMatrix( - IN PADAPTER pAdapter, - IN BOOLEAN bIQKOK, - IN s4Byte result[][8], - IN u1Byte final_candidate, - IN BOOLEAN bTxOnly - ) -{ - u4Byte Oldval_0, X, TX0_A, reg; - s4Byte Y, TX0_C; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - RTPRINT(FINIT, INIT_IQK, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); - - if(final_candidate == 0xFF) - return; - - else if(bIQKOK) - { - Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; - - X = result[final_candidate][0]; - if ((X & 0x00000200) != 0) - X = X | 0xFFFFFC00; - TX0_A = (X * Oldval_0) >> 8; - RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", X, TX0_A, Oldval_0)); - PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT24, ((X* Oldval_0>>7) & 0x1)); - else - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1)); - - Y = result[final_candidate][1]; - if ((Y & 0x00000200) != 0) - Y = Y | 0xFFFFFC00; - - //path B IQK result + 3 - if(pAdapter->interfaceIndex == 1 && pHalData->CurrentBandType92D == BAND_ON_5G) - Y += 3; - - TX0_C = (Y * Oldval_0) >> 8; - RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C)); - PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); - PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); - if(IS_HARDWARE_TYPE_8192D(pAdapter)/*&&is2T*/) - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT26, ((Y* Oldval_0>>7) & 0x1)); - else - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1)); - - if(bTxOnly) - { - RTPRINT(FINIT, INIT_IQK, ("phy_PathAFillIQKMatrix only Tx OK\n")); - return; - } - - reg = result[final_candidate][2]; - PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0x3FF, reg); - - reg = result[final_candidate][3] & 0x3F; - PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0xFC00, reg); - - reg = (result[final_candidate][3] >> 6) & 0xF; - PHY_SetBBReg(pAdapter, rOFDM0_RxIQExtAnta, 0xF0000000, reg); - } -} - -VOID -phy_PathBFillIQKMatrix( - IN PADAPTER pAdapter, - IN BOOLEAN bIQKOK, - IN s4Byte result[][8], - IN u1Byte final_candidate, - IN BOOLEAN bTxOnly //do Tx only - ) -{ - u4Byte Oldval_1, X, TX1_A, reg; - s4Byte Y, TX1_C; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - RTPRINT(FINIT, INIT_IQK, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); - - if(final_candidate == 0xFF) - return; - - else if(bIQKOK) - { - Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; - - X = result[final_candidate][4]; - if ((X & 0x00000200) != 0) - X = X | 0xFFFFFC00; - TX1_A = (X * Oldval_1) >> 8; - RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); - PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT28, ((X* Oldval_1>>7) & 0x1)); - else - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1)); - - Y = result[final_candidate][5]; - if ((Y & 0x00000200) != 0) - Y = Y | 0xFFFFFC00; - if(pHalData->CurrentBandType92D == BAND_ON_5G) - Y += 3; //temp modify for preformance - TX1_C = (Y * Oldval_1) >> 8; - RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C)); - PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); - PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT30, ((Y* Oldval_1>>7) & 0x1)); - else - PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1)); - - if(bTxOnly) - return; - - reg = result[final_candidate][6]; - PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg); - - reg = result[final_candidate][7] & 0x3F; - PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg); - - reg = (result[final_candidate][7] >> 6) & 0xF; - PHY_SetBBReg(pAdapter, rOFDM0_AGCRSSITable, 0x0000F000, reg); - } -} - - -BOOLEAN -phy_SimularityCompare_92C( - IN PADAPTER pAdapter, - IN s4Byte result[][8], - IN u1Byte c1, - IN u1Byte c2 - ) -{ - u4Byte i, j, diff, SimularityBitMap, bound = 0; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B - BOOLEAN bResult = TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID); - - if(is2T) - bound = 8; - else - bound = 4; - - SimularityBitMap = 0; - - for( i = 0; i < bound; i++ ) - { - diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); - if (diff > MAX_TOLERANCE) - { - if((i == 2 || i == 6) && !SimularityBitMap) - { - if(result[c1][i]+result[c1][i+1] == 0) - final_candidate[(i/4)] = c2; - else if (result[c2][i]+result[c2][i+1] == 0) - final_candidate[(i/4)] = c1; - else - SimularityBitMap = SimularityBitMap|(1< do IQK again -*/ -BOOLEAN -phy_SimularityCompare( - IN PADAPTER pAdapter, - IN s4Byte result[][8], - IN u1Byte c1, - IN u1Byte c2 - ) -{ - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - return phy_SimularityCompare_92D(pAdapter, result, c1, c2); - else - return phy_SimularityCompare_92C(pAdapter, result, c1, c2); - -} - -VOID -phy_IQCalibrate_8192C( - IN PADAPTER pAdapter, - IN s4Byte result[][8], - IN u1Byte t, - IN BOOLEAN is2T - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u4Byte i; - u1Byte PathAOK, PathBOK; - u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = { - rFPGA0_XCD_SwitchControl, rBlue_Tooth, - rRx_Wait_CCA, rTx_CCK_RFON, - rTx_CCK_BBON, rTx_OFDM_RFON, - rTx_OFDM_BBON, rTx_To_Rx, - rTx_To_Tx, rRx_CCK, - rRx_OFDM, rRx_Wait_RIFS, - rRx_TO_Rx, rStandby, - rSleep, rPMPD_ANAEN }; - u4Byte IQK_MAC_REG[IQK_MAC_REG_NUM] = { - REG_TXPAUSE, REG_BCN_CTRL, - REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; - - //since 92C & 92D have the different define in IQK_BB_REG - u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { - rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, - rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, - rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, - rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD - }; - - u4Byte IQK_BB_REG_92D[IQK_BB_REG_NUM_92D] = { //for normal - rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, - rFPGA0_XB_RFInterfaceOE, rOFDM0_TRMuxPar, - rFPGA0_XCD_RFInterfaceSW, rOFDM0_TRxPathEnable, - rFPGA0_RFMOD, rFPGA0_AnalogParameter4, - rOFDM0_XAAGCCore1, rOFDM0_XBAGCCore1 - }; - u4Byte retryCount; -#if MP_DRIVER - if (pAdapter->registrypriv.mp_mode == 1) - retryCount = 9; - else -#endif - retryCount = 2; - - - //Neil Chen--2011--05--19-- - //3 Path Div - u1Byte rfPathSwitch=0x0; - - // Note: IQ calibration must be performed after loading - // PHY_REG.txt , and radio_a, radio_b.txt - - u4Byte bbvalue; - - if(t==0) - { - bbvalue = PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bMaskDWord); - RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8192C()==>0x%08x\n",bbvalue)); - - RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); - - // Save ADDA parameters, turn Path A ADDA on - phy_SaveADDARegisters(pAdapter, ADDA_REG, pHalData->ADDA_backup, IQK_ADDA_REG_NUM); - phy_SaveMACRegisters(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92D, pHalData->IQK_BB_backup, IQK_BB_REG_NUM_92D); - else - phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM); - } - - phy_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T); - - - - if(IS_HARDWARE_TYPE_8192D(pAdapter)){ - //============================== - //3 Path Diversity - ////Neil Chen--2011--05--20 - rfPathSwitch =(u1Byte) (PHY_QueryBBReg(pAdapter, 0xB30, bMaskDWord)>>27); - //rfPathSwitch = (u1Byte) DataB30; - rfPathSwitch = rfPathSwitch&(0x01); - - if(rfPathSwitch) // Path Div On - { - phy_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T); - //DbgPrint("=STEP= change ADDA Path from B to A Path\n"); - } - else - { - phy_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T); - } - //3 end - //===================================== - - PHY_SetBBReg(pAdapter, rPdp_AntA, bMaskDWord, 0x01017038); - } - - if(t==0) - { - pHalData->bRfPiEnable = (u1Byte)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8)); - } - - if(!pHalData->bRfPiEnable){ - // Switch BB to PI mode to do IQ Calibration. - phy_PIModeSwitch(pAdapter, TRUE); - } - - PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, BIT24, 0x00); - PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); - PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); - PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xf00000, 0x0f); - else - { - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); - PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); - PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); - } - - if(is2T) - { - PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); - PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000); - } - - //MAC settings - phy_MACSettingCalibration(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); - - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - { - PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x0f600000); - - if(is2T) - { - PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x0f600000); - } - } - else - { - //Page B init - PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x00080000); - - if(is2T) - { - PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x00080000); - } - } - // IQ calibration setting - RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n")); - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000); - PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x01007c00); - PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800); - - for(i = 0 ; i < retryCount ; i++){ - PathAOK = phy_PathA_IQK_8192C(pAdapter, is2T); - if(PathAOK == 0x03){ - RTPRINT(FINIT, INIT_IQK, ("Path A IQK Success!!\n")); - result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; - result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; - result[t][2] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; - result[t][3] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; - break; - } - else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK - { - RTPRINT(FINIT, INIT_IQK, ("Path A IQK Only Tx Success!!\n")); - - result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; - result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; - } - } - - if(0x00 == PathAOK){ - RTPRINT(FINIT, INIT_IQK, ("Path A IQK failed!!\n")); - } - - if(is2T){ - phy_PathAStandBy(pAdapter); - - // Turn Path B ADDA on - phy_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T); - - for(i = 0 ; i < retryCount ; i++){ - PathBOK = phy_PathB_IQK_8192C(pAdapter); - if(PathBOK == 0x03){ - RTPRINT(FINIT, INIT_IQK, ("Path B IQK Success!!\n")); - result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; - result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; - result[t][6] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; - result[t][7] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; - break; - } - else if (i == (retryCount - 1) && PathBOK == 0x01) //Tx IQK OK - { - RTPRINT(FINIT, INIT_IQK, ("Path B Only Tx IQK Success!!\n")); - result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; - result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; - } - } - - if(0x00 == PathBOK){ - RTPRINT(FINIT, INIT_IQK, ("Path B IQK failed!!\n")); - } - } - - //Back to BB mode, load original value - RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n")); - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0); - - if(t!=0) - { - if(!pHalData->bRfPiEnable){ - // Switch back BB to SI mode after finish IQ Calibration. - phy_PIModeSwitch(pAdapter, FALSE); - } - - // Reload ADDA power saving parameters - phy_ReloadADDARegisters(pAdapter, ADDA_REG, pHalData->ADDA_backup, IQK_ADDA_REG_NUM); - - // Reload MAC parameters - phy_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup); - - // Reload BB parameters - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - { - if(is2T) - phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92D, pHalData->IQK_BB_backup, IQK_BB_REG_NUM_92D); - else - phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92D, pHalData->IQK_BB_backup, IQK_BB_REG_NUM_92D -1); - } - else - phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM); - - if(!IS_HARDWARE_TYPE_8192D(pAdapter)) - { - // Restore RX initial gain - PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); - if(is2T){ - PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); - } - } - //load 0xe30 IQC default value - PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); - PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); - - } - RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8192C() <==\n")); - -} - - -VOID -phy_LCCalibrate92C( - IN PADAPTER pAdapter, - IN BOOLEAN is2T - ) -{ - u1Byte tmpReg; - u4Byte RF_Amode=0, RF_Bmode=0, LC_Cal; -// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - //Check continuous TX and Packet TX - tmpReg = PlatformEFIORead1Byte(pAdapter, 0xd03); - - if((tmpReg&0x70) != 0) //Deal with contisuous TX case - PlatformEFIOWrite1Byte(pAdapter, 0xd03, tmpReg&0x8F); //disable all continuous TX - else // Deal with Packet TX case - PlatformEFIOWrite1Byte(pAdapter, REG_TXPAUSE, 0xFF); // block all queues - - if((tmpReg&0x70) != 0) - { - //1. Read original RF mode - //Path-A - RF_Amode = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits); - - //Path-B - if(is2T) - RF_Bmode = PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits); - - //2. Set RF mode = standby mode - //Path-A - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); - - //Path-B - if(is2T) - PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); - } - - //3. Read RF reg18 - LC_Cal = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits); - - //4. Set LC calibration begin bit15 - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); - - delay_ms(100); - - - //Restore original situation - if((tmpReg&0x70) != 0) //Deal with contisuous TX case - { - //Path-A - PlatformEFIOWrite1Byte(pAdapter, 0xd03, tmpReg); - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); - - //Path-B - if(is2T) - PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); - } - else // Deal with Packet TX case - { - PlatformEFIOWrite1Byte(pAdapter, REG_TXPAUSE, 0x00); - } -} - - -VOID -phy_LCCalibrate( - IN PADAPTER pAdapter, - IN BOOLEAN is2T - ) -{ - if(IS_HARDWARE_TYPE_8192D(pAdapter)) - { -#if SWLCK == 1 - phy_LCCalibrate92DSW(pAdapter, is2T); -#else - phy_LCCalibrate92D(pAdapter, is2T); -#endif - } - else - { - phy_LCCalibrate92C(pAdapter, is2T); - } -} - - - -//Analog Pre-distortion calibration -#define APK_BB_REG_NUM 8 -#define APK_CURVE_REG_NUM 4 -#define PATH_NUM 2 - -VOID -phy_APCalibrate_8192C( - IN PADAPTER pAdapter, - IN s1Byte delta, - IN BOOLEAN is2T - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - u4Byte regD[PATH_NUM]; - u4Byte tmpReg, index, offset, i, apkbound; - u1Byte path, pathbound = PATH_NUM; - u4Byte BB_backup[APK_BB_REG_NUM]; - u4Byte BB_REG[APK_BB_REG_NUM] = { - rFPGA1_TxBlock, rOFDM0_TRxPathEnable, - rFPGA0_RFMOD, rOFDM0_TRMuxPar, - rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, - rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; - u4Byte BB_AP_MODE[APK_BB_REG_NUM] = { - 0x00000020, 0x00a05430, 0x02040000, - 0x000800e4, 0x00204000 }; - u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = { - 0x00000020, 0x00a05430, 0x02040000, - 0x000800e4, 0x22204000 }; - - u4Byte AFE_backup[IQK_ADDA_REG_NUM]; - u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { - rFPGA0_XCD_SwitchControl, rBlue_Tooth, - rRx_Wait_CCA, rTx_CCK_RFON, - rTx_CCK_BBON, rTx_OFDM_RFON, - rTx_OFDM_BBON, rTx_To_Rx, - rTx_To_Tx, rRx_CCK, - rRx_OFDM, rRx_Wait_RIFS, - rRx_TO_Rx, rStandby, - rSleep, rPMPD_ANAEN }; - - u4Byte MAC_backup[IQK_MAC_REG_NUM]; - u4Byte MAC_REG[IQK_MAC_REG_NUM] = { - REG_TXPAUSE, REG_BCN_CTRL, - REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; - - u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { - {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, - {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} - }; - - u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { - {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings - {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} - }; - - u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { - {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, - {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} - }; - - u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { - {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings - {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} - }; -#if 0 - u4Byte APK_RF_value_A[PATH_NUM][APK_BB_REG_NUM] = { - {0x1adb0, 0x1adb0, 0x1ada0, 0x1ad90, 0x1ad80}, - {0x00fb0, 0x00fb0, 0x00fa0, 0x00f90, 0x00f80} - }; -#endif - u4Byte AFE_on_off[PATH_NUM] = { - 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on - - u4Byte APK_offset[PATH_NUM] = { - rConfig_AntA, rConfig_AntB}; - - u4Byte APK_normal_offset[PATH_NUM] = { - rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; - - u4Byte APK_value[PATH_NUM] = { - 0x92fc0000, 0x12fc0000}; - - u4Byte APK_normal_value[PATH_NUM] = { - 0x92680000, 0x12680000}; - - s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { - {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} - }; - - u4Byte APK_normal_setting_value_1[13] = { - 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, - 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, - 0x12680000, 0x00880000, 0x00880000 - }; - - u4Byte APK_normal_setting_value_2[16] = { - 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, - 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, - 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, - 0x00050006 - }; - - u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a -// u4Byte AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; - - s4Byte BB_offset, delta_V, delta_offset; - -#if MP_DRIVER == 1 -if (pAdapter->registrypriv.mp_mode == 1) -{ - PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); - - pMptCtx->APK_bound[0] = 45; - pMptCtx->APK_bound[1] = 52; -} -#endif - - RTPRINT(FINIT, INIT_IQK, ("==>phy_APCalibrate_8192C() delta %d\n", delta)); - RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); - if(!is2T) - pathbound = 1; - - //2 FOR NORMAL CHIP SETTINGS - -// Temporarily do not allow normal driver to do the following settings because these offset -// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal -// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the -// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. -#if MP_DRIVER != 1 - return; -#endif - - if (pAdapter->registrypriv.mp_mode != 1) - return; - - //settings adjust for normal chip - for(index = 0; index < PATH_NUM; index ++) - { - APK_offset[index] = APK_normal_offset[index]; - APK_value[index] = APK_normal_value[index]; - AFE_on_off[index] = 0x6fdb25a4; - } - - for(index = 0; index < APK_BB_REG_NUM; index ++) - { - for(path = 0; path < pathbound; path++) - { - APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; - APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; - } - BB_AP_MODE[index] = BB_normal_AP_MODE[index]; - } - - apkbound = 6; - - //save BB default value - for(index = 0; index < APK_BB_REG_NUM ; index++) - { - if(index == 0) //skip - continue; - BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord); - } - - //save MAC default value - phy_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); - - //save AFE default value - phy_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); - - for(path = 0; path < pathbound; path++) - { - - - if(path == RF_PATH_A) - { - //path A APK - //load APK setting - //path-A - offset = rPdp_AntA; - for(index = 0; index < 11; index ++) - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - - PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); - - offset = rConfig_AntA; - for(; index < 13; index ++) - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - - //page-B1 - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x40000000); - - //path A - offset = rPdp_AntA; - for(index = 0; index < 16; index++) - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000); - } - else if(path == RF_PATH_B) - { - //path B APK - //load APK setting - //path-B - offset = rPdp_AntB; - for(index = 0; index < 10; index ++) - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); - - PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); - - offset = rConfig_AntA; - index = 11; - for(; index < 13; index ++) //offset 0xb68, 0xb6c - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - - //page-B1 - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x40000000); - - //path B - offset = 0xb60; - for(index = 0; index < 16; index++) - { - PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); - - offset += 0x04; - } - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000); - } - - //save RF default value - regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask); - - //Path A AFE all on, path B AFE All off or vise versa - for(index = 0; index < IQK_ADDA_REG_NUM ; index++) - PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, AFE_on_off[path]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xe70 %x\n", PHY_QueryBBReg(pAdapter, rRx_Wait_CCA, bMaskDWord))); - - //BB to AP mode - if(path == 0) - { - for(index = 0; index < APK_BB_REG_NUM ; index++) - { - - if(index == 0) //skip - continue; - else if (index < 5) - PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); - else if (BB_REG[index] == 0x870) - PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); - else - PHY_SetBBReg(pAdapter, BB_REG[index], BIT10, 0x0); - } - - PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); - PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); - } - else //path B - { - PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); - PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); - - } - - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x800 %x\n", PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord))); - - //MAC settings - phy_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); - - if(path == RF_PATH_A) //Path B to standby mode - { - PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bRFRegOffsetMask, 0x10000); - } - else //Path A to standby mode - { - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x10000); - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f); - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20103); - } - - delta_offset = ((delta+14)/2); - if(delta_offset < 0) - delta_offset = 0; - else if (delta_offset > 12) - delta_offset = 12; - - //AP calibration - for(index = 0; index < APK_BB_REG_NUM; index++) - { - if(index != 1) //only DO PA11+PAD01001, AP RF setting - continue; - - tmpReg = APK_RF_init_value[path][index]; -#if 1 - if(!pHalData->bAPKThermalMeterIgnore) - { - BB_offset = (tmpReg & 0xF0000) >> 16; - - if(!(tmpReg & BIT15)) //sign bit 0 - { - BB_offset = -BB_offset; - } - - delta_V = APK_delta_mapping[index][delta_offset]; - - BB_offset += delta_V; - - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, delta_V, delta_offset)); - - if(BB_offset < 0) - { - tmpReg = tmpReg & (~BIT15); - BB_offset = -BB_offset; - } - else - { - tmpReg = tmpReg | BIT15; - } - tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); - } -#endif - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - if(IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) - PHY_SetRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask, 0x894ae); - else -#endif - PHY_SetRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask, 0x8992e); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask))); - PHY_SetRFReg(pAdapter, path, RF_AC, bRFRegOffsetMask, APK_RF_value_0[path][index]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bRFRegOffsetMask))); - PHY_SetRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask, tmpReg); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask))); - - // PA11+PAD01111, one shot - i = 0; - do - { - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80000000); - { - PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[0]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); - delay_ms(3); - PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[1]); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); - - delay_ms(20); - } - PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000); - - if(path == RF_PATH_A) - tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0x03E00000); - else - tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0xF8000000); - RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xbd8[25:21] %x\n", tmpReg)); - - - i++; - } - while(tmpReg > apkbound && i < 4); - - APK_result[path][index] = tmpReg; - } - } - - //reload MAC default value - phy_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); - - //reload BB default value - for(index = 0; index < APK_BB_REG_NUM ; index++) - { - - if(index == 0) //skip - continue; - PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]); - } - - //reload AFE default value - phy_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); - - //reload RF path default value - for(path = 0; path < pathbound; path++) - { - PHY_SetRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask, regD[path]); - if(path == RF_PATH_B) - { - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f); - PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20101); - } - - //note no index == 0 - if (APK_result[path][1] > 6) - APK_result[path][1] = 6; - RTPRINT(FINIT, INIT_IQK, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); - } - - RTPRINT(FINIT, INIT_IQK, ("\n")); - - - for(path = 0; path < pathbound; path++) - { - PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G1_G4, bRFRegOffsetMask, - ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); - if(path == RF_PATH_A) - PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, - ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); - else - PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, - ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); - - if(!IS_HARDWARE_TYPE_8723A(pAdapter)) - PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G9_G11, bRFRegOffsetMask, - ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); - } - - pHalData->bAPKdone = TRUE; - - RTPRINT(FINIT, INIT_IQK, ("<==phy_APCalibrate_8192C()\n")); -} - - -VOID -PHY_IQCalibrate_8192C( - IN PADAPTER pAdapter, - IN BOOLEAN bReCovery - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - s4Byte result[4][8]; //last is final result - u1Byte i, final_candidate, Indexforchannel; - BOOLEAN bPathAOK, bPathBOK; - s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; - BOOLEAN is12simular, is13simular, is23simular; - BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; - u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { - rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, - rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, - rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, - rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, - rOFDM0_RxIQExtAnta}; - - if (ODM_CheckPowerStatus(pAdapter) == FALSE) - return; - -#if MP_DRIVER == 1 -if (pAdapter->registrypriv.mp_mode == 1) -{ - bStartContTx = pAdapter->MptCtx.bStartContTx; - bSingleTone = pAdapter->MptCtx.bSingleTone; - bCarrierSuppression = pAdapter->MptCtx.bCarrierSuppression; -} -#endif - - //ignore IQK when continuous Tx - if(bStartContTx || bSingleTone || bCarrierSuppression) - return; - -#if DISABLE_BB_RF - return; -#endif - if(pAdapter->bSlaveOfDMSP) - return; - - if(!IS_HARDWARE_TYPE_8192D(pAdapter)) - { - if(bReCovery) - { - phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup_recover, 9); - return; - - } - } - RTPRINT(FINIT, INIT_IQK, ("IQK:Start!!!\n")); - - for(i = 0; i < 8; i++) - { - result[0][i] = 0; - result[1][i] = 0; - result[2][i] = 0; - result[3][i] = 0; - } - final_candidate = 0xff; - bPathAOK = FALSE; - bPathBOK = FALSE; - is12simular = FALSE; - is23simular = FALSE; - is13simular = FALSE; - - - RTPRINT(FINIT, INIT_IQK, ("IQK !!!interface %d currentband %d ishardwareD %d \n", pAdapter->interfaceIndex, pHalData->CurrentBandType92D, IS_HARDWARE_TYPE_8192D(pAdapter))); - AcquireCCKAndRWPageAControl(pAdapter); -// RT_TRACE(COMP_INIT,DBG_LOUD,("Acquire Mutex in IQCalibrate \n")); - for (i=0; i<3; i++) - { -// if(IS_HARDWARE_TYPE_8192C(pAdapter) || IS_HARDWARE_TYPE_8723A(pAdapter)) - if(!IS_HARDWARE_TYPE_8192D(pAdapter)) - { - if(IS_92C_SERIAL( pHalData->VersionID)) - { - phy_IQCalibrate_8192C(pAdapter, result, i, TRUE); - } - else - { - // For 88C 1T1R - phy_IQCalibrate_8192C(pAdapter, result, i, FALSE); - } - } - else/* if(IS_HARDWARE_TYPE_8192D(pAdapter))*/ - { - if(pHalData->CurrentBandType92D == BAND_ON_5G) - { - phy_IQCalibrate_5G_Normal(pAdapter, result, i); - } - else if(pHalData->CurrentBandType92D == BAND_ON_2_4G) - { - if(IS_92D_SINGLEPHY(pHalData->VersionID)) - phy_IQCalibrate_8192C(pAdapter, result, i, TRUE); - else - phy_IQCalibrate_8192C(pAdapter, result, i, FALSE); - } - } - - if(i == 1) - { - is12simular = phy_SimularityCompare(pAdapter, result, 0, 1); - if(is12simular) - { - final_candidate = 0; - break; - } - } - - if(i == 2) - { - is13simular = phy_SimularityCompare(pAdapter, result, 0, 2); - if(is13simular) - { - final_candidate = 0; - break; - } - - is23simular = phy_SimularityCompare(pAdapter, result, 1, 2); - if(is23simular) - final_candidate = 1; - else - { - for(i = 0; i < 8; i++) - RegTmp += result[3][i]; - - if(RegTmp != 0) - final_candidate = 3; - else - final_candidate = 0xFF; - } - } - } -// RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate \n")); - ReleaseCCKAndRWPageAControl(pAdapter); - - for (i=0; i<4; i++) - { - RegE94 = result[i][0]; - RegE9C = result[i][1]; - RegEA4 = result[i][2]; - RegEAC = result[i][3]; - RegEB4 = result[i][4]; - RegEBC = result[i][5]; - RegEC4 = result[i][6]; - RegECC = result[i][7]; - RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); - } - - if(final_candidate != 0xff) - { - pHalData->RegE94 = RegE94 = result[final_candidate][0]; - pHalData->RegE9C = RegE9C = result[final_candidate][1]; - RegEA4 = result[final_candidate][2]; - RegEAC = result[final_candidate][3]; - pHalData->RegEB4 = RegEB4 = result[final_candidate][4]; - pHalData->RegEBC = RegEBC = result[final_candidate][5]; - RegEC4 = result[final_candidate][6]; - RegECC = result[final_candidate][7]; - RTPRINT(FINIT, INIT_IQK, ("IQK: final_candidate is %x\n",final_candidate)); - RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); - bPathAOK = bPathBOK = TRUE; - } - else - { - RegE94 = RegEB4 = pHalData->RegE94 = pHalData->RegEB4 = 0x100; //X default value - RegE9C = RegEBC = pHalData->RegE9C = pHalData->RegEBC = 0x0; //Y default value - } - - if((RegE94 != 0)/*&&(RegEA4 != 0)*/) - { - if(pHalData->CurrentBandType92D == BAND_ON_5G) - phy_PathAFillIQKMatrix_5G_Normal(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); - else - phy_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); - - } - - if (IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID)) - { - if((RegEB4 != 0)/*&&(RegEC4 != 0)*/) - { - if(pHalData->CurrentBandType92D == BAND_ON_5G) - phy_PathBFillIQKMatrix_5G_Normal(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); - else - phy_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); - } - } - - if(IS_HARDWARE_TYPE_8192D(pAdapter) && final_candidate != 0xFF) - { - Indexforchannel = GetRightChnlPlaceforIQK(pHalData->CurrentChannel); - - for(i = 0; i < IQK_Matrix_REG_NUM; i++) - pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][i] = - result[final_candidate][i]; - - pHalData->IQKMatrixRegSetting[Indexforchannel].bIQKDone = TRUE; - - RTPRINT(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); - } - - if(!IS_HARDWARE_TYPE_8192D(pAdapter)) - phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup_recover, 9); - -} - - -VOID -PHY_LCCalibrate_8192C( - IN PADAPTER pAdapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; - PMGNT_INFO pMgntInfo=&pAdapter->MgntInfo; - PMGNT_INFO pMgntInfoBuddyAdapter; - u4Byte timeout = 2000, timecount = 0; - PADAPTER BuddyAdapter = pAdapter->BuddyAdapter; - -#if MP_DRIVER == 1 -if (pAdapter->registrypriv.mp_mode == 1) -{ - bStartContTx = pAdapter->MptCtx.bStartContTx; - bSingleTone = pAdapter->MptCtx.bSingleTone; - bCarrierSuppression = pAdapter->MptCtx.bCarrierSuppression; -} -#endif - -#if DISABLE_BB_RF - return; -#endif - - //ignore LCK when continuous Tx - if(bStartContTx || bSingleTone || bCarrierSuppression) - return; - - if(BuddyAdapter != NULL && - ((pAdapter->interfaceIndex == 0 && pHalData->CurrentBandType92D == BAND_ON_2_4G) || - (pAdapter->interfaceIndex == 1 && pHalData->CurrentBandType92D == BAND_ON_5G))) - { - pMgntInfoBuddyAdapter=&BuddyAdapter->MgntInfo; - while(pMgntInfoBuddyAdapter->bScanInProgress && timecount < timeout) - { - delay_ms(50); - timecount += 50; - } - } - - while(pMgntInfo->bScanInProgress && timecount < timeout) - { - delay_ms(50); - timecount += 50; - } - - pHalData->bLCKInProgress = TRUE; - - RTPRINT(FINIT, INIT_IQK, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pAdapter->interfaceIndex, pHalData->CurrentBandType92D, timecount)); - - //if(IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID)) - if(IS_2T2R(pHalData->VersionID)) - { - phy_LCCalibrate(pAdapter, TRUE); - } - else{ - // For 88C 1T1R - phy_LCCalibrate(pAdapter, FALSE); - } - - pHalData->bLCKInProgress = FALSE; - - RTPRINT(FINIT, INIT_IQK, ("LCK:Finish!!!interface %d\n", pAdapter->interfaceIndex)); - - -} - -VOID -PHY_APCalibrate_8192C( - IN PADAPTER pAdapter, - IN s1Byte delta - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - //default disable APK, because Tx NG issue, suggest by Jenyu, 2011.11.25 - return; - -#if DISABLE_BB_RF - return; -#endif - - if(IS_HARDWARE_TYPE_8192D(pAdapter) || IS_HARDWARE_TYPE_8723A(pAdapter)) - return; - -#if FOR_BRAZIL_PRETEST != 1 - if(pHalData->bAPKdone) -#endif - return; - - if(IS_92C_SERIAL( pHalData->VersionID)){ - phy_APCalibrate_8192C(pAdapter, delta, TRUE); - } - else{ - // For 88C 1T1R - phy_APCalibrate_8192C(pAdapter, delta, FALSE); - } -} - - -#endif - - -//3============================================================ -//3 IQ Calibration -//3============================================================ - -VOID -ODM_ResetIQKResult( - IN PDM_ODM_T pDM_Odm -) -{ - u1Byte i; -#if (DM_ODM_SUPPORT_TYPE == ODM_MP || DM_ODM_SUPPORT_TYPE == ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - - if (!IS_HARDWARE_TYPE_8192D(Adapter)) - return; -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD,("PHY_ResetIQKResult:: settings regs %d default regs %d\n", (u32)(sizeof(pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting)/sizeof(IQK_MATRIX_REGS_SETTING)), IQK_Matrix_Settings_NUM)); - //0xe94, 0xe9c, 0xea4, 0xeac, 0xeb4, 0xebc, 0xec4, 0xecc - - for(i = 0; i < IQK_Matrix_Settings_NUM; i++) - { - { - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][0] = - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][2] = - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][4] = - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][6] = 0x100; - - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][1] = - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][3] = - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][5] = - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][7] = 0x0; - - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].bIQKDone = FALSE; - - } - } - -} -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) -u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) -{ - u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = - {1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165}; - u1Byte place = chnl; - - - if(chnl > 14) - { - for(place = 14; place To DO modify -u4Byte EDCAParam[HT_IOT_PEER_MAX][3] = -{ // UL DL - {0x5ea42b, 0x5ea42b, 0x5ea42b}, //0:unknown AP - {0xa44f, 0x5ea44f, 0x5e431c}, // 1:realtek AP - {0x5ea42b, 0x5ea42b, 0x5ea42b}, // 2:unknown AP => realtek_92SE - {0x5ea32b, 0x5ea42b, 0x5e4322}, // 3:broadcom AP - {0x5ea422, 0x00a44f, 0x00a44f}, // 4:ralink AP - {0x5ea322, 0x00a630, 0x00a44f}, // 5:atheros AP - //{0x5ea42b, 0x5ea42b, 0x5ea42b},// 6:cisco AP - {0x5e4322, 0x5e4322, 0x5e4322},// 6:cisco AP - //{0x3ea430, 0x00a630, 0x3ea44f}, // 7:cisco AP - {0x5ea44f, 0x00a44f, 0x5ea42b}, // 8:marvell AP - //{0x5ea44f, 0x5ea44f, 0x5ea44f}, // 9realtek AP - {0x5ea42b, 0x5ea42b, 0x5ea42b}, // 10:unknown AP=> 92U AP - {0x5ea42b, 0xa630, 0x5e431c}, // 11:airgocap AP -// {0x5e4322, 0x00a44f, 0x5ea44f}, // 12:unknown AP -}; -//============================================================ -// EDCA Paramter for AP/ADSL by Mingzhi 2011-11-22 -//============================================================ -#elif (DM_ODM_SUPPORT_TYPE &ODM_ADSL) -enum qos_prio { BK, BE, VI, VO, VI_AG, VO_AG }; - -static const struct ParaRecord rtl_ap_EDCA[] = -{ -//ACM,AIFSN, ECWmin, ECWmax, TXOplimit - {0, 7, 4, 10, 0}, //BK - {0, 3, 4, 6, 0}, //BE - {0, 1, 3, 4, 188}, //VI - {0, 1, 2, 3, 102}, //VO - {0, 1, 3, 4, 94}, //VI_AG - {0, 1, 2, 3, 47}, //VO_AG -}; - -static const struct ParaRecord rtl_sta_EDCA[] = -{ -//ACM,AIFSN, ECWmin, ECWmax, TXOplimit - {0, 7, 4, 10, 0}, - {0, 3, 4, 10, 0}, - {0, 2, 3, 4, 188}, - {0, 2, 2, 3, 102}, - {0, 2, 3, 4, 94}, - {0, 2, 2, 3, 47}, -}; -#endif - -//============================================================ -// Global var -//============================================================ -u4Byte OFDMSwingTable[OFDM_TABLE_SIZE_92D] = { - 0x7f8001fe, // 0, +6.0dB - 0x788001e2, // 1, +5.5dB - 0x71c001c7, // 2, +5.0dB - 0x6b8001ae, // 3, +4.5dB - 0x65400195, // 4, +4.0dB - 0x5fc0017f, // 5, +3.5dB - 0x5a400169, // 6, +3.0dB - 0x55400155, // 7, +2.5dB - 0x50800142, // 8, +2.0dB - 0x4c000130, // 9, +1.5dB - 0x47c0011f, // 10, +1.0dB - 0x43c0010f, // 11, +0.5dB - 0x40000100, // 12, +0dB - 0x3c8000f2, // 13, -0.5dB - 0x390000e4, // 14, -1.0dB - 0x35c000d7, // 15, -1.5dB - 0x32c000cb, // 16, -2.0dB - 0x300000c0, // 17, -2.5dB - 0x2d4000b5, // 18, -3.0dB - 0x2ac000ab, // 19, -3.5dB - 0x288000a2, // 20, -4.0dB - 0x26000098, // 21, -4.5dB - 0x24000090, // 22, -5.0dB - 0x22000088, // 23, -5.5dB - 0x20000080, // 24, -6.0dB - 0x1e400079, // 25, -6.5dB - 0x1c800072, // 26, -7.0dB - 0x1b00006c, // 27. -7.5dB - 0x19800066, // 28, -8.0dB - 0x18000060, // 29, -8.5dB - 0x16c0005b, // 30, -9.0dB - 0x15800056, // 31, -9.5dB - 0x14400051, // 32, -10.0dB - 0x1300004c, // 33, -10.5dB - 0x12000048, // 34, -11.0dB - 0x11000044, // 35, -11.5dB - 0x10000040, // 36, -12.0dB - 0x0f00003c,// 37, -12.5dB - 0x0e400039,// 38, -13.0dB - 0x0d800036,// 39, -13.5dB - 0x0cc00033,// 40, -14.0dB - 0x0c000030,// 41, -14.5dB - 0x0b40002d,// 42, -15.0dB -}; - - -u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { - {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB - {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB - {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB - {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB - {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB - {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB - {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB - {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB - {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB - {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB - {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB - {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB - {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB - {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB - {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB - {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB - {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB - {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB - {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB - {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB - {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB - {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB - {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB - {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB - {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB - {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB - {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB - {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB - {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB - {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB - {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB - {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB - {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB -}; - - -u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]= { - {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB - {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB - {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB - {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB - {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB - {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB - {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB - {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB - {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB - {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB - {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB - {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB - {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB - {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB - {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB - {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB - {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB - {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB - {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB - {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB - {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB - {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB - {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB - {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB - {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB - {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB - {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB - {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB - {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB - {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB - {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB - {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB - {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB -}; - - -#ifdef AP_BUILD_WORKAROUND - -unsigned int TxPwrTrk_OFDM_SwingTbl[TxPwrTrk_OFDM_SwingTbl_Len] = { - /* +6.0dB */ 0x7f8001fe, - /* +5.5dB */ 0x788001e2, - /* +5.0dB */ 0x71c001c7, - /* +4.5dB */ 0x6b8001ae, - /* +4.0dB */ 0x65400195, - /* +3.5dB */ 0x5fc0017f, - /* +3.0dB */ 0x5a400169, - /* +2.5dB */ 0x55400155, - /* +2.0dB */ 0x50800142, - /* +1.5dB */ 0x4c000130, - /* +1.0dB */ 0x47c0011f, - /* +0.5dB */ 0x43c0010f, - /* 0.0dB */ 0x40000100, - /* -0.5dB */ 0x3c8000f2, - /* -1.0dB */ 0x390000e4, - /* -1.5dB */ 0x35c000d7, - /* -2.0dB */ 0x32c000cb, - /* -2.5dB */ 0x300000c0, - /* -3.0dB */ 0x2d4000b5, - /* -3.5dB */ 0x2ac000ab, - /* -4.0dB */ 0x288000a2, - /* -4.5dB */ 0x26000098, - /* -5.0dB */ 0x24000090, - /* -5.5dB */ 0x22000088, - /* -6.0dB */ 0x20000080, - /* -6.5dB */ 0x1a00006c, - /* -7.0dB */ 0x1c800072, - /* -7.5dB */ 0x18000060, - /* -8.0dB */ 0x19800066, - /* -8.5dB */ 0x15800056, - /* -9.0dB */ 0x26c0005b, - /* -9.5dB */ 0x14400051, - /* -10.0dB */ 0x24400051, - /* -10.5dB */ 0x1300004c, - /* -11.0dB */ 0x12000048, - /* -11.5dB */ 0x11000044, - /* -12.0dB */ 0x10000040 -}; -#endif - -//============================================================ -// Local Function predefine. -//============================================================ - -//START------------COMMON INFO RELATED---------------// -VOID -odm_CommonInfoSelfInit( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_CommonInfoSelfUpdate( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_CmnInfoInit_Debug( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_CmnInfoHook_Debug( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_CmnInfoUpdate_Debug( - IN PDM_ODM_T pDM_Odm - ); -/* -VOID -odm_FindMinimumRSSI( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_IsLinked( - IN PDM_ODM_T pDM_Odm - ); -*/ -//END------------COMMON INFO RELATED---------------// - -//START---------------DIG---------------------------// -VOID -odm_FalseAlarmCounterStatistics( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DIGInit( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DIG( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_CCKPacketDetectionThresh( - IN PDM_ODM_T pDM_Odm - ); -//END---------------DIG---------------------------// - -//START-------BB POWER SAVE-----------------------// -VOID -odm_DynamicBBPowerSavingInit( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DynamicBBPowerSaving( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_1R_CCA( - IN PDM_ODM_T pDM_Odm - ); -VOID -odm_AdaptivityInit( - IN PDM_ODM_T pDM_Odm -); - -VOID -odm_Adaptivity( - IN PDM_ODM_T pDM_Odm, - IN u1Byte IGI -); -//END---------BB POWER SAVE-----------------------// - -//START-----------------PSD-----------------------// -#if(DM_ODM_SUPPORT_TYPE & (ODM_MP)) -//============================================================ -// Function predefine. -//============================================================ -VOID odm_PathDiversityInit_92C( IN PADAPTER Adapter); -VOID odm_2TPathDiversityInit_92C( IN PADAPTER Adapter); -VOID odm_1TPathDiversityInit_92C( IN PADAPTER Adapter); -BOOLEAN odm_IsConnected_92C(IN PADAPTER Adapter); -VOID odm_PathDiversityAfterLink_92C( IN PADAPTER Adapter); - -VOID -odm_CCKTXPathDiversityCallback( - PRT_TIMER pTimer - ); - -VOID -odm_CCKTXPathDiversityWorkItemCallback( - IN PVOID pContext - ); - -VOID -odm_PathDivChkAntSwitchCallback( - PRT_TIMER pTimer - ); - -VOID -odm_PathDivChkAntSwitchWorkitemCallback( - IN PVOID pContext - ); - -VOID odm_SetRespPath_92C( IN PADAPTER Adapter, IN u1Byte DefaultRespPath); -VOID odm_OFDMTXPathDiversity_92C( IN PADAPTER Adapter); -VOID odm_CCKTXPathDiversity_92C( IN PADAPTER Adapter); -VOID odm_ResetPathDiversity_92C( IN PADAPTER Adapter); - -//Start-------------------- RX High Power------------------------// -VOID odm_RXHPInit( IN PDM_ODM_T pDM_Odm); -VOID odm_RXHP( IN PDM_ODM_T pDM_Odm); -VOID odm_Write_RXHP( IN PDM_ODM_T pDM_Odm); - -VOID odm_PSD_RXHP( IN PDM_ODM_T pDM_Odm); -VOID odm_PSD_RXHPCallback( PRT_TIMER pTimer); -VOID odm_PSD_RXHPWorkitemCallback( IN PVOID pContext); -//End--------------------- RX High Power -----------------------// - -VOID -odm_PathDivInit( IN PDM_ODM_T pDM_Odm); - -VOID -odm_SetRespPath_92C( - IN PADAPTER Adapter, - IN u1Byte DefaultRespPath - ); - -#endif -//END-------------------PSD-----------------------// - -VOID -odm_RefreshRateAdaptiveMaskMP( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_RefreshRateAdaptiveMaskCE( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_RefreshRateAdaptiveMaskAPADSL( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DynamicTxPowerInit( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DynamicTxPowerRestorePowerIndex( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DynamicTxPowerNIC( - IN PDM_ODM_T pDM_Odm - ); - -#if(DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) -VOID -odm_DynamicTxPowerSavePowerIndex( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DynamicTxPowerWritePowerIndex( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Value); - -VOID -odm_DynamicTxPower_92C( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DynamicTxPower_92D( - IN PDM_ODM_T pDM_Odm - ); -#endif - - -VOID -odm_RSSIMonitorInit( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_RSSIMonitorCheckMP( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_RSSIMonitorCheckCE( - IN PDM_ODM_T pDM_Odm - ); -VOID -odm_RSSIMonitorCheckAP( - IN PDM_ODM_T pDM_Odm - ); - - - -VOID -odm_RSSIMonitorCheck( - IN PDM_ODM_T pDM_Odm - ); -VOID -odm_DynamicTxPower( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DynamicTxPowerAP( - IN PDM_ODM_T pDM_Odm - ); - - -VOID -odm_SwAntDivInit( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_SwAntDivInit_NIC( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_SwAntDivChkAntSwitch( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Step - ); - -VOID -odm_SwAntDivChkAntSwitchNIC( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Step - ); - - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -VOID -odm_SwAntDivChkAntSwitchCallback( - PRT_TIMER pTimer -); -VOID -odm_SwAntDivChkAntSwitchWorkitemCallback( - IN PVOID pContext - ); -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext); -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext); -#endif - - - -VOID -odm_GlobalAdapterCheck( - IN VOID - ); - -VOID -odm_RefreshRateAdaptiveMask( - IN PDM_ODM_T pDM_Odm - ); - -VOID -ODM_TXPowerTrackingCheck( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_TXPowerTrackingCheckAP( - IN PDM_ODM_T pDM_Odm - ); - - - - - - - -VOID -odm_RateAdaptiveMaskInit( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_TXPowerTrackingThermalMeterInit( - IN PDM_ODM_T pDM_Odm - ); - - -VOID -odm_TXPowerTrackingInit( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_TXPowerTrackingCheckMP( - IN PDM_ODM_T pDM_Odm - ); - - -VOID -odm_TXPowerTrackingCheckCE( - IN PDM_ODM_T pDM_Odm - ); - -#if(DM_ODM_SUPPORT_TYPE & (ODM_MP)) - -VOID -ODM_RateAdaptiveStateApInit( - IN PADAPTER Adapter , - IN PRT_WLAN_STA pEntry - ); - -VOID -odm_TXPowerTrackingCallbackThermalMeter92C( - IN PADAPTER Adapter - ); - -VOID -odm_TXPowerTrackingCallbackRXGainThermalMeter92D( - IN PADAPTER Adapter - ); - -VOID -odm_TXPowerTrackingCallbackThermalMeter92D( - IN PADAPTER Adapter - ); - -VOID -odm_TXPowerTrackingDirectCall92C( - IN PADAPTER Adapter - ); - -VOID -odm_TXPowerTrackingThermalMeterCheck( - IN PADAPTER Adapter - ); - -#endif - -VOID -odm_EdcaTurboCheck( - IN PDM_ODM_T pDM_Odm - ); -VOID -ODM_EdcaTurboInit( - IN PDM_ODM_T pDM_Odm -); - -#if(DM_ODM_SUPPORT_TYPE==ODM_MP) -VOID -odm_EdcaTurboCheckMP( - IN PDM_ODM_T pDM_Odm - ); - -//check if edca turbo is disabled -BOOLEAN -odm_IsEdcaTurboDisable( - IN PDM_ODM_T pDM_Odm -); -//choose edca paramter for special IOT case -VOID -ODM_EdcaParaSelByIot( - IN PDM_ODM_T pDM_Odm, - OUT u4Byte *EDCA_BE_UL, - OUT u4Byte *EDCA_BE_DL - ); -//check if it is UL or DL -VOID -odm_EdcaChooseTrafficIdx( - IN PDM_ODM_T pDM_Odm, - IN u8Byte cur_tx_bytes, - IN u8Byte cur_rx_bytes, - IN BOOLEAN bBiasOnRx, - OUT BOOLEAN *pbIsCurRDLState - ); - -#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) -VOID -odm_EdcaTurboCheckCE( - IN PDM_ODM_T pDM_Odm - ); -#else -VOID -odm_IotEngine( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_EdcaParaInit( - IN PDM_ODM_T pDM_Odm - ); -#endif - - - -#define RxDefaultAnt1 0x65a9 -#define RxDefaultAnt2 0x569a - -VOID -odm_InitHybridAntDiv( - IN PDM_ODM_T pDM_Odm - ); - -BOOLEAN -odm_StaDefAntSel( - IN PDM_ODM_T pDM_Odm, - IN u4Byte OFDM_Ant1_Cnt, - IN u4Byte OFDM_Ant2_Cnt, - IN u4Byte CCK_Ant1_Cnt, - IN u4Byte CCK_Ant2_Cnt, - OUT u1Byte *pDefAnt - ); - -VOID -odm_SetRxIdleAnt( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Ant, - IN BOOLEAN bDualPath -); - - - -VOID -odm_HwAntDiv( - IN PDM_ODM_T pDM_Odm -); - - - - - -#if 0 -//#if ((DM_ODM_SUPPORT_TYPE==ODM_AP)&&defined(HW_ANT_SWITCH)) -VOID -odm_HW_AntennaSwitchInit( - IN PDM_ODM_T pDM_Odm -); - -VOID -odm_SetRxIdleAnt( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Ant -); - -VOID -odm_StaAntSelect( - IN PDM_ODM_T pDM_Odm, - IN struct stat_info *pstat -); - -VOID -odm_HW_IdleAntennaSelect( - IN PDM_ODM_T pDM_Odm -); - -u1Byte -ODM_Diversity_AntennaSelect( - IN PDM_ODM_T pDM_Odm, - IN u1Byte *data -); -#endif - - -//============================================================ -//3 Export Interface -//============================================================ - -// -// 2011/09/21 MH Add to describe different team necessary resource allocate?? -// -VOID -ODM_DMInit( - IN PDM_ODM_T pDM_Odm - ) -{ - -#if (FPGA_TWO_MAC_VERIFICATION == 1) - odm_RateAdaptiveMaskInit(pDM_Odm); - return; -#endif - - //2012.05.03 Luke: For all IC series - odm_CommonInfoSelfInit(pDM_Odm); - odm_CmnInfoInit_Debug(pDM_Odm); - odm_DIGInit(pDM_Odm); - odm_AdaptivityInit(pDM_Odm); - odm_RateAdaptiveMaskInit(pDM_Odm); - - if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) - { - - } - else if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) - { - #if (RTL8188E_SUPPORT == 1) - odm_PrimaryCCA_Init(pDM_Odm); // Gary - #endif - odm_DynamicBBPowerSavingInit(pDM_Odm); - odm_DynamicTxPowerInit(pDM_Odm); - odm_TXPowerTrackingInit(pDM_Odm); - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - odm_PSDMonitorInit(pDM_Odm); - odm_RXHPInit(pDM_Odm); - odm_PathDivInit(pDM_Odm); //92D Path Div Init //Neil Chen - #endif - ODM_EdcaTurboInit(pDM_Odm); - #if (RTL8188E_SUPPORT == 1) - ODM_RAInfo_Init_all(pDM_Odm); - #endif - if( ( pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV ) || - ( pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV ) || - ( pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV )) - { - odm_InitHybridAntDiv(pDM_Odm); - } - else if( pDM_Odm->AntDivType == CGCS_RX_SW_ANTDIV) - { - odm_SwAntDivInit(pDM_Odm); - } - } -} - -// -// 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. -// You can not add any dummy function here, be care, you can only use DM structure -// to perform any new ODM_DM. -// -VOID -ODM_DMWatchdog( - IN PDM_ODM_T pDM_Odm - ) -{ - //2012.05.03 Luke: For all IC series - odm_GlobalAdapterCheck(); - odm_CmnInfoHook_Debug(pDM_Odm); - odm_CmnInfoUpdate_Debug(pDM_Odm); - odm_CommonInfoSelfUpdate(pDM_Odm); - odm_FalseAlarmCounterStatistics(pDM_Odm); - odm_RSSIMonitorCheck(pDM_Odm); - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -//#ifdef CONFIG_PLATFORM_SPRD - //For CE Platform(SPRD or Tablet) - //8723A or 8189ES platform - //NeilChen--2012--08--24-- - //Fix Leave LPS issue - if( (adapter_to_pwrctl(pDM_Odm->Adapter)->pwr_mode != PS_MODE_ACTIVE) &&// in LPS mode - ( - (pDM_Odm->SupportICType & (ODM_RTL8723A ) )|| - (pDM_Odm->SupportICType & (ODM_RTL8188E) )//&&((pDM_Odm->SupportInterface == ODM_ITRF_SDIO)) ) - - ) - ) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("----Step1: odm_DIG is in LPS mode\n")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("---Step2: 8723AS is in LPS mode\n")); - odm_DIGbyRSSI_LPS(pDM_Odm); - } - else -//#endif -#endif - { - odm_DIG(pDM_Odm); - } - - - odm_CCKPacketDetectionThresh(pDM_Odm); - - if(*(pDM_Odm->pbPowerSaving)==TRUE) - return; - - odm_Adaptivity(pDM_Odm, pDM_Odm->DM_DigTable.CurIGValue); - - - odm_RefreshRateAdaptiveMask(pDM_Odm); - - #if (RTL8192D_SUPPORT == 1) - ODM_DynamicEarlyMode(pDM_Odm); - #endif - odm_DynamicBBPowerSaving(pDM_Odm); - #if (RTL8188E_SUPPORT == 1) - odm_DynamicPrimaryCCA(pDM_Odm); - #endif - if( ( pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV ) || - ( pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV ) || - ( pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV )) - { - odm_HwAntDiv(pDM_Odm); - } - else if( pDM_Odm->AntDivType == CGCS_RX_SW_ANTDIV) - { - odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_PEAK); - } - - if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) - { - - } - else if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) - { - ODM_TXPowerTrackingCheck(pDM_Odm); - odm_EdcaTurboCheck(pDM_Odm); - odm_DynamicTxPower(pDM_Odm); - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - odm_RXHP(pDM_Odm); - #endif - } - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) - odm_dtc(pDM_Odm); -#endif -} - - -// -// Init /.. Fixed HW value. Only init time. -// -VOID -ODM_CmnInfoInit( - IN PDM_ODM_T pDM_Odm, - IN ODM_CMNINFO_E CmnInfo, - IN u4Byte Value - ) -{ - //ODM_RT_TRACE(pDM_Odm,); - - // - // This section is used for init value - // - switch (CmnInfo) - { - // - // Fixed ODM value. - // - case ODM_CMNINFO_ABILITY: - pDM_Odm->SupportAbility = (u4Byte)Value; - break; - case ODM_CMNINFO_PLATFORM: - pDM_Odm->SupportPlatform = (u1Byte)Value; - break; - - case ODM_CMNINFO_INTERFACE: - pDM_Odm->SupportInterface = (u1Byte)Value; - break; - - case ODM_CMNINFO_MP_TEST_CHIP: - pDM_Odm->bIsMPChip= (u1Byte)Value; - break; - - case ODM_CMNINFO_IC_TYPE: - pDM_Odm->SupportICType = Value; - break; - - case ODM_CMNINFO_CUT_VER: - pDM_Odm->CutVersion = (u1Byte)Value; - break; - - case ODM_CMNINFO_FAB_VER: - pDM_Odm->FabVersion = (u1Byte)Value; - break; - - case ODM_CMNINFO_RF_TYPE: - pDM_Odm->RFType = (u1Byte)Value; - break; - - case ODM_CMNINFO_RF_ANTENNA_TYPE: - pDM_Odm->AntDivType= (u1Byte)Value; - break; - - case ODM_CMNINFO_BOARD_TYPE: - pDM_Odm->BoardType = (u1Byte)Value; - break; - - case ODM_CMNINFO_EXT_LNA: - pDM_Odm->ExtLNA = (u1Byte)Value; - break; - - case ODM_CMNINFO_EXT_PA: - pDM_Odm->ExtPA = (u1Byte)Value; - break; - - case ODM_CMNINFO_EXT_TRSW: - pDM_Odm->ExtTRSW = (u1Byte)Value; - break; - case ODM_CMNINFO_PATCH_ID: - pDM_Odm->PatchID = (u1Byte)Value; - break; - case ODM_CMNINFO_BINHCT_TEST: - pDM_Odm->bInHctTest = (BOOLEAN)Value; - break; - case ODM_CMNINFO_BWIFI_TEST: - pDM_Odm->bWIFITest = (BOOLEAN)Value; - break; - - case ODM_CMNINFO_SMART_CONCURRENT: - pDM_Odm->bDualMacSmartConcurrent = (BOOLEAN )Value; - break; - - //To remove the compiler warning, must add an empty default statement to handle the other values. - default: - //do nothing - break; - - } - - -} - - -VOID -ODM_CmnInfoHook( - IN PDM_ODM_T pDM_Odm, - IN ODM_CMNINFO_E CmnInfo, - IN PVOID pValue - ) -{ - // - // Hook call by reference pointer. - // - switch (CmnInfo) - { - // - // Dynamic call by reference pointer. - // - case ODM_CMNINFO_MAC_PHY_MODE: - pDM_Odm->pMacPhyMode = (u1Byte *)pValue; - break; - - case ODM_CMNINFO_TX_UNI: - pDM_Odm->pNumTxBytesUnicast = (u8Byte *)pValue; - break; - - case ODM_CMNINFO_RX_UNI: - pDM_Odm->pNumRxBytesUnicast = (u8Byte *)pValue; - break; - - case ODM_CMNINFO_WM_MODE: - pDM_Odm->pWirelessMode = (u1Byte *)pValue; - break; - - case ODM_CMNINFO_BAND: - pDM_Odm->pBandType = (u1Byte *)pValue; - break; - - case ODM_CMNINFO_SEC_CHNL_OFFSET: - pDM_Odm->pSecChOffset = (u1Byte *)pValue; - break; - - case ODM_CMNINFO_SEC_MODE: - pDM_Odm->pSecurity = (u1Byte *)pValue; - break; - - case ODM_CMNINFO_BW: - pDM_Odm->pBandWidth = (u1Byte *)pValue; - break; - - case ODM_CMNINFO_CHNL: - pDM_Odm->pChannel = (u1Byte *)pValue; - break; - - case ODM_CMNINFO_DMSP_GET_VALUE: - pDM_Odm->pbGetValueFromOtherMac = (BOOLEAN *)pValue; - break; - - case ODM_CMNINFO_BUDDY_ADAPTOR: - pDM_Odm->pBuddyAdapter = (PADAPTER *)pValue; - break; - - case ODM_CMNINFO_DMSP_IS_MASTER: - pDM_Odm->pbMasterOfDMSP = (BOOLEAN *)pValue; - break; - - case ODM_CMNINFO_SCAN: - pDM_Odm->pbScanInProcess = (BOOLEAN *)pValue; - break; - - case ODM_CMNINFO_POWER_SAVING: - pDM_Odm->pbPowerSaving = (BOOLEAN *)pValue; - break; - - case ODM_CMNINFO_ONE_PATH_CCA: - pDM_Odm->pOnePathCCA = (u1Byte *)pValue; - break; - - case ODM_CMNINFO_DRV_STOP: - pDM_Odm->pbDriverStopped = (BOOLEAN *)pValue; - break; - - case ODM_CMNINFO_PNP_IN: - pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (BOOLEAN *)pValue; - break; - - case ODM_CMNINFO_INIT_ON: - pDM_Odm->pinit_adpt_in_progress = (BOOLEAN *)pValue; - break; - - case ODM_CMNINFO_ANT_TEST: - pDM_Odm->pAntennaTest = (u1Byte *)pValue; - break; - - case ODM_CMNINFO_NET_CLOSED: - pDM_Odm->pbNet_closed = (BOOLEAN *)pValue; - break; - case ODM_CMNINFO_MP_MODE: - pDM_Odm->mp_mode = (u1Byte *)pValue; - break; - - //case ODM_CMNINFO_BT_COEXIST: - // pDM_Odm->BTCoexist = (BOOLEAN *)pValue; - - //case ODM_CMNINFO_STA_STATUS: - //pDM_Odm->pODM_StaInfo[] = (PSTA_INFO_T)pValue; - //break; - - //case ODM_CMNINFO_PHY_STATUS: - // pDM_Odm->pPhyInfo = (ODM_PHY_INFO *)pValue; - // break; - - //case ODM_CMNINFO_MAC_STATUS: - // pDM_Odm->pMacInfo = (ODM_MAC_INFO *)pValue; - // break; - //To remove the compiler warning, must add an empty default statement to handle the other values. - default: - //do nothing - break; - - } - -} - - -VOID -ODM_CmnInfoPtrArrayHook( - IN PDM_ODM_T pDM_Odm, - IN ODM_CMNINFO_E CmnInfo, - IN u2Byte Index, - IN PVOID pValue - ) -{ - // - // Hook call by reference pointer. - // - switch (CmnInfo) - { - // - // Dynamic call by reference pointer. - // - case ODM_CMNINFO_STA_STATUS: - pDM_Odm->pODM_StaInfo[Index] = (PSTA_INFO_T)pValue; - break; - //To remove the compiler warning, must add an empty default statement to handle the other values. - default: - //do nothing - break; - } - -} - - -// -// Update Band/CHannel/.. The values are dynamic but non-per-packet. -// -VOID -ODM_CmnInfoUpdate( - IN PDM_ODM_T pDM_Odm, - IN u4Byte CmnInfo, - IN u8Byte Value - ) -{ - // - // This init variable may be changed in run time. - // - switch (CmnInfo) - { - case ODM_CMNINFO_ABILITY: - pDM_Odm->SupportAbility = (u4Byte)Value; - break; - - case ODM_CMNINFO_RF_TYPE: - pDM_Odm->RFType = (u1Byte)Value; - break; - - case ODM_CMNINFO_WIFI_DIRECT: - pDM_Odm->bWIFI_Direct = (BOOLEAN)Value; - break; - - case ODM_CMNINFO_WIFI_DISPLAY: - pDM_Odm->bWIFI_Display = (BOOLEAN)Value; - break; - - case ODM_CMNINFO_LINK: - pDM_Odm->bLinked = (BOOLEAN)Value; - break; - case ODM_CMNINFO_STATION_STATE: - pDM_Odm->bsta_state = (BOOLEAN)Value; - break; - case ODM_CMNINFO_RSSI_MIN: - pDM_Odm->RSSI_Min= (u1Byte)Value; - break; - - case ODM_CMNINFO_DBG_COMP: - pDM_Odm->DebugComponents = Value; - break; - - case ODM_CMNINFO_DBG_LEVEL: - pDM_Odm->DebugLevel = (u4Byte)Value; - break; - case ODM_CMNINFO_RA_THRESHOLD_HIGH: - pDM_Odm->RateAdaptive.HighRSSIThresh = (u1Byte)Value; - break; - - case ODM_CMNINFO_RA_THRESHOLD_LOW: - pDM_Odm->RateAdaptive.LowRSSIThresh = (u1Byte)Value; - break; -#if(BT_30_SUPPORT == 1) - // The following is for BT HS mode and BT coexist mechanism. - case ODM_CMNINFO_BT_DISABLED: - pDM_Odm->bBtDisabled = (BOOLEAN)Value; - break; - - case ODM_CMNINFO_BT_OPERATION: - pDM_Odm->bBtHsOperation = (BOOLEAN)Value; - break; - - case ODM_CMNINFO_BT_DIG: - pDM_Odm->btHsDigVal = (u1Byte)Value; - break; - - case ODM_CMNINFO_BT_BUSY: - pDM_Odm->bBtBusy = (BOOLEAN)Value; - break; - - case ODM_CMNINFO_BT_DISABLE_EDCA: - pDM_Odm->bBtDisableEdcaTurbo = (BOOLEAN)Value; - break; -#endif - - } - - -} - -VOID -odm_CommonInfoSelfInit( - IN PDM_ODM_T pDM_Odm - ) -{ - pDM_Odm->bCckHighPower = (BOOLEAN) ODM_GetBBReg(pDM_Odm, 0x824, BIT9); - pDM_Odm->RFPathRxEnable = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xc04, 0x0F); -#if (DM_ODM_SUPPORT_TYPE != ODM_CE) - pDM_Odm->pbNet_closed = &pDM_Odm->BOOLEAN_temp; -#endif - if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D)) - { -#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) - pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; -#elif (defined(CONFIG_SW_ANTENNA_DIVERSITY)) - pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; -#endif - } - if(pDM_Odm->SupportICType & (ODM_RTL8723A)) - pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; - - ODM_InitDebugSetting(pDM_Odm); -} - -VOID -odm_CommonInfoSelfUpdate( - IN PDM_ODM_T pDM_Odm - ) -{ - u1Byte EntryCnt=0; - u1Byte i; - PSTA_INFO_T pEntry; - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - - pEntry = pDM_Odm->pODM_StaInfo[0]; - if(pMgntInfo->mAssoc) - { - pEntry->bUsed=TRUE; - for (i=0; i<6; i++) - pEntry->MacAddr[i] = pMgntInfo->Bssid[i]; - } - else - { - pEntry->bUsed=FALSE; - for (i=0; i<6; i++) - pEntry->MacAddr[i] = 0; - } -#endif - - - if(*(pDM_Odm->pBandWidth) == ODM_BW40M) - { - if(*(pDM_Odm->pSecChOffset) == 1) - pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) -2; - else if(*(pDM_Odm->pSecChOffset) == 2) - pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) +2; - } - else - pDM_Odm->ControlChannel = *(pDM_Odm->pChannel); - - for (i=0; ipODM_StaInfo[i]; - if(IS_STA_VALID(pEntry)) - EntryCnt++; - } - if(EntryCnt == 1) - pDM_Odm->bOneEntryOnly = TRUE; - else - pDM_Odm->bOneEntryOnly = FALSE; -} - -VOID -odm_CmnInfoInit_Debug( - IN PDM_ODM_T pDM_Odm - ) -{ - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoInit_Debug==>\n")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportPlatform=%d\n",pDM_Odm->SupportPlatform) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportAbility=0x%x\n",pDM_Odm->SupportAbility) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportInterface=%d\n",pDM_Odm->SupportInterface) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportICType=0x%x\n",pDM_Odm->SupportICType) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("CutVersion=%d\n",pDM_Odm->CutVersion) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("FabVersion=%d\n",pDM_Odm->FabVersion) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RFType=%d\n",pDM_Odm->RFType) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("BoardType=%d\n",pDM_Odm->BoardType) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtLNA=%d\n",pDM_Odm->ExtLNA) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtPA=%d\n",pDM_Odm->ExtPA) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtTRSW=%d\n",pDM_Odm->ExtTRSW) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("PatchID=%d\n",pDM_Odm->PatchID) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bInHctTest=%d\n",pDM_Odm->bInHctTest) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFITest=%d\n",pDM_Odm->bWIFITest) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bDualMacSmartConcurrent=%d\n",pDM_Odm->bDualMacSmartConcurrent) ); - -} - -VOID -odm_CmnInfoHook_Debug( - IN PDM_ODM_T pDM_Odm - ) -{ - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoHook_Debug==>\n")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumTxBytesUnicast=%llu\n",*(pDM_Odm->pNumTxBytesUnicast)) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumRxBytesUnicast=%llu\n",*(pDM_Odm->pNumRxBytesUnicast)) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pWirelessMode=0x%x\n",*(pDM_Odm->pWirelessMode)) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecChOffset=%d\n",*(pDM_Odm->pSecChOffset)) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecurity=%d\n",*(pDM_Odm->pSecurity)) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBandWidth=%d\n",*(pDM_Odm->pBandWidth)) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pChannel=%d\n",*(pDM_Odm->pChannel)) ); - -#if (RTL8192D_SUPPORT==1) - if(pDM_Odm->pBandType) - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBandType=%d\n",*(pDM_Odm->pBandType)) ); - if(pDM_Odm->pMacPhyMode) - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pMacPhyMode=%d\n",*(pDM_Odm->pMacPhyMode)) ); - if(pDM_Odm->pBuddyAdapter) - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbGetValueFromOtherMac=%d\n",*(pDM_Odm->pbGetValueFromOtherMac)) ); - if(pDM_Odm->pBuddyAdapter) - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBuddyAdapter=%p\n",*(pDM_Odm->pBuddyAdapter)) ); - if(pDM_Odm->pbMasterOfDMSP) - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbMasterOfDMSP=%d\n",*(pDM_Odm->pbMasterOfDMSP)) ); -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbScanInProcess=%d\n",*(pDM_Odm->pbScanInProcess)) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbPowerSaving=%d\n",*(pDM_Odm->pbPowerSaving)) ); - - if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pOnePathCCA=%d\n",*(pDM_Odm->pOnePathCCA)) ); -} - -VOID -odm_CmnInfoUpdate_Debug( - IN PDM_ODM_T pDM_Odm - ) -{ - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoUpdate_Debug==>\n")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Direct=%d\n",pDM_Odm->bWIFI_Direct) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Display=%d\n",pDM_Odm->bWIFI_Display) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked=%d\n",pDM_Odm->bLinked) ); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min=%d\n",pDM_Odm->RSSI_Min) ); -} - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -VOID -ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm ) -{ -#if USE_WORKITEM - PADAPTER pAdapter = pDM_Odm->Adapter; - - ODM_InitializeWorkItem( pDM_Odm, - &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem, - (RT_WORKITEM_CALL_BACK)odm_SwAntDivChkAntSwitchWorkitemCallback, - (PVOID)pAdapter, - "AntennaSwitchWorkitem" - ); - - ODM_InitializeWorkItem( - pDM_Odm, - &(pDM_Odm->PathDivSwitchWorkitem), - (RT_WORKITEM_CALL_BACK)odm_PathDivChkAntSwitchWorkitemCallback, - (PVOID)pAdapter, - "SWAS_WorkItem"); - - ODM_InitializeWorkItem( - pDM_Odm, - &(pDM_Odm->CCKPathDiversityWorkitem), - (RT_WORKITEM_CALL_BACK)odm_CCKTXPathDiversityWorkItemCallback, - (PVOID)pAdapter, - "CCKTXPathDiversityWorkItem"); -#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) -#if (RTL8188E_SUPPORT == 1) - ODM_InitializeWorkItem( - pDM_Odm, - &(pDM_Odm->FastAntTrainingWorkitem), - (RT_WORKITEM_CALL_BACK)odm_FastAntTrainingWorkItemCallback, - (PVOID)pAdapter, - "FastAntTrainingWorkitem"); -#endif -#endif - ODM_InitializeWorkItem( - pDM_Odm, - &(pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem), - (RT_WORKITEM_CALL_BACK)odm_PSD_RXHPWorkitemCallback, - (PVOID)pAdapter, - "PSDRXHP_WorkItem"); -#endif -} - -VOID -ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm ) -{ -#if USE_WORKITEM - ODM_FreeWorkItem( &(pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem)); - - ODM_FreeWorkItem(&(pDM_Odm->PathDivSwitchWorkitem)); - - ODM_FreeWorkItem(&(pDM_Odm->CCKPathDiversityWorkitem)); - - ODM_FreeWorkItem(&(pDM_Odm->FastAntTrainingWorkitem)); - - ODM_FreeWorkItem((&pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem)); -#endif - -} -#endif - -/* -VOID -odm_FindMinimumRSSI( - IN PDM_ODM_T pDM_Odm - ) -{ - u4Byte i; - u1Byte RSSI_Min = 0xFF; - - for(i=0; ipODM_StaInfo[i] != NULL) - if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) ) - { - if(pDM_Odm->pODM_StaInfo[i]->RSSI_Ave < RSSI_Min) - { - RSSI_Min = pDM_Odm->pODM_StaInfo[i]->RSSI_Ave; - } - } - } - - pDM_Odm->RSSI_Min = RSSI_Min; - -} - -VOID -odm_IsLinked( - IN PDM_ODM_T pDM_Odm - ) -{ - u4Byte i; - BOOLEAN Linked = FALSE; - - for(i=0; ipODM_StaInfo[i]) ) - { - Linked = TRUE; - break; - } - - } - - pDM_Odm->bLinked = Linked; -} -*/ - - -//3============================================================ -//3 DIG -//3============================================================ -/*----------------------------------------------------------------------------- - * Function: odm_DIGInit() - * - * Overview: Set DIG scheme init value. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * - *---------------------------------------------------------------------------*/ -VOID -ODM_ChangeDynamicInitGainThresh( - IN PDM_ODM_T pDM_Odm, - IN u4Byte DM_Type, - IN u4Byte DM_Value - ) -{ - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - - if (DM_Type == DIG_TYPE_THRESH_HIGH) - { - pDM_DigTable->RssiHighThresh = DM_Value; - } - else if (DM_Type == DIG_TYPE_THRESH_LOW) - { - pDM_DigTable->RssiLowThresh = DM_Value; - } - else if (DM_Type == DIG_TYPE_ENABLE) - { - pDM_DigTable->Dig_Enable_Flag = TRUE; - } - else if (DM_Type == DIG_TYPE_DISABLE) - { - pDM_DigTable->Dig_Enable_Flag = FALSE; - } - else if (DM_Type == DIG_TYPE_BACKOFF) - { - if(DM_Value > 30) - DM_Value = 30; - pDM_DigTable->BackoffVal = (u1Byte)DM_Value; - } - else if(DM_Type == DIG_TYPE_RX_GAIN_MIN) - { - if(DM_Value == 0) - DM_Value = 0x1; - pDM_DigTable->rx_gain_range_min = (u1Byte)DM_Value; - } - else if(DM_Type == DIG_TYPE_RX_GAIN_MAX) - { - if(DM_Value > 0x50) - DM_Value = 0x50; - pDM_DigTable->rx_gain_range_max = (u1Byte)DM_Value; - } -} /* DM_ChangeDynamicInitGainThresh */ - -int getIGIForDiff(int value_IGI) -{ - #define ONERCCA_LOW_TH 0x30 - #define ONERCCA_LOW_DIFF 8 - - if (value_IGI < ONERCCA_LOW_TH) { - if ((ONERCCA_LOW_TH - value_IGI) < ONERCCA_LOW_DIFF) - return ONERCCA_LOW_TH; - else - return value_IGI + ONERCCA_LOW_DIFF; - } else { - return value_IGI; - } -} - - -// Add by Neil Chen to enable edcca to MP Platform -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -VOID -odm_EnableEDCCA( - IN PDM_ODM_T pDM_Odm -) -{ - - // This should be moved out of OUTSRC - PADAPTER pAdapter = pDM_Odm->Adapter; - // Enable EDCCA. The value is suggested by SD3 Wilson. - - // - // Revised for ASUS 11b/g performance issues, suggested by BB Neil, 2012.04.13. - // - if((pDM_Odm->SupportICType == ODM_RTL8723A)&&(IS_WIRELESS_MODE_G(pAdapter))) - { - //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold, 0x00); - ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold,0x00); - ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold+2,0xFD); - - } - else - { - //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold, 0x03); - ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold,0x03); - ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold+2,0x00); - } - - //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold+2, 0x00); -} - -VOID -odm_DisableEDCCA( - IN PDM_ODM_T pDM_Odm -) -{ - // Disable EDCCA.. - ODM_Write1Byte(pDM_Odm, rOFDM0_ECCAThreshold, 0x7f); - ODM_Write1Byte(pDM_Odm, rOFDM0_ECCAThreshold+2, 0x7f); -} - -// -// Description: According to initial gain value to determine to enable or disable EDCCA. -// -// Suggested by SD3 Wilson. Added by tynli. 2011.11.25. -// -VOID -odm_DynamicEDCCA( - IN PDM_ODM_T pDM_Odm -) -{ - PADAPTER pAdapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u1Byte RegC50, RegC58; - BOOLEAN bEDCCAenable = FALSE; - - RegC50 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0); - RegC58 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0); - - - if((RegC50 > 0x28 && RegC58 > 0x28) || - ((pDM_Odm->SupportICType == ODM_RTL8723A && IS_WIRELESS_MODE_G(pAdapter) && RegC50>0x26)) || - (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 > 0x28)) - { - if(!pHalData->bPreEdccaEnable) - { - odm_EnableEDCCA(pDM_Odm); - pHalData->bPreEdccaEnable = TRUE; - } - - } - else if((RegC50 < 0x25 && RegC58 < 0x25) || (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 < 0x25)) - { - if(pHalData->bPreEdccaEnable) - { - odm_DisableEDCCA(pDM_Odm); - pHalData->bPreEdccaEnable = FALSE; - } - } -} - - -#endif // end MP platform support - -VOID -ODM_Write_DIG( - IN PDM_ODM_T pDM_Odm, - IN u1Byte CurrentIGI - ) -{ - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_REG(IGI_A,pDM_Odm)=0x%x, ODM_BIT(IGI,pDM_Odm)=0x%x \n", - ODM_REG(IGI_A,pDM_Odm),ODM_BIT(IGI,pDM_Odm))); - - if(pDM_DigTable->CurIGValue != CurrentIGI)//if(pDM_DigTable->PreIGValue != CurrentIGI) - { - if(pDM_Odm->SupportPlatform & (ODM_CE|ODM_MP)) - { - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); - if(pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); - } - else if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) - { - switch(*(pDM_Odm->pOnePathCCA)) - { - case ODM_CCA_2R: - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); - if(pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); - break; - case ODM_CCA_1R_A: - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); - if(pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); - break; - case ODM_CCA_1R_B: - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); - if(pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); - break; - } - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("CurrentIGI(0x%02x). \n",CurrentIGI)); - //pDM_DigTable->PreIGValue = pDM_DigTable->CurIGValue; - pDM_DigTable->CurIGValue = CurrentIGI; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG():CurrentIGI=0x%x \n",CurrentIGI)); - -// Add by Neil Chen to enable edcca to MP Platform -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - // Adjust EDCCA. - if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) - odm_DynamicEDCCA(pDM_Odm); -#endif - - -} - - -//Need LPS mode for CE platform --2012--08--24--- -//8723AS/8189ES -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) - -VOID -odm_DIGbyRSSI_LPS( - IN PDM_ODM_T pDM_Odm - ) -{ - PADAPTER pAdapter =pDM_Odm->Adapter; - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - PFALSE_ALARM_STATISTICS pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; - -#if 0 //and 2.3.5 coding rule - struct mlme_priv *pmlmepriv = &(pAdapter->mlmepriv); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; -#endif - - u1Byte RSSI_Lower=DM_DIG_MIN_NIC; //0x1E or 0x1C - u1Byte bFwCurrentInPSMode = FALSE; - u1Byte CurrentIGI=pDM_Odm->RSSI_Min; - - if(! (pDM_Odm->SupportICType & (ODM_RTL8723A |ODM_RTL8188E))) - return; - - //if((pDM_Odm->SupportInterface==ODM_ITRF_PCIE)||(pDM_Odm->SupportInterface ==ODM_ITRF_USB)) - // return; - - CurrentIGI=CurrentIGI+RSSI_OFFSET_DIG; -#ifdef CONFIG_LPS - bFwCurrentInPSMode = adapter_to_pwrctl(pAdapter)->bFwCurrentInPSMode; -#endif - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("==>pDM_Odm->RSSI_Min=%d ()\n",pDM_Odm->RSSI_Min)); - - // Using FW PS mode to make IGI - if(bFwCurrentInPSMode) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("---Neil---odm_DIG is in LPS mode\n")); - //Adjust by FA in LPS MODE - if(pFalseAlmCnt->Cnt_all> DM_DIG_FA_TH2_LPS) - CurrentIGI = CurrentIGI+2; - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_LPS) - CurrentIGI = CurrentIGI+1; - else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_LPS) - CurrentIGI = CurrentIGI-1; - } - else - { - CurrentIGI = RSSI_Lower; - } - - //Lower bound checking - - //RSSI Lower bound check - if((pDM_Odm->RSSI_Min-10) > DM_DIG_MIN_NIC) - RSSI_Lower =(pDM_Odm->RSSI_Min-10); - else - RSSI_Lower =DM_DIG_MIN_NIC; - - //Upper and Lower Bound checking - if(CurrentIGI > DM_DIG_MAX_NIC) - CurrentIGI=DM_DIG_MAX_NIC; - else if(CurrentIGI < RSSI_Lower) - CurrentIGI =RSSI_Lower; - - ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); - -} -#endif - -VOID -odm_AdaptivityInit( -IN PDM_ODM_T pDM_Odm -) -{ - if(pDM_Odm->SupportICType == ODM_RTL8723B) - { - pDM_Odm->TH_L2H_ini = 0xf8; // -8 - } - if((pDM_Odm->SupportICType == ODM_RTL8192E)&&(pDM_Odm->SupportInterface == ODM_ITRF_PCIE)) - { - pDM_Odm->TH_L2H_ini = 0xf0; // -16 - } - else - { - pDM_Odm->TH_L2H_ini = 0xf9; // -7 - } - - pDM_Odm->TH_EDCCA_HL_diff = 7; - pDM_Odm->IGI_Base = 0x32; - pDM_Odm->IGI_target = 0x1c; - pDM_Odm->ForceEDCCA = 0; - pDM_Odm->AdapEn_RSSI = 20; - - //Reg524[11]=0 is easily to transmit packets during adaptivity test - - //ODM_SetBBReg(pDM_Odm, 0x524, BIT11, 1);// stop counting if EDCCA is asserted -} - - -VOID -odm_Adaptivity( - IN PDM_ODM_T pDM_Odm, - IN u1Byte IGI -) -{ - s1Byte TH_L2H_dmc, TH_H2L_dmc; - s1Byte TH_L2H, TH_H2L, Diff, IGI_target; - u4Byte value32; - BOOLEAN EDCCA_State = 0; - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PADAPTER pAdapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - BOOLEAN bFwCurrentInPSMode=FALSE; - PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); - - pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_FW_PSMODE_STATUS, (pu1Byte)(&bFwCurrentInPSMode)); - - // Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14. - if(bFwCurrentInPSMode) - return; -#endif - - if(!(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Go to odm_DynamicEDCCA() \n")); - // Add by Neil Chen to enable edcca to MP Platform -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - // Adjust EDCCA. - if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) - odm_DynamicEDCCA(pDM_Odm); -#endif - return; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_Adaptivity() =====> \n")); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ForceEDCCA=%d, IGI_Base=0x%x, TH_L2H_ini = %d, TH_EDCCA_HL_diff = %d, AdapEn_RSSI = %d\n", - pDM_Odm->ForceEDCCA, pDM_Odm->IGI_Base, pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff, pDM_Odm->AdapEn_RSSI)); - - if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) - ODM_SetBBReg(pDM_Odm, 0x800, BIT10, 0); //ADC_mask enable - - if((!pDM_Odm->bLinked)||(*pDM_Odm->pChannel > 149)) // Band4 doesn't need adaptivity - { - if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) - { - ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte0, 0x7f); - ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte2, 0x7f); - } - else - ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, 0xFFFF, (0x7f<<8) | 0x7f); - return; - } - -#if (DM_ODM_SUPPORT_TYPE==ODM_MP) - if(pMgntInfo->IOTPeer == HT_IOT_PEER_BROADCOM) - ODM_Write1Byte(pDM_Odm, REG_TRX_SIFS_OFDM, 0x0a); - else - ODM_Write1Byte(pDM_Odm, REG_TRX_SIFS_OFDM, 0x0e); -#endif - if(!pDM_Odm->ForceEDCCA) - { - if(pDM_Odm->RSSI_Min > pDM_Odm->AdapEn_RSSI) - EDCCA_State = 1; - else if(pDM_Odm->RSSI_Min < (pDM_Odm->AdapEn_RSSI - 5)) - EDCCA_State = 0; - } - else - EDCCA_State = 1; - //if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (*pDM_Odm->pBandType == BAND_ON_5G)) - //IGI_target = pDM_Odm->IGI_Base; - //else - { - - if(*pDM_Odm->pBandWidth == ODM_BW20M) //CHANNEL_WIDTH_20 - IGI_target = pDM_Odm->IGI_Base; - else if(*pDM_Odm->pBandWidth == ODM_BW40M) - IGI_target = pDM_Odm->IGI_Base + 2; - else if(*pDM_Odm->pBandWidth == ODM_BW80M) - IGI_target = pDM_Odm->IGI_Base + 6; - else - IGI_target = pDM_Odm->IGI_Base; - } - - pDM_Odm->IGI_target = (u1Byte) IGI_target; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("BandWidth=%s, IGI_target=0x%x, EDCCA_State=%d\n", - (*pDM_Odm->pBandWidth==ODM_BW80M)?"80M":((*pDM_Odm->pBandWidth==ODM_BW40M)?"40M":"20M"), IGI_target, EDCCA_State)); - - if(EDCCA_State == 1) - { - Diff = IGI_target -(s1Byte)IGI; - TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; - if(TH_L2H_dmc > 10) TH_L2H_dmc = 10; - TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; - } - else - { - TH_L2H_dmc = 0x7f; - TH_H2L_dmc = 0x7f; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("IGI=0x%x, TH_L2H_dmc = %d, TH_H2L_dmc = %d\n", - IGI, TH_L2H_dmc, TH_H2L_dmc)); - - if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) - { - ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte0, (u1Byte)TH_L2H_dmc); - ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte2, (u1Byte)TH_H2L_dmc); - } - else - ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, 0xFFFF, ((u1Byte)TH_H2L_dmc<<8) | (u1Byte)TH_L2H_dmc); -} - -#if 1 -VOID -odm_DIGInit( - IN PDM_ODM_T pDM_Odm - ) -{ - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - - //pDM_DigTable->Dig_Enable_Flag = TRUE; - //pDM_DigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; - pDM_DigTable->CurIGValue = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm)); - //pDM_DigTable->PreIGValue = 0x0; - //pDM_DigTable->CurSTAConnectState = pDM_DigTable->PreSTAConnectState = DIG_STA_DISCONNECT; - //pDM_DigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT; - pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; - pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; - pDM_DigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW; - pDM_DigTable->FAHighThresh = DM_FALSEALARM_THRESH_HIGH; - if(pDM_Odm->BoardType & (ODM_BOARD_EXT_PA|ODM_BOARD_EXT_LNA)) - { - pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; - pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; - } - else - { - pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; - pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; - } - pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; - pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; - pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; - pDM_DigTable->PreCCK_CCAThres = 0xFF; - pDM_DigTable->CurCCK_CCAThres = 0x83; - pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC; - pDM_DigTable->LargeFAHit = 0; - pDM_DigTable->Recover_cnt = 0; - pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC; - pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC; - pDM_DigTable->bMediaConnect_0 = FALSE; - pDM_DigTable->bMediaConnect_1 = FALSE; - - //To Initialize pDM_Odm->bDMInitialGainEnable == FALSE to avoid DIG error - pDM_Odm->bDMInitialGainEnable = TRUE; - - //To Initi BT30 IGI - pDM_DigTable->BT30_CurIGI=0x32; - -} - -VOID -odm_DigForBtHsMode( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - pDIG_T pDM_DigTable=&pDM_Odm->DM_DigTable; - u1Byte digForBtHs=0; - u1Byte digUpBound=0x5a; - - if(pDM_Odm->bBtConnectProcess) - { - if(pDM_Odm->SupportICType&(ODM_RTL8723A)) - digForBtHs = 0x28; - else - digForBtHs = 0x22; - } - else - { - // - // Decide DIG value by BT HS RSSI. - // - digForBtHs = pDM_Odm->btHsRssi+4; - - //DIG Bound - if(pDM_Odm->SupportICType&(ODM_RTL8723A)) - digUpBound = 0x3e; - - if(digForBtHs > digUpBound) - digForBtHs = digUpBound; - if(digForBtHs < 0x1c) - digForBtHs = 0x1c; - - // update Current IGI - pDM_DigTable->BT30_CurIGI = digForBtHs; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DigForBtHsMode() : set DigValue=0x%x\n", digForBtHs)); -#endif -} - -VOID -odm_DIG( - IN PDM_ODM_T pDM_Odm - ) -{ - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - PFALSE_ALARM_STATISTICS pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - u1Byte DIG_Dynamic_MIN; - u1Byte DIG_MaxOfMin; - BOOLEAN FirstConnect, FirstDisConnect; - u1Byte dm_dig_max, dm_dig_min, offset; - u1Byte CurrentIGI = pDM_DigTable->CurIGValue; - u1Byte Adap_IGI_Upper = pDM_Odm->IGI_target + 30 + (u1Byte) pDM_Odm->TH_L2H_ini -(u1Byte) pDM_Odm->TH_EDCCA_HL_diff; - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -// This should be moved out of OUTSRC - PADAPTER pAdapter = pDM_Odm->Adapter; -#if OS_WIN_FROM_WIN7(OS_VERSION) - if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Is AP mode or In HCT Test \n")); - return; - } -#endif -/* - if (pDM_Odm->SupportICType==ODM_RTL8723B) - return; -*/ -#if(BT_30_SUPPORT == 1) - if(pDM_Odm->bBtHsOperation) - { - odm_DigForBtHsMode(pDM_Odm); - } -#endif - if(!(pDM_Odm->SupportICType &(ODM_RTL8723A|ODM_RTL8188E))) - { - if(pRX_HP_Table->RXHP_flag == 1) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In RXHP Operation \n")); - return; - } - } -#endif -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV - if((pDM_Odm->bLinked) && (pDM_Odm->Adapter->registrypriv.force_igi !=0)) - { - printk("pDM_Odm->RSSI_Min=%d \n",pDM_Odm->RSSI_Min); - ODM_Write_DIG(pDM_Odm,pDM_Odm->Adapter->registrypriv.force_igi); - return; - } -#endif -#endif -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - prtl8192cd_priv priv = pDM_Odm->priv; - if (!((priv->up_time > 5) && (priv->up_time % 2)) ) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Not In DIG Operation Period \n")); - return; - } -#endif - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()==>\n")); - //if(!(pDM_Odm->SupportAbility & (ODM_BB_DIG|ODM_BB_FA_CNT))) - if((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) ||(!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) - { -#if 0 - if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) - { - if ((pDM_Odm->SupportICType == ODM_RTL8192C) && (pDM_Odm->ExtLNA == 1)) - CurrentIGI = 0x30; //pDM_DigTable->CurIGValue = 0x30; - else - CurrentIGI = 0x20; //pDM_DigTable->CurIGValue = 0x20; - ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); - } -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n")); - return; - } - - if(*(pDM_Odm->pbScanInProcess)) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In Scan Progress \n")); - return; - } - - //add by Neil Chen to avoid PSD is processing - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - if(pDM_Odm->bDMInitialGainEnable == FALSE) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: PSD is Processing \n")); - return; - } - } - - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) - { - if(*(pDM_Odm->pbMasterOfDMSP)) - { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); - } - else - { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; - FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); - } - } - else - { - if(*(pDM_Odm->pBandType) == ODM_BAND_5G) - { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); - } - else - { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; - FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); - } - } - } - else - { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); - } - - //1 Boundary Decision - if(pDM_Odm->SupportICType & (ODM_RTL8192C) &&(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))) - { - if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) - { - - dm_dig_max = DM_DIG_MAX_AP_HP; - dm_dig_min = DM_DIG_MIN_AP_HP; - } - else - { - dm_dig_max = DM_DIG_MAX_NIC_HP; - dm_dig_min = DM_DIG_MIN_NIC_HP; - } - DIG_MaxOfMin = DM_DIG_MAX_AP_HP; - } - else - { - if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) - { -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -#ifdef DFS - if (!priv->pmib->dot11DFSEntry.disable_DFS && - (OPMODE & WIFI_AP_STATE) && - (((pDM_Odm->ControlChannel >= 52) && - (pDM_Odm->ControlChannel <= 64)) || - ((pDM_Odm->ControlChannel >= 100) && - (pDM_Odm->ControlChannel <= 140)))) - dm_dig_max = 0x24; - else -#endif - if (priv->pmib->dot11RFEntry.tx2path) { - if (*(pDM_Odm->pWirelessMode) == ODM_WM_B)//(priv->pmib->dot11BssType.net_work_type == WIRELESS_11B) - dm_dig_max = 0x2A; - else - dm_dig_max = 0x32; - } - else -#endif - dm_dig_max = DM_DIG_MAX_AP; - dm_dig_min = DM_DIG_MIN_AP; - DIG_MaxOfMin = dm_dig_max; - } - else - { - if((pDM_Odm->SupportICType >= ODM_RTL8188E) && (pDM_Odm->SupportPlatform & (ODM_MP|ODM_CE))) - dm_dig_max = 0x5A; - else - dm_dig_max = DM_DIG_MAX_NIC; - - if(pDM_Odm->SupportICType != ODM_RTL8821) - dm_dig_min = DM_DIG_MIN_NIC; - else - dm_dig_min = 0x1C; - - DIG_MaxOfMin = DM_DIG_MAX_AP; - } - } - - - if(pDM_Odm->bLinked) - { - if(pDM_Odm->SupportICType&(ODM_RTL8723A/*|ODM_RTL8821*/)) - { - //2 Upper Bound - if(( pDM_Odm->RSSI_Min + 10) > DM_DIG_MAX_NIC ) - pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; - else if(( pDM_Odm->RSSI_Min + 10) < DM_DIG_MIN_NIC ) - pDM_DigTable->rx_gain_range_max = DM_DIG_MIN_NIC; - else - pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 10; - - //BT is Concurrent - - if(pDM_Odm->bBtLimitedDig) - { - if(pDM_Odm->RSSI_Min>10) - { - if((pDM_Odm->RSSI_Min - 10) > DM_DIG_MAX_NIC) - DIG_Dynamic_MIN = DM_DIG_MAX_NIC; - else if((pDM_Odm->RSSI_Min - 10) < DM_DIG_MIN_NIC) - DIG_Dynamic_MIN = DM_DIG_MIN_NIC; - else - DIG_Dynamic_MIN = pDM_Odm->RSSI_Min - 10; - } - else - DIG_Dynamic_MIN=DM_DIG_MIN_NIC; - } - else - { - if((pDM_Odm->RSSI_Min + 20) > dm_dig_max ) - pDM_DigTable->rx_gain_range_max = dm_dig_max; - else if((pDM_Odm->RSSI_Min + 20) < dm_dig_min ) - pDM_DigTable->rx_gain_range_max = dm_dig_min; - else - pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20; - - } - } - else - { - if((pDM_Odm->SupportICType & (ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8812|ODM_RTL8821)) && (pDM_Odm->bBtLimitedDig==1)){ - //2 Modify DIG upper bound for 92E, 8723B, 8821 & 8812 BT - if((pDM_Odm->RSSI_Min + 10) > dm_dig_max ) - pDM_DigTable->rx_gain_range_max = dm_dig_max; - else if((pDM_Odm->RSSI_Min + 10) < dm_dig_min ) - pDM_DigTable->rx_gain_range_max = dm_dig_min; - else - pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 10; - } - else{ - - //2 Modify DIG upper bound - //2013.03.19 Luke: Modified upper bound for Netgear rental house test - if(pDM_Odm->SupportICType != ODM_RTL8821) - offset = 20; - else - offset = 10; - - if((pDM_Odm->RSSI_Min + offset) > dm_dig_max ) - pDM_DigTable->rx_gain_range_max = dm_dig_max; - else if((pDM_Odm->RSSI_Min + offset) < dm_dig_min ) - pDM_DigTable->rx_gain_range_max = dm_dig_min; - else - pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + offset; - - } - - //2 Modify DIG lower bound - /* - if((pFalseAlmCnt->Cnt_all > 500)&&(DIG_Dynamic_MIN < 0x25)) - DIG_Dynamic_MIN++; - else if(((pFalseAlmCnt->Cnt_all < 500)||(pDM_Odm->RSSI_Min < 8))&&(DIG_Dynamic_MIN > dm_dig_min)) - DIG_Dynamic_MIN--; - */ - - - //1 Lower Bound for 88E AntDiv -#if (RTL8188E_SUPPORT == 1) - if((pDM_Odm->SupportICType == ODM_RTL8188E)&&(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) - { - if((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ||(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)) - { - DIG_Dynamic_MIN = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d \n",pDM_DigTable->AntDiv_RSSI_max)); - } - } - else -#endif - { - if(pDM_Odm->SupportICType != ODM_RTL8723B) - offset = 0; - else - offset = 12; - - if(pDM_Odm->RSSI_Min - offset < dm_dig_min) - DIG_Dynamic_MIN = dm_dig_min; - else if (pDM_Odm->RSSI_Min - offset > DIG_MaxOfMin) - DIG_Dynamic_MIN = DIG_MaxOfMin; - else - DIG_Dynamic_MIN = pDM_Odm->RSSI_Min - offset; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : bOneEntryOnly=TRUE, DIG_Dynamic_MIN=0x%x\n",DIG_Dynamic_MIN)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : pDM_Odm->RSSI_Min=%d\n",pDM_Odm->RSSI_Min)); - } - - - } - } - else - { - pDM_DigTable->rx_gain_range_max = dm_dig_max; - DIG_Dynamic_MIN = dm_dig_min; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : No Link\n")); - } - - //1 Modify DIG lower bound, deal with abnorally large false alarm - if(pFalseAlmCnt->Cnt_all > 10000) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n")); - - if(pDM_DigTable->LargeFAHit != 3) - pDM_DigTable->LargeFAHit++; - if(pDM_DigTable->ForbiddenIGI < CurrentIGI)//if(pDM_DigTable->ForbiddenIGI < pDM_DigTable->CurIGValue) - { - pDM_DigTable->ForbiddenIGI = (u1Byte)CurrentIGI;//pDM_DigTable->ForbiddenIGI = pDM_DigTable->CurIGValue; - pDM_DigTable->LargeFAHit = 1; - } - - if(pDM_DigTable->LargeFAHit >= 3) - { - if((pDM_DigTable->ForbiddenIGI+1) >pDM_DigTable->rx_gain_range_max) - pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; - else - pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); - pDM_DigTable->Recover_cnt = 3600; //3600=2hr - } - - } - else - { - //Recovery mechanism for IGI lower bound - if(pDM_DigTable->Recover_cnt != 0) - pDM_DigTable->Recover_cnt --; - else - { - if(pDM_DigTable->LargeFAHit < 3) - { - if((pDM_DigTable->ForbiddenIGI -1) < DIG_Dynamic_MIN) //DM_DIG_MIN) - { - pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; //DM_DIG_MIN; - pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; //DM_DIG_MIN; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n")); - } - else - { - pDM_DigTable->ForbiddenIGI --; - pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n")); - } - } - else - { - pDM_DigTable->LargeFAHit = 0; - } - } - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): pDM_DigTable->LargeFAHit=%d\n",pDM_DigTable->LargeFAHit)); - - if((pDM_Odm->SupportPlatform&(ODM_MP|ODM_CE))&&(pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 10) && (pDM_Odm->bsta_state)) - pDM_DigTable->rx_gain_range_min = dm_dig_min; - - if(pDM_DigTable->rx_gain_range_min > pDM_DigTable->rx_gain_range_max) - pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; - - //1 Adjust initial gain by false alarm - if(pDM_Odm->bLinked) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG AfterLink\n")); - if(FirstConnect) - { - if(pDM_Odm->RSSI_Min <= DIG_MaxOfMin) - CurrentIGI = pDM_Odm->RSSI_Min; - else - CurrentIGI = DIG_MaxOfMin; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: First Connect\n")); - - //ODM_ConfigBBWithHeaderFile(pDM_Odm, CONFIG_BB_AGC_TAB_DIFF); - } - else - { - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - if(pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2_92D) - CurrentIGI = CurrentIGI + 4;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_92D) - CurrentIGI = CurrentIGI + 2; //pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; - else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_92D) - CurrentIGI = CurrentIGI - 2;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; - } - else - { - //FA for Combo IC--NeilChen--2012--09--28 - if(pDM_Odm->SupportICType == ODM_RTL8723A) - { - //WLAN and BT ConCurrent - if(pDM_Odm->bBtLimitedDig) - { - if(pFalseAlmCnt->Cnt_all > 0x300) - CurrentIGI = CurrentIGI + 4; - else if (pFalseAlmCnt->Cnt_all > 0x250) - CurrentIGI = CurrentIGI + 2; - else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) - CurrentIGI = CurrentIGI -2; - } - else //Not Concurrent - { - if(pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) - CurrentIGI = CurrentIGI + 4;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) - CurrentIGI = CurrentIGI + 2;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; - else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) - CurrentIGI = CurrentIGI - 2;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; - } - } - else - { - if(pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) - CurrentIGI = CurrentIGI + 4;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) - CurrentIGI = CurrentIGI + 2;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; - else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) - CurrentIGI = CurrentIGI - 2;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; - - if((pDM_Odm->SupportPlatform&(ODM_MP|ODM_CE))&&(pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 10) - &&(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH1) && (pDM_Odm->bsta_state)) - { - CurrentIGI = pDM_DigTable->rx_gain_range_min; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Beacon is less than 10 and FA is less than 768, IGI GOES TO 0x1E!!!!!!!!!!!!\n")); - } - } - } - } - } - else - { - //CurrentIGI = pDM_DigTable->rx_gain_range_min;//pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_min - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n")); - if(FirstDisConnect) - { - CurrentIGI = pDM_DigTable->rx_gain_range_min; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First DisConnect \n")); - } - else - { - //2012.03.30 LukeLee: enable DIG before link but with very high thresholds - if(pFalseAlmCnt->Cnt_all > 10000) - CurrentIGI = CurrentIGI + 4; - else if (pFalseAlmCnt->Cnt_all > 8000) - CurrentIGI = CurrentIGI + 2; - else if(pFalseAlmCnt->Cnt_all < 500) - CurrentIGI = CurrentIGI - 2; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): England DIG \n")); - } - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG End Adjust IGI\n")); - //1 Check initial gain by upper/lower bound - - if(CurrentIGI > pDM_DigTable->rx_gain_range_max) - CurrentIGI = pDM_DigTable->rx_gain_range_max; - if(CurrentIGI < pDM_DigTable->rx_gain_range_min) - CurrentIGI = pDM_DigTable->rx_gain_range_min; - - if(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY) - { - if(CurrentIGI > Adap_IGI_Upper) - CurrentIGI = Adap_IGI_Upper; - - if(CurrentIGI > (pDM_Odm->IGI_target + 4)) - CurrentIGI = (u1Byte)pDM_Odm->IGI_target + 4; - } - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): rx_gain_range_max=0x%x, rx_gain_range_min=0x%x\n", - pDM_DigTable->rx_gain_range_max, pDM_DigTable->rx_gain_range_min)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TotalFA=%d\n", pFalseAlmCnt->Cnt_all)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x\n", CurrentIGI)); - - //2 High power RSSI threshold -#if (DM_ODM_SUPPORT_TYPE & ODM_MP) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); - //PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); - // for LC issue to dymanic modify DIG lower bound----------LC Mocca Issue - u8Byte curTxOkCnt=0, curRxOkCnt=0; - static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; - - //u8Byte OKCntAll=0; - //static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; - //u8Byte CurByteCnt=0, PreByteCnt=0; - - curTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; - curRxOkCnt =pAdapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; - lastTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast; - lastRxOkCnt = pAdapter->RxStats.NumRxBytesUnicast; - //----------------------------------------------------------end for LC Mocca issue - if((pDM_Odm->SupportICType == ODM_RTL8723A)&& (pHalData->UndecoratedSmoothedPWDB > DM_DIG_HIGH_PWR_THRESHOLD)) - { - // High power IGI lower bound - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB)); - if(CurrentIGI < DM_DIG_HIGH_PWR_IGI_LOWER_BOUND) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", pDM_DigTable->CurIGValue)); - //pDM_DigTable->CurIGValue = DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; - CurrentIGI=DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; - } - } - if((pDM_Odm->SupportICType & ODM_RTL8723A) && - IS_WIRELESS_MODE_G(pAdapter)) - { - if(pHalData->UndecoratedSmoothedPWDB > 0x28) - { - if(CurrentIGI < DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND) - { - //pDM_DigTable->CurIGValue = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; - CurrentIGI = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; - } - } - } -#if 0 - if((pDM_Odm->SupportICType & ODM_RTL8723A)&&(pMgntInfo->CustomerID = RT_CID_LENOVO_CHINA)) - { - OKCntAll = (curTxOkCnt+curRxOkCnt); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", CurrentIGI)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): OKCntAll(%#x)\n", OKCntAll)); - //8723AS_VAU - if(pDM_Odm->SupportInterface==ODM_ITRF_USB) - { - if(pHalData->UndecoratedSmoothedPWDB < 12) - { - if(CurrentIGI > DM_DIG_MIN_NIC) - { - if(OKCntAll >= 1500000) // >=6Mbps - CurrentIGI=0x1B; - else if(OKCntAll >= 1000000) //4Mbps - CurrentIGI=0x1A; - else if(OKCntAll >= 500000) //2Mbps - CurrentIGI=0x19; - else if(OKCntAll >= 250000) //1Mbps - CurrentIGI=0x18; - else - { - CurrentIGI=0x17; //SCAN mode - } - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("Modify---->CurIGValue(%#x)\n", CurrentIGI)); - } - } - } -#endif -} -#endif - -#if (RTL8192D_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - //sherry delete DualMacSmartConncurrent 20110517 - if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) - { - ODM_Write_DIG_DMSP(pDM_Odm, (u1Byte)CurrentIGI);//ODM_Write_DIG_DMSP(pDM_Odm, pDM_DigTable->CurIGValue); - if(*(pDM_Odm->pbMasterOfDMSP)) - { - pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; - } - else - { - pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; - } - } - else - { - ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); - if(*(pDM_Odm->pBandType) == ODM_BAND_5G) - { - pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; - } - else - { - pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; - } - } - } - else -#endif - { - #if(BT_30_SUPPORT == 1) - if(pDM_Odm->bBtHsOperation) - { - if(pDM_Odm->bLinked) - { - if(pDM_DigTable->BT30_CurIGI > (CurrentIGI)) - { - ODM_Write_DIG(pDM_Odm, CurrentIGI); - - } - else - { - ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI); - } - pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; - } - else - { - if(pDM_Odm->bLinkInProcess) - { - ODM_Write_DIG(pDM_Odm, 0x1c); - } - else if(pDM_Odm->bBtConnectProcess) - { - ODM_Write_DIG(pDM_Odm, 0x28); - } - else - { - ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); - } - } - } - else // BT is not using - #endif - { - ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); - pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; - } - } -} - - -BOOLEAN -odm_DigAbort( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -// This should be moved out of OUTSRC - PADAPTER pAdapter = pDM_Odm->Adapter; - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - -#if OS_WIN_FROM_WIN7(OS_VERSION) - if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Is AP mode or In HCT Test \n")); - return TRUE; - } -#endif - - if(pRX_HP_Table->RXHP_flag == 1) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In RXHP Operation \n")); - return TRUE; - } - - return FALSE; -#else // For Other team any special case for DIG? - return FALSE; -#endif - - -} - - -#else -VOID -odm_DIGInit( - IN PDM_ODM_T pDM_Odm - ) -{ - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - - //pDM_DigTable->Dig_Enable_Flag = TRUE; - //pDM_DigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; - pDM_DigTable->CurIGValue = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm)); - //pDM_DigTable->PreIGValue = 0x0; - //pDM_DigTable->CurSTAConnectState = pDM_DigTable->PreSTAConnectState = DIG_STA_DISCONNECT; - //pDM_DigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT; - pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; - pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; - pDM_DigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW; - pDM_DigTable->FAHighThresh = DM_FALSEALARM_THRESH_HIGH; - if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) - { - pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; - pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; - } - else - { - pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; - pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; - } - pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; - pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; - pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; - pDM_DigTable->PreCCK_CCAThres = 0xFF; - pDM_DigTable->CurCCK_CCAThres = 0x83; - pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC; - pDM_DigTable->LargeFAHit = 0; - pDM_DigTable->Recover_cnt = 0; - pDM_DigTable->DIG_Dynamic_MIN_0 =DM_DIG_MIN_NIC; - pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC; - pDM_DigTable->bMediaConnect_0 = FALSE; - pDM_DigTable->bMediaConnect_1 = FALSE; - - //To Initialize pDM_Odm->bDMInitialGainEnable == FALSE to avoid DIG error - pDM_Odm->bDMInitialGainEnable = TRUE; - -} - - -VOID -odm_DIG( - IN PDM_ODM_T pDM_Odm - ) -{ - - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - PFALSE_ALARM_STATISTICS pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - u1Byte DIG_Dynamic_MIN; - u1Byte DIG_MaxOfMin; - BOOLEAN FirstConnect, FirstDisConnect; - u1Byte dm_dig_max, dm_dig_min; - u1Byte CurrentIGI = pDM_DigTable->CurIGValue; - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -// This should be moved out of OUTSRC - PADAPTER pAdapter = pDM_Odm->Adapter; -#if OS_WIN_FROM_WIN7(OS_VERSION) - if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Is AP mode or In HCT Test \n")); - return; - } -#endif -#if(BT_30_SUPPORT == 1) - if(pDM_Odm->bBtHsOperation) - { - odm_DigForBtHsMode(pDM_Odm); - return; - } -#endif - - if(pRX_HP_Table->RXHP_flag == 1) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In RXHP Operation \n")); - return; - } -#endif //end ODM_MP type - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV - if((pDM_Odm->bLinked) && (pDM_Odm->Adapter->registrypriv.force_igi !=0)) - { - printk("pDM_Odm->RSSI_Min=%d \n",pDM_Odm->RSSI_Min); - ODM_Write_DIG(pDM_Odm,pDM_Odm->Adapter->registrypriv.force_igi); - return; - } -#endif -#endif -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - prtl8192cd_priv priv = pDM_Odm->priv; - if (!((priv->up_time > 5) && (priv->up_time % 2)) ) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Not In DIG Operation Period \n")); - return; - } -#endif - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()==>\n")); - //if(!(pDM_Odm->SupportAbility & (ODM_BB_DIG|ODM_BB_FA_CNT))) - if((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) ||(!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) - { -#if 0 - if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) - { - if ((pDM_Odm->SupportICType == ODM_RTL8192C) && (pDM_Odm->ExtLNA == 1)) - CurrentIGI = 0x30; //pDM_DigTable->CurIGValue = 0x30; - else - CurrentIGI = 0x20; //pDM_DigTable->CurIGValue = 0x20; - ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); - } -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n")); - return; - } - - if(*(pDM_Odm->pbScanInProcess)) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In Scan Progress \n")); - return; - } - - //add by Neil Chen to avoid PSD is processing - if(pDM_Odm->bDMInitialGainEnable == FALSE) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: PSD is Processing \n")); - return; - } - - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) - { - if(*(pDM_Odm->pbMasterOfDMSP)) - { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); - } - else - { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; - FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); - } - } - else - { - if(*(pDM_Odm->pBandType) == ODM_BAND_5G) - { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); - } - else - { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; - FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); - } - } - } - else - { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); - } - - //1 Boundary Decision - if((pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8723A)) && - ((if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))) || pDM_Odm->ExtLNA)) - { - if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) - { - - dm_dig_max = DM_DIG_MAX_AP_HP; - dm_dig_min = DM_DIG_MIN_AP_HP; - } - else - { - dm_dig_max = DM_DIG_MAX_NIC_HP; - dm_dig_min = DM_DIG_MIN_NIC_HP; - } - DIG_MaxOfMin = DM_DIG_MAX_AP_HP; - } - else - { - if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) - { -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -#ifdef DFS - if (!priv->pmib->dot11DFSEntry.disable_DFS && - (OPMODE & WIFI_AP_STATE) && - (((pDM_Odm->ControlChannel >= 52) && - (pDM_Odm->ControlChannel <= 64)) || - ((pDM_Odm->ControlChannel >= 100) && - (pDM_Odm->ControlChannel <= 140)))) - dm_dig_max = 0x24; - else -#endif - if (priv->pmib->dot11RFEntry.tx2path) { - if (*(pDM_Odm->pWirelessMode) == ODM_WM_B)//(priv->pmib->dot11BssType.net_work_type == WIRELESS_11B) - dm_dig_max = 0x2A; - else - dm_dig_max = 0x32; - } - else -#endif - dm_dig_max = DM_DIG_MAX_AP; - dm_dig_min = DM_DIG_MIN_AP; - DIG_MaxOfMin = dm_dig_max; - } - else - { - dm_dig_max = DM_DIG_MAX_NIC; - dm_dig_min = DM_DIG_MIN_NIC; - DIG_MaxOfMin = DM_DIG_MAX_AP; - } - } - - - if(pDM_Odm->bLinked) - { - //2 8723A Series, offset need to be 10 //neil - if(pDM_Odm->SupportICType==(ODM_RTL8723A)) - { - //2 Upper Bound - if(( pDM_Odm->RSSI_Min + 10) > DM_DIG_MAX_NIC ) - pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; - else if(( pDM_Odm->RSSI_Min + 10) < DM_DIG_MIN_NIC ) - pDM_DigTable->rx_gain_range_max = DM_DIG_MIN_NIC; - else - pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 10; - - //2 If BT is Concurrent, need to set Lower Bound - -#if(BT_30_SUPPORT == 1) - if(pDM_Odm->bBtBusy) - { - if(pDM_Odm->RSSI_Min>10) - { - if((pDM_Odm->RSSI_Min - 10) > DM_DIG_MAX_NIC) - DIG_Dynamic_MIN = DM_DIG_MAX_NIC; - else if((pDM_Odm->RSSI_Min - 10) < DM_DIG_MIN_NIC) - DIG_Dynamic_MIN = DM_DIG_MIN_NIC; - else - DIG_Dynamic_MIN = pDM_Odm->RSSI_Min - 10; - } - else - DIG_Dynamic_MIN=DM_DIG_MIN_NIC; - } - else -#endif - { - DIG_Dynamic_MIN=DM_DIG_MIN_NIC; - } - } - else - { - //2 Modify DIG upper bound - if((pDM_Odm->RSSI_Min + 20) > dm_dig_max ) - pDM_DigTable->rx_gain_range_max = dm_dig_max; - else if((pDM_Odm->RSSI_Min + 20) < dm_dig_min ) - pDM_DigTable->rx_gain_range_max = dm_dig_min; - else - pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20; - - - //2 Modify DIG lower bound - /* - if((pFalseAlmCnt->Cnt_all > 500)&&(DIG_Dynamic_MIN < 0x25)) - DIG_Dynamic_MIN++; - else if(((pFalseAlmCnt->Cnt_all < 500)||(pDM_Odm->RSSI_Min < 8))&&(DIG_Dynamic_MIN > dm_dig_min)) - DIG_Dynamic_MIN--; - */ - if(pDM_Odm->bOneEntryOnly) - { - if(pDM_Odm->RSSI_Min < dm_dig_min) - DIG_Dynamic_MIN = dm_dig_min; - else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) - DIG_Dynamic_MIN = DIG_MaxOfMin; - else - DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : bOneEntryOnly=TRUE, DIG_Dynamic_MIN=0x%x\n",DIG_Dynamic_MIN)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : pDM_Odm->RSSI_Min=%d\n",pDM_Odm->RSSI_Min)); - } - //1 Lower Bound for 88E AntDiv -#if (RTL8188E_SUPPORT == 1) - else if((pDM_Odm->SupportICType == ODM_RTL8188E)&&(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) - { - if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) - { - DIG_Dynamic_MIN = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d \n",pDM_DigTable->AntDiv_RSSI_max)); - } - } -#endif - else - { - DIG_Dynamic_MIN=dm_dig_min; - } - } - } - else - { - pDM_DigTable->rx_gain_range_max = dm_dig_max; - DIG_Dynamic_MIN = dm_dig_min; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : No Link\n")); - } - - //1 Modify DIG lower bound, deal with abnormally large false alarm - if(pFalseAlmCnt->Cnt_all > 10000) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n")); - - if(pDM_DigTable->LargeFAHit != 3) - pDM_DigTable->LargeFAHit++; - if(pDM_DigTable->ForbiddenIGI < CurrentIGI)//if(pDM_DigTable->ForbiddenIGI < pDM_DigTable->CurIGValue) - { - pDM_DigTable->ForbiddenIGI = CurrentIGI;//pDM_DigTable->ForbiddenIGI = pDM_DigTable->CurIGValue; - pDM_DigTable->LargeFAHit = 1; - } - - if(pDM_DigTable->LargeFAHit >= 3) - { - if((pDM_DigTable->ForbiddenIGI+1) >pDM_DigTable->rx_gain_range_max) - pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; - else - pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); - pDM_DigTable->Recover_cnt = 3600; //3600=2hr - } - - } - else - { - //Recovery mechanism for IGI lower bound - if(pDM_DigTable->Recover_cnt != 0) - pDM_DigTable->Recover_cnt --; - else - { - if(pDM_DigTable->LargeFAHit < 3) - { - if((pDM_DigTable->ForbiddenIGI -1) < DIG_Dynamic_MIN) //DM_DIG_MIN) - { - pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; //DM_DIG_MIN; - pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; //DM_DIG_MIN; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n")); - } - else - { - pDM_DigTable->ForbiddenIGI --; - pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n")); - } - } - else - { - pDM_DigTable->LargeFAHit = 0; - } - } - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): pDM_DigTable->LargeFAHit=%d\n",pDM_DigTable->LargeFAHit)); - - //1 Adjust initial gain by false alarm - if(pDM_Odm->bLinked) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG AfterLink\n")); - if(FirstConnect) - { - CurrentIGI = pDM_Odm->RSSI_Min; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: First Connect\n")); - } - else - { - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - if(pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2_92D) - CurrentIGI = CurrentIGI + 2;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_92D) - CurrentIGI = CurrentIGI + 1; //pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; - else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_92D) - CurrentIGI = CurrentIGI - 1;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; - } - else - { -#if(BT_30_SUPPORT == 1) - if(pDM_Odm->bBtBusy) - { - if(pFalseAlmCnt->Cnt_all > 0x300) - CurrentIGI = CurrentIGI + 2; - else if (pFalseAlmCnt->Cnt_all > 0x250) - CurrentIGI = CurrentIGI + 1; - else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) - CurrentIGI = CurrentIGI -1; - } - else -#endif - { - if(pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) - CurrentIGI = CurrentIGI + 4;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) - CurrentIGI = CurrentIGI + 2;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; - else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) - CurrentIGI = CurrentIGI - 2;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; - - - } - } - } - } - else - { - //CurrentIGI = pDM_DigTable->rx_gain_range_min;//pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_min - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n")); - if(FirstDisConnect) - { - CurrentIGI = pDM_DigTable->rx_gain_range_min; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First DisConnect \n")); - } - else - { - //2012.03.30 LukeLee: enable DIG before link but with very high thresholds - if(pFalseAlmCnt->Cnt_all > 10000) - CurrentIGI = CurrentIGI + 2;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; - else if (pFalseAlmCnt->Cnt_all > 8000) - CurrentIGI = CurrentIGI + 1;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; - else if(pFalseAlmCnt->Cnt_all < 500) - CurrentIGI = CurrentIGI - 1;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): England DIG \n")); - } - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG End Adjust IGI\n")); - //1 Check initial gain by upper/lower bound -/* - if(pDM_DigTable->CurIGValue > pDM_DigTable->rx_gain_range_max) - pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_max; - if(pDM_DigTable->CurIGValue < pDM_DigTable->rx_gain_range_min) - pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_min; -*/ - if(CurrentIGI > pDM_DigTable->rx_gain_range_max) - CurrentIGI = pDM_DigTable->rx_gain_range_max; - if(CurrentIGI < pDM_DigTable->rx_gain_range_min) - CurrentIGI = pDM_DigTable->rx_gain_range_min; - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): rx_gain_range_max=0x%x, rx_gain_range_min=0x%x\n", - pDM_DigTable->rx_gain_range_max, pDM_DigTable->rx_gain_range_min)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TotalFA=%d\n", pFalseAlmCnt->Cnt_all)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x\n", CurrentIGI)); - - //2 High power RSSI threshold -#if (DM_ODM_SUPPORT_TYPE & ODM_MP) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); - - // for LC issue to dymanic modify DIG lower bound----------LC Mocca Issue - u8Byte curTxOkCnt=0, curRxOkCnt=0; - static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; - - u8Byte OKCntAll=0; - //static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; - //u8Byte CurByteCnt=0, PreByteCnt=0; - - curTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; - curRxOkCnt =pAdapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; - lastTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast; - lastRxOkCnt = pAdapter->RxStats.NumRxBytesUnicast; - //----------------------------------------------------------end for LC Mocca issue - if((pDM_Odm->SupportICType == ODM_RTL8723A)&& (pHalData->UndecoratedSmoothedPWDB > DM_DIG_HIGH_PWR_THRESHOLD)) - { - // High power IGI lower bound - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB)); - if(CurrentIGI < DM_DIG_HIGH_PWR_IGI_LOWER_BOUND) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", pDM_DigTable->CurIGValue)); - //pDM_DigTable->CurIGValue = DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; - CurrentIGI=DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; - } - } - if((pDM_Odm->SupportICType & ODM_RTL8723A) && IS_WIRELESS_MODE_G(pAdapter)) - { - if(pHalData->UndecoratedSmoothedPWDB > 0x28) - { - if(CurrentIGI < DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND) - { - //pDM_DigTable->CurIGValue = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; - CurrentIGI = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; - } - } - } -} -#endif - -#if (RTL8192D_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - //sherry delete DualMacSmartConncurrent 20110517 - if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) - { - ODM_Write_DIG_DMSP(pDM_Odm, CurrentIGI);//ODM_Write_DIG_DMSP(pDM_Odm, pDM_DigTable->CurIGValue); - if(*(pDM_Odm->pbMasterOfDMSP)) - { - pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; - } - else - { - pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; - } - } - else - { - ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); - if(*(pDM_Odm->pBandType) == ODM_BAND_5G) - { - pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; - } - else - { - pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; - } - } - } - else -#endif - { - ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); - pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; - } - -} -#endif -//3============================================================ -//3 FASLE ALARM CHECK -//3============================================================ - -VOID -odm_FalseAlarmCounterStatistics( - IN PDM_ODM_T pDM_Odm - ) -{ - u4Byte ret_value; - PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); - -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - prtl8192cd_priv priv = pDM_Odm->priv; - if( (priv->auto_channel != 0) && (priv->auto_channel != 2) ) - return; -#endif - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - if((pDM_Odm->SupportICType == ODM_RTL8192D) && - (*(pDM_Odm->pMacPhyMode)==ODM_DMSP)&& ////modify by Guo.Mingzhi 2011-12-29 - (!(*(pDM_Odm->pbMasterOfDMSP)))) - { - odm_FalseAlarmCounterStatistics_ForSlaveOfDMSP(pDM_Odm); - return; - } -#endif - - if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) - return; - -// if(pDM_Odm->SupportICType != ODM_RTL8812) - if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) - { - - //hold ofdm counter - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); //hold page C counter - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); //hold page D counter - - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); - FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); - FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); - FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); - FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); - FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); - FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); - FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); - - FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + - FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + - FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; - -#if (RTL8188E_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8188E) - { - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_SC_CNT_11N, bMaskDWord); - FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff); - FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16); - } -#endif - -#if (RTL8192D_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - odm_GetCCKFalseAlarm_92D(pDM_Odm); - } - else -#endif - { - //hold cck counter - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT12, 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT14, 1); - - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); - FalseAlmCnt->Cnt_Cck_fail = ret_value; - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); - FalseAlmCnt->Cnt_Cck_fail += (ret_value& 0xff)<<8; - - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); - FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) |((ret_value&0xFF00)>>8); - } - - FalseAlmCnt->Cnt_all = ( FalseAlmCnt->Cnt_Fast_Fsync + - FalseAlmCnt->Cnt_SB_Search_fail + - FalseAlmCnt->Cnt_Parity_Fail + - FalseAlmCnt->Cnt_Rate_Illegal + - FalseAlmCnt->Cnt_Crc8_fail + - FalseAlmCnt->Cnt_Mcs_fail + - FalseAlmCnt->Cnt_Cck_fail); - - FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; - -#if (RTL8192C_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8192C) - odm_ResetFACounter_92C(pDM_Odm); -#endif - -#if (RTL8192D_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8192D) - odm_ResetFACounter_92D(pDM_Odm); -#endif - - if(pDM_Odm->SupportICType >=ODM_RTL8723A) - { - //reset false alarm counter registers - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 0); - //update ofdm counter - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 0); //update page C counter - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 0); //update page D counter - - //reset CCK CCA counter - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 2); - //reset CCK FA counter - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 2); - } - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Enter odm_FalseAlarmCounterStatistics\n")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n", - FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n", - FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n", - FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); - } - else //FOR ODM_IC_11AC_SERIES - { - //read OFDM FA counter - FalseAlmCnt->Cnt_Ofdm_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_11AC, bMaskLWord); - FalseAlmCnt->Cnt_Cck_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_11AC, bMaskLWord); - FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail + FalseAlmCnt->Cnt_Cck_fail; - - // reset OFDM FA coutner - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 0); - // reset CCK FA counter - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 1); - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm=%d\n", FalseAlmCnt->Cnt_all)); -} - -//3============================================================ -//3 CCK Packet Detect Threshold -//3============================================================ - -VOID -odm_CCKPacketDetectionThresh( - IN PDM_ODM_T pDM_Odm - ) -{ - - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - u1Byte CurCCK_CCAThres; - PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -//modify by Guo.Mingzhi 2011-12-29 - if (pDM_Odm->bDualMacSmartConcurrent == TRUE) -// if (pDM_Odm->bDualMacSmartConcurrent == FALSE) - return; -#if(BT_30_SUPPORT == 1) - if(pDM_Odm->bBtHsOperation) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() write 0xcd for BT HS mode!!\n")); - ODM_Write_CCK_CCA_Thres(pDM_Odm, 0xcd); - return; - } -#endif -#endif - - if(!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD|ODM_BB_FA_CNT))) - return; - - if(pDM_Odm->ExtLNA) - return; - - if(pDM_Odm->bLinked) - { - if(pDM_Odm->RSSI_Min > 25) - CurCCK_CCAThres = 0xcd; - else if((pDM_Odm->RSSI_Min <= 25) && (pDM_Odm->RSSI_Min > 10)) - CurCCK_CCAThres = 0x83; - else - { - if(FalseAlmCnt->Cnt_Cck_fail > 1000) - CurCCK_CCAThres = 0x83; - else - CurCCK_CCAThres = 0x40; - } - } - else - { - if(FalseAlmCnt->Cnt_Cck_fail > 1000) - CurCCK_CCAThres = 0x83; - else - CurCCK_CCAThres = 0x40; - } - -#if (RTL8192D_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8192D) - ODM_Write_CCK_CCA_Thres_92D(pDM_Odm, CurCCK_CCAThres); - else -#endif - ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); -} - -VOID -ODM_Write_CCK_CCA_Thres( - IN PDM_ODM_T pDM_Odm, - IN u1Byte CurCCK_CCAThres - ) -{ - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - - if(pDM_DigTable->CurCCK_CCAThres!=CurCCK_CCAThres) //modify by Guo.Mingzhi 2012-01-03 - { - ODM_Write1Byte(pDM_Odm, ODM_REG(CCK_CCA,pDM_Odm), CurCCK_CCAThres); - } - pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres; - pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; - -} - -//3============================================================ -//3 BB Power Save -//3============================================================ -VOID -odm_DynamicBBPowerSavingInit( - IN PDM_ODM_T pDM_Odm - ) -{ - pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; - - pDM_PSTable->PreCCAState = CCA_MAX; - pDM_PSTable->CurCCAState = CCA_MAX; - pDM_PSTable->PreRFState = RF_MAX; - pDM_PSTable->CurRFState = RF_MAX; - pDM_PSTable->Rssi_val_min = 0; - pDM_PSTable->initialize = 0; -} - - -VOID -odm_DynamicBBPowerSaving( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) - - if ((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8723A)) - return; - if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)) - return; - if(!(pDM_Odm->SupportPlatform & (ODM_MP|ODM_CE))) - return; - - //1 2.Power Saving for 92C - if((pDM_Odm->SupportICType == ODM_RTL8192C) &&(pDM_Odm->RFType == ODM_2T2R)) - { - odm_1R_CCA(pDM_Odm); - } - - // 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable. - // 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns ot 600ns. - //1 3.Power Saving for 88C - else - { - ODM_RF_Saving(pDM_Odm, FALSE); - } -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -} - -VOID -odm_1R_CCA( - IN PDM_ODM_T pDM_Odm - ) -{ - pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; - - if(pDM_Odm->RSSI_Min!= 0xFF) - { - - if(pDM_PSTable->PreCCAState == CCA_2R) - { - if(pDM_Odm->RSSI_Min >= 35) - pDM_PSTable->CurCCAState = CCA_1R; - else - pDM_PSTable->CurCCAState = CCA_2R; - - } - else{ - if(pDM_Odm->RSSI_Min <= 30) - pDM_PSTable->CurCCAState = CCA_2R; - else - pDM_PSTable->CurCCAState = CCA_1R; - } - } - else{ - pDM_PSTable->CurCCAState=CCA_MAX; - } - - if(pDM_PSTable->PreCCAState != pDM_PSTable->CurCCAState) - { - if(pDM_PSTable->CurCCAState == CCA_1R) - { - if( pDM_Odm->RFType ==ODM_2T2R ) - { - ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x13); - //PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20); - } - else - { - ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x23); - //PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100 - } - } - else - { - ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x33); - //PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63); - } - pDM_PSTable->PreCCAState = pDM_PSTable->CurCCAState; - } - //ODM_RT_TRACE(pDM_Odm, COMP_BB_POWERSAVING, DBG_LOUD, ("CCAStage = %s\n",(pDM_PSTable->CurCCAState==0)?"1RCCA":"2RCCA")); -} - -void -ODM_RF_Saving( - IN PDM_ODM_T pDM_Odm, - IN u1Byte bForceInNormal - ) -{ -#if (DM_ODM_SUPPORT_TYPE != ODM_AP) - pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; - u1Byte Rssi_Up_bound = 30 ; - u1Byte Rssi_Low_bound = 25; - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - if(pDM_Odm->PatchID == 40 ) //RT_CID_819x_FUNAI_TV - { - Rssi_Up_bound = 50 ; - Rssi_Low_bound = 45; - } - #endif - if(pDM_PSTable->initialize == 0){ - - pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14; - pDM_PSTable->RegC70 = (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord)&BIT3)>>3; - pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24; - pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12; - //Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); - pDM_PSTable->initialize = 1; - } - - if(!bForceInNormal) - { - if(pDM_Odm->RSSI_Min != 0xFF) - { - if(pDM_PSTable->PreRFState == RF_Normal) - { - if(pDM_Odm->RSSI_Min >= Rssi_Up_bound) - pDM_PSTable->CurRFState = RF_Save; - else - pDM_PSTable->CurRFState = RF_Normal; - } - else{ - if(pDM_Odm->RSSI_Min <= Rssi_Low_bound) - pDM_PSTable->CurRFState = RF_Normal; - else - pDM_PSTable->CurRFState = RF_Save; - } - } - else - pDM_PSTable->CurRFState=RF_MAX; - } - else - { - pDM_PSTable->CurRFState = RF_Normal; - } - - if(pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) - { - if(pDM_PSTable->CurRFState == RF_Save) - { - // 8723 RSSI report will be wrong. Set 0x874[5]=1 when enter BB power saving mode. - // Suggested by SD3 Yu-Nan. 2011.01.20. - if(pDM_Odm->SupportICType == ODM_RTL8723A) - { - ODM_SetBBReg(pDM_Odm, 0x874 , BIT5, 0x1); //Reg874[5]=1b'1 - } - ODM_SetBBReg(pDM_Odm, 0x874 , 0x1C0000, 0x2); //Reg874[20:18]=3'b010 - ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, 0); //RegC70[3]=1'b0 - ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); //Reg85C[31:24]=0x63 - ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); //Reg874[15:14]=2'b10 - ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3 - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); //Reg818[28]=1'b0 - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x1); //Reg818[28]=1'b1 - //ODM_RT_TRACE(pDM_Odm, COMP_BB_POWERSAVING, DBG_LOUD, (" RF_Save")); - } - else - { - ODM_SetBBReg(pDM_Odm, 0x874 , 0x1CC000, pDM_PSTable->Reg874); - ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, pDM_PSTable->RegC70); - ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); - ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74); - ODM_SetBBReg(pDM_Odm,0x818, BIT28, 0x0); - - if(pDM_Odm->SupportICType == ODM_RTL8723A) - { - ODM_SetBBReg(pDM_Odm,0x874 , BIT5, 0x0); //Reg874[5]=1b'0 - } - //ODM_RT_TRACE(pDM_Odm, COMP_BB_POWERSAVING, DBG_LOUD, (" RF_Normal")); - } - pDM_PSTable->PreRFState =pDM_PSTable->CurRFState; - } -#endif -} - - -//3============================================================ -//3 RATR MASK -//3============================================================ -//3============================================================ -//3 Rate Adaptive -//3============================================================ - -VOID -odm_RateAdaptiveMaskInit( - IN PDM_ODM_T pDM_Odm - ) -{ - PODM_RATE_ADAPTIVE pOdmRA = &pDM_Odm->RateAdaptive; - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PMGNT_INFO pMgntInfo = &pDM_Odm->Adapter->MgntInfo; - PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pMgntInfo->RateAdaptive; - - pRA->RATRState = DM_RATR_STA_INIT; - if (pMgntInfo->DM_Type == DM_Type_ByDriver) - pMgntInfo->bUseRAMask = TRUE; - else - pMgntInfo->bUseRAMask = FALSE; - -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - pOdmRA->Type = DM_Type_ByDriver; - if (pOdmRA->Type == DM_Type_ByDriver) - pDM_Odm->bUseRAMask = _TRUE; - else - pDM_Odm->bUseRAMask = _FALSE; - -#endif - - pOdmRA->RATRState = DM_RATR_STA_INIT; - pOdmRA->HighRSSIThresh = 50; - pOdmRA->LowRSSIThresh = 20; -} - -#if (DM_ODM_SUPPORT_TYPE & ODM_MP) -VOID -ODM_RateAdaptiveStateApInit( - IN PADAPTER Adapter , - IN PRT_WLAN_STA pEntry - ) -{ - PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pEntry->RateAdaptive; - pRA->RATRState = DM_RATR_STA_INIT; -} -#endif - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -u4Byte ODM_Get_Rate_Bitmap( - IN PDM_ODM_T pDM_Odm, - IN u4Byte macid, - IN u4Byte ra_mask, - IN u1Byte rssi_level) -{ - PSTA_INFO_T pEntry; - u4Byte rate_bitmap = 0x0fffffff; - u1Byte WirelessMode; - //u1Byte WirelessMode =*(pDM_Odm->pWirelessMode); - - - pEntry = pDM_Odm->pODM_StaInfo[macid]; - if(!IS_STA_VALID(pEntry)) - return ra_mask; - - WirelessMode = pEntry->wireless_mode; - - switch(WirelessMode) - { - case ODM_WM_B: - if(ra_mask & 0x0000000c) //11M or 5.5M enable - rate_bitmap = 0x0000000d; - else - rate_bitmap = 0x0000000f; - break; - - case (ODM_WM_A|ODM_WM_G): - if(rssi_level == DM_RATR_STA_HIGH) - rate_bitmap = 0x00000f00; - else - rate_bitmap = 0x00000ff0; - break; - - case (ODM_WM_B|ODM_WM_G): - if(rssi_level == DM_RATR_STA_HIGH) - rate_bitmap = 0x00000f00; - else if(rssi_level == DM_RATR_STA_MIDDLE) - rate_bitmap = 0x00000ff0; - else - rate_bitmap = 0x00000ff5; - break; - - case (ODM_WM_G|ODM_WM_N24G) : - case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G) : - case (ODM_WM_A|ODM_WM_B|ODM_WM_G|ODM_WM_N24G) : - { - if ( pDM_Odm->RFType == ODM_1T2R ||pDM_Odm->RFType == ODM_1T1R) - { - if(rssi_level == DM_RATR_STA_HIGH) - { - rate_bitmap = 0x000f0000; - } - else if(rssi_level == DM_RATR_STA_MIDDLE) - { - rate_bitmap = 0x000ff000; - } - else{ - if (*(pDM_Odm->pBandWidth) == ODM_BW40M) - rate_bitmap = 0x000ff015; - else - rate_bitmap = 0x000ff005; - } - } - else - { - if(rssi_level == DM_RATR_STA_HIGH) - { - rate_bitmap = 0x0f8f0000; - } - else if(rssi_level == DM_RATR_STA_MIDDLE) - { - rate_bitmap = 0x0f8ff000; - } - else - { - if (*(pDM_Odm->pBandWidth) == ODM_BW40M) - rate_bitmap = 0x0f8ff015; - else - rate_bitmap = 0x0f8ff005; - } - } - } - break; - default: - //case WIRELESS_11_24N: - //case WIRELESS_11_5N: - if(pDM_Odm->RFType == RF_1T2R) - rate_bitmap = 0x000fffff; - else - rate_bitmap = 0x0fffffff; - break; - - } - - //printk("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n",__FUNCTION__,rssi_level,WirelessMode,rate_bitmap); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n",rssi_level,WirelessMode,rate_bitmap)); - - return rate_bitmap; - -} -#endif - -/*----------------------------------------------------------------------------- - * Function: odm_RefreshRateAdaptiveMask() - * - * Overview: Update rate table mask according to rssi - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 05/27/2009 hpfan Create Version 0. - * - *---------------------------------------------------------------------------*/ -VOID -odm_RefreshRateAdaptiveMask( - IN PDM_ODM_T pDM_Odm - ) -{ - if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) - return; - // - // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate - // at the same time. In the stage2/3, we need to prive universal interface and merge all - // HW dynamic mechanism. - // - switch (pDM_Odm->SupportPlatform) - { - case ODM_MP: - odm_RefreshRateAdaptiveMaskMP(pDM_Odm); - break; - - case ODM_CE: - odm_RefreshRateAdaptiveMaskCE(pDM_Odm); - break; - - case ODM_AP: - case ODM_ADSL: - odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm); - break; - } - -} - -VOID -odm_RefreshRateAdaptiveMaskMP( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PADAPTER pAdapter = pDM_Odm->Adapter; - PADAPTER pTargetAdapter = NULL; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter); - //PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pMgntInfo->RateAdaptive; - PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; - - if(pAdapter->bDriverStopped) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); - return; - } - - if(!pMgntInfo->bUseRAMask) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); - return; - } - - // if default port is connected, update RA table for default port (infrastructure mode only) - if(pAdapter->MgntInfo.mAssoc && (!ACTING_AS_AP(pAdapter))) - { - if( ODM_RAStateCheck(pDM_Odm, pHalData->UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pRA->RATRState) ) - { - ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pHalData->UndecoratedSmoothedPWDB, pRA->RATRState)); - pAdapter->HalFunc.UpdateHalRAMaskHandler( - pAdapter, - FALSE, - 0, - NULL, - NULL, - pRA->RATRState, - RAMask_Normal); - } - } - - // - // The following part configure AP/VWifi/IBSS rate adaptive mask. - // - - if(pMgntInfo->mIbss) - { - // Target: AP/IBSS peer. - pTargetAdapter = GetDefaultAdapter(pAdapter); - } - else - { - pTargetAdapter = GetFirstAPAdapter(pAdapter); - } - - // if extension port (softap) is started, updaet RA table for more than one clients associate - if(pTargetAdapter != NULL) - { - int i; - PRT_WLAN_STA pEntry; - PRATE_ADAPTIVE pEntryRA; - - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { -#if 0 //By YJ,120208 - if( pTargetAdapter->MgntInfo.AsocEntry[i].bUsed && pTargetAdapter->MgntInfo.AsocEntry[i].bAssociated) - { - pEntry = pTargetAdapter->MgntInfo.AsocEntry+i; - pEntryRA = &pEntry->RateAdaptive; - if( ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pEntryRA->RATRState) ) - { - ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->MacAddr); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntryRA->RATRState)); - pAdapter->HalFunc.UpdateHalRAMaskHandler( - pTargetAdapter, - FALSE, - pEntry->AID+1, - pEntry->MacAddr, - pEntry, - pEntryRA->RATRState, - RAMask_Normal); - } - } -#else - pEntry = AsocEntry_EnumStation(pTargetAdapter, i); - if(NULL != pEntry) - { - if(pEntry->bAssociated) - { - pEntryRA = &pEntry->RateAdaptive; - if( ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pEntryRA->RATRState) ) - { - ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->MacAddr); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntryRA->RATRState)); - pAdapter->HalFunc.UpdateHalRAMaskHandler( - pTargetAdapter, - FALSE, - pEntry->AID+1, - pEntry->MacAddr, - pEntry, - pEntryRA->RATRState, - RAMask_Normal); - } - } - } -#endif - } - } - - if(pMgntInfo->bSetTXPowerTrainingByOid) - pMgntInfo->bSetTXPowerTrainingByOid = FALSE; -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) -} - - -VOID -odm_RefreshRateAdaptiveMaskCE( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) - u1Byte i; - PADAPTER pAdapter = pDM_Odm->Adapter; - - if(pAdapter->bDriverStopped) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); - return; - } - - if(!pDM_Odm->bUseRAMask) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); - return; - } - - //printk("==> %s \n",__FUNCTION__); - - for(i=0; ipODM_StaInfo[i]; - if(IS_STA_VALID(pstat) ) { - if(IS_MCAST( pstat->hwaddr)) //if(psta->mac_id ==1) - continue; - if( TRUE == ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, FALSE , &pstat->rssi_level) ) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level)); - //printk("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level); - rtw_hal_update_ra_mask(pstat, pstat->rssi_level); - } - - } - } - -#endif -} - -VOID -odm_RefreshRateAdaptiveMaskAPADSL( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - struct rtl8192cd_priv *priv = pDM_Odm->priv; - struct stat_info *pstat; - - if (!priv->pmib->dot11StationConfigEntry.autoRate) - return; - - if (list_empty(&priv->asoc_list)) - return; - - list_for_each_entry(pstat, &priv->asoc_list, asoc_list) { - if(ODM_RAStateCheck(pDM_Odm, (s4Byte)pstat->rssi, FALSE, &pstat->rssi_level) ) { - ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pstat->hwaddr); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi, pstat->rssi_level)); - - if (GET_CHIP_VER(priv)==VERSION_8188E) { -#ifdef TXREPORT - add_RATid(priv, pstat); -#endif - } - } - } -#endif -} - -// Return Value: BOOLEAN -// - TRUE: RATRState is changed. -BOOLEAN -ODM_RAStateCheck( - IN PDM_ODM_T pDM_Odm, - IN s4Byte RSSI, - IN BOOLEAN bForceUpdate, - OUT pu1Byte pRATRState - ) -{ - PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; - const u1Byte GoUpGap = 5; - u1Byte HighRSSIThreshForRA = pRA->HighRSSIThresh; - u1Byte LowRSSIThreshForRA = pRA->LowRSSIThresh; - u1Byte RATRState; - - // Threshold Adjustment: - // when RSSI state trends to go up one or two levels, make sure RSSI is high enough. - // Here GoUpGap is added to solve the boundary's level alternation issue. - switch (*pRATRState) - { - case DM_RATR_STA_INIT: - case DM_RATR_STA_HIGH: - break; - - case DM_RATR_STA_MIDDLE: - HighRSSIThreshForRA += GoUpGap; - break; - - case DM_RATR_STA_LOW: - HighRSSIThreshForRA += GoUpGap; - LowRSSIThreshForRA += GoUpGap; - break; - - default: - ODM_RT_ASSERT(pDM_Odm, FALSE, ("wrong rssi level setting %d !", *pRATRState) ); - break; - } - - // Decide RATRState by RSSI. - if(RSSI > HighRSSIThreshForRA) - RATRState = DM_RATR_STA_HIGH; - else if(RSSI > LowRSSIThreshForRA) - RATRState = DM_RATR_STA_MIDDLE; - else - RATRState = DM_RATR_STA_LOW; - //printk("==>%s,RATRState:0x%02x ,RSSI:%d \n",__FUNCTION__,RATRState,RSSI); - - if( *pRATRState!=RATRState || bForceUpdate) - { - ODM_RT_TRACE( pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI Level %d -> %d\n", *pRATRState, RATRState) ); - *pRATRState = RATRState; - return TRUE; - } - - return FALSE; -} - - -//============================================================ - -//3============================================================ -//3 Dynamic Tx Power -//3============================================================ - -VOID -odm_DynamicTxPowerInit( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - #if DEV_BUS_TYPE==RT_USB_INTERFACE - if(RT_GetInterfaceSelection(Adapter) == INTF_SEL1_USB_High_Power) - { - odm_DynamicTxPowerSavePowerIndex(pDM_Odm); - pMgntInfo->bDynamicTxPowerEnable = TRUE; - } - else - #else - //so 92c pci do not need dynamic tx power? vivi check it later - if(IS_HARDWARE_TYPE_8192D(Adapter)) - pMgntInfo->bDynamicTxPowerEnable = TRUE; - else - pMgntInfo->bDynamicTxPowerEnable = FALSE; - #endif - - - pHalData->LastDTPLvl = TxHighPwrLevel_Normal; - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - pdmpriv->bDynamicTxPowerEnable = _FALSE; - - #if (RTL8192C_SUPPORT==1) - #ifdef CONFIG_USB_HCI - - #ifdef CONFIG_INTEL_PROXIM - if((pHalData->BoardType == BOARD_USB_High_PA)||(Adapter->proximity.proxim_support==_TRUE)) - #else - if(pHalData->BoardType == BOARD_USB_High_PA) - #endif - - { - //odm_SavePowerIndex(Adapter); - odm_DynamicTxPowerSavePowerIndex(pDM_Odm); - pdmpriv->bDynamicTxPowerEnable = _TRUE; - } - else - #else - pdmpriv->bDynamicTxPowerEnable = _FALSE; - #endif - #endif - - pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal; - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - -#endif - -} - -VOID -odm_DynamicTxPowerSavePowerIndex( - IN PDM_ODM_T pDM_Odm - ) -{ - u1Byte index; - u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - for(index = 0; index< 6; index++) - pHalData->PowerIndex_backup[index] = PlatformEFIORead1Byte(Adapter, Power_Index_REG[index]); -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - for(index = 0; index< 6; index++) - pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]); -#endif -} - -VOID -odm_DynamicTxPowerRestorePowerIndex( - IN PDM_ODM_T pDM_Odm - ) -{ - u1Byte index; - PADAPTER Adapter = pDM_Odm->Adapter; - -#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP)) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - for(index = 0; index< 6; index++) - PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], pHalData->PowerIndex_backup[index]); -#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) - struct dm_priv *pdmpriv = &pHalData->dmpriv; - for(index = 0; index< 6; index++) - rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]); -#endif -#endif -} - -VOID -odm_DynamicTxPowerWritePowerIndex( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Value) -{ - - u1Byte index; - u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; - - for(index = 0; index< 6; index++) - //PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], Value); - ODM_Write1Byte(pDM_Odm, Power_Index_REG[index], Value); - -} - - -VOID -odm_DynamicTxPower( - IN PDM_ODM_T pDM_Odm - ) -{ - // - // For AP/ADSL use prtl8192cd_priv - // For CE/NIC use PADAPTER - // - //PADAPTER pAdapter = pDM_Odm->Adapter; -// prtl8192cd_priv priv = pDM_Odm->priv; - - if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) - return; - - // 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. - if (pDM_Odm->ExtPA == FALSE) - return; - - - // - // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate - // at the same time. In the stage2/3, we need to prive universal interface and merge all - // HW dynamic mechanism. - // - switch (pDM_Odm->SupportPlatform) - { - case ODM_MP: - case ODM_CE: - odm_DynamicTxPowerNIC(pDM_Odm); - break; - case ODM_AP: - odm_DynamicTxPowerAP(pDM_Odm); - break; - - case ODM_ADSL: - //odm_DIGAP(pDM_Odm); - break; - } - - -} - - -VOID -odm_DynamicTxPowerNIC( - IN PDM_ODM_T pDM_Odm - ) -{ - if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) - return; - -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) - - if(pDM_Odm->SupportICType == ODM_RTL8192C) - { - odm_DynamicTxPower_92C(pDM_Odm); - } - else if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - odm_DynamicTxPower_92D(pDM_Odm); - } - else if (pDM_Odm->SupportICType & ODM_RTL8188E) - { - // Add Later. - } - else if (pDM_Odm->SupportICType == ODM_RTL8188E) - { - // ??? - // This part need to be redefined. - } -#endif -} - -VOID -odm_DynamicTxPowerAP( - IN PDM_ODM_T pDM_Odm - - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - prtl8192cd_priv priv = pDM_Odm->priv; - s4Byte i; - - if(!priv->pshare->rf_ft_var.tx_pwr_ctrl) - return; - -#ifdef HIGH_POWER_EXT_PA - if(pDM_Odm->ExtPA) - tx_power_control(priv); -#endif - - /* - * Check if station is near by to use lower tx power - */ - - if ((priv->up_time % 3) == 0 ) { - for(i=0; ipODM_StaInfo[i]; - if(IS_STA_VALID(pstat) ) { - if ((pstat->hp_level == 0) && (pstat->rssi > TX_POWER_NEAR_FIELD_THRESH_AP+4)) - pstat->hp_level = 1; - else if ((pstat->hp_level == 1) && (pstat->rssi < TX_POWER_NEAR_FIELD_THRESH_AP)) - pstat->hp_level = 0; - } - } - } - -#endif -} - - -VOID -odm_DynamicTxPower_92C( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - s4Byte UndecoratedSmoothedPWDB; - - - // STA not connected and AP not connected - if((!pMgntInfo->bMediaConnect) && - (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) - { - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - - //the LastDTPlvl should reset when disconnect, - //otherwise the tx power level wouldn't change when disconnect and connect again. - // Maddest 20091220. - pHalData->LastDTPLvl=TxHighPwrLevel_Normal; - return; - } - -#if (INTEL_PROXIMITY_SUPPORT == 1) - // Intel set fixed tx power - if(pMgntInfo->IntelProximityModeInfo.PowerOutput > 0) - { - switch(pMgntInfo->IntelProximityModeInfo.PowerOutput){ - case 1: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); - break; - case 2: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_70; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_70\n")); - break; - case 3: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_50; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_50\n")); - break; - case 4: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_35; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_35\n")); - break; - case 5: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_15; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_15\n")); - break; - default: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); - break; - } - } - else -#endif - { - if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || - (pHalData->DMFlag & HAL_DM_HIPWR_DISABLE) || - pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - } - else - { - if(pMgntInfo->bMediaConnect) // Default port - { - if(ACTING_AS_AP(Adapter) || ACTING_AS_IBSS(Adapter)) - { - UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - else - { - UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - } - else // associated entry pwdb - { - UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - - if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && - (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); - } - else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); - } - } - } - if( pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl ) - { - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192C() Channel = %d \n" , pHalData->CurrentChannel)); - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - if( (pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) && - (pHalData->LastDTPLvl == TxHighPwrLevel_Level1 || pHalData->LastDTPLvl == TxHighPwrLevel_Level2)) //TxHighPwrLevel_Normal - odm_DynamicTxPowerRestorePowerIndex(pDM_Odm); - else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) - odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14); - else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) - odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10); - } - pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; - - -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - - #if (RTL8192C_SUPPORT==1) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - int UndecoratedSmoothedPWDB; - - if(!pdmpriv->bDynamicTxPowerEnable) - return; - -#ifdef CONFIG_INTEL_PROXIM - if(Adapter->proximity.proxim_on== _TRUE){ - struct proximity_priv *prox_priv=Adapter->proximity.proximity_priv; - // Intel set fixed tx power - printk("\n %s Adapter->proximity.proxim_on=%d prox_priv->proxim_modeinfo->power_output=%d \n",__FUNCTION__,Adapter->proximity.proxim_on,prox_priv->proxim_modeinfo->power_output); - if(prox_priv!=NULL){ - if(prox_priv->proxim_modeinfo->power_output> 0) - { - switch(prox_priv->proxim_modeinfo->power_output) - { - case 1: - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_100; - printk("TxHighPwrLevel_100\n"); - break; - case 2: - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_70; - printk("TxHighPwrLevel_70\n"); - break; - case 3: - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_50; - printk("TxHighPwrLevel_50\n"); - break; - case 4: - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_35; - printk("TxHighPwrLevel_35\n"); - break; - case 5: - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_15; - printk("TxHighPwrLevel_15\n"); - break; - default: - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_100; - printk("TxHighPwrLevel_100\n"); - break; - } - } - } - } - else -#endif - { - // STA not connected and AP not connected - if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && - (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) - { - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - - //the LastDTPlvl should reset when disconnect, - //otherwise the tx power level wouldn't change when disconnect and connect again. - // Maddest 20091220. - pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal; - return; - } - - if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port - { - #if 0 - //todo: AP Mode - if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || - (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) - { - UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - else - { - UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - #else - UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - #endif - } - else // associated entry pwdb - { - UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - - if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && - (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); - } - else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); - } - } - if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) ) - { - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) // HP1 -> Normal or HP2 -> Normal - odm_DynamicTxPowerRestorePowerIndex(pDM_Odm); - else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) - odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14); - else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) - odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10); - } - pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; - #endif -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -} - - -VOID -odm_DynamicTxPower_92D( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - s4Byte UndecoratedSmoothedPWDB; - - PADAPTER BuddyAdapter = Adapter->BuddyAdapter; - BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(Adapter); - u1Byte HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1; - - - // If dynamic high power is disabled. - if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || - (pHalData->DMFlag & HAL_DM_HIPWR_DISABLE) || - pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - return; - } - - // STA not connected and AP not connected - if((!pMgntInfo->bMediaConnect) && - (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) - { - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - - //the LastDTPlvl should reset when disconnect, - //otherwise the tx power level wouldn't change when disconnect and connect again. - // Maddest 20091220. - pHalData->LastDTPLvl=TxHighPwrLevel_Normal; - return; - } - - if(pMgntInfo->bMediaConnect) // Default port - { - if(ACTING_AS_AP(Adapter) || pMgntInfo->mIbss) - { - UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - else - { - UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - } - else // associated entry pwdb - { - UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - - if(IS_HARDWARE_TYPE_8192D(Adapter) && GET_HAL_DATA(Adapter)->CurrentBandType92D == 1){ - if(UndecoratedSmoothedPWDB >= 0x33) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB <0x33) && - (UndecoratedSmoothedPWDB >= 0x2b) ) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); - } - else if(UndecoratedSmoothedPWDB < 0x2b) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n")); - } - - } - else - - { - if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && - (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); - } - else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); - } - - } - -//sherry delete flag 20110517 - if(bGetValueFromBuddyAdapter) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n")); - if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() change value \n")); - HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl; - pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP; - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0; - Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = FALSE; - } - } - - if( (pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl) ) - { - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel)); - if(Adapter->DualMacSmartConcurrent == TRUE) - { - if(BuddyAdapter == NULL) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n")); - if(!Adapter->bSlaveOfDMSP) - { - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - } - } - else - { - if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n")); - if(Adapter->bSlaveOfDMSP) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() bslave case \n")); - BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = TRUE; - BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl; - } - else - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() master case \n")); - if(!bGetValueFromBuddyAdapter) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n")); - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - } - } - } - else - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n")); - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - } - } - } - else - { - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - } - - } - pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -#if (RTL8192D_SUPPORT==1) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DM_ODM_T *podmpriv = &pHalData->odmpriv; - int UndecoratedSmoothedPWDB; - #if (RTL8192D_EASY_SMART_CONCURRENT == 1) - PADAPTER BuddyAdapter = Adapter->BuddyAdapter; - BOOLEAN bGetValueFromBuddyAdapter = DualMacGetParameterFromBuddyAdapter(Adapter); - u8 HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1; - #endif - - // If dynamic high power is disabled. - if( (pdmpriv->bDynamicTxPowerEnable != _TRUE) || - (!(podmpriv->SupportAbility& ODM_BB_DYNAMIC_TXPWR)) ) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - return; - } - - // STA not connected and AP not connected - if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && - (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) - { - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - //the LastDTPlvl should reset when disconnect, - //otherwise the tx power level wouldn't change when disconnect and connect again. - // Maddest 20091220. - pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal; - return; - } - - if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port - { - #if 0 - //todo: AP Mode - if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || - (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) - { - UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - else - { - UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - #else - UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - #endif - } - else // associated entry pwdb - { - UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } -#if TX_POWER_FOR_5G_BAND == 1 - if(pHalData->CurrentBandType92D == BAND_ON_5G){ - if(UndecoratedSmoothedPWDB >= 0x33) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB <0x33) && - (UndecoratedSmoothedPWDB >= 0x2b) ) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); - } - else if(UndecoratedSmoothedPWDB < 0x2b) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n")); - } - } - else -#endif - { - if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && - (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); - } - else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); - } - } -#if (RTL8192D_EASY_SMART_CONCURRENT == 1) - if(bGetValueFromBuddyAdapter) - { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n")); - if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP) - { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() change value \n")); - HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl; - pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP; - PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); - pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0; - Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = _FALSE; - } - } -#endif - - if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) ) - { - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel)); -#if (RTL8192D_EASY_SMART_CONCURRENT == 1) - if(BuddyAdapter == NULL) - { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n")); - if(!Adapter->bSlaveOfDMSP) - { - PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); - } - } - else - { - if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) - { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n")); - if(Adapter->bSlaveOfDMSP) - { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() bslave case \n")); - BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = _TRUE; - BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl; - } - else - { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() master case \n")); - if(!bGetValueFromBuddyAdapter) - { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n")); - PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); - } - } - } - else - { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n")); - PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); - } - } -#else - PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); -#endif - } - pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; -#endif -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -} - - -//3============================================================ -//3 RSSI Monitor -//3============================================================ - -VOID -odm_RSSIMonitorInit( - IN PDM_ODM_T pDM_Odm - ) -{ -} - -VOID -odm_RSSIMonitorCheck( - IN PDM_ODM_T pDM_Odm - ) -{ - // - // For AP/ADSL use prtl8192cd_priv - // For CE/NIC use PADAPTER - // - PADAPTER pAdapter = pDM_Odm->Adapter; - prtl8192cd_priv priv = pDM_Odm->priv; - - if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) - return; - - // - // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate - // at the same time. In the stage2/3, we need to prive universal interface and merge all - // HW dynamic mechanism. - // - switch (pDM_Odm->SupportPlatform) - { - case ODM_MP: - odm_RSSIMonitorCheckMP(pDM_Odm); - break; - - case ODM_CE: - odm_RSSIMonitorCheckCE(pDM_Odm); - break; - - case ODM_AP: - odm_RSSIMonitorCheckAP(pDM_Odm); - break; - - case ODM_ADSL: - //odm_DIGAP(pDM_Odm); - break; - } - -} // odm_RSSIMonitorCheck - - -VOID -odm_RSSIMonitorCheckMP( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PRT_WLAN_STA pEntry; - u1Byte i; - s4Byte tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff; - - RTPRINT(FDM, DM_PWDB, ("pHalData->UndecoratedSmoothedPWDB = 0x%x( %d)\n", - pHalData->UndecoratedSmoothedPWDB, - pHalData->UndecoratedSmoothedPWDB)); - - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { - if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - { - pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); - } - else - { - pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); - } - - if(pEntry!=NULL) - { - if(pEntry->bAssociated) - { - RTPRINT_ADDR(FDM, DM_PWDB, ("pEntry->MacAddr ="), pEntry->MacAddr); - RTPRINT(FDM, DM_PWDB, ("pEntry->rssi = 0x%x(%d)\n", - pEntry->rssi_stat.UndecoratedSmoothedPWDB, - pEntry->rssi_stat.UndecoratedSmoothedPWDB)); - if(pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) - tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; - if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) - tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; - } - } - else - { - break; - } - } - - if(tmpEntryMaxPWDB != 0) // If associated entry is found - { - pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; - RTPRINT(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n", - tmpEntryMaxPWDB, tmpEntryMaxPWDB)); - } - else - { - pHalData->EntryMaxUndecoratedSmoothedPWDB = 0; - } - if(tmpEntryMinPWDB != 0xff) // If associated entry is found - { - pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; - RTPRINT(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", - tmpEntryMinPWDB, tmpEntryMinPWDB)); - } - else - { - pHalData->EntryMinUndecoratedSmoothedPWDB = 0; - } - - // Indicate Rx signal strength to FW. - if(Adapter->MgntInfo.bUseRAMask) - { - u1Byte H2C_Parameter[3] ={0}; - // DbgPrint("RxSS: %lx =%ld\n", pHalData->UndecoratedSmoothedPWDB, pHalData->UndecoratedSmoothedPWDB); - H2C_Parameter[2] = (u1Byte)(pHalData->UndecoratedSmoothedPWDB & 0xFF); - H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 - - ODM_FillH2CCmd(Adapter, ODM_H2C_RSSI_REPORT, 3, H2C_Parameter); - } - else - { - PlatformEFIOWrite1Byte(Adapter, 0x4fe, (u1Byte)pHalData->UndecoratedSmoothedPWDB); - //DbgPrint("0x4fe write %x %d\n", pHalData->UndecoratedSmoothedPWDB, pHalData->UndecoratedSmoothedPWDB); - } -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) -} - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -// -//sherry move from DUSC to here 20110517 -// -static VOID -FindMinimumRSSI_Dmsp( - IN PADAPTER pAdapter -) -{ -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - s32 Rssi_val_min_back_for_mac0; - BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(pAdapter); - BOOLEAN bRestoreRssi = _FALSE; - PADAPTER BuddyAdapter = pAdapter->BuddyAdapter; - - if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) - { - if(BuddyAdapter!= NULL) - { - if(pHalData->bSlaveOfDMSP) - { - //ODM_RT_TRACE(pDM_Odm,COMP_EASY_CONCURRENT,DBG_LOUD,("bSlavecase of dmsp\n")); - BuddyAdapter->DualMacDMSPControl.RssiValMinForAnotherMacOfDMSP = pdmpriv->MinUndecoratedPWDBForDM; - } - else - { - if(bGetValueFromBuddyAdapter) - { - //ODM_RT_TRACE(pDM_Odm,COMP_EASY_CONCURRENT,DBG_LOUD,("get new RSSI\n")); - bRestoreRssi = _TRUE; - Rssi_val_min_back_for_mac0 = pdmpriv->MinUndecoratedPWDBForDM; - pdmpriv->MinUndecoratedPWDBForDM = pAdapter->DualMacDMSPControl.RssiValMinForAnotherMacOfDMSP; - } - } - } - - } - - if(bRestoreRssi) - { - bRestoreRssi = _FALSE; - pdmpriv->MinUndecoratedPWDBForDM = Rssi_val_min_back_for_mac0; - } -#endif -} - -static void -FindMinimumRSSI( -IN PADAPTER pAdapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); - - //1 1.Determine the minimum RSSI - - if((pDM_Odm->bLinked != _TRUE) && - (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) - { - pdmpriv->MinUndecoratedPWDBForDM = 0; - //ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any \n")); - } - else - { - pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - } - - //DBG_8192C("%s=>MinUndecoratedPWDBForDM(%d)\n",__FUNCTION__,pdmpriv->MinUndecoratedPWDBForDM); - //ODM_RT_TRACE(pDM_Odm,COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",pHalData->MinUndecoratedPWDBForDM)); -} -#endif - -VOID -odm_RSSIMonitorCheckCE( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - int i; - int tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff; - u8 sta_cnt=0; - u32 PWDB_rssi[NUM_STA]={0};//[0~15]:MACID, [16~31]:PWDB_rssi - - if(pDM_Odm->bLinked != _TRUE) - return; - - //if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) - { - #if 1 - struct sta_info *psta; - - for(i=0; ipODM_StaInfo[i])) - { - if(IS_MCAST( psta->hwaddr)) //if(psta->mac_id ==1) - continue; - - if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) - tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - - if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) - tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - - #if 0 - DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi:%d\n", __func__, - psta->mac_id, MAC_ARG(psta->hwaddr), psta->rssi_stat.UndecoratedSmoothedPWDB); - #endif - - if(psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)) { - #if(RTL8192D_SUPPORT==1) - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) | ((Adapter->stapriv.asoc_sta_count+1) << 8)); - #else - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) ); - #endif - } - } - } - #else - _irqL irqL; - _list *plist, *phead; - struct sta_info *psta; - struct sta_priv *pstapriv = &Adapter->stapriv; - u8 bcast_addr[ETH_ALEN]= {0xff,0xff,0xff,0xff,0xff,0xff}; - - _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); - - for(i=0; i< NUM_STA; i++) - { - phead = &(pstapriv->sta_hash[i]); - plist = get_next(phead); - - while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) - { - psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); - - plist = get_next(plist); - - if(_rtw_memcmp(psta->hwaddr, bcast_addr, ETH_ALEN) || - _rtw_memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) - continue; - - if(psta->state & WIFI_ASOC_STATE) - { - - if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) - tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - - if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) - tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - - if(psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)){ - //printk("%s==> mac_id(%d),rssi(%d)\n",__FUNCTION__,psta->mac_id,psta->rssi_stat.UndecoratedSmoothedPWDB); - #if(RTL8192D_SUPPORT==1) - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) | ((Adapter->stapriv.asoc_sta_count+1) << 8)); - #else - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) ); - #endif - } - } - - } - - } - - _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); - #endif - - //printk("%s==> sta_cnt(%d)\n",__FUNCTION__,sta_cnt); - - for(i=0; i< sta_cnt; i++) - { - if(PWDB_rssi[i] != (0)){ - if(pHalData->fw_ractrl == _TRUE)// Report every sta's RSSI to FW - { - #if(RTL8192D_SUPPORT==1) - FillH2CCmd92D(Adapter, H2C_RSSI_REPORT, 3, (u8 *)(&PWDB_rssi[i])); - #elif((RTL8192C_SUPPORT==1)||(RTL8723A_SUPPORT==1)) - rtl8192c_set_rssi_cmd(Adapter, (u8*)&PWDB_rssi[i]); - #endif - } - else{ - #if((RTL8188E_SUPPORT==1)&&(RATE_ADAPTIVE_SUPPORT == 1)) - ODM_RA_SetRSSI_8188E( - &(pHalData->odmpriv), (PWDB_rssi[i]&0xFF), (u8)((PWDB_rssi[i]>>16) & 0xFF)); - #endif - } - } - } - } - - if(tmpEntryMaxPWDB != 0) // If associated entry is found - { - pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; - } - else - { - pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0; - } - - if(tmpEntryMinPWDB != 0xff) // If associated entry is found - { - pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; - } - else - { - pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0; - } - - FindMinimumRSSI(Adapter);//get pdmpriv->MinUndecoratedPWDBForDM - - #if(RTL8192D_SUPPORT==1) - FindMinimumRSSI_Dmsp(Adapter); - #endif - pDM_Odm->RSSI_Min = pdmpriv->MinUndecoratedPWDBForDM; - //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); -#endif//if (DM_ODM_SUPPORT_TYPE == ODM_CE) -} -VOID -odm_RSSIMonitorCheckAP( - IN PDM_ODM_T pDM_Odm - ) -{ -} - - - -VOID -ODM_InitAllTimers( - IN PDM_ODM_T pDM_Odm - ) -{ - ODM_InitializeTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer, - (RT_TIMER_CALL_BACK)odm_SwAntDivChkAntSwitchCallback, NULL, "SwAntennaSwitchTimer"); - -#if (!(DM_ODM_SUPPORT_TYPE == ODM_CE)) -#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) -#if (RTL8188E_SUPPORT == 1) - ODM_InitializeTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, - (RT_TIMER_CALL_BACK)odm_FastAntTrainingCallback, NULL, "FastAntTrainingTimer"); -#endif -#endif -#endif - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PSDTimer, - (RT_TIMER_CALL_BACK)dm_PSDMonitorCallback, NULL, "PSDTimer"); - // - //Path Diversity - //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. - // - ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer, - (RT_TIMER_CALL_BACK)odm_PathDivChkAntSwitchCallback, NULL, "PathDivTimer"); - - ODM_InitializeTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, - (RT_TIMER_CALL_BACK)odm_CCKTXPathDiversityCallback, NULL, "CCKPathDiversityTimer"); - - ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer, - (RT_TIMER_CALL_BACK)odm_PSD_RXHPCallback, NULL, "PSDRXHPTimer"); -#endif -} - -VOID -ODM_CancelAllTimers( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - // - // 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in - // win7 platform. - // - HAL_ADAPTER_STS_CHK(pDM_Odm) -#endif - - ODM_CancelTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -#if (RTL8188E_SUPPORT == 1) - ODM_CancelTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); -#endif - ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); - // - //Path Diversity - //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. - // - ODM_CancelTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); - - ODM_CancelTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); - - ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); -#endif -} - - -VOID -ODM_ReleaseAllTimers( - IN PDM_ODM_T pDM_Odm - ) -{ - ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); - -#if (RTL8188E_SUPPORT == 1) - ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); -#endif - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PSDTimer); - // - //Path Diversity - //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. - // - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); - - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); - - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); -#endif -} - - - -//#endif -//3============================================================ -//3 Tx Power Tracking -//3============================================================ - -VOID -odm_TXPowerTrackingInit( - IN PDM_ODM_T pDM_Odm - ) -{ - odm_TXPowerTrackingThermalMeterInit(pDM_Odm); -} - - -VOID -odm_TXPowerTrackingThermalMeterInit( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - pMgntInfo->bTXPowerTracking = TRUE; - pHalData->TXPowercount = 0; - pHalData->bTXPowerTrackingInit = FALSE; - #if MP_DRIVER != 1 //for mp driver, turn off txpwrtracking as default - pHalData->TxPowerTrackControl = TRUE; - #endif//#if (MP_DRIVER != 1) - ODM_RT_TRACE(pDM_Odm,COMP_POWER_TRACKING, DBG_LOUD, ("pMgntInfo->bTXPowerTracking = %d\n", pMgntInfo->bTXPowerTracking)); -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - { - pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; - pDM_Odm->RFCalibrateInfo.TXPowercount = 0; - pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; - //#if (MP_DRIVER != 1) //for mp driver, turn off txpwrtracking as default - if ( *(pDM_Odm->mp_mode) != 1) - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; - //#endif//#if (MP_DRIVER != 1) - MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl); - } -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - #ifdef RTL8188E_SUPPORT - { - pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; - pDM_Odm->RFCalibrateInfo.TXPowercount = 0; - pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; - } - #endif -#endif - - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = TRUE; - pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = 0; - pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = 0; - pDM_Odm->RFCalibrateInfo.PowerIndexOffset = 0; - pDM_Odm->RFCalibrateInfo.ThermalValue = 0; - pDM_Odm->DefaultOfdmIndex = 12; - pDM_Odm->DefaultCckIndex = 12; - pDM_Odm->BbSwingIdxOfdmBase = pDM_Odm->DefaultOfdmIndex; - pDM_Odm->BbSwingIdxCckBase = pDM_Odm->DefaultCckIndex; - pDM_Odm->BbSwingIdxOfdm = pDM_Odm->DefaultOfdmIndex; - pDM_Odm->BbSwingIdxCck = pDM_Odm->DefaultCckIndex; - - pDM_Odm->RFCalibrateInfo.CCK_index = pDM_Odm->DefaultCckIndex; - pDM_Odm->RFCalibrateInfo.OFDM_index[RF_PATH_A] = pDM_Odm->DefaultOfdmIndex; - pDM_Odm->RFCalibrateInfo.OFDM_index[RF_PATH_B] = pDM_Odm->DefaultOfdmIndex; - -} - - -VOID -ODM_TXPowerTrackingCheck( - IN PDM_ODM_T pDM_Odm - ) -{ - // - // For AP/ADSL use prtl8192cd_priv - // For CE/NIC use PADAPTER - // - PADAPTER pAdapter = pDM_Odm->Adapter; - prtl8192cd_priv priv = pDM_Odm->priv; - - //if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) - //return; - - // - // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate - // at the same time. In the stage2/3, we need to prive universal interface and merge all - // HW dynamic mechanism. - // - switch (pDM_Odm->SupportPlatform) - { - case ODM_MP: - odm_TXPowerTrackingCheckMP(pDM_Odm); - break; - - case ODM_CE: - odm_TXPowerTrackingCheckCE(pDM_Odm); - break; - - case ODM_AP: - odm_TXPowerTrackingCheckAP(pDM_Odm); - break; - - case ODM_ADSL: - //odm_DIGAP(pDM_Odm); - break; - } - -} - -VOID -odm_TXPowerTrackingCheckCE( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - #if( (RTL8192C_SUPPORT==1) || (RTL8723A_SUPPORT==1) ) - rtl8192c_odm_CheckTXPowerTracking(Adapter); - #endif - - #if (RTL8192D_SUPPORT==1) - #if (RTL8192D_EASY_SMART_CONCURRENT == 1) - if(!Adapter->bSlaveOfDMSP) - #endif - rtl8192d_odm_CheckTXPowerTracking(Adapter); - #endif - #if(RTL8188E_SUPPORT==1) - - //if(!pMgntInfo->bTXPowerTracking /*|| (!pdmpriv->TxPowerTrackControl && pdmpriv->bAPKdone)*/) - if(!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) - { - return; - } - - if(!pDM_Odm->RFCalibrateInfo.TM_Trigger) //at least delay 1 sec - { - //pHalData->TxPowerCheckCnt++; //cosa add for debug - //ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); - PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); - //DBG_8192C("Trigger 92C Thermal Meter!!\n"); - - pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; - return; - - } - else - { - //DBG_8192C("Schedule TxPowerTracking direct call!!\n"); - odm_TXPowerTrackingCallback_ThermalMeter_8188E(Adapter); - pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; - } - #endif - -#endif -} - -VOID -odm_TXPowerTrackingCheckMP( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - - if (ODM_CheckPowerStatus(Adapter) == FALSE) - return; - - if(IS_HARDWARE_TYPE_8723A(Adapter)) - return; - - if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE) - odm_TXPowerTrackingThermalMeterCheck(Adapter); -#endif - -} - - -VOID -odm_TXPowerTrackingCheckAP( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - prtl8192cd_priv priv = pDM_Odm->priv; - - } -#endif - -} - - - -//antenna mapping info -// 1: right-side antenna -// 2/0: left-side antenna -//PDM_SWAT_Table->CCK_Ant1_Cnt /OFDM_Ant1_Cnt: for right-side antenna: Ant:1 RxDefaultAnt1 -//PDM_SWAT_Table->CCK_Ant2_Cnt /OFDM_Ant2_Cnt: for left-side antenna: Ant:0 RxDefaultAnt2 -// We select left antenna as default antenna in initial process, modify it as needed -// - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -VOID -odm_TXPowerTrackingThermalMeterCheck( - IN PADAPTER Adapter - ) -{ -#ifndef AP_BUILD_WORKAROUND -#if (HAL_CODE_BASE==RTL8192_C) - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - static u1Byte TM_Trigger = 0; - //u1Byte TxPowerCheckCnt = 5; //10 sec - - if(!pMgntInfo->bTXPowerTracking /*|| (!pHalData->TxPowerTrackControl && pHalData->bAPKdone)*/) - { - return; - } - - if(!TM_Trigger) //at least delay 1 sec - { - if(IS_HARDWARE_TYPE_8192D(Adapter)) - PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_92D, BIT17 | BIT16, 0x03); - else if(IS_HARDWARE_TYPE_8188E(Adapter)) - PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); - else - PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); - RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger 92C Thermal Meter!!\n")); - - TM_Trigger = 1; - return; - } - else - { - RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n")); - odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. - TM_Trigger = 0; - } -#endif -#endif -} - -#endif - - - -//3============================================================ -//3 SW Antenna Diversity -//3============================================================ -#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) -VOID -odm_SwAntDivInit( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) - odm_SwAntDivInit_NIC(pDM_Odm); -#elif(DM_ODM_SUPPORT_TYPE == ODM_AP) - dm_SW_AntennaSwitchInit(pDM_Odm->priv); -#endif -} -#if (RTL8723A_SUPPORT==1) -// Only for 8723A SW ANT DIV INIT--2012--07--17 -VOID -odm_SwAntDivInit_NIC_8723A( - IN PDM_ODM_T pDM_Odm) -{ - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - PADAPTER Adapter = pDM_Odm->Adapter; - u1Byte btAntNum=BT_GetPGAntNum(Adapter); - - - if(IS_HARDWARE_TYPE_8723A(Adapter)) - { - pDM_SWAT_Table->ANTA_ON =TRUE; - - // Set default antenna B status by PG - if(btAntNum == Ant_x2) - pDM_SWAT_Table->ANTB_ON = TRUE; - else if(btAntNum ==Ant_x1) - pDM_SWAT_Table->ANTB_ON = FALSE; - else - pDM_SWAT_Table->ANTB_ON = TRUE; - } - -} -#endif -VOID -odm_SwAntDivInit_NIC( - IN PDM_ODM_T pDM_Odm - ) -{ - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -// Init SW ANT DIV mechanism for 8723AE/AU/AS// Neil Chen--2012--07--17--- -// CE/AP/ADSL no using SW ANT DIV for 8723A Series IC -//#if (DM_ODM_SUPPORT_TYPE==ODM_MP) -#if (RTL8723A_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8723A) - { - odm_SwAntDivInit_NIC_8723A(pDM_Odm); - } -#endif - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS:Init SW Antenna Switch\n")); - pDM_SWAT_Table->RSSI_sum_A = 0; - pDM_SWAT_Table->RSSI_cnt_A = 0; - pDM_SWAT_Table->RSSI_sum_B = 0; - pDM_SWAT_Table->RSSI_cnt_B = 0; - pDM_SWAT_Table->CurAntenna = Antenna_A; - pDM_SWAT_Table->PreAntenna = Antenna_A; - pDM_SWAT_Table->try_flag = 0xff; - pDM_SWAT_Table->PreRSSI = 0; - pDM_SWAT_Table->SWAS_NoLink_State = 0; - pDM_SWAT_Table->bTriggerAntennaSwitch = 0; - pDM_SWAT_Table->SelectAntennaMap=0xAA; - pDM_SWAT_Table->lastTxOkCnt = 0; - pDM_SWAT_Table->lastRxOkCnt = 0; - pDM_SWAT_Table->TXByteCnt_A = 0; - pDM_SWAT_Table->TXByteCnt_B = 0; - pDM_SWAT_Table->RXByteCnt_A = 0; - pDM_SWAT_Table->RXByteCnt_B = 0; - pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; - pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ODM_Read4Byte(pDM_Odm, 0x860); -} - -// -// 20100514 Joseph: -// Add new function to reset the state of antenna diversity before link. -// -VOID -ODM_SwAntDivResetBeforeLink( - IN PDM_ODM_T pDM_Odm - ) -{ - - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - pDM_SWAT_Table->SWAS_NoLink_State = 0; - -} - -// -// 20100514 Luke/Joseph: -// Add new function to reset antenna diversity state after link. -// -VOID -ODM_SwAntDivRestAfterLink( - IN PDM_ODM_T pDM_Odm - ) -{ - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - pDM_SWAT_Table->RSSI_cnt_A = 0; - pDM_SWAT_Table->RSSI_cnt_B = 0; - pDM_Odm->RSSI_test = FALSE; - pDM_SWAT_Table->try_flag = 0xff; - pDM_SWAT_Table->RSSI_Trying = 0; - pDM_SWAT_Table->SelectAntennaMap=0xAA; -} - -VOID -ODM_SwAntDivChkPerPktRssi( - IN PDM_ODM_T pDM_Odm, - IN u1Byte StationID, - IN PODM_PHY_INFO_T pPhyInfo - ) -{ - SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - if(!(pDM_Odm->SupportAbility & (ODM_BB_ANT_DIV))) - return; - - if(StationID == pDM_SWAT_Table->RSSI_target) - { - //1 RSSI for SW Antenna Switch - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - { - pDM_SWAT_Table->RSSI_sum_A += pPhyInfo->RxPWDBAll; - pDM_SWAT_Table->RSSI_cnt_A++; - } - else - { - pDM_SWAT_Table->RSSI_sum_B += pPhyInfo->RxPWDBAll; - pDM_SWAT_Table->RSSI_cnt_B++; - - } - } - -} - -// -VOID -odm_SwAntDivChkAntSwitch( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Step - ) -{ - // - // For AP/ADSL use prtl8192cd_priv - // For CE/NIC use PADAPTER - // - PADAPTER pAdapter = pDM_Odm->Adapter; - prtl8192cd_priv priv = pDM_Odm->priv; - - // - // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate - // at the same time. In the stage2/3, we need to prive universal interface and merge all - // HW dynamic mechanism. - // - switch (pDM_Odm->SupportPlatform) - { - case ODM_MP: - case ODM_CE: - odm_SwAntDivChkAntSwitchNIC(pDM_Odm, Step); - break; - - case ODM_AP: - case ODM_ADSL: -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP |ODM_ADSL)) - if (priv->pshare->rf_ft_var.antSw_enable && (priv->up_time % 4==1)) - dm_SW_AntennaSwitch(priv, SWAW_STEP_PEAK); -#endif - break; - } - -} - -// -// 20100514 Luke/Joseph: -// Add new function for antenna diversity after link. -// This is the main function of antenna diversity after link. -// This function is called in HalDmWatchDog() and ODM_SwAntDivChkAntSwitchCallback(). -// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. -// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. -// After 500ms, ODM_SwAntDivChkAntSwitchCallback() calls this function to compare the signal just -// listened on the air with the RSSI of original antenna. -// It chooses the antenna with better RSSI. -// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting -// penalty to get next try. - - -VOID -ODM_SetAntenna( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Antenna) -{ - ODM_SetBBReg(pDM_Odm, 0x860, BIT8|BIT9, Antenna); -} -//--------------------------------2012--09--06-- -//Note: Antenna_Main--> Antenna_A -// Antenna_Aux---> Antenna_B -//---------------------------------- -VOID -odm_SwAntDivChkAntSwitchNIC( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Step - ) -{ -#if ((RTL8192C_SUPPORT==1)||(RTL8723A_SUPPORT==1)) - //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - s4Byte curRSSI=100, RSSI_A, RSSI_B; - u1Byte nextAntenna=Antenna_B; - //static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; - u8Byte curTxOkCnt, curRxOkCnt; - //static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; - u8Byte CurByteCnt=0, PreByteCnt=0; - //static u1Byte TrafficLoad = TRAFFIC_LOW; - u1Byte Score_A=0, Score_B=0; - u1Byte i; - - if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) - return; - - if (pDM_Odm->SupportICType & (ODM_RTL8192D|ODM_RTL8188E)) - return; - - if((pDM_Odm->SupportICType == ODM_RTL8192C) &&(pDM_Odm->RFType == ODM_2T2R)) - return; - - if(pDM_Odm->SupportPlatform & ODM_MP) - { - if(*(pDM_Odm->pAntennaTest)) - return; - } - - if((pDM_SWAT_Table->ANTA_ON == FALSE) ||(pDM_SWAT_Table->ANTB_ON == FALSE)) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("odm_SwAntDivChkAntSwitch(): No AntDiv Mechanism, Antenna A or B is off\n")); - return; - } - - // Radio off: Status reset to default and return. - if(*(pDM_Odm->pbPowerSaving)==TRUE) //pHalData->eRFPowerState==eRfOff - { - ODM_SwAntDivRestAfterLink(pDM_Odm); - return; - } - - - // Handling step mismatch condition. - // Peak step is not finished at last time. Recover the variable and check again. - if( Step != pDM_SWAT_Table->try_flag ) - { - ODM_SwAntDivRestAfterLink(pDM_Odm); - } - -#if (DM_ODM_SUPPORT_TYPE &( ODM_MP| ODM_CE )) - - if(pDM_SWAT_Table->try_flag == 0xff) - { - pDM_SWAT_Table->RSSI_target = 0xff; - - #if(DM_ODM_SUPPORT_TYPE & ODM_CE) - { - u1Byte index = 0; - PSTA_INFO_T pEntry = NULL; - - - for(index=0; indexpODM_StaInfo[index]; - if(IS_STA_VALID(pEntry) ) { - break; - } - } - if(pEntry == NULL) - { - ODM_SwAntDivRestAfterLink(pDM_Odm); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); - return; - } - else - { - pDM_SWAT_Table->RSSI_target = index; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); - } - } - #elif (DM_ODM_SUPPORT_TYPE & ODM_MP) - { - PADAPTER pAdapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo=&pAdapter->MgntInfo; - - // Select RSSI checking target - if(pMgntInfo->mAssoc && !ACTING_AS_AP(pAdapter)) - { - // Target: Infrastructure mode AP. - //pDM_SWAT_Table->RSSI_target = NULL; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("odm_SwAntDivChkAntSwitch(): RSSI_target is DEF AP!\n")); - } - else - { - u1Byte index = 0; - PSTA_INFO_T pEntry = NULL; - PADAPTER pTargetAdapter = NULL; - - if(pMgntInfo->mIbss ) - { - // Target: AP/IBSS peer. - pTargetAdapter = pAdapter; - } - else - { - pTargetAdapter = GetFirstAPAdapter(pAdapter); - } - - if(pTargetAdapter != NULL) - { - for(index=0; indexbAssociated) - break; - } - - } - - } - - if(pEntry == NULL) - { - ODM_SwAntDivRestAfterLink(pDM_Odm); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); - return; - } - else - { - //pDM_SWAT_Table->RSSI_target = pEntry; - pDM_SWAT_Table->RSSI_target = index; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); - } - }//end if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) - - } - #endif - - pDM_SWAT_Table->RSSI_cnt_A = 0; - pDM_SWAT_Table->RSSI_cnt_B = 0; - pDM_SWAT_Table->try_flag = 0; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("odm_SwAntDivChkAntSwitch(): Set try_flag to 0 prepare for peak!\n")); - return; - } - else - { -#if (DM_ODM_SUPPORT_TYPE &( ODM_MP)) - //PADAPTER Adapter = pDM_Odm->Adapter; - curTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast - pDM_SWAT_Table->lastTxOkCnt; - curRxOkCnt =pAdapter->RxStats.NumRxBytesUnicast - pDM_SWAT_Table->lastRxOkCnt; - pDM_SWAT_Table->lastTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast; - pDM_SWAT_Table->lastRxOkCnt = pAdapter->RxStats.NumRxBytesUnicast; -#else - curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - pDM_SWAT_Table->lastTxOkCnt; - curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - pDM_SWAT_Table->lastRxOkCnt; - pDM_SWAT_Table->lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); - pDM_SWAT_Table->lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); -#endif - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("curTxOkCnt = %lld\n",curTxOkCnt)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("curRxOkCnt = %lld\n",curRxOkCnt)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("lastTxOkCnt = %lld\n",pDM_SWAT_Table->lastTxOkCnt)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("lastRxOkCnt = %lld\n",pDM_SWAT_Table->lastRxOkCnt)); - - if(pDM_SWAT_Table->try_flag == 1) - { - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - { - pDM_SWAT_Table->TXByteCnt_A += curTxOkCnt; - pDM_SWAT_Table->RXByteCnt_A += curRxOkCnt; - } - else - { - pDM_SWAT_Table->TXByteCnt_B += curTxOkCnt; - pDM_SWAT_Table->RXByteCnt_B += curRxOkCnt; - } - - nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; - pDM_SWAT_Table->RSSI_Trying--; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying)); - if(pDM_SWAT_Table->RSSI_Trying == 0) - { - CurByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pDM_SWAT_Table->TXByteCnt_A+pDM_SWAT_Table->RXByteCnt_A) : (pDM_SWAT_Table->TXByteCnt_B+pDM_SWAT_Table->RXByteCnt_B); - PreByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pDM_SWAT_Table->TXByteCnt_B+pDM_SWAT_Table->RXByteCnt_B) : (pDM_SWAT_Table->TXByteCnt_A+pDM_SWAT_Table->RXByteCnt_A); - - if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) - //CurByteCnt = PlatformDivision64(CurByteCnt, 9); - PreByteCnt = PreByteCnt*9; - else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) - //CurByteCnt = PlatformDivision64(CurByteCnt, 2); - PreByteCnt = PreByteCnt*2; - - if(pDM_SWAT_Table->RSSI_cnt_A > 0) - RSSI_A = pDM_SWAT_Table->RSSI_sum_A/pDM_SWAT_Table->RSSI_cnt_A; - else - RSSI_A = 0; - if(pDM_SWAT_Table->RSSI_cnt_B > 0) - RSSI_B = pDM_SWAT_Table->RSSI_sum_B/pDM_SWAT_Table->RSSI_cnt_B; - else - RSSI_B = 0; - curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; - pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_B : RSSI_A; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Luke:PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: preAntenna= %s, curAntenna= %s \n", - (pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Luke:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", - RSSI_A, pDM_SWAT_Table->RSSI_cnt_A, RSSI_B, pDM_SWAT_Table->RSSI_cnt_B)); - } - - } - else - { - - if(pDM_SWAT_Table->RSSI_cnt_A > 0) - RSSI_A = pDM_SWAT_Table->RSSI_sum_A/pDM_SWAT_Table->RSSI_cnt_A; - else - RSSI_A = 0; - if(pDM_SWAT_Table->RSSI_cnt_B > 0) - RSSI_B = pDM_SWAT_Table->RSSI_sum_B/pDM_SWAT_Table->RSSI_cnt_B; - else - RSSI_B = 0; - curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; - pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == Antenna_A)? RSSI_A : RSSI_B; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ekul:PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: preAntenna= %s, curAntenna= %s \n", - (pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"))); - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ekul:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", - RSSI_A, pDM_SWAT_Table->RSSI_cnt_A, RSSI_B, pDM_SWAT_Table->RSSI_cnt_B)); - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); - } - - //1 Trying State - if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) - { - - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: TestMode = TP_MODE")); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TRY:CurByteCnt = %lld,", CurByteCnt)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TRY:PreByteCnt = %lld\n",PreByteCnt)); - if(CurByteCnt < PreByteCnt) - { - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; - else - pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; - } - else - { - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; - else - pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; - } - for (i= 0; i<8; i++) - { - if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) - Score_A++; - else - Score_B++; - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Score_A=%d, Score_B=%d\n", Score_A, Score_B)); - - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - { - nextAntenna = (Score_A > Score_B)?Antenna_A:Antenna_B; - } - else - { - nextAntenna = (Score_B > Score_A)?Antenna_B:Antenna_A; - } - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("nextAntenna=%s\n",(nextAntenna==Antenna_A)?"A":"B")); - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("preAntenna= %s, curAntenna= %s \n", - //(DM_SWAT_Table.PreAntenna == Antenna_A?"A":"B"), (DM_SWAT_Table.CurAntenna == Antenna_A?"A":"B"))); - - if(nextAntenna != pDM_SWAT_Table->CurAntenna) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Switch back to another antenna")); - } - else - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: current anntena is good\n")); - } - } - - if(pDM_SWAT_Table->TestMode == RSSI_MODE) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: TestMode = RSSI_MODE")); - pDM_SWAT_Table->SelectAntennaMap=0xAA; - if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Switch back to another antenna")); - nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; - } - else // current anntena is good - { - nextAntenna =pDM_SWAT_Table->CurAntenna; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: current anntena is good\n")); - } - } - pDM_SWAT_Table->try_flag = 0; - pDM_Odm->RSSI_test = FALSE; - pDM_SWAT_Table->RSSI_sum_A = 0; - pDM_SWAT_Table->RSSI_cnt_A = 0; - pDM_SWAT_Table->RSSI_sum_B = 0; - pDM_SWAT_Table->RSSI_cnt_B = 0; - pDM_SWAT_Table->TXByteCnt_A = 0; - pDM_SWAT_Table->TXByteCnt_B = 0; - pDM_SWAT_Table->RXByteCnt_A = 0; - pDM_SWAT_Table->RXByteCnt_B = 0; - - } - - //1 Normal State - else if(pDM_SWAT_Table->try_flag == 0) - { - if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) - { - if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) - pDM_SWAT_Table->TrafficLoad = TRAFFIC_HIGH; - else - pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; - } - else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) - { - if ((curTxOkCnt+curRxOkCnt) > 3750000) //if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) - pDM_SWAT_Table->TrafficLoad = TRAFFIC_HIGH; - else - pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; - } - if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) - pDM_SWAT_Table->bTriggerAntennaSwitch = 0; - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Normal:TrafficLoad = %llu\n", curTxOkCnt+curRxOkCnt)); - - //Prepare To Try Antenna - nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; - pDM_SWAT_Table->try_flag = 1; - pDM_Odm->RSSI_test = TRUE; - if((curRxOkCnt+curTxOkCnt) > 1000) - { - pDM_SWAT_Table->RSSI_Trying = 4; - pDM_SWAT_Table->TestMode = TP_MODE; - } - else - { - pDM_SWAT_Table->RSSI_Trying = 2; - pDM_SWAT_Table->TestMode = RSSI_MODE; - - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Normal State -> Begin Trying!\n")); - - - pDM_SWAT_Table->RSSI_sum_A = 0; - pDM_SWAT_Table->RSSI_cnt_A = 0; - pDM_SWAT_Table->RSSI_sum_B = 0; - pDM_SWAT_Table->RSSI_cnt_B = 0; - } - } - - //1 4.Change TRX antenna - if(nextAntenna != pDM_SWAT_Table->CurAntenna) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Change TX Antenna!\n ")); - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, nextAntenna); - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - ODM_SetAntenna(pDM_Odm,nextAntenna); - #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - { - BOOLEAN bEnqueue; - bEnqueue = (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)?FALSE :TRUE; - rtw_antenna_select_cmd(pDM_Odm->Adapter, nextAntenna, bEnqueue); - } - #endif - - } - - //1 5.Reset Statistics - pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - pDM_SWAT_Table->CurAntenna = nextAntenna; - pDM_SWAT_Table->PreRSSI = curRSSI; - - //1 6.Set next timer - { - PADAPTER pAdapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - - if(pDM_SWAT_Table->RSSI_Trying == 0) - return; - - if(pDM_SWAT_Table->RSSI_Trying%2 == 0) - { - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) - { - //PlatformSetTimer( pAdapter, &pHalData->SwAntennaSwitchTimer, 10 ); //ms - ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 10 ); //ms - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_SW_AntennaSwitch(): Test another antenna for 10 ms\n")); - } - else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) - { - //PlatformSetTimer( pAdapter, &pHalData->SwAntennaSwitchTimer, 50 ); //ms - ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 50 ); //ms - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_SW_AntennaSwitch(): Test another antenna for 50 ms\n")); - } - } - else - { - //PlatformSetTimer( pAdapter, &pHalData->SwAntennaSwitchTimer, 500 ); //ms - ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 500 ); //ms - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n")); - } - } - else - { - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) - //PlatformSetTimer( pAdapter, &pHalData->SwAntennaSwitchTimer, 90 ); //ms - ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 90 ); //ms - else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) - //PlatformSetTimer( pAdapter, &pHalData->SwAntennaSwitchTimer, 100 ); //ms - ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 100 ); //ms - } - else - //PlatformSetTimer( pAdapter, &pHalData->SwAntennaSwitchTimer, 500 ); //ms - ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 500 ); //ms - } - } -#endif // #if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) -#endif // #if (RTL8192C_SUPPORT==1) -} - - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -u1Byte -odm_SwAntDivSelectChkChnl( - IN PADAPTER Adapter - ) -{ -#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) - u1Byte index, target_chnl=0; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - u1Byte chnl_peer_cnt[14] = {0}; - - if(Adapter->MgntInfo.tmpNumBssDesc==0) - { - return 0; - } - else - { - // 20100519 Joseph: Select checking channel from current scan list. - // We just choose the channel with most APs to be the test scan channel. - for(index=0; indexMgntInfo.tmpNumBssDesc; index++) - { - // Add by hpfan: prevent access invalid channel number - // TODO: Verify channel number by channel plan - if(Adapter->MgntInfo.tmpbssDesc[index].ChannelNumber == 0 || - Adapter->MgntInfo.tmpbssDesc[index].ChannelNumber > 13) - continue; - - chnl_peer_cnt[Adapter->MgntInfo.tmpbssDesc[index].ChannelNumber-1]++; - } - for(index=0; index<14; index++) - { - if(chnl_peer_cnt[index]>chnl_peer_cnt[target_chnl]) - target_chnl = index; - } - target_chnl+=1; - ODM_RT_TRACE(pDM_Odm,COMP_SWAS, DBG_LOUD, - ("odm_SwAntDivSelectChkChnl(): Channel %d is select as test channel.\n", target_chnl)); - - return target_chnl; - } -#else - return 0; -#endif -} - - -VOID -odm_SwAntDivConsructChkScanChnl( - IN PADAPTER Adapter, - IN u1Byte ChkChnl - ) -{ - - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - PRT_CHANNEL_LIST pChannelList = GET_RT_CHANNEL_LIST(pMgntInfo); - u1Byte index; - - if(ChkChnl==0) - { - // 20100519 Joseph: Original antenna scanned nothing. - // Test antenna shall scan all channel with half period in this condition. - RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, NULL, NULL); - for(index=0; indexChannelLen; index++) - pChannelList->ChannelInfo[index].ScanPeriod /= 2; - } - else - { - // The using of this CustomizedScanRequest is a trick to rescan the two channels - // under the NORMAL scanning process. It will not affect MGNT_INFO.CustomizedScanRequest. - CUSTOMIZED_SCAN_REQUEST CustomScanReq; - - CustomScanReq.bEnabled = TRUE; - CustomScanReq.Channels[0] = ChkChnl; - CustomScanReq.Channels[1] = pMgntInfo->dot11CurrentChannelNumber; - CustomScanReq.nChannels = 2; - CustomScanReq.ScanType = SCAN_ACTIVE; - CustomScanReq.Duration = DEFAULT_ACTIVE_SCAN_PERIOD; - - RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, &CustomScanReq, NULL); - } - -} -#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -// -// 20100514 Luke/Joseph: -// Callback function for 500ms antenna test trying. -// -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -VOID -odm_SwAntDivChkAntSwitchCallback( - PRT_TIMER pTimer -) -{ - PADAPTER Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - pSWAT_T pDM_SWAT_Table = &pHalData->DM_OutSrc.DM_SWAT_Table; - - #if DEV_BUS_TYPE==RT_PCI_INTERFACE - #if USE_WORKITEM - ODM_ScheduleWorkItem(&pDM_SWAT_Table->SwAntennaSwitchWorkitem); - #else - odm_SwAntDivChkAntSwitch(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); - #endif -#else - ODM_ScheduleWorkItem(&pDM_SWAT_Table->SwAntennaSwitchWorkitem); - #endif - -} -VOID -odm_SwAntDivChkAntSwitchWorkitemCallback( - IN PVOID pContext - ) -{ - - PADAPTER pAdapter = (PADAPTER)pContext; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - odm_SwAntDivChkAntSwitch(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); - -} -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext) -{ - PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; - PADAPTER padapter = pDM_Odm->Adapter; - if(padapter->net_closed == _TRUE) - return; - odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_DETERMINE); -} -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext) -{ - PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; - odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_DETERMINE); -} -#endif - -#else //#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) - -VOID odm_SwAntDivInit( IN PDM_ODM_T pDM_Odm ) {} -VOID ODM_SwAntDivChkPerPktRssi( - IN PDM_ODM_T pDM_Odm, - IN u1Byte StationID, - IN PODM_PHY_INFO_T pPhyInfo - ) {} -VOID odm_SwAntDivChkAntSwitch( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Step - ) {} -VOID ODM_SwAntDivResetBeforeLink( IN PDM_ODM_T pDM_Odm ){} -VOID ODM_SwAntDivRestAfterLink( IN PDM_ODM_T pDM_Odm ){} -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -u1Byte odm_SwAntDivSelectChkChnl( IN PADAPTER Adapter ){ return 0;} -VOID -odm_SwAntDivConsructChkScanChnl( - IN PADAPTER Adapter, - IN u1Byte ChkChnl - ){} -#endif -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -VOID odm_SwAntDivChkAntSwitchCallback( PRT_TIMER pTimer){} -VOID odm_SwAntDivChkAntSwitchWorkitemCallback( IN PVOID pContext ){} -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext){} -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext){} -#endif - -#endif //#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -#if((defined(CONFIG_SW_ANTENNA_DIVERSITY))||(defined(CONFIG_HW_ANTENNA_DIVERSITY))) -BOOLEAN -ODM_SwAntDivCheckBeforeLink8192C( - IN PDM_ODM_T pDM_Odm - ) -{ - -#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData=NULL; - PMGNT_INFO pMgntInfo = NULL; - //pSWAT_T pDM_SWAT_Table = &Adapter->DM_SWAT_Table; - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; - - s1Byte Score = 0; - PRT_WLAN_BSS pTmpBssDesc; - PRT_WLAN_BSS pTestBssDesc; - - u1Byte target_chnl = 0; - u1Byte index; - -return FALSE; - if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 - { // The ODM structure is not initialized. - return FALSE; - } - // 2012/04/26 MH Prevent no-checked IC to execute antenna diversity. - if(pDM_Odm->SupportICType == ODM_RTL8188E && pDM_Odm->SupportInterface != ODM_ITRF_PCIE) - return FALSE; - pHalData = GET_HAL_DATA(Adapter); - pMgntInfo = &Adapter->MgntInfo; - - // Condition that does not need to use antenna diversity. - if(IS_8723_SERIES(pHalData->VersionID) || - IS_92C_SERIAL(pHalData->VersionID) || - (pHalData->AntDivCfg==0) || - pMgntInfo->AntennaTest || - Adapter->bInHctTest) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C(): No AntDiv Mechanism.\n")); - return FALSE; - } - - if(IS_8723_SERIES(pHalData->VersionID) || IS_92C_SERIAL(pHalData->VersionID) ) - { - if((pDM_SWAT_Table->ANTA_ON == FALSE) ||(pDM_SWAT_Table->ANTB_ON == FALSE)) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C(): No AntDiv Mechanism, Antenna A or B is off\n")); - return FALSE; - } - } - - // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. - PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) - { - PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", - pMgntInfo->RFChangeInProgress, - pHalData->eRFPowerState)); - - pDM_SWAT_Table->SWAS_NoLink_State = 0; - - return FALSE; - } - else - { - PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - } - - //1 Run AntDiv mechanism "Before Link" part. - if(pDM_SWAT_Table->SWAS_NoLink_State == 0) - { - //1 Prepare to do Scan again to check current antenna state. - - // Set check state to next step. - pDM_SWAT_Table->SWAS_NoLink_State = 1; - - // Copy Current Scan list. - Adapter->MgntInfo.tmpNumBssDesc = pMgntInfo->NumBssDesc; - PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); - - if(pDM_Odm->SupportICType == ODM_RTL8188E) - { - if(pDM_FatTable->RxIdleAnt == MAIN_ANT) - ODM_UpdateRxIdleAnt_88E(pDM_Odm, AUX_ANT); - else - ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C: Change to %s for testing.\n", ((pDM_FatTable->RxIdleAnt == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"))); - } - if(pDM_Odm->SupportICType != ODM_RTL8188E) - { - // Switch Antenna to another one. - pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C: Change to Ant(%s) for testing.\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B")); - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); - pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); - } - // Go back to scan function again. - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink8192C: Scan one more time\n")); - pMgntInfo->ScanStep=0; - target_chnl = odm_SwAntDivSelectChkChnl(Adapter); - odm_SwAntDivConsructChkScanChnl(Adapter, target_chnl); - HTReleaseChnlOpLock(Adapter); - PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); - - return TRUE; - } - else - { - //1 ScanComple() is called after antenna swiched. - //1 Check scan result and determine which antenna is going - //1 to be used. - - for(index=0; indexMgntInfo.tmpNumBssDesc; index++) - { - pTmpBssDesc = &(Adapter->MgntInfo.tmpbssDesc[index]); - pTestBssDesc = &(pMgntInfo->bssDesc[index]); - - if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink8192C(): ERROR!! This shall not happen.\n")); - continue; - } - - if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink8192C: Compare scan entry: Score++\n")); - RT_PRINT_STR(ODM_COMP_ANT_DIV, ODM_DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - - Score++; - PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); - } - else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink8192C: Compare scan entry: Score--\n")); - RT_PRINT_STR(ODM_COMP_ANT_DIV, ODM_DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - Score--; - } - - } - - if(pDM_Odm->SupportICType == ODM_RTL8188E) - { - if(pMgntInfo->NumBssDesc!=0 && Score<=0) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C(): Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); - } - else - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C(): Remain Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT")); - - if(pDM_FatTable->RxIdleAnt == MAIN_ANT) - ODM_UpdateRxIdleAnt_88E(pDM_Odm, AUX_ANT); - else - ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT); - } - } - - if(pDM_Odm->SupportICType != ODM_RTL8188E) - { - if(pMgntInfo->NumBssDesc!=0 && Score<=0) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C(): Using Ant(%s)\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"Antenna_A":"Antenna_B")); - - pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - } - else - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C(): Remain Ant(%s)\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"Antenna_B":"Antenna_A")); - - pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; - - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); - pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); - PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); - } - } - // Check state reset to default and wait for next time. - pDM_SWAT_Table->SWAS_NoLink_State = 0; - - return FALSE; - } -#else - return FALSE; -#endif - -return FALSE; -} -#else -BOOLEAN -ODM_SwAntDivCheckBeforeLink8192C( - IN PDM_ODM_T pDM_Odm - ) -{ - - return FALSE; - -} -#endif //#if((defined(CONFIG_SW_ANTENNA_DIVERSITY))||(defined(CONFIG_HW_ANTENNA_DIVERSITY))) -#endif //#if(DM_ODM_SUPPORT_TYPE==ODM_MP) - - -//3============================================================ -//3 SW Antenna Diversity -//3============================================================ - -#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) -VOID -odm_InitHybridAntDiv_88C_92D( - IN PDM_ODM_T pDM_Odm - ) -{ - -#if((DM_ODM_SUPPORT_TYPE==ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) - struct rtl8192cd_priv *priv=pDM_Odm->priv; -#endif - SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - u1Byte bTxPathSel=0; //0:Path-A 1:Path-B - u1Byte i; - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_InitHybridAntDiv==============>\n")); - - //whether to do antenna diversity or not -#if(DM_ODM_SUPPORT_TYPE==ODM_AP) - if(priv==NULL) return; - if(!priv->pshare->rf_ft_var.antHw_enable) - return; - - #ifdef SW_ANT_SWITCH - priv->pshare->rf_ft_var.antSw_enable =0; - #endif -#endif - - if((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8192D)) - return; - - - bTxPathSel=(pDM_Odm->RFType==ODM_1T1R)?FALSE:TRUE; - - ODM_SetBBReg(pDM_Odm,ODM_REG_BB_PWR_SAV1_11N, BIT23, 0); //No update ANTSEL during GNT_BT=1 - ODM_SetBBReg(pDM_Odm,ODM_REG_TX_ANT_CTRL_11N, BIT21, 1); //TX atenna selection from tx_info - ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PIN_11N, BIT23, 1); //enable LED[1:0] pin as ANTSEL - ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_CTRL_11N, BIT8|BIT9, 0x01); // 0x01: left antenna, 0x02: right antenna - // check HW setting: ANTSEL pin connection - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - ODM_Write2Byte(pDM_Odm,ODM_REG_RF_PIN_11N, (ODM_Read2Byte(pDM_Odm,0x804)&0xf0ff )| BIT(8) ); // b11-b8=0001,update RFPin setting - #endif - - // only AP support different path selection temperarly - if(!bTxPathSel){ //PATH-A - ODM_SetBBReg(pDM_Odm,ODM_REG_PIN_CTRL_11N, BIT8|BIT9, 0 ); // ANTSEL as HW control - ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PATH_11N, BIT13, 1); //select TX ANTESEL from path A - } - else { - ODM_SetBBReg(pDM_Odm,ODM_REG_PIN_CTRL_11N, BIT24|BIT25, 0 ); // ANTSEL as HW control - ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PATH_11N, BIT13, 0); //select ANTESEL from path B - } - - //Set OFDM HW RX Antenna Diversity - ODM_SetBBReg(pDM_Odm,ODM_REG_ANTDIV_PARA1_11N, 0x7FF, 0x0c0); //Pwdb threshold=8dB - ODM_SetBBReg(pDM_Odm,ODM_REG_ANTDIV_PARA1_11N, BIT11, 0); //Switch to another antenna by checking pwdb threshold - ODM_SetBBReg(pDM_Odm,ODM_REG_ANTDIV_PARA3_11N, BIT23, 1); // Decide final antenna by comparing 2 antennas' pwdb - - //Set CCK HW RX Antenna Diversity - ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 0); //Antenna diversity decision period = 32 sample - ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA2_11N, 0xf, 0xf); //Threshold for antenna diversity. Check another antenna power if input power < ANT_lim*4 - ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA3_11N, BIT13, 1); //polarity ana_A=1 and ana_B=0 - ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA4_11N, 0x1f, 0x8); //default antenna power = inpwr*(0.5 + r_ant_step/16) - - - //Enable HW Antenna Diversity - if(!bTxPathSel) //PATH-A - ODM_SetBBReg(pDM_Odm,ODM_REG_IGI_A_11N, BIT7,1); // Enable Hardware antenna switch - else - ODM_SetBBReg(pDM_Odm,ODM_REG_IGI_B_11N, BIT7,1); // Enable Hardware antenna switch - ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 1);//Enable antenna diversity - - pDM_SWAT_Table->CurAntenna=0; //choose left antenna as default antenna - pDM_SWAT_Table->PreAntenna=0; - for(i=0; iCCK_Ant1_Cnt[i] = 0; - pDM_SWAT_Table->CCK_Ant2_Cnt[i] = 0; - pDM_SWAT_Table->OFDM_Ant1_Cnt[i] = 0; - pDM_SWAT_Table->OFDM_Ant2_Cnt[i] = 0; - pDM_SWAT_Table->RSSI_Ant1_Sum[i] = 0; - pDM_SWAT_Table->RSSI_Ant2_Sum[i] = 0; - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============odm_InitHybridAntDiv\n")); -} - - -VOID -odm_InitHybridAntDiv( - IN PDM_ODM_T pDM_Odm - ) -{ - if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: Not Support HW AntDiv\n")); - return; - } - - if(pDM_Odm->SupportICType & (ODM_RTL8192C | ODM_RTL8192D)) - { -#if ((RTL8192C_SUPPORT == 1)||(RTL8192D_SUPPORT == 1)) - odm_InitHybridAntDiv_88C_92D(pDM_Odm); -#endif - } - else if(pDM_Odm->SupportICType == ODM_RTL8188E) - { -#if (RTL8188E_SUPPORT == 1) - ODM_AntennaDiversityInit_88E(pDM_Odm); -#endif - } - -} - - -BOOLEAN -odm_StaDefAntSel( - IN PDM_ODM_T pDM_Odm, - IN u4Byte OFDM_Ant1_Cnt, - IN u4Byte OFDM_Ant2_Cnt, - IN u4Byte CCK_Ant1_Cnt, - IN u4Byte CCK_Ant2_Cnt, - OUT u1Byte *pDefAnt - - ) -{ -#if 1 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_StaDefAntSelect==============>\n")); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("OFDM_Ant1_Cnt:%d, OFDM_Ant2_Cnt:%d\n",OFDM_Ant1_Cnt,OFDM_Ant2_Cnt)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("CCK_Ant1_Cnt:%d, CCK_Ant2_Cnt:%d\n",CCK_Ant1_Cnt,CCK_Ant2_Cnt)); - - - if(((OFDM_Ant1_Cnt+OFDM_Ant2_Cnt)==0)&&((CCK_Ant1_Cnt + CCK_Ant2_Cnt) <10)){ - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_StaDefAntSelect Fail: No enough packet info!\n")); - return FALSE; - } - - if(OFDM_Ant1_Cnt || OFDM_Ant2_Cnt ) { - //if RX OFDM packet number larger than 0 - if(OFDM_Ant1_Cnt > OFDM_Ant2_Cnt) - (*pDefAnt)=1; - else - (*pDefAnt)=0; - } - // else if RX CCK packet number larger than 10 - else if((CCK_Ant1_Cnt + CCK_Ant2_Cnt) >=10 ) - { - if(CCK_Ant1_Cnt > (5*CCK_Ant2_Cnt)) - (*pDefAnt)=1; - else if(CCK_Ant2_Cnt > (5*CCK_Ant1_Cnt)) - (*pDefAnt)=0; - else if(CCK_Ant1_Cnt > CCK_Ant2_Cnt) - (*pDefAnt)=0; - else - (*pDefAnt)=1; - - } - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("TxAnt = %s\n",((*pDefAnt)==1)?"Ant1":"Ant2")); - -#endif - //u4Byte antsel = ODM_GetBBReg(pDM_Odm, 0xc88, bMaskByte0); - //(*pDefAnt)= (u1Byte) antsel; - - - - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============odm_StaDefAntSelect\n")); - - return TRUE; - - -} - - -VOID -odm_SetRxIdleAnt( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Ant, - IN BOOLEAN bDualPath -) -{ - SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_SetRxIdleAnt==============>\n")); - - if(Ant != pDM_SWAT_Table->RxIdleAnt) - { - //for path-A - if(Ant==1) - ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF, 0x65a9); //right-side antenna - else - ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF, 0x569a); //left-side antenna - - //for path-B - if(bDualPath){ - if(Ant==0) - ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF0000, 0x65a9); //right-side antenna - else - ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF0000, 0x569a); //left-side antenna - } - } - pDM_SWAT_Table->RxIdleAnt = Ant; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("RxIdleAnt: %s Reg858=0x%x\n",(Ant==1)?"Ant1":"Ant2",(Ant==1)?0x65a9:0x569a)); - - //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============odm_SetRxIdleAnt\n")); - - } - -VOID -ODM_AntselStatistics_88C( - IN PDM_ODM_T pDM_Odm, - IN u1Byte MacId, - IN u4Byte PWDBAll, - IN BOOLEAN isCCKrate -) -{ - SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - if(pDM_SWAT_Table->antsel == 1) - { - if(isCCKrate) - pDM_SWAT_Table->CCK_Ant1_Cnt[MacId]++; - else - { - pDM_SWAT_Table->OFDM_Ant1_Cnt[MacId]++; - pDM_SWAT_Table->RSSI_Ant1_Sum[MacId] += PWDBAll; - } - } - else - { - if(isCCKrate) - pDM_SWAT_Table->CCK_Ant2_Cnt[MacId]++; - else - { - pDM_SWAT_Table->OFDM_Ant2_Cnt[MacId]++; - pDM_SWAT_Table->RSSI_Ant2_Sum[MacId] += PWDBAll; - } - } - -} - - - - -#if(DM_ODM_SUPPORT_TYPE==ODM_MP) -VOID -ODM_SetTxAntByTxInfo_88C_92D( - IN PDM_ODM_T pDM_Odm, - IN pu1Byte pDesc, - IN u1Byte macId -) -{ - SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - u1Byte antsel; - - if(!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) - return; - - if(pDM_SWAT_Table->RxIdleAnt == 1) - antsel=(pDM_SWAT_Table->TxAnt[macId] == 1)?0:1; - else - antsel=(pDM_SWAT_Table->TxAnt[macId] == 1)?1:0; - - SET_TX_DESC_ANTSEL_A_92C(pDesc, antsel); - //SET_TX_DESC_ANTSEL_B_92C(pDesc, antsel); - //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("SET_TX_DESC_ANTSEL_A_92C=%d\n", pDM_SWAT_Table->TxAnt[macId])); -} -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) -VOID -ODM_SetTxAntByTxInfo_88C_92D( - IN PDM_ODM_T pDM_Odm -) -{ - -} -#elif(DM_ODM_SUPPORT_TYPE==ODM_AP) -VOID -ODM_SetTxAntByTxInfo_88C_92D( - IN PDM_ODM_T pDM_Odm -) -{ - -} -#endif - -VOID -odm_HwAntDiv_92C_92D( - IN PDM_ODM_T pDM_Odm -) -{ - SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - u4Byte RSSI_Min=0xFF, RSSI, RSSI_Ant1, RSSI_Ant2; - u1Byte RxIdleAnt, i; - BOOLEAN bRet=FALSE; - PSTA_INFO_T pEntry; - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - struct rtl8192cd_priv *priv=pDM_Odm->priv; - //if test, return - if(priv->pshare->rf_ft_var.CurAntenna & 0x80) - return; -#endif - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv==============>\n")); - - if(!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) //if don't support antenna diveristy - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv: Not supported!\n")); - return; - } - - if((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8192D)) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: IC Type is not 92C or 92D\n")); - return; - } - -#if (DM_ODM_SUPPORT_TYPE&(ODM_MP|ODM_CE)) - if(!pDM_Odm->bLinked) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: bLinked is FALSE\n")); - return; - } -#endif - - for (i=0; ipODM_StaInfo[i]; - if(IS_STA_VALID(pEntry)) - { - - RSSI_Ant1 = (pDM_SWAT_Table->OFDM_Ant1_Cnt[i] == 0)?0:(pDM_SWAT_Table->RSSI_Ant1_Sum[i]/pDM_SWAT_Table->OFDM_Ant1_Cnt[i]); - RSSI_Ant2 = (pDM_SWAT_Table->OFDM_Ant2_Cnt[i] == 0)?0:(pDM_SWAT_Table->RSSI_Ant2_Sum[i]/pDM_SWAT_Table->OFDM_Ant2_Cnt[i]); - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("RSSI_Ant1=%d, RSSI_Ant2=%d\n", RSSI_Ant1, RSSI_Ant2)); - - if(RSSI_Ant1 ||RSSI_Ant2) - { -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - if(pDM_Odm->pODM_StaInfo[i]->expire_to) -#endif - { - RSSI = (RSSI_Ant1 < RSSI_Ant2) ? RSSI_Ant1 : RSSI_Ant2; - if((!RSSI) || ( RSSI < RSSI_Min) ) { - pDM_SWAT_Table->TargetSTA = i; - RSSI_Min = RSSI; - } - } - } - ///STA: found out default antenna - bRet=odm_StaDefAntSel(pDM_Odm, - pDM_SWAT_Table->OFDM_Ant1_Cnt[i], - pDM_SWAT_Table->OFDM_Ant2_Cnt[i], - pDM_SWAT_Table->CCK_Ant1_Cnt[i], - pDM_SWAT_Table->CCK_Ant2_Cnt[i], - &pDM_SWAT_Table->TxAnt[i]); - - //if Tx antenna selection: successful - if(bRet){ - pDM_SWAT_Table->RSSI_Ant1_Sum[i] = 0; - pDM_SWAT_Table->RSSI_Ant2_Sum[i] = 0; - pDM_SWAT_Table->OFDM_Ant1_Cnt[i] = 0; - pDM_SWAT_Table->OFDM_Ant2_Cnt[i] = 0; - pDM_SWAT_Table->CCK_Ant1_Cnt[i] = 0; - pDM_SWAT_Table->CCK_Ant2_Cnt[i] = 0; - } - } - } - - //set RX Idle Ant - RxIdleAnt = pDM_SWAT_Table->TxAnt[pDM_SWAT_Table->TargetSTA]; - odm_SetRxIdleAnt(pDM_Odm, RxIdleAnt, FALSE); - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) -#ifdef TX_SHORTCUT - if (!priv->pmib->dot11OperationEntry.disable_txsc) { - plist = phead->next; - while(plist != phead) { - pstat = list_entry(plist, struct stat_info, asoc_list); - if(pstat->expire_to) { - for (i=0; itx_sc_ent[i].hwdesc1); - pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); - if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) - pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); - pdesc= &(pstat->tx_sc_ent[i].hwdesc2); - pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); - if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) - pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); - } - } - - if (plist == plist->next) - break; - plist = plist->next; - }; - } -#endif -#endif - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("<==============odm_HwAntDiv\n")); - -} - -VOID -odm_HwAntDiv( - IN PDM_ODM_T pDM_Odm -) -{ - if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: Not Support HW AntDiv\n")); - return; - } - - if(pDM_Odm->SupportICType & (ODM_RTL8192C | ODM_RTL8192D)) - { -#if ((RTL8192C_SUPPORT == 1)||(RTL8192D_SUPPORT == 1)) - odm_HwAntDiv_92C_92D(pDM_Odm); -#endif - } - else if(pDM_Odm->SupportICType == ODM_RTL8188E) - { -#if (RTL8188E_SUPPORT == 1) - ODM_AntennaDiversity_88E(pDM_Odm); -#endif - } - -} - - -#if(DM_ODM_SUPPORT_TYPE==ODM_AP) -#if 0 -VOID -odm_HwAntDiv( - IN PDM_ODM_T pDM_Odm -) -{ - struct rtl8192cd_priv *priv=pDM_Odm->priv; - struct stat_info *pstat, *pstat_min=NULL; - struct list_head *phead, *plist; - int rssi_min= 0xff, i; - u1Byte idleAnt=priv->pshare->rf_ft_var.CurAntenna; - u1Byte nextAnt; - BOOLEAN bRet=FALSE; - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv==============>\n")); - - if((!priv->pshare->rf_ft_var.antHw_enable) ||(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV))) - return; - - //if test, return - if(priv->pshare->rf_ft_var.CurAntenna & 0x80) - return; - - phead = &priv->asoc_list; - plist = phead->next; - ////========================= - //find mimum rssi sta - ////========================= - while(plist != phead) { - pstat = list_entry(plist, struct stat_info, asoc_list); - if((pstat->expire_to) && (pstat->AntRSSI[0] || pstat->AntRSSI[1])) { - int rssi = (pstat->AntRSSI[0] < pstat->AntRSSI[1]) ? pstat->AntRSSI[0] : pstat->AntRSSI[1]; - if((!pstat_min) || ( rssi < rssi_min) ) { - pstat_min = pstat; - rssi_min = rssi; - } - } - ///STA: found out default antenna - bRet=odm_StaDefAntSel(pDM_Odm, - pstat->hwRxAntSel[1], - pstat->hwRxAntSel[0], - pstat->cckPktCount[1], - pstat->cckPktCount[0], - &nextAnt - ); - - //if default antenna selection: successful - if(bRet){ - pstat->CurAntenna = nextAnt; - //update rssi - for(i=0; i<2; i++) { - if(pstat->cckPktCount[i]==0 && pstat->hwRxAntSel[i]==0) - pstat->AntRSSI[i] = 0; - } - if(pstat->AntRSSI[idleAnt]==0) - pstat->AntRSSI[idleAnt] = pstat->AntRSSI[idleAnt^1]; - // reset variables - pstat->hwRxAntSel[1] = pstat->hwRxAntSel[0] =0; - pstat->cckPktCount[1]= pstat->cckPktCount[0] =0; - } - - if (plist == plist->next) - break; - plist = plist->next; - - }; - ////========================= - //Choose RX Idle antenna according to minmum rssi - ////========================= - if(pstat_min) { - if(priv->pshare->rf_ft_var.CurAntenna!=pstat_min->CurAntenna) - odm_SetRxIdleAnt(pDM_Odm,pstat_min->CurAntenna,TRUE); - priv->pshare->rf_ft_var.CurAntenna = pstat_min->CurAntenna; - } - - -#ifdef TX_SHORTCUT - if (!priv->pmib->dot11OperationEntry.disable_txsc) { - plist = phead->next; - while(plist != phead) { - pstat = list_entry(plist, struct stat_info, asoc_list); - if(pstat->expire_to) { - for (i=0; itx_sc_ent[i].hwdesc1); - pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); - if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) - pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); - pdesc= &(pstat->tx_sc_ent[i].hwdesc2); - pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); - if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) - pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); - } - } - - if (plist == plist->next) - break; - plist = plist->next; - }; - } -#endif - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,"<==============odm_HwAntDiv\n"); -} -#endif - -u1Byte -ODM_Diversity_AntennaSelect( - IN PDM_ODM_T pDM_Odm, - IN u1Byte *data -) -{ - struct rtl8192cd_priv *priv=pDM_Odm->priv; - - int ant = _atoi(data, 16); - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("ODM_Diversity_AntennaSelect==============>\n")); - - #ifdef PCIE_POWER_SAVING - PCIeWakeUp(priv, POWER_DOWN_T0); - #endif - - if (ant==Antenna_B || ant==Antenna_A) - { - if ( !priv->pshare->rf_ft_var.antSw_select) { - ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) | BIT(8)| BIT(9) ); // ANTSEL A as SW control - ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) & (~ BIT(7))); // rx OFDM SW control - PHY_SetBBReg(priv, 0x860, 0x300, ant); - } else { - ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) | BIT(24)| BIT(25) ); // ANTSEL B as HW control - PHY_SetBBReg(priv, 0x864, 0x300, ant); - ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) & (~ BIT(7))); // rx OFDM SW control - } - - ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) & (~ BIT(7))); // rx CCK SW control - ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) & (~ BIT(21))); // select ant by tx desc - ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a); - - priv->pshare->rf_ft_var.antHw_enable = 0; - priv->pshare->rf_ft_var.CurAntenna = (ant%2); - - #ifdef SW_ANT_SWITCH - priv->pshare->rf_ft_var.antSw_enable = 0; - priv->pshare->DM_SWAT_Table.CurAntenna = ant; - priv->pshare->RSSI_test =0; - #endif - } - else if(ant==0){ - - if ( !priv->pshare->rf_ft_var.antSw_select) { - ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) & ~(BIT(8)| BIT(9)) ); - ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) | BIT(7)); // OFDM HW control - } else { - ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) & ~(BIT(24)| BIT(25)) ); - ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) | BIT(7)); // OFDM HW control - } - - ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) | BIT(7)); // CCK HW control - ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) | BIT(21) ); // by tx desc - priv->pshare->rf_ft_var.CurAntenna = 0; - ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a); - priv->pshare->rf_ft_var.antHw_enable = 1; -#ifdef SW_ANT_SWITCH - priv->pshare->rf_ft_var.antSw_enable = 0; - priv->pshare->RSSI_test =0; -#endif - } -#ifdef SW_ANT_SWITCH - else if(ant==3) { - if(!priv->pshare->rf_ft_var.antSw_enable) { - - dm_SW_AntennaSwitchInit(priv); - ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a); - priv->pshare->lastTxOkCnt = priv->net_stats.tx_bytes; - priv->pshare->lastRxOkCnt = priv->net_stats.rx_bytes; - } - if ( !priv->pshare->rf_ft_var.antSw_select) - ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) & (~ BIT(7))); // rx OFDM SW control - else - ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) & (~ BIT(7))); // rx OFDM SW control - - ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) & (~ BIT(7))); // rx CCK SW control - ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) & (~ BIT(21))); // select ant by tx desc - priv->pshare->rf_ft_var.antHw_enable = 0; - priv->pshare->rf_ft_var.antSw_enable = 1; - - } -#endif - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============ODM_Diversity_AntennaSelect\n")); - - return 1; -} -#endif - -#else //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) - -VOID odm_InitHybridAntDiv( IN PDM_ODM_T pDM_Odm ){} -VOID odm_HwAntDiv( IN PDM_ODM_T pDM_Odm){} -#if(DM_ODM_SUPPORT_TYPE==ODM_MP) -VOID ODM_SetTxAntByTxInfo_88C_92D( - IN PDM_ODM_T pDM_Odm, - IN pu1Byte pDesc, - IN u1Byte macId -){} -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) -VOID ODM_SetTxAntByTxInfo_88C_92D( IN PDM_ODM_T pDM_Odm){ } -#elif(DM_ODM_SUPPORT_TYPE==ODM_AP) -VOID ODM_SetTxAntByTxInfo_88C_92D( IN PDM_ODM_T pDM_Odm){ } -#endif - -#endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) - - - -//============================================================ -//EDCA Turbo -//============================================================ -VOID -ODM_EdcaTurboInit( - IN PDM_ODM_T pDM_Odm) -{ - -#if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) - odm_EdcaParaInit(pDM_Odm); -#elif (DM_ODM_SUPPORT_TYPE==ODM_MP) - PADAPTER Adapter = NULL; - HAL_DATA_TYPE *pHalData = NULL; - - if(pDM_Odm->Adapter==NULL) { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EdcaTurboInit fail!!!\n")); - return; - } - - Adapter=pDM_Odm->Adapter; - pHalData=GET_HAL_DATA(Adapter); - - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; - pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; - pHalData->bIsAnyNonBEPkts = FALSE; - -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; - pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; - Adapter->recvpriv.bIsAnyNonBEPkts =FALSE; - -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VO PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VO_PARAM))); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VI PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VI_PARAM))); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BK PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BK_PARAM))); - - -} // ODM_InitEdcaTurbo - -VOID -odm_EdcaTurboCheck( - IN PDM_ODM_T pDM_Odm - ) -{ - // - // For AP/ADSL use prtl8192cd_priv - // For CE/NIC use PADAPTER - // - PADAPTER pAdapter = pDM_Odm->Adapter; - prtl8192cd_priv priv = pDM_Odm->priv; - - // - // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate - // at the same time. In the stage2/3, we need to prive universal interface and merge all - // HW dynamic mechanism. - // - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheck========================>\n")); - - if(!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO )) - return; - - switch (pDM_Odm->SupportPlatform) - { - case ODM_MP: - -#if(DM_ODM_SUPPORT_TYPE==ODM_MP) - odm_EdcaTurboCheckMP(pDM_Odm); -#endif - break; - - case ODM_CE: -#if(DM_ODM_SUPPORT_TYPE==ODM_CE) - odm_EdcaTurboCheckCE(pDM_Odm); -#endif - break; - - case ODM_AP: - case ODM_ADSL: - -#if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) - odm_IotEngine(pDM_Odm); -#endif - break; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("<========================odm_EdcaTurboCheck\n")); - -} // odm_CheckEdcaTurbo - -#if(DM_ODM_SUPPORT_TYPE==ODM_CE) - - -VOID -odm_EdcaTurboCheckCE( - IN PDM_ODM_T pDM_Odm - ) -{ - -#if(DM_ODM_SUPPORT_TYPE==ODM_CE) - - PADAPTER Adapter = pDM_Odm->Adapter; - - u32 trafficIndex; - u32 edca_param; - u64 cur_tx_bytes = 0; - u64 cur_rx_bytes = 0; - u8 bbtchange = _FALSE; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); - struct recv_priv *precvpriv = &(Adapter->recvpriv); - struct registry_priv *pregpriv = &Adapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - - if ((pregpriv->wifi_spec == 1) )//|| (pmlmeinfo->HT_enable == 0)) - { - goto dm_CheckEdcaTurbo_EXIT; - } - - if (pmlmeinfo->assoc_AP_vendor >= HT_IOT_PEER_MAX) - { - goto dm_CheckEdcaTurbo_EXIT; - } - -#ifdef CONFIG_BT_COEXIST - if (BT_DisableEDCATurbo(Adapter)) - { - goto dm_CheckEdcaTurbo_EXIT; - } -#endif - - // Check if the status needs to be changed. - if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) ) - { - cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; - cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes; - - //traffic, TX or RX - if((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_RALINK)||(pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS)) - { - if (cur_tx_bytes > (cur_rx_bytes << 2)) - { // Uplink TP is present. - trafficIndex = UP_LINK; - } - else - { // Balance TP is present. - trafficIndex = DOWN_LINK; - } - } - else - { - if (cur_rx_bytes > (cur_tx_bytes << 2)) - { // Downlink TP is present. - trafficIndex = DOWN_LINK; - } - else - { // Balance TP is present. - trafficIndex = UP_LINK; - } - } - - if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) - { - -#if 0 - //adjust EDCA parameter for BE queue - edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; -#else - - if((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_CISCO) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) - { - edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; - } - else - { - edca_param = EDCAParam[HT_IOT_PEER_UNKNOWN][trafficIndex]; - } -#endif - -#ifdef CONFIG_PCI_HCI - if(IS_92C_SERIAL(pHalData->VersionID)) - { - edca_param = 0x60a42b; - } - else - { - edca_param = 0x6ea42b; - } -#endif - rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); - - pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex; - } - - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _TRUE; - } - else - { - // - // Turn Off EDCA turbo here. - // Restore original EDCA according to the declaration of AP. - // - if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) - { - rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _FALSE; - } - } - -dm_CheckEdcaTurbo_EXIT: - // Set variables for next time. - precvpriv->bIsAnyNonBEPkts = _FALSE; - pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; - precvpriv->last_rx_bytes = precvpriv->rx_bytes; -#endif -} - - -#elif(DM_ODM_SUPPORT_TYPE==ODM_MP) -VOID -odm_EdcaTurboCheckMP( - IN PDM_ODM_T pDM_Odm - ) -{ - - - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - -#if(DM_ODM_SUPPORT_TYPE==ODM_MP) - PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); - PADAPTER pExtAdapter = GetFirstExtAdapter(Adapter);//NULL; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos; - //[Win7 Count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's Adapter is always Default. 2009.08.20, by Bohn - u8Byte Ext_curTxOkCnt = 0; - u8Byte Ext_curRxOkCnt = 0; - static u8Byte Ext_lastTxOkCnt = 0; - static u8Byte Ext_lastRxOkCnt = 0; - //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. - u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; - -#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); - struct recv_priv *precvpriv = &(Adapter->recvpriv); - struct registry_priv *pregpriv = &Adapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - #ifdef CONFIG_BT_COEXIST - struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); - #endif - u1Byte bbtchange =FALSE; -#endif - // Keep past Tx/Rx packet count for RT-to-RT EDCA turbo. - u8Byte curTxOkCnt = 0; - u8Byte curRxOkCnt = 0; - u8Byte lastTxOkCnt = 0; - u8Byte lastRxOkCnt = 0; - u4Byte EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer]; - u4Byte EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer]; - u4Byte EDCA_BE = 0x5ea42b; - u4Byte IOTPeer=0; - BOOLEAN *pbIsCurRDLState=NULL; - BOOLEAN bLastIsCurRDLState=FALSE; - BOOLEAN bBiasOnRx=FALSE; - BOOLEAN bEdcaTurboOn=FALSE; - - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheckMP========================>")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); - -////=============================== -////list paramter for different platform -////=============================== - bLastIsCurRDLState=pDM_Odm->DM_EDCA_Table.bIsCurRDLState; - pbIsCurRDLState=&(pDM_Odm->DM_EDCA_Table.bIsCurRDLState); -#if (DM_ODM_SUPPORT_TYPE==ODM_MP) - // Caculate TX/RX TP: - curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt; - curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt; - if(pExtAdapter == NULL) - pExtAdapter = pDefaultAdapter; - - Ext_curTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->Ext_lastTxOkCnt; - Ext_curRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->Ext_lastRxOkCnt; - GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); - //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. - if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) - { - curTxOkCnt = Ext_curTxOkCnt ; - curRxOkCnt = Ext_curRxOkCnt ; - } - // - IOTPeer=pMgntInfo->IOTPeer; - bBiasOnRx=(pMgntInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)?TRUE:FALSE; - bEdcaTurboOn=((!pHalData->bIsAnyNonBEPkts) && (!pMgntInfo->bDisableFrameBursting))?TRUE:FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bIsAnyNonBEPkts : 0x%lx bDisableFrameBursting : 0x%lx \n",pHalData->bIsAnyNonBEPkts,pMgntInfo->bDisableFrameBursting)); - -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - // Caculate TX/RX TP: - curTxOkCnt = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; - curRxOkCnt = precvpriv->rx_bytes - precvpriv->last_rx_bytes; - #ifdef CONFIG_BT_COEXIST - if(pbtpriv->BT_Coexist) - { - if( (pbtpriv->BT_EDCA[UP_LINK]!=0) || (pbtpriv->BT_EDCA[DOWN_LINK]!=0)) - bbtchange = TRUE; - } - #endif - IOTPeer=pmlmeinfo->assoc_AP_vendor; - bBiasOnRx=((IOTPeer == HT_IOT_PEER_RALINK)||(IOTPeer == HT_IOT_PEER_ATHEROS))?TRUE:FALSE; - bEdcaTurboOn=(bbtchange || (!precvpriv->bIsAnyNonBEPkts))?TRUE:FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bbtchange : 0x%lx bIsAnyNonBEPkts : 0x%lx \n",bbtchange,precvpriv->bIsAnyNonBEPkts)); -#endif - - -////=============================== -////check if edca turbo is disabled -////=============================== - if(odm_IsEdcaTurboDisable(pDM_Odm)) - goto dm_CheckEdcaTurbo_EXIT; - - -////=============================== -////remove iot case out -////=============================== - ODM_EdcaParaSelByIot(pDM_Odm, &EDCA_BE_UL, &EDCA_BE_DL); - - -////=============================== -////Check if the status needs to be changed. -////=============================== - if(bEdcaTurboOn) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bEdcaTurboOn : 0x%x bBiasOnRx : 0x%x\n",bEdcaTurboOn,bBiasOnRx)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curTxOkCnt : 0x%lx \n",curTxOkCnt)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curRxOkCnt : 0x%lx \n",curRxOkCnt)); - if(bBiasOnRx) - odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, TRUE, pbIsCurRDLState); - else - odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, FALSE, pbIsCurRDLState); - -//modify by Guo.Mingzhi 2011-12-29 - EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL; - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA Turbo on: EDCA_BE:0x%lx\n",EDCA_BE)); - -// if(((*pbIsCurRDLState)!=bLastIsCurRDLState)||(!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) -// { -// EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL; -// ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); - // } - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = TRUE; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA_BE_DL : 0x%lx EDCA_BE_UL : 0x%lx EDCA_BE : 0x%lx \n",EDCA_BE_DL,EDCA_BE_UL,EDCA_BE)); - - } - else - { - // Turn Off EDCA turbo here. - // Restore original EDCA according to the declaration of AP. - if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) - { -#if (DM_ODM_SUPPORT_TYPE==ODM_MP) - Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(pStaQos->WMMParamEle, AC0_BE) ); -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, pHalData->AcParam_BE); -#endif - - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Restore EDCA BE: 0x%lx \n",pDM_Odm->WMMEDCA_BE)); - - } - } - -////=============================== -////Set variables for next time. -////=============================== -dm_CheckEdcaTurbo_EXIT: -#if (DM_ODM_SUPPORT_TYPE==ODM_MP) - pHalData->bIsAnyNonBEPkts = FALSE; - pMgntInfo->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; - pMgntInfo->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; - pMgntInfo->Ext_lastTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast; - pMgntInfo->Ext_lastRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast; -#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) - precvpriv->bIsAnyNonBEPkts = FALSE; - pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; - precvpriv->last_rx_bytes = precvpriv->rx_bytes; -#endif - -} - - -//check if edca turbo is disabled -BOOLEAN -odm_IsEdcaTurboDisable( - IN PDM_ODM_T pDM_Odm -) -{ - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - -#if(DM_ODM_SUPPORT_TYPE==ODM_MP) - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - u4Byte IOTPeer=pMgntInfo->IOTPeer; -#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) - struct registry_priv *pregpriv = &Adapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - u4Byte IOTPeer=pmlmeinfo->assoc_AP_vendor; - u1Byte WirelessMode=0xFF; //invalid value - - if(pDM_Odm->pWirelessMode!=NULL) - WirelessMode=*(pDM_Odm->pWirelessMode); - -#endif - -#if(BT_30_SUPPORT == 1) - if(pDM_Odm->bBtDisableEdcaTurbo) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable for BT!!\n")); - return TRUE; - } -#endif - - if((!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))|| - (pDM_Odm->bWIFITest)|| - (IOTPeer>= HT_IOT_PEER_MAX)) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable\n")); - return TRUE; - } - - -#if (DM_ODM_SUPPORT_TYPE ==ODM_MP) - // 1. We do not turn on EDCA turbo mode for some AP that has IOT issue - // 2. User may disable EDCA Turbo mode with OID settings. - if((pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO) ||pHalData->bForcedDisableTurboEDCA){ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("IOTAction:EdcaTurboDisable\n")); - return TRUE; - } - -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - //suggested by Jr.Luke: open TXOP for B/G/BG/A mode 2012-0215 - if((WirelessMode==ODM_WM_B)||(WirelessMode==(ODM_WM_B|ODM_WM_G)||(WirelessMode==ODM_WM_G)||(WirelessMode=ODM_WM_A)) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, ODM_Read4Byte(pDM_Odm, ODM_EDCA_BE_PARAM)|0x5E0000); - - if(pDM_Odm->SupportICType==ODM_RTL8192D) { - if ((pregpriv->wifi_spec == 1) || (pmlmeext->cur_wireless_mode == WIRELESS_11B)) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("92D:EdcaTurboDisable\n")); - return TRUE; - } - } - else - { - if((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0)){ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("Others:EdcaTurboDisable\n")); - return TRUE; - } - } -#ifdef CONFIG_BT_COEXIST - if (BT_DisableEDCATurbo(Adapter)) - { - goto dm_CheckEdcaTurbo_EXIT; - } -#endif - -#endif - - return FALSE; - - -} - -//add iot case here: for MP/CE -VOID -ODM_EdcaParaSelByIot( - IN PDM_ODM_T pDM_Odm, - OUT u4Byte *EDCA_BE_UL, - OUT u4Byte *EDCA_BE_DL - ) -{ - - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u4Byte IOTPeer=0; - u4Byte ICType=pDM_Odm->SupportICType; - u1Byte WirelessMode=0xFF; //invalid value - u4Byte RFType=pDM_Odm->RFType; - -#if(DM_ODM_SUPPORT_TYPE==ODM_MP) - PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); - PADAPTER pExtAdapter = GetFirstExtAdapter(Adapter);//NULL; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; - -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - #ifdef CONFIG_BT_COEXIST - struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); - #endif - u1Byte bbtchange =FALSE; -#endif - - if(pDM_Odm->pWirelessMode!=NULL) - WirelessMode=*(pDM_Odm->pWirelessMode); - -/////////////////////////////////////////////////////////// -////list paramter for different platform -#if (DM_ODM_SUPPORT_TYPE==ODM_MP) - IOTPeer=pMgntInfo->IOTPeer; - GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); - -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - IOTPeer=pmlmeinfo->assoc_AP_vendor; - #ifdef CONFIG_BT_COEXIST - if(pbtpriv->BT_Coexist) - { - if( (pbtpriv->BT_EDCA[UP_LINK]!=0) || (pbtpriv->BT_EDCA[DOWN_LINK]!=0)) - bbtchange = TRUE; - } - #endif - -#endif - - if(ICType==ODM_RTL8192D) - { - // Single PHY - if(pDM_Odm->RFType==ODM_2T2R) - { - (*EDCA_BE_UL) = 0x60a42b; //0x5ea42b; - (*EDCA_BE_DL) = 0x60a42b; //0x5ea42b; - - } - else - { - (*EDCA_BE_UL) = 0x6ea42b; - (*EDCA_BE_DL) = 0x6ea42b; - } - - } -////============================ -/// IOT case for MP -////============================ -#if (DM_ODM_SUPPORT_TYPE==ODM_MP) - else - { - - if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE){ - if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) { - (*EDCA_BE_UL) = 0x60a42b; - (*EDCA_BE_DL) = 0x60a42b; - } - else - { - (*EDCA_BE_UL) = 0x6ea42b; - (*EDCA_BE_DL) = 0x6ea42b; - } - } - } - - if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) - { - (*EDCA_BE_UL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[ExtAdapter->MgntInfo.IOTPeer]; - (*EDCA_BE_DL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[ExtAdapter->MgntInfo.IOTPeer]; - } - - #if (INTEL_PROXIMITY_SUPPORT == 1) - if(pMgntInfo->IntelClassModeInfo.bEnableCA == TRUE) - { - (*EDCA_BE_UL) = (*EDCA_BE_DL) = 0xa44f; - } - else - #endif - { - if((!pMgntInfo->bDisableFrameBursting) && - (pMgntInfo->IOTAction & (HT_IOT_ACT_FORCED_ENABLE_BE_TXOP|HT_IOT_ACT_AMSDU_ENABLE))) - {// To check whether we shall force turn on TXOP configuration. - if(!((*EDCA_BE_UL) & 0xffff0000)) - (*EDCA_BE_UL) |= 0x005e0000; // Force TxOP limit to 0x005e for UL. - if(!((*EDCA_BE_DL) & 0xffff0000)) - (*EDCA_BE_DL) |= 0x005e0000; // Force TxOP limit to 0x005e for DL. - } - - //92D txop can't be set to 0x3e for cisco1250 - if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) - { - (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; - (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; - } - //merge from 92s_92c_merge temp brunch v2445 20120215 - else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B))) - { - (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer]; - } - else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A))) - { - (*EDCA_BE_DL) = 0xa630; - } - - else if(IOTPeer == HT_IOT_PEER_MARVELL) - { - (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; - (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; - } - else if(IOTPeer == HT_IOT_PEER_ATHEROS) - { - // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. - (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; - } - } -////============================ -/// IOT case for CE -////============================ -#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) - - if(RFType==ODM_RTL8192D) - { - if((IOTPeer == HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) - { - (*EDCA_BE_UL) = EDCAParam[IOTPeer][UP_LINK]; - (*EDCA_BE_DL)=EDCAParam[IOTPeer][DOWN_LINK]; - } - else if((IOTPeer == HT_IOT_PEER_AIRGO) && - ((WirelessMode==ODM_WM_B)||(WirelessMode==(ODM_WM_B|ODM_WM_G)))) - (*EDCA_BE_DL)=0x00a630; - - else if((IOTPeer== HT_IOT_PEER_ATHEROS) && - (WirelessMode&ODM_WM_N5G) && - (Adapter->securitypriv.dot11PrivacyAlgrthm == _AES_ )) - (*EDCA_BE_DL)=0xa42b; - - } - //92C IOT case: - else - { - #ifdef CONFIG_BT_COEXIST - if(bbtchange) - { - (*EDCA_BE_UL) = pbtpriv->BT_EDCA[UP_LINK]; - (*EDCA_BE_DL) = pbtpriv->BT_EDCA[DOWN_LINK]; - } - else - #endif - { - if((IOTPeer == HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) - { - (*EDCA_BE_UL) = EDCAParam[IOTPeer][UP_LINK]; - (*EDCA_BE_DL)=EDCAParam[IOTPeer][DOWN_LINK]; - } - else - { - (*EDCA_BE_UL)=EDCAParam[HT_IOT_PEER_UNKNOWN][UP_LINK]; - (*EDCA_BE_DL)=EDCAParam[HT_IOT_PEER_UNKNOWN][DOWN_LINK]; - } - } - if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE){ - if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) - { - (*EDCA_BE_UL) = 0x60a42b; - (*EDCA_BE_DL) = 0x60a42b; - } - else - { - (*EDCA_BE_UL) = 0x6ea42b; - (*EDCA_BE_DL) = 0x6ea42b; - } - } - - } -#endif - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Special: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx",(*EDCA_BE_UL),(*EDCA_BE_DL))); - -} - - -VOID -odm_EdcaChooseTrafficIdx( - IN PDM_ODM_T pDM_Odm, - IN u8Byte cur_tx_bytes, - IN u8Byte cur_rx_bytes, - IN BOOLEAN bBiasOnRx, - OUT BOOLEAN *pbIsCurRDLState - ) -{ - - - if(bBiasOnRx) - { - - if(cur_tx_bytes>(cur_rx_bytes*4)) - { - *pbIsCurRDLState=FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Uplink Traffic\n ")); - - } - else - { - *pbIsCurRDLState=TRUE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); - - } - } - else - { - if(cur_rx_bytes>(cur_tx_bytes*4)) - { - *pbIsCurRDLState=TRUE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Downlink Traffic\n")); - - } - else - { - *pbIsCurRDLState=FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); - } - } - - return ; -} - -#endif - -#if((DM_ODM_SUPPORT_TYPE==ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) - -void odm_EdcaParaInit( - IN PDM_ODM_T pDM_Odm - ) -{ - prtl8192cd_priv priv = pDM_Odm->priv; - int mode=priv->pmib->dot11BssType.net_work_type; - - static unsigned int slot_time, VO_TXOP, VI_TXOP, sifs_time; - struct ParaRecord EDCA[4]; - - memset(EDCA, 0, 4*sizeof(struct ParaRecord)); - - sifs_time = 10; - slot_time = 20; - - if (mode & (ODM_WM_N24G|ODM_WM_N5G)) - sifs_time = 16; - - if (mode & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G|ODM_WM_A)) - slot_time = 9; - - -#if((defined(RTL_MANUAL_EDCA))&&(DM_ODM_SUPPORT_TYPE==ODM_AP)) - if( priv->pmib->dot11QosEntry.ManualEDCA ) { - if( OPMODE & WIFI_AP_STATE ) - memcpy(EDCA, priv->pmib->dot11QosEntry.AP_manualEDCA, 4*sizeof(struct ParaRecord)); - else - memcpy(EDCA, priv->pmib->dot11QosEntry.STA_manualEDCA, 4*sizeof(struct ParaRecord)); - - #ifdef WIFI_WMM - if (QOS_ENABLE) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); - else - #endif - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); - - }else - #endif //RTL_MANUAL_EDCA - { - - if(OPMODE & WIFI_AP_STATE) - { - memcpy(EDCA, rtl_ap_EDCA, 2*sizeof(struct ParaRecord)); - - if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G)) - memcpy(&EDCA[VI], &rtl_ap_EDCA[VI_AG], 2*sizeof(struct ParaRecord)); - else - memcpy(&EDCA[VI], &rtl_ap_EDCA[VI], 2*sizeof(struct ParaRecord)); - } - else - { - memcpy(EDCA, rtl_sta_EDCA, 2*sizeof(struct ParaRecord)); - - if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G)) - memcpy(&EDCA[VI], &rtl_sta_EDCA[VI_AG], 2*sizeof(struct ParaRecord)); - else - memcpy(&EDCA[VI], &rtl_sta_EDCA[VI], 2*sizeof(struct ParaRecord)); - } - - #ifdef WIFI_WMM - if (QOS_ENABLE) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); - else - #endif - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); -#elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + 2* slot_time)); -#endif - - - } - - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VO_PARAM, (EDCA[VO].TXOPlimit<< 16) | (EDCA[VO].ECWmax<< 12) | (EDCA[VO].ECWmin<< 8) | (sifs_time + EDCA[VO].AIFSN* slot_time)); - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[BE].AIFSN* slot_time)); - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (EDCA[BK].TXOPlimit<< 16) | (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[BK].AIFSN* slot_time)); -// ODM_Write1Byte(pDM_Odm,ACMHWCTRL, 0x00); - - priv->pshare->iot_mode_enable = 0; -#if(DM_ODM_SUPPORT_TYPE==ODM_AP) - if (priv->pshare->rf_ft_var.wifi_beq_iot) - priv->pshare->iot_mode_VI_exist = 0; - - #ifdef WMM_VIBE_PRI - priv->pshare->iot_mode_BE_exist = 0; - #endif - - #ifdef LOW_TP_TXOP - priv->pshare->BE_cwmax_enhance = 0; - #endif - -#elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL) - priv->pshare->iot_mode_BE_exist = 0; -#endif - priv->pshare->iot_mode_VO_exist = 0; -} - -BOOLEAN -ODM_ChooseIotMainSTA( - IN PDM_ODM_T pDM_Odm, - IN PSTA_INFO_T pstat - ) -{ - prtl8192cd_priv priv = pDM_Odm->priv; - BOOLEAN bhighTP_found_pstat=FALSE; - - if ((GET_ROOT(priv)->up_time % 2) == 0) { - unsigned int tx_2s_avg = 0; - unsigned int rx_2s_avg = 0; - int i=0, aggReady=0; - unsigned long total_sum = (priv->pshare->current_tx_bytes+priv->pshare->current_rx_bytes); - - pstat->current_tx_bytes += pstat->tx_byte_cnt; - pstat->current_rx_bytes += pstat->rx_byte_cnt; - - if (total_sum != 0) { - if (total_sum <= 100) { - tx_2s_avg = (unsigned int)((pstat->current_tx_bytes*100) / total_sum); - rx_2s_avg = (unsigned int)((pstat->current_rx_bytes*100) / total_sum); - } else { - tx_2s_avg = (unsigned int)(pstat->current_tx_bytes / (total_sum / 100)); - rx_2s_avg = (unsigned int)(pstat->current_rx_bytes / (total_sum / 100)); - } - - } - -#if(DM_ODM_SUPPORT_TYPE==ODM_ADSL) - if (pstat->ht_cap_len) { - if ((tx_2s_avg + rx_2s_avg) >=25 /*50*/) { - - priv->pshare->highTP_found_pstat = pstat; - bhighTP_found_pstat=TRUE; - } - } -#elif(DM_ODM_SUPPORT_TYPE==ODM_AP) - for(i=0; i<8; i++) - aggReady += (pstat->ADDBA_ready[i]); - if (pstat->ht_cap_len && aggReady) - { - if ((tx_2s_avg + rx_2s_avg >= 25)) { - priv->pshare->highTP_found_pstat = pstat; - } - - #ifdef CLIENT_MODE - if (OPMODE & WIFI_STATION_STATE) { -#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) - if ((pstat->IOTPeer==HT_IOT_PEER_RALINK) && ((tx_2s_avg + rx_2s_avg) >= 45)) -#else - if(pstat->is_ralink_sta && ((tx_2s_avg + rx_2s_avg) >= 45)) -#endif - priv->pshare->highTP_found_pstat = pstat; - } - #endif - } -#endif - } else { - pstat->current_tx_bytes = pstat->tx_byte_cnt; - pstat->current_rx_bytes = pstat->rx_byte_cnt; - } - - return bhighTP_found_pstat; -} - - -#ifdef WIFI_WMM -VOID -ODM_IotEdcaSwitch( - IN PDM_ODM_T pDM_Odm, - IN unsigned char enable - ) -{ - prtl8192cd_priv priv = pDM_Odm->priv; - int mode=priv->pmib->dot11BssType.net_work_type; - unsigned int slot_time = 20, sifs_time = 10, BE_TXOP = 47, VI_TXOP = 94; - unsigned int vi_cw_max = 4, vi_cw_min = 3, vi_aifs; - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - if (!(!priv->pmib->dot11OperationEntry.wifi_specific || - ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - #ifdef CLIENT_MODE - || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - #endif - )) - return; -#endif - - if ((mode & (ODM_WM_N24G|ODM_WM_N5G)) && (priv->pshare->ht_sta_num - #ifdef WDS - || ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum) - #endif - )) - sifs_time = 16; - - if (mode & (ODM_WM_N24G|ODM_WM_N5G|ODM_WM_G|ODM_WM_A)) { - slot_time = 9; - } - else - { - BE_TXOP = 94; - VI_TXOP = 188; - } - -#if (DM_ODM_SUPPORT_TYPE==ODM_ADSL) - if (priv->pshare->iot_mode_VO_exist) { - // to separate AC_VI and AC_BE to avoid using the same EDCA settings - if (priv->pshare->iot_mode_BE_exist) { - vi_cw_max = 5; - vi_cw_min = 3; - } else { - vi_cw_max = 6; - vi_cw_min = 4; - } - } - vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); - - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)| (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs); - - -#elif (DM_ODM_SUPPORT_TYPE==ODM_AP) - if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific) { - if (priv->pshare->iot_mode_VO_exist) { - #ifdef WMM_VIBE_PRI - if (priv->pshare->iot_mode_BE_exist) - { - vi_cw_max = 5; - vi_cw_min = 3; - vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); - } - else - #endif - { - vi_cw_max = 6; - vi_cw_min = 4; - vi_aifs = 0x2b; - } - } - else { - vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); - } - - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16) - | (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs); - } -#endif - - - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - if (priv->pshare->rf_ft_var.wifi_beq_iot && priv->pshare->iot_mode_VI_exist) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (10 << 12) | (4 << 8) | 0x4f); - else if(!enable) -#elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) - if(!enable) //if iot is disable ,maintain original BEQ PARAM -#endif - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (((OPMODE & WIFI_AP_STATE)?6:10) << 12) | (4 << 8) - | (sifs_time + 3 * slot_time)); - else - { - int txop_enlarge; - int txop; - unsigned int cw_max; - unsigned int txop_close; - - #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP)) - cw_max = ((priv->pshare->BE_cwmax_enhance) ? 10 : 6); - txop_close = ((priv->pshare->rf_ft_var.low_tp_txop && priv->pshare->rf_ft_var.low_tp_txop_close) ? 1 : 0); - - if(priv->pshare->txop_enlarge == 0xe) //if intel case - txop = (txop_close ? 0 : (BE_TXOP*2)); - else //if other case - txop = (txop_close ? 0: (BE_TXOP*priv->pshare->txop_enlarge)); - #else - cw_max=6; - if((priv->pshare->txop_enlarge==0xe)||(priv->pshare->txop_enlarge==0xd)) - txop=BE_TXOP*2; - else - txop=BE_TXOP*priv->pshare->txop_enlarge; - - #endif - - if (priv->pshare->ht_sta_num - #ifdef WDS - || ((OPMODE & WIFI_AP_STATE) && (mode & (ODM_WM_N24G|ODM_WM_N5G)) && - priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum) - #endif - ) - { - - if (priv->pshare->txop_enlarge == 0xe) { - // is intel client, use a different edca value - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop<< 16) | (cw_max<< 12) | (4 << 8) | 0x1f); - priv->pshare->txop_enlarge = 2; - } -#if(DM_ODM_SUPPORT_TYPE==ODM_AP) - #ifndef LOW_TP_TXOP - else if (priv->pshare->txop_enlarge == 0xd) { - // is intel ralink, use a different edca value - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (4 << 12) | (3 << 8) | 0x19); - priv->pshare->txop_enlarge = 2; - } - #endif -#endif - else - { - if (pDM_Odm->RFType==ODM_2T2R) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | - (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); - else - #if(DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | - (((priv->pshare->BE_cwmax_enhance) ? 10 : 5) << 12) | (3 << 8) | (sifs_time + 2 * slot_time)); - #else - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | - (5 << 12) | (3 << 8) | (sifs_time + 2 * slot_time)); - - #endif - } - } - else - { - #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP)) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); - #else - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP*2 << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); - #endif - } - - } -} -#endif - -VOID -odm_IotEngine( - IN PDM_ODM_T pDM_Odm - ) -{ - - struct rtl8192cd_priv *priv=pDM_Odm->priv; - PSTA_INFO_T pstat = NULL; - u4Byte i; - -#ifdef WIFI_WMM - unsigned int switch_turbo = 0; -#endif -//////////////////////////////////////////////////////// -// if EDCA Turbo function is not supported or Manual EDCA Setting -// then return -//////////////////////////////////////////////////////// - if(!(pDM_Odm->SupportAbility&ODM_MAC_EDCA_TURBO)){ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO NOT SUPPORTED\n")); - return; - } - -#if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined(RTL_MANUAL_EDCA) && defined(WIFI_WMM)) - if(priv->pmib->dot11QosEntry.ManualEDCA){ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: MANUAL SETTING\n")); - return ; - } -#endif - -#if !(DM_ODM_SUPPORT_TYPE &ODM_AP) - ////////////////////////////////////////////////////// - //find high TP STA every 2s -////////////////////////////////////////////////////// - if ((GET_ROOT(priv)->up_time % 2) == 0) - priv->pshare->highTP_found_pstat==NULL; - -#if 0 - phead = &priv->asoc_list; - plist = phead->next; - while(plist != phead) { - pstat = list_entry(plist, struct stat_info, asoc_list); - - if(ODM_ChooseIotMainSTA(pDM_Odm, pstat)); //find the correct station - break; - if (plist == plist->next) //the last plist - break; - plist = plist->next; - }; -#endif - - //find highTP STA - for(i=0; ipODM_StaInfo[i]; - if(IS_STA_VALID(pstat) && (ODM_ChooseIotMainSTA(pDM_Odm, pstat))) //find the correct station - break; - } - - ////////////////////////////////////////////////////// - //if highTP STA is not found, then return - ////////////////////////////////////////////////////// - if(priv->pshare->highTP_found_pstat==NULL) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: NO HT STA FOUND\n")); - return; - } -#endif - - pstat=priv->pshare->highTP_found_pstat; - - -#ifdef WIFI_WMM - if (QOS_ENABLE) { - if (!priv->pmib->dot11OperationEntry.wifi_specific - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - ||((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - #elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) - || (priv->pmib->dot11OperationEntry.wifi_specific == 2) - #endif - ) { - if (priv->pshare->iot_mode_enable && - ((priv->pshare->phw->VO_pkt_count > 50) || - (priv->pshare->phw->VI_pkt_count > 50) || - (priv->pshare->phw->BK_pkt_count > 50))) { - priv->pshare->iot_mode_enable = 0; - switch_turbo++; - } else if ((!priv->pshare->iot_mode_enable) && - ((priv->pshare->phw->VO_pkt_count < 50) && - (priv->pshare->phw->VI_pkt_count < 50) && - (priv->pshare->phw->BK_pkt_count < 50))) { - priv->pshare->iot_mode_enable++; - switch_turbo++; - } - } - - - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific) - #elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL) - if (priv->pmib->dot11OperationEntry.wifi_specific) - #endif - { - if (!priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count > 50)) { - priv->pshare->iot_mode_VO_exist++; - switch_turbo++; - } else if (priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count < 50)) { - priv->pshare->iot_mode_VO_exist = 0; - switch_turbo++; - } -#if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI))) - if (priv->pshare->iot_mode_VO_exist) { - //printk("[%s %d] BE_pkt_count=%d\n", __FUNCTION__, __LINE__, priv->pshare->phw->BE_pkt_count); - if (!priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count > 250)) { - priv->pshare->iot_mode_BE_exist++; - switch_turbo++; - } else if (priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count < 250)) { - priv->pshare->iot_mode_BE_exist = 0; - switch_turbo++; - } - } -#endif - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - if (priv->pshare->rf_ft_var.wifi_beq_iot) - { - if (!priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count > 50)) { - priv->pshare->iot_mode_VI_exist++; - switch_turbo++; - } else if (priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count < 50)) { - priv->pshare->iot_mode_VI_exist = 0; - switch_turbo++; - } - } -#endif - - } - else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower) { - if (priv->pshare->txop_enlarge) { - priv->pshare->txop_enlarge = 0; - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } - } - -#if(defined(CLIENT_MODE) && (DM_ODM_SUPPORT_TYPE==ODM_AP)) - if ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - { - if (priv->pshare->iot_mode_enable && - (((priv->pshare->phw->VO_pkt_count > 50) || - (priv->pshare->phw->VI_pkt_count > 50) || - (priv->pshare->phw->BK_pkt_count > 50)) || - (pstat && (!pstat->ADDBA_ready[0]) & (!pstat->ADDBA_ready[3])))) - { - priv->pshare->iot_mode_enable = 0; - switch_turbo++; - } - else if ((!priv->pshare->iot_mode_enable) && - (((priv->pshare->phw->VO_pkt_count < 50) && - (priv->pshare->phw->VI_pkt_count < 50) && - (priv->pshare->phw->BK_pkt_count < 50)) && - (pstat && (pstat->ADDBA_ready[0] | pstat->ADDBA_ready[3])))) - { - priv->pshare->iot_mode_enable++; - switch_turbo++; - } - } -#endif - - priv->pshare->phw->VO_pkt_count = 0; - priv->pshare->phw->VI_pkt_count = 0; - priv->pshare->phw->BK_pkt_count = 0; - - #if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI))) - priv->pshare->phw->BE_pkt_count = 0; - #endif - - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - if (priv->pshare->rf_ft_var.wifi_beq_iot) - priv->pshare->phw->VI_rx_pkt_count = 0; - #endif - - } -#endif - - if ((priv->up_time % 2) == 0) { - /* - * decide EDCA content for different chip vendor - */ -#ifdef WIFI_WMM - #if(DM_ODM_SUPPORT_TYPE==ODM_ADSL) - if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2) - - #elif(DM_ODM_SUPPORT_TYPE==ODM_AP) - if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific || - ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - #ifdef CLIENT_MODE - || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - #endif - #endif - )) - - { - - if (pstat && pstat->rssi >= priv->pshare->rf_ft_var.txop_enlarge_upper) { -#ifdef LOW_TP_TXOP -#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) - if (pstat->IOTPeer==HT_IOT_PEER_INTEL) -#else - if (pstat->is_intel_sta) -#endif - { - if (priv->pshare->txop_enlarge != 0xe) - { - priv->pshare->txop_enlarge = 0xe; - - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } - } - else if (priv->pshare->txop_enlarge != 2) - { - priv->pshare->txop_enlarge = 2; - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } -#else - if (priv->pshare->txop_enlarge != 2) - { -#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) - if (pstat->IOTPeer==HT_IOT_PEER_INTEL) -#else - if (pstat->is_intel_sta) -#endif - priv->pshare->txop_enlarge = 0xe; -#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) - else if (pstat->IOTPeer==HT_IOT_PEER_RALINK) -#else - else if (pstat->is_ralink_sta) -#endif - priv->pshare->txop_enlarge = 0xd; - else - priv->pshare->txop_enlarge = 2; - - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } -#endif -#if 0 - if (priv->pshare->txop_enlarge != 2) - { - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - if (pstat->IOTPeer==HT_IOT_PEER_INTEL) - #else - if (pstat->is_intel_sta) - #endif - priv->pshare->txop_enlarge = 0xe; - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - else if (pstat->IOTPeer==HT_IOT_PEER_RALINK) - priv->pshare->txop_enlarge = 0xd; - #endif - else - priv->pshare->txop_enlarge = 2; - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } -#endif - } - else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower) - { - if (priv->pshare->txop_enlarge) { - priv->pshare->txop_enlarge = 0; - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } - } - -#if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&( defined LOW_TP_TXOP)) - // for Intel IOT, need to enlarge CW MAX from 6 to 10 - if (pstat && pstat->is_intel_sta && (((pstat->tx_avarage+pstat->rx_avarage)>>10) < - priv->pshare->rf_ft_var.cwmax_enhance_thd)) - { - if (!priv->pshare->BE_cwmax_enhance && priv->pshare->iot_mode_enable) - { - priv->pshare->BE_cwmax_enhance = 1; - switch_turbo++; - } - } else { - if (priv->pshare->BE_cwmax_enhance) { - priv->pshare->BE_cwmax_enhance = 0; - switch_turbo++; - } - } -#endif - } -#endif - priv->pshare->current_tx_bytes = 0; - priv->pshare->current_rx_bytes = 0; - } - -#if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined( SW_TX_QUEUE)) - if ((priv->assoc_num > 1) && (AMPDU_ENABLE)) - { - if (priv->swq_txmac_chg >= priv->pshare->rf_ft_var.swq_en_highthd){ - if ((priv->swq_en == 0)){ - switch_turbo++; - if (priv->pshare->txop_enlarge == 0) - priv->pshare->txop_enlarge = 2; - priv->swq_en = 1; - } - else - { - if ((switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) - { - priv->pshare->txop_enlarge = 2; - switch_turbo--; - } - } - } - else if(priv->swq_txmac_chg <= priv->pshare->rf_ft_var.swq_dis_lowthd){ - priv->swq_en = 0; - } - else if ((priv->swq_en == 1) && (switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) { - priv->pshare->txop_enlarge = 2; - switch_turbo--; - } - } -#endif - -#ifdef WIFI_WMM -#ifdef LOW_TP_TXOP - if ((!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - && QOS_ENABLE) { - if (switch_turbo || priv->pshare->rf_ft_var.low_tp_txop) { - unsigned int thd_tp; - unsigned char under_thd; - unsigned int curr_tp; - - if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G)) - { - // Determine the upper bound throughput threshold. - if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G)) { - if (priv->assoc_num && priv->assoc_num != priv->pshare->ht_sta_num) - thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g; - else - thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_n; - } - else - thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g; - - // Determine to close txop. - curr_tp = (unsigned int)(priv->ext_stats.tx_avarage>>17) + (unsigned int)(priv->ext_stats.rx_avarage>>17); - if (curr_tp <= thd_tp && curr_tp >= priv->pshare->rf_ft_var.low_tp_txop_thd_low) - under_thd = 1; - else - under_thd = 0; - } - else - { - under_thd = 0; - } - - if (switch_turbo) - { - priv->pshare->rf_ft_var.low_tp_txop_close = under_thd; - priv->pshare->rf_ft_var.low_tp_txop_count = 0; - } - else if (priv->pshare->iot_mode_enable && (priv->pshare->rf_ft_var.low_tp_txop_close != under_thd)) { - priv->pshare->rf_ft_var.low_tp_txop_count++; - if (priv->pshare->rf_ft_var.low_tp_txop_close) { - priv->pshare->rf_ft_var.low_tp_txop_count = priv->pshare->rf_ft_var.low_tp_txop_delay;; - } - if (priv->pshare->rf_ft_var.low_tp_txop_count ==priv->pshare->rf_ft_var.low_tp_txop_delay) - - { - priv->pshare->rf_ft_var.low_tp_txop_count = 0; - priv->pshare->rf_ft_var.low_tp_txop_close = under_thd; - switch_turbo++; - } - } - else - { - priv->pshare->rf_ft_var.low_tp_txop_count = 0; - } - } - } -#endif - - if (switch_turbo) - ODM_IotEdcaSwitch( pDM_Odm, priv->pshare->iot_mode_enable ); -#endif -} -#endif - - -#if( DM_ODM_SUPPORT_TYPE == ODM_MP) -// -// 2011/07/26 MH Add an API for testing IQK fail case. -// -BOOLEAN -ODM_CheckPowerStatus( - IN PADAPTER Adapter) -{ - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - RT_RF_POWER_STATE rtState; - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - - // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. - if (pMgntInfo->init_adpt_in_progress == TRUE) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); - return TRUE; - } - - // - // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. - // - Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); - if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", - Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); - return FALSE; - } - return TRUE; -} -#endif - -// need to ODM CE Platform -//move to here for ANT detection mechanism using - -#if ((DM_ODM_SUPPORT_TYPE == ODM_MP)||(DM_ODM_SUPPORT_TYPE == ODM_CE)) -u4Byte -GetPSDData( - IN PDM_ODM_T pDM_Odm, - unsigned int point, - u1Byte initial_gain_psd) -{ - //unsigned int val, rfval; - //int psd_report; - u4Byte psd_report; - - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //Debug Message - //val = PHY_QueryBBReg(Adapter,0x908, bMaskDWord); - //DbgPrint("Reg908 = 0x%x\n",val); - //val = PHY_QueryBBReg(Adapter,0xDF4, bMaskDWord); - //rfval = PHY_QueryRFReg(Adapter, RF_PATH_A, 0x00, bRFRegOffsetMask); - //DbgPrint("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval); - //DbgPrint("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n", - //(val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval); - - //Set DCO frequency index, offset=(40MHz/SamplePts)*point - ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); - - //Start PSD calculation, Reg808[22]=0->1 - ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1); - //Need to wait for HW PSD report - ODM_StallExecution(30); - ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0); - //Read PSD report, Reg8B4[15:0] - psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF; - - psd_report = (u4Byte) (ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c); - - return psd_report; -} - -u4Byte -ConvertTo_dB( - u4Byte Value) -{ - u1Byte i; - u1Byte j; - u4Byte dB; - - Value = Value & 0xFFFF; - - for (i=0;i<8;i++) - { - if (Value <= dB_Invert_Table[i][11]) - { - break; - } - } - - if (i >= 8) - { - return (96); // maximum 96 dB - } - - for (j=0;j<12;j++) - { - if (Value <= dB_Invert_Table[i][j]) - { - break; - } - } - - dB = i*12 + j + 1; - - return (dB); -} - -#endif - -// -// LukeLee: -// PSD function will be moved to FW in future IC, but now is only implemented in MP platform -// So PSD function will not be incorporated to common ODM -// -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -#define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD -#define MODE_40M 0 //0:20M, 1:40M -#define PSD_TH2 3 -#define PSD_CHMIN 20 // Minimum channel number for BT AFH -#define SIR_STEP_SIZE 3 -#define Smooth_Size_1 5 -#define Smooth_TH_1 3 -#define Smooth_Size_2 10 -#define Smooth_TH_2 4 -#define Smooth_Size_3 20 -#define Smooth_TH_3 4 -#define Smooth_Step_Size 5 -#define Adaptive_SIR 1 -//#if(RTL8723_FPGA_VERIFICATION == 1) -//#define PSD_RESCAN 1 -//#else -//#define PSD_RESCAN 4 -//#endif -#define SCAN_INTERVAL 700 //ms -#define SYN_Length 5 // for 92D - -#define LNA_Low_Gain_1 0x64 -#define LNA_Low_Gain_2 0x5A -#define LNA_Low_Gain_3 0x58 - -#define pw_th_10dB 0x0 -#define pw_th_16dB 0x3 - -#define FA_RXHP_TH1 5000 -#define FA_RXHP_TH2 1500 -#define FA_RXHP_TH3 800 -#define FA_RXHP_TH4 600 -#define FA_RXHP_TH5 500 - -#define Idle_Mode 0 -#define High_TP_Mode 1 -#define Low_TP_Mode 2 - - -VOID -odm_PSDMonitorInit( - IN PDM_ODM_T pDM_Odm) -{ -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //PSD Monitor Setting - //Which path in ADC/DAC is turnned on for PSD: both I/Q - ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT10|BIT11, 0x3); - //Ageraged number: 8 - ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT12|BIT13, 0x1); - pDM_Odm->bPSDinProcess = FALSE; - pDM_Odm->bUserAssignLevel = FALSE; - - //pDM_Odm->bDMInitialGainEnable=TRUE; //change the initialization to DIGinit - //Set Debug Port - //PHY_SetBBReg(Adapter, 0x908, bMaskDWord, 0x803); - //PHY_SetBBReg(Adapter, 0xB34, bMaskByte0, 0x00); // pause PSD - //PHY_SetBBReg(Adapter, 0xB38, bMaskByte0, 10); //rescan - //PHY_SetBBReg(Adapter, 0xB38, bMaskByte1, 0x32); // PSDDelay - //PHY_SetBBReg(Adapter, 0xB38, bMaskByte2|bMaskByte3, 100); //interval - - //PlatformSetTimer( Adapter, &pHalData->PSDTriggerTimer, 0); //ms -#endif -} - -VOID -PatchDCTone( - IN PDM_ODM_T pDM_Odm, - pu4Byte PSD_report, - u1Byte initial_gain_psd -) -{ - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //PADAPTER pAdapter; - - u4Byte psd_report; - - //2 Switch to CH11 to patch CH9 and CH13 DC tone - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, 11); - - if(pDM_Odm->SupportICType== ODM_RTL8192D) - { - if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) - { - ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_CHNLBW, 0x3FF, 11); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x25, 0xfffff, 0x643BC); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x26, 0xfffff, 0xFC038); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x27, 0xfffff, 0x77C1A); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x2B, 0xfffff, 0x41289); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x2C, 0xfffff, 0x01840); - } - else - { - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x25, 0xfffff, 0x643BC); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x26, 0xfffff, 0xFC038); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x27, 0xfffff, 0x77C1A); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x2B, 0xfffff, 0x41289); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x2C, 0xfffff, 0x01840); - } - } - - //Ch9 DC tone patch - psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); - PSD_report[50] = psd_report; - //Ch13 DC tone patch - psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); - PSD_report[70] = psd_report; - - //2 Switch to CH3 to patch CH1 and CH5 DC tone - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, 3); - - - if(pDM_Odm->SupportICType==ODM_RTL8192D) - { - if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) - { - ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_CHNLBW, 0x3FF, 3); - //PHY_SetRFReg(Adapter, RF_PATH_B, 0x25, 0xfffff, 0x643BC); - //PHY_SetRFReg(Adapter, RF_PATH_B, 0x26, 0xfffff, 0xFC038); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x27, 0xfffff, 0x07C1A); - //PHY_SetRFReg(Adapter, RF_PATH_B, 0x2B, 0xfffff, 0x61289); - //PHY_SetRFReg(Adapter, RF_PATH_B, 0x2C, 0xfffff, 0x01C41); - } - else - { - //PHY_SetRFReg(Adapter, RF_PATH_A, 0x25, 0xfffff, 0x643BC); - //PHY_SetRFReg(Adapter, RF_PATH_A, 0x26, 0xfffff, 0xFC038); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x27, 0xfffff, 0x07C1A); - //PHY_SetRFReg(Adapter, RF_PATH_A, 0x2B, 0xfffff, 0x61289); - //PHY_SetRFReg(Adapter, RF_PATH_A, 0x2C, 0xfffff, 0x01C41); - } - } - - //Ch1 DC tone patch - psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); - PSD_report[10] = psd_report; - //Ch5 DC tone patch - psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); - PSD_report[30] = psd_report; - -} - - -VOID -GoodChannelDecision( - PDM_ODM_T pDM_Odm, - ps4Byte PSD_report, - pu1Byte PSD_bitmap, - u1Byte RSSI_BT, - pu1Byte PSD_bitmap_memory) -{ - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - //s4Byte TH1 = SSBT-0x15; // modify TH by Neil Chen - s4Byte TH1= RSSI_BT+0x14; - s4Byte TH2 = RSSI_BT+85; - //u2Byte TH3; -// s4Byte RegB34; - u1Byte bitmap, Smooth_size[3], Smooth_TH[3]; - //u1Byte psd_bit; - u4Byte i,n,j, byte_idx, bit_idx, good_cnt, good_cnt_smoothing, Smooth_Interval[3]; - int start_byte_idx,start_bit_idx,cur_byte_idx, cur_bit_idx,NOW_byte_idx ; - -// RegB34 = PHY_QueryBBReg(Adapter,0xB34, bMaskDWord)&0xFF; - - if((pDM_Odm->SupportICType == ODM_RTL8192C)||(pDM_Odm->SupportICType == ODM_RTL8192D)) - { - TH1 = RSSI_BT + 0x14; - } - - Smooth_size[0]=Smooth_Size_1; - Smooth_size[1]=Smooth_Size_2; - Smooth_size[2]=Smooth_Size_3; - Smooth_TH[0]=Smooth_TH_1; - Smooth_TH[1]=Smooth_TH_2; - Smooth_TH[2]=Smooth_TH_3; - Smooth_Interval[0]=16; - Smooth_Interval[1]=15; - Smooth_Interval[2]=13; - good_cnt = 0; - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - //2 Threshold - - if(RSSI_BT >=41) - TH1 = 113; - else if(RSSI_BT >=38) // >= -15dBm - TH1 = 105; //0x69 - else if((RSSI_BT >=33)&(RSSI_BT <38)) - TH1 = 99+(RSSI_BT-33); //0x63 - else if((RSSI_BT >=26)&(RSSI_BT<33)) - TH1 = 99-(33-RSSI_BT)+2; //0x5e - else if((RSSI_BT >=24)&(RSSI_BT<26)) - TH1 = 88-((RSSI_BT-24)*3); //0x58 - else if((RSSI_BT >=18)&(RSSI_BT<24)) - TH1 = 77+((RSSI_BT-18)*2); - else if((RSSI_BT >=14)&(RSSI_BT<18)) - TH1 = 63+((RSSI_BT-14)*2); - else if((RSSI_BT >=8)&(RSSI_BT<14)) - TH1 = 58+((RSSI_BT-8)*2); - else if((RSSI_BT >=3)&(RSSI_BT<8)) - TH1 = 52+(RSSI_BT-3); - else - TH1 = 51; - } - - for (i = 0; i< 10; i++) - PSD_bitmap[i] = 0; - - - // Add By Gary - for (i=0; i<80; i++) - pRX_HP_Table->PSD_bitmap_RXHP[i] = 0; - // End - - - - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - TH1 =TH1-SIR_STEP_SIZE; - } - while (good_cnt < PSD_CHMIN) - { - good_cnt = 0; - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - if(TH1 ==TH2) - break; - if((TH1+SIR_STEP_SIZE) < TH2) - TH1 += SIR_STEP_SIZE; - else - TH1 = TH2; - } - else - { - if(TH1==(RSSI_BT+0x1E)) - break; - if((TH1+2) < (RSSI_BT+0x1E)) - TH1+=3; - else - TH1 = RSSI_BT+0x1E; - - } - ODM_RT_TRACE(pDM_Odm,COMP_PSD,DBG_LOUD,("PSD: decision threshold is: %d", TH1)); - - for (i = 0; i< 80; i++) - { - if(PSD_report[i] < TH1) - { - byte_idx = i / 8; - bit_idx = i -8*byte_idx; - bitmap = PSD_bitmap[byte_idx]; - PSD_bitmap[byte_idx] = bitmap | (u1Byte) (1 << bit_idx); - } - } - -#if DBG - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: before smoothing\n")); - for(n=0;n<10;n++) - { - //DbgPrint("PSD_bitmap[%u]=%x\n", n, PSD_bitmap[n]); - for (i = 0; i<8; i++) - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); - } -#endif - - //1 Start of smoothing function - - for (j=0;j<3;j++) - { - start_byte_idx=0; - start_bit_idx=0; - for(n=0; n 7 ) - { - start_byte_idx= start_byte_idx+start_bit_idx/8; - start_bit_idx = start_bit_idx%8; - } - } - - ODM_RT_TRACE( pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: after %u smoothing", j+1)); - for(n=0;n<10;n++) - { - for (i = 0; i<8; i++) - { - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); - - if ( ((PSD_bitmap[n]&BIT(i))>>i) ==1) //----- Add By Gary - { - pRX_HP_Table->PSD_bitmap_RXHP[8*n+i] = 1; - } // ------end by Gary - } - } - - } - - - good_cnt = 0; - for ( i = 0; i < 10; i++) - { - for (n = 0; n < 8; n++) - if((PSD_bitmap[i]& BIT(n)) != 0) - good_cnt++; - } - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: good channel cnt = %u",good_cnt)); - } - - //RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: SSBT=%d, TH2=%d, TH1=%d",SSBT,TH2,TH1)); - for (i = 0; i <10; i++) - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: PSD_bitmap[%u]=%x",i,PSD_bitmap[i])); -/* - //Update bitmap memory - for(i = 0; i < 80; i++) - { - byte_idx = i / 8; - bit_idx = i -8*byte_idx; - psd_bit = (PSD_bitmap[byte_idx] & BIT(bit_idx)) >> bit_idx; - bitmap = PSD_bitmap_memory[i]; - PSD_bitmap_memory[i] = (bitmap << 1) |psd_bit; - } -*/ -} - - - -VOID -odm_PSD_Monitor( - PDM_ODM_T pDM_Odm -) -{ - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - - unsigned int pts, start_point, stop_point, initial_gain ; - static u1Byte PSD_bitmap_memory[80], init_memory = 0; - static u1Byte psd_cnt=0; - static u4Byte PSD_report[80], PSD_report_tmp; - static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; - u1Byte H2C_PSD_DATA[5]={0,0,0,0,0}; - static u1Byte H2C_PSD_DATA_last[5] ={0,0,0,0,0}; - u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, - 0,3,6,10,13,16,19,22,26,29}; - u1Byte n, i, channel, BBReset,tone_idx; - u1Byte PSD_bitmap[10], SSBT=0,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; - s4Byte PSD_skip_start, PSD_skip_stop; - u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; - u4Byte ReScan, Interval, Is40MHz; - u8Byte curTxOkCnt, curRxOkCnt; - int cur_byte_idx, cur_bit_idx; - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - //--------------2G band synthesizer for 92D switch RF channel using----------------- - u1Byte group_idx=0; - u4Byte SYN_RF25=0, SYN_RF26=0, SYN_RF27=0, SYN_RF2B=0, SYN_RF2C=0; - u4Byte SYN[5] = {0x25, 0x26, 0x27, 0x2B, 0x2C}; // synthesizer RF register for 2G channel - u4Byte SYN_group[3][5] = {{0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840}, // For CH1,2,4,9,10.11.12 {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840} - {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840}, // For CH3,13,14 - {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}}; // For Ch5,6,7,8 - //--------------------- Add by Gary for Debug setting ---------------------- - s4Byte psd_result = 0; - u1Byte RSSI_BT_new = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB9C, 0xFF); - u1Byte rssi_ctrl = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB38, 0xFF); - //--------------------------------------------------------------------- - - if(*(pDM_Odm->pbScanInProcess)) - { - if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) - { - //pHalData->bPSDactive=FALSE; - //ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 100 ) - ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 900); //ms - //psd_cnt=0; - } - return; - } - - ReScan = PSD_RESCAN; - Interval = SCAN_INTERVAL; - - - //1 Initialization - if(init_memory == 0) - { - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("Init memory\n")); - for(i = 0; i < 80; i++) - PSD_bitmap_memory[i] = 0xFF; // channel is always good - init_memory = 1; - } - if(psd_cnt == 0) - { - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); - for(i = 0; i < 80; i++) - PSD_report[i] = 0; - } -#if 0 //for test only - DbgPrint("cosa odm_PSD_Monitor call()\n"); - DbgPrint("cosa pHalData->RSSI_BT = %d\n", pHalData->RSSI_BT); - DbgPrint("cosa pHalData->bUserAssignLevel = %d\n", pHalData->bUserAssignLevel); -#if 0 - psd_cnt++; - if (psd_cnt < ReScan) - PlatformSetTimer( Adapter, &pHalData->PSDTimer, Interval); //ms - else - psd_cnt = 0; - return; -#endif -#endif - //1 Backup Current Settings - CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); -/* - if(pDM_Odm->SupportICType==ODM_RTL8192D) - { - //2 Record Current synthesizer parameters based on current channel - if((*pDM_Odm->MacPhyMode92D == SINGLEMAC_SINGLEPHY)||(*pDM_Odm->MacPhyMode92D == DUALMAC_SINGLEPHY)) - { - SYN_RF25 = ODM_GetRFReg(Adapter, RF_PATH_B, 0x25, bMaskDWord); - SYN_RF26 = ODM_GetRFReg(Adapter, RF_PATH_B, 0x26, bMaskDWord); - SYN_RF27 = ODM_GetRFReg(Adapter, RF_PATH_B, 0x27, bMaskDWord); - SYN_RF2B = ODM_GetRFReg(Adapter, RF_PATH_B, 0x2B, bMaskDWord); - SYN_RF2C = ODM_GetRFReg(Adapter, RF_PATH_B, 0x2C, bMaskDWord); - } - else // DualMAC_DualPHY 2G - { - SYN_RF25 = ODM_GetRFReg(Adapter, RF_PATH_A, 0x25, bMaskDWord); - SYN_RF26 = ODM_GetRFReg(Adapter, RF_PATH_A, 0x26, bMaskDWord); - SYN_RF27 = ODM_GetRFReg(Adapter, RF_PATH_A, 0x27, bMaskDWord); - SYN_RF2B = ODM_GetRFReg(Adapter, RF_PATH_A, 0x2B, bMaskDWord); - SYN_RF2C = ODM_GetRFReg(Adapter, RF_PATH_A, 0x2C, bMaskDWord); - } - } -*/ - //RXIQI = PHY_QueryBBReg(Adapter, 0xC14, bMaskDWord); - RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); - - //RxIdleLowPwr = (PHY_QueryBBReg(Adapter, 0x818, bMaskDWord)&BIT28)>>28; - RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; - - //2??? - Is40MHz = pMgntInfo->pHTInfo->bCurBW40MHz; - - ODM_RT_TRACE(pDM_Odm, COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); - //1 Turn off CCK - //PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT24, 0); - ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); - //1 Turn off TX - //Pause TX Queue - //PlatformEFIOWrite1Byte(Adapter, REG_TXPAUSE, 0xFF); - ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0xFF); - - //Force RX to stop TX immediately - //PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); - - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); - //1 Turn off RX - //Rx AGC off RegC70[0]=0, RegC7C[20]=0 - //PHY_SetBBReg(Adapter, 0xC70, BIT0, 0); - //PHY_SetBBReg(Adapter, 0xC7C, BIT20, 0); - - ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); - ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); - - - //Turn off CCA - //PHY_SetBBReg(Adapter, 0xC14, bMaskDWord, 0x0); - ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); - - //BB Reset - //BBReset = PlatformEFIORead1Byte(Adapter, 0x02); - BBReset = ODM_Read1Byte(pDM_Odm, 0x02); - - //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset&(~BIT0)); - //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset|BIT0); - - ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); - ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); - - //1 Leave RX idle low power - //PHY_SetBBReg(Adapter, 0x818, BIT28, 0x0); - - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); - //1 Fix initial gain - //if (IS_HARDWARE_TYPE_8723AE(Adapter)) - //RSSI_BT = pHalData->RSSI_BT; - //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary - // RSSI_BT = RSSI_BT_new; - - if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) - RSSI_BT=pDM_Odm->RSSI_BT; //need to check C2H to pDM_Odm RSSI BT - - else if((pDM_Odm->SupportICType==ODM_RTL8192C)||(pDM_Odm->SupportICType==ODM_RTL8192D)) - RSSI_BT = RSSI_BT_new; - - - - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); - - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - //Neil add--2011--10--12 - //2 Initial Gain index - if(RSSI_BT >=35) // >= -15dBm - initial_gain_psd = RSSI_BT*2; - else if((RSSI_BT >=33)&(RSSI_BT<35)) - initial_gain_psd = RSSI_BT*2+6; - else if((RSSI_BT >=24)&(RSSI_BT<33)) - initial_gain_psd = 70-(31-RSSI_BT); - else if((RSSI_BT >=19)&(RSSI_BT<24)) - initial_gain_psd = 64-((24-RSSI_BT)*4); - else if((RSSI_BT >=14)&(RSSI_BT<19)) - initial_gain_psd = 44-((18-RSSI_BT)*2); - else if((RSSI_BT >=8)&(RSSI_BT<14)) - initial_gain_psd = 35-(14-RSSI_BT); - else - initial_gain_psd = 0x1B; - } - else - { - if(rssi_ctrl == 1) // just for debug!! - initial_gain_psd = RSSI_BT_new ; - else - { - //need to do - initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI - } - } - //if(RSSI_BT<0x17) - // RSSI_BT +=3; - //DbgPrint("PSD: RSSI_BT= %d\n", RSSI_BT); - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); - - //initialGainUpper = 0x5E; //Modify by neil chen - - if(pDM_Odm->bUserAssignLevel) - { - pDM_Odm->bUserAssignLevel = FALSE; - initialGainUpper = 0x7f; - } - else - { - initialGainUpper = 0x5E; - } - - /* - if (initial_gain_psd < 0x1a) - initial_gain_psd = 0x1a; - if (initial_gain_psd > initialGainUpper) - initial_gain_psd = initialGainUpper; - */ - - if(pDM_Odm->SupportICType==ODM_RTL8723A) - SSBT = RSSI_BT * 2 +0x3E; - else if((pDM_Odm->SupportICType==ODM_RTL8192C)||(pDM_Odm->SupportICType==ODM_RTL8192D)) - { - RSSI_BT = initial_gain_psd; - SSBT = RSSI_BT; - } - - //if(IS_HARDWARE_TYPE_8723AE(Adapter)) - // SSBT = RSSI_BT * 2 +0x3E; - //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary - //{ - // RSSI_BT = initial_gain_psd; - // SSBT = RSSI_BT; - //} - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); - ODM_RT_TRACE( pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); - //DbgPrint("PSD: SSBT= %d", SSBT); - //need to do - //pMgntInfo->bDMInitialGainEnable = FALSE; - pDM_Odm->bDMInitialGainEnable = FALSE; - initial_gain = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F; - ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain_psd); - //1 Turn off 3-wire - ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); - - //pts value = 128, 256, 512, 1024 - pts = 128; - - if(pts == 128) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); - start_point = 64; - stop_point = 192; - } - else if(pts == 256) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); - start_point = 128; - stop_point = 384; - } - else if(pts == 512) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); - start_point = 256; - stop_point = 768; - } - else - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); - start_point = 512; - stop_point = 1536; - } - - -//3 Skip WLAN channels if WLAN busy - - curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; - curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; - lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); - lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); - - PSD_skip_start=80; - PSD_skip_stop = 0; - wlan_channel = CurrentChannel & 0x0f; - - ODM_RT_TRACE(pDM_Odm,COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { -#if(BT_30_SUPPORT == 1) - if(pDM_Odm->bBtHsOperation) - { - if(pDM_Odm->bLinked) - { - if(Is40MHz) - { - PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask - PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; - } - else - { - PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask - PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; - } - } - else - { - // mask for 40MHz - PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask - PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; - } - if(PSD_skip_start < 0) - PSD_skip_start = 0; - if(PSD_skip_stop >80) - PSD_skip_stop = 80; - } - else -#endif - { - if((curRxOkCnt+curTxOkCnt) > 5) - { - if(Is40MHz) - { - PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask - PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; - } - else - { - PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask - PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; - } - - if(PSD_skip_start < 0) - PSD_skip_start = 0; - if(PSD_skip_stop >80) - PSD_skip_stop = 80; - } - } - } - else - { - if((curRxOkCnt+curTxOkCnt) > 1000) - { - PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; - PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; - } - } - - ODM_RT_TRACE(pDM_Odm,COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); - - for (n=0;n<80;n++) - { - if((n%20)==0) - { - channel = (n/20)*4 + 1; - /* - if(pDM_Odm->SupportICType==ODM_RTL8192D) - { - switch(channel) - { - case 1: - case 9: - group_idx = 0; - break; - case 5: - group_idx = 2; - break; - case 13: - group_idx = 1; - break; - } - - if((pHalData->MacPhyMode92D == SINGLEMAC_SINGLEPHY)||(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)) - { - for(i = 0; i < SYN_Length; i++) - ODM_SetRFReg(pDM_Odm, RF_PATH_B, SYN[i], bMaskDWord, SYN_group[group_idx][i]); - - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_CHNLBW, 0x3FF, channel); - } - else // DualMAC_DualPHY 2G - { - for(i = 0; i < SYN_Length; i++) - ODM_SetRFReg(pDM_Odm, RF_PATH_A, SYN[i], bMaskDWord, SYN_group[group_idx][i]); - - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - } - } - else */ - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - } - tone_idx = n%20; - if ((n>=PSD_skip_start) && (n PSD_report[n]) - PSD_report[n] = PSD_report_tmp; - - } - } - - PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); - - //----end - //1 Turn on RX - //Rx AGC on - ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); - ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); - //CCK on - ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); - //1 Turn on TX - //Resume TX Queue - - ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0x00); - //Turn on 3-wire - ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); - //1 Restore Current Settings - //Resume DIG - pDM_Odm->bDMInitialGainEnable = TRUE; - ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain); - // restore originl center frequency - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); - - /* - if(pDM_Odm->SupportICType==ODM_RTL8192D) - { - if((pHalData->MacPhyMode92D == SINGLEMAC_SINGLEPHY)||(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)) - { - PHY_SetRFReg(Adapter, RF_PATH_B, RF_CHNLBW, bMaskDWord, CurrentChannel); - PHY_SetRFReg(Adapter, RF_PATH_B, 0x25, bMaskDWord, SYN_RF25); - PHY_SetRFReg(Adapter, RF_PATH_B, 0x26, bMaskDWord, SYN_RF26); - PHY_SetRFReg(Adapter, RF_PATH_B, 0x27, bMaskDWord, SYN_RF27); - PHY_SetRFReg(Adapter, RF_PATH_B, 0x2B, bMaskDWord, SYN_RF2B); - PHY_SetRFReg(Adapter, RF_PATH_B, 0x2C, bMaskDWord, SYN_RF2C); - } - else // DualMAC_DualPHY - { - PHY_SetRFReg(Adapter, RF_PATH_A, 0x25, bMaskDWord, SYN_RF25); - PHY_SetRFReg(Adapter, RF_PATH_A, 0x26, bMaskDWord, SYN_RF26); - PHY_SetRFReg(Adapter, RF_PATH_A, 0x27, bMaskDWord, SYN_RF27); - PHY_SetRFReg(Adapter, RF_PATH_A, 0x2B, bMaskDWord, SYN_RF2B); - PHY_SetRFReg(Adapter, RF_PATH_A, 0x2C, bMaskDWord, SYN_RF2C); - } - }*/ - //Turn on CCA - ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); - //Restore RX idle low power - if(RxIdleLowPwr == TRUE) - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); - - psd_cnt++; - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); - if (psd_cnt < ReScan) - ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, Interval); - else - { - psd_cnt = 0; - for(i=0;i<80;i++) - //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); - RT_TRACE( COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); - - - GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); - - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - cur_byte_idx=0; - cur_bit_idx=0; - - //2 Restore H2C PSD Data to Last Data - H2C_PSD_DATA_last[0] = H2C_PSD_DATA[0]; - H2C_PSD_DATA_last[1] = H2C_PSD_DATA[1]; - H2C_PSD_DATA_last[2] = H2C_PSD_DATA[2]; - H2C_PSD_DATA_last[3] = H2C_PSD_DATA[3]; - H2C_PSD_DATA_last[4] = H2C_PSD_DATA[4]; - - - //2 Translate 80bit channel map to 40bit channel - for ( i=0;i<5;i++) - { - for(n=0;n<8;n++) - { - cur_byte_idx = i*2 + n/4; - cur_bit_idx = (n%4)*2; - if ( ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx)) != 0) && ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx+1)) != 0)) - H2C_PSD_DATA[i] = H2C_PSD_DATA[i] | (u1Byte) (1 << n); - } - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("H2C_PSD_DATA[%d]=0x%x\n" ,i, H2C_PSD_DATA[i])); - } - - //3 To Compare the difference - for ( i=0;i<5;i++) - { - if(H2C_PSD_DATA[i] !=H2C_PSD_DATA_last[i]) - { - FillH2CCmd(Adapter, H2C_92C_PSD_RESULT, 5, H2C_PSD_DATA); - ODM_RT_TRACE(pDM_Odm, COMP_PSD, DBG_LOUD,("Need to Update the AFH Map \n")); - break; - } - else - { - if(i==5) - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("Not need to Update\n")); - } - } - //pHalData->bPSDactive=FALSE; - ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 900); - ODM_RT_TRACE( pDM_Odm,COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n")); - } - } -} -/* -//Neil for Get BT RSSI -// Be Triggered by BT C2H CMD -VOID -ODM_PSDGetRSSI( - IN u1Byte RSSI_BT) -{ - - -} - -*/ - -VOID -ODM_PSDMonitor( - IN PDM_ODM_T pDM_Odm - ) -{ - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - //if(IS_HARDWARE_TYPE_8723AE(Adapter)) - - if(pDM_Odm->SupportICType == ODM_RTL8723A) //may need to add other IC type - { - if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) - { -#if(BT_30_SUPPORT == 1) - if(pDM_Odm->bBtDisabled) //need to check upper layer connection - { - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD, ("odm_PSDMonitor, return for BT is disabled!!!\n")); - return; - } -#endif - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD, ("odm_PSDMonitor\n")); - //if(pHalData->bPSDactive ==FALSE) - //{ - pDM_Odm->bPSDinProcess = TRUE; - //pHalData->bPSDactive=TRUE; - odm_PSD_Monitor(pDM_Odm); - pDM_Odm->bPSDinProcess = FALSE; - } - } - -} -VOID -odm_PSDMonitorCallback( - PRT_TIMER pTimer -) -{ - PADAPTER Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - -#if USE_WORKITEM - PlatformScheduleWorkItem(&pHalData->PSDMonitorWorkitem); -#else - ODM_PSDMonitor(pDM_Odm); -#endif -} - -VOID -odm_PSDMonitorWorkItemCallback( - IN PVOID pContext - ) -{ - PADAPTER Adapter = (PADAPTER)pContext; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - - ODM_PSDMonitor(pDM_Odm); -} - - - - //cosa debug tool need to modify - -VOID -ODM_PSDDbgControl( - IN PADAPTER Adapter, - IN u4Byte mode, - IN u4Byte btRssi - ) -{ -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD, (" Monitor mode=%d, btRssi=%d\n", mode, btRssi)); - if(mode) - { - pDM_Odm->RSSI_BT = (u1Byte)btRssi; - pDM_Odm->bUserAssignLevel = TRUE; - ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 0); //ms - } - else - { - ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); - } -#endif -} - - -//#if(DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) - -void odm_RXHPInit( - IN PDM_ODM_T pDM_Odm) -{ -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - u1Byte index; - - pRX_HP_Table->RXHP_enable = TRUE; - pRX_HP_Table->RXHP_flag = 0; - pRX_HP_Table->PSD_func_trigger = 0; - pRX_HP_Table->Pre_IGI = 0x20; - pRX_HP_Table->Cur_IGI = 0x20; - pRX_HP_Table->Cur_pw_th = pw_th_10dB; - pRX_HP_Table->Pre_pw_th = pw_th_10dB; - for(index=0; index<80; index++) - pRX_HP_Table->PSD_bitmap_RXHP[index] = 1; - -#if(DEV_BUS_TYPE == RT_USB_INTERFACE) - pRX_HP_Table->TP_Mode = Idle_Mode; -#endif -#endif -} - -void odm_RXHP( - IN PDM_ODM_T pDM_Odm) -{ -#if( DM_ODM_SUPPORT_TYPE & (ODM_MP)) -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); - - u1Byte i, j, sum; - u1Byte Is40MHz; - s1Byte Intf_diff_idx, MIN_Intf_diff_idx = 16; - s4Byte cur_channel; - u1Byte ch_map_intf_5M[17] = {0}; - static u4Byte FA_TH = 0; - static u1Byte psd_intf_flag = 0; - static s4Byte curRssi = 0; - static s4Byte preRssi = 0; - static u1Byte PSDTriggerCnt = 1; - - u1Byte RX_HP_enable = (u1Byte)(ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, bMaskDWord)>>31); // for debug!! - -#if(DEV_BUS_TYPE == RT_USB_INTERFACE) - static s8Byte lastTxOkCnt = 0, lastRxOkCnt = 0; - s8Byte curTxOkCnt, curRxOkCnt; - s8Byte curTPOkCnt; - s8Byte TP_Acc3, TP_Acc5; - static s8Byte TP_Buff[5] = {0}; - static u1Byte pre_state = 0, pre_state_flag = 0; - static u1Byte Intf_HighTP_flag = 0, De_counter = 16; - static u1Byte TP_Degrade_flag = 0; -#endif - static u1Byte LatchCnt = 0; - - if((pDM_Odm->SupportICType == ODM_RTL8723A)||(pDM_Odm->SupportICType == ODM_RTL8188E)) - return; - //AGC RX High Power Mode is only applied on 2G band in 92D!!! - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - if(*(pDM_Odm->pBandType) != ODM_BAND_2_4G) - return; - } - - if(!(pDM_Odm->SupportAbility==ODM_BB_RXHP)) - return; - - - //RX HP ON/OFF - if(RX_HP_enable == 1) - pRX_HP_Table->RXHP_enable = FALSE; - else - pRX_HP_Table->RXHP_enable = TRUE; - - if(pRX_HP_Table->RXHP_enable == FALSE) - { - if(pRX_HP_Table->RXHP_flag == 1) - { - pRX_HP_Table->RXHP_flag = 0; - psd_intf_flag = 0; - } - return; - } - -#if(DEV_BUS_TYPE == RT_USB_INTERFACE) - //2 Record current TP for USB interface - curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast)-lastTxOkCnt; - curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast)-lastRxOkCnt; - lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); - lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); - - curTPOkCnt = curTxOkCnt+curRxOkCnt; - TP_Buff[0] = curTPOkCnt; // current TP - TP_Acc3 = PlatformDivision64((TP_Buff[1]+TP_Buff[2]+TP_Buff[3]), 3); - TP_Acc5 = PlatformDivision64((TP_Buff[0]+TP_Buff[1]+TP_Buff[2]+TP_Buff[3]+TP_Buff[4]), 5); - - if(TP_Acc5 < 1000) - pRX_HP_Table->TP_Mode = Idle_Mode; - else if((1000 < TP_Acc5)&&(TP_Acc5 < 3750000)) - pRX_HP_Table->TP_Mode = Low_TP_Mode; - else - pRX_HP_Table->TP_Mode = High_TP_Mode; - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP TP Mode = %d\n", pRX_HP_Table->TP_Mode)); - // Since TP result would be sampled every 2 sec, it needs to delay 4sec to wait PSD processing. - // When LatchCnt = 0, we would Get PSD result. - if(TP_Degrade_flag == 1) - { - LatchCnt--; - if(LatchCnt == 0) - { - TP_Degrade_flag = 0; - } - } - // When PSD function triggered by TP degrade 20%, and Interference Flag = 1 - // Set a De_counter to wait IGI = upper bound. If time is UP, the Interference flag will be pull down. - if(Intf_HighTP_flag == 1) - { - De_counter--; - if(De_counter == 0) - { - Intf_HighTP_flag = 0; - psd_intf_flag = 0; - } - } -#endif - - //2 AGC RX High Power Mode by PSD only applied to STA Mode - //3 NOT applied 1. Ad Hoc Mode. - //3 NOT applied 2. AP Mode - if ((pMgntInfo->mAssoc) && (!pMgntInfo->mIbss) && (!ACTING_AS_AP(Adapter))) - { - Is40MHz = *(pDM_Odm->pBandWidth); - curRssi = pDM_Odm->RSSI_Min; - cur_channel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x0fff) & 0x0f; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP RX HP flag = %d\n", pRX_HP_Table->RXHP_flag)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP FA = %d\n", FalseAlmCnt->Cnt_all)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP cur RSSI = %d, pre RSSI=%d\n", curRssi, preRssi)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP current CH = %d\n", cur_channel)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP Is 40MHz = %d\n", Is40MHz)); - //2 PSD function would be triggered - //3 1. Every 4 sec for PCIE - //3 2. Before TP Mode (Idle TP<4kbps) for USB - //3 3. After TP Mode (High TP) for USB - if((curRssi > 68) && (pRX_HP_Table->RXHP_flag == 0)) // Only RSSI>TH and RX_HP_flag=0 will Do PSD process - { -#if (DEV_BUS_TYPE == RT_USB_INTERFACE) - //2 Before TP Mode ==> PSD would be trigger every 4 sec - if(pRX_HP_Table->TP_Mode == Idle_Mode) //2.1 less wlan traffic <4kbps - { -#endif - if(PSDTriggerCnt == 1) - { - odm_PSD_RXHP(pDM_Odm); - pRX_HP_Table->PSD_func_trigger = 1; - PSDTriggerCnt = 0; - } - else - { - PSDTriggerCnt++; - } -#if(DEV_BUS_TYPE == RT_USB_INTERFACE) - } - //2 After TP Mode ==> Check if TP degrade larger than 20% would trigger PSD function - if(pRX_HP_Table->TP_Mode == High_TP_Mode) - { - if((pre_state_flag == 0)&&(LatchCnt == 0)) - { - // TP var < 5% - if((((curTPOkCnt-TP_Acc3)*20)<(TP_Acc3))&&(((curTPOkCnt-TP_Acc3)*20)>(-TP_Acc3))) - { - pre_state++; - if(pre_state == 3) // hit pre_state condition => consecutive 3 times - { - pre_state_flag = 1; - pre_state = 0; - } - - } - else - { - pre_state = 0; - } - } - //3 If pre_state_flag=1 ==> start to monitor TP degrade 20% - if(pre_state_flag == 1) - { - if(((TP_Acc3-curTPOkCnt)*5)>(TP_Acc3)) // degrade 20% - { - odm_PSD_RXHP(pDM_Odm); - pRX_HP_Table->PSD_func_trigger = 1; - TP_Degrade_flag = 1; - LatchCnt = 2; - pre_state_flag = 0; - } - else if(((TP_Buff[2]-curTPOkCnt)*5)>TP_Buff[2]) - { - odm_PSD_RXHP(pDM_Odm); - pRX_HP_Table->PSD_func_trigger = 1; - TP_Degrade_flag = 1; - LatchCnt = 2; - pre_state_flag = 0; - } - else if(((TP_Buff[3]-curTPOkCnt)*5)>TP_Buff[3]) - { - odm_PSD_RXHP(pDM_Odm); - pRX_HP_Table->PSD_func_trigger = 1; - TP_Degrade_flag = 1; - LatchCnt = 2; - pre_state_flag = 0; - } - } - } -#endif -} - -#if (DEV_BUS_TYPE == RT_USB_INTERFACE) - for (i=0;i<4;i++) - { - TP_Buff[4-i] = TP_Buff[3-i]; - } -#endif - //2 Update PSD bitmap according to PSD report - if((pRX_HP_Table->PSD_func_trigger == 1)&&(LatchCnt == 0)) - { - //2 Separate 80M bandwidth into 16 group with smaller 5M BW. - for (i = 0 ; i < 16 ; i++) - { - sum = 0; - for(j = 0; j < 5 ; j++) - sum += pRX_HP_Table->PSD_bitmap_RXHP[5*i + j]; - - if(sum < 5) - { - ch_map_intf_5M[i] = 1; // interference flag - } - } - //=============just for debug========================= - //for(i=0;i<16;i++) - //DbgPrint("RX HP: ch_map_intf_5M[%d] = %d\n", i, ch_map_intf_5M[i]); - //=============================================== - //2 Mask target channel 5M index - for(i = 0; i < (4+4*Is40MHz) ; i++) - { - ch_map_intf_5M[cur_channel - (1+2*Is40MHz) + i] = 0; - } - - psd_intf_flag = 0; - for(i = 0; i < 16; i++) - { - if(ch_map_intf_5M[i] == 1) - { - psd_intf_flag = 1; // interference is detected!!! - break; - } - } - -#if (DEV_BUS_TYPE == RT_USB_INTERFACE) - if(pRX_HP_Table->TP_Mode!=Idle_Mode) - { - if(psd_intf_flag == 1) // to avoid psd_intf_flag always 1 - { - Intf_HighTP_flag = 1; - De_counter = 32; // 0x1E -> 0x3E needs 32 times by each IGI step =1 - } - } -#endif - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP psd_intf_flag = %d\n", psd_intf_flag)); - //2 Distance between target channel and interference - for(i = 0; i < 16; i++) - { - if(ch_map_intf_5M[i] == 1) - { - Intf_diff_idx = ((cur_channel+Is40MHz-(i+1))>0) ? (s1Byte)(cur_channel-2*Is40MHz-(i-2)) : (s1Byte)((i+1)-(cur_channel+2*Is40MHz)); - if(Intf_diff_idx < MIN_Intf_diff_idx) - MIN_Intf_diff_idx = Intf_diff_idx; // the min difference index between interference and target - } - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP MIN_Intf_diff_idx = %d\n", MIN_Intf_diff_idx)); - //2 Choose False Alarm Threshold - switch (MIN_Intf_diff_idx){ - case 0: - case 1: - case 2: - case 3: - FA_TH = FA_RXHP_TH1; - break; - case 4: // CH5 - case 5: // CH6 - FA_TH = FA_RXHP_TH2; - break; - case 6: // CH7 - case 7: // CH8 - FA_TH = FA_RXHP_TH3; - break; - case 8: // CH9 - case 9: //CH10 - FA_TH = FA_RXHP_TH4; - break; - case 10: - case 11: - case 12: - case 13: - case 14: - case 15: - FA_TH = FA_RXHP_TH5; - break; - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP FA_TH = %d\n", FA_TH)); - pRX_HP_Table->PSD_func_trigger = 0; - } - //1 Monitor RSSI variation to choose the suitable IGI or Exit AGC RX High Power Mode - if(pRX_HP_Table->RXHP_flag == 1) - { - if ((curRssi > 80)&&(preRssi < 80)) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; - } - else if ((curRssi < 80)&&(preRssi > 80)) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; - } - else if ((curRssi > 72)&&(preRssi < 72)) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; - } - else if ((curRssi < 72)&&( preRssi > 72)) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; - } - else if (curRssi < 68) //RSSI is NOT large enough!!==> Exit AGC RX High Power Mode - { - pRX_HP_Table->Cur_pw_th = pw_th_10dB; - pRX_HP_Table->RXHP_flag = 0; // Back to Normal DIG Mode - psd_intf_flag = 0; - } - } - else // pRX_HP_Table->RXHP_flag == 0 - { - //1 Decide whether to enter AGC RX High Power Mode - if ((curRssi > 70) && (psd_intf_flag == 1) && (FalseAlmCnt->Cnt_all > FA_TH) && - (pDM_DigTable->CurIGValue == pDM_DigTable->rx_gain_range_max)) - { - if (curRssi > 80) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; - } - else if (curRssi > 72) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; - } - else - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; - } - pRX_HP_Table->Cur_pw_th = pw_th_16dB; //RegC54[9:8]=2'b11: to enter AGC Flow 3 - pRX_HP_Table->First_time_enter = TRUE; - pRX_HP_Table->RXHP_flag = 1; // RXHP_flag=1: AGC RX High Power Mode, RXHP_flag=0: Normal DIG Mode - } - } - preRssi = curRssi; - odm_Write_RXHP(pDM_Odm); - } -#endif //#if( DM_ODM_SUPPORT_TYPE & (ODM_MP)) -#endif //#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) -} - -void odm_Write_RXHP( - IN PDM_ODM_T pDM_Odm) -{ - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - u4Byte currentIGI; - - if(pRX_HP_Table->Cur_IGI != pRX_HP_Table->Pre_IGI) - { - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); - ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); - } - - if(pRX_HP_Table->Cur_pw_th != pRX_HP_Table->Pre_pw_th) -{ - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, BIT8|BIT9, pRX_HP_Table->Cur_pw_th); // RegC54[9:8]=2'b11: AGC Flow 3 - } - - if(pRX_HP_Table->RXHP_flag == 0) - { - pRX_HP_Table->Cur_IGI = 0x20; - } - else - { - currentIGI = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0); - if(currentIGI<0x50) - { - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); - ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); - } - } - pRX_HP_Table->Pre_IGI = pRX_HP_Table->Cur_IGI; - pRX_HP_Table->Pre_pw_th = pRX_HP_Table->Cur_pw_th; - -} - -VOID -odm_PSD_RXHP( - IN PDM_ODM_T pDM_Odm -) -{ - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - unsigned int pts, start_point, stop_point, initial_gain ; - static u1Byte PSD_bitmap_memory[80], init_memory = 0; - static u1Byte psd_cnt=0; - static u4Byte PSD_report[80], PSD_report_tmp; - static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; - u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, - 0,3,6,10,13,16,19,22,26,29}; - u1Byte n, i, channel, BBReset,tone_idx; - u1Byte PSD_bitmap[10], SSBT=0,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; - s4Byte PSD_skip_start, PSD_skip_stop; - u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; - u4Byte ReScan, Interval, Is40MHz; - u8Byte curTxOkCnt, curRxOkCnt; - //--------------2G band synthesizer for 92D switch RF channel using----------------- - u1Byte group_idx=0; - u4Byte SYN_RF25=0, SYN_RF26=0, SYN_RF27=0, SYN_RF2B=0, SYN_RF2C=0; - u4Byte SYN[5] = {0x25, 0x26, 0x27, 0x2B, 0x2C}; // synthesizer RF register for 2G channel - u4Byte SYN_group[3][5] = {{0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840}, // For CH1,2,4,9,10.11.12 {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840} - {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840}, // For CH3,13,14 - {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}}; // For Ch5,6,7,8 - //--------------------- Add by Gary for Debug setting ---------------------- - s4Byte psd_result = 0; - u1Byte RSSI_BT_new = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB9C, 0xFF); - u1Byte rssi_ctrl = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB38, 0xFF); - //--------------------------------------------------------------------- - - if(pMgntInfo->bScanInProgress) - { - return; - } - - ReScan = PSD_RESCAN; - Interval = SCAN_INTERVAL; - - - //1 Initialization - if(init_memory == 0) - { - RT_TRACE( COMP_PSD, DBG_LOUD,("Init memory\n")); - for(i = 0; i < 80; i++) - PSD_bitmap_memory[i] = 0xFF; // channel is always good - init_memory = 1; - } - if(psd_cnt == 0) - { - RT_TRACE(COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); - for(i = 0; i < 80; i++) - PSD_report[i] = 0; - } - - //1 Backup Current Settings - CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - //2 Record Current synthesizer parameters based on current channel - if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) - { - SYN_RF25 = ODM_GetRFReg(pDM_Odm, RF_PATH_B, 0x25, bMaskDWord); - SYN_RF26 = ODM_GetRFReg(pDM_Odm, RF_PATH_B, 0x26, bMaskDWord); - SYN_RF27 = ODM_GetRFReg(pDM_Odm, RF_PATH_B, 0x27, bMaskDWord); - SYN_RF2B = ODM_GetRFReg(pDM_Odm, RF_PATH_B, 0x2B, bMaskDWord); - SYN_RF2C = ODM_GetRFReg(pDM_Odm, RF_PATH_B, 0x2C, bMaskDWord); - } - else // DualMAC_DualPHY 2G - { - SYN_RF25 = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x25, bMaskDWord); - SYN_RF26 = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x26, bMaskDWord); - SYN_RF27 = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x27, bMaskDWord); - SYN_RF2B = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x2B, bMaskDWord); - SYN_RF2C = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x2C, bMaskDWord); - } - } - RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); - RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; - Is40MHz = *(pDM_Odm->pBandWidth); - ODM_RT_TRACE(pDM_Odm, COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); - //1 Turn off CCK - ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); - //1 Turn off TX - //Pause TX Queue - ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); - //Force RX to stop TX immediately - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); - //1 Turn off RX - //Rx AGC off RegC70[0]=0, RegC7C[20]=0 - ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); - ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); - //Turn off CCA - ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); - //BB Reset - BBReset = ODM_Read1Byte(pDM_Odm, 0x02); - ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); - ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); - //1 Leave RX idle low power - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); - //1 Fix initial gain - RSSI_BT = RSSI_BT_new; - RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); - - if(rssi_ctrl == 1) // just for debug!! - initial_gain_psd = RSSI_BT_new; - else - initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI - - RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); - - initialGainUpper = 0x54; - - RSSI_BT = initial_gain_psd; - //SSBT = RSSI_BT; - - //RT_TRACE( COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); - RT_TRACE( COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); - - pDM_Odm->bDMInitialGainEnable = FALSE; - initial_gain = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F; - ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain_psd); - //1 Turn off 3-wire - ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); - - //pts value = 128, 256, 512, 1024 - pts = 128; - - if(pts == 128) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); - start_point = 64; - stop_point = 192; - } - else if(pts == 256) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); - start_point = 128; - stop_point = 384; - } - else if(pts == 512) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); - start_point = 256; - stop_point = 768; - } - else - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); - start_point = 512; - stop_point = 1536; - } - - -//3 Skip WLAN channels if WLAN busy - curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; - curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; - lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); - lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); - - PSD_skip_start=80; - PSD_skip_stop = 0; - wlan_channel = CurrentChannel & 0x0f; - - RT_TRACE(COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); - - if((curRxOkCnt+curTxOkCnt) > 1000) - { - PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; - PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; - } - - RT_TRACE(COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); - - for (n=0;n<80;n++) - { - if((n%20)==0) - { - channel = (n/20)*4 + 1; - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - switch(channel) - { - case 1: - case 9: - group_idx = 0; - break; - case 5: - group_idx = 2; - break; - case 13: - group_idx = 1; - break; - } - if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) - { - for(i = 0; i < SYN_Length; i++) - ODM_SetRFReg(pDM_Odm, RF_PATH_B, SYN[i], bMaskDWord, SYN_group[group_idx][i]); - - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_CHNLBW, 0x3FF, channel); - } - else // DualMAC_DualPHY 2G - { - for(i = 0; i < SYN_Length; i++) - ODM_SetRFReg(pDM_Odm, RF_PATH_A, SYN[i], bMaskDWord, SYN_group[group_idx][i]); - - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - } - } - else - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - } - tone_idx = n%20; - if ((n>=PSD_skip_start) && (n PSD_report[n]) - PSD_report[n] = PSD_report_tmp; - - } - } - - PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); - - //----end - //1 Turn on RX - //Rx AGC on - ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); - ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); - //CCK on - ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); - //1 Turn on TX - //Resume TX Queue - ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); - //Turn on 3-wire - ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); - //1 Restore Current Settings - //Resume DIG - pDM_Odm->bDMInitialGainEnable= TRUE; - ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain); - // restore originl center frequency - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) - { - ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_CHNLBW, bMaskDWord, CurrentChannel); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x25, bMaskDWord, SYN_RF25); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x26, bMaskDWord, SYN_RF26); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x27, bMaskDWord, SYN_RF27); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x2B, bMaskDWord, SYN_RF2B); - ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x2C, bMaskDWord, SYN_RF2C); - } - else // DualMAC_DualPHY - { - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x25, bMaskDWord, SYN_RF25); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x26, bMaskDWord, SYN_RF26); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x27, bMaskDWord, SYN_RF27); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x2B, bMaskDWord, SYN_RF2B); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x2C, bMaskDWord, SYN_RF2C); - } - } - //Turn on CCA - ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); - //Restore RX idle low power - if(RxIdleLowPwr == TRUE) - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); - - psd_cnt++; - //gPrint("psd cnt=%d\n", psd_cnt); - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); - if (psd_cnt < ReScan) - { - ODM_SetTimer(pDM_Odm, &pRX_HP_Table->PSDTimer, Interval); //ms - } - else - { - psd_cnt = 0; - for(i=0;i<80;i++) - RT_TRACE( COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); - //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); - - GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); - - } - } - -VOID -odm_PSD_RXHPCallback( - PRT_TIMER pTimer -) -{ - PADAPTER Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - #if USE_WORKITEM - ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); - #else - odm_PSD_RXHP(pDM_Odm); - #endif -#else - ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); -#endif - - } - -VOID -odm_PSD_RXHPWorkitemCallback( - IN PVOID pContext - ) -{ - PADAPTER pAdapter = (PADAPTER)pContext; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - odm_PSD_RXHP(pDM_Odm); -} - -#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -// -// 2011/09/22 MH Add for 92D global spin lock utilization. -// -VOID -odm_GlobalAdapterCheck( - IN VOID - ) -{ - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - - //sherry delete flag 20110517 -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) - ACQUIRE_GLOBAL_SPINLOCK(&GlobalSpinlockForGlobalAdapterList); -#else - ACQUIRE_GLOBAL_MUTEX(GlobalMutexForGlobalAdapterList); -#endif - -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) - RELEASE_GLOBAL_SPINLOCK(&GlobalSpinlockForGlobalAdapterList); -#else - RELEASE_GLOBAL_MUTEX(GlobalMutexForGlobalAdapterList); -#endif - -#endif - -} // odm_GlobalAdapterCheck - - - -// -// 2011/12/02 MH Copy from MP oursrc for temporarily test. -// -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -VOID -odm_OFDMTXPathDiversity_92C( - IN PADAPTER Adapter) -{ -// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - PRT_WLAN_STA pEntry; - u1Byte i, DefaultRespPath = 0; - s4Byte MinRSSI = 0xFF; - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - pDM_PDTable->OFDMTXPath = 0; - - //1 Default Port - if(pMgntInfo->mAssoc) - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port RSSI[0]=%d, RSSI[1]=%d\n", - Adapter->RxStats.RxRSSIPercentage[0], Adapter->RxStats.RxRSSIPercentage[1])); - if(Adapter->RxStats.RxRSSIPercentage[0] > Adapter->RxStats.RxRSSIPercentage[1]) - { - pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & (~BIT0); - MinRSSI = Adapter->RxStats.RxRSSIPercentage[1]; - DefaultRespPath = 0; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-0\n")); - } - else - { - pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT0; - MinRSSI = Adapter->RxStats.RxRSSIPercentage[0]; - DefaultRespPath = 1; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-1\n")); - } - //RT_TRACE( COMP_SWAS, DBG_LOUD, ("pDM_PDTable->OFDMTXPath =0x%x\n",pDM_PDTable->OFDMTXPath)); - } - //1 Extension Port - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { - if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); - else - pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); - - if(pEntry!=NULL) - { - if(pEntry->bAssociated) - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d, RSSI_0=%d, RSSI_1=%d\n", - pEntry->AID+1, pEntry->rssi_stat.RxRSSIPercentage[0], pEntry->rssi_stat.RxRSSIPercentage[1])); - - if(pEntry->rssi_stat.RxRSSIPercentage[0] > pEntry->rssi_stat.RxRSSIPercentage[1]) - { - pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & ~(BIT(pEntry->AID+1)); - //pHalData->TXPath = pHalData->TXPath & ~(1<<(pEntry->AID+1)); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-0\n", pEntry->AID+1)); - if(pEntry->rssi_stat.RxRSSIPercentage[1] < MinRSSI) - { - MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[1]; - DefaultRespPath = 0; - } - } - else - { - pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT(pEntry->AID+1); - //pHalData->TXPath = pHalData->TXPath | (1 << (pEntry->AID+1)); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-1\n", pEntry->AID+1)); - if(pEntry->rssi_stat.RxRSSIPercentage[0] < MinRSSI) - { - MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[0]; - DefaultRespPath = 1; - } - } - } - } - else - { - break; - } - } - - pDM_PDTable->OFDMDefaultRespPath = DefaultRespPath; -} - - -BOOLEAN -odm_IsConnected_92C( - IN PADAPTER Adapter -) -{ - PRT_WLAN_STA pEntry; - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - u4Byte i; - BOOLEAN bConnected=FALSE; - - if(pMgntInfo->mAssoc) - { - bConnected = TRUE; - } - else - { - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { - if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); - else - pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); - - if(pEntry!=NULL) - { - if(pEntry->bAssociated) - { - bConnected = TRUE; - break; - } - } - else - { - break; - } - } - } - return bConnected; -} - - -VOID -odm_ResetPathDiversity_92C( - IN PADAPTER Adapter -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - PRT_WLAN_STA pEntry; - u4Byte i; - - pHalData->RSSI_test = FALSE; - pDM_PDTable->CCK_Pkt_Cnt = 0; - pDM_PDTable->OFDM_Pkt_Cnt = 0; - pHalData->CCK_Pkt_Cnt =0; - pHalData->OFDM_Pkt_Cnt =0; - - if(pDM_PDTable->CCKPathDivEnable == TRUE) - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); //RX path = PathAB - - for(i=0; i<2; i++) - { - pDM_PDTable->RSSI_CCK_Path_cnt[i]=0; - pDM_PDTable->RSSI_CCK_Path[i] = 0; - } - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { - if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); - else - pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); - - if(pEntry!=NULL) - { - pEntry->rssi_stat.CCK_Pkt_Cnt = 0; - pEntry->rssi_stat.OFDM_Pkt_Cnt = 0; - for(i=0; i<2; i++) - { - pEntry->rssi_stat.RSSI_CCK_Path_cnt[i] = 0; - pEntry->rssi_stat.RSSI_CCK_Path[i] = 0; - } - } - else - break; - } -} - - -VOID -odm_CCKTXPathDiversity_92C( - IN PADAPTER Adapter -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - PRT_WLAN_STA pEntry; - s4Byte MinRSSI = 0xFF; - u1Byte i, DefaultRespPath = 0; -// BOOLEAN bBModePathDiv = FALSE; - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - - //1 Default Port - if(pMgntInfo->mAssoc) - { - if(pHalData->OFDM_Pkt_Cnt == 0) - { - for(i=0; i<2; i++) - { - if(pDM_PDTable->RSSI_CCK_Path_cnt[i] > 1) //Because the first packet is discarded - pDM_PDTable->RSSI_CCK_Path[i] = pDM_PDTable->RSSI_CCK_Path[i] / (pDM_PDTable->RSSI_CCK_Path_cnt[i]-1); - else - pDM_PDTable->RSSI_CCK_Path[i] = 0; - } - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path[0]=%d, pDM_PDTable->RSSI_CCK_Path[1]=%d\n", - pDM_PDTable->RSSI_CCK_Path[0], pDM_PDTable->RSSI_CCK_Path[1])); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path_cnt[0]=%d, pDM_PDTable->RSSI_CCK_Path_cnt[1]=%d\n", - pDM_PDTable->RSSI_CCK_Path_cnt[0], pDM_PDTable->RSSI_CCK_Path_cnt[1])); - - if(pDM_PDTable->RSSI_CCK_Path[0] > pDM_PDTable->RSSI_CCK_Path[1]) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); - MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; - DefaultRespPath = 0; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); - } - else if(pDM_PDTable->RSSI_CCK_Path[0] < pDM_PDTable->RSSI_CCK_Path[1]) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT0; - MinRSSI = pDM_PDTable->RSSI_CCK_Path[0]; - DefaultRespPath = 1; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-1\n")); - } - else - { - if((pDM_PDTable->RSSI_CCK_Path[0] != 0) && (pDM_PDTable->RSSI_CCK_Path[0] < MinRSSI)) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); - MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; - DefaultRespPath = 0; - } - else - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port unchange CCK Path\n")); - } - } - } - else //Follow OFDM decision - { - pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~BIT0)) | (pDM_PDTable->OFDMTXPath &BIT0); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, Default port Select CCK Path-%d\n", - pDM_PDTable->CCKTXPath &BIT0)); - } - } - //1 Extension Port - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { - if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); - else - pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); - - if(pEntry!=NULL) - { - if(pEntry->bAssociated) - { - if(pEntry->rssi_stat.OFDM_Pkt_Cnt == 0) - { - for(i=0; i<2; i++) - { - if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[i] > 1) - pEntry->rssi_stat.RSSI_CCK_Path[i] = pEntry->rssi_stat.RSSI_CCK_Path[i] / (pEntry->rssi_stat.RSSI_CCK_Path_cnt[i]-1); - else - pEntry->rssi_stat.RSSI_CCK_Path[i] = 0; - } - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d, RSSI_CCK0=%d, RSSI_CCK1=%d\n", - pEntry->AID+1, pEntry->rssi_stat.RSSI_CCK_Path[0], pEntry->rssi_stat.RSSI_CCK_Path[1])); - - if(pEntry->rssi_stat.RSSI_CCK_Path[0] >pEntry->rssi_stat.RSSI_CCK_Path[1]) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AID+1)); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AID+1)); - if(pEntry->rssi_stat.RSSI_CCK_Path[1] < MinRSSI) - { - MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; - DefaultRespPath = 0; - } - } - else if(pEntry->rssi_stat.RSSI_CCK_Path[0] rssi_stat.RSSI_CCK_Path[1]) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT(pEntry->AID+1); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-1\n", pEntry->AID+1)); - if(pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI) - { - MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[0]; - DefaultRespPath = 1; - } - } - else - { - if((pEntry->rssi_stat.RSSI_CCK_Path[0] != 0) && (pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI)) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AID+1)); - MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; - DefaultRespPath = 0; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AID+1)); - } - else - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d unchange CCK Path\n", pEntry->AID+1)); - } - } - } - else //Follow OFDM decision - { - pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~(BIT(pEntry->AID+1)))) | (pDM_PDTable->OFDMTXPath & BIT(pEntry->AID+1)); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, MACID=%d Select CCK Path-%d\n", - pEntry->AID+1, (pDM_PDTable->CCKTXPath & BIT(pEntry->AID+1))>>(pEntry->AID+1))); - } - } - } - else - { - break; - } - } - - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C:MinRSSI=%d\n",MinRSSI)); - - if(MinRSSI == 0xFF) - DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; - - pDM_PDTable->CCKDefaultRespPath = DefaultRespPath; -} - - - -VOID -odm_PathDiversityAfterLink_92C( - IN PADAPTER Adapter -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - u1Byte DefaultRespPath=0; - - if((!IS_92C_SERIAL(pHalData->VersionID)) || (pHalData->PathDivCfg != 1) || (pHalData->eRFPowerState == eRfOff)) - { - if(pHalData->PathDivCfg == 0) - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("No ODM_TXPathDiversity()\n")); - } - else - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("2T ODM_TXPathDiversity()\n")); - } - return; - } - if(!odm_IsConnected_92C(Adapter)) - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity(): No Connections\n")); - return; - } - - - if(pDM_PDTable->TrainingState == 0) - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity() ==>\n")); - odm_OFDMTXPathDiversity_92C(Adapter); - - if((pDM_PDTable->CCKPathDivEnable == TRUE) && (pDM_PDTable->OFDM_Pkt_Cnt < 100)) - { - //RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=0\n")); - - if(pDM_PDTable->CCK_Pkt_Cnt > 300) - pDM_PDTable->Timer = 20; - else if(pDM_PDTable->CCK_Pkt_Cnt > 100) - pDM_PDTable->Timer = 60; - else - pDM_PDTable->Timer = 250; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: timer=%d\n",pDM_PDTable->Timer)); - - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // RX path = PathA - pDM_PDTable->TrainingState = 1; - pHalData->RSSI_test = TRUE; - ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms - } - else - { - pDM_PDTable->CCKTXPath = pDM_PDTable->OFDMTXPath; - DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: Skip odm_CCKTXPathDiversity_92C, DefaultRespPath is OFDM\n")); - odm_SetRespPath_92C(Adapter, DefaultRespPath); - odm_ResetPathDiversity_92C(Adapter); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); - } - } - else if(pDM_PDTable->TrainingState == 1) - { - //RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=1\n")); - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // RX path = PathB - pDM_PDTable->TrainingState = 2; - ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms - } - else - { - //RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=2\n")); - pDM_PDTable->TrainingState = 0; - odm_CCKTXPathDiversity_92C(Adapter); - if(pDM_PDTable->OFDM_Pkt_Cnt != 0) - { - DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is OFDM\n")); - } - else - { - DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is CCK\n")); - } - odm_SetRespPath_92C(Adapter, DefaultRespPath); - odm_ResetPathDiversity_92C(Adapter); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); - } - -} - - - -VOID -odm_CCKTXPathDiversityCallback( - PRT_TIMER pTimer -) -{ -#if USE_WORKITEM - PADAPTER Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -#else - PADAPTER Adapter = (PADAPTER)pTimer->Adapter; -#endif - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE -#if USE_WORKITEM - PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); -#else - odm_PathDiversityAfterLink_92C(Adapter); -#endif -#else - PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); -#endif - -} - - -VOID -odm_CCKTXPathDiversityWorkItemCallback( - IN PVOID pContext - ) -{ - PADAPTER Adapter = (PADAPTER)pContext; - - odm_CCKTXPathDiversity_92C(Adapter); -} - - -VOID -ODM_CCKPathDiversityChkPerPktRssi( - PADAPTER Adapter, - BOOLEAN bIsDefPort, - BOOLEAN bMatchBSSID, - PRT_WLAN_STA pEntry, - PRT_RFD pRfd, - pu1Byte pDesc - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - BOOLEAN bCount = FALSE; - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - //BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE_92C(pDesc); -#if DEV_BUS_TYPE != RT_SDIO_INTERFACE - BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE(Adapter, pDesc); -#else //below code would be removed if we have verified SDIO - BOOLEAN isCCKrate = IS_HARDWARE_TYPE_8188E(Adapter) ? RX_HAL_IS_CCK_RATE_88E(pDesc) : RX_HAL_IS_CCK_RATE_92C(pDesc); -#endif - - if((pHalData->PathDivCfg != 1) || (pHalData->RSSI_test == FALSE)) - return; - - if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) - bCount = TRUE; - else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) - bCount = TRUE; - - if(bCount && isCCKrate) - { - if(pDM_PDTable->TrainingState == 1 ) - { - if(pEntry) - { - if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[0] != 0) - pEntry->rssi_stat.RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; - pEntry->rssi_stat.RSSI_CCK_Path_cnt[0]++; - } - else - { - if(pDM_PDTable->RSSI_CCK_Path_cnt[0] != 0) - pDM_PDTable->RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; - pDM_PDTable->RSSI_CCK_Path_cnt[0]++; - } - } - else if(pDM_PDTable->TrainingState == 2 ) - { - if(pEntry) - { - if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[1] != 0) - pEntry->rssi_stat.RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; - pEntry->rssi_stat.RSSI_CCK_Path_cnt[1]++; - } - else - { - if(pDM_PDTable->RSSI_CCK_Path_cnt[1] != 0) - pDM_PDTable->RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; - pDM_PDTable->RSSI_CCK_Path_cnt[1]++; - } - } - } -} - - -BOOLEAN -ODM_PathDiversityBeforeLink92C( - //IN PADAPTER Adapter - IN PDM_ODM_T pDM_Odm - ) -{ -#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE* pHalData = NULL; - PMGNT_INFO pMgntInfo = NULL; - //pSWAT_T pDM_SWAT_Table = &Adapter->DM_SWAT_Table; - pPD_T pDM_PDTable = NULL; - - s1Byte Score = 0; - PRT_WLAN_BSS pTmpBssDesc; - PRT_WLAN_BSS pTestBssDesc; - - u1Byte target_chnl = 0; - u1Byte index; - - if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 - { // The ODM structure is not initialized. - return FALSE; - } - pHalData = GET_HAL_DATA(Adapter); - pMgntInfo = &Adapter->MgntInfo; - pDM_PDTable = &Adapter->DM_PDTable; - - // Condition that does not need to use path diversity. - if((!IS_92C_SERIAL(pHalData->VersionID)) || (pHalData->PathDivCfg!=1) || pMgntInfo->AntennaTest ) - { - RT_TRACE(COMP_SWAS, DBG_LOUD, - ("ODM_PathDiversityBeforeLink92C(): No PathDiv Mechanism before link.\n")); - return FALSE; - } - - // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. - PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) - { - PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - - RT_TRACE(COMP_SWAS, DBG_LOUD, - ("ODM_PathDiversityBeforeLink92C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", - pMgntInfo->RFChangeInProgress, - pHalData->eRFPowerState)); - - //pDM_SWAT_Table->SWAS_NoLink_State = 0; - pDM_PDTable->PathDiv_NoLink_State = 0; - - return FALSE; - } - else - { - PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - } - - //1 Run AntDiv mechanism "Before Link" part. - //if(pDM_SWAT_Table->SWAS_NoLink_State == 0) - if(pDM_PDTable->PathDiv_NoLink_State == 0) - { - //1 Prepare to do Scan again to check current antenna state. - - // Set check state to next step. - //pDM_SWAT_Table->SWAS_NoLink_State = 1; - pDM_PDTable->PathDiv_NoLink_State = 1; - - // Copy Current Scan list. - Adapter->MgntInfo.tmpNumBssDesc = pMgntInfo->NumBssDesc; - PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); - - // Switch Antenna to another one. - if(pDM_PDTable->DefaultRespPath == 0) - { - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // TRX path = PathB - odm_SetRespPath_92C(Adapter, 1); - pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; - pDM_PDTable->CCKTXPath = 0xFFFFFFFF; - } - else - { - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // TRX path = PathA - odm_SetRespPath_92C(Adapter, 0); - pDM_PDTable->OFDMTXPath = 0x0; - pDM_PDTable->CCKTXPath = 0x0; - } -#if 0 - - pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; - - RT_TRACE(COMP_SWAS, DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink8192C: Change to Ant(%s) for testing.\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B")); - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); - pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); - PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); -#endif - - // Go back to scan function again. - RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Scan one more time\n")); - pMgntInfo->ScanStep=0; - target_chnl = odm_SwAntDivSelectChkChnl(Adapter); - odm_SwAntDivConsructChkScanChnl(Adapter, target_chnl); - HTReleaseChnlOpLock(Adapter); - PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); - - return TRUE; - } - else - { - //1 ScanComple() is called after antenna swiched. - //1 Check scan result and determine which antenna is going - //1 to be used. - - for(index=0; indexMgntInfo.tmpNumBssDesc; index++) - { - pTmpBssDesc = &(Adapter->MgntInfo.tmpbssDesc[index]); - pTestBssDesc = &(pMgntInfo->bssDesc[index]); - - if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) - { - RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C(): ERROR!! This shall not happen.\n")); - continue; - } - - if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) - { - RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score++\n")); - RT_PRINT_STR(COMP_SWAS, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); - RT_TRACE(COMP_SWAS, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - - Score++; - PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); - } - else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) - { - RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score--\n")); - RT_PRINT_STR(COMP_SWAS, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); - RT_TRACE(COMP_SWAS, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - Score--; - } - - } - - if(pMgntInfo->NumBssDesc!=0 && Score<=0) - { - RT_TRACE(COMP_SWAS, DBG_LOUD, - ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); - - //pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - } - else - { - RT_TRACE(COMP_SWAS, DBG_LOUD, - ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); - - if(pDM_PDTable->DefaultRespPath == 0) - { - pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; - pDM_PDTable->CCKTXPath = 0xFFFFFFFF; - odm_SetRespPath_92C(Adapter, 1); - } - else - { - pDM_PDTable->OFDMTXPath = 0x0; - pDM_PDTable->CCKTXPath = 0x0; - odm_SetRespPath_92C(Adapter, 0); - } - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); // RX path = PathAB - - //pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; - - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); - //pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); - } - - // Check state reset to default and wait for next time. - //pDM_SWAT_Table->SWAS_NoLink_State = 0; - pDM_PDTable->PathDiv_NoLink_State = 0; - - return FALSE; - } -#else - return FALSE; -#endif - -} - - -//Neil Chen---2011--06--22 -//----92D Path Diversity----// -//#ifdef PathDiv92D -//================================== -//3 Path Diversity -//================================== -// -// 20100514 Luke/Joseph: -// Add new function for antenna diversity after link. -// This is the main function of antenna diversity after link. -// This function is called in HalDmWatchDog() and ODM_SwAntDivChkAntSwitchCallback(). -// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. -// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. -// After 500ms, ODM_SwAntDivChkAntSwitchCallback() calls this function to compare the signal just -// listened on the air with the RSSI of original antenna. -// It chooses the antenna with better RSSI. -// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting -// penalty to get next try. -// -// -// 20100503 Joseph: -// Add new function SwAntDivCheck8192C(). -// This is the main function of Antenna diversity function before link. -// Mainly, it just retains last scan result and scan again. -// After that, it compares the scan result to see which one gets better RSSI. -// It selects antenna with better receiving power and returns better scan result. -// - - -// -// 20100514 Luke/Joseph: -// This function is used to gather the RSSI information for antenna testing. -// It selects the RSSI of the peer STA that we want to know. -// -VOID -ODM_PathDivChkPerPktRssi( - PADAPTER Adapter, - BOOLEAN bIsDefPort, - BOOLEAN bMatchBSSID, - PRT_WLAN_STA pEntry, - PRT_RFD pRfd - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - BOOLEAN bCount = FALSE; - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) - bCount = TRUE; - else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) - bCount = TRUE; - - if(bCount) - { - //1 RSSI for SW Antenna Switch - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - { - pHalData->RSSI_sum_A += pRfd->Status.RxPWDBAll; - pHalData->RSSI_cnt_A++; - } - else - { - pHalData->RSSI_sum_B += pRfd->Status.RxPWDBAll; - pHalData->RSSI_cnt_B++; - - } - } -} - - - -// -// 20100514 Luke/Joseph: -// Add new function to reset antenna diversity state after link. -// -VOID -ODM_PathDivRestAfterLink( - IN PDM_ODM_T pDM_Odm - ) -{ - PADAPTER Adapter=pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - pHalData->RSSI_cnt_A = 0; - pHalData->RSSI_cnt_B = 0; - pHalData->RSSI_test = FALSE; - pDM_SWAT_Table->try_flag = 0x0; // NOT 0xff - pDM_SWAT_Table->RSSI_Trying = 0; - pDM_SWAT_Table->SelectAntennaMap=0xAA; - pDM_SWAT_Table->CurAntenna = Antenna_A; -} - - -// -// 20100514 Luke/Joseph: -// Callback function for 500ms antenna test trying. -// -VOID -odm_PathDivChkAntSwitchCallback( - PRT_TIMER pTimer -) -{ - PADAPTER Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - -#if USE_WORKITEM - PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); -#else - odm_PathDivChkAntSwitch(pDM_Odm); -#endif -#else - PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); -#endif - -//odm_SwAntDivChkAntSwitch(Adapter, SWAW_STEP_DETERMINE); - -} - - -VOID -odm_PathDivChkAntSwitchWorkitemCallback( - IN PVOID pContext - ) -{ - PADAPTER pAdapter = (PADAPTER)pContext; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - odm_PathDivChkAntSwitch(pDM_Odm); -} - - - //MAC0_ACCESS_PHY1 - -// 2011-06-22 Neil Chen & Gary Hsin -// Refer to Jr.Luke's SW ANT DIV -// 92D Path Diversity Main function -// refer to 88C software antenna diversity -// -VOID -odm_PathDivChkAntSwitch( - PDM_ODM_T pDM_Odm - //PADAPTER Adapter, - //u1Byte Step -) -{ - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - - - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - s4Byte curRSSI=100, RSSI_A, RSSI_B; - u1Byte nextAntenna=Antenna_B; - static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; - u8Byte curTxOkCnt, curRxOkCnt; - static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; - u8Byte CurByteCnt=0, PreByteCnt=0; - static u1Byte TrafficLoad = TRAFFIC_LOW; - u1Byte Score_A=0, Score_B=0; - u1Byte i=0x0; - // Neil Chen - static u1Byte pathdiv_para=0x0; - static u1Byte switchfirsttime=0x00; - // u1Byte regB33 = (u1Byte) PHY_QueryBBReg(Adapter, 0xB30,BIT27); - u1Byte regB33 = (u1Byte)ODM_GetBBReg(pDM_Odm, PATHDIV_REG, BIT27); - - - //u1Byte reg637 =0x0; - static u1Byte fw_value=0x0; - u1Byte n=0; - static u8Byte lastTxOkCnt_tmp=0, lastRxOkCnt_tmp=0; - //u8Byte curTxOkCnt_tmp, curRxOkCnt_tmp; - PADAPTER BuddyAdapter = Adapter->BuddyAdapter; // another adapter MAC - // Path Diversity //Neil Chen--2011--06--22 - - //u1Byte PathDiv_Trigger = (u1Byte) PHY_QueryBBReg(Adapter, 0xBA0,BIT31); - u1Byte PathDiv_Trigger = (u1Byte) ODM_GetBBReg(pDM_Odm, PATHDIV_TRI,BIT31); - u1Byte PathDiv_Enable = pHalData->bPathDiv_Enable; - - - //DbgPrint("Path Div PG Value:%x \n",PathDiv_Enable); - if((BuddyAdapter==NULL)||(!PathDiv_Enable)||(PathDiv_Trigger)||(pHalData->CurrentBandType92D == BAND_ON_2_4G)) - { - return; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD,("===================>odm_PathDivChkAntSwitch()\n")); - - // The first time to switch path excluding 2nd, 3rd, ....etc.... - if(switchfirsttime==0) - { - if(regB33==0) - { - pDM_SWAT_Table->CurAntenna = Antenna_A; // Default MAC0_5G-->Path A (current antenna) - } - } - - // Condition that does not need to use antenna diversity. - if(pDM_Odm->SupportICType != ODM_RTL8192D) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDiversityMechanims(): No PathDiv Mechanism.\n")); - return; - } - - // Radio off: Status reset to default and return. - if(pHalData->eRFPowerState==eRfOff) - { - //ODM_SwAntDivRestAfterLink(Adapter); - return; - } - - /* - // Handling step mismatch condition. - // Peak step is not finished at last time. Recover the variable and check again. - if( Step != pDM_SWAT_Table->try_flag ) - { - ODM_SwAntDivRestAfterLink(Adapter); - } */ - - if(pDM_SWAT_Table->try_flag == 0xff) - { - // Select RSSI checking target - if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) - { - // Target: Infrastructure mode AP. - pHalData->RSSI_target = NULL; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDivMechanism(): RSSI_target is DEF AP!\n")); - } - else - { - u1Byte index = 0; - PRT_WLAN_STA pEntry = NULL; - PADAPTER pTargetAdapter = NULL; - - if( pMgntInfo->mIbss || ACTING_AS_AP(Adapter) ) - { - // Target: AP/IBSS peer. - pTargetAdapter = Adapter; - } - else if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - { - // Target: VWIFI peer. - pTargetAdapter = GetFirstExtAdapter(Adapter); - } - - if(pTargetAdapter != NULL) - { - for(index=0; indexbAssociated) - break; - } - } - } - - if(pEntry == NULL) - { - ODM_PathDivRestAfterLink(pDM_Odm); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); - return; - } - else - { - pHalData->RSSI_target = pEntry; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); - } - } - - pHalData->RSSI_cnt_A = 0; - pHalData->RSSI_cnt_B = 0; - pDM_SWAT_Table->try_flag = 0; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): Set try_flag to 0 prepare for peak!\n")); - return; - } - else - { - // 1st step - curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; - curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; - lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; - lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; - - if(pDM_SWAT_Table->try_flag == 1) // Training State - { - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - { - TXByteCnt_A += curTxOkCnt; - RXByteCnt_A += curRxOkCnt; - } - else - { - TXByteCnt_B += curTxOkCnt; - RXByteCnt_B += curRxOkCnt; - } - - nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; - pDM_SWAT_Table->RSSI_Trying--; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying)); - if(pDM_SWAT_Table->RSSI_Trying == 0) - { - CurByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (TXByteCnt_A+RXByteCnt_A) : (TXByteCnt_B+RXByteCnt_B); - PreByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (TXByteCnt_B+RXByteCnt_B) : (TXByteCnt_A+RXByteCnt_A); - - if(TrafficLoad == TRAFFIC_HIGH) - { - //CurByteCnt = PlatformDivision64(CurByteCnt, 9); - PreByteCnt =PreByteCnt*9; - } - else if(TrafficLoad == TRAFFIC_LOW) - { - //CurByteCnt = PlatformDivision64(CurByteCnt, 2); - PreByteCnt =PreByteCnt*2; - } - if(pHalData->RSSI_cnt_A > 0) - RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; - else - RSSI_A = 0; - if(pHalData->RSSI_cnt_B > 0) - RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; - else - RSSI_B = 0; - curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; - pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_B : RSSI_A; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", - (pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"))); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", - RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); - } - - } - else // try_flag=0 - { - - if(pHalData->RSSI_cnt_A > 0) - RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; - else - RSSI_A = 0; - if(pHalData->RSSI_cnt_B > 0) - RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; - else - RSSI_B = 0; - curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; - pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == Antenna_A)? RSSI_A : RSSI_B; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", - (pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"))); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", - RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); - } - - //1 Trying State - if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) - { - - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = TP_MODE")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:CurByteCnt = %"i64fmt"d,", CurByteCnt)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:PreByteCnt = %"i64fmt"d\n",PreByteCnt)); - if(CurByteCnt < PreByteCnt) - { - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; - else - pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; - } - else - { - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; - else - pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; - } - for (i= 0; i<8; i++) - { - if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) - Score_A++; - else - Score_B++; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Score_A=%d, Score_B=%d\n", Score_A, Score_B)); - - if(pDM_SWAT_Table->CurAntenna == Antenna_A) - { - nextAntenna = (Score_A >= Score_B)?Antenna_A:Antenna_B; - } - else - { - nextAntenna = (Score_B >= Score_A)?Antenna_B:Antenna_A; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: nextAntenna=%s\n",(nextAntenna==Antenna_A)?"A":"B")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: preAntenna= %s, curAntenna= %s \n", - (pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"))); - - if(nextAntenna != pDM_SWAT_Table->CurAntenna) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Switch back to another antenna")); - } - else - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: current anntena is good\n")); - } - } - - - if(pDM_SWAT_Table->TestMode == RSSI_MODE) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = RSSI_MODE")); - pDM_SWAT_Table->SelectAntennaMap=0xAA; - if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna - { - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: Switch back to another antenna")); - nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; - } - else // current anntena is good - { - nextAntenna =pDM_SWAT_Table->CurAntenna; - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: current anntena is good\n")); - } - } - - pDM_SWAT_Table->try_flag = 0; - pHalData->RSSI_test = FALSE; - pHalData->RSSI_sum_A = 0; - pHalData->RSSI_cnt_A = 0; - pHalData->RSSI_sum_B = 0; - pHalData->RSSI_cnt_B = 0; - TXByteCnt_A = 0; - TXByteCnt_B = 0; - RXByteCnt_A = 0; - RXByteCnt_B = 0; - - } - - //1 Normal State - else if(pDM_SWAT_Table->try_flag == 0) - { - if(TrafficLoad == TRAFFIC_HIGH) - { - if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) - TrafficLoad = TRAFFIC_HIGH; - else - TrafficLoad = TRAFFIC_LOW; - } - else if(TrafficLoad == TRAFFIC_LOW) - { - if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) - TrafficLoad = TRAFFIC_HIGH; - else - TrafficLoad = TRAFFIC_LOW; - } - if(TrafficLoad == TRAFFIC_HIGH) - pDM_SWAT_Table->bTriggerAntennaSwitch = 0; - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Normal:TrafficLoad = %llu\n", curTxOkCnt+curRxOkCnt)); - - //Prepare To Try Antenna - nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; - pDM_SWAT_Table->try_flag = 1; - pHalData->RSSI_test = TRUE; - if((curRxOkCnt+curTxOkCnt) > 1000) - { -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - pDM_SWAT_Table->RSSI_Trying = 4; -#else - pDM_SWAT_Table->RSSI_Trying = 2; -#endif - pDM_SWAT_Table->TestMode = TP_MODE; - } - else - { - pDM_SWAT_Table->RSSI_Trying = 2; - pDM_SWAT_Table->TestMode = RSSI_MODE; - - } - - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: Normal State -> Begin Trying!\n")); - pHalData->RSSI_sum_A = 0; - pHalData->RSSI_cnt_A = 0; - pHalData->RSSI_sum_B = 0; - pHalData->RSSI_cnt_B = 0; - } // end of try_flag=0 - } - - //1 4.Change TRX antenna - if(nextAntenna != pDM_SWAT_Table->CurAntenna) - { - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Change TX Antenna!\n ")); - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, nextAntenna); for 88C - if(nextAntenna==Antenna_A) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH A\n ")); - pathdiv_para = 0x02; //02 to switchback to RF path A - fw_value = 0x03; -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); -#else - ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); -#endif - } - else if(nextAntenna==Antenna_B) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH B\n ")); - if(switchfirsttime==0) // First Time To Enter Path Diversity - { - switchfirsttime=0x01; - pathdiv_para = 0x00; - fw_value=0x00; // to backup RF Path A Releated Registers - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); -#else - ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); - //for(u1Byte n=0; n<80,n++) - //{ - //delay_us(500); - ODM_delay_ms(500); - odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); - - fw_value=0x01; // to backup RF Path A Releated Registers - ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: FIRST TIME To DO PATH SWITCH!\n ")); - } - else - { - pathdiv_para = 0x01; - fw_value = 0x02; -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); -#else - ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); -#endif - } - } - // odm_PathDiversity_8192D(Adapter, pathdiv_para); - } - - //1 5.Reset Statistics - pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - pDM_SWAT_Table->CurAntenna = nextAntenna; - pDM_SWAT_Table->PreRSSI = curRSSI; - //lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; - //lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; - - //1 6.Set next timer - - if(pDM_SWAT_Table->RSSI_Trying == 0) - return; - - if(pDM_SWAT_Table->RSSI_Trying%2 == 0) - { - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - if(TrafficLoad == TRAFFIC_HIGH) - { -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 10 ); //ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 10 ms\n")); -#else - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 20 ); //ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 20 ms\n")); -#endif - } - else if(TrafficLoad == TRAFFIC_LOW) - { - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 50 ); //ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 50 ms\n")); - } - } - else // TestMode == RSSI_MODE - { - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 500 ms\n")); - } - } - else - { - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - if(TrafficLoad == TRAFFIC_HIGH) - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 90 ); //ms - //ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 90 ms\n")); -#else - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 180); //ms -#endif - else if(TrafficLoad == TRAFFIC_LOW) - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 100 ); //ms - } - else - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms - } -} - -//================================================== -//3 PathDiv End -//================================================== - -VOID -odm_SetRespPath_92C( - IN PADAPTER Adapter, - IN u1Byte DefaultRespPath - ) -{ - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: Select Response Path=%d\n",DefaultRespPath)); - if(DefaultRespPath != pDM_PDTable->DefaultRespPath) - { - if(DefaultRespPath == 0) - { - PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x15); - } - else - { - PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x2A); - } - } - pDM_PDTable->DefaultRespPath = DefaultRespPath; -} - - -VOID -ODM_FillTXPathInTXDESC( - IN PADAPTER Adapter, - IN PRT_TCB pTcb, - IN pu1Byte pDesc -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u4Byte TXPath; - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - - //2011.09.05 Add by Luke Lee for path diversity - if(pHalData->PathDivCfg == 1) - { - TXPath = (pDM_PDTable->OFDMTXPath >> pTcb->macId) & BIT0; - //RT_TRACE( COMP_SWAS, DBG_LOUD, ("Fill TXDESC: macID=%d, TXPath=%d\n", pTcb->macId, TXPath)); - //SET_TX_DESC_TX_ANT_CCK(pDesc,TXPath); - if(TXPath == 0) - { - SET_TX_DESC_TX_ANTL_92C(pDesc,1); - SET_TX_DESC_TX_ANT_HT_92C(pDesc,1); - } - else - { - SET_TX_DESC_TX_ANTL_92C(pDesc,2); - SET_TX_DESC_TX_ANT_HT_92C(pDesc,2); - } - TXPath = (pDM_PDTable->CCKTXPath >> pTcb->macId) & BIT0; - if(TXPath == 0) - { - SET_TX_DESC_TX_ANT_CCK_92C(pDesc,1); - } - else - { - SET_TX_DESC_TX_ANT_CCK_92C(pDesc,2); - } - } -} - -//Only for MP //Neil Chen--2012--0502-- -VOID -odm_PathDivInit( -IN PDM_ODM_T pDM_Odm) -{ - pPATHDIV_PARA pathIQK = &pDM_Odm->pathIQK; - - pathIQK->org_2g_RegC14=0x0; - pathIQK->org_2g_RegC4C=0x0; - pathIQK->org_2g_RegC80=0x0; - pathIQK->org_2g_RegC94=0x0; - pathIQK->org_2g_RegCA0=0x0; - pathIQK->org_5g_RegC14=0x0; - pathIQK->org_5g_RegCA0=0x0; - pathIQK->org_5g_RegE30=0x0; - pathIQK->swt_2g_RegC14=0x0; - pathIQK->swt_2g_RegC4C=0x0; - pathIQK->swt_2g_RegC80=0x0; - pathIQK->swt_2g_RegC94=0x0; - pathIQK->swt_2g_RegCA0=0x0; - pathIQK->swt_5g_RegC14=0x0; - pathIQK->swt_5g_RegCA0=0x0; - pathIQK->swt_5g_RegE30=0x0; - -} -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - -#if ((DM_ODM_SUPPORT_TYPE == ODM_MP)||(DM_ODM_SUPPORT_TYPE == ODM_CE)) - - -// -// Description: -// Set Single/Dual Antenna default setting for products that do not do detection in advance. -// -// Added by Joseph, 2012.03.22 -// -VOID -ODM_SingleDualAntennaDefaultSetting( - IN PDM_ODM_T pDM_Odm - ) -{ - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - pDM_SWAT_Table->ANTA_ON=TRUE; - pDM_SWAT_Table->ANTB_ON=TRUE; -} - - -//2 8723A ANT DETECT - - -VOID -odm_PHY_SaveAFERegisters( - IN PDM_ODM_T pDM_Odm, - IN pu4Byte AFEReg, - IN pu4Byte AFEBackup, - IN u4Byte RegisterNum - ) -{ - u4Byte i; - - //RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n")); - for( i = 0 ; i < RegisterNum ; i++){ - AFEBackup[i] = ODM_GetBBReg(pDM_Odm, AFEReg[i], bMaskDWord); - } -} - -VOID -odm_PHY_ReloadAFERegisters( - IN PDM_ODM_T pDM_Odm, - IN pu4Byte AFEReg, - IN pu4Byte AFEBackup, - IN u4Byte RegiesterNum - ) -{ - u4Byte i; - - //RTPRINT(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n")); - for(i = 0 ; i < RegiesterNum; i++) - { - - ODM_SetBBReg(pDM_Odm, AFEReg[i], bMaskDWord, AFEBackup[i]); - } -} - -//2 8723A ANT DETECT -// -// Description: -// Implement IQK single tone for RF DPK loopback and BB PSD scanning. -// This function is cooperated with BB team Neil. -// -// Added by Roger, 2011.12.15 -// -BOOLEAN -ODM_SingleDualAntennaDetection( - IN PDM_ODM_T pDM_Odm, - IN u1Byte mode - ) -{ - - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - u4Byte CurrentChannel,RfLoopReg; - u1Byte n; - u4Byte Reg88c, Regc08, Reg874, Regc50; - u1Byte initial_gain = 0x5a; - u4Byte PSD_report_tmp; - u4Byte AntA_report = 0x0, AntB_report = 0x0,AntO_report=0x0; - BOOLEAN bResult = TRUE; - u4Byte AFE_Backup[16]; - u4Byte AFE_REG_8723A[16] = { - rRx_Wait_CCA, rTx_CCK_RFON, - rTx_CCK_BBON, rTx_OFDM_RFON, - rTx_OFDM_BBON, rTx_To_Rx, - rTx_To_Tx, rRx_CCK, - rRx_OFDM, rRx_Wait_RIFS, - rRx_TO_Rx, rStandby, - rSleep, rPMPD_ANAEN, - rFPGA0_XCD_SwitchControl, rBlue_Tooth}; - - if(!(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))) - return bResult; - - if(!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) - return bResult; - - if(pDM_Odm->SupportICType == ODM_RTL8192C) - { - //Which path in ADC/DAC is turnned on for PSD: both I/Q - ODM_SetBBReg(pDM_Odm, 0x808, BIT10|BIT11, 0x3); - //Ageraged number: 8 - ODM_SetBBReg(pDM_Odm, 0x808, BIT12|BIT13, 0x1); - //pts = 128; - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); - } - - //1 Backup Current RF/BB Settings - - CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask); - RfLoopReg = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x00, bRFRegOffsetMask); - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A); // change to Antenna A - // Step 1: USE IQK to transmitter single tone - - ODM_StallExecution(10); - - //Store A Path Register 88c, c08, 874, c50 - Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord); - Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord); - Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord); - Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord); - - // Store AFE Registers - odm_PHY_SaveAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); - - //Set PSD 128 pts - ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); //128 pts - - // To SET CH1 to do - ODM_SetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x01); //Channel 1 - - // AFE all on step - ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_CCK_RFON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_CCK_BBON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_OFDM_RFON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_OFDM_BBON, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_To_Rx, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rTx_To_Tx, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_CCK, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_OFDM, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_Wait_RIFS, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rRx_TO_Rx, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rStandby, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rSleep, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rPMPD_ANAEN, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_SwitchControl, bMaskDWord, 0x6FDB25A4); - ODM_SetBBReg(pDM_Odm, rBlue_Tooth, bMaskDWord, 0x6FDB25A4); - - // 3 wire Disable - ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0); - - //BB IQK Setting - ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4); - ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000); - - //IQK setting tone@ 4.34Mhz - ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C); - ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); - - - //Page B init - ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000); - ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); - ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); - ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); - ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150008); - ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150008); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0); - - //RF loop Setting - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0, 0xFFFFF, 0x50008); - - //IQK Single tone start - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); - ODM_StallExecution(1000); - PSD_report_tmp=0x0; - - for (n=0;n<2;n++) - { - PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); - if(PSD_report_tmp >AntA_report) - AntA_report=PSD_report_tmp; - } - - PSD_report_tmp=0x0; - - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); // change to Antenna B - ODM_StallExecution(10); - - - for (n=0;n<2;n++) - { - PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); - if(PSD_report_tmp > AntB_report) - AntB_report=PSD_report_tmp; - } - - // change to open case - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, 0); // change to Ant A and B all open case - ODM_StallExecution(10); - - for (n=0;n<2;n++) - { - PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); - if(PSD_report_tmp > AntO_report) - AntO_report=PSD_report_tmp; - } - - //Close IQK Single Tone function - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - PSD_report_tmp = 0x0; - - //1 Return to antanna A - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A); - ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c); - ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08); - ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874); - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40); - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,CurrentChannel); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x00, bRFRegOffsetMask,RfLoopReg); - - //Reload AFE Registers - odm_PHY_ReloadAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d \n", 2416, AntO_report)); - - - if(pDM_Odm->SupportICType == ODM_RTL8723A) - { - //2 Test Ant B based on Ant A is ON - if(mode==ANTTESTB) - { - if(AntA_report >= 100) - { - if(AntB_report > (AntA_report+1)) - { - pDM_SWAT_Table->ANTB_ON=FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n")); - } - else - { - pDM_SWAT_Table->ANTB_ON=TRUE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna is A and B\n")); - } - } - else - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); - pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default - bResult = FALSE; - } - } - //2 Test Ant A and B based on DPDT Open - else if(mode==ANTTESTALL) - { - if((AntO_report >=100)&(AntO_report <118)) - { - if(AntA_report > (AntO_report+1)) - { - pDM_SWAT_Table->ANTA_ON=FALSE; - //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_AntennaDetection(): Antenna A is OFF\n")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant A is OFF")); - } - else - { - pDM_SWAT_Table->ANTA_ON=TRUE; - //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_AntennaDetection(): Antenna A is ON\n")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant A is ON")); - } - - if(AntB_report > (AntO_report+2)) - { - pDM_SWAT_Table->ANTB_ON=FALSE; - //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_AntennaDetection(): Antenna B is OFF\n")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant B is OFF")); - } - else - { - pDM_SWAT_Table->ANTB_ON=TRUE; - //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_AntennaDetection(): Antenna B is ON\n")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant B is ON")); - } - } - } - } - else if(pDM_Odm->SupportICType == ODM_RTL8192C) - { - if(AntA_report >= 100) - { - if(AntB_report > (AntA_report+2)) - { - pDM_SWAT_Table->ANTA_ON=FALSE; - pDM_SWAT_Table->ANTB_ON=TRUE; - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna B\n")); - } - else if(AntA_report > (AntB_report+2)) - { - pDM_SWAT_Table->ANTA_ON=TRUE; - pDM_SWAT_Table->ANTB_ON=FALSE; - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n")); - } - else - { - pDM_SWAT_Table->ANTA_ON=TRUE; - pDM_SWAT_Table->ANTB_ON=TRUE; - RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna \n")); - } - } - else - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); - pDM_SWAT_Table->ANTA_ON=TRUE; // Set Antenna A on as default - pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default - bResult = FALSE; - } - } - return bResult; - -} - - -#endif // end odm_CE - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -/* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */ -void odm_dtc(PDM_ODM_T pDM_Odm) -{ -#ifdef CONFIG_DM_RESP_TXAGC - #define DTC_BASE 35 /* RSSI higher than this value, start to decade TX power */ - #define DTC_DWN_BASE (DTC_BASE-5) /* RSSI lower than this value, start to increase TX power */ - - /* RSSI vs TX power step mapping: decade TX power */ - static const u8 dtc_table_down[]={ - DTC_BASE, - (DTC_BASE+5), - (DTC_BASE+10), - (DTC_BASE+15), - (DTC_BASE+20), - (DTC_BASE+25) - }; - - /* RSSI vs TX power step mapping: increase TX power */ - static const u8 dtc_table_up[]={ - DTC_DWN_BASE, - (DTC_DWN_BASE-5), - (DTC_DWN_BASE-10), - (DTC_DWN_BASE-15), - (DTC_DWN_BASE-15), - (DTC_DWN_BASE-20), - (DTC_DWN_BASE-20), - (DTC_DWN_BASE-25), - (DTC_DWN_BASE-25), - (DTC_DWN_BASE-30), - (DTC_DWN_BASE-35) - }; - - u8 i; - u8 dtc_steps=0; - u8 sign; - u8 resp_txagc=0; - - #if 0 - /* As DIG is disabled, DTC is also disable */ - if(!(pDM_Odm->SupportAbility & ODM_XXXXXX)) - return; - #endif - - if (DTC_BASE < pDM_Odm->RSSI_Min) { - /* need to decade the CTS TX power */ - sign = 1; - for (i=0;i= pDM_Odm->RSSI_Min) || (dtc_steps >= 6)) - break; - else - dtc_steps++; - } - } -#if 0 - else if (DTC_DWN_BASE > pDM_Odm->RSSI_Min) - { - /* needs to increase the CTS TX power */ - sign = 0; - dtc_steps = 1; - for (i=0;iRSSI_Min) || (dtc_steps>=10)) - break; - else - dtc_steps++; - } - } -#endif - else - { - sign = 0; - dtc_steps = 0; - } - - resp_txagc = dtc_steps | (sign << 4); - resp_txagc = resp_txagc | (resp_txagc << 5); - ODM_Write1Byte(pDM_Odm, 0x06d9, resp_txagc); - - DBG_871X("%s RSSI_Min:%u, set RESP_TXAGC to %s %u\n", - __func__, pDM_Odm->RSSI_Min, sign?"minus":"plus", dtc_steps); -#endif /* CONFIG_RESP_TXAGC_ADJUST */ -} - -#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */ - diff --git a/hal/OUTSRC/odm_HWConfig.c b/hal/OUTSRC/odm_HWConfig.c deleted file mode 100755 index a11a815..0000000 --- a/hal/OUTSRC/odm_HWConfig.c +++ /dev/null @@ -1,1198 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -//============================================================ -// include files -//============================================================ - -#include "odm_precomp.h" - -#if (RTL8188E_FOR_TEST_CHIP > 1) - #define READ_AND_CONFIG(ic, txt) do {\ - if (pDM_Odm->bIsMPChip)\ - READ_AND_CONFIG_MP(ic,txt);\ - else\ - READ_AND_CONFIG_TC(ic,txt);\ - } while(0) -#elif (RTL8188E_FOR_TEST_CHIP == 1) - #define READ_AND_CONFIG READ_AND_CONFIG_TC -#else - #define READ_AND_CONFIG READ_AND_CONFIG_MP -#endif - -#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(pDM_Odm)) -#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(pDM_Odm)) - -u1Byte -odm_QueryRxPwrPercentage( - IN s1Byte AntPower - ) -{ - if ((AntPower <= -100) || (AntPower >= 20)) - { - return 0; - } - else if (AntPower >= 0) - { - return 100; - } - else - { - return (100+AntPower); - } - -} - -#if (DM_ODM_SUPPORT_TYPE != ODM_MP) -// -// 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. -// IF other SW team do not support the feature, remove this section.?? -// -s4Byte -odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo( - IN OUT PDM_ODM_T pDM_Odm, - s4Byte CurrSig -) -{ - s4Byte RetSig; -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - //if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) - { - // Step 1. Scale mapping. - // 20100611 Joseph: Re-tunning RSSI presentation for Lenovo. - // 20100426 Joseph: Modify Signal strength mapping. - // This modification makes the RSSI indication similar to Intel solution. - // 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE. - if(CurrSig >= 54 && CurrSig <= 100) - { - RetSig = 100; - } - else if(CurrSig>=42 && CurrSig <= 53 ) - { - RetSig = 95; - } - else if(CurrSig>=36 && CurrSig <= 41 ) - { - RetSig = 74 + ((CurrSig - 36) *20)/6; - } - else if(CurrSig>=33 && CurrSig <= 35 ) - { - RetSig = 65 + ((CurrSig - 33) *8)/2; - } - else if(CurrSig>=18 && CurrSig <= 32 ) - { - RetSig = 62 + ((CurrSig - 18) *2)/15; - } - else if(CurrSig>=15 && CurrSig <= 17 ) - { - RetSig = 33 + ((CurrSig - 15) *28)/2; - } - else if(CurrSig>=10 && CurrSig <= 14 ) - { - RetSig = 39; - } - else if(CurrSig>=8 && CurrSig <= 9 ) - { - RetSig = 33; - } - else if(CurrSig <= 8 ) - { - RetSig = 19; - } - } -#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_MP) - return RetSig; -} - -s4Byte -odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore( - IN OUT PDM_ODM_T pDM_Odm, - s4Byte CurrSig -) -{ - s4Byte RetSig; -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - //if(pDM_Odm->SupportInterface == ODM_ITRF_USB) - { - // Netcore request this modification because 2009.04.13 SU driver use it. - if(CurrSig >= 31 && CurrSig <= 100) - { - RetSig = 100; - } - else if(CurrSig >= 21 && CurrSig <= 30) - { - RetSig = 90 + ((CurrSig - 20) / 1); - } - else if(CurrSig >= 11 && CurrSig <= 20) - { - RetSig = 80 + ((CurrSig - 10) / 1); - } - else if(CurrSig >= 7 && CurrSig <= 10) - { - RetSig = 69 + (CurrSig - 7); - } - else if(CurrSig == 6) - { - RetSig = 54; - } - else if(CurrSig == 5) - { - RetSig = 45; - } - else if(CurrSig == 4) - { - RetSig = 36; - } - else if(CurrSig == 3) - { - RetSig = 27; - } - else if(CurrSig == 2) - { - RetSig = 18; - } - else if(CurrSig == 1) - { - RetSig = 9; - } - else - { - RetSig = CurrSig; - } - } -#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_MP) - return RetSig; -} - - -s4Byte -odm_SignalScaleMapping_92CSeries( - IN OUT PDM_ODM_T pDM_Odm, - IN s4Byte CurrSig -) -{ - s4Byte RetSig; -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) - if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) - { - // Step 1. Scale mapping. - if(CurrSig >= 61 && CurrSig <= 100) - { - RetSig = 90 + ((CurrSig - 60) / 4); - } - else if(CurrSig >= 41 && CurrSig <= 60) - { - RetSig = 78 + ((CurrSig - 40) / 2); - } - else if(CurrSig >= 31 && CurrSig <= 40) - { - RetSig = 66 + (CurrSig - 30); - } - else if(CurrSig >= 21 && CurrSig <= 30) - { - RetSig = 54 + (CurrSig - 20); - } - else if(CurrSig >= 5 && CurrSig <= 20) - { - RetSig = 42 + (((CurrSig - 5) * 2) / 3); - } - else if(CurrSig == 4) - { - RetSig = 36; - } - else if(CurrSig == 3) - { - RetSig = 27; - } - else if(CurrSig == 2) - { - RetSig = 18; - } - else if(CurrSig == 1) - { - RetSig = 9; - } - else - { - RetSig = CurrSig; - } - } -#endif - -#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE)) - if((pDM_Odm->SupportInterface == ODM_ITRF_USB) || (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) ) - { - if(CurrSig >= 51 && CurrSig <= 100) - { - RetSig = 100; - } - else if(CurrSig >= 41 && CurrSig <= 50) - { - RetSig = 80 + ((CurrSig - 40)*2); - } - else if(CurrSig >= 31 && CurrSig <= 40) - { - RetSig = 66 + (CurrSig - 30); - } - else if(CurrSig >= 21 && CurrSig <= 30) - { - RetSig = 54 + (CurrSig - 20); - } - else if(CurrSig >= 10 && CurrSig <= 20) - { - RetSig = 42 + (((CurrSig - 10) * 2) / 3); - } - else if(CurrSig >= 5 && CurrSig <= 9) - { - RetSig = 22 + (((CurrSig - 5) * 3) / 2); - } - else if(CurrSig >= 1 && CurrSig <= 4) - { - RetSig = 6 + (((CurrSig - 1) * 3) / 2); - } - else - { - RetSig = CurrSig; - } - } -#endif - return RetSig; -} -s4Byte -odm_SignalScaleMapping( - IN OUT PDM_ODM_T pDM_Odm, - IN s4Byte CurrSig -) -{ - if( (pDM_Odm->SupportPlatform == ODM_MP) && - (pDM_Odm->SupportInterface != ODM_ITRF_PCIE) && //USB & SDIO - (pDM_Odm->PatchID==10))//pMgntInfo->CustomerID == RT_CID_819x_Netcore - { - return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(pDM_Odm,CurrSig); - } - else if( (pDM_Odm->SupportPlatform == ODM_MP) && - (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) && - (pDM_Odm->PatchID==19))//pMgntInfo->CustomerID == RT_CID_819x_Lenovo) - { - return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(pDM_Odm, CurrSig); - } - else{ - return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig); - } - -} -#endif - -//pMgntInfo->CustomerID == RT_CID_819x_Lenovo -static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo( - IN PDM_ODM_T pDM_Odm, - IN u1Byte isCCKrate, - IN u1Byte PWDB_ALL, - IN u1Byte path, - IN u1Byte RSSI -) -{ - u1Byte SQ; -#if (DM_ODM_SUPPORT_TYPE & ODM_MP) - // mapping to 5 bars for vista signal strength - // signal quality in driver will be displayed to signal strength - if(isCCKrate){ - // in vista. - if(PWDB_ALL >= 50) - SQ = 100; - else if(PWDB_ALL >= 35 && PWDB_ALL < 50) - SQ = 80; - else if(PWDB_ALL >= 22 && PWDB_ALL < 35) - SQ = 60; - else if(PWDB_ALL >= 18 && PWDB_ALL < 22) - SQ = 40; - else - SQ = 20; - } - else{//OFDM rate - - // mapping to 5 bars for vista signal strength - // signal quality in driver will be displayed to signal strength - // in vista. - if(RSSI >= 50) - SQ = 100; - else if(RSSI >= 35 && RSSI < 50) - SQ = 80; - else if(RSSI >= 22 && RSSI < 35) - SQ = 60; - else if(RSSI >= 18 && RSSI < 22) - SQ = 40; - else - SQ = 20; - } -#endif - return SQ; -} - -static u1Byte -odm_EVMdbToPercentage( - IN s1Byte Value - ) -{ - // - // -33dB~0dB to 0%~99% - // - s1Byte ret_val; - - ret_val = Value; - //ret_val /= 2; - - //ODM_RTPRINT(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x \n", ret_val, ret_val)); - - if(ret_val >= 0) - ret_val = 0; - if(ret_val <= -33) - ret_val = -33; - - ret_val = 0 - ret_val; - ret_val*=3; - - if(ret_val == 99) - ret_val = 100; - - return(ret_val); -} - - - -VOID -odm_RxPhyStatus92CSeries_Parsing( - IN OUT PDM_ODM_T pDM_Odm, - OUT PODM_PHY_INFO_T pPhyInfo, - IN pu1Byte pPhyStatus, - IN PODM_PACKET_INFO_T pPktinfo - ) -{ - SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - u1Byte i, Max_spatial_stream; - s1Byte rx_pwr[4], rx_pwr_all=0; - u1Byte EVM, PWDB_ALL = 0, PWDB_ALL_BT; - u1Byte RSSI, total_rssi=0; - u1Byte isCCKrate=0; - u1Byte rf_rx_num = 0; - u1Byte cck_highpwr = 0; - u1Byte LNA_idx, VGA_idx; - - PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus; - - isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M ) && (pPktinfo->Rate <= DESC92C_RATE11M ))?TRUE :FALSE; - - pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1; - pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; - - - if(isCCKrate) - { - u1Byte report; - u1Byte cck_agc_rpt; - - pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++; - // - // (1)Hardware does not provide RSSI for CCK - // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) - // - - //if(pHalData->eRFPowerState == eRfOn) - cck_highpwr = pDM_Odm->bCckHighPower; - //else - // cck_highpwr = FALSE; - - cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ; - - //2011.11.28 LukeLee: 88E use different LNA & VGA gain table - //The RSSI formula should be modified according to the gain table - //In 88E, cck_highpwr is always set to 1 - if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8812)) - { - LNA_idx = ((cck_agc_rpt & 0xE0) >>5); - VGA_idx = (cck_agc_rpt & 0x1F); - switch(LNA_idx) - { - case 7: - if(VGA_idx <= 27) - rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2 - else - rx_pwr_all = -100; - break; - case 6: - rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0 - break; - case 5: - rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5 - break; - case 4: - rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4 - break; - case 3: - //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0 - rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0 - break; - case 2: - if(cck_highpwr) - rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0 - else - rx_pwr_all = -6+ 2*(5-VGA_idx); - break; - case 1: - rx_pwr_all = 8-2*VGA_idx; - break; - case 0: - rx_pwr_all = 14-2*VGA_idx; - break; - default: - //DbgPrint("CCK Exception default\n"); - break; - } - rx_pwr_all += 6; - PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); - if(cck_highpwr == FALSE) - { - if(PWDB_ALL >= 80) - PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80; - else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20)) - PWDB_ALL += 3; - if(PWDB_ALL>100) - PWDB_ALL = 100; - } - } - else - { - if(!cck_highpwr) - { - report =( cck_agc_rpt & 0xc0 )>>6; - switch(report) - { - // 03312009 modified by cosa - // Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion - // Note: different RF with the different RNA gain. - case 0x3: - rx_pwr_all = -46 - (cck_agc_rpt & 0x3e); - break; - case 0x2: - rx_pwr_all = -26 - (cck_agc_rpt & 0x3e); - break; - case 0x1: - rx_pwr_all = -12 - (cck_agc_rpt & 0x3e); - break; - case 0x0: - rx_pwr_all = 16 - (cck_agc_rpt & 0x3e); - break; - } - } - else - { - //report = pDrvInfo->cfosho[0] & 0x60; - //report = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a& 0x60; - - report = (cck_agc_rpt & 0x60)>>5; - switch(report) - { - case 0x3: - rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ; - break; - case 0x2: - rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1); - break; - case 0x1: - rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1) ; - break; - case 0x0: - rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1) ; - break; - } - } - - PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); - - //Modification for ext-LNA board - if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) - { - if((cck_agc_rpt>>7) == 0){ - PWDB_ALL = (PWDB_ALL>94)?100:(PWDB_ALL +6); - } - else - { - if(PWDB_ALL > 38) - PWDB_ALL -= 16; - else - PWDB_ALL = (PWDB_ALL<=16)?(PWDB_ALL>>2):(PWDB_ALL -12); - } - - //CCK modification - if(PWDB_ALL > 25 && PWDB_ALL <= 60) - PWDB_ALL += 6; - //else if (PWDB_ALL <= 25) - // PWDB_ALL += 8; - } - else//Modification for int-LNA board - { - if(PWDB_ALL > 99) - PWDB_ALL -= 8; - else if(PWDB_ALL > 50 && PWDB_ALL <= 68) - PWDB_ALL += 4; - } - } - - pPhyInfo->RxPWDBAll = PWDB_ALL; -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) - pPhyInfo->BTRxRSSIPercentage = PWDB_ALL; - pPhyInfo->RecvSignalPower = rx_pwr_all; -#endif - // - // (3) Get Signal Quality (EVM) - // - if(pPktinfo->bPacketMatchBSSID) - { - u1Byte SQ,SQ_rpt; - - if((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)){//pMgntInfo->CustomerID == RT_CID_819x_Lenovo - SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0); - } - else if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){ - SQ = 100; - } - else{ - SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all; - - if(SQ_rpt > 64) - SQ = 0; - else if (SQ_rpt < 20) - SQ = 100; - else - SQ = ((64-SQ_rpt) * 100) / 44; - - } - - //DbgPrint("cck SQ = %d\n", SQ); - pPhyInfo->SignalQuality = SQ; - pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ; - pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; - } - } - else //is OFDM rate - { - pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; - - // - // (1)Get RSSI for HT rate - // - - for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) - { - // 2008/01/30 MH we will judge RF RX path now. - if (pDM_Odm->RFPathRxEnable & BIT(i)) - rf_rx_num++; - //else - //continue; - - rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110; - - #if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) - pPhyInfo->RxPwr[i] = rx_pwr[i]; - #endif - - /* Translate DBM to percentage. */ - RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); - total_rssi += RSSI; - //RTPRINT(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI)); - - //Modification for ext-LNA board - if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) - { - if((pPhyStaRpt->path_agc[i].trsw) == 1) - RSSI = (RSSI>94)?100:(RSSI +6); - else - RSSI = (RSSI<=16)?(RSSI>>3):(RSSI -16); - - if((RSSI <= 34) && (RSSI >=4)) - RSSI -= 4; - } - - pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI; - - #if (DM_ODM_SUPPORT_TYPE & (/*ODM_MP|*/ODM_CE|ODM_AP|ODM_ADSL)) - //Get Rx snr value in DB - pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2); - #endif - - /* Record Signal Strength for next packet */ - if(pPktinfo->bPacketMatchBSSID) - { - if((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)) - { - if(i==ODM_RF_PATH_A) - pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI); - - } - - } - } - - - // - // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) - // - rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1 )& 0x7f) -110; - //RTPRINT(FRX, RX_PHY_SS, ("PWDB_ALL=%d\n", PWDB_ALL)); - - PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); - //RTPRINT(FRX, RX_PHY_SS, ("PWDB_ALL=%d\n",PWDB_ALL)); - - pPhyInfo->RxPWDBAll = PWDB_ALL; - //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll)); - #if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) - pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT; - pPhyInfo->RxPower = rx_pwr_all; - pPhyInfo->RecvSignalPower = rx_pwr_all; - #endif - - if((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)){ - //do nothing - } - else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo - // - // (3)EVM of HT rate - // - if(pPktinfo->Rate >=DESC92C_RATEMCS8 && pPktinfo->Rate <=DESC92C_RATEMCS15) - Max_spatial_stream = 2; //both spatial stream make sense - else - Max_spatial_stream = 1; //only spatial stream 1 makes sense - - for(i=0; i>= 1" because the compilor of free build environment - // fill most significant bit to "zero" when doing shifting operation which may change a negative - // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. - EVM = odm_EVMdbToPercentage( (pPhyStaRpt->stream_rxevm[i] )); //dbm - - //RTPRINT(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n", - //GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM)); - - if(pPktinfo->bPacketMatchBSSID) - { - if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only - { - pPhyInfo->SignalQuality = (u1Byte)(EVM & 0xff); - } - pPhyInfo->RxMIMOSignalQuality[i] = (u1Byte)(EVM & 0xff); - } - } - } - - } -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) - //UI BSS List signal strength(in percentage), make it good looking, from 0~100. - //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). - if(isCCKrate) - { -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ - pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));//PWDB_ALL; -#else - pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));//PWDB_ALL; -#endif - } - else - { - if (rf_rx_num != 0) - { -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ - pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));//PWDB_ALL; -#else - pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num)); -#endif - } - } -#endif - - //For 92C/92D HW (Hybrid) Antenna Diversity -#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) - pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel; - //For 88E HW Antenna Diversity - pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel; - pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b; - pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2; -#endif -} - -VOID -odm_Init_RSSIForDM( - IN OUT PDM_ODM_T pDM_Odm - ) -{ - -} - -VOID -odm_Process_RSSIForDM( - IN OUT PDM_ODM_T pDM_Odm, - IN PODM_PHY_INFO_T pPhyInfo, - IN PODM_PACKET_INFO_T pPktinfo - ) -{ - - s4Byte UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave; - u1Byte isCCKrate=0; - u1Byte RSSI_max, RSSI_min, i; - u4Byte OFDM_pkt=0; - u4Byte Weighting=0; - - PSTA_INFO_T pEntry; - - if(pPktinfo->StationID == 0xFF) - return; - - // 2011/11/17 MH Need to debug - //if (pDM_Odm->SupportPlatform == ODM_MP) - { - - } - - pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID]; - if(!IS_STA_VALID(pEntry) ){ - return; - } - if((!pPktinfo->bPacketMatchBSSID) ) - { - return; - } - - isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M ) && (pPktinfo->Rate <= DESC92C_RATE11M ))?TRUE :FALSE; - if(pPktinfo->bPacketBeacon) - pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++; - - pDM_Odm->RxRate = pPktinfo->Rate; -#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) -#if ((RTL8192C_SUPPORT == 1) ||(RTL8192D_SUPPORT == 1)) - if(pDM_Odm->SupportICType & ODM_RTL8192C|ODM_RTL8192D) - { - if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) - { - //if(pPktinfo->bPacketBeacon) - //{ - // DbgPrint("This is beacon, isCCKrate=%d\n", isCCKrate); - //} - ODM_AntselStatistics_88C(pDM_Odm, pPktinfo->StationID, pPhyInfo->RxPWDBAll, isCCKrate); - } - } -#endif - //-----------------Smart Antenna Debug Message------------------// -#if (RTL8188E_SUPPORT == 1) - if(pDM_Odm->SupportICType == ODM_RTL8188E) - { - u1Byte antsel_tr_mux; - pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; - - if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) - { - if(pDM_FatTable->FAT_State == FAT_TRAINING_STATE) - { - if(pPktinfo->bPacketToSelf) //(pPktinfo->bPacketMatchBSSID && (!pPktinfo->bPacketBeacon)) - { - antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |(pDM_FatTable->antsel_rx_keep_1 <<1) |pDM_FatTable->antsel_rx_keep_0; - pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll; - pDM_FatTable->antRSSIcnt[antsel_tr_mux]++; - //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("isCCKrate=%d, PWDB_ALL=%d\n",isCCKrate, pPhyInfo->RxPWDBAll)); - //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=3'b%d%d%d\n", - //pDM_FatTable->antsel_rx_keep_2, pDM_FatTable->antsel_rx_keep_1, pDM_FatTable->antsel_rx_keep_0)); - - } - } - } - else if((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)) - { - if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) - { - antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |(pDM_FatTable->antsel_rx_keep_1 <<1) |pDM_FatTable->antsel_rx_keep_0; - //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=3'b%d%d%d\n", - // pDM_FatTable->antsel_rx_keep_2, pDM_FatTable->antsel_rx_keep_1, pDM_FatTable->antsel_rx_keep_0)); - - ODM_AntselStatistics_88E(pDM_Odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll); - } - } - - } -#endif -#endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) - //-----------------Smart Antenna Debug Message------------------// - - UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK; - UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM; - UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; - - if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) - { - - if(!isCCKrate)//ofdm rate - { - if(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0){ - RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; - pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; - pDM_Odm->RSSI_B = 0; - } - else - { - //DbgPrint("pRfd->Status.RxMIMOSignalStrength[0] = %d, pRfd->Status.RxMIMOSignalStrength[1] = %d \n", - //pRfd->Status.RxMIMOSignalStrength[0], pRfd->Status.RxMIMOSignalStrength[1]); - pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; - pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; - - if(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]) - { - RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; - RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; - } - else - { - RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; - RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; - } - if((RSSI_max -RSSI_min) < 3) - RSSI_Ave = RSSI_max; - else if((RSSI_max -RSSI_min) < 6) - RSSI_Ave = RSSI_max - 1; - else if((RSSI_max -RSSI_min) < 10) - RSSI_Ave = RSSI_max - 2; - else - RSSI_Ave = RSSI_max - 3; - } - - //1 Process OFDM RSSI - if(UndecoratedSmoothedOFDM <= 0) // initialize - { - UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll; - } - else - { - if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedOFDM) - { - UndecoratedSmoothedOFDM = - ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + - (RSSI_Ave)) /(Rx_Smooth_Factor); - UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1; - } - else - { - UndecoratedSmoothedOFDM = - ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + - (RSSI_Ave)) /(Rx_Smooth_Factor); - } - } - - pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0; - - } - else - { - RSSI_Ave = pPhyInfo->RxPWDBAll; - pDM_Odm->RSSI_A = (u1Byte) pPhyInfo->RxPWDBAll; - pDM_Odm->RSSI_B = 0xFF; - - //1 Process CCK RSSI - if(UndecoratedSmoothedCCK <= 0) // initialize - { - UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll; - } - else - { - if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedCCK) - { - UndecoratedSmoothedCCK = - ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + - (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor); - UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1; - } - else - { - UndecoratedSmoothedCCK = - ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + - (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor); - } - } - pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1; - } - - //if(pEntry) - { - //2011.07.28 LukeLee: modified to prevent unstable CCK RSSI - if(pEntry->rssi_stat.ValidBit >= 64) - pEntry->rssi_stat.ValidBit = 64; - else - pEntry->rssi_stat.ValidBit++; - - for(i=0; irssi_stat.ValidBit; i++) - OFDM_pkt += (u1Byte)(pEntry->rssi_stat.PacketMap>>i)&BIT0; - - if(pEntry->rssi_stat.ValidBit == 64) - { - Weighting = ((OFDM_pkt<<4) > 64)?64:(OFDM_pkt<<4); - UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6; - } - else - { - if(pEntry->rssi_stat.ValidBit != 0) - UndecoratedSmoothedPWDB = (OFDM_pkt*UndecoratedSmoothedOFDM+(pEntry->rssi_stat.ValidBit-OFDM_pkt)*UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit; - else - UndecoratedSmoothedPWDB = 0; - } - - pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK; - pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM; - pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; - - //DbgPrint("OFDM_pkt=%d, Weighting=%d\n", OFDM_pkt, Weighting); - //DbgPrint("UndecoratedSmoothedOFDM=%d, UndecoratedSmoothedPWDB=%d, UndecoratedSmoothedCCK=%d\n", - // UndecoratedSmoothedOFDM, UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK); - - } - - } -} - -// -// Endianness before calling this API -// -VOID -ODM_PhyStatusQuery_92CSeries( - IN OUT PDM_ODM_T pDM_Odm, - OUT PODM_PHY_INFO_T pPhyInfo, - IN pu1Byte pPhyStatus, - IN PODM_PACKET_INFO_T pPktinfo - ) -{ - - odm_RxPhyStatus92CSeries_Parsing( - pDM_Odm, - pPhyInfo, - pPhyStatus, - pPktinfo); - - if( pDM_Odm->RSSI_test == TRUE) - { - // Select the packets to do RSSI checking for antenna switching. - if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon ) - { - /* - #if 0//(DM_ODM_SUPPORT_TYPE == ODM_MP) - dm_SWAW_RSSI_Check( - Adapter, - (tmppAdapter!=NULL)?(tmppAdapter==Adapter):TRUE, - bPacketMatchBSSID, - pEntry, - pRfd); - #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - // Select the packets to do RSSI checking for antenna switching. - //odm_SwAntDivRSSICheck8192C(padapter, precvframe->u.hdr.attrib.RxPWDBAll); - #endif - */ - ODM_SwAntDivChkPerPktRssi(pDM_Odm,pPktinfo->StationID,pPhyInfo); - } - } - else - { - odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo); - } - -} - - - -// -// Endianness before calling this API -// -VOID -ODM_PhyStatusQuery_JaguarSeries( - IN OUT PDM_ODM_T pDM_Odm, - OUT PODM_PHY_INFO_T pPhyInfo, - IN pu1Byte pPhyStatus, - IN PODM_PACKET_INFO_T pPktinfo - ) -{ - - -} - -VOID -ODM_PhyStatusQuery( - IN OUT PDM_ODM_T pDM_Odm, - OUT PODM_PHY_INFO_T pPhyInfo, - IN pu1Byte pPhyStatus, - IN PODM_PACKET_INFO_T pPktinfo - ) -{ -#if 0 // How to jaguar jugar series?? - if(pDM_Odm->SupportICType >= ODM_RTL8195 ) - { - ODM_PhyStatusQuery_JaguarSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo); - } - else -#endif - { - ODM_PhyStatusQuery_92CSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo); - } -} - -// For future use. -VOID -ODM_MacStatusQuery( - IN OUT PDM_ODM_T pDM_Odm, - IN pu1Byte pMacStatus, - IN u1Byte MacID, - IN BOOLEAN bPacketMatchBSSID, - IN BOOLEAN bPacketToSelf, - IN BOOLEAN bPacketBeacon - ) -{ - // 2011/10/19 Driver team will handle in the future. - -} - -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE|ODM_AP)) - -HAL_STATUS -ODM_ConfigRFWithHeaderFile( - IN PDM_ODM_T pDM_Odm, - IN ODM_RF_RADIO_PATH_E Content, - IN ODM_RF_RADIO_PATH_E eRFPath - ) -{ - //RT_STATUS rtStatus = RT_STATUS_SUCCESS; - - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigRFWithHeaderFile\n")); -#if (RTL8723A_SUPPORT == 1) - if (pDM_Odm->SupportICType == ODM_RTL8723A) - { - if(eRFPath == ODM_RF_PATH_A) - READ_AND_CONFIG_MP(8723A,_RadioA_1T_); - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_A:Rtl8723RadioA_1TArray\n")); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_B:Rtl8723RadioB_1TArray\n")); - } - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("ODM_ConfigRFWithHeaderFile: Radio No %x\n", eRFPath)); - //rtStatus = RT_STATUS_SUCCESS; -#endif -#if (RTL8188E_SUPPORT == 1) - if (pDM_Odm->SupportICType == ODM_RTL8188E) - { - if(IS_VENDOR_8188E_I_CUT_SERIES(pDM_Odm->Adapter)) - READ_AND_CONFIG(8188E,_RadioA_1T_ICUT_); - else - READ_AND_CONFIG(8188E,_RadioA_1T_); - - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_A:Rtl8188ERadioA_1TArray\n")); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_B:Rtl8188ERadioB_1TArray\n")); - } - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("ODM_ConfigRFWithHeaderFile: Radio No %x\n", eRFPath)); - //rtStatus = RT_STATUS_SUCCESS; -#endif - return HAL_STATUS_SUCCESS; -} - - -HAL_STATUS -ODM_ConfigBBWithHeaderFile( - IN PDM_ODM_T pDM_Odm, - IN ODM_BB_Config_Type ConfigType - ) -{ -#if (RTL8723A_SUPPORT == 1) - if(pDM_Odm->SupportICType == ODM_RTL8723A) - { - - if(ConfigType == CONFIG_BB_PHY_REG) - { - READ_AND_CONFIG_MP(8723A,_PHY_REG_1T_); - } - else if(ConfigType == CONFIG_BB_AGC_TAB) - { - READ_AND_CONFIG_MP(8723A,_AGC_TAB_1T_); - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8723AGCTAB_1TArray\n")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8723PHY_REG_1TArray\n")); - } -#endif - -#if (RTL8188E_SUPPORT == 1) - if(pDM_Odm->SupportICType == ODM_RTL8188E) - { - - if(ConfigType == CONFIG_BB_PHY_REG) - { - if(IS_VENDOR_8188E_I_CUT_SERIES(pDM_Odm->Adapter)) - READ_AND_CONFIG(8188E,_PHY_REG_1T_ICUT_); - else - READ_AND_CONFIG(8188E,_PHY_REG_1T_); - } - else if(ConfigType == CONFIG_BB_AGC_TAB) - { - if(IS_VENDOR_8188E_I_CUT_SERIES(pDM_Odm->Adapter)) - READ_AND_CONFIG(8188E,_AGC_TAB_1T_ICUT_); - else - READ_AND_CONFIG(8188E,_AGC_TAB_1T_); - } - else if(ConfigType == CONFIG_BB_PHY_REG_PG) - { - READ_AND_CONFIG(8188E,_PHY_REG_PG_); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8188EPHY_REG_PGArray\n")); - } - } -#endif - - return HAL_STATUS_SUCCESS; -} - -HAL_STATUS -ODM_ConfigMACWithHeaderFile( - IN PDM_ODM_T pDM_Odm - ) -{ - u1Byte result = HAL_STATUS_SUCCESS; -#if (RTL8723A_SUPPORT == 1) - if (pDM_Odm->SupportICType == ODM_RTL8723A) - { - READ_AND_CONFIG_MP(8723A,_MAC_REG_); - } -#endif -#if (RTL8188E_SUPPORT == 1) - if (pDM_Odm->SupportICType == ODM_RTL8188E) - { - if(IS_VENDOR_8188E_I_CUT_SERIES(pDM_Odm->Adapter)) - READ_AND_CONFIG(8188E,_MAC_REG_ICUT_); - else - result =READ_AND_CONFIG(8188E,_MAC_REG_); - } -#endif - - return result; -} - - -#endif // end of (#if DM_ODM_SUPPORT_TYPE) - diff --git a/hal/OUTSRC/odm_debug.c b/hal/OUTSRC/odm_debug.c deleted file mode 100755 index 7db60cf..0000000 --- a/hal/OUTSRC/odm_debug.c +++ /dev/null @@ -1,627 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -//============================================================ -// include files -//============================================================ - -#include "odm_precomp.h" - -VOID -ODM_InitDebugSetting( - IN PDM_ODM_T pDM_Odm - ) -{ -pDM_Odm->DebugLevel = ODM_DBG_TRACE; - -pDM_Odm->DebugComponents = -\ -#if DBG -//BB Functions -// ODM_COMP_DIG | -// ODM_COMP_RA_MASK | -// ODM_COMP_DYNAMIC_TXPWR | -// ODM_COMP_FA_CNT | -// ODM_COMP_RSSI_MONITOR | -// ODM_COMP_CCK_PD | -// ODM_COMP_ANT_DIV | -// ODM_COMP_PWR_SAVE | -// ODM_COMP_PWR_TRAIN | -// ODM_COMP_RATE_ADAPTIVE | -// ODM_COMP_PATH_DIV | -// ODM_COMP_DYNAMIC_PRICCA | -// ODM_COMP_RXHP | - -//MAC Functions -// ODM_COMP_EDCA_TURBO | -// ODM_COMP_EARLY_MODE | -//RF Functions -// ODM_COMP_TX_PWR_TRACK | -// ODM_COMP_RX_GAIN_TRACK | -// ODM_COMP_CALIBRATION | -//Common -// ODM_COMP_COMMON | -// ODM_COMP_INIT | -#endif - 0; -} - -#if 0 -/*------------------Declare variable----------------------- -// Define debug flag array for common debug print macro. */ -u4Byte ODM_DBGP_Type[ODM_DBGP_TYPE_MAX]; - -/* Define debug print header for every service module. */ -ODM_DBGP_HEAD_T ODM_DBGP_Head; - - -/*----------------------------------------------------------------------------- - * Function: DBGP_Flag_Init - * - * Overview: Refresh all debug print control flag content to zero. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 10/20/2006 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -extern void ODM_DBGP_Flag_Init(void) -{ - u1Byte i; - - for (i = 0; i < ODM_DBGP_TYPE_MAX; i++) - { - ODM_DBGP_Type[i] = 0; - } - -#ifndef ADSL_AP_BUILD_WORKAROUND -#if DBG - // 2010/06/02 MH Free build driver can not out any debug message!!! - // Init Debug flag enable condition - - ODM_DBGP_Type[FINIT] = \ -// INIT_EEPROM | -// INIT_TxPower | -// INIT_IQK | -// INIT_RF | - 0; - - ODM_DBGP_Type[FDM] = \ -// WA_IOT | -// DM_PWDB | -// DM_Monitor | -// DM_DIG | -// DM_EDCA_Turbo | -// DM_BT30 | - 0; - - ODM_DBGP_Type[FIOCTL] = \ -// IOCTL_IRP | -// IOCTL_IRP_DETAIL | -// IOCTL_IRP_STATISTICS | -// IOCTL_IRP_HANDLE | -// IOCTL_BT_HCICMD | -// IOCTL_BT_HCICMD_DETAIL | -// IOCTL_BT_HCICMD_EXT | -// IOCTL_BT_EVENT | -// IOCTL_BT_EVENT_DETAIL | -// IOCTL_BT_EVENT_PERIODICAL | -// IOCTL_BT_TX_ACLDATA | -// IOCTL_BT_TX_ACLDATA_DETAIL | -// IOCTL_BT_RX_ACLDATA | -// IOCTL_BT_RX_ACLDATA_DETAIL | -// IOCTL_BT_TP | -// IOCTL_STATE | -// IOCTL_BT_LOGO | -// IOCTL_CALLBACK_FUN | -// IOCTL_PARSE_BT_PKT | - 0; - - ODM_DBGP_Type[FBT] = \ -// BT_TRACE | - 0; - - ODM_DBGP_Type[FEEPROM] = \ -// EEPROM_W | -// EFUSE_PG | -// EFUSE_READ_ALL | -// EFUSE_ANALYSIS | -// EFUSE_PG_DETAIL | - 0; - - ODM_DBGP_Type[FDBG_CTRL] = \ -// DBG_CTRL_TRACE | -// DBG_CTRL_INBAND_NOISE | - 0; - - // 2011/07/20 MH Add for short cut - ODM_DBGP_Type[FSHORT_CUT] = \ -// SHCUT_TX | -// SHCUT_RX | - 0; - -#endif -#endif - /* Define debug header of every service module. */ - //ODM_DBGP_Head.pMANS = "\n\r[MANS] "; - //ODM_DBGP_Head.pRTOS = "\n\r[RTOS] "; - //ODM_DBGP_Head.pALM = "\n\r[ALM] "; - //ODM_DBGP_Head.pPEM = "\n\r[PEM] "; - //ODM_DBGP_Head.pCMPK = "\n\r[CMPK] "; - //ODM_DBGP_Head.pRAPD = "\n\r[RAPD] "; - //ODM_DBGP_Head.pTXPB = "\n\r[TXPB] "; - //ODM_DBGP_Head.pQUMG = "\n\r[QUMG] "; - -} /* DBGP_Flag_Init */ - -#endif - - -#if 0 -u4Byte GlobalDebugLevel = DBG_LOUD; -// -// 2009/06/22 MH Allow Fre build to print none debug info at init time. -// -#if DBG -u8Byte GlobalDebugComponents = \ -// COMP_TRACE | -// COMP_DBG | -// COMP_INIT | -// COMP_OID_QUERY | -// COMP_OID_SET | -// COMP_RECV | -// COMP_SEND | -// COMP_IO | -// COMP_POWER | -// COMP_MLME | -// COMP_SCAN | -// COMP_SYSTEM | -// COMP_SEC | -// COMP_AP | -// COMP_TURBO | -// COMP_QOS | -// COMP_AUTHENTICATOR | -// COMP_BEACON | -// COMP_ANTENNA | -// COMP_RATE | -// COMP_EVENTS | -// COMP_FPGA | -// COMP_RM | -// COMP_MP | -// COMP_RXDESC | -// COMP_CKIP | -// COMP_DIG | -// COMP_TXAGC | -// COMP_HIPWR | -// COMP_HALDM | -// COMP_RSNA | -// COMP_INDIC | -// COMP_LED | -// COMP_RF | -// COMP_DUALMACSWITCH | -// COMP_EASY_CONCURRENT | - -//1!!!!!!!!!!!!!!!!!!!!!!!!!!! -//1//1Attention Please!!!<11n or 8190 specific code should be put below this line> -//1!!!!!!!!!!!!!!!!!!!!!!!!!!! - -// COMP_HT | -// COMP_POWER_TRACKING | -// COMP_RX_REORDER | -// COMP_AMSDU | -// COMP_WPS | -// COMP_RATR | -// COMP_RESET | -// COMP_CMD | -// COMP_EFUSE | -// COMP_MESH_INTERWORKING | -// COMP_CCX | -// COMP_IOCTL | -// COMP_GP | -// COMP_TXAGG | -// COMP_BB_POWERSAVING | -// COMP_SWAS | -// COMP_P2P | -// COMP_MUX | -// COMP_FUNC | -// COMP_TDLS | -// COMP_OMNIPEEK | -// COMP_PSD | - 0; - - -#else -#define FuncEntry -#define FuncExit -u8Byte GlobalDebugComponents = 0; -#endif - -#if (RT_PLATFORM==PLATFORM_LINUX) -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) -EXPORT_SYMBOL(GlobalDebugComponents); -EXPORT_SYMBOL(GlobalDebugLevel); -#endif -#endif - -/*------------------Declare variable----------------------- -// Define debug flag array for common debug print macro. */ -u4Byte DBGP_Type[DBGP_TYPE_MAX]; - -/* Define debug print header for every service module. */ -DBGP_HEAD_T DBGP_Head; - - -/*----------------------------------------------------------------------------- - * Function: DBGP_Flag_Init - * - * Overview: Refresh all debug print control flag content to zero. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 10/20/2006 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -extern void DBGP_Flag_Init(void) -{ - u1Byte i; - - for (i = 0; i < DBGP_TYPE_MAX; i++) - { - DBGP_Type[i] = 0; - } - -#if DBG - // 2010/06/02 MH Free build driver can not out any debug message!!! - // Init Debug flag enable condition - - DBGP_Type[FINIT] = \ -// INIT_EEPROM | -// INIT_TxPower | -// INIT_IQK | -// INIT_RF | - 0; - - DBGP_Type[FDM] = \ -// WA_IOT | -// DM_PWDB | -// DM_Monitor | -// DM_DIG | -// DM_EDCA_Turbo | -// DM_BT30 | - 0; - - DBGP_Type[FIOCTL] = \ -// IOCTL_IRP | -// IOCTL_IRP_DETAIL | -// IOCTL_IRP_STATISTICS | -// IOCTL_IRP_HANDLE | -// IOCTL_BT_HCICMD | -// IOCTL_BT_HCICMD_DETAIL | -// IOCTL_BT_HCICMD_EXT | -// IOCTL_BT_EVENT | -// IOCTL_BT_EVENT_DETAIL | -// IOCTL_BT_EVENT_PERIODICAL | -// IOCTL_BT_TX_ACLDATA | -// IOCTL_BT_TX_ACLDATA_DETAIL | -// IOCTL_BT_RX_ACLDATA | -// IOCTL_BT_RX_ACLDATA_DETAIL | -// IOCTL_BT_TP | -// IOCTL_STATE | -// IOCTL_BT_LOGO | -// IOCTL_CALLBACK_FUN | -// IOCTL_PARSE_BT_PKT | - 0; - - DBGP_Type[FBT] = \ -// BT_TRACE | - 0; - - DBGP_Type[FEEPROM] = \ -// EEPROM_W | -// EFUSE_PG | -// EFUSE_READ_ALL | -// EFUSE_ANALYSIS | -// EFUSE_PG_DETAIL | - 0; - - DBGP_Type[FDBG_CTRL] = \ -// DBG_CTRL_TRACE | -// DBG_CTRL_INBAND_NOISE | - 0; - - // 2011/07/20 MH Add for short cut - DBGP_Type[FSHORT_CUT] = \ -// SHCUT_TX | -// SHCUT_RX | - 0; - -#endif - /* Define debug header of every service module. */ - DBGP_Head.pMANS = "\n\r[MANS] "; - DBGP_Head.pRTOS = "\n\r[RTOS] "; - DBGP_Head.pALM = "\n\r[ALM] "; - DBGP_Head.pPEM = "\n\r[PEM] "; - DBGP_Head.pCMPK = "\n\r[CMPK] "; - DBGP_Head.pRAPD = "\n\r[RAPD] "; - DBGP_Head.pTXPB = "\n\r[TXPB] "; - DBGP_Head.pQUMG = "\n\r[QUMG] "; - -} /* DBGP_Flag_Init */ - - -/*----------------------------------------------------------------------------- - * Function: DBG_PrintAllFlag - * - * Overview: Print All debug flag - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 12/10/2008 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -extern void DBG_PrintAllFlag(void) -{ - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 0 FQoS\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 1 FTX\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 2 FRX\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 3 FSEC\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 4 FMGNT\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 5 FMLME\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 6 FRESOURCE\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 7 FBEACON\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 8 FISR\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 9 FPHY\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 11 FMP\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 12 FPWR\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 13 FDM\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 14 FDBG_CTRL\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 15 FC2H\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 16 FBT\n")); -} // DBG_PrintAllFlag - - -extern void DBG_PrintAllComp(void) -{ - u1Byte i; - - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("GlobalDebugComponents Definition\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT0 COMP_TRACE\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT1 COMP_DBG\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT2 COMP_INIT\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT3 COMP_OID_QUERY\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT4 COMP_OID_SET\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT5 COMP_RECV\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT6 COMP_SEND\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT7 COMP_IO\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT8 COMP_POWER\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT9 COMP_MLME\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT10 COMP_SCAN\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT11 COMP_SYSTEM\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT12 COMP_SEC\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT13 COMP_AP\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT14 COMP_TURBO\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT15 COMP_QOS\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT16 COMP_AUTHENTICATOR\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT17 COMP_BEACON\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT18 COMP_BEACON\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT19 COMP_RATE\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT20 COMP_EVENTS\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT21 COMP_FPGA\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT22 COMP_RM\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT23 COMP_MP\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT24 COMP_RXDESC\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT25 COMP_CKIP\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT26 COMP_DIG\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT27 COMP_TXAGC\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT28 COMP_HIPWR\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT29 COMP_HALDM\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT30 COMP_RSNA\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT31 COMP_INDIC\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT32 COMP_LED\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT33 COMP_RF\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT34 COMP_HT\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT35 COMP_POWER_TRACKING\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT36 COMP_POWER_TRACKING\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT37 COMP_AMSDU\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT38 COMP_WPS\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT39 COMP_RATR\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT40 COMP_RESET\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT41 COMP_CMD\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT42 COMP_EFUSE\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT43 COMP_MESH_INTERWORKING\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT43 COMP_CCX\n")); - - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("GlobalDebugComponents = %"i64fmt"x\n", GlobalDebugComponents)); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("Enable DBG COMP =")); - for (i = 0; i < 64; i++) - { - if (GlobalDebugComponents & ((u8Byte)0x1 << i) ) - { - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT%02d |\n", i)); - } - } - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("\n")); - -} // DBG_PrintAllComp - - -/*----------------------------------------------------------------------------- - * Function: DBG_PrintFlagEvent - * - * Overview: Print dedicated debug flag event - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 12/10/2008 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -extern void DBG_PrintFlagEvent(u1Byte DbgFlag) -{ - switch(DbgFlag) - { - case FQoS: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 QoS_INIT\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 QoS_VISTA\n")); - break; - - case FTX: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 TX_DESC\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 TX_DESC_TID\n")); - break; - - case FRX: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 RX_DATA\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 RX_PHY_STS\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 2 RX_PHY_SS\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 3 RX_PHY_SQ\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 4 RX_PHY_ASTS\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 5 RX_ERR_LEN\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 6 RX_DEFRAG\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 7 RX_ERR_RATE\n")); - break; - - case FSEC: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("NA\n")); - break; - - case FMGNT: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("NA\n")); - break; - - case FMLME: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 MEDIA_STS\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 LINK_STS\n")); - break; - - case FRESOURCE: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 OS_CHK\n")); - break; - - case FBEACON: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 BCN_SHOW\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 BCN_PEER\n")); - break; - - case FISR: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 ISR_CHK\n")); - break; - - case FPHY: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 PHY_BBR\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 PHY_BBW\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 2 PHY_RFR\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 3 PHY_RFW\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 4 PHY_MACR\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 5 PHY_MACW\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 6 PHY_ALLR\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 7 PHY_ALLW\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 8 PHY_TXPWR\n")); - break; - - case FMP: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 MP_RX\n")); - break; - - case FEEPROM: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 EEPROM_W\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 EFUSE_PG\n")); - break; - - case FPWR: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 LPS\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 IPS\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 2 PWRSW\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 3 PWRHW\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 4 PWRHAL\n")); - break; - - case FDM: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 WA_IOT\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 DM_PWDB\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 2 DM_Monitor\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 3 DM_DIG\n")); - break; - - case FDBG_CTRL: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 DBG_CTRL_TRACE\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 DBG_CTRL_INBAND_NOISE\n")); - break; - - case FC2H: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 C2H_Summary\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 C2H_PacketData\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 2 C2H_ContentData\n")); - break; - - case FBT: - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 BT_TRACE\n")); - ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 BT_RFPoll\n")); - break; - - default: - break; - } - -} // DBG_PrintFlagEvent - - -extern void DBG_DumpMem(const u1Byte DbgComp, - const u1Byte DbgLevel, - pu1Byte pMem, - u2Byte Len) -{ - u2Byte i; - - for (i=0;i<((Len>>3) + 1);i++) - { - ODM_RT_TRACE(pDM_Odm,DbgComp, DbgLevel, ("%02X %02X %02X %02X %02X %02X %02X %02X\n", - *(pMem+(i*8)), *(pMem+(i*8+1)), *(pMem+(i*8+2)), *(pMem+(i*8+3)), - *(pMem+(i*8+4)), *(pMem+(i*8+5)), *(pMem+(i*8+6)), *(pMem+(i*8+7)))); - - } -} - - -#endif - diff --git a/hal/OUTSRC/odm_interface.c b/hal/OUTSRC/odm_interface.c deleted file mode 100755 index 7f6dd58..0000000 --- a/hal/OUTSRC/odm_interface.c +++ /dev/null @@ -1,666 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -//============================================================ -// include files -//============================================================ - -#include "odm_precomp.h" -// -// ODM IO Relative API. -// - -u1Byte -ODM_Read1Byte( - IN PDM_ODM_T pDM_Odm, - IN u4Byte RegAddr - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - prtl8192cd_priv priv = pDM_Odm->priv; - return RTL_R8(RegAddr); -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - return rtw_read8(Adapter,RegAddr); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - return PlatformEFIORead1Byte(Adapter, RegAddr); -#endif - -} - - -u2Byte -ODM_Read2Byte( - IN PDM_ODM_T pDM_Odm, - IN u4Byte RegAddr - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - prtl8192cd_priv priv = pDM_Odm->priv; - return RTL_R16(RegAddr); -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - return rtw_read16(Adapter,RegAddr); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - return PlatformEFIORead2Byte(Adapter, RegAddr); -#endif - -} - - -u4Byte -ODM_Read4Byte( - IN PDM_ODM_T pDM_Odm, - IN u4Byte RegAddr - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - prtl8192cd_priv priv = pDM_Odm->priv; - return RTL_R32(RegAddr); -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - return rtw_read32(Adapter,RegAddr); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - return PlatformEFIORead4Byte(Adapter, RegAddr); -#endif - -} - - -VOID -ODM_Write1Byte( - IN PDM_ODM_T pDM_Odm, - IN u4Byte RegAddr, - IN u1Byte Data - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - prtl8192cd_priv priv = pDM_Odm->priv; - RTL_W8(RegAddr, Data); -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - rtw_write8(Adapter,RegAddr, Data); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - PlatformEFIOWrite1Byte(Adapter, RegAddr, Data); -#endif - -} - - -VOID -ODM_Write2Byte( - IN PDM_ODM_T pDM_Odm, - IN u4Byte RegAddr, - IN u2Byte Data - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - prtl8192cd_priv priv = pDM_Odm->priv; - RTL_W16(RegAddr, Data); -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - rtw_write16(Adapter,RegAddr, Data); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - PlatformEFIOWrite2Byte(Adapter, RegAddr, Data); -#endif - -} - - -VOID -ODM_Write4Byte( - IN PDM_ODM_T pDM_Odm, - IN u4Byte RegAddr, - IN u4Byte Data - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - prtl8192cd_priv priv = pDM_Odm->priv; - RTL_W32(RegAddr, Data); -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - rtw_write32(Adapter,RegAddr, Data); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - PlatformEFIOWrite4Byte(Adapter, RegAddr, Data); -#endif - -} - - -VOID -ODM_SetMACReg( - IN PDM_ODM_T pDM_Odm, - IN u4Byte RegAddr, - IN u4Byte BitMask, - IN u4Byte Data - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); -#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP)) - PADAPTER Adapter = pDM_Odm->Adapter; - PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); -#endif -} - - -u4Byte -ODM_GetMACReg( - IN PDM_ODM_T pDM_Odm, - IN u4Byte RegAddr, - IN u4Byte BitMask - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask); -#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP)) - PADAPTER Adapter = pDM_Odm->Adapter; - return PHY_QueryBBReg(Adapter, RegAddr, BitMask); -#endif -} - - -VOID -ODM_SetBBReg( - IN PDM_ODM_T pDM_Odm, - IN u4Byte RegAddr, - IN u4Byte BitMask, - IN u4Byte Data - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); -#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP)) - PADAPTER Adapter = pDM_Odm->Adapter; - PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); -#endif -} - - -u4Byte -ODM_GetBBReg( - IN PDM_ODM_T pDM_Odm, - IN u4Byte RegAddr, - IN u4Byte BitMask - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask); -#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP)) - PADAPTER Adapter = pDM_Odm->Adapter; - return PHY_QueryBBReg(Adapter, RegAddr, BitMask); -#endif -} - - -VOID -ODM_SetRFReg( - IN PDM_ODM_T pDM_Odm, - IN ODM_RF_RADIO_PATH_E eRFPath, - IN u4Byte RegAddr, - IN u4Byte BitMask, - IN u4Byte Data - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - PHY_SetRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, Data); -#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP)) - PADAPTER Adapter = pDM_Odm->Adapter; - PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data); -#endif -} - - -u4Byte -ODM_GetRFReg( - IN PDM_ODM_T pDM_Odm, - IN ODM_RF_RADIO_PATH_E eRFPath, - IN u4Byte RegAddr, - IN u4Byte BitMask - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - return PHY_QueryRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, 1); -#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP)) - PADAPTER Adapter = pDM_Odm->Adapter; - return PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask); -#endif -} - - - - -// -// ODM Memory relative API. -// -VOID -ODM_AllocateMemory( - IN PDM_ODM_T pDM_Odm, - OUT PVOID *pPtr, - IN u4Byte length - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - *pPtr = kmalloc(length, GFP_ATOMIC); -#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) - *pPtr = rtw_zvmalloc(length); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - PlatformAllocateMemory(Adapter, pPtr, length); -#endif -} - -// length could be ignored, used to detect memory leakage. -VOID -ODM_FreeMemory( - IN PDM_ODM_T pDM_Odm, - OUT PVOID pPtr, - IN u4Byte length - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - kfree(pPtr); -#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) - rtw_vmfree(pPtr, length); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - //PADAPTER Adapter = pDM_Odm->Adapter; - PlatformFreeMemory(pPtr, length); -#endif -} -s4Byte ODM_CompareMemory( - IN PDM_ODM_T pDM_Odm, - IN PVOID pBuf1, - IN PVOID pBuf2, - IN u4Byte length - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - return memcmp(pBuf1,pBuf2,length); -#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) - return _rtw_memcmp(pBuf1,pBuf2,length); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - return PlatformCompareMemory(pBuf1,pBuf2,length); -#endif -} - - - -// -// ODM MISC relative API. -// -VOID -ODM_AcquireSpinLock( - IN PDM_ODM_T pDM_Odm, - IN RT_SPINLOCK_TYPE type - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - -#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - PlatformAcquireSpinLock(Adapter, type); -#endif -} -VOID -ODM_ReleaseSpinLock( - IN PDM_ODM_T pDM_Odm, - IN RT_SPINLOCK_TYPE type - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - -#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - PlatformReleaseSpinLock(Adapter, type); -#endif -} - -// -// Work item relative API. FOr MP driver only~! -// -VOID -ODM_InitializeWorkItem( - IN PDM_ODM_T pDM_Odm, - IN PRT_WORK_ITEM pRtWorkItem, - IN RT_WORKITEM_CALL_BACK RtWorkItemCallback, - IN PVOID pContext, - IN const char* szID - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - PlatformInitializeWorkItem(Adapter, pRtWorkItem, RtWorkItemCallback, pContext, szID); -#endif -} - - -VOID -ODM_StartWorkItem( - IN PRT_WORK_ITEM pRtWorkItem - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PlatformStartWorkItem(pRtWorkItem); -#endif -} - - -VOID -ODM_StopWorkItem( - IN PRT_WORK_ITEM pRtWorkItem - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PlatformStopWorkItem(pRtWorkItem); -#endif -} - - -VOID -ODM_FreeWorkItem( - IN PRT_WORK_ITEM pRtWorkItem - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PlatformFreeWorkItem(pRtWorkItem); -#endif -} - - -VOID -ODM_ScheduleWorkItem( - IN PRT_WORK_ITEM pRtWorkItem - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PlatformScheduleWorkItem(pRtWorkItem); -#endif -} - - -VOID -ODM_IsWorkItemScheduled( - IN PRT_WORK_ITEM pRtWorkItem - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PlatformIsWorkItemScheduled(pRtWorkItem); -#endif -} - - - -// -// ODM Timer relative API. -// -VOID -ODM_StallExecution( - IN u4Byte usDelay - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - rtw_udelay_os(usDelay); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PlatformStallExecution(usDelay); -#endif -} - -VOID -ODM_delay_ms(IN u4Byte ms) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - delay_ms(ms); -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - rtw_mdelay_os(ms); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - delay_ms(ms); -#endif -} - -VOID -ODM_delay_us(IN u4Byte us) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - delay_us(us); -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - rtw_udelay_os(us); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PlatformStallExecution(us); -#endif -} - -VOID -ODM_sleep_ms(IN u4Byte ms) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - rtw_msleep_os(ms); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) -#endif -} - -VOID -ODM_sleep_us(IN u4Byte us) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - rtw_usleep_os(us); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) -#endif -} - -VOID -ODM_SetTimer( - IN PDM_ODM_T pDM_Odm, - IN PRT_TIMER pTimer, - IN u4Byte msDelay - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - mod_timer(pTimer, jiffies + (msDelay+9)/10); -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - _set_timer(pTimer,msDelay ); //ms -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - PlatformSetTimer(Adapter, pTimer, msDelay); -#endif - -} - -VOID -ODM_InitializeTimer( - IN PDM_ODM_T pDM_Odm, - IN PRT_TIMER pTimer, - IN RT_TIMER_CALL_BACK CallBackFunc, - IN PVOID pContext, - IN const char* szID - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - pTimer->function = CallBackFunc; - pTimer->data = (unsigned long)pDM_Odm; - init_timer(pTimer); -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - _init_timer(pTimer,Adapter->pnetdev,CallBackFunc,pDM_Odm); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - PlatformInitializeTimer(Adapter, pTimer, CallBackFunc,pContext,szID); -#endif -} - - -VOID -ODM_CancelTimer( - IN PDM_ODM_T pDM_Odm, - IN PRT_TIMER pTimer - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - del_timer_sync(pTimer); -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - _cancel_timer_ex(pTimer); -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - PADAPTER Adapter = pDM_Odm->Adapter; - PlatformCancelTimer(Adapter, pTimer); -#endif -} - - -VOID -ODM_ReleaseTimer( - IN PDM_ODM_T pDM_Odm, - IN PRT_TIMER pTimer - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - - PADAPTER Adapter = pDM_Odm->Adapter; - - // <20120301, Kordan> If the initilization fails, InitializeAdapterXxx will return regardless of InitHalDm. - // Hence, uninitialized timers cause BSOD when the driver releases resources since the init fail. - if (pTimer == 0) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_SERIOUS, ("=====>ODM_ReleaseTimer(), The timer is NULL! Please check it!\n")); - return; - } - - PlatformReleaseTimer(Adapter, pTimer); -#endif -} - - -// -// ODM FW relative API. -// -#if (DM_ODM_SUPPORT_TYPE & ODM_MP) -VOID -ODM_FillH2CCmd( - IN PADAPTER Adapter, - IN u1Byte ElementID, - IN u4Byte CmdLen, - IN pu1Byte pCmdBuffer -) -{ - if(IS_HARDWARE_TYPE_JAGUAR(Adapter)) - { - switch(ElementID) - { - case ODM_H2C_RSSI_REPORT: - FillH2CCmd8812(Adapter, H2C_8812_RSSI_REPORT, CmdLen, pCmdBuffer); - default: - break; - } - - } - else if(IS_HARDWARE_TYPE_8188E(Adapter)) - { - switch(ElementID) - { - case ODM_H2C_PSD_RESULT: - FillH2CCmd88E(Adapter, H2C_88E_PSD_RESULT, CmdLen, pCmdBuffer); - default: - break; - } - } - else - { - switch(ElementID) - { - case ODM_H2C_RSSI_REPORT: - FillH2CCmd92C(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer); - case ODM_H2C_PSD_RESULT: - FillH2CCmd92C(Adapter, H2C_92C_PSD_RESULT, CmdLen, pCmdBuffer); - default: - break; - } - } -} -#else -u4Byte -ODM_FillH2CCmd( - IN pu1Byte pH2CBuffer, - IN u4Byte H2CBufferLen, - IN u4Byte CmdNum, - IN pu4Byte pElementID, - IN pu4Byte pCmdLen, - IN pu1Byte* pCmbBuffer, - IN pu1Byte CmdStartSeq - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) - -#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) - //FillH2CCmd(pH2CBuffer, H2CBufferLen, CmdNum, pElementID, pCmdLen, pCmbBuffer, CmdStartSeq); - return FALSE; -#endif - - return TRUE; -} -#endif - - - - - diff --git a/hal/OUTSRC/rtl8188e/Hal8188ERateAdaptive.c b/hal/OUTSRC/rtl8188e/Hal8188ERateAdaptive.c deleted file mode 100755 index 972f45e..0000000 --- a/hal/OUTSRC/rtl8188e/Hal8188ERateAdaptive.c +++ /dev/null @@ -1,1108 +0,0 @@ -/*++ -Copyright (c) Realtek Semiconductor Corp. All rights reserved. - -Module Name: - RateAdaptive.c - -Abstract: - Implement Rate Adaptive functions for common operations. - -Major Change History: - When Who What - ---------- --------------- ------------------------------- - 2011-08-12 Page Create. - ---*/ -#include "../odm_precomp.h" - -//#if( DM_ODM_SUPPORT_TYPE == ODM_MP) -//#include "Mp_Precomp.h" -//#endif - -#if (RATE_ADAPTIVE_SUPPORT == 1) -// Rate adaptive parameters - - -static u1Byte RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = {{5,4,3,2,0,3},//92 , idx=0 - {6,5,4,3,0,4},//86 , idx=1 - {6,5,4,2,0,4},//81 , idx=2 - {8,7,6,4,0,6},//75 , idx=3 - {10,9,8,6,0,8},//71 , idx=4 - {10,9,8,4,0,8},//66 , idx=5 - {10,9,8,2,0,8},//62 , idx=6 - {10,9,8,0,0,8},//59 , idx=7 - {18,17,16,8,0,16},//53 , idx=8 - {26,25,24,16,0,24},//50 , idx=9 - {34,33,32,24,0,32},//47 , idx=0x0a - //{34,33,32,16,0,32},//43 , idx=0x0b - //{34,33,32,8,0,32},//40 , idx=0x0c - //{34,33,28,8,0,32},//37 , idx=0x0d - //{34,33,20,8,0,32},//32 , idx=0x0e - //{34,32,24,8,0,32},//26 , idx=0x0f - //{49,48,32,16,0,48},//20 , idx=0x10 - //{49,48,24,0,0,48},//17 , idx=0x11 - //{49,47,16,16,0,48},//15 , idx=0x12 - //{49,44,16,16,0,48},//12 , idx=0x13 - //{49,40,16,0,0,48},//9 , idx=0x14 - {34,31,28,20,0,32},//43 , idx=0x0b - {34,31,27,18,0,32},//40 , idx=0x0c - {34,31,26,16,0,32},//37 , idx=0x0d - {34,30,22,16,0,32},//32 , idx=0x0e - {34,30,24,16,0,32},//26 , idx=0x0f - {49,46,40,16,0,48},//20 , idx=0x10 - {49,45,32,0,0,48},//17 , idx=0x11 - {49,45,22,18,0,48},//15 , idx=0x12 - {49,40,24,16,0,48},//12 , idx=0x13 - {49,32,18,12,0,48},//9 , idx=0x14 - {49,22,18,14,0,48},//6 , idx=0x15 - {49,16,16,0,0,48}};//3 //3, idx=0x16 - -static u1Byte RETRY_PENALTY_UP[RETRYSIZE+1]={49,44,16,16,0,48}; // 12% for rate up - -static u1Byte PT_PENALTY[RETRYSIZE+1]={34,31,30,24,0,32}; - -#if 0 -static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = {{4,4,4,5,4,4,5,7,7,7,8,0x0a, // SS>TH - 4,4,4,4,6,0x0a,0x0b,0x0d, - 5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01 - {4,4,4,5,7,7,9,9,0x0c,0x0e,0x10,0x12, // SSTH - 4,4,4,4,6,0x0a,0x0b,0x0d, - 5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01 - {0x0a,0x0a,0x0a,0x0a,0x0c,0x0c,0x0e,0x10,0x11,0x12,0x12,0x13, // SSTH - 0x13,0x13,0x14,0x14,0x15,0x15,0x15,0x15, - 0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15}; - -static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0, - 0,0,0,0,0,0x24,0x26,0x2a, - 0x13,0x15,0x17,0x18,0x1a,0x1c,0x1d,0x1f, - 0,0,0,0x1f,0x23,0x28,0x2a,0x2c}; -#else - -// wilson modify -static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = {{4,4,4,5,4,4,5,7,7,7,8,0x0a, // SS>TH - 4,4,4,4,6,0x0a,0x0b,0x0d, - 5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01 - {0x0a,0x0a,0x0b,0x0c,0x0a,0x0a,0x0b,0x0c,0x0d,0x10,0x13,0x14, // SSTH - 0x0f,0x10,0x10,0x12,0x12,0x13,0x14,0x15, - 0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15}; - -static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0, - 0,0,0,0,0,0x24,0x26,0x2a, - 0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a, - 0,0,0,0x1f,0x23,0x28,0x2a,0x2c}; - -#endif - -/*static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0, - 0,0,0,0,0,0x24,0x26,0x2a, - 0x1a,0x1c,0x1e,0x21,0x24,0x2a,0x2b,0x2d, - 0,0,0,0x1f,0x23,0x28,0x2a,0x2c};*/ -static u2Byte N_THRESHOLD_HIGH[RATESIZE] = {4,4,8,16, - 24,36,48,72,96,144,192,216, - 60,80,100,160,240,400,560,640, - 300,320,480,720,1000,1200,1600,2000}; -static u2Byte N_THRESHOLD_LOW[RATESIZE] = {2,2,4,8, - 12,18,24,36,48,72,96,108, - 30,40,50,80,120,200,280,320, - 150,160,240,360,500,600,800,1000}; -static u1Byte TRYING_NECESSARY[RATESIZE] = {2,2,2,2, - 2,2,3,3,4,4,5,7, - 4,4,7,10,10,12,12,18, - 5,7,7,8,11,18,36,60}; // 0329 // 1207 -#if 0 -static u1Byte POOL_RETRY_TH[RATESIZE] = {30,30,30,30, - 30,30,25,25,20,15,15,10, - 30,25,25,20,15,10,10,10, - 30,25,25,20,15,10,10,10}; -#endif - -static u1Byte DROPING_NECESSARY[RATESIZE] = {1,1,1,1, - 1,2,3,4,5,6,7,8, - 1,2,3,4,5,6,7,8, - 5,6,7,8,9,10,11,12}; - - -static u4Byte INIT_RATE_FALLBACK_TABLE[16]={0x0f8ff015, // 0: 40M BGN mode - 0x0f8ff010, // 1: 40M GN mode - 0x0f8ff005, // 2: BN mode/ 40M BGN mode - 0x0f8ff000, // 3: N mode - 0x00000ff5, // 4: BG mode - 0x00000ff0, // 5: G mode - 0x0000000d, // 6: B mode - 0, // 7: - 0, // 8: - 0, // 9: - 0, // 10: - 0, // 11: - 0, // 12: - 0, // 13: - 0, // 14: - 0, // 15: - - }; -static u1Byte PendingForRateUpFail[5]={2,10,24,40,60}; -static u2Byte DynamicTxRPTTiming[6]={0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12 ,0x927c}; // 200ms-1200ms - -// End Rate adaptive parameters - -static void -odm_SetTxRPTTiming_8188E( - IN PDM_ODM_T pDM_Odm, - IN PODM_RA_INFO_T pRaInfo, - IN u1Byte extend - ) -{ - u1Byte idx = 0; - - for(idx=0; idx<5; idx++) - if(DynamicTxRPTTiming[idx] == pRaInfo->RptTime) - break; - - if (extend==0) // back to default timing - idx=0; //200ms - else if (extend==1) {// increase the timing - idx+=1; - if (idx>5) - idx=5; - } - else if (extend==2) {// decrease the timing - if(idx!=0) - idx-=1; - } - pRaInfo->RptTime=DynamicTxRPTTiming[idx]; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pRaInfo->RptTime=0x%x\n", pRaInfo->RptTime)); -} - -static int -odm_RateDown_8188E( - IN PDM_ODM_T pDM_Odm, - IN PODM_RA_INFO_T pRaInfo - ) -{ - u1Byte RateID, LowestRate, HighestRate; - u1Byte i; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDown_8188E()\n")); - if(NULL == pRaInfo) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateDown_8188E(): pRaInfo is NULL\n")); - return -1; - } - RateID = pRaInfo->PreRate; - LowestRate = pRaInfo->LowestRate; - HighestRate = pRaInfo->HighestRate; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - (" RateID=%d LowestRate=%d HighestRate=%d RateSGI=%d\n", - RateID, LowestRate, HighestRate, pRaInfo->RateSGI)); - if (RateID > HighestRate) - { - RateID=HighestRate; - } - else if(pRaInfo->RateSGI) - { - pRaInfo->RateSGI=0; - } - else if (RateID > LowestRate) - { - if (RateID > 0) - { - for (i=RateID-1; i>LowestRate;i--) - { - if (pRaInfo->RAUseRate & BIT(i)) - { - RateID=i; - goto RateDownFinish; - - } - } - } - } - else if (RateID <= LowestRate) - { - RateID = LowestRate; - } -RateDownFinish: - if (pRaInfo->RAWaitingCounter==1){ - pRaInfo->RAWaitingCounter+=1; - pRaInfo->RAPendingCounter+=1; - } - else if(pRaInfo->RAWaitingCounter==0){ - } - else{ - pRaInfo->RAWaitingCounter=0; - pRaInfo->RAPendingCounter=0; - } - - if(pRaInfo->RAPendingCounter>=4) - pRaInfo->RAPendingCounter=4; - - pRaInfo->DecisionRate=RateID; - odm_SetTxRPTTiming_8188E(pDM_Odm,pRaInfo, 2); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down, RPT Timing default\n")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d",pRaInfo->RAWaitingCounter,pRaInfo->RAPendingCounter)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down to RateID %d RateSGI %d\n", RateID, pRaInfo->RateSGI)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateDown_8188E() \n")); - return 0; -} - -static int -odm_RateUp_8188E( - IN PDM_ODM_T pDM_Odm, - IN PODM_RA_INFO_T pRaInfo - ) -{ - u1Byte RateID, HighestRate; - u1Byte i; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateUp_8188E() \n")); - if(NULL == pRaInfo) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E(): pRaInfo is NULL\n")); - return -1; - } - RateID = pRaInfo->PreRate; - HighestRate = pRaInfo->HighestRate; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - (" RateID=%d HighestRate=%d\n", - RateID, HighestRate)); - if (pRaInfo->RAWaitingCounter==1){ - pRaInfo->RAWaitingCounter=0; - pRaInfo->RAPendingCounter=0; - } - else if (pRaInfo->RAWaitingCounter>1){ - pRaInfo->PreRssiStaRA=pRaInfo->RssiStaRA; - goto RateUpfinish; - } - odm_SetTxRPTTiming_8188E(pDM_Odm,pRaInfo, 0); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E():Decrease RPT Timing\n")); - - if (RateID < HighestRate) - { - for (i=RateID+1; i<=HighestRate; i++) - { - if (pRaInfo->RAUseRate & BIT(i)) - { - RateID=i; - goto RateUpfinish; - } - } - } - else if(RateID == HighestRate) - { - if (pRaInfo->SGIEnable && (pRaInfo->RateSGI != 1)) - pRaInfo->RateSGI = 1; - else if((pRaInfo->SGIEnable) !=1 ) - pRaInfo->RateSGI = 0; - } - else //if((sta_info_ra->Decision_rate) > (sta_info_ra->Highest_rate)) - { - RateID = HighestRate; - - } -RateUpfinish: - //if(pRaInfo->RAWaitingCounter==10) - if(pRaInfo->RAWaitingCounter==(4+PendingForRateUpFail[pRaInfo->RAPendingCounter])) - pRaInfo->RAWaitingCounter=0; - else - pRaInfo->RAWaitingCounter++; - - pRaInfo->DecisionRate=RateID; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate up to RateID %d\n", RateID)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d",pRaInfo->RAWaitingCounter,pRaInfo->RAPendingCounter)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateUp_8188E() \n")); - return 0; -} - -static void odm_ResetRaCounter_8188E( IN PODM_RA_INFO_T pRaInfo){ - u1Byte RateID; - RateID=pRaInfo->DecisionRate; - pRaInfo->NscUp=(N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1; - pRaInfo->NscDown=(N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1; -} - -static void -odm_RateDecision_8188E( - IN PDM_ODM_T pDM_Odm, - IN PODM_RA_INFO_T pRaInfo - ) -{ - u1Byte RateID = 0, RtyPtID = 0, PenaltyID1 = 0, PenaltyID2 = 0; - //u4Byte pool_retry; - static u1Byte DynamicTxRPTTimingCounter=0; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDecision_8188E() \n")); - - if (pRaInfo->Active && (pRaInfo->TOTAL > 0)) // STA used and data packet exits - { - if ( (pRaInfo->RssiStaRA<(pRaInfo->PreRssiStaRA-3))|| (pRaInfo->RssiStaRA>(pRaInfo->PreRssiStaRA+3))){ - pRaInfo->RAWaitingCounter=0; - pRaInfo->RAPendingCounter=0; - } - // Start RA decision - if (pRaInfo->PreRate > pRaInfo->HighestRate) - RateID = pRaInfo->HighestRate; - else - RateID = pRaInfo->PreRate; - if (pRaInfo->RssiStaRA > RSSI_THRESHOLD[RateID]) - RtyPtID=0; - else - RtyPtID=1; - PenaltyID1 = RETRY_PENALTY_IDX[RtyPtID][RateID]; //TODO by page - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - (" NscDown init is %d\n", pRaInfo->NscDown)); - //pool_retry=pRaInfo->RTY[2]+pRaInfo->RTY[3]+pRaInfo->RTY[4]+pRaInfo->DROP; - pRaInfo->NscDown += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID1][0]; - pRaInfo->NscDown += pRaInfo->RTY[1] * RETRY_PENALTY[PenaltyID1][1]; - pRaInfo->NscDown += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID1][2]; - pRaInfo->NscDown += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID1][3]; - pRaInfo->NscDown += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID1][4]; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - (" NscDown is %d, total*penalty[5] is %d\n", - pRaInfo->NscDown, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5]))); - if (pRaInfo->NscDown > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5])) - pRaInfo->NscDown -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5]; - else - pRaInfo->NscDown=0; - - // rate up - PenaltyID2 = RETRY_PENALTY_UP_IDX[RateID]; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - (" NscUp init is %d\n", pRaInfo->NscUp)); - pRaInfo->NscUp += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID2][0]; - pRaInfo->NscUp += pRaInfo->RTY[1] * RETRY_PENALTY[PenaltyID2][1]; - pRaInfo->NscUp += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID2][2]; - pRaInfo->NscUp += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID2][3]; - pRaInfo->NscUp += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID2][4]; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - ("NscUp is %d, total*up[5] is %d\n", - pRaInfo->NscUp, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5]))); - if (pRaInfo->NscUp > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5])) - pRaInfo->NscUp -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5]; - else - pRaInfo->NscUp = 0; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE|ODM_COMP_INIT, ODM_DBG_LOUD, - (" RssiStaRa= %d RtyPtID=%d PenaltyID1=0x%x PenaltyID2=0x%x RateID=%d NscDown=%d NscUp=%d SGI=%d\n", - pRaInfo->RssiStaRA,RtyPtID, PenaltyID1,PenaltyID2, RateID, pRaInfo->NscDown, pRaInfo->NscUp, pRaInfo->RateSGI)); - if ((pRaInfo->NscDown < N_THRESHOLD_LOW[RateID]) ||(pRaInfo->DROP>DROPING_NECESSARY[RateID])) - odm_RateDown_8188E(pDM_Odm,pRaInfo); - //else if ((pRaInfo->NscUp > N_THRESHOLD_HIGH[RateID])&&(pool_retryNscUp > N_THRESHOLD_HIGH[RateID]) - odm_RateUp_8188E(pDM_Odm,pRaInfo); - - if(pRaInfo->DecisionRate > pRaInfo->HighestRate) - pRaInfo->DecisionRate = pRaInfo->HighestRate; - - if ((pRaInfo->DecisionRate)==(pRaInfo->PreRate)) - DynamicTxRPTTimingCounter+=1; - else - DynamicTxRPTTimingCounter=0; - - if (DynamicTxRPTTimingCounter>=4) { - odm_SetTxRPTTiming_8188E(pDM_Odm,pRaInfo, 1); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("<=====Rate don't change 4 times, Extend RPT Timing\n")); - DynamicTxRPTTimingCounter=0; - } - - pRaInfo->PreRate = pRaInfo->DecisionRate; //YJ,add,120120 - - odm_ResetRaCounter_8188E( pRaInfo); - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateDecision_8188E() \n")); -} - -static int -odm_ARFBRefresh_8188E( - IN PDM_ODM_T pDM_Odm, - IN PODM_RA_INFO_T pRaInfo - ) -{ // Wilson 2011/10/26 - u4Byte MaskFromReg; - s1Byte i; - - switch(pRaInfo->RateID){ - case RATR_INX_WIRELESS_NGB: - pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0f8ff015; - break; - case RATR_INX_WIRELESS_NG: - pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0f8ff010; - break; - case RATR_INX_WIRELESS_NB: - pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0f8ff005; - break; - case RATR_INX_WIRELESS_N: - pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0f8ff000; - break; - case RATR_INX_WIRELESS_GB: - pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x00000ff5; - break; - case RATR_INX_WIRELESS_G: - pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x00000ff0; - break; - case RATR_INX_WIRELESS_B: - pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0000000d; - break; - case 12: - MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR0); - pRaInfo->RAUseRate=(pRaInfo->RateMask)&MaskFromReg; - break; - case 13: - MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR1); - pRaInfo->RAUseRate=(pRaInfo->RateMask)&MaskFromReg; - break; - case 14: - MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR2); - pRaInfo->RAUseRate=(pRaInfo->RateMask)&MaskFromReg; - break; - case 15: - MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR3); - pRaInfo->RAUseRate=(pRaInfo->RateMask)&MaskFromReg; - break; - - default: - pRaInfo->RAUseRate=(pRaInfo->RateMask); - break; - } - // Highest rate - if (pRaInfo->RAUseRate){ - for (i=RATESIZE;i>=0;i--) - { - if((pRaInfo->RAUseRate)&BIT(i)){ - pRaInfo->HighestRate=i; - break; - } - } - } - else{ - pRaInfo->HighestRate=0; - } - // Lowest rate - if (pRaInfo->RAUseRate){ - for (i=0;iRAUseRate)&BIT(i)) - { - pRaInfo->LowestRate=i; - break; - } - } - } - else{ - pRaInfo->LowestRate=0; - } - -#if POWER_TRAINING_ACTIVE == 1 - if (pRaInfo->HighestRate >0x13) - pRaInfo->PTModeSS=3; - else if(pRaInfo->HighestRate >0x0b) - pRaInfo->PTModeSS=2; - else if(pRaInfo->HighestRate >0x0b) - pRaInfo->PTModeSS=1; - else - pRaInfo->PTModeSS=0; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("ODM_ARFBRefresh_8188E(): PTModeSS=%d\n", pRaInfo->PTModeSS)); - -#endif - - if(pRaInfo->DecisionRate > pRaInfo->HighestRate) - pRaInfo->DecisionRate = pRaInfo->HighestRate; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("ODM_ARFBRefresh_8188E(): RateID=%d RateMask=%8.8x RAUseRate=%8.8x HighestRate=%d,DecisionRate=%d \n", - pRaInfo->RateID, pRaInfo->RateMask, pRaInfo->RAUseRate, pRaInfo->HighestRate,pRaInfo->DecisionRate)); - return 0; -} - -#if POWER_TRAINING_ACTIVE == 1 -static void -odm_PTTryState_8188E( - IN PODM_RA_INFO_T pRaInfo - ) -{ - pRaInfo->PTTryState=0; - switch (pRaInfo->PTModeSS) - { - case 3: - if (pRaInfo->DecisionRate>=0x19) - pRaInfo->PTTryState=1; - break; - case 2: - if (pRaInfo->DecisionRate>=0x11) - pRaInfo->PTTryState=1; - break; - case 1: - if (pRaInfo->DecisionRate>=0x0a) - pRaInfo->PTTryState=1; - break; - case 0: - if (pRaInfo->DecisionRate>=0x03) - pRaInfo->PTTryState=1; - break; - default: - pRaInfo->PTTryState=0; - } - - if (pRaInfo->RssiStaRA<48) - { - pRaInfo->PTStage=0; - } - else if (pRaInfo->PTTryState==1) - { - if ((pRaInfo->PTStopCount>=10)||(pRaInfo->PTPreRssi>pRaInfo->RssiStaRA+5) - ||(pRaInfo->PTPreRssiRssiStaRA-5)||(pRaInfo->DecisionRate!=pRaInfo->PTPreRate)) - { - if (pRaInfo->PTStage==0) - pRaInfo->PTStage=1; - else if(pRaInfo->PTStage==1) - pRaInfo->PTStage=3; - else - pRaInfo->PTStage=5; - - pRaInfo->PTPreRssi=pRaInfo->RssiStaRA; - pRaInfo->PTStopCount=0; - - } - else{ - pRaInfo->RAstage=0; - pRaInfo->PTStopCount++; - } - } - else{ - pRaInfo->PTStage=0; - pRaInfo->RAstage=0; - } - pRaInfo->PTPreRate=pRaInfo->DecisionRate; -} - -static void -odm_PTDecision_8188E( - IN PODM_RA_INFO_T pRaInfo - ) -{ - u1Byte stage_BUF; - u1Byte j; - u1Byte temp_stage; - u4Byte numsc; - u4Byte num_total; - u1Byte stage_id; - - stage_BUF=pRaInfo->PTStage; - numsc = 0; - num_total= pRaInfo->TOTAL* PT_PENALTY[5]; - for(j=0;j<=4;j++) - { - numsc += pRaInfo->RTY[j] * PT_PENALTY[j]; - if(numsc>num_total) - break; - } - - j=j>>1; - temp_stage= (pRaInfo->PTStage +1)>>1; - if (temp_stage>j) - stage_id=temp_stage-j; - else - stage_id=0; - - pRaInfo->PTSmoothFactor=(pRaInfo->PTSmoothFactor>>1) + (pRaInfo->PTSmoothFactor>>2) + stage_id*16+2; - if (pRaInfo->PTSmoothFactor>192) - pRaInfo->PTSmoothFactor=192; - stage_id =pRaInfo->PTSmoothFactor>>6; - temp_stage=stage_id*2; - if (temp_stage!=0) - temp_stage-=1; - if (pRaInfo->DROP>3) - temp_stage=0; - pRaInfo->PTStage=temp_stage; - -} -#endif - -static VOID -odm_RATxRPTTimerSetting( - IN PDM_ODM_T pDM_Odm, - IN u2Byte minRptTime -) -{ - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,(" =====>odm_RATxRPTTimerSetting()\n")); - - - if(pDM_Odm->CurrminRptTime != minRptTime){ - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - (" CurrminRptTime =0x%04x minRptTime=0x%04x\n", pDM_Odm->CurrminRptTime, minRptTime)); - #if(DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_AP)) - ODM_RA_Set_TxRPT_Time(pDM_Odm,minRptTime); - #else - rtw_rpt_timer_cfg_cmd(pDM_Odm->Adapter,minRptTime); - #endif - pDM_Odm->CurrminRptTime = minRptTime; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,(" <=====odm_RATxRPTTimerSetting()\n")); -} - - -VOID -ODM_RASupport_Init( - IN PDM_ODM_T pDM_Odm - ) -{ - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RASupport_Init()\n")); - - // 2012/02/14 MH Be noticed, the init must be after IC type is recognized!!!!! - if (pDM_Odm->SupportICType == ODM_RTL8188E) - pDM_Odm->RaSupport88E = TRUE; - -} - - - -int -ODM_RAInfo_Init( - IN PDM_ODM_T pDM_Odm, - IN u1Byte MacID - ) -{ - PODM_RA_INFO_T pRaInfo = &pDM_Odm->RAInfo[MacID]; - #if 1 - u1Byte WirelessMode=0xFF; //invalid value - u1Byte max_rate_idx = 0x13; //MCS7 - if(pDM_Odm->pWirelessMode!=NULL){ - WirelessMode=*(pDM_Odm->pWirelessMode); - } - - if(WirelessMode != 0xFF ){ - if(WirelessMode & ODM_WM_N24G) - max_rate_idx = 0x13; - else if(WirelessMode & ODM_WM_G) - max_rate_idx = 0x0b; - else if(WirelessMode & ODM_WM_B) - max_rate_idx = 0x03; - } - - //printk("%s ==>WirelessMode:0x%08x ,max_raid_idx:0x%02x\n ",__FUNCTION__,WirelessMode,max_rate_idx); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("ODM_RAInfo_Init(): WirelessMode:0x%08x ,max_raid_idx:0x%02x \n", - WirelessMode,max_rate_idx)); - - pRaInfo->DecisionRate = max_rate_idx; - pRaInfo->PreRate = max_rate_idx; - pRaInfo->HighestRate=max_rate_idx; - #else - pRaInfo->DecisionRate = 0x13; - pRaInfo->PreRate = 0x13; - pRaInfo->HighestRate= 0x13; - #endif - pRaInfo->LowestRate=0; - pRaInfo->RateID=0; - pRaInfo->RateMask=0xffffffff; - pRaInfo->RssiStaRA=0; - pRaInfo->PreRssiStaRA=0; - pRaInfo->SGIEnable=0; - pRaInfo->RAUseRate=0xffffffff; - pRaInfo->NscDown=(N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2; - pRaInfo->NscUp=(N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2; - pRaInfo->RateSGI=0; - pRaInfo->Active=1; //Active is not used at present. by page, 110819 - pRaInfo->RptTime = 0x927c; - pRaInfo->DROP=0; - pRaInfo->DROP1=0; - pRaInfo->RTY[0]=0; - pRaInfo->RTY[1]=0; - pRaInfo->RTY[2]=0; - pRaInfo->RTY[3]=0; - pRaInfo->RTY[4]=0; - pRaInfo->TOTAL=0; - pRaInfo->RAWaitingCounter=0; - pRaInfo->RAPendingCounter=0; -#if POWER_TRAINING_ACTIVE == 1 - pRaInfo->PTActive=1; // Active when this STA is use - pRaInfo->PTTryState=0; - pRaInfo->PTStage=5; // Need to fill into HW_PWR_STATUS - pRaInfo->PTSmoothFactor=192; - pRaInfo->PTStopCount=0; - pRaInfo->PTPreRate=0; - pRaInfo->PTPreRssi=0; - pRaInfo->PTModeSS=0; - pRaInfo->RAstage=0; -#endif - return 0; -} - -int -ODM_RAInfo_Init_all( - IN PDM_ODM_T pDM_Odm - ) -{ - u1Byte MacID = 0; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>\n")); - pDM_Odm->CurrminRptTime = 0; - - for(MacID=0; MacID= ASSOCIATE_ENTRY_NUM)) - return 0; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - ("MacID=%d SGI=%d\n", MacID, pDM_Odm->RAInfo[MacID].RateSGI)); - return pDM_Odm->RAInfo[MacID].RateSGI; -} - -u1Byte -ODM_RA_GetDecisionRate_8188E( - IN PDM_ODM_T pDM_Odm, - IN u1Byte MacID - ) -{ - u1Byte DecisionRate = 0; - - if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM)) - return 0; - DecisionRate = (pDM_Odm->RAInfo[MacID].DecisionRate); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - (" MacID=%d DecisionRate=0x%x\n", MacID, DecisionRate)); - return DecisionRate; -} - -u1Byte -ODM_RA_GetHwPwrStatus_8188E( - IN PDM_ODM_T pDM_Odm, - IN u1Byte MacID - ) -{ - u1Byte PTStage = 5; - if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM)) - return 0; - PTStage = (pDM_Odm->RAInfo[MacID].PTStage); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - ("MacID=%d PTStage=0x%x\n", MacID, PTStage)); - return PTStage; -} - -VOID -ODM_RA_UpdateRateInfo_8188E( - IN PDM_ODM_T pDM_Odm, - IN u1Byte MacID, - IN u1Byte RateID, - IN u4Byte RateMask, - IN u1Byte SGIEnable - ) -{ - PODM_RA_INFO_T pRaInfo = NULL; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("MacID=%d RateID=0x%x RateMask=0x%x SGIEnable=%d\n", - MacID, RateID, RateMask, SGIEnable)); - if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM)) - return; - - pRaInfo = &(pDM_Odm->RAInfo[MacID]); - pRaInfo->RateID = RateID; - pRaInfo->RateMask = RateMask; - pRaInfo->SGIEnable = SGIEnable; - odm_ARFBRefresh_8188E(pDM_Odm, pRaInfo); -} - -VOID -ODM_RA_SetRSSI_8188E( - IN PDM_ODM_T pDM_Odm, - IN u1Byte MacID, - IN u1Byte Rssi - ) -{ - PODM_RA_INFO_T pRaInfo = NULL; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, - (" MacID=%d Rssi=%d\n", MacID, Rssi)); - if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM)) - return; - - pRaInfo = &(pDM_Odm->RAInfo[MacID]); - pRaInfo->RssiStaRA = Rssi; -} - -VOID -ODM_RA_Set_TxRPT_Time( - IN PDM_ODM_T pDM_Odm, - IN u2Byte minRptTime - ) -{ -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP)) - if (minRptTime != 0xffff) -#endif - ODM_Write2Byte(pDM_Odm, REG_TX_RPT_TIME, minRptTime); -} - - -VOID -ODM_RA_TxRPT2Handle_8188E( - IN PDM_ODM_T pDM_Odm, - IN pu1Byte TxRPT_Buf, - IN u2Byte TxRPT_Len, - IN u4Byte MacIDValidEntry0, - IN u4Byte MacIDValidEntry1 - ) -{ - PODM_RA_INFO_T pRAInfo = NULL; - u1Byte MacId = 0; - pu1Byte pBuffer = NULL; - u4Byte valid = 0, ItemNum = 0; - u2Byte minRptTime = 0x927c; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RA_TxRPT2Handle_8188E(): valid0=%d valid1=%d BufferLength=%d\n", - MacIDValidEntry0, MacIDValidEntry1, TxRPT_Len)); - - ItemNum = TxRPT_Len >> 3; - pBuffer = TxRPT_Buf; - - do - { - if(MacId >= ASSOCIATE_ENTRY_NUM) - valid = 0; - else if(MacId >= 32) - valid = (1<<(MacId-32)) & MacIDValidEntry1; - else - valid = (1<RAInfo[MacId]); - if(valid) - { - -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) - pRAInfo->RTY[0] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer); - pRAInfo->RTY[1] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer); - pRAInfo->RTY[2] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer); - pRAInfo->RTY[3] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_3(pBuffer); - pRAInfo->RTY[4] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer); - pRAInfo->DROP = (u2Byte)GET_TX_REPORT_TYPE1_DROP_0(pBuffer); - pRAInfo->DROP1= (u2Byte)GET_TX_REPORT_TYPE1_DROP_1(pBuffer); -#else - pRAInfo->RTY[0] = (unsigned short)(pBuffer[1] << 8 | pBuffer[0]); - pRAInfo->RTY[1] = pBuffer[2]; - pRAInfo->RTY[2] = pBuffer[3]; - pRAInfo->RTY[3] = pBuffer[4]; - pRAInfo->RTY[4] = pBuffer[5]; - pRAInfo->DROP = pBuffer[6]; - pRAInfo->DROP1= pBuffer[7]; -#endif - pRAInfo->TOTAL = pRAInfo->RTY[0] + \ - pRAInfo->RTY[1] + \ - pRAInfo->RTY[2] + \ - pRAInfo->RTY[3] + \ - pRAInfo->RTY[4] + \ - pRAInfo->DROP; - if(pRAInfo->TOTAL != 0) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, - ("macid=%d Total=%d R0=%d R1=%d R2=%d R3=%d R4=%d D0=%d valid0=%x valid1=%x\n", - MacId, - pRAInfo->TOTAL, - pRAInfo->RTY[0], - pRAInfo->RTY[1], - pRAInfo->RTY[2], - pRAInfo->RTY[3], - pRAInfo->RTY[4], - pRAInfo->DROP, - MacIDValidEntry0 , - MacIDValidEntry1)); -#if POWER_TRAINING_ACTIVE == 1 - if (pRAInfo->PTActive){ - if(pRAInfo->RAstage<5){ - odm_RateDecision_8188E(pDM_Odm,pRAInfo); - } - else if(pRAInfo->RAstage==5){ // Power training try state - odm_PTTryState_8188E(pRAInfo); - } - else {// RAstage==6 - odm_PTDecision_8188E(pRAInfo); - } - - // Stage_RA counter - if (pRAInfo->RAstage<=5) - pRAInfo->RAstage++; - else - pRAInfo->RAstage=0; - } - else{ - odm_RateDecision_8188E(pDM_Odm,pRAInfo); - } -#else - odm_RateDecision_8188E(pDM_Odm, pRAInfo); -#endif - -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - extern void RTL8188E_SetStationTxRateInfo(PDM_ODM_T, PODM_RA_INFO_T, int); - RTL8188E_SetStationTxRateInfo(pDM_Odm, pRAInfo, MacId); -#ifdef DETECT_STA_EXISTANCE - void RTL8188E_DetectSTAExistance(PDM_ODM_T pDM_Odm, PODM_RA_INFO_T pRAInfo, int MacID); - RTL8188E_DetectSTAExistance(pDM_Odm, pRAInfo, MacId); -#endif -#endif - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, - ("macid=%d R0=%d R1=%d R2=%d R3=%d R4=%d drop=%d valid0=%x RateID=%d SGI=%d\n", - MacId, - pRAInfo->RTY[0], - pRAInfo->RTY[1], - pRAInfo->RTY[2], - pRAInfo->RTY[3], - pRAInfo->RTY[4], - pRAInfo->DROP, - MacIDValidEntry0, - pRAInfo->DecisionRate, - pRAInfo->RateSGI)); - } - else - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, (" TOTAL=0!!!!\n")); - } - - if(minRptTime > pRAInfo->RptTime) - minRptTime = pRAInfo->RptTime; - - pBuffer += TX_RPT2_ITEM_SIZE; - MacId++; - }while(MacId < ItemNum); - - odm_RATxRPTTimerSetting(pDM_Odm,minRptTime); - - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("<===== ODM_RA_TxRPT2Handle_8188E()\n")); -} - -#else - -static VOID -odm_RATxRPTTimerSetting( - IN PDM_ODM_T pDM_Odm, - IN u2Byte minRptTime -) -{ - return; -} - - -VOID -ODM_RASupport_Init( - IN PDM_ODM_T pDM_Odm - ) -{ - return; -} - -int -ODM_RAInfo_Init( - IN PDM_ODM_T pDM_Odm, - IN u1Byte MacID - ) -{ - return 0; -} - -int -ODM_RAInfo_Init_all( - IN PDM_ODM_T pDM_Odm - ) -{ - return 0; -} - -u1Byte -ODM_RA_GetShortGI_8188E( - IN PDM_ODM_T pDM_Odm, - IN u1Byte MacID - ) -{ - return 0; -} - -u1Byte -ODM_RA_GetDecisionRate_8188E( - IN PDM_ODM_T pDM_Odm, - IN u1Byte MacID - ) -{ - return 0; -} -u1Byte -ODM_RA_GetHwPwrStatus_8188E( - IN PDM_ODM_T pDM_Odm, - IN u1Byte MacID - ) -{ - return 0; -} - -VOID -ODM_RA_UpdateRateInfo_8188E( - IN PDM_ODM_T pDM_Odm, - IN u1Byte MacID, - IN u1Byte RateID, - IN u4Byte RateMask, - IN u1Byte SGIEnable - ) -{ - return; -} - -VOID -ODM_RA_SetRSSI_8188E( - IN PDM_ODM_T pDM_Odm, - IN u1Byte MacID, - IN u1Byte Rssi - ) -{ - return; -} - -VOID -ODM_RA_Set_TxRPT_Time( - IN PDM_ODM_T pDM_Odm, - IN u2Byte minRptTime - ) -{ - return; -} - -VOID -ODM_RA_TxRPT2Handle_8188E( - IN PDM_ODM_T pDM_Odm, - IN pu1Byte TxRPT_Buf, - IN u2Byte TxRPT_Len, - IN u4Byte MacIDValidEntry0, - IN u4Byte MacIDValidEntry1 - ) -{ - return; -} - - -#endif - diff --git a/hal/OUTSRC/rtl8188e/HalHWImg8188E_BB.c b/hal/OUTSRC/rtl8188e/HalHWImg8188E_BB.c deleted file mode 100755 index 0b21874..0000000 --- a/hal/OUTSRC/rtl8188e/HalHWImg8188E_BB.c +++ /dev/null @@ -1,1448 +0,0 @@ -/****************************************************************************** -* -* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -* -* This program is free software; you can redistribute it and/or modify it -* under the terms of version 2 of the GNU General Public License as -* published by the Free Software Foundation. -* -* This program is distributed in the hope that it will be useful, but WITHOUT -* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -* more details. -* -* You should have received a copy of the GNU General Public License along with -* this program; if not, write to the Free Software Foundation, Inc., -* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -* -* -******************************************************************************/ - -#include "../odm_precomp.h" - -#ifdef CONFIG_IOL_IOREG_CFG -#include -#endif - -#if (RTL8188E_SUPPORT == 1) -static BOOLEAN -CheckCondition( - const u4Byte Condition, - const u4Byte Hex - ) -{ - u4Byte _board = (Hex & 0x000000FF); - u4Byte _interface = (Hex & 0x0000FF00) >> 8; - u4Byte _platform = (Hex & 0x00FF0000) >> 16; - u4Byte cond = Condition; - - if ( Condition == 0xCDCDCDCD ) - return TRUE; - - cond = Condition & 0x000000FF; - if ( (_board != cond) && (cond != 0xFF) ) - return FALSE; - - cond = Condition & 0x0000FF00; - cond = cond >> 8; - if ( ((_interface & cond) == 0) && (cond != 0x07) ) - return FALSE; - - cond = Condition & 0x00FF0000; - cond = cond >> 16; - if ( ((_platform & cond) == 0) && (cond != 0x0F) ) - return FALSE; - return TRUE; -} - - -/****************************************************************************** -* AGC_TAB_1T.TXT -******************************************************************************/ - -u4Byte Array_AGC_TAB_1T_8188E[] = { -0xFF0F0718, 0xABCD, - 0xC78, 0xF7000001, - 0xC78, 0xF6010001, - 0xC78, 0xF5020001, - 0xC78, 0xF4030001, - 0xC78, 0xF3040001, - 0xC78, 0xF2050001, - 0xC78, 0xF1060001, - 0xC78, 0xF0070001, - 0xC78, 0xEF080001, - 0xC78, 0xEE090001, - 0xC78, 0xED0A0001, - 0xC78, 0xEC0B0001, - 0xC78, 0xEB0C0001, - 0xC78, 0xEA0D0001, - 0xC78, 0xE90E0001, - 0xC78, 0xE80F0001, - 0xC78, 0xE7100001, - 0xC78, 0xE6110001, - 0xC78, 0xE5120001, - 0xC78, 0xE4130001, - 0xC78, 0xE3140001, - 0xC78, 0xE2150001, - 0xC78, 0xE1160001, - 0xC78, 0x89170001, - 0xC78, 0x88180001, - 0xC78, 0x87190001, - 0xC78, 0x861A0001, - 0xC78, 0x851B0001, - 0xC78, 0x841C0001, - 0xC78, 0x831D0001, - 0xC78, 0x821E0001, - 0xC78, 0x811F0001, - 0xC78, 0x6B200001, - 0xC78, 0x6A210001, - 0xC78, 0x69220001, - 0xC78, 0x68230001, - 0xC78, 0x67240001, - 0xC78, 0x66250001, - 0xC78, 0x65260001, - 0xC78, 0x64270001, - 0xC78, 0x63280001, - 0xC78, 0x62290001, - 0xC78, 0x612A0001, - 0xC78, 0x462B0001, - 0xC78, 0x452C0001, - 0xC78, 0x442D0001, - 0xC78, 0x432E0001, - 0xC78, 0x422F0001, - 0xC78, 0x41300001, - 0xC78, 0x40310001, - 0xC78, 0x40320001, - 0xC78, 0x40330001, - 0xC78, 0x40340001, - 0xC78, 0x40350001, - 0xC78, 0x40360001, - 0xC78, 0x40370001, - 0xC78, 0x40380001, - 0xC78, 0x40390001, - 0xC78, 0x403A0001, - 0xC78, 0x403B0001, - 0xC78, 0x403C0001, - 0xC78, 0x403D0001, - 0xC78, 0x403E0001, - 0xC78, 0x403F0001, - 0xCDCDCDCD, 0xCDCD, - 0xC78, 0xFB000001, - 0xC78, 0xFB010001, - 0xC78, 0xFB020001, - 0xC78, 0xFB030001, - 0xC78, 0xFB040001, - 0xC78, 0xFB050001, - 0xC78, 0xFA060001, - 0xC78, 0xF9070001, - 0xC78, 0xF8080001, - 0xC78, 0xF7090001, - 0xC78, 0xF60A0001, - 0xC78, 0xF50B0001, - 0xC78, 0xF40C0001, - 0xC78, 0xF30D0001, - 0xC78, 0xF20E0001, - 0xC78, 0xF10F0001, - 0xC78, 0xF0100001, - 0xC78, 0xEF110001, - 0xC78, 0xEE120001, - 0xC78, 0xED130001, - 0xC78, 0xEC140001, - 0xC78, 0xEB150001, - 0xC78, 0xEA160001, - 0xC78, 0xE9170001, - 0xC78, 0xE8180001, - 0xC78, 0xE7190001, - 0xC78, 0xE61A0001, - 0xC78, 0xE51B0001, - 0xC78, 0xE41C0001, - 0xC78, 0xE31D0001, - 0xC78, 0xE21E0001, - 0xC78, 0xE11F0001, - 0xC78, 0x8A200001, - 0xC78, 0x89210001, - 0xC78, 0x88220001, - 0xC78, 0x87230001, - 0xC78, 0x86240001, - 0xC78, 0x85250001, - 0xC78, 0x84260001, - 0xC78, 0x83270001, - 0xC78, 0x82280001, - 0xC78, 0x6B290001, - 0xC78, 0x6A2A0001, - 0xC78, 0x692B0001, - 0xC78, 0x682C0001, - 0xC78, 0x672D0001, - 0xC78, 0x662E0001, - 0xC78, 0x652F0001, - 0xC78, 0x64300001, - 0xC78, 0x63310001, - 0xC78, 0x62320001, - 0xC78, 0x61330001, - 0xC78, 0x46340001, - 0xC78, 0x45350001, - 0xC78, 0x44360001, - 0xC78, 0x43370001, - 0xC78, 0x42380001, - 0xC78, 0x41390001, - 0xC78, 0x403A0001, - 0xC78, 0x403B0001, - 0xC78, 0x403C0001, - 0xC78, 0x403D0001, - 0xC78, 0x403E0001, - 0xC78, 0x403F0001, - 0xFF0F0718, 0xDEAD, - 0xFF0F0718, 0xABCD, - 0xC78, 0xFB400001, - 0xC78, 0xFA410001, - 0xC78, 0xF9420001, - 0xC78, 0xF8430001, - 0xC78, 0xF7440001, - 0xC78, 0xF6450001, - 0xC78, 0xF5460001, - 0xC78, 0xF4470001, - 0xC78, 0xF3480001, - 0xC78, 0xF2490001, - 0xC78, 0xF14A0001, - 0xC78, 0xF04B0001, - 0xC78, 0xEF4C0001, - 0xC78, 0xEE4D0001, - 0xC78, 0xED4E0001, - 0xC78, 0xEC4F0001, - 0xC78, 0xEB500001, - 0xC78, 0xEA510001, - 0xC78, 0xE9520001, - 0xC78, 0xE8530001, - 0xC78, 0xE7540001, - 0xC78, 0xE6550001, - 0xC78, 0xE5560001, - 0xC78, 0xE4570001, - 0xC78, 0xE3580001, - 0xC78, 0xE2590001, - 0xC78, 0xC35A0001, - 0xC78, 0xC25B0001, - 0xC78, 0xC15C0001, - 0xC78, 0x8B5D0001, - 0xC78, 0x8A5E0001, - 0xC78, 0x895F0001, - 0xC78, 0x88600001, - 0xC78, 0x87610001, - 0xC78, 0x86620001, - 0xC78, 0x85630001, - 0xC78, 0x84640001, - 0xC78, 0x67650001, - 0xC78, 0x66660001, - 0xC78, 0x65670001, - 0xC78, 0x64680001, - 0xC78, 0x63690001, - 0xC78, 0x626A0001, - 0xC78, 0x616B0001, - 0xC78, 0x606C0001, - 0xC78, 0x466D0001, - 0xC78, 0x456E0001, - 0xC78, 0x446F0001, - 0xC78, 0x43700001, - 0xC78, 0x42710001, - 0xC78, 0x41720001, - 0xC78, 0x40730001, - 0xC78, 0x40740001, - 0xC78, 0x40750001, - 0xC78, 0x40760001, - 0xC78, 0x40770001, - 0xC78, 0x40780001, - 0xC78, 0x40790001, - 0xC78, 0x407A0001, - 0xC78, 0x407B0001, - 0xC78, 0x407C0001, - 0xC78, 0x407D0001, - 0xC78, 0x407E0001, - 0xC78, 0x407F0001, - 0xCDCDCDCD, 0xCDCD, - 0xC78, 0xFB400001, - 0xC78, 0xFB410001, - 0xC78, 0xFB420001, - 0xC78, 0xFB430001, - 0xC78, 0xFB440001, - 0xC78, 0xFB450001, - 0xC78, 0xFB460001, - 0xC78, 0xFB470001, - 0xC78, 0xFB480001, - 0xC78, 0xFA490001, - 0xC78, 0xF94A0001, - 0xC78, 0xF84B0001, - 0xC78, 0xF74C0001, - 0xC78, 0xF64D0001, - 0xC78, 0xF54E0001, - 0xC78, 0xF44F0001, - 0xC78, 0xF3500001, - 0xC78, 0xF2510001, - 0xC78, 0xF1520001, - 0xC78, 0xF0530001, - 0xC78, 0xEF540001, - 0xC78, 0xEE550001, - 0xC78, 0xED560001, - 0xC78, 0xEC570001, - 0xC78, 0xEB580001, - 0xC78, 0xEA590001, - 0xC78, 0xE95A0001, - 0xC78, 0xE85B0001, - 0xC78, 0xE75C0001, - 0xC78, 0xE65D0001, - 0xC78, 0xE55E0001, - 0xC78, 0xE45F0001, - 0xC78, 0xE3600001, - 0xC78, 0xE2610001, - 0xC78, 0xC3620001, - 0xC78, 0xC2630001, - 0xC78, 0xC1640001, - 0xC78, 0x8B650001, - 0xC78, 0x8A660001, - 0xC78, 0x89670001, - 0xC78, 0x88680001, - 0xC78, 0x87690001, - 0xC78, 0x866A0001, - 0xC78, 0x856B0001, - 0xC78, 0x846C0001, - 0xC78, 0x676D0001, - 0xC78, 0x666E0001, - 0xC78, 0x656F0001, - 0xC78, 0x64700001, - 0xC78, 0x63710001, - 0xC78, 0x62720001, - 0xC78, 0x61730001, - 0xC78, 0x60740001, - 0xC78, 0x46750001, - 0xC78, 0x45760001, - 0xC78, 0x44770001, - 0xC78, 0x43780001, - 0xC78, 0x42790001, - 0xC78, 0x417A0001, - 0xC78, 0x407B0001, - 0xC78, 0x407C0001, - 0xC78, 0x407D0001, - 0xC78, 0x407E0001, - 0xC78, 0x407F0001, - 0xFF0F0718, 0xDEAD, - 0xC50, 0x69553422, - 0xC50, 0x69553420, - -}; - -HAL_STATUS -ODM_ReadAndConfig_AGC_TAB_1T_8188E( - IN PDM_ODM_T pDM_Odm - ) -{ - #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) - - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = pDM_Odm->SupportPlatform; - u1Byte interfaceValue = pDM_Odm->SupportInterface; - u1Byte board = pDM_Odm->BoardType; - u4Byte ArrayLen = sizeof(Array_AGC_TAB_1T_8188E)/sizeof(u4Byte); - pu4Byte Array = Array_AGC_TAB_1T_8188E; - BOOLEAN biol = FALSE; -#ifdef CONFIG_IOL_IOREG_CFG - PADAPTER Adapter = pDM_Odm->Adapter; - struct xmit_frame *pxmit_frame; - u8 bndy_cnt=1; -#endif//#ifdef CONFIG_IOL_IOREG_CFG - HAL_STATUS rst =HAL_STATUS_SUCCESS; - - hex += board; - hex += interfaceValue << 8; - hex += platform << 16; - hex += 0xFF000000; -#ifdef CONFIG_IOL_IOREG_CFG - biol = rtw_IOL_applied(Adapter); - - if(biol){ - if((pxmit_frame= rtw_IOL_accquire_xmit_frame(Adapter)) == NULL){ - printk("rtw_IOL_accquire_xmit_frame failed\n"); - return HAL_STATUS_FAILURE; - } - } -#endif//#ifdef CONFIG_IOL_IOREG_CFG - - for (i = 0; i < ArrayLen; i += 2 ) - { - u4Byte v1 = Array[i]; - u4Byte v2 = Array[i+1]; - - // This (offset, data) pair meets the condition. - if ( v1 < 0xCDCDCDCD ) - { - #ifdef CONFIG_IOL_IOREG_CFG - if(biol){ - if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord); - } - else - #endif //#ifdef CONFIG_IOL_IOREG_CFG - { - odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2); - } - continue; - } - else - { // This line is the start line of branch. - if ( !CheckCondition(Array[i], hex) ) - { // Discard the following (offset, data) pairs. - READ_NEXT_PAIR(v1, v2, i); - while ( v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - i -= 2; // prevent from for-loop += 2 - } - else // Configure matched pairs and skip to end of if-else. - { - READ_NEXT_PAIR(v1, v2, i); - while ( v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - #ifdef CONFIG_IOL_IOREG_CFG - if(biol){ - if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord); - } - else - #endif //#ifdef CONFIG_IOL_IOREG_CFG - { - odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2); - } - READ_NEXT_PAIR(v1, v2, i); - } - - while (v2 != 0xDEAD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - - } - } - } -#ifdef CONFIG_IOL_IOREG_CFG - if(biol){ - //printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt); - if(rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) - { - #ifdef CONFIG_IOL_IOREG_CFG_DBG - printk("~~~ %s Success !!! \n",__FUNCTION__); - { - //dump data from TX packet buffer - rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); - } - #endif //CONFIG_IOL_IOREG_CFG_DBG - - } - else{ - printk("~~~ %s IOL_exec_cmds Failed !!! \n",__FUNCTION__); - #ifdef CONFIG_IOL_IOREG_CFG_DBG - { - //dump data from TX packet buffer - rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); - } - #endif //CONFIG_IOL_IOREG_CFG_DBG - - rst = HAL_STATUS_FAILURE; - } - } -#endif //#ifdef CONFIG_IOL_IOREG_CFG - return rst; -} - -/****************************************************************************** -* AGC_TAB_1T_ICUT.TXT -******************************************************************************/ - -u4Byte Array_MP_8188E_AGC_TAB_1T_ICUT[] = { - 0xC78, 0xFB000001, - 0xC78, 0xFB010001, - 0xC78, 0xFB020001, - 0xC78, 0xFB030001, - 0xC78, 0xFB040001, - 0xC78, 0xFA050001, - 0xC78, 0xF9060001, - 0xC78, 0xF8070001, - 0xC78, 0xF7080001, - 0xC78, 0xF6090001, - 0xC78, 0xF50A0001, - 0xC78, 0xF40B0001, - 0xC78, 0xF30C0001, - 0xC78, 0xF20D0001, - 0xC78, 0xF10E0001, - 0xC78, 0xF00F0001, - 0xC78, 0xEF100001, - 0xC78, 0xEE110001, - 0xC78, 0xED120001, - 0xC78, 0xEC130001, - 0xC78, 0xEB140001, - 0xC78, 0xEA150001, - 0xC78, 0xE9160001, - 0xC78, 0xE8170001, - 0xC78, 0xE7180001, - 0xC78, 0xE6190001, - 0xC78, 0xE51A0001, - 0xC78, 0xE41B0001, - 0xC78, 0xC71C0001, - 0xC78, 0xC61D0001, - 0xC78, 0xC51E0001, - 0xC78, 0xC41F0001, - 0xC78, 0xC3200001, - 0xC78, 0xC2210001, - 0xC78, 0x88220001, - 0xC78, 0x87230001, - 0xC78, 0x86240001, - 0xC78, 0x85250001, - 0xC78, 0x84260001, - 0xC78, 0x83270001, - 0xC78, 0x82280001, - 0xC78, 0x81290001, - 0xC78, 0x242A0001, - 0xC78, 0x232B0001, - 0xC78, 0x222C0001, - 0xC78, 0x672D0001, - 0xC78, 0x662E0001, - 0xC78, 0x652F0001, - 0xC78, 0x64300001, - 0xC78, 0x63310001, - 0xC78, 0x62320001, - 0xC78, 0x61330001, - 0xC78, 0x60340001, - 0xC78, 0x4A350001, - 0xC78, 0x49360001, - 0xC78, 0x48370001, - 0xC78, 0x47380001, - 0xC78, 0x46390001, - 0xC78, 0x453A0001, - 0xC78, 0x443B0001, - 0xC78, 0x433C0001, - 0xC78, 0x423D0001, - 0xC78, 0x413E0001, - 0xC78, 0x403F0001, - 0xC78, 0xFB400001, - 0xC78, 0xFB410001, - 0xC78, 0xFB420001, - 0xC78, 0xFB430001, - 0xC78, 0xFB440001, - 0xC78, 0xFB450001, - 0xC78, 0xFB460001, - 0xC78, 0xFB470001, - 0xC78, 0xFA480001, - 0xC78, 0xF9490001, - 0xC78, 0xF84A0001, - 0xC78, 0xF74B0001, - 0xC78, 0xF64C0001, - 0xC78, 0xF54D0001, - 0xC78, 0xF44E0001, - 0xC78, 0xF34F0001, - 0xC78, 0xF2500001, - 0xC78, 0xF1510001, - 0xC78, 0xF0520001, - 0xC78, 0xEF530001, - 0xC78, 0xEE540001, - 0xC78, 0xED550001, - 0xC78, 0xEC560001, - 0xC78, 0xEB570001, - 0xC78, 0xEA580001, - 0xC78, 0xE9590001, - 0xC78, 0xE85A0001, - 0xC78, 0xE75B0001, - 0xC78, 0xE65C0001, - 0xC78, 0xE55D0001, - 0xC78, 0xC65E0001, - 0xC78, 0xC55F0001, - 0xC78, 0xC4600001, - 0xC78, 0xC3610001, - 0xC78, 0xC2620001, - 0xC78, 0xC1630001, - 0xC78, 0xC0640001, - 0xC78, 0xA3650001, - 0xC78, 0xA2660001, - 0xC78, 0xA1670001, - 0xC78, 0x88680001, - 0xC78, 0x87690001, - 0xC78, 0x866A0001, - 0xC78, 0x856B0001, - 0xC78, 0x846C0001, - 0xC78, 0x836D0001, - 0xC78, 0x826E0001, - 0xC78, 0x666F0001, - 0xC78, 0x65700001, - 0xC78, 0x64710001, - 0xC78, 0x63720001, - 0xC78, 0x62730001, - 0xC78, 0x61740001, - 0xC78, 0x48750001, - 0xC78, 0x47760001, - 0xC78, 0x46770001, - 0xC78, 0x45780001, - 0xC78, 0x44790001, - 0xC78, 0x437A0001, - 0xC78, 0x427B0001, - 0xC78, 0x417C0001, - 0xC78, 0x407D0001, - 0xC78, 0x407E0001, - 0xC78, 0x407F0001, - 0xC50, 0x69553422, - 0xC50, 0x69553420, - -}; - -void -ODM_ReadAndConfig_AGC_TAB_1T_ICUT_8188E( - IN PDM_ODM_T pDM_Odm - ) -{ - #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) - - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = pDM_Odm->SupportPlatform; - u1Byte _interface = pDM_Odm->SupportInterface; - u1Byte board = pDM_Odm->BoardType; - u4Byte ArrayLen = sizeof(Array_MP_8188E_AGC_TAB_1T_ICUT)/sizeof(u4Byte); - pu4Byte Array = Array_MP_8188E_AGC_TAB_1T_ICUT; - - - hex += board; - hex += _interface << 8; - hex += platform << 16; - hex += 0xFF000000; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_8188E_AGC_TAB_1T_ICUT, hex = 0x%X\n", hex)); - - for (i = 0; i < ArrayLen; i += 2 ) - { - u4Byte v1 = Array[i]; - u4Byte v2 = Array[i+1]; - - // This (offset, data) pair meets the condition. - if ( v1 < 0xCDCDCDCD ) - { - odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2); - continue; - } - else - { // This line is the start line of branch. - if ( !CheckCondition(Array[i], hex) ) - { // Discard the following (offset, data) pairs. - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - i -= 2; // prevent from for-loop += 2 - } - else // Configure matched pairs and skip to end of if-else. - { - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2); - READ_NEXT_PAIR(v1, v2, i); - } - - while (v2 != 0xDEAD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - - } - } - } - -} - -/****************************************************************************** -* PHY_REG_1T.TXT -******************************************************************************/ - -u4Byte Array_PHY_REG_1T_8188E[] = { - 0x800, 0x80040000, - 0x804, 0x00000003, - 0x808, 0x0000FC00, - 0x80C, 0x0000000A, - 0x810, 0x10001331, - 0x814, 0x020C3D10, - 0x818, 0x02200385, - 0x81C, 0x00000000, - 0x820, 0x01000100, - 0x824, 0x00390204, - 0x828, 0x00000000, - 0x82C, 0x00000000, - 0x830, 0x00000000, - 0x834, 0x00000000, - 0x838, 0x00000000, - 0x83C, 0x00000000, - 0x840, 0x00010000, - 0x844, 0x00000000, - 0x848, 0x00000000, - 0x84C, 0x00000000, - 0x850, 0x00000000, - 0x854, 0x00000000, - 0x858, 0x569A11A9, - 0x85C, 0x01000014, - 0x860, 0x66F60110, - 0x864, 0x061F0649, - 0x868, 0x00000000, - 0x86C, 0x27272700, - 0xFF0F0718, 0xABCD, - 0x870, 0x07000300, - 0xCDCDCDCD, 0xCDCD, - 0x870, 0x07000760, - 0xFF0F0718, 0xDEAD, - 0x874, 0x25004000, - 0x878, 0x00000808, - 0x87C, 0x00000000, - 0x880, 0xB0000C1C, - 0x884, 0x00000001, - 0x888, 0x00000000, - 0x88C, 0xCCC000C0, - 0x890, 0x00000800, - 0x894, 0xFFFFFFFE, - 0x898, 0x40302010, - 0x89C, 0x00706050, - 0x900, 0x00000000, - 0x904, 0x00000023, - 0x908, 0x00000000, - 0x90C, 0x81121111, - 0x910, 0x00000002, - 0x914, 0x00000201, - 0xA00, 0x00D047C8, - 0xA04, 0x80FF000C, - 0xA08, 0x8C838300, - 0xA0C, 0x2E7F120F, - 0xA10, 0x9500BB78, - 0xA14, 0x1114D028, - 0xA18, 0x00881117, - 0xA1C, 0x89140F00, - 0xFF0F0718, 0xABCD, - 0xA20, 0x13130000, - 0xA24, 0x060A0D10, - 0xA28, 0x00000103, - 0xCDCDCDCD, 0xCDCD, - 0xA20, 0x1A1B0000, - 0xA24, 0x090E1317, - 0xA28, 0x00000204, - 0xFF0F0718, 0xDEAD, - 0xA2C, 0x00D30000, - 0xA70, 0x101FBF00, - 0xA74, 0x00000007, - 0xA78, 0x00000900, - 0xA7C, 0x225B0606, - 0xA80, 0x218075B1, - 0xFF0F0718, 0xABCD, - 0xB2C, 0x00000000, - 0xCDCDCDCD, 0xCDCD, - 0xB2C, 0x80000000, - 0xFF0F0718, 0xDEAD, - 0xC00, 0x48071D40, - 0xC04, 0x03A05611, - 0xC08, 0x000000E4, - 0xC0C, 0x6C6C6C6C, - 0xC10, 0x08800000, - 0xC14, 0x40000100, - 0xC18, 0x08800000, - 0xC1C, 0x40000100, - 0xC20, 0x00000000, - 0xC24, 0x00000000, - 0xC28, 0x00000000, - 0xC2C, 0x00000000, - 0xC30, 0x69E9AC47, - 0xC34, 0x469652AF, - 0xC38, 0x49795994, - 0xC3C, 0x0A97971C, - 0xC40, 0x1F7C403F, - 0xC44, 0x000100B7, - 0xC48, 0xEC020107, - 0xC4C, 0x007F037F, - 0xC50, 0x69553420, - 0xC54, 0x43BC0094, - 0xC58, 0x00013169, - 0xC5C, 0x00250492, - 0xC60, 0x00000000, - 0xC64, 0x7112848B, - 0xC68, 0x47C00BFF, - 0xC6C, 0x00000036, - 0xC70, 0x2C7F000D, - 0xC74, 0x020610DB, - 0xC78, 0x0000001F, - 0xC7C, 0x00B91612, - 0xFF0F0718, 0xABCD, - 0xC80, 0x2D4000B5, - 0xCDCDCDCD, 0xCDCD, - 0xC80, 0x390000E4, - 0xFF0F0718, 0xDEAD, - 0xC84, 0x20F60000, - 0xC88, 0x40000100, - 0xC8C, 0x20200000, - 0xC90, 0x00091521, - 0xC94, 0x00000000, - 0xC98, 0x00121820, - 0xC9C, 0x00007F7F, - 0xCA0, 0x00000000, - 0xCA4, 0x000300A0, - 0xCA8, 0x00000000, - 0xCAC, 0x00000000, - 0xCB0, 0x00000000, - 0xCB4, 0x00000000, - 0xCB8, 0x00000000, - 0xCBC, 0x28000000, - 0xCC0, 0x00000000, - 0xCC4, 0x00000000, - 0xCC8, 0x00000000, - 0xCCC, 0x00000000, - 0xCD0, 0x00000000, - 0xCD4, 0x00000000, - 0xCD8, 0x64B22427, - 0xCDC, 0x00766932, - 0xCE0, 0x00222222, - 0xCE4, 0x00000000, - 0xCE8, 0x37644302, - 0xCEC, 0x2F97D40C, - 0xD00, 0x00000740, - 0xD04, 0x00020401, - 0xD08, 0x0000907F, - 0xD0C, 0x20010201, - 0xD10, 0xA0633333, - 0xD14, 0x3333BC43, - 0xD18, 0x7A8F5B6F, - 0xD2C, 0xCC979975, - 0xD30, 0x00000000, - 0xD34, 0x80608000, - 0xD38, 0x00000000, - 0xD3C, 0x00127353, - 0xD40, 0x00000000, - 0xD44, 0x00000000, - 0xD48, 0x00000000, - 0xD4C, 0x00000000, - 0xD50, 0x6437140A, - 0xD54, 0x00000000, - 0xD58, 0x00000282, - 0xD5C, 0x30032064, - 0xD60, 0x4653DE68, - 0xD64, 0x04518A3C, - 0xD68, 0x00002101, - 0xD6C, 0x2A201C16, - 0xD70, 0x1812362E, - 0xD74, 0x322C2220, - 0xD78, 0x000E3C24, - 0xE00, 0x2D2D2D2D, - 0xE04, 0x2D2D2D2D, - 0xE08, 0x0390272D, - 0xE10, 0x2D2D2D2D, - 0xE14, 0x2D2D2D2D, - 0xE18, 0x2D2D2D2D, - 0xE1C, 0x2D2D2D2D, - 0xE28, 0x00000000, - 0xE30, 0x1000DC1F, - 0xE34, 0x10008C1F, - 0xE38, 0x02140102, - 0xE3C, 0x681604C2, - 0xE40, 0x01007C00, - 0xE44, 0x01004800, - 0xE48, 0xFB000000, - 0xE4C, 0x000028D1, - 0xE50, 0x1000DC1F, - 0xE54, 0x10008C1F, - 0xE58, 0x02140102, - 0xE5C, 0x28160D05, - 0xE60, 0x00000008, - 0xE68, 0x001B25A4, - 0xE6C, 0x00C00014, - 0xE70, 0x00C00014, - 0xE74, 0x01000014, - 0xE78, 0x01000014, - 0xE7C, 0x01000014, - 0xE80, 0x01000014, - 0xE84, 0x00C00014, - 0xE88, 0x01000014, - 0xE8C, 0x00C00014, - 0xED0, 0x00C00014, - 0xED4, 0x00C00014, - 0xED8, 0x00C00014, - 0xEDC, 0x00000014, - 0xEE0, 0x00000014, - 0xFF0F0718, 0xABCD, - 0xEE8, 0x32555448, - 0xCDCDCDCD, 0xCDCD, - 0xEE8, 0x21555448, - 0xFF0F0718, 0xDEAD, - 0xEEC, 0x01C00014, - 0xF14, 0x00000003, - 0xF4C, 0x00000000, - 0xF00, 0x00000300, -}; - - -HAL_STATUS -ODM_ReadAndConfig_PHY_REG_1T_8188E( - IN PDM_ODM_T pDM_Odm - ) -{ - #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) - - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = pDM_Odm->SupportPlatform; - u1Byte interfaceValue = pDM_Odm->SupportInterface; - u1Byte board = pDM_Odm->BoardType; - u4Byte ArrayLen = sizeof(Array_PHY_REG_1T_8188E)/sizeof(u4Byte); - pu4Byte Array = Array_PHY_REG_1T_8188E; - BOOLEAN biol = FALSE; -#ifdef CONFIG_IOL_IOREG_CFG - PADAPTER Adapter = pDM_Odm->Adapter; - struct xmit_frame *pxmit_frame; - u8 bndy_cnt=1; - #ifdef CONFIG_IOL_IOREG_CFG_DBG - struct cmd_cmp cmpdata[ArrayLen]; - u4Byte cmpdata_idx=0; - #endif -#endif//#ifdef CONFIG_IOL_IOREG_CFG - HAL_STATUS rst =HAL_STATUS_SUCCESS; - hex += board; - hex += interfaceValue << 8; - hex += platform << 16; - hex += 0xFF000000; -#ifdef CONFIG_IOL_IOREG_CFG - biol = rtw_IOL_applied(Adapter); - - if(biol){ - if((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) - { - printk("rtw_IOL_accquire_xmit_frame failed\n"); - return HAL_STATUS_FAILURE; - } - } -#endif//#ifdef CONFIG_IOL_IOREG_CFG - - for (i = 0; i < ArrayLen; i += 2 ) - { - u4Byte v1 = Array[i]; - u4Byte v2 = Array[i+1]; - - - // This (offset, data) pair meets the condition. - if ( v1 < 0xCDCDCDCD ) - { - #ifdef CONFIG_IOL_IOREG_CFG - if(biol){ - if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - - - if (v1 == 0xfe){ - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,50); - } - else if (v1 == 0xfd){ - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,5); - } - else if (v1 == 0xfc){ - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,1); - } - else if (v1 == 0xfb){ - rtw_IOL_append_DELAY_US_cmd(pxmit_frame,50); - } - else if (v1 == 0xfa){ - rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 5); - } - else if (v1 == 0xf9){ - rtw_IOL_append_DELAY_US_cmd(pxmit_frame,1); - } - else{ - if (v1 == 0xa24) - pDM_Odm->RFCalibrateInfo.RegA24 = v2; - - rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord); - #ifdef CONFIG_IOL_IOREG_CFG_DBG - cmpdata[cmpdata_idx].addr = v1; - cmpdata[cmpdata_idx].value= v2; - cmpdata_idx++; - #endif - } - } - else - #endif //#ifdef CONFIG_IOL_IOREG_CFG - { - odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2); - } - continue; - } - else - { // This line is the start line of branch. - if ( !CheckCondition(Array[i], hex) ) - { // Discard the following (offset, data) pairs. - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - i -= 2; // prevent from for-loop += 2 - } - else // Configure matched pairs and skip to end of if-else. - { - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - #ifdef CONFIG_IOL_IOREG_CFG - if(biol){ - if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - if (v1 == 0xfe){ - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,50); - } - else if (v1 == 0xfd){ - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,5); - } - else if (v1 == 0xfc){ - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,1); - } - else if (v1 == 0xfb){ - rtw_IOL_append_DELAY_US_cmd(pxmit_frame,50); - } - else if (v1 == 0xfa){ - rtw_IOL_append_DELAY_US_cmd(pxmit_frame,5); - } - else if (v1 == 0xf9){ - rtw_IOL_append_DELAY_US_cmd(pxmit_frame,1); - } - else{ - if (v1 == 0xa24) - pDM_Odm->RFCalibrateInfo.RegA24 = v2; - - rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord); - #ifdef CONFIG_IOL_IOREG_CFG_DBG - cmpdata[cmpdata_idx].addr = v1; - cmpdata[cmpdata_idx].value= v2; - cmpdata_idx++; - #endif - } - } - else - #endif //#ifdef CONFIG_IOL_IOREG_CFG - { - odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2); - } - READ_NEXT_PAIR(v1, v2, i); - } - - while (v2 != 0xDEAD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - - } - } - } -#ifdef CONFIG_IOL_IOREG_CFG - if(biol){ - //printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt); - if(rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) - { - #ifdef CONFIG_IOL_IOREG_CFG_DBG - printk("~~~ %s IOL_exec_cmds Success !!! \n",__FUNCTION__); - { - u4Byte idx; - u4Byte cdata; - printk(" %s data compare => array_len:%d \n",__FUNCTION__,cmpdata_idx); - printk("### %s data compared !!###\n",__FUNCTION__); - for(idx=0;idx< cmpdata_idx;idx++) - { - cdata = ODM_Read4Byte(pDM_Odm, cmpdata[idx].addr); - if(cdata != cmpdata[idx].value){ - printk(" addr:0x%04x, data:(0x%02x : 0x%02x) \n", - cmpdata[idx].addr,cmpdata[idx].value,cdata); - rst = HAL_STATUS_FAILURE; - } - } - printk("### %s data compared !!###\n",__FUNCTION__); - //if(rst == HAL_STATUS_FAILURE) - {//dump data from TX packet buffer - rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); - } - - } - #endif //CONFIG_IOL_IOREG_CFG_DBG - - } - else{ - rst = HAL_STATUS_FAILURE; - printk("~~~ IOL Config %s Failed !!! \n",__FUNCTION__); - #ifdef CONFIG_IOL_IOREG_CFG_DBG - { - //dump data from TX packet buffer - rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); - } - #endif //CONFIG_IOL_IOREG_CFG_DBG - } - } -#endif //#ifdef CONFIG_IOL_IOREG_CFG - return rst; -} -/****************************************************************************** -* PHY_REG_1T_ICUT.TXT -******************************************************************************/ - -u4Byte Array_MP_8188E_PHY_REG_1T_ICUT[] = { - 0x800, 0x80040000, - 0x804, 0x00000003, - 0x808, 0x0000FC00, - 0x80C, 0x0000000A, - 0x810, 0x10001331, - 0x814, 0x020C3D10, - 0x818, 0x02200385, - 0x81C, 0x00000000, - 0x820, 0x01000100, - 0x824, 0x00390204, - 0x828, 0x00000000, - 0x82C, 0x00000000, - 0x830, 0x00000000, - 0x834, 0x00000000, - 0x838, 0x00000000, - 0x83C, 0x00000000, - 0x840, 0x00010000, - 0x844, 0x00000000, - 0x848, 0x00000000, - 0x84C, 0x00000000, - 0x850, 0x00000000, - 0x854, 0x00000000, - 0x858, 0x569A11A9, - 0x85C, 0x01000014, - 0x860, 0x66F60110, - 0x864, 0x061F0649, - 0x868, 0x00000000, - 0x86C, 0x27272700, - 0x870, 0x07000760, - 0x874, 0x25004000, - 0x878, 0x00000808, - 0x87C, 0x00000000, - 0x880, 0xB0000C1C, - 0x884, 0x00000001, - 0x888, 0x00000000, - 0x88C, 0xCCC000C0, - 0x890, 0x00000800, - 0x894, 0xFFFFFFFE, - 0x898, 0x40302010, - 0x89C, 0x00706050, - 0x900, 0x00000000, - 0x904, 0x00000023, - 0x908, 0x00000000, - 0x90C, 0x81121111, - 0x910, 0x00000002, - 0x914, 0x00000201, - 0xA00, 0x00D047C8, - 0xA04, 0x80FF000C, - 0xA08, 0x8C838300, - 0xA0C, 0x2E7F120F, - 0xA10, 0x9500BB78, - 0xA14, 0x1114D028, - 0xA18, 0x00881117, - 0xA1C, 0x89140F00, - 0xA20, 0x1A1B0000, - 0xA24, 0x090E1317, - 0xA28, 0x00000204, - 0xA2C, 0x00D30000, - 0xA70, 0x101FBF00, - 0xA74, 0x00000007, - 0xA78, 0x00000900, - 0xA7C, 0x225B0606, - 0xA80, 0x218075B1, - 0xB2C, 0x80000000, - 0xC00, 0x48071D40, - 0xC04, 0x03A05611, - 0xC08, 0x000000E4, - 0xC0C, 0x6C6C6C6C, - 0xC10, 0x08800000, - 0xC14, 0x40000100, - 0xC18, 0x08800000, - 0xC1C, 0x40000100, - 0xC20, 0x00000000, - 0xC24, 0x00000000, - 0xC28, 0x00000000, - 0xC2C, 0x00000000, - 0xC30, 0x69E9AC47, - 0xC34, 0x469652AF, - 0xC38, 0x49795994, - 0xC3C, 0x0A97971C, - 0xC40, 0x1F7C403F, - 0xC44, 0x000100B7, - 0xC48, 0xEC020107, - 0xC4C, 0x007F037F, - 0xC50, 0x69553420, - 0xC54, 0x43BC0094, - 0xC58, 0x00013159, - 0xC5C, 0x00250492, - 0xC60, 0x00000000, - 0xC64, 0x7112848B, - 0xC68, 0x47C00BFF, - 0xC6C, 0x00000036, - 0xC70, 0x2C7F000D, - 0xC74, 0x028610DB, - 0xC78, 0x0000001F, - 0xC7C, 0x00B91612, - 0xC80, 0x390000E4, - 0xC84, 0x20F60000, - 0xC88, 0x40000100, - 0xC8C, 0x20200000, - 0xC90, 0x00091521, - 0xC94, 0x00000000, - 0xC98, 0x00121820, - 0xC9C, 0x00007F7F, - 0xCA0, 0x00000000, - 0xCA4, 0x000300A0, - 0xCA8, 0xFFFF0000, - 0xCAC, 0x00000000, - 0xCB0, 0x00000000, - 0xCB4, 0x00000000, - 0xCB8, 0x00000000, - 0xCBC, 0x28000000, - 0xCC0, 0x00000000, - 0xCC4, 0x00000000, - 0xCC8, 0x00000000, - 0xCCC, 0x00000000, - 0xCD0, 0x00000000, - 0xCD4, 0x00000000, - 0xCD8, 0x64B22427, - 0xCDC, 0x00766932, - 0xCE0, 0x00222222, - 0xCE4, 0x00000000, - 0xCE8, 0x37644302, - 0xCEC, 0x2F97D40C, - 0xD00, 0x00000740, - 0xD04, 0x00020401, - 0xD08, 0x0000907F, - 0xD0C, 0x20010201, - 0xD10, 0xA0633333, - 0xD14, 0x3333BC43, - 0xD18, 0x7A8F5B6F, - 0xD2C, 0xCC979975, - 0xD30, 0x00000000, - 0xD34, 0x80608000, - 0xD38, 0x00000000, - 0xD3C, 0x00127353, - 0xD40, 0x00000000, - 0xD44, 0x00000000, - 0xD48, 0x00000000, - 0xD4C, 0x00000000, - 0xD50, 0x6437140A, - 0xD54, 0x00000000, - 0xD58, 0x00000282, - 0xD5C, 0x30032064, - 0xD60, 0x4653DE68, - 0xD64, 0x04518A3C, - 0xD68, 0x00002101, - 0xD6C, 0x2A201C16, - 0xD70, 0x1812362E, - 0xD74, 0x322C2220, - 0xD78, 0x000E3C24, - 0xE00, 0x2D2D2D2D, - 0xE04, 0x2D2D2D2D, - 0xE08, 0x0390272D, - 0xE10, 0x2D2D2D2D, - 0xE14, 0x2D2D2D2D, - 0xE18, 0x2D2D2D2D, - 0xE1C, 0x2D2D2D2D, - 0xE28, 0x00000000, - 0xE30, 0x1000DC1F, - 0xE34, 0x10008C1F, - 0xE38, 0x02140102, - 0xE3C, 0x681604C2, - 0xE40, 0x01007C00, - 0xE44, 0x01004800, - 0xE48, 0xFB000000, - 0xE4C, 0x000028D1, - 0xE50, 0x1000DC1F, - 0xE54, 0x10008C1F, - 0xE58, 0x02140102, - 0xE5C, 0x28160D05, - 0xE60, 0x00000008, - 0xE68, 0x001B25A4, - 0xE6C, 0x00C00014, - 0xE70, 0x00C00014, - 0xE74, 0x01000014, - 0xE78, 0x01000014, - 0xE7C, 0x01000014, - 0xE80, 0x01000014, - 0xE84, 0x00C00014, - 0xE88, 0x01000014, - 0xE8C, 0x00C00014, - 0xED0, 0x00C00014, - 0xED4, 0x00C00014, - 0xED8, 0x00C00014, - 0xEDC, 0x00000014, - 0xEE0, 0x00000014, - 0xEEC, 0x01C00014, - 0xF14, 0x00000003, - 0xF4C, 0x00000000, - 0xF00, 0x00000300, - -}; - -void -ODM_ReadAndConfig_PHY_REG_1T_ICUT_8188E( - IN PDM_ODM_T pDM_Odm - ) -{ - #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) - - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = pDM_Odm->SupportPlatform; - u1Byte _interface = pDM_Odm->SupportInterface; - u1Byte board = pDM_Odm->BoardType; - u4Byte ArrayLen = sizeof(Array_MP_8188E_PHY_REG_1T_ICUT)/sizeof(u4Byte); - pu4Byte Array = Array_MP_8188E_PHY_REG_1T_ICUT; - - - hex += board; - hex += _interface << 8; - hex += platform << 16; - hex += 0xFF000000; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_8188E_PHY_REG_1T_ICUT, hex = 0x%X\n", hex)); - - for (i = 0; i < ArrayLen; i += 2 ) - { - u4Byte v1 = Array[i]; - u4Byte v2 = Array[i+1]; - - // This (offset, data) pair meets the condition. - if ( v1 < 0xCDCDCDCD ) - { - odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2); - continue; - } - else - { // This line is the start line of branch. - if ( !CheckCondition(Array[i], hex) ) - { // Discard the following (offset, data) pairs. - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - i -= 2; // prevent from for-loop += 2 - } - else // Configure matched pairs and skip to end of if-else. - { - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2); - READ_NEXT_PAIR(v1, v2, i); - } - - while (v2 != 0xDEAD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - - } - } - } - -} - - -/****************************************************************************** -* PHY_REG_PG.TXT -******************************************************************************/ - -u4Byte Array_PHY_REG_PG_8188E[] = { - 0, 0, 0, 0x00000e08, 0x0000ff00, 0x00004000, - 0, 0, 0, 0x0000086c, 0xffffff00, 0x34363800, - 0, 0, 0, 0x00000e00, 0xffffffff, 0x42444646, - 0, 0, 0, 0x00000e04, 0xffffffff, 0x30343840, - 0, 0, 0, 0x00000e10, 0xffffffff, 0x38404244, - 0, 0, 0, 0x00000e14, 0xffffffff, 0x26303436 - -}; - -void -ODM_ReadAndConfig_PHY_REG_PG_8188E( - IN PDM_ODM_T pDM_Odm - ) -{ - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = pDM_Odm->SupportPlatform; - u1Byte interfaceValue = pDM_Odm->SupportInterface; - u1Byte board = pDM_Odm->BoardType; - u4Byte ArrayLen = sizeof(Array_PHY_REG_PG_8188E)/sizeof(u4Byte); - pu4Byte Array = Array_PHY_REG_PG_8188E; - BOOLEAN biol = FALSE; - - hex += board; - hex += interfaceValue << 8; - hex += platform << 16; - hex += 0xFF000000; - for (i = 0; i < ArrayLen; i += 6 ) - { - u4Byte v1 = Array[i]; - u4Byte v2 = Array[i+1]; - u4Byte v3 = Array[i+2]; - u4Byte v4 = Array[i+3]; - u4Byte v5 = Array[i+4]; - u4Byte v6 = Array[i+5]; - - // this line is a line of pure_body - if ( v1 < 0xCDCDCDCD ) - { - - odm_ConfigBB_PHY_REG_PG_8188E(pDM_Odm, v1, v2, v3); - - continue; - } - else - { // this line is the start of branch - if ( !CheckCondition(Array[i], hex) ) - { // don't need the hw_body - i += 2; // skip the pair of expression - v1 = Array[i]; - v2 = Array[i+1]; - v3 = Array[i+2]; - while (v2 != 0xDEAD) - { - i += 3; - v1 = Array[i]; - v2 = Array[i+1]; - v3 = Array[i+1]; - } - } - } - } - -} - - - -#endif // end of HWIMG_SUPPORT - diff --git a/hal/OUTSRC/rtl8188e/HalHWImg8188E_MAC.c b/hal/OUTSRC/rtl8188e/HalHWImg8188E_MAC.c deleted file mode 100755 index 5483de9..0000000 --- a/hal/OUTSRC/rtl8188e/HalHWImg8188E_MAC.c +++ /dev/null @@ -1,502 +0,0 @@ -/****************************************************************************** -* -* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -* -* This program is free software; you can redistribute it and/or modify it -* under the terms of version 2 of the GNU General Public License as -* published by the Free Software Foundation. -* -* This program is distributed in the hope that it will be useful, but WITHOUT -* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -* more details. -* -* You should have received a copy of the GNU General Public License along with -* this program; if not, write to the Free Software Foundation, Inc., -* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -* -* -******************************************************************************/ - -#include "../odm_precomp.h" -#ifdef CONFIG_IOL_IOREG_CFG -#include -#endif -#if (RTL8188E_SUPPORT == 1) -static BOOLEAN -CheckCondition( - const u4Byte Condition, - const u4Byte Hex - ) -{ - u4Byte _board = (Hex & 0x000000FF); - u4Byte _interface = (Hex & 0x0000FF00) >> 8; - u4Byte _platform = (Hex & 0x00FF0000) >> 16; - u4Byte cond = Condition; - - if ( Condition == 0xCDCDCDCD ) - return TRUE; - - cond = Condition & 0x000000FF; - if ( (_board != cond) && (cond != 0xFF) ) - return FALSE; - - cond = Condition & 0x0000FF00; - cond = cond >> 8; - if ( ((_interface & cond) == 0) && (cond != 0x07) ) - return FALSE; - - cond = Condition & 0x00FF0000; - cond = cond >> 16; - if ( ((_platform & cond) == 0) && (cond != 0x0F) ) - return FALSE; - return TRUE; -} - - -/****************************************************************************** -* MAC_REG.TXT -******************************************************************************/ - -u4Byte Array_MAC_REG_8188E[] = { - 0x026, 0x00000041, - 0x027, 0x00000035, - 0xFF0F0718, 0xABCD, - 0x040, 0x0000000C, - 0xCDCDCDCD, 0xCDCD, - 0x040, 0x00000000, - 0xFF0F0718, 0xDEAD, - 0x428, 0x0000000A, - 0x429, 0x00000010, - 0x430, 0x00000000, - 0x431, 0x00000001, - 0x432, 0x00000002, - 0x433, 0x00000004, - 0x434, 0x00000005, - 0x435, 0x00000006, - 0x436, 0x00000007, - 0x437, 0x00000008, - 0x438, 0x00000000, - 0x439, 0x00000000, - 0x43A, 0x00000001, - 0x43B, 0x00000002, - 0x43C, 0x00000004, - 0x43D, 0x00000005, - 0x43E, 0x00000006, - 0x43F, 0x00000007, - 0x440, 0x0000005D, - 0x441, 0x00000001, - 0x442, 0x00000000, - 0x444, 0x00000015, - 0x445, 0x000000F0, - 0x446, 0x0000000F, - 0x447, 0x00000000, - 0x458, 0x00000041, - 0x459, 0x000000A8, - 0x45A, 0x00000072, - 0x45B, 0x000000B9, - 0x460, 0x00000066, - 0x461, 0x00000066, - 0x480, 0x00000008, - 0x4C8, 0x000000FF, - 0x4C9, 0x00000008, - 0x4CC, 0x000000FF, - 0x4CD, 0x000000FF, - 0x4CE, 0x00000001, - 0x4D3, 0x00000001, - 0x500, 0x00000026, - 0x501, 0x000000A2, - 0x502, 0x0000002F, - 0x503, 0x00000000, - 0x504, 0x00000028, - 0x505, 0x000000A3, - 0x506, 0x0000005E, - 0x507, 0x00000000, - 0x508, 0x0000002B, - 0x509, 0x000000A4, - 0x50A, 0x0000005E, - 0x50B, 0x00000000, - 0x50C, 0x0000004F, - 0x50D, 0x000000A4, - 0x50E, 0x00000000, - 0x50F, 0x00000000, - 0x512, 0x0000001C, - 0x514, 0x0000000A, - 0x516, 0x0000000A, - 0x525, 0x0000004F, - 0x550, 0x00000010, - 0x551, 0x00000010, - 0x559, 0x00000002, - 0x55D, 0x000000FF, - 0x605, 0x00000030, - 0x608, 0x0000000E, - 0x609, 0x0000002A, - 0x620, 0x000000FF, - 0x621, 0x000000FF, - 0x622, 0x000000FF, - 0x623, 0x000000FF, - 0x624, 0x000000FF, - 0x625, 0x000000FF, - 0x626, 0x000000FF, - 0x627, 0x000000FF, - 0x652, 0x00000020, - 0x63C, 0x0000000A, - 0x63D, 0x0000000A, - 0x63E, 0x0000000E, - 0x63F, 0x0000000E, - 0x640, 0x00000040, - 0x66E, 0x00000005, - 0x700, 0x00000021, - 0x701, 0x00000043, - 0x702, 0x00000065, - 0x703, 0x00000087, - 0x708, 0x00000021, - 0x709, 0x00000043, - 0x70A, 0x00000065, - 0x70B, 0x00000087, -}; - -HAL_STATUS -ODM_ReadAndConfig_MAC_REG_8188E( - IN PDM_ODM_T pDM_Odm - ) -{ - #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) - - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = pDM_Odm->SupportPlatform; - u1Byte interfaceValue = pDM_Odm->SupportInterface; - u1Byte board = pDM_Odm->BoardType; - u4Byte ArrayLen = sizeof(Array_MAC_REG_8188E)/sizeof(u4Byte); - pu4Byte Array = Array_MAC_REG_8188E; - BOOLEAN biol = FALSE; - -#ifdef CONFIG_IOL_IOREG_CFG - PADAPTER Adapter = pDM_Odm->Adapter; - struct xmit_frame *pxmit_frame; - u8 bndy_cnt = 1; - #ifdef CONFIG_IOL_IOREG_CFG_DBG - struct cmd_cmp cmpdata[ArrayLen]; - u4Byte cmpdata_idx=0; - #endif -#endif //CONFIG_IOL_IOREG_CFG - HAL_STATUS rst =HAL_STATUS_SUCCESS; - hex += board; - hex += interfaceValue << 8; - hex += platform << 16; - hex += 0xFF000000; - -#ifdef CONFIG_IOL_IOREG_CFG - biol = rtw_IOL_applied(Adapter); - - if(biol){ - if((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) - { - printk("rtw_IOL_accquire_xmit_frame failed\n"); - return HAL_STATUS_FAILURE; - } - } - -#endif //CONFIG_IOL_IOREG_CFG - - for (i = 0; i < ArrayLen; i += 2 ) - { - u4Byte v1 = Array[i]; - u4Byte v2 = Array[i+1]; - - // This (offset, data) pair meets the condition. - if ( v1 < 0xCDCDCDCD ) - { - #ifdef CONFIG_IOL_IOREG_CFG - - if(biol){ - - if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - rtw_IOL_append_WB_cmd(pxmit_frame,(u2Byte)v1, (u1Byte)v2,0xFF); - #ifdef CONFIG_IOL_IOREG_CFG_DBG - cmpdata[cmpdata_idx].addr = v1; - cmpdata[cmpdata_idx].value= v2; - cmpdata_idx++; - #endif - } - else - #endif //endif CONFIG_IOL_IOREG_CFG - { - odm_ConfigMAC_8188E(pDM_Odm, v1, (u1Byte)v2); - } - continue; - } - else - { // This line is the start line of branch. - if ( !CheckCondition(Array[i], hex) ) - { // Discard the following (offset, data) pairs. - READ_NEXT_PAIR(v1, v2, i); - while ( v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - i -= 2; // prevent from for-loop += 2 - } - else // Configure matched pairs and skip to end of if-else. - { - READ_NEXT_PAIR(v1, v2, i); - while ( v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - #ifdef CONFIG_IOL_IOREG_CFG - if(biol){ - if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - rtw_IOL_append_WB_cmd(pxmit_frame,(u2Byte)v1, (u1Byte)v2,0xFF); - #ifdef CONFIG_IOL_IOREG_CFG_DBG - cmpdata[cmpdata_idx].addr = v1; - cmpdata[cmpdata_idx].value= v2; - cmpdata_idx++; - #endif - } - else - #endif //#ifdef CONFIG_IOL_IOREG_CFG - { - odm_ConfigMAC_8188E(pDM_Odm, v1, (u1Byte)v2); - } - - READ_NEXT_PAIR(v1, v2, i); - } - - while (v2 != 0xDEAD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - - } - } - } - -#ifdef CONFIG_IOL_IOREG_CFG - if(biol){ - //printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt); - - if(rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) - { - #ifdef CONFIG_IOL_IOREG_CFG_DBG - printk("~~~ IOL Config MAC Success !!! \n"); - //compare writed data - { - u4Byte idx; - u1Byte cdata; - // HAL_STATUS_FAILURE; - printk(" MAC data compare => array_len:%d \n",cmpdata_idx); - for(idx=0;idx< cmpdata_idx;idx++) - { - cdata = ODM_Read1Byte(pDM_Odm, cmpdata[idx].addr); - if(cdata != cmpdata[idx].value){ - printk("### MAC data compared failed !! addr:0x%04x, data:(0x%02x : 0x%02x) ###\n", - cmpdata[idx].addr,cmpdata[idx].value,cdata); - //rst = HAL_STATUS_FAILURE; - } - } - - - //dump data from TX packet buffer - //if(rst == HAL_STATUS_FAILURE) - { - rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); - } - - } - #endif //CONFIG_IOL_IOREG_CFG_DBG - - } - else{ - printk("~~~ MAC IOL_exec_cmds Failed !!! \n"); - #ifdef CONFIG_IOL_IOREG_CFG_DBG - { - //dump data from TX packet buffer - rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); - } - #endif //CONFIG_IOL_IOREG_CFG_DBG - rst = HAL_STATUS_FAILURE; - } - - } -#endif //#ifdef CONFIG_IOL_IOREG_CFG - return rst; -} - -/****************************************************************************** -* MAC_REG_ICUT.TXT -******************************************************************************/ - -u4Byte Array_MP_8188E_MAC_REG_ICUT[] = { - 0x026, 0x00000041, - 0x027, 0x00000035, - 0x428, 0x0000000A, - 0x429, 0x00000010, - 0x430, 0x00000000, - 0x431, 0x00000001, - 0x432, 0x00000002, - 0x433, 0x00000004, - 0x434, 0x00000005, - 0x435, 0x00000006, - 0x436, 0x00000007, - 0x437, 0x00000008, - 0x438, 0x00000000, - 0x439, 0x00000000, - 0x43A, 0x00000001, - 0x43B, 0x00000002, - 0x43C, 0x00000004, - 0x43D, 0x00000005, - 0x43E, 0x00000006, - 0x43F, 0x00000007, - 0x440, 0x0000005D, - 0x441, 0x00000001, - 0x442, 0x00000000, - 0x444, 0x00000015, - 0x445, 0x000000F0, - 0x446, 0x0000000F, - 0x447, 0x00000000, - 0x458, 0x00000041, - 0x459, 0x000000A8, - 0x45A, 0x00000072, - 0x45B, 0x000000B9, - 0x460, 0x00000066, - 0x461, 0x00000066, - 0x480, 0x00000008, - 0x4C8, 0x000000FF, - 0x4C9, 0x00000008, - 0x4CC, 0x000000FF, - 0x4CD, 0x000000FF, - 0x4CE, 0x00000001, - 0x4D3, 0x00000001, - 0x500, 0x00000026, - 0x501, 0x000000A2, - 0x502, 0x0000002F, - 0x503, 0x00000000, - 0x504, 0x00000028, - 0x505, 0x000000A3, - 0x506, 0x0000005E, - 0x507, 0x00000000, - 0x508, 0x0000002B, - 0x509, 0x000000A4, - 0x50A, 0x0000005E, - 0x50B, 0x00000000, - 0x50C, 0x0000004F, - 0x50D, 0x000000A4, - 0x50E, 0x00000000, - 0x50F, 0x00000000, - 0x512, 0x0000001C, - 0x514, 0x0000000A, - 0x516, 0x0000000A, - 0x525, 0x0000004F, - 0x550, 0x00000010, - 0x551, 0x00000010, - 0x559, 0x00000002, - 0x55D, 0x000000FF, - 0x605, 0x00000030, - 0x608, 0x0000000E, - 0x609, 0x0000002A, - 0x620, 0x000000FF, - 0x621, 0x000000FF, - 0x622, 0x000000FF, - 0x623, 0x000000FF, - 0x624, 0x000000FF, - 0x625, 0x000000FF, - 0x626, 0x000000FF, - 0x627, 0x000000FF, - 0x652, 0x00000020, - 0x63C, 0x0000000A, - 0x63D, 0x0000000A, - 0x63E, 0x0000000E, - 0x63F, 0x0000000E, - 0x640, 0x00000040, - 0x66E, 0x00000005, - 0x700, 0x00000021, - 0x701, 0x00000043, - 0x702, 0x00000065, - 0x703, 0x00000087, - 0x708, 0x00000021, - 0x709, 0x00000043, - 0x70A, 0x00000065, - 0x70B, 0x00000087, - -}; - -void -ODM_ReadAndConfig_MAC_REG_ICUT_8188E( - IN PDM_ODM_T pDM_Odm - ) -{ - #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) - - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = pDM_Odm->SupportPlatform; - u1Byte _interface = pDM_Odm->SupportInterface; - u1Byte board = pDM_Odm->BoardType; - u4Byte ArrayLen = sizeof(Array_MP_8188E_MAC_REG_ICUT)/sizeof(u4Byte); - pu4Byte Array = Array_MP_8188E_MAC_REG_ICUT; - - - hex += board; - hex += _interface << 8; - hex += platform << 16; - hex += 0xFF000000; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_8188E_MAC_REG_ICUT, hex = 0x%X\n", hex)); - - for (i = 0; i < ArrayLen; i += 2 ) - { - u4Byte v1 = Array[i]; - u4Byte v2 = Array[i+1]; - - // This (offset, data) pair meets the condition. - if ( v1 < 0xCDCDCDCD ) - { - odm_ConfigMAC_8188E(pDM_Odm, v1, (u1Byte)v2); - continue; - } - else - { // This line is the start line of branch. - if ( !CheckCondition(Array[i], hex) ) - { // Discard the following (offset, data) pairs. - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - i -= 2; // prevent from for-loop += 2 - } - else // Configure matched pairs and skip to end of if-else. - { - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - odm_ConfigMAC_8188E(pDM_Odm, v1, (u1Byte)v2); - READ_NEXT_PAIR(v1, v2, i); - } - - while (v2 != 0xDEAD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - - } - } - } - -} - -#endif // end of HWIMG_SUPPORT - diff --git a/hal/OUTSRC/rtl8188e/HalHWImg8188E_RF.c b/hal/OUTSRC/rtl8188e/HalHWImg8188E_RF.c deleted file mode 100755 index 3941ec2..0000000 --- a/hal/OUTSRC/rtl8188e/HalHWImg8188E_RF.c +++ /dev/null @@ -1,569 +0,0 @@ -/****************************************************************************** -* -* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -* -* This program is free software; you can redistribute it and/or modify it -* under the terms of version 2 of the GNU General Public License as -* published by the Free Software Foundation. -* -* This program is distributed in the hope that it will be useful, but WITHOUT -* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -* more details. -* -* You should have received a copy of the GNU General Public License along with -* this program; if not, write to the Free Software Foundation, Inc., -* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -* -* -******************************************************************************/ - -#include "../odm_precomp.h" - -#ifdef CONFIG_IOL_IOREG_CFG -#include -#endif - -#if (RTL8188E_SUPPORT == 1) -static BOOLEAN -CheckCondition( - const u4Byte Condition, - const u4Byte Hex - ) -{ - u4Byte _board = (Hex & 0x000000FF); - u4Byte _interface = (Hex & 0x0000FF00) >> 8; - u4Byte _platform = (Hex & 0x00FF0000) >> 16; - u4Byte cond = Condition; - - if ( Condition == 0xCDCDCDCD ) - return TRUE; - - cond = Condition & 0x000000FF; - if ( (_board != cond) && (cond != 0xFF) ) - return FALSE; - - cond = Condition & 0x0000FF00; - cond = cond >> 8; - if ( ((_interface & cond) == 0) && (cond != 0x07) ) - return FALSE; - - cond = Condition & 0x00FF0000; - cond = cond >> 16; - if ( ((_platform & cond) == 0) && (cond != 0x0F) ) - return FALSE; - return TRUE; -} - - -/****************************************************************************** -* RadioA_1T.TXT -******************************************************************************/ - -u4Byte Array_RadioA_1T_8188E[] = { - 0x000, 0x00030000, - 0x008, 0x00084000, - 0x018, 0x00000407, - 0x019, 0x00000012, - 0x01E, 0x00080009, - 0x01F, 0x00000880, - 0x02F, 0x0001A060, - 0x03F, 0x00000000, - 0x042, 0x000060C0, - 0x057, 0x000D0000, - 0x058, 0x000BE180, - 0x067, 0x00001552, - 0x083, 0x00000000, - 0x0B0, 0x000FF8FC, - 0x0B1, 0x00054400, - 0x0B2, 0x000CCC19, - 0x0B4, 0x00043003, - 0x0B6, 0x0004953E, - 0x0B7, 0x0001C718, - 0x0B8, 0x000060FF, - 0x0B9, 0x00080001, - 0x0BA, 0x00040000, - 0x0BB, 0x00000400, - 0x0BF, 0x000C0000, - 0x0C2, 0x00002400, - 0x0C3, 0x00000009, - 0x0C4, 0x00040C91, - 0x0C5, 0x00099999, - 0x0C6, 0x000000A3, - 0x0C7, 0x00088820, - 0x0C8, 0x00076C06, - 0x0C9, 0x00000000, - 0x0CA, 0x00080000, - 0x0DF, 0x00000180, - 0x0EF, 0x000001A0, - 0x051, 0x0006B27D, - 0xFF0F0400, 0xABCD, - 0x052, 0x0007E4DD, - 0xCDCDCDCD, 0xCDCD, - 0x052, 0x0007E49D, - 0xFF0F0400, 0xDEAD, - 0x053, 0x00000073, - 0x056, 0x00051FF3, - 0x035, 0x00000086, - 0x035, 0x00000186, - 0x035, 0x00000286, - 0x036, 0x00001C25, - 0x036, 0x00009C25, - 0x036, 0x00011C25, - 0x036, 0x00019C25, - 0x0B6, 0x00048538, - 0x018, 0x00000C07, - 0x05A, 0x0004BD00, - 0x019, 0x000739D0, - 0xFF0F0718, 0xABCD, - 0x034, 0x0000A093, - 0x034, 0x0000908F, - 0x034, 0x0000808C, - 0x034, 0x0000704F, - 0x034, 0x0000604C, - 0x034, 0x00005049, - 0x034, 0x0000400C, - 0x034, 0x00003009, - 0x034, 0x00002006, - 0x034, 0x00001003, - 0x034, 0x00000000, - 0xCDCDCDCD, 0xCDCD, - 0x034, 0x0000ADF3, - 0x034, 0x00009DF0, - 0x034, 0x00008DED, - 0x034, 0x00007DEA, - 0x034, 0x00006DE7, - 0x034, 0x000054EE, - 0x034, 0x000044EB, - 0x034, 0x000034E8, - 0x034, 0x0000246B, - 0x034, 0x00001468, - 0x034, 0x0000006D, - 0xFF0F0718, 0xDEAD, - 0x000, 0x00030159, - 0x084, 0x00068200, - 0x086, 0x000000CE, - 0x087, 0x00048A00, - 0x08E, 0x00065540, - 0x08F, 0x00088000, - 0x0EF, 0x000020A0, - 0x03B, 0x000F02B0, - 0x03B, 0x000EF7B0, - 0x03B, 0x000D4FB0, - 0x03B, 0x000CF060, - 0x03B, 0x000B0090, - 0x03B, 0x000A0080, - 0x03B, 0x00090080, - 0x03B, 0x0008F780, - 0x03B, 0x000722B0, - 0x03B, 0x0006F7B0, - 0x03B, 0x00054FB0, - 0x03B, 0x0004F060, - 0x03B, 0x00030090, - 0x03B, 0x00020080, - 0x03B, 0x00010080, - 0x03B, 0x0000F780, - 0x0EF, 0x000000A0, - 0x000, 0x00010159, - 0x018, 0x0000F407, - 0xFFE, 0x00000000, - 0xFFE, 0x00000000, - 0x01F, 0x00080003, - 0xFFE, 0x00000000, - 0xFFE, 0x00000000, - 0x01E, 0x00000001, - 0x01F, 0x00080000, - 0x000, 0x00033E60, - -}; - -HAL_STATUS -ODM_ReadAndConfig_RadioA_1T_8188E( - IN PDM_ODM_T pDM_Odm - ) -{ - #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) - - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = pDM_Odm->SupportPlatform; - u1Byte interfaceValue = pDM_Odm->SupportInterface; - u1Byte board = pDM_Odm->BoardType; - u4Byte ArrayLen = sizeof(Array_RadioA_1T_8188E)/sizeof(u4Byte); - pu4Byte Array = Array_RadioA_1T_8188E; - BOOLEAN biol = FALSE; -#ifdef CONFIG_IOL_IOREG_CFG - PADAPTER Adapter = pDM_Odm->Adapter; - struct xmit_frame *pxmit_frame; - u8 bndy_cnt = 1; - #ifdef CONFIG_IOL_IOREG_CFG_DBG - struct cmd_cmp cmpdata[ArrayLen]; - u4Byte cmpdata_idx=0; - #endif -#endif//#ifdef CONFIG_IOL_IOREG_CFG - HAL_STATUS rst =HAL_STATUS_SUCCESS; - - hex += board; - hex += interfaceValue << 8; - hex += platform << 16; - hex += 0xFF000000; -#ifdef CONFIG_IOL_IOREG_CFG - biol = rtw_IOL_applied(Adapter); - - if(biol){ - if((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) - { - printk("rtw_IOL_accquire_xmit_frame failed\n"); - return HAL_STATUS_FAILURE; - } - } -#endif//#ifdef CONFIG_IOL_IOREG_CFG - - for (i = 0; i < ArrayLen; i += 2 ) - { - u4Byte v1 = Array[i]; - u4Byte v2 = Array[i+1]; - - // This (offset, data) pair meets the condition. - if ( v1 < 0xCDCDCDCD ) - { - #ifdef CONFIG_IOL_IOREG_CFG - if(biol){ - if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - - if(v1 == 0xffe) - { - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,50); - } - else if (v1 == 0xfd){ - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,5); - } - else if (v1 == 0xfc){ - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,1); - } - else if (v1 == 0xfb){ - rtw_IOL_append_DELAY_US_cmd(pxmit_frame,50); - } - else if (v1 == 0xfa){ - rtw_IOL_append_DELAY_US_cmd(pxmit_frame,5); - } - else if (v1 == 0xf9){ - rtw_IOL_append_DELAY_US_cmd(pxmit_frame,1); - } - else{ - rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A,(u2Byte)v1, v2,bRFRegOffsetMask) ; - #ifdef CONFIG_IOL_IOREG_CFG_DBG - cmpdata[cmpdata_idx].addr = v1; - cmpdata[cmpdata_idx].value= v2; - cmpdata_idx++; - #endif - } - - } - else - #endif //#ifdef CONFIG_IOL_IOREG_CFG - { - odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2); - } - continue; - } - else - { // This line is the start line of branch. - if ( !CheckCondition(Array[i], hex) ) - { // Discard the following (offset, data) pairs. - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - i -= 2; // prevent from for-loop += 2 - } - else // Configure matched pairs and skip to end of if-else. - { - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - #ifdef CONFIG_IOL_IOREG_CFG - if(biol){ - if(rtw_IOL_cmd_boundary_handle(pxmit_frame)) - bndy_cnt++; - - if(v1 == 0xffe) - { - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,50); - } - else if (v1 == 0xfd){ - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,5); - } - else if (v1 == 0xfc){ - rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,1); - } - else if (v1 == 0xfb){ - rtw_IOL_append_DELAY_US_cmd(pxmit_frame,50); - } - else if (v1 == 0xfa){ - rtw_IOL_append_DELAY_US_cmd(pxmit_frame,5); - } - else if (v1 == 0xf9){ - rtw_IOL_append_DELAY_US_cmd(pxmit_frame,1); - } - else{ - rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A,(u2Byte)v1, v2,bRFRegOffsetMask) ; - #ifdef CONFIG_IOL_IOREG_CFG_DBG - cmpdata[cmpdata_idx].addr = v1; - cmpdata[cmpdata_idx].value= v2; - cmpdata_idx++; - #endif - - } - - } - else - #endif //#ifdef CONFIG_IOL_IOREG_CFG - { - odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2); - } - READ_NEXT_PAIR(v1, v2, i); - } - - while (v2 != 0xDEAD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - - } - } - } -#ifdef CONFIG_IOL_IOREG_CFG - if(biol){ - //printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt); - if(rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) - { - #ifdef CONFIG_IOL_IOREG_CFG_DBG - printk("~~~ %s Success !!! \n",__FUNCTION__); - { - u4Byte idx; - u4Byte cdata; - printk(" %s data compare => array_len:%d \n",__FUNCTION__,cmpdata_idx); - printk("### %s data compared !!###\n",__FUNCTION__); - for(idx=0;idx< cmpdata_idx;idx++) - { - cdata = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A,cmpdata[idx].addr,bRFRegOffsetMask); - if(cdata != cmpdata[idx].value){ - printk("addr:0x%04x, data:(0x%02x : 0x%02x) \n", - cmpdata[idx].addr,cmpdata[idx].value,cdata); - rst = HAL_STATUS_FAILURE; - } - } - printk("### %s data compared !!###\n",__FUNCTION__); - //if(rst == HAL_STATUS_FAILURE) - {//dump data from TX packet buffer - rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); - } - } - #endif //CONFIG_IOL_IOREG_CFG_DBG - - } - else{ - rst = HAL_STATUS_FAILURE; - printk("~~~ IOL Config %s Failed !!! \n",__FUNCTION__); - #ifdef CONFIG_IOL_IOREG_CFG_DBG - { - //dump data from TX packet buffer - rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32); - } - #endif //CONFIG_IOL_IOREG_CFG_DBG - } - } - - -#endif //#ifdef CONFIG_IOL_IOREG_CFG - return rst; -} -/****************************************************************************** -* RadioA_1T_ICUT.TXT -******************************************************************************/ - -u4Byte Array_MP_8188E_RadioA_1T_ICUT[] = { - 0x000, 0x00030000, - 0x008, 0x00084000, - 0x018, 0x00000407, - 0x019, 0x00000012, - 0x01E, 0x00080009, - 0x01F, 0x00000880, - 0x02F, 0x0001A060, - 0x03F, 0x00000000, - 0x042, 0x000060C0, - 0x057, 0x000D0000, - 0x058, 0x000BE180, - 0x067, 0x00001552, - 0x083, 0x00000000, - 0x0B0, 0x000FF8FC, - 0x0B1, 0x00054400, - 0x0B2, 0x000CCC19, - 0x0B4, 0x00043003, - 0x0B6, 0x0004953E, - 0x0B7, 0x0001C718, - 0x0B8, 0x000060FF, - 0x0B9, 0x00080001, - 0x0BA, 0x00040000, - 0x0BB, 0x00000400, - 0x0BF, 0x000C0000, - 0x0C2, 0x00002400, - 0x0C3, 0x00000009, - 0x0C4, 0x00040C91, - 0x0C5, 0x00099999, - 0x0C6, 0x000000A3, - 0x0C7, 0x00088820, - 0x0C8, 0x00076C06, - 0x0C9, 0x00000000, - 0x0CA, 0x00080000, - 0x0DF, 0x00000180, - 0x0EF, 0x000001A0, - 0x051, 0x0006B27D, - 0xFF0F0400, 0xABCD, - 0x052, 0x0007E4DD, - 0xCDCDCDCD, 0xCDCD, - 0x052, 0x0007E49D, - 0xFF0F0400, 0xDEAD, - 0x053, 0x00000073, - 0x056, 0x00051FF3, - 0x035, 0x00000086, - 0x035, 0x00000186, - 0x035, 0x00000286, - 0x036, 0x00001C25, - 0x036, 0x00009C25, - 0x036, 0x00011C25, - 0x036, 0x00019C25, - 0x0B6, 0x00048538, - 0x018, 0x00000C07, - 0x05A, 0x0004BD00, - 0x019, 0x000739D0, - 0x034, 0x0000ADF3, - 0x034, 0x00009DF0, - 0x034, 0x00008DED, - 0x034, 0x00007DEA, - 0x034, 0x00006DE7, - 0x034, 0x000054EE, - 0x034, 0x000044EB, - 0x034, 0x000034E8, - 0x034, 0x0000246B, - 0x034, 0x00001468, - 0x034, 0x0000006D, - 0x000, 0x00030159, - 0x084, 0x00068200, - 0x086, 0x000000CE, - 0x087, 0x00048A00, - 0x08E, 0x00065540, - 0x08F, 0x00088000, - 0x0EF, 0x000020A0, - 0x03B, 0x000F02B0, - 0x03B, 0x000EF7B0, - 0x03B, 0x000D4FB0, - 0x03B, 0x000CF060, - 0x03B, 0x000B0090, - 0x03B, 0x000A0080, - 0x03B, 0x00090080, - 0x03B, 0x0008F780, - 0x03B, 0x000722B0, - 0x03B, 0x0006F7B0, - 0x03B, 0x00054FB0, - 0x03B, 0x0004F060, - 0x03B, 0x00030090, - 0x03B, 0x00020080, - 0x03B, 0x00010080, - 0x03B, 0x0000F780, - 0x0EF, 0x000000A0, - 0x000, 0x00010159, - 0x018, 0x0000F407, - 0xFFE, 0x00000000, - 0xFFE, 0x00000000, - 0x01F, 0x00080003, - 0xFFE, 0x00000000, - 0xFFE, 0x00000000, - 0x01E, 0x00000001, - 0x01F, 0x00080000, - 0x000, 0x00033E60, - -}; - -void -ODM_ReadAndConfig_RadioA_1T_ICUT_8188E( - IN PDM_ODM_T pDM_Odm - ) -{ - #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) - - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = pDM_Odm->SupportPlatform; - u1Byte _interface = pDM_Odm->SupportInterface; - u1Byte board = pDM_Odm->BoardType; - u4Byte ArrayLen = sizeof(Array_MP_8188E_RadioA_1T_ICUT)/sizeof(u4Byte); - pu4Byte Array = Array_MP_8188E_RadioA_1T_ICUT; - - - hex += board; - hex += _interface << 8; - hex += platform << 16; - hex += 0xFF000000; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_8188E_RadioA_1T_ICUT, hex = 0x%X\n", hex)); - - for (i = 0; i < ArrayLen; i += 2 ) - { - u4Byte v1 = Array[i]; - u4Byte v2 = Array[i+1]; - - // This (offset, data) pair meets the condition. - if ( v1 < 0xCDCDCDCD ) - { - odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2); - continue; - } - else - { // This line is the start line of branch. - if ( !CheckCondition(Array[i], hex) ) - { // Discard the following (offset, data) pairs. - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - i -= 2; // prevent from for-loop += 2 - } - else // Configure matched pairs and skip to end of if-else. - { - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2); - READ_NEXT_PAIR(v1, v2, i); - } - - while (v2 != 0xDEAD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - - } - } - } - -} - - -#endif // end of HWIMG_SUPPORT - diff --git a/hal/OUTSRC/rtl8188e/HalPhyRf_8188e.c b/hal/OUTSRC/rtl8188e/HalPhyRf_8188e.c deleted file mode 100755 index 8b8faf1..0000000 --- a/hal/OUTSRC/rtl8188e/HalPhyRf_8188e.c +++ /dev/null @@ -1,3045 +0,0 @@ - -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -#include "../odm_precomp.h" - - - -/*---------------------------Define Local Constant---------------------------*/ -// 2010/04/25 MH Define the max tx power tracking tx agc power. -#define ODM_TXPWRTRACK_MAX_IDX_88E 6 - -#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \ - do {\ - for(_offset = 0; _offset < _size; _offset++)\ - {\ - if(_deltaThermal < thermalThreshold[_direction][_offset])\ - {\ - if(_offset != 0)\ - _offset--;\ - break;\ - }\ - } \ - if(_offset >= _size)\ - _offset = _size-1;\ - } while(0) - -//3============================================================ -//3 Tx Power Tracking -//3============================================================ -void setIqkMatrix( - PDM_ODM_T pDM_Odm, - u1Byte OFDM_index, - u1Byte RFPath, - s4Byte IqkResult_X, - s4Byte IqkResult_Y - ) -{ - s4Byte ele_A=0, ele_D, ele_C=0, TempCCk, value32; - - //printk("%s==> OFDM_index:%d \n",__FUNCTION__,OFDM_index); - - //if(OFDM_index> OFDM_TABLE_SIZE_92D) - //{ - //printk("%s==> OFDM_index> 43\n",__FUNCTION__); - //} - ele_D = (OFDMSwingTable[OFDM_index] & 0xFFC00000)>>22; - - //new element A = element D x X - if((IqkResult_X != 0) && (*(pDM_Odm->pBandType) == ODM_BAND_2_4G)) - { - if ((IqkResult_X & 0x00000200) != 0) //consider minus - IqkResult_X = IqkResult_X | 0xFFFFFC00; - ele_A = ((IqkResult_X * ele_D)>>8)&0x000003FF; - - //new element C = element D x Y - if ((IqkResult_Y & 0x00000200) != 0) - IqkResult_Y = IqkResult_Y | 0xFFFFFC00; - ele_C = ((IqkResult_Y * ele_D)>>8)&0x000003FF; - - if (RFPath == RF_PATH_A) - switch (RFPath) - { - case RF_PATH_A: - //wirte new elements A, C, D to regC80 and regC94, element B is always 0 - value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A; - ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, value32); - - value32 = (ele_C&0x000003C0)>>6; - ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, value32); - - value32 = ((IqkResult_X * ele_D)>>7)&0x01; - ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT24, value32); - break; - case RF_PATH_B: - //wirte new elements A, C, D to regC88 and regC9C, element B is always 0 - value32=(ele_D<<22)|((ele_C&0x3F)<<16) |ele_A; - ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); - - value32 = (ele_C&0x000003C0)>>6; - ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, bMaskH4Bits, value32); - - value32 = ((IqkResult_X * ele_D)>>7)&0x01; - ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT28, value32); - - break; - default: - break; - } - } - else - { - switch (RFPath) - { - case RF_PATH_A: - ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[OFDM_index]); - ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); - ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT24, 0x00); - break; - - case RF_PATH_B: - ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[OFDM_index]); - ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); - ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT28, 0x00); - break; - - default: - break; - } - } - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xeb4 = 0x%x 0xebc = 0x%x\n", - (u4Byte)IqkResult_X, (u4Byte)IqkResult_Y, (u4Byte)ele_A, (u4Byte)ele_C, (u4Byte)ele_D, (u4Byte)IqkResult_X, (u4Byte)IqkResult_Y)); -} - - -void doIQK( - PDM_ODM_T pDM_Odm, - u1Byte DeltaThermalIndex, - u1Byte ThermalValue, - u1Byte Threshold - ) -{ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -#endif - - ODM_ResetIQKResult(pDM_Odm); - -#if(DM_ODM_SUPPORT_TYPE & ODM_MP) -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) -#if USE_WORKITEM - PlatformAcquireMutex(&pHalData->mxChnlBwControl); -#else - PlatformAcquireSpinLock(Adapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); -#endif -#elif((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) - PlatformAcquireMutex(&pHalData->mxChnlBwControl); -#endif -#endif - - - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK= ThermalValue; - PHY_IQCalibrate_8188E(Adapter, FALSE); - - -#if(DM_ODM_SUPPORT_TYPE & ODM_MP) -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) -#if USE_WORKITEM - PlatformReleaseMutex(&pHalData->mxChnlBwControl); -#else - PlatformReleaseSpinLock(Adapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); -#endif -#elif((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) - PlatformReleaseMutex(&pHalData->mxChnlBwControl); -#endif -#endif -} - -/*----------------------------------------------------------------------------- - * Function: ODM_TxPwrTrackAdjust88E() - * - * Overview: 88E we can not write 0xc80/c94/c4c/ 0xa2x. Instead of write TX agc. - * No matter OFDM & CCK use the same method. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 04/23/2012 MHC Create Version 0. - * 04/23/2012 MHC Adjust TX agc directly not throughput BB digital. - * - *---------------------------------------------------------------------------*/ -VOID -ODM_TxPwrTrackAdjust88E( - PDM_ODM_T pDM_Odm, - u1Byte Type, // 0 = OFDM, 1 = CCK - pu1Byte pDirection, // 1 = +(increase) 2 = -(decrease) - pu4Byte pOutWriteVal // Tx tracking CCK/OFDM BB swing index adjust - ) -{ - u1Byte pwr_value = 0; - // - // Tx power tracking BB swing table. - // The base index = 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB - // - if (Type == 0) // For OFDM afjust - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, - ("BbSwingIdxOfdm = %d BbSwingFlagOfdm=%d\n", pDM_Odm->BbSwingIdxOfdm, pDM_Odm->BbSwingFlagOfdm)); - - //printk("BbSwingIdxOfdm = %d BbSwingFlagOfdm=%d\n", pDM_Odm->BbSwingIdxOfdm, pDM_Odm->BbSwingFlagOfdm); - if (pDM_Odm->BbSwingIdxOfdm <= pDM_Odm->BbSwingIdxOfdmBase) - { - *pDirection = 1; - pwr_value = (pDM_Odm->BbSwingIdxOfdmBase - pDM_Odm->BbSwingIdxOfdm); - } - else - { - *pDirection = 2; - pwr_value = (pDM_Odm->BbSwingIdxOfdm - pDM_Odm->BbSwingIdxOfdmBase); - } - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, - ("BbSwingIdxOfdm = %d BbSwingIdxOfdmBase=%d\n", pDM_Odm->BbSwingIdxOfdm, pDM_Odm->BbSwingIdxOfdmBase)); - //printk("BbSwingIdxOfdm = %d BbSwingIdxOfdmBase=%d pwr_value=%d\n", pDM_Odm->BbSwingIdxOfdm, pDM_Odm->BbSwingIdxOfdmBase,pwr_value); - - } - else if (Type == 1) // For CCK adjust. - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, - ("pDM_Odm->BbSwingIdxCck = %d pDM_Odm->BbSwingIdxCckBase = %d\n", pDM_Odm->BbSwingIdxCck, pDM_Odm->BbSwingIdxCckBase)); - - //printk("pDM_Odm->BbSwingIdxCck = %d pDM_Odm->BbSwingIdxCckBase = %d\n", pDM_Odm->BbSwingIdxCck, pDM_Odm->BbSwingIdxCckBase); - if (pDM_Odm->BbSwingIdxCck <= pDM_Odm->BbSwingIdxCckBase) - { - *pDirection = 1; - pwr_value = (pDM_Odm->BbSwingIdxCckBase - pDM_Odm->BbSwingIdxCck); - } - else - { - *pDirection = 2; - pwr_value = (pDM_Odm->BbSwingIdxCck - pDM_Odm->BbSwingIdxCckBase); - } - //printk("pDM_Odm->BbSwingIdxCck = %d pDM_Odm->BbSwingIdxCckBase = %d pwr_value:%d\n", pDM_Odm->BbSwingIdxCck, pDM_Odm->BbSwingIdxCckBase,pwr_value); - } - - // - // 2012/04/25 MH According to Ed/Luke.Lees estimate for EVM the max tx power tracking - // need to be less than 6 power index for 88E. - // - if (pwr_value >= ODM_TXPWRTRACK_MAX_IDX_88E && *pDirection == 1) - pwr_value = ODM_TXPWRTRACK_MAX_IDX_88E; - - *pOutWriteVal = pwr_value | (pwr_value<<8) | (pwr_value<<16) | (pwr_value<<24); - -} // ODM_TxPwrTrackAdjust88E - - -/*----------------------------------------------------------------------------- - * Function: odm_TxPwrTrackSetPwr88E() - * - * Overview: 88E change all channel tx power accordign to flag. - * OFDM & CCK are all different. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 04/23/2012 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -VOID -odm_TxPwrTrackSetPwr88E( - PDM_ODM_T pDM_Odm, - PWRTRACK_METHOD Method, - u1Byte RFPath, - u1Byte ChannelMappedIndex - ) -{ - if (Method == TXAGC) - { - u1Byte cckPowerLevel[MAX_TX_COUNT], ofdmPowerLevel[MAX_TX_COUNT]; - u1Byte BW20PowerLevel[MAX_TX_COUNT], BW40PowerLevel[MAX_TX_COUNT]; - u1Byte rf = 0; - u4Byte pwr = 0, TxAGC = 0; - PADAPTER Adapter = pDM_Odm->Adapter; - //printk("odm_TxPwrTrackSetPwr88E CH=%d, modify TXAGC \n", *(pDM_Odm->pChannel)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("odm_TxPwrTrackSetPwr88E CH=%d\n", *(pDM_Odm->pChannel))); -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE )) - - //#if (MP_DRIVER != 1) - if ( *(pDM_Odm->mp_mode) != 1){ - PHY_SetTxPowerLevel8188E(pDM_Odm->Adapter, *pDM_Odm->pChannel); - } - else - //#else - { - pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); - pwr += (pDM_Odm->BbSwingIdxCck - pDM_Odm->BbSwingIdxCckBase); - PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pwr); - TxAGC = (pwr<<16)|(pwr<<8)|(pwr); - PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, TxAGC); - DBG_871X("ODM_TxPwrTrackSetPwr88E: CCK Tx-rf(A) Power = 0x%x\n", TxAGC); - - pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); - pwr += (pDM_Odm->BbSwingIdxOfdm - pDM_Odm->BbSwingIdxOfdmBase); - TxAGC |= ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); - PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); - PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); - PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); - PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); - PHY_SetBBReg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); - PHY_SetBBReg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); - DBG_871X("ODM_TxPwrTrackSetPwr88E: OFDM Tx-rf(A) Power = 0x%x\n", TxAGC); - } - //#endif - -#endif -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - PHY_RF6052SetCCKTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel)); - PHY_RF6052SetOFDMTxPower(pDM_Odm->priv, *(pDM_Odm->pChannel)); -#endif - - } - else if (Method == BBSWING) - { - //printk("odm_TxPwrTrackSetPwr88E CH=%d, modify BBSWING BbSwingIdxCck:%d \n", *(pDM_Odm->pChannel),pDM_Odm->BbSwingIdxCck); - // Adjust BB swing by CCK filter coefficient - //if(!pDM_Odm->RFCalibrateInfo.bCCKinCH14) - if(* (pDM_Odm->pChannel) < 14) - { - ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][0]); - ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][1]); - ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][2]); - ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][3]); - ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][4]); - ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][5]); - ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][6]); - ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch1_Ch13[pDM_Odm->BbSwingIdxCck][7]); - } - else - { - ODM_Write1Byte(pDM_Odm, 0xa22, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][0]); - ODM_Write1Byte(pDM_Odm, 0xa23, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][1]); - ODM_Write1Byte(pDM_Odm, 0xa24, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][2]); - ODM_Write1Byte(pDM_Odm, 0xa25, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][3]); - ODM_Write1Byte(pDM_Odm, 0xa26, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][4]); - ODM_Write1Byte(pDM_Odm, 0xa27, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][5]); - ODM_Write1Byte(pDM_Odm, 0xa28, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][6]); - ODM_Write1Byte(pDM_Odm, 0xa29, CCKSwingTable_Ch14[pDM_Odm->BbSwingIdxCck][7]); - } - - // Adjust BB swing by OFDM IQ matrix - if (RFPath == RF_PATH_A) - { - setIqkMatrix(pDM_Odm, pDM_Odm->BbSwingIdxOfdm, RF_PATH_A, - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); - } - /* - else if (RFPath == RF_PATH_B) - { - setIqkMatrix(pDM_Odm, pDM_Odm->BbSwingIdxOfdm[RF_PATH_B], RF_PATH_B, - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][4], - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][5]); - }*/ - } - else - { - return; - } -} // odm_TxPwrTrackSetPwr88E - - -VOID -odm_TXPowerTrackingCallback_ThermalMeter_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm -#else - IN PADAPTER Adapter -#endif - ) -{ - -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; -#endif - - u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, offset; - u1Byte ThermalValue_AVG_count = 0; - u4Byte ThermalValue_AVG = 0; - s4Byte ele_A=0, ele_D, TempCCk, X, value32; - s4Byte Y, ele_C=0; - s1Byte OFDM_index[2], CCK_index=0, OFDM_index_old[2]={0,0}, CCK_index_old=0, index; - s1Byte deltaPowerIndex = 0; - u4Byte i = 0, j = 0; - BOOLEAN is2T = FALSE; - BOOLEAN bInteralPA = FALSE; - - u1Byte OFDM_min_index = 6, rf = (is2T) ? 2 : 1; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur - u1Byte Indexforchannel = 0;/*GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/ - enum _POWER_DEC_INC { POWER_DEC, POWER_INC }; - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - struct dm_priv *pdmpriv = &pHalData->dmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif - - //4 0.1 The following TWO tables decide the final index of OFDM/CCK swing table. - s1Byte deltaSwingTableIdx[2][index_mapping_NUM_88E] = { - // {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} - {0,0,2,3,4,4,5,6,7,7,8,9,10,10,11}, {0,0,-1,-2,-3,-4,-4,-4,-4,-5,-7,-8,-9,-9,-10} - }; - u1Byte thermalThreshold[2][index_mapping_NUM_88E]={ - // {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} - {0,2,4,6,8,10,12,14,16,18,20,22,24,26,27}, {0,2,4,6,8,10,12,14,16,18,20,22,25,25,25} - }; - - //4 0.1 Initilization ( 7 steps in total ) - - pDM_Odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; //cosa add for debug - pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = TRUE; - -#if (MP_DRIVER == 1) -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = pHalData->TxPowerTrackControl; // We should keep updating the control variable according to HalData. -#endif - // RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. - pDM_Odm->RFCalibrateInfo.RegA24 = 0x090e1317; -#endif - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("===>odm_TXPowerTrackingCallback_ThermalMeter_8188E, pDM_Odm->BbSwingIdxCckBase: %d, pDM_Odm->BbSwingIdxOfdmBase: %d \n", pDM_Odm->BbSwingIdxCckBase, pDM_Odm->BbSwingIdxOfdmBase)); - ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_T_METER_88E, 0xfc00); //0x42: RF Reg[15:10] 88E - if( ! ThermalValue || ! pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) - return; - - //4 3. Initialize ThermalValues of RFCalibrateInfo - - if( ! pDM_Odm->RFCalibrateInfo.ThermalValue) - { - pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = ThermalValue; - } - - if(pDM_Odm->RFCalibrateInfo.bReloadtxpowerindex) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("reload ofdm index for band switch\n")); - } - - //4 4. Calculate average thermal meter - - pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index] = ThermalValue; - pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index++; - if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index == AVG_THERMAL_NUM_88E) - pDM_Odm->RFCalibrateInfo.ThermalValue_AVG_index = 0; - - for(i = 0; i < AVG_THERMAL_NUM_88E; i++) - { - if(pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]) - { - ThermalValue_AVG += pDM_Odm->RFCalibrateInfo.ThermalValue_AVG[i]; - ThermalValue_AVG_count++; - } - } - - if(ThermalValue_AVG_count) - { - ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("AVG Thermal Meter = 0x%x \n", ThermalValue)); - } - - //4 5. Calculate delta, delta_LCK, delta_IQK. - - delta = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue):(pDM_Odm->RFCalibrateInfo.ThermalValue - ThermalValue); - delta_LCK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_LCK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_LCK):(pDM_Odm->RFCalibrateInfo.ThermalValue_LCK - ThermalValue); - delta_IQK = (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue_IQK)?(ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK):(pDM_Odm->RFCalibrateInfo.ThermalValue_IQK - ThermalValue); - - //4 6. If necessary, do LCK. - - //if((delta_LCK > pHalData->Delta_LCK) && (pHalData->Delta_LCK != 0)) - if ((delta_LCK >= 8)) // Delta temperature is equal to or larger than 20 centigrade. - { - pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - PHY_LCCalibrate_8188E(Adapter); -#else - PHY_LCCalibrate_8188E(pDM_Odm); -#endif - } - - //3 7. If necessary, move the index of swing table to adjust Tx power. - - if (delta > 0 && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) - { -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) - delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); -#else - delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue); -#endif - - - //4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset - -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) - if(ThermalValue > pHalData->EEPROMThermalMeter) { -#else - if(ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) { -#endif - CALCULATE_SWINGTALBE_OFFSET(offset, POWER_INC, index_mapping_NUM_88E, delta); - pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex; - pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = -1 * deltaSwingTableIdx[POWER_INC][offset]; - - } else { - - CALCULATE_SWINGTALBE_OFFSET(offset, POWER_DEC, index_mapping_NUM_88E, delta); - pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex; - pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = -1 * deltaSwingTableIdx[POWER_DEC][offset]; - } - - if (pDM_Odm->RFCalibrateInfo.DeltaPowerIndex == pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast) - pDM_Odm->RFCalibrateInfo.PowerIndexOffset = 0; - else - pDM_Odm->RFCalibrateInfo.PowerIndexOffset = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex - pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast; - - for(i = 0; i < rf; i++) - pDM_Odm->RFCalibrateInfo.OFDM_index[i] = pDM_Odm->BbSwingIdxOfdmBase + pDM_Odm->RFCalibrateInfo.PowerIndexOffset; - pDM_Odm->RFCalibrateInfo.CCK_index = pDM_Odm->BbSwingIdxCckBase + pDM_Odm->RFCalibrateInfo.PowerIndexOffset; - - pDM_Odm->BbSwingIdxCck = pDM_Odm->RFCalibrateInfo.CCK_index; - pDM_Odm->BbSwingIdxOfdm = pDM_Odm->RFCalibrateInfo.OFDM_index[RF_PATH_A]; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pDM_Odm->BbSwingIdxCck, pDM_Odm->BbSwingIdxCckBase, pDM_Odm->RFCalibrateInfo.PowerIndexOffset)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("The 'OFDM' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pDM_Odm->BbSwingIdxOfdm, pDM_Odm->BbSwingIdxOfdmBase, pDM_Odm->RFCalibrateInfo.PowerIndexOffset)); - - //4 7.1 Handle boundary conditions of index. - - - for(i = 0; i < rf; i++) - { - if(pDM_Odm->RFCalibrateInfo.OFDM_index[i] > OFDM_TABLE_SIZE_92D-1) - { - pDM_Odm->RFCalibrateInfo.OFDM_index[i] = OFDM_TABLE_SIZE_92D-1; - } - else if (pDM_Odm->RFCalibrateInfo.OFDM_index[i] < OFDM_min_index) - { - pDM_Odm->RFCalibrateInfo.OFDM_index[i] = OFDM_min_index; - } - } - - if(pDM_Odm->RFCalibrateInfo.CCK_index > CCK_TABLE_SIZE-1) - pDM_Odm->RFCalibrateInfo.CCK_index = CCK_TABLE_SIZE-1; - else if (pDM_Odm->RFCalibrateInfo.CCK_index < 0) - pDM_Odm->RFCalibrateInfo.CCK_index = 0; - } - else - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, - ("The thermal meter is unchanged or TxPowerTracking OFF: ThermalValue: %d , pDM_Odm->RFCalibrateInfo.ThermalValue: %d)\n", ThermalValue, pDM_Odm->RFCalibrateInfo.ThermalValue)); - pDM_Odm->RFCalibrateInfo.PowerIndexOffset = 0; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, - ("TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n", pDM_Odm->RFCalibrateInfo.CCK_index, pDM_Odm->BbSwingIdxCckBase)); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, - ("TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index: %d\n", pDM_Odm->RFCalibrateInfo.OFDM_index[RF_PATH_A], pDM_Odm->BbSwingIdxOfdmBase)); - - if (pDM_Odm->RFCalibrateInfo.PowerIndexOffset != 0 && pDM_Odm->RFCalibrateInfo.TxPowerTrackControl) - { - //4 7.2 Configure the Swing Table to adjust Tx Power. - - pDM_Odm->RFCalibrateInfo.bTxPowerChanged = TRUE; // Always TRUE after Tx Power is adjusted by power tracking. - // - // 2012/04/23 MH According to Luke's suggestion, we can not write BB digital - // to increase TX power. Otherwise, EVM will be bad. - // - // 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. - if (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, - ("Temperature Increasing: delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", - pDM_Odm->RFCalibrateInfo.PowerIndexOffset, delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); - } - else if (ThermalValue < pDM_Odm->RFCalibrateInfo.ThermalValue)// Low temperature - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, - ("Temperature Decreasing: delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", - pDM_Odm->RFCalibrateInfo.PowerIndexOffset, delta, ThermalValue, pHalData->EEPROMThermalMeter, pDM_Odm->RFCalibrateInfo.ThermalValue)); - } - - if (ThermalValue > pHalData->EEPROMThermalMeter) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) hugher than PG value(%d), increases the power by TxAGC\n", ThermalValue, pHalData->EEPROMThermalMeter)); - odm_TxPwrTrackSetPwr88E(pDM_Odm, TXAGC, 0, 0); - } - else - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Temperature(%d) lower than PG value(%d), increases the power by TxAGC\n", ThermalValue, pHalData->EEPROMThermalMeter)); - odm_TxPwrTrackSetPwr88E(pDM_Odm, BBSWING, RF_PATH_A, Indexforchannel); - //if(is2T) - // odm_TxPwrTrackSetPwr88E(pDM_Odm, BBSWING, RF_PATH_B, Indexforchannel); - } - - pDM_Odm->BbSwingIdxCckBase = pDM_Odm->BbSwingIdxCck; - pDM_Odm->BbSwingIdxOfdmBase = pDM_Odm->BbSwingIdxOfdm; - pDM_Odm->RFCalibrateInfo.ThermalValue = ThermalValue; - - } - -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - // if((delta_IQK > pHalData->Delta_IQK) && (pHalData->Delta_IQK != 0)) - if ((delta_IQK >= 8)){ // Delta temperature is equal to or larger than 20 centigrade. - //printk("delta_IQK(%d) >=8 do_IQK\n",delta_IQK); - doIQK(pDM_Odm, delta_IQK, ThermalValue, 8); - } -#endif - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("<===dm_TXPowerTrackingCallback_ThermalMeter_8188E\n")); - - pDM_Odm->RFCalibrateInfo.TXPowercount = 0; -} - - - - - - -//1 7. IQK -#define MAX_TOLERANCE 5 -#define IQK_DELAY_TIME 1 //ms - -u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK -phy_PathA_IQK_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN BOOLEAN configPathB - ) -{ - u4Byte regEAC, regE94, regE9C, regEA4; - u1Byte result = 0x00; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK!\n")); - - //1 Tx IQK - //path-A IQK setting - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A IQK setting!\n")); - ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); - ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); - ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x8214032a); - ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28160000); - - //LO calibration setting - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); - - //One shot, path A LOK & IQK - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); - - // delay x ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); - //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); - ODM_delay_ms(IQK_DELAY_TIME_88E); - - // Check failed - regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); - regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); - regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); - regEA4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x\n", regEA4)); - - if(!(regEAC & BIT28) && - (((regE94 & 0x03FF0000)>>16) != 0x142) && - (((regE9C & 0x03FF0000)>>16) != 0x42) ) - result |= 0x01; - else //if Tx not OK, ignore Rx - return result; - -#if 0 - if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK - (((regEA4 & 0x03FF0000)>>16) != 0x132) && - (((regEAC & 0x03FF0000)>>16) != 0x36)) - result |= 0x02; - else - RTPRINT(FINIT, INIT_IQK, ("Path A Rx IQK fail!!\n")); -#endif - - return result; - - - } - -u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK -phy_PathA_RxIQK( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN BOOLEAN configPathB - ) -{ - u4Byte regEAC, regE94, regE9C, regEA4, u4tmp; - u1Byte result = 0x00; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK!\n")); - - //1 Get TXIMR setting - //modify RXIQK mode table - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table!\n")); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0 ); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f ); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf117B ); - - //PA,PAD off - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x980 ); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000 ); - - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); - - //IQK setting - ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); - ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x81004800); - - //path-A IQK setting - ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1c); - ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x30008c1c); - ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f); - ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28160000); - - //LO calibration setting - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); - - //One shot, path A LOK & IQK - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); - - // delay x ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); - //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); - ODM_delay_ms(IQK_DELAY_TIME_88E); - - - // Check failed - regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); - regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); - regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); - - if(!(regEAC & BIT28) && - (((regE94 & 0x03FF0000)>>16) != 0x142) && - (((regE9C & 0x03FF0000)>>16) != 0x42) ) - { - result |= 0x01; - } - else - { - //reload RF 0xdf - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180 );//if Tx not OK, ignore Rx - return result; - } - - u4tmp = 0x80007C00 | (regE94&0x3FF0000) | ((regE9C&0x3FF0000) >> 16); - ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, u4tmp); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe40 = 0x%x u4tmp = 0x%x \n", ODM_GetBBReg(pDM_Odm, rTx_IQK, bMaskDWord), u4tmp)); - - - //1 RX IQK - //modify RXIQK mode table - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table 2!\n")); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_WE_LUT, bRFRegOffsetMask, 0x800a0 ); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0000f ); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7ffa ); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); - - //IQK setting - ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); - - //path-A IQK setting - ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x38008c1c); - ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x18008c1c); - ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c05); - ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28160c1f); - - //LO calibration setting - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); - - //One shot, path A LOK & IQK - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); - - // delay x ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); - //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); - ODM_delay_ms(IQK_DELAY_TIME_88E); - - - // Check failed - regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); - regE94 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x\n", regE94)); - regE9C= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe9c = 0x%x\n", regE9C)); - regEA4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x\n", regEA4)); - - //reload RF 0xdf - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x180 ); - -#if 0 - if(!(regEAC & BIT28) && - (((regE94 & 0x03FF0000)>>16) != 0x142) && - (((regE9C & 0x03FF0000)>>16) != 0x42) ) - result |= 0x01; - else //if Tx not OK, ignore Rx - return result; -#endif - - if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK - (((regEA4 & 0x03FF0000)>>16) != 0x132) && - (((regEAC & 0x03FF0000)>>16) != 0x36)) - result |= 0x02; - else - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK fail!!\n")); - - return result; - - - - -} - -u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK -phy_PathB_IQK_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm -#else - IN PADAPTER pAdapter -#endif - ) -{ - u4Byte regEAC, regEB4, regEBC, regEC4, regECC; - u1Byte result = 0x00; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK!\n")); - - //One shot, path B LOK & IQK - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Cont, bMaskDWord, 0x00000002); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Cont, bMaskDWord, 0x00000000); - - // delay x ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME_88E)); - //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); - ODM_delay_ms(IQK_DELAY_TIME_88E); - - // Check failed - regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); - regEB4 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeb4 = 0x%x\n", regEB4)); - regEBC= ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xebc = 0x%x\n", regEBC)); - regEC4= ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_B_2, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xec4 = 0x%x\n", regEC4)); - regECC= ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_B_2, bMaskDWord); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xecc = 0x%x\n", regECC)); - - if(!(regEAC & BIT31) && - (((regEB4 & 0x03FF0000)>>16) != 0x142) && - (((regEBC & 0x03FF0000)>>16) != 0x42)) - result |= 0x01; - else - return result; - - if(!(regEAC & BIT30) && - (((regEC4 & 0x03FF0000)>>16) != 0x132) && - (((regECC & 0x03FF0000)>>16) != 0x36)) - result |= 0x02; - else - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK fail!!\n")); - - - return result; - -} - -VOID -_PHY_PathAFillIQKMatrix( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN BOOLEAN bIQKOK, - IN s4Byte result[][8], - IN u1Byte final_candidate, - IN BOOLEAN bTxOnly - ) -{ - u4Byte Oldval_0, X, TX0_A, reg; - s4Byte Y, TX0_C; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); - - if(final_candidate == 0xFF) - return; - - else if(bIQKOK) - { - Oldval_0 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; - - X = result[final_candidate][0]; - if ((X & 0x00000200) != 0) - X = X | 0xFFFFFC00; - TX0_A = (X * Oldval_0) >> 8; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", X, TX0_A, Oldval_0)); - ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); - - ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1)); - - Y = result[final_candidate][1]; - if ((Y & 0x00000200) != 0) - Y = Y | 0xFFFFFC00; - - - TX0_C = (Y * Oldval_0) >> 8; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C)); - ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); - ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); - - ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1)); - - if(bTxOnly) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("_PHY_PathAFillIQKMatrix only Tx OK\n")); - return; - } - - reg = result[final_candidate][2]; -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - if( RTL_ABS(reg ,0x100) >= 16) - reg = 0x100; -#endif - ODM_SetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, 0x3FF, reg); - - reg = result[final_candidate][3] & 0x3F; - ODM_SetBBReg(pDM_Odm, rOFDM0_XARxIQImbalance, 0xFC00, reg); - - reg = (result[final_candidate][3] >> 6) & 0xF; - ODM_SetBBReg(pDM_Odm, rOFDM0_RxIQExtAnta, 0xF0000000, reg); - } -} - -VOID -_PHY_PathBFillIQKMatrix( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN BOOLEAN bIQKOK, - IN s4Byte result[][8], - IN u1Byte final_candidate, - IN BOOLEAN bTxOnly //do Tx only - ) -{ - u4Byte Oldval_1, X, TX1_A, reg; - s4Byte Y, TX1_C; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); - - if(final_candidate == 0xFF) - return; - - else if(bIQKOK) - { - Oldval_1 = (ODM_GetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; - - X = result[final_candidate][4]; - if ((X & 0x00000200) != 0) - X = X | 0xFFFFFC00; - TX1_A = (X * Oldval_1) >> 8; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); - ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); - - ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1)); - - Y = result[final_candidate][5]; - if ((Y & 0x00000200) != 0) - Y = Y | 0xFFFFFC00; - - TX1_C = (Y * Oldval_1) >> 8; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C)); - ODM_SetBBReg(pDM_Odm, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); - ODM_SetBBReg(pDM_Odm, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); - - ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1)); - - if(bTxOnly) - return; - - reg = result[final_candidate][6]; - ODM_SetBBReg(pDM_Odm, rOFDM0_XBRxIQImbalance, 0x3FF, reg); - - reg = result[final_candidate][7] & 0x3F; - ODM_SetBBReg(pDM_Odm, rOFDM0_XBRxIQImbalance, 0xFC00, reg); - - reg = (result[final_candidate][7] >> 6) & 0xF; - ODM_SetBBReg(pDM_Odm, rOFDM0_AGCRSSITable, 0x0000F000, reg); - } -} - -// -// 2011/07/26 MH Add an API for testing IQK fail case. -// -// MP Already declare in odm.c -#if !(DM_ODM_SUPPORT_TYPE & ODM_MP) -BOOLEAN -ODM_CheckPowerStatus( - IN PADAPTER Adapter) -{ -/* - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - RT_RF_POWER_STATE rtState; - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - - // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. - if (pMgntInfo->init_adpt_in_progress == TRUE) - { - ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); - return TRUE; - } - - // - // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. - // - Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); - if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) - { - ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", - Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); - return FALSE; - } -*/ - return TRUE; -} -#endif - -VOID -_PHY_SaveADDARegisters( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN pu4Byte ADDAReg, - IN pu4Byte ADDABackup, - IN u4Byte RegisterNum - ) -{ - u4Byte i; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif - - if (ODM_CheckPowerStatus(pAdapter) == FALSE) - return; -#endif - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save ADDA parameters.\n")); - for( i = 0 ; i < RegisterNum ; i++){ - ADDABackup[i] = ODM_GetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord); - } -} - - -VOID -_PHY_SaveMACRegisters( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN pu4Byte MACReg, - IN pu4Byte MACBackup - ) -{ - u4Byte i; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n")); - for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ - MACBackup[i] = ODM_Read1Byte(pDM_Odm, MACReg[i]); - } - MACBackup[i] = ODM_Read4Byte(pDM_Odm, MACReg[i]); - -} - - -VOID -_PHY_ReloadADDARegisters( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN pu4Byte ADDAReg, - IN pu4Byte ADDABackup, - IN u4Byte RegiesterNum - ) -{ - u4Byte i; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload ADDA power saving parameters !\n")); - for(i = 0 ; i < RegiesterNum; i++) - { - ODM_SetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord, ADDABackup[i]); - } -} - -VOID -_PHY_ReloadMACRegisters( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN pu4Byte MACReg, - IN pu4Byte MACBackup - ) -{ - u4Byte i; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n")); - for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ - ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)MACBackup[i]); - } - ODM_Write4Byte(pDM_Odm, MACReg[i], MACBackup[i]); -} - - -VOID -_PHY_PathADDAOn( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN pu4Byte ADDAReg, - IN BOOLEAN isPathAOn, - IN BOOLEAN is2T - ) -{ - u4Byte pathOn; - u4Byte i; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ADDA ON.\n")); - - pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4; - if(FALSE == is2T){ - pathOn = 0x0bdb25a0; - ODM_SetBBReg(pDM_Odm, ADDAReg[0], bMaskDWord, 0x0b1b25a0); - } - else{ - ODM_SetBBReg(pDM_Odm,ADDAReg[0], bMaskDWord, pathOn); - } - - for( i = 1 ; i < IQK_ADDA_REG_NUM ; i++){ - ODM_SetBBReg(pDM_Odm,ADDAReg[i], bMaskDWord, pathOn); - } - -} - -VOID -_PHY_MACSettingCalibration( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN pu4Byte MACReg, - IN pu4Byte MACBackup - ) -{ - u4Byte i = 0; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("MAC settings for Calibration.\n")); - - ODM_Write1Byte(pDM_Odm, MACReg[i], 0x3F); - - for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){ - ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT3))); - } - ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT5))); - -} - -VOID -_PHY_PathAStandBy( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm -#else - IN PADAPTER pAdapter -#endif - ) -{ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A standby mode!\n")); - - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x0); - ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x00010000); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); -} - -VOID -_PHY_PIModeSwitch( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN BOOLEAN PIMode - ) -{ - u4Byte mode; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI"))); - - mode = PIMode ? 0x01000100 : 0x01000000; - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, bMaskDWord, mode); - ODM_SetBBReg(pDM_Odm, rFPGA0_XB_HSSIParameter1, bMaskDWord, mode); -} - -BOOLEAN -phy_SimularityCompare_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN s4Byte result[][8], - IN u1Byte c1, - IN u1Byte c2 - ) -{ - u4Byte i, j, diff, SimularityBitMap, bound = 0; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B - BOOLEAN bResult = TRUE; - BOOLEAN is2T; - s4Byte tmp1 = 0,tmp2 = 0; - - if( (pDM_Odm->RFType ==ODM_2T2R )||(pDM_Odm->RFType ==ODM_2T3R )||(pDM_Odm->RFType ==ODM_2T4R )) - is2T = TRUE; - else - is2T = FALSE; - - if(is2T) - bound = 8; - else - bound = 4; - - - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> IQK:phy_SimularityCompare_8188E c1 %d c2 %d!!!\n", c1, c2)); - - - SimularityBitMap = 0; - - for( i = 0; i < bound; i++ ) - { -// diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); - if((i==1) || (i==3) || (i==5) || (i==7)) - { - if((result[c1][i]& 0x00000200) != 0) - tmp1 = result[c1][i] | 0xFFFFFC00; - else - tmp1 = result[c1][i]; - - if((result[c2][i]& 0x00000200) != 0) - tmp2 = result[c2][i] | 0xFFFFFC00; - else - tmp2 = result[c2][i]; - } - else - { - tmp1 = result[c1][i]; - tmp2 = result[c2][i]; - } - - diff = (tmp1 > tmp2) ? (tmp1 - tmp2) : (tmp2 - tmp1); - - if (diff > MAX_TOLERANCE) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:phy_SimularityCompare_8188E differnece overflow index %d compare1 0x%x compare2 0x%x!!!\n", i, result[c1][i], result[c2][i])); - - if((i == 2 || i == 6) && !SimularityBitMap) - { - if(result[c1][i]+result[c1][i+1] == 0) - final_candidate[(i/4)] = c2; - else if (result[c2][i]+result[c2][i+1] == 0) - final_candidate[(i/4)] = c1; - else - SimularityBitMap = SimularityBitMap|(1<odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - u4Byte i; - u1Byte PathAOK, PathBOK; - u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = { - rFPGA0_XCD_SwitchControl, rBlue_Tooth, - rRx_Wait_CCA, rTx_CCK_RFON, - rTx_CCK_BBON, rTx_OFDM_RFON, - rTx_OFDM_BBON, rTx_To_Rx, - rTx_To_Tx, rRx_CCK, - rRx_OFDM, rRx_Wait_RIFS, - rRx_TO_Rx, rStandby, - rSleep, rPMPD_ANAEN }; - u4Byte IQK_MAC_REG[IQK_MAC_REG_NUM] = { - REG_TXPAUSE, REG_BCN_CTRL, - REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; - - //since 92C & 92D have the different define in IQK_BB_REG - u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { - rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, - rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, - rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, - rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD - }; - -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - u4Byte retryCount = 2; -#else -#if MP_DRIVER - u4Byte retryCount = 9; -#else - u4Byte retryCount = 2; -#endif -#endif -if ( *(pDM_Odm->mp_mode) == 1) - retryCount = 9; -else - retryCount = 2; - // Note: IQ calibration must be performed after loading - // PHY_REG.txt , and radio_a, radio_b.txt - - //u4Byte bbvalue; - -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -#ifdef MP_TEST - if(pDM_Odm->priv->pshare->rf_ft_var.mp_specific) - retryCount = 9; -#endif -#endif - - - if(t==0) - { -// bbvalue = ODM_GetBBReg(pDM_Odm, rFPGA0_RFMOD, bMaskDWord); -// RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8188E()==>0x%08x\n",bbvalue)); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); - - // Save ADDA parameters, turn Path A ADDA on -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - _PHY_SaveADDARegisters(pAdapter, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); - _PHY_SaveMACRegisters(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); - _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); -#else - _PHY_SaveADDARegisters(pDM_Odm, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); - _PHY_SaveMACRegisters(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); - _PHY_SaveADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); -#endif - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); - -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - - _PHY_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T); -#else - _PHY_PathADDAOn(pDM_Odm, ADDA_REG, TRUE, is2T); -#endif - - - if(t==0) - { - pDM_Odm->RFCalibrateInfo.bRfPiEnable = (u1Byte)ODM_GetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, BIT(8)); - } - - if(!pDM_Odm->RFCalibrateInfo.bRfPiEnable){ - // Switch BB to PI mode to do IQ Calibration. -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - _PHY_PIModeSwitch(pAdapter, TRUE); -#else - _PHY_PIModeSwitch(pDM_Odm, TRUE); -#endif - } - - //BB setting - ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0x00); - ODM_SetBBReg(pDM_Odm, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); - ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); - ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); - - - ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); - ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); - ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); - - - if(is2T) - { - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); - ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000); - } - - //MAC settings -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - _PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); -#else - _PHY_MACSettingCalibration(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); -#endif - - - //Page B init - //AP or IQK - ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); - - if(is2T) - { - ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x0f600000); - } - - // IQ calibration setting - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK setting!\n")); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); - ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); - ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x81004800); - - for(i = 0 ; i < retryCount ; i++){ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - PathAOK = phy_PathA_IQK_8188E(pAdapter, is2T); -#else - PathAOK = phy_PathA_IQK_8188E(pDM_Odm, is2T); -#endif -// if(PathAOK == 0x03){ - if(PathAOK == 0x01){ - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Tx IQK Success!!\n")); - result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; - result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; - break; - } -#if 0 - else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK - { - RTPRINT(FINIT, INIT_IQK, ("Path A IQK Only Tx Success!!\n")); - - result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; - result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; - } -#endif - } - - for(i = 0 ; i < retryCount ; i++){ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - PathAOK = phy_PathA_RxIQK(pAdapter, is2T); -#else - PathAOK = phy_PathA_RxIQK(pDM_Odm, is2T); -#endif - if(PathAOK == 0x03){ - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Success!!\n")); -// result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; -// result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; - result[t][2] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; - result[t][3] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; - break; - } - else - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Fail!!\n")); - } - } - - if(0x00 == PathAOK){ - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK failed!!\n")); - } - - if(is2T){ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - _PHY_PathAStandBy(pAdapter); - - // Turn Path B ADDA on - _PHY_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T); -#else - _PHY_PathAStandBy(pDM_Odm); - - // Turn Path B ADDA on - _PHY_PathADDAOn(pDM_Odm, ADDA_REG, FALSE, is2T); -#endif - - for(i = 0 ; i < retryCount ; i++){ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - PathBOK = phy_PathB_IQK_8188E(pAdapter); -#else - PathBOK = phy_PathB_IQK_8188E(pDM_Odm); -#endif - if(PathBOK == 0x03){ - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK Success!!\n")); - result[t][4] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; - result[t][5] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; - result[t][6] = (ODM_GetBBReg(pDM_Odm, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; - result[t][7] = (ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; - break; - } - else if (i == (retryCount - 1) && PathBOK == 0x01) //Tx IQK OK - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Only Tx IQK Success!!\n")); - result[t][4] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; - result[t][5] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; - } - } - - if(0x00 == PathBOK){ - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK failed!!\n")); - } - } - - //Back to BB mode, load original value - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Back to BB mode, load original value!\n")); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0); - - if(t!=0) - { - if(!pDM_Odm->RFCalibrateInfo.bRfPiEnable){ - // Switch back BB to SI mode after finish IQ Calibration. -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - _PHY_PIModeSwitch(pAdapter, FALSE); -#else - _PHY_PIModeSwitch(pDM_Odm, FALSE); -#endif - } -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - - // Reload ADDA power saving parameters - _PHY_ReloadADDARegisters(pAdapter, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); - - // Reload MAC parameters - _PHY_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); - - _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); -#else - // Reload ADDA power saving parameters - _PHY_ReloadADDARegisters(pDM_Odm, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); - - // Reload MAC parameters - _PHY_ReloadMACRegisters(pDM_Odm, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); - - _PHY_ReloadADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); -#endif - - - // Restore RX initial gain - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); - if(is2T){ - ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); - } - - //load 0xe30 IQC default value - ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); - ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); - - - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_IQCalibrate_8188E() <==\n")); - -} - - -VOID -phy_LCCalibrate_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN BOOLEAN is2T - ) -{ - u1Byte tmpReg; - u4Byte RF_Amode=0, RF_Bmode=0, LC_Cal; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - //Check continuous TX and Packet TX - tmpReg = ODM_Read1Byte(pDM_Odm, 0xd03); - - if((tmpReg&0x70) != 0) //Deal with contisuous TX case - ODM_Write1Byte(pDM_Odm, 0xd03, tmpReg&0x8F); //disable all continuous TX - else // Deal with Packet TX case - ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); // block all queues - - if((tmpReg&0x70) != 0) - { - //1. Read original RF mode - //Path-A -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - RF_Amode = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits); - - //Path-B - if(is2T) - RF_Bmode = PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits); -#else - RF_Amode = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMask12Bits); - - //Path-B - if(is2T) - RF_Bmode = ODM_GetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMask12Bits); -#endif - - //2. Set RF mode = standby mode - //Path-A - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); - - //Path-B - if(is2T) - ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); - } - - //3. Read RF reg18 -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - LC_Cal = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits); -#else - LC_Cal = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bMask12Bits); -#endif - - //4. Set LC calibration begin bit15 - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); - - ODM_sleep_ms(100); - - - //Restore original situation - if((tmpReg&0x70) != 0) //Deal with contisuous TX case - { - //Path-A - ODM_Write1Byte(pDM_Odm, 0xd03, tmpReg); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); - - //Path-B - if(is2T) - ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); - } - else // Deal with Packet TX case - { - ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); - } -} - -//Analog Pre-distortion calibration -#define APK_BB_REG_NUM 8 -#define APK_CURVE_REG_NUM 4 -#define PATH_NUM 2 - -VOID -phy_APCalibrate_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN s1Byte delta, - IN BOOLEAN is2T - ) -{ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - u4Byte regD[PATH_NUM]; - u4Byte tmpReg, index, offset, apkbound; - u1Byte path, i, pathbound = PATH_NUM; - u4Byte BB_backup[APK_BB_REG_NUM]; - u4Byte BB_REG[APK_BB_REG_NUM] = { - rFPGA1_TxBlock, rOFDM0_TRxPathEnable, - rFPGA0_RFMOD, rOFDM0_TRMuxPar, - rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, - rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; - u4Byte BB_AP_MODE[APK_BB_REG_NUM] = { - 0x00000020, 0x00a05430, 0x02040000, - 0x000800e4, 0x00204000 }; - u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = { - 0x00000020, 0x00a05430, 0x02040000, - 0x000800e4, 0x22204000 }; - - u4Byte AFE_backup[IQK_ADDA_REG_NUM]; - u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { - rFPGA0_XCD_SwitchControl, rBlue_Tooth, - rRx_Wait_CCA, rTx_CCK_RFON, - rTx_CCK_BBON, rTx_OFDM_RFON, - rTx_OFDM_BBON, rTx_To_Rx, - rTx_To_Tx, rRx_CCK, - rRx_OFDM, rRx_Wait_RIFS, - rRx_TO_Rx, rStandby, - rSleep, rPMPD_ANAEN }; - - u4Byte MAC_backup[IQK_MAC_REG_NUM]; - u4Byte MAC_REG[IQK_MAC_REG_NUM] = { - REG_TXPAUSE, REG_BCN_CTRL, - REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; - - u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { - {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, - {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} - }; - - u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { - {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings - {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} - }; - - u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { - {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, - {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} - }; - - u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { - {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings - {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} - }; - - u4Byte AFE_on_off[PATH_NUM] = { - 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on - - u4Byte APK_offset[PATH_NUM] = { - rConfig_AntA, rConfig_AntB}; - - u4Byte APK_normal_offset[PATH_NUM] = { - rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; - - u4Byte APK_value[PATH_NUM] = { - 0x92fc0000, 0x12fc0000}; - - u4Byte APK_normal_value[PATH_NUM] = { - 0x92680000, 0x12680000}; - - s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { - {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, - {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} - }; - - u4Byte APK_normal_setting_value_1[13] = { - 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, - 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, - 0x12680000, 0x00880000, 0x00880000 - }; - - u4Byte APK_normal_setting_value_2[16] = { - 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, - 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, - 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, - 0x00050006 - }; - - u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a -// u4Byte AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; - - s4Byte BB_offset, delta_V, delta_offset; - -#if MP_DRIVER == 1 -if ( *(pDM_Odm->mp_mode) == 1) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); -#else - PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); -#endif - pMptCtx->APK_bound[0] = 45; - pMptCtx->APK_bound[1] = 52; -} -#endif - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_APCalibrate_8188E() delta %d\n", delta)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); - if(!is2T) - pathbound = 1; - - //2 FOR NORMAL CHIP SETTINGS - -// Temporarily do not allow normal driver to do the following settings because these offset -// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal -// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the -// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. -//#if MP_DRIVER != 1 -if (*(pDM_Odm->mp_mode) != 1) - return; -//#endif - //settings adjust for normal chip - for(index = 0; index < PATH_NUM; index ++) - { - APK_offset[index] = APK_normal_offset[index]; - APK_value[index] = APK_normal_value[index]; - AFE_on_off[index] = 0x6fdb25a4; - } - - for(index = 0; index < APK_BB_REG_NUM; index ++) - { - for(path = 0; path < pathbound; path++) - { - APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; - APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; - } - BB_AP_MODE[index] = BB_normal_AP_MODE[index]; - } - - apkbound = 6; - - //save BB default value - for(index = 0; index < APK_BB_REG_NUM ; index++) - { - if(index == 0) //skip - continue; - BB_backup[index] = ODM_GetBBReg(pDM_Odm, BB_REG[index], bMaskDWord); - } - - //save MAC default value -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - _PHY_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); - - //save AFE default value - _PHY_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); -#else - _PHY_SaveMACRegisters(pDM_Odm, MAC_REG, MAC_backup); - - //save AFE default value - _PHY_SaveADDARegisters(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); -#endif - - for(path = 0; path < pathbound; path++) - { - - - if(path == RF_PATH_A) - { - //path A APK - //load APK setting - //path-A - offset = rPdp_AntA; - for(index = 0; index < 11; index ++) - { - ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); - - offset += 0x04; - } - - ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); - - offset = rConfig_AntA; - for(; index < 13; index ++) - { - ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); - - offset += 0x04; - } - - //page-B1 - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); - - //path A - offset = rPdp_AntA; - for(index = 0; index < 16; index++) - { - ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); - - offset += 0x04; - } - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - } - else if(path == RF_PATH_B) - { - //path B APK - //load APK setting - //path-B - offset = rPdp_AntB; - for(index = 0; index < 10; index ++) - { - ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); - - offset += 0x04; - } - ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); -#else - PHY_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); -#endif - - offset = rConfig_AntA; - index = 11; - for(; index < 13; index ++) //offset 0xb68, 0xb6c - { - ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); - - offset += 0x04; - } - - //page-B1 - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); - - //path B - offset = 0xb60; - for(index = 0; index < 16; index++) - { - ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); - - offset += 0x04; - } - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0); - } - - //save RF default value -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord); -#else - regD[path] = ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord); -#endif - - //Path A AFE all on, path B AFE All off or vise versa - for(index = 0; index < IQK_ADDA_REG_NUM ; index++) - ODM_SetBBReg(pDM_Odm, AFE_REG[index], bMaskDWord, AFE_on_off[path]); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xe70 %x\n", ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord))); - - //BB to AP mode - if(path == 0) - { - for(index = 0; index < APK_BB_REG_NUM ; index++) - { - - if(index == 0) //skip - continue; - else if (index < 5) - ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); - else if (BB_REG[index] == 0x870) - ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); - else - ODM_SetBBReg(pDM_Odm, BB_REG[index], BIT10, 0x0); - } - - ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); - ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); - } - else //path B - { - ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); - ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); - - } - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x800 %x\n", ODM_GetBBReg(pDM_Odm, 0x800, bMaskDWord))); - - //MAC settings -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - _PHY_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); -#else - _PHY_MACSettingCalibration(pDM_Odm, MAC_REG, MAC_backup); -#endif - - if(path == RF_PATH_A) //Path B to standby mode - { - ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMaskDWord, 0x10000); - } - else //Path A to standby mode - { - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMaskDWord, 0x10000); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE2, bMaskDWord, 0x20103); - } - - delta_offset = ((delta+14)/2); - if(delta_offset < 0) - delta_offset = 0; - else if (delta_offset > 12) - delta_offset = 12; - - //AP calibration - for(index = 0; index < APK_BB_REG_NUM; index++) - { - if(index != 1) //only DO PA11+PAD01001, AP RF setting - continue; - - tmpReg = APK_RF_init_value[path][index]; -#if 1 - if(!pDM_Odm->RFCalibrateInfo.bAPKThermalMeterIgnore) - { - BB_offset = (tmpReg & 0xF0000) >> 16; - - if(!(tmpReg & BIT15)) //sign bit 0 - { - BB_offset = -BB_offset; - } - - delta_V = APK_delta_mapping[index][delta_offset]; - - BB_offset += delta_V; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, delta_V, delta_offset)); - - if(BB_offset < 0) - { - tmpReg = tmpReg & (~BIT15); - BB_offset = -BB_offset; - } - else - { - tmpReg = tmpReg | BIT15; - } - tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); - } -#endif - - ODM_SetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord, 0x8992e); -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bMaskDWord))); - ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bMaskDWord))); - ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord))); -#else - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xc %x\n", ODM_GetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord))); - ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x0 %x\n", ODM_GetRFReg(pDM_Odm, path, RF_AC, bMaskDWord))); - ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xd %x\n", ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord))); -#endif - - // PA11+PAD01111, one shot - i = 0; - do - { - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80000000); - { - ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[0]); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); - ODM_delay_ms(3); - ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[1]); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); - - ODM_delay_ms(20); - } - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - - if(path == RF_PATH_A) - tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0x03E00000); - else - tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0xF8000000); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0xbd8[25:21] %x\n", tmpReg)); - - - i++; - } - while(tmpReg > apkbound && i < 4); - - APK_result[path][index] = tmpReg; - } - } - - //reload MAC default value -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - _PHY_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); -#else - _PHY_ReloadMACRegisters(pDM_Odm, MAC_REG, MAC_backup); -#endif - - //reload BB default value - for(index = 0; index < APK_BB_REG_NUM ; index++) - { - - if(index == 0) //skip - continue; - ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]); - } - - //reload AFE default value -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - _PHY_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); -#else - _PHY_ReloadADDARegisters(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); -#endif - - //reload RF path default value - for(path = 0; path < pathbound; path++) - { - ODM_SetRFReg(pDM_Odm, path, 0xd, bMaskDWord, regD[path]); - if(path == RF_PATH_B) - { - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE2, bMaskDWord, 0x20101); - } - - //note no index == 0 - if (APK_result[path][1] > 6) - APK_result[path][1] = 6; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); - } - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\n")); - - - for(path = 0; path < pathbound; path++) - { - ODM_SetRFReg(pDM_Odm, path, 0x3, bMaskDWord, - ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); - if(path == RF_PATH_A) - ODM_SetRFReg(pDM_Odm, path, 0x4, bMaskDWord, - ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); - else - ODM_SetRFReg(pDM_Odm, path, 0x4, bMaskDWord, - ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - if(!IS_HARDWARE_TYPE_8723A(pAdapter)) - ODM_SetRFReg(pDM_Odm, path, RF_BS_PA_APSET_G9_G11, bMaskDWord, - ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); -#endif - } - - pDM_Odm->RFCalibrateInfo.bAPKdone = TRUE; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_APCalibrate_8188E()\n")); -} - - - -#define DP_BB_REG_NUM 7 -#define DP_RF_REG_NUM 1 -#define DP_RETRY_LIMIT 10 -#define DP_PATH_NUM 2 -#define DP_DPK_NUM 3 -#define DP_DPK_VALUE_NUM 2 - - - - - -VOID -PHY_IQCalibrate_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN BOOLEAN bReCovery - ) -{ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #else // (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - - #if (MP_DRIVER == 1) - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); - #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) - PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); - #endif - #endif//(MP_DRIVER == 1) -#endif - - s4Byte result[4][8]; //last is final result - u1Byte i, final_candidate, Indexforchannel; - u1Byte channelToIQK = 7; - BOOLEAN bPathAOK, bPathBOK; - s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; - BOOLEAN is12simular, is13simular, is23simular; - BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; - u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = { - rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, - rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, - rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, - rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, - rOFDM0_RxIQExtAnta}; - BOOLEAN is2T; - - is2T = (pDM_Odm->RFType == ODM_2T2R)?TRUE:FALSE; -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE) ) - if (ODM_CheckPowerStatus(pAdapter) == FALSE) - return; -#else - prtl8192cd_priv priv = pDM_Odm->priv; - -#ifdef MP_TEST - if(priv->pshare->rf_ft_var.mp_specific) - { - if((OPMODE & WIFI_MP_CTX_PACKET) || (OPMODE & WIFI_MP_CTX_ST)) - return; - } -#endif - - if(priv->pshare->IQK_88E_done) - bReCovery= 1; - priv->pshare->IQK_88E_done = 1; - -#endif - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) - if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) - { - return; - } -#endif - -#if MP_DRIVER == 1 -if (*(pDM_Odm->mp_mode) == 1) -{ - bStartContTx = pMptCtx->bStartContTx; - bSingleTone = pMptCtx->bSingleTone; - bCarrierSuppression = pMptCtx->bCarrierSuppression; -} -#endif - - // 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) - if(bSingleTone || bCarrierSuppression) - return; - -#if DISABLE_BB_RF - return; -#endif - -#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) - if(bReCovery) -#else//for ODM_MP - if(bReCovery && (!pAdapter->bInHctTest)) //YJ,add for PowerTest,120405 -#endif - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("PHY_IQCalibrate_8188E: Return due to bReCovery!\n")); -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); -#else - _PHY_ReloadADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); -#endif - return; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Start!!!\n")); - -#if 0//Suggested by Edlu,120413 - - // IQK on channel 7, should switch back when completed. - //originChannel = pHalData->CurrentChannel; - originChannel = *(pDM_Odm->pChannel); - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - pAdapter->HalFunc.SwChnlByTimerHandler(pAdapter, channelToIQK); -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - pAdapter->HalFunc.set_channel_handler(pAdapter, channelToIQK); -#endif - -#endif - - for(i = 0; i < 8; i++) - { - result[0][i] = 0; - result[1][i] = 0; - result[2][i] = 0; - if((i==0) ||(i==2) || (i==4) || (i==6)) - result[3][i] = 0x100; - else - result[3][i] = 0; - } - final_candidate = 0xff; - bPathAOK = FALSE; - bPathBOK = FALSE; - is12simular = FALSE; - is23simular = FALSE; - is13simular = FALSE; - - - //ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK !!!interface %d currentband %d ishardwareD %d \n", pDM_Odm->interfaceIndex, pHalData->CurrentBandType92D, IS_HARDWARE_TYPE_8192D(pAdapter))); -// RT_TRACE(COMP_INIT,DBG_LOUD,("Acquire Mutex in IQCalibrate \n")); - for (i=0; i<3; i++) - { - -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - phy_IQCalibrate_8188E(pAdapter, result, i, is2T); -#else - phy_IQCalibrate_8188E(pDM_Odm, result, i, is2T); -#endif - - - if(i == 1) - { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - is12simular = phy_SimularityCompare_8188E(pAdapter, result, 0, 1); -#else - is12simular = phy_SimularityCompare_8188E(pDM_Odm, result, 0, 1); -#endif - if(is12simular) - { - final_candidate = 0; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is12simular final_candidate is %x\n",final_candidate)); - break; - } - } - - if(i == 2) - { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - is13simular = phy_SimularityCompare_8188E(pAdapter, result, 0, 2); -#else - is13simular = phy_SimularityCompare_8188E(pDM_Odm, result, 0, 2); -#endif - if(is13simular) - { - final_candidate = 0; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is13simular final_candidate is %x\n",final_candidate)); - - break; - } -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - is23simular = phy_SimularityCompare_8188E(pAdapter, result, 1, 2); -#else - is23simular = phy_SimularityCompare_8188E(pDM_Odm, result, 1, 2); -#endif - if(is23simular) - { - final_candidate = 1; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is23simular final_candidate is %x\n",final_candidate)); - } - else - { - /* - for(i = 0; i < 8; i++) - RegTmp += result[3][i]; - - if(RegTmp != 0) - final_candidate = 3; - else - final_candidate = 0xFF; - */ - final_candidate = 3; - } - } - } -// RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate \n")); - - for (i=0; i<4; i++) - { - RegE94 = result[i][0]; - RegE9C = result[i][1]; - RegEA4 = result[i][2]; - RegEAC = result[i][3]; - RegEB4 = result[i][4]; - RegEBC = result[i][5]; - RegEC4 = result[i][6]; - RegECC = result[i][7]; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); - } - - if(final_candidate != 0xff) - { - pDM_Odm->RFCalibrateInfo.RegE94 = RegE94 = result[final_candidate][0]; - pDM_Odm->RFCalibrateInfo.RegE9C = RegE9C = result[final_candidate][1]; - RegEA4 = result[final_candidate][2]; - RegEAC = result[final_candidate][3]; - pDM_Odm->RFCalibrateInfo.RegEB4 = RegEB4 = result[final_candidate][4]; - pDM_Odm->RFCalibrateInfo.RegEBC = RegEBC = result[final_candidate][5]; - RegEC4 = result[final_candidate][6]; - RegECC = result[final_candidate][7]; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: final_candidate is %x\n",final_candidate)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); - bPathAOK = bPathBOK = TRUE; - } - else - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: FAIL use default value\n")); - - pDM_Odm->RFCalibrateInfo.RegE94 = pDM_Odm->RFCalibrateInfo.RegEB4 = 0x100; //X default value - pDM_Odm->RFCalibrateInfo.RegE9C = pDM_Odm->RFCalibrateInfo.RegEBC = 0x0; //Y default value - } - - if((RegE94 != 0)/*&&(RegEA4 != 0)*/) - { -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - _PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); -#else - _PHY_PathAFillIQKMatrix(pDM_Odm, bPathAOK, result, final_candidate, (RegEA4 == 0)); -#endif - } - -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - if (is2T) - { - if((RegEB4 != 0)/*&&(RegEC4 != 0)*/) - { - _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); - } - } -#endif - -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - Indexforchannel = ODM_GetRightChnlPlaceforIQK(pHalData->CurrentChannel); -#else - Indexforchannel = 0; -#endif - -//To Fix BSOD when final_candidate is 0xff -//by sherry 20120321 - if(final_candidate < 4) - { - for(i = 0; i < IQK_Matrix_REG_NUM; i++) - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][i] = result[final_candidate][i]; - pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].bIQKDone = TRUE; - } - //RTPRINT(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel)); -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - - _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); -#else - _PHY_SaveADDARegisters(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, IQK_BB_REG_NUM); -#endif - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK finished\n")); -#if 0 //Suggested by Edlu,120413 - - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - pAdapter->HalFunc.SwChnlByTimerHandler(pAdapter, originChannel); - #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - pAdapter->HalFunc.set_channel_handler(pAdapter, originChannel); - #endif - -#endif - -} - - -VOID -PHY_LCCalibrate_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm -#else - IN PADAPTER pAdapter -#endif - ) -{ - BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; - u4Byte timeout = 2000, timecount = 0; - -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #else // (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - - #if (MP_DRIVER == 1) - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); - #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) - PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); - #endif - #endif//(MP_DRIVER == 1) -#endif - - - - -#if MP_DRIVER == 1 -if (*(pDM_Odm->mp_mode) == 1) -{ - bStartContTx = pMptCtx->bStartContTx; - bSingleTone = pMptCtx->bSingleTone; - bCarrierSuppression = pMptCtx->bCarrierSuppression; -} -#endif - - -#if DISABLE_BB_RF - return; -#endif - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) - if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) - { - return; - } -#endif - // 20120213 Turn on when continuous Tx to pass lab testing. (required by Edlu) - if(bSingleTone || bCarrierSuppression) - return; - - while(*(pDM_Odm->pbScanInProcess) && timecount < timeout) - { - ODM_delay_ms(50); - timecount += 50; - } - - pDM_Odm->RFCalibrateInfo.bLCKInProgress = TRUE; - - //ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pDM_Odm->interfaceIndex, pHalData->CurrentBandType92D, timecount)); -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - - if(pDM_Odm->RFType == ODM_2T2R) - { - phy_LCCalibrate_8188E(pAdapter, TRUE); - } - else -#endif - { - // For 88C 1T1R -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - phy_LCCalibrate_8188E(pAdapter, FALSE); -#else - phy_LCCalibrate_8188E(pDM_Odm, FALSE); -#endif - } - - pDM_Odm->RFCalibrateInfo.bLCKInProgress = FALSE; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Finish!!!interface %d\n", pDM_Odm->InterfaceIndex)); - -} - -VOID -PHY_APCalibrate_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN s1Byte delta - ) -{ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif -#if DISABLE_BB_RF - return; -#endif - - return; -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) - if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) - { - return; - } -#endif - -#if FOR_BRAZIL_PRETEST != 1 - if(pDM_Odm->RFCalibrateInfo.bAPKdone) -#endif - return; - -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - if(pDM_Odm->RFType == ODM_2T2R){ - phy_APCalibrate_8188E(pAdapter, delta, TRUE); - } - else -#endif - { - // For 88C 1T1R -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - phy_APCalibrate_8188E(pAdapter, delta, FALSE); -#else - phy_APCalibrate_8188E(pDM_Odm, delta, FALSE); -#endif - } -} -VOID phy_SetRFPathSwitch_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN BOOLEAN bMain, - IN BOOLEAN is2T - ) -{ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #elif (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif - - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - if(!pAdapter->bHWInitReady) - #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - if(pAdapter->hw_init_completed == _FALSE) - #endif - { - u1Byte u1bTmp; - u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; - ODM_Write1Byte(pDM_Odm, REG_LEDCFG2, u1bTmp); - //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); - ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); - } - -#endif - - if(is2T) //92C - { - if(bMain) - ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); //92C_Path_A - else - ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); //BT - } - else //88C - { - - if(bMain) - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x2); //Main - else - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x1); //Aux - } -} -VOID PHY_SetRFPathSwitch_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN BOOLEAN bMain - ) -{ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - - -#if DISABLE_BB_RF - return; -#endif - -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - if(pDM_Odm->RFType == ODM_2T2R) - { - phy_SetRFPathSwitch_8188E(pAdapter, bMain, TRUE); - } - else -#endif - { - // For 88C 1T1R -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - phy_SetRFPathSwitch_8188E(pAdapter, bMain, FALSE); -#else - phy_SetRFPathSwitch_8188E(pDM_Odm, bMain, FALSE); -#endif - } -} - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -//digital predistortion -VOID -phy_DigitalPredistortion( -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PADAPTER pAdapter, -#else - IN PDM_ODM_T pDM_Odm, -#endif - IN BOOLEAN is2T - ) -{ -} - -VOID -PHY_DigitalPredistortion_8188E( -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PADAPTER pAdapter -#else - IN PDM_ODM_T pDM_Odm -#endif - ) -{ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif -#if DISABLE_BB_RF - return; -#endif - - return; - - if(pDM_Odm->RFCalibrateInfo.bDPdone) - return; -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - - if(pDM_Odm->RFType == ODM_2T2R){ - phy_DigitalPredistortion(pAdapter, TRUE); - } - else -#endif - { - // For 88C 1T1R - phy_DigitalPredistortion(pAdapter, FALSE); - } -} - - - -//return value TRUE => Main; FALSE => Aux - -BOOLEAN phy_QueryRFPathSwitch_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm, -#else - IN PADAPTER pAdapter, -#endif - IN BOOLEAN is2T - ) -{ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - if(!pAdapter->bHWInitReady) - { - u1Byte u1bTmp; - u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; - ODM_Write1Byte(pDM_Odm, REG_LEDCFG2, u1bTmp); - //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); - ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); - } - - if(is2T) // - { - if(ODM_GetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) - return TRUE; - else - return FALSE; - } - else - { - if(ODM_GetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9) == 0x02) - return TRUE; - else - return FALSE; - } -} - - - -//return value TRUE => Main; FALSE => Aux -BOOLEAN PHY_QueryRFPathSwitch_8188E( -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - IN PDM_ODM_T pDM_Odm -#else - IN PADAPTER pAdapter -#endif - ) -{ -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - #endif - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - #endif -#endif - - -#if DISABLE_BB_RF - return TRUE; -#endif -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - - //if(IS_92C_SERIAL( pHalData->VersionID)){ - if(pDM_Odm->RFType == ODM_2T2R){ - return phy_QueryRFPathSwitch_8188E(pAdapter, TRUE); - } - else -#endif - { - // For 88C 1T1R -#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) - return phy_QueryRFPathSwitch_8188E(pAdapter, FALSE); -#else - return phy_QueryRFPathSwitch_8188E(pDM_Odm, FALSE); -#endif - } -} -#endif diff --git a/hal/OUTSRC/rtl8188e/odm_RTL8188E.c b/hal/OUTSRC/rtl8188e/odm_RTL8188E.c deleted file mode 100755 index fb99d0e..0000000 --- a/hal/OUTSRC/rtl8188e/odm_RTL8188E.c +++ /dev/null @@ -1,1290 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -//============================================================ -// include files -//============================================================ - -#include "../odm_precomp.h" - -#if (RTL8188E_SUPPORT == 1) - -VOID -ODM_DIG_LowerBound_88E( - IN PDM_ODM_T pDM_Odm -) -{ - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - - if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) - { - pDM_DigTable->rx_gain_range_min = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_DIG_LowerBound_88E(): pDM_DigTable->AntDiv_RSSI_max=%d \n",pDM_DigTable->AntDiv_RSSI_max)); - } - //If only one Entry connected - - - -} - -#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) -VOID -odm_RX_HWAntDivInit( - IN PDM_ODM_T pDM_Odm -) -{ - u4Byte value32; - PADAPTER Adapter = pDM_Odm->Adapter; - #if (MP_DRIVER == 1) - if (*(pDM_Odm->mp_mode) == 1) - { - pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; - ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); // disable HW AntDiv - ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); // 1:CG, 0:CS - return; - } - #endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_RX_HWAntDivInit() \n")); - - //MAC Setting - value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); - ODM_SetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output - //Pin Settings - ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW - ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW - ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT22, 1); //Regb2c[22]=1'b0 //disable CS/CG switch - ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); //Regb2c[31]=1'b1 //output at CG only - //OFDM Settings - ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N , bMaskDWord, 0x000000a0); - //CCK Settings - ODM_SetBBReg(pDM_Odm, ODM_REG_BB_PWR_SAV4_11N , BIT7, 1); //Fix CCK PHY status report issue - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N , BIT4, 1); //CCK complete HW AntDiv within 64 samples - ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT); - ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , 0xFFFF, 0x0201); //antenna mapping table - - //ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 1); //Enable HW AntDiv - //ODM_SetBBReg(pDM_Odm, 0xa00 , BIT15, 1); //Enable CCK AntDiv -} - -VOID -odm_TRX_HWAntDivInit( - IN PDM_ODM_T pDM_Odm -) -{ - u4Byte value32; - PADAPTER Adapter = pDM_Odm->Adapter; - - #if (MP_DRIVER == 1) - if (*(pDM_Odm->mp_mode) == 1) - { - pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; - ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); // disable HW AntDiv - ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, 0); //Default RX (0/1) - return; - } - - #endif - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_TRX_HWAntDivInit() \n")); - - //MAC Setting - value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); - ODM_SetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output - //Pin Settings - ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW - ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW - ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT22, 0); //Regb2c[22]=1'b0 //disable CS/CG switch - ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); //Regb2c[31]=1'b1 //output at CG only - //OFDM Settings - ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N , bMaskDWord, 0x000000a0); - //CCK Settings - ODM_SetBBReg(pDM_Odm, ODM_REG_BB_PWR_SAV4_11N , BIT7, 1); //Fix CCK PHY status report issue - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N , BIT4, 1); //CCK complete HW AntDiv within 64 samples - //Tx Settings - ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N , BIT21, 0); //Reg80c[21]=1'b0 //from TX Reg - ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT); - - //antenna mapping table - if(!pDM_Odm->bIsMPChip) //testchip - { - ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT10|BIT9|BIT8, 1); //Reg858[10:8]=3'b001 - ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT13|BIT12|BIT11, 2); //Reg858[13:11]=3'b010 - } - else //MPchip - ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , bMaskDWord, 0x0201); //Reg914=3'b010, Reg915=3'b001 - - //ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 1); //Enable HW AntDiv - //ODM_SetBBReg(pDM_Odm, 0xa00 , BIT15, 1); //Enable CCK AntDiv -} - -VOID -odm_FastAntTrainingInit( - IN PDM_ODM_T pDM_Odm -) -{ - u4Byte value32, i; - pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; - u4Byte AntCombination = 2; - PADAPTER Adapter = pDM_Odm->Adapter; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_FastAntTrainingInit() \n")); - -#if (MP_DRIVER == 1) - if (*(pDM_Odm->mp_mode) == 1) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("pDM_Odm->AntDivType: %d\n", pDM_Odm->AntDivType)); - return; - } -#endif - - for(i=0; i<6; i++) - { - pDM_FatTable->Bssid[i] = 0; - pDM_FatTable->antSumRSSI[i] = 0; - pDM_FatTable->antRSSIcnt[i] = 0; - pDM_FatTable->antAveRSSI[i] = 0; - } - pDM_FatTable->TrainIdx = 0; - pDM_FatTable->FAT_State = FAT_NORMAL_STATE; - - //MAC Setting - value32 = ODM_GetMACReg(pDM_Odm, 0x4c, bMaskDWord); - ODM_SetMACReg(pDM_Odm, 0x4c, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output - value32 = ODM_GetMACReg(pDM_Odm, 0x7B4, bMaskDWord); - ODM_SetMACReg(pDM_Odm, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); //Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match - //value32 = PlatformEFIORead4Byte(Adapter, 0x7B4); - //PlatformEFIOWrite4Byte(Adapter, 0x7b4, value32|BIT18); //append MACID in reponse packet - - //Match MAC ADDR - ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, 0); - ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, 0); - - ODM_SetBBReg(pDM_Odm, 0x870 , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW - ODM_SetBBReg(pDM_Odm, 0x864 , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW - ODM_SetBBReg(pDM_Odm, 0xb2c , BIT22, 0); //Regb2c[22]=1'b0 //disable CS/CG switch - ODM_SetBBReg(pDM_Odm, 0xb2c , BIT31, 1); //Regb2c[31]=1'b1 //output at CG only - ODM_SetBBReg(pDM_Odm, 0xca4 , bMaskDWord, 0x000000a0); - - //antenna mapping table - if(AntCombination == 2) - { - if(!pDM_Odm->bIsMPChip) //testchip - { - ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 1); //Reg858[10:8]=3'b001 - ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 2); //Reg858[13:11]=3'b010 - } - else //MPchip - { - ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 1); - ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 2); - } - } - else if(AntCombination == 7) - { - if(!pDM_Odm->bIsMPChip) //testchip - { - ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 0); //Reg858[10:8]=3'b000 - ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 1); //Reg858[13:11]=3'b001 - ODM_SetBBReg(pDM_Odm, 0x878 , BIT16, 0); - ODM_SetBBReg(pDM_Odm, 0x858 , BIT15|BIT14, 2); //(Reg878[0],Reg858[14:15])=3'b010 - ODM_SetBBReg(pDM_Odm, 0x878 , BIT19|BIT18|BIT17, 3);//Reg878[3:1]=3b'011 - ODM_SetBBReg(pDM_Odm, 0x878 , BIT22|BIT21|BIT20, 4);//Reg878[6:4]=3b'100 - ODM_SetBBReg(pDM_Odm, 0x878 , BIT25|BIT24|BIT23, 5);//Reg878[9:7]=3b'101 - ODM_SetBBReg(pDM_Odm, 0x878 , BIT28|BIT27|BIT26, 6);//Reg878[12:10]=3b'110 - ODM_SetBBReg(pDM_Odm, 0x878 , BIT31|BIT30|BIT29, 7);//Reg878[15:13]=3b'111 - } - else //MPchip - { - ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 0); - ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 1); - ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte2, 2); - ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte3, 3); - ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte0, 4); - ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte1, 5); - ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte2, 6); - ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte3, 7); - } - } - - //Default Ant Setting when no fast training - ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 1); //Reg80c[21]=1'b1 //from TX Info - ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, 0); //Default RX - ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, 1); //Optional RX - //ODM_SetBBReg(pDM_Odm, 0x860 , BIT14|BIT13|BIT12, 1); //Default TX - - //Enter Traing state - ODM_SetBBReg(pDM_Odm, 0x864 , BIT2|BIT1|BIT0, (AntCombination-1)); //Reg864[2:0]=3'd6 //ant combination=reg864[2:0]+1 - //ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv - //ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 0); //RegE08[16]=1'b0 //disable fast training - //ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 1); //RegE08[16]=1'b1 //enable fast training - ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 1); //RegC50[7]=1'b1 //enable HW AntDiv - - - //SW Control - //PHY_SetBBReg(Adapter, 0x864 , BIT10, 1); - //PHY_SetBBReg(Adapter, 0x870 , BIT9, 1); - //PHY_SetBBReg(Adapter, 0x870 , BIT8, 1); - //PHY_SetBBReg(Adapter, 0x864 , BIT11, 1); - //PHY_SetBBReg(Adapter, 0x860 , BIT9, 0); - //PHY_SetBBReg(Adapter, 0x860 , BIT8, 0); -} - -VOID -ODM_AntennaDiversityInit_88E( - IN PDM_ODM_T pDM_Odm -) -{ -/* - //2012.03.27 LukeLee: For temp use, should be removed later - //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; - //{ - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); - //pHalData->AntDivCfg = 1; - //} -*/ - if(pDM_Odm->SupportICType != ODM_RTL8188E) - return; - - //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->AntDivType=%d, pHalData->AntDivCfg=%d\n", - // pDM_Odm->AntDivType, pHalData->AntDivCfg)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->AntDivType=%d\n",pDM_Odm->AntDivType)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->bIsMPChip=%s\n",(pDM_Odm->bIsMPChip?"TRUE":"FALSE"))); - - if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) - odm_RX_HWAntDivInit(pDM_Odm); - else if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) - odm_TRX_HWAntDivInit(pDM_Odm); - else if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) - odm_FastAntTrainingInit(pDM_Odm); -} - - -VOID -ODM_UpdateRxIdleAnt_88E(IN PDM_ODM_T pDM_Odm, IN u1Byte Ant) -{ - pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; - u4Byte DefaultAnt, OptionalAnt; - - if(pDM_FatTable->RxIdleAnt != Ant) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Update Rx Idle Ant\n")); - if(Ant == MAIN_ANT) - { - DefaultAnt = (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)?MAIN_ANT_CG_TRX:MAIN_ANT_CGCS_RX; - OptionalAnt = (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)?AUX_ANT_CG_TRX:AUX_ANT_CGCS_RX; - } - else - { - DefaultAnt = (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)?AUX_ANT_CG_TRX:AUX_ANT_CGCS_RX; - OptionalAnt = (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)?MAIN_ANT_CG_TRX:MAIN_ANT_CGCS_RX; - } - - if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) - { - ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, DefaultAnt); //Default RX - ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT8|BIT7|BIT6, OptionalAnt); //Optional RX - ODM_SetBBReg(pDM_Odm, ODM_REG_ANTSEL_CTRL_11N , BIT14|BIT13|BIT12, DefaultAnt); //Default TX - ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11N , BIT6|BIT7, DefaultAnt); //Resp Tx - - } - else if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) - { - ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, DefaultAnt); //Default RX - ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT8|BIT7|BIT6, OptionalAnt); //Optional RX - } - } - pDM_FatTable->RxIdleAnt = Ant; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RxIdleAnt=%s\n",(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); - printk("RxIdleAnt=%s\n",(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"); -} - - -VOID -odm_UpdateTxAnt_88E(IN PDM_ODM_T pDM_Odm, IN u1Byte Ant, IN u4Byte MacId) -{ - pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; - u1Byte TargetAnt; - - if(Ant == MAIN_ANT) - TargetAnt = MAIN_ANT_CG_TRX; - else - TargetAnt = AUX_ANT_CG_TRX; - - pDM_FatTable->antsel_a[MacId] = TargetAnt&BIT0; - pDM_FatTable->antsel_b[MacId] = (TargetAnt&BIT1)>>1; - pDM_FatTable->antsel_c[MacId] = (TargetAnt&BIT2)>>2; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Tx from TxInfo, TargetAnt=%s\n", - (Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=3'b%d%d%d\n", - pDM_FatTable->antsel_c[MacId] , pDM_FatTable->antsel_b[MacId] , pDM_FatTable->antsel_a[MacId] )); -} - -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) -VOID -ODM_SetTxAntByTxInfo_88E( - IN PDM_ODM_T pDM_Odm, - IN pu1Byte pDesc, - IN u1Byte macId - ) -{ - pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; - - if((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) - { - SET_TX_DESC_ANTSEL_A_88E(pDesc, pDM_FatTable->antsel_a[macId]); - SET_TX_DESC_ANTSEL_B_88E(pDesc, pDM_FatTable->antsel_b[macId]); - SET_TX_DESC_ANTSEL_C_88E(pDesc, pDM_FatTable->antsel_c[macId]); - //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SetTxAntByTxInfo_88E_WIN(): MacID=%d, antsel_tr_mux=3'b%d%d%d\n", - // macId, pDM_FatTable->antsel_c[macId], pDM_FatTable->antsel_b[macId], pDM_FatTable->antsel_a[macId])); - } -} -#else// (DM_ODM_SUPPORT_TYPE == ODM_AP) -VOID -ODM_SetTxAntByTxInfo_88E( - IN PDM_ODM_T pDM_Odm - ) -{ -} -#endif - -VOID -ODM_AntselStatistics_88E( - IN PDM_ODM_T pDM_Odm, - IN u1Byte antsel_tr_mux, - IN u4Byte MacId, - IN u1Byte RxPWDBAll -) -{ - pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; - if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) - { - if(antsel_tr_mux == MAIN_ANT_CG_TRX) - { - - pDM_FatTable->MainAnt_Sum[MacId]+=RxPWDBAll; - pDM_FatTable->MainAnt_Cnt[MacId]++; - } - else - { - pDM_FatTable->AuxAnt_Sum[MacId]+=RxPWDBAll; - pDM_FatTable->AuxAnt_Cnt[MacId]++; - - } - } - else if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) - { - if(antsel_tr_mux == MAIN_ANT_CGCS_RX) - { - - pDM_FatTable->MainAnt_Sum[MacId]+=RxPWDBAll; - pDM_FatTable->MainAnt_Cnt[MacId]++; - } - else - { - pDM_FatTable->AuxAnt_Sum[MacId]+=RxPWDBAll; - pDM_FatTable->AuxAnt_Cnt[MacId]++; - - } - } -} - -#define TX_BY_REG 0 -VOID -odm_HWAntDiv( - IN PDM_ODM_T pDM_Odm -) -{ - u4Byte i, MinRSSI=0xFF, AntDivMaxRSSI=0, MaxRSSI=0, LocalMinRSSI, LocalMaxRSSI; - u4Byte Main_RSSI, Aux_RSSI; - u1Byte RxIdleAnt=0, TargetAnt=7; - pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - BOOLEAN bMatchBSSID; - BOOLEAN bPktFilterMacth = FALSE; - PSTA_INFO_T pEntry; - - for (i=0; ipODM_StaInfo[i]; - if(IS_STA_VALID(pEntry)) - { - //2 Caculate RSSI per Antenna - Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; - Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; - TargetAnt = (Main_RSSI>=Aux_RSSI)?MAIN_ANT:AUX_ANT; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MacID=%d, MainAnt_Sum=%d, MainAnt_Cnt=%d\n", i, pDM_FatTable->MainAnt_Sum[i], pDM_FatTable->MainAnt_Cnt[i])); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MacID=%d, AuxAnt_Sum=%d, AuxAnt_Cnt=%d\n",i, pDM_FatTable->AuxAnt_Sum[i], pDM_FatTable->AuxAnt_Cnt[i])); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MacID=%d, Main_RSSI= %d, Aux_RSSI= %d\n", i, Main_RSSI, Aux_RSSI)); - - //2 Select MaxRSSI for DIG - LocalMaxRSSI = (Main_RSSI>Aux_RSSI)?Main_RSSI:Aux_RSSI; - if((LocalMaxRSSI > AntDivMaxRSSI) && (LocalMaxRSSI < 40)) - AntDivMaxRSSI = LocalMaxRSSI; - if(LocalMaxRSSI > MaxRSSI) - MaxRSSI = LocalMaxRSSI; - - //2 Select RX Idle Antenna - if((pDM_FatTable->RxIdleAnt == MAIN_ANT) && (Main_RSSI == 0)) - Main_RSSI = Aux_RSSI; - else if((pDM_FatTable->RxIdleAnt == AUX_ANT) && (Aux_RSSI == 0)) - Aux_RSSI = Main_RSSI; - - LocalMinRSSI = (Main_RSSI>Aux_RSSI)?Aux_RSSI:Main_RSSI; - if(LocalMinRSSI < MinRSSI) - { - MinRSSI = LocalMinRSSI; - RxIdleAnt = TargetAnt; - } -#if TX_BY_REG - -#else - //2 Select TRX Antenna - if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) - odm_UpdateTxAnt_88E(pDM_Odm, TargetAnt, i); -#endif - } - pDM_FatTable->MainAnt_Sum[i] = 0; - pDM_FatTable->AuxAnt_Sum[i] = 0; - pDM_FatTable->MainAnt_Cnt[i] = 0; - pDM_FatTable->AuxAnt_Cnt[i] = 0; - } - - //2 Set RX Idle Antenna - ODM_UpdateRxIdleAnt_88E(pDM_Odm, RxIdleAnt); - - pDM_DigTable->AntDiv_RSSI_max = AntDivMaxRSSI; - pDM_DigTable->RSSI_max = MaxRSSI; -} - - -#if (!(DM_ODM_SUPPORT_TYPE == ODM_CE)) -VOID -odm_SetNextMACAddrTarget( - IN PDM_ODM_T pDM_Odm -) -{ - pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; - PSTA_INFO_T pEntry; - //u1Byte Bssid[6]; - u4Byte value32, i; - - // - //2012.03.26 LukeLee: The MAC address is changed according to MACID in turn - // - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SetNextMACAddrTarget() ==>\n")); - if(pDM_Odm->bLinked) - { - for (i=0; iTrainIdx+1) == ODM_ASSOCIATE_ENTRY_NUM) - pDM_FatTable->TrainIdx = 0; - else - pDM_FatTable->TrainIdx++; - - pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx]; - if(IS_STA_VALID(pEntry)) - { - //Match MAC ADDR -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - value32 = (pEntry->hwaddr[5]<<8)|pEntry->hwaddr[4]; -#else - value32 = (pEntry->MacAddr[5]<<8)|pEntry->MacAddr[4]; -#endif - ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, value32); -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - value32 = (pEntry->hwaddr[3]<<24)|(pEntry->hwaddr[2]<<16) |(pEntry->hwaddr[1]<<8) |pEntry->hwaddr[0]; -#else - value32 = (pEntry->MacAddr[3]<<24)|(pEntry->MacAddr[2]<<16) |(pEntry->MacAddr[1]<<8) |pEntry->MacAddr[0]; -#endif - ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, value32); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_FatTable->TrainIdx=%d\n",pDM_FatTable->TrainIdx)); -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n", - pEntry->hwaddr[5],pEntry->hwaddr[4],pEntry->hwaddr[3],pEntry->hwaddr[2],pEntry->hwaddr[1],pEntry->hwaddr[0])); -#else - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n", - pEntry->MacAddr[5],pEntry->MacAddr[4],pEntry->MacAddr[3],pEntry->MacAddr[2],pEntry->MacAddr[1],pEntry->MacAddr[0])); -#endif - - break; - } - } - - } - -#if 0 - // - //2012.03.26 LukeLee: This should be removed later, the MAC address is changed according to MACID in turn - // - #if( DM_ODM_SUPPORT_TYPE & ODM_MP) - { - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - - for (i=0; i<6; i++) - { - Bssid[i] = pMgntInfo->Bssid[i]; - //DbgPrint("Bssid[%d]=%x\n", i, Bssid[i]); - } - } - #endif - - //odm_SetNextMACAddrTarget(pDM_Odm); - - //1 Select MAC Address Filter - for (i=0; i<6; i++) - { - if(Bssid[i] != pDM_FatTable->Bssid[i]) - { - bMatchBSSID = FALSE; - break; - } - } - if(bMatchBSSID == FALSE) - { - //Match MAC ADDR - value32 = (Bssid[5]<<8)|Bssid[4]; - ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, value32); - value32 = (Bssid[3]<<24)|(Bssid[2]<<16) |(Bssid[1]<<8) |Bssid[0]; - ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, value32); - } - - return bMatchBSSID; -#endif - -} - -VOID -odm_FastAntTraining( - IN PDM_ODM_T pDM_Odm -) -{ - u4Byte i, MaxRSSI=0; - u1Byte TargetAnt=2; - pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; - BOOLEAN bPktFilterMacth = FALSE; - PSTA_INFO_T pEntry; - - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("==>odm_FastAntTraining()\n")); - - //1 TRAINING STATE - if(pDM_FatTable->FAT_State == FAT_TRAINING_STATE) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Enter FAT_TRAINING_STATE\n")); - //2 Caculate RSSI per Antenna - for (i=0; i<7; i++) - { - if(pDM_FatTable->antRSSIcnt[i] == 0) - pDM_FatTable->antAveRSSI[i] = 0; - else - { - pDM_FatTable->antAveRSSI[i] = pDM_FatTable->antSumRSSI[i] /pDM_FatTable->antRSSIcnt[i]; - bPktFilterMacth = TRUE; - } - if(pDM_FatTable->antAveRSSI[i] > MaxRSSI) - { - MaxRSSI = pDM_FatTable->antAveRSSI[i]; - TargetAnt = (u1Byte) i; - } - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_FatTable->antAveRSSI[%d] = %d, pDM_FatTable->antRSSIcnt[%d] = %d\n", - i, pDM_FatTable->antAveRSSI[i], i, pDM_FatTable->antRSSIcnt[i])); - } - - //2 Select TRX Antenna - if(bPktFilterMacth == FALSE) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("None Packet is matched\n")); - - ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 0); //RegE08[16]=1'b0 //disable fast training - ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv - } - else - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TargetAnt=%d, MaxRSSI=%d\n",TargetAnt,MaxRSSI)); - - ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 0); //RegE08[16]=1'b0 //disable fast training - //ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv - ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, TargetAnt); //Default RX is Omni, Optional RX is the best decision by FAT - //ODM_SetBBReg(pDM_Odm, 0x860 , BIT14|BIT13|BIT12, TargetAnt); //Default TX - ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 1); //Reg80c[21]=1'b1 //from TX Info - -#if 0 - pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx]; - - if(IS_STA_VALID(pEntry)) - { - pEntry->antsel_a = TargetAnt&BIT0; - pEntry->antsel_b = (TargetAnt&BIT1)>>1; - pEntry->antsel_c = (TargetAnt&BIT2)>>2; - } -#else - pDM_FatTable->antsel_a[pDM_FatTable->TrainIdx] = TargetAnt&BIT0; - pDM_FatTable->antsel_b[pDM_FatTable->TrainIdx] = (TargetAnt&BIT1)>>1; - pDM_FatTable->antsel_c[pDM_FatTable->TrainIdx] = (TargetAnt&BIT2)>>2; -#endif - - - if(TargetAnt == 0) - ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv - - } - - //2 Reset Counter - for(i=0; i<7; i++) - { - pDM_FatTable->antSumRSSI[i] = 0; - pDM_FatTable->antRSSIcnt[i] = 0; - } - - pDM_FatTable->FAT_State = FAT_NORMAL_STATE; - return; - } - - //1 NORMAL STATE - if(pDM_FatTable->FAT_State == FAT_NORMAL_STATE) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Enter FAT_NORMAL_STATE\n")); - - odm_SetNextMACAddrTarget(pDM_Odm); - -#if 0 - pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx]; - if(IS_STA_VALID(pEntry)) - { - pEntry->antsel_a = TargetAnt&BIT0; - pEntry->antsel_b = (TargetAnt&BIT1)>>1; - pEntry->antsel_c = (TargetAnt&BIT2)>>2; - } -#endif - - //2 Prepare Training - pDM_FatTable->FAT_State = FAT_TRAINING_STATE; - ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 1); //RegE08[16]=1'b1 //enable fast training - ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 1); //RegC50[7]=1'b1 //enable HW AntDiv - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Start FAT_TRAINING_STATE\n")); - ODM_SetTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, 500 ); //ms - - } - -} - -VOID -odm_FastAntTrainingCallback( - IN PDM_ODM_T pDM_Odm -) -{ - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PADAPTER padapter = pDM_Odm->Adapter; - if(padapter->net_closed == _TRUE) - return; - //if(*pDM_Odm->pbNet_closed == TRUE) - // return; -#endif - -#if USE_WORKITEM - ODM_ScheduleWorkItem(&pDM_Odm->FastAntTrainingWorkitem); -#else - odm_FastAntTraining(pDM_Odm); -#endif -} - -VOID -odm_FastAntTrainingWorkItemCallback( - IN PDM_ODM_T pDM_Odm -) -{ - odm_FastAntTraining(pDM_Odm); -} -#endif - -VOID -ODM_AntennaDiversity_88E( - IN PDM_ODM_T pDM_Odm -) -{ - pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; - if((pDM_Odm->SupportICType != ODM_RTL8188E) || (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV))) - { - //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_AntennaDiversity_88E: Not Support 88E AntDiv\n")); - return; - } -#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV - if(pDM_Odm->bLinked){ - if(pDM_Odm->Adapter->registrypriv.force_ant != 0) - { - u4Byte Main_RSSI, Aux_RSSI; - u8 i=0; - Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; - Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MacID=%d, MainAnt_Sum=%d, MainAnt_Cnt=%d\n", i, pDM_FatTable->MainAnt_Sum[i], pDM_FatTable->MainAnt_Cnt[i])); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MacID=%d, AuxAnt_Sum=%d, AuxAnt_Cnt=%d\n",i, pDM_FatTable->AuxAnt_Sum[i], pDM_FatTable->AuxAnt_Cnt[i])); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MacID=%d, Main_RSSI= %d, Aux_RSSI= %d\n", i, Main_RSSI, Aux_RSSI)); - pDM_FatTable->MainAnt_Sum[i] = 0; - pDM_FatTable->AuxAnt_Sum[i] = 0; - pDM_FatTable->MainAnt_Cnt[i] = 0; - pDM_FatTable->AuxAnt_Cnt[i] = 0; - } - if(pDM_Odm->Adapter->registrypriv.force_ant==1){ - ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT); - printk("%s fixed antenna in Main ant\n",__FUNCTION__); - return; - } - else if(pDM_Odm->Adapter->registrypriv.force_ant==2){ - ODM_UpdateRxIdleAnt_88E(pDM_Odm, AUX_ANT); - printk("%s fixed antenna in AUX ant\n",__FUNCTION__); - return; - } - } -#endif - - - - if(!pDM_Odm->bLinked) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_AntennaDiversity_88E(): No Link.\n")); - if(pDM_FatTable->bBecomeLinked == TRUE) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn off HW AntDiv\n")); - ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); //RegC50[7]=1'b1 //enable HW AntDiv - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA1_11N , BIT15, 0); //Enable CCK AntDiv - if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) - ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N , BIT21, 0); //Reg80c[21]=1'b0 //from TX Reg - pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; - } - return; - } - else - { - if(pDM_FatTable->bBecomeLinked ==FALSE) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn on HW AntDiv\n")); - //Because HW AntDiv is disabled before Link, we enable HW AntDiv after link - ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 1); //RegC50[7]=1'b1 //enable HW AntDiv - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA1_11N , BIT15, 1); //Enable CCK AntDiv - //ODM_SetMACReg(pDM_Odm, 0x7B4 , BIT18, 1); //Response Tx by current HW antdiv - if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) - { -#if TX_BY_REG - ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N , BIT21, 0); //Reg80c[21]=1'b0 //from Reg -#else - ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N , BIT21, 1); //Reg80c[21]=1'b1 //from TX Info -#endif - } - pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; - } - } - - - - if((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)) - odm_HWAntDiv(pDM_Odm); - #if (!(DM_ODM_SUPPORT_TYPE == ODM_CE)) - else if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) - odm_FastAntTraining(pDM_Odm); - #endif -} - - -/* -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) -VOID -odm_FastAntTrainingCallback( - PRT_TIMER pTimer -) -{ - PADAPTER Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - //#if DEV_BUS_TYPE==RT_PCI_INTERFACE - //#if USE_WORKITEM - //PlatformScheduleWorkItem(&pHalData->SwAntennaSwitchWorkitem); - //#else - odm_FastAntTraining(&pHalData->DM_OutSrc); - //#endif - //#else - //PlatformScheduleWorkItem(&pHalData->SwAntennaSwitchWorkitem); - //#endif - -} -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -VOID odm_FastAntTrainingCallback(void *FunctionContext) -{ - PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; - PADAPTER padapter = pDM_Odm->Adapter; - if(padapter->net_closed == _TRUE) - return; - odm_FastAntTraining(pDM_Odm); -} -#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) -VOID odm_FastAntTrainingCallback(void *FunctionContext) -{ - PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; - odm_FastAntTraining(pDM_Odm); -} - -#endif -*/ - -#else //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) -VOID -ODM_SetTxAntByTxInfo_88E( - IN PDM_ODM_T pDM_Odm, - IN pu1Byte pDesc, - IN u1Byte macId - ) -{ -} -#else// (DM_ODM_SUPPORT_TYPE == ODM_AP) -VOID -ODM_SetTxAntByTxInfo_88E( - IN PDM_ODM_T pDM_Odm - ) -{ -} -#endif -#endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) -//3============================================================ -//3 Dynamic Primary CCA -//3============================================================ - -VOID -odm_PrimaryCCA_Init( - IN PDM_ODM_T pDM_Odm) -{ - pPri_CCA_T PrimaryCCA = &(pDM_Odm->DM_PriCCA); - PrimaryCCA->DupRTS_flag = 0; - PrimaryCCA->intf_flag = 0; - PrimaryCCA->intf_type = 0; - PrimaryCCA->Monitor_flag = 0; - PrimaryCCA->PriCCA_flag = 0; -} - -BOOLEAN -ODM_DynamicPrimaryCCA_DupRTS( - IN PDM_ODM_T pDM_Odm - ) -{ - pPri_CCA_T PrimaryCCA = &(pDM_Odm->DM_PriCCA); - - return PrimaryCCA->DupRTS_flag; -} - -VOID -odm_DynamicPrimaryCCA( - IN PDM_ODM_T pDM_Odm - ) -{ - PADAPTER Adapter = pDM_Odm->Adapter; // for NIC - prtl8192cd_priv priv = pDM_Odm->priv; // for AP - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -#if (DM_ODM_SUPPORT_TYPE & (ODM_MP)) - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - PRT_WLAN_STA pEntry; -#endif - - PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); - pPri_CCA_T PrimaryCCA = &(pDM_Odm->DM_PriCCA); - - BOOLEAN Is40MHz; - BOOLEAN Client_40MHz = FALSE, Client_tmp = FALSE; // connected client BW - BOOLEAN bConnected = FALSE; // connected or not - static u1Byte Client_40MHz_pre = 0; - static u8Byte lastTxOkCnt = 0; - static u8Byte lastRxOkCnt = 0; - static u4Byte Counter = 0; - static u1Byte Delay = 1; - u8Byte curTxOkCnt; - u8Byte curRxOkCnt; - u1Byte SecCHOffset; - u1Byte i; - -#if((DM_ODM_SUPPORT_TYPE==ODM_ADSL) ||( DM_ODM_SUPPORT_TYPE==ODM_CE)) - return; -#endif - - if(pDM_Odm->SupportICType != ODM_RTL8188E) - return; - - Is40MHz = *(pDM_Odm->pBandWidth); - SecCHOffset = *(pDM_Odm->pSecChOffset); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Second CH Offset = %d\n", SecCHOffset)); - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - if(Is40MHz==1) - SecCHOffset = SecCHOffset%2+1; // NIC's definition is reverse to AP 1:secondary below, 2: secondary above - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Second CH Offset = %d\n", SecCHOffset)); - //3 Check Current WLAN Traffic - curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; - curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; - lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; - lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; -#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) - //3 Check Current WLAN Traffic - curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast)-lastTxOkCnt; - curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast)-lastRxOkCnt; - lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); - lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); -#endif - - //==================Debug Message==================== - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("TP = %llu\n", curTxOkCnt+curRxOkCnt)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Is40MHz = %d\n", Is40MHz)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("BW_LSC = %d\n", FalseAlmCnt->Cnt_BW_LSC)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("BW_USC = %d\n", FalseAlmCnt->Cnt_BW_USC)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCA OFDM = %d\n", FalseAlmCnt->Cnt_OFDM_CCA)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCA CCK = %d\n", FalseAlmCnt->Cnt_CCK_CCA)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("OFDM FA = %d\n", FalseAlmCnt->Cnt_Ofdm_fail)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCK FA = %d\n", FalseAlmCnt->Cnt_Cck_fail)); - //================================================ - -#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - if (ACTING_AS_AP(Adapter)) // primary cca process only do at AP mode -#endif - { - - #if (DM_ODM_SUPPORT_TYPE == ODM_MP) - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("ACTING as AP mode=%d\n", ACTING_AS_AP(Adapter))); - //3 To get entry's connection and BW infomation status. - for(i=0;iHTInfo.bBw40MHz; // client BW - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Client_BW=%d\n", Client_tmp)); - if(Client_tmp>Client_40MHz) - Client_40MHz = Client_tmp; // 40M/20M coexist => 40M priority is High - - if(pEntry->bAssociated) - { - bConnected=TRUE; // client is connected or not - break; - } - } - else - { - break; - } - } -#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) - //3 To get entry's connection and BW infomation status. - - PSTA_INFO_T pstat; - - for(i=0; ipODM_StaInfo[i]; - if(IS_STA_VALID(pstat) ) - { - Client_tmp = pstat->tx_bw; - if(Client_tmp>Client_40MHz) - Client_40MHz = Client_tmp; // 40M/20M coexist => 40M priority is High - - bConnected = TRUE; - } - } -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("bConnected=%d\n", bConnected)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Is Client 40MHz=%d\n", Client_40MHz)); - //1 Monitor whether the interference exists or not - if(PrimaryCCA->Monitor_flag == 1) - { - if(SecCHOffset == 1) // secondary channel is below the primary channel - { - if((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_LSC > FalseAlmCnt->Cnt_BW_USC+500)) - { - if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) - { - PrimaryCCA->intf_type = 1; - PrimaryCCA->PriCCA_flag = 1; - ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2); // USC MF - if(PrimaryCCA->DupRTS_flag == 1) - PrimaryCCA->DupRTS_flag = 0; - } - else - { - PrimaryCCA->intf_type = 2; - if(PrimaryCCA->DupRTS_flag == 0) - PrimaryCCA->DupRTS_flag = 1; - } - - } - else // interferecne disappear - { - PrimaryCCA->DupRTS_flag = 0; - PrimaryCCA->intf_flag = 0; - PrimaryCCA->intf_type = 0; - } - } - else if(SecCHOffset == 2) // secondary channel is above the primary channel - { - if((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_USC > FalseAlmCnt->Cnt_BW_LSC+500)) - { - if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) - { - PrimaryCCA->intf_type = 1; - PrimaryCCA->PriCCA_flag = 1; - ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1); // LSC MF - if(PrimaryCCA->DupRTS_flag == 1) - PrimaryCCA->DupRTS_flag = 0; - } - else - { - PrimaryCCA->intf_type = 2; - if(PrimaryCCA->DupRTS_flag == 0) - PrimaryCCA->DupRTS_flag = 1; - } - - } - else // interferecne disappear - { - PrimaryCCA->DupRTS_flag = 0; - PrimaryCCA->intf_flag = 0; - PrimaryCCA->intf_type = 0; - } - - - } - PrimaryCCA->Monitor_flag = 0; - } - - //1 Dynamic Primary CCA Main Function - if(PrimaryCCA->Monitor_flag == 0) - { - if(Is40MHz) // if RFBW==40M mode which require to process primary cca - { - //2 STA is NOT Connected - if(!bConnected) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA NOT Connected!!!!\n")); - - if(PrimaryCCA->PriCCA_flag == 1) // reset primary cca when STA is disconnected - { - PrimaryCCA->PriCCA_flag = 0; - ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 0); - } - if(PrimaryCCA->DupRTS_flag == 1) // reset Duplicate RTS when STA is disconnected - PrimaryCCA->DupRTS_flag = 0; - - if(SecCHOffset == 1) // secondary channel is below the primary channel - { - if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9)) - { - PrimaryCCA->intf_flag = 1; // secondary channel interference is detected!!! - if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) - PrimaryCCA->intf_type = 1; // interference is shift - else - PrimaryCCA->intf_type = 2; // interference is in-band - } - else - { - PrimaryCCA->intf_flag = 0; - PrimaryCCA->intf_type = 0; - } - } - else if(SecCHOffset == 2) // secondary channel is above the primary channel - { - if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9)) - { - PrimaryCCA->intf_flag = 1; // secondary channel interference is detected!!! - if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) - PrimaryCCA->intf_type = 1; // interference is shift - else - PrimaryCCA->intf_type = 2; // interference is in-band - } - else - { - PrimaryCCA->intf_flag = 0; - PrimaryCCA->intf_type = 0; - } - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("PrimaryCCA=%d\n",PrimaryCCA->PriCCA_flag)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Intf_Type=%d\n", PrimaryCCA->intf_type)); - } - //2 STA is Connected - else - { - if(Client_40MHz == 0) //3 // client BW = 20MHz - { - if(PrimaryCCA->PriCCA_flag == 0) - { - PrimaryCCA->PriCCA_flag = 1; - if(SecCHOffset==1) - ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2); - else if(SecCHOffset==2) - ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1); - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA Connected 20M!!! PrimaryCCA=%d\n", PrimaryCCA->PriCCA_flag)); - } - else //3 // client BW = 40MHz - { - if(PrimaryCCA->intf_flag == 1) // interference is detected!! - { - if(PrimaryCCA->intf_type == 1) - { - if(PrimaryCCA->PriCCA_flag!=1) - { - PrimaryCCA->PriCCA_flag = 1; - if(SecCHOffset==1) - ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2); - else if(SecCHOffset==2) - ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1); - } - } - else if(PrimaryCCA->intf_type == 2) - { - if(PrimaryCCA->DupRTS_flag!=1) - PrimaryCCA->DupRTS_flag = 1; - } - } - else // if intf_flag==0 - { - if((curTxOkCnt+curRxOkCnt)<10000) //idle mode or TP traffic is very low - { - if(SecCHOffset == 1) - { - if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9)) - { - PrimaryCCA->intf_flag = 1; - if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) - PrimaryCCA->intf_type = 1; // interference is shift - else - PrimaryCCA->intf_type = 2; // interference is in-band - } - } - else if(SecCHOffset == 2) - { - if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9)) - { - PrimaryCCA->intf_flag = 1; - if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) - PrimaryCCA->intf_type = 1; // interference is shift - else - PrimaryCCA->intf_type = 2; // interference is in-band - } - - } - } - else // TP Traffic is High - { - if(SecCHOffset == 1) - { - if(FalseAlmCnt->Cnt_BW_LSC > (FalseAlmCnt->Cnt_BW_USC+500)) - { - if(Delay == 0) // add delay to avoid interference occurring abruptly, jump one time - { - PrimaryCCA->intf_flag = 1; - if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) - PrimaryCCA->intf_type = 1; // interference is shift - else - PrimaryCCA->intf_type = 2; // interference is in-band - Delay = 1; - } - else - Delay = 0; - } - } - else if(SecCHOffset == 2) - { - if(FalseAlmCnt->Cnt_BW_USC > (FalseAlmCnt->Cnt_BW_LSC+500)) - { - if(Delay == 0) // add delay to avoid interference occurring abruptly - { - PrimaryCCA->intf_flag = 1; - if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) - PrimaryCCA->intf_type = 1; // interference is shift - else - PrimaryCCA->intf_type = 2; // interference is in-band - Delay = 1; - } - else - Delay = 0; - } - } - } - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Primary CCA=%d\n", PrimaryCCA->PriCCA_flag)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Duplicate RTS=%d\n", PrimaryCCA->DupRTS_flag)); - } - - }// end of connected - } - } - //1 Dynamic Primary CCA Monitor Counter - if((PrimaryCCA->PriCCA_flag == 1)||(PrimaryCCA->DupRTS_flag == 1)) - { - if(Client_40MHz == 0) // client=20M no need to monitor primary cca flag - { - Client_40MHz_pre = Client_40MHz; - return; - } - Counter++; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Counter=%d\n", Counter)); - if((Counter == 30)||((Client_40MHz -Client_40MHz_pre)==1)) // Every 60 sec to monitor one time - { - PrimaryCCA->Monitor_flag = 1; // monitor flag is triggered!!!!! - if(PrimaryCCA->PriCCA_flag == 1) - { - PrimaryCCA->PriCCA_flag = 0; - ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 0); - } - Counter = 0; - } - } - } - - Client_40MHz_pre = Client_40MHz; -} -#else //#if (RTL8188E_SUPPORT == 1) -VOID -ODM_UpdateRxIdleAnt_88E(IN PDM_ODM_T pDM_Odm, IN u1Byte Ant) -{ -} -VOID -odm_PrimaryCCA_Init( - IN PDM_ODM_T pDM_Odm) -{ -} -VOID -odm_DynamicPrimaryCCA( - IN PDM_ODM_T pDM_Odm - ) -{ -} -BOOLEAN -ODM_DynamicPrimaryCCA_DupRTS( - IN PDM_ODM_T pDM_Odm - ) -{ - return FALSE; -} -#endif //#if (RTL8188E_SUPPORT == 1) - diff --git a/hal/OUTSRC/rtl8188e/odm_RegConfig8188E.c b/hal/OUTSRC/rtl8188e/odm_RegConfig8188E.c deleted file mode 100755 index e0e7c8b..0000000 --- a/hal/OUTSRC/rtl8188e/odm_RegConfig8188E.c +++ /dev/null @@ -1,209 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -#include "../odm_precomp.h" - -#if (RTL8188E_SUPPORT == 1) - -void -odm_ConfigRFReg_8188E( - IN PDM_ODM_T pDM_Odm, - IN u4Byte Addr, - IN u4Byte Data, - IN ODM_RF_RADIO_PATH_E RF_PATH, - IN u4Byte RegAddr - ) -{ - if(Addr == 0xffe) - { - #ifdef CONFIG_LONG_DELAY_ISSUE - ODM_sleep_ms(50); - #else - ODM_delay_ms(50); - #endif - } - else if (Addr == 0xfd) - { - ODM_delay_ms(5); - } - else if (Addr == 0xfc) - { - ODM_delay_ms(1); - } - else if (Addr == 0xfb) - { - ODM_delay_us(50); - } - else if (Addr == 0xfa) - { - ODM_delay_us(5); - } - else if (Addr == 0xf9) - { - ODM_delay_us(1); - } - else - { - ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); - // Add 1us delay between BB/RF register setting. - ODM_delay_us(1); - } -} - - -void -odm_ConfigRF_RadioA_8188E( - IN PDM_ODM_T pDM_Odm, - IN u4Byte Addr, - IN u4Byte Data - ) -{ - u4Byte content = 0x1000; // RF_Content: radioa_txt - u4Byte maskforPhySet= (u4Byte)(content&0xE000); - - odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_A, Addr|maskforPhySet); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data)); -} - -void -odm_ConfigRF_RadioB_8188E( - IN PDM_ODM_T pDM_Odm, - IN u4Byte Addr, - IN u4Byte Data - ) -{ - u4Byte content = 0x1001; // RF_Content: radiob_txt - u4Byte maskforPhySet= (u4Byte)(content&0xE000); - - odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data)); - -} - -void -odm_ConfigMAC_8188E( - IN PDM_ODM_T pDM_Odm, - IN u4Byte Addr, - IN u1Byte Data - ) -{ - ODM_Write1Byte(pDM_Odm, Addr, Data); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data)); -} - -void -odm_ConfigBB_AGC_8188E( - IN PDM_ODM_T pDM_Odm, - IN u4Byte Addr, - IN u4Byte Bitmask, - IN u4Byte Data - ) -{ - ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); - // Add 1us delay between BB/RF register setting. - ODM_delay_us(1); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n", Addr, Data)); -} - -void -odm_ConfigBB_PHY_REG_PG_8188E( - IN PDM_ODM_T pDM_Odm, - IN u4Byte Addr, - IN u4Byte Bitmask, - IN u4Byte Data - ) -{ - if (Addr == 0xfe){ - #ifdef CONFIG_LONG_DELAY_ISSUE - ODM_sleep_ms(50); - #else - ODM_delay_ms(50); - #endif - } - else if (Addr == 0xfd){ - ODM_delay_ms(5); - } - else if (Addr == 0xfc){ - ODM_delay_ms(1); - } - else if (Addr == 0xfb){ - ODM_delay_us(50); - } - else if (Addr == 0xfa){ - ODM_delay_us(5); - } - else if (Addr == 0xf9){ - ODM_delay_us(1); - } - else{ - ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, ("===> @@@@@@@ ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data)); - - #if !(DM_ODM_SUPPORT_TYPE&ODM_AP) - storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data); - #endif - } - -} - -void -odm_ConfigBB_PHY_8188E( - IN PDM_ODM_T pDM_Odm, - IN u4Byte Addr, - IN u4Byte Bitmask, - IN u4Byte Data - ) -{ - if (Addr == 0xfe){ - #ifdef CONFIG_LONG_DELAY_ISSUE - ODM_sleep_ms(50); - #else - ODM_delay_ms(50); - #endif - } - else if (Addr == 0xfd){ - ODM_delay_ms(5); - } - else if (Addr == 0xfc){ - ODM_delay_ms(1); - } - else if (Addr == 0xfb){ - ODM_delay_us(50); - } - else if (Addr == 0xfa){ - ODM_delay_us(5); - } - else if (Addr == 0xf9){ - ODM_delay_us(1); - } - else{ - if (Addr == 0xa24) - pDM_Odm->RFCalibrateInfo.RegA24 = Data; - ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); - - // Add 1us delay between BB/RF register setting. - ODM_delay_us(1); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data)); - } -} -#endif - diff --git a/hal/odm.c b/hal/odm.c old mode 100644 new mode 100755 index 4cff2dc..a20edf7 --- a/hal/odm.c +++ b/hal/odm.c @@ -1,7 +1,7 @@ /****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * + * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. @@ -18,528 +18,1551 @@ * ******************************************************************************/ -/* include files */ +//============================================================ +// include files +//============================================================ #include "odm_precomp.h" -static const u16 dB_Invert_Table[8][12] = { - {1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4}, - {4, 5, 6, 6, 7, 8, 9, 10, 11, 13, 14, 16}, - {18, 20, 22, 25, 28, 32, 35, 40, 45, 50, 56, 63}, - {71, 79, 89, 100, 112, 126, 141, 158, 178, 200, 224, 251}, - {282, 316, 355, 398, 447, 501, 562, 631, 708, 794, 891, 1000}, - {1122, 1259, 1413, 1585, 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981}, - {4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000, 11220, 12589, 14125, 15849}, - {17783, 19953, 22387, 25119, 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535} + + +const u2Byte dB_Invert_Table[8][12] = { + { 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4}, + { 4, 5, 6, 6, 7, 8, 9, 10, 11, 13, 14, 16}, + { 18, 20, 22, 25, 28, 32, 35, 40, 45, 50, 56, 63}, + { 71, 79, 89, 100, 112, 126, 141, 158, 178, 200, 224, 251}, + { 282, 316, 355, 398, 447, 501, 562, 631, 708, 794, 891, 1000}, + { 1122, 1259, 1413, 1585, 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981}, + { 4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000, 11220, 12589, 14125, 15849}, + { 17783, 19953, 22387, 25119, 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535}}; + +// 20100515 Joseph: Add global variable to keep temporary scan list for antenna switching test. +//u1Byte tmpNumBssDesc; +//RT_WLAN_BSS tmpbssDesc[MAX_BSS_DESC]; + +#if (DM_ODM_SUPPORT_TYPE==ODM_MP) +static u4Byte edca_setting_UL[HT_IOT_PEER_MAX] = +// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MARVELL 92U_AP SELF_AP(DownLink/Tx) +{ 0x5e4322, 0xa44f, 0x5e4322, 0x5ea32b, 0x5ea422, 0x5ea322, 0x3ea430, 0x5ea44f, 0x5e4322, 0x5e4322}; + + +static u4Byte edca_setting_DL[HT_IOT_PEER_MAX] = +// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MARVELL 92U_AP SELF_AP(UpLink/Rx) +{ 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea42b, 0xa44f, 0xa630, 0x5ea630, 0xa44f, 0xa42b, 0xa42b}; + +static u4Byte edca_setting_DL_GMode[HT_IOT_PEER_MAX] = +// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MARVELL 92U_AP SELF_AP +{ 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0xa44f, 0x5e4322, 0x5ea42b}; + + +//============================================================ +#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) + + +//avoid to warn in FreeBSD ==> To DO modify +u4Byte EDCAParam[HT_IOT_PEER_MAX][3] = +{ // UL DL + {0x5ea42b, 0x5ea42b, 0x5ea42b}, //0:unknown AP + {0xa44f, 0x5ea44f, 0x5e431c}, // 1:realtek AP + {0x5ea42b, 0x5ea42b, 0x5ea42b}, // 2:unknown AP => realtek_92SE + {0x5ea32b, 0x5ea42b, 0x5e4322}, // 3:broadcom AP + {0x5ea422, 0x00a44f, 0x00a44f}, // 4:ralink AP + {0x5ea322, 0x00a630, 0x00a44f}, // 5:atheros AP + //{0x5ea42b, 0x5ea42b, 0x5ea42b},// 6:cisco AP + {0x5e4322, 0x5e4322, 0x5e4322},// 6:cisco AP + //{0x3ea430, 0x00a630, 0x3ea44f}, // 7:cisco AP + {0x5ea44f, 0x00a44f, 0x5ea42b}, // 8:marvell AP + //{0x5ea44f, 0x5ea44f, 0x5ea44f}, // 9realtek AP + {0x5ea42b, 0x5ea42b, 0x5ea42b}, // 10:unknown AP=> 92U AP + {0x5ea42b, 0xa630, 0x5e431c}, // 11:airgocap AP +// {0x5e4322, 0x00a44f, 0x5ea44f}, // 12:unknown AP +}; +//============================================================ +// EDCA Paramter for AP/ADSL by Mingzhi 2011-11-22 +//============================================================ +#elif (DM_ODM_SUPPORT_TYPE &ODM_ADSL) +enum qos_prio { BK, BE, VI, VO, VI_AG, VO_AG }; + +static const struct ParaRecord rtl_ap_EDCA[] = +{ +//ACM,AIFSN, ECWmin, ECWmax, TXOplimit + {0, 7, 4, 10, 0}, //BK + {0, 3, 4, 6, 0}, //BE + {0, 1, 3, 4, 188}, //VI + {0, 1, 2, 3, 102}, //VO + {0, 1, 3, 4, 94}, //VI_AG + {0, 1, 2, 3, 47}, //VO_AG }; -/* avoid to warn in FreeBSD ==> To DO modify */ -static u32 EDCAParam[HT_IOT_PEER_MAX][3] = { - /* UL DL */ - {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 0:unknown AP */ - {0xa44f, 0x5ea44f, 0x5e431c}, /* 1:realtek AP */ - {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 2:unknown AP => realtek_92SE */ - {0x5ea32b, 0x5ea42b, 0x5e4322}, /* 3:broadcom AP */ - {0x5ea422, 0x00a44f, 0x00a44f}, /* 4:ralink AP */ - {0x5ea322, 0x00a630, 0x00a44f}, /* 5:atheros AP */ - {0x5e4322, 0x5e4322, 0x5e4322},/* 6:cisco AP */ - {0x5ea44f, 0x00a44f, 0x5ea42b}, /* 8:marvell AP */ - {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 10:unknown AP=> 92U AP */ - {0x5ea42b, 0xa630, 0x5e431c}, /* 11:airgocap AP */ +static const struct ParaRecord rtl_sta_EDCA[] = +{ +//ACM,AIFSN, ECWmin, ECWmax, TXOplimit + {0, 7, 4, 10, 0}, + {0, 3, 4, 10, 0}, + {0, 2, 3, 4, 188}, + {0, 2, 2, 3, 102}, + {0, 2, 3, 4, 94}, + {0, 2, 2, 3, 47}, +}; +#endif + +//============================================================ +// Global var +//============================================================ +u4Byte OFDMSwingTable[OFDM_TABLE_SIZE_92D] = { + 0x7f8001fe, // 0, +6.0dB + 0x788001e2, // 1, +5.5dB + 0x71c001c7, // 2, +5.0dB + 0x6b8001ae, // 3, +4.5dB + 0x65400195, // 4, +4.0dB + 0x5fc0017f, // 5, +3.5dB + 0x5a400169, // 6, +3.0dB + 0x55400155, // 7, +2.5dB + 0x50800142, // 8, +2.0dB + 0x4c000130, // 9, +1.5dB + 0x47c0011f, // 10, +1.0dB + 0x43c0010f, // 11, +0.5dB + 0x40000100, // 12, +0dB + 0x3c8000f2, // 13, -0.5dB + 0x390000e4, // 14, -1.0dB + 0x35c000d7, // 15, -1.5dB + 0x32c000cb, // 16, -2.0dB + 0x300000c0, // 17, -2.5dB + 0x2d4000b5, // 18, -3.0dB + 0x2ac000ab, // 19, -3.5dB + 0x288000a2, // 20, -4.0dB + 0x26000098, // 21, -4.5dB + 0x24000090, // 22, -5.0dB + 0x22000088, // 23, -5.5dB + 0x20000080, // 24, -6.0dB + 0x1e400079, // 25, -6.5dB + 0x1c800072, // 26, -7.0dB + 0x1b00006c, // 27. -7.5dB + 0x19800066, // 28, -8.0dB + 0x18000060, // 29, -8.5dB + 0x16c0005b, // 30, -9.0dB + 0x15800056, // 31, -9.5dB + 0x14400051, // 32, -10.0dB + 0x1300004c, // 33, -10.5dB + 0x12000048, // 34, -11.0dB + 0x11000044, // 35, -11.5dB + 0x10000040, // 36, -12.0dB + 0x0f00003c,// 37, -12.5dB + 0x0e400039,// 38, -13.0dB + 0x0d800036,// 39, -13.5dB + 0x0cc00033,// 40, -14.0dB + 0x0c000030,// 41, -14.5dB + 0x0b40002d,// 42, -15.0dB }; -/* Global var */ -u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = { - 0x7f8001fe, /* 0, +6.0dB */ - 0x788001e2, /* 1, +5.5dB */ - 0x71c001c7, /* 2, +5.0dB */ - 0x6b8001ae, /* 3, +4.5dB */ - 0x65400195, /* 4, +4.0dB */ - 0x5fc0017f, /* 5, +3.5dB */ - 0x5a400169, /* 6, +3.0dB */ - 0x55400155, /* 7, +2.5dB */ - 0x50800142, /* 8, +2.0dB */ - 0x4c000130, /* 9, +1.5dB */ - 0x47c0011f, /* 10, +1.0dB */ - 0x43c0010f, /* 11, +0.5dB */ - 0x40000100, /* 12, +0dB */ - 0x3c8000f2, /* 13, -0.5dB */ - 0x390000e4, /* 14, -1.0dB */ - 0x35c000d7, /* 15, -1.5dB */ - 0x32c000cb, /* 16, -2.0dB */ - 0x300000c0, /* 17, -2.5dB */ - 0x2d4000b5, /* 18, -3.0dB */ - 0x2ac000ab, /* 19, -3.5dB */ - 0x288000a2, /* 20, -4.0dB */ - 0x26000098, /* 21, -4.5dB */ - 0x24000090, /* 22, -5.0dB */ - 0x22000088, /* 23, -5.5dB */ - 0x20000080, /* 24, -6.0dB */ - 0x1e400079, /* 25, -6.5dB */ - 0x1c800072, /* 26, -7.0dB */ - 0x1b00006c, /* 27. -7.5dB */ - 0x19800066, /* 28, -8.0dB */ - 0x18000060, /* 29, -8.5dB */ - 0x16c0005b, /* 30, -9.0dB */ - 0x15800056, /* 31, -9.5dB */ - 0x14400051, /* 32, -10.0dB */ - 0x1300004c, /* 33, -10.5dB */ - 0x12000048, /* 34, -11.0dB */ - 0x11000044, /* 35, -11.5dB */ - 0x10000040, /* 36, -12.0dB */ - 0x0f00003c,/* 37, -12.5dB */ - 0x0e400039,/* 38, -13.0dB */ - 0x0d800036,/* 39, -13.5dB */ - 0x0cc00033,/* 40, -14.0dB */ - 0x0c000030,/* 41, -14.5dB */ - 0x0b40002d,/* 42, -15.0dB */ + +u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { + {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB + {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB + {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB + {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB + {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB + {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB + {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB + {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB + {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB + {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB + {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB + {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB + {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB + {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB + {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB + {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB + {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB + {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB + {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB + {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB + {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB + {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB + {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB + {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB + {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB + {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB + {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB + {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB + {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB + {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB + {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB + {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB + {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB }; -u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { - {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */ - {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */ - {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */ - {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */ - {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */ - {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */ - {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */ - {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */ - {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */ - {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */ - {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */ - {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */ - {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */ - {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */ - {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */ - {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */ - {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ - {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */ - {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */ - {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */ - {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */ - {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */ - {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */ - {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */ - {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */ - {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */ - {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */ - {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */ - {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */ - {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */ - {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */ - {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */ - {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */ -}; -u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = { - {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */ - {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */ - {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */ - {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */ - {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */ - {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */ - {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */ - {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */ - {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */ - {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */ - {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */ - {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */ - {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */ - {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */ - {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */ - {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */ - {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ - {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */ - {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */ - {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */ - {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */ - {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */ - {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */ - {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */ - {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */ - {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */ - {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */ - {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */ - {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */ - {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */ - {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */ - {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */ - {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */ -}; +u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]= { + {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB + {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB + {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB + {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB + {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB + {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB + {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB + {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB + {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB + {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB + {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB + {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB + {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB + {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB + {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB + {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB + {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB + {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB + {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB + {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB + {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB + {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB + {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB + {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB + {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB + {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB + {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB + {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB + {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB + {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB + {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB + {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB + {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB +}; -#define RxDefaultAnt1 0x65a9 + +#ifdef AP_BUILD_WORKAROUND + +unsigned int TxPwrTrk_OFDM_SwingTbl[TxPwrTrk_OFDM_SwingTbl_Len] = { + /* +6.0dB */ 0x7f8001fe, + /* +5.5dB */ 0x788001e2, + /* +5.0dB */ 0x71c001c7, + /* +4.5dB */ 0x6b8001ae, + /* +4.0dB */ 0x65400195, + /* +3.5dB */ 0x5fc0017f, + /* +3.0dB */ 0x5a400169, + /* +2.5dB */ 0x55400155, + /* +2.0dB */ 0x50800142, + /* +1.5dB */ 0x4c000130, + /* +1.0dB */ 0x47c0011f, + /* +0.5dB */ 0x43c0010f, + /* 0.0dB */ 0x40000100, + /* -0.5dB */ 0x3c8000f2, + /* -1.0dB */ 0x390000e4, + /* -1.5dB */ 0x35c000d7, + /* -2.0dB */ 0x32c000cb, + /* -2.5dB */ 0x300000c0, + /* -3.0dB */ 0x2d4000b5, + /* -3.5dB */ 0x2ac000ab, + /* -4.0dB */ 0x288000a2, + /* -4.5dB */ 0x26000098, + /* -5.0dB */ 0x24000090, + /* -5.5dB */ 0x22000088, + /* -6.0dB */ 0x20000080, + /* -6.5dB */ 0x1a00006c, + /* -7.0dB */ 0x1c800072, + /* -7.5dB */ 0x18000060, + /* -8.0dB */ 0x19800066, + /* -8.5dB */ 0x15800056, + /* -9.0dB */ 0x26c0005b, + /* -9.5dB */ 0x14400051, + /* -10.0dB */ 0x24400051, + /* -10.5dB */ 0x1300004c, + /* -11.0dB */ 0x12000048, + /* -11.5dB */ 0x11000044, + /* -12.0dB */ 0x10000040 +}; +#endif + +//============================================================ +// Local Function predefine. +//============================================================ + +//START------------COMMON INFO RELATED---------------// +VOID +odm_CommonInfoSelfInit( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_CommonInfoSelfUpdate( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_CmnInfoInit_Debug( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_CmnInfoHook_Debug( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_CmnInfoUpdate_Debug( + IN PDM_ODM_T pDM_Odm + ); +/* +VOID +odm_FindMinimumRSSI( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_IsLinked( + IN PDM_ODM_T pDM_Odm + ); +*/ +//END------------COMMON INFO RELATED---------------// + +//START---------------DIG---------------------------// +VOID +odm_FalseAlarmCounterStatistics( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_DIGInit( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_DIG( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_CCKPacketDetectionThresh( + IN PDM_ODM_T pDM_Odm + ); +//END---------------DIG---------------------------// + +//START-------BB POWER SAVE-----------------------// +VOID +odm_DynamicBBPowerSavingInit( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_DynamicBBPowerSaving( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_1R_CCA( + IN PDM_ODM_T pDM_Odm + ); +VOID +odm_AdaptivityInit( + IN PDM_ODM_T pDM_Odm +); + +VOID +odm_Adaptivity( + IN PDM_ODM_T pDM_Odm, + IN u1Byte IGI +); +//END---------BB POWER SAVE-----------------------// + +//START-----------------PSD-----------------------// +#if(DM_ODM_SUPPORT_TYPE & (ODM_MP)) +//============================================================ +// Function predefine. +//============================================================ +VOID odm_PathDiversityInit_92C( IN PADAPTER Adapter); +VOID odm_2TPathDiversityInit_92C( IN PADAPTER Adapter); +VOID odm_1TPathDiversityInit_92C( IN PADAPTER Adapter); +BOOLEAN odm_IsConnected_92C(IN PADAPTER Adapter); +VOID odm_PathDiversityAfterLink_92C( IN PADAPTER Adapter); + +VOID +odm_CCKTXPathDiversityCallback( + PRT_TIMER pTimer + ); + +VOID +odm_CCKTXPathDiversityWorkItemCallback( + IN PVOID pContext + ); + +VOID +odm_PathDivChkAntSwitchCallback( + PRT_TIMER pTimer + ); + +VOID +odm_PathDivChkAntSwitchWorkitemCallback( + IN PVOID pContext + ); + +VOID odm_SetRespPath_92C( IN PADAPTER Adapter, IN u1Byte DefaultRespPath); +VOID odm_OFDMTXPathDiversity_92C( IN PADAPTER Adapter); +VOID odm_CCKTXPathDiversity_92C( IN PADAPTER Adapter); +VOID odm_ResetPathDiversity_92C( IN PADAPTER Adapter); + +//Start-------------------- RX High Power------------------------// +VOID odm_RXHPInit( IN PDM_ODM_T pDM_Odm); +VOID odm_RXHP( IN PDM_ODM_T pDM_Odm); +VOID odm_Write_RXHP( IN PDM_ODM_T pDM_Odm); + +VOID odm_PSD_RXHP( IN PDM_ODM_T pDM_Odm); +VOID odm_PSD_RXHPCallback( PRT_TIMER pTimer); +VOID odm_PSD_RXHPWorkitemCallback( IN PVOID pContext); +//End--------------------- RX High Power -----------------------// + +VOID +odm_PathDivInit( IN PDM_ODM_T pDM_Odm); + +VOID +odm_SetRespPath_92C( + IN PADAPTER Adapter, + IN u1Byte DefaultRespPath + ); + +#endif +//END-------------------PSD-----------------------// + +VOID +odm_RefreshRateAdaptiveMaskMP( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_RefreshRateAdaptiveMaskCE( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_RefreshRateAdaptiveMaskAPADSL( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_DynamicTxPowerInit( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_DynamicTxPowerRestorePowerIndex( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_DynamicTxPowerNIC( + IN PDM_ODM_T pDM_Odm + ); + +#if(DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) +VOID +odm_DynamicTxPowerSavePowerIndex( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_DynamicTxPowerWritePowerIndex( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Value); + +VOID +odm_DynamicTxPower_92C( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_DynamicTxPower_92D( + IN PDM_ODM_T pDM_Odm + ); +#endif + + +VOID +odm_RSSIMonitorInit( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_RSSIMonitorCheckMP( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_RSSIMonitorCheckCE( + IN PDM_ODM_T pDM_Odm + ); +VOID +odm_RSSIMonitorCheckAP( + IN PDM_ODM_T pDM_Odm + ); + + + +VOID +odm_RSSIMonitorCheck( + IN PDM_ODM_T pDM_Odm + ); +VOID +odm_DynamicTxPower( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_DynamicTxPowerAP( + IN PDM_ODM_T pDM_Odm + ); + + +VOID +odm_SwAntDivInit( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_SwAntDivInit_NIC( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_SwAntDivChkAntSwitch( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Step + ); + +VOID +odm_SwAntDivChkAntSwitchNIC( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Step + ); + + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) +VOID +odm_SwAntDivChkAntSwitchCallback( + PRT_TIMER pTimer +); +VOID +odm_SwAntDivChkAntSwitchWorkitemCallback( + IN PVOID pContext + ); +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) +VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext); +#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) +VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext); +#endif + + + +VOID +odm_GlobalAdapterCheck( + IN VOID + ); + +VOID +odm_RefreshRateAdaptiveMask( + IN PDM_ODM_T pDM_Odm + ); + +VOID +ODM_TXPowerTrackingCheck( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_TXPowerTrackingCheckAP( + IN PDM_ODM_T pDM_Odm + ); + + + + + + + +VOID +odm_RateAdaptiveMaskInit( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_TXPowerTrackingThermalMeterInit( + IN PDM_ODM_T pDM_Odm + ); + + +VOID +odm_TXPowerTrackingInit( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_TXPowerTrackingCheckMP( + IN PDM_ODM_T pDM_Odm + ); + + +VOID +odm_TXPowerTrackingCheckCE( + IN PDM_ODM_T pDM_Odm + ); + +#if(DM_ODM_SUPPORT_TYPE & (ODM_MP)) + +VOID +ODM_RateAdaptiveStateApInit( + IN PADAPTER Adapter , + IN PRT_WLAN_STA pEntry + ); + +VOID +odm_TXPowerTrackingCallbackThermalMeter92C( + IN PADAPTER Adapter + ); + +VOID +odm_TXPowerTrackingCallbackRXGainThermalMeter92D( + IN PADAPTER Adapter + ); + +VOID +odm_TXPowerTrackingCallbackThermalMeter92D( + IN PADAPTER Adapter + ); + +VOID +odm_TXPowerTrackingDirectCall92C( + IN PADAPTER Adapter + ); + +VOID +odm_TXPowerTrackingThermalMeterCheck( + IN PADAPTER Adapter + ); + +#endif + +VOID +odm_EdcaTurboCheck( + IN PDM_ODM_T pDM_Odm + ); +VOID +ODM_EdcaTurboInit( + IN PDM_ODM_T pDM_Odm +); + +#if(DM_ODM_SUPPORT_TYPE==ODM_MP) +VOID +odm_EdcaTurboCheckMP( + IN PDM_ODM_T pDM_Odm + ); + +//check if edca turbo is disabled +BOOLEAN +odm_IsEdcaTurboDisable( + IN PDM_ODM_T pDM_Odm +); +//choose edca paramter for special IOT case +VOID +ODM_EdcaParaSelByIot( + IN PDM_ODM_T pDM_Odm, + OUT u4Byte *EDCA_BE_UL, + OUT u4Byte *EDCA_BE_DL + ); +//check if it is UL or DL +VOID +odm_EdcaChooseTrafficIdx( + IN PDM_ODM_T pDM_Odm, + IN u8Byte cur_tx_bytes, + IN u8Byte cur_rx_bytes, + IN BOOLEAN bBiasOnRx, + OUT BOOLEAN *pbIsCurRDLState + ); + +#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) +VOID +odm_EdcaTurboCheckCE( + IN PDM_ODM_T pDM_Odm + ); +#else +VOID +odm_IotEngine( + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_EdcaParaInit( + IN PDM_ODM_T pDM_Odm + ); +#endif + + + +#define RxDefaultAnt1 0x65a9 #define RxDefaultAnt2 0x569a -/* 3 Export Interface */ +VOID +odm_InitHybridAntDiv( + IN PDM_ODM_T pDM_Odm + ); -/* 2011/09/21 MH Add to describe different team necessary resource allocate?? */ -void ODM_DMInit(struct odm_dm_struct *pDM_Odm) +BOOLEAN +odm_StaDefAntSel( + IN PDM_ODM_T pDM_Odm, + IN u4Byte OFDM_Ant1_Cnt, + IN u4Byte OFDM_Ant2_Cnt, + IN u4Byte CCK_Ant1_Cnt, + IN u4Byte CCK_Ant2_Cnt, + OUT u1Byte *pDefAnt + ); + +VOID +odm_SetRxIdleAnt( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Ant, + IN BOOLEAN bDualPath +); + + + +VOID +odm_HwAntDiv( + IN PDM_ODM_T pDM_Odm +); + + + + + +#if 0 +//#if ((DM_ODM_SUPPORT_TYPE==ODM_AP)&&defined(HW_ANT_SWITCH)) +VOID +odm_HW_AntennaSwitchInit( + IN PDM_ODM_T pDM_Odm +); + +VOID +odm_SetRxIdleAnt( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Ant +); + +VOID +odm_StaAntSelect( + IN PDM_ODM_T pDM_Odm, + IN struct stat_info *pstat +); + +VOID +odm_HW_IdleAntennaSelect( + IN PDM_ODM_T pDM_Odm +); + +u1Byte +ODM_Diversity_AntennaSelect( + IN PDM_ODM_T pDM_Odm, + IN u1Byte *data +); +#endif + + +//============================================================ +//3 Export Interface +//============================================================ + +// +// 2011/09/21 MH Add to describe different team necessary resource allocate?? +// +VOID +ODM_DMInit( + IN PDM_ODM_T pDM_Odm + ) { - /* 2012.05.03 Luke: For all IC series */ + +#if (FPGA_TWO_MAC_VERIFICATION == 1) + odm_RateAdaptiveMaskInit(pDM_Odm); + return; +#endif + + //2012.05.03 Luke: For all IC series odm_CommonInfoSelfInit(pDM_Odm); odm_CmnInfoInit_Debug(pDM_Odm); odm_DIGInit(pDM_Odm); + odm_AdaptivityInit(pDM_Odm); odm_RateAdaptiveMaskInit(pDM_Odm); - if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { - ; - } else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { - odm_PrimaryCCA_Init(pDM_Odm); /* Gary */ + if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) + { + + } + else if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + { + #if (RTL8188E_SUPPORT == 1) + odm_PrimaryCCA_Init(pDM_Odm); // Gary + #endif odm_DynamicBBPowerSavingInit(pDM_Odm); odm_DynamicTxPowerInit(pDM_Odm); odm_TXPowerTrackingInit(pDM_Odm); + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + odm_PSDMonitorInit(pDM_Odm); + odm_RXHPInit(pDM_Odm); + odm_PathDivInit(pDM_Odm); //92D Path Div Init //Neil Chen + #endif ODM_EdcaTurboInit(pDM_Odm); + #if (RTL8188E_SUPPORT == 1) ODM_RAInfo_Init_all(pDM_Odm); - if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) + #endif + if( ( pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV ) || + ( pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV ) || + ( pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV )) + { odm_InitHybridAntDiv(pDM_Odm); - else if (pDM_Odm->AntDivType == CGCS_RX_SW_ANTDIV) + } + else if( pDM_Odm->AntDivType == CGCS_RX_SW_ANTDIV) + { odm_SwAntDivInit(pDM_Odm); + } } } -/* 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. */ -/* You can not add any dummy function here, be care, you can only use DM structure */ -/* to perform any new ODM_DM. */ -void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm) +// +// 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. +// You can not add any dummy function here, be care, you can only use DM structure +// to perform any new ODM_DM. +// +VOID +ODM_DMWatchdog( + IN PDM_ODM_T pDM_Odm + ) { - /* 2012.05.03 Luke: For all IC series */ + //2012.05.03 Luke: For all IC series odm_GlobalAdapterCheck(); odm_CmnInfoHook_Debug(pDM_Odm); odm_CmnInfoUpdate_Debug(pDM_Odm); - odm_CommonInfoSelfUpdate(pDM_Odm); - odm_FalseAlarmCounterStatistics(pDM_Odm); + odm_CommonInfoSelfUpdate(pDM_Odm); + odm_FalseAlarmCounterStatistics(pDM_Odm); odm_RSSIMonitorCheck(pDM_Odm); - /* For CE Platform(SPRD or Tablet) */ - /* 8723A or 8189ES platform */ - /* NeilChen--2012--08--24-- */ - /* Fix Leave LPS issue */ - if ((pDM_Odm->Adapter->pwrctrlpriv.pwr_mode != PS_MODE_ACTIVE) &&/* in LPS mode */ - ((pDM_Odm->SupportICType & (ODM_RTL8723A)) || - (pDM_Odm->SupportICType & (ODM_RTL8188E) && - ((pDM_Odm->SupportInterface == ODM_ITRF_SDIO))))) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("----Step1: odm_DIG is in LPS mode\n")); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("---Step2: 8723AS is in LPS mode\n")); - odm_DIGbyRSSI_LPS(pDM_Odm); - } else { +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) +//#ifdef CONFIG_PLATFORM_SPRD + //For CE Platform(SPRD or Tablet) + //8723A or 8189ES platform + //NeilChen--2012--08--24-- + //Fix Leave LPS issue + if( (adapter_to_pwrctl(pDM_Odm->Adapter)->pwr_mode != PS_MODE_ACTIVE) &&// in LPS mode + ( + (pDM_Odm->SupportICType & (ODM_RTL8723A ) )|| + (pDM_Odm->SupportICType & (ODM_RTL8188E) )//&&((pDM_Odm->SupportInterface == ODM_ITRF_SDIO)) ) + + ) + ) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("----Step1: odm_DIG is in LPS mode\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("---Step2: 8723AS is in LPS mode\n")); + odm_DIGbyRSSI_LPS(pDM_Odm); + } + else +//#endif +#endif + { odm_DIG(pDM_Odm); } + + odm_CCKPacketDetectionThresh(pDM_Odm); - if (*(pDM_Odm->pbPowerSaving)) + if(*(pDM_Odm->pbPowerSaving)==TRUE) return; + odm_Adaptivity(pDM_Odm, pDM_Odm->DM_DigTable.CurIGValue); + + odm_RefreshRateAdaptiveMask(pDM_Odm); - - odm_DynamicBBPowerSaving(pDM_Odm); - odm_DynamicPrimaryCCA(pDM_Odm); - if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || - (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) + + #if (RTL8192D_SUPPORT == 1) + ODM_DynamicEarlyMode(pDM_Odm); + #endif + odm_DynamicBBPowerSaving(pDM_Odm); + #if (RTL8188E_SUPPORT == 1) + odm_DynamicPrimaryCCA(pDM_Odm); + #endif + if( ( pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV ) || + ( pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV ) || + ( pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV )) + { odm_HwAntDiv(pDM_Odm); - else if (pDM_Odm->AntDivType == CGCS_RX_SW_ANTDIV) + } + else if( pDM_Odm->AntDivType == CGCS_RX_SW_ANTDIV) + { odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_PEAK); + } - if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) { - ; - } else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { + if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) + { + + } + else if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + { ODM_TXPowerTrackingCheck(pDM_Odm); odm_EdcaTurboCheck(pDM_Odm); odm_DynamicTxPower(pDM_Odm); + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + odm_RXHP(pDM_Odm); + #endif } + +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) odm_dtc(pDM_Odm); +#endif } -/* Init /.. Fixed HW value. Only init time. */ -void ODM_CmnInfoInit(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u32 Value) + +// +// Init /.. Fixed HW value. Only init time. +// +VOID +ODM_CmnInfoInit( + IN PDM_ODM_T pDM_Odm, + IN ODM_CMNINFO_E CmnInfo, + IN u4Byte Value + ) { - /* This section is used for init value */ - switch (CmnInfo) { - /* Fixed ODM value. */ - case ODM_CMNINFO_ABILITY: - pDM_Odm->SupportAbility = (u32)Value; - break; - case ODM_CMNINFO_PLATFORM: - pDM_Odm->SupportPlatform = (u8)Value; - break; - case ODM_CMNINFO_INTERFACE: - pDM_Odm->SupportInterface = (u8)Value; - break; - case ODM_CMNINFO_MP_TEST_CHIP: - pDM_Odm->bIsMPChip = (u8)Value; - break; - case ODM_CMNINFO_IC_TYPE: - pDM_Odm->SupportICType = Value; - break; - case ODM_CMNINFO_CUT_VER: - pDM_Odm->CutVersion = (u8)Value; - break; - case ODM_CMNINFO_FAB_VER: - pDM_Odm->FabVersion = (u8)Value; - break; - case ODM_CMNINFO_RF_TYPE: - pDM_Odm->RFType = (u8)Value; - break; - case ODM_CMNINFO_RF_ANTENNA_TYPE: - pDM_Odm->AntDivType = (u8)Value; - break; - case ODM_CMNINFO_BOARD_TYPE: - pDM_Odm->BoardType = (u8)Value; - break; - case ODM_CMNINFO_EXT_LNA: - pDM_Odm->ExtLNA = (u8)Value; - break; - case ODM_CMNINFO_EXT_PA: - pDM_Odm->ExtPA = (u8)Value; - break; - case ODM_CMNINFO_EXT_TRSW: - pDM_Odm->ExtTRSW = (u8)Value; - break; - case ODM_CMNINFO_PATCH_ID: - pDM_Odm->PatchID = (u8)Value; - break; - case ODM_CMNINFO_BINHCT_TEST: - pDM_Odm->bInHctTest = (bool)Value; - break; - case ODM_CMNINFO_BWIFI_TEST: - pDM_Odm->bWIFITest = (bool)Value; - break; - case ODM_CMNINFO_SMART_CONCURRENT: - pDM_Odm->bDualMacSmartConcurrent = (bool)Value; - break; - /* To remove the compiler warning, must add an empty default statement to handle the other values. */ - default: - /* do nothing */ - break; + //ODM_RT_TRACE(pDM_Odm,); + + // + // This section is used for init value + // + switch (CmnInfo) + { + // + // Fixed ODM value. + // + case ODM_CMNINFO_ABILITY: + pDM_Odm->SupportAbility = (u4Byte)Value; + break; + case ODM_CMNINFO_PLATFORM: + pDM_Odm->SupportPlatform = (u1Byte)Value; + break; + + case ODM_CMNINFO_INTERFACE: + pDM_Odm->SupportInterface = (u1Byte)Value; + break; + + case ODM_CMNINFO_MP_TEST_CHIP: + pDM_Odm->bIsMPChip= (u1Byte)Value; + break; + + case ODM_CMNINFO_IC_TYPE: + pDM_Odm->SupportICType = Value; + break; + + case ODM_CMNINFO_CUT_VER: + pDM_Odm->CutVersion = (u1Byte)Value; + break; + + case ODM_CMNINFO_FAB_VER: + pDM_Odm->FabVersion = (u1Byte)Value; + break; + + case ODM_CMNINFO_RF_TYPE: + pDM_Odm->RFType = (u1Byte)Value; + break; + + case ODM_CMNINFO_RF_ANTENNA_TYPE: + pDM_Odm->AntDivType= (u1Byte)Value; + break; + + case ODM_CMNINFO_BOARD_TYPE: + pDM_Odm->BoardType = (u1Byte)Value; + break; + + case ODM_CMNINFO_EXT_LNA: + pDM_Odm->ExtLNA = (u1Byte)Value; + break; + + case ODM_CMNINFO_EXT_PA: + pDM_Odm->ExtPA = (u1Byte)Value; + break; + + case ODM_CMNINFO_EXT_TRSW: + pDM_Odm->ExtTRSW = (u1Byte)Value; + break; + case ODM_CMNINFO_PATCH_ID: + pDM_Odm->PatchID = (u1Byte)Value; + break; + case ODM_CMNINFO_BINHCT_TEST: + pDM_Odm->bInHctTest = (BOOLEAN)Value; + break; + case ODM_CMNINFO_BWIFI_TEST: + pDM_Odm->bWIFITest = (BOOLEAN)Value; + break; + + case ODM_CMNINFO_SMART_CONCURRENT: + pDM_Odm->bDualMacSmartConcurrent = (BOOLEAN )Value; + break; + + //To remove the compiler warning, must add an empty default statement to handle the other values. + default: + //do nothing + break; + } - /* Tx power tracking BB swing table. */ - /* The base index = 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB */ - pDM_Odm->BbSwingIdxOfdm = 12; /* Set defalut value as index 12. */ - pDM_Odm->BbSwingIdxOfdmCurrent = 12; - pDM_Odm->BbSwingFlagOfdm = false; + } -void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, void *pValue) + +VOID +ODM_CmnInfoHook( + IN PDM_ODM_T pDM_Odm, + IN ODM_CMNINFO_E CmnInfo, + IN PVOID pValue + ) { - /* */ - /* Hook call by reference pointer. */ - /* */ - switch (CmnInfo) { - /* Dynamic call by reference pointer. */ - case ODM_CMNINFO_MAC_PHY_MODE: - pDM_Odm->pMacPhyMode = (u8 *)pValue; - break; - case ODM_CMNINFO_TX_UNI: - pDM_Odm->pNumTxBytesUnicast = (u64 *)pValue; - break; - case ODM_CMNINFO_RX_UNI: - pDM_Odm->pNumRxBytesUnicast = (u64 *)pValue; - break; - case ODM_CMNINFO_WM_MODE: - pDM_Odm->pWirelessMode = (u8 *)pValue; - break; - case ODM_CMNINFO_BAND: - pDM_Odm->pBandType = (u8 *)pValue; - break; - case ODM_CMNINFO_SEC_CHNL_OFFSET: - pDM_Odm->pSecChOffset = (u8 *)pValue; - break; - case ODM_CMNINFO_SEC_MODE: - pDM_Odm->pSecurity = (u8 *)pValue; - break; - case ODM_CMNINFO_BW: - pDM_Odm->pBandWidth = (u8 *)pValue; - break; - case ODM_CMNINFO_CHNL: - pDM_Odm->pChannel = (u8 *)pValue; - break; - case ODM_CMNINFO_DMSP_GET_VALUE: - pDM_Odm->pbGetValueFromOtherMac = (bool *)pValue; - break; - case ODM_CMNINFO_BUDDY_ADAPTOR: - pDM_Odm->pBuddyAdapter = (struct adapter **)pValue; - break; - case ODM_CMNINFO_DMSP_IS_MASTER: - pDM_Odm->pbMasterOfDMSP = (bool *)pValue; - break; - case ODM_CMNINFO_SCAN: - pDM_Odm->pbScanInProcess = (bool *)pValue; - break; - case ODM_CMNINFO_POWER_SAVING: - pDM_Odm->pbPowerSaving = (bool *)pValue; - break; - case ODM_CMNINFO_ONE_PATH_CCA: - pDM_Odm->pOnePathCCA = (u8 *)pValue; - break; - case ODM_CMNINFO_DRV_STOP: - pDM_Odm->pbDriverStopped = (bool *)pValue; - break; - case ODM_CMNINFO_PNP_IN: - pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (bool *)pValue; - break; - case ODM_CMNINFO_INIT_ON: - pDM_Odm->pinit_adpt_in_progress = (bool *)pValue; - break; - case ODM_CMNINFO_ANT_TEST: - pDM_Odm->pAntennaTest = (u8 *)pValue; - break; - case ODM_CMNINFO_NET_CLOSED: - pDM_Odm->pbNet_closed = (bool *)pValue; - break; - case ODM_CMNINFO_MP_MODE: - pDM_Odm->mp_mode = (u8 *)pValue; - break; - /* To remove the compiler warning, must add an empty default statement to handle the other values. */ - default: - /* do nothing */ - break; + // + // Hook call by reference pointer. + // + switch (CmnInfo) + { + // + // Dynamic call by reference pointer. + // + case ODM_CMNINFO_MAC_PHY_MODE: + pDM_Odm->pMacPhyMode = (u1Byte *)pValue; + break; + + case ODM_CMNINFO_TX_UNI: + pDM_Odm->pNumTxBytesUnicast = (u8Byte *)pValue; + break; + + case ODM_CMNINFO_RX_UNI: + pDM_Odm->pNumRxBytesUnicast = (u8Byte *)pValue; + break; + + case ODM_CMNINFO_WM_MODE: + pDM_Odm->pWirelessMode = (u1Byte *)pValue; + break; + + case ODM_CMNINFO_BAND: + pDM_Odm->pBandType = (u1Byte *)pValue; + break; + + case ODM_CMNINFO_SEC_CHNL_OFFSET: + pDM_Odm->pSecChOffset = (u1Byte *)pValue; + break; + + case ODM_CMNINFO_SEC_MODE: + pDM_Odm->pSecurity = (u1Byte *)pValue; + break; + + case ODM_CMNINFO_BW: + pDM_Odm->pBandWidth = (u1Byte *)pValue; + break; + + case ODM_CMNINFO_CHNL: + pDM_Odm->pChannel = (u1Byte *)pValue; + break; + + case ODM_CMNINFO_DMSP_GET_VALUE: + pDM_Odm->pbGetValueFromOtherMac = (BOOLEAN *)pValue; + break; + + case ODM_CMNINFO_BUDDY_ADAPTOR: + pDM_Odm->pBuddyAdapter = (PADAPTER *)pValue; + break; + + case ODM_CMNINFO_DMSP_IS_MASTER: + pDM_Odm->pbMasterOfDMSP = (BOOLEAN *)pValue; + break; + + case ODM_CMNINFO_SCAN: + pDM_Odm->pbScanInProcess = (BOOLEAN *)pValue; + break; + + case ODM_CMNINFO_POWER_SAVING: + pDM_Odm->pbPowerSaving = (BOOLEAN *)pValue; + break; + + case ODM_CMNINFO_ONE_PATH_CCA: + pDM_Odm->pOnePathCCA = (u1Byte *)pValue; + break; + + case ODM_CMNINFO_DRV_STOP: + pDM_Odm->pbDriverStopped = (BOOLEAN *)pValue; + break; + + case ODM_CMNINFO_PNP_IN: + pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (BOOLEAN *)pValue; + break; + + case ODM_CMNINFO_INIT_ON: + pDM_Odm->pinit_adpt_in_progress = (BOOLEAN *)pValue; + break; + + case ODM_CMNINFO_ANT_TEST: + pDM_Odm->pAntennaTest = (u1Byte *)pValue; + break; + + case ODM_CMNINFO_NET_CLOSED: + pDM_Odm->pbNet_closed = (BOOLEAN *)pValue; + break; + case ODM_CMNINFO_MP_MODE: + pDM_Odm->mp_mode = (u1Byte *)pValue; + break; + + //case ODM_CMNINFO_BT_COEXIST: + // pDM_Odm->BTCoexist = (BOOLEAN *)pValue; + + //case ODM_CMNINFO_STA_STATUS: + //pDM_Odm->pODM_StaInfo[] = (PSTA_INFO_T)pValue; + //break; + + //case ODM_CMNINFO_PHY_STATUS: + // pDM_Odm->pPhyInfo = (ODM_PHY_INFO *)pValue; + // break; + + //case ODM_CMNINFO_MAC_STATUS: + // pDM_Odm->pMacInfo = (ODM_MAC_INFO *)pValue; + // break; + //To remove the compiler warning, must add an empty default statement to handle the other values. + default: + //do nothing + break; + } + } -void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u16 Index, void *pValue) + +VOID +ODM_CmnInfoPtrArrayHook( + IN PDM_ODM_T pDM_Odm, + IN ODM_CMNINFO_E CmnInfo, + IN u2Byte Index, + IN PVOID pValue + ) { - /* Hook call by reference pointer. */ - switch (CmnInfo) { - /* Dynamic call by reference pointer. */ - case ODM_CMNINFO_STA_STATUS: - pDM_Odm->pODM_StaInfo[Index] = (struct sta_info *)pValue; - break; - /* To remove the compiler warning, must add an empty default statement to handle the other values. */ - default: - /* do nothing */ - break; + // + // Hook call by reference pointer. + // + switch (CmnInfo) + { + // + // Dynamic call by reference pointer. + // + case ODM_CMNINFO_STA_STATUS: + pDM_Odm->pODM_StaInfo[Index] = (PSTA_INFO_T)pValue; + break; + //To remove the compiler warning, must add an empty default statement to handle the other values. + default: + //do nothing + break; } + } -/* Update Band/CHannel/.. The values are dynamic but non-per-packet. */ -void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value) + +// +// Update Band/CHannel/.. The values are dynamic but non-per-packet. +// +VOID +ODM_CmnInfoUpdate( + IN PDM_ODM_T pDM_Odm, + IN u4Byte CmnInfo, + IN u8Byte Value + ) { - /* */ - /* This init variable may be changed in run time. */ - /* */ - switch (CmnInfo) { - case ODM_CMNINFO_ABILITY: - pDM_Odm->SupportAbility = (u32)Value; - break; - case ODM_CMNINFO_RF_TYPE: - pDM_Odm->RFType = (u8)Value; - break; - case ODM_CMNINFO_WIFI_DIRECT: - pDM_Odm->bWIFI_Direct = (bool)Value; - break; - case ODM_CMNINFO_WIFI_DISPLAY: - pDM_Odm->bWIFI_Display = (bool)Value; - break; - case ODM_CMNINFO_LINK: - pDM_Odm->bLinked = (bool)Value; - break; - case ODM_CMNINFO_RSSI_MIN: - pDM_Odm->RSSI_Min = (u8)Value; - break; - case ODM_CMNINFO_DBG_COMP: - pDM_Odm->DebugComponents = Value; - break; - case ODM_CMNINFO_DBG_LEVEL: - pDM_Odm->DebugLevel = (u32)Value; - break; - case ODM_CMNINFO_RA_THRESHOLD_HIGH: - pDM_Odm->RateAdaptive.HighRSSIThresh = (u8)Value; - break; - case ODM_CMNINFO_RA_THRESHOLD_LOW: - pDM_Odm->RateAdaptive.LowRSSIThresh = (u8)Value; - break; + // + // This init variable may be changed in run time. + // + switch (CmnInfo) + { + case ODM_CMNINFO_ABILITY: + pDM_Odm->SupportAbility = (u4Byte)Value; + break; + + case ODM_CMNINFO_RF_TYPE: + pDM_Odm->RFType = (u1Byte)Value; + break; + + case ODM_CMNINFO_WIFI_DIRECT: + pDM_Odm->bWIFI_Direct = (BOOLEAN)Value; + break; + + case ODM_CMNINFO_WIFI_DISPLAY: + pDM_Odm->bWIFI_Display = (BOOLEAN)Value; + break; + + case ODM_CMNINFO_LINK: + pDM_Odm->bLinked = (BOOLEAN)Value; + break; + case ODM_CMNINFO_STATION_STATE: + pDM_Odm->bsta_state = (BOOLEAN)Value; + break; + case ODM_CMNINFO_RSSI_MIN: + pDM_Odm->RSSI_Min= (u1Byte)Value; + break; + + case ODM_CMNINFO_DBG_COMP: + pDM_Odm->DebugComponents = Value; + break; + + case ODM_CMNINFO_DBG_LEVEL: + pDM_Odm->DebugLevel = (u4Byte)Value; + break; + case ODM_CMNINFO_RA_THRESHOLD_HIGH: + pDM_Odm->RateAdaptive.HighRSSIThresh = (u1Byte)Value; + break; + + case ODM_CMNINFO_RA_THRESHOLD_LOW: + pDM_Odm->RateAdaptive.LowRSSIThresh = (u1Byte)Value; + break; +#if(BT_30_SUPPORT == 1) + // The following is for BT HS mode and BT coexist mechanism. + case ODM_CMNINFO_BT_DISABLED: + pDM_Odm->bBtDisabled = (BOOLEAN)Value; + break; + + case ODM_CMNINFO_BT_OPERATION: + pDM_Odm->bBtHsOperation = (BOOLEAN)Value; + break; + + case ODM_CMNINFO_BT_DIG: + pDM_Odm->btHsDigVal = (u1Byte)Value; + break; + + case ODM_CMNINFO_BT_BUSY: + pDM_Odm->bBtBusy = (BOOLEAN)Value; + break; + + case ODM_CMNINFO_BT_DISABLE_EDCA: + pDM_Odm->bBtDisableEdcaTurbo = (BOOLEAN)Value; + break; +#endif + } + + } -void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm) +VOID +odm_CommonInfoSelfInit( + IN PDM_ODM_T pDM_Odm + ) { - pDM_Odm->bCckHighPower = (bool) ODM_GetBBReg(pDM_Odm, 0x824, BIT9); - pDM_Odm->RFPathRxEnable = (u8) ODM_GetBBReg(pDM_Odm, 0xc04, 0x0F); - if (pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D)) + pDM_Odm->bCckHighPower = (BOOLEAN) ODM_GetBBReg(pDM_Odm, 0x824, BIT9); + pDM_Odm->RFPathRxEnable = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xc04, 0x0F); +#if (DM_ODM_SUPPORT_TYPE != ODM_CE) + pDM_Odm->pbNet_closed = &pDM_Odm->BOOLEAN_temp; +#endif + if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D)) + { +#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; - if (pDM_Odm->SupportICType & (ODM_RTL8723A)) +#elif (defined(CONFIG_SW_ANTENNA_DIVERSITY)) pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; - - ODM_InitDebugSetting(pDM_Odm); +#endif + } + if(pDM_Odm->SupportICType & (ODM_RTL8723A)) + pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; + + ODM_InitDebugSetting(pDM_Odm); } -void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm) +VOID +odm_CommonInfoSelfUpdate( + IN PDM_ODM_T pDM_Odm + ) { - u8 EntryCnt = 0; - u8 i; - struct sta_info *pEntry; + u1Byte EntryCnt=0; + u1Byte i; + PSTA_INFO_T pEntry; - if (*(pDM_Odm->pBandWidth) == ODM_BW40M) { - if (*(pDM_Odm->pSecChOffset) == 1) - pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2; - else if (*(pDM_Odm->pSecChOffset) == 2) - pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2; - } else { - pDM_Odm->ControlChannel = *(pDM_Odm->pChannel); +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + + pEntry = pDM_Odm->pODM_StaInfo[0]; + if(pMgntInfo->mAssoc) + { + pEntry->bUsed=TRUE; + for (i=0; i<6; i++) + pEntry->MacAddr[i] = pMgntInfo->Bssid[i]; } + else + { + pEntry->bUsed=FALSE; + for (i=0; i<6; i++) + pEntry->MacAddr[i] = 0; + } +#endif - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { + + if(*(pDM_Odm->pBandWidth) == ODM_BW40M) + { + if(*(pDM_Odm->pSecChOffset) == 1) + pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) -2; + else if(*(pDM_Odm->pSecChOffset) == 2) + pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) +2; + } + else + pDM_Odm->ControlChannel = *(pDM_Odm->pChannel); + + for (i=0; ipODM_StaInfo[i]; - if (IS_STA_VALID(pEntry)) + if(IS_STA_VALID(pEntry)) EntryCnt++; } - if (EntryCnt == 1) - pDM_Odm->bOneEntryOnly = true; + if(EntryCnt == 1) + pDM_Odm->bOneEntryOnly = TRUE; else - pDM_Odm->bOneEntryOnly = false; + pDM_Odm->bOneEntryOnly = FALSE; } -void odm_CmnInfoInit_Debug(struct odm_dm_struct *pDM_Odm) +VOID +odm_CmnInfoInit_Debug( + IN PDM_ODM_T pDM_Odm + ) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoInit_Debug==>\n")); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportPlatform=%d\n", pDM_Odm->SupportPlatform)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportAbility=0x%x\n", pDM_Odm->SupportAbility)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportInterface=%d\n", pDM_Odm->SupportInterface)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportICType=0x%x\n", pDM_Odm->SupportICType)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("CutVersion=%d\n", pDM_Odm->CutVersion)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("FabVersion=%d\n", pDM_Odm->FabVersion)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RFType=%d\n", pDM_Odm->RFType)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("BoardType=%d\n", pDM_Odm->BoardType)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtLNA=%d\n", pDM_Odm->ExtLNA)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtPA=%d\n", pDM_Odm->ExtPA)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtTRSW=%d\n", pDM_Odm->ExtTRSW)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("PatchID=%d\n", pDM_Odm->PatchID)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bInHctTest=%d\n", pDM_Odm->bInHctTest)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFITest=%d\n", pDM_Odm->bWIFITest)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bDualMacSmartConcurrent=%d\n", pDM_Odm->bDualMacSmartConcurrent)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoInit_Debug==>\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportPlatform=%d\n",pDM_Odm->SupportPlatform) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportAbility=0x%x\n",pDM_Odm->SupportAbility) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportInterface=%d\n",pDM_Odm->SupportInterface) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportICType=0x%x\n",pDM_Odm->SupportICType) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("CutVersion=%d\n",pDM_Odm->CutVersion) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("FabVersion=%d\n",pDM_Odm->FabVersion) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RFType=%d\n",pDM_Odm->RFType) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("BoardType=%d\n",pDM_Odm->BoardType) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtLNA=%d\n",pDM_Odm->ExtLNA) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtPA=%d\n",pDM_Odm->ExtPA) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtTRSW=%d\n",pDM_Odm->ExtTRSW) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("PatchID=%d\n",pDM_Odm->PatchID) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bInHctTest=%d\n",pDM_Odm->bInHctTest) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFITest=%d\n",pDM_Odm->bWIFITest) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bDualMacSmartConcurrent=%d\n",pDM_Odm->bDualMacSmartConcurrent) ); + } -void odm_CmnInfoHook_Debug(struct odm_dm_struct *pDM_Odm) +VOID +odm_CmnInfoHook_Debug( + IN PDM_ODM_T pDM_Odm + ) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoHook_Debug==>\n")); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumTxBytesUnicast=%llu\n", *(pDM_Odm->pNumTxBytesUnicast))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumRxBytesUnicast=%llu\n", *(pDM_Odm->pNumRxBytesUnicast))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pWirelessMode=0x%x\n", *(pDM_Odm->pWirelessMode))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecChOffset=%d\n", *(pDM_Odm->pSecChOffset))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecurity=%d\n", *(pDM_Odm->pSecurity))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBandWidth=%d\n", *(pDM_Odm->pBandWidth))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pChannel=%d\n", *(pDM_Odm->pChannel))); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoHook_Debug==>\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumTxBytesUnicast=%llu\n",*(pDM_Odm->pNumTxBytesUnicast)) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumRxBytesUnicast=%llu\n",*(pDM_Odm->pNumRxBytesUnicast)) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pWirelessMode=0x%x\n",*(pDM_Odm->pWirelessMode)) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecChOffset=%d\n",*(pDM_Odm->pSecChOffset)) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecurity=%d\n",*(pDM_Odm->pSecurity)) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBandWidth=%d\n",*(pDM_Odm->pBandWidth)) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pChannel=%d\n",*(pDM_Odm->pChannel)) ); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbScanInProcess=%d\n", *(pDM_Odm->pbScanInProcess))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbPowerSaving=%d\n", *(pDM_Odm->pbPowerSaving))); +#if (RTL8192D_SUPPORT==1) + if(pDM_Odm->pBandType) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBandType=%d\n",*(pDM_Odm->pBandType)) ); + if(pDM_Odm->pMacPhyMode) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pMacPhyMode=%d\n",*(pDM_Odm->pMacPhyMode)) ); + if(pDM_Odm->pBuddyAdapter) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbGetValueFromOtherMac=%d\n",*(pDM_Odm->pbGetValueFromOtherMac)) ); + if(pDM_Odm->pBuddyAdapter) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBuddyAdapter=%p\n",*(pDM_Odm->pBuddyAdapter)) ); + if(pDM_Odm->pbMasterOfDMSP) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbMasterOfDMSP=%d\n",*(pDM_Odm->pbMasterOfDMSP)) ); +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbScanInProcess=%d\n",*(pDM_Odm->pbScanInProcess)) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbPowerSaving=%d\n",*(pDM_Odm->pbPowerSaving)) ); - if (pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pOnePathCCA=%d\n", *(pDM_Odm->pOnePathCCA))); + if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pOnePathCCA=%d\n",*(pDM_Odm->pOnePathCCA)) ); } -void odm_CmnInfoUpdate_Debug(struct odm_dm_struct *pDM_Odm) +VOID +odm_CmnInfoUpdate_Debug( + IN PDM_ODM_T pDM_Odm + ) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoUpdate_Debug==>\n")); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Direct=%d\n", pDM_Odm->bWIFI_Direct)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Display=%d\n", pDM_Odm->bWIFI_Display)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked=%d\n", pDM_Odm->bLinked)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min=%d\n", pDM_Odm->RSSI_Min)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoUpdate_Debug==>\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Direct=%d\n",pDM_Odm->bWIFI_Direct) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Display=%d\n",pDM_Odm->bWIFI_Display) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked=%d\n",pDM_Odm->bLinked) ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min=%d\n",pDM_Odm->RSSI_Min) ); } -static int getIGIForDiff(int value_IGI) +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) +VOID +ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm ) +{ +#if USE_WORKITEM + PADAPTER pAdapter = pDM_Odm->Adapter; + + ODM_InitializeWorkItem( pDM_Odm, + &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem, + (RT_WORKITEM_CALL_BACK)odm_SwAntDivChkAntSwitchWorkitemCallback, + (PVOID)pAdapter, + "AntennaSwitchWorkitem" + ); + + ODM_InitializeWorkItem( + pDM_Odm, + &(pDM_Odm->PathDivSwitchWorkitem), + (RT_WORKITEM_CALL_BACK)odm_PathDivChkAntSwitchWorkitemCallback, + (PVOID)pAdapter, + "SWAS_WorkItem"); + + ODM_InitializeWorkItem( + pDM_Odm, + &(pDM_Odm->CCKPathDiversityWorkitem), + (RT_WORKITEM_CALL_BACK)odm_CCKTXPathDiversityWorkItemCallback, + (PVOID)pAdapter, + "CCKTXPathDiversityWorkItem"); +#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) +#if (RTL8188E_SUPPORT == 1) + ODM_InitializeWorkItem( + pDM_Odm, + &(pDM_Odm->FastAntTrainingWorkitem), + (RT_WORKITEM_CALL_BACK)odm_FastAntTrainingWorkItemCallback, + (PVOID)pAdapter, + "FastAntTrainingWorkitem"); +#endif +#endif + ODM_InitializeWorkItem( + pDM_Odm, + &(pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem), + (RT_WORKITEM_CALL_BACK)odm_PSD_RXHPWorkitemCallback, + (PVOID)pAdapter, + "PSDRXHP_WorkItem"); +#endif +} + +VOID +ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm ) +{ +#if USE_WORKITEM + ODM_FreeWorkItem( &(pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem)); + + ODM_FreeWorkItem(&(pDM_Odm->PathDivSwitchWorkitem)); + + ODM_FreeWorkItem(&(pDM_Odm->CCKPathDiversityWorkitem)); + + ODM_FreeWorkItem(&(pDM_Odm->FastAntTrainingWorkitem)); + + ODM_FreeWorkItem((&pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem)); +#endif + +} +#endif + +/* +VOID +odm_FindMinimumRSSI( + IN PDM_ODM_T pDM_Odm + ) +{ + u4Byte i; + u1Byte RSSI_Min = 0xFF; + + for(i=0; ipODM_StaInfo[i] != NULL) + if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) ) + { + if(pDM_Odm->pODM_StaInfo[i]->RSSI_Ave < RSSI_Min) + { + RSSI_Min = pDM_Odm->pODM_StaInfo[i]->RSSI_Ave; + } + } + } + + pDM_Odm->RSSI_Min = RSSI_Min; + +} + +VOID +odm_IsLinked( + IN PDM_ODM_T pDM_Odm + ) +{ + u4Byte i; + BOOLEAN Linked = FALSE; + + for(i=0; ipODM_StaInfo[i]) ) + { + Linked = TRUE; + break; + } + + } + + pDM_Odm->bLinked = Linked; +} +*/ + + +//3============================================================ +//3 DIG +//3============================================================ +/*----------------------------------------------------------------------------- + * Function: odm_DIGInit() + * + * Overview: Set DIG scheme init value. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * + *---------------------------------------------------------------------------*/ +VOID +ODM_ChangeDynamicInitGainThresh( + IN PDM_ODM_T pDM_Odm, + IN u4Byte DM_Type, + IN u4Byte DM_Value + ) +{ + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + + if (DM_Type == DIG_TYPE_THRESH_HIGH) + { + pDM_DigTable->RssiHighThresh = DM_Value; + } + else if (DM_Type == DIG_TYPE_THRESH_LOW) + { + pDM_DigTable->RssiLowThresh = DM_Value; + } + else if (DM_Type == DIG_TYPE_ENABLE) + { + pDM_DigTable->Dig_Enable_Flag = TRUE; + } + else if (DM_Type == DIG_TYPE_DISABLE) + { + pDM_DigTable->Dig_Enable_Flag = FALSE; + } + else if (DM_Type == DIG_TYPE_BACKOFF) + { + if(DM_Value > 30) + DM_Value = 30; + pDM_DigTable->BackoffVal = (u1Byte)DM_Value; + } + else if(DM_Type == DIG_TYPE_RX_GAIN_MIN) + { + if(DM_Value == 0) + DM_Value = 0x1; + pDM_DigTable->rx_gain_range_min = (u1Byte)DM_Value; + } + else if(DM_Type == DIG_TYPE_RX_GAIN_MAX) + { + if(DM_Value > 0x50) + DM_Value = 0x50; + pDM_DigTable->rx_gain_range_max = (u1Byte)DM_Value; + } +} /* DM_ChangeDynamicInitGainThresh */ + +int getIGIForDiff(int value_IGI) { #define ONERCCA_LOW_TH 0x30 #define ONERCCA_LOW_DIFF 8 @@ -554,108 +1577,391 @@ static int getIGIForDiff(int value_IGI) } } -void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI) + +// Add by Neil Chen to enable edcca to MP Platform +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + +VOID +odm_EnableEDCCA( + IN PDM_ODM_T pDM_Odm +) { - struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, - ("ODM_REG(IGI_A,pDM_Odm)=0x%x, ODM_BIT(IGI,pDM_Odm)=0x%x\n", - ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm))); + // This should be moved out of OUTSRC + PADAPTER pAdapter = pDM_Odm->Adapter; + // Enable EDCCA. The value is suggested by SD3 Wilson. - if (pDM_DigTable->CurIGValue != CurrentIGI) { - if (pDM_Odm->SupportPlatform & (ODM_CE|ODM_MP)) { - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - if (pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - } else if (pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) { - switch (*(pDM_Odm->pOnePathCCA)) { + // + // Revised for ASUS 11b/g performance issues, suggested by BB Neil, 2012.04.13. + // + if((pDM_Odm->SupportICType == ODM_RTL8723A)&&(IS_WIRELESS_MODE_G(pAdapter))) + { + //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold, 0x00); + ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold,0x00); + ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold+2,0xFD); + + } + else + { + //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold, 0x03); + ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold,0x03); + ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold+2,0x00); + } + + //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold+2, 0x00); +} + +VOID +odm_DisableEDCCA( + IN PDM_ODM_T pDM_Odm +) +{ + // Disable EDCCA.. + ODM_Write1Byte(pDM_Odm, rOFDM0_ECCAThreshold, 0x7f); + ODM_Write1Byte(pDM_Odm, rOFDM0_ECCAThreshold+2, 0x7f); +} + +// +// Description: According to initial gain value to determine to enable or disable EDCCA. +// +// Suggested by SD3 Wilson. Added by tynli. 2011.11.25. +// +VOID +odm_DynamicEDCCA( + IN PDM_ODM_T pDM_Odm +) +{ + PADAPTER pAdapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + u1Byte RegC50, RegC58; + BOOLEAN bEDCCAenable = FALSE; + + RegC50 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0); + RegC58 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0); + + + if((RegC50 > 0x28 && RegC58 > 0x28) || + ((pDM_Odm->SupportICType == ODM_RTL8723A && IS_WIRELESS_MODE_G(pAdapter) && RegC50>0x26)) || + (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 > 0x28)) + { + if(!pHalData->bPreEdccaEnable) + { + odm_EnableEDCCA(pDM_Odm); + pHalData->bPreEdccaEnable = TRUE; + } + + } + else if((RegC50 < 0x25 && RegC58 < 0x25) || (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 < 0x25)) + { + if(pHalData->bPreEdccaEnable) + { + odm_DisableEDCCA(pDM_Odm); + pHalData->bPreEdccaEnable = FALSE; + } + } +} + + +#endif // end MP platform support + +VOID +ODM_Write_DIG( + IN PDM_ODM_T pDM_Odm, + IN u1Byte CurrentIGI + ) +{ + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_REG(IGI_A,pDM_Odm)=0x%x, ODM_BIT(IGI,pDM_Odm)=0x%x \n", + ODM_REG(IGI_A,pDM_Odm),ODM_BIT(IGI,pDM_Odm))); + + if(pDM_DigTable->CurIGValue != CurrentIGI)//if(pDM_DigTable->PreIGValue != CurrentIGI) + { + if(pDM_Odm->SupportPlatform & (ODM_CE|ODM_MP)) + { + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); + if(pDM_Odm->SupportICType != ODM_RTL8188E) + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); + } + else if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) + { + switch(*(pDM_Odm->pOnePathCCA)) + { case ODM_CCA_2R: - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - if (pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); + if(pDM_Odm->SupportICType != ODM_RTL8188E) + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); break; case ODM_CCA_1R_A: - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); - if (pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), getIGIForDiff(CurrentIGI)); + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); + if(pDM_Odm->SupportICType != ODM_RTL8188E) + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); break; case ODM_CCA_1R_B: - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), getIGIForDiff(CurrentIGI)); - if (pDM_Odm->SupportICType != ODM_RTL8188E) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); + if(pDM_Odm->SupportICType != ODM_RTL8188E) + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); break; } } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("CurrentIGI(0x%02x).\n", CurrentIGI)); - /* pDM_DigTable->PreIGValue = pDM_DigTable->CurIGValue; */ + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("CurrentIGI(0x%02x). \n",CurrentIGI)); + //pDM_DigTable->PreIGValue = pDM_DigTable->CurIGValue; pDM_DigTable->CurIGValue = CurrentIGI; } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG():CurrentIGI=0x%x\n", CurrentIGI)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG():CurrentIGI=0x%x \n",CurrentIGI)); -/* Add by Neil Chen to enable edcca to MP Platform */ +// Add by Neil Chen to enable edcca to MP Platform +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + // Adjust EDCCA. + if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + odm_DynamicEDCCA(pDM_Odm); +#endif + + } -/* Need LPS mode for CE platform --2012--08--24--- */ -/* 8723AS/8189ES */ -void odm_DIGbyRSSI_LPS(struct odm_dm_struct *pDM_Odm) + +//Need LPS mode for CE platform --2012--08--24--- +//8723AS/8189ES +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + +VOID +odm_DIGbyRSSI_LPS( + IN PDM_ODM_T pDM_Odm + ) { - struct adapter *pAdapter = pDM_Odm->Adapter; - struct false_alarm_stats *pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; + PADAPTER pAdapter =pDM_Odm->Adapter; + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + PFALSE_ALARM_STATISTICS pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; - u8 RSSI_Lower = DM_DIG_MIN_NIC; /* 0x1E or 0x1C */ - u8 bFwCurrentInPSMode = false; - u8 CurrentIGI = pDM_Odm->RSSI_Min; +#if 0 //and 2.3.5 coding rule + struct mlme_priv *pmlmepriv = &(pAdapter->mlmepriv); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; +#endif - if (!(pDM_Odm->SupportICType & (ODM_RTL8723A | ODM_RTL8188E))) + u1Byte RSSI_Lower=DM_DIG_MIN_NIC; //0x1E or 0x1C + u1Byte bFwCurrentInPSMode = FALSE; + u1Byte CurrentIGI=pDM_Odm->RSSI_Min; + + if(! (pDM_Odm->SupportICType & (ODM_RTL8723A |ODM_RTL8188E))) return; - CurrentIGI = CurrentIGI + RSSI_OFFSET_DIG; - bFwCurrentInPSMode = pAdapter->pwrctrlpriv.bFwCurrentInPSMode; + //if((pDM_Odm->SupportInterface==ODM_ITRF_PCIE)||(pDM_Odm->SupportInterface ==ODM_ITRF_USB)) + // return; + + CurrentIGI=CurrentIGI+RSSI_OFFSET_DIG; +#ifdef CONFIG_LPS + bFwCurrentInPSMode = adapter_to_pwrctl(pAdapter)->bFwCurrentInPSMode; +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("==>pDM_Odm->RSSI_Min=%d ()\n",pDM_Odm->RSSI_Min)); - /* Using FW PS mode to make IGI */ - if (bFwCurrentInPSMode) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("---Neil---odm_DIG is in LPS mode\n")); - /* Adjust by FA in LPS MODE */ - if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2_LPS) + // Using FW PS mode to make IGI + if(bFwCurrentInPSMode) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("---Neil---odm_DIG is in LPS mode\n")); + //Adjust by FA in LPS MODE + if(pFalseAlmCnt->Cnt_all> DM_DIG_FA_TH2_LPS) CurrentIGI = CurrentIGI+2; else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_LPS) CurrentIGI = CurrentIGI+1; - else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_LPS) - CurrentIGI = CurrentIGI-1; - } else { + else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_LPS) + CurrentIGI = CurrentIGI-1; + } + else + { CurrentIGI = RSSI_Lower; } - /* Lower bound checking */ + //Lower bound checking - /* RSSI Lower bound check */ - if ((pDM_Odm->RSSI_Min-10) > DM_DIG_MIN_NIC) - RSSI_Lower = (pDM_Odm->RSSI_Min-10); + //RSSI Lower bound check + if((pDM_Odm->RSSI_Min-10) > DM_DIG_MIN_NIC) + RSSI_Lower =(pDM_Odm->RSSI_Min-10); else - RSSI_Lower = DM_DIG_MIN_NIC; + RSSI_Lower =DM_DIG_MIN_NIC; - /* Upper and Lower Bound checking */ - if (CurrentIGI > DM_DIG_MAX_NIC) - CurrentIGI = DM_DIG_MAX_NIC; - else if (CurrentIGI < RSSI_Lower) - CurrentIGI = RSSI_Lower; + //Upper and Lower Bound checking + if(CurrentIGI > DM_DIG_MAX_NIC) + CurrentIGI=DM_DIG_MAX_NIC; + else if(CurrentIGI < RSSI_Lower) + CurrentIGI =RSSI_Lower; - ODM_Write_DIG(pDM_Odm, CurrentIGI);/* ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); */ + ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); + +} +#endif + +VOID +odm_AdaptivityInit( +IN PDM_ODM_T pDM_Odm +) +{ + if(pDM_Odm->SupportICType == ODM_RTL8723B) + { + pDM_Odm->TH_L2H_ini = 0xf8; // -8 + } + if((pDM_Odm->SupportICType == ODM_RTL8192E)&&(pDM_Odm->SupportInterface == ODM_ITRF_PCIE)) + { + pDM_Odm->TH_L2H_ini = 0xf0; // -16 + } + else + { + pDM_Odm->TH_L2H_ini = 0xf9; // -7 + } + + pDM_Odm->TH_EDCCA_HL_diff = 7; + pDM_Odm->IGI_Base = 0x32; + pDM_Odm->IGI_target = 0x1c; + pDM_Odm->ForceEDCCA = 0; + pDM_Odm->AdapEn_RSSI = 20; + + //Reg524[11]=0 is easily to transmit packets during adaptivity test + + //ODM_SetBBReg(pDM_Odm, 0x524, BIT11, 1);// stop counting if EDCCA is asserted } -void odm_DIGInit(struct odm_dm_struct *pDM_Odm) -{ - struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; - pDM_DigTable->CurIGValue = (u8) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm)); - pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; - pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; - pDM_DigTable->FALowThresh = DM_false_ALARM_THRESH_LOW; - pDM_DigTable->FAHighThresh = DM_false_ALARM_THRESH_HIGH; - if (pDM_Odm->BoardType == ODM_BOARD_HIGHPWR) { +VOID +odm_Adaptivity( + IN PDM_ODM_T pDM_Odm, + IN u1Byte IGI +) +{ + s1Byte TH_L2H_dmc, TH_H2L_dmc; + s1Byte TH_L2H, TH_H2L, Diff, IGI_target; + u4Byte value32; + BOOLEAN EDCCA_State = 0; + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PADAPTER pAdapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN bFwCurrentInPSMode=FALSE; + PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); + + pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_FW_PSMODE_STATUS, (pu1Byte)(&bFwCurrentInPSMode)); + + // Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14. + if(bFwCurrentInPSMode) + return; +#endif + + if(!(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Go to odm_DynamicEDCCA() \n")); + // Add by Neil Chen to enable edcca to MP Platform +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + // Adjust EDCCA. + if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + odm_DynamicEDCCA(pDM_Odm); +#endif + return; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_Adaptivity() =====> \n")); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ForceEDCCA=%d, IGI_Base=0x%x, TH_L2H_ini = %d, TH_EDCCA_HL_diff = %d, AdapEn_RSSI = %d\n", + pDM_Odm->ForceEDCCA, pDM_Odm->IGI_Base, pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff, pDM_Odm->AdapEn_RSSI)); + + if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) + ODM_SetBBReg(pDM_Odm, 0x800, BIT10, 0); //ADC_mask enable + + if((!pDM_Odm->bLinked)||(*pDM_Odm->pChannel > 149)) // Band4 doesn't need adaptivity + { + if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + { + ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte0, 0x7f); + ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte2, 0x7f); + } + else + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, 0xFFFF, (0x7f<<8) | 0x7f); + return; + } + +#if (DM_ODM_SUPPORT_TYPE==ODM_MP) + if(pMgntInfo->IOTPeer == HT_IOT_PEER_BROADCOM) + ODM_Write1Byte(pDM_Odm, REG_TRX_SIFS_OFDM, 0x0a); + else + ODM_Write1Byte(pDM_Odm, REG_TRX_SIFS_OFDM, 0x0e); +#endif + if(!pDM_Odm->ForceEDCCA) + { + if(pDM_Odm->RSSI_Min > pDM_Odm->AdapEn_RSSI) + EDCCA_State = 1; + else if(pDM_Odm->RSSI_Min < (pDM_Odm->AdapEn_RSSI - 5)) + EDCCA_State = 0; + } + else + EDCCA_State = 1; + //if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (*pDM_Odm->pBandType == BAND_ON_5G)) + //IGI_target = pDM_Odm->IGI_Base; + //else + { + + if(*pDM_Odm->pBandWidth == ODM_BW20M) //CHANNEL_WIDTH_20 + IGI_target = pDM_Odm->IGI_Base; + else if(*pDM_Odm->pBandWidth == ODM_BW40M) + IGI_target = pDM_Odm->IGI_Base + 2; + else if(*pDM_Odm->pBandWidth == ODM_BW80M) + IGI_target = pDM_Odm->IGI_Base + 6; + else + IGI_target = pDM_Odm->IGI_Base; + } + + pDM_Odm->IGI_target = (u1Byte) IGI_target; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("BandWidth=%s, IGI_target=0x%x, EDCCA_State=%d\n", + (*pDM_Odm->pBandWidth==ODM_BW80M)?"80M":((*pDM_Odm->pBandWidth==ODM_BW40M)?"40M":"20M"), IGI_target, EDCCA_State)); + + if(EDCCA_State == 1) + { + Diff = IGI_target -(s1Byte)IGI; + TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; + if(TH_L2H_dmc > 10) TH_L2H_dmc = 10; + TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; + } + else + { + TH_L2H_dmc = 0x7f; + TH_H2L_dmc = 0x7f; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("IGI=0x%x, TH_L2H_dmc = %d, TH_H2L_dmc = %d\n", + IGI, TH_L2H_dmc, TH_H2L_dmc)); + + if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + { + ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte0, (u1Byte)TH_L2H_dmc); + ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte2, (u1Byte)TH_H2L_dmc); + } + else + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, 0xFFFF, ((u1Byte)TH_H2L_dmc<<8) | (u1Byte)TH_L2H_dmc); +} + +#if 1 +VOID +odm_DIGInit( + IN PDM_ODM_T pDM_Odm + ) +{ + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + + //pDM_DigTable->Dig_Enable_Flag = TRUE; + //pDM_DigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; + pDM_DigTable->CurIGValue = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm)); + //pDM_DigTable->PreIGValue = 0x0; + //pDM_DigTable->CurSTAConnectState = pDM_DigTable->PreSTAConnectState = DIG_STA_DISCONNECT; + //pDM_DigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT; + pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; + pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; + pDM_DigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW; + pDM_DigTable->FAHighThresh = DM_FALSEALARM_THRESH_HIGH; + if(pDM_Odm->BoardType & (ODM_BOARD_EXT_PA|ODM_BOARD_EXT_LNA)) + { pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; - } else { + } + else + { pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; } @@ -669,402 +1975,1516 @@ void odm_DIGInit(struct odm_dm_struct *pDM_Odm) pDM_DigTable->Recover_cnt = 0; pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC; pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC; - pDM_DigTable->bMediaConnect_0 = false; - pDM_DigTable->bMediaConnect_1 = false; + pDM_DigTable->bMediaConnect_0 = FALSE; + pDM_DigTable->bMediaConnect_1 = FALSE; + + //To Initialize pDM_Odm->bDMInitialGainEnable == FALSE to avoid DIG error + pDM_Odm->bDMInitialGainEnable = TRUE; + + //To Initi BT30 IGI + pDM_DigTable->BT30_CurIGI=0x32; - /* To Initialize pDM_Odm->bDMInitialGainEnable == false to avoid DIG error */ - pDM_Odm->bDMInitialGainEnable = true; } -void odm_DIG(struct odm_dm_struct *pDM_Odm) +VOID +odm_DigForBtHsMode( + IN PDM_ODM_T pDM_Odm + ) { - struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; - struct false_alarm_stats *pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; - u8 DIG_Dynamic_MIN; - u8 DIG_MaxOfMin; - bool FirstConnect, FirstDisConnect; - u8 dm_dig_max, dm_dig_min; - u8 CurrentIGI = pDM_DigTable->CurIGValue; +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + pDIG_T pDM_DigTable=&pDM_Odm->DM_DigTable; + u1Byte digForBtHs=0; + u1Byte digUpBound=0x5a; + + if(pDM_Odm->bBtConnectProcess) + { + if(pDM_Odm->SupportICType&(ODM_RTL8723A)) + digForBtHs = 0x28; + else + digForBtHs = 0x22; + } + else + { + // + // Decide DIG value by BT HS RSSI. + // + digForBtHs = pDM_Odm->btHsRssi+4; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()==>\n")); - if ((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) || (!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, - ("odm_DIG() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n")); + //DIG Bound + if(pDM_Odm->SupportICType&(ODM_RTL8723A)) + digUpBound = 0x3e; + + if(digForBtHs > digUpBound) + digForBtHs = digUpBound; + if(digForBtHs < 0x1c) + digForBtHs = 0x1c; + + // update Current IGI + pDM_DigTable->BT30_CurIGI = digForBtHs; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DigForBtHsMode() : set DigValue=0x%x\n", digForBtHs)); +#endif +} + +VOID +odm_DIG( + IN PDM_ODM_T pDM_Odm + ) +{ + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + PFALSE_ALARM_STATISTICS pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; + u1Byte DIG_Dynamic_MIN; + u1Byte DIG_MaxOfMin; + BOOLEAN FirstConnect, FirstDisConnect; + u1Byte dm_dig_max, dm_dig_min, offset; + u1Byte CurrentIGI = pDM_DigTable->CurIGValue; + u1Byte Adap_IGI_Upper = pDM_Odm->IGI_target + 30 + (u1Byte) pDM_Odm->TH_L2H_ini -(u1Byte) pDM_Odm->TH_EDCCA_HL_diff; + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) +// This should be moved out of OUTSRC + PADAPTER pAdapter = pDM_Odm->Adapter; +#if OS_WIN_FROM_WIN7(OS_VERSION) + if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Is AP mode or In HCT Test \n")); return; } - - if (*(pDM_Odm->pbScanInProcess)) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In Scan Progress\n")); +#endif +/* + if (pDM_Odm->SupportICType==ODM_RTL8723B) + return; +*/ +#if(BT_30_SUPPORT == 1) + if(pDM_Odm->bBtHsOperation) + { + odm_DigForBtHsMode(pDM_Odm); + } +#endif + if(!(pDM_Odm->SupportICType &(ODM_RTL8723A|ODM_RTL8188E))) + { + if(pRX_HP_Table->RXHP_flag == 1) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In RXHP Operation \n")); + return; + } + } +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) +#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV + if((pDM_Odm->bLinked) && (pDM_Odm->Adapter->registrypriv.force_igi !=0)) + { + printk("pDM_Odm->RSSI_Min=%d \n",pDM_Odm->RSSI_Min); + ODM_Write_DIG(pDM_Odm,pDM_Odm->Adapter->registrypriv.force_igi); return; } - - /* add by Neil Chen to avoid PSD is processing */ - if (pDM_Odm->bDMInitialGainEnable == false) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: PSD is Processing\n")); +#endif +#endif +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + prtl8192cd_priv priv = pDM_Odm->priv; + if (!((priv->up_time > 5) && (priv->up_time % 2)) ) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Not In DIG Operation Period \n")); return; } +#endif - if (pDM_Odm->SupportICType == ODM_RTL8192D) { - if (*(pDM_Odm->pMacPhyMode) == ODM_DMSP) { - if (*(pDM_Odm->pbMasterOfDMSP)) { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()==>\n")); + //if(!(pDM_Odm->SupportAbility & (ODM_BB_DIG|ODM_BB_FA_CNT))) + if((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) ||(!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) + { +#if 0 + if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) + { + if ((pDM_Odm->SupportICType == ODM_RTL8192C) && (pDM_Odm->ExtLNA == 1)) + CurrentIGI = 0x30; //pDM_DigTable->CurIGValue = 0x30; + else + CurrentIGI = 0x20; //pDM_DigTable->CurIGValue = 0x20; + ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); + } +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n")); + return; + } + + if(*(pDM_Odm->pbScanInProcess)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In Scan Progress \n")); + return; + } + + //add by Neil Chen to avoid PSD is processing + if(pDM_Odm->SupportICType==ODM_RTL8723A) + { + if(pDM_Odm->bDMInitialGainEnable == FALSE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: PSD is Processing \n")); + return; + } + } + + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) + { + if(*(pDM_Odm->pbMasterOfDMSP)) + { DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); - } else { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; - FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_1); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1); + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); } - } else { - if (*(pDM_Odm->pBandType) == ODM_BAND_5G) { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); - } else { + else + { DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; - FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_1); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1); + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); + } + } + else + { + if(*(pDM_Odm->pBandType) == ODM_BAND_5G) + { + DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); + } + else + { + DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); } } - } else { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); } + else + { + DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); + } + + //1 Boundary Decision + if(pDM_Odm->SupportICType & (ODM_RTL8192C) &&(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))) + { + if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) + { - /* 1 Boundary Decision */ - if ((pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8723A)) && - ((pDM_Odm->BoardType == ODM_BOARD_HIGHPWR) || pDM_Odm->ExtLNA)) { - if (pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) { dm_dig_max = DM_DIG_MAX_AP_HP; dm_dig_min = DM_DIG_MIN_AP_HP; - } else { + } + else + { dm_dig_max = DM_DIG_MAX_NIC_HP; dm_dig_min = DM_DIG_MIN_NIC_HP; } DIG_MaxOfMin = DM_DIG_MAX_AP_HP; - } else { - if (pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) { + } + else + { + if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) + { +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) +#ifdef DFS + if (!priv->pmib->dot11DFSEntry.disable_DFS && + (OPMODE & WIFI_AP_STATE) && + (((pDM_Odm->ControlChannel >= 52) && + (pDM_Odm->ControlChannel <= 64)) || + ((pDM_Odm->ControlChannel >= 100) && + (pDM_Odm->ControlChannel <= 140)))) + dm_dig_max = 0x24; + else +#endif + if (priv->pmib->dot11RFEntry.tx2path) { + if (*(pDM_Odm->pWirelessMode) == ODM_WM_B)//(priv->pmib->dot11BssType.net_work_type == WIRELESS_11B) + dm_dig_max = 0x2A; + else + dm_dig_max = 0x32; + } + else +#endif dm_dig_max = DM_DIG_MAX_AP; dm_dig_min = DM_DIG_MIN_AP; DIG_MaxOfMin = dm_dig_max; - } else { + } + else + { + if((pDM_Odm->SupportICType >= ODM_RTL8188E) && (pDM_Odm->SupportPlatform & (ODM_MP|ODM_CE))) + dm_dig_max = 0x5A; + else + dm_dig_max = DM_DIG_MAX_NIC; + + if(pDM_Odm->SupportICType != ODM_RTL8821) + dm_dig_min = DM_DIG_MIN_NIC; + else + dm_dig_min = 0x1C; + + DIG_MaxOfMin = DM_DIG_MAX_AP; + } + } + + + if(pDM_Odm->bLinked) + { + if(pDM_Odm->SupportICType&(ODM_RTL8723A/*|ODM_RTL8821*/)) + { + //2 Upper Bound + if(( pDM_Odm->RSSI_Min + 10) > DM_DIG_MAX_NIC ) + pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; + else if(( pDM_Odm->RSSI_Min + 10) < DM_DIG_MIN_NIC ) + pDM_DigTable->rx_gain_range_max = DM_DIG_MIN_NIC; + else + pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 10; + + //BT is Concurrent + + if(pDM_Odm->bBtLimitedDig) + { + if(pDM_Odm->RSSI_Min>10) + { + if((pDM_Odm->RSSI_Min - 10) > DM_DIG_MAX_NIC) + DIG_Dynamic_MIN = DM_DIG_MAX_NIC; + else if((pDM_Odm->RSSI_Min - 10) < DM_DIG_MIN_NIC) + DIG_Dynamic_MIN = DM_DIG_MIN_NIC; + else + DIG_Dynamic_MIN = pDM_Odm->RSSI_Min - 10; + } + else + DIG_Dynamic_MIN=DM_DIG_MIN_NIC; + } + else + { + if((pDM_Odm->RSSI_Min + 20) > dm_dig_max ) + pDM_DigTable->rx_gain_range_max = dm_dig_max; + else if((pDM_Odm->RSSI_Min + 20) < dm_dig_min ) + pDM_DigTable->rx_gain_range_max = dm_dig_min; + else + pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20; + + } + } + else + { + if((pDM_Odm->SupportICType & (ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8812|ODM_RTL8821)) && (pDM_Odm->bBtLimitedDig==1)){ + //2 Modify DIG upper bound for 92E, 8723B, 8821 & 8812 BT + if((pDM_Odm->RSSI_Min + 10) > dm_dig_max ) + pDM_DigTable->rx_gain_range_max = dm_dig_max; + else if((pDM_Odm->RSSI_Min + 10) < dm_dig_min ) + pDM_DigTable->rx_gain_range_max = dm_dig_min; + else + pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 10; + } + else{ + + //2 Modify DIG upper bound + //2013.03.19 Luke: Modified upper bound for Netgear rental house test + if(pDM_Odm->SupportICType != ODM_RTL8821) + offset = 20; + else + offset = 10; + + if((pDM_Odm->RSSI_Min + offset) > dm_dig_max ) + pDM_DigTable->rx_gain_range_max = dm_dig_max; + else if((pDM_Odm->RSSI_Min + offset) < dm_dig_min ) + pDM_DigTable->rx_gain_range_max = dm_dig_min; + else + pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + offset; + + } + + //2 Modify DIG lower bound + /* + if((pFalseAlmCnt->Cnt_all > 500)&&(DIG_Dynamic_MIN < 0x25)) + DIG_Dynamic_MIN++; + else if(((pFalseAlmCnt->Cnt_all < 500)||(pDM_Odm->RSSI_Min < 8))&&(DIG_Dynamic_MIN > dm_dig_min)) + DIG_Dynamic_MIN--; + */ + + + //1 Lower Bound for 88E AntDiv +#if (RTL8188E_SUPPORT == 1) + if((pDM_Odm->SupportICType == ODM_RTL8188E)&&(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) + { + if((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ||(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)) + { + DIG_Dynamic_MIN = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d \n",pDM_DigTable->AntDiv_RSSI_max)); + } + } + else +#endif + { + if(pDM_Odm->SupportICType != ODM_RTL8723B) + offset = 0; + else + offset = 12; + + if(pDM_Odm->RSSI_Min - offset < dm_dig_min) + DIG_Dynamic_MIN = dm_dig_min; + else if (pDM_Odm->RSSI_Min - offset > DIG_MaxOfMin) + DIG_Dynamic_MIN = DIG_MaxOfMin; + else + DIG_Dynamic_MIN = pDM_Odm->RSSI_Min - offset; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : bOneEntryOnly=TRUE, DIG_Dynamic_MIN=0x%x\n",DIG_Dynamic_MIN)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : pDM_Odm->RSSI_Min=%d\n",pDM_Odm->RSSI_Min)); + } + + + } + } + else + { + pDM_DigTable->rx_gain_range_max = dm_dig_max; + DIG_Dynamic_MIN = dm_dig_min; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : No Link\n")); + } + + //1 Modify DIG lower bound, deal with abnorally large false alarm + if(pFalseAlmCnt->Cnt_all > 10000) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n")); + + if(pDM_DigTable->LargeFAHit != 3) + pDM_DigTable->LargeFAHit++; + if(pDM_DigTable->ForbiddenIGI < CurrentIGI)//if(pDM_DigTable->ForbiddenIGI < pDM_DigTable->CurIGValue) + { + pDM_DigTable->ForbiddenIGI = (u1Byte)CurrentIGI;//pDM_DigTable->ForbiddenIGI = pDM_DigTable->CurIGValue; + pDM_DigTable->LargeFAHit = 1; + } + + if(pDM_DigTable->LargeFAHit >= 3) + { + if((pDM_DigTable->ForbiddenIGI+1) >pDM_DigTable->rx_gain_range_max) + pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; + else + pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); + pDM_DigTable->Recover_cnt = 3600; //3600=2hr + } + + } + else + { + //Recovery mechanism for IGI lower bound + if(pDM_DigTable->Recover_cnt != 0) + pDM_DigTable->Recover_cnt --; + else + { + if(pDM_DigTable->LargeFAHit < 3) + { + if((pDM_DigTable->ForbiddenIGI -1) < DIG_Dynamic_MIN) //DM_DIG_MIN) + { + pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; //DM_DIG_MIN; + pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; //DM_DIG_MIN; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n")); + } + else + { + pDM_DigTable->ForbiddenIGI --; + pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n")); + } + } + else + { + pDM_DigTable->LargeFAHit = 0; + } + } + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): pDM_DigTable->LargeFAHit=%d\n",pDM_DigTable->LargeFAHit)); + + if((pDM_Odm->SupportPlatform&(ODM_MP|ODM_CE))&&(pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 10) && (pDM_Odm->bsta_state)) + pDM_DigTable->rx_gain_range_min = dm_dig_min; + + if(pDM_DigTable->rx_gain_range_min > pDM_DigTable->rx_gain_range_max) + pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; + + //1 Adjust initial gain by false alarm + if(pDM_Odm->bLinked) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG AfterLink\n")); + if(FirstConnect) + { + if(pDM_Odm->RSSI_Min <= DIG_MaxOfMin) + CurrentIGI = pDM_Odm->RSSI_Min; + else + CurrentIGI = DIG_MaxOfMin; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: First Connect\n")); + + //ODM_ConfigBBWithHeaderFile(pDM_Odm, CONFIG_BB_AGC_TAB_DIFF); + } + else + { + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + if(pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2_92D) + CurrentIGI = CurrentIGI + 4;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; + else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_92D) + CurrentIGI = CurrentIGI + 2; //pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; + else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_92D) + CurrentIGI = CurrentIGI - 2;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; + } + else + { + //FA for Combo IC--NeilChen--2012--09--28 + if(pDM_Odm->SupportICType == ODM_RTL8723A) + { + //WLAN and BT ConCurrent + if(pDM_Odm->bBtLimitedDig) + { + if(pFalseAlmCnt->Cnt_all > 0x300) + CurrentIGI = CurrentIGI + 4; + else if (pFalseAlmCnt->Cnt_all > 0x250) + CurrentIGI = CurrentIGI + 2; + else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) + CurrentIGI = CurrentIGI -2; + } + else //Not Concurrent + { + if(pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) + CurrentIGI = CurrentIGI + 4;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; + else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) + CurrentIGI = CurrentIGI + 2;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; + else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) + CurrentIGI = CurrentIGI - 2;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; + } + } + else + { + if(pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) + CurrentIGI = CurrentIGI + 4;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; + else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) + CurrentIGI = CurrentIGI + 2;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; + else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) + CurrentIGI = CurrentIGI - 2;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; + + if((pDM_Odm->SupportPlatform&(ODM_MP|ODM_CE))&&(pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 10) + &&(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH1) && (pDM_Odm->bsta_state)) + { + CurrentIGI = pDM_DigTable->rx_gain_range_min; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Beacon is less than 10 and FA is less than 768, IGI GOES TO 0x1E!!!!!!!!!!!!\n")); + } + } + } + } + } + else + { + //CurrentIGI = pDM_DigTable->rx_gain_range_min;//pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_min + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n")); + if(FirstDisConnect) + { + CurrentIGI = pDM_DigTable->rx_gain_range_min; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First DisConnect \n")); + } + else + { + //2012.03.30 LukeLee: enable DIG before link but with very high thresholds + if(pFalseAlmCnt->Cnt_all > 10000) + CurrentIGI = CurrentIGI + 4; + else if (pFalseAlmCnt->Cnt_all > 8000) + CurrentIGI = CurrentIGI + 2; + else if(pFalseAlmCnt->Cnt_all < 500) + CurrentIGI = CurrentIGI - 2; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): England DIG \n")); + } + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG End Adjust IGI\n")); + //1 Check initial gain by upper/lower bound + + if(CurrentIGI > pDM_DigTable->rx_gain_range_max) + CurrentIGI = pDM_DigTable->rx_gain_range_max; + if(CurrentIGI < pDM_DigTable->rx_gain_range_min) + CurrentIGI = pDM_DigTable->rx_gain_range_min; + + if(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY) + { + if(CurrentIGI > Adap_IGI_Upper) + CurrentIGI = Adap_IGI_Upper; + + if(CurrentIGI > (pDM_Odm->IGI_target + 4)) + CurrentIGI = (u1Byte)pDM_Odm->IGI_target + 4; + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): rx_gain_range_max=0x%x, rx_gain_range_min=0x%x\n", + pDM_DigTable->rx_gain_range_max, pDM_DigTable->rx_gain_range_min)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TotalFA=%d\n", pFalseAlmCnt->Cnt_all)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x\n", CurrentIGI)); + + //2 High power RSSI threshold +#if (DM_ODM_SUPPORT_TYPE & ODM_MP) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); + //PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); + // for LC issue to dymanic modify DIG lower bound----------LC Mocca Issue + u8Byte curTxOkCnt=0, curRxOkCnt=0; + static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; + + //u8Byte OKCntAll=0; + //static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; + //u8Byte CurByteCnt=0, PreByteCnt=0; + + curTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; + curRxOkCnt =pAdapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; + lastTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast; + lastRxOkCnt = pAdapter->RxStats.NumRxBytesUnicast; + //----------------------------------------------------------end for LC Mocca issue + if((pDM_Odm->SupportICType == ODM_RTL8723A)&& (pHalData->UndecoratedSmoothedPWDB > DM_DIG_HIGH_PWR_THRESHOLD)) + { + // High power IGI lower bound + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB)); + if(CurrentIGI < DM_DIG_HIGH_PWR_IGI_LOWER_BOUND) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", pDM_DigTable->CurIGValue)); + //pDM_DigTable->CurIGValue = DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; + CurrentIGI=DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; + } + } + if((pDM_Odm->SupportICType & ODM_RTL8723A) && + IS_WIRELESS_MODE_G(pAdapter)) + { + if(pHalData->UndecoratedSmoothedPWDB > 0x28) + { + if(CurrentIGI < DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND) + { + //pDM_DigTable->CurIGValue = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; + CurrentIGI = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; + } + } + } +#if 0 + if((pDM_Odm->SupportICType & ODM_RTL8723A)&&(pMgntInfo->CustomerID = RT_CID_LENOVO_CHINA)) + { + OKCntAll = (curTxOkCnt+curRxOkCnt); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", CurrentIGI)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): OKCntAll(%#x)\n", OKCntAll)); + //8723AS_VAU + if(pDM_Odm->SupportInterface==ODM_ITRF_USB) + { + if(pHalData->UndecoratedSmoothedPWDB < 12) + { + if(CurrentIGI > DM_DIG_MIN_NIC) + { + if(OKCntAll >= 1500000) // >=6Mbps + CurrentIGI=0x1B; + else if(OKCntAll >= 1000000) //4Mbps + CurrentIGI=0x1A; + else if(OKCntAll >= 500000) //2Mbps + CurrentIGI=0x19; + else if(OKCntAll >= 250000) //1Mbps + CurrentIGI=0x18; + else + { + CurrentIGI=0x17; //SCAN mode + } + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("Modify---->CurIGValue(%#x)\n", CurrentIGI)); + } + } + } +#endif +} +#endif + +#if (RTL8192D_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + //sherry delete DualMacSmartConncurrent 20110517 + if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) + { + ODM_Write_DIG_DMSP(pDM_Odm, (u1Byte)CurrentIGI);//ODM_Write_DIG_DMSP(pDM_Odm, pDM_DigTable->CurIGValue); + if(*(pDM_Odm->pbMasterOfDMSP)) + { + pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; + } + else + { + pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; + } + } + else + { + ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); + if(*(pDM_Odm->pBandType) == ODM_BAND_5G) + { + pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; + } + else + { + pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; + } + } + } + else +#endif + { + #if(BT_30_SUPPORT == 1) + if(pDM_Odm->bBtHsOperation) + { + if(pDM_Odm->bLinked) + { + if(pDM_DigTable->BT30_CurIGI > (CurrentIGI)) + { + ODM_Write_DIG(pDM_Odm, CurrentIGI); + + } + else + { + ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI); + } + pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; + } + else + { + if(pDM_Odm->bLinkInProcess) + { + ODM_Write_DIG(pDM_Odm, 0x1c); + } + else if(pDM_Odm->bBtConnectProcess) + { + ODM_Write_DIG(pDM_Odm, 0x28); + } + else + { + ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); + } + } + } + else // BT is not using + #endif + { + ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); + pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; + } + } +} + + +BOOLEAN +odm_DigAbort( + IN PDM_ODM_T pDM_Odm + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) +// This should be moved out of OUTSRC + PADAPTER pAdapter = pDM_Odm->Adapter; + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; + +#if OS_WIN_FROM_WIN7(OS_VERSION) + if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Is AP mode or In HCT Test \n")); + return TRUE; + } +#endif + + if(pRX_HP_Table->RXHP_flag == 1) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In RXHP Operation \n")); + return TRUE; + } + + return FALSE; +#else // For Other team any special case for DIG? + return FALSE; +#endif + + +} + + +#else +VOID +odm_DIGInit( + IN PDM_ODM_T pDM_Odm + ) +{ + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + + //pDM_DigTable->Dig_Enable_Flag = TRUE; + //pDM_DigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; + pDM_DigTable->CurIGValue = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm)); + //pDM_DigTable->PreIGValue = 0x0; + //pDM_DigTable->CurSTAConnectState = pDM_DigTable->PreSTAConnectState = DIG_STA_DISCONNECT; + //pDM_DigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT; + pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; + pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; + pDM_DigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW; + pDM_DigTable->FAHighThresh = DM_FALSEALARM_THRESH_HIGH; + if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) + { + pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; + pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; + } + else + { + pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; + pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; + } + pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; + pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; + pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; + pDM_DigTable->PreCCK_CCAThres = 0xFF; + pDM_DigTable->CurCCK_CCAThres = 0x83; + pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC; + pDM_DigTable->LargeFAHit = 0; + pDM_DigTable->Recover_cnt = 0; + pDM_DigTable->DIG_Dynamic_MIN_0 =DM_DIG_MIN_NIC; + pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC; + pDM_DigTable->bMediaConnect_0 = FALSE; + pDM_DigTable->bMediaConnect_1 = FALSE; + + //To Initialize pDM_Odm->bDMInitialGainEnable == FALSE to avoid DIG error + pDM_Odm->bDMInitialGainEnable = TRUE; + +} + + +VOID +odm_DIG( + IN PDM_ODM_T pDM_Odm + ) +{ + + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + PFALSE_ALARM_STATISTICS pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; + u1Byte DIG_Dynamic_MIN; + u1Byte DIG_MaxOfMin; + BOOLEAN FirstConnect, FirstDisConnect; + u1Byte dm_dig_max, dm_dig_min; + u1Byte CurrentIGI = pDM_DigTable->CurIGValue; + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) +// This should be moved out of OUTSRC + PADAPTER pAdapter = pDM_Odm->Adapter; +#if OS_WIN_FROM_WIN7(OS_VERSION) + if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Is AP mode or In HCT Test \n")); + return; + } +#endif +#if(BT_30_SUPPORT == 1) + if(pDM_Odm->bBtHsOperation) + { + odm_DigForBtHsMode(pDM_Odm); + return; + } +#endif + + if(pRX_HP_Table->RXHP_flag == 1) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In RXHP Operation \n")); + return; + } +#endif //end ODM_MP type + +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) +#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV + if((pDM_Odm->bLinked) && (pDM_Odm->Adapter->registrypriv.force_igi !=0)) + { + printk("pDM_Odm->RSSI_Min=%d \n",pDM_Odm->RSSI_Min); + ODM_Write_DIG(pDM_Odm,pDM_Odm->Adapter->registrypriv.force_igi); + return; + } +#endif +#endif +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + prtl8192cd_priv priv = pDM_Odm->priv; + if (!((priv->up_time > 5) && (priv->up_time % 2)) ) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Not In DIG Operation Period \n")); + return; + } +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()==>\n")); + //if(!(pDM_Odm->SupportAbility & (ODM_BB_DIG|ODM_BB_FA_CNT))) + if((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) ||(!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) + { +#if 0 + if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) + { + if ((pDM_Odm->SupportICType == ODM_RTL8192C) && (pDM_Odm->ExtLNA == 1)) + CurrentIGI = 0x30; //pDM_DigTable->CurIGValue = 0x30; + else + CurrentIGI = 0x20; //pDM_DigTable->CurIGValue = 0x20; + ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); + } +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n")); + return; + } + + if(*(pDM_Odm->pbScanInProcess)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In Scan Progress \n")); + return; + } + + //add by Neil Chen to avoid PSD is processing + if(pDM_Odm->bDMInitialGainEnable == FALSE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: PSD is Processing \n")); + return; + } + + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) + { + if(*(pDM_Odm->pbMasterOfDMSP)) + { + DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); + } + else + { + DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); + } + } + else + { + if(*(pDM_Odm->pBandType) == ODM_BAND_5G) + { + DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); + } + else + { + DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); + } + } + } + else + { + DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); + } + + //1 Boundary Decision + if((pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8723A)) && + ((if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))) || pDM_Odm->ExtLNA)) + { + if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) + { + + dm_dig_max = DM_DIG_MAX_AP_HP; + dm_dig_min = DM_DIG_MIN_AP_HP; + } + else + { + dm_dig_max = DM_DIG_MAX_NIC_HP; + dm_dig_min = DM_DIG_MIN_NIC_HP; + } + DIG_MaxOfMin = DM_DIG_MAX_AP_HP; + } + else + { + if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) + { +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) +#ifdef DFS + if (!priv->pmib->dot11DFSEntry.disable_DFS && + (OPMODE & WIFI_AP_STATE) && + (((pDM_Odm->ControlChannel >= 52) && + (pDM_Odm->ControlChannel <= 64)) || + ((pDM_Odm->ControlChannel >= 100) && + (pDM_Odm->ControlChannel <= 140)))) + dm_dig_max = 0x24; + else +#endif + if (priv->pmib->dot11RFEntry.tx2path) { + if (*(pDM_Odm->pWirelessMode) == ODM_WM_B)//(priv->pmib->dot11BssType.net_work_type == WIRELESS_11B) + dm_dig_max = 0x2A; + else + dm_dig_max = 0x32; + } + else +#endif + dm_dig_max = DM_DIG_MAX_AP; + dm_dig_min = DM_DIG_MIN_AP; + DIG_MaxOfMin = dm_dig_max; + } + else + { dm_dig_max = DM_DIG_MAX_NIC; dm_dig_min = DM_DIG_MIN_NIC; DIG_MaxOfMin = DM_DIG_MAX_AP; } } - if (pDM_Odm->bLinked) { - /* 2 8723A Series, offset need to be 10 */ - if (pDM_Odm->SupportICType == (ODM_RTL8723A)) { - /* 2 Upper Bound */ - if ((pDM_Odm->RSSI_Min + 10) > DM_DIG_MAX_NIC) + + + if(pDM_Odm->bLinked) + { + //2 8723A Series, offset need to be 10 //neil + if(pDM_Odm->SupportICType==(ODM_RTL8723A)) + { + //2 Upper Bound + if(( pDM_Odm->RSSI_Min + 10) > DM_DIG_MAX_NIC ) pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; - else if ((pDM_Odm->RSSI_Min + 10) < DM_DIG_MIN_NIC) + else if(( pDM_Odm->RSSI_Min + 10) < DM_DIG_MIN_NIC ) pDM_DigTable->rx_gain_range_max = DM_DIG_MIN_NIC; else pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 10; - /* 2 If BT is Concurrent, need to set Lower Bound */ - DIG_Dynamic_MIN = DM_DIG_MIN_NIC; - } else { - /* 2 Modify DIG upper bound */ - if ((pDM_Odm->RSSI_Min + 20) > dm_dig_max) + + //2 If BT is Concurrent, need to set Lower Bound + +#if(BT_30_SUPPORT == 1) + if(pDM_Odm->bBtBusy) + { + if(pDM_Odm->RSSI_Min>10) + { + if((pDM_Odm->RSSI_Min - 10) > DM_DIG_MAX_NIC) + DIG_Dynamic_MIN = DM_DIG_MAX_NIC; + else if((pDM_Odm->RSSI_Min - 10) < DM_DIG_MIN_NIC) + DIG_Dynamic_MIN = DM_DIG_MIN_NIC; + else + DIG_Dynamic_MIN = pDM_Odm->RSSI_Min - 10; + } + else + DIG_Dynamic_MIN=DM_DIG_MIN_NIC; + } + else +#endif + { + DIG_Dynamic_MIN=DM_DIG_MIN_NIC; + } + } + else + { + //2 Modify DIG upper bound + if((pDM_Odm->RSSI_Min + 20) > dm_dig_max ) pDM_DigTable->rx_gain_range_max = dm_dig_max; - else if ((pDM_Odm->RSSI_Min + 20) < dm_dig_min) + else if((pDM_Odm->RSSI_Min + 20) < dm_dig_min ) pDM_DigTable->rx_gain_range_max = dm_dig_min; else pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20; - /* 2 Modify DIG lower bound */ - if (pDM_Odm->bOneEntryOnly) { - if (pDM_Odm->RSSI_Min < dm_dig_min) + + + //2 Modify DIG lower bound + /* + if((pFalseAlmCnt->Cnt_all > 500)&&(DIG_Dynamic_MIN < 0x25)) + DIG_Dynamic_MIN++; + else if(((pFalseAlmCnt->Cnt_all < 500)||(pDM_Odm->RSSI_Min < 8))&&(DIG_Dynamic_MIN > dm_dig_min)) + DIG_Dynamic_MIN--; + */ + if(pDM_Odm->bOneEntryOnly) + { + if(pDM_Odm->RSSI_Min < dm_dig_min) DIG_Dynamic_MIN = dm_dig_min; else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) DIG_Dynamic_MIN = DIG_MaxOfMin; else DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, - ("odm_DIG() : bOneEntryOnly=true, DIG_Dynamic_MIN=0x%x\n", - DIG_Dynamic_MIN)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, - ("odm_DIG() : pDM_Odm->RSSI_Min=%d\n", - pDM_Odm->RSSI_Min)); - } else if ((pDM_Odm->SupportICType == ODM_RTL8188E) && - (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) { - /* 1 Lower Bound for 88E AntDiv */ - if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) { - DIG_Dynamic_MIN = (u8) pDM_DigTable->AntDiv_RSSI_max; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d\n", - pDM_DigTable->AntDiv_RSSI_max)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : bOneEntryOnly=TRUE, DIG_Dynamic_MIN=0x%x\n",DIG_Dynamic_MIN)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : pDM_Odm->RSSI_Min=%d\n",pDM_Odm->RSSI_Min)); + } + //1 Lower Bound for 88E AntDiv +#if (RTL8188E_SUPPORT == 1) + else if((pDM_Odm->SupportICType == ODM_RTL8188E)&&(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) + { + if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) + { + DIG_Dynamic_MIN = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d \n",pDM_DigTable->AntDiv_RSSI_max)); } - } else { - DIG_Dynamic_MIN = dm_dig_min; + } +#endif + else + { + DIG_Dynamic_MIN=dm_dig_min; } } - } else { + } + else + { pDM_DigTable->rx_gain_range_max = dm_dig_max; DIG_Dynamic_MIN = dm_dig_min; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : No Link\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : No Link\n")); } + + //1 Modify DIG lower bound, deal with abnormally large false alarm + if(pFalseAlmCnt->Cnt_all > 10000) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n")); - /* 1 Modify DIG lower bound, deal with abnormally large false alarm */ - if (pFalseAlmCnt->Cnt_all > 10000) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnornally false alarm case.\n")); - - if (pDM_DigTable->LargeFAHit != 3) - pDM_DigTable->LargeFAHit++; - if (pDM_DigTable->ForbiddenIGI < CurrentIGI) { - pDM_DigTable->ForbiddenIGI = CurrentIGI; + if(pDM_DigTable->LargeFAHit != 3) + pDM_DigTable->LargeFAHit++; + if(pDM_DigTable->ForbiddenIGI < CurrentIGI)//if(pDM_DigTable->ForbiddenIGI < pDM_DigTable->CurIGValue) + { + pDM_DigTable->ForbiddenIGI = CurrentIGI;//pDM_DigTable->ForbiddenIGI = pDM_DigTable->CurIGValue; pDM_DigTable->LargeFAHit = 1; } - if (pDM_DigTable->LargeFAHit >= 3) { - if ((pDM_DigTable->ForbiddenIGI+1) > pDM_DigTable->rx_gain_range_max) + if(pDM_DigTable->LargeFAHit >= 3) + { + if((pDM_DigTable->ForbiddenIGI+1) >pDM_DigTable->rx_gain_range_max) pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; else pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); - pDM_DigTable->Recover_cnt = 3600; /* 3600=2hr */ + pDM_DigTable->Recover_cnt = 3600; //3600=2hr } - } else { - /* Recovery mechanism for IGI lower bound */ - if (pDM_DigTable->Recover_cnt != 0) { - pDM_DigTable->Recover_cnt--; - } else { - if (pDM_DigTable->LargeFAHit < 3) { - if ((pDM_DigTable->ForbiddenIGI-1) < DIG_Dynamic_MIN) { /* DM_DIG_MIN) */ - pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; /* DM_DIG_MIN; */ - pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; /* DM_DIG_MIN; */ + } + else + { + //Recovery mechanism for IGI lower bound + if(pDM_DigTable->Recover_cnt != 0) + pDM_DigTable->Recover_cnt --; + else + { + if(pDM_DigTable->LargeFAHit < 3) + { + if((pDM_DigTable->ForbiddenIGI -1) < DIG_Dynamic_MIN) //DM_DIG_MIN) + { + pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; //DM_DIG_MIN; + pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; //DM_DIG_MIN; ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n")); - } else { - pDM_DigTable->ForbiddenIGI--; + } + else + { + pDM_DigTable->ForbiddenIGI --; pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n")); } - } else { + } + else + { pDM_DigTable->LargeFAHit = 0; } } } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, - ("odm_DIG(): pDM_DigTable->LargeFAHit=%d\n", - pDM_DigTable->LargeFAHit)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): pDM_DigTable->LargeFAHit=%d\n",pDM_DigTable->LargeFAHit)); - /* 1 Adjust initial gain by false alarm */ - if (pDM_Odm->bLinked) { + //1 Adjust initial gain by false alarm + if(pDM_Odm->bLinked) + { ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG AfterLink\n")); - if (FirstConnect) { + if(FirstConnect) + { CurrentIGI = pDM_Odm->RSSI_Min; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: First Connect\n")); - } else { - if (pDM_Odm->SupportICType == ODM_RTL8192D) { - if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2_92D) - CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: First Connect\n")); + } + else + { + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + if(pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2_92D) + CurrentIGI = CurrentIGI + 2;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_92D) - CurrentIGI = CurrentIGI + 1; /* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ - else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_92D) - CurrentIGI = CurrentIGI - 1;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ - } else { - if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) - CurrentIGI = CurrentIGI + 4;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ + CurrentIGI = CurrentIGI + 1; //pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; + else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_92D) + CurrentIGI = CurrentIGI - 1;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; + } + else + { +#if(BT_30_SUPPORT == 1) + if(pDM_Odm->bBtBusy) + { + if(pFalseAlmCnt->Cnt_all > 0x300) + CurrentIGI = CurrentIGI + 2; + else if (pFalseAlmCnt->Cnt_all > 0x250) + CurrentIGI = CurrentIGI + 1; + else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) + CurrentIGI = CurrentIGI -1; + } + else +#endif + { + if(pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) + CurrentIGI = CurrentIGI + 4;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) - CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ - else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) - CurrentIGI = CurrentIGI - 2;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ + CurrentIGI = CurrentIGI + 2;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; + else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) + CurrentIGI = CurrentIGI - 2;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; + + } } - } else { + } + } + else + { + //CurrentIGI = pDM_DigTable->rx_gain_range_min;//pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_min ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n")); - if (FirstDisConnect) { + if(FirstDisConnect) + { CurrentIGI = pDM_DigTable->rx_gain_range_min; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First DisConnect\n")); - } else { - /* 2012.03.30 LukeLee: enable DIG before link but with very high thresholds */ - if (pFalseAlmCnt->Cnt_all > 10000) - CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ - else if (pFalseAlmCnt->Cnt_all > 8000) - CurrentIGI = CurrentIGI + 1;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ - else if (pFalseAlmCnt->Cnt_all < 500) - CurrentIGI = CurrentIGI - 1;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): England DIG\n")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First DisConnect \n")); + } + else + { + //2012.03.30 LukeLee: enable DIG before link but with very high thresholds + if(pFalseAlmCnt->Cnt_all > 10000) + CurrentIGI = CurrentIGI + 2;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; + else if (pFalseAlmCnt->Cnt_all > 8000) + CurrentIGI = CurrentIGI + 1;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; + else if(pFalseAlmCnt->Cnt_all < 500) + CurrentIGI = CurrentIGI - 1;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): England DIG \n")); } } ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG End Adjust IGI\n")); - /* 1 Check initial gain by upper/lower bound */ - if (CurrentIGI > pDM_DigTable->rx_gain_range_max) + //1 Check initial gain by upper/lower bound +/* + if(pDM_DigTable->CurIGValue > pDM_DigTable->rx_gain_range_max) + pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_max; + if(pDM_DigTable->CurIGValue < pDM_DigTable->rx_gain_range_min) + pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_min; +*/ + if(CurrentIGI > pDM_DigTable->rx_gain_range_max) CurrentIGI = pDM_DigTable->rx_gain_range_max; - if (CurrentIGI < pDM_DigTable->rx_gain_range_min) + if(CurrentIGI < pDM_DigTable->rx_gain_range_min) CurrentIGI = pDM_DigTable->rx_gain_range_min; - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, - ("odm_DIG(): rx_gain_range_max=0x%x, rx_gain_range_min=0x%x\n", - pDM_DigTable->rx_gain_range_max, pDM_DigTable->rx_gain_range_min)); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): rx_gain_range_max=0x%x, rx_gain_range_min=0x%x\n", + pDM_DigTable->rx_gain_range_max, pDM_DigTable->rx_gain_range_min)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TotalFA=%d\n", pFalseAlmCnt->Cnt_all)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x\n", CurrentIGI)); - /* 2 High power RSSI threshold */ - - ODM_Write_DIG(pDM_Odm, CurrentIGI);/* ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); */ - pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; -} - -/* 3============================================================ */ -/* 3 FASLE ALARM CHECK */ -/* 3============================================================ */ - -void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm) + //2 High power RSSI threshold +#if (DM_ODM_SUPPORT_TYPE & ODM_MP) { - u32 ret_value; - struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); - if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) + // for LC issue to dymanic modify DIG lower bound----------LC Mocca Issue + u8Byte curTxOkCnt=0, curRxOkCnt=0; + static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; + + u8Byte OKCntAll=0; + //static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; + //u8Byte CurByteCnt=0, PreByteCnt=0; + + curTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; + curRxOkCnt =pAdapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; + lastTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast; + lastRxOkCnt = pAdapter->RxStats.NumRxBytesUnicast; + //----------------------------------------------------------end for LC Mocca issue + if((pDM_Odm->SupportICType == ODM_RTL8723A)&& (pHalData->UndecoratedSmoothedPWDB > DM_DIG_HIGH_PWR_THRESHOLD)) + { + // High power IGI lower bound + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB)); + if(CurrentIGI < DM_DIG_HIGH_PWR_IGI_LOWER_BOUND) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", pDM_DigTable->CurIGValue)); + //pDM_DigTable->CurIGValue = DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; + CurrentIGI=DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; + } + } + if((pDM_Odm->SupportICType & ODM_RTL8723A) && IS_WIRELESS_MODE_G(pAdapter)) + { + if(pHalData->UndecoratedSmoothedPWDB > 0x28) + { + if(CurrentIGI < DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND) + { + //pDM_DigTable->CurIGValue = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; + CurrentIGI = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; + } + } + } +} +#endif + +#if (RTL8192D_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + //sherry delete DualMacSmartConncurrent 20110517 + if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) + { + ODM_Write_DIG_DMSP(pDM_Odm, CurrentIGI);//ODM_Write_DIG_DMSP(pDM_Odm, pDM_DigTable->CurIGValue); + if(*(pDM_Odm->pbMasterOfDMSP)) + { + pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; + } + else + { + pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; + } + } + else + { + ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); + if(*(pDM_Odm->pBandType) == ODM_BAND_5G) + { + pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; + } + else + { + pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; + } + } + } + else +#endif + { + ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); + pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; + } + +} +#endif +//3============================================================ +//3 FASLE ALARM CHECK +//3============================================================ + +VOID +odm_FalseAlarmCounterStatistics( + IN PDM_ODM_T pDM_Odm + ) +{ + u4Byte ret_value; + PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); + +#if (DM_ODM_SUPPORT_TYPE == ODM_AP) + prtl8192cd_priv priv = pDM_Odm->priv; + if( (priv->auto_channel != 0) && (priv->auto_channel != 2) ) + return; +#endif + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + if((pDM_Odm->SupportICType == ODM_RTL8192D) && + (*(pDM_Odm->pMacPhyMode)==ODM_DMSP)&& ////modify by Guo.Mingzhi 2011-12-29 + (!(*(pDM_Odm->pbMasterOfDMSP)))) + { + odm_FalseAlarmCounterStatistics_ForSlaveOfDMSP(pDM_Odm); + return; + } +#endif + + if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) return; - if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { - /* hold ofdm counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); /* hold page C counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); /* hold page D counter */ +// if(pDM_Odm->SupportICType != ODM_RTL8812) + if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + { + //hold ofdm counter + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); //hold page C counter + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); //hold page D counter + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); - FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); - FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); + FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); + FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); - FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); - FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); + FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); + FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); - FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); - FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); + FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); + FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); - FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); + FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); - FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + - FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + - FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; + FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + + FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + + FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; - if (pDM_Odm->SupportICType == ODM_RTL8188E) { +#if (RTL8188E_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8188E) + { ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_SC_CNT_11N, bMaskDWord); - FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff); - FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16); - } + FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff); + FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16); + } +#endif - /* hold cck counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT12, 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT14, 1); - - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); +#if (RTL8192D_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + odm_GetCCKFalseAlarm_92D(pDM_Odm); + } + else +#endif + { + //hold cck counter + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT12, 1); + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT14, 1); + + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); FalseAlmCnt->Cnt_Cck_fail = ret_value; - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); - FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff)<<8; + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); + FalseAlmCnt->Cnt_Cck_fail += (ret_value& 0xff)<<8; - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); - FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) | ((ret_value&0xFF00)>>8); + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); + FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) |((ret_value&0xFF00)>>8); + } + + FalseAlmCnt->Cnt_all = ( FalseAlmCnt->Cnt_Fast_Fsync + + FalseAlmCnt->Cnt_SB_Search_fail + + FalseAlmCnt->Cnt_Parity_Fail + + FalseAlmCnt->Cnt_Rate_Illegal + + FalseAlmCnt->Cnt_Crc8_fail + + FalseAlmCnt->Cnt_Mcs_fail + + FalseAlmCnt->Cnt_Cck_fail); - FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync + - FalseAlmCnt->Cnt_SB_Search_fail + - FalseAlmCnt->Cnt_Parity_Fail + - FalseAlmCnt->Cnt_Rate_Illegal + - FalseAlmCnt->Cnt_Crc8_fail + - FalseAlmCnt->Cnt_Mcs_fail + - FalseAlmCnt->Cnt_Cck_fail); + FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; - FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; +#if (RTL8192C_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8192C) + odm_ResetFACounter_92C(pDM_Odm); +#endif - if (pDM_Odm->SupportICType >= ODM_RTL8723A) { - /* reset false alarm counter registers */ +#if (RTL8192D_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8192D) + odm_ResetFACounter_92D(pDM_Odm); +#endif + + if(pDM_Odm->SupportICType >=ODM_RTL8723A) + { + //reset false alarm counter registers ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 1); ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 0); ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 1); ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 0); - /* update ofdm counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 0); /* update page C counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 0); /* update page D counter */ + //update ofdm counter + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 0); //update page C counter + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 0); //update page D counter - /* reset CCK CCA counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 2); - /* reset CCK FA counter */ - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 2); - } - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Enter odm_FalseAlarmCounterStatistics\n")); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, - ("Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n", - FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, - ("Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n", - FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, - ("Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n", - FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); - } else { /* FOR ODM_IC_11AC_SERIES */ - /* read OFDM FA counter */ + //reset CCK CCA counter + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 0); + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 2); + //reset CCK FA counter + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 0); + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 2); + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Enter odm_FalseAlarmCounterStatistics\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n", + FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n", + FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n", + FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); + } + else //FOR ODM_IC_11AC_SERIES + { + //read OFDM FA counter FalseAlmCnt->Cnt_Ofdm_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_11AC, bMaskLWord); FalseAlmCnt->Cnt_Cck_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_11AC, bMaskLWord); FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail + FalseAlmCnt->Cnt_Cck_fail; - /* reset OFDM FA coutner */ + // reset OFDM FA coutner ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 1); ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 0); - /* reset CCK FA counter */ + // reset CCK FA counter ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 1); + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 1); } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm=%d\n", FalseAlmCnt->Cnt_all)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm=%d\n", FalseAlmCnt->Cnt_all)); } -/* 3============================================================ */ -/* 3 CCK Packet Detect Threshold */ -/* 3============================================================ */ +//3============================================================ +//3 CCK Packet Detect Threshold +//3============================================================ -void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm) +VOID +odm_CCKPacketDetectionThresh( + IN PDM_ODM_T pDM_Odm + ) { - u8 CurCCK_CCAThres; - struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); - if (!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD|ODM_BB_FA_CNT))) + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + u1Byte CurCCK_CCAThres; + PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) +//modify by Guo.Mingzhi 2011-12-29 + if (pDM_Odm->bDualMacSmartConcurrent == TRUE) +// if (pDM_Odm->bDualMacSmartConcurrent == FALSE) return; - if (pDM_Odm->ExtLNA) +#if(BT_30_SUPPORT == 1) + if(pDM_Odm->bBtHsOperation) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() write 0xcd for BT HS mode!!\n")); + ODM_Write_CCK_CCA_Thres(pDM_Odm, 0xcd); return; - if (pDM_Odm->bLinked) { - if (pDM_Odm->RSSI_Min > 25) { + } +#endif +#endif + + if(!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD|ODM_BB_FA_CNT))) + return; + + if(pDM_Odm->ExtLNA) + return; + + if(pDM_Odm->bLinked) + { + if(pDM_Odm->RSSI_Min > 25) CurCCK_CCAThres = 0xcd; - } else if ((pDM_Odm->RSSI_Min <= 25) && (pDM_Odm->RSSI_Min > 10)) { + else if((pDM_Odm->RSSI_Min <= 25) && (pDM_Odm->RSSI_Min > 10)) CurCCK_CCAThres = 0x83; - } else { - if (FalseAlmCnt->Cnt_Cck_fail > 1000) + else + { + if(FalseAlmCnt->Cnt_Cck_fail > 1000) CurCCK_CCAThres = 0x83; else CurCCK_CCAThres = 0x40; } - } else { - if (FalseAlmCnt->Cnt_Cck_fail > 1000) + } + else + { + if(FalseAlmCnt->Cnt_Cck_fail > 1000) CurCCK_CCAThres = 0x83; else CurCCK_CCAThres = 0x40; } - ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); + +#if (RTL8192D_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8192D) + ODM_Write_CCK_CCA_Thres_92D(pDM_Odm, CurCCK_CCAThres); + else +#endif + ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); } -void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres) +VOID +ODM_Write_CCK_CCA_Thres( + IN PDM_ODM_T pDM_Odm, + IN u1Byte CurCCK_CCAThres + ) { - struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres) /* modify by Guo.Mingzhi 2012-01-03 */ - ODM_Write1Byte(pDM_Odm, ODM_REG(CCK_CCA, pDM_Odm), CurCCK_CCAThres); + if(pDM_DigTable->CurCCK_CCAThres!=CurCCK_CCAThres) //modify by Guo.Mingzhi 2012-01-03 + { + ODM_Write1Byte(pDM_Odm, ODM_REG(CCK_CCA,pDM_Odm), CurCCK_CCAThres); + } pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres; pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; + } -/* 3============================================================ */ -/* 3 BB Power Save */ -/* 3============================================================ */ -void odm_DynamicBBPowerSavingInit(struct odm_dm_struct *pDM_Odm) +//3============================================================ +//3 BB Power Save +//3============================================================ +VOID +odm_DynamicBBPowerSavingInit( + IN PDM_ODM_T pDM_Odm + ) { - struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; + pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; pDM_PSTable->PreCCAState = CCA_MAX; pDM_PSTable->CurCCAState = CCA_MAX; @@ -1074,221 +3494,337 @@ void odm_DynamicBBPowerSavingInit(struct odm_dm_struct *pDM_Odm) pDM_PSTable->initialize = 0; } -void odm_DynamicBBPowerSaving(struct odm_dm_struct *pDM_Odm) -{ + +VOID +odm_DynamicBBPowerSaving( + IN PDM_ODM_T pDM_Odm + ) +{ +#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) + if ((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8723A)) return; - if (!(pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)) + if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)) return; - if (!(pDM_Odm->SupportPlatform & (ODM_MP|ODM_CE))) + if(!(pDM_Odm->SupportPlatform & (ODM_MP|ODM_CE))) return; - - /* 1 2.Power Saving for 92C */ - if ((pDM_Odm->SupportICType == ODM_RTL8192C) && (pDM_Odm->RFType == ODM_2T2R)) { + + //1 2.Power Saving for 92C + if((pDM_Odm->SupportICType == ODM_RTL8192C) &&(pDM_Odm->RFType == ODM_2T2R)) + { odm_1R_CCA(pDM_Odm); - } else { - /* 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable. */ - /* 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns ot 600ns. */ - /* 1 3.Power Saving for 88C */ - ODM_RF_Saving(pDM_Odm, false); } + + // 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable. + // 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns ot 600ns. + //1 3.Power Saving for 88C + else + { + ODM_RF_Saving(pDM_Odm, FALSE); + } +#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + } -void odm_1R_CCA(struct odm_dm_struct *pDM_Odm) +VOID +odm_1R_CCA( + IN PDM_ODM_T pDM_Odm + ) { - struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; + pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; - if (pDM_Odm->RSSI_Min != 0xFF) { - if (pDM_PSTable->PreCCAState == CCA_2R) { - if (pDM_Odm->RSSI_Min >= 35) + if(pDM_Odm->RSSI_Min!= 0xFF) + { + + if(pDM_PSTable->PreCCAState == CCA_2R) + { + if(pDM_Odm->RSSI_Min >= 35) pDM_PSTable->CurCCAState = CCA_1R; else pDM_PSTable->CurCCAState = CCA_2R; - } else { - if (pDM_Odm->RSSI_Min <= 30) + + } + else{ + if(pDM_Odm->RSSI_Min <= 30) pDM_PSTable->CurCCAState = CCA_2R; else pDM_PSTable->CurCCAState = CCA_1R; } - } else { - pDM_PSTable->CurCCAState = CCA_MAX; } - - if (pDM_PSTable->PreCCAState != pDM_PSTable->CurCCAState) { - if (pDM_PSTable->CurCCAState == CCA_1R) { - if (pDM_Odm->RFType == ODM_2T2R) - ODM_SetBBReg(pDM_Odm, 0xc04, bMaskByte0, 0x13); + else{ + pDM_PSTable->CurCCAState=CCA_MAX; + } + + if(pDM_PSTable->PreCCAState != pDM_PSTable->CurCCAState) + { + if(pDM_PSTable->CurCCAState == CCA_1R) + { + if( pDM_Odm->RFType ==ODM_2T2R ) + { + ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x13); + //PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20); + } else - ODM_SetBBReg(pDM_Odm, 0xc04, bMaskByte0, 0x23); - } else { - ODM_SetBBReg(pDM_Odm, 0xc04, bMaskByte0, 0x33); + { + ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x23); + //PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100 + } + } + else + { + ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x33); + //PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63); } pDM_PSTable->PreCCAState = pDM_PSTable->CurCCAState; } + //ODM_RT_TRACE(pDM_Odm, COMP_BB_POWERSAVING, DBG_LOUD, ("CCAStage = %s\n",(pDM_PSTable->CurCCAState==0)?"1RCCA":"2RCCA")); } -void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) +void +ODM_RF_Saving( + IN PDM_ODM_T pDM_Odm, + IN u1Byte bForceInNormal + ) { - struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; - u8 Rssi_Up_bound = 30; - u8 Rssi_Low_bound = 25; - - if (pDM_Odm->PatchID == 40) { /* RT_CID_819x_FUNAI_TV */ - Rssi_Up_bound = 50; +#if (DM_ODM_SUPPORT_TYPE != ODM_AP) + pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; + u1Byte Rssi_Up_bound = 30 ; + u1Byte Rssi_Low_bound = 25; + #if (DM_ODM_SUPPORT_TYPE == ODM_CE) + if(pDM_Odm->PatchID == 40 ) //RT_CID_819x_FUNAI_TV + { + Rssi_Up_bound = 50 ; Rssi_Low_bound = 45; } - if (pDM_PSTable->initialize == 0) { + #endif + if(pDM_PSTable->initialize == 0){ + pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14; pDM_PSTable->RegC70 = (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord)&BIT3)>>3; pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24; pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12; + //Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); pDM_PSTable->initialize = 1; } - if (!bForceInNormal) { - if (pDM_Odm->RSSI_Min != 0xFF) { - if (pDM_PSTable->PreRFState == RF_Normal) { - if (pDM_Odm->RSSI_Min >= Rssi_Up_bound) + if(!bForceInNormal) + { + if(pDM_Odm->RSSI_Min != 0xFF) + { + if(pDM_PSTable->PreRFState == RF_Normal) + { + if(pDM_Odm->RSSI_Min >= Rssi_Up_bound) pDM_PSTable->CurRFState = RF_Save; else pDM_PSTable->CurRFState = RF_Normal; - } else { - if (pDM_Odm->RSSI_Min <= Rssi_Low_bound) + } + else{ + if(pDM_Odm->RSSI_Min <= Rssi_Low_bound) pDM_PSTable->CurRFState = RF_Normal; else pDM_PSTable->CurRFState = RF_Save; } - } else { - pDM_PSTable->CurRFState = RF_MAX; } - } else { + else + pDM_PSTable->CurRFState=RF_MAX; + } + else + { pDM_PSTable->CurRFState = RF_Normal; } - - if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) { - if (pDM_PSTable->CurRFState == RF_Save) { - /* 8723 RSSI report will be wrong. Set 0x874[5]=1 when enter BB power saving mode. */ - /* Suggested by SD3 Yu-Nan. 2011.01.20. */ - if (pDM_Odm->SupportICType == ODM_RTL8723A) - ODM_SetBBReg(pDM_Odm, 0x874 , BIT5, 0x1); /* Reg874[5]=1b'1 */ - ODM_SetBBReg(pDM_Odm, 0x874 , 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */ - ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, 0); /* RegC70[3]=1'b0 */ - ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]=0x63 */ - ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */ - ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); /* RegA75[7:4]=0x3 */ - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); /* Reg818[28]=1'b0 */ - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x1); /* Reg818[28]=1'b1 */ - } else { - ODM_SetBBReg(pDM_Odm, 0x874 , 0x1CC000, pDM_PSTable->Reg874); - ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, pDM_PSTable->RegC70); - ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); - ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74); - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); - - if (pDM_Odm->SupportICType == ODM_RTL8723A) - ODM_SetBBReg(pDM_Odm, 0x874, BIT5, 0x0); /* Reg874[5]=1b'0 */ + + if(pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) + { + if(pDM_PSTable->CurRFState == RF_Save) + { + // 8723 RSSI report will be wrong. Set 0x874[5]=1 when enter BB power saving mode. + // Suggested by SD3 Yu-Nan. 2011.01.20. + if(pDM_Odm->SupportICType == ODM_RTL8723A) + { + ODM_SetBBReg(pDM_Odm, 0x874 , BIT5, 0x1); //Reg874[5]=1b'1 + } + ODM_SetBBReg(pDM_Odm, 0x874 , 0x1C0000, 0x2); //Reg874[20:18]=3'b010 + ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, 0); //RegC70[3]=1'b0 + ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); //Reg85C[31:24]=0x63 + ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); //Reg874[15:14]=2'b10 + ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3 + ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); //Reg818[28]=1'b0 + ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x1); //Reg818[28]=1'b1 + //ODM_RT_TRACE(pDM_Odm, COMP_BB_POWERSAVING, DBG_LOUD, (" RF_Save")); } - pDM_PSTable->PreRFState = pDM_PSTable->CurRFState; + else + { + ODM_SetBBReg(pDM_Odm, 0x874 , 0x1CC000, pDM_PSTable->Reg874); + ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, pDM_PSTable->RegC70); + ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); + ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74); + ODM_SetBBReg(pDM_Odm,0x818, BIT28, 0x0); + + if(pDM_Odm->SupportICType == ODM_RTL8723A) + { + ODM_SetBBReg(pDM_Odm,0x874 , BIT5, 0x0); //Reg874[5]=1b'0 + } + //ODM_RT_TRACE(pDM_Odm, COMP_BB_POWERSAVING, DBG_LOUD, (" RF_Normal")); + } + pDM_PSTable->PreRFState =pDM_PSTable->CurRFState; } +#endif } -/* 3============================================================ */ -/* 3 RATR MASK */ -/* 3============================================================ */ -/* 3============================================================ */ -/* 3 Rate Adaptive */ -/* 3============================================================ */ -void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm) +//3============================================================ +//3 RATR MASK +//3============================================================ +//3============================================================ +//3 Rate Adaptive +//3============================================================ + +VOID +odm_RateAdaptiveMaskInit( + IN PDM_ODM_T pDM_Odm + ) { - struct odm_rate_adapt *pOdmRA = &pDM_Odm->RateAdaptive; + PODM_RATE_ADAPTIVE pOdmRA = &pDM_Odm->RateAdaptive; +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PMGNT_INFO pMgntInfo = &pDM_Odm->Adapter->MgntInfo; + PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pMgntInfo->RateAdaptive; + + pRA->RATRState = DM_RATR_STA_INIT; + if (pMgntInfo->DM_Type == DM_Type_ByDriver) + pMgntInfo->bUseRAMask = TRUE; + else + pMgntInfo->bUseRAMask = FALSE; + +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) pOdmRA->Type = DM_Type_ByDriver; if (pOdmRA->Type == DM_Type_ByDriver) - pDM_Odm->bUseRAMask = true; + pDM_Odm->bUseRAMask = _TRUE; else - pDM_Odm->bUseRAMask = false; + pDM_Odm->bUseRAMask = _FALSE; + +#endif pOdmRA->RATRState = DM_RATR_STA_INIT; pOdmRA->HighRSSIThresh = 50; pOdmRA->LowRSSIThresh = 20; } -u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u8 rssi_level) +#if (DM_ODM_SUPPORT_TYPE & ODM_MP) +VOID +ODM_RateAdaptiveStateApInit( + IN PADAPTER Adapter , + IN PRT_WLAN_STA pEntry + ) { - struct sta_info *pEntry; - u32 rate_bitmap = 0x0fffffff; - u8 WirelessMode; + PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pEntry->RateAdaptive; + pRA->RATRState = DM_RATR_STA_INIT; +} +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) +u4Byte ODM_Get_Rate_Bitmap( + IN PDM_ODM_T pDM_Odm, + IN u4Byte macid, + IN u4Byte ra_mask, + IN u1Byte rssi_level) +{ + PSTA_INFO_T pEntry; + u4Byte rate_bitmap = 0x0fffffff; + u1Byte WirelessMode; + //u1Byte WirelessMode =*(pDM_Odm->pWirelessMode); + + pEntry = pDM_Odm->pODM_StaInfo[macid]; - if (!IS_STA_VALID(pEntry)) + if(!IS_STA_VALID(pEntry)) return ra_mask; - + WirelessMode = pEntry->wireless_mode; + + switch(WirelessMode) + { + case ODM_WM_B: + if(ra_mask & 0x0000000c) //11M or 5.5M enable + rate_bitmap = 0x0000000d; + else + rate_bitmap = 0x0000000f; + break; + + case (ODM_WM_A|ODM_WM_G): + if(rssi_level == DM_RATR_STA_HIGH) + rate_bitmap = 0x00000f00; + else + rate_bitmap = 0x00000ff0; + break; + + case (ODM_WM_B|ODM_WM_G): + if(rssi_level == DM_RATR_STA_HIGH) + rate_bitmap = 0x00000f00; + else if(rssi_level == DM_RATR_STA_MIDDLE) + rate_bitmap = 0x00000ff0; + else + rate_bitmap = 0x00000ff5; + break; + + case (ODM_WM_G|ODM_WM_N24G) : + case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G) : + case (ODM_WM_A|ODM_WM_B|ODM_WM_G|ODM_WM_N24G) : + { + if ( pDM_Odm->RFType == ODM_1T2R ||pDM_Odm->RFType == ODM_1T1R) + { + if(rssi_level == DM_RATR_STA_HIGH) + { + rate_bitmap = 0x000f0000; + } + else if(rssi_level == DM_RATR_STA_MIDDLE) + { + rate_bitmap = 0x000ff000; + } + else{ + if (*(pDM_Odm->pBandWidth) == ODM_BW40M) + rate_bitmap = 0x000ff015; + else + rate_bitmap = 0x000ff005; + } + } + else + { + if(rssi_level == DM_RATR_STA_HIGH) + { + rate_bitmap = 0x0f8f0000; + } + else if(rssi_level == DM_RATR_STA_MIDDLE) + { + rate_bitmap = 0x0f8ff000; + } + else + { + if (*(pDM_Odm->pBandWidth) == ODM_BW40M) + rate_bitmap = 0x0f8ff015; + else + rate_bitmap = 0x0f8ff005; + } + } + } + break; + default: + //case WIRELESS_11_24N: + //case WIRELESS_11_5N: + if(pDM_Odm->RFType == RF_1T2R) + rate_bitmap = 0x000fffff; + else + rate_bitmap = 0x0fffffff; + break; - switch (WirelessMode) { - case ODM_WM_B: - if (ra_mask & 0x0000000c) /* 11M or 5.5M enable */ - rate_bitmap = 0x0000000d; - else - rate_bitmap = 0x0000000f; - break; - case (ODM_WM_A|ODM_WM_G): - if (rssi_level == DM_RATR_STA_HIGH) - rate_bitmap = 0x00000f00; - else - rate_bitmap = 0x00000ff0; - break; - case (ODM_WM_B|ODM_WM_G): - if (rssi_level == DM_RATR_STA_HIGH) - rate_bitmap = 0x00000f00; - else if (rssi_level == DM_RATR_STA_MIDDLE) - rate_bitmap = 0x00000ff0; - else - rate_bitmap = 0x00000ff5; - break; - case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G): - case (ODM_WM_A|ODM_WM_B|ODM_WM_G|ODM_WM_N24G): - if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) { - if (rssi_level == DM_RATR_STA_HIGH) { - rate_bitmap = 0x000f0000; - } else if (rssi_level == DM_RATR_STA_MIDDLE) { - rate_bitmap = 0x000ff000; - } else { - if (*(pDM_Odm->pBandWidth) == ODM_BW40M) - rate_bitmap = 0x000ff015; - else - rate_bitmap = 0x000ff005; - } - } else { - if (rssi_level == DM_RATR_STA_HIGH) { - rate_bitmap = 0x0f8f0000; - } else if (rssi_level == DM_RATR_STA_MIDDLE) { - rate_bitmap = 0x0f8ff000; - } else { - if (*(pDM_Odm->pBandWidth) == ODM_BW40M) - rate_bitmap = 0x0f8ff015; - else - rate_bitmap = 0x0f8ff005; - } - } - break; - default: - /* case WIRELESS_11_24N: */ - /* case WIRELESS_11_5N: */ - if (pDM_Odm->RFType == RF_1T2R) - rate_bitmap = 0x000fffff; - else - rate_bitmap = 0x0fffffff; - break; } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, - (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", - rssi_level, WirelessMode, rate_bitmap)); + //printk("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n",__FUNCTION__,rssi_level,WirelessMode,rate_bitmap); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n",rssi_level,WirelessMode,rate_bitmap)); return rate_bitmap; -} + +} +#endif /*----------------------------------------------------------------------------- * Function: odm_RefreshRateAdaptiveMask() @@ -1303,705 +3839,8375 @@ u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u * * Revised History: * When Who Remark - * 05/27/2009 hpfan Create Version 0. + * 05/27/2009 hpfan Create Version 0. * *---------------------------------------------------------------------------*/ -void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm) +VOID +odm_RefreshRateAdaptiveMask( + IN PDM_ODM_T pDM_Odm + ) { if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) - return; - /* */ - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - /* */ - switch (pDM_Odm->SupportPlatform) { - case ODM_MP: - odm_RefreshRateAdaptiveMaskMP(pDM_Odm); - break; - case ODM_CE: - odm_RefreshRateAdaptiveMaskCE(pDM_Odm); - break; - case ODM_AP: - case ODM_ADSL: - odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm); - break; + return; + // + // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate + // at the same time. In the stage2/3, we need to prive universal interface and merge all + // HW dynamic mechanism. + // + switch (pDM_Odm->SupportPlatform) + { + case ODM_MP: + odm_RefreshRateAdaptiveMaskMP(pDM_Odm); + break; + + case ODM_CE: + odm_RefreshRateAdaptiveMaskCE(pDM_Odm); + break; + + case ODM_AP: + case ODM_ADSL: + odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm); + break; } + } -void odm_RefreshRateAdaptiveMaskMP(struct odm_dm_struct *pDM_Odm) +VOID +odm_RefreshRateAdaptiveMaskMP( + IN PDM_ODM_T pDM_Odm + ) { -} +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PADAPTER pAdapter = pDM_Odm->Adapter; + PADAPTER pTargetAdapter = NULL; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter); + //PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pMgntInfo->RateAdaptive; + PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; -void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm) -{ - u8 i; - struct adapter *pAdapter = pDM_Odm->Adapter; - - if (pAdapter->bDriverStopped) { + if(pAdapter->bDriverStopped) + { ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); return; } - if (!pDM_Odm->bUseRAMask) { + if(!pMgntInfo->bUseRAMask) + { ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); return; } - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { - struct sta_info *pstat = pDM_Odm->pODM_StaInfo[i]; - if (IS_STA_VALID(pstat)) { - if (ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false , &pstat->rssi_level)) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, - ("RSSI:%d, RSSI_LEVEL:%d\n", - pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level)); - rtw_hal_update_ra_mask(pAdapter, i, pstat->rssi_level); - } + // if default port is connected, update RA table for default port (infrastructure mode only) + if(pAdapter->MgntInfo.mAssoc && (!ACTING_AS_AP(pAdapter))) + { + if( ODM_RAStateCheck(pDM_Odm, pHalData->UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pRA->RATRState) ) + { + ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pHalData->UndecoratedSmoothedPWDB, pRA->RATRState)); + pAdapter->HalFunc.UpdateHalRAMaskHandler( + pAdapter, + FALSE, + 0, + NULL, + NULL, + pRA->RATRState, + RAMask_Normal); } } -} -void odm_RefreshRateAdaptiveMaskAPADSL(struct odm_dm_struct *pDM_Odm) -{ -} + // + // The following part configure AP/VWifi/IBSS rate adaptive mask. + // -/* Return Value: bool */ -/* - true: RATRState is changed. */ -bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate, u8 *pRATRState) -{ - struct odm_rate_adapt *pRA = &pDM_Odm->RateAdaptive; - const u8 GoUpGap = 5; - u8 HighRSSIThreshForRA = pRA->HighRSSIThresh; - u8 LowRSSIThreshForRA = pRA->LowRSSIThresh; - u8 RATRState; - - /* Threshold Adjustment: */ - /* when RSSI state trends to go up one or two levels, make sure RSSI is high enough. */ - /* Here GoUpGap is added to solve the boundary's level alternation issue. */ - switch (*pRATRState) { - case DM_RATR_STA_INIT: - case DM_RATR_STA_HIGH: - break; - case DM_RATR_STA_MIDDLE: - HighRSSIThreshForRA += GoUpGap; - break; - case DM_RATR_STA_LOW: - HighRSSIThreshForRA += GoUpGap; - LowRSSIThreshForRA += GoUpGap; - break; - default: - ODM_RT_ASSERT(pDM_Odm, false, ("wrong rssi level setting %d !", *pRATRState)); - break; + if(pMgntInfo->mIbss) + { + // Target: AP/IBSS peer. + pTargetAdapter = GetDefaultAdapter(pAdapter); + } + else + { + pTargetAdapter = GetFirstAPAdapter(pAdapter); } - /* Decide RATRState by RSSI. */ - if (RSSI > HighRSSIThreshForRA) + // if extension port (softap) is started, updaet RA table for more than one clients associate + if(pTargetAdapter != NULL) + { + int i; + PRT_WLAN_STA pEntry; + PRATE_ADAPTIVE pEntryRA; + + for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) + { +#if 0 //By YJ,120208 + if( pTargetAdapter->MgntInfo.AsocEntry[i].bUsed && pTargetAdapter->MgntInfo.AsocEntry[i].bAssociated) + { + pEntry = pTargetAdapter->MgntInfo.AsocEntry+i; + pEntryRA = &pEntry->RateAdaptive; + if( ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pEntryRA->RATRState) ) + { + ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->MacAddr); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntryRA->RATRState)); + pAdapter->HalFunc.UpdateHalRAMaskHandler( + pTargetAdapter, + FALSE, + pEntry->AID+1, + pEntry->MacAddr, + pEntry, + pEntryRA->RATRState, + RAMask_Normal); + } + } +#else + pEntry = AsocEntry_EnumStation(pTargetAdapter, i); + if(NULL != pEntry) + { + if(pEntry->bAssociated) + { + pEntryRA = &pEntry->RateAdaptive; + if( ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pEntryRA->RATRState) ) + { + ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->MacAddr); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntryRA->RATRState)); + pAdapter->HalFunc.UpdateHalRAMaskHandler( + pTargetAdapter, + FALSE, + pEntry->AID+1, + pEntry->MacAddr, + pEntry, + pEntryRA->RATRState, + RAMask_Normal); + } + } + } +#endif + } + } + + if(pMgntInfo->bSetTXPowerTrainingByOid) + pMgntInfo->bSetTXPowerTrainingByOid = FALSE; +#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) +} + + +VOID +odm_RefreshRateAdaptiveMaskCE( + IN PDM_ODM_T pDM_Odm + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + u1Byte i; + PADAPTER pAdapter = pDM_Odm->Adapter; + + if(pAdapter->bDriverStopped) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); + return; + } + + if(!pDM_Odm->bUseRAMask) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); + return; + } + + //printk("==> %s \n",__FUNCTION__); + + for(i=0; ipODM_StaInfo[i]; + if(IS_STA_VALID(pstat) ) { + if(IS_MCAST( pstat->hwaddr)) //if(psta->mac_id ==1) + continue; + if( TRUE == ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, FALSE , &pstat->rssi_level) ) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level)); + //printk("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level); + rtw_hal_update_ra_mask(pstat, pstat->rssi_level); + } + + } + } + +#endif +} + +VOID +odm_RefreshRateAdaptiveMaskAPADSL( + IN PDM_ODM_T pDM_Odm + ) +{ +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + struct rtl8192cd_priv *priv = pDM_Odm->priv; + struct stat_info *pstat; + + if (!priv->pmib->dot11StationConfigEntry.autoRate) + return; + + if (list_empty(&priv->asoc_list)) + return; + + list_for_each_entry(pstat, &priv->asoc_list, asoc_list) { + if(ODM_RAStateCheck(pDM_Odm, (s4Byte)pstat->rssi, FALSE, &pstat->rssi_level) ) { + ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pstat->hwaddr); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi, pstat->rssi_level)); + + if (GET_CHIP_VER(priv)==VERSION_8188E) { +#ifdef TXREPORT + add_RATid(priv, pstat); +#endif + } + } + } +#endif +} + +// Return Value: BOOLEAN +// - TRUE: RATRState is changed. +BOOLEAN +ODM_RAStateCheck( + IN PDM_ODM_T pDM_Odm, + IN s4Byte RSSI, + IN BOOLEAN bForceUpdate, + OUT pu1Byte pRATRState + ) +{ + PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; + const u1Byte GoUpGap = 5; + u1Byte HighRSSIThreshForRA = pRA->HighRSSIThresh; + u1Byte LowRSSIThreshForRA = pRA->LowRSSIThresh; + u1Byte RATRState; + + // Threshold Adjustment: + // when RSSI state trends to go up one or two levels, make sure RSSI is high enough. + // Here GoUpGap is added to solve the boundary's level alternation issue. + switch (*pRATRState) + { + case DM_RATR_STA_INIT: + case DM_RATR_STA_HIGH: + break; + + case DM_RATR_STA_MIDDLE: + HighRSSIThreshForRA += GoUpGap; + break; + + case DM_RATR_STA_LOW: + HighRSSIThreshForRA += GoUpGap; + LowRSSIThreshForRA += GoUpGap; + break; + + default: + ODM_RT_ASSERT(pDM_Odm, FALSE, ("wrong rssi level setting %d !", *pRATRState) ); + break; + } + + // Decide RATRState by RSSI. + if(RSSI > HighRSSIThreshForRA) RATRState = DM_RATR_STA_HIGH; - else if (RSSI > LowRSSIThreshForRA) + else if(RSSI > LowRSSIThreshForRA) RATRState = DM_RATR_STA_MIDDLE; else RATRState = DM_RATR_STA_LOW; + //printk("==>%s,RATRState:0x%02x ,RSSI:%d \n",__FUNCTION__,RATRState,RSSI); - if (*pRATRState != RATRState || bForceUpdate) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI Level %d -> %d\n", *pRATRState, RATRState)); + if( *pRATRState!=RATRState || bForceUpdate) + { + ODM_RT_TRACE( pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI Level %d -> %d\n", *pRATRState, RATRState) ); *pRATRState = RATRState; - return true; + return TRUE; } - return false; + + return FALSE; } -/* 3============================================================ */ -/* 3 Dynamic Tx Power */ -/* 3============================================================ */ -void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm) +//============================================================ + +//3============================================================ +//3 Dynamic Tx Power +//3============================================================ + +VOID +odm_DynamicTxPowerInit( + IN PDM_ODM_T pDM_Odm + ) { - struct adapter *Adapter = pDM_Odm->Adapter; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + #if DEV_BUS_TYPE==RT_USB_INTERFACE + if(RT_GetInterfaceSelection(Adapter) == INTF_SEL1_USB_High_Power) + { + odm_DynamicTxPowerSavePowerIndex(pDM_Odm); + pMgntInfo->bDynamicTxPowerEnable = TRUE; + } + else + #else + //so 92c pci do not need dynamic tx power? vivi check it later + if(IS_HARDWARE_TYPE_8192D(Adapter)) + pMgntInfo->bDynamicTxPowerEnable = TRUE; + else + pMgntInfo->bDynamicTxPowerEnable = FALSE; + #endif + + + pHalData->LastDTPLvl = TxHighPwrLevel_Normal; + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct dm_priv *pdmpriv = &pHalData->dmpriv; - pdmpriv->bDynamicTxPowerEnable = false; + pdmpriv->bDynamicTxPowerEnable = _FALSE; + + #if (RTL8192C_SUPPORT==1) + #ifdef CONFIG_USB_HCI + + #ifdef CONFIG_INTEL_PROXIM + if((pHalData->BoardType == BOARD_USB_High_PA)||(Adapter->proximity.proxim_support==_TRUE)) + #else + if(pHalData->BoardType == BOARD_USB_High_PA) + #endif + + { + //odm_SavePowerIndex(Adapter); + odm_DynamicTxPowerSavePowerIndex(pDM_Odm); + pdmpriv->bDynamicTxPowerEnable = _TRUE; + } + else + #else + pdmpriv->bDynamicTxPowerEnable = _FALSE; + #endif + #endif + pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal; - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + +#endif + } -void odm_DynamicTxPower(struct odm_dm_struct *pDM_Odm) +VOID +odm_DynamicTxPowerSavePowerIndex( + IN PDM_ODM_T pDM_Odm + ) +{ + u1Byte index; + u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + for(index = 0; index< 6; index++) + pHalData->PowerIndex_backup[index] = PlatformEFIORead1Byte(Adapter, Power_Index_REG[index]); +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + for(index = 0; index< 6; index++) + pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]); +#endif +} + +VOID +odm_DynamicTxPowerRestorePowerIndex( + IN PDM_ODM_T pDM_Odm + ) { - /* For AP/ADSL use struct rtl8192cd_priv * */ - /* For CE/NIC use struct adapter * */ + u1Byte index; + PADAPTER Adapter = pDM_Odm->Adapter; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP)) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + for(index = 0; index< 6; index++) + PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], pHalData->PowerIndex_backup[index]); +#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) + struct dm_priv *pdmpriv = &pHalData->dmpriv; + for(index = 0; index< 6; index++) + rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]); +#endif +#endif +} + +VOID +odm_DynamicTxPowerWritePowerIndex( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Value) +{ + + u1Byte index; + u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; + + for(index = 0; index< 6; index++) + //PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], Value); + ODM_Write1Byte(pDM_Odm, Power_Index_REG[index], Value); + +} + + +VOID +odm_DynamicTxPower( + IN PDM_ODM_T pDM_Odm + ) +{ + // + // For AP/ADSL use prtl8192cd_priv + // For CE/NIC use PADAPTER + // + //PADAPTER pAdapter = pDM_Odm->Adapter; +// prtl8192cd_priv priv = pDM_Odm->priv; if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) return; - /* 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. */ - if (!pDM_Odm->ExtPA) + // 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. + if (pDM_Odm->ExtPA == FALSE) return; + - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - switch (pDM_Odm->SupportPlatform) { - case ODM_MP: - case ODM_CE: - odm_DynamicTxPowerNIC(pDM_Odm); - break; - case ODM_AP: - odm_DynamicTxPowerAP(pDM_Odm); - break; - case ODM_ADSL: - break; + // + // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate + // at the same time. In the stage2/3, we need to prive universal interface and merge all + // HW dynamic mechanism. + // + switch (pDM_Odm->SupportPlatform) + { + case ODM_MP: + case ODM_CE: + odm_DynamicTxPowerNIC(pDM_Odm); + break; + case ODM_AP: + odm_DynamicTxPowerAP(pDM_Odm); + break; + + case ODM_ADSL: + //odm_DIGAP(pDM_Odm); + break; } + + } -void odm_DynamicTxPowerNIC(struct odm_dm_struct *pDM_Odm) -{ + +VOID +odm_DynamicTxPowerNIC( + IN PDM_ODM_T pDM_Odm + ) +{ if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) return; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) - if (pDM_Odm->SupportICType == ODM_RTL8188E) { - /* ??? */ - /* This part need to be redefined. */ + if(pDM_Odm->SupportICType == ODM_RTL8192C) + { + odm_DynamicTxPower_92C(pDM_Odm); } + else if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + odm_DynamicTxPower_92D(pDM_Odm); + } + else if (pDM_Odm->SupportICType & ODM_RTL8188E) + { + // Add Later. + } + else if (pDM_Odm->SupportICType == ODM_RTL8188E) + { + // ??? + // This part need to be redefined. + } +#endif } -void odm_DynamicTxPowerAP(struct odm_dm_struct *pDM_Odm) -{ -} +VOID +odm_DynamicTxPowerAP( + IN PDM_ODM_T pDM_Odm -/* 3============================================================ */ -/* 3 RSSI Monitor */ -/* 3============================================================ */ + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_AP) + prtl8192cd_priv priv = pDM_Odm->priv; + s4Byte i; -void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm) -{ - if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) + if(!priv->pshare->rf_ft_var.tx_pwr_ctrl) return; + +#ifdef HIGH_POWER_EXT_PA + if(pDM_Odm->ExtPA) + tx_power_control(priv); +#endif - /* */ - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - /* */ - switch (pDM_Odm->SupportPlatform) { - case ODM_MP: - odm_RSSIMonitorCheckMP(pDM_Odm); - break; - case ODM_CE: - odm_RSSIMonitorCheckCE(pDM_Odm); - break; - case ODM_AP: - odm_RSSIMonitorCheckAP(pDM_Odm); - break; - case ODM_ADSL: - /* odm_DIGAP(pDM_Odm); */ - break; - } + /* + * Check if station is near by to use lower tx power + */ -} /* odm_RSSIMonitorCheck */ - -void odm_RSSIMonitorCheckMP(struct odm_dm_struct *pDM_Odm) -{ -} - -static void FindMinimumRSSI(struct adapter *pAdapter) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv; - - /* 1 1.Determine the minimum RSSI */ - if ((check_fwstate(pmlmepriv, _FW_LINKED) == false) && - (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) - pdmpriv->MinUndecoratedPWDBForDM = 0; - if (check_fwstate(pmlmepriv, _FW_LINKED) == true) /* Default port */ - pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - else /* associated entry pwdb */ - pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; -} - -void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - int i; - int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff; - u8 sta_cnt = 0; - u32 PWDB_rssi[NUM_STA] = {0};/* 0~15]:MACID, [16~31]:PWDB_rssi */ - struct sta_info *psta; - u8 bcast_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; - - if (!check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) - return; - - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { - psta = pDM_Odm->pODM_StaInfo[i]; - if (IS_STA_VALID(psta) && - (psta->state & WIFI_ASOC_STATE) && - !_rtw_memcmp(psta->hwaddr, bcast_addr, ETH_ALEN) && - !_rtw_memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) { - if (psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) - tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - - if (psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) - tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - if (psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)) - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16)); - } - } - - for (i = 0; i < sta_cnt; i++) { - if (PWDB_rssi[i] != (0)) { - if (pHalData->fw_ractrl) { - /* Report every sta's RSSI to FW */ - } else { - ODM_RA_SetRSSI_8188E( - &(pHalData->odmpriv), (PWDB_rssi[i]&0xFF), (u8)((PWDB_rssi[i]>>16) & 0xFF)); + if ((priv->up_time % 3) == 0 ) { + for(i=0; ipODM_StaInfo[i]; + if(IS_STA_VALID(pstat) ) { + if ((pstat->hp_level == 0) && (pstat->rssi > TX_POWER_NEAR_FIELD_THRESH_AP+4)) + pstat->hp_level = 1; + else if ((pstat->hp_level == 1) && (pstat->rssi < TX_POWER_NEAR_FIELD_THRESH_AP)) + pstat->hp_level = 0; } } } - if (tmpEntryMaxPWDB != 0) /* If associated entry is found */ - pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; +#endif +} + + +VOID +odm_DynamicTxPower_92C( + IN PDM_ODM_T pDM_Odm + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + s4Byte UndecoratedSmoothedPWDB; + + + // STA not connected and AP not connected + if((!pMgntInfo->bMediaConnect) && + (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) + { + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + + //the LastDTPlvl should reset when disconnect, + //otherwise the tx power level wouldn't change when disconnect and connect again. + // Maddest 20091220. + pHalData->LastDTPLvl=TxHighPwrLevel_Normal; + return; + } + +#if (INTEL_PROXIMITY_SUPPORT == 1) + // Intel set fixed tx power + if(pMgntInfo->IntelProximityModeInfo.PowerOutput > 0) + { + switch(pMgntInfo->IntelProximityModeInfo.PowerOutput){ + case 1: + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); + break; + case 2: + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_70; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_70\n")); + break; + case 3: + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_50; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_50\n")); + break; + case 4: + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_35; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_35\n")); + break; + case 5: + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_15; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_15\n")); + break; + default: + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); + break; + } + } else +#endif + { + if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || + (pHalData->DMFlag & HAL_DM_HIPWR_DISABLE) || + pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + } + else + { + if(pMgntInfo->bMediaConnect) // Default port + { + if(ACTING_AS_AP(Adapter) || ACTING_AS_IBSS(Adapter)) + { + UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + else + { + UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + } + else // associated entry pwdb + { + UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + + if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); + } + else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && + (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); + } + else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); + } + } + } + if( pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl ) + { + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192C() Channel = %d \n" , pHalData->CurrentChannel)); + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + if( (pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) && + (pHalData->LastDTPLvl == TxHighPwrLevel_Level1 || pHalData->LastDTPLvl == TxHighPwrLevel_Level2)) //TxHighPwrLevel_Normal + odm_DynamicTxPowerRestorePowerIndex(pDM_Odm); + else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) + odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14); + else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) + odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10); + } + pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; + + +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + + #if (RTL8192C_SUPPORT==1) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + int UndecoratedSmoothedPWDB; + + if(!pdmpriv->bDynamicTxPowerEnable) + return; + +#ifdef CONFIG_INTEL_PROXIM + if(Adapter->proximity.proxim_on== _TRUE){ + struct proximity_priv *prox_priv=Adapter->proximity.proximity_priv; + // Intel set fixed tx power + printk("\n %s Adapter->proximity.proxim_on=%d prox_priv->proxim_modeinfo->power_output=%d \n",__FUNCTION__,Adapter->proximity.proxim_on,prox_priv->proxim_modeinfo->power_output); + if(prox_priv!=NULL){ + if(prox_priv->proxim_modeinfo->power_output> 0) + { + switch(prox_priv->proxim_modeinfo->power_output) + { + case 1: + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_100; + printk("TxHighPwrLevel_100\n"); + break; + case 2: + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_70; + printk("TxHighPwrLevel_70\n"); + break; + case 3: + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_50; + printk("TxHighPwrLevel_50\n"); + break; + case 4: + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_35; + printk("TxHighPwrLevel_35\n"); + break; + case 5: + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_15; + printk("TxHighPwrLevel_15\n"); + break; + default: + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_100; + printk("TxHighPwrLevel_100\n"); + break; + } + } + } + } + else +#endif + { + // STA not connected and AP not connected + if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && + (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) + { + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + + //the LastDTPlvl should reset when disconnect, + //otherwise the tx power level wouldn't change when disconnect and connect again. + // Maddest 20091220. + pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal; + return; + } + + if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port + { + #if 0 + //todo: AP Mode + if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || + (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) + { + UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + else + { + UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + #else + UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + #endif + } + else // associated entry pwdb + { + UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + + if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); + } + else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && + (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); + } + else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); + } + } + if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) ) + { + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) // HP1 -> Normal or HP2 -> Normal + odm_DynamicTxPowerRestorePowerIndex(pDM_Odm); + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) + odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14); + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) + odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10); + } + pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; + #endif +#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + +} + + +VOID +odm_DynamicTxPower_92D( + IN PDM_ODM_T pDM_Odm + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + s4Byte UndecoratedSmoothedPWDB; + + PADAPTER BuddyAdapter = Adapter->BuddyAdapter; + BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(Adapter); + u1Byte HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1; + + + // If dynamic high power is disabled. + if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || + (pHalData->DMFlag & HAL_DM_HIPWR_DISABLE) || + pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + return; + } + + // STA not connected and AP not connected + if((!pMgntInfo->bMediaConnect) && + (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) + { + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + + //the LastDTPlvl should reset when disconnect, + //otherwise the tx power level wouldn't change when disconnect and connect again. + // Maddest 20091220. + pHalData->LastDTPLvl=TxHighPwrLevel_Normal; + return; + } + + if(pMgntInfo->bMediaConnect) // Default port + { + if(ACTING_AS_AP(Adapter) || pMgntInfo->mIbss) + { + UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + else + { + UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + } + else // associated entry pwdb + { + UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + + if(IS_HARDWARE_TYPE_8192D(Adapter) && GET_HAL_DATA(Adapter)->CurrentBandType92D == 1){ + if(UndecoratedSmoothedPWDB >= 0x33) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n")); + } + else if((UndecoratedSmoothedPWDB <0x33) && + (UndecoratedSmoothedPWDB >= 0x2b) ) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); + } + else if(UndecoratedSmoothedPWDB < 0x2b) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n")); + } + + } + else + + { + if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); + } + else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && + (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); + } + else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); + } + + } + +//sherry delete flag 20110517 + if(bGetValueFromBuddyAdapter) + { + ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n")); + if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP) + { + ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() change value \n")); + HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl; + pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP; + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0; + Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = FALSE; + } + } + + if( (pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl) ) + { + ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel)); + if(Adapter->DualMacSmartConcurrent == TRUE) + { + if(BuddyAdapter == NULL) + { + ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n")); + if(!Adapter->bSlaveOfDMSP) + { + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + } + } + else + { + if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) + { + ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n")); + if(Adapter->bSlaveOfDMSP) + { + ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() bslave case \n")); + BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = TRUE; + BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl; + } + else + { + ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() master case \n")); + if(!bGetValueFromBuddyAdapter) + { + ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n")); + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + } + } + } + else + { + ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n")); + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + } + } + } + else + { + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + } + + } + pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) +#if (RTL8192D_SUPPORT==1) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DM_ODM_T *podmpriv = &pHalData->odmpriv; + int UndecoratedSmoothedPWDB; + #if (RTL8192D_EASY_SMART_CONCURRENT == 1) + PADAPTER BuddyAdapter = Adapter->BuddyAdapter; + BOOLEAN bGetValueFromBuddyAdapter = DualMacGetParameterFromBuddyAdapter(Adapter); + u8 HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1; + #endif + + // If dynamic high power is disabled. + if( (pdmpriv->bDynamicTxPowerEnable != _TRUE) || + (!(podmpriv->SupportAbility& ODM_BB_DYNAMIC_TXPWR)) ) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + return; + } + + // STA not connected and AP not connected + if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && + (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) + { + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + //the LastDTPlvl should reset when disconnect, + //otherwise the tx power level wouldn't change when disconnect and connect again. + // Maddest 20091220. + pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal; + return; + } + + if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port + { + #if 0 + //todo: AP Mode + if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || + (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) + { + UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + else + { + UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + #else + UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + #endif + } + else // associated entry pwdb + { + UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } +#if TX_POWER_FOR_5G_BAND == 1 + if(pHalData->CurrentBandType92D == BAND_ON_5G){ + if(UndecoratedSmoothedPWDB >= 0x33) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n")); + } + else if((UndecoratedSmoothedPWDB <0x33) && + (UndecoratedSmoothedPWDB >= 0x2b) ) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); + } + else if(UndecoratedSmoothedPWDB < 0x2b) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n")); + } + } + else +#endif + { + if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); + } + else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && + (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); + } + else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); + } + } +#if (RTL8192D_EASY_SMART_CONCURRENT == 1) + if(bGetValueFromBuddyAdapter) + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n")); + if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP) + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() change value \n")); + HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl; + pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP; + PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); + pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0; + Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = _FALSE; + } + } +#endif + + if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) ) + { + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel)); +#if (RTL8192D_EASY_SMART_CONCURRENT == 1) + if(BuddyAdapter == NULL) + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n")); + if(!Adapter->bSlaveOfDMSP) + { + PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); + } + } + else + { + if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n")); + if(Adapter->bSlaveOfDMSP) + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() bslave case \n")); + BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = _TRUE; + BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl; + } + else + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() master case \n")); + if(!bGetValueFromBuddyAdapter) + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n")); + PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); + } + } + } + else + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n")); + PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); + } + } +#else + PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); +#endif + } + pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; +#endif +#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + +} + + +//3============================================================ +//3 RSSI Monitor +//3============================================================ + +VOID +odm_RSSIMonitorInit( + IN PDM_ODM_T pDM_Odm + ) +{ +} + +VOID +odm_RSSIMonitorCheck( + IN PDM_ODM_T pDM_Odm + ) +{ + // + // For AP/ADSL use prtl8192cd_priv + // For CE/NIC use PADAPTER + // + PADAPTER pAdapter = pDM_Odm->Adapter; + prtl8192cd_priv priv = pDM_Odm->priv; + + if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) + return; + + // + // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate + // at the same time. In the stage2/3, we need to prive universal interface and merge all + // HW dynamic mechanism. + // + switch (pDM_Odm->SupportPlatform) + { + case ODM_MP: + odm_RSSIMonitorCheckMP(pDM_Odm); + break; + + case ODM_CE: + odm_RSSIMonitorCheckCE(pDM_Odm); + break; + + case ODM_AP: + odm_RSSIMonitorCheckAP(pDM_Odm); + break; + + case ODM_ADSL: + //odm_DIGAP(pDM_Odm); + break; + } + +} // odm_RSSIMonitorCheck + + +VOID +odm_RSSIMonitorCheckMP( + IN PDM_ODM_T pDM_Odm + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PRT_WLAN_STA pEntry; + u1Byte i; + s4Byte tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff; + + RTPRINT(FDM, DM_PWDB, ("pHalData->UndecoratedSmoothedPWDB = 0x%x( %d)\n", + pHalData->UndecoratedSmoothedPWDB, + pHalData->UndecoratedSmoothedPWDB)); + + for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) + { + if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) + { + pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); + } + else + { + pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); + } + + if(pEntry!=NULL) + { + if(pEntry->bAssociated) + { + RTPRINT_ADDR(FDM, DM_PWDB, ("pEntry->MacAddr ="), pEntry->MacAddr); + RTPRINT(FDM, DM_PWDB, ("pEntry->rssi = 0x%x(%d)\n", + pEntry->rssi_stat.UndecoratedSmoothedPWDB, + pEntry->rssi_stat.UndecoratedSmoothedPWDB)); + if(pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) + tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; + if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) + tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; + } + } + else + { + break; + } + } + + if(tmpEntryMaxPWDB != 0) // If associated entry is found + { + pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; + RTPRINT(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n", + tmpEntryMaxPWDB, tmpEntryMaxPWDB)); + } + else + { + pHalData->EntryMaxUndecoratedSmoothedPWDB = 0; + } + if(tmpEntryMinPWDB != 0xff) // If associated entry is found + { + pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; + RTPRINT(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", + tmpEntryMinPWDB, tmpEntryMinPWDB)); + } + else + { + pHalData->EntryMinUndecoratedSmoothedPWDB = 0; + } + + // Indicate Rx signal strength to FW. + if(Adapter->MgntInfo.bUseRAMask) + { + u1Byte H2C_Parameter[3] ={0}; + // DbgPrint("RxSS: %lx =%ld\n", pHalData->UndecoratedSmoothedPWDB, pHalData->UndecoratedSmoothedPWDB); + H2C_Parameter[2] = (u1Byte)(pHalData->UndecoratedSmoothedPWDB & 0xFF); + H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 + + ODM_FillH2CCmd(Adapter, ODM_H2C_RSSI_REPORT, 3, H2C_Parameter); + } + else + { + PlatformEFIOWrite1Byte(Adapter, 0x4fe, (u1Byte)pHalData->UndecoratedSmoothedPWDB); + //DbgPrint("0x4fe write %x %d\n", pHalData->UndecoratedSmoothedPWDB, pHalData->UndecoratedSmoothedPWDB); + } +#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) +} + +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) +// +//sherry move from DUSC to here 20110517 +// +static VOID +FindMinimumRSSI_Dmsp( + IN PADAPTER pAdapter +) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + s32 Rssi_val_min_back_for_mac0; + BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(pAdapter); + BOOLEAN bRestoreRssi = _FALSE; + PADAPTER BuddyAdapter = pAdapter->BuddyAdapter; + + if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) + { + if(BuddyAdapter!= NULL) + { + if(pHalData->bSlaveOfDMSP) + { + //ODM_RT_TRACE(pDM_Odm,COMP_EASY_CONCURRENT,DBG_LOUD,("bSlavecase of dmsp\n")); + BuddyAdapter->DualMacDMSPControl.RssiValMinForAnotherMacOfDMSP = pdmpriv->MinUndecoratedPWDBForDM; + } + else + { + if(bGetValueFromBuddyAdapter) + { + //ODM_RT_TRACE(pDM_Odm,COMP_EASY_CONCURRENT,DBG_LOUD,("get new RSSI\n")); + bRestoreRssi = _TRUE; + Rssi_val_min_back_for_mac0 = pdmpriv->MinUndecoratedPWDBForDM; + pdmpriv->MinUndecoratedPWDBForDM = pAdapter->DualMacDMSPControl.RssiValMinForAnotherMacOfDMSP; + } + } + } + + } + + if(bRestoreRssi) + { + bRestoreRssi = _FALSE; + pdmpriv->MinUndecoratedPWDBForDM = Rssi_val_min_back_for_mac0; + } +#endif +} + +static void +FindMinimumRSSI( +IN PADAPTER pAdapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); + + //1 1.Determine the minimum RSSI + + if((pDM_Odm->bLinked != _TRUE) && + (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) + { + pdmpriv->MinUndecoratedPWDBForDM = 0; + //ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any \n")); + } + else + { + pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + } + + //DBG_8192C("%s=>MinUndecoratedPWDBForDM(%d)\n",__FUNCTION__,pdmpriv->MinUndecoratedPWDBForDM); + //ODM_RT_TRACE(pDM_Odm,COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",pHalData->MinUndecoratedPWDBForDM)); +} +#endif + +VOID +odm_RSSIMonitorCheckCE( + IN PDM_ODM_T pDM_Odm + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + int i; + int tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff; + u8 sta_cnt=0; + u32 PWDB_rssi[NUM_STA]={0};//[0~15]:MACID, [16~31]:PWDB_rssi + + if(pDM_Odm->bLinked != _TRUE) + return; + + //if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) + { + #if 1 + struct sta_info *psta; + + for(i=0; ipODM_StaInfo[i])) + { + if(IS_MCAST( psta->hwaddr)) //if(psta->mac_id ==1) + continue; + + if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) + tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; + + if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) + tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; + + #if 0 + DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi:%d\n", __func__, + psta->mac_id, MAC_ARG(psta->hwaddr), psta->rssi_stat.UndecoratedSmoothedPWDB); + #endif + + if(psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)) { + #if(RTL8192D_SUPPORT==1) + PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) | ((Adapter->stapriv.asoc_sta_count+1) << 8)); + #else + PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) ); + #endif + } + } + } + #else + _irqL irqL; + _list *plist, *phead; + struct sta_info *psta; + struct sta_priv *pstapriv = &Adapter->stapriv; + u8 bcast_addr[ETH_ALEN]= {0xff,0xff,0xff,0xff,0xff,0xff}; + + _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); + + for(i=0; i< NUM_STA; i++) + { + phead = &(pstapriv->sta_hash[i]); + plist = get_next(phead); + + while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) + { + psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); + + plist = get_next(plist); + + if(_rtw_memcmp(psta->hwaddr, bcast_addr, ETH_ALEN) || + _rtw_memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) + continue; + + if(psta->state & WIFI_ASOC_STATE) + { + + if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) + tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; + + if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) + tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; + + if(psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)){ + //printk("%s==> mac_id(%d),rssi(%d)\n",__FUNCTION__,psta->mac_id,psta->rssi_stat.UndecoratedSmoothedPWDB); + #if(RTL8192D_SUPPORT==1) + PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) | ((Adapter->stapriv.asoc_sta_count+1) << 8)); + #else + PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) ); + #endif + } + } + + } + + } + + _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); + #endif + + //printk("%s==> sta_cnt(%d)\n",__FUNCTION__,sta_cnt); + + for(i=0; i< sta_cnt; i++) + { + if(PWDB_rssi[i] != (0)){ + if(pHalData->fw_ractrl == _TRUE)// Report every sta's RSSI to FW + { + #if(RTL8192D_SUPPORT==1) + FillH2CCmd92D(Adapter, H2C_RSSI_REPORT, 3, (u8 *)(&PWDB_rssi[i])); + #elif((RTL8192C_SUPPORT==1)||(RTL8723A_SUPPORT==1)) + rtl8192c_set_rssi_cmd(Adapter, (u8*)&PWDB_rssi[i]); + #endif + } + else{ + #if((RTL8188E_SUPPORT==1)&&(RATE_ADAPTIVE_SUPPORT == 1)) + ODM_RA_SetRSSI_8188E( + &(pHalData->odmpriv), (PWDB_rssi[i]&0xFF), (u8)((PWDB_rssi[i]>>16) & 0xFF)); + #endif + } + } + } + } + + if(tmpEntryMaxPWDB != 0) // If associated entry is found + { + pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; + } + else + { pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0; + } - if (tmpEntryMinPWDB != 0xff) /* If associated entry is found */ - pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; + if(tmpEntryMinPWDB != 0xff) // If associated entry is found + { + pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; + } else + { pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0; + } - FindMinimumRSSI(Adapter); - ODM_CmnInfoUpdate(&pHalData->odmpriv , ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); + FindMinimumRSSI(Adapter);//get pdmpriv->MinUndecoratedPWDBForDM + + #if(RTL8192D_SUPPORT==1) + FindMinimumRSSI_Dmsp(Adapter); + #endif + pDM_Odm->RSSI_Min = pdmpriv->MinUndecoratedPWDBForDM; + //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); +#endif//if (DM_ODM_SUPPORT_TYPE == ODM_CE) } - -void odm_RSSIMonitorCheckAP(struct odm_dm_struct *pDM_Odm) +VOID +odm_RSSIMonitorCheckAP( + IN PDM_ODM_T pDM_Odm + ) { } -void ODM_InitAllTimers(struct odm_dm_struct *pDM_Odm) -{ - ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer, - (void *)odm_SwAntDivChkAntSwitchCallback, NULL, "SwAntennaSwitchTimer"); + + +VOID +ODM_InitAllTimers( + IN PDM_ODM_T pDM_Odm + ) +{ + ODM_InitializeTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer, + (RT_TIMER_CALL_BACK)odm_SwAntDivChkAntSwitchCallback, NULL, "SwAntennaSwitchTimer"); + +#if (!(DM_ODM_SUPPORT_TYPE == ODM_CE)) +#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) +#if (RTL8188E_SUPPORT == 1) + ODM_InitializeTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, + (RT_TIMER_CALL_BACK)odm_FastAntTrainingCallback, NULL, "FastAntTrainingTimer"); +#endif +#endif +#endif + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PSDTimer, + (RT_TIMER_CALL_BACK)dm_PSDMonitorCallback, NULL, "PSDTimer"); + // + //Path Diversity + //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. + // + ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer, + (RT_TIMER_CALL_BACK)odm_PathDivChkAntSwitchCallback, NULL, "PathDivTimer"); + + ODM_InitializeTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, + (RT_TIMER_CALL_BACK)odm_CCKTXPathDiversityCallback, NULL, "CCKPathDiversityTimer"); + + ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer, + (RT_TIMER_CALL_BACK)odm_PSD_RXHPCallback, NULL, "PSDRXHPTimer"); +#endif } -void ODM_CancelAllTimers(struct odm_dm_struct *pDM_Odm) +VOID +ODM_CancelAllTimers( + IN PDM_ODM_T pDM_Odm + ) { - ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + // + // 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in + // win7 platform. + // + HAL_ADAPTER_STS_CHK(pDM_Odm) +#endif + + ODM_CancelTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + +#if (RTL8188E_SUPPORT == 1) + ODM_CancelTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); +#endif + ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); + // + //Path Diversity + //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. + // + ODM_CancelTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); + + ODM_CancelTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); + + ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); +#endif } -void ODM_ReleaseAllTimers(struct odm_dm_struct *pDM_Odm) -{ - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->FastAntTrainingTimer); +VOID +ODM_ReleaseAllTimers( + IN PDM_ODM_T pDM_Odm + ) +{ + ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); + +#if (RTL8188E_SUPPORT == 1) + ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); +#endif + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + + ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PSDTimer); + // + //Path Diversity + //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. + // + ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); + + ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); + + ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); +#endif } -/* 3============================================================ */ -/* 3 Tx Power Tracking */ -/* 3============================================================ */ -void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm) + +//#endif +//3============================================================ +//3 Tx Power Tracking +//3============================================================ + +VOID +odm_TXPowerTrackingInit( + IN PDM_ODM_T pDM_Odm + ) { odm_TXPowerTrackingThermalMeterInit(pDM_Odm); -} +} -void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm) -{ - pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true; - pDM_Odm->RFCalibrateInfo.TXPowercount = 0; - pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = false; - if (*(pDM_Odm->mp_mode) != 1) - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true; - MSG_88E("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl); - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true; -} +VOID +odm_TXPowerTrackingThermalMeterInit( + IN PDM_ODM_T pDM_Odm + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm) -{ - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - switch (pDM_Odm->SupportPlatform) { - case ODM_MP: - odm_TXPowerTrackingCheckMP(pDM_Odm); - break; - case ODM_CE: - odm_TXPowerTrackingCheckCE(pDM_Odm); - break; - case ODM_AP: - odm_TXPowerTrackingCheckAP(pDM_Odm); - break; - case ODM_ADSL: - break; + pMgntInfo->bTXPowerTracking = TRUE; + pHalData->TXPowercount = 0; + pHalData->bTXPowerTrackingInit = FALSE; + #if MP_DRIVER != 1 //for mp driver, turn off txpwrtracking as default + pHalData->TxPowerTrackControl = TRUE; + #endif//#if (MP_DRIVER != 1) + ODM_RT_TRACE(pDM_Odm,COMP_POWER_TRACKING, DBG_LOUD, ("pMgntInfo->bTXPowerTracking = %d\n", pMgntInfo->bTXPowerTracking)); +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + { + pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; + pDM_Odm->RFCalibrateInfo.TXPowercount = 0; + pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; + //#if (MP_DRIVER != 1) //for mp driver, turn off txpwrtracking as default + if ( *(pDM_Odm->mp_mode) != 1) + pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; + //#endif//#if (MP_DRIVER != 1) + MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl); } +#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + #ifdef RTL8188E_SUPPORT + { + pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; + pDM_Odm->RFCalibrateInfo.TXPowercount = 0; + pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; + pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; + } + #endif +#endif + + pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = TRUE; + pDM_Odm->RFCalibrateInfo.DeltaPowerIndex = 0; + pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast = 0; + pDM_Odm->RFCalibrateInfo.PowerIndexOffset = 0; + pDM_Odm->RFCalibrateInfo.ThermalValue = 0; + pDM_Odm->DefaultOfdmIndex = 12; + pDM_Odm->DefaultCckIndex = 12; + pDM_Odm->BbSwingIdxOfdmBase = pDM_Odm->DefaultOfdmIndex; + pDM_Odm->BbSwingIdxCckBase = pDM_Odm->DefaultCckIndex; + pDM_Odm->BbSwingIdxOfdm = pDM_Odm->DefaultOfdmIndex; + pDM_Odm->BbSwingIdxCck = pDM_Odm->DefaultCckIndex; + + pDM_Odm->RFCalibrateInfo.CCK_index = pDM_Odm->DefaultCckIndex; + pDM_Odm->RFCalibrateInfo.OFDM_index[RF_PATH_A] = pDM_Odm->DefaultOfdmIndex; + pDM_Odm->RFCalibrateInfo.OFDM_index[RF_PATH_B] = pDM_Odm->DefaultOfdmIndex; + } -void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm) + +VOID +ODM_TXPowerTrackingCheck( + IN PDM_ODM_T pDM_Odm + ) { - struct adapter *Adapter = pDM_Odm->Adapter; + // + // For AP/ADSL use prtl8192cd_priv + // For CE/NIC use PADAPTER + // + PADAPTER pAdapter = pDM_Odm->Adapter; + prtl8192cd_priv priv = pDM_Odm->priv; - if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) + //if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) + //return; + + // + // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate + // at the same time. In the stage2/3, we need to prive universal interface and merge all + // HW dynamic mechanism. + // + switch (pDM_Odm->SupportPlatform) + { + case ODM_MP: + odm_TXPowerTrackingCheckMP(pDM_Odm); + break; + + case ODM_CE: + odm_TXPowerTrackingCheckCE(pDM_Odm); + break; + + case ODM_AP: + odm_TXPowerTrackingCheckAP(pDM_Odm); + break; + + case ODM_ADSL: + //odm_DIGAP(pDM_Odm); + break; + } + +} + +VOID +odm_TXPowerTrackingCheckCE( + IN PDM_ODM_T pDM_Odm + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + #if( (RTL8192C_SUPPORT==1) || (RTL8723A_SUPPORT==1) ) + rtl8192c_odm_CheckTXPowerTracking(Adapter); + #endif + + #if (RTL8192D_SUPPORT==1) + #if (RTL8192D_EASY_SMART_CONCURRENT == 1) + if(!Adapter->bSlaveOfDMSP) + #endif + rtl8192d_odm_CheckTXPowerTracking(Adapter); + #endif + #if(RTL8188E_SUPPORT==1) + + //if(!pMgntInfo->bTXPowerTracking /*|| (!pdmpriv->TxPowerTrackControl && pdmpriv->bAPKdone)*/) + if(!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) + { return; + } - if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { /* at least delay 1 sec */ + if(!pDM_Odm->RFCalibrateInfo.TM_Trigger) //at least delay 1 sec + { + //pHalData->TxPowerCheckCnt++; //cosa add for debug + //ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); - + //DBG_8192C("Trigger 92C Thermal Meter!!\n"); + pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; return; - } else { + + } + else + { + //DBG_8192C("Schedule TxPowerTracking direct call!!\n"); odm_TXPowerTrackingCallback_ThermalMeter_8188E(Adapter); pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; } + #endif + +#endif } -void odm_TXPowerTrackingCheckMP(struct odm_dm_struct *pDM_Odm) +VOID +odm_TXPowerTrackingCheckMP( + IN PDM_ODM_T pDM_Odm + ) { +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + + if (ODM_CheckPowerStatus(Adapter) == FALSE) + return; + + if(IS_HARDWARE_TYPE_8723A(Adapter)) + return; + + if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE) + odm_TXPowerTrackingThermalMeterCheck(Adapter); +#endif + } -void odm_TXPowerTrackingCheckAP(struct odm_dm_struct *pDM_Odm) + +VOID +odm_TXPowerTrackingCheckAP( + IN PDM_ODM_T pDM_Odm + ) { +#if (DM_ODM_SUPPORT_TYPE == ODM_AP) + prtl8192cd_priv priv = pDM_Odm->priv; + + } +#endif + } -/* antenna mapping info */ -/* 1: right-side antenna */ -/* 2/0: left-side antenna */ -/* PDM_SWAT_Table->CCK_Ant1_Cnt /OFDM_Ant1_Cnt: for right-side antenna: Ant:1 RxDefaultAnt1 */ -/* PDM_SWAT_Table->CCK_Ant2_Cnt /OFDM_Ant2_Cnt: for left-side antenna: Ant:0 RxDefaultAnt2 */ -/* We select left antenna as default antenna in initial process, modify it as needed */ -/* */ -/* 3============================================================ */ -/* 3 SW Antenna Diversity */ -/* 3============================================================ */ -void odm_SwAntDivInit(struct odm_dm_struct *pDM_Odm) + +//antenna mapping info +// 1: right-side antenna +// 2/0: left-side antenna +//PDM_SWAT_Table->CCK_Ant1_Cnt /OFDM_Ant1_Cnt: for right-side antenna: Ant:1 RxDefaultAnt1 +//PDM_SWAT_Table->CCK_Ant2_Cnt /OFDM_Ant2_Cnt: for left-side antenna: Ant:0 RxDefaultAnt2 +// We select left antenna as default antenna in initial process, modify it as needed +// + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + +VOID +odm_TXPowerTrackingThermalMeterCheck( + IN PADAPTER Adapter + ) { -} +#ifndef AP_BUILD_WORKAROUND +#if (HAL_CODE_BASE==RTL8192_C) + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + static u1Byte TM_Trigger = 0; + //u1Byte TxPowerCheckCnt = 5; //10 sec -void ODM_SwAntDivChkPerPktRssi(struct odm_dm_struct *pDM_Odm, u8 StationID, struct odm_phy_status_info *pPhyInfo) -{ -} - -void odm_SwAntDivChkAntSwitch(struct odm_dm_struct *pDM_Odm, u8 Step) -{ -} - -void ODM_SwAntDivRestAfterLink(struct odm_dm_struct *pDM_Odm) -{ -} - -void odm_SwAntDivChkAntSwitchCallback(void *FunctionContext) -{ -} - -/* 3============================================================ */ -/* 3 SW Antenna Diversity */ -/* 3============================================================ */ - -void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm) -{ - if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: Not Support HW AntDiv\n")); + if(!pMgntInfo->bTXPowerTracking /*|| (!pHalData->TxPowerTrackControl && pHalData->bAPKdone)*/) + { return; } - if (pDM_Odm->SupportICType & (ODM_RTL8192C | ODM_RTL8192D)) - ; - else if (pDM_Odm->SupportICType == ODM_RTL8188E) - ODM_AntennaDiversityInit_88E(pDM_Odm); + if(!TM_Trigger) //at least delay 1 sec + { + if(IS_HARDWARE_TYPE_8192D(Adapter)) + PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_92D, BIT17 | BIT16, 0x03); + else if(IS_HARDWARE_TYPE_8188E(Adapter)) + PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); + else + PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); + RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger 92C Thermal Meter!!\n")); + + TM_Trigger = 1; + return; + } + else + { + RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n")); + odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. + TM_Trigger = 0; + } +#endif +#endif } -void ODM_AntselStatistics_88C(struct odm_dm_struct *pDM_Odm, u8 MacId, u32 PWDBAll, bool isCCKrate) -{ - struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; +#endif - if (pDM_SWAT_Table->antsel == 1) { - if (isCCKrate) { + + +//3============================================================ +//3 SW Antenna Diversity +//3============================================================ +#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) +VOID +odm_SwAntDivInit( + IN PDM_ODM_T pDM_Odm + ) +{ +#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) + odm_SwAntDivInit_NIC(pDM_Odm); +#elif(DM_ODM_SUPPORT_TYPE == ODM_AP) + dm_SW_AntennaSwitchInit(pDM_Odm->priv); +#endif +} +#if (RTL8723A_SUPPORT==1) +// Only for 8723A SW ANT DIV INIT--2012--07--17 +VOID +odm_SwAntDivInit_NIC_8723A( + IN PDM_ODM_T pDM_Odm) +{ + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + PADAPTER Adapter = pDM_Odm->Adapter; + u1Byte btAntNum=BT_GetPGAntNum(Adapter); + + + if(IS_HARDWARE_TYPE_8723A(Adapter)) + { + pDM_SWAT_Table->ANTA_ON =TRUE; + + // Set default antenna B status by PG + if(btAntNum == Ant_x2) + pDM_SWAT_Table->ANTB_ON = TRUE; + else if(btAntNum ==Ant_x1) + pDM_SWAT_Table->ANTB_ON = FALSE; + else + pDM_SWAT_Table->ANTB_ON = TRUE; + } + +} +#endif +VOID +odm_SwAntDivInit_NIC( + IN PDM_ODM_T pDM_Odm + ) +{ + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; +// Init SW ANT DIV mechanism for 8723AE/AU/AS// Neil Chen--2012--07--17--- +// CE/AP/ADSL no using SW ANT DIV for 8723A Series IC +//#if (DM_ODM_SUPPORT_TYPE==ODM_MP) +#if (RTL8723A_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8723A) + { + odm_SwAntDivInit_NIC_8723A(pDM_Odm); + } +#endif + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS:Init SW Antenna Switch\n")); + pDM_SWAT_Table->RSSI_sum_A = 0; + pDM_SWAT_Table->RSSI_cnt_A = 0; + pDM_SWAT_Table->RSSI_sum_B = 0; + pDM_SWAT_Table->RSSI_cnt_B = 0; + pDM_SWAT_Table->CurAntenna = Antenna_A; + pDM_SWAT_Table->PreAntenna = Antenna_A; + pDM_SWAT_Table->try_flag = 0xff; + pDM_SWAT_Table->PreRSSI = 0; + pDM_SWAT_Table->SWAS_NoLink_State = 0; + pDM_SWAT_Table->bTriggerAntennaSwitch = 0; + pDM_SWAT_Table->SelectAntennaMap=0xAA; + pDM_SWAT_Table->lastTxOkCnt = 0; + pDM_SWAT_Table->lastRxOkCnt = 0; + pDM_SWAT_Table->TXByteCnt_A = 0; + pDM_SWAT_Table->TXByteCnt_B = 0; + pDM_SWAT_Table->RXByteCnt_A = 0; + pDM_SWAT_Table->RXByteCnt_B = 0; + pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; + pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ODM_Read4Byte(pDM_Odm, 0x860); +} + +// +// 20100514 Joseph: +// Add new function to reset the state of antenna diversity before link. +// +VOID +ODM_SwAntDivResetBeforeLink( + IN PDM_ODM_T pDM_Odm + ) +{ + + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + + pDM_SWAT_Table->SWAS_NoLink_State = 0; + +} + +// +// 20100514 Luke/Joseph: +// Add new function to reset antenna diversity state after link. +// +VOID +ODM_SwAntDivRestAfterLink( + IN PDM_ODM_T pDM_Odm + ) +{ + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + + pDM_SWAT_Table->RSSI_cnt_A = 0; + pDM_SWAT_Table->RSSI_cnt_B = 0; + pDM_Odm->RSSI_test = FALSE; + pDM_SWAT_Table->try_flag = 0xff; + pDM_SWAT_Table->RSSI_Trying = 0; + pDM_SWAT_Table->SelectAntennaMap=0xAA; +} + +VOID +ODM_SwAntDivChkPerPktRssi( + IN PDM_ODM_T pDM_Odm, + IN u1Byte StationID, + IN PODM_PHY_INFO_T pPhyInfo + ) +{ + SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + + if(!(pDM_Odm->SupportAbility & (ODM_BB_ANT_DIV))) + return; + + if(StationID == pDM_SWAT_Table->RSSI_target) + { + //1 RSSI for SW Antenna Switch + if(pDM_SWAT_Table->CurAntenna == Antenna_A) + { + pDM_SWAT_Table->RSSI_sum_A += pPhyInfo->RxPWDBAll; + pDM_SWAT_Table->RSSI_cnt_A++; + } + else + { + pDM_SWAT_Table->RSSI_sum_B += pPhyInfo->RxPWDBAll; + pDM_SWAT_Table->RSSI_cnt_B++; + + } + } + +} + +// +VOID +odm_SwAntDivChkAntSwitch( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Step + ) +{ + // + // For AP/ADSL use prtl8192cd_priv + // For CE/NIC use PADAPTER + // + PADAPTER pAdapter = pDM_Odm->Adapter; + prtl8192cd_priv priv = pDM_Odm->priv; + + // + // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate + // at the same time. In the stage2/3, we need to prive universal interface and merge all + // HW dynamic mechanism. + // + switch (pDM_Odm->SupportPlatform) + { + case ODM_MP: + case ODM_CE: + odm_SwAntDivChkAntSwitchNIC(pDM_Odm, Step); + break; + + case ODM_AP: + case ODM_ADSL: +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP |ODM_ADSL)) + if (priv->pshare->rf_ft_var.antSw_enable && (priv->up_time % 4==1)) + dm_SW_AntennaSwitch(priv, SWAW_STEP_PEAK); +#endif + break; + } + +} + +// +// 20100514 Luke/Joseph: +// Add new function for antenna diversity after link. +// This is the main function of antenna diversity after link. +// This function is called in HalDmWatchDog() and ODM_SwAntDivChkAntSwitchCallback(). +// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. +// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. +// After 500ms, ODM_SwAntDivChkAntSwitchCallback() calls this function to compare the signal just +// listened on the air with the RSSI of original antenna. +// It chooses the antenna with better RSSI. +// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting +// penalty to get next try. + + +VOID +ODM_SetAntenna( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Antenna) +{ + ODM_SetBBReg(pDM_Odm, 0x860, BIT8|BIT9, Antenna); +} +//--------------------------------2012--09--06-- +//Note: Antenna_Main--> Antenna_A +// Antenna_Aux---> Antenna_B +//---------------------------------- +VOID +odm_SwAntDivChkAntSwitchNIC( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Step + ) +{ +#if ((RTL8192C_SUPPORT==1)||(RTL8723A_SUPPORT==1)) + //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + s4Byte curRSSI=100, RSSI_A, RSSI_B; + u1Byte nextAntenna=Antenna_B; + //static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; + u8Byte curTxOkCnt, curRxOkCnt; + //static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; + u8Byte CurByteCnt=0, PreByteCnt=0; + //static u1Byte TrafficLoad = TRAFFIC_LOW; + u1Byte Score_A=0, Score_B=0; + u1Byte i; + + if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) + return; + + if (pDM_Odm->SupportICType & (ODM_RTL8192D|ODM_RTL8188E)) + return; + + if((pDM_Odm->SupportICType == ODM_RTL8192C) &&(pDM_Odm->RFType == ODM_2T2R)) + return; + + if(pDM_Odm->SupportPlatform & ODM_MP) + { + if(*(pDM_Odm->pAntennaTest)) + return; + } + + if((pDM_SWAT_Table->ANTA_ON == FALSE) ||(pDM_SWAT_Table->ANTB_ON == FALSE)) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("odm_SwAntDivChkAntSwitch(): No AntDiv Mechanism, Antenna A or B is off\n")); + return; + } + + // Radio off: Status reset to default and return. + if(*(pDM_Odm->pbPowerSaving)==TRUE) //pHalData->eRFPowerState==eRfOff + { + ODM_SwAntDivRestAfterLink(pDM_Odm); + return; + } + + + // Handling step mismatch condition. + // Peak step is not finished at last time. Recover the variable and check again. + if( Step != pDM_SWAT_Table->try_flag ) + { + ODM_SwAntDivRestAfterLink(pDM_Odm); + } + +#if (DM_ODM_SUPPORT_TYPE &( ODM_MP| ODM_CE )) + + if(pDM_SWAT_Table->try_flag == 0xff) + { + pDM_SWAT_Table->RSSI_target = 0xff; + + #if(DM_ODM_SUPPORT_TYPE & ODM_CE) + { + u1Byte index = 0; + PSTA_INFO_T pEntry = NULL; + + + for(index=0; indexpODM_StaInfo[index]; + if(IS_STA_VALID(pEntry) ) { + break; + } + } + if(pEntry == NULL) + { + ODM_SwAntDivRestAfterLink(pDM_Odm); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); + return; + } + else + { + pDM_SWAT_Table->RSSI_target = index; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); + } + } + #elif (DM_ODM_SUPPORT_TYPE & ODM_MP) + { + PADAPTER pAdapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo=&pAdapter->MgntInfo; + + // Select RSSI checking target + if(pMgntInfo->mAssoc && !ACTING_AS_AP(pAdapter)) + { + // Target: Infrastructure mode AP. + //pDM_SWAT_Table->RSSI_target = NULL; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("odm_SwAntDivChkAntSwitch(): RSSI_target is DEF AP!\n")); + } + else + { + u1Byte index = 0; + PSTA_INFO_T pEntry = NULL; + PADAPTER pTargetAdapter = NULL; + + if(pMgntInfo->mIbss ) + { + // Target: AP/IBSS peer. + pTargetAdapter = pAdapter; + } + else + { + pTargetAdapter = GetFirstAPAdapter(pAdapter); + } + + if(pTargetAdapter != NULL) + { + for(index=0; indexbAssociated) + break; + } + + } + + } + + if(pEntry == NULL) + { + ODM_SwAntDivRestAfterLink(pDM_Odm); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); + return; + } + else + { + //pDM_SWAT_Table->RSSI_target = pEntry; + pDM_SWAT_Table->RSSI_target = index; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); + } + }//end if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) + + } + #endif + + pDM_SWAT_Table->RSSI_cnt_A = 0; + pDM_SWAT_Table->RSSI_cnt_B = 0; + pDM_SWAT_Table->try_flag = 0; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("odm_SwAntDivChkAntSwitch(): Set try_flag to 0 prepare for peak!\n")); + return; + } + else + { +#if (DM_ODM_SUPPORT_TYPE &( ODM_MP)) + //PADAPTER Adapter = pDM_Odm->Adapter; + curTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast - pDM_SWAT_Table->lastTxOkCnt; + curRxOkCnt =pAdapter->RxStats.NumRxBytesUnicast - pDM_SWAT_Table->lastRxOkCnt; + pDM_SWAT_Table->lastTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast; + pDM_SWAT_Table->lastRxOkCnt = pAdapter->RxStats.NumRxBytesUnicast; +#else + curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - pDM_SWAT_Table->lastTxOkCnt; + curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - pDM_SWAT_Table->lastRxOkCnt; + pDM_SWAT_Table->lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); + pDM_SWAT_Table->lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); +#endif + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("curTxOkCnt = %lld\n",curTxOkCnt)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("curRxOkCnt = %lld\n",curRxOkCnt)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("lastTxOkCnt = %lld\n",pDM_SWAT_Table->lastTxOkCnt)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("lastRxOkCnt = %lld\n",pDM_SWAT_Table->lastRxOkCnt)); + + if(pDM_SWAT_Table->try_flag == 1) + { + if(pDM_SWAT_Table->CurAntenna == Antenna_A) + { + pDM_SWAT_Table->TXByteCnt_A += curTxOkCnt; + pDM_SWAT_Table->RXByteCnt_A += curRxOkCnt; + } + else + { + pDM_SWAT_Table->TXByteCnt_B += curTxOkCnt; + pDM_SWAT_Table->RXByteCnt_B += curRxOkCnt; + } + + nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; + pDM_SWAT_Table->RSSI_Trying--; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying)); + if(pDM_SWAT_Table->RSSI_Trying == 0) + { + CurByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pDM_SWAT_Table->TXByteCnt_A+pDM_SWAT_Table->RXByteCnt_A) : (pDM_SWAT_Table->TXByteCnt_B+pDM_SWAT_Table->RXByteCnt_B); + PreByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pDM_SWAT_Table->TXByteCnt_B+pDM_SWAT_Table->RXByteCnt_B) : (pDM_SWAT_Table->TXByteCnt_A+pDM_SWAT_Table->RXByteCnt_A); + + if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) + //CurByteCnt = PlatformDivision64(CurByteCnt, 9); + PreByteCnt = PreByteCnt*9; + else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) + //CurByteCnt = PlatformDivision64(CurByteCnt, 2); + PreByteCnt = PreByteCnt*2; + + if(pDM_SWAT_Table->RSSI_cnt_A > 0) + RSSI_A = pDM_SWAT_Table->RSSI_sum_A/pDM_SWAT_Table->RSSI_cnt_A; + else + RSSI_A = 0; + if(pDM_SWAT_Table->RSSI_cnt_B > 0) + RSSI_B = pDM_SWAT_Table->RSSI_sum_B/pDM_SWAT_Table->RSSI_cnt_B; + else + RSSI_B = 0; + curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; + pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_B : RSSI_A; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Luke:PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: preAntenna= %s, curAntenna= %s \n", + (pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"))); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Luke:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", + RSSI_A, pDM_SWAT_Table->RSSI_cnt_A, RSSI_B, pDM_SWAT_Table->RSSI_cnt_B)); + } + + } + else + { + + if(pDM_SWAT_Table->RSSI_cnt_A > 0) + RSSI_A = pDM_SWAT_Table->RSSI_sum_A/pDM_SWAT_Table->RSSI_cnt_A; + else + RSSI_A = 0; + if(pDM_SWAT_Table->RSSI_cnt_B > 0) + RSSI_B = pDM_SWAT_Table->RSSI_sum_B/pDM_SWAT_Table->RSSI_cnt_B; + else + RSSI_B = 0; + curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; + pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == Antenna_A)? RSSI_A : RSSI_B; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ekul:PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: preAntenna= %s, curAntenna= %s \n", + (pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"))); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ekul:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", + RSSI_A, pDM_SWAT_Table->RSSI_cnt_A, RSSI_B, pDM_SWAT_Table->RSSI_cnt_B)); + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); + } + + //1 Trying State + if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) + { + + if(pDM_SWAT_Table->TestMode == TP_MODE) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: TestMode = TP_MODE")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TRY:CurByteCnt = %lld,", CurByteCnt)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TRY:PreByteCnt = %lld\n",PreByteCnt)); + if(CurByteCnt < PreByteCnt) + { + if(pDM_SWAT_Table->CurAntenna == Antenna_A) + pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; + else + pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; + } + else + { + if(pDM_SWAT_Table->CurAntenna == Antenna_A) + pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; + else + pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; + } + for (i= 0; i<8; i++) + { + if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) + Score_A++; + else + Score_B++; + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Score_A=%d, Score_B=%d\n", Score_A, Score_B)); + + if(pDM_SWAT_Table->CurAntenna == Antenna_A) + { + nextAntenna = (Score_A > Score_B)?Antenna_A:Antenna_B; + } + else + { + nextAntenna = (Score_B > Score_A)?Antenna_B:Antenna_A; + } + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("nextAntenna=%s\n",(nextAntenna==Antenna_A)?"A":"B")); + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("preAntenna= %s, curAntenna= %s \n", + //(DM_SWAT_Table.PreAntenna == Antenna_A?"A":"B"), (DM_SWAT_Table.CurAntenna == Antenna_A?"A":"B"))); + + if(nextAntenna != pDM_SWAT_Table->CurAntenna) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Switch back to another antenna")); + } + else + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: current anntena is good\n")); + } + } + + if(pDM_SWAT_Table->TestMode == RSSI_MODE) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: TestMode = RSSI_MODE")); + pDM_SWAT_Table->SelectAntennaMap=0xAA; + if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Switch back to another antenna")); + nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; + } + else // current anntena is good + { + nextAntenna =pDM_SWAT_Table->CurAntenna; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: current anntena is good\n")); + } + } + pDM_SWAT_Table->try_flag = 0; + pDM_Odm->RSSI_test = FALSE; + pDM_SWAT_Table->RSSI_sum_A = 0; + pDM_SWAT_Table->RSSI_cnt_A = 0; + pDM_SWAT_Table->RSSI_sum_B = 0; + pDM_SWAT_Table->RSSI_cnt_B = 0; + pDM_SWAT_Table->TXByteCnt_A = 0; + pDM_SWAT_Table->TXByteCnt_B = 0; + pDM_SWAT_Table->RXByteCnt_A = 0; + pDM_SWAT_Table->RXByteCnt_B = 0; + + } + + //1 Normal State + else if(pDM_SWAT_Table->try_flag == 0) + { + if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) + { + if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) + pDM_SWAT_Table->TrafficLoad = TRAFFIC_HIGH; + else + pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; + } + else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) + { + if ((curTxOkCnt+curRxOkCnt) > 3750000) //if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) + pDM_SWAT_Table->TrafficLoad = TRAFFIC_HIGH; + else + pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; + } + if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) + pDM_SWAT_Table->bTriggerAntennaSwitch = 0; + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Normal:TrafficLoad = %llu\n", curTxOkCnt+curRxOkCnt)); + + //Prepare To Try Antenna + nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; + pDM_SWAT_Table->try_flag = 1; + pDM_Odm->RSSI_test = TRUE; + if((curRxOkCnt+curTxOkCnt) > 1000) + { + pDM_SWAT_Table->RSSI_Trying = 4; + pDM_SWAT_Table->TestMode = TP_MODE; + } + else + { + pDM_SWAT_Table->RSSI_Trying = 2; + pDM_SWAT_Table->TestMode = RSSI_MODE; + + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Normal State -> Begin Trying!\n")); + + + pDM_SWAT_Table->RSSI_sum_A = 0; + pDM_SWAT_Table->RSSI_cnt_A = 0; + pDM_SWAT_Table->RSSI_sum_B = 0; + pDM_SWAT_Table->RSSI_cnt_B = 0; + } + } + + //1 4.Change TRX antenna + if(nextAntenna != pDM_SWAT_Table->CurAntenna) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Change TX Antenna!\n ")); + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, nextAntenna); + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + ODM_SetAntenna(pDM_Odm,nextAntenna); + #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + { + BOOLEAN bEnqueue; + bEnqueue = (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)?FALSE :TRUE; + rtw_antenna_select_cmd(pDM_Odm->Adapter, nextAntenna, bEnqueue); + } + #endif + + } + + //1 5.Reset Statistics + pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; + pDM_SWAT_Table->CurAntenna = nextAntenna; + pDM_SWAT_Table->PreRSSI = curRSSI; + + //1 6.Set next timer + { + PADAPTER pAdapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + + if(pDM_SWAT_Table->RSSI_Trying == 0) + return; + + if(pDM_SWAT_Table->RSSI_Trying%2 == 0) + { + if(pDM_SWAT_Table->TestMode == TP_MODE) + { + if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) + { + //PlatformSetTimer( pAdapter, &pHalData->SwAntennaSwitchTimer, 10 ); //ms + ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 10 ); //ms + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_SW_AntennaSwitch(): Test another antenna for 10 ms\n")); + } + else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) + { + //PlatformSetTimer( pAdapter, &pHalData->SwAntennaSwitchTimer, 50 ); //ms + ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 50 ); //ms + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_SW_AntennaSwitch(): Test another antenna for 50 ms\n")); + } + } + else + { + //PlatformSetTimer( pAdapter, &pHalData->SwAntennaSwitchTimer, 500 ); //ms + ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 500 ); //ms + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n")); + } + } + else + { + if(pDM_SWAT_Table->TestMode == TP_MODE) + { + if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) + //PlatformSetTimer( pAdapter, &pHalData->SwAntennaSwitchTimer, 90 ); //ms + ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 90 ); //ms + else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) + //PlatformSetTimer( pAdapter, &pHalData->SwAntennaSwitchTimer, 100 ); //ms + ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 100 ); //ms + } + else + //PlatformSetTimer( pAdapter, &pHalData->SwAntennaSwitchTimer, 500 ); //ms + ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 500 ); //ms + } + } +#endif // #if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) +#endif // #if (RTL8192C_SUPPORT==1) +} + + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + +u1Byte +odm_SwAntDivSelectChkChnl( + IN PADAPTER Adapter + ) +{ +#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) + u1Byte index, target_chnl=0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + u1Byte chnl_peer_cnt[14] = {0}; + + if(Adapter->MgntInfo.tmpNumBssDesc==0) + { + return 0; + } + else + { + // 20100519 Joseph: Select checking channel from current scan list. + // We just choose the channel with most APs to be the test scan channel. + for(index=0; indexMgntInfo.tmpNumBssDesc; index++) + { + // Add by hpfan: prevent access invalid channel number + // TODO: Verify channel number by channel plan + if(Adapter->MgntInfo.tmpbssDesc[index].ChannelNumber == 0 || + Adapter->MgntInfo.tmpbssDesc[index].ChannelNumber > 13) + continue; + + chnl_peer_cnt[Adapter->MgntInfo.tmpbssDesc[index].ChannelNumber-1]++; + } + for(index=0; index<14; index++) + { + if(chnl_peer_cnt[index]>chnl_peer_cnt[target_chnl]) + target_chnl = index; + } + target_chnl+=1; + ODM_RT_TRACE(pDM_Odm,COMP_SWAS, DBG_LOUD, + ("odm_SwAntDivSelectChkChnl(): Channel %d is select as test channel.\n", target_chnl)); + + return target_chnl; + } +#else + return 0; +#endif +} + + +VOID +odm_SwAntDivConsructChkScanChnl( + IN PADAPTER Adapter, + IN u1Byte ChkChnl + ) +{ + + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + PRT_CHANNEL_LIST pChannelList = GET_RT_CHANNEL_LIST(pMgntInfo); + u1Byte index; + + if(ChkChnl==0) + { + // 20100519 Joseph: Original antenna scanned nothing. + // Test antenna shall scan all channel with half period in this condition. + RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, NULL, NULL); + for(index=0; indexChannelLen; index++) + pChannelList->ChannelInfo[index].ScanPeriod /= 2; + } + else + { + // The using of this CustomizedScanRequest is a trick to rescan the two channels + // under the NORMAL scanning process. It will not affect MGNT_INFO.CustomizedScanRequest. + CUSTOMIZED_SCAN_REQUEST CustomScanReq; + + CustomScanReq.bEnabled = TRUE; + CustomScanReq.Channels[0] = ChkChnl; + CustomScanReq.Channels[1] = pMgntInfo->dot11CurrentChannelNumber; + CustomScanReq.nChannels = 2; + CustomScanReq.ScanType = SCAN_ACTIVE; + CustomScanReq.Duration = DEFAULT_ACTIVE_SCAN_PERIOD; + + RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, &CustomScanReq, NULL); + } + +} +#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + +// +// 20100514 Luke/Joseph: +// Callback function for 500ms antenna test trying. +// +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) +VOID +odm_SwAntDivChkAntSwitchCallback( + PRT_TIMER pTimer +) +{ + PADAPTER Adapter = (PADAPTER)pTimer->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + pSWAT_T pDM_SWAT_Table = &pHalData->DM_OutSrc.DM_SWAT_Table; + + #if DEV_BUS_TYPE==RT_PCI_INTERFACE + #if USE_WORKITEM + ODM_ScheduleWorkItem(&pDM_SWAT_Table->SwAntennaSwitchWorkitem); + #else + odm_SwAntDivChkAntSwitch(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); + #endif +#else + ODM_ScheduleWorkItem(&pDM_SWAT_Table->SwAntennaSwitchWorkitem); + #endif + +} +VOID +odm_SwAntDivChkAntSwitchWorkitemCallback( + IN PVOID pContext + ) +{ + + PADAPTER pAdapter = (PADAPTER)pContext; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + odm_SwAntDivChkAntSwitch(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); + +} +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) +VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext) +{ + PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; + PADAPTER padapter = pDM_Odm->Adapter; + if(padapter->net_closed == _TRUE) + return; + odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_DETERMINE); +} +#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) +VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext) +{ + PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; + odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_DETERMINE); +} +#endif + +#else //#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) + +VOID odm_SwAntDivInit( IN PDM_ODM_T pDM_Odm ) {} +VOID ODM_SwAntDivChkPerPktRssi( + IN PDM_ODM_T pDM_Odm, + IN u1Byte StationID, + IN PODM_PHY_INFO_T pPhyInfo + ) {} +VOID odm_SwAntDivChkAntSwitch( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Step + ) {} +VOID ODM_SwAntDivResetBeforeLink( IN PDM_ODM_T pDM_Odm ){} +VOID ODM_SwAntDivRestAfterLink( IN PDM_ODM_T pDM_Odm ){} +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) +u1Byte odm_SwAntDivSelectChkChnl( IN PADAPTER Adapter ){ return 0;} +VOID +odm_SwAntDivConsructChkScanChnl( + IN PADAPTER Adapter, + IN u1Byte ChkChnl + ){} +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) +VOID odm_SwAntDivChkAntSwitchCallback( PRT_TIMER pTimer){} +VOID odm_SwAntDivChkAntSwitchWorkitemCallback( IN PVOID pContext ){} +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) +VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext){} +#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) +VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext){} +#endif + +#endif //#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) +#if((defined(CONFIG_SW_ANTENNA_DIVERSITY))||(defined(CONFIG_HW_ANTENNA_DIVERSITY))) +BOOLEAN +ODM_SwAntDivCheckBeforeLink8192C( + IN PDM_ODM_T pDM_Odm + ) +{ + +#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData=NULL; + PMGNT_INFO pMgntInfo = NULL; + //pSWAT_T pDM_SWAT_Table = &Adapter->DM_SWAT_Table; + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; + + s1Byte Score = 0; + PRT_WLAN_BSS pTmpBssDesc; + PRT_WLAN_BSS pTestBssDesc; + + u1Byte target_chnl = 0; + u1Byte index; + +return FALSE; + if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 + { // The ODM structure is not initialized. + return FALSE; + } + // 2012/04/26 MH Prevent no-checked IC to execute antenna diversity. + if(pDM_Odm->SupportICType == ODM_RTL8188E && pDM_Odm->SupportInterface != ODM_ITRF_PCIE) + return FALSE; + pHalData = GET_HAL_DATA(Adapter); + pMgntInfo = &Adapter->MgntInfo; + + // Condition that does not need to use antenna diversity. + if(IS_8723_SERIES(pHalData->VersionID) || + IS_92C_SERIAL(pHalData->VersionID) || + (pHalData->AntDivCfg==0) || + pMgntInfo->AntennaTest || + Adapter->bInHctTest) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink8192C(): No AntDiv Mechanism.\n")); + return FALSE; + } + + if(IS_8723_SERIES(pHalData->VersionID) || IS_92C_SERIAL(pHalData->VersionID) ) + { + if((pDM_SWAT_Table->ANTA_ON == FALSE) ||(pDM_SWAT_Table->ANTB_ON == FALSE)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink8192C(): No AntDiv Mechanism, Antenna A or B is off\n")); + return FALSE; + } + } + + // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. + PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); + if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) + { + PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink8192C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", + pMgntInfo->RFChangeInProgress, + pHalData->eRFPowerState)); + + pDM_SWAT_Table->SWAS_NoLink_State = 0; + + return FALSE; + } + else + { + PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); + } + + //1 Run AntDiv mechanism "Before Link" part. + if(pDM_SWAT_Table->SWAS_NoLink_State == 0) + { + //1 Prepare to do Scan again to check current antenna state. + + // Set check state to next step. + pDM_SWAT_Table->SWAS_NoLink_State = 1; + + // Copy Current Scan list. + Adapter->MgntInfo.tmpNumBssDesc = pMgntInfo->NumBssDesc; + PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); + + if(pDM_Odm->SupportICType == ODM_RTL8188E) + { + if(pDM_FatTable->RxIdleAnt == MAIN_ANT) + ODM_UpdateRxIdleAnt_88E(pDM_Odm, AUX_ANT); + else + ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink8192C: Change to %s for testing.\n", ((pDM_FatTable->RxIdleAnt == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"))); + } + if(pDM_Odm->SupportICType != ODM_RTL8188E) + { + // Switch Antenna to another one. + pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; + pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink8192C: Change to Ant(%s) for testing.\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B")); + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); + pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); + } + // Go back to scan function again. + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink8192C: Scan one more time\n")); + pMgntInfo->ScanStep=0; + target_chnl = odm_SwAntDivSelectChkChnl(Adapter); + odm_SwAntDivConsructChkScanChnl(Adapter, target_chnl); + HTReleaseChnlOpLock(Adapter); + PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); + + return TRUE; + } + else + { + //1 ScanComple() is called after antenna swiched. + //1 Check scan result and determine which antenna is going + //1 to be used. + + for(index=0; indexMgntInfo.tmpNumBssDesc; index++) + { + pTmpBssDesc = &(Adapter->MgntInfo.tmpbssDesc[index]); + pTestBssDesc = &(pMgntInfo->bssDesc[index]); + + if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink8192C(): ERROR!! This shall not happen.\n")); + continue; + } + + if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink8192C: Compare scan entry: Score++\n")); + RT_PRINT_STR(ODM_COMP_ANT_DIV, ODM_DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); + + Score++; + PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); + } + else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink8192C: Compare scan entry: Score--\n")); + RT_PRINT_STR(ODM_COMP_ANT_DIV, ODM_DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); + Score--; + } + + } + + if(pDM_Odm->SupportICType == ODM_RTL8188E) + { + if(pMgntInfo->NumBssDesc!=0 && Score<=0) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink8192C(): Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink8192C(): Remain Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT")); + + if(pDM_FatTable->RxIdleAnt == MAIN_ANT) + ODM_UpdateRxIdleAnt_88E(pDM_Odm, AUX_ANT); + else + ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT); + } + } + + if(pDM_Odm->SupportICType != ODM_RTL8188E) + { + if(pMgntInfo->NumBssDesc!=0 && Score<=0) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink8192C(): Using Ant(%s)\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"Antenna_A":"Antenna_B")); + + pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink8192C(): Remain Ant(%s)\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"Antenna_B":"Antenna_A")); + + pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; + + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); + pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); + PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); + } + } + // Check state reset to default and wait for next time. + pDM_SWAT_Table->SWAS_NoLink_State = 0; + + return FALSE; + } +#else + return FALSE; +#endif + +return FALSE; +} +#else +BOOLEAN +ODM_SwAntDivCheckBeforeLink8192C( + IN PDM_ODM_T pDM_Odm + ) +{ + + return FALSE; + +} +#endif //#if((defined(CONFIG_SW_ANTENNA_DIVERSITY))||(defined(CONFIG_HW_ANTENNA_DIVERSITY))) +#endif //#if(DM_ODM_SUPPORT_TYPE==ODM_MP) + + +//3============================================================ +//3 SW Antenna Diversity +//3============================================================ + +#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) +VOID +odm_InitHybridAntDiv_88C_92D( + IN PDM_ODM_T pDM_Odm + ) +{ + +#if((DM_ODM_SUPPORT_TYPE==ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) + struct rtl8192cd_priv *priv=pDM_Odm->priv; +#endif + SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + u1Byte bTxPathSel=0; //0:Path-A 1:Path-B + u1Byte i; + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_InitHybridAntDiv==============>\n")); + + //whether to do antenna diversity or not +#if(DM_ODM_SUPPORT_TYPE==ODM_AP) + if(priv==NULL) return; + if(!priv->pshare->rf_ft_var.antHw_enable) + return; + + #ifdef SW_ANT_SWITCH + priv->pshare->rf_ft_var.antSw_enable =0; + #endif +#endif + + if((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8192D)) + return; + + + bTxPathSel=(pDM_Odm->RFType==ODM_1T1R)?FALSE:TRUE; + + ODM_SetBBReg(pDM_Odm,ODM_REG_BB_PWR_SAV1_11N, BIT23, 0); //No update ANTSEL during GNT_BT=1 + ODM_SetBBReg(pDM_Odm,ODM_REG_TX_ANT_CTRL_11N, BIT21, 1); //TX atenna selection from tx_info + ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PIN_11N, BIT23, 1); //enable LED[1:0] pin as ANTSEL + ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_CTRL_11N, BIT8|BIT9, 0x01); // 0x01: left antenna, 0x02: right antenna + // check HW setting: ANTSEL pin connection + #if(DM_ODM_SUPPORT_TYPE==ODM_AP) + ODM_Write2Byte(pDM_Odm,ODM_REG_RF_PIN_11N, (ODM_Read2Byte(pDM_Odm,0x804)&0xf0ff )| BIT(8) ); // b11-b8=0001,update RFPin setting + #endif + + // only AP support different path selection temperarly + if(!bTxPathSel){ //PATH-A + ODM_SetBBReg(pDM_Odm,ODM_REG_PIN_CTRL_11N, BIT8|BIT9, 0 ); // ANTSEL as HW control + ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PATH_11N, BIT13, 1); //select TX ANTESEL from path A + } + else { + ODM_SetBBReg(pDM_Odm,ODM_REG_PIN_CTRL_11N, BIT24|BIT25, 0 ); // ANTSEL as HW control + ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PATH_11N, BIT13, 0); //select ANTESEL from path B + } + + //Set OFDM HW RX Antenna Diversity + ODM_SetBBReg(pDM_Odm,ODM_REG_ANTDIV_PARA1_11N, 0x7FF, 0x0c0); //Pwdb threshold=8dB + ODM_SetBBReg(pDM_Odm,ODM_REG_ANTDIV_PARA1_11N, BIT11, 0); //Switch to another antenna by checking pwdb threshold + ODM_SetBBReg(pDM_Odm,ODM_REG_ANTDIV_PARA3_11N, BIT23, 1); // Decide final antenna by comparing 2 antennas' pwdb + + //Set CCK HW RX Antenna Diversity + ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 0); //Antenna diversity decision period = 32 sample + ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA2_11N, 0xf, 0xf); //Threshold for antenna diversity. Check another antenna power if input power < ANT_lim*4 + ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA3_11N, BIT13, 1); //polarity ana_A=1 and ana_B=0 + ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA4_11N, 0x1f, 0x8); //default antenna power = inpwr*(0.5 + r_ant_step/16) + + + //Enable HW Antenna Diversity + if(!bTxPathSel) //PATH-A + ODM_SetBBReg(pDM_Odm,ODM_REG_IGI_A_11N, BIT7,1); // Enable Hardware antenna switch + else + ODM_SetBBReg(pDM_Odm,ODM_REG_IGI_B_11N, BIT7,1); // Enable Hardware antenna switch + ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 1);//Enable antenna diversity + + pDM_SWAT_Table->CurAntenna=0; //choose left antenna as default antenna + pDM_SWAT_Table->PreAntenna=0; + for(i=0; iCCK_Ant1_Cnt[i] = 0; + pDM_SWAT_Table->CCK_Ant2_Cnt[i] = 0; + pDM_SWAT_Table->OFDM_Ant1_Cnt[i] = 0; + pDM_SWAT_Table->OFDM_Ant2_Cnt[i] = 0; + pDM_SWAT_Table->RSSI_Ant1_Sum[i] = 0; + pDM_SWAT_Table->RSSI_Ant2_Sum[i] = 0; + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============odm_InitHybridAntDiv\n")); +} + + +VOID +odm_InitHybridAntDiv( + IN PDM_ODM_T pDM_Odm + ) +{ + if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: Not Support HW AntDiv\n")); + return; + } + + if(pDM_Odm->SupportICType & (ODM_RTL8192C | ODM_RTL8192D)) + { +#if ((RTL8192C_SUPPORT == 1)||(RTL8192D_SUPPORT == 1)) + odm_InitHybridAntDiv_88C_92D(pDM_Odm); +#endif + } + else if(pDM_Odm->SupportICType == ODM_RTL8188E) + { +#if (RTL8188E_SUPPORT == 1) + ODM_AntennaDiversityInit_88E(pDM_Odm); +#endif + } + +} + + +BOOLEAN +odm_StaDefAntSel( + IN PDM_ODM_T pDM_Odm, + IN u4Byte OFDM_Ant1_Cnt, + IN u4Byte OFDM_Ant2_Cnt, + IN u4Byte CCK_Ant1_Cnt, + IN u4Byte CCK_Ant2_Cnt, + OUT u1Byte *pDefAnt + + ) +{ +#if 1 + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_StaDefAntSelect==============>\n")); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("OFDM_Ant1_Cnt:%d, OFDM_Ant2_Cnt:%d\n",OFDM_Ant1_Cnt,OFDM_Ant2_Cnt)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("CCK_Ant1_Cnt:%d, CCK_Ant2_Cnt:%d\n",CCK_Ant1_Cnt,CCK_Ant2_Cnt)); + + + if(((OFDM_Ant1_Cnt+OFDM_Ant2_Cnt)==0)&&((CCK_Ant1_Cnt + CCK_Ant2_Cnt) <10)){ + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_StaDefAntSelect Fail: No enough packet info!\n")); + return FALSE; + } + + if(OFDM_Ant1_Cnt || OFDM_Ant2_Cnt ) { + //if RX OFDM packet number larger than 0 + if(OFDM_Ant1_Cnt > OFDM_Ant2_Cnt) + (*pDefAnt)=1; + else + (*pDefAnt)=0; + } + // else if RX CCK packet number larger than 10 + else if((CCK_Ant1_Cnt + CCK_Ant2_Cnt) >=10 ) + { + if(CCK_Ant1_Cnt > (5*CCK_Ant2_Cnt)) + (*pDefAnt)=1; + else if(CCK_Ant2_Cnt > (5*CCK_Ant1_Cnt)) + (*pDefAnt)=0; + else if(CCK_Ant1_Cnt > CCK_Ant2_Cnt) + (*pDefAnt)=0; + else + (*pDefAnt)=1; + + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("TxAnt = %s\n",((*pDefAnt)==1)?"Ant1":"Ant2")); + +#endif + //u4Byte antsel = ODM_GetBBReg(pDM_Odm, 0xc88, bMaskByte0); + //(*pDefAnt)= (u1Byte) antsel; + + + + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============odm_StaDefAntSelect\n")); + + return TRUE; + + +} + + +VOID +odm_SetRxIdleAnt( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Ant, + IN BOOLEAN bDualPath +) +{ + SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + + //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_SetRxIdleAnt==============>\n")); + + if(Ant != pDM_SWAT_Table->RxIdleAnt) + { + //for path-A + if(Ant==1) + ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF, 0x65a9); //right-side antenna + else + ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF, 0x569a); //left-side antenna + + //for path-B + if(bDualPath){ + if(Ant==0) + ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF0000, 0x65a9); //right-side antenna + else + ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF0000, 0x569a); //left-side antenna + } + } + pDM_SWAT_Table->RxIdleAnt = Ant; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("RxIdleAnt: %s Reg858=0x%x\n",(Ant==1)?"Ant1":"Ant2",(Ant==1)?0x65a9:0x569a)); + + //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============odm_SetRxIdleAnt\n")); + + } + +VOID +ODM_AntselStatistics_88C( + IN PDM_ODM_T pDM_Odm, + IN u1Byte MacId, + IN u4Byte PWDBAll, + IN BOOLEAN isCCKrate +) +{ + SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + + if(pDM_SWAT_Table->antsel == 1) + { + if(isCCKrate) pDM_SWAT_Table->CCK_Ant1_Cnt[MacId]++; - } else { + else + { pDM_SWAT_Table->OFDM_Ant1_Cnt[MacId]++; pDM_SWAT_Table->RSSI_Ant1_Sum[MacId] += PWDBAll; } - } else { - if (isCCKrate) { + } + else + { + if(isCCKrate) pDM_SWAT_Table->CCK_Ant2_Cnt[MacId]++; - } else { + else + { pDM_SWAT_Table->OFDM_Ant2_Cnt[MacId]++; pDM_SWAT_Table->RSSI_Ant2_Sum[MacId] += PWDBAll; } } + } -void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm) + + + +#if(DM_ODM_SUPPORT_TYPE==ODM_MP) +VOID +ODM_SetTxAntByTxInfo_88C_92D( + IN PDM_ODM_T pDM_Odm, + IN pu1Byte pDesc, + IN u1Byte macId +) { - if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: Not Support HW AntDiv\n")); + SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + u1Byte antsel; + + if(!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) + return; + + if(pDM_SWAT_Table->RxIdleAnt == 1) + antsel=(pDM_SWAT_Table->TxAnt[macId] == 1)?0:1; + else + antsel=(pDM_SWAT_Table->TxAnt[macId] == 1)?1:0; + + SET_TX_DESC_ANTSEL_A_92C(pDesc, antsel); + //SET_TX_DESC_ANTSEL_B_92C(pDesc, antsel); + //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("SET_TX_DESC_ANTSEL_A_92C=%d\n", pDM_SWAT_Table->TxAnt[macId])); +} +#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) +VOID +ODM_SetTxAntByTxInfo_88C_92D( + IN PDM_ODM_T pDM_Odm +) +{ + +} +#elif(DM_ODM_SUPPORT_TYPE==ODM_AP) +VOID +ODM_SetTxAntByTxInfo_88C_92D( + IN PDM_ODM_T pDM_Odm +) +{ + +} +#endif + +VOID +odm_HwAntDiv_92C_92D( + IN PDM_ODM_T pDM_Odm +) +{ + SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + u4Byte RSSI_Min=0xFF, RSSI, RSSI_Ant1, RSSI_Ant2; + u1Byte RxIdleAnt, i; + BOOLEAN bRet=FALSE; + PSTA_INFO_T pEntry; + +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) + struct rtl8192cd_priv *priv=pDM_Odm->priv; + //if test, return + if(priv->pshare->rf_ft_var.CurAntenna & 0x80) + return; +#endif + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv==============>\n")); + + if(!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) //if don't support antenna diveristy + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv: Not supported!\n")); return; } - if (pDM_Odm->SupportICType == ODM_RTL8188E) + if((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8192D)) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: IC Type is not 92C or 92D\n")); + return; + } + +#if (DM_ODM_SUPPORT_TYPE&(ODM_MP|ODM_CE)) + if(!pDM_Odm->bLinked) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: bLinked is FALSE\n")); + return; + } +#endif + + for (i=0; ipODM_StaInfo[i]; + if(IS_STA_VALID(pEntry)) + { + + RSSI_Ant1 = (pDM_SWAT_Table->OFDM_Ant1_Cnt[i] == 0)?0:(pDM_SWAT_Table->RSSI_Ant1_Sum[i]/pDM_SWAT_Table->OFDM_Ant1_Cnt[i]); + RSSI_Ant2 = (pDM_SWAT_Table->OFDM_Ant2_Cnt[i] == 0)?0:(pDM_SWAT_Table->RSSI_Ant2_Sum[i]/pDM_SWAT_Table->OFDM_Ant2_Cnt[i]); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("RSSI_Ant1=%d, RSSI_Ant2=%d\n", RSSI_Ant1, RSSI_Ant2)); + + if(RSSI_Ant1 ||RSSI_Ant2) + { +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) + if(pDM_Odm->pODM_StaInfo[i]->expire_to) +#endif + { + RSSI = (RSSI_Ant1 < RSSI_Ant2) ? RSSI_Ant1 : RSSI_Ant2; + if((!RSSI) || ( RSSI < RSSI_Min) ) { + pDM_SWAT_Table->TargetSTA = i; + RSSI_Min = RSSI; + } + } + } + ///STA: found out default antenna + bRet=odm_StaDefAntSel(pDM_Odm, + pDM_SWAT_Table->OFDM_Ant1_Cnt[i], + pDM_SWAT_Table->OFDM_Ant2_Cnt[i], + pDM_SWAT_Table->CCK_Ant1_Cnt[i], + pDM_SWAT_Table->CCK_Ant2_Cnt[i], + &pDM_SWAT_Table->TxAnt[i]); + + //if Tx antenna selection: successful + if(bRet){ + pDM_SWAT_Table->RSSI_Ant1_Sum[i] = 0; + pDM_SWAT_Table->RSSI_Ant2_Sum[i] = 0; + pDM_SWAT_Table->OFDM_Ant1_Cnt[i] = 0; + pDM_SWAT_Table->OFDM_Ant2_Cnt[i] = 0; + pDM_SWAT_Table->CCK_Ant1_Cnt[i] = 0; + pDM_SWAT_Table->CCK_Ant2_Cnt[i] = 0; + } + } + } + + //set RX Idle Ant + RxIdleAnt = pDM_SWAT_Table->TxAnt[pDM_SWAT_Table->TargetSTA]; + odm_SetRxIdleAnt(pDM_Odm, RxIdleAnt, FALSE); + +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) +#ifdef TX_SHORTCUT + if (!priv->pmib->dot11OperationEntry.disable_txsc) { + plist = phead->next; + while(plist != phead) { + pstat = list_entry(plist, struct stat_info, asoc_list); + if(pstat->expire_to) { + for (i=0; itx_sc_ent[i].hwdesc1); + pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); + if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) + pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); + pdesc= &(pstat->tx_sc_ent[i].hwdesc2); + pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); + if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) + pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); + } + } + + if (plist == plist->next) + break; + plist = plist->next; + }; + } +#endif +#endif + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("<==============odm_HwAntDiv\n")); + +} + +VOID +odm_HwAntDiv( + IN PDM_ODM_T pDM_Odm +) +{ + if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: Not Support HW AntDiv\n")); + return; + } + + if(pDM_Odm->SupportICType & (ODM_RTL8192C | ODM_RTL8192D)) + { +#if ((RTL8192C_SUPPORT == 1)||(RTL8192D_SUPPORT == 1)) + odm_HwAntDiv_92C_92D(pDM_Odm); +#endif + } + else if(pDM_Odm->SupportICType == ODM_RTL8188E) + { +#if (RTL8188E_SUPPORT == 1) ODM_AntennaDiversity_88E(pDM_Odm); +#endif + } + } -/* EDCA Turbo */ -void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm) + +#if(DM_ODM_SUPPORT_TYPE==ODM_AP) +#if 0 +VOID +odm_HwAntDiv( + IN PDM_ODM_T pDM_Odm +) { - struct adapter *Adapter = pDM_Odm->Adapter; - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false; - pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false; - Adapter->recvpriv.bIsAnyNonBEPkts = false; + struct rtl8192cd_priv *priv=pDM_Odm->priv; + struct stat_info *pstat, *pstat_min=NULL; + struct list_head *phead, *plist; + int rssi_min= 0xff, i; + u1Byte idleAnt=priv->pshare->rf_ft_var.CurAntenna; + u1Byte nextAnt; + BOOLEAN bRet=FALSE; + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv==============>\n")); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VO PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_VO_PARAM))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VI PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_VI_PARAM))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_BE_PARAM))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BK PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_BK_PARAM))); -} /* ODM_InitEdcaTurbo */ + if((!priv->pshare->rf_ft_var.antHw_enable) ||(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV))) + return; + + //if test, return + if(priv->pshare->rf_ft_var.CurAntenna & 0x80) + return; + + phead = &priv->asoc_list; + plist = phead->next; + ////========================= + //find mimum rssi sta + ////========================= + while(plist != phead) { + pstat = list_entry(plist, struct stat_info, asoc_list); + if((pstat->expire_to) && (pstat->AntRSSI[0] || pstat->AntRSSI[1])) { + int rssi = (pstat->AntRSSI[0] < pstat->AntRSSI[1]) ? pstat->AntRSSI[0] : pstat->AntRSSI[1]; + if((!pstat_min) || ( rssi < rssi_min) ) { + pstat_min = pstat; + rssi_min = rssi; + } + } + ///STA: found out default antenna + bRet=odm_StaDefAntSel(pDM_Odm, + pstat->hwRxAntSel[1], + pstat->hwRxAntSel[0], + pstat->cckPktCount[1], + pstat->cckPktCount[0], + &nextAnt + ); + + //if default antenna selection: successful + if(bRet){ + pstat->CurAntenna = nextAnt; + //update rssi + for(i=0; i<2; i++) { + if(pstat->cckPktCount[i]==0 && pstat->hwRxAntSel[i]==0) + pstat->AntRSSI[i] = 0; + } + if(pstat->AntRSSI[idleAnt]==0) + pstat->AntRSSI[idleAnt] = pstat->AntRSSI[idleAnt^1]; + // reset variables + pstat->hwRxAntSel[1] = pstat->hwRxAntSel[0] =0; + pstat->cckPktCount[1]= pstat->cckPktCount[0] =0; + } -void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm) + if (plist == plist->next) + break; + plist = plist->next; + + }; + ////========================= + //Choose RX Idle antenna according to minmum rssi + ////========================= + if(pstat_min) { + if(priv->pshare->rf_ft_var.CurAntenna!=pstat_min->CurAntenna) + odm_SetRxIdleAnt(pDM_Odm,pstat_min->CurAntenna,TRUE); + priv->pshare->rf_ft_var.CurAntenna = pstat_min->CurAntenna; + } + + +#ifdef TX_SHORTCUT + if (!priv->pmib->dot11OperationEntry.disable_txsc) { + plist = phead->next; + while(plist != phead) { + pstat = list_entry(plist, struct stat_info, asoc_list); + if(pstat->expire_to) { + for (i=0; itx_sc_ent[i].hwdesc1); + pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); + if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) + pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); + pdesc= &(pstat->tx_sc_ent[i].hwdesc2); + pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); + if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) + pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); + } + } + + if (plist == plist->next) + break; + plist = plist->next; + }; + } +#endif + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,"<==============odm_HwAntDiv\n"); +} +#endif + +u1Byte +ODM_Diversity_AntennaSelect( + IN PDM_ODM_T pDM_Odm, + IN u1Byte *data +) { - /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ - /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ - /* HW dynamic mechanism. */ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("odm_EdcaTurboCheck========================>\n")); + struct rtl8192cd_priv *priv=pDM_Odm->priv; - if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)) + int ant = _atoi(data, 16); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("ODM_Diversity_AntennaSelect==============>\n")); + + #ifdef PCIE_POWER_SAVING + PCIeWakeUp(priv, POWER_DOWN_T0); + #endif + + if (ant==Antenna_B || ant==Antenna_A) + { + if ( !priv->pshare->rf_ft_var.antSw_select) { + ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) | BIT(8)| BIT(9) ); // ANTSEL A as SW control + ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) & (~ BIT(7))); // rx OFDM SW control + PHY_SetBBReg(priv, 0x860, 0x300, ant); + } else { + ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) | BIT(24)| BIT(25) ); // ANTSEL B as HW control + PHY_SetBBReg(priv, 0x864, 0x300, ant); + ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) & (~ BIT(7))); // rx OFDM SW control + } + + ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) & (~ BIT(7))); // rx CCK SW control + ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) & (~ BIT(21))); // select ant by tx desc + ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a); + + priv->pshare->rf_ft_var.antHw_enable = 0; + priv->pshare->rf_ft_var.CurAntenna = (ant%2); + + #ifdef SW_ANT_SWITCH + priv->pshare->rf_ft_var.antSw_enable = 0; + priv->pshare->DM_SWAT_Table.CurAntenna = ant; + priv->pshare->RSSI_test =0; + #endif + } + else if(ant==0){ + + if ( !priv->pshare->rf_ft_var.antSw_select) { + ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) & ~(BIT(8)| BIT(9)) ); + ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) | BIT(7)); // OFDM HW control + } else { + ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) & ~(BIT(24)| BIT(25)) ); + ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) | BIT(7)); // OFDM HW control + } + + ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) | BIT(7)); // CCK HW control + ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) | BIT(21) ); // by tx desc + priv->pshare->rf_ft_var.CurAntenna = 0; + ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a); + priv->pshare->rf_ft_var.antHw_enable = 1; +#ifdef SW_ANT_SWITCH + priv->pshare->rf_ft_var.antSw_enable = 0; + priv->pshare->RSSI_test =0; +#endif + } +#ifdef SW_ANT_SWITCH + else if(ant==3) { + if(!priv->pshare->rf_ft_var.antSw_enable) { + + dm_SW_AntennaSwitchInit(priv); + ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a); + priv->pshare->lastTxOkCnt = priv->net_stats.tx_bytes; + priv->pshare->lastRxOkCnt = priv->net_stats.rx_bytes; + } + if ( !priv->pshare->rf_ft_var.antSw_select) + ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) & (~ BIT(7))); // rx OFDM SW control + else + ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) & (~ BIT(7))); // rx OFDM SW control + + ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) & (~ BIT(7))); // rx CCK SW control + ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) & (~ BIT(21))); // select ant by tx desc + priv->pshare->rf_ft_var.antHw_enable = 0; + priv->pshare->rf_ft_var.antSw_enable = 1; + + } +#endif + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============ODM_Diversity_AntennaSelect\n")); + + return 1; +} +#endif + +#else //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) + +VOID odm_InitHybridAntDiv( IN PDM_ODM_T pDM_Odm ){} +VOID odm_HwAntDiv( IN PDM_ODM_T pDM_Odm){} +#if(DM_ODM_SUPPORT_TYPE==ODM_MP) +VOID ODM_SetTxAntByTxInfo_88C_92D( + IN PDM_ODM_T pDM_Odm, + IN pu1Byte pDesc, + IN u1Byte macId +){} +#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) +VOID ODM_SetTxAntByTxInfo_88C_92D( IN PDM_ODM_T pDM_Odm){ } +#elif(DM_ODM_SUPPORT_TYPE==ODM_AP) +VOID ODM_SetTxAntByTxInfo_88C_92D( IN PDM_ODM_T pDM_Odm){ } +#endif + +#endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) + + + +//============================================================ +//EDCA Turbo +//============================================================ +VOID +ODM_EdcaTurboInit( + IN PDM_ODM_T pDM_Odm) +{ + +#if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) + odm_EdcaParaInit(pDM_Odm); +#elif (DM_ODM_SUPPORT_TYPE==ODM_MP) + PADAPTER Adapter = NULL; + HAL_DATA_TYPE *pHalData = NULL; + + if(pDM_Odm->Adapter==NULL) { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EdcaTurboInit fail!!!\n")); + return; + } + + Adapter=pDM_Odm->Adapter; + pHalData=GET_HAL_DATA(Adapter); + + pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; + pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; + pHalData->bIsAnyNonBEPkts = FALSE; + +#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; + pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; + Adapter->recvpriv.bIsAnyNonBEPkts =FALSE; + +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VO PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VO_PARAM))); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VI PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VI_PARAM))); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BK PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BK_PARAM))); + + +} // ODM_InitEdcaTurbo + +VOID +odm_EdcaTurboCheck( + IN PDM_ODM_T pDM_Odm + ) +{ + // + // For AP/ADSL use prtl8192cd_priv + // For CE/NIC use PADAPTER + // + PADAPTER pAdapter = pDM_Odm->Adapter; + prtl8192cd_priv priv = pDM_Odm->priv; + + // + // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate + // at the same time. In the stage2/3, we need to prive universal interface and merge all + // HW dynamic mechanism. + // + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheck========================>\n")); + + if(!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO )) return; - switch (pDM_Odm->SupportPlatform) { - case ODM_MP: - break; - case ODM_CE: - odm_EdcaTurboCheckCE(pDM_Odm); - break; - case ODM_AP: - case ODM_ADSL: - break; - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("<========================odm_EdcaTurboCheck\n")); -} /* odm_CheckEdcaTurbo */ + switch (pDM_Odm->SupportPlatform) + { + case ODM_MP: -void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm) +#if(DM_ODM_SUPPORT_TYPE==ODM_MP) + odm_EdcaTurboCheckMP(pDM_Odm); +#endif + break; + + case ODM_CE: +#if(DM_ODM_SUPPORT_TYPE==ODM_CE) + odm_EdcaTurboCheckCE(pDM_Odm); +#endif + break; + + case ODM_AP: + case ODM_ADSL: + +#if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) + odm_IotEngine(pDM_Odm); +#endif + break; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("<========================odm_EdcaTurboCheck\n")); + +} // odm_CheckEdcaTurbo + +#if(DM_ODM_SUPPORT_TYPE==ODM_CE) + + +VOID +odm_EdcaTurboCheckCE( + IN PDM_ODM_T pDM_Odm + ) { - struct adapter *Adapter = pDM_Odm->Adapter; - u32 trafficIndex; + +#if(DM_ODM_SUPPORT_TYPE==ODM_CE) + + PADAPTER Adapter = pDM_Odm->Adapter; + + u32 trafficIndex; u32 edca_param; u64 cur_tx_bytes = 0; u64 cur_rx_bytes = 0; - u8 bbtchange = false; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + u8 bbtchange = _FALSE; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); struct recv_priv *precvpriv = &(Adapter->recvpriv); struct registry_priv *pregpriv = &Adapter->registrypriv; struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - if ((pregpriv->wifi_spec == 1))/* (pmlmeinfo->HT_enable == 0)) */ + + if ((pregpriv->wifi_spec == 1) )//|| (pmlmeinfo->HT_enable == 0)) + { goto dm_CheckEdcaTurbo_EXIT; + } if (pmlmeinfo->assoc_AP_vendor >= HT_IOT_PEER_MAX) + { goto dm_CheckEdcaTurbo_EXIT; + } - /* Check if the status needs to be changed. */ - if ((bbtchange) || (!precvpriv->bIsAnyNonBEPkts)) { +#ifdef CONFIG_BT_COEXIST + if (BT_DisableEDCATurbo(Adapter)) + { + goto dm_CheckEdcaTurbo_EXIT; + } +#endif + + // Check if the status needs to be changed. + if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) ) + { cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes; - /* traffic, TX or RX */ - if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_RALINK) || - (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS)) { - if (cur_tx_bytes > (cur_rx_bytes << 2)) { - /* Uplink TP is present. */ - trafficIndex = UP_LINK; - } else { - /* Balance TP is present. */ + //traffic, TX or RX + if((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_RALINK)||(pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS)) + { + if (cur_tx_bytes > (cur_rx_bytes << 2)) + { // Uplink TP is present. + trafficIndex = UP_LINK; + } + else + { // Balance TP is present. trafficIndex = DOWN_LINK; } - } else { - if (cur_rx_bytes > (cur_tx_bytes << 2)) { - /* Downlink TP is present. */ + } + else + { + if (cur_rx_bytes > (cur_tx_bytes << 2)) + { // Downlink TP is present. trafficIndex = DOWN_LINK; - } else { - /* Balance TP is present. */ + } + else + { // Balance TP is present. trafficIndex = UP_LINK; } } - if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) { - if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_CISCO) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) - edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; - else - edca_param = EDCAParam[HT_IOT_PEER_UNKNOWN][trafficIndex]; + if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) + { + +#if 0 + //adjust EDCA parameter for BE queue + edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; +#else + if((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_CISCO) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) + { + edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; + } + else + { + edca_param = EDCAParam[HT_IOT_PEER_UNKNOWN][trafficIndex]; + } +#endif + +#ifdef CONFIG_PCI_HCI + if(IS_92C_SERIAL(pHalData->VersionID)) + { + edca_param = 0x60a42b; + } + else + { + edca_param = 0x6ea42b; + } +#endif rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex; } - - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = true; - } else { - /* Turn Off EDCA turbo here. */ - /* Restore original EDCA according to the declaration of AP. */ - if (pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) { + + pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _TRUE; + } + else + { + // + // Turn Off EDCA turbo here. + // Restore original EDCA according to the declaration of AP. + // + if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) + { rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false; + pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _FALSE; } } dm_CheckEdcaTurbo_EXIT: - /* Set variables for next time. */ - precvpriv->bIsAnyNonBEPkts = false; + // Set variables for next time. + precvpriv->bIsAnyNonBEPkts = _FALSE; pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; precvpriv->last_rx_bytes = precvpriv->rx_bytes; +#endif } -/* need to ODM CE Platform */ -/* move to here for ANT detection mechanism using */ -u32 GetPSDData(struct odm_dm_struct *pDM_Odm, unsigned int point, u8 initial_gain_psd) +#elif(DM_ODM_SUPPORT_TYPE==ODM_MP) +VOID +odm_EdcaTurboCheckMP( + IN PDM_ODM_T pDM_Odm + ) { - u32 psd_report; - /* Set DCO frequency index, offset=(40MHz/SamplePts)*point */ + + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + +#if(DM_ODM_SUPPORT_TYPE==ODM_MP) + PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); + PADAPTER pExtAdapter = GetFirstExtAdapter(Adapter);//NULL; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos; + //[Win7 Count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's Adapter is always Default. 2009.08.20, by Bohn + u8Byte Ext_curTxOkCnt = 0; + u8Byte Ext_curRxOkCnt = 0; + static u8Byte Ext_lastTxOkCnt = 0; + static u8Byte Ext_lastRxOkCnt = 0; + //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. + u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; + +#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); + struct recv_priv *precvpriv = &(Adapter->recvpriv); + struct registry_priv *pregpriv = &Adapter->registrypriv; + struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + #ifdef CONFIG_BT_COEXIST + struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); + #endif + u1Byte bbtchange =FALSE; +#endif + // Keep past Tx/Rx packet count for RT-to-RT EDCA turbo. + u8Byte curTxOkCnt = 0; + u8Byte curRxOkCnt = 0; + u8Byte lastTxOkCnt = 0; + u8Byte lastRxOkCnt = 0; + u4Byte EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer]; + u4Byte EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer]; + u4Byte EDCA_BE = 0x5ea42b; + u4Byte IOTPeer=0; + BOOLEAN *pbIsCurRDLState=NULL; + BOOLEAN bLastIsCurRDLState=FALSE; + BOOLEAN bBiasOnRx=FALSE; + BOOLEAN bEdcaTurboOn=FALSE; + + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheckMP========================>")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); + +////=============================== +////list paramter for different platform +////=============================== + bLastIsCurRDLState=pDM_Odm->DM_EDCA_Table.bIsCurRDLState; + pbIsCurRDLState=&(pDM_Odm->DM_EDCA_Table.bIsCurRDLState); +#if (DM_ODM_SUPPORT_TYPE==ODM_MP) + // Caculate TX/RX TP: + curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt; + curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt; + if(pExtAdapter == NULL) + pExtAdapter = pDefaultAdapter; + + Ext_curTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->Ext_lastTxOkCnt; + Ext_curRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->Ext_lastRxOkCnt; + GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); + //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. + if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) + { + curTxOkCnt = Ext_curTxOkCnt ; + curRxOkCnt = Ext_curRxOkCnt ; + } + // + IOTPeer=pMgntInfo->IOTPeer; + bBiasOnRx=(pMgntInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)?TRUE:FALSE; + bEdcaTurboOn=((!pHalData->bIsAnyNonBEPkts) && (!pMgntInfo->bDisableFrameBursting))?TRUE:FALSE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bIsAnyNonBEPkts : 0x%lx bDisableFrameBursting : 0x%lx \n",pHalData->bIsAnyNonBEPkts,pMgntInfo->bDisableFrameBursting)); + +#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) + // Caculate TX/RX TP: + curTxOkCnt = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; + curRxOkCnt = precvpriv->rx_bytes - precvpriv->last_rx_bytes; + #ifdef CONFIG_BT_COEXIST + if(pbtpriv->BT_Coexist) + { + if( (pbtpriv->BT_EDCA[UP_LINK]!=0) || (pbtpriv->BT_EDCA[DOWN_LINK]!=0)) + bbtchange = TRUE; + } + #endif + IOTPeer=pmlmeinfo->assoc_AP_vendor; + bBiasOnRx=((IOTPeer == HT_IOT_PEER_RALINK)||(IOTPeer == HT_IOT_PEER_ATHEROS))?TRUE:FALSE; + bEdcaTurboOn=(bbtchange || (!precvpriv->bIsAnyNonBEPkts))?TRUE:FALSE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bbtchange : 0x%lx bIsAnyNonBEPkts : 0x%lx \n",bbtchange,precvpriv->bIsAnyNonBEPkts)); +#endif + + +////=============================== +////check if edca turbo is disabled +////=============================== + if(odm_IsEdcaTurboDisable(pDM_Odm)) + goto dm_CheckEdcaTurbo_EXIT; + + +////=============================== +////remove iot case out +////=============================== + ODM_EdcaParaSelByIot(pDM_Odm, &EDCA_BE_UL, &EDCA_BE_DL); + + +////=============================== +////Check if the status needs to be changed. +////=============================== + if(bEdcaTurboOn) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bEdcaTurboOn : 0x%x bBiasOnRx : 0x%x\n",bEdcaTurboOn,bBiasOnRx)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curTxOkCnt : 0x%lx \n",curTxOkCnt)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curRxOkCnt : 0x%lx \n",curRxOkCnt)); + if(bBiasOnRx) + odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, TRUE, pbIsCurRDLState); + else + odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, FALSE, pbIsCurRDLState); + +//modify by Guo.Mingzhi 2011-12-29 + EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL; + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA Turbo on: EDCA_BE:0x%lx\n",EDCA_BE)); + +// if(((*pbIsCurRDLState)!=bLastIsCurRDLState)||(!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) +// { +// EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL; +// ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); + // } + pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = TRUE; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA_BE_DL : 0x%lx EDCA_BE_UL : 0x%lx EDCA_BE : 0x%lx \n",EDCA_BE_DL,EDCA_BE_UL,EDCA_BE)); + + } + else + { + // Turn Off EDCA turbo here. + // Restore original EDCA according to the declaration of AP. + if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) + { +#if (DM_ODM_SUPPORT_TYPE==ODM_MP) + Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(pStaQos->WMMParamEle, AC0_BE) ); +#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, pHalData->AcParam_BE); +#endif + + pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Restore EDCA BE: 0x%lx \n",pDM_Odm->WMMEDCA_BE)); + + } + } + +////=============================== +////Set variables for next time. +////=============================== +dm_CheckEdcaTurbo_EXIT: +#if (DM_ODM_SUPPORT_TYPE==ODM_MP) + pHalData->bIsAnyNonBEPkts = FALSE; + pMgntInfo->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; + pMgntInfo->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; + pMgntInfo->Ext_lastTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast; + pMgntInfo->Ext_lastRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast; +#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) + precvpriv->bIsAnyNonBEPkts = FALSE; + pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; + precvpriv->last_rx_bytes = precvpriv->rx_bytes; +#endif + +} + + +//check if edca turbo is disabled +BOOLEAN +odm_IsEdcaTurboDisable( + IN PDM_ODM_T pDM_Odm +) +{ + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + +#if(DM_ODM_SUPPORT_TYPE==ODM_MP) + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + u4Byte IOTPeer=pMgntInfo->IOTPeer; +#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) + struct registry_priv *pregpriv = &Adapter->registrypriv; + struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + u4Byte IOTPeer=pmlmeinfo->assoc_AP_vendor; + u1Byte WirelessMode=0xFF; //invalid value + + if(pDM_Odm->pWirelessMode!=NULL) + WirelessMode=*(pDM_Odm->pWirelessMode); + +#endif + +#if(BT_30_SUPPORT == 1) + if(pDM_Odm->bBtDisableEdcaTurbo) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable for BT!!\n")); + return TRUE; + } +#endif + + if((!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))|| + (pDM_Odm->bWIFITest)|| + (IOTPeer>= HT_IOT_PEER_MAX)) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable\n")); + return TRUE; + } + + +#if (DM_ODM_SUPPORT_TYPE ==ODM_MP) + // 1. We do not turn on EDCA turbo mode for some AP that has IOT issue + // 2. User may disable EDCA Turbo mode with OID settings. + if((pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO) ||pHalData->bForcedDisableTurboEDCA){ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("IOTAction:EdcaTurboDisable\n")); + return TRUE; + } + +#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) + //suggested by Jr.Luke: open TXOP for B/G/BG/A mode 2012-0215 + if((WirelessMode==ODM_WM_B)||(WirelessMode==(ODM_WM_B|ODM_WM_G)||(WirelessMode==ODM_WM_G)||(WirelessMode=ODM_WM_A)) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, ODM_Read4Byte(pDM_Odm, ODM_EDCA_BE_PARAM)|0x5E0000); + + if(pDM_Odm->SupportICType==ODM_RTL8192D) { + if ((pregpriv->wifi_spec == 1) || (pmlmeext->cur_wireless_mode == WIRELESS_11B)) { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("92D:EdcaTurboDisable\n")); + return TRUE; + } + } + else + { + if((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0)){ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("Others:EdcaTurboDisable\n")); + return TRUE; + } + } +#ifdef CONFIG_BT_COEXIST + if (BT_DisableEDCATurbo(Adapter)) + { + goto dm_CheckEdcaTurbo_EXIT; + } +#endif + +#endif + + return FALSE; + + +} + +//add iot case here: for MP/CE +VOID +ODM_EdcaParaSelByIot( + IN PDM_ODM_T pDM_Odm, + OUT u4Byte *EDCA_BE_UL, + OUT u4Byte *EDCA_BE_DL + ) +{ + + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u4Byte IOTPeer=0; + u4Byte ICType=pDM_Odm->SupportICType; + u1Byte WirelessMode=0xFF; //invalid value + u4Byte RFType=pDM_Odm->RFType; + +#if(DM_ODM_SUPPORT_TYPE==ODM_MP) + PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); + PADAPTER pExtAdapter = GetFirstExtAdapter(Adapter);//NULL; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; + +#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + #ifdef CONFIG_BT_COEXIST + struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); + #endif + u1Byte bbtchange =FALSE; +#endif + + if(pDM_Odm->pWirelessMode!=NULL) + WirelessMode=*(pDM_Odm->pWirelessMode); + +/////////////////////////////////////////////////////////// +////list paramter for different platform +#if (DM_ODM_SUPPORT_TYPE==ODM_MP) + IOTPeer=pMgntInfo->IOTPeer; + GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); + +#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) + IOTPeer=pmlmeinfo->assoc_AP_vendor; + #ifdef CONFIG_BT_COEXIST + if(pbtpriv->BT_Coexist) + { + if( (pbtpriv->BT_EDCA[UP_LINK]!=0) || (pbtpriv->BT_EDCA[DOWN_LINK]!=0)) + bbtchange = TRUE; + } + #endif + +#endif + + if(ICType==ODM_RTL8192D) + { + // Single PHY + if(pDM_Odm->RFType==ODM_2T2R) + { + (*EDCA_BE_UL) = 0x60a42b; //0x5ea42b; + (*EDCA_BE_DL) = 0x60a42b; //0x5ea42b; + + } + else + { + (*EDCA_BE_UL) = 0x6ea42b; + (*EDCA_BE_DL) = 0x6ea42b; + } + + } +////============================ +/// IOT case for MP +////============================ +#if (DM_ODM_SUPPORT_TYPE==ODM_MP) + else + { + + if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE){ + if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) { + (*EDCA_BE_UL) = 0x60a42b; + (*EDCA_BE_DL) = 0x60a42b; + } + else + { + (*EDCA_BE_UL) = 0x6ea42b; + (*EDCA_BE_DL) = 0x6ea42b; + } + } + } + + if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) + { + (*EDCA_BE_UL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[ExtAdapter->MgntInfo.IOTPeer]; + (*EDCA_BE_DL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[ExtAdapter->MgntInfo.IOTPeer]; + } + + #if (INTEL_PROXIMITY_SUPPORT == 1) + if(pMgntInfo->IntelClassModeInfo.bEnableCA == TRUE) + { + (*EDCA_BE_UL) = (*EDCA_BE_DL) = 0xa44f; + } + else + #endif + { + if((!pMgntInfo->bDisableFrameBursting) && + (pMgntInfo->IOTAction & (HT_IOT_ACT_FORCED_ENABLE_BE_TXOP|HT_IOT_ACT_AMSDU_ENABLE))) + {// To check whether we shall force turn on TXOP configuration. + if(!((*EDCA_BE_UL) & 0xffff0000)) + (*EDCA_BE_UL) |= 0x005e0000; // Force TxOP limit to 0x005e for UL. + if(!((*EDCA_BE_DL) & 0xffff0000)) + (*EDCA_BE_DL) |= 0x005e0000; // Force TxOP limit to 0x005e for DL. + } + + //92D txop can't be set to 0x3e for cisco1250 + if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) + { + (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; + (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; + } + //merge from 92s_92c_merge temp brunch v2445 20120215 + else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B))) + { + (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer]; + } + else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A))) + { + (*EDCA_BE_DL) = 0xa630; + } + + else if(IOTPeer == HT_IOT_PEER_MARVELL) + { + (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; + (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; + } + else if(IOTPeer == HT_IOT_PEER_ATHEROS) + { + // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. + (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; + } + } +////============================ +/// IOT case for CE +////============================ +#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) + + if(RFType==ODM_RTL8192D) + { + if((IOTPeer == HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) + { + (*EDCA_BE_UL) = EDCAParam[IOTPeer][UP_LINK]; + (*EDCA_BE_DL)=EDCAParam[IOTPeer][DOWN_LINK]; + } + else if((IOTPeer == HT_IOT_PEER_AIRGO) && + ((WirelessMode==ODM_WM_B)||(WirelessMode==(ODM_WM_B|ODM_WM_G)))) + (*EDCA_BE_DL)=0x00a630; + + else if((IOTPeer== HT_IOT_PEER_ATHEROS) && + (WirelessMode&ODM_WM_N5G) && + (Adapter->securitypriv.dot11PrivacyAlgrthm == _AES_ )) + (*EDCA_BE_DL)=0xa42b; + + } + //92C IOT case: + else + { + #ifdef CONFIG_BT_COEXIST + if(bbtchange) + { + (*EDCA_BE_UL) = pbtpriv->BT_EDCA[UP_LINK]; + (*EDCA_BE_DL) = pbtpriv->BT_EDCA[DOWN_LINK]; + } + else + #endif + { + if((IOTPeer == HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) + { + (*EDCA_BE_UL) = EDCAParam[IOTPeer][UP_LINK]; + (*EDCA_BE_DL)=EDCAParam[IOTPeer][DOWN_LINK]; + } + else + { + (*EDCA_BE_UL)=EDCAParam[HT_IOT_PEER_UNKNOWN][UP_LINK]; + (*EDCA_BE_DL)=EDCAParam[HT_IOT_PEER_UNKNOWN][DOWN_LINK]; + } + } + if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE){ + if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) + { + (*EDCA_BE_UL) = 0x60a42b; + (*EDCA_BE_DL) = 0x60a42b; + } + else + { + (*EDCA_BE_UL) = 0x6ea42b; + (*EDCA_BE_DL) = 0x6ea42b; + } + } + + } +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Special: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx",(*EDCA_BE_UL),(*EDCA_BE_DL))); + +} + + +VOID +odm_EdcaChooseTrafficIdx( + IN PDM_ODM_T pDM_Odm, + IN u8Byte cur_tx_bytes, + IN u8Byte cur_rx_bytes, + IN BOOLEAN bBiasOnRx, + OUT BOOLEAN *pbIsCurRDLState + ) +{ + + + if(bBiasOnRx) + { + + if(cur_tx_bytes>(cur_rx_bytes*4)) + { + *pbIsCurRDLState=FALSE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Uplink Traffic\n ")); + + } + else + { + *pbIsCurRDLState=TRUE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); + + } + } + else + { + if(cur_rx_bytes>(cur_tx_bytes*4)) + { + *pbIsCurRDLState=TRUE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Downlink Traffic\n")); + + } + else + { + *pbIsCurRDLState=FALSE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); + } + } + + return ; +} + +#endif + +#if((DM_ODM_SUPPORT_TYPE==ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) + +void odm_EdcaParaInit( + IN PDM_ODM_T pDM_Odm + ) +{ + prtl8192cd_priv priv = pDM_Odm->priv; + int mode=priv->pmib->dot11BssType.net_work_type; + + static unsigned int slot_time, VO_TXOP, VI_TXOP, sifs_time; + struct ParaRecord EDCA[4]; + + memset(EDCA, 0, 4*sizeof(struct ParaRecord)); + + sifs_time = 10; + slot_time = 20; + + if (mode & (ODM_WM_N24G|ODM_WM_N5G)) + sifs_time = 16; + + if (mode & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G|ODM_WM_A)) + slot_time = 9; + + +#if((defined(RTL_MANUAL_EDCA))&&(DM_ODM_SUPPORT_TYPE==ODM_AP)) + if( priv->pmib->dot11QosEntry.ManualEDCA ) { + if( OPMODE & WIFI_AP_STATE ) + memcpy(EDCA, priv->pmib->dot11QosEntry.AP_manualEDCA, 4*sizeof(struct ParaRecord)); + else + memcpy(EDCA, priv->pmib->dot11QosEntry.STA_manualEDCA, 4*sizeof(struct ParaRecord)); + + #ifdef WIFI_WMM + if (QOS_ENABLE) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); + else + #endif + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); + + }else + #endif //RTL_MANUAL_EDCA + { + + if(OPMODE & WIFI_AP_STATE) + { + memcpy(EDCA, rtl_ap_EDCA, 2*sizeof(struct ParaRecord)); + + if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G)) + memcpy(&EDCA[VI], &rtl_ap_EDCA[VI_AG], 2*sizeof(struct ParaRecord)); + else + memcpy(&EDCA[VI], &rtl_ap_EDCA[VI], 2*sizeof(struct ParaRecord)); + } + else + { + memcpy(EDCA, rtl_sta_EDCA, 2*sizeof(struct ParaRecord)); + + if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G)) + memcpy(&EDCA[VI], &rtl_sta_EDCA[VI_AG], 2*sizeof(struct ParaRecord)); + else + memcpy(&EDCA[VI], &rtl_sta_EDCA[VI], 2*sizeof(struct ParaRecord)); + } + + #ifdef WIFI_WMM + if (QOS_ENABLE) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); + else + #endif + +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); +#elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + 2* slot_time)); +#endif + + + } + + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VO_PARAM, (EDCA[VO].TXOPlimit<< 16) | (EDCA[VO].ECWmax<< 12) | (EDCA[VO].ECWmin<< 8) | (sifs_time + EDCA[VO].AIFSN* slot_time)); + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[BE].AIFSN* slot_time)); + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (EDCA[BK].TXOPlimit<< 16) | (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[BK].AIFSN* slot_time)); +// ODM_Write1Byte(pDM_Odm,ACMHWCTRL, 0x00); + + priv->pshare->iot_mode_enable = 0; +#if(DM_ODM_SUPPORT_TYPE==ODM_AP) + if (priv->pshare->rf_ft_var.wifi_beq_iot) + priv->pshare->iot_mode_VI_exist = 0; + + #ifdef WMM_VIBE_PRI + priv->pshare->iot_mode_BE_exist = 0; + #endif + + #ifdef LOW_TP_TXOP + priv->pshare->BE_cwmax_enhance = 0; + #endif + +#elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL) + priv->pshare->iot_mode_BE_exist = 0; +#endif + priv->pshare->iot_mode_VO_exist = 0; +} + +BOOLEAN +ODM_ChooseIotMainSTA( + IN PDM_ODM_T pDM_Odm, + IN PSTA_INFO_T pstat + ) +{ + prtl8192cd_priv priv = pDM_Odm->priv; + BOOLEAN bhighTP_found_pstat=FALSE; + + if ((GET_ROOT(priv)->up_time % 2) == 0) { + unsigned int tx_2s_avg = 0; + unsigned int rx_2s_avg = 0; + int i=0, aggReady=0; + unsigned long total_sum = (priv->pshare->current_tx_bytes+priv->pshare->current_rx_bytes); + + pstat->current_tx_bytes += pstat->tx_byte_cnt; + pstat->current_rx_bytes += pstat->rx_byte_cnt; + + if (total_sum != 0) { + if (total_sum <= 100) { + tx_2s_avg = (unsigned int)((pstat->current_tx_bytes*100) / total_sum); + rx_2s_avg = (unsigned int)((pstat->current_rx_bytes*100) / total_sum); + } else { + tx_2s_avg = (unsigned int)(pstat->current_tx_bytes / (total_sum / 100)); + rx_2s_avg = (unsigned int)(pstat->current_rx_bytes / (total_sum / 100)); + } + + } + +#if(DM_ODM_SUPPORT_TYPE==ODM_ADSL) + if (pstat->ht_cap_len) { + if ((tx_2s_avg + rx_2s_avg) >=25 /*50*/) { + + priv->pshare->highTP_found_pstat = pstat; + bhighTP_found_pstat=TRUE; + } + } +#elif(DM_ODM_SUPPORT_TYPE==ODM_AP) + for(i=0; i<8; i++) + aggReady += (pstat->ADDBA_ready[i]); + if (pstat->ht_cap_len && aggReady) + { + if ((tx_2s_avg + rx_2s_avg >= 25)) { + priv->pshare->highTP_found_pstat = pstat; + } + + #ifdef CLIENT_MODE + if (OPMODE & WIFI_STATION_STATE) { +#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) + if ((pstat->IOTPeer==HT_IOT_PEER_RALINK) && ((tx_2s_avg + rx_2s_avg) >= 45)) +#else + if(pstat->is_ralink_sta && ((tx_2s_avg + rx_2s_avg) >= 45)) +#endif + priv->pshare->highTP_found_pstat = pstat; + } + #endif + } +#endif + } else { + pstat->current_tx_bytes = pstat->tx_byte_cnt; + pstat->current_rx_bytes = pstat->rx_byte_cnt; + } + + return bhighTP_found_pstat; +} + + +#ifdef WIFI_WMM +VOID +ODM_IotEdcaSwitch( + IN PDM_ODM_T pDM_Odm, + IN unsigned char enable + ) +{ + prtl8192cd_priv priv = pDM_Odm->priv; + int mode=priv->pmib->dot11BssType.net_work_type; + unsigned int slot_time = 20, sifs_time = 10, BE_TXOP = 47, VI_TXOP = 94; + unsigned int vi_cw_max = 4, vi_cw_min = 3, vi_aifs; + +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) + if (!(!priv->pmib->dot11OperationEntry.wifi_specific || + ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) + #ifdef CLIENT_MODE + || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) + #endif + )) + return; +#endif + + if ((mode & (ODM_WM_N24G|ODM_WM_N5G)) && (priv->pshare->ht_sta_num + #ifdef WDS + || ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum) + #endif + )) + sifs_time = 16; + + if (mode & (ODM_WM_N24G|ODM_WM_N5G|ODM_WM_G|ODM_WM_A)) { + slot_time = 9; + } + else + { + BE_TXOP = 94; + VI_TXOP = 188; + } + +#if (DM_ODM_SUPPORT_TYPE==ODM_ADSL) + if (priv->pshare->iot_mode_VO_exist) { + // to separate AC_VI and AC_BE to avoid using the same EDCA settings + if (priv->pshare->iot_mode_BE_exist) { + vi_cw_max = 5; + vi_cw_min = 3; + } else { + vi_cw_max = 6; + vi_cw_min = 4; + } + } + vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); + + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)| (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs); + + +#elif (DM_ODM_SUPPORT_TYPE==ODM_AP) + if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific) { + if (priv->pshare->iot_mode_VO_exist) { + #ifdef WMM_VIBE_PRI + if (priv->pshare->iot_mode_BE_exist) + { + vi_cw_max = 5; + vi_cw_min = 3; + vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); + } + else + #endif + { + vi_cw_max = 6; + vi_cw_min = 4; + vi_aifs = 0x2b; + } + } + else { + vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); + } + + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16) + | (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs); + } +#endif + + + +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) + if (priv->pshare->rf_ft_var.wifi_beq_iot && priv->pshare->iot_mode_VI_exist) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (10 << 12) | (4 << 8) | 0x4f); + else if(!enable) +#elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) + if(!enable) //if iot is disable ,maintain original BEQ PARAM +#endif + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (((OPMODE & WIFI_AP_STATE)?6:10) << 12) | (4 << 8) + | (sifs_time + 3 * slot_time)); + else + { + int txop_enlarge; + int txop; + unsigned int cw_max; + unsigned int txop_close; + + #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP)) + cw_max = ((priv->pshare->BE_cwmax_enhance) ? 10 : 6); + txop_close = ((priv->pshare->rf_ft_var.low_tp_txop && priv->pshare->rf_ft_var.low_tp_txop_close) ? 1 : 0); + + if(priv->pshare->txop_enlarge == 0xe) //if intel case + txop = (txop_close ? 0 : (BE_TXOP*2)); + else //if other case + txop = (txop_close ? 0: (BE_TXOP*priv->pshare->txop_enlarge)); + #else + cw_max=6; + if((priv->pshare->txop_enlarge==0xe)||(priv->pshare->txop_enlarge==0xd)) + txop=BE_TXOP*2; + else + txop=BE_TXOP*priv->pshare->txop_enlarge; + + #endif + + if (priv->pshare->ht_sta_num + #ifdef WDS + || ((OPMODE & WIFI_AP_STATE) && (mode & (ODM_WM_N24G|ODM_WM_N5G)) && + priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum) + #endif + ) + { + + if (priv->pshare->txop_enlarge == 0xe) { + // is intel client, use a different edca value + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop<< 16) | (cw_max<< 12) | (4 << 8) | 0x1f); + priv->pshare->txop_enlarge = 2; + } +#if(DM_ODM_SUPPORT_TYPE==ODM_AP) + #ifndef LOW_TP_TXOP + else if (priv->pshare->txop_enlarge == 0xd) { + // is intel ralink, use a different edca value + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (4 << 12) | (3 << 8) | 0x19); + priv->pshare->txop_enlarge = 2; + } + #endif +#endif + else + { + if (pDM_Odm->RFType==ODM_2T2R) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | + (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); + else + #if(DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | + (((priv->pshare->BE_cwmax_enhance) ? 10 : 5) << 12) | (3 << 8) | (sifs_time + 2 * slot_time)); + #else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | + (5 << 12) | (3 << 8) | (sifs_time + 2 * slot_time)); + + #endif + } + } + else + { + #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP)) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); + #else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP*2 << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); + #endif + } + + } +} +#endif + +VOID +odm_IotEngine( + IN PDM_ODM_T pDM_Odm + ) +{ + + struct rtl8192cd_priv *priv=pDM_Odm->priv; + PSTA_INFO_T pstat = NULL; + u4Byte i; + +#ifdef WIFI_WMM + unsigned int switch_turbo = 0; +#endif +//////////////////////////////////////////////////////// +// if EDCA Turbo function is not supported or Manual EDCA Setting +// then return +//////////////////////////////////////////////////////// + if(!(pDM_Odm->SupportAbility&ODM_MAC_EDCA_TURBO)){ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO NOT SUPPORTED\n")); + return; + } + +#if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined(RTL_MANUAL_EDCA) && defined(WIFI_WMM)) + if(priv->pmib->dot11QosEntry.ManualEDCA){ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: MANUAL SETTING\n")); + return ; + } +#endif + +#if !(DM_ODM_SUPPORT_TYPE &ODM_AP) + ////////////////////////////////////////////////////// + //find high TP STA every 2s +////////////////////////////////////////////////////// + if ((GET_ROOT(priv)->up_time % 2) == 0) + priv->pshare->highTP_found_pstat==NULL; + +#if 0 + phead = &priv->asoc_list; + plist = phead->next; + while(plist != phead) { + pstat = list_entry(plist, struct stat_info, asoc_list); + + if(ODM_ChooseIotMainSTA(pDM_Odm, pstat)); //find the correct station + break; + if (plist == plist->next) //the last plist + break; + plist = plist->next; + }; +#endif + + //find highTP STA + for(i=0; ipODM_StaInfo[i]; + if(IS_STA_VALID(pstat) && (ODM_ChooseIotMainSTA(pDM_Odm, pstat))) //find the correct station + break; + } + + ////////////////////////////////////////////////////// + //if highTP STA is not found, then return + ////////////////////////////////////////////////////// + if(priv->pshare->highTP_found_pstat==NULL) { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: NO HT STA FOUND\n")); + return; + } +#endif + + pstat=priv->pshare->highTP_found_pstat; + + +#ifdef WIFI_WMM + if (QOS_ENABLE) { + if (!priv->pmib->dot11OperationEntry.wifi_specific + #if(DM_ODM_SUPPORT_TYPE==ODM_AP) + ||((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) + #elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) + || (priv->pmib->dot11OperationEntry.wifi_specific == 2) + #endif + ) { + if (priv->pshare->iot_mode_enable && + ((priv->pshare->phw->VO_pkt_count > 50) || + (priv->pshare->phw->VI_pkt_count > 50) || + (priv->pshare->phw->BK_pkt_count > 50))) { + priv->pshare->iot_mode_enable = 0; + switch_turbo++; + } else if ((!priv->pshare->iot_mode_enable) && + ((priv->pshare->phw->VO_pkt_count < 50) && + (priv->pshare->phw->VI_pkt_count < 50) && + (priv->pshare->phw->BK_pkt_count < 50))) { + priv->pshare->iot_mode_enable++; + switch_turbo++; + } + } + + + #if(DM_ODM_SUPPORT_TYPE==ODM_AP) + if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific) + #elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL) + if (priv->pmib->dot11OperationEntry.wifi_specific) + #endif + { + if (!priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count > 50)) { + priv->pshare->iot_mode_VO_exist++; + switch_turbo++; + } else if (priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count < 50)) { + priv->pshare->iot_mode_VO_exist = 0; + switch_turbo++; + } +#if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI))) + if (priv->pshare->iot_mode_VO_exist) { + //printk("[%s %d] BE_pkt_count=%d\n", __FUNCTION__, __LINE__, priv->pshare->phw->BE_pkt_count); + if (!priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count > 250)) { + priv->pshare->iot_mode_BE_exist++; + switch_turbo++; + } else if (priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count < 250)) { + priv->pshare->iot_mode_BE_exist = 0; + switch_turbo++; + } + } +#endif + +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) + if (priv->pshare->rf_ft_var.wifi_beq_iot) + { + if (!priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count > 50)) { + priv->pshare->iot_mode_VI_exist++; + switch_turbo++; + } else if (priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count < 50)) { + priv->pshare->iot_mode_VI_exist = 0; + switch_turbo++; + } + } +#endif + + } + else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower) { + if (priv->pshare->txop_enlarge) { + priv->pshare->txop_enlarge = 0; + if (priv->pshare->iot_mode_enable) + switch_turbo++; + } + } + +#if(defined(CLIENT_MODE) && (DM_ODM_SUPPORT_TYPE==ODM_AP)) + if ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) + { + if (priv->pshare->iot_mode_enable && + (((priv->pshare->phw->VO_pkt_count > 50) || + (priv->pshare->phw->VI_pkt_count > 50) || + (priv->pshare->phw->BK_pkt_count > 50)) || + (pstat && (!pstat->ADDBA_ready[0]) & (!pstat->ADDBA_ready[3])))) + { + priv->pshare->iot_mode_enable = 0; + switch_turbo++; + } + else if ((!priv->pshare->iot_mode_enable) && + (((priv->pshare->phw->VO_pkt_count < 50) && + (priv->pshare->phw->VI_pkt_count < 50) && + (priv->pshare->phw->BK_pkt_count < 50)) && + (pstat && (pstat->ADDBA_ready[0] | pstat->ADDBA_ready[3])))) + { + priv->pshare->iot_mode_enable++; + switch_turbo++; + } + } +#endif + + priv->pshare->phw->VO_pkt_count = 0; + priv->pshare->phw->VI_pkt_count = 0; + priv->pshare->phw->BK_pkt_count = 0; + + #if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI))) + priv->pshare->phw->BE_pkt_count = 0; + #endif + + #if(DM_ODM_SUPPORT_TYPE==ODM_AP) + if (priv->pshare->rf_ft_var.wifi_beq_iot) + priv->pshare->phw->VI_rx_pkt_count = 0; + #endif + + } +#endif + + if ((priv->up_time % 2) == 0) { + /* + * decide EDCA content for different chip vendor + */ +#ifdef WIFI_WMM + #if(DM_ODM_SUPPORT_TYPE==ODM_ADSL) + if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2) + + #elif(DM_ODM_SUPPORT_TYPE==ODM_AP) + if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific || + ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) + #ifdef CLIENT_MODE + || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) + #endif + #endif + )) + + { + + if (pstat && pstat->rssi >= priv->pshare->rf_ft_var.txop_enlarge_upper) { +#ifdef LOW_TP_TXOP +#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) + if (pstat->IOTPeer==HT_IOT_PEER_INTEL) +#else + if (pstat->is_intel_sta) +#endif + { + if (priv->pshare->txop_enlarge != 0xe) + { + priv->pshare->txop_enlarge = 0xe; + + if (priv->pshare->iot_mode_enable) + switch_turbo++; + } + } + else if (priv->pshare->txop_enlarge != 2) + { + priv->pshare->txop_enlarge = 2; + if (priv->pshare->iot_mode_enable) + switch_turbo++; + } +#else + if (priv->pshare->txop_enlarge != 2) + { +#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) + if (pstat->IOTPeer==HT_IOT_PEER_INTEL) +#else + if (pstat->is_intel_sta) +#endif + priv->pshare->txop_enlarge = 0xe; +#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) + else if (pstat->IOTPeer==HT_IOT_PEER_RALINK) +#else + else if (pstat->is_ralink_sta) +#endif + priv->pshare->txop_enlarge = 0xd; + else + priv->pshare->txop_enlarge = 2; + + if (priv->pshare->iot_mode_enable) + switch_turbo++; + } +#endif +#if 0 + if (priv->pshare->txop_enlarge != 2) + { + #if(DM_ODM_SUPPORT_TYPE==ODM_AP) + if (pstat->IOTPeer==HT_IOT_PEER_INTEL) + #else + if (pstat->is_intel_sta) + #endif + priv->pshare->txop_enlarge = 0xe; + #if(DM_ODM_SUPPORT_TYPE==ODM_AP) + else if (pstat->IOTPeer==HT_IOT_PEER_RALINK) + priv->pshare->txop_enlarge = 0xd; + #endif + else + priv->pshare->txop_enlarge = 2; + if (priv->pshare->iot_mode_enable) + switch_turbo++; + } +#endif + } + else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower) + { + if (priv->pshare->txop_enlarge) { + priv->pshare->txop_enlarge = 0; + if (priv->pshare->iot_mode_enable) + switch_turbo++; + } + } + +#if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&( defined LOW_TP_TXOP)) + // for Intel IOT, need to enlarge CW MAX from 6 to 10 + if (pstat && pstat->is_intel_sta && (((pstat->tx_avarage+pstat->rx_avarage)>>10) < + priv->pshare->rf_ft_var.cwmax_enhance_thd)) + { + if (!priv->pshare->BE_cwmax_enhance && priv->pshare->iot_mode_enable) + { + priv->pshare->BE_cwmax_enhance = 1; + switch_turbo++; + } + } else { + if (priv->pshare->BE_cwmax_enhance) { + priv->pshare->BE_cwmax_enhance = 0; + switch_turbo++; + } + } +#endif + } +#endif + priv->pshare->current_tx_bytes = 0; + priv->pshare->current_rx_bytes = 0; + } + +#if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined( SW_TX_QUEUE)) + if ((priv->assoc_num > 1) && (AMPDU_ENABLE)) + { + if (priv->swq_txmac_chg >= priv->pshare->rf_ft_var.swq_en_highthd){ + if ((priv->swq_en == 0)){ + switch_turbo++; + if (priv->pshare->txop_enlarge == 0) + priv->pshare->txop_enlarge = 2; + priv->swq_en = 1; + } + else + { + if ((switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) + { + priv->pshare->txop_enlarge = 2; + switch_turbo--; + } + } + } + else if(priv->swq_txmac_chg <= priv->pshare->rf_ft_var.swq_dis_lowthd){ + priv->swq_en = 0; + } + else if ((priv->swq_en == 1) && (switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) { + priv->pshare->txop_enlarge = 2; + switch_turbo--; + } + } +#endif + +#ifdef WIFI_WMM +#ifdef LOW_TP_TXOP + if ((!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2)) + && QOS_ENABLE) { + if (switch_turbo || priv->pshare->rf_ft_var.low_tp_txop) { + unsigned int thd_tp; + unsigned char under_thd; + unsigned int curr_tp; + + if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G)) + { + // Determine the upper bound throughput threshold. + if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G)) { + if (priv->assoc_num && priv->assoc_num != priv->pshare->ht_sta_num) + thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g; + else + thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_n; + } + else + thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g; + + // Determine to close txop. + curr_tp = (unsigned int)(priv->ext_stats.tx_avarage>>17) + (unsigned int)(priv->ext_stats.rx_avarage>>17); + if (curr_tp <= thd_tp && curr_tp >= priv->pshare->rf_ft_var.low_tp_txop_thd_low) + under_thd = 1; + else + under_thd = 0; + } + else + { + under_thd = 0; + } + + if (switch_turbo) + { + priv->pshare->rf_ft_var.low_tp_txop_close = under_thd; + priv->pshare->rf_ft_var.low_tp_txop_count = 0; + } + else if (priv->pshare->iot_mode_enable && (priv->pshare->rf_ft_var.low_tp_txop_close != under_thd)) { + priv->pshare->rf_ft_var.low_tp_txop_count++; + if (priv->pshare->rf_ft_var.low_tp_txop_close) { + priv->pshare->rf_ft_var.low_tp_txop_count = priv->pshare->rf_ft_var.low_tp_txop_delay;; + } + if (priv->pshare->rf_ft_var.low_tp_txop_count ==priv->pshare->rf_ft_var.low_tp_txop_delay) + + { + priv->pshare->rf_ft_var.low_tp_txop_count = 0; + priv->pshare->rf_ft_var.low_tp_txop_close = under_thd; + switch_turbo++; + } + } + else + { + priv->pshare->rf_ft_var.low_tp_txop_count = 0; + } + } + } +#endif + + if (switch_turbo) + ODM_IotEdcaSwitch( pDM_Odm, priv->pshare->iot_mode_enable ); +#endif +} +#endif + + +#if( DM_ODM_SUPPORT_TYPE == ODM_MP) +// +// 2011/07/26 MH Add an API for testing IQK fail case. +// +BOOLEAN +ODM_CheckPowerStatus( + IN PADAPTER Adapter) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + RT_RF_POWER_STATE rtState; + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + + // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. + if (pMgntInfo->init_adpt_in_progress == TRUE) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); + return TRUE; + } + + // + // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. + // + Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); + if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", + Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); + return FALSE; + } + return TRUE; +} +#endif + +// need to ODM CE Platform +//move to here for ANT detection mechanism using + +#if ((DM_ODM_SUPPORT_TYPE == ODM_MP)||(DM_ODM_SUPPORT_TYPE == ODM_CE)) +u4Byte +GetPSDData( + IN PDM_ODM_T pDM_Odm, + unsigned int point, + u1Byte initial_gain_psd) +{ + //unsigned int val, rfval; + //int psd_report; + u4Byte psd_report; + + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //Debug Message + //val = PHY_QueryBBReg(Adapter,0x908, bMaskDWord); + //DbgPrint("Reg908 = 0x%x\n",val); + //val = PHY_QueryBBReg(Adapter,0xDF4, bMaskDWord); + //rfval = PHY_QueryRFReg(Adapter, RF_PATH_A, 0x00, bRFRegOffsetMask); + //DbgPrint("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval); + //DbgPrint("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n", + //(val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval); + + //Set DCO frequency index, offset=(40MHz/SamplePts)*point ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); - /* Start PSD calculation, Reg808[22]=0->1 */ + //Start PSD calculation, Reg808[22]=0->1 ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1); - /* Need to wait for HW PSD report */ + //Need to wait for HW PSD report ODM_StallExecution(30); ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0); - /* Read PSD report, Reg8B4[15:0] */ - psd_report = ODM_GetBBReg(pDM_Odm, 0x8B4, bMaskDWord) & 0x0000FFFF; - - psd_report = (u32) (ConvertTo_dB(psd_report))+(u32)(initial_gain_psd-0x1c); + //Read PSD report, Reg8B4[15:0] + psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF; + + psd_report = (u4Byte) (ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c); return psd_report; } -u32 ConvertTo_dB(u32 Value) +u4Byte +ConvertTo_dB( + u4Byte Value) { - u8 i; - u8 j; - u32 dB; + u1Byte i; + u1Byte j; + u4Byte dB; Value = Value & 0xFFFF; - for (i = 0; i < 8; i++) { + + for (i=0;i<8;i++) + { if (Value <= dB_Invert_Table[i][11]) + { break; + } } if (i >= 8) - return 96; /* maximum 96 dB */ + { + return (96); // maximum 96 dB + } - for (j = 0; j < 12; j++) { + for (j=0;j<12;j++) + { if (Value <= dB_Invert_Table[i][j]) + { break; + } } dB = i*12 + j + 1; - return dB; + return (dB); } -/* 2011/09/22 MH Add for 92D global spin lock utilization. */ -void odm_GlobalAdapterCheck(void) -{ -} /* odm_GlobalAdapterCheck */ +#endif -/* Description: */ -/* Set Single/Dual Antenna default setting for products that do not do detection in advance. */ -/* Added by Joseph, 2012.03.22 */ -void ODM_SingleDualAntennaDefaultSetting(struct odm_dm_struct *pDM_Odm) -{ - struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; +// +// LukeLee: +// PSD function will be moved to FW in future IC, but now is only implemented in MP platform +// So PSD function will not be incorporated to common ODM +// +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) - pDM_SWAT_Table->ANTA_ON = true; - pDM_SWAT_Table->ANTB_ON = true; +#define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD +#define MODE_40M 0 //0:20M, 1:40M +#define PSD_TH2 3 +#define PSD_CHMIN 20 // Minimum channel number for BT AFH +#define SIR_STEP_SIZE 3 +#define Smooth_Size_1 5 +#define Smooth_TH_1 3 +#define Smooth_Size_2 10 +#define Smooth_TH_2 4 +#define Smooth_Size_3 20 +#define Smooth_TH_3 4 +#define Smooth_Step_Size 5 +#define Adaptive_SIR 1 +//#if(RTL8723_FPGA_VERIFICATION == 1) +//#define PSD_RESCAN 1 +//#else +//#define PSD_RESCAN 4 +//#endif +#define SCAN_INTERVAL 700 //ms +#define SYN_Length 5 // for 92D + +#define LNA_Low_Gain_1 0x64 +#define LNA_Low_Gain_2 0x5A +#define LNA_Low_Gain_3 0x58 + +#define pw_th_10dB 0x0 +#define pw_th_16dB 0x3 + +#define FA_RXHP_TH1 5000 +#define FA_RXHP_TH2 1500 +#define FA_RXHP_TH3 800 +#define FA_RXHP_TH4 600 +#define FA_RXHP_TH5 500 + +#define Idle_Mode 0 +#define High_TP_Mode 1 +#define Low_TP_Mode 2 + + +VOID +odm_PSDMonitorInit( + IN PDM_ODM_T pDM_Odm) +{ +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //PSD Monitor Setting + //Which path in ADC/DAC is turnned on for PSD: both I/Q + ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT10|BIT11, 0x3); + //Ageraged number: 8 + ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT12|BIT13, 0x1); + pDM_Odm->bPSDinProcess = FALSE; + pDM_Odm->bUserAssignLevel = FALSE; + + //pDM_Odm->bDMInitialGainEnable=TRUE; //change the initialization to DIGinit + //Set Debug Port + //PHY_SetBBReg(Adapter, 0x908, bMaskDWord, 0x803); + //PHY_SetBBReg(Adapter, 0xB34, bMaskByte0, 0x00); // pause PSD + //PHY_SetBBReg(Adapter, 0xB38, bMaskByte0, 10); //rescan + //PHY_SetBBReg(Adapter, 0xB38, bMaskByte1, 0x32); // PSDDelay + //PHY_SetBBReg(Adapter, 0xB38, bMaskByte2|bMaskByte3, 100); //interval + + //PlatformSetTimer( Adapter, &pHalData->PSDTriggerTimer, 0); //ms +#endif } -/* 2 8723A ANT DETECT */ - -static void odm_PHY_SaveAFERegisters(struct odm_dm_struct *pDM_Odm, u32 *AFEReg, u32 *AFEBackup, u32 RegisterNum) +VOID +PatchDCTone( + IN PDM_ODM_T pDM_Odm, + pu4Byte PSD_report, + u1Byte initial_gain_psd +) { - u32 i; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //PADAPTER pAdapter; + + u4Byte psd_report; - /* RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n")); */ - for (i = 0; i < RegisterNum; i++) + //2 Switch to CH11 to patch CH9 and CH13 DC tone + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, 11); + + if(pDM_Odm->SupportICType== ODM_RTL8192D) + { + if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) + { + ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_CHNLBW, 0x3FF, 11); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x25, 0xfffff, 0x643BC); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x26, 0xfffff, 0xFC038); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x27, 0xfffff, 0x77C1A); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x2B, 0xfffff, 0x41289); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x2C, 0xfffff, 0x01840); + } + else + { + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x25, 0xfffff, 0x643BC); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x26, 0xfffff, 0xFC038); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x27, 0xfffff, 0x77C1A); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x2B, 0xfffff, 0x41289); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x2C, 0xfffff, 0x01840); + } + } + + //Ch9 DC tone patch + psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); + PSD_report[50] = psd_report; + //Ch13 DC tone patch + psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); + PSD_report[70] = psd_report; + + //2 Switch to CH3 to patch CH1 and CH5 DC tone + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, 3); + + + if(pDM_Odm->SupportICType==ODM_RTL8192D) + { + if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) + { + ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_CHNLBW, 0x3FF, 3); + //PHY_SetRFReg(Adapter, RF_PATH_B, 0x25, 0xfffff, 0x643BC); + //PHY_SetRFReg(Adapter, RF_PATH_B, 0x26, 0xfffff, 0xFC038); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x27, 0xfffff, 0x07C1A); + //PHY_SetRFReg(Adapter, RF_PATH_B, 0x2B, 0xfffff, 0x61289); + //PHY_SetRFReg(Adapter, RF_PATH_B, 0x2C, 0xfffff, 0x01C41); + } + else + { + //PHY_SetRFReg(Adapter, RF_PATH_A, 0x25, 0xfffff, 0x643BC); + //PHY_SetRFReg(Adapter, RF_PATH_A, 0x26, 0xfffff, 0xFC038); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x27, 0xfffff, 0x07C1A); + //PHY_SetRFReg(Adapter, RF_PATH_A, 0x2B, 0xfffff, 0x61289); + //PHY_SetRFReg(Adapter, RF_PATH_A, 0x2C, 0xfffff, 0x01C41); + } + } + + //Ch1 DC tone patch + psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); + PSD_report[10] = psd_report; + //Ch5 DC tone patch + psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); + PSD_report[30] = psd_report; + +} + + +VOID +GoodChannelDecision( + PDM_ODM_T pDM_Odm, + ps4Byte PSD_report, + pu1Byte PSD_bitmap, + u1Byte RSSI_BT, + pu1Byte PSD_bitmap_memory) +{ + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; + //s4Byte TH1 = SSBT-0x15; // modify TH by Neil Chen + s4Byte TH1= RSSI_BT+0x14; + s4Byte TH2 = RSSI_BT+85; + //u2Byte TH3; +// s4Byte RegB34; + u1Byte bitmap, Smooth_size[3], Smooth_TH[3]; + //u1Byte psd_bit; + u4Byte i,n,j, byte_idx, bit_idx, good_cnt, good_cnt_smoothing, Smooth_Interval[3]; + int start_byte_idx,start_bit_idx,cur_byte_idx, cur_bit_idx,NOW_byte_idx ; + +// RegB34 = PHY_QueryBBReg(Adapter,0xB34, bMaskDWord)&0xFF; + + if((pDM_Odm->SupportICType == ODM_RTL8192C)||(pDM_Odm->SupportICType == ODM_RTL8192D)) + { + TH1 = RSSI_BT + 0x14; + } + + Smooth_size[0]=Smooth_Size_1; + Smooth_size[1]=Smooth_Size_2; + Smooth_size[2]=Smooth_Size_3; + Smooth_TH[0]=Smooth_TH_1; + Smooth_TH[1]=Smooth_TH_2; + Smooth_TH[2]=Smooth_TH_3; + Smooth_Interval[0]=16; + Smooth_Interval[1]=15; + Smooth_Interval[2]=13; + good_cnt = 0; + if(pDM_Odm->SupportICType==ODM_RTL8723A) + { + //2 Threshold + + if(RSSI_BT >=41) + TH1 = 113; + else if(RSSI_BT >=38) // >= -15dBm + TH1 = 105; //0x69 + else if((RSSI_BT >=33)&(RSSI_BT <38)) + TH1 = 99+(RSSI_BT-33); //0x63 + else if((RSSI_BT >=26)&(RSSI_BT<33)) + TH1 = 99-(33-RSSI_BT)+2; //0x5e + else if((RSSI_BT >=24)&(RSSI_BT<26)) + TH1 = 88-((RSSI_BT-24)*3); //0x58 + else if((RSSI_BT >=18)&(RSSI_BT<24)) + TH1 = 77+((RSSI_BT-18)*2); + else if((RSSI_BT >=14)&(RSSI_BT<18)) + TH1 = 63+((RSSI_BT-14)*2); + else if((RSSI_BT >=8)&(RSSI_BT<14)) + TH1 = 58+((RSSI_BT-8)*2); + else if((RSSI_BT >=3)&(RSSI_BT<8)) + TH1 = 52+(RSSI_BT-3); + else + TH1 = 51; + } + + for (i = 0; i< 10; i++) + PSD_bitmap[i] = 0; + + + // Add By Gary + for (i=0; i<80; i++) + pRX_HP_Table->PSD_bitmap_RXHP[i] = 0; + // End + + + + if(pDM_Odm->SupportICType==ODM_RTL8723A) + { + TH1 =TH1-SIR_STEP_SIZE; + } + while (good_cnt < PSD_CHMIN) + { + good_cnt = 0; + if(pDM_Odm->SupportICType==ODM_RTL8723A) + { + if(TH1 ==TH2) + break; + if((TH1+SIR_STEP_SIZE) < TH2) + TH1 += SIR_STEP_SIZE; + else + TH1 = TH2; + } + else + { + if(TH1==(RSSI_BT+0x1E)) + break; + if((TH1+2) < (RSSI_BT+0x1E)) + TH1+=3; + else + TH1 = RSSI_BT+0x1E; + + } + ODM_RT_TRACE(pDM_Odm,COMP_PSD,DBG_LOUD,("PSD: decision threshold is: %d", TH1)); + + for (i = 0; i< 80; i++) + { + if(PSD_report[i] < TH1) + { + byte_idx = i / 8; + bit_idx = i -8*byte_idx; + bitmap = PSD_bitmap[byte_idx]; + PSD_bitmap[byte_idx] = bitmap | (u1Byte) (1 << bit_idx); + } + } + +#if DBG + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: before smoothing\n")); + for(n=0;n<10;n++) + { + //DbgPrint("PSD_bitmap[%u]=%x\n", n, PSD_bitmap[n]); + for (i = 0; i<8; i++) + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); + } +#endif + + //1 Start of smoothing function + + for (j=0;j<3;j++) + { + start_byte_idx=0; + start_bit_idx=0; + for(n=0; n 7 ) + { + start_byte_idx= start_byte_idx+start_bit_idx/8; + start_bit_idx = start_bit_idx%8; + } + } + + ODM_RT_TRACE( pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: after %u smoothing", j+1)); + for(n=0;n<10;n++) + { + for (i = 0; i<8; i++) + { + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); + + if ( ((PSD_bitmap[n]&BIT(i))>>i) ==1) //----- Add By Gary + { + pRX_HP_Table->PSD_bitmap_RXHP[8*n+i] = 1; + } // ------end by Gary + } + } + + } + + + good_cnt = 0; + for ( i = 0; i < 10; i++) + { + for (n = 0; n < 8; n++) + if((PSD_bitmap[i]& BIT(n)) != 0) + good_cnt++; + } + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: good channel cnt = %u",good_cnt)); + } + + //RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: SSBT=%d, TH2=%d, TH1=%d",SSBT,TH2,TH1)); + for (i = 0; i <10; i++) + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: PSD_bitmap[%u]=%x",i,PSD_bitmap[i])); +/* + //Update bitmap memory + for(i = 0; i < 80; i++) + { + byte_idx = i / 8; + bit_idx = i -8*byte_idx; + psd_bit = (PSD_bitmap[byte_idx] & BIT(bit_idx)) >> bit_idx; + bitmap = PSD_bitmap_memory[i]; + PSD_bitmap_memory[i] = (bitmap << 1) |psd_bit; + } +*/ +} + + + +VOID +odm_PSD_Monitor( + PDM_ODM_T pDM_Odm +) +{ + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + + + unsigned int pts, start_point, stop_point, initial_gain ; + static u1Byte PSD_bitmap_memory[80], init_memory = 0; + static u1Byte psd_cnt=0; + static u4Byte PSD_report[80], PSD_report_tmp; + static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; + u1Byte H2C_PSD_DATA[5]={0,0,0,0,0}; + static u1Byte H2C_PSD_DATA_last[5] ={0,0,0,0,0}; + u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, + 0,3,6,10,13,16,19,22,26,29}; + u1Byte n, i, channel, BBReset,tone_idx; + u1Byte PSD_bitmap[10], SSBT=0,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; + s4Byte PSD_skip_start, PSD_skip_stop; + u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; + u4Byte ReScan, Interval, Is40MHz; + u8Byte curTxOkCnt, curRxOkCnt; + int cur_byte_idx, cur_bit_idx; + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + //--------------2G band synthesizer for 92D switch RF channel using----------------- + u1Byte group_idx=0; + u4Byte SYN_RF25=0, SYN_RF26=0, SYN_RF27=0, SYN_RF2B=0, SYN_RF2C=0; + u4Byte SYN[5] = {0x25, 0x26, 0x27, 0x2B, 0x2C}; // synthesizer RF register for 2G channel + u4Byte SYN_group[3][5] = {{0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840}, // For CH1,2,4,9,10.11.12 {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840} + {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840}, // For CH3,13,14 + {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}}; // For Ch5,6,7,8 + //--------------------- Add by Gary for Debug setting ---------------------- + s4Byte psd_result = 0; + u1Byte RSSI_BT_new = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB9C, 0xFF); + u1Byte rssi_ctrl = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB38, 0xFF); + //--------------------------------------------------------------------- + + if(*(pDM_Odm->pbScanInProcess)) + { + if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) + { + //pHalData->bPSDactive=FALSE; + //ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 100 ) + ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 900); //ms + //psd_cnt=0; + } + return; + } + + ReScan = PSD_RESCAN; + Interval = SCAN_INTERVAL; + + + //1 Initialization + if(init_memory == 0) + { + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("Init memory\n")); + for(i = 0; i < 80; i++) + PSD_bitmap_memory[i] = 0xFF; // channel is always good + init_memory = 1; + } + if(psd_cnt == 0) + { + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); + for(i = 0; i < 80; i++) + PSD_report[i] = 0; + } +#if 0 //for test only + DbgPrint("cosa odm_PSD_Monitor call()\n"); + DbgPrint("cosa pHalData->RSSI_BT = %d\n", pHalData->RSSI_BT); + DbgPrint("cosa pHalData->bUserAssignLevel = %d\n", pHalData->bUserAssignLevel); +#if 0 + psd_cnt++; + if (psd_cnt < ReScan) + PlatformSetTimer( Adapter, &pHalData->PSDTimer, Interval); //ms + else + psd_cnt = 0; + return; +#endif +#endif + //1 Backup Current Settings + CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); +/* + if(pDM_Odm->SupportICType==ODM_RTL8192D) + { + //2 Record Current synthesizer parameters based on current channel + if((*pDM_Odm->MacPhyMode92D == SINGLEMAC_SINGLEPHY)||(*pDM_Odm->MacPhyMode92D == DUALMAC_SINGLEPHY)) + { + SYN_RF25 = ODM_GetRFReg(Adapter, RF_PATH_B, 0x25, bMaskDWord); + SYN_RF26 = ODM_GetRFReg(Adapter, RF_PATH_B, 0x26, bMaskDWord); + SYN_RF27 = ODM_GetRFReg(Adapter, RF_PATH_B, 0x27, bMaskDWord); + SYN_RF2B = ODM_GetRFReg(Adapter, RF_PATH_B, 0x2B, bMaskDWord); + SYN_RF2C = ODM_GetRFReg(Adapter, RF_PATH_B, 0x2C, bMaskDWord); + } + else // DualMAC_DualPHY 2G + { + SYN_RF25 = ODM_GetRFReg(Adapter, RF_PATH_A, 0x25, bMaskDWord); + SYN_RF26 = ODM_GetRFReg(Adapter, RF_PATH_A, 0x26, bMaskDWord); + SYN_RF27 = ODM_GetRFReg(Adapter, RF_PATH_A, 0x27, bMaskDWord); + SYN_RF2B = ODM_GetRFReg(Adapter, RF_PATH_A, 0x2B, bMaskDWord); + SYN_RF2C = ODM_GetRFReg(Adapter, RF_PATH_A, 0x2C, bMaskDWord); + } + } +*/ + //RXIQI = PHY_QueryBBReg(Adapter, 0xC14, bMaskDWord); + RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); + + //RxIdleLowPwr = (PHY_QueryBBReg(Adapter, 0x818, bMaskDWord)&BIT28)>>28; + RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; + + //2??? + Is40MHz = pMgntInfo->pHTInfo->bCurBW40MHz; + + ODM_RT_TRACE(pDM_Odm, COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); + //1 Turn off CCK + //PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT24, 0); + ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); + //1 Turn off TX + //Pause TX Queue + //PlatformEFIOWrite1Byte(Adapter, REG_TXPAUSE, 0xFF); + ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0xFF); + + //Force RX to stop TX immediately + //PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); + + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); + //1 Turn off RX + //Rx AGC off RegC70[0]=0, RegC7C[20]=0 + //PHY_SetBBReg(Adapter, 0xC70, BIT0, 0); + //PHY_SetBBReg(Adapter, 0xC7C, BIT20, 0); + + ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); + ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); + + + //Turn off CCA + //PHY_SetBBReg(Adapter, 0xC14, bMaskDWord, 0x0); + ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); + + //BB Reset + //BBReset = PlatformEFIORead1Byte(Adapter, 0x02); + BBReset = ODM_Read1Byte(pDM_Odm, 0x02); + + //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset&(~BIT0)); + //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset|BIT0); + + ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); + ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); + + //1 Leave RX idle low power + //PHY_SetBBReg(Adapter, 0x818, BIT28, 0x0); + + ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); + //1 Fix initial gain + //if (IS_HARDWARE_TYPE_8723AE(Adapter)) + //RSSI_BT = pHalData->RSSI_BT; + //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary + // RSSI_BT = RSSI_BT_new; + + if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) + RSSI_BT=pDM_Odm->RSSI_BT; //need to check C2H to pDM_Odm RSSI BT + + else if((pDM_Odm->SupportICType==ODM_RTL8192C)||(pDM_Odm->SupportICType==ODM_RTL8192D)) + RSSI_BT = RSSI_BT_new; + + + + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); + + if(pDM_Odm->SupportICType==ODM_RTL8723A) + { + //Neil add--2011--10--12 + //2 Initial Gain index + if(RSSI_BT >=35) // >= -15dBm + initial_gain_psd = RSSI_BT*2; + else if((RSSI_BT >=33)&(RSSI_BT<35)) + initial_gain_psd = RSSI_BT*2+6; + else if((RSSI_BT >=24)&(RSSI_BT<33)) + initial_gain_psd = 70-(31-RSSI_BT); + else if((RSSI_BT >=19)&(RSSI_BT<24)) + initial_gain_psd = 64-((24-RSSI_BT)*4); + else if((RSSI_BT >=14)&(RSSI_BT<19)) + initial_gain_psd = 44-((18-RSSI_BT)*2); + else if((RSSI_BT >=8)&(RSSI_BT<14)) + initial_gain_psd = 35-(14-RSSI_BT); + else + initial_gain_psd = 0x1B; + } + else + { + if(rssi_ctrl == 1) // just for debug!! + initial_gain_psd = RSSI_BT_new ; + else + { + //need to do + initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI + } + } + //if(RSSI_BT<0x17) + // RSSI_BT +=3; + //DbgPrint("PSD: RSSI_BT= %d\n", RSSI_BT); + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); + + //initialGainUpper = 0x5E; //Modify by neil chen + + if(pDM_Odm->bUserAssignLevel) + { + pDM_Odm->bUserAssignLevel = FALSE; + initialGainUpper = 0x7f; + } + else + { + initialGainUpper = 0x5E; + } + + /* + if (initial_gain_psd < 0x1a) + initial_gain_psd = 0x1a; + if (initial_gain_psd > initialGainUpper) + initial_gain_psd = initialGainUpper; + */ + + if(pDM_Odm->SupportICType==ODM_RTL8723A) + SSBT = RSSI_BT * 2 +0x3E; + else if((pDM_Odm->SupportICType==ODM_RTL8192C)||(pDM_Odm->SupportICType==ODM_RTL8192D)) + { + RSSI_BT = initial_gain_psd; + SSBT = RSSI_BT; + } + + //if(IS_HARDWARE_TYPE_8723AE(Adapter)) + // SSBT = RSSI_BT * 2 +0x3E; + //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary + //{ + // RSSI_BT = initial_gain_psd; + // SSBT = RSSI_BT; + //} + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); + ODM_RT_TRACE( pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); + //DbgPrint("PSD: SSBT= %d", SSBT); + //need to do + //pMgntInfo->bDMInitialGainEnable = FALSE; + pDM_Odm->bDMInitialGainEnable = FALSE; + initial_gain = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F; + ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain_psd); + //1 Turn off 3-wire + ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); + + //pts value = 128, 256, 512, 1024 + pts = 128; + + if(pts == 128) + { + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); + start_point = 64; + stop_point = 192; + } + else if(pts == 256) + { + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); + start_point = 128; + stop_point = 384; + } + else if(pts == 512) + { + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); + start_point = 256; + stop_point = 768; + } + else + { + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); + start_point = 512; + stop_point = 1536; + } + + +//3 Skip WLAN channels if WLAN busy + + curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; + curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; + lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); + lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); + + PSD_skip_start=80; + PSD_skip_stop = 0; + wlan_channel = CurrentChannel & 0x0f; + + ODM_RT_TRACE(pDM_Odm,COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); + if(pDM_Odm->SupportICType==ODM_RTL8723A) + { +#if(BT_30_SUPPORT == 1) + if(pDM_Odm->bBtHsOperation) + { + if(pDM_Odm->bLinked) + { + if(Is40MHz) + { + PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask + PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; + } + else + { + PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask + PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; + } + } + else + { + // mask for 40MHz + PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask + PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; + } + if(PSD_skip_start < 0) + PSD_skip_start = 0; + if(PSD_skip_stop >80) + PSD_skip_stop = 80; + } + else +#endif + { + if((curRxOkCnt+curTxOkCnt) > 5) + { + if(Is40MHz) + { + PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask + PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; + } + else + { + PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask + PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; + } + + if(PSD_skip_start < 0) + PSD_skip_start = 0; + if(PSD_skip_stop >80) + PSD_skip_stop = 80; + } + } + } + else + { + if((curRxOkCnt+curTxOkCnt) > 1000) + { + PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; + PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; + } + } + + ODM_RT_TRACE(pDM_Odm,COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); + + for (n=0;n<80;n++) + { + if((n%20)==0) + { + channel = (n/20)*4 + 1; + /* + if(pDM_Odm->SupportICType==ODM_RTL8192D) + { + switch(channel) + { + case 1: + case 9: + group_idx = 0; + break; + case 5: + group_idx = 2; + break; + case 13: + group_idx = 1; + break; + } + + if((pHalData->MacPhyMode92D == SINGLEMAC_SINGLEPHY)||(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)) + { + for(i = 0; i < SYN_Length; i++) + ODM_SetRFReg(pDM_Odm, RF_PATH_B, SYN[i], bMaskDWord, SYN_group[group_idx][i]); + + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_CHNLBW, 0x3FF, channel); + } + else // DualMAC_DualPHY 2G + { + for(i = 0; i < SYN_Length; i++) + ODM_SetRFReg(pDM_Odm, RF_PATH_A, SYN[i], bMaskDWord, SYN_group[group_idx][i]); + + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); + } + } + else */ + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); + } + tone_idx = n%20; + if ((n>=PSD_skip_start) && (n PSD_report[n]) + PSD_report[n] = PSD_report_tmp; + + } + } + + PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); + + //----end + //1 Turn on RX + //Rx AGC on + ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); + ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); + //CCK on + ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); + //1 Turn on TX + //Resume TX Queue + + ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0x00); + //Turn on 3-wire + ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); + //1 Restore Current Settings + //Resume DIG + pDM_Odm->bDMInitialGainEnable = TRUE; + ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain); + // restore originl center frequency + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); + + /* + if(pDM_Odm->SupportICType==ODM_RTL8192D) + { + if((pHalData->MacPhyMode92D == SINGLEMAC_SINGLEPHY)||(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)) + { + PHY_SetRFReg(Adapter, RF_PATH_B, RF_CHNLBW, bMaskDWord, CurrentChannel); + PHY_SetRFReg(Adapter, RF_PATH_B, 0x25, bMaskDWord, SYN_RF25); + PHY_SetRFReg(Adapter, RF_PATH_B, 0x26, bMaskDWord, SYN_RF26); + PHY_SetRFReg(Adapter, RF_PATH_B, 0x27, bMaskDWord, SYN_RF27); + PHY_SetRFReg(Adapter, RF_PATH_B, 0x2B, bMaskDWord, SYN_RF2B); + PHY_SetRFReg(Adapter, RF_PATH_B, 0x2C, bMaskDWord, SYN_RF2C); + } + else // DualMAC_DualPHY + { + PHY_SetRFReg(Adapter, RF_PATH_A, 0x25, bMaskDWord, SYN_RF25); + PHY_SetRFReg(Adapter, RF_PATH_A, 0x26, bMaskDWord, SYN_RF26); + PHY_SetRFReg(Adapter, RF_PATH_A, 0x27, bMaskDWord, SYN_RF27); + PHY_SetRFReg(Adapter, RF_PATH_A, 0x2B, bMaskDWord, SYN_RF2B); + PHY_SetRFReg(Adapter, RF_PATH_A, 0x2C, bMaskDWord, SYN_RF2C); + } + }*/ + //Turn on CCA + ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); + //Restore RX idle low power + if(RxIdleLowPwr == TRUE) + ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); + + psd_cnt++; + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); + if (psd_cnt < ReScan) + ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, Interval); + else + { + psd_cnt = 0; + for(i=0;i<80;i++) + //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); + RT_TRACE( COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); + + + GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); + + if(pDM_Odm->SupportICType==ODM_RTL8723A) + { + cur_byte_idx=0; + cur_bit_idx=0; + + //2 Restore H2C PSD Data to Last Data + H2C_PSD_DATA_last[0] = H2C_PSD_DATA[0]; + H2C_PSD_DATA_last[1] = H2C_PSD_DATA[1]; + H2C_PSD_DATA_last[2] = H2C_PSD_DATA[2]; + H2C_PSD_DATA_last[3] = H2C_PSD_DATA[3]; + H2C_PSD_DATA_last[4] = H2C_PSD_DATA[4]; + + + //2 Translate 80bit channel map to 40bit channel + for ( i=0;i<5;i++) + { + for(n=0;n<8;n++) + { + cur_byte_idx = i*2 + n/4; + cur_bit_idx = (n%4)*2; + if ( ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx)) != 0) && ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx+1)) != 0)) + H2C_PSD_DATA[i] = H2C_PSD_DATA[i] | (u1Byte) (1 << n); + } + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("H2C_PSD_DATA[%d]=0x%x\n" ,i, H2C_PSD_DATA[i])); + } + + //3 To Compare the difference + for ( i=0;i<5;i++) + { + if(H2C_PSD_DATA[i] !=H2C_PSD_DATA_last[i]) + { + FillH2CCmd(Adapter, H2C_92C_PSD_RESULT, 5, H2C_PSD_DATA); + ODM_RT_TRACE(pDM_Odm, COMP_PSD, DBG_LOUD,("Need to Update the AFH Map \n")); + break; + } + else + { + if(i==5) + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("Not need to Update\n")); + } + } + //pHalData->bPSDactive=FALSE; + ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 900); + ODM_RT_TRACE( pDM_Odm,COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n")); + } + } +} +/* +//Neil for Get BT RSSI +// Be Triggered by BT C2H CMD +VOID +ODM_PSDGetRSSI( + IN u1Byte RSSI_BT) +{ + + +} + +*/ + +VOID +ODM_PSDMonitor( + IN PDM_ODM_T pDM_Odm + ) +{ + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //if(IS_HARDWARE_TYPE_8723AE(Adapter)) + + if(pDM_Odm->SupportICType == ODM_RTL8723A) //may need to add other IC type + { + if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) + { +#if(BT_30_SUPPORT == 1) + if(pDM_Odm->bBtDisabled) //need to check upper layer connection + { + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD, ("odm_PSDMonitor, return for BT is disabled!!!\n")); + return; + } +#endif + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD, ("odm_PSDMonitor\n")); + //if(pHalData->bPSDactive ==FALSE) + //{ + pDM_Odm->bPSDinProcess = TRUE; + //pHalData->bPSDactive=TRUE; + odm_PSD_Monitor(pDM_Odm); + pDM_Odm->bPSDinProcess = FALSE; + } + } + +} +VOID +odm_PSDMonitorCallback( + PRT_TIMER pTimer +) +{ + PADAPTER Adapter = (PADAPTER)pTimer->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + + +#if USE_WORKITEM + PlatformScheduleWorkItem(&pHalData->PSDMonitorWorkitem); +#else + ODM_PSDMonitor(pDM_Odm); +#endif +} + +VOID +odm_PSDMonitorWorkItemCallback( + IN PVOID pContext + ) +{ + PADAPTER Adapter = (PADAPTER)pContext; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + + + ODM_PSDMonitor(pDM_Odm); +} + + + + //cosa debug tool need to modify + +VOID +ODM_PSDDbgControl( + IN PADAPTER Adapter, + IN u4Byte mode, + IN u4Byte btRssi + ) +{ +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD, (" Monitor mode=%d, btRssi=%d\n", mode, btRssi)); + if(mode) + { + pDM_Odm->RSSI_BT = (u1Byte)btRssi; + pDM_Odm->bUserAssignLevel = TRUE; + ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 0); //ms + } + else + { + ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); + } +#endif +} + + +//#if(DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) + +void odm_RXHPInit( + IN PDM_ODM_T pDM_Odm) +{ +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; + u1Byte index; + + pRX_HP_Table->RXHP_enable = TRUE; + pRX_HP_Table->RXHP_flag = 0; + pRX_HP_Table->PSD_func_trigger = 0; + pRX_HP_Table->Pre_IGI = 0x20; + pRX_HP_Table->Cur_IGI = 0x20; + pRX_HP_Table->Cur_pw_th = pw_th_10dB; + pRX_HP_Table->Pre_pw_th = pw_th_10dB; + for(index=0; index<80; index++) + pRX_HP_Table->PSD_bitmap_RXHP[index] = 1; + +#if(DEV_BUS_TYPE == RT_USB_INTERFACE) + pRX_HP_Table->TP_Mode = Idle_Mode; +#endif +#endif +} + +void odm_RXHP( + IN PDM_ODM_T pDM_Odm) +{ +#if( DM_ODM_SUPPORT_TYPE & (ODM_MP)) +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; + PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); + + u1Byte i, j, sum; + u1Byte Is40MHz; + s1Byte Intf_diff_idx, MIN_Intf_diff_idx = 16; + s4Byte cur_channel; + u1Byte ch_map_intf_5M[17] = {0}; + static u4Byte FA_TH = 0; + static u1Byte psd_intf_flag = 0; + static s4Byte curRssi = 0; + static s4Byte preRssi = 0; + static u1Byte PSDTriggerCnt = 1; + + u1Byte RX_HP_enable = (u1Byte)(ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, bMaskDWord)>>31); // for debug!! + +#if(DEV_BUS_TYPE == RT_USB_INTERFACE) + static s8Byte lastTxOkCnt = 0, lastRxOkCnt = 0; + s8Byte curTxOkCnt, curRxOkCnt; + s8Byte curTPOkCnt; + s8Byte TP_Acc3, TP_Acc5; + static s8Byte TP_Buff[5] = {0}; + static u1Byte pre_state = 0, pre_state_flag = 0; + static u1Byte Intf_HighTP_flag = 0, De_counter = 16; + static u1Byte TP_Degrade_flag = 0; +#endif + static u1Byte LatchCnt = 0; + + if((pDM_Odm->SupportICType == ODM_RTL8723A)||(pDM_Odm->SupportICType == ODM_RTL8188E)) + return; + //AGC RX High Power Mode is only applied on 2G band in 92D!!! + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + if(*(pDM_Odm->pBandType) != ODM_BAND_2_4G) + return; + } + + if(!(pDM_Odm->SupportAbility==ODM_BB_RXHP)) + return; + + + //RX HP ON/OFF + if(RX_HP_enable == 1) + pRX_HP_Table->RXHP_enable = FALSE; + else + pRX_HP_Table->RXHP_enable = TRUE; + + if(pRX_HP_Table->RXHP_enable == FALSE) + { + if(pRX_HP_Table->RXHP_flag == 1) + { + pRX_HP_Table->RXHP_flag = 0; + psd_intf_flag = 0; + } + return; + } + +#if(DEV_BUS_TYPE == RT_USB_INTERFACE) + //2 Record current TP for USB interface + curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast)-lastTxOkCnt; + curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast)-lastRxOkCnt; + lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); + lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); + + curTPOkCnt = curTxOkCnt+curRxOkCnt; + TP_Buff[0] = curTPOkCnt; // current TP + TP_Acc3 = PlatformDivision64((TP_Buff[1]+TP_Buff[2]+TP_Buff[3]), 3); + TP_Acc5 = PlatformDivision64((TP_Buff[0]+TP_Buff[1]+TP_Buff[2]+TP_Buff[3]+TP_Buff[4]), 5); + + if(TP_Acc5 < 1000) + pRX_HP_Table->TP_Mode = Idle_Mode; + else if((1000 < TP_Acc5)&&(TP_Acc5 < 3750000)) + pRX_HP_Table->TP_Mode = Low_TP_Mode; + else + pRX_HP_Table->TP_Mode = High_TP_Mode; + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP TP Mode = %d\n", pRX_HP_Table->TP_Mode)); + // Since TP result would be sampled every 2 sec, it needs to delay 4sec to wait PSD processing. + // When LatchCnt = 0, we would Get PSD result. + if(TP_Degrade_flag == 1) + { + LatchCnt--; + if(LatchCnt == 0) + { + TP_Degrade_flag = 0; + } + } + // When PSD function triggered by TP degrade 20%, and Interference Flag = 1 + // Set a De_counter to wait IGI = upper bound. If time is UP, the Interference flag will be pull down. + if(Intf_HighTP_flag == 1) + { + De_counter--; + if(De_counter == 0) + { + Intf_HighTP_flag = 0; + psd_intf_flag = 0; + } + } +#endif + + //2 AGC RX High Power Mode by PSD only applied to STA Mode + //3 NOT applied 1. Ad Hoc Mode. + //3 NOT applied 2. AP Mode + if ((pMgntInfo->mAssoc) && (!pMgntInfo->mIbss) && (!ACTING_AS_AP(Adapter))) + { + Is40MHz = *(pDM_Odm->pBandWidth); + curRssi = pDM_Odm->RSSI_Min; + cur_channel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x0fff) & 0x0f; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP RX HP flag = %d\n", pRX_HP_Table->RXHP_flag)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP FA = %d\n", FalseAlmCnt->Cnt_all)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP cur RSSI = %d, pre RSSI=%d\n", curRssi, preRssi)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP current CH = %d\n", cur_channel)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP Is 40MHz = %d\n", Is40MHz)); + //2 PSD function would be triggered + //3 1. Every 4 sec for PCIE + //3 2. Before TP Mode (Idle TP<4kbps) for USB + //3 3. After TP Mode (High TP) for USB + if((curRssi > 68) && (pRX_HP_Table->RXHP_flag == 0)) // Only RSSI>TH and RX_HP_flag=0 will Do PSD process + { +#if (DEV_BUS_TYPE == RT_USB_INTERFACE) + //2 Before TP Mode ==> PSD would be trigger every 4 sec + if(pRX_HP_Table->TP_Mode == Idle_Mode) //2.1 less wlan traffic <4kbps + { +#endif + if(PSDTriggerCnt == 1) + { + odm_PSD_RXHP(pDM_Odm); + pRX_HP_Table->PSD_func_trigger = 1; + PSDTriggerCnt = 0; + } + else + { + PSDTriggerCnt++; + } +#if(DEV_BUS_TYPE == RT_USB_INTERFACE) + } + //2 After TP Mode ==> Check if TP degrade larger than 20% would trigger PSD function + if(pRX_HP_Table->TP_Mode == High_TP_Mode) + { + if((pre_state_flag == 0)&&(LatchCnt == 0)) + { + // TP var < 5% + if((((curTPOkCnt-TP_Acc3)*20)<(TP_Acc3))&&(((curTPOkCnt-TP_Acc3)*20)>(-TP_Acc3))) + { + pre_state++; + if(pre_state == 3) // hit pre_state condition => consecutive 3 times + { + pre_state_flag = 1; + pre_state = 0; + } + + } + else + { + pre_state = 0; + } + } + //3 If pre_state_flag=1 ==> start to monitor TP degrade 20% + if(pre_state_flag == 1) + { + if(((TP_Acc3-curTPOkCnt)*5)>(TP_Acc3)) // degrade 20% + { + odm_PSD_RXHP(pDM_Odm); + pRX_HP_Table->PSD_func_trigger = 1; + TP_Degrade_flag = 1; + LatchCnt = 2; + pre_state_flag = 0; + } + else if(((TP_Buff[2]-curTPOkCnt)*5)>TP_Buff[2]) + { + odm_PSD_RXHP(pDM_Odm); + pRX_HP_Table->PSD_func_trigger = 1; + TP_Degrade_flag = 1; + LatchCnt = 2; + pre_state_flag = 0; + } + else if(((TP_Buff[3]-curTPOkCnt)*5)>TP_Buff[3]) + { + odm_PSD_RXHP(pDM_Odm); + pRX_HP_Table->PSD_func_trigger = 1; + TP_Degrade_flag = 1; + LatchCnt = 2; + pre_state_flag = 0; + } + } + } +#endif +} + +#if (DEV_BUS_TYPE == RT_USB_INTERFACE) + for (i=0;i<4;i++) + { + TP_Buff[4-i] = TP_Buff[3-i]; + } +#endif + //2 Update PSD bitmap according to PSD report + if((pRX_HP_Table->PSD_func_trigger == 1)&&(LatchCnt == 0)) + { + //2 Separate 80M bandwidth into 16 group with smaller 5M BW. + for (i = 0 ; i < 16 ; i++) + { + sum = 0; + for(j = 0; j < 5 ; j++) + sum += pRX_HP_Table->PSD_bitmap_RXHP[5*i + j]; + + if(sum < 5) + { + ch_map_intf_5M[i] = 1; // interference flag + } + } + //=============just for debug========================= + //for(i=0;i<16;i++) + //DbgPrint("RX HP: ch_map_intf_5M[%d] = %d\n", i, ch_map_intf_5M[i]); + //=============================================== + //2 Mask target channel 5M index + for(i = 0; i < (4+4*Is40MHz) ; i++) + { + ch_map_intf_5M[cur_channel - (1+2*Is40MHz) + i] = 0; + } + + psd_intf_flag = 0; + for(i = 0; i < 16; i++) + { + if(ch_map_intf_5M[i] == 1) + { + psd_intf_flag = 1; // interference is detected!!! + break; + } + } + +#if (DEV_BUS_TYPE == RT_USB_INTERFACE) + if(pRX_HP_Table->TP_Mode!=Idle_Mode) + { + if(psd_intf_flag == 1) // to avoid psd_intf_flag always 1 + { + Intf_HighTP_flag = 1; + De_counter = 32; // 0x1E -> 0x3E needs 32 times by each IGI step =1 + } + } +#endif + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP psd_intf_flag = %d\n", psd_intf_flag)); + //2 Distance between target channel and interference + for(i = 0; i < 16; i++) + { + if(ch_map_intf_5M[i] == 1) + { + Intf_diff_idx = ((cur_channel+Is40MHz-(i+1))>0) ? (s1Byte)(cur_channel-2*Is40MHz-(i-2)) : (s1Byte)((i+1)-(cur_channel+2*Is40MHz)); + if(Intf_diff_idx < MIN_Intf_diff_idx) + MIN_Intf_diff_idx = Intf_diff_idx; // the min difference index between interference and target + } + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP MIN_Intf_diff_idx = %d\n", MIN_Intf_diff_idx)); + //2 Choose False Alarm Threshold + switch (MIN_Intf_diff_idx){ + case 0: + case 1: + case 2: + case 3: + FA_TH = FA_RXHP_TH1; + break; + case 4: // CH5 + case 5: // CH6 + FA_TH = FA_RXHP_TH2; + break; + case 6: // CH7 + case 7: // CH8 + FA_TH = FA_RXHP_TH3; + break; + case 8: // CH9 + case 9: //CH10 + FA_TH = FA_RXHP_TH4; + break; + case 10: + case 11: + case 12: + case 13: + case 14: + case 15: + FA_TH = FA_RXHP_TH5; + break; + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP FA_TH = %d\n", FA_TH)); + pRX_HP_Table->PSD_func_trigger = 0; + } + //1 Monitor RSSI variation to choose the suitable IGI or Exit AGC RX High Power Mode + if(pRX_HP_Table->RXHP_flag == 1) + { + if ((curRssi > 80)&&(preRssi < 80)) + { + pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; + } + else if ((curRssi < 80)&&(preRssi > 80)) + { + pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; + } + else if ((curRssi > 72)&&(preRssi < 72)) + { + pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; + } + else if ((curRssi < 72)&&( preRssi > 72)) + { + pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; + } + else if (curRssi < 68) //RSSI is NOT large enough!!==> Exit AGC RX High Power Mode + { + pRX_HP_Table->Cur_pw_th = pw_th_10dB; + pRX_HP_Table->RXHP_flag = 0; // Back to Normal DIG Mode + psd_intf_flag = 0; + } + } + else // pRX_HP_Table->RXHP_flag == 0 + { + //1 Decide whether to enter AGC RX High Power Mode + if ((curRssi > 70) && (psd_intf_flag == 1) && (FalseAlmCnt->Cnt_all > FA_TH) && + (pDM_DigTable->CurIGValue == pDM_DigTable->rx_gain_range_max)) + { + if (curRssi > 80) + { + pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; + } + else if (curRssi > 72) + { + pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; + } + else + { + pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; + } + pRX_HP_Table->Cur_pw_th = pw_th_16dB; //RegC54[9:8]=2'b11: to enter AGC Flow 3 + pRX_HP_Table->First_time_enter = TRUE; + pRX_HP_Table->RXHP_flag = 1; // RXHP_flag=1: AGC RX High Power Mode, RXHP_flag=0: Normal DIG Mode + } + } + preRssi = curRssi; + odm_Write_RXHP(pDM_Odm); + } +#endif //#if( DM_ODM_SUPPORT_TYPE & (ODM_MP)) +#endif //#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) +} + +void odm_Write_RXHP( + IN PDM_ODM_T pDM_Odm) +{ + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; + u4Byte currentIGI; + + if(pRX_HP_Table->Cur_IGI != pRX_HP_Table->Pre_IGI) + { + ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); + ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); + } + + if(pRX_HP_Table->Cur_pw_th != pRX_HP_Table->Pre_pw_th) +{ + ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, BIT8|BIT9, pRX_HP_Table->Cur_pw_th); // RegC54[9:8]=2'b11: AGC Flow 3 + } + + if(pRX_HP_Table->RXHP_flag == 0) + { + pRX_HP_Table->Cur_IGI = 0x20; + } + else + { + currentIGI = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0); + if(currentIGI<0x50) + { + ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); + ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); + } + } + pRX_HP_Table->Pre_IGI = pRX_HP_Table->Cur_IGI; + pRX_HP_Table->Pre_pw_th = pRX_HP_Table->Cur_pw_th; + +} + +VOID +odm_PSD_RXHP( + IN PDM_ODM_T pDM_Odm +) +{ + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + unsigned int pts, start_point, stop_point, initial_gain ; + static u1Byte PSD_bitmap_memory[80], init_memory = 0; + static u1Byte psd_cnt=0; + static u4Byte PSD_report[80], PSD_report_tmp; + static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; + u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, + 0,3,6,10,13,16,19,22,26,29}; + u1Byte n, i, channel, BBReset,tone_idx; + u1Byte PSD_bitmap[10], SSBT=0,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; + s4Byte PSD_skip_start, PSD_skip_stop; + u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; + u4Byte ReScan, Interval, Is40MHz; + u8Byte curTxOkCnt, curRxOkCnt; + //--------------2G band synthesizer for 92D switch RF channel using----------------- + u1Byte group_idx=0; + u4Byte SYN_RF25=0, SYN_RF26=0, SYN_RF27=0, SYN_RF2B=0, SYN_RF2C=0; + u4Byte SYN[5] = {0x25, 0x26, 0x27, 0x2B, 0x2C}; // synthesizer RF register for 2G channel + u4Byte SYN_group[3][5] = {{0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840}, // For CH1,2,4,9,10.11.12 {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840} + {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840}, // For CH3,13,14 + {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}}; // For Ch5,6,7,8 + //--------------------- Add by Gary for Debug setting ---------------------- + s4Byte psd_result = 0; + u1Byte RSSI_BT_new = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB9C, 0xFF); + u1Byte rssi_ctrl = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB38, 0xFF); + //--------------------------------------------------------------------- + + if(pMgntInfo->bScanInProgress) + { + return; + } + + ReScan = PSD_RESCAN; + Interval = SCAN_INTERVAL; + + + //1 Initialization + if(init_memory == 0) + { + RT_TRACE( COMP_PSD, DBG_LOUD,("Init memory\n")); + for(i = 0; i < 80; i++) + PSD_bitmap_memory[i] = 0xFF; // channel is always good + init_memory = 1; + } + if(psd_cnt == 0) + { + RT_TRACE(COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); + for(i = 0; i < 80; i++) + PSD_report[i] = 0; + } + + //1 Backup Current Settings + CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + //2 Record Current synthesizer parameters based on current channel + if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) + { + SYN_RF25 = ODM_GetRFReg(pDM_Odm, RF_PATH_B, 0x25, bMaskDWord); + SYN_RF26 = ODM_GetRFReg(pDM_Odm, RF_PATH_B, 0x26, bMaskDWord); + SYN_RF27 = ODM_GetRFReg(pDM_Odm, RF_PATH_B, 0x27, bMaskDWord); + SYN_RF2B = ODM_GetRFReg(pDM_Odm, RF_PATH_B, 0x2B, bMaskDWord); + SYN_RF2C = ODM_GetRFReg(pDM_Odm, RF_PATH_B, 0x2C, bMaskDWord); + } + else // DualMAC_DualPHY 2G + { + SYN_RF25 = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x25, bMaskDWord); + SYN_RF26 = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x26, bMaskDWord); + SYN_RF27 = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x27, bMaskDWord); + SYN_RF2B = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x2B, bMaskDWord); + SYN_RF2C = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x2C, bMaskDWord); + } + } + RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); + RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; + Is40MHz = *(pDM_Odm->pBandWidth); + ODM_RT_TRACE(pDM_Odm, COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); + //1 Turn off CCK + ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); + //1 Turn off TX + //Pause TX Queue + ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); + //Force RX to stop TX immediately + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); + //1 Turn off RX + //Rx AGC off RegC70[0]=0, RegC7C[20]=0 + ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); + ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); + //Turn off CCA + ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); + //BB Reset + BBReset = ODM_Read1Byte(pDM_Odm, 0x02); + ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); + ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); + //1 Leave RX idle low power + ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); + //1 Fix initial gain + RSSI_BT = RSSI_BT_new; + RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); + + if(rssi_ctrl == 1) // just for debug!! + initial_gain_psd = RSSI_BT_new; + else + initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI + + RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); + + initialGainUpper = 0x54; + + RSSI_BT = initial_gain_psd; + //SSBT = RSSI_BT; + + //RT_TRACE( COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); + RT_TRACE( COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); + + pDM_Odm->bDMInitialGainEnable = FALSE; + initial_gain = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F; + ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain_psd); + //1 Turn off 3-wire + ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); + + //pts value = 128, 256, 512, 1024 + pts = 128; + + if(pts == 128) + { + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); + start_point = 64; + stop_point = 192; + } + else if(pts == 256) + { + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); + start_point = 128; + stop_point = 384; + } + else if(pts == 512) + { + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); + start_point = 256; + stop_point = 768; + } + else + { + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); + start_point = 512; + stop_point = 1536; + } + + +//3 Skip WLAN channels if WLAN busy + curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; + curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; + lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); + lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); + + PSD_skip_start=80; + PSD_skip_stop = 0; + wlan_channel = CurrentChannel & 0x0f; + + RT_TRACE(COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); + + if((curRxOkCnt+curTxOkCnt) > 1000) + { + PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; + PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; + } + + RT_TRACE(COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); + + for (n=0;n<80;n++) + { + if((n%20)==0) + { + channel = (n/20)*4 + 1; + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + switch(channel) + { + case 1: + case 9: + group_idx = 0; + break; + case 5: + group_idx = 2; + break; + case 13: + group_idx = 1; + break; + } + if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) + { + for(i = 0; i < SYN_Length; i++) + ODM_SetRFReg(pDM_Odm, RF_PATH_B, SYN[i], bMaskDWord, SYN_group[group_idx][i]); + + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_CHNLBW, 0x3FF, channel); + } + else // DualMAC_DualPHY 2G + { + for(i = 0; i < SYN_Length; i++) + ODM_SetRFReg(pDM_Odm, RF_PATH_A, SYN[i], bMaskDWord, SYN_group[group_idx][i]); + + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); + } + } + else + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x3FF, channel); + } + tone_idx = n%20; + if ((n>=PSD_skip_start) && (n PSD_report[n]) + PSD_report[n] = PSD_report_tmp; + + } + } + + PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); + + //----end + //1 Turn on RX + //Rx AGC on + ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); + ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); + //CCK on + ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); + //1 Turn on TX + //Resume TX Queue + ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); + //Turn on 3-wire + ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); + //1 Restore Current Settings + //Resume DIG + pDM_Odm->bDMInitialGainEnable= TRUE; + ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain); + // restore originl center frequency + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) + { + ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_CHNLBW, bMaskDWord, CurrentChannel); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x25, bMaskDWord, SYN_RF25); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x26, bMaskDWord, SYN_RF26); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x27, bMaskDWord, SYN_RF27); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x2B, bMaskDWord, SYN_RF2B); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x2C, bMaskDWord, SYN_RF2C); + } + else // DualMAC_DualPHY + { + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x25, bMaskDWord, SYN_RF25); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x26, bMaskDWord, SYN_RF26); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x27, bMaskDWord, SYN_RF27); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x2B, bMaskDWord, SYN_RF2B); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x2C, bMaskDWord, SYN_RF2C); + } + } + //Turn on CCA + ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); + //Restore RX idle low power + if(RxIdleLowPwr == TRUE) + ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); + + psd_cnt++; + //gPrint("psd cnt=%d\n", psd_cnt); + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); + if (psd_cnt < ReScan) + { + ODM_SetTimer(pDM_Odm, &pRX_HP_Table->PSDTimer, Interval); //ms + } + else + { + psd_cnt = 0; + for(i=0;i<80;i++) + RT_TRACE( COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); + //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); + + GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); + + } + } + +VOID +odm_PSD_RXHPCallback( + PRT_TIMER pTimer +) +{ + PADAPTER Adapter = (PADAPTER)pTimer->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; + +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + #if USE_WORKITEM + ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); + #else + odm_PSD_RXHP(pDM_Odm); + #endif +#else + ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); +#endif + + } + +VOID +odm_PSD_RXHPWorkitemCallback( + IN PVOID pContext + ) +{ + PADAPTER pAdapter = (PADAPTER)pContext; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + + odm_PSD_RXHP(pDM_Odm); +} + +#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + +// +// 2011/09/22 MH Add for 92D global spin lock utilization. +// +VOID +odm_GlobalAdapterCheck( + IN VOID + ) +{ + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + + //sherry delete flag 20110517 +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) + ACQUIRE_GLOBAL_SPINLOCK(&GlobalSpinlockForGlobalAdapterList); +#else + ACQUIRE_GLOBAL_MUTEX(GlobalMutexForGlobalAdapterList); +#endif + +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) + RELEASE_GLOBAL_SPINLOCK(&GlobalSpinlockForGlobalAdapterList); +#else + RELEASE_GLOBAL_MUTEX(GlobalMutexForGlobalAdapterList); +#endif + +#endif + +} // odm_GlobalAdapterCheck + + + +// +// 2011/12/02 MH Copy from MP oursrc for temporarily test. +// +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) +VOID +odm_OFDMTXPathDiversity_92C( + IN PADAPTER Adapter) +{ +// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + PRT_WLAN_STA pEntry; + u1Byte i, DefaultRespPath = 0; + s4Byte MinRSSI = 0xFF; + pPD_T pDM_PDTable = &Adapter->DM_PDTable; + pDM_PDTable->OFDMTXPath = 0; + + //1 Default Port + if(pMgntInfo->mAssoc) + { + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port RSSI[0]=%d, RSSI[1]=%d\n", + Adapter->RxStats.RxRSSIPercentage[0], Adapter->RxStats.RxRSSIPercentage[1])); + if(Adapter->RxStats.RxRSSIPercentage[0] > Adapter->RxStats.RxRSSIPercentage[1]) + { + pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & (~BIT0); + MinRSSI = Adapter->RxStats.RxRSSIPercentage[1]; + DefaultRespPath = 0; + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-0\n")); + } + else + { + pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT0; + MinRSSI = Adapter->RxStats.RxRSSIPercentage[0]; + DefaultRespPath = 1; + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-1\n")); + } + //RT_TRACE( COMP_SWAS, DBG_LOUD, ("pDM_PDTable->OFDMTXPath =0x%x\n",pDM_PDTable->OFDMTXPath)); + } + //1 Extension Port + for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) + { + if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) + pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); + else + pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); + + if(pEntry!=NULL) + { + if(pEntry->bAssociated) + { + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d, RSSI_0=%d, RSSI_1=%d\n", + pEntry->AID+1, pEntry->rssi_stat.RxRSSIPercentage[0], pEntry->rssi_stat.RxRSSIPercentage[1])); + + if(pEntry->rssi_stat.RxRSSIPercentage[0] > pEntry->rssi_stat.RxRSSIPercentage[1]) + { + pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & ~(BIT(pEntry->AID+1)); + //pHalData->TXPath = pHalData->TXPath & ~(1<<(pEntry->AID+1)); + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-0\n", pEntry->AID+1)); + if(pEntry->rssi_stat.RxRSSIPercentage[1] < MinRSSI) + { + MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[1]; + DefaultRespPath = 0; + } + } + else + { + pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT(pEntry->AID+1); + //pHalData->TXPath = pHalData->TXPath | (1 << (pEntry->AID+1)); + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-1\n", pEntry->AID+1)); + if(pEntry->rssi_stat.RxRSSIPercentage[0] < MinRSSI) + { + MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[0]; + DefaultRespPath = 1; + } + } + } + } + else + { + break; + } + } + + pDM_PDTable->OFDMDefaultRespPath = DefaultRespPath; +} + + +BOOLEAN +odm_IsConnected_92C( + IN PADAPTER Adapter +) +{ + PRT_WLAN_STA pEntry; + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + u4Byte i; + BOOLEAN bConnected=FALSE; + + if(pMgntInfo->mAssoc) + { + bConnected = TRUE; + } + else + { + for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) + { + if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) + pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); + else + pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); + + if(pEntry!=NULL) + { + if(pEntry->bAssociated) + { + bConnected = TRUE; + break; + } + } + else + { + break; + } + } + } + return bConnected; +} + + +VOID +odm_ResetPathDiversity_92C( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + pPD_T pDM_PDTable = &Adapter->DM_PDTable; + PRT_WLAN_STA pEntry; + u4Byte i; + + pHalData->RSSI_test = FALSE; + pDM_PDTable->CCK_Pkt_Cnt = 0; + pDM_PDTable->OFDM_Pkt_Cnt = 0; + pHalData->CCK_Pkt_Cnt =0; + pHalData->OFDM_Pkt_Cnt =0; + + if(pDM_PDTable->CCKPathDivEnable == TRUE) + PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); //RX path = PathAB + + for(i=0; i<2; i++) + { + pDM_PDTable->RSSI_CCK_Path_cnt[i]=0; + pDM_PDTable->RSSI_CCK_Path[i] = 0; + } + for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) + { + if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) + pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); + else + pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); + + if(pEntry!=NULL) + { + pEntry->rssi_stat.CCK_Pkt_Cnt = 0; + pEntry->rssi_stat.OFDM_Pkt_Cnt = 0; + for(i=0; i<2; i++) + { + pEntry->rssi_stat.RSSI_CCK_Path_cnt[i] = 0; + pEntry->rssi_stat.RSSI_CCK_Path[i] = 0; + } + } + else + break; + } +} + + +VOID +odm_CCKTXPathDiversity_92C( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + PRT_WLAN_STA pEntry; + s4Byte MinRSSI = 0xFF; + u1Byte i, DefaultRespPath = 0; +// BOOLEAN bBModePathDiv = FALSE; + pPD_T pDM_PDTable = &Adapter->DM_PDTable; + + //1 Default Port + if(pMgntInfo->mAssoc) + { + if(pHalData->OFDM_Pkt_Cnt == 0) + { + for(i=0; i<2; i++) + { + if(pDM_PDTable->RSSI_CCK_Path_cnt[i] > 1) //Because the first packet is discarded + pDM_PDTable->RSSI_CCK_Path[i] = pDM_PDTable->RSSI_CCK_Path[i] / (pDM_PDTable->RSSI_CCK_Path_cnt[i]-1); + else + pDM_PDTable->RSSI_CCK_Path[i] = 0; + } + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path[0]=%d, pDM_PDTable->RSSI_CCK_Path[1]=%d\n", + pDM_PDTable->RSSI_CCK_Path[0], pDM_PDTable->RSSI_CCK_Path[1])); + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path_cnt[0]=%d, pDM_PDTable->RSSI_CCK_Path_cnt[1]=%d\n", + pDM_PDTable->RSSI_CCK_Path_cnt[0], pDM_PDTable->RSSI_CCK_Path_cnt[1])); + + if(pDM_PDTable->RSSI_CCK_Path[0] > pDM_PDTable->RSSI_CCK_Path[1]) + { + pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); + MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; + DefaultRespPath = 0; + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); + } + else if(pDM_PDTable->RSSI_CCK_Path[0] < pDM_PDTable->RSSI_CCK_Path[1]) + { + pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT0; + MinRSSI = pDM_PDTable->RSSI_CCK_Path[0]; + DefaultRespPath = 1; + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-1\n")); + } + else + { + if((pDM_PDTable->RSSI_CCK_Path[0] != 0) && (pDM_PDTable->RSSI_CCK_Path[0] < MinRSSI)) + { + pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); + MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; + DefaultRespPath = 0; + } + else + { + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port unchange CCK Path\n")); + } + } + } + else //Follow OFDM decision + { + pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~BIT0)) | (pDM_PDTable->OFDMTXPath &BIT0); + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, Default port Select CCK Path-%d\n", + pDM_PDTable->CCKTXPath &BIT0)); + } + } + //1 Extension Port + for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) + { + if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) + pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); + else + pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); + + if(pEntry!=NULL) + { + if(pEntry->bAssociated) + { + if(pEntry->rssi_stat.OFDM_Pkt_Cnt == 0) + { + for(i=0; i<2; i++) + { + if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[i] > 1) + pEntry->rssi_stat.RSSI_CCK_Path[i] = pEntry->rssi_stat.RSSI_CCK_Path[i] / (pEntry->rssi_stat.RSSI_CCK_Path_cnt[i]-1); + else + pEntry->rssi_stat.RSSI_CCK_Path[i] = 0; + } + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d, RSSI_CCK0=%d, RSSI_CCK1=%d\n", + pEntry->AID+1, pEntry->rssi_stat.RSSI_CCK_Path[0], pEntry->rssi_stat.RSSI_CCK_Path[1])); + + if(pEntry->rssi_stat.RSSI_CCK_Path[0] >pEntry->rssi_stat.RSSI_CCK_Path[1]) + { + pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AID+1)); + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AID+1)); + if(pEntry->rssi_stat.RSSI_CCK_Path[1] < MinRSSI) + { + MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; + DefaultRespPath = 0; + } + } + else if(pEntry->rssi_stat.RSSI_CCK_Path[0] rssi_stat.RSSI_CCK_Path[1]) + { + pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT(pEntry->AID+1); + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-1\n", pEntry->AID+1)); + if(pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI) + { + MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[0]; + DefaultRespPath = 1; + } + } + else + { + if((pEntry->rssi_stat.RSSI_CCK_Path[0] != 0) && (pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI)) + { + pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AID+1)); + MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; + DefaultRespPath = 0; + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AID+1)); + } + else + { + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d unchange CCK Path\n", pEntry->AID+1)); + } + } + } + else //Follow OFDM decision + { + pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~(BIT(pEntry->AID+1)))) | (pDM_PDTable->OFDMTXPath & BIT(pEntry->AID+1)); + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, MACID=%d Select CCK Path-%d\n", + pEntry->AID+1, (pDM_PDTable->CCKTXPath & BIT(pEntry->AID+1))>>(pEntry->AID+1))); + } + } + } + else + { + break; + } + } + + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C:MinRSSI=%d\n",MinRSSI)); + + if(MinRSSI == 0xFF) + DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; + + pDM_PDTable->CCKDefaultRespPath = DefaultRespPath; +} + + + +VOID +odm_PathDiversityAfterLink_92C( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + pPD_T pDM_PDTable = &Adapter->DM_PDTable; + u1Byte DefaultRespPath=0; + + if((!IS_92C_SERIAL(pHalData->VersionID)) || (pHalData->PathDivCfg != 1) || (pHalData->eRFPowerState == eRfOff)) + { + if(pHalData->PathDivCfg == 0) + { + RT_TRACE( COMP_SWAS, DBG_LOUD, ("No ODM_TXPathDiversity()\n")); + } + else + { + RT_TRACE( COMP_SWAS, DBG_LOUD, ("2T ODM_TXPathDiversity()\n")); + } + return; + } + if(!odm_IsConnected_92C(Adapter)) + { + RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity(): No Connections\n")); + return; + } + + + if(pDM_PDTable->TrainingState == 0) + { + RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity() ==>\n")); + odm_OFDMTXPathDiversity_92C(Adapter); + + if((pDM_PDTable->CCKPathDivEnable == TRUE) && (pDM_PDTable->OFDM_Pkt_Cnt < 100)) + { + //RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=0\n")); + + if(pDM_PDTable->CCK_Pkt_Cnt > 300) + pDM_PDTable->Timer = 20; + else if(pDM_PDTable->CCK_Pkt_Cnt > 100) + pDM_PDTable->Timer = 60; + else + pDM_PDTable->Timer = 250; + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: timer=%d\n",pDM_PDTable->Timer)); + + PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // RX path = PathA + pDM_PDTable->TrainingState = 1; + pHalData->RSSI_test = TRUE; + ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms + } + else + { + pDM_PDTable->CCKTXPath = pDM_PDTable->OFDMTXPath; + DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: Skip odm_CCKTXPathDiversity_92C, DefaultRespPath is OFDM\n")); + odm_SetRespPath_92C(Adapter, DefaultRespPath); + odm_ResetPathDiversity_92C(Adapter); + RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); + } + } + else if(pDM_PDTable->TrainingState == 1) + { + //RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=1\n")); + PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // RX path = PathB + pDM_PDTable->TrainingState = 2; + ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms + } + else + { + //RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=2\n")); + pDM_PDTable->TrainingState = 0; + odm_CCKTXPathDiversity_92C(Adapter); + if(pDM_PDTable->OFDM_Pkt_Cnt != 0) + { + DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is OFDM\n")); + } + else + { + DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is CCK\n")); + } + odm_SetRespPath_92C(Adapter, DefaultRespPath); + odm_ResetPathDiversity_92C(Adapter); + RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); + } + +} + + + +VOID +odm_CCKTXPathDiversityCallback( + PRT_TIMER pTimer +) +{ +#if USE_WORKITEM + PADAPTER Adapter = (PADAPTER)pTimer->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#else + PADAPTER Adapter = (PADAPTER)pTimer->Adapter; +#endif + +#if DEV_BUS_TYPE==RT_PCI_INTERFACE +#if USE_WORKITEM + PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); +#else + odm_PathDiversityAfterLink_92C(Adapter); +#endif +#else + PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); +#endif + +} + + +VOID +odm_CCKTXPathDiversityWorkItemCallback( + IN PVOID pContext + ) +{ + PADAPTER Adapter = (PADAPTER)pContext; + + odm_CCKTXPathDiversity_92C(Adapter); +} + + +VOID +ODM_CCKPathDiversityChkPerPktRssi( + PADAPTER Adapter, + BOOLEAN bIsDefPort, + BOOLEAN bMatchBSSID, + PRT_WLAN_STA pEntry, + PRT_RFD pRfd, + pu1Byte pDesc + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BOOLEAN bCount = FALSE; + pPD_T pDM_PDTable = &Adapter->DM_PDTable; + //BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE_92C(pDesc); +#if DEV_BUS_TYPE != RT_SDIO_INTERFACE + BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE(Adapter, pDesc); +#else //below code would be removed if we have verified SDIO + BOOLEAN isCCKrate = IS_HARDWARE_TYPE_8188E(Adapter) ? RX_HAL_IS_CCK_RATE_88E(pDesc) : RX_HAL_IS_CCK_RATE_92C(pDesc); +#endif + + if((pHalData->PathDivCfg != 1) || (pHalData->RSSI_test == FALSE)) + return; + + if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) + bCount = TRUE; + else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) + bCount = TRUE; + + if(bCount && isCCKrate) + { + if(pDM_PDTable->TrainingState == 1 ) + { + if(pEntry) + { + if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[0] != 0) + pEntry->rssi_stat.RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; + pEntry->rssi_stat.RSSI_CCK_Path_cnt[0]++; + } + else + { + if(pDM_PDTable->RSSI_CCK_Path_cnt[0] != 0) + pDM_PDTable->RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; + pDM_PDTable->RSSI_CCK_Path_cnt[0]++; + } + } + else if(pDM_PDTable->TrainingState == 2 ) + { + if(pEntry) + { + if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[1] != 0) + pEntry->rssi_stat.RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; + pEntry->rssi_stat.RSSI_CCK_Path_cnt[1]++; + } + else + { + if(pDM_PDTable->RSSI_CCK_Path_cnt[1] != 0) + pDM_PDTable->RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; + pDM_PDTable->RSSI_CCK_Path_cnt[1]++; + } + } + } +} + + +BOOLEAN +ODM_PathDiversityBeforeLink92C( + //IN PADAPTER Adapter + IN PDM_ODM_T pDM_Odm + ) +{ +#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE* pHalData = NULL; + PMGNT_INFO pMgntInfo = NULL; + //pSWAT_T pDM_SWAT_Table = &Adapter->DM_SWAT_Table; + pPD_T pDM_PDTable = NULL; + + s1Byte Score = 0; + PRT_WLAN_BSS pTmpBssDesc; + PRT_WLAN_BSS pTestBssDesc; + + u1Byte target_chnl = 0; + u1Byte index; + + if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 + { // The ODM structure is not initialized. + return FALSE; + } + pHalData = GET_HAL_DATA(Adapter); + pMgntInfo = &Adapter->MgntInfo; + pDM_PDTable = &Adapter->DM_PDTable; + + // Condition that does not need to use path diversity. + if((!IS_92C_SERIAL(pHalData->VersionID)) || (pHalData->PathDivCfg!=1) || pMgntInfo->AntennaTest ) + { + RT_TRACE(COMP_SWAS, DBG_LOUD, + ("ODM_PathDiversityBeforeLink92C(): No PathDiv Mechanism before link.\n")); + return FALSE; + } + + // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. + PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); + if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) + { + PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); + + RT_TRACE(COMP_SWAS, DBG_LOUD, + ("ODM_PathDiversityBeforeLink92C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", + pMgntInfo->RFChangeInProgress, + pHalData->eRFPowerState)); + + //pDM_SWAT_Table->SWAS_NoLink_State = 0; + pDM_PDTable->PathDiv_NoLink_State = 0; + + return FALSE; + } + else + { + PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); + } + + //1 Run AntDiv mechanism "Before Link" part. + //if(pDM_SWAT_Table->SWAS_NoLink_State == 0) + if(pDM_PDTable->PathDiv_NoLink_State == 0) + { + //1 Prepare to do Scan again to check current antenna state. + + // Set check state to next step. + //pDM_SWAT_Table->SWAS_NoLink_State = 1; + pDM_PDTable->PathDiv_NoLink_State = 1; + + // Copy Current Scan list. + Adapter->MgntInfo.tmpNumBssDesc = pMgntInfo->NumBssDesc; + PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); + + // Switch Antenna to another one. + if(pDM_PDTable->DefaultRespPath == 0) + { + PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // TRX path = PathB + odm_SetRespPath_92C(Adapter, 1); + pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; + pDM_PDTable->CCKTXPath = 0xFFFFFFFF; + } + else + { + PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // TRX path = PathA + odm_SetRespPath_92C(Adapter, 0); + pDM_PDTable->OFDMTXPath = 0x0; + pDM_PDTable->CCKTXPath = 0x0; + } +#if 0 + + pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; + pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; + + RT_TRACE(COMP_SWAS, DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink8192C: Change to Ant(%s) for testing.\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B")); + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); + pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); + PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); +#endif + + // Go back to scan function again. + RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Scan one more time\n")); + pMgntInfo->ScanStep=0; + target_chnl = odm_SwAntDivSelectChkChnl(Adapter); + odm_SwAntDivConsructChkScanChnl(Adapter, target_chnl); + HTReleaseChnlOpLock(Adapter); + PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); + + return TRUE; + } + else + { + //1 ScanComple() is called after antenna swiched. + //1 Check scan result and determine which antenna is going + //1 to be used. + + for(index=0; indexMgntInfo.tmpNumBssDesc; index++) + { + pTmpBssDesc = &(Adapter->MgntInfo.tmpbssDesc[index]); + pTestBssDesc = &(pMgntInfo->bssDesc[index]); + + if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) + { + RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C(): ERROR!! This shall not happen.\n")); + continue; + } + + if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) + { + RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score++\n")); + RT_PRINT_STR(COMP_SWAS, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); + RT_TRACE(COMP_SWAS, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); + + Score++; + PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); + } + else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) + { + RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score--\n")); + RT_PRINT_STR(COMP_SWAS, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); + RT_TRACE(COMP_SWAS, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); + Score--; + } + + } + + if(pMgntInfo->NumBssDesc!=0 && Score<=0) + { + RT_TRACE(COMP_SWAS, DBG_LOUD, + ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); + + //pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; + } + else + { + RT_TRACE(COMP_SWAS, DBG_LOUD, + ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); + + if(pDM_PDTable->DefaultRespPath == 0) + { + pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; + pDM_PDTable->CCKTXPath = 0xFFFFFFFF; + odm_SetRespPath_92C(Adapter, 1); + } + else + { + pDM_PDTable->OFDMTXPath = 0x0; + pDM_PDTable->CCKTXPath = 0x0; + odm_SetRespPath_92C(Adapter, 0); + } + PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); // RX path = PathAB + + //pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; + + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); + //pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); + } + + // Check state reset to default and wait for next time. + //pDM_SWAT_Table->SWAS_NoLink_State = 0; + pDM_PDTable->PathDiv_NoLink_State = 0; + + return FALSE; + } +#else + return FALSE; +#endif + +} + + +//Neil Chen---2011--06--22 +//----92D Path Diversity----// +//#ifdef PathDiv92D +//================================== +//3 Path Diversity +//================================== +// +// 20100514 Luke/Joseph: +// Add new function for antenna diversity after link. +// This is the main function of antenna diversity after link. +// This function is called in HalDmWatchDog() and ODM_SwAntDivChkAntSwitchCallback(). +// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. +// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. +// After 500ms, ODM_SwAntDivChkAntSwitchCallback() calls this function to compare the signal just +// listened on the air with the RSSI of original antenna. +// It chooses the antenna with better RSSI. +// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting +// penalty to get next try. +// +// +// 20100503 Joseph: +// Add new function SwAntDivCheck8192C(). +// This is the main function of Antenna diversity function before link. +// Mainly, it just retains last scan result and scan again. +// After that, it compares the scan result to see which one gets better RSSI. +// It selects antenna with better receiving power and returns better scan result. +// + + +// +// 20100514 Luke/Joseph: +// This function is used to gather the RSSI information for antenna testing. +// It selects the RSSI of the peer STA that we want to know. +// +VOID +ODM_PathDivChkPerPktRssi( + PADAPTER Adapter, + BOOLEAN bIsDefPort, + BOOLEAN bMatchBSSID, + PRT_WLAN_STA pEntry, + PRT_RFD pRfd + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BOOLEAN bCount = FALSE; + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + + if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) + bCount = TRUE; + else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) + bCount = TRUE; + + if(bCount) + { + //1 RSSI for SW Antenna Switch + if(pDM_SWAT_Table->CurAntenna == Antenna_A) + { + pHalData->RSSI_sum_A += pRfd->Status.RxPWDBAll; + pHalData->RSSI_cnt_A++; + } + else + { + pHalData->RSSI_sum_B += pRfd->Status.RxPWDBAll; + pHalData->RSSI_cnt_B++; + + } + } +} + + + +// +// 20100514 Luke/Joseph: +// Add new function to reset antenna diversity state after link. +// +VOID +ODM_PathDivRestAfterLink( + IN PDM_ODM_T pDM_Odm + ) +{ + PADAPTER Adapter=pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + + pHalData->RSSI_cnt_A = 0; + pHalData->RSSI_cnt_B = 0; + pHalData->RSSI_test = FALSE; + pDM_SWAT_Table->try_flag = 0x0; // NOT 0xff + pDM_SWAT_Table->RSSI_Trying = 0; + pDM_SWAT_Table->SelectAntennaMap=0xAA; + pDM_SWAT_Table->CurAntenna = Antenna_A; +} + + +// +// 20100514 Luke/Joseph: +// Callback function for 500ms antenna test trying. +// +VOID +odm_PathDivChkAntSwitchCallback( + PRT_TIMER pTimer +) +{ + PADAPTER Adapter = (PADAPTER)pTimer->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + +#if USE_WORKITEM + PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); +#else + odm_PathDivChkAntSwitch(pDM_Odm); +#endif +#else + PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); +#endif + +//odm_SwAntDivChkAntSwitch(Adapter, SWAW_STEP_DETERMINE); + +} + + +VOID +odm_PathDivChkAntSwitchWorkitemCallback( + IN PVOID pContext + ) +{ + PADAPTER pAdapter = (PADAPTER)pContext; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + + odm_PathDivChkAntSwitch(pDM_Odm); +} + + + //MAC0_ACCESS_PHY1 + +// 2011-06-22 Neil Chen & Gary Hsin +// Refer to Jr.Luke's SW ANT DIV +// 92D Path Diversity Main function +// refer to 88C software antenna diversity +// +VOID +odm_PathDivChkAntSwitch( + PDM_ODM_T pDM_Odm + //PADAPTER Adapter, + //u1Byte Step +) +{ + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + + + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + s4Byte curRSSI=100, RSSI_A, RSSI_B; + u1Byte nextAntenna=Antenna_B; + static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; + u8Byte curTxOkCnt, curRxOkCnt; + static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; + u8Byte CurByteCnt=0, PreByteCnt=0; + static u1Byte TrafficLoad = TRAFFIC_LOW; + u1Byte Score_A=0, Score_B=0; + u1Byte i=0x0; + // Neil Chen + static u1Byte pathdiv_para=0x0; + static u1Byte switchfirsttime=0x00; + // u1Byte regB33 = (u1Byte) PHY_QueryBBReg(Adapter, 0xB30,BIT27); + u1Byte regB33 = (u1Byte)ODM_GetBBReg(pDM_Odm, PATHDIV_REG, BIT27); + + + //u1Byte reg637 =0x0; + static u1Byte fw_value=0x0; + u1Byte n=0; + static u8Byte lastTxOkCnt_tmp=0, lastRxOkCnt_tmp=0; + //u8Byte curTxOkCnt_tmp, curRxOkCnt_tmp; + PADAPTER BuddyAdapter = Adapter->BuddyAdapter; // another adapter MAC + // Path Diversity //Neil Chen--2011--06--22 + + //u1Byte PathDiv_Trigger = (u1Byte) PHY_QueryBBReg(Adapter, 0xBA0,BIT31); + u1Byte PathDiv_Trigger = (u1Byte) ODM_GetBBReg(pDM_Odm, PATHDIV_TRI,BIT31); + u1Byte PathDiv_Enable = pHalData->bPathDiv_Enable; + + + //DbgPrint("Path Div PG Value:%x \n",PathDiv_Enable); + if((BuddyAdapter==NULL)||(!PathDiv_Enable)||(PathDiv_Trigger)||(pHalData->CurrentBandType92D == BAND_ON_2_4G)) + { + return; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD,("===================>odm_PathDivChkAntSwitch()\n")); + + // The first time to switch path excluding 2nd, 3rd, ....etc.... + if(switchfirsttime==0) + { + if(regB33==0) + { + pDM_SWAT_Table->CurAntenna = Antenna_A; // Default MAC0_5G-->Path A (current antenna) + } + } + + // Condition that does not need to use antenna diversity. + if(pDM_Odm->SupportICType != ODM_RTL8192D) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDiversityMechanims(): No PathDiv Mechanism.\n")); + return; + } + + // Radio off: Status reset to default and return. + if(pHalData->eRFPowerState==eRfOff) + { + //ODM_SwAntDivRestAfterLink(Adapter); + return; + } + + /* + // Handling step mismatch condition. + // Peak step is not finished at last time. Recover the variable and check again. + if( Step != pDM_SWAT_Table->try_flag ) + { + ODM_SwAntDivRestAfterLink(Adapter); + } */ + + if(pDM_SWAT_Table->try_flag == 0xff) + { + // Select RSSI checking target + if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) + { + // Target: Infrastructure mode AP. + pHalData->RSSI_target = NULL; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDivMechanism(): RSSI_target is DEF AP!\n")); + } + else + { + u1Byte index = 0; + PRT_WLAN_STA pEntry = NULL; + PADAPTER pTargetAdapter = NULL; + + if( pMgntInfo->mIbss || ACTING_AS_AP(Adapter) ) + { + // Target: AP/IBSS peer. + pTargetAdapter = Adapter; + } + else if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) + { + // Target: VWIFI peer. + pTargetAdapter = GetFirstExtAdapter(Adapter); + } + + if(pTargetAdapter != NULL) + { + for(index=0; indexbAssociated) + break; + } + } + } + + if(pEntry == NULL) + { + ODM_PathDivRestAfterLink(pDM_Odm); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); + return; + } + else + { + pHalData->RSSI_target = pEntry; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); + } + } + + pHalData->RSSI_cnt_A = 0; + pHalData->RSSI_cnt_B = 0; + pDM_SWAT_Table->try_flag = 0; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): Set try_flag to 0 prepare for peak!\n")); + return; + } + else + { + // 1st step + curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; + curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; + lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; + lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; + + if(pDM_SWAT_Table->try_flag == 1) // Training State + { + if(pDM_SWAT_Table->CurAntenna == Antenna_A) + { + TXByteCnt_A += curTxOkCnt; + RXByteCnt_A += curRxOkCnt; + } + else + { + TXByteCnt_B += curTxOkCnt; + RXByteCnt_B += curRxOkCnt; + } + + nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; + pDM_SWAT_Table->RSSI_Trying--; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying)); + if(pDM_SWAT_Table->RSSI_Trying == 0) + { + CurByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (TXByteCnt_A+RXByteCnt_A) : (TXByteCnt_B+RXByteCnt_B); + PreByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (TXByteCnt_B+RXByteCnt_B) : (TXByteCnt_A+RXByteCnt_A); + + if(TrafficLoad == TRAFFIC_HIGH) + { + //CurByteCnt = PlatformDivision64(CurByteCnt, 9); + PreByteCnt =PreByteCnt*9; + } + else if(TrafficLoad == TRAFFIC_LOW) + { + //CurByteCnt = PlatformDivision64(CurByteCnt, 2); + PreByteCnt =PreByteCnt*2; + } + if(pHalData->RSSI_cnt_A > 0) + RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; + else + RSSI_A = 0; + if(pHalData->RSSI_cnt_B > 0) + RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; + else + RSSI_B = 0; + curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; + pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_B : RSSI_A; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", + (pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"))); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", + RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); + } + + } + else // try_flag=0 + { + + if(pHalData->RSSI_cnt_A > 0) + RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; + else + RSSI_A = 0; + if(pHalData->RSSI_cnt_B > 0) + RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; + else + RSSI_B = 0; + curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; + pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == Antenna_A)? RSSI_A : RSSI_B; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", + (pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"))); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", + RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); + } + + //1 Trying State + if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) + { + + if(pDM_SWAT_Table->TestMode == TP_MODE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = TP_MODE")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:CurByteCnt = %"i64fmt"d,", CurByteCnt)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:PreByteCnt = %"i64fmt"d\n",PreByteCnt)); + if(CurByteCnt < PreByteCnt) + { + if(pDM_SWAT_Table->CurAntenna == Antenna_A) + pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; + else + pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; + } + else + { + if(pDM_SWAT_Table->CurAntenna == Antenna_A) + pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; + else + pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; + } + for (i= 0; i<8; i++) + { + if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) + Score_A++; + else + Score_B++; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Score_A=%d, Score_B=%d\n", Score_A, Score_B)); + + if(pDM_SWAT_Table->CurAntenna == Antenna_A) + { + nextAntenna = (Score_A >= Score_B)?Antenna_A:Antenna_B; + } + else + { + nextAntenna = (Score_B >= Score_A)?Antenna_B:Antenna_A; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: nextAntenna=%s\n",(nextAntenna==Antenna_A)?"A":"B")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: preAntenna= %s, curAntenna= %s \n", + (pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B"))); + + if(nextAntenna != pDM_SWAT_Table->CurAntenna) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Switch back to another antenna")); + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: current anntena is good\n")); + } + } + + + if(pDM_SWAT_Table->TestMode == RSSI_MODE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = RSSI_MODE")); + pDM_SWAT_Table->SelectAntennaMap=0xAA; + if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna + { + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: Switch back to another antenna")); + nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; + } + else // current anntena is good + { + nextAntenna =pDM_SWAT_Table->CurAntenna; + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: current anntena is good\n")); + } + } + + pDM_SWAT_Table->try_flag = 0; + pHalData->RSSI_test = FALSE; + pHalData->RSSI_sum_A = 0; + pHalData->RSSI_cnt_A = 0; + pHalData->RSSI_sum_B = 0; + pHalData->RSSI_cnt_B = 0; + TXByteCnt_A = 0; + TXByteCnt_B = 0; + RXByteCnt_A = 0; + RXByteCnt_B = 0; + + } + + //1 Normal State + else if(pDM_SWAT_Table->try_flag == 0) + { + if(TrafficLoad == TRAFFIC_HIGH) + { + if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) + TrafficLoad = TRAFFIC_HIGH; + else + TrafficLoad = TRAFFIC_LOW; + } + else if(TrafficLoad == TRAFFIC_LOW) + { + if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) + TrafficLoad = TRAFFIC_HIGH; + else + TrafficLoad = TRAFFIC_LOW; + } + if(TrafficLoad == TRAFFIC_HIGH) + pDM_SWAT_Table->bTriggerAntennaSwitch = 0; + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Normal:TrafficLoad = %llu\n", curTxOkCnt+curRxOkCnt)); + + //Prepare To Try Antenna + nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; + pDM_SWAT_Table->try_flag = 1; + pHalData->RSSI_test = TRUE; + if((curRxOkCnt+curTxOkCnt) > 1000) + { +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + pDM_SWAT_Table->RSSI_Trying = 4; +#else + pDM_SWAT_Table->RSSI_Trying = 2; +#endif + pDM_SWAT_Table->TestMode = TP_MODE; + } + else + { + pDM_SWAT_Table->RSSI_Trying = 2; + pDM_SWAT_Table->TestMode = RSSI_MODE; + + } + + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: Normal State -> Begin Trying!\n")); + pHalData->RSSI_sum_A = 0; + pHalData->RSSI_cnt_A = 0; + pHalData->RSSI_sum_B = 0; + pHalData->RSSI_cnt_B = 0; + } // end of try_flag=0 + } + + //1 4.Change TRX antenna + if(nextAntenna != pDM_SWAT_Table->CurAntenna) + { + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Change TX Antenna!\n ")); + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, nextAntenna); for 88C + if(nextAntenna==Antenna_A) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH A\n ")); + pathdiv_para = 0x02; //02 to switchback to RF path A + fw_value = 0x03; +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); +#else + ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); +#endif + } + else if(nextAntenna==Antenna_B) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH B\n ")); + if(switchfirsttime==0) // First Time To Enter Path Diversity + { + switchfirsttime=0x01; + pathdiv_para = 0x00; + fw_value=0x00; // to backup RF Path A Releated Registers + +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); +#else + ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); + //for(u1Byte n=0; n<80,n++) + //{ + //delay_us(500); + ODM_delay_ms(500); + odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); + + fw_value=0x01; // to backup RF Path A Releated Registers + ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: FIRST TIME To DO PATH SWITCH!\n ")); + } + else + { + pathdiv_para = 0x01; + fw_value = 0x02; +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); +#else + ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); +#endif + } + } + // odm_PathDiversity_8192D(Adapter, pathdiv_para); + } + + //1 5.Reset Statistics + pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; + pDM_SWAT_Table->CurAntenna = nextAntenna; + pDM_SWAT_Table->PreRSSI = curRSSI; + //lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; + //lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; + + //1 6.Set next timer + + if(pDM_SWAT_Table->RSSI_Trying == 0) + return; + + if(pDM_SWAT_Table->RSSI_Trying%2 == 0) + { + if(pDM_SWAT_Table->TestMode == TP_MODE) + { + if(TrafficLoad == TRAFFIC_HIGH) + { +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 10 ); //ms + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 10 ms\n")); +#else + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 20 ); //ms + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 20 ms\n")); +#endif + } + else if(TrafficLoad == TRAFFIC_LOW) + { + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 50 ); //ms + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 50 ms\n")); + } + } + else // TestMode == RSSI_MODE + { + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 500 ms\n")); + } + } + else + { + if(pDM_SWAT_Table->TestMode == TP_MODE) + { + if(TrafficLoad == TRAFFIC_HIGH) + +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 90 ); //ms + //ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 90 ms\n")); +#else + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 180); //ms +#endif + else if(TrafficLoad == TRAFFIC_LOW) + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 100 ); //ms + } + else + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms + } +} + +//================================================== +//3 PathDiv End +//================================================== + +VOID +odm_SetRespPath_92C( + IN PADAPTER Adapter, + IN u1Byte DefaultRespPath + ) +{ + pPD_T pDM_PDTable = &Adapter->DM_PDTable; + + RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: Select Response Path=%d\n",DefaultRespPath)); + if(DefaultRespPath != pDM_PDTable->DefaultRespPath) + { + if(DefaultRespPath == 0) + { + PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x15); + } + else + { + PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x2A); + } + } + pDM_PDTable->DefaultRespPath = DefaultRespPath; +} + + +VOID +ODM_FillTXPathInTXDESC( + IN PADAPTER Adapter, + IN PRT_TCB pTcb, + IN pu1Byte pDesc +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u4Byte TXPath; + pPD_T pDM_PDTable = &Adapter->DM_PDTable; + + //2011.09.05 Add by Luke Lee for path diversity + if(pHalData->PathDivCfg == 1) + { + TXPath = (pDM_PDTable->OFDMTXPath >> pTcb->macId) & BIT0; + //RT_TRACE( COMP_SWAS, DBG_LOUD, ("Fill TXDESC: macID=%d, TXPath=%d\n", pTcb->macId, TXPath)); + //SET_TX_DESC_TX_ANT_CCK(pDesc,TXPath); + if(TXPath == 0) + { + SET_TX_DESC_TX_ANTL_92C(pDesc,1); + SET_TX_DESC_TX_ANT_HT_92C(pDesc,1); + } + else + { + SET_TX_DESC_TX_ANTL_92C(pDesc,2); + SET_TX_DESC_TX_ANT_HT_92C(pDesc,2); + } + TXPath = (pDM_PDTable->CCKTXPath >> pTcb->macId) & BIT0; + if(TXPath == 0) + { + SET_TX_DESC_TX_ANT_CCK_92C(pDesc,1); + } + else + { + SET_TX_DESC_TX_ANT_CCK_92C(pDesc,2); + } + } +} + +//Only for MP //Neil Chen--2012--0502-- +VOID +odm_PathDivInit( +IN PDM_ODM_T pDM_Odm) +{ + pPATHDIV_PARA pathIQK = &pDM_Odm->pathIQK; + + pathIQK->org_2g_RegC14=0x0; + pathIQK->org_2g_RegC4C=0x0; + pathIQK->org_2g_RegC80=0x0; + pathIQK->org_2g_RegC94=0x0; + pathIQK->org_2g_RegCA0=0x0; + pathIQK->org_5g_RegC14=0x0; + pathIQK->org_5g_RegCA0=0x0; + pathIQK->org_5g_RegE30=0x0; + pathIQK->swt_2g_RegC14=0x0; + pathIQK->swt_2g_RegC4C=0x0; + pathIQK->swt_2g_RegC80=0x0; + pathIQK->swt_2g_RegC94=0x0; + pathIQK->swt_2g_RegCA0=0x0; + pathIQK->swt_5g_RegC14=0x0; + pathIQK->swt_5g_RegCA0=0x0; + pathIQK->swt_5g_RegE30=0x0; + +} +#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + +#if ((DM_ODM_SUPPORT_TYPE == ODM_MP)||(DM_ODM_SUPPORT_TYPE == ODM_CE)) + + +// +// Description: +// Set Single/Dual Antenna default setting for products that do not do detection in advance. +// +// Added by Joseph, 2012.03.22 +// +VOID +ODM_SingleDualAntennaDefaultSetting( + IN PDM_ODM_T pDM_Odm + ) +{ + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + pDM_SWAT_Table->ANTA_ON=TRUE; + pDM_SWAT_Table->ANTB_ON=TRUE; +} + + +//2 8723A ANT DETECT + + +VOID +odm_PHY_SaveAFERegisters( + IN PDM_ODM_T pDM_Odm, + IN pu4Byte AFEReg, + IN pu4Byte AFEBackup, + IN u4Byte RegisterNum + ) +{ + u4Byte i; + + //RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n")); + for( i = 0 ; i < RegisterNum ; i++){ AFEBackup[i] = ODM_GetBBReg(pDM_Odm, AFEReg[i], bMaskDWord); + } } -static void odm_PHY_ReloadAFERegisters(struct odm_dm_struct *pDM_Odm, u32 *AFEReg, u32 *AFEBackup, u32 RegiesterNum) +VOID +odm_PHY_ReloadAFERegisters( + IN PDM_ODM_T pDM_Odm, + IN pu4Byte AFEReg, + IN pu4Byte AFEBackup, + IN u4Byte RegiesterNum + ) { - u32 i; + u4Byte i; - for (i = 0; i < RegiesterNum; i++) + //RTPRINT(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n")); + for(i = 0 ; i < RegiesterNum; i++) + { + ODM_SetBBReg(pDM_Odm, AFEReg[i], bMaskDWord, AFEBackup[i]); + } } -/* 2 8723A ANT DETECT */ -/* Description: */ -/* Implement IQK single tone for RF DPK loopback and BB PSD scanning. */ -/* This function is cooperated with BB team Neil. */ -bool ODM_SingleDualAntennaDetection(struct odm_dm_struct *pDM_Odm, u8 mode) +//2 8723A ANT DETECT +// +// Description: +// Implement IQK single tone for RF DPK loopback and BB PSD scanning. +// This function is cooperated with BB team Neil. +// +// Added by Roger, 2011.12.15 +// +BOOLEAN +ODM_SingleDualAntennaDetection( + IN PDM_ODM_T pDM_Odm, + IN u1Byte mode + ) { - struct sw_ant_switch *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - u32 CurrentChannel, RfLoopReg; - u8 n; - u32 Reg88c, Regc08, Reg874, Regc50; - u8 initial_gain = 0x5a; - u32 PSD_report_tmp; - u32 AntA_report = 0x0, AntB_report = 0x0, AntO_report = 0x0; - bool bResult = true; - u32 AFE_Backup[16]; - u32 AFE_REG_8723A[16] = { - rRx_Wait_CCA, rTx_CCK_RFON, - rTx_CCK_BBON, rTx_OFDM_RFON, - rTx_OFDM_BBON, rTx_To_Rx, - rTx_To_Tx, rRx_CCK, - rRx_OFDM, rRx_Wait_RIFS, - rRx_TO_Rx, rStandby, - rSleep, rPMPD_ANAEN, - rFPGA0_XCD_SwitchControl, rBlue_Tooth}; - if (!(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))) + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + u4Byte CurrentChannel,RfLoopReg; + u1Byte n; + u4Byte Reg88c, Regc08, Reg874, Regc50; + u1Byte initial_gain = 0x5a; + u4Byte PSD_report_tmp; + u4Byte AntA_report = 0x0, AntB_report = 0x0,AntO_report=0x0; + BOOLEAN bResult = TRUE; + u4Byte AFE_Backup[16]; + u4Byte AFE_REG_8723A[16] = { + rRx_Wait_CCA, rTx_CCK_RFON, + rTx_CCK_BBON, rTx_OFDM_RFON, + rTx_OFDM_BBON, rTx_To_Rx, + rTx_To_Tx, rRx_CCK, + rRx_OFDM, rRx_Wait_RIFS, + rRx_TO_Rx, rStandby, + rSleep, rPMPD_ANAEN, + rFPGA0_XCD_SwitchControl, rBlue_Tooth}; + + if(!(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))) return bResult; - if (!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) + if(!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) return bResult; - if (pDM_Odm->SupportICType == ODM_RTL8192C) { - /* Which path in ADC/DAC is turnned on for PSD: both I/Q */ + if(pDM_Odm->SupportICType == ODM_RTL8192C) + { + //Which path in ADC/DAC is turnned on for PSD: both I/Q ODM_SetBBReg(pDM_Odm, 0x808, BIT10|BIT11, 0x3); - /* Ageraged number: 8 */ + //Ageraged number: 8 ODM_SetBBReg(pDM_Odm, 0x808, BIT12|BIT13, 0x1); - /* pts = 128; */ + //pts = 128; ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); } - /* 1 Backup Current RF/BB Settings */ - + //1 Backup Current RF/BB Settings + CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask); RfLoopReg = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x00, bRFRegOffsetMask); - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A); /* change to Antenna A */ - /* Step 1: USE IQK to transmitter single tone */ + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A); // change to Antenna A + // Step 1: USE IQK to transmitter single tone ODM_StallExecution(10); - - /* Store A Path Register 88c, c08, 874, c50 */ + + //Store A Path Register 88c, c08, 874, c50 Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord); Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord); Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord); - Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord); - - /* Store AFE Registers */ - odm_PHY_SaveAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); - - /* Set PSD 128 pts */ - ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); /* 128 pts */ - - /* To SET CH1 to do */ - ODM_SetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x01); /* Channel 1 */ - - /* AFE all on step */ + Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord); + + // Store AFE Registers + odm_PHY_SaveAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); + + //Set PSD 128 pts + ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); //128 pts + + // To SET CH1 to do + ODM_SetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x01); //Channel 1 + + // AFE all on step ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rTx_CCK_RFON, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rTx_CCK_BBON, bMaskDWord, 0x6FDB25A4); @@ -2019,148 +12225,271 @@ bool ODM_SingleDualAntennaDetection(struct odm_dm_struct *pDM_Odm, u8 mode) ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_SwitchControl, bMaskDWord, 0x6FDB25A4); ODM_SetBBReg(pDM_Odm, rBlue_Tooth, bMaskDWord, 0x6FDB25A4); - /* 3 wire Disable */ + // 3 wire Disable ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0); - - /* BB IQK Setting */ + + //BB IQK Setting ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4); ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000); - /* IQK setting tone@ 4.34Mhz */ + //IQK setting tone@ 4.34Mhz ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C); - ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); + ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); - /* Page B init */ + + //Page B init ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000); ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000); ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150008); ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150008); - ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0); + ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0); - /* RF loop Setting */ - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0, 0xFFFFF, 0x50008); - - /* IQK Single tone start */ + //RF loop Setting + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0, 0xFFFFF, 0x50008); + + //IQK Single tone start ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ODM_StallExecution(1000); - PSD_report_tmp = 0x0; + PSD_report_tmp=0x0; - for (n = 0; n < 2; n++) { - PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); - if (PSD_report_tmp > AntA_report) - AntA_report = PSD_report_tmp; + for (n=0;n<2;n++) + { + PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); + if(PSD_report_tmp >AntA_report) + AntA_report=PSD_report_tmp; } - PSD_report_tmp = 0x0; + PSD_report_tmp=0x0; - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); /* change to Antenna B */ - ODM_StallExecution(10); + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); // change to Antenna B + ODM_StallExecution(10); - for (n = 0; n < 2; n++) { - PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); - if (PSD_report_tmp > AntB_report) - AntB_report = PSD_report_tmp; + + for (n=0;n<2;n++) + { + PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); + if(PSD_report_tmp > AntB_report) + AntB_report=PSD_report_tmp; } - /* change to open case */ - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, 0); /* change to Ant A and B all open case */ - ODM_StallExecution(10); - - for (n = 0; n < 2; n++) { - PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); - if (PSD_report_tmp > AntO_report) - AntO_report = PSD_report_tmp; + // change to open case + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, 0); // change to Ant A and B all open case + ODM_StallExecution(10); + + for (n=0;n<2;n++) + { + PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain); + if(PSD_report_tmp > AntO_report) + AntO_report=PSD_report_tmp; } - /* Close IQK Single Tone function */ + //Close IQK Single Tone function ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); PSD_report_tmp = 0x0; - /* 1 Return to antanna A */ - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A); + //1 Return to antanna A + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A); ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c); ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08); ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874); ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40); ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); - ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x00, bRFRegOffsetMask, RfLoopReg); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,CurrentChannel); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x00, bRFRegOffsetMask,RfLoopReg); - /* Reload AFE Registers */ - odm_PHY_ReloadAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); + //Reload AFE Registers + odm_PHY_ReloadAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d\n", 2416, AntA_report)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d\n", 2416, AntB_report)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d\n", 2416, AntO_report)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d \n", 2416, AntO_report)); - if (pDM_Odm->SupportICType == ODM_RTL8723A) { - /* 2 Test Ant B based on Ant A is ON */ - if (mode == ANTTESTB) { - if (AntA_report >= 100) { - if (AntB_report > (AntA_report+1)) { - pDM_SWAT_Table->ANTB_ON = false; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n")); - } else { - pDM_SWAT_Table->ANTB_ON = true; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna is A and B\n")); - } - } else { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); - pDM_SWAT_Table->ANTB_ON = false; /* Set Antenna B off as default */ - bResult = false; + + if(pDM_Odm->SupportICType == ODM_RTL8723A) + { + //2 Test Ant B based on Ant A is ON + if(mode==ANTTESTB) + { + if(AntA_report >= 100) + { + if(AntB_report > (AntA_report+1)) + { + pDM_SWAT_Table->ANTB_ON=FALSE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n")); + } + else + { + pDM_SWAT_Table->ANTB_ON=TRUE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna is A and B\n")); + } + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); + pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default + bResult = FALSE; + } + } + //2 Test Ant A and B based on DPDT Open + else if(mode==ANTTESTALL) + { + if((AntO_report >=100)&(AntO_report <118)) + { + if(AntA_report > (AntO_report+1)) + { + pDM_SWAT_Table->ANTA_ON=FALSE; + //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_AntennaDetection(): Antenna A is OFF\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant A is OFF")); + } + else + { + pDM_SWAT_Table->ANTA_ON=TRUE; + //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_AntennaDetection(): Antenna A is ON\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant A is ON")); } - } else if (mode == ANTTESTALL) { - /* 2 Test Ant A and B based on DPDT Open */ - if ((AntO_report >= 100)&(AntO_report < 118)) { - if (AntA_report > (AntO_report+1)) { - pDM_SWAT_Table->ANTA_ON = false; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant A is OFF")); - } else { - pDM_SWAT_Table->ANTA_ON = true; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant A is ON")); - } - if (AntB_report > (AntO_report+2)) { - pDM_SWAT_Table->ANTB_ON = false; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant B is OFF")); - } else { - pDM_SWAT_Table->ANTB_ON = true; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant B is ON")); - } + if(AntB_report > (AntO_report+2)) + { + pDM_SWAT_Table->ANTB_ON=FALSE; + //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_AntennaDetection(): Antenna B is OFF\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant B is OFF")); + } + else + { + pDM_SWAT_Table->ANTB_ON=TRUE; + //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_AntennaDetection(): Antenna B is ON\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant B is ON")); } } - } else if (pDM_Odm->SupportICType == ODM_RTL8192C) { - if (AntA_report >= 100) { - if (AntB_report > (AntA_report+2)) { - pDM_SWAT_Table->ANTA_ON = false; - pDM_SWAT_Table->ANTB_ON = true; + } + } + else if(pDM_Odm->SupportICType == ODM_RTL8192C) + { + if(AntA_report >= 100) + { + if(AntB_report > (AntA_report+2)) + { + pDM_SWAT_Table->ANTA_ON=FALSE; + pDM_SWAT_Table->ANTB_ON=TRUE; ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna B\n")); - } else if (AntA_report > (AntB_report+2)) { - pDM_SWAT_Table->ANTA_ON = true; - pDM_SWAT_Table->ANTB_ON = false; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna B\n")); + } + else if(AntA_report > (AntB_report+2)) + { + pDM_SWAT_Table->ANTA_ON=TRUE; + pDM_SWAT_Table->ANTB_ON=FALSE; ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n")); - } else { - pDM_SWAT_Table->ANTA_ON = true; - pDM_SWAT_Table->ANTB_ON = true; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SingleDualAntennaDetection(): Dual Antenna\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n")); + } + else + { + pDM_SWAT_Table->ANTA_ON=TRUE; + pDM_SWAT_Table->ANTB_ON=TRUE; + RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna \n")); } - } else { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); - pDM_SWAT_Table->ANTA_ON = true; /* Set Antenna A on as default */ - pDM_SWAT_Table->ANTB_ON = false; /* Set Antenna B off as default */ - bResult = false; + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n")); + pDM_SWAT_Table->ANTA_ON=TRUE; // Set Antenna A on as default + pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default + bResult = FALSE; } } return bResult; + } + +#endif // end odm_CE + +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) /* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */ -void odm_dtc(struct odm_dm_struct *pDM_Odm) +void odm_dtc(PDM_ODM_T pDM_Odm) { +#ifdef CONFIG_DM_RESP_TXAGC + #define DTC_BASE 35 /* RSSI higher than this value, start to decade TX power */ + #define DTC_DWN_BASE (DTC_BASE-5) /* RSSI lower than this value, start to increase TX power */ + + /* RSSI vs TX power step mapping: decade TX power */ + static const u8 dtc_table_down[]={ + DTC_BASE, + (DTC_BASE+5), + (DTC_BASE+10), + (DTC_BASE+15), + (DTC_BASE+20), + (DTC_BASE+25) + }; + + /* RSSI vs TX power step mapping: increase TX power */ + static const u8 dtc_table_up[]={ + DTC_DWN_BASE, + (DTC_DWN_BASE-5), + (DTC_DWN_BASE-10), + (DTC_DWN_BASE-15), + (DTC_DWN_BASE-15), + (DTC_DWN_BASE-20), + (DTC_DWN_BASE-20), + (DTC_DWN_BASE-25), + (DTC_DWN_BASE-25), + (DTC_DWN_BASE-30), + (DTC_DWN_BASE-35) + }; + + u8 i; + u8 dtc_steps=0; + u8 sign; + u8 resp_txagc=0; + + #if 0 + /* As DIG is disabled, DTC is also disable */ + if(!(pDM_Odm->SupportAbility & ODM_XXXXXX)) + return; + #endif + + if (DTC_BASE < pDM_Odm->RSSI_Min) { + /* need to decade the CTS TX power */ + sign = 1; + for (i=0;i= pDM_Odm->RSSI_Min) || (dtc_steps >= 6)) + break; + else + dtc_steps++; + } + } +#if 0 + else if (DTC_DWN_BASE > pDM_Odm->RSSI_Min) + { + /* needs to increase the CTS TX power */ + sign = 0; + dtc_steps = 1; + for (i=0;iRSSI_Min) || (dtc_steps>=10)) + break; + else + dtc_steps++; + } + } +#endif + else + { + sign = 0; + dtc_steps = 0; + } + + resp_txagc = dtc_steps | (sign << 4); + resp_txagc = resp_txagc | (resp_txagc << 5); + ODM_Write1Byte(pDM_Odm, 0x06d9, resp_txagc); + + DBG_871X("%s RSSI_Min:%u, set RESP_TXAGC to %s %u\n", + __func__, pDM_Odm->RSSI_Min, sign?"minus":"plus", dtc_steps); +#endif /* CONFIG_RESP_TXAGC_ADJUST */ } + +#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */ + diff --git a/hal/OUTSRC/odm.h b/hal/odm.h similarity index 100% rename from hal/OUTSRC/odm.h rename to hal/odm.h diff --git a/hal/odm_HWConfig.c b/hal/odm_HWConfig.c old mode 100644 new mode 100755 index 4c6b6c2..a11a815 --- a/hal/odm_HWConfig.c +++ b/hal/odm_HWConfig.c @@ -1,601 +1,1198 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -/* include files */ - -#include "odm_precomp.h" - -#define READ_AND_CONFIG READ_AND_CONFIG_MP - -#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm)) -#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm)) - -static u8 odm_QueryRxPwrPercentage(s8 AntPower) -{ - if ((AntPower <= -100) || (AntPower >= 20)) - return 0; - else if (AntPower >= 0) - return 100; - else - return 100+AntPower; -} - -/* 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */ -/* IF other SW team do not support the feature, remove this section.?? */ -static s32 odm_sig_patch_lenove(struct odm_dm_struct *dm_odm, s32 CurrSig) -{ - return 0; -} - -static s32 odm_sig_patch_netcore(struct odm_dm_struct *dm_odm, s32 CurrSig) -{ - return 0; -} - -static s32 odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s32 CurrSig) -{ - s32 RetSig = 0; - - if ((dm_odm->SupportInterface == ODM_ITRF_USB) || - (dm_odm->SupportInterface == ODM_ITRF_SDIO)) { - if (CurrSig >= 51 && CurrSig <= 100) - RetSig = 100; - else if (CurrSig >= 41 && CurrSig <= 50) - RetSig = 80 + ((CurrSig - 40)*2); - else if (CurrSig >= 31 && CurrSig <= 40) - RetSig = 66 + (CurrSig - 30); - else if (CurrSig >= 21 && CurrSig <= 30) - RetSig = 54 + (CurrSig - 20); - else if (CurrSig >= 10 && CurrSig <= 20) - RetSig = 42 + (((CurrSig - 10) * 2) / 3); - else if (CurrSig >= 5 && CurrSig <= 9) - RetSig = 22 + (((CurrSig - 5) * 3) / 2); - else if (CurrSig >= 1 && CurrSig <= 4) - RetSig = 6 + (((CurrSig - 1) * 3) / 2); - else - RetSig = CurrSig; - } - return RetSig; -} - -static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig) -{ - if ((dm_odm->SupportPlatform == ODM_MP) && - (dm_odm->SupportInterface != ODM_ITRF_PCIE) && /* USB & SDIO */ - (dm_odm->PatchID == 10)) - return odm_sig_patch_netcore(dm_odm, CurrSig); - else if ((dm_odm->SupportPlatform == ODM_MP) && - (dm_odm->SupportInterface == ODM_ITRF_PCIE) && - (dm_odm->PatchID == 19)) - return odm_sig_patch_lenove(dm_odm, CurrSig); - else - return odm_SignalScaleMapping_92CSeries(dm_odm, CurrSig); -} - -/* pMgntInfo->CustomerID == RT_CID_819x_Lenovo */ -static u8 odm_SQ_process_patch_RT_CID_819x_Lenovo(struct odm_dm_struct *dm_odm, - u8 isCCKrate, u8 PWDB_ALL, u8 path, u8 RSSI) -{ - return 0; -} - -static u8 odm_EVMdbToPercentage(s8 Value) -{ - /* -33dB~0dB to 0%~99% */ - s8 ret_val; - - ret_val = Value; - - if (ret_val >= 0) - ret_val = 0; - if (ret_val <= -33) - ret_val = -33; - - ret_val = 0 - ret_val; - ret_val *= 3; - - if (ret_val == 99) - ret_val = 100; - return ret_val; -} - -static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm, - struct odm_phy_status_info *pPhyInfo, - u8 *pPhyStatus, - struct odm_per_pkt_info *pPktinfo, - struct adapter *adapt) -{ - struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table; - u8 i, Max_spatial_stream; - s8 rx_pwr[4], rx_pwr_all = 0; - u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT; - u8 RSSI, total_rssi = 0; - u8 isCCKrate = 0; - u8 rf_rx_num = 0; - u8 cck_highpwr = 0; - u8 LNA_idx, VGA_idx; - - struct phy_status_rpt *pPhyStaRpt = (struct phy_status_rpt *)pPhyStatus; - - isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false; - - pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1; - pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; - - if (isCCKrate) { - u8 report; - u8 cck_agc_rpt; - - dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++; - /* (1)Hardware does not provide RSSI for CCK */ - /* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */ - - cck_highpwr = dm_odm->bCckHighPower; - - cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ; - - /* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */ - /* The RSSI formula should be modified according to the gain table */ - /* In 88E, cck_highpwr is always set to 1 */ - if (dm_odm->SupportICType & (ODM_RTL8188E|ODM_RTL8812)) { - LNA_idx = ((cck_agc_rpt & 0xE0) >> 5); - VGA_idx = (cck_agc_rpt & 0x1F); - switch (LNA_idx) { - case 7: - if (VGA_idx <= 27) - rx_pwr_all = -100 + 2*(27-VGA_idx); /* VGA_idx = 27~2 */ - else - rx_pwr_all = -100; - break; - case 6: - rx_pwr_all = -48 + 2*(2-VGA_idx); /* VGA_idx = 2~0 */ - break; - case 5: - rx_pwr_all = -42 + 2*(7-VGA_idx); /* VGA_idx = 7~5 */ - break; - case 4: - rx_pwr_all = -36 + 2*(7-VGA_idx); /* VGA_idx = 7~4 */ - break; - case 3: - rx_pwr_all = -24 + 2*(7-VGA_idx); /* VGA_idx = 7~0 */ - break; - case 2: - if (cck_highpwr) - rx_pwr_all = -12 + 2*(5-VGA_idx); /* VGA_idx = 5~0 */ - else - rx_pwr_all = -6 + 2*(5-VGA_idx); - break; - case 1: - rx_pwr_all = 8-2*VGA_idx; - break; - case 0: - rx_pwr_all = 14-2*VGA_idx; - break; - default: - break; - } - rx_pwr_all += 6; - PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); - if (!cck_highpwr) { - if (PWDB_ALL >= 80) - PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80; - else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20)) - PWDB_ALL += 3; - if (PWDB_ALL > 100) - PWDB_ALL = 100; - } - } else { - if (!cck_highpwr) { - report = (cck_agc_rpt & 0xc0)>>6; - switch (report) { - /* 03312009 modified by cosa */ - /* Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion */ - /* Note: different RF with the different RNA gain. */ - case 0x3: - rx_pwr_all = -46 - (cck_agc_rpt & 0x3e); - break; - case 0x2: - rx_pwr_all = -26 - (cck_agc_rpt & 0x3e); - break; - case 0x1: - rx_pwr_all = -12 - (cck_agc_rpt & 0x3e); - break; - case 0x0: - rx_pwr_all = 16 - (cck_agc_rpt & 0x3e); - break; - } - } else { - report = (cck_agc_rpt & 0x60)>>5; - switch (report) { - case 0x3: - rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ; - break; - case 0x2: - rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1); - break; - case 0x1: - rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1); - break; - case 0x0: - rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1); - break; - } - } - - PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); - - /* Modification for ext-LNA board */ - if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) { - if ((cck_agc_rpt>>7) == 0) { - PWDB_ALL = (PWDB_ALL > 94) ? 100 : (PWDB_ALL+6); - } else { - if (PWDB_ALL > 38) - PWDB_ALL -= 16; - else - PWDB_ALL = (PWDB_ALL <= 16) ? (PWDB_ALL>>2) : (PWDB_ALL-12); - } - - /* CCK modification */ - if (PWDB_ALL > 25 && PWDB_ALL <= 60) - PWDB_ALL += 6; - } else {/* Modification for int-LNA board */ - if (PWDB_ALL > 99) - PWDB_ALL -= 8; - else if (PWDB_ALL > 50 && PWDB_ALL <= 68) - PWDB_ALL += 4; - } - } - - pPhyInfo->RxPWDBAll = PWDB_ALL; - pPhyInfo->BTRxRSSIPercentage = PWDB_ALL; - pPhyInfo->RecvSignalPower = rx_pwr_all; - /* (3) Get Signal Quality (EVM) */ - if (pPktinfo->bPacketMatchBSSID) { - u8 SQ, SQ_rpt; - - if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) { - SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, 0, 0); - } else if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) { - SQ = 100; - } else { - SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all; - - if (SQ_rpt > 64) - SQ = 0; - else if (SQ_rpt < 20) - SQ = 100; - else - SQ = ((64-SQ_rpt) * 100) / 44; - } - pPhyInfo->SignalQuality = SQ; - pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ; - pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; - } - } else { /* is OFDM rate */ - dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++; - - /* (1)Get RSSI for HT rate */ - - for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) { - /* 2008/01/30 MH we will judge RF RX path now. */ - if (dm_odm->RFPathRxEnable & BIT(i)) - rf_rx_num++; - - rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F)*2) - 110; - if (i == RF_PATH_A) - adapt->signal_strength = rx_pwr[i]; - - pPhyInfo->RxPwr[i] = rx_pwr[i]; - - /* Translate DBM to percentage. */ - RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); - total_rssi += RSSI; - - /* Modification for ext-LNA board */ - if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) { - if ((pPhyStaRpt->path_agc[i].trsw) == 1) - RSSI = (RSSI > 94) ? 100 : (RSSI + 6); - else - RSSI = (RSSI <= 16) ? (RSSI >> 3) : (RSSI - 16); - - if ((RSSI <= 34) && (RSSI >= 4)) - RSSI -= 4; - } - - pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI; - - /* Get Rx snr value in DB */ - pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2); - dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2); - - /* Record Signal Strength for next packet */ - if (pPktinfo->bPacketMatchBSSID) { - if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) { - if (i == ODM_RF_PATH_A) - pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, i, RSSI); - } - } - } - /* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */ - rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110; - - PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); - PWDB_ALL_BT = PWDB_ALL; - - pPhyInfo->RxPWDBAll = PWDB_ALL; - pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT; - pPhyInfo->RxPower = rx_pwr_all; - pPhyInfo->RecvSignalPower = rx_pwr_all; - - if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) { - /* do nothing */ - } else { - /* (3)EVM of HT rate */ - if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15) - Max_spatial_stream = 2; /* both spatial stream make sense */ - else - Max_spatial_stream = 1; /* only spatial stream 1 makes sense */ - - for (i = 0; i < Max_spatial_stream; i++) { - /* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */ - /* fill most significant bit to "zero" when doing shifting operation which may change a negative */ - /* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */ - EVM = odm_EVMdbToPercentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */ - - if (pPktinfo->bPacketMatchBSSID) { - if (i == ODM_RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */ - pPhyInfo->SignalQuality = (u8)(EVM & 0xff); - pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff); - } - } - } - } - /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */ - /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */ - if (isCCKrate) { - pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */ - } else { - if (rf_rx_num != 0) - pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, total_rssi /= rf_rx_num)); - } - - /* For 92C/92D HW (Hybrid) Antenna Diversity */ - pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel; - /* For 88E HW Antenna Diversity */ - dm_odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel; - dm_odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b; - dm_odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2; -} - -void odm_Init_RSSIForDM(struct odm_dm_struct *dm_odm) -{ -} - -static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm, - struct odm_phy_status_info *pPhyInfo, - struct odm_per_pkt_info *pPktinfo) -{ - s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK; - s32 UndecoratedSmoothedOFDM, RSSI_Ave; - u8 isCCKrate = 0; - u8 RSSI_max, RSSI_min, i; - u32 OFDM_pkt = 0; - u32 Weighting = 0; - struct sta_info *pEntry; - - if (pPktinfo->StationID == 0xFF) - return; - pEntry = dm_odm->pODM_StaInfo[pPktinfo->StationID]; - if (!IS_STA_VALID(pEntry)) - return; - if ((!pPktinfo->bPacketMatchBSSID)) - return; - - isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false; - - /* Smart Antenna Debug Message------------------ */ - if (dm_odm->SupportICType == ODM_RTL8188E) { - u8 antsel_tr_mux; - struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable; - - if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) { - if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) { - if (pPktinfo->bPacketToSelf) { - antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) | - (pDM_FatTable->antsel_rx_keep_1<<1) | - pDM_FatTable->antsel_rx_keep_0; - pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll; - pDM_FatTable->antRSSIcnt[antsel_tr_mux]++; - } - } - } else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) { - if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) { - antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) | - (pDM_FatTable->antsel_rx_keep_1<<1) | pDM_FatTable->antsel_rx_keep_0; - ODM_AntselStatistics_88E(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll); - } - } - } - /* Smart Antenna Debug Message------------------ */ - - UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK; - UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM; - UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; - - if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) { - if (!isCCKrate) { /* ofdm rate */ - if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0) { - RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; - } else { - if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]) { - RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; - RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; - } else { - RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; - RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; - } - if ((RSSI_max - RSSI_min) < 3) - RSSI_Ave = RSSI_max; - else if ((RSSI_max - RSSI_min) < 6) - RSSI_Ave = RSSI_max - 1; - else if ((RSSI_max - RSSI_min) < 10) - RSSI_Ave = RSSI_max - 2; - else - RSSI_Ave = RSSI_max - 3; - } - - /* 1 Process OFDM RSSI */ - if (UndecoratedSmoothedOFDM <= 0) { /* initialize */ - UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll; - } else { - if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM) { - UndecoratedSmoothedOFDM = - (((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + - (RSSI_Ave)) / (Rx_Smooth_Factor); - UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1; - } else { - UndecoratedSmoothedOFDM = - (((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + - (RSSI_Ave)) / (Rx_Smooth_Factor); - } - } - - pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0; - - } else { - RSSI_Ave = pPhyInfo->RxPWDBAll; - - /* 1 Process CCK RSSI */ - if (UndecoratedSmoothedCCK <= 0) { /* initialize */ - UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll; - } else { - if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedCCK) { - UndecoratedSmoothedCCK = - ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) + - pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor; - UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1; - } else { - UndecoratedSmoothedCCK = - ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) + - pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor; - } - } - pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1; - } - /* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */ - if (pEntry->rssi_stat.ValidBit >= 64) - pEntry->rssi_stat.ValidBit = 64; - else - pEntry->rssi_stat.ValidBit++; - - for (i = 0; i < pEntry->rssi_stat.ValidBit; i++) - OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i)&BIT0; - - if (pEntry->rssi_stat.ValidBit == 64) { - Weighting = ((OFDM_pkt<<4) > 64) ? 64 : (OFDM_pkt<<4); - UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6; - } else { - if (pEntry->rssi_stat.ValidBit != 0) - UndecoratedSmoothedPWDB = (OFDM_pkt * UndecoratedSmoothedOFDM + - (pEntry->rssi_stat.ValidBit-OFDM_pkt) * - UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit; - else - UndecoratedSmoothedPWDB = 0; - } - pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK; - pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM; - pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; - } -} - -/* Endianness before calling this API */ -static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm, - struct odm_phy_status_info *pPhyInfo, - u8 *pPhyStatus, - struct odm_per_pkt_info *pPktinfo, - struct adapter *adapt) -{ - odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus, - pPktinfo, adapt); - if (dm_odm->RSSI_test) { - /* Select the packets to do RSSI checking for antenna switching. */ - if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) - ODM_SwAntDivChkPerPktRssi(dm_odm, pPktinfo->StationID, pPhyInfo); - } else { - odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo); - } -} - -void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm, - struct odm_phy_status_info *pPhyInfo, - u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo, - struct adapter *adapt) -{ - ODM_PhyStatusQuery_92CSeries(dm_odm, pPhyInfo, pPhyStatus, pPktinfo, adapt); -} - -/* For future use. */ -void ODM_MacStatusQuery(struct odm_dm_struct *dm_odm, u8 *mac_stat, - u8 macid, bool pkt_match_bssid, - bool pkttoself, bool pkt_beacon) -{ - /* 2011/10/19 Driver team will handle in the future. */ -} - -enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm, - enum ODM_RF_RADIO_PATH content, - enum ODM_RF_RADIO_PATH rfpath) -{ - ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigRFWithHeaderFile\n")); - if (dm_odm->SupportICType == ODM_RTL8188E) { - if (rfpath == ODM_RF_PATH_A) - READ_AND_CONFIG(8188E, _RadioA_1T_); - ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_A:Rtl8188ERadioA_1TArray\n")); - ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_B:Rtl8188ERadioB_1TArray\n")); - } - - ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("ODM_ConfigRFWithHeaderFile: Radio No %x\n", rfpath)); - return HAL_STATUS_SUCCESS; -} - -enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *dm_odm, - enum odm_bb_config_type config_tp) -{ - if (dm_odm->SupportICType == ODM_RTL8188E) { - if (config_tp == CONFIG_BB_PHY_REG) { - READ_AND_CONFIG(8188E, _PHY_REG_1T_); - } else if (config_tp == CONFIG_BB_AGC_TAB) { - READ_AND_CONFIG(8188E, _AGC_TAB_1T_); - } else if (config_tp == CONFIG_BB_PHY_REG_PG) { - READ_AND_CONFIG(8188E, _PHY_REG_PG_); - ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, - (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8188EPHY_REG_PGArray\n")); - } - } - return HAL_STATUS_SUCCESS; -} - -enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *dm_odm) -{ - u8 result = HAL_STATUS_SUCCESS; - if (dm_odm->SupportICType == ODM_RTL8188E) - result = READ_AND_CONFIG(8188E, _MAC_REG_); - return result; -} +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +//============================================================ +// include files +//============================================================ + +#include "odm_precomp.h" + +#if (RTL8188E_FOR_TEST_CHIP > 1) + #define READ_AND_CONFIG(ic, txt) do {\ + if (pDM_Odm->bIsMPChip)\ + READ_AND_CONFIG_MP(ic,txt);\ + else\ + READ_AND_CONFIG_TC(ic,txt);\ + } while(0) +#elif (RTL8188E_FOR_TEST_CHIP == 1) + #define READ_AND_CONFIG READ_AND_CONFIG_TC +#else + #define READ_AND_CONFIG READ_AND_CONFIG_MP +#endif + +#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(pDM_Odm)) +#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(pDM_Odm)) + +u1Byte +odm_QueryRxPwrPercentage( + IN s1Byte AntPower + ) +{ + if ((AntPower <= -100) || (AntPower >= 20)) + { + return 0; + } + else if (AntPower >= 0) + { + return 100; + } + else + { + return (100+AntPower); + } + +} + +#if (DM_ODM_SUPPORT_TYPE != ODM_MP) +// +// 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. +// IF other SW team do not support the feature, remove this section.?? +// +s4Byte +odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo( + IN OUT PDM_ODM_T pDM_Odm, + s4Byte CurrSig +) +{ + s4Byte RetSig; +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + //if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) + { + // Step 1. Scale mapping. + // 20100611 Joseph: Re-tunning RSSI presentation for Lenovo. + // 20100426 Joseph: Modify Signal strength mapping. + // This modification makes the RSSI indication similar to Intel solution. + // 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE. + if(CurrSig >= 54 && CurrSig <= 100) + { + RetSig = 100; + } + else if(CurrSig>=42 && CurrSig <= 53 ) + { + RetSig = 95; + } + else if(CurrSig>=36 && CurrSig <= 41 ) + { + RetSig = 74 + ((CurrSig - 36) *20)/6; + } + else if(CurrSig>=33 && CurrSig <= 35 ) + { + RetSig = 65 + ((CurrSig - 33) *8)/2; + } + else if(CurrSig>=18 && CurrSig <= 32 ) + { + RetSig = 62 + ((CurrSig - 18) *2)/15; + } + else if(CurrSig>=15 && CurrSig <= 17 ) + { + RetSig = 33 + ((CurrSig - 15) *28)/2; + } + else if(CurrSig>=10 && CurrSig <= 14 ) + { + RetSig = 39; + } + else if(CurrSig>=8 && CurrSig <= 9 ) + { + RetSig = 33; + } + else if(CurrSig <= 8 ) + { + RetSig = 19; + } + } +#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_MP) + return RetSig; +} + +s4Byte +odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore( + IN OUT PDM_ODM_T pDM_Odm, + s4Byte CurrSig +) +{ + s4Byte RetSig; +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + //if(pDM_Odm->SupportInterface == ODM_ITRF_USB) + { + // Netcore request this modification because 2009.04.13 SU driver use it. + if(CurrSig >= 31 && CurrSig <= 100) + { + RetSig = 100; + } + else if(CurrSig >= 21 && CurrSig <= 30) + { + RetSig = 90 + ((CurrSig - 20) / 1); + } + else if(CurrSig >= 11 && CurrSig <= 20) + { + RetSig = 80 + ((CurrSig - 10) / 1); + } + else if(CurrSig >= 7 && CurrSig <= 10) + { + RetSig = 69 + (CurrSig - 7); + } + else if(CurrSig == 6) + { + RetSig = 54; + } + else if(CurrSig == 5) + { + RetSig = 45; + } + else if(CurrSig == 4) + { + RetSig = 36; + } + else if(CurrSig == 3) + { + RetSig = 27; + } + else if(CurrSig == 2) + { + RetSig = 18; + } + else if(CurrSig == 1) + { + RetSig = 9; + } + else + { + RetSig = CurrSig; + } + } +#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_MP) + return RetSig; +} + + +s4Byte +odm_SignalScaleMapping_92CSeries( + IN OUT PDM_ODM_T pDM_Odm, + IN s4Byte CurrSig +) +{ + s4Byte RetSig; +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) + if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) + { + // Step 1. Scale mapping. + if(CurrSig >= 61 && CurrSig <= 100) + { + RetSig = 90 + ((CurrSig - 60) / 4); + } + else if(CurrSig >= 41 && CurrSig <= 60) + { + RetSig = 78 + ((CurrSig - 40) / 2); + } + else if(CurrSig >= 31 && CurrSig <= 40) + { + RetSig = 66 + (CurrSig - 30); + } + else if(CurrSig >= 21 && CurrSig <= 30) + { + RetSig = 54 + (CurrSig - 20); + } + else if(CurrSig >= 5 && CurrSig <= 20) + { + RetSig = 42 + (((CurrSig - 5) * 2) / 3); + } + else if(CurrSig == 4) + { + RetSig = 36; + } + else if(CurrSig == 3) + { + RetSig = 27; + } + else if(CurrSig == 2) + { + RetSig = 18; + } + else if(CurrSig == 1) + { + RetSig = 9; + } + else + { + RetSig = CurrSig; + } + } +#endif + +#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE)) + if((pDM_Odm->SupportInterface == ODM_ITRF_USB) || (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) ) + { + if(CurrSig >= 51 && CurrSig <= 100) + { + RetSig = 100; + } + else if(CurrSig >= 41 && CurrSig <= 50) + { + RetSig = 80 + ((CurrSig - 40)*2); + } + else if(CurrSig >= 31 && CurrSig <= 40) + { + RetSig = 66 + (CurrSig - 30); + } + else if(CurrSig >= 21 && CurrSig <= 30) + { + RetSig = 54 + (CurrSig - 20); + } + else if(CurrSig >= 10 && CurrSig <= 20) + { + RetSig = 42 + (((CurrSig - 10) * 2) / 3); + } + else if(CurrSig >= 5 && CurrSig <= 9) + { + RetSig = 22 + (((CurrSig - 5) * 3) / 2); + } + else if(CurrSig >= 1 && CurrSig <= 4) + { + RetSig = 6 + (((CurrSig - 1) * 3) / 2); + } + else + { + RetSig = CurrSig; + } + } +#endif + return RetSig; +} +s4Byte +odm_SignalScaleMapping( + IN OUT PDM_ODM_T pDM_Odm, + IN s4Byte CurrSig +) +{ + if( (pDM_Odm->SupportPlatform == ODM_MP) && + (pDM_Odm->SupportInterface != ODM_ITRF_PCIE) && //USB & SDIO + (pDM_Odm->PatchID==10))//pMgntInfo->CustomerID == RT_CID_819x_Netcore + { + return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(pDM_Odm,CurrSig); + } + else if( (pDM_Odm->SupportPlatform == ODM_MP) && + (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) && + (pDM_Odm->PatchID==19))//pMgntInfo->CustomerID == RT_CID_819x_Lenovo) + { + return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(pDM_Odm, CurrSig); + } + else{ + return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig); + } + +} +#endif + +//pMgntInfo->CustomerID == RT_CID_819x_Lenovo +static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo( + IN PDM_ODM_T pDM_Odm, + IN u1Byte isCCKrate, + IN u1Byte PWDB_ALL, + IN u1Byte path, + IN u1Byte RSSI +) +{ + u1Byte SQ; +#if (DM_ODM_SUPPORT_TYPE & ODM_MP) + // mapping to 5 bars for vista signal strength + // signal quality in driver will be displayed to signal strength + if(isCCKrate){ + // in vista. + if(PWDB_ALL >= 50) + SQ = 100; + else if(PWDB_ALL >= 35 && PWDB_ALL < 50) + SQ = 80; + else if(PWDB_ALL >= 22 && PWDB_ALL < 35) + SQ = 60; + else if(PWDB_ALL >= 18 && PWDB_ALL < 22) + SQ = 40; + else + SQ = 20; + } + else{//OFDM rate + + // mapping to 5 bars for vista signal strength + // signal quality in driver will be displayed to signal strength + // in vista. + if(RSSI >= 50) + SQ = 100; + else if(RSSI >= 35 && RSSI < 50) + SQ = 80; + else if(RSSI >= 22 && RSSI < 35) + SQ = 60; + else if(RSSI >= 18 && RSSI < 22) + SQ = 40; + else + SQ = 20; + } +#endif + return SQ; +} + +static u1Byte +odm_EVMdbToPercentage( + IN s1Byte Value + ) +{ + // + // -33dB~0dB to 0%~99% + // + s1Byte ret_val; + + ret_val = Value; + //ret_val /= 2; + + //ODM_RTPRINT(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x \n", ret_val, ret_val)); + + if(ret_val >= 0) + ret_val = 0; + if(ret_val <= -33) + ret_val = -33; + + ret_val = 0 - ret_val; + ret_val*=3; + + if(ret_val == 99) + ret_val = 100; + + return(ret_val); +} + + + +VOID +odm_RxPhyStatus92CSeries_Parsing( + IN OUT PDM_ODM_T pDM_Odm, + OUT PODM_PHY_INFO_T pPhyInfo, + IN pu1Byte pPhyStatus, + IN PODM_PACKET_INFO_T pPktinfo + ) +{ + SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + u1Byte i, Max_spatial_stream; + s1Byte rx_pwr[4], rx_pwr_all=0; + u1Byte EVM, PWDB_ALL = 0, PWDB_ALL_BT; + u1Byte RSSI, total_rssi=0; + u1Byte isCCKrate=0; + u1Byte rf_rx_num = 0; + u1Byte cck_highpwr = 0; + u1Byte LNA_idx, VGA_idx; + + PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus; + + isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M ) && (pPktinfo->Rate <= DESC92C_RATE11M ))?TRUE :FALSE; + + pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1; + pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; + + + if(isCCKrate) + { + u1Byte report; + u1Byte cck_agc_rpt; + + pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++; + // + // (1)Hardware does not provide RSSI for CCK + // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) + // + + //if(pHalData->eRFPowerState == eRfOn) + cck_highpwr = pDM_Odm->bCckHighPower; + //else + // cck_highpwr = FALSE; + + cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ; + + //2011.11.28 LukeLee: 88E use different LNA & VGA gain table + //The RSSI formula should be modified according to the gain table + //In 88E, cck_highpwr is always set to 1 + if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8812)) + { + LNA_idx = ((cck_agc_rpt & 0xE0) >>5); + VGA_idx = (cck_agc_rpt & 0x1F); + switch(LNA_idx) + { + case 7: + if(VGA_idx <= 27) + rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2 + else + rx_pwr_all = -100; + break; + case 6: + rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0 + break; + case 5: + rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5 + break; + case 4: + rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4 + break; + case 3: + //rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0 + rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0 + break; + case 2: + if(cck_highpwr) + rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0 + else + rx_pwr_all = -6+ 2*(5-VGA_idx); + break; + case 1: + rx_pwr_all = 8-2*VGA_idx; + break; + case 0: + rx_pwr_all = 14-2*VGA_idx; + break; + default: + //DbgPrint("CCK Exception default\n"); + break; + } + rx_pwr_all += 6; + PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); + if(cck_highpwr == FALSE) + { + if(PWDB_ALL >= 80) + PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80; + else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20)) + PWDB_ALL += 3; + if(PWDB_ALL>100) + PWDB_ALL = 100; + } + } + else + { + if(!cck_highpwr) + { + report =( cck_agc_rpt & 0xc0 )>>6; + switch(report) + { + // 03312009 modified by cosa + // Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion + // Note: different RF with the different RNA gain. + case 0x3: + rx_pwr_all = -46 - (cck_agc_rpt & 0x3e); + break; + case 0x2: + rx_pwr_all = -26 - (cck_agc_rpt & 0x3e); + break; + case 0x1: + rx_pwr_all = -12 - (cck_agc_rpt & 0x3e); + break; + case 0x0: + rx_pwr_all = 16 - (cck_agc_rpt & 0x3e); + break; + } + } + else + { + //report = pDrvInfo->cfosho[0] & 0x60; + //report = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a& 0x60; + + report = (cck_agc_rpt & 0x60)>>5; + switch(report) + { + case 0x3: + rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ; + break; + case 0x2: + rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1); + break; + case 0x1: + rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1) ; + break; + case 0x0: + rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1) ; + break; + } + } + + PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); + + //Modification for ext-LNA board + if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) + { + if((cck_agc_rpt>>7) == 0){ + PWDB_ALL = (PWDB_ALL>94)?100:(PWDB_ALL +6); + } + else + { + if(PWDB_ALL > 38) + PWDB_ALL -= 16; + else + PWDB_ALL = (PWDB_ALL<=16)?(PWDB_ALL>>2):(PWDB_ALL -12); + } + + //CCK modification + if(PWDB_ALL > 25 && PWDB_ALL <= 60) + PWDB_ALL += 6; + //else if (PWDB_ALL <= 25) + // PWDB_ALL += 8; + } + else//Modification for int-LNA board + { + if(PWDB_ALL > 99) + PWDB_ALL -= 8; + else if(PWDB_ALL > 50 && PWDB_ALL <= 68) + PWDB_ALL += 4; + } + } + + pPhyInfo->RxPWDBAll = PWDB_ALL; +#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) + pPhyInfo->BTRxRSSIPercentage = PWDB_ALL; + pPhyInfo->RecvSignalPower = rx_pwr_all; +#endif + // + // (3) Get Signal Quality (EVM) + // + if(pPktinfo->bPacketMatchBSSID) + { + u1Byte SQ,SQ_rpt; + + if((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)){//pMgntInfo->CustomerID == RT_CID_819x_Lenovo + SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0); + } + else if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){ + SQ = 100; + } + else{ + SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all; + + if(SQ_rpt > 64) + SQ = 0; + else if (SQ_rpt < 20) + SQ = 100; + else + SQ = ((64-SQ_rpt) * 100) / 44; + + } + + //DbgPrint("cck SQ = %d\n", SQ); + pPhyInfo->SignalQuality = SQ; + pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ; + pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1; + } + } + else //is OFDM rate + { + pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++; + + // + // (1)Get RSSI for HT rate + // + + for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) + { + // 2008/01/30 MH we will judge RF RX path now. + if (pDM_Odm->RFPathRxEnable & BIT(i)) + rf_rx_num++; + //else + //continue; + + rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110; + + #if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) + pPhyInfo->RxPwr[i] = rx_pwr[i]; + #endif + + /* Translate DBM to percentage. */ + RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]); + total_rssi += RSSI; + //RTPRINT(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI)); + + //Modification for ext-LNA board + if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) + { + if((pPhyStaRpt->path_agc[i].trsw) == 1) + RSSI = (RSSI>94)?100:(RSSI +6); + else + RSSI = (RSSI<=16)?(RSSI>>3):(RSSI -16); + + if((RSSI <= 34) && (RSSI >=4)) + RSSI -= 4; + } + + pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI; + + #if (DM_ODM_SUPPORT_TYPE & (/*ODM_MP|*/ODM_CE|ODM_AP|ODM_ADSL)) + //Get Rx snr value in DB + pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2); + #endif + + /* Record Signal Strength for next packet */ + if(pPktinfo->bPacketMatchBSSID) + { + if((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)) + { + if(i==ODM_RF_PATH_A) + pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI); + + } + + } + } + + + // + // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) + // + rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1 )& 0x7f) -110; + //RTPRINT(FRX, RX_PHY_SS, ("PWDB_ALL=%d\n", PWDB_ALL)); + + PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all); + //RTPRINT(FRX, RX_PHY_SS, ("PWDB_ALL=%d\n",PWDB_ALL)); + + pPhyInfo->RxPWDBAll = PWDB_ALL; + //ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll)); + #if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) + pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT; + pPhyInfo->RxPower = rx_pwr_all; + pPhyInfo->RecvSignalPower = rx_pwr_all; + #endif + + if((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)){ + //do nothing + } + else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo + // + // (3)EVM of HT rate + // + if(pPktinfo->Rate >=DESC92C_RATEMCS8 && pPktinfo->Rate <=DESC92C_RATEMCS15) + Max_spatial_stream = 2; //both spatial stream make sense + else + Max_spatial_stream = 1; //only spatial stream 1 makes sense + + for(i=0; i>= 1" because the compilor of free build environment + // fill most significant bit to "zero" when doing shifting operation which may change a negative + // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. + EVM = odm_EVMdbToPercentage( (pPhyStaRpt->stream_rxevm[i] )); //dbm + + //RTPRINT(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n", + //GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM)); + + if(pPktinfo->bPacketMatchBSSID) + { + if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only + { + pPhyInfo->SignalQuality = (u1Byte)(EVM & 0xff); + } + pPhyInfo->RxMIMOSignalQuality[i] = (u1Byte)(EVM & 0xff); + } + } + } + + } +#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) + //UI BSS List signal strength(in percentage), make it good looking, from 0~100. + //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). + if(isCCKrate) + { +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ + pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));//PWDB_ALL; +#else + pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));//PWDB_ALL; +#endif + } + else + { + if (rf_rx_num != 0) + { +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ + pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));//PWDB_ALL; +#else + pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num)); +#endif + } + } +#endif + + //For 92C/92D HW (Hybrid) Antenna Diversity +#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) + pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel; + //For 88E HW Antenna Diversity + pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel; + pDM_Odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b; + pDM_Odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2; +#endif +} + +VOID +odm_Init_RSSIForDM( + IN OUT PDM_ODM_T pDM_Odm + ) +{ + +} + +VOID +odm_Process_RSSIForDM( + IN OUT PDM_ODM_T pDM_Odm, + IN PODM_PHY_INFO_T pPhyInfo, + IN PODM_PACKET_INFO_T pPktinfo + ) +{ + + s4Byte UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave; + u1Byte isCCKrate=0; + u1Byte RSSI_max, RSSI_min, i; + u4Byte OFDM_pkt=0; + u4Byte Weighting=0; + + PSTA_INFO_T pEntry; + + if(pPktinfo->StationID == 0xFF) + return; + + // 2011/11/17 MH Need to debug + //if (pDM_Odm->SupportPlatform == ODM_MP) + { + + } + + pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID]; + if(!IS_STA_VALID(pEntry) ){ + return; + } + if((!pPktinfo->bPacketMatchBSSID) ) + { + return; + } + + isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M ) && (pPktinfo->Rate <= DESC92C_RATE11M ))?TRUE :FALSE; + if(pPktinfo->bPacketBeacon) + pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++; + + pDM_Odm->RxRate = pPktinfo->Rate; +#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) +#if ((RTL8192C_SUPPORT == 1) ||(RTL8192D_SUPPORT == 1)) + if(pDM_Odm->SupportICType & ODM_RTL8192C|ODM_RTL8192D) + { + if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) + { + //if(pPktinfo->bPacketBeacon) + //{ + // DbgPrint("This is beacon, isCCKrate=%d\n", isCCKrate); + //} + ODM_AntselStatistics_88C(pDM_Odm, pPktinfo->StationID, pPhyInfo->RxPWDBAll, isCCKrate); + } + } +#endif + //-----------------Smart Antenna Debug Message------------------// +#if (RTL8188E_SUPPORT == 1) + if(pDM_Odm->SupportICType == ODM_RTL8188E) + { + u1Byte antsel_tr_mux; + pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; + + if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) + { + if(pDM_FatTable->FAT_State == FAT_TRAINING_STATE) + { + if(pPktinfo->bPacketToSelf) //(pPktinfo->bPacketMatchBSSID && (!pPktinfo->bPacketBeacon)) + { + antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |(pDM_FatTable->antsel_rx_keep_1 <<1) |pDM_FatTable->antsel_rx_keep_0; + pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll; + pDM_FatTable->antRSSIcnt[antsel_tr_mux]++; + //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("isCCKrate=%d, PWDB_ALL=%d\n",isCCKrate, pPhyInfo->RxPWDBAll)); + //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=3'b%d%d%d\n", + //pDM_FatTable->antsel_rx_keep_2, pDM_FatTable->antsel_rx_keep_1, pDM_FatTable->antsel_rx_keep_0)); + + } + } + } + else if((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)) + { + if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) + { + antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |(pDM_FatTable->antsel_rx_keep_1 <<1) |pDM_FatTable->antsel_rx_keep_0; + //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=3'b%d%d%d\n", + // pDM_FatTable->antsel_rx_keep_2, pDM_FatTable->antsel_rx_keep_1, pDM_FatTable->antsel_rx_keep_0)); + + ODM_AntselStatistics_88E(pDM_Odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll); + } + } + + } +#endif +#endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) + //-----------------Smart Antenna Debug Message------------------// + + UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK; + UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM; + UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; + + if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) + { + + if(!isCCKrate)//ofdm rate + { + if(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0){ + RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; + pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; + pDM_Odm->RSSI_B = 0; + } + else + { + //DbgPrint("pRfd->Status.RxMIMOSignalStrength[0] = %d, pRfd->Status.RxMIMOSignalStrength[1] = %d \n", + //pRfd->Status.RxMIMOSignalStrength[0], pRfd->Status.RxMIMOSignalStrength[1]); + pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; + pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; + + if(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]) + { + RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; + RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; + } + else + { + RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]; + RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A]; + } + if((RSSI_max -RSSI_min) < 3) + RSSI_Ave = RSSI_max; + else if((RSSI_max -RSSI_min) < 6) + RSSI_Ave = RSSI_max - 1; + else if((RSSI_max -RSSI_min) < 10) + RSSI_Ave = RSSI_max - 2; + else + RSSI_Ave = RSSI_max - 3; + } + + //1 Process OFDM RSSI + if(UndecoratedSmoothedOFDM <= 0) // initialize + { + UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll; + } + else + { + if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedOFDM) + { + UndecoratedSmoothedOFDM = + ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + + (RSSI_Ave)) /(Rx_Smooth_Factor); + UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1; + } + else + { + UndecoratedSmoothedOFDM = + ( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) + + (RSSI_Ave)) /(Rx_Smooth_Factor); + } + } + + pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0; + + } + else + { + RSSI_Ave = pPhyInfo->RxPWDBAll; + pDM_Odm->RSSI_A = (u1Byte) pPhyInfo->RxPWDBAll; + pDM_Odm->RSSI_B = 0xFF; + + //1 Process CCK RSSI + if(UndecoratedSmoothedCCK <= 0) // initialize + { + UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll; + } + else + { + if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedCCK) + { + UndecoratedSmoothedCCK = + ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + + (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor); + UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1; + } + else + { + UndecoratedSmoothedCCK = + ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + + (pPhyInfo->RxPWDBAll)) /(Rx_Smooth_Factor); + } + } + pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1; + } + + //if(pEntry) + { + //2011.07.28 LukeLee: modified to prevent unstable CCK RSSI + if(pEntry->rssi_stat.ValidBit >= 64) + pEntry->rssi_stat.ValidBit = 64; + else + pEntry->rssi_stat.ValidBit++; + + for(i=0; irssi_stat.ValidBit; i++) + OFDM_pkt += (u1Byte)(pEntry->rssi_stat.PacketMap>>i)&BIT0; + + if(pEntry->rssi_stat.ValidBit == 64) + { + Weighting = ((OFDM_pkt<<4) > 64)?64:(OFDM_pkt<<4); + UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6; + } + else + { + if(pEntry->rssi_stat.ValidBit != 0) + UndecoratedSmoothedPWDB = (OFDM_pkt*UndecoratedSmoothedOFDM+(pEntry->rssi_stat.ValidBit-OFDM_pkt)*UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit; + else + UndecoratedSmoothedPWDB = 0; + } + + pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK; + pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM; + pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; + + //DbgPrint("OFDM_pkt=%d, Weighting=%d\n", OFDM_pkt, Weighting); + //DbgPrint("UndecoratedSmoothedOFDM=%d, UndecoratedSmoothedPWDB=%d, UndecoratedSmoothedCCK=%d\n", + // UndecoratedSmoothedOFDM, UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK); + + } + + } +} + +// +// Endianness before calling this API +// +VOID +ODM_PhyStatusQuery_92CSeries( + IN OUT PDM_ODM_T pDM_Odm, + OUT PODM_PHY_INFO_T pPhyInfo, + IN pu1Byte pPhyStatus, + IN PODM_PACKET_INFO_T pPktinfo + ) +{ + + odm_RxPhyStatus92CSeries_Parsing( + pDM_Odm, + pPhyInfo, + pPhyStatus, + pPktinfo); + + if( pDM_Odm->RSSI_test == TRUE) + { + // Select the packets to do RSSI checking for antenna switching. + if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon ) + { + /* + #if 0//(DM_ODM_SUPPORT_TYPE == ODM_MP) + dm_SWAW_RSSI_Check( + Adapter, + (tmppAdapter!=NULL)?(tmppAdapter==Adapter):TRUE, + bPacketMatchBSSID, + pEntry, + pRfd); + #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + // Select the packets to do RSSI checking for antenna switching. + //odm_SwAntDivRSSICheck8192C(padapter, precvframe->u.hdr.attrib.RxPWDBAll); + #endif + */ + ODM_SwAntDivChkPerPktRssi(pDM_Odm,pPktinfo->StationID,pPhyInfo); + } + } + else + { + odm_Process_RSSIForDM(pDM_Odm,pPhyInfo,pPktinfo); + } + +} + + + +// +// Endianness before calling this API +// +VOID +ODM_PhyStatusQuery_JaguarSeries( + IN OUT PDM_ODM_T pDM_Odm, + OUT PODM_PHY_INFO_T pPhyInfo, + IN pu1Byte pPhyStatus, + IN PODM_PACKET_INFO_T pPktinfo + ) +{ + + +} + +VOID +ODM_PhyStatusQuery( + IN OUT PDM_ODM_T pDM_Odm, + OUT PODM_PHY_INFO_T pPhyInfo, + IN pu1Byte pPhyStatus, + IN PODM_PACKET_INFO_T pPktinfo + ) +{ +#if 0 // How to jaguar jugar series?? + if(pDM_Odm->SupportICType >= ODM_RTL8195 ) + { + ODM_PhyStatusQuery_JaguarSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo); + } + else +#endif + { + ODM_PhyStatusQuery_92CSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo); + } +} + +// For future use. +VOID +ODM_MacStatusQuery( + IN OUT PDM_ODM_T pDM_Odm, + IN pu1Byte pMacStatus, + IN u1Byte MacID, + IN BOOLEAN bPacketMatchBSSID, + IN BOOLEAN bPacketToSelf, + IN BOOLEAN bPacketBeacon + ) +{ + // 2011/10/19 Driver team will handle in the future. + +} + +#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE|ODM_AP)) + +HAL_STATUS +ODM_ConfigRFWithHeaderFile( + IN PDM_ODM_T pDM_Odm, + IN ODM_RF_RADIO_PATH_E Content, + IN ODM_RF_RADIO_PATH_E eRFPath + ) +{ + //RT_STATUS rtStatus = RT_STATUS_SUCCESS; + + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigRFWithHeaderFile\n")); +#if (RTL8723A_SUPPORT == 1) + if (pDM_Odm->SupportICType == ODM_RTL8723A) + { + if(eRFPath == ODM_RF_PATH_A) + READ_AND_CONFIG_MP(8723A,_RadioA_1T_); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_A:Rtl8723RadioA_1TArray\n")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_B:Rtl8723RadioB_1TArray\n")); + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("ODM_ConfigRFWithHeaderFile: Radio No %x\n", eRFPath)); + //rtStatus = RT_STATUS_SUCCESS; +#endif +#if (RTL8188E_SUPPORT == 1) + if (pDM_Odm->SupportICType == ODM_RTL8188E) + { + if(IS_VENDOR_8188E_I_CUT_SERIES(pDM_Odm->Adapter)) + READ_AND_CONFIG(8188E,_RadioA_1T_ICUT_); + else + READ_AND_CONFIG(8188E,_RadioA_1T_); + + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_A:Rtl8188ERadioA_1TArray\n")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_B:Rtl8188ERadioB_1TArray\n")); + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("ODM_ConfigRFWithHeaderFile: Radio No %x\n", eRFPath)); + //rtStatus = RT_STATUS_SUCCESS; +#endif + return HAL_STATUS_SUCCESS; +} + + +HAL_STATUS +ODM_ConfigBBWithHeaderFile( + IN PDM_ODM_T pDM_Odm, + IN ODM_BB_Config_Type ConfigType + ) +{ +#if (RTL8723A_SUPPORT == 1) + if(pDM_Odm->SupportICType == ODM_RTL8723A) + { + + if(ConfigType == CONFIG_BB_PHY_REG) + { + READ_AND_CONFIG_MP(8723A,_PHY_REG_1T_); + } + else if(ConfigType == CONFIG_BB_AGC_TAB) + { + READ_AND_CONFIG_MP(8723A,_AGC_TAB_1T_); + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8723AGCTAB_1TArray\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8723PHY_REG_1TArray\n")); + } +#endif + +#if (RTL8188E_SUPPORT == 1) + if(pDM_Odm->SupportICType == ODM_RTL8188E) + { + + if(ConfigType == CONFIG_BB_PHY_REG) + { + if(IS_VENDOR_8188E_I_CUT_SERIES(pDM_Odm->Adapter)) + READ_AND_CONFIG(8188E,_PHY_REG_1T_ICUT_); + else + READ_AND_CONFIG(8188E,_PHY_REG_1T_); + } + else if(ConfigType == CONFIG_BB_AGC_TAB) + { + if(IS_VENDOR_8188E_I_CUT_SERIES(pDM_Odm->Adapter)) + READ_AND_CONFIG(8188E,_AGC_TAB_1T_ICUT_); + else + READ_AND_CONFIG(8188E,_AGC_TAB_1T_); + } + else if(ConfigType == CONFIG_BB_PHY_REG_PG) + { + READ_AND_CONFIG(8188E,_PHY_REG_PG_); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8188EPHY_REG_PGArray\n")); + } + } +#endif + + return HAL_STATUS_SUCCESS; +} + +HAL_STATUS +ODM_ConfigMACWithHeaderFile( + IN PDM_ODM_T pDM_Odm + ) +{ + u1Byte result = HAL_STATUS_SUCCESS; +#if (RTL8723A_SUPPORT == 1) + if (pDM_Odm->SupportICType == ODM_RTL8723A) + { + READ_AND_CONFIG_MP(8723A,_MAC_REG_); + } +#endif +#if (RTL8188E_SUPPORT == 1) + if (pDM_Odm->SupportICType == ODM_RTL8188E) + { + if(IS_VENDOR_8188E_I_CUT_SERIES(pDM_Odm->Adapter)) + READ_AND_CONFIG(8188E,_MAC_REG_ICUT_); + else + result =READ_AND_CONFIG(8188E,_MAC_REG_); + } +#endif + + return result; +} + + +#endif // end of (#if DM_ODM_SUPPORT_TYPE) + diff --git a/hal/OUTSRC/odm_HWConfig.h b/hal/odm_HWConfig.h similarity index 100% rename from hal/OUTSRC/odm_HWConfig.h rename to hal/odm_HWConfig.h diff --git a/hal/odm_RTL8188E.c b/hal/odm_RTL8188E.c old mode 100644 new mode 100755 index 58410f3..f379c13 --- a/hal/odm_RTL8188E.c +++ b/hal/odm_RTL8188E.c @@ -1,399 +1,1290 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -#include "odm_precomp.h" - -void ODM_DIG_LowerBound_88E(struct odm_dm_struct *dm_odm) -{ - struct rtw_dig *pDM_DigTable = &dm_odm->DM_DigTable; - - if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) { - pDM_DigTable->rx_gain_range_min = (u8) pDM_DigTable->AntDiv_RSSI_max; - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_DIG_LowerBound_88E(): pDM_DigTable->AntDiv_RSSI_max=%d\n", pDM_DigTable->AntDiv_RSSI_max)); - } - /* If only one Entry connected */ -} - -static void odm_RX_HWAntDivInit(struct odm_dm_struct *dm_odm) -{ - u32 value32; - - if (*(dm_odm->mp_mode) == 1) { - dm_odm->AntDivType = CGCS_RX_SW_ANTDIV; - ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 0); /* disable HW AntDiv */ - ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT31, 1); /* 1:CG, 0:CS */ - return; - } - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_RX_HWAntDivInit()\n")); - - /* MAC Setting */ - value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); - ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ - /* Pin Settings */ - ODM_SetBBReg(dm_odm, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */ - ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0); /* Reg864[10]=1'b0 antsel2 by HW */ - ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT22, 1); /* Regb2c[22]=1'b0 disable CS/CG switch */ - ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT31, 1); /* Regb2c[31]=1'b1 output at CG only */ - /* OFDM Settings */ - ODM_SetBBReg(dm_odm, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0); - /* CCK Settings */ - ODM_SetBBReg(dm_odm, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1); /* Fix CCK PHY status report issue */ - ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1); /* CCK complete HW AntDiv within 64 samples */ - ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT); - ODM_SetBBReg(dm_odm, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0201); /* antenna mapping table */ -} - -static void odm_TRX_HWAntDivInit(struct odm_dm_struct *dm_odm) -{ - u32 value32; - - if (*(dm_odm->mp_mode) == 1) { - dm_odm->AntDivType = CGCS_RX_SW_ANTDIV; - ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 0); /* disable HW AntDiv */ - ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT5|BIT4|BIT3, 0); /* Default RX (0/1) */ - return; - } - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_TRX_HWAntDivInit()\n")); - - /* MAC Setting */ - value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); - ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ - /* Pin Settings */ - ODM_SetBBReg(dm_odm, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */ - ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0); /* Reg864[10]=1'b0 antsel2 by HW */ - ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT22, 0); /* Regb2c[22]=1'b0 disable CS/CG switch */ - ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT31, 1); /* Regb2c[31]=1'b1 output at CG only */ - /* OFDM Settings */ - ODM_SetBBReg(dm_odm, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0); - /* CCK Settings */ - ODM_SetBBReg(dm_odm, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1); /* Fix CCK PHY status report issue */ - ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1); /* CCK complete HW AntDiv within 64 samples */ - /* Tx Settings */ - ODM_SetBBReg(dm_odm, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0); /* Reg80c[21]=1'b0 from TX Reg */ - ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT); - - /* antenna mapping table */ - if (!dm_odm->bIsMPChip) { /* testchip */ - ODM_SetBBReg(dm_odm, ODM_REG_RX_DEFUALT_A_11N, BIT10|BIT9|BIT8, 1); /* Reg858[10:8]=3'b001 */ - ODM_SetBBReg(dm_odm, ODM_REG_RX_DEFUALT_A_11N, BIT13|BIT12|BIT11, 2); /* Reg858[13:11]=3'b010 */ - } else { /* MPchip */ - ODM_SetBBReg(dm_odm, ODM_REG_ANT_MAPPING1_11N, bMaskDWord, 0x0201); /* Reg914=3'b010, Reg915=3'b001 */ - } -} - -static void odm_FastAntTrainingInit(struct odm_dm_struct *dm_odm) -{ - u32 value32, i; - struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - u32 AntCombination = 2; - - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_FastAntTrainingInit()\n")); - - if (*(dm_odm->mp_mode) == 1) { - ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("dm_odm->AntDivType: %d\n", dm_odm->AntDivType)); - return; - } - - for (i = 0; i < 6; i++) { - dm_fat_tbl->Bssid[i] = 0; - dm_fat_tbl->antSumRSSI[i] = 0; - dm_fat_tbl->antRSSIcnt[i] = 0; - dm_fat_tbl->antAveRSSI[i] = 0; - } - dm_fat_tbl->TrainIdx = 0; - dm_fat_tbl->FAT_State = FAT_NORMAL_STATE; - - /* MAC Setting */ - value32 = ODM_GetMACReg(dm_odm, 0x4c, bMaskDWord); - ODM_SetMACReg(dm_odm, 0x4c, bMaskDWord, value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ - value32 = ODM_GetMACReg(dm_odm, 0x7B4, bMaskDWord); - ODM_SetMACReg(dm_odm, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); /* Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */ - - /* Match MAC ADDR */ - ODM_SetMACReg(dm_odm, 0x7b4, 0xFFFF, 0); - ODM_SetMACReg(dm_odm, 0x7b0, bMaskDWord, 0); - - ODM_SetBBReg(dm_odm, 0x870, BIT9|BIT8, 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */ - ODM_SetBBReg(dm_odm, 0x864, BIT10, 0); /* Reg864[10]=1'b0 antsel2 by HW */ - ODM_SetBBReg(dm_odm, 0xb2c, BIT22, 0); /* Regb2c[22]=1'b0 disable CS/CG switch */ - ODM_SetBBReg(dm_odm, 0xb2c, BIT31, 1); /* Regb2c[31]=1'b1 output at CG only */ - ODM_SetBBReg(dm_odm, 0xca4, bMaskDWord, 0x000000a0); - - /* antenna mapping table */ - if (AntCombination == 2) { - if (!dm_odm->bIsMPChip) { /* testchip */ - ODM_SetBBReg(dm_odm, 0x858, BIT10|BIT9|BIT8, 1); /* Reg858[10:8]=3'b001 */ - ODM_SetBBReg(dm_odm, 0x858, BIT13|BIT12|BIT11, 2); /* Reg858[13:11]=3'b010 */ - } else { /* MPchip */ - ODM_SetBBReg(dm_odm, 0x914, bMaskByte0, 1); - ODM_SetBBReg(dm_odm, 0x914, bMaskByte1, 2); - } - } else if (AntCombination == 7) { - if (!dm_odm->bIsMPChip) { /* testchip */ - ODM_SetBBReg(dm_odm, 0x858, BIT10|BIT9|BIT8, 0); /* Reg858[10:8]=3'b000 */ - ODM_SetBBReg(dm_odm, 0x858, BIT13|BIT12|BIT11, 1); /* Reg858[13:11]=3'b001 */ - ODM_SetBBReg(dm_odm, 0x878, BIT16, 0); - ODM_SetBBReg(dm_odm, 0x858, BIT15|BIT14, 2); /* Reg878[0],Reg858[14:15])=3'b010 */ - ODM_SetBBReg(dm_odm, 0x878, BIT19|BIT18|BIT17, 3);/* Reg878[3:1]=3b'011 */ - ODM_SetBBReg(dm_odm, 0x878, BIT22|BIT21|BIT20, 4);/* Reg878[6:4]=3b'100 */ - ODM_SetBBReg(dm_odm, 0x878, BIT25|BIT24|BIT23, 5);/* Reg878[9:7]=3b'101 */ - ODM_SetBBReg(dm_odm, 0x878, BIT28|BIT27|BIT26, 6);/* Reg878[12:10]=3b'110 */ - ODM_SetBBReg(dm_odm, 0x878, BIT31|BIT30|BIT29, 7);/* Reg878[15:13]=3b'111 */ - } else { /* MPchip */ - ODM_SetBBReg(dm_odm, 0x914, bMaskByte0, 0); - ODM_SetBBReg(dm_odm, 0x914, bMaskByte1, 1); - ODM_SetBBReg(dm_odm, 0x914, bMaskByte2, 2); - ODM_SetBBReg(dm_odm, 0x914, bMaskByte3, 3); - ODM_SetBBReg(dm_odm, 0x918, bMaskByte0, 4); - ODM_SetBBReg(dm_odm, 0x918, bMaskByte1, 5); - ODM_SetBBReg(dm_odm, 0x918, bMaskByte2, 6); - ODM_SetBBReg(dm_odm, 0x918, bMaskByte3, 7); - } - } - - /* Default Ant Setting when no fast training */ - ODM_SetBBReg(dm_odm, 0x80c, BIT21, 1); /* Reg80c[21]=1'b1 from TX Info */ - ODM_SetBBReg(dm_odm, 0x864, BIT5|BIT4|BIT3, 0); /* Default RX */ - ODM_SetBBReg(dm_odm, 0x864, BIT8|BIT7|BIT6, 1); /* Optional RX */ - - /* Enter Traing state */ - ODM_SetBBReg(dm_odm, 0x864, BIT2|BIT1|BIT0, (AntCombination-1)); /* Reg864[2:0]=3'd6 ant combination=reg864[2:0]+1 */ - ODM_SetBBReg(dm_odm, 0xc50, BIT7, 1); /* RegC50[7]=1'b1 enable HW AntDiv */ -} - -void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *dm_odm) -{ - if (dm_odm->SupportICType != ODM_RTL8188E) - return; - - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_odm->AntDivType=%d\n", dm_odm->AntDivType)); - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_odm->bIsMPChip=%s\n", (dm_odm->bIsMPChip ? "true" : "false"))); - - if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) - odm_RX_HWAntDivInit(dm_odm); - else if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) - odm_TRX_HWAntDivInit(dm_odm); - else if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) - odm_FastAntTrainingInit(dm_odm); -} - -void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant) -{ - struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - u32 DefaultAnt, OptionalAnt; - - if (dm_fat_tbl->RxIdleAnt != Ant) { - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Update Rx Idle Ant\n")); - if (Ant == MAIN_ANT) { - DefaultAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX; - OptionalAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX; - } else { - DefaultAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX; - OptionalAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX; - } - - if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) { - ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT5|BIT4|BIT3, DefaultAnt); /* Default RX */ - ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT8|BIT7|BIT6, OptionalAnt); /* Optional RX */ - ODM_SetBBReg(dm_odm, ODM_REG_ANTSEL_CTRL_11N, BIT14|BIT13|BIT12, DefaultAnt); /* Default TX */ - ODM_SetMACReg(dm_odm, ODM_REG_RESP_TX_11N, BIT6|BIT7, DefaultAnt); /* Resp Tx */ - } else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) { - ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT5|BIT4|BIT3, DefaultAnt); /* Default RX */ - ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT8|BIT7|BIT6, OptionalAnt); /* Optional RX */ - } - } - dm_fat_tbl->RxIdleAnt = Ant; - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RxIdleAnt=%s\n", (Ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT")); - pr_info("RxIdleAnt=%s\n", (Ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"); -} - -static void odm_UpdateTxAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant, u32 MacId) -{ - struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - u8 TargetAnt; - - if (Ant == MAIN_ANT) - TargetAnt = MAIN_ANT_CG_TRX; - else - TargetAnt = AUX_ANT_CG_TRX; - dm_fat_tbl->antsel_a[MacId] = TargetAnt&BIT0; - dm_fat_tbl->antsel_b[MacId] = (TargetAnt&BIT1)>>1; - dm_fat_tbl->antsel_c[MacId] = (TargetAnt&BIT2)>>2; - - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("Tx from TxInfo, TargetAnt=%s\n", - (Ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT")); - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("antsel_tr_mux=3'b%d%d%d\n", - dm_fat_tbl->antsel_c[MacId], dm_fat_tbl->antsel_b[MacId], dm_fat_tbl->antsel_a[MacId])); -} - -void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *dm_odm, u8 *pDesc, u8 macId) -{ - struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - - if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV)) { - SET_TX_DESC_ANTSEL_A_88E(pDesc, dm_fat_tbl->antsel_a[macId]); - SET_TX_DESC_ANTSEL_B_88E(pDesc, dm_fat_tbl->antsel_b[macId]); - SET_TX_DESC_ANTSEL_C_88E(pDesc, dm_fat_tbl->antsel_c[macId]); - } -} - -void ODM_AntselStatistics_88E(struct odm_dm_struct *dm_odm, u8 antsel_tr_mux, u32 MacId, u8 RxPWDBAll) -{ - struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) { - if (antsel_tr_mux == MAIN_ANT_CG_TRX) { - dm_fat_tbl->MainAnt_Sum[MacId] += RxPWDBAll; - dm_fat_tbl->MainAnt_Cnt[MacId]++; - } else { - dm_fat_tbl->AuxAnt_Sum[MacId] += RxPWDBAll; - dm_fat_tbl->AuxAnt_Cnt[MacId]++; - } - } else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) { - if (antsel_tr_mux == MAIN_ANT_CGCS_RX) { - dm_fat_tbl->MainAnt_Sum[MacId] += RxPWDBAll; - dm_fat_tbl->MainAnt_Cnt[MacId]++; - } else { - dm_fat_tbl->AuxAnt_Sum[MacId] += RxPWDBAll; - dm_fat_tbl->AuxAnt_Cnt[MacId]++; - } - } -} - -static void odm_HWAntDiv(struct odm_dm_struct *dm_odm) -{ - u32 i, MinRSSI = 0xFF, AntDivMaxRSSI = 0, MaxRSSI = 0, LocalMinRSSI, LocalMaxRSSI; - u32 Main_RSSI, Aux_RSSI; - u8 RxIdleAnt = 0, TargetAnt = 7; - struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - struct rtw_dig *pDM_DigTable = &dm_odm->DM_DigTable; - struct sta_info *pEntry; - - for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { - pEntry = dm_odm->pODM_StaInfo[i]; - if (IS_STA_VALID(pEntry)) { - /* 2 Caculate RSSI per Antenna */ - Main_RSSI = (dm_fat_tbl->MainAnt_Cnt[i] != 0) ? (dm_fat_tbl->MainAnt_Sum[i]/dm_fat_tbl->MainAnt_Cnt[i]) : 0; - Aux_RSSI = (dm_fat_tbl->AuxAnt_Cnt[i] != 0) ? (dm_fat_tbl->AuxAnt_Sum[i]/dm_fat_tbl->AuxAnt_Cnt[i]) : 0; - TargetAnt = (Main_RSSI >= Aux_RSSI) ? MAIN_ANT : AUX_ANT; - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("MacID=%d, MainAnt_Sum=%d, MainAnt_Cnt=%d\n", - i, dm_fat_tbl->MainAnt_Sum[i], - dm_fat_tbl->MainAnt_Cnt[i])); - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("MacID=%d, AuxAnt_Sum=%d, AuxAnt_Cnt=%d\n", - i, dm_fat_tbl->AuxAnt_Sum[i], dm_fat_tbl->AuxAnt_Cnt[i])); - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("MacID=%d, Main_RSSI= %d, Aux_RSSI= %d\n", - i, Main_RSSI, Aux_RSSI)); - /* 2 Select MaxRSSI for DIG */ - LocalMaxRSSI = (Main_RSSI > Aux_RSSI) ? Main_RSSI : Aux_RSSI; - if ((LocalMaxRSSI > AntDivMaxRSSI) && (LocalMaxRSSI < 40)) - AntDivMaxRSSI = LocalMaxRSSI; - if (LocalMaxRSSI > MaxRSSI) - MaxRSSI = LocalMaxRSSI; - - /* 2 Select RX Idle Antenna */ - if ((dm_fat_tbl->RxIdleAnt == MAIN_ANT) && (Main_RSSI == 0)) - Main_RSSI = Aux_RSSI; - else if ((dm_fat_tbl->RxIdleAnt == AUX_ANT) && (Aux_RSSI == 0)) - Aux_RSSI = Main_RSSI; - - LocalMinRSSI = (Main_RSSI > Aux_RSSI) ? Aux_RSSI : Main_RSSI; - if (LocalMinRSSI < MinRSSI) { - MinRSSI = LocalMinRSSI; - RxIdleAnt = TargetAnt; - } - /* 2 Select TRX Antenna */ - if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) - odm_UpdateTxAnt_88E(dm_odm, TargetAnt, i); - } - dm_fat_tbl->MainAnt_Sum[i] = 0; - dm_fat_tbl->AuxAnt_Sum[i] = 0; - dm_fat_tbl->MainAnt_Cnt[i] = 0; - dm_fat_tbl->AuxAnt_Cnt[i] = 0; - } - - /* 2 Set RX Idle Antenna */ - ODM_UpdateRxIdleAnt_88E(dm_odm, RxIdleAnt); - - pDM_DigTable->AntDiv_RSSI_max = AntDivMaxRSSI; - pDM_DigTable->RSSI_max = MaxRSSI; -} - -void ODM_AntennaDiversity_88E(struct odm_dm_struct *dm_odm) -{ - struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable; - if ((dm_odm->SupportICType != ODM_RTL8188E) || (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV))) - return; - if (!dm_odm->bLinked) { - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_AntennaDiversity_88E(): No Link.\n")); - if (dm_fat_tbl->bBecomeLinked) { - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn off HW AntDiv\n")); - ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 0); /* RegC50[7]=1'b1 enable HW AntDiv */ - ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 0); /* Enable CCK AntDiv */ - if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) - ODM_SetBBReg(dm_odm, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0); /* Reg80c[21]=1'b0 from TX Reg */ - dm_fat_tbl->bBecomeLinked = dm_odm->bLinked; - } - return; - } else { - if (!dm_fat_tbl->bBecomeLinked) { - ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn on HW AntDiv\n")); - /* Because HW AntDiv is disabled before Link, we enable HW AntDiv after link */ - ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 1); /* RegC50[7]=1'b1 enable HW AntDiv */ - ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 1); /* Enable CCK AntDiv */ - if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) - ODM_SetBBReg(dm_odm, ODM_REG_TX_ANT_CTRL_11N, BIT21, 1); /* Reg80c[21]=1'b1 from TX Info */ - dm_fat_tbl->bBecomeLinked = dm_odm->bLinked; - } - } - if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) - odm_HWAntDiv(dm_odm); -} - -/* 3============================================================ */ -/* 3 Dynamic Primary CCA */ -/* 3============================================================ */ - -void odm_PrimaryCCA_Init(struct odm_dm_struct *dm_odm) -{ - struct dyn_primary_cca *PrimaryCCA = &(dm_odm->DM_PriCCA); - - PrimaryCCA->DupRTS_flag = 0; - PrimaryCCA->intf_flag = 0; - PrimaryCCA->intf_type = 0; - PrimaryCCA->Monitor_flag = 0; - PrimaryCCA->PriCCA_flag = 0; -} - -bool ODM_DynamicPrimaryCCA_DupRTS(struct odm_dm_struct *dm_odm) -{ - struct dyn_primary_cca *PrimaryCCA = &(dm_odm->DM_PriCCA); - - return PrimaryCCA->DupRTS_flag; -} - -void odm_DynamicPrimaryCCA(struct odm_dm_struct *dm_odm) -{ - return; -} +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +//============================================================ +// include files +//============================================================ + +#include "odm_precomp.h" + +#if (RTL8188E_SUPPORT == 1) + +VOID +ODM_DIG_LowerBound_88E( + IN PDM_ODM_T pDM_Odm +) +{ + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + + if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) + { + pDM_DigTable->rx_gain_range_min = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_DIG_LowerBound_88E(): pDM_DigTable->AntDiv_RSSI_max=%d \n",pDM_DigTable->AntDiv_RSSI_max)); + } + //If only one Entry connected + + + +} + +#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) +VOID +odm_RX_HWAntDivInit( + IN PDM_ODM_T pDM_Odm +) +{ + u4Byte value32; + PADAPTER Adapter = pDM_Odm->Adapter; + #if (MP_DRIVER == 1) + if (*(pDM_Odm->mp_mode) == 1) + { + pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; + ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); // disable HW AntDiv + ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); // 1:CG, 0:CS + return; + } + #endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_RX_HWAntDivInit() \n")); + + //MAC Setting + value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); + ODM_SetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output + //Pin Settings + ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW + ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW + ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT22, 1); //Regb2c[22]=1'b0 //disable CS/CG switch + ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); //Regb2c[31]=1'b1 //output at CG only + //OFDM Settings + ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N , bMaskDWord, 0x000000a0); + //CCK Settings + ODM_SetBBReg(pDM_Odm, ODM_REG_BB_PWR_SAV4_11N , BIT7, 1); //Fix CCK PHY status report issue + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N , BIT4, 1); //CCK complete HW AntDiv within 64 samples + ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT); + ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , 0xFFFF, 0x0201); //antenna mapping table + + //ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 1); //Enable HW AntDiv + //ODM_SetBBReg(pDM_Odm, 0xa00 , BIT15, 1); //Enable CCK AntDiv +} + +VOID +odm_TRX_HWAntDivInit( + IN PDM_ODM_T pDM_Odm +) +{ + u4Byte value32; + PADAPTER Adapter = pDM_Odm->Adapter; + + #if (MP_DRIVER == 1) + if (*(pDM_Odm->mp_mode) == 1) + { + pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; + ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); // disable HW AntDiv + ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, 0); //Default RX (0/1) + return; + } + + #endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_TRX_HWAntDivInit() \n")); + + //MAC Setting + value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); + ODM_SetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output + //Pin Settings + ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW + ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW + ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT22, 0); //Regb2c[22]=1'b0 //disable CS/CG switch + ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); //Regb2c[31]=1'b1 //output at CG only + //OFDM Settings + ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N , bMaskDWord, 0x000000a0); + //CCK Settings + ODM_SetBBReg(pDM_Odm, ODM_REG_BB_PWR_SAV4_11N , BIT7, 1); //Fix CCK PHY status report issue + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N , BIT4, 1); //CCK complete HW AntDiv within 64 samples + //Tx Settings + ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N , BIT21, 0); //Reg80c[21]=1'b0 //from TX Reg + ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT); + + //antenna mapping table + if(!pDM_Odm->bIsMPChip) //testchip + { + ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT10|BIT9|BIT8, 1); //Reg858[10:8]=3'b001 + ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT13|BIT12|BIT11, 2); //Reg858[13:11]=3'b010 + } + else //MPchip + ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , bMaskDWord, 0x0201); //Reg914=3'b010, Reg915=3'b001 + + //ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 1); //Enable HW AntDiv + //ODM_SetBBReg(pDM_Odm, 0xa00 , BIT15, 1); //Enable CCK AntDiv +} + +VOID +odm_FastAntTrainingInit( + IN PDM_ODM_T pDM_Odm +) +{ + u4Byte value32, i; + pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; + u4Byte AntCombination = 2; + PADAPTER Adapter = pDM_Odm->Adapter; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_FastAntTrainingInit() \n")); + +#if (MP_DRIVER == 1) + if (*(pDM_Odm->mp_mode) == 1) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("pDM_Odm->AntDivType: %d\n", pDM_Odm->AntDivType)); + return; + } +#endif + + for(i=0; i<6; i++) + { + pDM_FatTable->Bssid[i] = 0; + pDM_FatTable->antSumRSSI[i] = 0; + pDM_FatTable->antRSSIcnt[i] = 0; + pDM_FatTable->antAveRSSI[i] = 0; + } + pDM_FatTable->TrainIdx = 0; + pDM_FatTable->FAT_State = FAT_NORMAL_STATE; + + //MAC Setting + value32 = ODM_GetMACReg(pDM_Odm, 0x4c, bMaskDWord); + ODM_SetMACReg(pDM_Odm, 0x4c, bMaskDWord, value32|(BIT23|BIT25)); //Reg4C[25]=1, Reg4C[23]=1 for pin output + value32 = ODM_GetMACReg(pDM_Odm, 0x7B4, bMaskDWord); + ODM_SetMACReg(pDM_Odm, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); //Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match + //value32 = PlatformEFIORead4Byte(Adapter, 0x7B4); + //PlatformEFIOWrite4Byte(Adapter, 0x7b4, value32|BIT18); //append MACID in reponse packet + + //Match MAC ADDR + ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, 0); + ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, 0); + + ODM_SetBBReg(pDM_Odm, 0x870 , BIT9|BIT8, 0);//Reg870[8]=1'b0, Reg870[9]=1'b0 //antsel antselb by HW + ODM_SetBBReg(pDM_Odm, 0x864 , BIT10, 0); //Reg864[10]=1'b0 //antsel2 by HW + ODM_SetBBReg(pDM_Odm, 0xb2c , BIT22, 0); //Regb2c[22]=1'b0 //disable CS/CG switch + ODM_SetBBReg(pDM_Odm, 0xb2c , BIT31, 1); //Regb2c[31]=1'b1 //output at CG only + ODM_SetBBReg(pDM_Odm, 0xca4 , bMaskDWord, 0x000000a0); + + //antenna mapping table + if(AntCombination == 2) + { + if(!pDM_Odm->bIsMPChip) //testchip + { + ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 1); //Reg858[10:8]=3'b001 + ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 2); //Reg858[13:11]=3'b010 + } + else //MPchip + { + ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 1); + ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 2); + } + } + else if(AntCombination == 7) + { + if(!pDM_Odm->bIsMPChip) //testchip + { + ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 0); //Reg858[10:8]=3'b000 + ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 1); //Reg858[13:11]=3'b001 + ODM_SetBBReg(pDM_Odm, 0x878 , BIT16, 0); + ODM_SetBBReg(pDM_Odm, 0x858 , BIT15|BIT14, 2); //(Reg878[0],Reg858[14:15])=3'b010 + ODM_SetBBReg(pDM_Odm, 0x878 , BIT19|BIT18|BIT17, 3);//Reg878[3:1]=3b'011 + ODM_SetBBReg(pDM_Odm, 0x878 , BIT22|BIT21|BIT20, 4);//Reg878[6:4]=3b'100 + ODM_SetBBReg(pDM_Odm, 0x878 , BIT25|BIT24|BIT23, 5);//Reg878[9:7]=3b'101 + ODM_SetBBReg(pDM_Odm, 0x878 , BIT28|BIT27|BIT26, 6);//Reg878[12:10]=3b'110 + ODM_SetBBReg(pDM_Odm, 0x878 , BIT31|BIT30|BIT29, 7);//Reg878[15:13]=3b'111 + } + else //MPchip + { + ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 0); + ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 1); + ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte2, 2); + ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte3, 3); + ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte0, 4); + ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte1, 5); + ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte2, 6); + ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte3, 7); + } + } + + //Default Ant Setting when no fast training + ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 1); //Reg80c[21]=1'b1 //from TX Info + ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, 0); //Default RX + ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, 1); //Optional RX + //ODM_SetBBReg(pDM_Odm, 0x860 , BIT14|BIT13|BIT12, 1); //Default TX + + //Enter Traing state + ODM_SetBBReg(pDM_Odm, 0x864 , BIT2|BIT1|BIT0, (AntCombination-1)); //Reg864[2:0]=3'd6 //ant combination=reg864[2:0]+1 + //ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv + //ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 0); //RegE08[16]=1'b0 //disable fast training + //ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 1); //RegE08[16]=1'b1 //enable fast training + ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 1); //RegC50[7]=1'b1 //enable HW AntDiv + + + //SW Control + //PHY_SetBBReg(Adapter, 0x864 , BIT10, 1); + //PHY_SetBBReg(Adapter, 0x870 , BIT9, 1); + //PHY_SetBBReg(Adapter, 0x870 , BIT8, 1); + //PHY_SetBBReg(Adapter, 0x864 , BIT11, 1); + //PHY_SetBBReg(Adapter, 0x860 , BIT9, 0); + //PHY_SetBBReg(Adapter, 0x860 , BIT8, 0); +} + +VOID +ODM_AntennaDiversityInit_88E( + IN PDM_ODM_T pDM_Odm +) +{ +/* + //2012.03.27 LukeLee: For temp use, should be removed later + //pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV; + //{ + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); + //pHalData->AntDivCfg = 1; + //} +*/ + if(pDM_Odm->SupportICType != ODM_RTL8188E) + return; + + //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->AntDivType=%d, pHalData->AntDivCfg=%d\n", + // pDM_Odm->AntDivType, pHalData->AntDivCfg)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->AntDivType=%d\n",pDM_Odm->AntDivType)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->bIsMPChip=%s\n",(pDM_Odm->bIsMPChip?"TRUE":"FALSE"))); + + if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) + odm_RX_HWAntDivInit(pDM_Odm); + else if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) + odm_TRX_HWAntDivInit(pDM_Odm); + else if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) + odm_FastAntTrainingInit(pDM_Odm); +} + + +VOID +ODM_UpdateRxIdleAnt_88E(IN PDM_ODM_T pDM_Odm, IN u1Byte Ant) +{ + pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; + u4Byte DefaultAnt, OptionalAnt; + + if(pDM_FatTable->RxIdleAnt != Ant) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Update Rx Idle Ant\n")); + if(Ant == MAIN_ANT) + { + DefaultAnt = (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)?MAIN_ANT_CG_TRX:MAIN_ANT_CGCS_RX; + OptionalAnt = (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)?AUX_ANT_CG_TRX:AUX_ANT_CGCS_RX; + } + else + { + DefaultAnt = (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)?AUX_ANT_CG_TRX:AUX_ANT_CGCS_RX; + OptionalAnt = (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)?MAIN_ANT_CG_TRX:MAIN_ANT_CGCS_RX; + } + + if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) + { + ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, DefaultAnt); //Default RX + ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT8|BIT7|BIT6, OptionalAnt); //Optional RX + ODM_SetBBReg(pDM_Odm, ODM_REG_ANTSEL_CTRL_11N , BIT14|BIT13|BIT12, DefaultAnt); //Default TX + ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11N , BIT6|BIT7, DefaultAnt); //Resp Tx + + } + else if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) + { + ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, DefaultAnt); //Default RX + ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT8|BIT7|BIT6, OptionalAnt); //Optional RX + } + } + pDM_FatTable->RxIdleAnt = Ant; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RxIdleAnt=%s\n",(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); + printk("RxIdleAnt=%s\n",(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"); +} + + +VOID +odm_UpdateTxAnt_88E(IN PDM_ODM_T pDM_Odm, IN u1Byte Ant, IN u4Byte MacId) +{ + pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; + u1Byte TargetAnt; + + if(Ant == MAIN_ANT) + TargetAnt = MAIN_ANT_CG_TRX; + else + TargetAnt = AUX_ANT_CG_TRX; + + pDM_FatTable->antsel_a[MacId] = TargetAnt&BIT0; + pDM_FatTable->antsel_b[MacId] = (TargetAnt&BIT1)>>1; + pDM_FatTable->antsel_c[MacId] = (TargetAnt&BIT2)>>2; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Tx from TxInfo, TargetAnt=%s\n", + (Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=3'b%d%d%d\n", + pDM_FatTable->antsel_c[MacId] , pDM_FatTable->antsel_b[MacId] , pDM_FatTable->antsel_a[MacId] )); +} + +#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) +VOID +ODM_SetTxAntByTxInfo_88E( + IN PDM_ODM_T pDM_Odm, + IN pu1Byte pDesc, + IN u1Byte macId + ) +{ + pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; + + if((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) + { + SET_TX_DESC_ANTSEL_A_88E(pDesc, pDM_FatTable->antsel_a[macId]); + SET_TX_DESC_ANTSEL_B_88E(pDesc, pDM_FatTable->antsel_b[macId]); + SET_TX_DESC_ANTSEL_C_88E(pDesc, pDM_FatTable->antsel_c[macId]); + //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SetTxAntByTxInfo_88E_WIN(): MacID=%d, antsel_tr_mux=3'b%d%d%d\n", + // macId, pDM_FatTable->antsel_c[macId], pDM_FatTable->antsel_b[macId], pDM_FatTable->antsel_a[macId])); + } +} +#else// (DM_ODM_SUPPORT_TYPE == ODM_AP) +VOID +ODM_SetTxAntByTxInfo_88E( + IN PDM_ODM_T pDM_Odm + ) +{ +} +#endif + +VOID +ODM_AntselStatistics_88E( + IN PDM_ODM_T pDM_Odm, + IN u1Byte antsel_tr_mux, + IN u4Byte MacId, + IN u1Byte RxPWDBAll +) +{ + pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; + if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) + { + if(antsel_tr_mux == MAIN_ANT_CG_TRX) + { + + pDM_FatTable->MainAnt_Sum[MacId]+=RxPWDBAll; + pDM_FatTable->MainAnt_Cnt[MacId]++; + } + else + { + pDM_FatTable->AuxAnt_Sum[MacId]+=RxPWDBAll; + pDM_FatTable->AuxAnt_Cnt[MacId]++; + + } + } + else if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) + { + if(antsel_tr_mux == MAIN_ANT_CGCS_RX) + { + + pDM_FatTable->MainAnt_Sum[MacId]+=RxPWDBAll; + pDM_FatTable->MainAnt_Cnt[MacId]++; + } + else + { + pDM_FatTable->AuxAnt_Sum[MacId]+=RxPWDBAll; + pDM_FatTable->AuxAnt_Cnt[MacId]++; + + } + } +} + +#define TX_BY_REG 0 +VOID +odm_HWAntDiv( + IN PDM_ODM_T pDM_Odm +) +{ + u4Byte i, MinRSSI=0xFF, AntDivMaxRSSI=0, MaxRSSI=0, LocalMinRSSI, LocalMaxRSSI; + u4Byte Main_RSSI, Aux_RSSI; + u1Byte RxIdleAnt=0, TargetAnt=7; + pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + BOOLEAN bMatchBSSID; + BOOLEAN bPktFilterMacth = FALSE; + PSTA_INFO_T pEntry; + + for (i=0; ipODM_StaInfo[i]; + if(IS_STA_VALID(pEntry)) + { + //2 Caculate RSSI per Antenna + Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; + Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; + TargetAnt = (Main_RSSI>=Aux_RSSI)?MAIN_ANT:AUX_ANT; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MacID=%d, MainAnt_Sum=%d, MainAnt_Cnt=%d\n", i, pDM_FatTable->MainAnt_Sum[i], pDM_FatTable->MainAnt_Cnt[i])); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MacID=%d, AuxAnt_Sum=%d, AuxAnt_Cnt=%d\n",i, pDM_FatTable->AuxAnt_Sum[i], pDM_FatTable->AuxAnt_Cnt[i])); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MacID=%d, Main_RSSI= %d, Aux_RSSI= %d\n", i, Main_RSSI, Aux_RSSI)); + + //2 Select MaxRSSI for DIG + LocalMaxRSSI = (Main_RSSI>Aux_RSSI)?Main_RSSI:Aux_RSSI; + if((LocalMaxRSSI > AntDivMaxRSSI) && (LocalMaxRSSI < 40)) + AntDivMaxRSSI = LocalMaxRSSI; + if(LocalMaxRSSI > MaxRSSI) + MaxRSSI = LocalMaxRSSI; + + //2 Select RX Idle Antenna + if((pDM_FatTable->RxIdleAnt == MAIN_ANT) && (Main_RSSI == 0)) + Main_RSSI = Aux_RSSI; + else if((pDM_FatTable->RxIdleAnt == AUX_ANT) && (Aux_RSSI == 0)) + Aux_RSSI = Main_RSSI; + + LocalMinRSSI = (Main_RSSI>Aux_RSSI)?Aux_RSSI:Main_RSSI; + if(LocalMinRSSI < MinRSSI) + { + MinRSSI = LocalMinRSSI; + RxIdleAnt = TargetAnt; + } +#if TX_BY_REG + +#else + //2 Select TRX Antenna + if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) + odm_UpdateTxAnt_88E(pDM_Odm, TargetAnt, i); +#endif + } + pDM_FatTable->MainAnt_Sum[i] = 0; + pDM_FatTable->AuxAnt_Sum[i] = 0; + pDM_FatTable->MainAnt_Cnt[i] = 0; + pDM_FatTable->AuxAnt_Cnt[i] = 0; + } + + //2 Set RX Idle Antenna + ODM_UpdateRxIdleAnt_88E(pDM_Odm, RxIdleAnt); + + pDM_DigTable->AntDiv_RSSI_max = AntDivMaxRSSI; + pDM_DigTable->RSSI_max = MaxRSSI; +} + + +#if (!(DM_ODM_SUPPORT_TYPE == ODM_CE)) +VOID +odm_SetNextMACAddrTarget( + IN PDM_ODM_T pDM_Odm +) +{ + pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; + PSTA_INFO_T pEntry; + //u1Byte Bssid[6]; + u4Byte value32, i; + + // + //2012.03.26 LukeLee: The MAC address is changed according to MACID in turn + // + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SetNextMACAddrTarget() ==>\n")); + if(pDM_Odm->bLinked) + { + for (i=0; iTrainIdx+1) == ODM_ASSOCIATE_ENTRY_NUM) + pDM_FatTable->TrainIdx = 0; + else + pDM_FatTable->TrainIdx++; + + pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx]; + if(IS_STA_VALID(pEntry)) + { + //Match MAC ADDR +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + value32 = (pEntry->hwaddr[5]<<8)|pEntry->hwaddr[4]; +#else + value32 = (pEntry->MacAddr[5]<<8)|pEntry->MacAddr[4]; +#endif + ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, value32); +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + value32 = (pEntry->hwaddr[3]<<24)|(pEntry->hwaddr[2]<<16) |(pEntry->hwaddr[1]<<8) |pEntry->hwaddr[0]; +#else + value32 = (pEntry->MacAddr[3]<<24)|(pEntry->MacAddr[2]<<16) |(pEntry->MacAddr[1]<<8) |pEntry->MacAddr[0]; +#endif + ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, value32); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_FatTable->TrainIdx=%d\n",pDM_FatTable->TrainIdx)); +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n", + pEntry->hwaddr[5],pEntry->hwaddr[4],pEntry->hwaddr[3],pEntry->hwaddr[2],pEntry->hwaddr[1],pEntry->hwaddr[0])); +#else + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n", + pEntry->MacAddr[5],pEntry->MacAddr[4],pEntry->MacAddr[3],pEntry->MacAddr[2],pEntry->MacAddr[1],pEntry->MacAddr[0])); +#endif + + break; + } + } + + } + +#if 0 + // + //2012.03.26 LukeLee: This should be removed later, the MAC address is changed according to MACID in turn + // + #if( DM_ODM_SUPPORT_TYPE & ODM_MP) + { + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + + for (i=0; i<6; i++) + { + Bssid[i] = pMgntInfo->Bssid[i]; + //DbgPrint("Bssid[%d]=%x\n", i, Bssid[i]); + } + } + #endif + + //odm_SetNextMACAddrTarget(pDM_Odm); + + //1 Select MAC Address Filter + for (i=0; i<6; i++) + { + if(Bssid[i] != pDM_FatTable->Bssid[i]) + { + bMatchBSSID = FALSE; + break; + } + } + if(bMatchBSSID == FALSE) + { + //Match MAC ADDR + value32 = (Bssid[5]<<8)|Bssid[4]; + ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, value32); + value32 = (Bssid[3]<<24)|(Bssid[2]<<16) |(Bssid[1]<<8) |Bssid[0]; + ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, value32); + } + + return bMatchBSSID; +#endif + +} + +VOID +odm_FastAntTraining( + IN PDM_ODM_T pDM_Odm +) +{ + u4Byte i, MaxRSSI=0; + u1Byte TargetAnt=2; + pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; + BOOLEAN bPktFilterMacth = FALSE; + PSTA_INFO_T pEntry; + + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("==>odm_FastAntTraining()\n")); + + //1 TRAINING STATE + if(pDM_FatTable->FAT_State == FAT_TRAINING_STATE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Enter FAT_TRAINING_STATE\n")); + //2 Caculate RSSI per Antenna + for (i=0; i<7; i++) + { + if(pDM_FatTable->antRSSIcnt[i] == 0) + pDM_FatTable->antAveRSSI[i] = 0; + else + { + pDM_FatTable->antAveRSSI[i] = pDM_FatTable->antSumRSSI[i] /pDM_FatTable->antRSSIcnt[i]; + bPktFilterMacth = TRUE; + } + if(pDM_FatTable->antAveRSSI[i] > MaxRSSI) + { + MaxRSSI = pDM_FatTable->antAveRSSI[i]; + TargetAnt = (u1Byte) i; + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_FatTable->antAveRSSI[%d] = %d, pDM_FatTable->antRSSIcnt[%d] = %d\n", + i, pDM_FatTable->antAveRSSI[i], i, pDM_FatTable->antRSSIcnt[i])); + } + + //2 Select TRX Antenna + if(bPktFilterMacth == FALSE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("None Packet is matched\n")); + + ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 0); //RegE08[16]=1'b0 //disable fast training + ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TargetAnt=%d, MaxRSSI=%d\n",TargetAnt,MaxRSSI)); + + ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 0); //RegE08[16]=1'b0 //disable fast training + //ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv + ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, TargetAnt); //Default RX is Omni, Optional RX is the best decision by FAT + //ODM_SetBBReg(pDM_Odm, 0x860 , BIT14|BIT13|BIT12, TargetAnt); //Default TX + ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 1); //Reg80c[21]=1'b1 //from TX Info + +#if 0 + pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx]; + + if(IS_STA_VALID(pEntry)) + { + pEntry->antsel_a = TargetAnt&BIT0; + pEntry->antsel_b = (TargetAnt&BIT1)>>1; + pEntry->antsel_c = (TargetAnt&BIT2)>>2; + } +#else + pDM_FatTable->antsel_a[pDM_FatTable->TrainIdx] = TargetAnt&BIT0; + pDM_FatTable->antsel_b[pDM_FatTable->TrainIdx] = (TargetAnt&BIT1)>>1; + pDM_FatTable->antsel_c[pDM_FatTable->TrainIdx] = (TargetAnt&BIT2)>>2; +#endif + + + if(TargetAnt == 0) + ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv + + } + + //2 Reset Counter + for(i=0; i<7; i++) + { + pDM_FatTable->antSumRSSI[i] = 0; + pDM_FatTable->antRSSIcnt[i] = 0; + } + + pDM_FatTable->FAT_State = FAT_NORMAL_STATE; + return; + } + + //1 NORMAL STATE + if(pDM_FatTable->FAT_State == FAT_NORMAL_STATE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Enter FAT_NORMAL_STATE\n")); + + odm_SetNextMACAddrTarget(pDM_Odm); + +#if 0 + pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx]; + if(IS_STA_VALID(pEntry)) + { + pEntry->antsel_a = TargetAnt&BIT0; + pEntry->antsel_b = (TargetAnt&BIT1)>>1; + pEntry->antsel_c = (TargetAnt&BIT2)>>2; + } +#endif + + //2 Prepare Training + pDM_FatTable->FAT_State = FAT_TRAINING_STATE; + ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 1); //RegE08[16]=1'b1 //enable fast training + ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 1); //RegC50[7]=1'b1 //enable HW AntDiv + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Start FAT_TRAINING_STATE\n")); + ODM_SetTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, 500 ); //ms + + } + +} + +VOID +odm_FastAntTrainingCallback( + IN PDM_ODM_T pDM_Odm +) +{ + +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PADAPTER padapter = pDM_Odm->Adapter; + if(padapter->net_closed == _TRUE) + return; + //if(*pDM_Odm->pbNet_closed == TRUE) + // return; +#endif + +#if USE_WORKITEM + ODM_ScheduleWorkItem(&pDM_Odm->FastAntTrainingWorkitem); +#else + odm_FastAntTraining(pDM_Odm); +#endif +} + +VOID +odm_FastAntTrainingWorkItemCallback( + IN PDM_ODM_T pDM_Odm +) +{ + odm_FastAntTraining(pDM_Odm); +} +#endif + +VOID +ODM_AntennaDiversity_88E( + IN PDM_ODM_T pDM_Odm +) +{ + pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; + if((pDM_Odm->SupportICType != ODM_RTL8188E) || (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV))) + { + //ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_AntennaDiversity_88E: Not Support 88E AntDiv\n")); + return; + } +#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV + if(pDM_Odm->bLinked){ + if(pDM_Odm->Adapter->registrypriv.force_ant != 0) + { + u4Byte Main_RSSI, Aux_RSSI; + u8 i=0; + Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; + Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MacID=%d, MainAnt_Sum=%d, MainAnt_Cnt=%d\n", i, pDM_FatTable->MainAnt_Sum[i], pDM_FatTable->MainAnt_Cnt[i])); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MacID=%d, AuxAnt_Sum=%d, AuxAnt_Cnt=%d\n",i, pDM_FatTable->AuxAnt_Sum[i], pDM_FatTable->AuxAnt_Cnt[i])); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MacID=%d, Main_RSSI= %d, Aux_RSSI= %d\n", i, Main_RSSI, Aux_RSSI)); + pDM_FatTable->MainAnt_Sum[i] = 0; + pDM_FatTable->AuxAnt_Sum[i] = 0; + pDM_FatTable->MainAnt_Cnt[i] = 0; + pDM_FatTable->AuxAnt_Cnt[i] = 0; + } + if(pDM_Odm->Adapter->registrypriv.force_ant==1){ + ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT); + printk("%s fixed antenna in Main ant\n",__FUNCTION__); + return; + } + else if(pDM_Odm->Adapter->registrypriv.force_ant==2){ + ODM_UpdateRxIdleAnt_88E(pDM_Odm, AUX_ANT); + printk("%s fixed antenna in AUX ant\n",__FUNCTION__); + return; + } + } +#endif + + + + if(!pDM_Odm->bLinked) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_AntennaDiversity_88E(): No Link.\n")); + if(pDM_FatTable->bBecomeLinked == TRUE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn off HW AntDiv\n")); + ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); //RegC50[7]=1'b1 //enable HW AntDiv + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA1_11N , BIT15, 0); //Enable CCK AntDiv + if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) + ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N , BIT21, 0); //Reg80c[21]=1'b0 //from TX Reg + pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; + } + return; + } + else + { + if(pDM_FatTable->bBecomeLinked ==FALSE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn on HW AntDiv\n")); + //Because HW AntDiv is disabled before Link, we enable HW AntDiv after link + ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 1); //RegC50[7]=1'b1 //enable HW AntDiv + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA1_11N , BIT15, 1); //Enable CCK AntDiv + //ODM_SetMACReg(pDM_Odm, 0x7B4 , BIT18, 1); //Response Tx by current HW antdiv + if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) + { +#if TX_BY_REG + ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N , BIT21, 0); //Reg80c[21]=1'b0 //from Reg +#else + ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N , BIT21, 1); //Reg80c[21]=1'b1 //from TX Info +#endif + } + pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked; + } + } + + + + if((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)) + odm_HWAntDiv(pDM_Odm); + #if (!(DM_ODM_SUPPORT_TYPE == ODM_CE)) + else if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) + odm_FastAntTraining(pDM_Odm); + #endif +} + + +/* +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) +VOID +odm_FastAntTrainingCallback( + PRT_TIMER pTimer +) +{ + PADAPTER Adapter = (PADAPTER)pTimer->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //#if DEV_BUS_TYPE==RT_PCI_INTERFACE + //#if USE_WORKITEM + //PlatformScheduleWorkItem(&pHalData->SwAntennaSwitchWorkitem); + //#else + odm_FastAntTraining(&pHalData->DM_OutSrc); + //#endif + //#else + //PlatformScheduleWorkItem(&pHalData->SwAntennaSwitchWorkitem); + //#endif + +} +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) +VOID odm_FastAntTrainingCallback(void *FunctionContext) +{ + PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; + PADAPTER padapter = pDM_Odm->Adapter; + if(padapter->net_closed == _TRUE) + return; + odm_FastAntTraining(pDM_Odm); +} +#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) +VOID odm_FastAntTrainingCallback(void *FunctionContext) +{ + PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; + odm_FastAntTraining(pDM_Odm); +} + +#endif +*/ + +#else //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) +#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE)) +VOID +ODM_SetTxAntByTxInfo_88E( + IN PDM_ODM_T pDM_Odm, + IN pu1Byte pDesc, + IN u1Byte macId + ) +{ +} +#else// (DM_ODM_SUPPORT_TYPE == ODM_AP) +VOID +ODM_SetTxAntByTxInfo_88E( + IN PDM_ODM_T pDM_Odm + ) +{ +} +#endif +#endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) +//3============================================================ +//3 Dynamic Primary CCA +//3============================================================ + +VOID +odm_PrimaryCCA_Init( + IN PDM_ODM_T pDM_Odm) +{ + pPri_CCA_T PrimaryCCA = &(pDM_Odm->DM_PriCCA); + PrimaryCCA->DupRTS_flag = 0; + PrimaryCCA->intf_flag = 0; + PrimaryCCA->intf_type = 0; + PrimaryCCA->Monitor_flag = 0; + PrimaryCCA->PriCCA_flag = 0; +} + +BOOLEAN +ODM_DynamicPrimaryCCA_DupRTS( + IN PDM_ODM_T pDM_Odm + ) +{ + pPri_CCA_T PrimaryCCA = &(pDM_Odm->DM_PriCCA); + + return PrimaryCCA->DupRTS_flag; +} + +VOID +odm_DynamicPrimaryCCA( + IN PDM_ODM_T pDM_Odm + ) +{ + PADAPTER Adapter = pDM_Odm->Adapter; // for NIC + prtl8192cd_priv priv = pDM_Odm->priv; // for AP + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +#if (DM_ODM_SUPPORT_TYPE & (ODM_MP)) + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + PRT_WLAN_STA pEntry; +#endif + + PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); + pPri_CCA_T PrimaryCCA = &(pDM_Odm->DM_PriCCA); + + BOOLEAN Is40MHz; + BOOLEAN Client_40MHz = FALSE, Client_tmp = FALSE; // connected client BW + BOOLEAN bConnected = FALSE; // connected or not + static u1Byte Client_40MHz_pre = 0; + static u8Byte lastTxOkCnt = 0; + static u8Byte lastRxOkCnt = 0; + static u4Byte Counter = 0; + static u1Byte Delay = 1; + u8Byte curTxOkCnt; + u8Byte curRxOkCnt; + u1Byte SecCHOffset; + u1Byte i; + +#if((DM_ODM_SUPPORT_TYPE==ODM_ADSL) ||( DM_ODM_SUPPORT_TYPE==ODM_CE)) + return; +#endif + + if(pDM_Odm->SupportICType != ODM_RTL8188E) + return; + + Is40MHz = *(pDM_Odm->pBandWidth); + SecCHOffset = *(pDM_Odm->pSecChOffset); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Second CH Offset = %d\n", SecCHOffset)); + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + if(Is40MHz==1) + SecCHOffset = SecCHOffset%2+1; // NIC's definition is reverse to AP 1:secondary below, 2: secondary above + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Second CH Offset = %d\n", SecCHOffset)); + //3 Check Current WLAN Traffic + curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; + curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; + lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; + lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; +#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) + //3 Check Current WLAN Traffic + curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast)-lastTxOkCnt; + curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast)-lastRxOkCnt; + lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); + lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); +#endif + + //==================Debug Message==================== + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("TP = %llu\n", curTxOkCnt+curRxOkCnt)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Is40MHz = %d\n", Is40MHz)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("BW_LSC = %d\n", FalseAlmCnt->Cnt_BW_LSC)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("BW_USC = %d\n", FalseAlmCnt->Cnt_BW_USC)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCA OFDM = %d\n", FalseAlmCnt->Cnt_OFDM_CCA)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCA CCK = %d\n", FalseAlmCnt->Cnt_CCK_CCA)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("OFDM FA = %d\n", FalseAlmCnt->Cnt_Ofdm_fail)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCK FA = %d\n", FalseAlmCnt->Cnt_Cck_fail)); + //================================================ + +#if (DM_ODM_SUPPORT_TYPE == ODM_MP) + if (ACTING_AS_AP(Adapter)) // primary cca process only do at AP mode +#endif + { + + #if (DM_ODM_SUPPORT_TYPE == ODM_MP) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("ACTING as AP mode=%d\n", ACTING_AS_AP(Adapter))); + //3 To get entry's connection and BW infomation status. + for(i=0;iHTInfo.bBw40MHz; // client BW + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Client_BW=%d\n", Client_tmp)); + if(Client_tmp>Client_40MHz) + Client_40MHz = Client_tmp; // 40M/20M coexist => 40M priority is High + + if(pEntry->bAssociated) + { + bConnected=TRUE; // client is connected or not + break; + } + } + else + { + break; + } + } +#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) + //3 To get entry's connection and BW infomation status. + + PSTA_INFO_T pstat; + + for(i=0; ipODM_StaInfo[i]; + if(IS_STA_VALID(pstat) ) + { + Client_tmp = pstat->tx_bw; + if(Client_tmp>Client_40MHz) + Client_40MHz = Client_tmp; // 40M/20M coexist => 40M priority is High + + bConnected = TRUE; + } + } +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("bConnected=%d\n", bConnected)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Is Client 40MHz=%d\n", Client_40MHz)); + //1 Monitor whether the interference exists or not + if(PrimaryCCA->Monitor_flag == 1) + { + if(SecCHOffset == 1) // secondary channel is below the primary channel + { + if((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_LSC > FalseAlmCnt->Cnt_BW_USC+500)) + { + if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) + { + PrimaryCCA->intf_type = 1; + PrimaryCCA->PriCCA_flag = 1; + ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2); // USC MF + if(PrimaryCCA->DupRTS_flag == 1) + PrimaryCCA->DupRTS_flag = 0; + } + else + { + PrimaryCCA->intf_type = 2; + if(PrimaryCCA->DupRTS_flag == 0) + PrimaryCCA->DupRTS_flag = 1; + } + + } + else // interferecne disappear + { + PrimaryCCA->DupRTS_flag = 0; + PrimaryCCA->intf_flag = 0; + PrimaryCCA->intf_type = 0; + } + } + else if(SecCHOffset == 2) // secondary channel is above the primary channel + { + if((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_USC > FalseAlmCnt->Cnt_BW_LSC+500)) + { + if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) + { + PrimaryCCA->intf_type = 1; + PrimaryCCA->PriCCA_flag = 1; + ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1); // LSC MF + if(PrimaryCCA->DupRTS_flag == 1) + PrimaryCCA->DupRTS_flag = 0; + } + else + { + PrimaryCCA->intf_type = 2; + if(PrimaryCCA->DupRTS_flag == 0) + PrimaryCCA->DupRTS_flag = 1; + } + + } + else // interferecne disappear + { + PrimaryCCA->DupRTS_flag = 0; + PrimaryCCA->intf_flag = 0; + PrimaryCCA->intf_type = 0; + } + + + } + PrimaryCCA->Monitor_flag = 0; + } + + //1 Dynamic Primary CCA Main Function + if(PrimaryCCA->Monitor_flag == 0) + { + if(Is40MHz) // if RFBW==40M mode which require to process primary cca + { + //2 STA is NOT Connected + if(!bConnected) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA NOT Connected!!!!\n")); + + if(PrimaryCCA->PriCCA_flag == 1) // reset primary cca when STA is disconnected + { + PrimaryCCA->PriCCA_flag = 0; + ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 0); + } + if(PrimaryCCA->DupRTS_flag == 1) // reset Duplicate RTS when STA is disconnected + PrimaryCCA->DupRTS_flag = 0; + + if(SecCHOffset == 1) // secondary channel is below the primary channel + { + if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9)) + { + PrimaryCCA->intf_flag = 1; // secondary channel interference is detected!!! + if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) + PrimaryCCA->intf_type = 1; // interference is shift + else + PrimaryCCA->intf_type = 2; // interference is in-band + } + else + { + PrimaryCCA->intf_flag = 0; + PrimaryCCA->intf_type = 0; + } + } + else if(SecCHOffset == 2) // secondary channel is above the primary channel + { + if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9)) + { + PrimaryCCA->intf_flag = 1; // secondary channel interference is detected!!! + if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) + PrimaryCCA->intf_type = 1; // interference is shift + else + PrimaryCCA->intf_type = 2; // interference is in-band + } + else + { + PrimaryCCA->intf_flag = 0; + PrimaryCCA->intf_type = 0; + } + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("PrimaryCCA=%d\n",PrimaryCCA->PriCCA_flag)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Intf_Type=%d\n", PrimaryCCA->intf_type)); + } + //2 STA is Connected + else + { + if(Client_40MHz == 0) //3 // client BW = 20MHz + { + if(PrimaryCCA->PriCCA_flag == 0) + { + PrimaryCCA->PriCCA_flag = 1; + if(SecCHOffset==1) + ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2); + else if(SecCHOffset==2) + ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1); + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA Connected 20M!!! PrimaryCCA=%d\n", PrimaryCCA->PriCCA_flag)); + } + else //3 // client BW = 40MHz + { + if(PrimaryCCA->intf_flag == 1) // interference is detected!! + { + if(PrimaryCCA->intf_type == 1) + { + if(PrimaryCCA->PriCCA_flag!=1) + { + PrimaryCCA->PriCCA_flag = 1; + if(SecCHOffset==1) + ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2); + else if(SecCHOffset==2) + ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1); + } + } + else if(PrimaryCCA->intf_type == 2) + { + if(PrimaryCCA->DupRTS_flag!=1) + PrimaryCCA->DupRTS_flag = 1; + } + } + else // if intf_flag==0 + { + if((curTxOkCnt+curRxOkCnt)<10000) //idle mode or TP traffic is very low + { + if(SecCHOffset == 1) + { + if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9)) + { + PrimaryCCA->intf_flag = 1; + if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) + PrimaryCCA->intf_type = 1; // interference is shift + else + PrimaryCCA->intf_type = 2; // interference is in-band + } + } + else if(SecCHOffset == 2) + { + if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9)) + { + PrimaryCCA->intf_flag = 1; + if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) + PrimaryCCA->intf_type = 1; // interference is shift + else + PrimaryCCA->intf_type = 2; // interference is in-band + } + + } + } + else // TP Traffic is High + { + if(SecCHOffset == 1) + { + if(FalseAlmCnt->Cnt_BW_LSC > (FalseAlmCnt->Cnt_BW_USC+500)) + { + if(Delay == 0) // add delay to avoid interference occurring abruptly, jump one time + { + PrimaryCCA->intf_flag = 1; + if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) + PrimaryCCA->intf_type = 1; // interference is shift + else + PrimaryCCA->intf_type = 2; // interference is in-band + Delay = 1; + } + else + Delay = 0; + } + } + else if(SecCHOffset == 2) + { + if(FalseAlmCnt->Cnt_BW_USC > (FalseAlmCnt->Cnt_BW_LSC+500)) + { + if(Delay == 0) // add delay to avoid interference occurring abruptly + { + PrimaryCCA->intf_flag = 1; + if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1) + PrimaryCCA->intf_type = 1; // interference is shift + else + PrimaryCCA->intf_type = 2; // interference is in-band + Delay = 1; + } + else + Delay = 0; + } + } + } + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Primary CCA=%d\n", PrimaryCCA->PriCCA_flag)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Duplicate RTS=%d\n", PrimaryCCA->DupRTS_flag)); + } + + }// end of connected + } + } + //1 Dynamic Primary CCA Monitor Counter + if((PrimaryCCA->PriCCA_flag == 1)||(PrimaryCCA->DupRTS_flag == 1)) + { + if(Client_40MHz == 0) // client=20M no need to monitor primary cca flag + { + Client_40MHz_pre = Client_40MHz; + return; + } + Counter++; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Counter=%d\n", Counter)); + if((Counter == 30)||((Client_40MHz -Client_40MHz_pre)==1)) // Every 60 sec to monitor one time + { + PrimaryCCA->Monitor_flag = 1; // monitor flag is triggered!!!!! + if(PrimaryCCA->PriCCA_flag == 1) + { + PrimaryCCA->PriCCA_flag = 0; + ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 0); + } + Counter = 0; + } + } + } + + Client_40MHz_pre = Client_40MHz; +} +#else //#if (RTL8188E_SUPPORT == 1) +VOID +ODM_UpdateRxIdleAnt_88E(IN PDM_ODM_T pDM_Odm, IN u1Byte Ant) +{ +} +VOID +odm_PrimaryCCA_Init( + IN PDM_ODM_T pDM_Odm) +{ +} +VOID +odm_DynamicPrimaryCCA( + IN PDM_ODM_T pDM_Odm + ) +{ +} +BOOLEAN +ODM_DynamicPrimaryCCA_DupRTS( + IN PDM_ODM_T pDM_Odm + ) +{ + return FALSE; +} +#endif //#if (RTL8188E_SUPPORT == 1) + diff --git a/hal/OUTSRC/rtl8188e/odm_RTL8188E.h b/hal/odm_RTL8188E.h similarity index 100% rename from hal/OUTSRC/rtl8188e/odm_RTL8188E.h rename to hal/odm_RTL8188E.h diff --git a/hal/odm_RegConfig8188E.c b/hal/odm_RegConfig8188E.c old mode 100644 new mode 100755 index 18c0533..973a841 --- a/hal/odm_RegConfig8188E.c +++ b/hal/odm_RegConfig8188E.c @@ -1,7 +1,7 @@ /****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * + * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. @@ -20,111 +20,190 @@ #include "odm_precomp.h" -void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, - u32 Data, enum ODM_RF_RADIO_PATH RF_PATH, - u32 RegAddr) +#if (RTL8188E_SUPPORT == 1) + +void +odm_ConfigRFReg_8188E( + IN PDM_ODM_T pDM_Odm, + IN u4Byte Addr, + IN u4Byte Data, + IN ODM_RF_RADIO_PATH_E RF_PATH, + IN u4Byte RegAddr + ) { - if (Addr == 0xffe) { + if(Addr == 0xffe) + { + #ifdef CONFIG_LONG_DELAY_ISSUE ODM_sleep_ms(50); - } else if (Addr == 0xfd) { + #else + ODM_delay_ms(50); + #endif + } + else if (Addr == 0xfd) + { ODM_delay_ms(5); - } else if (Addr == 0xfc) { + } + else if (Addr == 0xfc) + { ODM_delay_ms(1); - } else if (Addr == 0xfb) { + } + else if (Addr == 0xfb) + { ODM_delay_us(50); - } else if (Addr == 0xfa) { + } + else if (Addr == 0xfa) + { ODM_delay_us(5); - } else if (Addr == 0xf9) { - ODM_delay_us(1); - } else { - ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); - /* Add 1us delay between BB/RF register setting. */ + } + else if (Addr == 0xf9) + { ODM_delay_us(1); } + else + { + ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); + // Add 1us delay between BB/RF register setting. + ODM_delay_us(1); + } } -void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data) + +void +odm_ConfigRF_RadioA_8188E( + IN PDM_ODM_T pDM_Odm, + IN u4Byte Addr, + IN u4Byte Data + ) { - u32 content = 0x1000; /* RF_Content: radioa_txt */ - u32 maskforPhySet = (u32)(content&0xE000); + u4Byte content = 0x1000; // RF_Content: radioa_txt + u4Byte maskforPhySet= (u4Byte)(content&0xE000); - odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_A, Addr|maskforPhySet); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data)); + odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_A, Addr|maskforPhySet); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data)); } -void odm_ConfigRF_RadioB_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data) +void +odm_ConfigRF_RadioB_8188E( + IN PDM_ODM_T pDM_Odm, + IN u4Byte Addr, + IN u4Byte Data + ) { - u32 content = 0x1001; /* RF_Content: radiob_txt */ - u32 maskforPhySet = (u32)(content&0xE000); + u4Byte content = 0x1001; // RF_Content: radiob_txt + u4Byte maskforPhySet= (u4Byte)(content&0xE000); - odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet); - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data)); + odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data)); + } -void odm_ConfigMAC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u8 Data) +void +odm_ConfigMAC_8188E( + IN PDM_ODM_T pDM_Odm, + IN u4Byte Addr, + IN u1Byte Data + ) { ODM_Write1Byte(pDM_Odm, Addr, Data); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data)); } -void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data) +void +odm_ConfigBB_AGC_8188E( + IN PDM_ODM_T pDM_Odm, + IN u4Byte Addr, + IN u4Byte Bitmask, + IN u4Byte Data + ) { - ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); - /* Add 1us delay between BB/RF register setting. */ + ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); + // Add 1us delay between BB/RF register setting. ODM_delay_us(1); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, - ("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n", - Addr, Data)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n", Addr, Data)); } - -void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, - u32 Bitmask, u32 Data) -{ - if (Addr == 0xfe) { + +void +odm_ConfigBB_PHY_REG_PG_8188E( + IN PDM_ODM_T pDM_Odm, + IN u4Byte Addr, + IN u4Byte Bitmask, + IN u4Byte Data + ) +{ + if (Addr == 0xfe){ + #ifdef CONFIG_LONG_DELAY_ISSUE ODM_sleep_ms(50); - } else if (Addr == 0xfd) { + #else + ODM_delay_ms(50); + #endif + } + else if (Addr == 0xfd){ ODM_delay_ms(5); - } else if (Addr == 0xfc) { + } + else if (Addr == 0xfc){ ODM_delay_ms(1); - } else if (Addr == 0xfb) { + } + else if (Addr == 0xfb){ ODM_delay_us(50); - } else if (Addr == 0xfa) { + } + else if (Addr == 0xfa){ ODM_delay_us(5); - } else if (Addr == 0xf9) { + } + else if (Addr == 0xf9){ ODM_delay_us(1); - } else{ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, - ("===> @@@@@@@ ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", - Addr, Bitmask, Data)); + } + else{ + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, ("===> @@@@@@@ ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data)); + + #if !(DM_ODM_SUPPORT_TYPE&ODM_AP) storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data); + #endif } + } -void odm_ConfigBB_PHY_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data) -{ - if (Addr == 0xfe) { +void +odm_ConfigBB_PHY_8188E( + IN PDM_ODM_T pDM_Odm, + IN u4Byte Addr, + IN u4Byte Bitmask, + IN u4Byte Data + ) +{ + if (Addr == 0xfe){ + #ifdef CONFIG_LONG_DELAY_ISSUE ODM_sleep_ms(50); - } else if (Addr == 0xfd) { + #else + ODM_delay_ms(50); + #endif + } + else if (Addr == 0xfd){ ODM_delay_ms(5); - } else if (Addr == 0xfc) { + } + else if (Addr == 0xfc){ ODM_delay_ms(1); - } else if (Addr == 0xfb) { + } + else if (Addr == 0xfb){ ODM_delay_us(50); - } else if (Addr == 0xfa) { + } + else if (Addr == 0xfa){ ODM_delay_us(5); - } else if (Addr == 0xf9) { + } + else if (Addr == 0xf9){ ODM_delay_us(1); - } else { + } + else{ if (Addr == 0xa24) - pDM_Odm->RFCalibrateInfo.RegA24 = Data; - ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); - - /* Add 1us delay between BB/RF register setting. */ + pDM_Odm->RFCalibrateInfo.RegA24 = Data; + ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); + + // Add 1us delay between BB/RF register setting. ODM_delay_us(1); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, - ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", - Addr, Data)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data)); } } +#endif + diff --git a/hal/OUTSRC/rtl8188e/odm_RegConfig8188E.h b/hal/odm_RegConfig8188E.h similarity index 100% rename from hal/OUTSRC/rtl8188e/odm_RegConfig8188E.h rename to hal/odm_RegConfig8188E.h diff --git a/hal/OUTSRC/odm_RegDefine11AC.h b/hal/odm_RegDefine11AC.h similarity index 100% rename from hal/OUTSRC/odm_RegDefine11AC.h rename to hal/odm_RegDefine11AC.h diff --git a/hal/OUTSRC/odm_RegDefine11N.h b/hal/odm_RegDefine11N.h similarity index 100% rename from hal/OUTSRC/odm_RegDefine11N.h rename to hal/odm_RegDefine11N.h diff --git a/hal/odm_debug.c b/hal/odm_debug.c old mode 100644 new mode 100755 index 84caadd..7db60cf --- a/hal/odm_debug.c +++ b/hal/odm_debug.c @@ -1,32 +1,627 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -/* include files */ - -#include "odm_precomp.h" - -void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm) -{ - pDM_Odm->DebugLevel = ODM_DBG_TRACE; - - pDM_Odm->DebugComponents = 0; -} - -u32 GlobalDebugLevel; +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +//============================================================ +// include files +//============================================================ + +#include "odm_precomp.h" + +VOID +ODM_InitDebugSetting( + IN PDM_ODM_T pDM_Odm + ) +{ +pDM_Odm->DebugLevel = ODM_DBG_TRACE; + +pDM_Odm->DebugComponents = +\ +#if DBG +//BB Functions +// ODM_COMP_DIG | +// ODM_COMP_RA_MASK | +// ODM_COMP_DYNAMIC_TXPWR | +// ODM_COMP_FA_CNT | +// ODM_COMP_RSSI_MONITOR | +// ODM_COMP_CCK_PD | +// ODM_COMP_ANT_DIV | +// ODM_COMP_PWR_SAVE | +// ODM_COMP_PWR_TRAIN | +// ODM_COMP_RATE_ADAPTIVE | +// ODM_COMP_PATH_DIV | +// ODM_COMP_DYNAMIC_PRICCA | +// ODM_COMP_RXHP | + +//MAC Functions +// ODM_COMP_EDCA_TURBO | +// ODM_COMP_EARLY_MODE | +//RF Functions +// ODM_COMP_TX_PWR_TRACK | +// ODM_COMP_RX_GAIN_TRACK | +// ODM_COMP_CALIBRATION | +//Common +// ODM_COMP_COMMON | +// ODM_COMP_INIT | +#endif + 0; +} + +#if 0 +/*------------------Declare variable----------------------- +// Define debug flag array for common debug print macro. */ +u4Byte ODM_DBGP_Type[ODM_DBGP_TYPE_MAX]; + +/* Define debug print header for every service module. */ +ODM_DBGP_HEAD_T ODM_DBGP_Head; + + +/*----------------------------------------------------------------------------- + * Function: DBGP_Flag_Init + * + * Overview: Refresh all debug print control flag content to zero. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 10/20/2006 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +extern void ODM_DBGP_Flag_Init(void) +{ + u1Byte i; + + for (i = 0; i < ODM_DBGP_TYPE_MAX; i++) + { + ODM_DBGP_Type[i] = 0; + } + +#ifndef ADSL_AP_BUILD_WORKAROUND +#if DBG + // 2010/06/02 MH Free build driver can not out any debug message!!! + // Init Debug flag enable condition + + ODM_DBGP_Type[FINIT] = \ +// INIT_EEPROM | +// INIT_TxPower | +// INIT_IQK | +// INIT_RF | + 0; + + ODM_DBGP_Type[FDM] = \ +// WA_IOT | +// DM_PWDB | +// DM_Monitor | +// DM_DIG | +// DM_EDCA_Turbo | +// DM_BT30 | + 0; + + ODM_DBGP_Type[FIOCTL] = \ +// IOCTL_IRP | +// IOCTL_IRP_DETAIL | +// IOCTL_IRP_STATISTICS | +// IOCTL_IRP_HANDLE | +// IOCTL_BT_HCICMD | +// IOCTL_BT_HCICMD_DETAIL | +// IOCTL_BT_HCICMD_EXT | +// IOCTL_BT_EVENT | +// IOCTL_BT_EVENT_DETAIL | +// IOCTL_BT_EVENT_PERIODICAL | +// IOCTL_BT_TX_ACLDATA | +// IOCTL_BT_TX_ACLDATA_DETAIL | +// IOCTL_BT_RX_ACLDATA | +// IOCTL_BT_RX_ACLDATA_DETAIL | +// IOCTL_BT_TP | +// IOCTL_STATE | +// IOCTL_BT_LOGO | +// IOCTL_CALLBACK_FUN | +// IOCTL_PARSE_BT_PKT | + 0; + + ODM_DBGP_Type[FBT] = \ +// BT_TRACE | + 0; + + ODM_DBGP_Type[FEEPROM] = \ +// EEPROM_W | +// EFUSE_PG | +// EFUSE_READ_ALL | +// EFUSE_ANALYSIS | +// EFUSE_PG_DETAIL | + 0; + + ODM_DBGP_Type[FDBG_CTRL] = \ +// DBG_CTRL_TRACE | +// DBG_CTRL_INBAND_NOISE | + 0; + + // 2011/07/20 MH Add for short cut + ODM_DBGP_Type[FSHORT_CUT] = \ +// SHCUT_TX | +// SHCUT_RX | + 0; + +#endif +#endif + /* Define debug header of every service module. */ + //ODM_DBGP_Head.pMANS = "\n\r[MANS] "; + //ODM_DBGP_Head.pRTOS = "\n\r[RTOS] "; + //ODM_DBGP_Head.pALM = "\n\r[ALM] "; + //ODM_DBGP_Head.pPEM = "\n\r[PEM] "; + //ODM_DBGP_Head.pCMPK = "\n\r[CMPK] "; + //ODM_DBGP_Head.pRAPD = "\n\r[RAPD] "; + //ODM_DBGP_Head.pTXPB = "\n\r[TXPB] "; + //ODM_DBGP_Head.pQUMG = "\n\r[QUMG] "; + +} /* DBGP_Flag_Init */ + +#endif + + +#if 0 +u4Byte GlobalDebugLevel = DBG_LOUD; +// +// 2009/06/22 MH Allow Fre build to print none debug info at init time. +// +#if DBG +u8Byte GlobalDebugComponents = \ +// COMP_TRACE | +// COMP_DBG | +// COMP_INIT | +// COMP_OID_QUERY | +// COMP_OID_SET | +// COMP_RECV | +// COMP_SEND | +// COMP_IO | +// COMP_POWER | +// COMP_MLME | +// COMP_SCAN | +// COMP_SYSTEM | +// COMP_SEC | +// COMP_AP | +// COMP_TURBO | +// COMP_QOS | +// COMP_AUTHENTICATOR | +// COMP_BEACON | +// COMP_ANTENNA | +// COMP_RATE | +// COMP_EVENTS | +// COMP_FPGA | +// COMP_RM | +// COMP_MP | +// COMP_RXDESC | +// COMP_CKIP | +// COMP_DIG | +// COMP_TXAGC | +// COMP_HIPWR | +// COMP_HALDM | +// COMP_RSNA | +// COMP_INDIC | +// COMP_LED | +// COMP_RF | +// COMP_DUALMACSWITCH | +// COMP_EASY_CONCURRENT | + +//1!!!!!!!!!!!!!!!!!!!!!!!!!!! +//1//1Attention Please!!!<11n or 8190 specific code should be put below this line> +//1!!!!!!!!!!!!!!!!!!!!!!!!!!! + +// COMP_HT | +// COMP_POWER_TRACKING | +// COMP_RX_REORDER | +// COMP_AMSDU | +// COMP_WPS | +// COMP_RATR | +// COMP_RESET | +// COMP_CMD | +// COMP_EFUSE | +// COMP_MESH_INTERWORKING | +// COMP_CCX | +// COMP_IOCTL | +// COMP_GP | +// COMP_TXAGG | +// COMP_BB_POWERSAVING | +// COMP_SWAS | +// COMP_P2P | +// COMP_MUX | +// COMP_FUNC | +// COMP_TDLS | +// COMP_OMNIPEEK | +// COMP_PSD | + 0; + + +#else +#define FuncEntry +#define FuncExit +u8Byte GlobalDebugComponents = 0; +#endif + +#if (RT_PLATFORM==PLATFORM_LINUX) +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) +EXPORT_SYMBOL(GlobalDebugComponents); +EXPORT_SYMBOL(GlobalDebugLevel); +#endif +#endif + +/*------------------Declare variable----------------------- +// Define debug flag array for common debug print macro. */ +u4Byte DBGP_Type[DBGP_TYPE_MAX]; + +/* Define debug print header for every service module. */ +DBGP_HEAD_T DBGP_Head; + + +/*----------------------------------------------------------------------------- + * Function: DBGP_Flag_Init + * + * Overview: Refresh all debug print control flag content to zero. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 10/20/2006 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +extern void DBGP_Flag_Init(void) +{ + u1Byte i; + + for (i = 0; i < DBGP_TYPE_MAX; i++) + { + DBGP_Type[i] = 0; + } + +#if DBG + // 2010/06/02 MH Free build driver can not out any debug message!!! + // Init Debug flag enable condition + + DBGP_Type[FINIT] = \ +// INIT_EEPROM | +// INIT_TxPower | +// INIT_IQK | +// INIT_RF | + 0; + + DBGP_Type[FDM] = \ +// WA_IOT | +// DM_PWDB | +// DM_Monitor | +// DM_DIG | +// DM_EDCA_Turbo | +// DM_BT30 | + 0; + + DBGP_Type[FIOCTL] = \ +// IOCTL_IRP | +// IOCTL_IRP_DETAIL | +// IOCTL_IRP_STATISTICS | +// IOCTL_IRP_HANDLE | +// IOCTL_BT_HCICMD | +// IOCTL_BT_HCICMD_DETAIL | +// IOCTL_BT_HCICMD_EXT | +// IOCTL_BT_EVENT | +// IOCTL_BT_EVENT_DETAIL | +// IOCTL_BT_EVENT_PERIODICAL | +// IOCTL_BT_TX_ACLDATA | +// IOCTL_BT_TX_ACLDATA_DETAIL | +// IOCTL_BT_RX_ACLDATA | +// IOCTL_BT_RX_ACLDATA_DETAIL | +// IOCTL_BT_TP | +// IOCTL_STATE | +// IOCTL_BT_LOGO | +// IOCTL_CALLBACK_FUN | +// IOCTL_PARSE_BT_PKT | + 0; + + DBGP_Type[FBT] = \ +// BT_TRACE | + 0; + + DBGP_Type[FEEPROM] = \ +// EEPROM_W | +// EFUSE_PG | +// EFUSE_READ_ALL | +// EFUSE_ANALYSIS | +// EFUSE_PG_DETAIL | + 0; + + DBGP_Type[FDBG_CTRL] = \ +// DBG_CTRL_TRACE | +// DBG_CTRL_INBAND_NOISE | + 0; + + // 2011/07/20 MH Add for short cut + DBGP_Type[FSHORT_CUT] = \ +// SHCUT_TX | +// SHCUT_RX | + 0; + +#endif + /* Define debug header of every service module. */ + DBGP_Head.pMANS = "\n\r[MANS] "; + DBGP_Head.pRTOS = "\n\r[RTOS] "; + DBGP_Head.pALM = "\n\r[ALM] "; + DBGP_Head.pPEM = "\n\r[PEM] "; + DBGP_Head.pCMPK = "\n\r[CMPK] "; + DBGP_Head.pRAPD = "\n\r[RAPD] "; + DBGP_Head.pTXPB = "\n\r[TXPB] "; + DBGP_Head.pQUMG = "\n\r[QUMG] "; + +} /* DBGP_Flag_Init */ + + +/*----------------------------------------------------------------------------- + * Function: DBG_PrintAllFlag + * + * Overview: Print All debug flag + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 12/10/2008 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +extern void DBG_PrintAllFlag(void) +{ + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 0 FQoS\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 1 FTX\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 2 FRX\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 3 FSEC\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 4 FMGNT\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 5 FMLME\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 6 FRESOURCE\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 7 FBEACON\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 8 FISR\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 9 FPHY\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 11 FMP\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 12 FPWR\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 13 FDM\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 14 FDBG_CTRL\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 15 FC2H\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("DBGFLAG 16 FBT\n")); +} // DBG_PrintAllFlag + + +extern void DBG_PrintAllComp(void) +{ + u1Byte i; + + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("GlobalDebugComponents Definition\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT0 COMP_TRACE\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT1 COMP_DBG\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT2 COMP_INIT\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT3 COMP_OID_QUERY\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT4 COMP_OID_SET\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT5 COMP_RECV\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT6 COMP_SEND\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT7 COMP_IO\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT8 COMP_POWER\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT9 COMP_MLME\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT10 COMP_SCAN\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT11 COMP_SYSTEM\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT12 COMP_SEC\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT13 COMP_AP\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT14 COMP_TURBO\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT15 COMP_QOS\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT16 COMP_AUTHENTICATOR\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT17 COMP_BEACON\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT18 COMP_BEACON\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT19 COMP_RATE\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT20 COMP_EVENTS\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT21 COMP_FPGA\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT22 COMP_RM\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT23 COMP_MP\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT24 COMP_RXDESC\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT25 COMP_CKIP\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT26 COMP_DIG\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT27 COMP_TXAGC\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT28 COMP_HIPWR\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT29 COMP_HALDM\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT30 COMP_RSNA\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT31 COMP_INDIC\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT32 COMP_LED\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT33 COMP_RF\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT34 COMP_HT\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT35 COMP_POWER_TRACKING\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT36 COMP_POWER_TRACKING\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT37 COMP_AMSDU\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT38 COMP_WPS\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT39 COMP_RATR\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT40 COMP_RESET\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT41 COMP_CMD\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT42 COMP_EFUSE\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT43 COMP_MESH_INTERWORKING\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT43 COMP_CCX\n")); + + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("GlobalDebugComponents = %"i64fmt"x\n", GlobalDebugComponents)); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("Enable DBG COMP =")); + for (i = 0; i < 64; i++) + { + if (GlobalDebugComponents & ((u8Byte)0x1 << i) ) + { + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT%02d |\n", i)); + } + } + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("\n")); + +} // DBG_PrintAllComp + + +/*----------------------------------------------------------------------------- + * Function: DBG_PrintFlagEvent + * + * Overview: Print dedicated debug flag event + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 12/10/2008 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +extern void DBG_PrintFlagEvent(u1Byte DbgFlag) +{ + switch(DbgFlag) + { + case FQoS: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 QoS_INIT\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 QoS_VISTA\n")); + break; + + case FTX: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 TX_DESC\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 TX_DESC_TID\n")); + break; + + case FRX: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 RX_DATA\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 RX_PHY_STS\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 2 RX_PHY_SS\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 3 RX_PHY_SQ\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 4 RX_PHY_ASTS\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 5 RX_ERR_LEN\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 6 RX_DEFRAG\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 7 RX_ERR_RATE\n")); + break; + + case FSEC: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("NA\n")); + break; + + case FMGNT: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("NA\n")); + break; + + case FMLME: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 MEDIA_STS\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 LINK_STS\n")); + break; + + case FRESOURCE: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 OS_CHK\n")); + break; + + case FBEACON: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 BCN_SHOW\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 BCN_PEER\n")); + break; + + case FISR: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 ISR_CHK\n")); + break; + + case FPHY: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 PHY_BBR\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 PHY_BBW\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 2 PHY_RFR\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 3 PHY_RFW\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 4 PHY_MACR\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 5 PHY_MACW\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 6 PHY_ALLR\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 7 PHY_ALLW\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 8 PHY_TXPWR\n")); + break; + + case FMP: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 MP_RX\n")); + break; + + case FEEPROM: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 EEPROM_W\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 EFUSE_PG\n")); + break; + + case FPWR: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 LPS\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 IPS\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 2 PWRSW\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 3 PWRHW\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 4 PWRHAL\n")); + break; + + case FDM: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 WA_IOT\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 DM_PWDB\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 2 DM_Monitor\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 3 DM_DIG\n")); + break; + + case FDBG_CTRL: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 DBG_CTRL_TRACE\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 DBG_CTRL_INBAND_NOISE\n")); + break; + + case FC2H: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 C2H_Summary\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 C2H_PacketData\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 2 C2H_ContentData\n")); + break; + + case FBT: + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 BT_TRACE\n")); + ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 1 BT_RFPoll\n")); + break; + + default: + break; + } + +} // DBG_PrintFlagEvent + + +extern void DBG_DumpMem(const u1Byte DbgComp, + const u1Byte DbgLevel, + pu1Byte pMem, + u2Byte Len) +{ + u2Byte i; + + for (i=0;i<((Len>>3) + 1);i++) + { + ODM_RT_TRACE(pDM_Odm,DbgComp, DbgLevel, ("%02X %02X %02X %02X %02X %02X %02X %02X\n", + *(pMem+(i*8)), *(pMem+(i*8+1)), *(pMem+(i*8+2)), *(pMem+(i*8+3)), + *(pMem+(i*8+4)), *(pMem+(i*8+5)), *(pMem+(i*8+6)), *(pMem+(i*8+7)))); + + } +} + + +#endif + diff --git a/hal/OUTSRC/odm_debug.h b/hal/odm_debug.h similarity index 100% rename from hal/OUTSRC/odm_debug.h rename to hal/odm_debug.h diff --git a/hal/odm_interface.c b/hal/odm_interface.c old mode 100644 new mode 100755 index 59ad5bf..7f6dd58 --- a/hal/odm_interface.c +++ b/hal/odm_interface.c @@ -1,203 +1,666 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -#include "odm_precomp.h" -/* ODM IO Relative API. */ - -u8 ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - return rtw_read8(Adapter, RegAddr); -} - -u16 ODM_Read2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - return rtw_read16(Adapter, RegAddr); -} - -u32 ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - return rtw_read32(Adapter, RegAddr); -} - -void ODM_Write1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u8 Data) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - rtw_write8(Adapter, RegAddr, Data); -} - -void ODM_Write2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u16 Data) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - rtw_write16(Adapter, RegAddr, Data); -} - -void ODM_Write4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 Data) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - rtw_write32(Adapter, RegAddr, Data); -} - -void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); -} - -u32 ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - return PHY_QueryBBReg(Adapter, RegAddr, BitMask); -} - -void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); -} - -u32 ODM_GetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - return PHY_QueryBBReg(Adapter, RegAddr, BitMask); -} - -void ODM_SetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u32 RegAddr, u32 BitMask, u32 Data) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask, Data); -} - -u32 ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u32 RegAddr, u32 BitMask) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - return PHY_QueryRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask); -} - -/* ODM Memory relative API. */ -void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u32 length) -{ - *pPtr = rtw_zvmalloc(length); -} - -/* length could be ignored, used to detect memory leakage. */ -void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u32 length) -{ - rtw_vmfree(pPtr, length); -} - -s32 ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2, u32 length) -{ - return _rtw_memcmp(pBuf1, pBuf2, length); -} - -/* ODM MISC relative API. */ -void ODM_AcquireSpinLock(struct odm_dm_struct *pDM_Odm, enum RT_SPINLOCK_TYPE type) -{ -} - -void ODM_ReleaseSpinLock(struct odm_dm_struct *pDM_Odm, enum RT_SPINLOCK_TYPE type) -{ -} - -/* Work item relative API. FOr MP driver only~! */ -void ODM_InitializeWorkItem(struct odm_dm_struct *pDM_Odm, void *pRtWorkItem, - RT_WORKITEM_CALL_BACK RtWorkItemCallback, - void *pContext, const char *szID) -{ -} - -void ODM_StartWorkItem(void *pRtWorkItem) -{ -} - -void ODM_StopWorkItem(void *pRtWorkItem) -{ -} - -void ODM_FreeWorkItem(void *pRtWorkItem) -{ -} - -void ODM_ScheduleWorkItem(void *pRtWorkItem) -{ -} - -void ODM_IsWorkItemScheduled(void *pRtWorkItem) -{ -} - -/* ODM Timer relative API. */ -void ODM_StallExecution(u32 usDelay) -{ - rtw_udelay_os(usDelay); -} - -void ODM_delay_ms(u32 ms) -{ - rtw_mdelay_os(ms); -} - -void ODM_delay_us(u32 us) -{ - rtw_udelay_os(us); -} - -void ODM_sleep_ms(u32 ms) -{ - rtw_msleep_os(ms); -} - -void ODM_sleep_us(u32 us) -{ - rtw_usleep_os(us); -} - -void ODM_SetTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer, u32 msDelay) -{ - _set_timer(pTimer, msDelay); /* ms */ -} - -void ODM_InitializeTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer, - void *CallBackFunc, void *pContext, - const char *szID) -{ - struct adapter *Adapter = pDM_Odm->Adapter; - _init_timer(pTimer, Adapter->pnetdev, CallBackFunc, pDM_Odm); -} - -void ODM_CancelTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer) -{ - _cancel_timer_ex(pTimer); -} - -void ODM_ReleaseTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer) -{ -} - -/* ODM FW relative API. */ -u32 ODM_FillH2CCmd(u8 *pH2CBuffer, u32 H2CBufferLen, u32 CmdNum, - u32 *pElementID, u32 *pCmdLen, - u8 **pCmbBuffer, u8 *CmdStartSeq) -{ - return true; -} +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +//============================================================ +// include files +//============================================================ + +#include "odm_precomp.h" +// +// ODM IO Relative API. +// + +u1Byte +ODM_Read1Byte( + IN PDM_ODM_T pDM_Odm, + IN u4Byte RegAddr + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + prtl8192cd_priv priv = pDM_Odm->priv; + return RTL_R8(RegAddr); +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + return rtw_read8(Adapter,RegAddr); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + return PlatformEFIORead1Byte(Adapter, RegAddr); +#endif + +} + + +u2Byte +ODM_Read2Byte( + IN PDM_ODM_T pDM_Odm, + IN u4Byte RegAddr + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + prtl8192cd_priv priv = pDM_Odm->priv; + return RTL_R16(RegAddr); +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + return rtw_read16(Adapter,RegAddr); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + return PlatformEFIORead2Byte(Adapter, RegAddr); +#endif + +} + + +u4Byte +ODM_Read4Byte( + IN PDM_ODM_T pDM_Odm, + IN u4Byte RegAddr + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + prtl8192cd_priv priv = pDM_Odm->priv; + return RTL_R32(RegAddr); +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + return rtw_read32(Adapter,RegAddr); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + return PlatformEFIORead4Byte(Adapter, RegAddr); +#endif + +} + + +VOID +ODM_Write1Byte( + IN PDM_ODM_T pDM_Odm, + IN u4Byte RegAddr, + IN u1Byte Data + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + prtl8192cd_priv priv = pDM_Odm->priv; + RTL_W8(RegAddr, Data); +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + rtw_write8(Adapter,RegAddr, Data); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + PlatformEFIOWrite1Byte(Adapter, RegAddr, Data); +#endif + +} + + +VOID +ODM_Write2Byte( + IN PDM_ODM_T pDM_Odm, + IN u4Byte RegAddr, + IN u2Byte Data + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + prtl8192cd_priv priv = pDM_Odm->priv; + RTL_W16(RegAddr, Data); +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + rtw_write16(Adapter,RegAddr, Data); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + PlatformEFIOWrite2Byte(Adapter, RegAddr, Data); +#endif + +} + + +VOID +ODM_Write4Byte( + IN PDM_ODM_T pDM_Odm, + IN u4Byte RegAddr, + IN u4Byte Data + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + prtl8192cd_priv priv = pDM_Odm->priv; + RTL_W32(RegAddr, Data); +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + rtw_write32(Adapter,RegAddr, Data); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + PlatformEFIOWrite4Byte(Adapter, RegAddr, Data); +#endif + +} + + +VOID +ODM_SetMACReg( + IN PDM_ODM_T pDM_Odm, + IN u4Byte RegAddr, + IN u4Byte BitMask, + IN u4Byte Data + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); +#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP)) + PADAPTER Adapter = pDM_Odm->Adapter; + PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); +#endif +} + + +u4Byte +ODM_GetMACReg( + IN PDM_ODM_T pDM_Odm, + IN u4Byte RegAddr, + IN u4Byte BitMask + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask); +#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP)) + PADAPTER Adapter = pDM_Odm->Adapter; + return PHY_QueryBBReg(Adapter, RegAddr, BitMask); +#endif +} + + +VOID +ODM_SetBBReg( + IN PDM_ODM_T pDM_Odm, + IN u4Byte RegAddr, + IN u4Byte BitMask, + IN u4Byte Data + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); +#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP)) + PADAPTER Adapter = pDM_Odm->Adapter; + PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); +#endif +} + + +u4Byte +ODM_GetBBReg( + IN PDM_ODM_T pDM_Odm, + IN u4Byte RegAddr, + IN u4Byte BitMask + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask); +#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP)) + PADAPTER Adapter = pDM_Odm->Adapter; + return PHY_QueryBBReg(Adapter, RegAddr, BitMask); +#endif +} + + +VOID +ODM_SetRFReg( + IN PDM_ODM_T pDM_Odm, + IN ODM_RF_RADIO_PATH_E eRFPath, + IN u4Byte RegAddr, + IN u4Byte BitMask, + IN u4Byte Data + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + PHY_SetRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, Data); +#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP)) + PADAPTER Adapter = pDM_Odm->Adapter; + PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data); +#endif +} + + +u4Byte +ODM_GetRFReg( + IN PDM_ODM_T pDM_Odm, + IN ODM_RF_RADIO_PATH_E eRFPath, + IN u4Byte RegAddr, + IN u4Byte BitMask + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + return PHY_QueryRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, 1); +#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP)) + PADAPTER Adapter = pDM_Odm->Adapter; + return PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask); +#endif +} + + + + +// +// ODM Memory relative API. +// +VOID +ODM_AllocateMemory( + IN PDM_ODM_T pDM_Odm, + OUT PVOID *pPtr, + IN u4Byte length + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + *pPtr = kmalloc(length, GFP_ATOMIC); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) + *pPtr = rtw_zvmalloc(length); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + PlatformAllocateMemory(Adapter, pPtr, length); +#endif +} + +// length could be ignored, used to detect memory leakage. +VOID +ODM_FreeMemory( + IN PDM_ODM_T pDM_Odm, + OUT PVOID pPtr, + IN u4Byte length + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + kfree(pPtr); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) + rtw_vmfree(pPtr, length); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + //PADAPTER Adapter = pDM_Odm->Adapter; + PlatformFreeMemory(pPtr, length); +#endif +} +s4Byte ODM_CompareMemory( + IN PDM_ODM_T pDM_Odm, + IN PVOID pBuf1, + IN PVOID pBuf2, + IN u4Byte length + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + return memcmp(pBuf1,pBuf2,length); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) + return _rtw_memcmp(pBuf1,pBuf2,length); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + return PlatformCompareMemory(pBuf1,pBuf2,length); +#endif +} + + + +// +// ODM MISC relative API. +// +VOID +ODM_AcquireSpinLock( + IN PDM_ODM_T pDM_Odm, + IN RT_SPINLOCK_TYPE type + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + PlatformAcquireSpinLock(Adapter, type); +#endif +} +VOID +ODM_ReleaseSpinLock( + IN PDM_ODM_T pDM_Odm, + IN RT_SPINLOCK_TYPE type + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + PlatformReleaseSpinLock(Adapter, type); +#endif +} + +// +// Work item relative API. FOr MP driver only~! +// +VOID +ODM_InitializeWorkItem( + IN PDM_ODM_T pDM_Odm, + IN PRT_WORK_ITEM pRtWorkItem, + IN RT_WORKITEM_CALL_BACK RtWorkItemCallback, + IN PVOID pContext, + IN const char* szID + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + PlatformInitializeWorkItem(Adapter, pRtWorkItem, RtWorkItemCallback, pContext, szID); +#endif +} + + +VOID +ODM_StartWorkItem( + IN PRT_WORK_ITEM pRtWorkItem + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PlatformStartWorkItem(pRtWorkItem); +#endif +} + + +VOID +ODM_StopWorkItem( + IN PRT_WORK_ITEM pRtWorkItem + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PlatformStopWorkItem(pRtWorkItem); +#endif +} + + +VOID +ODM_FreeWorkItem( + IN PRT_WORK_ITEM pRtWorkItem + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PlatformFreeWorkItem(pRtWorkItem); +#endif +} + + +VOID +ODM_ScheduleWorkItem( + IN PRT_WORK_ITEM pRtWorkItem + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PlatformScheduleWorkItem(pRtWorkItem); +#endif +} + + +VOID +ODM_IsWorkItemScheduled( + IN PRT_WORK_ITEM pRtWorkItem + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PlatformIsWorkItemScheduled(pRtWorkItem); +#endif +} + + + +// +// ODM Timer relative API. +// +VOID +ODM_StallExecution( + IN u4Byte usDelay + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + rtw_udelay_os(usDelay); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PlatformStallExecution(usDelay); +#endif +} + +VOID +ODM_delay_ms(IN u4Byte ms) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + delay_ms(ms); +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + rtw_mdelay_os(ms); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + delay_ms(ms); +#endif +} + +VOID +ODM_delay_us(IN u4Byte us) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + delay_us(us); +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + rtw_udelay_os(us); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PlatformStallExecution(us); +#endif +} + +VOID +ODM_sleep_ms(IN u4Byte ms) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + rtw_msleep_os(ms); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) +#endif +} + +VOID +ODM_sleep_us(IN u4Byte us) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + rtw_usleep_os(us); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) +#endif +} + +VOID +ODM_SetTimer( + IN PDM_ODM_T pDM_Odm, + IN PRT_TIMER pTimer, + IN u4Byte msDelay + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + mod_timer(pTimer, jiffies + (msDelay+9)/10); +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + _set_timer(pTimer,msDelay ); //ms +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + PlatformSetTimer(Adapter, pTimer, msDelay); +#endif + +} + +VOID +ODM_InitializeTimer( + IN PDM_ODM_T pDM_Odm, + IN PRT_TIMER pTimer, + IN RT_TIMER_CALL_BACK CallBackFunc, + IN PVOID pContext, + IN const char* szID + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + pTimer->function = CallBackFunc; + pTimer->data = (unsigned long)pDM_Odm; + init_timer(pTimer); +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + _init_timer(pTimer,Adapter->pnetdev,CallBackFunc,pDM_Odm); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + PlatformInitializeTimer(Adapter, pTimer, CallBackFunc,pContext,szID); +#endif +} + + +VOID +ODM_CancelTimer( + IN PDM_ODM_T pDM_Odm, + IN PRT_TIMER pTimer + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + del_timer_sync(pTimer); +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + _cancel_timer_ex(pTimer); +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + PADAPTER Adapter = pDM_Odm->Adapter; + PlatformCancelTimer(Adapter, pTimer); +#endif +} + + +VOID +ODM_ReleaseTimer( + IN PDM_ODM_T pDM_Odm, + IN PRT_TIMER pTimer + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + + PADAPTER Adapter = pDM_Odm->Adapter; + + // <20120301, Kordan> If the initilization fails, InitializeAdapterXxx will return regardless of InitHalDm. + // Hence, uninitialized timers cause BSOD when the driver releases resources since the init fail. + if (pTimer == 0) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_SERIOUS, ("=====>ODM_ReleaseTimer(), The timer is NULL! Please check it!\n")); + return; + } + + PlatformReleaseTimer(Adapter, pTimer); +#endif +} + + +// +// ODM FW relative API. +// +#if (DM_ODM_SUPPORT_TYPE & ODM_MP) +VOID +ODM_FillH2CCmd( + IN PADAPTER Adapter, + IN u1Byte ElementID, + IN u4Byte CmdLen, + IN pu1Byte pCmdBuffer +) +{ + if(IS_HARDWARE_TYPE_JAGUAR(Adapter)) + { + switch(ElementID) + { + case ODM_H2C_RSSI_REPORT: + FillH2CCmd8812(Adapter, H2C_8812_RSSI_REPORT, CmdLen, pCmdBuffer); + default: + break; + } + + } + else if(IS_HARDWARE_TYPE_8188E(Adapter)) + { + switch(ElementID) + { + case ODM_H2C_PSD_RESULT: + FillH2CCmd88E(Adapter, H2C_88E_PSD_RESULT, CmdLen, pCmdBuffer); + default: + break; + } + } + else + { + switch(ElementID) + { + case ODM_H2C_RSSI_REPORT: + FillH2CCmd92C(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer); + case ODM_H2C_PSD_RESULT: + FillH2CCmd92C(Adapter, H2C_92C_PSD_RESULT, CmdLen, pCmdBuffer); + default: + break; + } + } +} +#else +u4Byte +ODM_FillH2CCmd( + IN pu1Byte pH2CBuffer, + IN u4Byte H2CBufferLen, + IN u4Byte CmdNum, + IN pu4Byte pElementID, + IN pu4Byte pCmdLen, + IN pu1Byte* pCmbBuffer, + IN pu1Byte CmdStartSeq + ) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + +#elif(DM_ODM_SUPPORT_TYPE & ODM_MP) + //FillH2CCmd(pH2CBuffer, H2CBufferLen, CmdNum, pElementID, pCmdLen, pCmbBuffer, CmdStartSeq); + return FALSE; +#endif + + return TRUE; +} +#endif + + + + + diff --git a/hal/OUTSRC/odm_interface.h b/hal/odm_interface.h similarity index 100% rename from hal/OUTSRC/odm_interface.h rename to hal/odm_interface.h diff --git a/hal/OUTSRC/odm_precomp.h b/hal/odm_precomp.h similarity index 78% rename from hal/OUTSRC/odm_precomp.h rename to hal/odm_precomp.h index f40a127..a09943d 100755 --- a/hal/OUTSRC/odm_precomp.h +++ b/hal/odm_precomp.h @@ -120,7 +120,7 @@ #elif(RTL8723AU_SUPPORT==1) #include "rtl8723a/Hal8723UHWImg_CE.h" #elif(RTL8188E_SUPPORT==1) - #include "rtl8188e/Hal8188EFWImg_CE.h" + #include "Hal8188EFWImg_CE.h" #endif #elif (DM_ODM_SUPPORT_TYPE == ODM_MP) @@ -161,8 +161,8 @@ #include "rtl8192c/HalDMOutSrc8192C_CE.h" //for IQK,LCK,Power-tracking #include "rtl8723a_hal.h" #elif (RTL8188E_SUPPORT==1) - #include "rtl8188e/HalPhyRf_8188e.h"//for IQK,LCK,Power-tracking - #include "rtl8188e/Hal8188ERateAdaptive.h"//for RA,Power training + #include "HalPhyRf_8188e.h"//for IQK,LCK,Power-tracking + #include "Hal8188ERateAdaptive.h"//for RA,Power training #include "rtl8188e_hal.h" #endif @@ -171,52 +171,29 @@ #include "odm_interface.h" #include "odm_reg.h" -#if (RTL8192C_SUPPORT==1) -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -#include "rtl8192c/Hal8192CHWImg_MAC.h" -#include "rtl8192c/Hal8192CHWImg_RF.h" -#include "rtl8192c/Hal8192CHWImg_BB.h" -#include "rtl8192c/Hal8192CHWImg_FW.h" -#endif -#include "rtl8192c/odm_RTL8192C.h" -#endif -#if (RTL8192D_SUPPORT==1) -#include "rtl8192d/odm_RTL8192D.h" -#endif - -#if (RTL8723A_SUPPORT==1) -#include "rtl8723a/HalHWImg8723A_MAC.h" -#include "rtl8723a/HalHWImg8723A_RF.h" -#include "rtl8723a/HalHWImg8723A_BB.h" -#include "rtl8723a/HalHWImg8723A_FW.h" -#include "rtl8723a/odm_RegConfig8723A.h" -#endif - -#if (RTL8188E_SUPPORT==1) -#include "rtl8188e/HalHWImg8188E_MAC.h" -#include "rtl8188e/HalHWImg8188E_RF.h" -#include "rtl8188e/HalHWImg8188E_BB.h" -#include "rtl8188e/Hal8188EReg.h" +#include "HalHWImg8188E_MAC.h" +#include "HalHWImg8188E_RF.h" +#include "HalHWImg8188E_BB.h" +#include "Hal8188EReg.h" #if (DM_ODM_SUPPORT_TYPE & ODM_AP) -#include "rtl8188e/HalPhyRf_8188e.h" +#include "HalPhyRf_8188e.h" #endif #if (RTL8188E_FOR_TEST_CHIP >= 1) -#include "rtl8188e/HalHWImg8188E_TestChip_MAC.h" -#include "rtl8188e/HalHWImg8188E_TestChip_RF.h" -#include "rtl8188e/HalHWImg8188E_TestChip_BB.h" +#include "HalHWImg8188E_TestChip_MAC.h" +#include "HalHWImg8188E_TestChip_RF.h" +#include "HalHWImg8188E_TestChip_BB.h" #endif #ifdef CONFIG_WOWLAN #if (RTL8188E_SUPPORT==1) -#include "rtl8188e/HalHWImg8188E_FW.h" +#include "HalHWImg8188E_FW.h" #endif #endif //CONFIG_WOWLAN -#include "rtl8188e/odm_RegConfig8188E.h" -#include "rtl8188e/odm_RTL8188E.h" -#endif +#include "odm_RegConfig8188E.h" +#include "odm_RTL8188E.h" #endif // __ODM_PRECOMP_H__ diff --git a/hal/OUTSRC/odm_reg.h b/hal/odm_reg.h similarity index 100% rename from hal/OUTSRC/odm_reg.h rename to hal/odm_reg.h diff --git a/hal/OUTSRC/odm_types.h b/hal/odm_types.h similarity index 100% rename from hal/OUTSRC/odm_types.h rename to hal/odm_types.h diff --git a/hal/rtl8188e/Hal8188EPwrSeq.c b/hal/rtl8188e/Hal8188EPwrSeq.c deleted file mode 100755 index c38c25a..0000000 --- a/hal/rtl8188e/Hal8188EPwrSeq.c +++ /dev/null @@ -1,97 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -#include "Hal8188EPwrSeq.h" -#include - -/* - drivers should parse below arrays and do the corresponding actions -*/ -//3 Power on Array -WLAN_PWR_CFG rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]= -{ - RTL8188E_TRANS_CARDEMU_TO_ACT - RTL8188E_TRANS_END -}; - -//3Radio off Array -WLAN_PWR_CFG rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_END_STEPS]= -{ - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_END -}; - -//3Card Disable Array -WLAN_PWR_CFG rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]= -{ - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_CARDDIS - RTL8188E_TRANS_END -}; - -//3 Card Enable Array -WLAN_PWR_CFG rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]= -{ - RTL8188E_TRANS_CARDDIS_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_ACT - RTL8188E_TRANS_END -}; - -//3Suspend Array -WLAN_PWR_CFG rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]= -{ - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_SUS - RTL8188E_TRANS_END -}; - -//3 Resume Array -WLAN_PWR_CFG rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]= -{ - RTL8188E_TRANS_SUS_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_ACT - RTL8188E_TRANS_END -}; - - -//3HWPDN Array -WLAN_PWR_CFG rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]= -{ - RTL8188E_TRANS_ACT_TO_CARDEMU - RTL8188E_TRANS_CARDEMU_TO_PDN - RTL8188E_TRANS_END -}; - -//3 Enter LPS -WLAN_PWR_CFG rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS+RTL8188E_TRANS_END_STEPS]= -{ - //FW behavior - RTL8188E_TRANS_ACT_TO_LPS - RTL8188E_TRANS_END -}; - -//3 Leave LPS -WLAN_PWR_CFG rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]= -{ - //FW behavior - RTL8188E_TRANS_LPS_TO_ACT - RTL8188E_TRANS_END -}; - diff --git a/hal/rtl8188e/rtl8188e_cmd.c b/hal/rtl8188e/rtl8188e_cmd.c deleted file mode 100755 index 4decacc..0000000 --- a/hal/rtl8188e/rtl8188e_cmd.c +++ /dev/null @@ -1,1493 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _RTL8188E_CMD_C_ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#define CONFIG_H2C_EF - -#define RTL88E_MAX_H2C_BOX_NUMS 4 -#define RTL88E_MAX_CMD_LEN 7 -#define RTL88E_MESSAGE_BOX_SIZE 4 -#define RTL88E_EX_MESSAGE_BOX_SIZE 4 -#define RTL88E_RSVDPAGE_SIZE 1024 - -static u8 _is_fw_read_cmd_down(_adapter* padapter, u8 msgbox_num) -{ - u8 read_down = _FALSE; - int retry_cnts = 100; - - u8 valid; - - //DBG_8192C(" _is_fw_read_cmd_down ,reg_1cc(%x),msg_box(%d)...\n",rtw_read8(padapter,REG_HMETFR),msgbox_num); - - do{ - valid = rtw_read8(padapter,REG_HMETFR) & BIT(msgbox_num); - if(0 == valid ){ - read_down = _TRUE; - } -#ifdef CONFIG_WOWLAN - rtw_msleep_os(2); -#endif - }while( (!read_down) && (retry_cnts--)); - - return read_down; - -} - - -/***************************************** -* H2C Msg format : -* 0x1DF - 0x1D0 -*| 31 - 8 | 7-5 4 - 0 | -*| h2c_msg |Class_ID CMD_ID | -* -* Extend 0x1FF - 0x1F0 -*|31 - 0 | -*|ext_msg| -******************************************/ -static s32 FillH2CCmd_88E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer) -{ - u8 bcmd_down = _FALSE; - s32 retry_cnts = 100; - u8 h2c_box_num; - u32 msgbox_addr; - u32 msgbox_ex_addr; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - u8 cmd_idx,ext_cmd_len; - u32 h2c_cmd = 0; - u32 h2c_cmd_ex = 0; - s32 ret = _FAIL; - -_func_enter_; - - padapter = GET_PRIMARY_ADAPTER(padapter); - pHalData = GET_HAL_DATA(padapter); - - if(padapter->bFWReady == _FALSE) - { - DBG_8192C("FillH2CCmd_88E(): return H2C cmd because fw is not ready\n"); - return ret; - } - - _enter_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL); - - if (!pCmdBuffer) { - goto exit; - } - if (CmdLen > RTL88E_MAX_CMD_LEN) { - goto exit; - } - if (padapter->bSurpriseRemoved == _TRUE) - goto exit; - - //pay attention to if race condition happened in H2C cmd setting. - do{ - h2c_box_num = pHalData->LastHMEBoxNum; - - if(!_is_fw_read_cmd_down(padapter, h2c_box_num)){ - DBG_8192C(" fw read cmd failed...\n"); - goto exit; - } - - *(u8*)(&h2c_cmd) = ElementID; - - if(CmdLen<=3) - { - _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer, CmdLen ); - } - else{ - _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer,3); - ext_cmd_len = CmdLen-3; - _rtw_memcpy((u8*)(&h2c_cmd_ex), pCmdBuffer+3,ext_cmd_len ); - - //Write Ext command - msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num *RTL88E_EX_MESSAGE_BOX_SIZE); - #ifdef CONFIG_H2C_EF - for(cmd_idx=0;cmd_idxh2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" - // ,pHalData->LastHMEBoxNum ,CmdLen,msgbox_addr,h2c_cmd,msgbox_ex_addr,h2c_cmd_ex); - - pHalData->LastHMEBoxNum = (h2c_box_num+1) % RTL88E_MAX_H2C_BOX_NUMS; - - }while((!bcmd_down) && (retry_cnts--)); - - ret = _SUCCESS; - -exit: - - _exit_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL); - -_func_exit_; - - return ret; -} - -u8 rtl8192c_h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf) -{ - u8 ElementID, CmdLen; - u8 *pCmdBuffer; - struct cmd_msg_parm *pcmdmsg; - - if(!pbuf) - return H2C_PARAMETERS_ERROR; - - pcmdmsg = (struct cmd_msg_parm*)pbuf; - ElementID = pcmdmsg->eid; - CmdLen = pcmdmsg->sz; - pCmdBuffer = pcmdmsg->buf; - - FillH2CCmd_88E(padapter, ElementID, CmdLen, pCmdBuffer); - - return H2C_SUCCESS; -} -/* -#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED) -u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter *padapter ,u8 bfwpoll, u16 period) -{ - u8 res=_SUCCESS; - struct H2C_SS_RFOFF_PARAM param; - DBG_8192C("==>%s bfwpoll(%x)\n",__FUNCTION__,bfwpoll); - param.gpio_period = period;//Polling GPIO_11 period time - param.ROFOn = (_TRUE == bfwpoll)?1:0; - FillH2CCmd_88E(padapter, SELECTIVE_SUSPEND_ROF_CMD, sizeof(param), (u8*)(¶m)); - return res; -} -#endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED -*/ -u8 rtl8188e_set_rssi_cmd(_adapter*padapter, u8 *param) -{ - u8 res=_SUCCESS; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -_func_enter_; - - if(pHalData->fw_ractrl == _TRUE){ - #if 0 - *((u32*) param ) = cpu_to_le32( *((u32*) param ) ); - - FillH2CCmd_88E(padapter, RSSI_SETTING_EID, 3, param); - #endif - }else{ - DBG_8192C("==>%s fw dont support RA \n",__FUNCTION__); - res=_FAIL; - } - -_func_exit_; - - return res; -} - -u8 rtl8188e_set_raid_cmd(_adapter*padapter, u32 mask) -{ - u8 buf[3]; - u8 res=_SUCCESS; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -_func_enter_; - if(pHalData->fw_ractrl == _TRUE){ - _rtw_memset(buf, 0, 3); - mask = cpu_to_le32( mask ); - _rtw_memcpy(buf, &mask, 3); - - FillH2CCmd_88E(padapter, H2C_DM_MACID_CFG, 3, buf); - }else{ - DBG_8192C("==>%s fw dont support RA \n",__FUNCTION__); - res=_FAIL; - } - -_func_exit_; - - return res; - -} - -//bitmap[0:27] = tx_rate_bitmap -//bitmap[28:31]= Rate Adaptive id -//arg[0:4] = macid -//arg[5] = Short GI -void rtl8188e_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 rssi_level) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - //struct dm_priv *pdmpriv = &pHalData->dmpriv; - - u8 macid, init_rate, raid, shortGIrate=_FALSE; - - macid = arg&0x1f; - -#ifdef CONFIG_ODM_REFRESH_RAMASK - raid = (bitmap>>28) & 0x0f; - bitmap &=0x0fffffff; - - if(rssi_level != DM_RATR_STA_INIT) - bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv, macid, bitmap, rssi_level); - - bitmap |= ((raid<<28)&0xf0000000); -#endif //CONFIG_ODM_REFRESH_RAMASK - - - init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f; - - shortGIrate = (arg&BIT(5)) ? _TRUE:_FALSE; - - if (shortGIrate==_TRUE) - init_rate |= BIT(6); - - - //rtw_write8(pAdapter, (REG_INIDATA_RATE_SEL+macid), (u8)init_rate); - - raid = (bitmap>>28) & 0x0f; - - bitmap &= 0x0fffffff; - - DBG_871X("%s=> mac_id:%d , raid:%d , ra_bitmap=0x%x, shortGIrate=0x%02x\n", - __FUNCTION__,macid ,raid ,bitmap, shortGIrate); - - -#if(RATE_ADAPTIVE_SUPPORT == 1) - ODM_RA_UpdateRateInfo_8188E( - &(pHalData->odmpriv), - macid, - raid, - bitmap, - shortGIrate - ); -#endif - -} - -void rtl8188e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode) -{ - SETPWRMODE_PARM H2CSetPwrMode; - struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); - u8 RLBM = 0; // 0:Min, 1:Max , 2:User define -_func_enter_; - - DBG_871X("%s: Mode=%d SmartPS=%d UAPSD=%d\n", __FUNCTION__, - Mode, pwrpriv->smart_ps, padapter->registrypriv.uapsd_enable); - - H2CSetPwrMode.AwakeInterval = 2; //DTIM =1 - - switch(Mode) - { - case PS_MODE_ACTIVE: - H2CSetPwrMode.Mode = 0; - break; - case PS_MODE_MIN: - H2CSetPwrMode.Mode = 1; - break; - case PS_MODE_MAX: - RLBM = 1; - H2CSetPwrMode.Mode = 1; - break; - case PS_MODE_DTIM: - RLBM = 2; - H2CSetPwrMode.Mode = 1; - break; - case PS_MODE_UAPSD_WMM: - H2CSetPwrMode.Mode = 2; - break; - default: - H2CSetPwrMode.Mode = 0; - break; - } - - //H2CSetPwrMode.Mode = Mode; - - H2CSetPwrMode.SmartPS_RLBM = (((pwrpriv->smart_ps<<4)&0xf0) | (RLBM & 0x0f)); - - H2CSetPwrMode.bAllQueueUAPSD = padapter->registrypriv.uapsd_enable; - - if(Mode > 0) - { - H2CSetPwrMode.PwrState = 0x00;// AllON(0x0C), RFON(0x04), RFOFF(0x00) -#ifdef CONFIG_EXT_CLK - H2CSetPwrMode.Mode |= BIT(7);//supporting 26M XTAL CLK_Request feature. -#endif //CONFIG_EXT_CLK - } - else - H2CSetPwrMode.PwrState = 0x0C;// AllON(0x0C), RFON(0x04), RFOFF(0x00) - - FillH2CCmd_88E(padapter, H2C_PS_PWR_MODE, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode); - - -_func_exit_; -} - -void rtl8188e_set_FwMediaStatus_cmd(PADAPTER padapter, u16 mstatus_rpt ) -{ - u8 opmode,macid; - u16 mst_rpt = cpu_to_le16 (mstatus_rpt); - u32 reg_macid_no_link = REG_MACID_NO_LINK_0; - opmode = (u8) mst_rpt; - macid = (u8)(mst_rpt >> 8) ; - DBG_871X("### %s: MStatus=%x MACID=%d \n", __FUNCTION__,opmode,macid); - FillH2CCmd_88E(padapter, H2C_COM_MEDIA_STATUS_RPT, sizeof(mst_rpt), (u8 *)&mst_rpt); - - if(macid > 31){ - macid = macid-32; - reg_macid_no_link = REG_MACID_NO_LINK_1; - } - - //Delete select macid (MACID 0~63) from queue list. - if(opmode == 1)// 1:connect - { - rtw_write32(padapter,reg_macid_no_link, (rtw_read32(padapter,reg_macid_no_link) & (~BIT(macid)))); - } - else//0: disconnect - { - rtw_write32(padapter,reg_macid_no_link, (rtw_read32(padapter,reg_macid_no_link)|BIT(macid))); - } - - - -} - -void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength) -{ - struct rtw_ieee80211_hdr *pwlanhdr; - u16 *fctrl; - u32 rate_len, pktlen; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); - u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; - - - //DBG_871X("%s\n", __FUNCTION__); - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - - _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); - - SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); - //pmlmeext->mgnt_seq++; - SetFrameSubType(pframe, WIFI_BEACON); - - pframe += sizeof(struct rtw_ieee80211_hdr_3addr); - pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); - - //timestamp will be inserted by hardware - pframe += 8; - pktlen += 8; - - // beacon interval: 2 bytes - _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); - - pframe += 2; - pktlen += 2; - - // capability info: 2 bytes - _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); - - pframe += 2; - pktlen += 2; - - if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) - { - //DBG_871X("ie len=%d\n", cur_network->IELength); - pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs); - _rtw_memcpy(pframe, cur_network->IEs+sizeof(NDIS_802_11_FIXED_IEs), pktlen); - - goto _ConstructBeacon; - } - - //below for ad-hoc mode - - // SSID - pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen); - - // supported rates... - rate_len = rtw_get_rateset_len(cur_network->SupportedRates); - pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pktlen); - - // DS parameter set - pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen); - - if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) - { - u32 ATIMWindow; - // IBSS Parameter Set... - //ATIMWindow = cur->Configuration.ATIMWindow; - ATIMWindow = 0; - pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen); - } - - - //todo: ERP IE - - - // EXTERNDED SUPPORTED RATE - if (rate_len > 8) - { - pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); - } - - - //todo:HT for adhoc - -_ConstructBeacon: - - if ((pktlen + TXDESC_SIZE) > 512) - { - DBG_871X("beacon frame too large\n"); - return; - } - - *pLength = pktlen; - - //DBG_871X("%s bcn_sz=%d\n", __FUNCTION__, pktlen); - -} - -void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength) -{ - struct rtw_ieee80211_hdr *pwlanhdr; - u16 *fctrl; - u32 pktlen; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - //DBG_871X("%s\n", __FUNCTION__); - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - // Frame control. - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - SetPwrMgt(fctrl); - SetFrameSubType(pframe, WIFI_PSPOLL); - - // AID. - SetDuration(pframe, (pmlmeinfo->aid | 0xc000)); - - // BSSID. - _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - - // TA. - _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); - - *pLength = 16; -} - -void ConstructNullFunctionData( - PADAPTER padapter, - u8 *pframe, - u32 *pLength, - u8 *StaAddr, - u8 bQoS, - u8 AC, - u8 bEosp, - u8 bForcePowerSave) -{ - struct rtw_ieee80211_hdr *pwlanhdr; - u16 *fctrl; - u32 pktlen; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wlan_network *cur_network = &pmlmepriv->cur_network; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - - //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave); - - pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; - - fctrl = &pwlanhdr->frame_ctl; - *(fctrl) = 0; - if (bForcePowerSave) - { - SetPwrMgt(fctrl); - } - - switch(cur_network->network.InfrastructureMode) - { - case Ndis802_11Infrastructure: - SetToDs(fctrl); - _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN); - break; - case Ndis802_11APMode: - SetFrDs(fctrl); - _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); - break; - case Ndis802_11IBSS: - default: - _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - break; - } - - SetSeqNum(pwlanhdr, 0); - - if (bQoS == _TRUE) { - struct rtw_ieee80211_hdr_3addr_qos *pwlanqoshdr; - - SetFrameSubType(pframe, WIFI_QOS_DATA_NULL); - - pwlanqoshdr = (struct rtw_ieee80211_hdr_3addr_qos*)pframe; - SetPriority(&pwlanqoshdr->qc, AC); - SetEOSP(&pwlanqoshdr->qc, bEosp); - - pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); - } else { - SetFrameSubType(pframe, WIFI_DATA_NULL); - - pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); - } - - *pLength = pktlen; -} - -void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bHideSSID) -{ - struct rtw_ieee80211_hdr *pwlanhdr; - u16 *fctrl; - u8 *mac, *bssid; - u32 pktlen; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); - - - //DBG_871X("%s\n", __FUNCTION__); - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - mac = myid(&(padapter->eeprompriv)); - bssid = cur_network->MacAddress; - - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); - - SetSeqNum(pwlanhdr, 0); - SetFrameSubType(fctrl, WIFI_PROBERSP); - - pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); - pframe += pktlen; - - if(cur_network->IELength>MAX_IE_SZ) - return; - - _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); - pframe += cur_network->IELength; - pktlen += cur_network->IELength; - - *pLength = pktlen; -} - -#ifdef CONFIG_WOWLAN -// -// Description: -// Construct the ARP response packet to support ARP offload. -// -static void ConstructARPResponse( - PADAPTER padapter, - u8 *pframe, - u32 *pLength, - u8 *pIPAddress - ) -{ - struct rtw_ieee80211_hdr *pwlanhdr; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct wlan_network *cur_network = &pmlmepriv->cur_network; - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct security_priv *psecuritypriv = &padapter->securitypriv; - static u8 ARPLLCHeader[8] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x08, 0x06}; - - u16 *fctrl; - u32 pktlen; - u8 *pARPRspPkt = pframe; - //for TKIP Cal MIC - u8 *payload = pframe; - u8 EncryptionHeadOverhead = 0; - - pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; - - fctrl = &pwlanhdr->frame_ctl; - *(fctrl) = 0; - - //------------------------------------------------------------------------- - // MAC Header. - //------------------------------------------------------------------------- - SetFrameType(fctrl, WIFI_DATA); - //SetFrameSubType(fctrl, 0); - SetToDs(fctrl); - _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - - SetSeqNum(pwlanhdr, 0); - SetDuration(pwlanhdr, 0); - //SET_80211_HDR_FRAME_CONTROL(pARPRspPkt, 0); - //SET_80211_HDR_TYPE_AND_SUBTYPE(pARPRspPkt, Type_Data); - //SET_80211_HDR_TO_DS(pARPRspPkt, 1); - //SET_80211_HDR_ADDRESS1(pARPRspPkt, pMgntInfo->Bssid); - //SET_80211_HDR_ADDRESS2(pARPRspPkt, Adapter->CurrentAddress); - //SET_80211_HDR_ADDRESS3(pARPRspPkt, pMgntInfo->Bssid); - - //SET_80211_HDR_DURATION(pARPRspPkt, 0); - //SET_80211_HDR_FRAGMENT_SEQUENCE(pARPRspPkt, 0); - *pLength = 24; - -//YJ,del,120503 -#if 0 - //------------------------------------------------------------------------- - // Qos Header: leave space for it if necessary. - //------------------------------------------------------------------------- - if(pStaQos->CurrentQosMode > QOS_DISABLE) - { - SET_80211_HDR_QOS_EN(pARPRspPkt, 1); - PlatformZeroMemory(&(Buffer[*pLength]), sQoSCtlLng); - *pLength += sQoSCtlLng; - } -#endif - //------------------------------------------------------------------------- - // Security Header: leave space for it if necessary. - //------------------------------------------------------------------------- - - switch (psecuritypriv->dot11PrivacyAlgrthm) - { - case _WEP40_: - case _WEP104_: - EncryptionHeadOverhead = 4; - break; - case _TKIP_: - EncryptionHeadOverhead = 8; - break; - case _AES_: - EncryptionHeadOverhead = 8; - break; -#ifdef CONFIG_WAPI_SUPPORT - case _SMS4_: - EncryptionHeadOverhead = 18; - break; -#endif - default: - EncryptionHeadOverhead = 0; - } - - if(EncryptionHeadOverhead > 0) - { - _rtw_memset(&(pframe[*pLength]), 0,EncryptionHeadOverhead); - *pLength += EncryptionHeadOverhead; - //SET_80211_HDR_WEP(pARPRspPkt, 1); //Suggested by CCW. - SetPrivacy(fctrl); - } - - //------------------------------------------------------------------------- - // Frame Body. - //------------------------------------------------------------------------- - pARPRspPkt = (u8*)(pframe+ *pLength); - // LLC header - _rtw_memcpy(pARPRspPkt, ARPLLCHeader, 8); - *pLength += 8; - - // ARP element - pARPRspPkt += 8; - SET_ARP_PKT_HW(pARPRspPkt, 0x0100); - SET_ARP_PKT_PROTOCOL(pARPRspPkt, 0x0008); // IP protocol - SET_ARP_PKT_HW_ADDR_LEN(pARPRspPkt, 6); - SET_ARP_PKT_PROTOCOL_ADDR_LEN(pARPRspPkt, 4); - SET_ARP_PKT_OPERATION(pARPRspPkt, 0x0200); // ARP response - SET_ARP_PKT_SENDER_MAC_ADDR(pARPRspPkt, myid(&(padapter->eeprompriv))); - SET_ARP_PKT_SENDER_IP_ADDR(pARPRspPkt, pIPAddress); -#ifdef CONFIG_ARP_KEEP_ALIVE - if (rtw_gw_addr_query(padapter)==0) { - SET_ARP_PKT_TARGET_MAC_ADDR(pARPRspPkt, pmlmepriv->gw_mac_addr); - SET_ARP_PKT_TARGET_IP_ADDR(pARPRspPkt, pmlmepriv->gw_ip); - } - else -#endif - { - SET_ARP_PKT_TARGET_MAC_ADDR(pARPRspPkt, get_my_bssid(&(pmlmeinfo->network))); - SET_ARP_PKT_TARGET_IP_ADDR(pARPRspPkt, pIPAddress); - DBG_871X("%s Target Mac Addr:" MAC_FMT "\n", __FUNCTION__, MAC_ARG(get_my_bssid(&(pmlmeinfo->network)))); - DBG_871X("%s Target IP Addr" IP_FMT "\n", __FUNCTION__, IP_ARG(pIPAddress)); - } - *pLength += 28; - if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) - { - u8 mic[8]; - struct mic_data micdata; - struct sta_info *psta = NULL; - u8 priority[4]={0x0,0x0,0x0,0x0}; - u8 null_key[16]={0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}; - - DBG_871X("%s(): Add MIC\n",__FUNCTION__); - - psta = rtw_get_stainfo(&padapter->stapriv, get_my_bssid(&(pmlmeinfo->network))); - if (psta != NULL) { - if(_rtw_memcmp(&psta->dot11tkiptxmickey.skey[0],null_key, 16)==_TRUE){ - DBG_871X("%s(): STA dot11tkiptxmickey==0\n",__FUNCTION__); - } - //start to calculate the mic code - rtw_secmicsetkey(&micdata, &psta->dot11tkiptxmickey.skey[0]); - } - - rtw_secmicappend(&micdata, pwlanhdr->addr3, 6); //DA - - rtw_secmicappend(&micdata, pwlanhdr->addr2, 6); //SA - - priority[0]=0; - rtw_secmicappend(&micdata, &priority[0], 4); - - rtw_secmicappend(&micdata, payload, 36); //payload length = 8 + 28 - - rtw_secgetmic(&micdata,&(mic[0])); - - pARPRspPkt += 28; - _rtw_memcpy(pARPRspPkt, &(mic[0]),8); - - *pLength += 8; - } -} -#endif - -void rtl8188e_set_FwRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc) -{ - u8 u1H2CRsvdPageParm[H2C_8188E_RSVDPAGE_LOC_LEN]={0}; - u8 u1H2CAoacRsvdPageParm[H2C_8188E_AOAC_RSVDPAGE_LOC_LEN]={0}; - - //DBG_871X("8188RsvdPageLoc: PsPoll=%d Null=%d QoSNull=%d\n", - // rsvdpageloc->LocPsPoll, rsvdpageloc->LocNullData, rsvdpageloc->LocQosNull); - - SET_8188E_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1H2CRsvdPageParm, rsvdpageloc->LocPsPoll); - SET_8188E_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocNullData); - SET_8188E_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocQosNull); - - FillH2CCmd_88E(padapter, H2C_COM_RSVD_PAGE, H2C_8188E_RSVDPAGE_LOC_LEN, u1H2CRsvdPageParm); - -#ifdef CONFIG_WOWLAN - //DBG_871X("8188E_AOACRsvdPageLoc: RWC=%d ArpRsp=%d\n", rsvdpageloc->LocRemoteCtrlInfo, rsvdpageloc->LocArpRsp); - SET_8188E_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocRemoteCtrlInfo); - SET_8188E_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocArpRsp); - - FillH2CCmd_88E(padapter, H2C_COM_AOAC_RSVD_PAGE, H2C_8188E_AOAC_RSVDPAGE_LOC_LEN, u1H2CAoacRsvdPageParm); -#endif -} - -// To check if reserved page content is destroyed by beacon beacuse beacon is too large. -// 2010.06.23. Added by tynli. -VOID -CheckFwRsvdPageContent( - IN PADAPTER Adapter -) -{ - HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); - u32 MaxBcnPageNum; - - if(pHalData->FwRsvdPageStartOffset != 0) - { - /*MaxBcnPageNum = PageNum_128(pMgntInfo->MaxBeaconSize); - RT_ASSERT((MaxBcnPageNum <= pHalData->FwRsvdPageStartOffset), - ("CheckFwRsvdPageContent(): The reserved page content has been"\ - "destroyed by beacon!!! MaxBcnPageNum(%d) FwRsvdPageStartOffset(%d)\n!", - MaxBcnPageNum, pHalData->FwRsvdPageStartOffset));*/ - } -} - -// -// Description: Fill the reserved packets that FW will use to RSVD page. -// Now we just send 4 types packet to rsvd page. -// (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp. -// Input: -// bDLFinished - FALSE: At the first time we will send all the packets as a large packet to Hw, -// so we need to set the packet length to total lengh. -// TRUE: At the second time, we should send the first packet (default:beacon) -// to Hw again and set the lengh in descriptor to the real beacon lengh. -// 2009.10.15 by tynli. -static void SetFwRsvdPagePkt(PADAPTER padapter, BOOLEAN bDLFinished) -{ - PHAL_DATA_TYPE pHalData; - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - struct xmit_priv *pxmitpriv; - struct mlme_ext_priv *pmlmeext; - struct mlme_ext_info *pmlmeinfo; - u32 BeaconLength, ProbeRspLength, PSPollLength; - u32 NullDataLength, QosNullLength, BTQosNullLength; - u8 *ReservedPagePacket; - u8 PageNum, PageNeed, TxDescLen; - u16 BufIndex; - u32 TotalPacketLen; - RSVDPAGE_LOC RsvdPageLoc; -#ifdef CONFIG_WOWLAN - u32 ARPLegnth = 0; - struct security_priv *psecuritypriv = &padapter->securitypriv; - u8 currentip[4]; - u8 cur_dot11txpn[8]; -#endif - - DBG_871X("%s\n", __FUNCTION__); - - ReservedPagePacket = (u8*)rtw_zmalloc(RTL88E_RSVDPAGE_SIZE); - if (ReservedPagePacket == NULL) { - DBG_871X("%s: alloc ReservedPagePacket fail!\n", __FUNCTION__); - return; - } - - pHalData = GET_HAL_DATA(padapter); - pxmitpriv = &padapter->xmitpriv; - pmlmeext = &padapter->mlmeextpriv; - pmlmeinfo = &pmlmeext->mlmext_info; - - TxDescLen = TXDESC_SIZE; - PageNum = 0; - - //3 (1) beacon * 2 pages - BufIndex = TXDESC_OFFSET; - ConstructBeacon(padapter, &ReservedPagePacket[BufIndex], &BeaconLength); - - // When we count the first page size, we need to reserve description size for the RSVD - // packet, it will be filled in front of the packet in TXPKTBUF. - PageNeed = (u8)PageNum_128(TxDescLen + BeaconLength); - // To reserved 2 pages for beacon buffer. 2010.06.24. - if (PageNeed == 1) - PageNeed += 1; - PageNum += PageNeed; - pHalData->FwRsvdPageStartOffset = PageNum; - - BufIndex += PageNeed*128; - - //3 (2) ps-poll *1 page - RsvdPageLoc.LocPsPoll = PageNum; - ConstructPSPoll(padapter, &ReservedPagePacket[BufIndex], &PSPollLength); - rtl8188e_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, _TRUE, _FALSE); - - PageNeed = (u8)PageNum_128(TxDescLen + PSPollLength); - PageNum += PageNeed; - - BufIndex += PageNeed*128; - - //3 (3) null data * 1 page - RsvdPageLoc.LocNullData = PageNum; - ConstructNullFunctionData( - padapter, - &ReservedPagePacket[BufIndex], - &NullDataLength, - get_my_bssid(&pmlmeinfo->network), - _FALSE, 0, 0, _FALSE); - rtl8188e_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], NullDataLength, _FALSE, _FALSE); - - PageNeed = (u8)PageNum_128(TxDescLen + NullDataLength); - PageNum += PageNeed; - - BufIndex += PageNeed*128; - - //3 (5) Qos null data - RsvdPageLoc.LocQosNull = PageNum; - ConstructNullFunctionData( - padapter, - &ReservedPagePacket[BufIndex], - &QosNullLength, - get_my_bssid(&pmlmeinfo->network), - _TRUE, 0, 0, _FALSE); - rtl8188e_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], QosNullLength, _FALSE, _FALSE); - - PageNeed = (u8)PageNum_128(TxDescLen + QosNullLength); - PageNum += PageNeed; - - BufIndex += PageNeed*128; - -#ifdef CONFIG_WOWLAN - //3(7) ARP - rtw_get_current_ip_address(padapter, currentip); - RsvdPageLoc.LocArpRsp = PageNum; - ConstructARPResponse( - padapter, - &ReservedPagePacket[BufIndex], - &ARPLegnth, - currentip - ); - rtl8188e_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], ARPLegnth, _FALSE, _FALSE); - - switch (psecuritypriv->dot11PrivacyAlgrthm) - { - case _WEP40_: - case _WEP104_: - case _TKIP_: - ReservedPagePacket[BufIndex-TxDescLen+6] |= BIT(6); - break; - case _AES_: - ReservedPagePacket[BufIndex-TxDescLen+6] |= BIT(6)|BIT(7); - break; -#ifdef CONFIG_WAPI_SUPPORT - case _SMS4_: - ReservedPagePacket[BufIndex-TxDescLen+6] |= BIT(7); - break; -#endif - default: - ; - } - - PageNeed = (u8)PageNum_128(TxDescLen + ARPLegnth); - PageNum += PageNeed; - - BufIndex += PageNeed*128; - - //3(8) sec IV - rtw_get_sec_iv(padapter, cur_dot11txpn, get_my_bssid(&pmlmeinfo->network)); - RsvdPageLoc.LocRemoteCtrlInfo = PageNum; - _rtw_memcpy(ReservedPagePacket+BufIndex-TxDescLen, cur_dot11txpn, 8); - - TotalPacketLen = BufIndex-TxDescLen + sizeof (union pn48); //IV len -#else - TotalPacketLen = BufIndex + QosNullLength; -#endif - - pmgntframe = alloc_mgtxmitframe(pxmitpriv); - if (pmgntframe == NULL) - goto exit; - - // update attribute - pattrib = &pmgntframe->attrib; - update_mgntframe_attrib(padapter, pattrib); - pattrib->qsel = 0x10; - pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TXDESC_OFFSET; - - if (TotalPacketLen < RTL88E_RSVDPAGE_SIZE) - _rtw_memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen); - else - DBG_871X("%s: memory copy fail at Line: %d\n", __FUNCTION__, __LINE__); - - rtw_hal_mgnt_xmit(padapter, pmgntframe); - - DBG_871X("%s: Set RSVD page location to Fw\n", __FUNCTION__); - rtl8188e_set_FwRsvdPage_cmd(padapter, &RsvdPageLoc); - //FillH2CCmd_88E(padapter, H2C_COM_RSVD_PAGE, sizeof(RsvdPageLoc), (u8*)&RsvdPageLoc); - -exit: - rtw_mfree(ReservedPagePacket, RTL88E_RSVDPAGE_SIZE); -} - -void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus) -{ - JOINBSSRPT_PARM JoinBssRptParm; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); -#ifdef CONFIG_WOWLAN - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct sta_info *psta = NULL; -#endif - BOOLEAN bSendBeacon=_FALSE; - BOOLEAN bcn_valid = _FALSE; - u8 DLBcnCount=0; - u32 poll = 0; - -_func_enter_; - - DBG_871X("%s mstatus(%x)\n", __FUNCTION__,mstatus); - - if(mstatus == 1) - { - // We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. - // Suggested by filen. Added by tynli. - rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid)); - // Do not set TSF again here or vWiFi beacon DMA INT will not work. - //correct_TSF(padapter, pmlmeext); - // Hw sequende enable by dedault. 2010.06.23. by tynli. - //rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF)); - //rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); - - //Set REG_CR bit 8. DMA beacon by SW. - pHalData->RegCR_1 |= BIT0; - rtw_write8(padapter, REG_CR+1, pHalData->RegCR_1); - - // Disable Hw protection for a time which revserd for Hw sending beacon. - // Fix download reserved page packet fail that access collision with the protection time. - // 2010.05.11. Added by tynli. - //SetBcnCtrlReg(padapter, 0, BIT3); - //SetBcnCtrlReg(padapter, BIT4, 0); - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3))); - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)); - - if(pHalData->RegFwHwTxQCtrl&BIT6) - { - DBG_871X("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n"); - bSendBeacon = _TRUE; - } - - // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. - rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&(~BIT6))); - pHalData->RegFwHwTxQCtrl &= (~BIT6); - - // Clear beacon valid check bit. - rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); - DLBcnCount = 0; - poll = 0; - do - { - // download rsvd page. - SetFwRsvdPagePkt(padapter, _FALSE); - DLBcnCount++; - do - { - rtw_yield_os(); - //rtw_mdelay_os(10); - // check rsvd page download OK. - rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid)); - poll++; - } while(!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); - - }while(!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); - - //RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage88ES(): 1 Download RSVD page failed!\n")); - if(padapter->bSurpriseRemoved || padapter->bDriverStopped) - { - } - else if(!bcn_valid) - DBG_871X("%s: 1 Download RSVD page failed! DLBcnCount:%u, poll:%u\n", __FUNCTION__ ,DLBcnCount, poll); - else - DBG_871X("%s: 1 Download RSVD success! DLBcnCount:%u, poll:%u\n", __FUNCTION__, DLBcnCount, poll); - // - // We just can send the reserved page twice during the time that Tx thread is stopped (e.g. pnpsetpower) - // becuase we need to free the Tx BCN Desc which is used by the first reserved page packet. - // At run time, we cannot get the Tx Desc until it is released in TxHandleInterrupt() so we will return - // the beacon TCB in the following code. 2011.11.23. by tynli. - // - //if(bcn_valid && padapter->bEnterPnpSleep) - if(0) - { - if(bSendBeacon) - { - rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); - DLBcnCount = 0; - poll = 0; - do - { - SetFwRsvdPagePkt(padapter, _TRUE); - DLBcnCount++; - - do - { - rtw_yield_os(); - //rtw_mdelay_os(10); - // check rsvd page download OK. - rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid)); - poll++; - } while(!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); - }while(!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); - - //RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage(): 2 Download RSVD page failed!\n")); - if(padapter->bSurpriseRemoved || padapter->bDriverStopped) - { - } - else if(!bcn_valid) - DBG_871X("%s: 2 Download RSVD page failed! DLBcnCount:%u, poll:%u\n", __FUNCTION__ ,DLBcnCount, poll); - else - DBG_871X("%s: 2 Download RSVD success! DLBcnCount:%u, poll:%u\n", __FUNCTION__, DLBcnCount, poll); - } - } - - // Enable Bcn - //SetBcnCtrlReg(padapter, BIT3, 0); - //SetBcnCtrlReg(padapter, 0, BIT4); - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3)); - rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(4))); - - // To make sure that if there exists an adapter which would like to send beacon. - // If exists, the origianl value of 0x422[6] will be 1, we should check this to - // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause - // the beacon cannot be sent by HW. - // 2010.06.23. Added by tynli. - if(bSendBeacon) - { - rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6)); - pHalData->RegFwHwTxQCtrl |= BIT6; - } - - // - // Update RSVD page location H2C to Fw. - // - if(bcn_valid) - { - rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); - DBG_871X("Set RSVD page location to Fw.\n"); - //FillH2CCmd88E(Adapter, H2C_88E_RSVDPAGE, H2C_RSVDPAGE_LOC_LENGTH, pMgntInfo->u1RsvdPageLoc); - } - - // Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. - //if(!padapter->bEnterPnpSleep) - { - // Clear CR[8] or beacon packet will not be send to TxBuf anymore. - pHalData->RegCR_1 &= (~BIT0); - rtw_write8(padapter, REG_CR+1, pHalData->RegCR_1); - } - } -#ifdef CONFIG_WOWLAN - if (adapter_to_pwrctl(padapter)->wowlan_mode){ - JoinBssRptParm.OpMode = mstatus; - psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(pmlmepriv)); - if (psta != NULL) { - JoinBssRptParm.MacID = psta->mac_id; - } else { - JoinBssRptParm.MacID = 0; - } - FillH2CCmd_88E(padapter, H2C_COM_MEDIA_STATUS_RPT, sizeof(JoinBssRptParm), (u8 *)&JoinBssRptParm); - DBG_871X_LEVEL(_drv_info_, "%s opmode:%d MacId:%d\n", __func__, JoinBssRptParm.OpMode, JoinBssRptParm.MacID); - } else { - DBG_871X_LEVEL(_drv_info_, "%s wowlan_mode is off\n", __func__); - } -#endif //CONFIG_WOWLAN -_func_exit_; -} - -#ifdef CONFIG_P2P_PS -void rtl8188e_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); - struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); - struct P2P_PS_Offload_t *p2p_ps_offload = &pHalData->p2p_ps_offload; - u8 i; - -_func_enter_; - -#if 1 - switch(p2p_ps_state) - { - case P2P_PS_DISABLE: - DBG_8192C("P2P_PS_DISABLE \n"); - _rtw_memset(p2p_ps_offload, 0 ,1); - break; - case P2P_PS_ENABLE: - DBG_8192C("P2P_PS_ENABLE \n"); - // update CTWindow value. - if( pwdinfo->ctwindow > 0 ) - { - p2p_ps_offload->CTWindow_En = 1; - rtw_write8(padapter, REG_P2P_CTWIN, pwdinfo->ctwindow); - } - - // hw only support 2 set of NoA - for( i=0 ; inoa_num ; i++) - { - // To control the register setting for which NOA - rtw_write8(padapter, REG_NOA_DESC_SEL, (i << 4)); - if(i == 0) - p2p_ps_offload->NoA0_En = 1; - else - p2p_ps_offload->NoA1_En = 1; - - // config P2P NoA Descriptor Register - //DBG_8192C("%s(): noa_duration = %x\n",__FUNCTION__,pwdinfo->noa_duration[i]); - rtw_write32(padapter, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]); - - //DBG_8192C("%s(): noa_interval = %x\n",__FUNCTION__,pwdinfo->noa_interval[i]); - rtw_write32(padapter, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]); - - //DBG_8192C("%s(): start_time = %x\n",__FUNCTION__,pwdinfo->noa_start_time[i]); - rtw_write32(padapter, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]); - - //DBG_8192C("%s(): noa_count = %x\n",__FUNCTION__,pwdinfo->noa_count[i]); - rtw_write8(padapter, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]); - } - - if( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) ) - { - // rst p2p circuit - rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4)); - - p2p_ps_offload->Offload_En = 1; - - if(pwdinfo->role == P2P_ROLE_GO) - { - p2p_ps_offload->role= 1; - p2p_ps_offload->AllStaSleep = 0; - } - else - { - p2p_ps_offload->role= 0; - } - - p2p_ps_offload->discovery = 0; - } - break; - case P2P_PS_SCAN: - DBG_8192C("P2P_PS_SCAN \n"); - p2p_ps_offload->discovery = 1; - break; - case P2P_PS_SCAN_DONE: - DBG_8192C("P2P_PS_SCAN_DONE \n"); - p2p_ps_offload->discovery = 0; - pwdinfo->p2p_ps_state = P2P_PS_ENABLE; - break; - default: - break; - } - - FillH2CCmd_88E(padapter, H2C_PS_P2P_OFFLOAD, 1, (u8 *)p2p_ps_offload); -#endif - -_func_exit_; - -} -#endif //CONFIG_P2P_PS - -#ifdef CONFIG_TSF_RESET_OFFLOAD -/* - ask FW to Reset sync register at Beacon early interrupt -*/ -u8 rtl8188e_reset_tsf(_adapter *padapter, u8 reset_port ) -{ - u8 buf[2]; - u8 res=_SUCCESS; - - s32 ret; -_func_enter_; - if (IFACE_PORT0==reset_port) { - buf[0] = 0x1; buf[1] = 0; - } else{ - buf[0] = 0x0; buf[1] = 0x1; - } - - ret = FillH2CCmd_88E(padapter, H2C_RESET_TSF, 2, buf); - -_func_exit_; - - return res; -} - -int reset_tsf(PADAPTER Adapter, u8 reset_port ) -{ - u8 reset_cnt_before = 0, reset_cnt_after = 0, loop_cnt = 0; - u32 reg_reset_tsf_cnt = (IFACE_PORT0==reset_port) ? - REG_FW_RESET_TSF_CNT_0:REG_FW_RESET_TSF_CNT_1; - u32 reg_bcncrtl = (IFACE_PORT0==reset_port) ? - REG_BCN_CTRL_1:REG_BCN_CTRL; - - rtw_scan_abort(Adapter->pbuddy_adapter); /* site survey will cause reset_tsf fail */ - reset_cnt_after = reset_cnt_before = rtw_read8(Adapter,reg_reset_tsf_cnt); - rtl8188e_reset_tsf(Adapter, reset_port); - - while ((reset_cnt_after == reset_cnt_before ) && (loop_cnt < 10)) { - rtw_msleep_os(100); - loop_cnt++; - reset_cnt_after = rtw_read8(Adapter, reg_reset_tsf_cnt); - } - - return(loop_cnt >= 10) ? _FAIL : _TRUE; -} - - -#endif // CONFIG_TSF_RESET_OFFLOAD - -#ifdef CONFIG_WOWLAN -#ifdef CONFIG_GPIO_WAKEUP -void rtl8188es_set_output_gpio(_adapter* padapter, u8 index, u8 outputval) -{ - if ( index <= 7 ) { - /* config GPIO mode */ - rtw_write8(padapter, REG_GPIO_PIN_CTRL + 3, rtw_read8(padapter, REG_GPIO_PIN_CTRL + 3) & ~BIT(index) ); - - /* config GPIO Sel */ - /* 0: input */ - /* 1: output */ - rtw_write8(padapter, REG_GPIO_PIN_CTRL + 2, rtw_read8(padapter, REG_GPIO_PIN_CTRL + 2) | BIT(index)); - - /* set output value */ - if ( outputval ) { - rtw_write8(padapter, REG_GPIO_PIN_CTRL + 1, rtw_read8(padapter, REG_GPIO_PIN_CTRL + 1) | BIT(index)); - } else { - rtw_write8(padapter, REG_GPIO_PIN_CTRL + 1, rtw_read8(padapter, REG_GPIO_PIN_CTRL + 1) & ~BIT(index)); - } - } else { - /* 88C Series: */ - /* index: 11~8 transform to 3~0 */ - /* 8723 Series: */ - /* index: 12~8 transform to 4~0 */ - index -= 8; - - /* config GPIO mode */ - rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 3, rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 3) & ~BIT(index) ); - - /* config GPIO Sel */ - /* 0: input */ - /* 1: output */ - rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 2, rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 2) | BIT(index)); - - /* set output value */ - if ( outputval ) { - rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 1, rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 1) | BIT(index)); - } else { - rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 1, rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 1) & ~BIT(index)); - } - } -} -#endif //CONFIG_GPIO_WAKEUP - -void rtl8188es_set_wowlan_cmd(_adapter* padapter, u8 enable) -{ - u8 res=_SUCCESS; - u32 test=0; - struct recv_priv *precvpriv = &padapter->recvpriv; - SETWOWLAN_PARM pwowlan_parm; - SETAOAC_GLOBAL_INFO paoac_global_info_parm; - struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); - struct security_priv *psecpriv = &padapter->securitypriv; -#ifdef CONFIG_GPIO_WAKEUP - u8 gpio_wake_pin = 7; - u8 gpio_high_active = 0; //default low active -#endif - -_func_enter_; - DBG_871X_LEVEL(_drv_always_, "+%s+\n", __func__); - - pwowlan_parm.mode =0; - pwowlan_parm.gpio_index=0; - pwowlan_parm.gpio_duration=0; - pwowlan_parm.second_mode =0; - pwowlan_parm.reserve=0; - - if(enable){ - - pwowlan_parm.mode |=FW_WOWLAN_FUN_EN; - pwrpriv->wowlan_magic =_TRUE; - if (psecpriv->dot11PrivacyAlgrthm == _WEP40_ || psecpriv->dot11PrivacyAlgrthm == _WEP104_) - pwrpriv->wowlan_unicast =_TRUE; - - if(pwrpriv->wowlan_pattern ==_TRUE){ - pwowlan_parm.mode |= FW_WOWLAN_PATTERN_MATCH; - DBG_871X_LEVEL(_drv_info_, "%s 2.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); - } - if(pwrpriv->wowlan_magic ==_TRUE){ - pwowlan_parm.mode |=FW_WOWLAN_MAGIC_PKT; - DBG_871X_LEVEL(_drv_info_, "%s 3.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); - } - if(pwrpriv->wowlan_unicast ==_TRUE){ - pwowlan_parm.mode |=FW_WOWLAN_UNICAST; - DBG_871X_LEVEL(_drv_info_, "%s 4.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); - } - - pwowlan_parm.mode |=FW_WOWLAN_REKEY_WAKEUP; - pwowlan_parm.mode |=FW_WOWLAN_DEAUTH_WAKEUP; - - //DataPinWakeUp -#ifdef CONFIG_USB_HCI - pwowlan_parm.gpio_index=0x0; -#endif //CONFIG_USB_HCI - -#ifdef CONFIG_SDIO_HCI - pwowlan_parm.gpio_index = 0x80; -#endif //CONFIG_SDIO_HCI - -#ifdef CONFIG_GPIO_WAKEUP - pwowlan_parm.gpio_index = gpio_wake_pin; - - //WOWLAN_GPIO_ACTIVE means GPIO high active - //pwowlan_parm.mode |=FW_WOWLAN_GPIO_ACTIVE; - if (gpio_high_active) - pwowlan_parm.mode |=FW_WOWLAN_GPIO_ACTIVE; -#endif //CONFIG_GPIO_WAKEUP - - DBG_871X_LEVEL(_drv_info_, "%s 5.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode); - DBG_871X_LEVEL(_drv_info_, "%s 6.pwowlan_parm.index=0x%x \n",__FUNCTION__,pwowlan_parm.gpio_index); - res = FillH2CCmd_88E(padapter, H2C_COM_WWLAN, 2, (u8 *)&pwowlan_parm); - - rtw_msleep_os(2); - - //disconnect decision - pwowlan_parm.mode =1; - pwowlan_parm.gpio_index=0; - pwowlan_parm.gpio_duration=0; - FillH2CCmd_88E(padapter, H2C_COM_DISCNT_DECISION, 3, (u8 *)&pwowlan_parm); - - //keep alive period = 10 * 10 BCN interval - pwowlan_parm.mode = FW_WOWLAN_KEEP_ALIVE_EN | FW_ADOPT_USER | FW_WOWLAN_KEEP_ALIVE_PKT_TYPE; - pwowlan_parm.gpio_index=10; - res = FillH2CCmd_88E(padapter, H2C_COM_KEEP_ALIVE, 2, (u8 *)&pwowlan_parm); - - rtw_msleep_os(2); - //Configure STA security information for GTK rekey wakeup event. - paoac_global_info_parm.pairwiseEncAlg= - padapter->securitypriv.dot11PrivacyAlgrthm; - paoac_global_info_parm.groupEncAlg= - padapter->securitypriv.dot118021XGrpPrivacy; - res = FillH2CCmd_88E(padapter, H2C_COM_AOAC_GLOBAL_INFO, 2, (u8 *)&paoac_global_info_parm); - - rtw_msleep_os(2); - //enable Remote wake ctrl - pwowlan_parm.mode = FW_REMOTE_WAKE_CTRL_EN | FW_WOW_FW_UNICAST_EN | FW_ARP_EN; - if (psecpriv->dot11PrivacyAlgrthm == _AES_ || psecpriv->dot11PrivacyAlgrthm == _NO_PRIVACY_) - { - pwowlan_parm.gpio_index=0; - } else { - pwowlan_parm.gpio_index=1; - } - pwowlan_parm.gpio_duration=0; - - res = FillH2CCmd_88E(padapter, H2C_COM_REMOTE_WAKE_CTRL, 3, (u8 *)&pwowlan_parm); - } else { - pwrpriv->wowlan_magic =_FALSE; -#ifdef CONFIG_GPIO_WAKEUP - rtl8188es_set_output_gpio(padapter, gpio_wake_pin, !gpio_high_active); -#endif //CONFIG_GPIO_WAKEUP - res = FillH2CCmd_88E(padapter, H2C_COM_WWLAN, 2, (u8 *)&pwowlan_parm); - rtw_msleep_os(2); - res = FillH2CCmd_88E(padapter, H2C_COM_REMOTE_WAKE_CTRL, 3, (u8 *)&pwowlan_parm); - } -_func_exit_; - DBG_871X_LEVEL(_drv_always_, "-%s res:%d-\n", __func__, res); - return ; -} -#endif //CONFIG_WOWLAN diff --git a/hal/rtl8188e/rtl8188e_dm.c b/hal/rtl8188e/rtl8188e_dm.c deleted file mode 100755 index dcff835..0000000 --- a/hal/rtl8188e/rtl8188e_dm.c +++ /dev/null @@ -1,647 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -//============================================================ -// Description: -// -// This file is for 92CE/92CU dynamic mechanism only -// -// -//============================================================ -#define _RTL8188E_DM_C_ - -//============================================================ -// include files -//============================================================ -#include -#include -#include -#include - -#include - -//============================================================ -// Global var -//============================================================ - - -static VOID -dm_CheckProtection( - IN PADAPTER Adapter - ) -{ -#if 0 - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - u1Byte CurRate, RateThreshold; - - if(pMgntInfo->pHTInfo->bCurBW40MHz) - RateThreshold = MGN_MCS1; - else - RateThreshold = MGN_MCS3; - - if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold) - { - pMgntInfo->bDmDisableProtect = TRUE; - DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); - } - else - { - pMgntInfo->bDmDisableProtect = FALSE; - DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); - } -#endif -} - -static VOID -dm_CheckStatistics( - IN PADAPTER Adapter - ) -{ -#if 0 - if(!Adapter->MgntInfo.bMediaConnect) - return; - - //2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly. - rtw_hal_get_hwreg( Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate) ); - - // Calculate current Tx Rate(Successful transmited!!) - - // Calculate current Rx Rate(Successful received!!) - - //for tx tx retry count - rtw_hal_get_hwreg( Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount) ); -#endif -} - -static void dm_CheckPbcGPIO(_adapter *padapter) -{ - u8 tmp1byte; - u8 bPbcPressed = _FALSE; - - if(!padapter->registrypriv.hw_wps_pbc) - return; - -#ifdef CONFIG_USB_HCI - tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); - tmp1byte |= (HAL_8188E_HW_GPIO_WPS_BIT); - rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as output mode - - tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT); - rtw_write8(padapter, GPIO_IN, tmp1byte); //reset the floating voltage level - - tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); - tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT); - rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as input mode - - tmp1byte =rtw_read8(padapter, GPIO_IN); - - if (tmp1byte == 0xff) - return ; - - if (tmp1byte&HAL_8188E_HW_GPIO_WPS_BIT) - { - bPbcPressed = _TRUE; - } -#else - tmp1byte = rtw_read8(padapter, GPIO_IN); - //RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte)); - - if (tmp1byte == 0xff || padapter->init_adpt_in_progress) - return ; - - if((tmp1byte&HAL_8188E_HW_GPIO_WPS_BIT)==0) - { - bPbcPressed = _TRUE; - } -#endif - - if( _TRUE == bPbcPressed) - { - // Here we only set bPbcPressed to true - // After trigger PBC, the variable will be set to false - DBG_8192C("CheckPbcGPIO - PBC is pressed\n"); - -#ifdef RTK_DMP_PLATFORM -#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) - kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_NET_PBC); -#else - kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_NET_PBC); -#endif -#else - - if ( padapter->pid[0] == 0 ) - { // 0 is the default value and it means the application monitors the HW PBC doesn't privde its pid to driver. - return; - } - rtw_signal_process(padapter->pid[0], SIGUSR1); -#endif - } -} - -#ifdef CONFIG_PCI_HCI -// -// Description: -// Perform interrupt migration dynamically to reduce CPU utilization. -// -// Assumption: -// 1. Do not enable migration under WIFI test. -// -// Created by Roger, 2010.03.05. -// -VOID -dm_InterruptMigration( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - BOOLEAN bCurrentIntMt, bCurrentACIntDisable; - BOOLEAN IntMtToSet = _FALSE; - BOOLEAN ACIntToSet = _FALSE; - - - // Retrieve current interrupt migration and Tx four ACs IMR settings first. - bCurrentIntMt = pHalData->bInterruptMigration; - bCurrentACIntDisable = pHalData->bDisableTxInt; - - // - // Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics - // when interrupt migration is set before. 2010.03.05. - // - if(!Adapter->registrypriv.wifi_spec && - (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && - pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) - { - IntMtToSet = _TRUE; - - // To check whether we should disable Tx interrupt or not. - if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic ) - ACIntToSet = _TRUE; - } - - //Update current settings. - if( bCurrentIntMt != IntMtToSet ){ - DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet); - if(IntMtToSet) - { - // - // Set interrrupt migration timer and corresponging Tx/Rx counter. - // timer 25ns*0xfa0=100us for 0xf packets. - // 2010.03.05. - // - rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx - pHalData->bInterruptMigration = IntMtToSet; - } - else - { - // Reset all interrupt migration settings. - rtw_write32(Adapter, REG_INT_MIG, 0); - pHalData->bInterruptMigration = IntMtToSet; - } - } - - /*if( bCurrentACIntDisable != ACIntToSet ){ - DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet); - if(ACIntToSet) // Disable four ACs interrupts. - { - // - // Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. - // When extremely highly Rx OK occurs, we will disable Tx interrupts. - // 2010.03.05. - // - UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS ); - pHalData->bDisableTxInt = ACIntToSet; - } - else// Enable four ACs interrupts. - { - UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 ); - pHalData->bDisableTxInt = ACIntToSet; - } - }*/ - -} - -#endif - -// -// Initialize GPIO setting registers -// -static void -dm_InitGPIOSetting( - IN PADAPTER Adapter - ) -{ - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - - u8 tmp1byte; - - tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG); - tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); - -#ifdef CONFIG_BT_COEXIST - // UMB-B cut bug. We need to support the modification. - if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) && - pHalData->bt_coexist.BT_Coexist) - { - tmp1byte |= (BIT5); - } -#endif - rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); - -} - -//============================================================ -// functions -//============================================================ -static void Init_ODM_ComInfo_88E(PADAPTER Adapter) -{ - - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); - u8 cut_ver,fab_ver; - - // - // Init Value - // - _rtw_memset(pDM_Odm,0,sizeof(pDM_Odm)); - - pDM_Odm->Adapter = Adapter; - - ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PLATFORM,ODM_CE); - - if(Adapter->interface_type == RTW_GSPI ) - ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,ODM_ITRF_SDIO); - else - ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,Adapter->interface_type);//RTL871X_HCI_TYPE - - ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_IC_TYPE,ODM_RTL8188E); - - fab_ver = ODM_TSMC; - cut_ver = ODM_CUT_A; - - ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_FAB_VER,fab_ver); - ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_CUT_VER,cut_ver); - - ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP,IS_NORMAL_CHIP(pHalData->VersionID)); - -#if 0 -//#ifdef CONFIG_USB_HCI - ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BOARD_TYPE,pHalData->BoardType); - - if(pHalData->BoardType == BOARD_USB_High_PA){ - ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_LNA,_TRUE); - ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_PA,_TRUE); - } -#endif - ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PATCH_ID,pHalData->CustomerID); - // ODM_CMNINFO_BINHCT_TEST only for MP Team - ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BWIFI_TEST,Adapter->registrypriv.wifi_spec); - - - if(pHalData->rf_type == RF_1T1R){ - ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T1R); - } - else if(pHalData->rf_type == RF_2T2R){ - ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_2T2R); - } - else if(pHalData->rf_type == RF_1T2R){ - ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T2R); - } - - ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType); - - #ifdef CONFIG_DISABLE_ODM - pdmpriv->InitODMFlag = 0; - #else - pdmpriv->InitODMFlag = ODM_RF_CALIBRATION | - ODM_RF_TX_PWR_TRACK //| - ; - //if(pHalData->AntDivCfg) - // pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV; - #endif - - ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag); - -} -static void Update_ODM_ComInfo_88E(PADAPTER Adapter) -{ - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - int i; - - pdmpriv->InitODMFlag = 0 - | ODM_BB_DIG -#ifdef CONFIG_ODM_REFRESH_RAMASK - | ODM_BB_RA_MASK -#endif - | ODM_BB_DYNAMIC_TXPWR - | ODM_BB_FA_CNT - | ODM_BB_RSSI_MONITOR - | ODM_BB_CCK_PD - | ODM_BB_PWR_SAVE - | ODM_RF_CALIBRATION - | ODM_RF_TX_PWR_TRACK -#ifdef CONFIG_ODM_ADAPTIVITY - | ODM_BB_ADAPTIVITY -#endif - ; - - if (!Adapter->registrypriv.qos_opt_enable) { - pdmpriv->InitODMFlag |= ODM_MAC_EDCA_TURBO; - } - - if(pHalData->AntDivCfg) - pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV; - -#if (MP_DRIVER==1) - if (Adapter->registrypriv.mp_mode == 1) { - pdmpriv->InitODMFlag = 0 - | ODM_RF_CALIBRATION - | ODM_RF_TX_PWR_TRACK - ; - } -#endif//(MP_DRIVER==1) - -#ifdef CONFIG_DISABLE_ODM - pdmpriv->InitODMFlag = 0; -#endif//CONFIG_DISABLE_ODM - - ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag); - - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_TX_UNI,&(Adapter->xmitpriv.tx_bytes)); - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_RX_UNI,&(Adapter->recvpriv.rx_bytes)); - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_WM_MODE,&(pmlmeext->cur_wireless_mode)); - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_SEC_CHNL_OFFSET,&(pHalData->nCur40MhzPrimeSC)); - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_SEC_MODE,&(Adapter->securitypriv.dot11PrivacyAlgrthm)); - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BW,&(pHalData->CurrentChannelBW )); - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_CHNL,&( pHalData->CurrentChannel)); - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_NET_CLOSED,&( Adapter->net_closed)); - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_MP_MODE,&(Adapter->registrypriv.mp_mode)); - - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BAND,&(pDM_Odm->u1Byte_temp)); - //================= only for 8192D ================= - /* - //pHalData->CurrentBandType92D - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BAND,&(pDM_Odm->u1Byte_temp)); - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_DMSP_GET_VALUE,&(pDM_Odm->u1Byte_temp)); - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BUDDY_ADAPTOR,&(pDM_Odm->PADAPTER_temp)); - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_DMSP_IS_MASTER,&(pDM_Odm->u1Byte_temp)); - //================= only for 8192D ================= - // driver havn't those variable now - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BT_OPERATION,&(pDM_Odm->u1Byte_temp)); - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BT_DISABLE_EDCA,&(pDM_Odm->u1Byte_temp)); - */ - - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_SCAN,&(pmlmepriv->bScanInProcess)); - ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_POWER_SAVING,&(pwrctrlpriv->bpower_saving)); - ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType); - - for(i=0; i< NUM_STA; i++) - { - //pDM_Odm->pODM_StaInfo[i] = NULL; - ODM_CmnInfoPtrArrayHook(pDM_Odm, ODM_CMNINFO_STA_STATUS,i,NULL); - } -} - -void -rtl8188e_InitHalDm( - IN PADAPTER Adapter - ) -{ - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); - u8 i; - -#ifdef CONFIG_USB_HCI - dm_InitGPIOSetting(Adapter); -#endif - - pdmpriv->DM_Type = DM_Type_ByDriver; - pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE; - - Update_ODM_ComInfo_88E(Adapter); - ODM_DMInit(pDM_Odm); - - Adapter->fix_rate = 0xFF; - -} - - -VOID -rtl8188e_HalDmWatchDog( - IN PADAPTER Adapter - ) -{ - BOOLEAN bFwCurrentInPSMode = _FALSE; - BOOLEAN bFwPSAwake = _TRUE; - u8 hw_init_completed = _FALSE; - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); -#ifdef CONFIG_CONCURRENT_MODE - PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; -#endif //CONFIG_CONCURRENT_MODE - - _func_enter_; - - hw_init_completed = Adapter->hw_init_completed; - - if (hw_init_completed == _FALSE) - goto skip_dm; - -#ifdef CONFIG_LPS - bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode; - rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake)); -#endif - -#ifdef CONFIG_P2P_PS - // Fw is under p2p powersaving mode, driver should stop dynamic mechanism. - // modifed by thomas. 2011.06.11. - if(Adapter->wdinfo.p2p_ps_mode) - bFwPSAwake = _FALSE; -#endif //CONFIG_P2P_PS - - if( (hw_init_completed == _TRUE) - && ((!bFwCurrentInPSMode) && bFwPSAwake)) - { - // - // Calculate Tx/Rx statistics. - // - dm_CheckStatistics(Adapter); - - // - // Dynamically switch RTS/CTS protection. - // - //dm_CheckProtection(Adapter); - -#ifdef CONFIG_PCI_HCI - // 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. - // Tx Migration settings. - //dm_InterruptMigration(Adapter); - - //if(Adapter->HalFunc.TxCheckStuckHandler(Adapter)) - // PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); -#endif - - } - - - //ODM - if (hw_init_completed == _TRUE) - { - u8 bLinked=_FALSE; - u8 bsta_state = _FALSE; - - #ifdef CONFIG_DISABLE_ODM - pHalData->odmpriv.SupportAbility = 0; - #endif - - if(rtw_linked_check(Adapter)) - bLinked = _TRUE; - -#ifdef CONFIG_CONCURRENT_MODE - if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter)) - bLinked = _TRUE; -#endif //CONFIG_CONCURRENT_MODE - ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked); - - - if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE)) - bsta_state = _TRUE; -#ifdef CONFIG_CONCURRENT_MODE - if(pbuddy_adapter && check_fwstate(&pbuddy_adapter->mlmepriv, WIFI_STATION_STATE)) - bsta_state = _TRUE; -#endif //CONFIG_CONCURRENT_MODE - ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_STATION_STATE, bsta_state); - - ODM_DMWatchdog(&pHalData->odmpriv); - - } - -skip_dm: - - // Check GPIO to determine current RF on/off and Pbc status. - // Check Hardware Radio ON/OFF or not -#ifdef CONFIG_PCI_HCI - if(pHalData->bGpioHwWpsPbc) -#endif - { - //temp removed - //dm_CheckPbcGPIO(Adapter); - } - return; -} - -void rtl8188e_init_dm_priv(IN PADAPTER Adapter) -{ - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - PDM_ODM_T podmpriv = &pHalData->odmpriv; - _rtw_memset(pdmpriv, 0, sizeof(struct dm_priv)); - //_rtw_spinlock_init(&(pHalData->odm_stainfo_lock)); - Init_ODM_ComInfo_88E(Adapter); -#ifdef CONFIG_SW_ANTENNA_DIVERSITY - //_init_timer(&(pdmpriv->SwAntennaSwitchTimer), Adapter->pnetdev , odm_SW_AntennaSwitchCallback, Adapter); - ODM_InitAllTimers(podmpriv ); -#endif - ODM_InitDebugSetting(podmpriv); -} - -void rtl8188e_deinit_dm_priv(IN PADAPTER Adapter) -{ - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - PDM_ODM_T podmpriv = &pHalData->odmpriv; - //_rtw_spinlock_free(&pHalData->odm_stainfo_lock); -#ifdef CONFIG_SW_ANTENNA_DIVERSITY - //_cancel_timer_ex(&pdmpriv->SwAntennaSwitchTimer); - ODM_CancelAllTimers(podmpriv); -#endif -} - - -#ifdef CONFIG_ANTENNA_DIVERSITY -// Add new function to reset the state of antenna diversity before link. -// -// Compare RSSI for deciding antenna -void AntDivCompare8188E(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src) -{ - //PADAPTER Adapter = pDM_Odm->Adapter ; - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - if(0 != pHalData->AntDivCfg ) - { - //DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi), - // src->Rssi,query_rx_pwr_percentage(src->Rssi)); - //select optimum_antenna for before linked =>For antenna diversity - if(dst->Rssi >= src->Rssi )//keep org parameter - { - src->Rssi = dst->Rssi; - src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna; - } - } -} - -// Add new function to reset the state of antenna diversity before link. -u8 AntDivBeforeLink8188E(PADAPTER Adapter ) -{ - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm =&pHalData->odmpriv; - SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - - // Condition that does not need to use antenna diversity. - if(pHalData->AntDivCfg==0) - { - //DBG_8192C("odm_AntDivBeforeLink8192C(): No AntDiv Mechanism.\n"); - return _FALSE; - } - - if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) - { - return _FALSE; - } - - - if(pDM_SWAT_Table->SWAS_NoLink_State == 0){ - //switch channel - pDM_SWAT_Table->SWAS_NoLink_State = 1; - pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; - - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna); - rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, _FALSE); - //DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B"); - return _TRUE; - } - else - { - pDM_SWAT_Table->SWAS_NoLink_State = 0; - return _FALSE; - } - -} -#endif - diff --git a/hal/rtl8188e/rtl8188e_hal_init.c b/hal/rtl8188e/rtl8188e_hal_init.c deleted file mode 100755 index 1e38e22..0000000 --- a/hal/rtl8188e/rtl8188e_hal_init.c +++ /dev/null @@ -1,3800 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _HAL_INIT_C_ - -#include -#include -#include - -#include - -#include - -#if defined(CONFIG_IOL) -#ifdef CONFIG_USB_HCI -#include -#endif -static void iol_mode_enable(PADAPTER padapter, u8 enable) -{ - u8 reg_0xf0 = 0; - - if(enable) - { - //Enable initial offload - reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG); - //DBG_871X("%s reg_0xf0:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0xf0, reg_0xf0|SW_OFFLOAD_EN); - rtw_write8(padapter, REG_SYS_CFG, reg_0xf0|SW_OFFLOAD_EN); - - if(padapter->bFWReady == _FALSE) - { - printk("bFWReady == _FALSE call reset 8051...\n"); - _8051Reset88E(padapter); - } - - } - else - { - //disable initial offload - reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG); - //DBG_871X("%s reg_0xf0:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0xf0, reg_0xf0& ~SW_OFFLOAD_EN); - rtw_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN); - } -} - -static s32 iol_execute(PADAPTER padapter, u8 control) -{ - s32 status = _FAIL; - u8 reg_0x88 = 0,reg_1c7=0; - u32 start = 0, passing_time = 0; - - u32 t1,t2; - control = control&0x0f; - reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0); - //DBG_871X("%s reg_0x88:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x88, reg_0x88|control); - rtw_write8(padapter, REG_HMEBOX_E0, reg_0x88|control); - - t1 = start = rtw_get_current_time(); - while( - //(reg_1c7 = rtw_read8(padapter, 0x1c7) >1) && - (reg_0x88=rtw_read8(padapter, REG_HMEBOX_E0)) & control - && (passing_time=rtw_get_passing_time_ms(start))<1000 - ) { - //DBG_871X("%s polling reg_0x88:0x%02x,reg_0x1c7:0x%02x\n", __FUNCTION__, reg_0x88,rtw_read8(padapter, 0x1c7) ); - //rtw_udelay_os(100); - } - - reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0); - status = (reg_0x88 & control)?_FAIL:_SUCCESS; - if(reg_0x88 & control<<4) - status = _FAIL; - t2= rtw_get_current_time(); - //printk("==> step iol_execute : %5u reg-0x1c0= 0x%02x\n",rtw_get_time_interval_ms(t1,t2),rtw_read8(padapter, 0x1c0)); - //DBG_871X("%s in %u ms, reg_0x88:0x%02x\n", __FUNCTION__, passing_time, reg_0x88); - - return status; -} - -static s32 iol_InitLLTTable( - PADAPTER padapter, - u8 txpktbuf_bndy - ) -{ - s32 rst = _SUCCESS; - iol_mode_enable(padapter, 1); - //DBG_871X("%s txpktbuf_bndy:%u\n", __FUNCTION__, txpktbuf_bndy); - rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy); - rst = iol_execute(padapter, CMD_INIT_LLT); - iol_mode_enable(padapter, 0); - return rst; -} - -static VOID -efuse_phymap_to_logical(u8 * phymap, u16 _offset, u16 _size_byte, u8 *pbuf) -{ - u8 *efuseTbl = NULL; - u8 rtemp8; - u16 eFuse_Addr = 0; - u8 offset, wren; - u16 i, j; - u16 **eFuseWord = NULL; - u16 efuse_utilized = 0; - u8 efuse_usage = 0; - u8 u1temp = 0; - - - efuseTbl = (u8*)rtw_zmalloc(EFUSE_MAP_LEN_88E); - if(efuseTbl == NULL) - { - DBG_871X("%s: alloc efuseTbl fail!\n", __FUNCTION__); - goto exit; - } - - eFuseWord= (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); - if(eFuseWord == NULL) - { - DBG_871X("%s: alloc eFuseWord fail!\n", __FUNCTION__); - goto exit; - } - - // 0. Refresh efuse init map as all oxFF. - for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) - for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) - eFuseWord[i][j] = 0xFFFF; - - // - // 1. Read the first byte to check if efuse is empty!!! - // - // - rtemp8 = *(phymap+eFuse_Addr); - if(rtemp8 != 0xFF) - { - efuse_utilized++; - //printk("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8); - eFuse_Addr++; - } - else - { - DBG_871X("EFUSE is empty efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, rtemp8); - goto exit; - } - - - // - // 2. Read real efuse content. Filter PG header and every section data. - // - while((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) - { - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr-1, *rtemp8)); - - // Check PG header for section num. - if((rtemp8 & 0x1F ) == 0x0F) //extended header - { - u1temp =( (rtemp8 & 0xE0) >> 5); - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x *rtemp&0xE0 0x%x\n", u1temp, *rtemp8 & 0xE0)); - - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x \n", u1temp)); - - rtemp8 = *(phymap+eFuse_Addr); - - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8)); - - if((rtemp8 & 0x0F) == 0x0F) - { - eFuse_Addr++; - rtemp8 = *(phymap+eFuse_Addr); - - if(rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) - { - eFuse_Addr++; - } - continue; - } - else - { - offset = ((rtemp8 & 0xF0) >> 1) | u1temp; - wren = (rtemp8 & 0x0F); - eFuse_Addr++; - } - } - else - { - offset = ((rtemp8 >> 4) & 0x0f); - wren = (rtemp8 & 0x0f); - } - - if(offset < EFUSE_MAX_SECTION_88E) - { - // Get word enable value from PG header - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren)); - - for(i=0; i= EFUSE_REAL_CONTENT_LEN_88E) - break; - - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d", eFuse_Addr)); - rtemp8 = *(phymap+eFuse_Addr); - eFuse_Addr++; - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); - - efuse_utilized++; - eFuseWord[offset][i] |= (((u2Byte)rtemp8 << 8) & 0xff00); - - if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) - break; - } - - wren >>= 1; - - } - } - - // Read next PG header - rtemp8 = *(phymap+eFuse_Addr); - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d rtemp 0x%x\n", eFuse_Addr, *rtemp8)); - - if(rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) - { - efuse_utilized++; - eFuse_Addr++; - } - } - - // - // 3. Collect 16 sections and 4 word unit into Efuse map. - // - for(i=0; i> 8) & 0xff); - } - } - - - // - // 4. Copy from Efuse map to output pointer memory!!! - // - for(i=0; i<_size_byte; i++) - { - pbuf[i] = efuseTbl[_offset+i]; - } - - // - // 5. Calculate Efuse utilization. - // - efuse_usage = (u1Byte)((efuse_utilized*100)/EFUSE_REAL_CONTENT_LEN_88E); - //Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized); - -exit: - if(efuseTbl) - rtw_mfree(efuseTbl, EFUSE_MAP_LEN_88E); - - if(eFuseWord) - rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); -} - -void efuse_read_phymap_from_txpktbuf( - ADAPTER *adapter, - int bcnhead, //beacon head, where FW store len(2-byte) and efuse physical map. - u8 *content, //buffer to store efuse physical map - u16 *size //for efuse content: the max byte to read. will update to byte read - ) -{ - u16 dbg_addr = 0; - u32 start = 0, passing_time = 0; - u8 reg_0x143 = 0; - u8 reg_0x106 = 0; - u32 lo32 = 0, hi32 = 0; - u16 len = 0, count = 0; - int i = 0; - u16 limit = *size; - - u8 *pos = content; - - if(bcnhead<0) //if not valid - bcnhead = rtw_read8(adapter, REG_TDECTRL+1); - - DBG_871X("%s bcnhead:%d\n", __FUNCTION__, bcnhead); - - //reg_0x106 = rtw_read8(adapter, REG_PKT_BUFF_ACCESS_CTRL); - //DBG_871X("%s reg_0x106:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x106, 0x69); - rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); - //DBG_871X("%s reg_0x106:0x%02x\n", __FUNCTION__, rtw_read8(adapter, 0x106)); - - dbg_addr = bcnhead*128/8; //8-bytes addressing - - while(1) - { - //DBG_871X("%s dbg_addr:0x%x\n", __FUNCTION__, dbg_addr+i); - rtw_write16(adapter, REG_PKTBUF_DBG_ADDR, dbg_addr+i); - - //DBG_871X("%s write reg_0x143:0x00\n", __FUNCTION__); - rtw_write8(adapter, REG_TXPKTBUF_DBG, 0); - start = rtw_get_current_time(); - while(!(reg_0x143=rtw_read8(adapter, REG_TXPKTBUF_DBG))//dbg - //while(rtw_read8(adapter, REG_TXPKTBUF_DBG) & BIT0 - && (passing_time=rtw_get_passing_time_ms(start))<1000 - ) { - DBG_871X("%s polling reg_0x143:0x%02x, reg_0x106:0x%02x\n", __FUNCTION__, reg_0x143, rtw_read8(adapter, 0x106)); - rtw_usleep_os(100); - } - - - lo32 = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L); - hi32 = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H); - - #if 0 - DBG_871X("%s lo32:0x%08x, %02x %02x %02x %02x\n", __FUNCTION__, lo32 - , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L) - , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+1) - , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+2) - , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+3) - ); - DBG_871X("%s hi32:0x%08x, %02x %02x %02x %02x\n", __FUNCTION__, hi32 - , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H) - , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H+1) - , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H+2) - , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H+3) - ); - #endif - - if(i==0) - { - #if 1 //for debug - u8 lenc[2]; - u16 lenbak, aaabak; - u16 aaa; - lenc[0] = rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L); - lenc[1] = rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+1); - - aaabak = le16_to_cpup((u16*)lenc); - lenbak = le16_to_cpu(*((u16*)lenc)); - aaa = le16_to_cpup((u16*)&lo32); - #endif - len = le16_to_cpu(*((u16*)&lo32)); - - limit = (len-2=count+2)?2:limit-count); - count+= (limit>=count+2)?2:limit-count; - pos=content+count; - - } - else - { - _rtw_memcpy(pos, ((u8*)&lo32), (limit>=count+4)?4:limit-count); - count+=(limit>=count+4)?4:limit-count; - pos=content+count; - - - } - - if(limit>count && len-2>count) { - _rtw_memcpy(pos, (u8*)&hi32, (limit>=count+4)?4:limit-count); - count+=(limit>=count+4)?4:limit-count; - pos=content+count; - } - - if(limit<=count || len-2<=count) - break; - - i++; - } - - rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, DISABLE_TRXPKT_BUF_ACCESS); - - DBG_871X("%s read count:%u\n", __FUNCTION__, count); - *size = count; - -} - - -static s32 iol_read_efuse( - PADAPTER padapter, - u8 txpktbuf_bndy, - u16 offset, - u16 size_byte, - u8 *logical_map - ) -{ - s32 status = _FAIL; - u8 reg_0x106 = 0; - u8 physical_map[512]; - u16 size = 512; - int i; - - - rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy); - _rtw_memset(physical_map, 0xFF, 512); - - ///reg_0x106 = rtw_read8(padapter, REG_PKT_BUFF_ACCESS_CTRL); - //DBG_871X("%s reg_0x106:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x106, 0x69); - rtw_write8(padapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); - //DBG_871X("%s reg_0x106:0x%02x\n", __FUNCTION__, rtw_read8(padapter, 0x106)); - - status = iol_execute(padapter, CMD_READ_EFUSE_MAP); - - if(status == _SUCCESS) - efuse_read_phymap_from_txpktbuf(padapter, txpktbuf_bndy, physical_map, &size); - - #if 0 - DBG_871X("%s physical map\n", __FUNCTION__); - for(i=0;i %s \n",__FUNCTION__); - - if(rtw_IOL_applied(padapter)){ - iol_mode_enable(padapter, 1); - result = iol_execute(padapter, CMD_READ_EFUSE_MAP); - if(result == _SUCCESS) - result = iol_execute(padapter, CMD_EFUSE_PATCH); - - iol_mode_enable(padapter, 0); - } - return result; -} - -static s32 iol_ioconfig( - PADAPTER padapter, - u8 iocfg_bndy - ) -{ - s32 rst = _SUCCESS; - - //DBG_871X("%s iocfg_bndy:%u\n", __FUNCTION__, iocfg_bndy); - rtw_write8(padapter, REG_TDECTRL+1, iocfg_bndy); - rst = iol_execute(padapter, CMD_IOCONFIG); - - return rst; -} - -int rtl8188e_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms,u32 bndy_cnt) -{ - - u32 start_time = rtw_get_current_time(); - u32 passing_time_ms; - u8 polling_ret,i; - int ret = _FAIL; - u32 t1,t2; - - //printk("===> %s ,bndy_cnt = %d \n",__FUNCTION__,bndy_cnt); - if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS) - goto exit; -#ifdef CONFIG_USB_HCI - { - struct pkt_attrib *pattrib = &xmit_frame->attrib; - if(rtw_usb_bulk_size_boundary(adapter,TXDESC_SIZE+pattrib->last_txcmdsz)) - { - if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS) - goto exit; - } - } -#endif //CONFIG_USB_HCI - - //rtw_IOL_cmd_buf_dump(adapter,xmit_frame->attrib.pktlen+TXDESC_OFFSET,xmit_frame->buf_addr); - //rtw_hal_mgnt_xmit(adapter, xmit_frame); - //rtw_dump_xframe_sync(adapter, xmit_frame); - - dump_mgntframe_and_wait(adapter, xmit_frame, max_wating_ms); - - t1= rtw_get_current_time(); - iol_mode_enable(adapter, 1); - for(i=0;i %s : %5u\n",__FUNCTION__,rtw_get_time_interval_ms(t1,t2)); -exit: - //restore BCN_HEAD - rtw_write8(adapter, REG_TDECTRL+1, 0); - return ret; -} - -void rtw_IOL_cmd_tx_pkt_buf_dump(ADAPTER *Adapter,int data_len) -{ - u32 fifo_data,reg_140; - u32 addr,rstatus,loop=0; - - u16 data_cnts = (data_len/8)+1; - u8 *pbuf =rtw_zvmalloc(data_len+10); - printk("###### %s ######\n",__FUNCTION__); - - rtw_write8(Adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); - if(pbuf){ - for(addr=0;addr< data_cnts;addr++){ - //printk("==> addr:0x%02x\n",addr); - rtw_write32(Adapter,0x140,addr); - rtw_usleep_os(2); - loop=0; - do{ - rstatus=(reg_140=rtw_read32(Adapter,REG_PKTBUF_DBG_CTRL)&BIT24); - //printk("rstatus = %02x, reg_140:0x%08x\n",rstatus,reg_140); - if(rstatus){ - fifo_data = rtw_read32(Adapter,REG_PKTBUF_DBG_DATA_L); - //printk("fifo_data_144:0x%08x\n",fifo_data); - _rtw_memcpy(pbuf+(addr*8),&fifo_data , 4); - - fifo_data = rtw_read32(Adapter,REG_PKTBUF_DBG_DATA_H); - //printk("fifo_data_148:0x%08x\n",fifo_data); - _rtw_memcpy(pbuf+(addr*8+4), &fifo_data, 4); - - } - rtw_usleep_os(2); - }while( !rstatus && (loop++ <10)); - } - rtw_IOL_cmd_buf_dump(Adapter,data_len,pbuf); - rtw_vmfree(pbuf, data_len+10); - - } - printk("###### %s ######\n",__FUNCTION__); -} - -#endif /* defined(CONFIG_IOL) */ - - -static VOID -_FWDownloadEnable( - IN PADAPTER padapter, - IN BOOLEAN enable - ) -{ - u8 tmp; - - if(enable) - { - // MCU firmware download enable. - tmp = rtw_read8(padapter, REG_MCUFWDL); - rtw_write8(padapter, REG_MCUFWDL, tmp|0x01); - - // 8051 reset - tmp = rtw_read8(padapter, REG_MCUFWDL+2); - rtw_write8(padapter, REG_MCUFWDL+2, tmp&0xf7); - } - else - { - - // MCU firmware download disable. - tmp = rtw_read8(padapter, REG_MCUFWDL); - rtw_write8(padapter, REG_MCUFWDL, tmp&0xfe); - - // Reserved for fw extension. - rtw_write8(padapter, REG_MCUFWDL+1, 0x00); - } -} -#define MAX_REG_BOLCK_SIZE 196 -static int -_BlockWrite( - IN PADAPTER padapter, - IN PVOID buffer, - IN u32 buffSize - ) -{ - int ret = _SUCCESS; - - u32 blockSize_p1 = 4; // (Default) Phase #1 : PCI muse use 4-byte write to download FW - u32 blockSize_p2 = 8; // Phase #2 : Use 8-byte, if Phase#1 use big size to write FW. - u32 blockSize_p3 = 1; // Phase #3 : Use 1-byte, the remnant of FW image. - u32 blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0; - u32 remainSize_p1 = 0, remainSize_p2 = 0; - u8 *bufferPtr = (u8*)buffer; - u32 i=0, offset=0; -#ifdef CONFIG_PCI_HCI - u8 remainFW[4] = {0, 0, 0, 0}; - u8 *p = NULL; -#endif - -#ifdef CONFIG_USB_HCI - blockSize_p1 = MAX_REG_BOLCK_SIZE; -#endif - - //3 Phase #1 - blockCount_p1 = buffSize / blockSize_p1; - remainSize_p1 = buffSize % blockSize_p1; - - if (blockCount_p1) { - RT_TRACE(_module_hal_init_c_, _drv_notice_, - ("_BlockWrite: [P1] buffSize(%d) blockSize_p1(%d) blockCount_p1(%d) remainSize_p1(%d)\n", - buffSize, blockSize_p1, blockCount_p1, remainSize_p1)); - } - - for (i = 0; i < blockCount_p1; i++) - { -#ifdef CONFIG_USB_HCI - ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1)); -#else - ret = rtw_write32(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), le32_to_cpu(*((u32*)(bufferPtr + i * blockSize_p1)))); -#endif - - if(ret == _FAIL) - goto exit; - } - -#ifdef CONFIG_PCI_HCI - p = (u8*)((u32*)(bufferPtr + blockCount_p1 * blockSize_p1)); - if (remainSize_p1) { - switch (remainSize_p1) { - case 0: - break; - case 3: - remainFW[2]=*(p+2); - case 2: - remainFW[1]=*(p+1); - case 1: - remainFW[0]=*(p); - ret = rtw_write32(padapter, (FW_8188E_START_ADDRESS + blockCount_p1 * blockSize_p1), - le32_to_cpu(*(u32*)remainFW)); - } - return ret; - } -#endif - - //3 Phase #2 - if (remainSize_p1) - { - offset = blockCount_p1 * blockSize_p1; - - blockCount_p2 = remainSize_p1/blockSize_p2; - remainSize_p2 = remainSize_p1%blockSize_p2; - - if (blockCount_p2) { - RT_TRACE(_module_hal_init_c_, _drv_notice_, - ("_BlockWrite: [P2] buffSize_p2(%d) blockSize_p2(%d) blockCount_p2(%d) remainSize_p2(%d)\n", - (buffSize-offset), blockSize_p2 ,blockCount_p2, remainSize_p2)); - } - -#ifdef CONFIG_USB_HCI - for (i = 0; i < blockCount_p2; i++) { - ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + offset + i*blockSize_p2), blockSize_p2, (bufferPtr + offset + i*blockSize_p2)); - - if(ret == _FAIL) - goto exit; - } -#endif - } - - //3 Phase #3 - if (remainSize_p2) - { - offset = (blockCount_p1 * blockSize_p1) + (blockCount_p2 * blockSize_p2); - - blockCount_p3 = remainSize_p2 / blockSize_p3; - - RT_TRACE(_module_hal_init_c_, _drv_notice_, - ("_BlockWrite: [P3] buffSize_p3(%d) blockSize_p3(%d) blockCount_p3(%d)\n", - (buffSize-offset), blockSize_p3, blockCount_p3)); - - for(i = 0 ; i < blockCount_p3 ; i++){ - ret =rtw_write8(padapter, (FW_8188E_START_ADDRESS + offset + i), *(bufferPtr + offset + i)); - - if(ret == _FAIL) - goto exit; - } - } - -exit: - return ret; -} - -static int -_PageWrite( - IN PADAPTER padapter, - IN u32 page, - IN PVOID buffer, - IN u32 size - ) -{ - u8 value8; - u8 u8Page = (u8) (page & 0x07) ; - - value8 = (rtw_read8(padapter, REG_MCUFWDL+2) & 0xF8) | u8Page ; - rtw_write8(padapter, REG_MCUFWDL+2,value8); - - return _BlockWrite(padapter,buffer,size); -} - -static VOID -_FillDummy( - u8* pFwBuf, - u32* pFwLen - ) -{ - u32 FwLen = *pFwLen; - u8 remain = (u8)(FwLen%4); - remain = (remain==0)?0:(4-remain); - - while(remain>0) - { - pFwBuf[FwLen] = 0; - FwLen++; - remain--; - } - - *pFwLen = FwLen; -} - -static int -_WriteFW( - IN PADAPTER padapter, - IN PVOID buffer, - IN u32 size - ) -{ - // Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. - // We can remove _ReadChipVersion from ReadpadapterInfo8192C later. - int ret = _SUCCESS; - u32 pageNums,remainSize ; - u32 page, offset; - u8 *bufferPtr = (u8*)buffer; - -#ifdef CONFIG_PCI_HCI - // 20100120 Joseph: Add for 88CE normal chip. - // Fill in zero to make firmware image to dword alignment. -// _FillDummy(bufferPtr, &size); -#endif - - pageNums = size / MAX_PAGE_SIZE ; - //RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4 \n")); - remainSize = size % MAX_PAGE_SIZE; - - for (page = 0; page < pageNums; page++) { - offset = page * MAX_PAGE_SIZE; - ret = _PageWrite(padapter, page, bufferPtr+offset, MAX_PAGE_SIZE); - - if(ret == _FAIL) - goto exit; - } - if (remainSize) { - offset = pageNums * MAX_PAGE_SIZE; - page = pageNums; - ret = _PageWrite(padapter, page, bufferPtr+offset, remainSize); - - if(ret == _FAIL) - goto exit; - - } - RT_TRACE(_module_hal_init_c_, _drv_info_, ("_WriteFW Done- for Normal chip.\n")); - -exit: - return ret; -} - -void _MCUIO_Reset88E(PADAPTER padapter,u8 bReset) -{ - u8 u1bTmp; - - if(bReset==_TRUE){ - // Reset MCU IO Wrapper- sugggest by SD1-Gimmy - u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1); - rtw_write8(padapter,REG_RSV_CTRL+1, (u1bTmp&(~BIT3))); - }else{ - // Enable MCU IO Wrapper - u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1); - rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp|BIT3); - } - -} -void _8051Reset88E(PADAPTER padapter) -{ - u8 u1bTmp; - - _MCUIO_Reset88E(padapter,_TRUE); - u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1); - rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT2)); - _MCUIO_Reset88E(padapter,_FALSE); - rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT2)); - - DBG_871X("=====> _8051Reset88E(): 8051 reset success .\n"); -} - -static s32 _FWFreeToGo(PADAPTER padapter) -{ - u32 counter = 0; - u32 value32; - u8 value8; - - // polling CheckSum report - do { - value32 = rtw_read32(padapter, REG_MCUFWDL); - if (value32 & FWDL_ChkSum_rpt) break; - } while (counter++ < POLLING_READY_TIMEOUT_COUNT); - - if (counter >= POLLING_READY_TIMEOUT_COUNT) { - DBG_871X("%s: chksum report fail! REG_MCUFWDL:0x%08x\n", __FUNCTION__, value32); - return _FAIL; - } - DBG_871X("%s: Checksum report OK! REG_MCUFWDL:0x%08x\n", __FUNCTION__, value32); - - - value32 = rtw_read32(padapter, REG_MCUFWDL); - value32 |= MCUFWDL_RDY; - value32 &= ~WINTINI_RDY; - rtw_write32(padapter, REG_MCUFWDL, value32); - - _8051Reset88E(padapter); - - // polling for FW ready - counter = 0; - do { - value32 = rtw_read32(padapter, REG_MCUFWDL); - if (value32 & WINTINI_RDY) { - DBG_871X("%s: Polling FW ready success!! REG_MCUFWDL:0x%08x\n", __FUNCTION__, value32); - return _SUCCESS; - } - rtw_udelay_os(5); - } while (counter++ < POLLING_READY_TIMEOUT_COUNT); - - DBG_871X ("%s: Polling FW ready fail!! REG_MCUFWDL:0x%08x\n", __FUNCTION__, value32); - return _FAIL; -} - -#define IS_FW_81xxC(padapter) (((GET_HAL_DATA(padapter))->FirmwareSignature & 0xFFF0) == 0x88C0) - - -#ifdef CONFIG_FILE_FWIMG -extern char *rtw_fw_file_path; -u8 FwBuffer8188E[FW_8188E_SIZE]; -#endif //CONFIG_FILE_FWIMG -#ifdef CONFIG_WOWLAN -// -// Description: -// Download 8192C firmware code. -// -// -s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw) -#else -s32 rtl8188e_FirmwareDownload(PADAPTER padapter) -#endif -{ - s32 rtStatus = _SUCCESS; - u8 writeFW_retry = 0; - u32 fwdl_start_time; - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); - - u8 *FwImage; - u32 FwImageLen; - u8 *pFwImageFileName; -#ifdef CONFIG_WOWLAN - u8 *FwImageWoWLAN; - u32 FwImageWoWLANLen; -#endif - u8 *pucMappedFile = NULL; - PRT_FIRMWARE_8188E pFirmware = NULL; - PRT_8188E_FIRMWARE_HDR pFwHdr = NULL; - u8 *pFirmwareBuf; - u32 FirmwareLen; - - - RT_TRACE(_module_hal_init_c_, _drv_info_, ("+%s\n", __FUNCTION__)); - pFirmware = (PRT_FIRMWARE_8188E)rtw_zmalloc(sizeof(RT_FIRMWARE_8188E)); - if(!pFirmware) - { - - rtStatus = _FAIL; - goto Exit; - } - - FwImage = (u8*)Rtl8188E_FwImageArray; - FwImageLen = Rtl8188E_FWImgArrayLength; - -#ifdef CONFIG_WOWLAN - FwImageWoWLAN = (u8*)Rtl8188E_FwWoWImageArray; - FwImageWoWLANLen = Rtl8188E_FwWoWImgArrayLength; -#endif //CONFIG_WOWLAN - -// RT_TRACE(_module_hal_init_c_, _drv_err_, ("rtl8723a_FirmwareDownload: %s\n", pFwImageFileName)); - - #ifdef CONFIG_FILE_FWIMG - if(rtw_is_file_readable(rtw_fw_file_path) == _TRUE) - { - DBG_871X("%s accquire FW from file:%s\n", __FUNCTION__, rtw_fw_file_path); - pFirmware->eFWSource = FW_SOURCE_IMG_FILE; - } - else - #endif //CONFIG_FILE_FWIMG - { - pFirmware->eFWSource = FW_SOURCE_HEADER_FILE; - } - - switch(pFirmware->eFWSource) - { - case FW_SOURCE_IMG_FILE: - #ifdef CONFIG_FILE_FWIMG - rtStatus = rtw_retrive_from_file(rtw_fw_file_path, FwBuffer8188E, FW_8188E_SIZE); - pFirmware->ulFwLength = rtStatus>=0?rtStatus:0; - pFirmware->szFwBuffer = FwBuffer8188E; - #endif //CONFIG_FILE_FWIMG - break; - case FW_SOURCE_HEADER_FILE: - if (FwImageLen > FW_8188E_SIZE) { - rtStatus = _FAIL; - RT_TRACE(_module_hal_init_c_, _drv_err_, ("Firmware size exceed 0x%X. Check it.\n", FW_8188E_SIZE) ); - goto Exit; - } - - pFirmware->szFwBuffer = FwImage; - pFirmware->ulFwLength = FwImageLen; -#ifdef CONFIG_WOWLAN - if(bUsedWoWLANFw){ - pFirmware->szWoWLANFwBuffer = FwImageWoWLAN; - pFirmware->ulWoWLANFwLength = FwImageWoWLANLen; - } -#endif //CONFIG_WOWLAN - break; - } -#ifdef CONFIG_WOWLAN - if(bUsedWoWLANFw) { - pFirmwareBuf = pFirmware->szWoWLANFwBuffer; - FirmwareLen = pFirmware->ulWoWLANFwLength; - pFwHdr = (PRT_8188E_FIRMWARE_HDR)pFirmware->szWoWLANFwBuffer; - } else -#endif - { - pFirmwareBuf = pFirmware->szFwBuffer; - FirmwareLen = pFirmware->ulFwLength; - DBG_871X_LEVEL(_drv_info_, "+%s: !bUsedWoWLANFw, FmrmwareLen:%d+\n", __func__, FirmwareLen); - - // To Check Fw header. Added by tynli. 2009.12.04. - pFwHdr = (PRT_8188E_FIRMWARE_HDR)pFirmware->szFwBuffer; - } - - pHalData->FirmwareVersion = le16_to_cpu(pFwHdr->Version); - pHalData->FirmwareSubVersion = pFwHdr->Subversion; - pHalData->FirmwareSignature = le16_to_cpu(pFwHdr->Signature); - - DBG_871X ("%s: fw_ver=%d fw_subver=%d sig=0x%x\n", - __FUNCTION__, pHalData->FirmwareVersion, pHalData->FirmwareSubVersion, pHalData->FirmwareSignature); - - if (IS_FW_HEADER_EXIST(pFwHdr)) - { - // Shift 32 bytes for FW header - pFirmwareBuf = pFirmwareBuf + 32; - FirmwareLen = FirmwareLen - 32; - } - - // Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, - // or it will cause download Fw fail. 2010.02.01. by tynli. - if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) //8051 RAM code - { - rtw_write8(padapter, REG_MCUFWDL, 0x00); - _8051Reset88E(padapter); - } - - _FWDownloadEnable(padapter, _TRUE); - fwdl_start_time = rtw_get_current_time(); - while(1) { - //reset the FWDL chksum - rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL)|FWDL_ChkSum_rpt); - - rtStatus = _WriteFW(padapter, pFirmwareBuf, FirmwareLen); - - if(rtStatus == _SUCCESS || padapter->bDriverStopped || padapter->bSurpriseRemoved - ||(writeFW_retry++ >= 3 && rtw_get_passing_time_ms(fwdl_start_time) > 500) - ) - break; - } - _FWDownloadEnable(padapter, _FALSE); - - DBG_871X("%s writeFW_retry:%u, time after fwdl_start_time:%ums\n", __FUNCTION__ - , writeFW_retry - , rtw_get_passing_time_ms(fwdl_start_time) - ); - - if(_SUCCESS != rtStatus){ - DBG_871X("DL Firmware failed!\n"); - goto Exit; - } - - rtStatus = _FWFreeToGo(padapter); - if (_SUCCESS != rtStatus) { - DBG_871X("DL Firmware failed!\n"); - goto Exit; - } - RT_TRACE(_module_hal_init_c_, _drv_info_, ("Firmware is ready to run!\n")); - -Exit: - - if (pFirmware) - rtw_mfree((u8*)pFirmware, sizeof(RT_FIRMWARE_8188E)); - - //RT_TRACE(COMP_INIT, DBG_LOUD, (" <=== FirmwareDownload91C()\n")); -#ifdef CONFIG_WOWLAN - if (adapter_to_pwrctl(padapter)->wowlan_mode) - rtl8188e_InitializeFirmwareVars(padapter); - else - DBG_871X_LEVEL(_drv_always_, "%s: wowland_mode:%d wowlan_wake_reason:%d\n", - __func__, adapter_to_pwrctl(padapter)->wowlan_mode, - adapter_to_pwrctl(padapter)->wowlan_wake_reason); -#endif - - return rtStatus; -} - -#ifdef CONFIG_WOWLAN -void rtl8188e_InitializeFirmwareVars(PADAPTER padapter) -{ - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); - struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); - - // Init Fw LPS related. - pwrpriv->bFwCurrentInPSMode = _FALSE; - // Init H2C counter. by tynli. 2009.12.09. - pHalData->LastHMEBoxNum = 0; -} - -//=========================================== - -// -// Description: Prepare some information to Fw for WoWLAN. -// (1) Download wowlan Fw. -// (2) Download RSVD page packets. -// (3) Enable AP offload if needed. -// -// 2011.04.12 by tynli. -// -VOID -SetFwRelatedForWoWLAN8188ES( - IN PADAPTER padapter, - IN u8 bHostIsGoingtoSleep -) -{ - int status=_FAIL; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - u8 bRecover = _FALSE; - // - // 1. Before WoWLAN we need to re-download WoWLAN Fw. - // - status = rtl8188e_FirmwareDownload(padapter, bHostIsGoingtoSleep); - if(status != _SUCCESS) { - DBG_871X("ConfigFwRelatedForWoWLAN8188ES(): Re-Download Firmware failed!!\n"); - return; - } else { - DBG_871X("ConfigFwRelatedForWoWLAN8188ES(): Re-Download Firmware Success !!\n"); - } - // - // 2. Re-Init the variables about Fw related setting. - // - rtl8188e_InitializeFirmwareVars(padapter); -} -#else -void rtl8188e_InitializeFirmwareVars(PADAPTER padapter) -{ - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); - - // Init Fw LPS related. - adapter_to_pwrctl(padapter)->bFwCurrentInPSMode = _FALSE; - - // Init H2C counter. by tynli. 2009.12.09. - pHalData->LastHMEBoxNum = 0; -// pHalData->H2CQueueHead = 0; -// pHalData->H2CQueueTail = 0; -// pHalData->H2CStopInsertQueue = FALSE; -} -#endif //CONFIG_WOWLAN - -static void rtl8188e_free_hal_data(PADAPTER padapter) -{ -_func_enter_; - - if(padapter->HalData) - { - rtw_mfree(padapter->HalData, sizeof(HAL_DATA_TYPE)); - padapter->HalData = NULL; - } - -_func_exit_; -} - -//=========================================================== -// Efuse related code -//=========================================================== -enum{ - VOLTAGE_V25 = 0x03, - LDOE25_SHIFT = 28 , - }; - -static BOOLEAN -hal_EfusePgPacketWrite2ByteHeader( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest); -static BOOLEAN -hal_EfusePgPacketWrite1ByteHeader( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest); -static BOOLEAN -hal_EfusePgPacketWriteData( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest); - -static VOID -hal_EfusePowerSwitch_RTL8188E( - IN PADAPTER pAdapter, - IN u8 bWrite, - IN u8 PwrState) -{ - u8 tempval; - u16 tmpV16; - - if (PwrState == _TRUE) - { - rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON); - - // 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid - tmpV16 = rtw_read16(pAdapter,REG_SYS_ISO_CTRL); - if( ! (tmpV16 & PWC_EV12V ) ){ - tmpV16 |= PWC_EV12V ; - rtw_write16(pAdapter,REG_SYS_ISO_CTRL,tmpV16); - } - // Reset: 0x0000h[28], default valid - tmpV16 = rtw_read16(pAdapter,REG_SYS_FUNC_EN); - if( !(tmpV16 & FEN_ELDR) ){ - tmpV16 |= FEN_ELDR ; - rtw_write16(pAdapter,REG_SYS_FUNC_EN,tmpV16); - } - - // Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid - tmpV16 = rtw_read16(pAdapter,REG_SYS_CLKR); - if( (!(tmpV16 & LOADER_CLK_EN) ) ||(!(tmpV16 & ANA8M) ) ){ - tmpV16 |= (LOADER_CLK_EN |ANA8M ) ; - rtw_write16(pAdapter,REG_SYS_CLKR,tmpV16); - } - - if(bWrite == _TRUE) - { - // Enable LDO 2.5V before read/write action - tempval = rtw_read8(pAdapter, EFUSE_TEST+3); - tempval &= 0x0F; - tempval |= (VOLTAGE_V25 << 4); - rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80)); - } - } - else - { - rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF); - - if(bWrite == _TRUE){ - // Disable LDO 2.5V after read/write action - tempval = rtw_read8(pAdapter, EFUSE_TEST+3); - rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F)); - } - } -} - -static VOID -rtl8188e_EfusePowerSwitch( - IN PADAPTER pAdapter, - IN u8 bWrite, - IN u8 PwrState) -{ - hal_EfusePowerSwitch_RTL8188E(pAdapter, bWrite, PwrState); -} - - - -static bool efuse_read_phymap( - PADAPTER Adapter, - u8 *pbuf, //buffer to store efuse physical map - u16 *size //the max byte to read. will update to byte read - ) -{ - u8 *pos = pbuf; - u16 limit = *size; - u16 addr = 0; - bool reach_end = _FALSE; - - // - // Refresh efuse init map as all 0xFF. - // - _rtw_memset(pbuf, 0xFF, limit); - - - // - // Read physical efuse content. - // - while(addr < limit) - { - ReadEFuseByte(Adapter, addr, pos, _FALSE); - if(*pos != 0xFF) - { - pos++; - addr++; - } - else - { - reach_end = _TRUE; - break; - } - } - - *size = addr; - - return reach_end; - -} - -static VOID -Hal_EfuseReadEFuse88E( - PADAPTER Adapter, - u16 _offset, - u16 _size_byte, - u8 *pbuf, - IN BOOLEAN bPseudoTest - ) -{ - //u8 efuseTbl[EFUSE_MAP_LEN_88E]; - u8 *efuseTbl = NULL; - u8 rtemp8[1]; - u16 eFuse_Addr = 0; - u8 offset, wren; - u16 i, j; - //u16 eFuseWord[EFUSE_MAX_SECTION_88E][EFUSE_MAX_WORD_UNIT]; - u16 **eFuseWord = NULL; - u16 efuse_utilized = 0; - u8 efuse_usage = 0; - u8 u1temp = 0; - - // - // Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. - // - if((_offset + _size_byte)>EFUSE_MAP_LEN_88E) - {// total E-Fuse table is 512bytes - DBG_8192C("Hal_EfuseReadEFuse88E(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte); - goto exit; - } - - efuseTbl = (u8*)rtw_zmalloc(EFUSE_MAP_LEN_88E); - if(efuseTbl == NULL) - { - DBG_871X("%s: alloc efuseTbl fail!\n", __FUNCTION__); - goto exit; - } - - eFuseWord= (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); - if(eFuseWord == NULL) - { - DBG_871X("%s: alloc eFuseWord fail!\n", __FUNCTION__); - goto exit; - } - - // 0. Refresh efuse init map as all oxFF. - for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) - for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) - eFuseWord[i][j] = 0xFFFF; - - // - // 1. Read the first byte to check if efuse is empty!!! - // - // - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); - if(*rtemp8 != 0xFF) - { - efuse_utilized++; - //DBG_8192C("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8); - eFuse_Addr++; - } - else - { - DBG_871X("EFUSE is empty efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8); - goto exit; - } - - - // - // 2. Read real efuse content. Filter PG header and every section data. - // - while((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) - { - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr-1, *rtemp8)); - - // Check PG header for section num. - if((*rtemp8 & 0x1F ) == 0x0F) //extended header - { - u1temp =( (*rtemp8 & 0xE0) >> 5); - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x *rtemp&0xE0 0x%x\n", u1temp, *rtemp8 & 0xE0)); - - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x \n", u1temp)); - - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); - - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8)); - - if((*rtemp8 & 0x0F) == 0x0F) - { - eFuse_Addr++; - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); - - if(*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) - { - eFuse_Addr++; - } - continue; - } - else - { - offset = ((*rtemp8 & 0xF0) >> 1) | u1temp; - wren = (*rtemp8 & 0x0F); - eFuse_Addr++; - } - } - else - { - offset = ((*rtemp8 >> 4) & 0x0f); - wren = (*rtemp8 & 0x0f); - } - - if(offset < EFUSE_MAX_SECTION_88E) - { - // Get word enable value from PG header - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren)); - - for(i=0; i= EFUSE_REAL_CONTENT_LEN_88E) - break; - - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d", eFuse_Addr)); - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); - eFuse_Addr++; - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); - - efuse_utilized++; - eFuseWord[offset][i] |= (((u2Byte)*rtemp8 << 8) & 0xff00); - - if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) - break; - } - - wren >>= 1; - - } - } - - // Read next PG header - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); - //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d rtemp 0x%x\n", eFuse_Addr, *rtemp8)); - - if(*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) - { - efuse_utilized++; - eFuse_Addr++; - } - } - - // - // 3. Collect 16 sections and 4 word unit into Efuse map. - // - for(i=0; i> 8) & 0xff); - } - } - - - // - // 4. Copy from Efuse map to output pointer memory!!! - // - for(i=0; i<_size_byte; i++) - { - pbuf[i] = efuseTbl[_offset+i]; - } - - // - // 5. Calculate Efuse utilization. - // - efuse_usage = (u1Byte)((eFuse_Addr*100)/EFUSE_REAL_CONTENT_LEN_88E); - rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr); - -exit: - if(efuseTbl) - rtw_mfree(efuseTbl, EFUSE_MAP_LEN_88E); - - if(eFuseWord) - rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); -} - - -static BOOLEAN -Hal_EfuseSwitchToBank( - IN PADAPTER pAdapter, - IN u8 bank, - IN BOOLEAN bPseudoTest - ) -{ - BOOLEAN bRet = _FALSE; - u32 value32=0; - - //RTPRINT(FEEPROM, EFUSE_PG, ("Efuse switch bank to %d\n", bank)); - if(bPseudoTest) - { - fakeEfuseBank = bank; - bRet = _TRUE; - } - else - { - if(IS_HARDWARE_TYPE_8723A(pAdapter) && - INCLUDE_MULTI_FUNC_BT(pAdapter)) - { - value32 = rtw_read32(pAdapter, EFUSE_TEST); - bRet = _TRUE; - switch(bank) - { - case 0: - value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); - break; - case 1: - value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_0); - break; - case 2: - value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_1); - break; - case 3: - value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_2); - break; - default: - value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); - bRet = _FALSE; - break; - } - rtw_write32(pAdapter, EFUSE_TEST, value32); - } - else - bRet = _TRUE; - } - return bRet; -} - - - -static VOID -ReadEFuseByIC( - PADAPTER Adapter, - u8 efuseType, - u16 _offset, - u16 _size_byte, - u8 *pbuf, - IN BOOLEAN bPseudoTest - ) -{ -#ifdef DBG_IOL_READ_EFUSE_MAP - u8 logical_map[512]; -#endif - -#ifdef CONFIG_IOL_READ_EFUSE_MAP - if(!bPseudoTest )//&& rtw_IOL_applied(Adapter)) - { - int ret = _FAIL; - if(rtw_IOL_applied(Adapter)) - { - rtw_hal_power_on(Adapter); - - iol_mode_enable(Adapter, 1); - #ifdef DBG_IOL_READ_EFUSE_MAP - iol_read_efuse(Adapter, 0, _offset, _size_byte, logical_map); - #else - ret = iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf); - #endif - iol_mode_enable(Adapter, 0); - - if(_SUCCESS == ret) - goto exit; - } - } -#endif - Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest); - -exit: - -#ifdef DBG_IOL_READ_EFUSE_MAP - if(_rtw_memcmp(logical_map, Adapter->eeprompriv.efuse_eeprom_data, 0x130) == _FALSE) - { - int i; - DBG_871X("%s compare first 0x130 byte fail\n", __FUNCTION__); - for(i=0;i<512;i++) - { - if(i%16==0) - DBG_871X("0x%03x: ", i); - DBG_871X("%02x ", logical_map[i]); - if(i%16==15) - DBG_871X("\n"); - } - DBG_871X("\n"); - } -#endif - - return; -} - -static VOID -ReadEFuse_Pseudo( - PADAPTER Adapter, - u8 efuseType, - u16 _offset, - u16 _size_byte, - u8 *pbuf, - IN BOOLEAN bPseudoTest - ) -{ - Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest); -} - -static VOID -rtl8188e_ReadEFuse( - PADAPTER Adapter, - u8 efuseType, - u16 _offset, - u16 _size_byte, - u8 *pbuf, - IN BOOLEAN bPseudoTest - ) -{ - if(bPseudoTest) - { - ReadEFuse_Pseudo(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); - } - else - { - ReadEFuseByIC(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); - } -} - -//Do not support BT -VOID -Hal_EFUSEGetEfuseDefinition88E( - IN PADAPTER pAdapter, - IN u1Byte efuseType, - IN u1Byte type, - OUT PVOID pOut - ) -{ - switch(type) - { - case TYPE_EFUSE_MAX_SECTION: - { - u8* pMax_section; - pMax_section = (u8*)pOut; - *pMax_section = EFUSE_MAX_SECTION_88E; - } - break; - case TYPE_EFUSE_REAL_CONTENT_LEN: - { - u16* pu2Tmp; - pu2Tmp = (u16*)pOut; - *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; - } - break; - case TYPE_EFUSE_CONTENT_LEN_BANK: - { - u16* pu2Tmp; - pu2Tmp = (u16*)pOut; - *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; - } - break; - case TYPE_AVAILABLE_EFUSE_BYTES_BANK: - { - u16* pu2Tmp; - pu2Tmp = (u16*)pOut; - *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: - { - u16* pu2Tmp; - pu2Tmp = (u16*)pOut; - *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - case TYPE_EFUSE_MAP_LEN: - { - u16* pu2Tmp; - pu2Tmp = (u16*)pOut; - *pu2Tmp = (u16)EFUSE_MAP_LEN_88E; - } - break; - case TYPE_EFUSE_PROTECT_BYTES_BANK: - { - u8* pu1Tmp; - pu1Tmp = (u8*)pOut; - *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - default: - { - u8* pu1Tmp; - pu1Tmp = (u8*)pOut; - *pu1Tmp = 0; - } - break; - } -} -VOID -Hal_EFUSEGetEfuseDefinition_Pseudo88E( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u8 type, - OUT PVOID pOut - ) -{ - switch(type) - { - case TYPE_EFUSE_MAX_SECTION: - { - u8* pMax_section; - pMax_section = (pu1Byte)pOut; - *pMax_section = EFUSE_MAX_SECTION_88E; - } - break; - case TYPE_EFUSE_REAL_CONTENT_LEN: - { - u16* pu2Tmp; - pu2Tmp = (pu2Byte)pOut; - *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; - } - break; - case TYPE_EFUSE_CONTENT_LEN_BANK: - { - u16* pu2Tmp; - pu2Tmp = (pu2Byte)pOut; - *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; - } - break; - case TYPE_AVAILABLE_EFUSE_BYTES_BANK: - { - u16* pu2Tmp; - pu2Tmp = (pu2Byte)pOut; - *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: - { - u16* pu2Tmp; - pu2Tmp = (pu2Byte)pOut; - *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - case TYPE_EFUSE_MAP_LEN: - { - u16* pu2Tmp; - pu2Tmp = (pu2Byte)pOut; - *pu2Tmp = (u2Byte)EFUSE_MAP_LEN_88E; - } - break; - case TYPE_EFUSE_PROTECT_BYTES_BANK: - { - u8* pu1Tmp; - pu1Tmp = (u8*)pOut; - *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - default: - { - u8* pu1Tmp; - pu1Tmp = (u8*)pOut; - *pu1Tmp = 0; - } - break; - } -} - - -static VOID -rtl8188e_EFUSE_GetEfuseDefinition( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u8 type, - OUT void *pOut, - IN BOOLEAN bPseudoTest - ) -{ - if(bPseudoTest) - { - Hal_EFUSEGetEfuseDefinition_Pseudo88E(pAdapter, efuseType, type, pOut); - } - else - { - Hal_EFUSEGetEfuseDefinition88E(pAdapter, efuseType, type, pOut); - } -} - -static u8 -Hal_EfuseWordEnableDataWrite( IN PADAPTER pAdapter, - IN u16 efuse_addr, - IN u8 word_en, - IN u8 *data, - IN BOOLEAN bPseudoTest) -{ - u16 tmpaddr = 0; - u16 start_addr = efuse_addr; - u8 badworden = 0x0F; - u8 tmpdata[8]; - - _rtw_memset((PVOID)tmpdata, 0xff, PGPKT_DATA_SIZE); - //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("word_en = %x efuse_addr=%x\n", word_en, efuse_addr)); - - if(!(word_en&BIT0)) - { - tmpaddr = start_addr; - efuse_OneByteWrite(pAdapter,start_addr++, data[0], bPseudoTest); - efuse_OneByteWrite(pAdapter,start_addr++, data[1], bPseudoTest); - - efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[0], bPseudoTest); - efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[1], bPseudoTest); - if((data[0]!=tmpdata[0])||(data[1]!=tmpdata[1])){ - badworden &= (~BIT0); - } - } - if(!(word_en&BIT1)) - { - tmpaddr = start_addr; - efuse_OneByteWrite(pAdapter,start_addr++, data[2], bPseudoTest); - efuse_OneByteWrite(pAdapter,start_addr++, data[3], bPseudoTest); - - efuse_OneByteRead(pAdapter,tmpaddr , &tmpdata[2], bPseudoTest); - efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[3], bPseudoTest); - if((data[2]!=tmpdata[2])||(data[3]!=tmpdata[3])){ - badworden &=( ~BIT1); - } - } - if(!(word_en&BIT2)) - { - tmpaddr = start_addr; - efuse_OneByteWrite(pAdapter,start_addr++, data[4], bPseudoTest); - efuse_OneByteWrite(pAdapter,start_addr++, data[5], bPseudoTest); - - efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[4], bPseudoTest); - efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[5], bPseudoTest); - if((data[4]!=tmpdata[4])||(data[5]!=tmpdata[5])){ - badworden &=( ~BIT2); - } - } - if(!(word_en&BIT3)) - { - tmpaddr = start_addr; - efuse_OneByteWrite(pAdapter,start_addr++, data[6], bPseudoTest); - efuse_OneByteWrite(pAdapter,start_addr++, data[7], bPseudoTest); - - efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[6], bPseudoTest); - efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[7], bPseudoTest); - if((data[6]!=tmpdata[6])||(data[7]!=tmpdata[7])){ - badworden &=( ~BIT3); - } - } - return badworden; -} - -static u8 -Hal_EfuseWordEnableDataWrite_Pseudo( IN PADAPTER pAdapter, - IN u16 efuse_addr, - IN u8 word_en, - IN u8 *data, - IN BOOLEAN bPseudoTest) -{ - u8 ret=0; - - ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest); - - return ret; -} - -static u8 -rtl8188e_Efuse_WordEnableDataWrite( IN PADAPTER pAdapter, - IN u16 efuse_addr, - IN u8 word_en, - IN u8 *data, - IN BOOLEAN bPseudoTest) -{ - u8 ret=0; - - if(bPseudoTest) - { - ret = Hal_EfuseWordEnableDataWrite_Pseudo(pAdapter, efuse_addr, word_en, data, bPseudoTest); - } - else - { - ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest); - } - - return ret; -} - - -static u16 -hal_EfuseGetCurrentSize_8188e(IN PADAPTER pAdapter, - IN BOOLEAN bPseudoTest) -{ - int bContinual = _TRUE; - - u16 efuse_addr = 0; - u8 hoffset=0,hworden=0; - u8 efuse_data,word_cnts=0; - - if(bPseudoTest) - { - efuse_addr = (u16)(fakeEfuseUsedBytes); - } - else - { - rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); - } - //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), start_efuse_addr = %d\n", efuse_addr)); - - while ( bContinual && - efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && - AVAILABLE_EFUSE_ADDR(efuse_addr)) - { - if(efuse_data!=0xFF) - { - if((efuse_data&0x1F) == 0x0F) //extended header - { - hoffset = efuse_data; - efuse_addr++; - efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest); - if((efuse_data & 0x0F) == 0x0F) - { - efuse_addr++; - continue; - } - else - { - hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); - hworden = efuse_data & 0x0F; - } - } - else - { - hoffset = (efuse_data>>4) & 0x0F; - hworden = efuse_data & 0x0F; - } - word_cnts = Efuse_CalculateWordCnts(hworden); - //read next header - efuse_addr = efuse_addr + (word_cnts*2)+1; - } - else - { - bContinual = _FALSE ; - } - } - - if(bPseudoTest) - { - fakeEfuseUsedBytes = efuse_addr; - //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), return %d\n", fakeEfuseUsedBytes)); - } - else - { - rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); - //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), return %d\n", efuse_addr)); - } - - return efuse_addr; -} - -static u16 -Hal_EfuseGetCurrentSize_Pseudo(IN PADAPTER pAdapter, - IN BOOLEAN bPseudoTest) -{ - u16 ret=0; - - ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest); - - return ret; -} - - -static u16 -rtl8188e_EfuseGetCurrentSize( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN BOOLEAN bPseudoTest) -{ - u16 ret=0; - - if(bPseudoTest) - { - ret = Hal_EfuseGetCurrentSize_Pseudo(pAdapter, bPseudoTest); - } - else - { - ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest); - - } - - return ret; -} - - -static int -hal_EfusePgPacketRead_8188e( - IN PADAPTER pAdapter, - IN u8 offset, - IN u8 *data, - IN BOOLEAN bPseudoTest) -{ - u8 ReadState = PG_STATE_HEADER; - - int bContinual = _TRUE; - int bDataEmpty = _TRUE ; - - u8 efuse_data,word_cnts = 0; - u16 efuse_addr = 0; - u8 hoffset = 0,hworden = 0; - u8 tmpidx = 0; - u8 tmpdata[8]; - u8 max_section = 0; - u8 tmp_header = 0; - - EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (PVOID)&max_section, bPseudoTest); - - if(data==NULL) - return _FALSE; - if(offset>max_section) - return _FALSE; - - _rtw_memset((PVOID)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); - _rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); - - - // - // Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. - // Skip dummy parts to prevent unexpected data read from Efuse. - // By pass right now. 2009.02.19. - // - while(bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr) ) - { - //------- Header Read ------------- - if(ReadState & PG_STATE_HEADER) - { - if(efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest)&&(efuse_data!=0xFF)) - { - if(EXT_HEADER(efuse_data)) - { - tmp_header = efuse_data; - efuse_addr++; - efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest); - if(!ALL_WORDS_DISABLED(efuse_data)) - { - hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); - hworden = efuse_data & 0x0F; - } - else - { - DBG_8192C("Error, All words disabled\n"); - efuse_addr++; - continue; - } - } - else - { - hoffset = (efuse_data>>4) & 0x0F; - hworden = efuse_data & 0x0F; - } - word_cnts = Efuse_CalculateWordCnts(hworden); - bDataEmpty = _TRUE ; - - if(hoffset==offset) - { - for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++) - { - if(efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx ,&efuse_data, bPseudoTest) ) - { - tmpdata[tmpidx] = efuse_data; - if(efuse_data!=0xff) - { - bDataEmpty = _FALSE; - } - } - } - if(bDataEmpty==_FALSE){ - ReadState = PG_STATE_DATA; - }else{//read next header - efuse_addr = efuse_addr + (word_cnts*2)+1; - ReadState = PG_STATE_HEADER; - } - } - else{//read next header - efuse_addr = efuse_addr + (word_cnts*2)+1; - ReadState = PG_STATE_HEADER; - } - - } - else{ - bContinual = _FALSE ; - } - } - //------- Data section Read ------------- - else if(ReadState & PG_STATE_DATA) - { - efuse_WordEnableDataRead(hworden,tmpdata,data); - efuse_addr = efuse_addr + (word_cnts*2)+1; - ReadState = PG_STATE_HEADER; - } - - } - - if( (data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff) && (data[3]==0xff) && - (data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff) && (data[7]==0xff)) - return _FALSE; - else - return _TRUE; - -} - -static int -Hal_EfusePgPacketRead( IN PADAPTER pAdapter, - IN u8 offset, - IN u8 *data, - IN BOOLEAN bPseudoTest) -{ - int ret=0; - - ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest); - - - return ret; -} - -static int -Hal_EfusePgPacketRead_Pseudo( IN PADAPTER pAdapter, - IN u8 offset, - IN u8 *data, - IN BOOLEAN bPseudoTest) -{ - int ret=0; - - ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest); - - return ret; -} - -static int -rtl8188e_Efuse_PgPacketRead( IN PADAPTER pAdapter, - IN u8 offset, - IN u8 *data, - IN BOOLEAN bPseudoTest) -{ - int ret=0; - - if(bPseudoTest) - { - ret = Hal_EfusePgPacketRead_Pseudo(pAdapter, offset, data, bPseudoTest); - } - else - { - ret = Hal_EfusePgPacketRead(pAdapter, offset, data, bPseudoTest); - } - - return ret; -} - -static BOOLEAN -hal_EfuseFixHeaderProcess( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN PPGPKT_STRUCT pFixPkt, - IN u16 *pAddr, - IN BOOLEAN bPseudoTest -) -{ - u8 originaldata[8], badworden=0; - u16 efuse_addr=*pAddr; - u32 PgWriteSuccess=0; - - _rtw_memset((PVOID)originaldata, 0xff, 8); - - if(Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) - { //check if data exist - badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pFixPkt->word_en, originaldata, bPseudoTest); - - if(badworden != 0xf) // write fail - { - PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest); - - if(!PgWriteSuccess) - return _FALSE; - else - efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); - } - else - { - efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1; - } - } - else - { - efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1; - } - *pAddr = efuse_addr; - return _TRUE; -} - -static BOOLEAN -hal_EfusePgPacketWrite2ByteHeader( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest) -{ - BOOLEAN bRet=_FALSE, bContinual=_TRUE; - u16 efuse_addr=*pAddr, efuse_max_available_len=0; - u8 pg_header=0, tmp_header=0, pg_header_temp=0; - u8 repeatcnt=0; - - //RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 2byte header\n")); - EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest); - - while(efuse_addr < efuse_max_available_len) - { - pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F; - //RTPRINT(FEEPROM, EFUSE_PG, ("pg_header = 0x%x\n", pg_header)); - efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); - efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); - - while(tmp_header == 0xFF) - { - if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) - { - //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for pg_header!!\n")); - return _FALSE; - } - - efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); - efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); - } - - //to write ext_header - if(tmp_header == pg_header) - { - efuse_addr++; - pg_header_temp = pg_header; - pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en; - - efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); - efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); - - while(tmp_header == 0xFF) - { - if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) - { - //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for ext_header!!\n")); - return _FALSE; - } - - efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); - efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); - } - - if((tmp_header & 0x0F) == 0x0F) //word_en PG fail - { - if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) - { - //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for word_en!!\n")); - return _FALSE; - } - else - { - efuse_addr++; - continue; - } - } - else if(pg_header != tmp_header) //offset PG fail - { - PGPKT_STRUCT fixPkt; - //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for offset PG fail, need to cover the existed data\n")); - fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1); - fixPkt.word_en = tmp_header & 0x0F; - fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); - if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) - return _FALSE; - } - else - { - bRet = _TRUE; - break; - } - } - else if ((tmp_header & 0x1F) == 0x0F) //wrong extended header - { - efuse_addr+=2; - continue; - } - } - - *pAddr = efuse_addr; - return bRet; -} - -static BOOLEAN -hal_EfusePgPacketWrite1ByteHeader( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest) -{ - BOOLEAN bRet=_FALSE; - u8 pg_header=0, tmp_header=0; - u16 efuse_addr=*pAddr; - u8 repeatcnt=0; - - //RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 1byte header\n")); - pg_header = ((pTargetPkt->offset << 4) & 0xf0) |pTargetPkt->word_en; - - efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); - efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); - - while(tmp_header == 0xFF) - { - if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) - { - return _FALSE; - } - efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest); - efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest); - } - - if(pg_header == tmp_header) - { - bRet = _TRUE; - } - else - { - PGPKT_STRUCT fixPkt; - //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for fixed PG packet, need to cover the existed data\n")); - fixPkt.offset = (tmp_header>>4) & 0x0F; - fixPkt.word_en = tmp_header & 0x0F; - fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); - if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) - return _FALSE; - } - - *pAddr = efuse_addr; - return bRet; -} - -static BOOLEAN -hal_EfusePgPacketWriteData( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest) -{ - BOOLEAN bRet=_FALSE; - u16 efuse_addr=*pAddr; - u8 badworden=0; - u32 PgWriteSuccess=0; - - badworden = 0x0f; - badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest); - if(badworden == 0x0F) - { - // write ok - //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData ok!!\n")); - return _TRUE; - } - else - { - //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData Fail!!\n")); - //reorganize other pg packet - - PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); - - if(!PgWriteSuccess) - return _FALSE; - else - return _TRUE; - } - - return bRet; -} - -static BOOLEAN -hal_EfusePgPacketWriteHeader( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest) -{ - BOOLEAN bRet=_FALSE; - - if(pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE) - { - bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); - } - else - { - bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); - } - - return bRet; -} - -static BOOLEAN -wordEnMatched( - IN PPGPKT_STRUCT pTargetPkt, - IN PPGPKT_STRUCT pCurPkt, - IN u8 *pWden -) -{ - u8 match_word_en = 0x0F; // default all words are disabled - u8 i; - - // check if the same words are enabled both target and current PG packet - if( ((pTargetPkt->word_en & BIT0) == 0) && - ((pCurPkt->word_en & BIT0) == 0) ) - { - match_word_en &= ~BIT0; // enable word 0 - } - if( ((pTargetPkt->word_en & BIT1) == 0) && - ((pCurPkt->word_en & BIT1) == 0) ) - { - match_word_en &= ~BIT1; // enable word 1 - } - if( ((pTargetPkt->word_en & BIT2) == 0) && - ((pCurPkt->word_en & BIT2) == 0) ) - { - match_word_en &= ~BIT2; // enable word 2 - } - if( ((pTargetPkt->word_en & BIT3) == 0) && - ((pCurPkt->word_en & BIT3) == 0) ) - { - match_word_en &= ~BIT3; // enable word 3 - } - - *pWden = match_word_en; - - if(match_word_en != 0xf) - return _TRUE; - else - return _FALSE; -} - -static BOOLEAN -hal_EfuseCheckIfDatafollowed( - IN PADAPTER pAdapter, - IN u8 word_cnts, - IN u16 startAddr, - IN BOOLEAN bPseudoTest - ) -{ - BOOLEAN bRet=_FALSE; - u8 i, efuse_data; - - for(i=0; i<(word_cnts*2) ; i++) - { - if(efuse_OneByteRead(pAdapter, (startAddr+i) ,&efuse_data, bPseudoTest)&&(efuse_data != 0xFF)) - bRet = _TRUE; - } - - return bRet; -} - -static BOOLEAN -hal_EfusePartialWriteCheck( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN u16 *pAddr, - IN PPGPKT_STRUCT pTargetPkt, - IN BOOLEAN bPseudoTest - ) -{ - BOOLEAN bRet=_FALSE; - u8 i, efuse_data=0, cur_header=0; - u8 new_wden=0, matched_wden=0, badworden=0; - u16 startAddr=0, efuse_max_available_len=0, efuse_max=0; - PGPKT_STRUCT curPkt; - - EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest); - EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&efuse_max, bPseudoTest); - - if(efuseType == EFUSE_WIFI) - { - if(bPseudoTest) - { - startAddr = (u16)(fakeEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); - } - else - { - rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr); - startAddr%=EFUSE_REAL_CONTENT_LEN; - } - } - else - { - if(bPseudoTest) - { - startAddr = (u16)(fakeBTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); - } - else - { - startAddr = (u16)(BTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); - } - } - //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePartialWriteCheck(), startAddr=%d\n", startAddr)); - - while(1) - { - if(startAddr >= efuse_max_available_len) - { - bRet = _FALSE; - break; - } - - if(efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data!=0xFF)) - { - if(EXT_HEADER(efuse_data)) - { - cur_header = efuse_data; - startAddr++; - efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest); - if(ALL_WORDS_DISABLED(efuse_data)) - { - //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition, all words disabled")); - bRet = _FALSE; - break; - } - else - { - curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); - curPkt.word_en = efuse_data & 0x0F; - } - } - else - { - cur_header = efuse_data; - curPkt.offset = (cur_header>>4) & 0x0F; - curPkt.word_en = cur_header & 0x0F; - } - - curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en); - // if same header is found but no data followed - // write some part of data followed by the header. - if( (curPkt.offset == pTargetPkt->offset) && - (!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr+1, bPseudoTest)) && - wordEnMatched(pTargetPkt, &curPkt, &matched_wden) ) - { - //RTPRINT(FEEPROM, EFUSE_PG, ("Need to partial write data by the previous wrote header\n")); - // Here to write partial data - badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr+1, matched_wden, pTargetPkt->data, bPseudoTest); - if(badworden != 0x0F) - { - u32 PgWriteSuccess=0; - // if write fail on some words, write these bad words again - - PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); - - if(!PgWriteSuccess) - { - bRet = _FALSE; // write fail, return - break; - } - } - // partial write ok, update the target packet for later use - for(i=0; i<4; i++) - { - if((matched_wden & (0x1<word_en |= (0x1<word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); - } - // read from next header - startAddr = startAddr + (curPkt.word_cnts*2) +1; - } - else - { - // not used header, 0xff - *pAddr = startAddr; - //RTPRINT(FEEPROM, EFUSE_PG, ("Started from unused header offset=%d\n", startAddr)); - bRet = _TRUE; - break; - } - } - return bRet; -} - -static BOOLEAN -hal_EfusePgCheckAvailableAddr( - IN PADAPTER pAdapter, - IN u8 efuseType, - IN BOOLEAN bPseudoTest - ) -{ - u16 efuse_max_available_len=0; - - //Change to check TYPE_EFUSE_MAP_LEN ,beacuse 8188E raw 256,logic map over 256. - EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&efuse_max_available_len, _FALSE); - - //EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&efuse_max_available_len, bPseudoTest); - //RTPRINT(FEEPROM, EFUSE_PG, ("efuse_max_available_len = %d\n", efuse_max_available_len)); - - if(Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len) - { - //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgCheckAvailableAddr error!!\n")); - return _FALSE; - } - return _TRUE; -} - -static VOID -hal_EfuseConstructPGPkt( - IN u8 offset, - IN u8 word_en, - IN u8 *pData, - IN PPGPKT_STRUCT pTargetPkt - -) -{ - _rtw_memset((PVOID)pTargetPkt->data, 0xFF, sizeof(u8)*8); - pTargetPkt->offset = offset; - pTargetPkt->word_en= word_en; - efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data); - pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); - - //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseConstructPGPkt(), targetPkt, offset=%d, word_en=0x%x, word_cnts=%d\n", pTargetPkt->offset, pTargetPkt->word_en, pTargetPkt->word_cnts)); -} - -static BOOLEAN -hal_EfusePgPacketWrite_BT( - IN PADAPTER pAdapter, - IN u8 offset, - IN u8 word_en, - IN u8 *pData, - IN BOOLEAN bPseudoTest - ) -{ - PGPKT_STRUCT targetPkt; - u16 startAddr=0; - u8 efuseType=EFUSE_BT; - - if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) - return _FALSE; - - hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); - - if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) - return _FALSE; - - if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) - return _FALSE; - - if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) - return _FALSE; - - return _TRUE; -} - -static BOOLEAN -hal_EfusePgPacketWrite_8188e( - IN PADAPTER pAdapter, - IN u8 offset, - IN u8 word_en, - IN u8 *pData, - IN BOOLEAN bPseudoTest - ) -{ - PGPKT_STRUCT targetPkt; - u16 startAddr=0; - u8 efuseType=EFUSE_WIFI; - - if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) - return _FALSE; - - hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); - - if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) - return _FALSE; - - if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) - return _FALSE; - - if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) - return _FALSE; - - return _TRUE; -} - - -static int -Hal_EfusePgPacketWrite_Pseudo(IN PADAPTER pAdapter, - IN u8 offset, - IN u8 word_en, - IN u8 *data, - IN BOOLEAN bPseudoTest) -{ - int ret; - - ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest); - - return ret; -} - -static int -Hal_EfusePgPacketWrite(IN PADAPTER pAdapter, - IN u8 offset, - IN u8 word_en, - IN u8 *data, - IN BOOLEAN bPseudoTest) -{ - int ret=0; - ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest); - - - return ret; -} - -static int -rtl8188e_Efuse_PgPacketWrite(IN PADAPTER pAdapter, - IN u8 offset, - IN u8 word_en, - IN u8 *data, - IN BOOLEAN bPseudoTest) -{ - int ret; - - if(bPseudoTest) - { - ret = Hal_EfusePgPacketWrite_Pseudo(pAdapter, offset, word_en, data, bPseudoTest); - } - else - { - ret = Hal_EfusePgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest); - } - return ret; -} - -static HAL_VERSION -ReadChipVersion8188E( - IN PADAPTER padapter - ) -{ - u32 value32; - HAL_VERSION ChipVersion; - HAL_DATA_TYPE *pHalData; - - - pHalData = GET_HAL_DATA(padapter); - - value32 = rtw_read32(padapter, REG_SYS_CFG); - ChipVersion.ICType = CHIP_8188E ; - ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP); - - ChipVersion.RFType = RF_TYPE_1T1R; - ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC); - ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; // IC version (CUT) - - // For regulator mode. by tynli. 2011.01.14 - pHalData->RegulatorMode = ((value32 & TRP_BT_EN) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR); - - ChipVersion.ROMVer = 0; // ROM code version. - pHalData->MultiFunc = RT_MULTI_FUNC_NONE; - - -//#if DBG -#if 1 - dump_chip_info(ChipVersion); -#endif - - pHalData->VersionID = ChipVersion; - - if (IS_1T2R(ChipVersion)){ - pHalData->rf_type = RF_1T2R; - pHalData->NumTotalRFPath = 2; - } - else if (IS_2T2R(ChipVersion)){ - pHalData->rf_type = RF_2T2R; - pHalData->NumTotalRFPath = 2; - } - else{ - pHalData->rf_type = RF_1T1R; - pHalData->NumTotalRFPath = 1; - } - - MSG_8192C("RF_Type is %x!!\n", pHalData->rf_type); - - return ChipVersion; -} - -static void rtl8188e_read_chip_version(PADAPTER padapter) -{ - ReadChipVersion8188E(padapter); -} -void rtl8188e_GetHalODMVar( - PADAPTER Adapter, - HAL_ODM_VARIABLE eVariable, - PVOID pValue1, - BOOLEAN bSet) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T podmpriv = &pHalData->odmpriv; - switch(eVariable){ - case HAL_ODM_STA_INFO: - break; - default: - break; - } -} -void rtl8188e_SetHalODMVar( - PADAPTER Adapter, - HAL_ODM_VARIABLE eVariable, - PVOID pValue1, - BOOLEAN bSet) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T podmpriv = &pHalData->odmpriv; - //_irqL irqL; - switch(eVariable){ - case HAL_ODM_STA_INFO: - { - struct sta_info *psta = (struct sta_info *)pValue1; - if(bSet){ - DBG_8192C("### Set STA_(%d) info\n",psta->mac_id); - ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,psta); - #if(RATE_ADAPTIVE_SUPPORT==1) - ODM_RAInfo_Init(podmpriv,psta->mac_id); - #endif - } - else{ - DBG_8192C("### Clean STA_(%d) info\n",psta->mac_id); - //_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); - ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,NULL); - - //_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); - } - } - break; - case HAL_ODM_P2P_STATE: - ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DIRECT,bSet); - break; - case HAL_ODM_WIFI_DISPLAY_STATE: - ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DISPLAY,bSet); - break; - default: - break; - } -} - -void rtl8188e_start_thread(_adapter *padapter) -{ -#ifdef CONFIG_SDIO_HCI -#ifndef CONFIG_SDIO_TX_TASKLET - struct xmit_priv *xmitpriv = &padapter->xmitpriv; - - xmitpriv->SdioXmitThread = kthread_run(rtl8188es_xmit_thread, padapter, "RTWHALXT"); - if (IS_ERR(xmitpriv->SdioXmitThread)) - { - RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: start rtl8188es_xmit_thread FAIL!!\n", __FUNCTION__)); - } -#endif -#endif -} - -void rtl8188e_stop_thread(_adapter *padapter) -{ -#ifdef CONFIG_SDIO_HCI -#ifndef CONFIG_SDIO_TX_TASKLET - struct xmit_priv *xmitpriv = &padapter->xmitpriv; - - // stop xmit_buf_thread - if (xmitpriv->SdioXmitThread ) { - _rtw_up_sema(&xmitpriv->SdioXmitSema); - _rtw_down_sema(&xmitpriv->SdioXmitTerminateSema); - xmitpriv->SdioXmitThread = 0; - } -#endif -#endif -} -void hal_notch_filter_8188e(_adapter *adapter, bool enable) -{ - if (enable) { - DBG_871X("Enable notch filter\n"); - rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) | BIT1); - } else { - DBG_871X("Disable notch filter\n"); - rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1); - } -} -void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc) -{ - pHalFunc->free_hal_data = &rtl8188e_free_hal_data; - - pHalFunc->dm_init = &rtl8188e_init_dm_priv; - pHalFunc->dm_deinit = &rtl8188e_deinit_dm_priv; - - pHalFunc->read_chip_version = &rtl8188e_read_chip_version; - - pHalFunc->set_bwmode_handler = &PHY_SetBWMode8188E; - pHalFunc->set_channel_handler = &PHY_SwChnl8188E; - - pHalFunc->hal_dm_watchdog = &rtl8188e_HalDmWatchDog; - - pHalFunc->Add_RateATid = &rtl8188e_Add_RateATid; - - pHalFunc->run_thread= &rtl8188e_start_thread; - pHalFunc->cancel_thread= &rtl8188e_stop_thread; - -#ifdef CONFIG_ANTENNA_DIVERSITY - pHalFunc->AntDivBeforeLinkHandler = &AntDivBeforeLink8188E; - pHalFunc->AntDivCompareHandler = &AntDivCompare8188E; -#endif - - pHalFunc->read_bbreg = &rtl8188e_PHY_QueryBBReg; - pHalFunc->write_bbreg = &rtl8188e_PHY_SetBBReg; - pHalFunc->read_rfreg = &rtl8188e_PHY_QueryRFReg; - pHalFunc->write_rfreg = &rtl8188e_PHY_SetRFReg; - - - // Efuse related function - pHalFunc->EfusePowerSwitch = &rtl8188e_EfusePowerSwitch; - pHalFunc->ReadEFuse = &rtl8188e_ReadEFuse; - pHalFunc->EFUSEGetEfuseDefinition = &rtl8188e_EFUSE_GetEfuseDefinition; - pHalFunc->EfuseGetCurrentSize = &rtl8188e_EfuseGetCurrentSize; - pHalFunc->Efuse_PgPacketRead = &rtl8188e_Efuse_PgPacketRead; - pHalFunc->Efuse_PgPacketWrite = &rtl8188e_Efuse_PgPacketWrite; - pHalFunc->Efuse_WordEnableDataWrite = &rtl8188e_Efuse_WordEnableDataWrite; - -#ifdef DBG_CONFIG_ERROR_DETECT - pHalFunc->sreset_init_value = &sreset_init_value; - pHalFunc->sreset_reset_value = &sreset_reset_value; - pHalFunc->silentreset = &sreset_reset; - pHalFunc->sreset_xmit_status_check = &rtl8188e_sreset_xmit_status_check; - pHalFunc->sreset_linked_status_check = &rtl8188e_sreset_linked_status_check; - pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status; - pHalFunc->sreset_inprogress= &sreset_inprogress; -#endif //DBG_CONFIG_ERROR_DETECT - - pHalFunc->GetHalODMVarHandler = &rtl8188e_GetHalODMVar; - pHalFunc->SetHalODMVarHandler = &rtl8188e_SetHalODMVar; - -#ifdef CONFIG_XMIT_THREAD_MODE - pHalFunc->xmit_thread_handler = &hal_xmit_handler; -#endif - -#ifdef CONFIG_IOL - pHalFunc->IOL_exec_cmds_sync = &rtl8188e_IOL_exec_cmds_sync; -#endif - - pHalFunc->hal_notch_filter = &hal_notch_filter_8188e; - -} - -u8 GetEEPROMSize8188E(PADAPTER padapter) -{ - u8 size = 0; - u32 cr; - - cr = rtw_read16(padapter, REG_9346CR); - // 6: EEPROM used is 93C46, 4: boot from E-Fuse. - size = (cr & BOOT_FROM_EEPROM) ? 6 : 4; - - MSG_8192C("EEPROM type is %s\n", size==4 ? "E-FUSE" : "93C46"); - - return size; -} - -#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_PCI_HCI) -//------------------------------------------------------------------------- -// -// LLT R/W/Init function -// -//------------------------------------------------------------------------- -s32 _LLTWrite(PADAPTER padapter, u32 address, u32 data) -{ - s32 status = _SUCCESS; - s32 count = 0; - u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS); - u16 LLTReg = REG_LLT_INIT; - - - rtw_write32(padapter, LLTReg, value); - - //polling - do { - value = rtw_read32(padapter, LLTReg); - if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) { - break; - } - - if (count > POLLING_LLT_THRESHOLD) { - RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling write LLT done at address %d!\n", address)); - status = _FAIL; - break; - } - } while (count++); - - return status; -} - -u8 _LLTRead(PADAPTER padapter, u32 address) -{ - s32 count = 0; - u32 value = _LLT_INIT_ADDR(address) | _LLT_OP(_LLT_READ_ACCESS); - u16 LLTReg = REG_LLT_INIT; - - - rtw_write32(padapter, LLTReg, value); - - //polling and get value - do { - value = rtw_read32(padapter, LLTReg); - if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) { - return (u8)value; - } - - if (count > POLLING_LLT_THRESHOLD) { - RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling read LLT done at address %d!\n", address)); - break; - } - } while (count++); - - return 0xFF; -} -void Read_LLT_Tab(PADAPTER padapter) -{ - u32 addr,next_addr; - printk("############### %s ###################\n",__FUNCTION__); - for(addr=0;addr<176;addr++) - { - next_addr = _LLTRead(padapter,addr); - printk("%d->",next_addr); - if(((addr+1) %8) ==0) - printk("\n"); - } - printk("\n##################################\n"); - -} - -s32 InitLLTTable(PADAPTER padapter, u8 txpktbuf_bndy) -{ - s32 status = _FAIL; - u32 i; - u32 Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;// 176, 22k - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - -#if defined(CONFIG_IOL_LLT) - if(rtw_IOL_applied(padapter)) - { - status = iol_InitLLTTable(padapter, txpktbuf_bndy); - } - else -#endif - { - for (i = 0; i < (txpktbuf_bndy - 1); i++) { - status = _LLTWrite(padapter, i, i + 1); - if (_SUCCESS != status) { - return status; - } - } - - // end of list - status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF); - if (_SUCCESS != status) { - return status; - } - - // Make the other pages as ring buffer - // This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. - // Otherwise used as local loopback buffer. - for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) { - status = _LLTWrite(padapter, i, (i + 1)); - if (_SUCCESS != status) { - return status; - } - } - - // Let last entry point to the start entry of ring buffer - status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy); - if (_SUCCESS != status) { - return status; - } - } - - return status; -} -#endif - - -void -Hal_InitPGData88E(PADAPTER padapter) -{ - EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); -// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - u32 i; - u16 value16; - - if(_FALSE == pEEPROM->bautoload_fail_flag) - { // autoload OK. - if (is_boot_from_eeprom(padapter)) - { - // Read all Content from EEPROM or EFUSE. - for(i = 0; i < HWSET_MAX_SIZE_88E; i += 2) - { -// value16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1))); -// *((u16*)(&PROMContent[i])) = value16; - } - } - else - { - // Read EFUSE real map to shadow. - EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); - } - } - else - {//autoload fail - RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n")); -// pHalData->AutoloadFailFlag = _TRUE; - //update to default value 0xFF - if (!is_boot_from_eeprom(padapter)) - EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); - } -} - -void -Hal_EfuseParseIDCode88E( - IN PADAPTER padapter, - IN u8 *hwinfo - ) -{ - EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); -// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - u16 EEPROMId; - - - // Checl 0x8129 again for making sure autoload status!! - EEPROMId = le16_to_cpu(*((u16*)hwinfo)); - if (EEPROMId != RTL_EEPROM_ID) - { - DBG_8192C("EEPROM ID(%#x) is invalid!!\n", EEPROMId); - pEEPROM->bautoload_fail_flag = _TRUE; - } - else - { - pEEPROM->bautoload_fail_flag = _FALSE; - } - - DBG_871X("EEPROM ID=0x%04x\n", EEPROMId); -} - -static void -Hal_EEValueCheck( - IN u8 EEType, - IN PVOID pInValue, - OUT PVOID pOutValue - ) -{ - switch(EEType) - { - case EETYPE_TX_PWR: - { - u8 *pIn, *pOut; - pIn = (u8*)pInValue; - pOut = (u8*)pOutValue; - if(*pIn >= 0 && *pIn <= 63) - { - *pOut = *pIn; - } - else - { - RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("EETYPE_TX_PWR, value=%d is invalid, set to default=0x%x\n", - *pIn, EEPROM_Default_TxPowerLevel)); - *pOut = EEPROM_Default_TxPowerLevel; - } - } - break; - default: - break; - } -} - -static void -Hal_ReadPowerValueFromPROM_8188E( - IN PADAPTER padapter, - IN PTxPowerInfo24G pwrInfo24G, - IN u8* PROMContent, - IN BOOLEAN AutoLoadFail - ) -{ - u32 rfPath, eeAddr=EEPROM_TX_PWR_INX_88E, group,TxCount=0; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - _rtw_memset(pwrInfo24G, 0, sizeof(TxPowerInfo24G)); - - if(AutoLoadFail) - { - for(rfPath = 0 ; rfPath < pHalData->NumTotalRFPath ; rfPath++) - { - //2.4G default value - for(group = 0 ; group < MAX_CHNL_GROUP_24G; group++) - { - pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; - pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; - } - for(TxCount=0;TxCountBW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF; - pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF; - } - else - { - pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - } - } - - - } - - //pHalData->bNOPG = TRUE; - return; - } - - for(rfPath = 0 ; rfPath < pHalData->NumTotalRFPath ; rfPath++) - { - //2.4G default value - for(group = 0 ; group < MAX_CHNL_GROUP_24G; group++) - { - //printk(" IndexCCK_Base rfPath:%d group:%d,eeAddr:0x%02x ",rfPath,group,eeAddr); - pwrInfo24G->IndexCCK_Base[rfPath][group] = PROMContent[eeAddr++]; - //printk(" IndexCCK_Base:%02x \n",pwrInfo24G->IndexCCK_Base[rfPath][group] ); - if(pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF) - { - pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; -// pHalData->bNOPG = TRUE; - } - } - for(group = 0 ; group < MAX_CHNL_GROUP_24G-1; group++) - { - //printk(" IndexBW40_Base rfPath:%d group:%d,eeAddr:0x%02x ",rfPath,group,eeAddr); - pwrInfo24G->IndexBW40_Base[rfPath][group] = PROMContent[eeAddr++]; - //printk(" IndexBW40_Base: %02x \n",pwrInfo24G->IndexBW40_Base[rfPath][group] ); - if(pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF) - pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; - } - for(TxCount=0;TxCountBW40_Diff[rfPath][TxCount] = 0; - if(PROMContent[eeAddr] == 0xFF) - pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF; - else - { - pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; - if(pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number - pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; - } - - if(PROMContent[eeAddr] == 0xFF) - pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_OFDM_DIFF; - else - { - pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); - if(pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number - pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; - } - pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0; - eeAddr++; - } - else - { - if(PROMContent[eeAddr] == 0xFF) - pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - else - { - pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; - if(pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number - pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0; - } - - if(PROMContent[eeAddr] == 0xFF) - pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - else - { - pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); - if(pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number - pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; - } - eeAddr++; - - if(PROMContent[eeAddr] == 0xFF) - pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - else - { - pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; - if(pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number - pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; - } - - if(PROMContent[eeAddr] == 0xFF) - pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - else - { - pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); - if(pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number - pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0; - } - eeAddr++; - } - } - - } - - -} - -static u8 -Hal_GetChnlGroup( - IN u8 chnl - ) -{ - u8 group=0; - - if (chnl < 3) // Cjanel 1-3 - group = 0; - else if (chnl < 9) // Channel 4-9 - group = 1; - else // Channel 10-14 - group = 2; - - return group; -} -static u8 -Hal_GetChnlGroup88E( - IN u8 chnl, - OUT u8* pGroup - ) -{ - u8 bIn24G=_TRUE; - - if(chnl<=14) - { - bIn24G=_TRUE; - - if (chnl < 3) // Chanel 1-2 - *pGroup = 0; - else if (chnl < 6) // Channel 3-5 - *pGroup = 1; - else if(chnl <9) // Channel 6-8 - *pGroup = 2; - else if(chnl <12) // Channel 9-11 - *pGroup = 3; - else if(chnl <14) // Channel 12-13 - *pGroup = 4; - else if(chnl ==14) // Channel 14 - *pGroup = 5; - else - { - //RT_TRACE(COMP_EFUSE,DBG_LOUD,("==>Hal_GetChnlGroup88E in 2.4 G, but Channel %d in Group not found \n",chnl)); - } - } - else - { - bIn24G=_FALSE; - - if (chnl <=40) - *pGroup = 0; - else if (chnl <=48) - *pGroup = 1; - else if(chnl <=56) - *pGroup = 2; - else if(chnl <=64) - *pGroup = 3; - else if(chnl <=104) - *pGroup = 4; - else if(chnl <=112) - *pGroup = 5; - else if(chnl <=120) - *pGroup = 5; - else if(chnl <=128) - *pGroup = 6; - else if(chnl <=136) - *pGroup = 7; - else if(chnl <=144) - *pGroup = 8; - else if(chnl <=153) - *pGroup = 9; - else if(chnl <=161) - *pGroup = 10; - else if(chnl <=177) - *pGroup = 11; - else - { - //RT_TRACE(COMP_EFUSE,DBG_LOUD,("==>Hal_GetChnlGroup88E in 5G, but Channel %d in Group not found \n",chnl)); - } - - } - //RT_TRACE(COMP_EFUSE,DBG_LOUD,("<==Hal_GetChnlGroup88E, Channel = %d, bIn24G =%d,\n",chnl,bIn24G)); - return bIn24G; -} - -void Hal_ReadPowerSavingMode88E( - PADAPTER padapter, - IN u8* hwinfo, - IN BOOLEAN AutoLoadFail - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); - u8 tmpvalue; - - if(AutoLoadFail){ - pwrctl->bHWPowerdown = _FALSE; - pwrctl->bSupportRemoteWakeup = _FALSE; - } - else { - - //hw power down mode selection , 0:rf-off / 1:power down - - if(padapter->registrypriv.hwpdn_mode==2) - pwrctl->bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT4)?_TRUE:_FALSE; - else - pwrctl->bHWPowerdown = padapter->registrypriv.hwpdn_mode; - - pwrctl->bHWPwrPindetect = padapter->registrypriv.hwpwrp_detect; - - // decide hw if support remote wakeup function - // if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume -#ifdef CONFIG_USB_HCI - pwrctl->bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT1)?_TRUE :_FALSE; -#endif //CONFIG_USB_HCI - - //if(SUPPORT_HW_RADIO_DETECT(Adapter)) - //Adapter->registrypriv.usbss_enable = pwrctl->bSupportRemoteWakeup ; - - DBG_8192C("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) ,bSupportRemoteWakeup(%x)\n",__FUNCTION__, - pwrctl->bHWPwrPindetect, pwrctl->bHWPowerdown, pwrctl->bSupportRemoteWakeup); - - DBG_8192C("### PS params=> power_mgnt(%x),usbss_enable(%x) ###\n",padapter->registrypriv.power_mgnt,padapter->registrypriv.usbss_enable); - - } - -} - -void -Hal_ReadTxPowerInfo88E( - IN PADAPTER padapter, - IN u8* PROMContent, - IN BOOLEAN AutoLoadFail - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - TxPowerInfo24G pwrInfo24G; - u8 rfPath, ch, group, rfPathMax=1; - u8 pwr, diff,bIn24G,TxCount; - - Hal_ReadPowerValueFromPROM_8188E(padapter,&pwrInfo24G, PROMContent, AutoLoadFail); - - if(!AutoLoadFail) - pHalData->bTXPowerDataReadFromEEPORM = TRUE; - - //for(rfPath = 0 ; rfPath < MAX_RF_PATH ; rfPath++) - for(rfPath = 0 ; rfPath < pHalData->NumTotalRFPath ; rfPath++) - { - for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++) - { - bIn24G = Hal_GetChnlGroup88E(ch+1,&group); - if(bIn24G) - { - - pHalData->Index24G_CCK_Base[rfPath][ch]=pwrInfo24G.IndexCCK_Base[rfPath][group]; - - if(ch==(14-1)) - pHalData->Index24G_BW40_Base[rfPath][ch]=pwrInfo24G.IndexBW40_Base[rfPath][4]; - else - pHalData->Index24G_BW40_Base[rfPath][ch]=pwrInfo24G.IndexBW40_Base[rfPath][group]; - } - - if(bIn24G) - { - DBG_871X("======= Path %d, Channel %d =======\n",rfPath,ch+1 ); - DBG_871X("Index24G_CCK_Base[%d][%d] = 0x%x\n",rfPath,ch+1 ,pHalData->Index24G_CCK_Base[rfPath][ch]); - DBG_871X("Index24G_BW40_Base[%d][%d] = 0x%x\n",rfPath,ch+1 ,pHalData->Index24G_BW40_Base[rfPath][ch]); - } - } - - for(TxCount=0;TxCountCCK_24G_Diff[rfPath][TxCount]=pwrInfo24G.CCK_Diff[rfPath][TxCount]; - pHalData->OFDM_24G_Diff[rfPath][TxCount]=pwrInfo24G.OFDM_Diff[rfPath][TxCount]; - pHalData->BW20_24G_Diff[rfPath][TxCount]=pwrInfo24G.BW20_Diff[rfPath][TxCount]; - pHalData->BW40_24G_Diff[rfPath][TxCount]=pwrInfo24G.BW40_Diff[rfPath][TxCount]; -#if DBG - DBG_871X("======= TxCount %d =======\n",TxCount ); - DBG_871X("CCK_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->CCK_24G_Diff[rfPath][TxCount]); - DBG_871X("OFDM_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->OFDM_24G_Diff[rfPath][TxCount]); - DBG_871X("BW20_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW20_24G_Diff[rfPath][TxCount]); - DBG_871X("BW40_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW40_24G_Diff[rfPath][TxCount]); -#endif - } - } - - - // 2010/10/19 MH Add Regulator recognize for EU. - if(!AutoLoadFail) - { - struct registry_priv *registry_par = &padapter->registrypriv; - if( registry_par->regulatory_tid == 0xff){ - if(PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF) - pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); //bit0~2 - else - pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x7); //bit0~2 - }else{ - pHalData->EEPROMRegulatory = registry_par->regulatory_tid; - } - } - else - { - pHalData->EEPROMRegulatory = 0; - } - DBG_871X("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory); - -} - - -VOID -Hal_EfuseParseXtal_8188E( - IN PADAPTER pAdapter, - IN u8* hwinfo, - IN BOOLEAN AutoLoadFail - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - if(!AutoLoadFail) - { - pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E]; - if(pHalData->CrystalCap == 0xFF) - pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E; - } - else - { - pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E; - } - DBG_871X("CrystalCap: 0x%2x\n", pHalData->CrystalCap); -} - -void -Hal_EfuseParseBoardType88E( - IN PADAPTER pAdapter, - IN u8* hwinfo, - IN BOOLEAN AutoLoadFail - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - if (!AutoLoadFail) - pHalData->BoardType = ((hwinfo[EEPROM_RF_BOARD_OPTION_88E]&0xE0)>>5); - else - pHalData->BoardType = 0; - DBG_871X("Board Type: 0x%2x\n", pHalData->BoardType); -} - -void -Hal_EfuseParseEEPROMVer88E( - IN PADAPTER padapter, - IN u8* hwinfo, - IN BOOLEAN AutoLoadFail - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - if(!AutoLoadFail){ - pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E]; - if(pHalData->EEPROMVersion == 0xFF) - pHalData->EEPROMVersion = EEPROM_Default_Version; - } - else{ - pHalData->EEPROMVersion = 1; - } - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n", - pHalData->EEPROMVersion)); -} - -void -rtl8188e_EfuseParseChnlPlan( - IN PADAPTER padapter, - IN u8* hwinfo, - IN BOOLEAN AutoLoadFail - ) -{ - padapter->mlmepriv.ChannelPlan = hal_com_get_channel_plan( - padapter - , hwinfo?hwinfo[EEPROM_ChannelPlan_88E]:0xFF - , padapter->registrypriv.channel_plan - , RT_CHANNEL_DOMAIN_WORLD_WIDE_13 - , AutoLoadFail - ); - - DBG_871X("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan); -} - -void -Hal_EfuseParseCustomerID88E( - IN PADAPTER padapter, - IN u8* hwinfo, - IN BOOLEAN AutoLoadFail - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - if (!AutoLoadFail) - { - pHalData->EEPROMCustomerID = hwinfo[EEPROM_CUSTOMERID_88E]; - //pHalData->EEPROMSubCustomerID = hwinfo[EEPROM_CUSTOMERID_88E]; - } - else - { - pHalData->EEPROMCustomerID = 0; - pHalData->EEPROMSubCustomerID = 0; - } - DBG_871X("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID); - //DBG_871X("EEPROM SubCustomer ID: 0x%02x\n", pHalData->EEPROMSubCustomerID); -} - - -void -Hal_ReadAntennaDiversity88E( - IN PADAPTER pAdapter, - IN u8* PROMContent, - IN BOOLEAN AutoLoadFail - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct registry_priv *registry_par = &pAdapter->registrypriv; - - if(!AutoLoadFail) - { - // Antenna Diversity setting. - if(registry_par->antdiv_cfg == 2)// 2:By EFUSE - { - pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x18)>>3; - if(PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF) - pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION&0x18)>>3;; - } - else - { - pHalData->AntDivCfg = registry_par->antdiv_cfg ; // 0:OFF , 1:ON, 2:By EFUSE - } - - if(registry_par->antdiv_type == 0)// If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. - { - pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E]; - if (pHalData->TRxAntDivType == 0xFF) - pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; // For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) - } - else{ - pHalData->TRxAntDivType = registry_par->antdiv_type ; - } - - if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV) - pHalData->AntDivCfg = 1; // 0xC1[3] is ignored. - } - else - { - pHalData->AntDivCfg = 0; - pHalData->TRxAntDivType = pHalData->TRxAntDivType; // The value in the driver setting of device manager. - } - - DBG_871X("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n",pHalData->AntDivCfg, pHalData->TRxAntDivType); - - -} - -void -Hal_ReadThermalMeter_88E( - IN PADAPTER Adapter, - IN u8* PROMContent, - IN BOOLEAN AutoloadFail - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u1Byte tempval; - - // - // ThermalMeter from EEPROM - // - if(!AutoloadFail) - pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_88E]; - else - pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E; -// pHalData->EEPROMThermalMeter = (tempval&0x1f); //[4:0] - - if(pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) - { - pHalData->bAPKThermalMeterIgnore = _TRUE; - pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E; - } - - //pHalData->ThermalMeter[0] = pHalData->EEPROMThermalMeter; - DBG_871X("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter); - -} - - -void -Hal_InitChannelPlan( - IN PADAPTER padapter - ) -{ -#if 0 - PMGNT_INFO pMgntInfo = &(padapter->MgntInfo); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - if((pMgntInfo->RegChannelPlan >= RT_CHANNEL_DOMAIN_MAX) || (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)) - { - pMgntInfo->ChannelPlan = hal_MapChannelPlan8192C(padapter, (pHalData->EEPROMChannelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK)))); - pMgntInfo->bChnlPlanFromHW = (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? TRUE : FALSE; // User cannot change channel plan. - } - else - { - pMgntInfo->ChannelPlan = (RT_CHANNEL_DOMAIN)pMgntInfo->RegChannelPlan; - } - - switch(pMgntInfo->ChannelPlan) - { - case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN: - { - PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo); - - pDot11dInfo->bEnabled = TRUE; - } - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("ReadAdapterInfo8187(): Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n")); - break; - - default: //for MacOSX compiler warning. - break; - } - - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("RegChannelPlan(%d) EEPROMChannelPlan(%d)", pMgntInfo->RegChannelPlan, pHalData->EEPROMChannelPlan)); - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Mgnt ChannelPlan = %d\n" , pMgntInfo->ChannelPlan)); -#endif -} - -BOOLEAN HalDetectPwrDownMode88E(PADAPTER Adapter) -{ - u8 tmpvalue = 0; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); - - EFUSE_ShadowRead(Adapter, 1, EEPROM_RF_FEATURE_OPTION_88E, (u32 *)&tmpvalue); - - // 2010/08/25 MH INF priority > PDN Efuse value. - if(tmpvalue & BIT(4) && pwrctrlpriv->reg_pdnmode) - { - pHalData->pwrdown = _TRUE; - } - else - { - pHalData->pwrdown = _FALSE; - } - - DBG_8192C("HalDetectPwrDownMode(): PDN=%d\n", pHalData->pwrdown); - - return pHalData->pwrdown; -} // HalDetectPwrDownMode - -#ifdef CONFIG_WOWLAN -void Hal_DetectWoWMode(PADAPTER pAdapter) -{ - adapter_to_pwrctl(pAdapter)->bSupportRemoteWakeup = _TRUE; - DBG_871X("%s\n", __func__); -} -#endif - -#ifdef CONFIG_RF_GAIN_OFFSET -void Hal_ReadRFGainOffset( - IN PADAPTER Adapter, - IN u8* PROMContent, - IN BOOLEAN AutoloadFail) -{ - u8 buff[EFUSE_MAX_SIZE]; - u32 res; - // - // BB_RF Gain Offset from EEPROM - // - //res = rtw_efuse_access(Adapter, _FALSE, 0, EFUSE_MAX_SIZE, buff); - if(!AutoloadFail ){ - Adapter->eeprompriv.EEPROMRFGainOffset = PROMContent[EEPROM_RF_GAIN_OFFSET_88E]; - Adapter->eeprompriv.EEPROMRFGainVal=EFUSE_Read1Byte(Adapter, EEPROM_RF_GAIN_VAL_88E); - } - else{ - Adapter->eeprompriv.EEPROMRFGainOffset = EEPROM_Default_RFGainOffset; - Adapter->eeprompriv.EEPROMRFGainVal=0xff; - } - DBG_871X("EEPRORFGainOffset = 0x%02x\n", Adapter->eeprompriv.EEPROMRFGainOffset); -} -#endif //CONFIG_RF_GAIN_OFFSET - -//==================================================================================== -// -// 20100209 Joseph: -// This function is used only for 92C to set REG_BCN_CTRL(0x550) register. -// We just reserve the value of the register in variable pHalData->RegBcnCtrlVal and then operate -// the value of the register via atomic operation. -// This prevents from race condition when setting this register. -// The value of pHalData->RegBcnCtrlVal is initialized in HwConfigureRTL8192CE() function. -// -void SetBcnCtrlReg( - PADAPTER padapter, - u8 SetBits, - u8 ClearBits) -{ - PHAL_DATA_TYPE pHalData; - - - pHalData = GET_HAL_DATA(padapter); - - pHalData->RegBcnCtrlVal |= SetBits; - pHalData->RegBcnCtrlVal &= ~ClearBits; - -#if 0 -//#ifdef CONFIG_SDIO_HCI - if (pHalData->sdio_himr & (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK)) - pHalData->RegBcnCtrlVal |= EN_TXBCN_RPT; -#endif - - rtw_write8(padapter, REG_BCN_CTRL, (u8)pHalData->RegBcnCtrlVal); -} - diff --git a/hal/rtl8188e/rtl8188e_phycfg.c b/hal/rtl8188e/rtl8188e_phycfg.c deleted file mode 100755 index 99bc334..0000000 --- a/hal/rtl8188e/rtl8188e_phycfg.c +++ /dev/null @@ -1,3552 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _RTL8188E_PHYCFG_C_ - -#include -#include -#include -#include - -#ifdef CONFIG_IOL -#include -#endif - -#include - - -/*---------------------------Define Local Constant---------------------------*/ -/* Channel switch:The size of command tables for switch channel*/ -#define MAX_PRECMD_CNT 16 -#define MAX_RFDEPENDCMD_CNT 16 -#define MAX_POSTCMD_CNT 16 - -#define MAX_DOZE_WAITING_TIMES_9x 64 - -/*---------------------------Define Local Constant---------------------------*/ - - -/*------------------------Define global variable-----------------------------*/ - -/*------------------------Define local variable------------------------------*/ - - -/*--------------------Define export function prototype-----------------------*/ -// Please refer to header file -/*--------------------Define export function prototype-----------------------*/ - -/*----------------------------Function Body----------------------------------*/ -// -// 1. BB register R/W API -// - -/** -* Function: phy_CalculateBitShift -* -* OverView: Get shifted position of the BitMask -* -* Input: -* u4Byte BitMask, -* -* Output: none -* Return: u4Byte Return the shift bit bit position of the mask -*/ -static u32 -phy_CalculateBitShift( - u32 BitMask - ) -{ - u32 i; - - for(i=0; i<=31; i++) - { - if ( ((BitMask>>i) & 0x1 ) == 1) - break; - } - - return (i); -} - -#if(SIC_ENABLE == 1) -static BOOLEAN -sic_IsSICReady( - IN PADAPTER Adapter - ) -{ - BOOLEAN bRet=_FALSE; - u32 retryCnt=0; - u8 sic_cmd=0xff; - - while(1) - { - if(retryCnt++ >= SIC_MAX_POLL_CNT) - { - //RTPRINT(FPHY, (PHY_SICR|PHY_SICW), ("[SIC], sic_IsSICReady() return FALSE\n")); - return _FALSE; - } - - //if(RT_SDIO_CANNOT_IO(Adapter)) - // return _FALSE; - - sic_cmd = rtw_read8(Adapter, SIC_CMD_REG); - //sic_cmd = PlatformEFIORead1Byte(Adapter, SIC_CMD_REG); -#if(SIC_HW_SUPPORT == 1) - sic_cmd &= 0xf0; // [7:4] -#endif - //RTPRINT(FPHY, (PHY_SICR|PHY_SICW), ("[SIC], sic_IsSICReady(), readback 0x%x=0x%x\n", SIC_CMD_REG, sic_cmd)); - if(sic_cmd == SIC_CMD_READY) - return _TRUE; - else - { - rtw_msleep_os(1); - //delay_ms(1); - } - } - - return bRet; -} - -/* -u32 -sic_CalculateBitShift( - u32 BitMask - ) -{ - u32 i; - - for(i=0; i<=31; i++) - { - if ( ((BitMask>>i) & 0x1 ) == 1) - break; - } - - return (i); -} -*/ - -static u32 -sic_Read4Byte( - PVOID Adapter, - u32 offset - ) -{ - u32 u4ret=0xffffffff; -#if RTL8188E_SUPPORT == 1 - u8 retry = 0; -#endif - - //RTPRINT(FPHY, PHY_SICR, ("[SIC], sic_Read4Byte(): read offset(%#x)\n", offset)); - - if(sic_IsSICReady(Adapter)) - { -#if(SIC_HW_SUPPORT == 1) - rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_PREREAD); - //PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_PREREAD); - //RTPRINT(FPHY, PHY_SICR, ("write cmdreg 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_PREREAD)); -#endif - rtw_write8(Adapter, SIC_ADDR_REG, (u8)(offset&0xff)); - //PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u1Byte)(offset&0xff)); - //RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG, (u1Byte)(offset&0xff))); - rtw_write8(Adapter, SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8)); - //PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8)); - //RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8))); - rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_READ); - //PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_READ); - //RTPRINT(FPHY, PHY_SICR, ("write cmdreg 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_READ)); - -#if RTL8188E_SUPPORT == 1 - retry = 4; - while(retry--){ - rtw_udelay_os(50); - //PlatformStallExecution(50); - } -#else - rtw_udelay_os(200); - //PlatformStallExecution(200); -#endif - - if(sic_IsSICReady(Adapter)) - { - u4ret = rtw_read32(Adapter, SIC_DATA_REG); - //u4ret = PlatformEFIORead4Byte(Adapter, SIC_DATA_REG); - //RTPRINT(FPHY, PHY_SICR, ("read 0x%x = 0x%x\n", SIC_DATA_REG, u4ret)); - //DbgPrint("<===Read 0x%x = 0x%x\n", offset, u4ret); - } - } - - return u4ret; -} - -static VOID -sic_Write4Byte( - PVOID Adapter, - u32 offset, - u32 data - ) -{ -#if RTL8188E_SUPPORT == 1 - u8 retry = 6; -#endif - //DbgPrint("=>Write 0x%x = 0x%x\n", offset, data); - //RTPRINT(FPHY, PHY_SICW, ("[SIC], sic_Write4Byte(): write offset(%#x)=0x%x\n", offset, data)); - if(sic_IsSICReady(Adapter)) - { -#if(SIC_HW_SUPPORT == 1) - rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_PREWRITE); - //PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_PREWRITE); - //RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_PREWRITE)); -#endif - rtw_write8(Adapter, SIC_ADDR_REG, (u8)(offset&0xff)); - //PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u1Byte)(offset&0xff)); - //RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", SIC_ADDR_REG, (u1Byte)(offset&0xff))); - rtw_write8(Adapter, SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8)); - //PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8)); - //RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", (SIC_ADDR_REG+1), (u1Byte)((offset&0xff00)>>8))); - rtw_write32(Adapter, SIC_DATA_REG, (u32)data); - //PlatformEFIOWrite4Byte(Adapter, SIC_DATA_REG, (u4Byte)data); - //RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_DATA_REG, data)); - rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_WRITE); - //PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_WRITE); - //RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_WRITE)); -#if RTL8188E_SUPPORT == 1 - while(retry--){ - rtw_udelay_os(50); - //PlatformStallExecution(50); - } -#else - rtw_udelay_os(150); - //PlatformStallExecution(150); -#endif - - } -} -//============================================================ -// extern function -//============================================================ -static VOID -SIC_SetBBReg( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u32 OriginalValue, BitShift; - u16 BBWaitCounter = 0; - - //RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg() start\n")); -/* - while(PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _TRUE) == _TRUE) - { - BBWaitCounter ++; - delay_ms(10); // 1 ms - - if((BBWaitCounter > 100) || RT_CANNOT_IO(Adapter)) - {// Wait too long, return FALSE to avoid to be stuck here. - RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg(), Fail to set BB offset(%#x)!!, WaitCnt(%d)\n", RegAddr, BBWaitCounter)); - return; - } - } -*/ - // - // Critical section start - // - - //RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg(), mask=0x%x, addr[0x%x]=0x%x\n", BitMask, RegAddr, Data)); - - if(BitMask!= bMaskDWord){//if not "double word" write - OriginalValue = sic_Read4Byte(Adapter, RegAddr); - //BitShift = sic_CalculateBitShift(BitMask); - BitShift = phy_CalculateBitShift(BitMask); - Data = (((OriginalValue) & (~BitMask)) | (Data << BitShift)); - } - - sic_Write4Byte(Adapter, RegAddr, Data); - - //PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _FALSE); - //RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg() end\n")); -} - -static u32 -SIC_QueryBBReg( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u32 ReturnValue = 0, OriginalValue, BitShift; - u16 BBWaitCounter = 0; - - //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_QueryBBReg() start\n")); - -/* - while(PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _TRUE) == _TRUE) - { - BBWaitCounter ++; - delay_ms(10); // 10 ms - - if((BBWaitCounter > 100) || RT_CANNOT_IO(Adapter)) - {// Wait too long, return FALSE to avoid to be stuck here. - RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_QueryBBReg(), Fail to query BB offset(%#x)!!, WaitCnt(%d)\n", RegAddr, BBWaitCounter)); - return ReturnValue; - } - } -*/ - OriginalValue = sic_Read4Byte(Adapter, RegAddr); - //BitShift = sic_CalculateBitShift(BitMask); - BitShift = phy_CalculateBitShift(BitMask); - ReturnValue = (OriginalValue & BitMask) >> BitShift; - - //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_QueryBBReg(), 0x%x=0x%x\n", RegAddr, OriginalValue)); - //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_QueryBBReg() end\n")); - - //PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _FALSE); - return (ReturnValue); -} - -VOID -SIC_Init( - IN PADAPTER Adapter - ) -{ - // Here we need to write 0x1b8~0x1bf = 0 after fw is downloaded - // because for 8723E at beginning 0x1b8=0x1e, that will cause - // sic always not be ready -#if(SIC_HW_SUPPORT == 1) - //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_Init(), write 0x%x = 0x%x\n", - // SIC_INIT_REG, SIC_INIT_VAL)); - rtw_write8(Adapter, SIC_INIT_REG, SIC_INIT_VAL); - //PlatformEFIOWrite1Byte(Adapter, SIC_INIT_REG, SIC_INIT_VAL); - //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_Init(), write 0x%x = 0x%x\n", - // SIC_CMD_REG, SIC_CMD_INIT)); - rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_INIT); - //PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_INIT); -#else - //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_Init(), write 0x1b8~0x1bf = 0x0\n")); - rtw_write32(Adapter, SIC_CMD_REG, 0); - //PlatformEFIOWrite4Byte(Adapter, SIC_CMD_REG, 0); - rtw_write32(Adapter, SIC_CMD_REG+4, 0); - //PlatformEFIOWrite4Byte(Adapter, SIC_CMD_REG+4, 0); -#endif -} - -static BOOLEAN -SIC_LedOff( - IN PADAPTER Adapter - ) -{ - // When SIC is enabled, led pin will be used as debug pin, - // so don't execute led function when SIC is enabled. - return _TRUE; -} -#endif - -/** -* Function: PHY_QueryBBReg -* -* OverView: Read "sepcific bits" from BB register -* -* Input: -* PADAPTER Adapter, -* u4Byte RegAddr, //The target address to be readback -* u4Byte BitMask //The target bit position in the target address -* //to be readback -* Output: None -* Return: u4Byte Data //The readback register value -* Note: This function is equal to "GetRegSetting" in PHY programming guide -*/ -u32 -rtl8188e_PHY_QueryBBReg( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask - ) -{ - u32 ReturnValue = 0, OriginalValue, BitShift; - u16 BBWaitCounter = 0; - -#if (DISABLE_BB_RF == 1) - return 0; -#endif - -#if(SIC_ENABLE == 1) - return SIC_QueryBBReg(Adapter, RegAddr, BitMask); -#endif - - //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask)); - - OriginalValue = rtw_read32(Adapter, RegAddr); - BitShift = phy_CalculateBitShift(BitMask); - ReturnValue = (OriginalValue & BitMask) >> BitShift; - - //RTPRINT(FPHY, PHY_BBR, ("BBR MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, OriginalValue)); - //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx), OriginalValue(%#lx)\n", RegAddr, BitMask, OriginalValue)); - - return (ReturnValue); - -} - - -/** -* Function: PHY_SetBBReg -* -* OverView: Write "Specific bits" to BB register (page 8~) -* -* Input: -* PADAPTER Adapter, -* u4Byte RegAddr, //The target address to be modified -* u4Byte BitMask //The target bit position in the target address -* //to be modified -* u4Byte Data //The new register value in the target bit position -* //of the target address -* -* Output: None -* Return: None -* Note: This function is equal to "PutRegSetting" in PHY programming guide -*/ - -VOID -rtl8188e_PHY_SetBBReg( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //u16 BBWaitCounter = 0; - u32 OriginalValue, BitShift; - -#if (DISABLE_BB_RF == 1) - return; -#endif - -#if(SIC_ENABLE == 1) - SIC_SetBBReg(Adapter, RegAddr, BitMask, Data); - return; -#endif - - //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); - - if(BitMask!= bMaskDWord){//if not "double word" write - OriginalValue = rtw_read32(Adapter, RegAddr); - BitShift = phy_CalculateBitShift(BitMask); - Data = ((OriginalValue & (~BitMask)) | ((Data << BitShift) & BitMask)); - } - - rtw_write32(Adapter, RegAddr, Data); - - //RTPRINT(FPHY, PHY_BBW, ("BBW MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, Data)); - //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); - -} - - -// -// 2. RF register R/W API -// -/** -* Function: phy_RFSerialRead -* -* OverView: Read regster from RF chips -* -* Input: -* PADAPTER Adapter, -* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D -* u4Byte Offset, //The target address to be read -* -* Output: None -* Return: u4Byte reback value -* Note: Threre are three types of serial operations: -* 1. Software serial write -* 2. Hardware LSSI-Low Speed Serial Interface -* 3. Hardware HSSI-High speed -* serial write. Driver need to implement (1) and (2). -* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() -*/ -static u32 -phy_RFSerialRead( - IN PADAPTER Adapter, - IN RF_RADIO_PATH_E eRFPath, - IN u32 Offset - ) -{ - u32 retValue = 0; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; - u32 NewOffset; - u32 tmplong,tmplong2; - u8 RfPiEnable=0; -#if 0 - if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs - return retValue; - if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs - return retValue; -#endif - // - // Make sure RF register offset is correct - // - Offset &= 0xff; - - // - // Switch page for 8256 RF IC - // - NewOffset = Offset; - - // 2009/06/17 MH We can not execute IO for power save or other accident mode. - //if(RT_CANNOT_IO(Adapter)) - //{ - // RTPRINT(FPHY, PHY_RFR, ("phy_RFSerialRead return all one\n")); - // return 0xFFFFFFFF; - //} - - // For 92S LSSI Read RFLSSIRead - // For RF A/B write 0x824/82c(does not work in the future) - // We must use 0x824 for RF A and B to execute read trigger - tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord); - if(eRFPath == RF_PATH_A) - tmplong2 = tmplong; - else - tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord); - - tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; //T65 RF - - PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong&(~bLSSIReadEdge)); - rtw_udelay_os(10);// PlatformStallExecution(10); - - PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2); - rtw_udelay_os(100);//PlatformStallExecution(100); - - //PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong|bLSSIReadEdge); - rtw_udelay_os(10);//PlatformStallExecution(10); - - if(eRFPath == RF_PATH_A) - RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT8); - else if(eRFPath == RF_PATH_B) - RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT8); - - if(RfPiEnable) - { // Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF - retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData); - //DBG_8192C("Readback from RF-PI : 0x%x\n", retValue); - } - else - { //Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF - retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData); - //DBG_8192C("Readback from RF-SI : 0x%x\n", retValue); - } - //DBG_8192C("RFR-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rfLSSIReadBack, retValue); - - return retValue; - -} - - - -/** -* Function: phy_RFSerialWrite -* -* OverView: Write data to RF register (page 8~) -* -* Input: -* PADAPTER Adapter, -* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D -* u4Byte Offset, //The target address to be read -* u4Byte Data //The new register Data in the target bit position -* //of the target to be read -* -* Output: None -* Return: None -* Note: Threre are three types of serial operations: -* 1. Software serial write -* 2. Hardware LSSI-Low Speed Serial Interface -* 3. Hardware HSSI-High speed -* serial write. Driver need to implement (1) and (2). -* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() - * - * Note: For RF8256 only - * The total count of RTL8256(Zebra4) register is around 36 bit it only employs - * 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) - * to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration - * programming guide" for more details. - * Thus, we define a sub-finction for RTL8526 register address conversion - * =========================================================== - * Register Mode RegCTL[1] RegCTL[0] Note - * (Reg00[12]) (Reg00[10]) - * =========================================================== - * Reg_Mode0 0 x Reg 0 ~15(0x0 ~ 0xf) - * ------------------------------------------------------------------ - * Reg_Mode1 1 0 Reg 16 ~30(0x1 ~ 0xf) - * ------------------------------------------------------------------ - * Reg_Mode2 1 1 Reg 31 ~ 45(0x1 ~ 0xf) - * ------------------------------------------------------------------ - * - * 2008/09/02 MH Add 92S RF definition - * - * - * -*/ -static VOID -phy_RFSerialWrite( - IN PADAPTER Adapter, - IN RF_RADIO_PATH_E eRFPath, - IN u32 Offset, - IN u32 Data - ) -{ - u32 DataAndAddr = 0; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; - u32 NewOffset; - -#if 0 - // We should check valid regs for RF_6052 case. - if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs - return; - if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs - return; -#endif - - // 2009/06/17 MH We can not execute IO for power save or other accident mode. - //if(RT_CANNOT_IO(Adapter)) - //{ - // RTPRINT(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n")); - // return; - //} - - Offset &= 0xff; - - // - // Shadow Update - // - //PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); - - // - // Switch page for 8256 RF IC - // - NewOffset = Offset; - - // - // Put write addr in [5:0] and write data in [31:16] - // - //DataAndAddr = (Data<<16) | (NewOffset&0x3f); - DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; // T65 RF - - // - // Write Operation - // - PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); - //RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); - -} - - -/** -* Function: PHY_QueryRFReg -* -* OverView: Query "Specific bits" to RF register (page 8~) -* -* Input: -* PADAPTER Adapter, -* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D -* u4Byte RegAddr, //The target address to be read -* u4Byte BitMask //The target bit position in the target address -* //to be read -* -* Output: None -* Return: u4Byte Readback value -* Note: This function is equal to "GetRFRegSetting" in PHY programming guide -*/ -u32 -rtl8188e_PHY_QueryRFReg( - IN PADAPTER Adapter, - IN RF_RADIO_PATH_E eRFPath, - IN u32 RegAddr, - IN u32 BitMask - ) -{ - u32 Original_Value, Readback_Value, BitShift; - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //u8 RFWaitCounter = 0; - //_irqL irqL; - -#if (DISABLE_BB_RF == 1) - return 0; -#endif - - //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), BitMask(%#lx)\n", RegAddr, eRFPath,BitMask)); - -#ifdef CONFIG_USB_HCI - //PlatformAcquireMutex(&pHalData->mxRFOperate); -#else - //_enter_critical(&pHalData->rf_lock, &irqL); -#endif - - - Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); - - BitShift = phy_CalculateBitShift(BitMask); - Readback_Value = (Original_Value & BitMask) >> BitShift; - -#ifdef CONFIG_USB_HCI - //PlatformReleaseMutex(&pHalData->mxRFOperate); -#else - //_exit_critical(&pHalData->rf_lock, &irqL); -#endif - - - //RTPRINT(FPHY, PHY_RFR, ("RFR-%d MASK=0x%lx Addr[0x%lx]=0x%lx\n", eRFPath, BitMask, RegAddr, Original_Value));//BitMask(%#lx),BitMask, - //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), Original_Value(%#lx)\n", - // RegAddr, eRFPath, Original_Value)); - - return (Readback_Value); -} - -/** -* Function: PHY_SetRFReg -* -* OverView: Write "Specific bits" to RF register (page 8~) -* -* Input: -* PADAPTER Adapter, -* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D -* u4Byte RegAddr, //The target address to be modified -* u4Byte BitMask //The target bit position in the target address -* //to be modified -* u4Byte Data //The new register Data in the target bit position -* //of the target address -* -* Output: None -* Return: None -* Note: This function is equal to "PutRFRegSetting" in PHY programming guide -*/ -VOID -rtl8188e_PHY_SetRFReg( - IN PADAPTER Adapter, - IN RF_RADIO_PATH_E eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data - ) -{ - - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //u1Byte RFWaitCounter = 0; - u32 Original_Value, BitShift; - //_irqL irqL; - -#if (DISABLE_BB_RF == 1) - return; -#endif - - //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", - // RegAddr, BitMask, Data, eRFPath)); - //RTPRINT(FINIT, INIT_RF, ("PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", - // RegAddr, BitMask, Data, eRFPath)); - - -#ifdef CONFIG_USB_HCI - //PlatformAcquireMutex(&pHalData->mxRFOperate); -#else - //_enter_critical(&pHalData->rf_lock, &irqL); -#endif - - - // RF data is 12 bits only - if (BitMask != bRFRegOffsetMask) - { - Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); - BitShift = phy_CalculateBitShift(BitMask); - Data = ((Original_Value & (~BitMask)) | (Data<< BitShift)); - } - - phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data); - - -#ifdef CONFIG_USB_HCI - //PlatformReleaseMutex(&pHalData->mxRFOperate); -#else - //_exit_critical(&pHalData->rf_lock, &irqL); -#endif - - //PHY_QueryRFReg(Adapter,eRFPath,RegAddr,BitMask); - //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", - // RegAddr, BitMask, Data, eRFPath)); - -} - - -// -// 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. -// - -/*----------------------------------------------------------------------------- - * Function: phy_ConfigMACWithParaFile() - * - * Overview: This function read BB parameters from general file format, and do register - * Read/Write - * - * Input: PADAPTER Adapter - * ps1Byte pFileName - * - * Output: NONE - * - * Return: RT_STATUS_SUCCESS: configuration file exist - * - * Note: The format of MACPHY_REG.txt is different from PHY and RF. - * [Register][Mask][Value] - *---------------------------------------------------------------------------*/ -static int -phy_ConfigMACWithParaFile( - IN PADAPTER Adapter, - IN u8* pFileName -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - int rtStatus = _FAIL; - - return rtStatus; -} - -/*----------------------------------------------------------------------------- - * Function: phy_ConfigMACWithHeaderFile() - * - * Overview: This function read BB parameters from Header file we gen, and do register - * Read/Write - * - * Input: PADAPTER Adapter - * ps1Byte pFileName - * - * Output: NONE - * - * Return: RT_STATUS_SUCCESS: configuration file exist - * - * Note: The format of MACPHY_REG.txt is different from PHY and RF. - * [Register][Mask][Value] - *---------------------------------------------------------------------------*/ -#ifndef CONFIG_PHY_SETTING_WITH_ODM -static int -phy_ConfigMACWithHeaderFile( - IN PADAPTER Adapter -) -{ - u32 i = 0; - u32 ArrayLength = 0; - u32* ptrArray; - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - //2008.11.06 Modified by tynli. - //RT_TRACE(COMP_INIT, DBG_LOUD, ("Read Rtl819XMACPHY_Array\n")); - ArrayLength = Rtl8188E_MAC_ArrayLength; - ptrArray = (u32*)Rtl8188E_MAC_Array; - -#ifdef CONFIG_IOL_MAC - { - struct xmit_frame *xmit_frame; - if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) - return _FAIL; - - for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column - rtw_IOL_append_WB_cmd(xmit_frame, ptrArray[i], (u8)ptrArray[i+1]); - } - - return rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0); - } -#else - for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column - rtw_write8(Adapter, ptrArray[i], (u8)ptrArray[i+1]); - } -#endif - - return _SUCCESS; - -} -#endif //#ifndef CONFIG_PHY_SETTING_WITH_ODM - -/*----------------------------------------------------------------------------- - * Function: PHY_MACConfig8192C - * - * Overview: Condig MAC by header file or parameter file. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 08/12/2008 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -s32 PHY_MACConfig8188E(PADAPTER Adapter) -{ - int rtStatus = _SUCCESS; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - s8 *pszMACRegFile; - s8 sz8188EMACRegFile[] = RTL8188E_PHY_MACREG; - - pszMACRegFile = sz8188EMACRegFile; - - // - // Config MAC - // -#ifdef CONFIG_EMBEDDED_FWIMG - #ifdef CONFIG_PHY_SETTING_WITH_ODM - if(HAL_STATUS_FAILURE == ODM_ConfigMACWithHeaderFile(&pHalData->odmpriv)) - rtStatus = _FAIL; - #else - rtStatus = phy_ConfigMACWithHeaderFile(Adapter); - #endif//#ifdef CONFIG_PHY_SETTING_WITH_ODM -#else - - // Not make sure EEPROM, add later - //RT_TRACE(COMP_INIT, DBG_LOUD, ("Read MACREG.txt\n")); - rtStatus = phy_ConfigMACWithParaFile(Adapter, pszMACRegFile); -#endif//CONFIG_EMBEDDED_FWIMG - - - // 2010.07.13 AMPDU aggregation number B - rtw_write8(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM); - //rtw_write8(Adapter, REG_MAX_AGGR_NUM, 0x0B); - - return rtStatus; - -} - - -/** -* Function: phy_InitBBRFRegisterDefinition -* -* OverView: Initialize Register definition offset for Radio Path A/B/C/D -* -* Input: -* PADAPTER Adapter, -* -* Output: None -* Return: None -* Note: The initialization value is constant and it should never be changes -*/ -static VOID -phy_InitBBRFRegisterDefinition( - IN PADAPTER Adapter -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - // RF Interface Sowrtware Control - pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870 - pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) - pHalData->PHYRegDef[RF_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 LSBs if read 32-bit from 0x874 - pHalData->PHYRegDef[RF_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876) - - // RF Interface Readback Value - pHalData->PHYRegDef[RF_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; // 16 LSBs if read 32-bit from 0x8E0 - pHalData->PHYRegDef[RF_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2) - pHalData->PHYRegDef[RF_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 LSBs if read 32-bit from 0x8E4 - pHalData->PHYRegDef[RF_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E4 (16-bit for 0x8E6) - - // RF Interface Output (and Enable) - pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860 - pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864 - - // RF Interface (Output and) Enable - pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) - pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) - - //Addr of LSSI. Wirte RF register by driver - pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter - pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; - - // RF parameter - pHalData->PHYRegDef[RF_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; //BB Band Select - pHalData->PHYRegDef[RF_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter; - pHalData->PHYRegDef[RF_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter; - pHalData->PHYRegDef[RF_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter; - - // Tx AGC Gain Stage (same for all path. Should we remove this?) - pHalData->PHYRegDef[RF_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage - pHalData->PHYRegDef[RF_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage - pHalData->PHYRegDef[RF_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage - pHalData->PHYRegDef[RF_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage - - // Tranceiver A~D HSSI Parameter-1 - pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; //wire control parameter1 - pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; //wire control parameter1 - - // Tranceiver A~D HSSI Parameter-2 - pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; //wire control parameter2 - pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; //wire control parameter2 - - // RF switch Control - pHalData->PHYRegDef[RF_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; //TR/Ant switch control - pHalData->PHYRegDef[RF_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl; - pHalData->PHYRegDef[RF_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl; - pHalData->PHYRegDef[RF_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl; - - // AGC control 1 - pHalData->PHYRegDef[RF_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; - pHalData->PHYRegDef[RF_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1; - pHalData->PHYRegDef[RF_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1; - pHalData->PHYRegDef[RF_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1; - - // AGC control 2 - pHalData->PHYRegDef[RF_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2; - pHalData->PHYRegDef[RF_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2; - pHalData->PHYRegDef[RF_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2; - pHalData->PHYRegDef[RF_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2; - - // RX AFE control 1 - pHalData->PHYRegDef[RF_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance; - pHalData->PHYRegDef[RF_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance; - pHalData->PHYRegDef[RF_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance; - pHalData->PHYRegDef[RF_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance; - - // RX AFE control 1 - pHalData->PHYRegDef[RF_PATH_A].rfRxAFE = rOFDM0_XARxAFE; - pHalData->PHYRegDef[RF_PATH_B].rfRxAFE = rOFDM0_XBRxAFE; - pHalData->PHYRegDef[RF_PATH_C].rfRxAFE = rOFDM0_XCRxAFE; - pHalData->PHYRegDef[RF_PATH_D].rfRxAFE = rOFDM0_XDRxAFE; - - // Tx AFE control 1 - pHalData->PHYRegDef[RF_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance; - pHalData->PHYRegDef[RF_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance; - pHalData->PHYRegDef[RF_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance; - pHalData->PHYRegDef[RF_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance; - - // Tx AFE control 2 - pHalData->PHYRegDef[RF_PATH_A].rfTxAFE = rOFDM0_XATxAFE; - pHalData->PHYRegDef[RF_PATH_B].rfTxAFE = rOFDM0_XBTxAFE; - pHalData->PHYRegDef[RF_PATH_C].rfTxAFE = rOFDM0_XCTxAFE; - pHalData->PHYRegDef[RF_PATH_D].rfTxAFE = rOFDM0_XDTxAFE; - - // Tranceiver LSSI Readback SI mode - pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; - pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; - pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack; - pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack; - - // Tranceiver LSSI Readback PI mode - pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; - pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback; - //pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBackPi = rFPGA0_XC_LSSIReadBack; - //pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBackPi = rFPGA0_XD_LSSIReadBack; - -} - - -/*----------------------------------------------------------------------------- - * Function: phy_ConfigBBWithParaFile() - * - * Overview: This function read BB parameters from general file format, and do register - * Read/Write - * - * Input: PADAPTER Adapter - * ps1Byte pFileName - * - * Output: NONE - * - * Return: RT_STATUS_SUCCESS: configuration file exist - * 2008/11/06 MH For 92S we do not support silent reset now. Disable - * parameter file compare!!!!!!?? - * - *---------------------------------------------------------------------------*/ -static int -phy_ConfigBBWithParaFile( - IN PADAPTER Adapter, - IN u8* pFileName -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - int rtStatus = _SUCCESS; - - return rtStatus; -} - - - -//**************************************** -// The following is for High Power PA -//**************************************** -VOID -phy_ConfigBBExternalPA( - IN PADAPTER Adapter -) -{ -#ifdef CONFIG_USB_HCI - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u16 i=0; - u32 temp=0; - - if(!pHalData->ExternalPA) - { - return; - } - - // 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the - // same code as SU. It is already updated in PHY_REG_1T_HP.txt. -#if 0 - PHY_SetBBReg(Adapter, 0xee8, BIT28, 1); - temp = PHY_QueryBBReg(Adapter, 0x860, bMaskDWord); - temp |= (BIT26|BIT21|BIT10|BIT5); - PHY_SetBBReg(Adapter, 0x860, bMaskDWord, temp); - PHY_SetBBReg(Adapter, 0x870, BIT10, 0); - PHY_SetBBReg(Adapter, 0xc80, bMaskDWord, 0x20000080); - PHY_SetBBReg(Adapter, 0xc88, bMaskDWord, 0x40000100); -#endif - -#endif -} - -/*----------------------------------------------------------------------------- - * Function: phy_ConfigBBWithHeaderFile() - * - * Overview: This function read BB parameters from general file format, and do register - * Read/Write - * - * Input: PADAPTER Adapter - * u1Byte ConfigType 0 => PHY_CONFIG - * 1 =>AGC_TAB - * - * Output: NONE - * - * Return: RT_STATUS_SUCCESS: configuration file exist - * - *---------------------------------------------------------------------------*/ -#ifndef CONFIG_PHY_SETTING_WITH_ODM -static int -phy_ConfigBBWithHeaderFile( - IN PADAPTER Adapter, - IN u8 ConfigType -) -{ - int i; - u32* Rtl819XPHY_REGArray_Table; - u32* Rtl819XAGCTAB_Array_Table; - u16 PHY_REGArrayLen, AGCTAB_ArrayLen; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - DM_ODM_T *podmpriv = &pHalData->odmpriv; - int ret = _SUCCESS; - - - AGCTAB_ArrayLen = Rtl8188E_AGCTAB_1TArrayLength; - Rtl819XAGCTAB_Array_Table = (u32*)Rtl8188E_AGCTAB_1TArray; - PHY_REGArrayLen = Rtl8188E_PHY_REG_1TArrayLength; - Rtl819XPHY_REGArray_Table = (u32*)Rtl8188E_PHY_REG_1TArray; -// RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8188EAGCTAB_1TArray\n")); -// RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8188EPHY_REG_1TArray\n")); - - if(ConfigType == CONFIG_BB_PHY_REG) - { - #ifdef CONFIG_IOL_BB_PHY_REG - { - struct xmit_frame *xmit_frame; - u32 tmp_value; - - if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { - ret = _FAIL; - goto exit; - } - - for(i=0;iRFCalibrateInfo.RegA24 = Rtl819XPHY_REGArray_Table[i+1]; - - rtw_IOL_append_WD_cmd(xmit_frame, Rtl819XPHY_REGArray_Table[i], tmp_value); - //RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XPHY_REGArray_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XPHY_REGArray_Table[i], Rtl819XPHY_REGArray_Table[i+1])); - } - - ret = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0); - } - #else - for(i=0;iRFCalibrateInfo.RegA24 = Rtl819XPHY_REGArray_Table[i+1]; - - PHY_SetBBReg(Adapter, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]); - - // Add 1us delay between BB/RF register setting. - rtw_udelay_os(1); - - //RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XPHY_REGArray_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XPHY_REGArray_Table[i], Rtl819XPHY_REGArray_Table[i+1])); - } - #endif - // for External PA - phy_ConfigBBExternalPA(Adapter); - } - else if(ConfigType == CONFIG_BB_AGC_TAB) - { - #ifdef CONFIG_IOL_BB_AGC_TAB - { - struct xmit_frame *xmit_frame; - - if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { - ret = _FAIL; - goto exit; - } - - for(i=0;iMCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][0]-TxAGC_A_Rate18_06 = 0x%x\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0]); - } - if(RegAddr == rTxAGC_A_Rate54_24) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][1]-TxAGC_A_Rate54_24 = 0x%x\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1]); - } - if(RegAddr == rTxAGC_A_CCK1_Mcs32) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][6]-TxAGC_A_CCK1_Mcs32 = 0x%x\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6]); - } - if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0xffffff00) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][7]-TxAGC_B_CCK11_A_CCK2_11 = 0x%x\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7]); - } - if(RegAddr == rTxAGC_A_Mcs03_Mcs00) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][2]-TxAGC_A_Mcs03_Mcs00 = 0x%x\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2]); - } - if(RegAddr == rTxAGC_A_Mcs07_Mcs04) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][3]-TxAGC_A_Mcs07_Mcs04 = 0x%x\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3]); - } - if(RegAddr == rTxAGC_A_Mcs11_Mcs08) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][4]-TxAGC_A_Mcs11_Mcs08 = 0x%x\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4]); - } - if(RegAddr == rTxAGC_A_Mcs15_Mcs12) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][5]-TxAGC_A_Mcs15_Mcs12 = 0x%x\n", pHalData->pwrGroupCnt,pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5]); - if(pHalData->rf_type== RF_1T1R) - { - //printk("pwrGroupCnt = %d\n", pHalData->pwrGroupCnt); - pHalData->pwrGroupCnt++; - } - } - if(RegAddr == rTxAGC_B_Rate18_06) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][8]-TxAGC_B_Rate18_06 = 0x%x\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8]); - } - if(RegAddr == rTxAGC_B_Rate54_24) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][9]-TxAGC_B_Rate54_24 = 0x%x\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9]); - } - if(RegAddr == rTxAGC_B_CCK1_55_Mcs32) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][14]-TxAGC_B_CCK1_55_Mcs32 = 0x%x\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14]); - } - if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0x000000ff) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][15]-TxAGC_B_CCK11_A_CCK2_11 = 0x%x\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15]); - } - if(RegAddr == rTxAGC_B_Mcs03_Mcs00) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][10]-TxAGC_B_Mcs03_Mcs00 = 0x%x\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10]); - } - if(RegAddr == rTxAGC_B_Mcs07_Mcs04) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][11]-TxAGC_B_Mcs07_Mcs04 = 0x%x\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11]); - } - if(RegAddr == rTxAGC_B_Mcs11_Mcs08) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][12]-TxAGC_B_Mcs11_Mcs08 = 0x%x\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12]); - } - if(RegAddr == rTxAGC_B_Mcs15_Mcs12) - { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data; - //printk("MCSTxPowerLevelOriginalOffset[%d][13]-TxAGC_B_Mcs15_Mcs12 = 0x%x\n", pHalData->pwrGroupCnt, - // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13]); - - if(pHalData->rf_type != RF_1T1R) - { - //printk("pwrGroupCnt = %d\n", pHalData->pwrGroupCnt); - pHalData->pwrGroupCnt++; - } - } -} -/*----------------------------------------------------------------------------- - * Function: phy_ConfigBBWithPgParaFile - * - * Overview: - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/06/2008 MHC Create Version 0. - * 2009/07/29 tynli (porting from 92SE branch)2009/03/11 Add copy parameter file to buffer for silent reset - *---------------------------------------------------------------------------*/ -static int -phy_ConfigBBWithPgParaFile( - IN PADAPTER Adapter, - IN u8* pFileName) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - int rtStatus = _SUCCESS; - - - return rtStatus; - -} /* phy_ConfigBBWithPgParaFile */ - -#ifndef CONFIG_PHY_SETTING_WITH_ODM -/*----------------------------------------------------------------------------- - * Function: phy_ConfigBBWithPgHeaderFile - * - * Overview: Config PHY_REG_PG array - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/06/2008 MHC Add later!!!!!!.. Please modify for new files!!!! - * 11/10/2008 tynli Modify to mew files. - *---------------------------------------------------------------------------*/ -static int -phy_ConfigBBWithPgHeaderFile( - IN PADAPTER Adapter, - IN u8 ConfigType) -{ - int i; - u32* Rtl819XPHY_REGArray_Table_PG; - u16 PHY_REGArrayPGLen; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - - PHY_REGArrayPGLen = Rtl8188E_PHY_REG_Array_PGLength; - Rtl819XPHY_REGArray_Table_PG = (u32*)Rtl8188E_PHY_REG_Array_PG; - - if(ConfigType == CONFIG_BB_PHY_REG) - { - for(i=0;iphy_BB8192S_Config_ParaFile\n")); - - pszBBRegFile = sz8188EBBRegFile ; - pszAGCTableFile = sz8188EAGCTableFile; - pszBBRegPgFile = sz8188EBBRegPgFile; - pszBBRegMpFile = sz8188EBBRegMpFile; - - // - // 1. Read PHY_REG.TXT BB INIT!! - // We will seperate as 88C / 92C according to chip version - // -#ifdef CONFIG_EMBEDDED_FWIMG - #ifdef CONFIG_PHY_SETTING_WITH_ODM - if(HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG)) - rtStatus = _FAIL; - #else - rtStatus = phy_ConfigBBWithHeaderFile(Adapter, CONFIG_BB_PHY_REG); - #endif//#ifdef CONFIG_PHY_SETTING_WITH_ODM -#else - // No matter what kind of CHIP we always read PHY_REG.txt. We must copy different - // type of parameter files to phy_reg.txt at first. - rtStatus = phy_ConfigBBWithParaFile(Adapter,pszBBRegFile); -#endif//#ifdef CONFIG_EMBEDDED_FWIMG - - if(rtStatus != _SUCCESS){ - //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg Fail!!")); - goto phy_BB8190_Config_ParaFile_Fail; - } - - // - // 20100318 Joseph: Config 2T2R to 1T2R if necessary. - // - //if(pHalData->rf_type == RF_1T2R) - //{ - //phy_BB8192C_Config_1T(Adapter); - //DBG_8192C("phy_BB8188E_Config_ParaFile():Config to 1T!!\n"); - //} - - // - // 2. If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt - // - if (pEEPROM->bautoload_fail_flag == _FALSE) - { - pHalData->pwrGroupCnt = 0; - -#ifdef CONFIG_EMBEDDED_FWIMG - #ifdef CONFIG_PHY_SETTING_WITH_ODM - if(HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_PG)) - rtStatus = _FAIL; - #else - rtStatus = phy_ConfigBBWithPgHeaderFile(Adapter, CONFIG_BB_PHY_REG_PG); - #endif -#else - rtStatus = phy_ConfigBBWithPgParaFile(Adapter, pszBBRegPgFile); -#endif - } - - if(rtStatus != _SUCCESS){ - //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():BB_PG Reg Fail!!")); - goto phy_BB8190_Config_ParaFile_Fail; - } - - // - // 3. BB AGC table Initialization - // -#ifdef CONFIG_EMBEDDED_FWIMG - #ifdef CONFIG_PHY_SETTING_WITH_ODM - if(HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_AGC_TAB)) - rtStatus = _FAIL; - #else - rtStatus = phy_ConfigBBWithHeaderFile(Adapter, CONFIG_BB_AGC_TAB); - #endif//#ifdef CONFIG_PHY_SETTING_WITH_ODM -#else - //RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_BB8192S_Config_ParaFile AGC_TAB.txt\n")); - rtStatus = phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile); -#endif//#ifdef CONFIG_EMBEDDED_FWIMG - - if(rtStatus != _SUCCESS){ - //RT_TRACE(COMP_FPGA, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():AGC Table Fail\n")); - goto phy_BB8190_Config_ParaFile_Fail; - } - - -phy_BB8190_Config_ParaFile_Fail: - - return rtStatus; -} - - -int -PHY_BBConfig8188E( - IN PADAPTER Adapter - ) -{ - int rtStatus = _SUCCESS; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u32 RegVal; - u8 TmpU1B=0; - u8 value8,CrystalCap; - - phy_InitBBRFRegisterDefinition(Adapter); - - - // Enable BB and RF - RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN); - rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1)); - - // 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. - //rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x83); - //rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xdb); - - rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB); - -#ifdef CONFIG_USB_HCI - rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB); -#else - rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB); -#endif - -#if 0 -#ifdef CONFIG_USB_HCI - //To Fix MAC loopback mode fail. Suggested by SD4 Johnny. 2010.03.23. - rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x0f); - rtw_write8(Adapter, 0x15, 0xe9); -#endif - - rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, 0x80); -#endif - -#ifdef CONFIG_USB_HCI - //rtw_write8(Adapter, 0x15, 0xe9); -#endif - - -#ifdef CONFIG_PCI_HCI - // Force use left antenna by default for 88C. - // if(!IS_92C_SERIAL(pHalData->VersionID) || IS_92C_1T2R(pHalData->VersionID)) - if(Adapter->ledpriv.LedStrategy != SW_LED_MODE10) - { - RegVal = rtw_read32(Adapter, REG_LEDCFG0); - rtw_write32(Adapter, REG_LEDCFG0, RegVal|BIT23); - } -#endif - - // - // Config BB and AGC - // - rtStatus = phy_BB8188E_Config_ParaFile(Adapter); - - // write 0x24[16:11] = 0x24[22:17] = CrystalCap - CrystalCap = pHalData->CrystalCap & 0x3F; - PHY_SetBBReg(Adapter, REG_AFE_XTAL_CTRL, 0x7ff800, (CrystalCap | (CrystalCap << 6))); - - return rtStatus; - -} - - -int -PHY_RFConfig8188E( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - int rtStatus = _SUCCESS; - - // - // RF config - // - rtStatus = PHY_RF6052_Config8188E(Adapter); -#if 0 - switch(pHalData->rf_chip) - { - case RF_6052: - rtStatus = PHY_RF6052_Config(Adapter); - break; - case RF_8225: - rtStatus = PHY_RF8225_Config(Adapter); - break; - case RF_8256: - rtStatus = PHY_RF8256_Config(Adapter); - break; - case RF_8258: - break; - case RF_PSEUDO_11N: - rtStatus = PHY_RF8225_Config(Adapter); - break; - default: //for MacOs Warning: "RF_TYPE_MIN" not handled in switch - break; - } -#endif - return rtStatus; -} - - -/*----------------------------------------------------------------------------- - * Function: PHY_ConfigRFWithParaFile() - * - * Overview: This function read RF parameters from general file format, and do RF 3-wire - * - * Input: PADAPTER Adapter - * ps1Byte pFileName - * RF_RADIO_PATH_E eRFPath - * - * Output: NONE - * - * Return: RT_STATUS_SUCCESS: configuration file exist - * - * Note: Delay may be required for RF configuration - *---------------------------------------------------------------------------*/ -int -rtl8188e_PHY_ConfigRFWithParaFile( - IN PADAPTER Adapter, - IN u8* pFileName, - RF_RADIO_PATH_E eRFPath -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - int rtStatus = _SUCCESS; - - - return rtStatus; - -} - -//**************************************** -// The following is for High Power PA -//**************************************** -#define HighPowerRadioAArrayLen 22 -//This is for High power PA -u32 Rtl8192S_HighPower_RadioA_Array[HighPowerRadioAArrayLen] = { -0x013,0x00029ea4, -0x013,0x00025e74, -0x013,0x00020ea4, -0x013,0x0001ced0, -0x013,0x00019f40, -0x013,0x00014e70, -0x013,0x000106a0, -0x013,0x0000c670, -0x013,0x000082a0, -0x013,0x00004270, -0x013,0x00000240, -}; - -int -PHY_ConfigRFExternalPA( - IN PADAPTER Adapter, - RF_RADIO_PATH_E eRFPath -) -{ - int rtStatus = _SUCCESS; -#ifdef CONFIG_USB_HCI - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u16 i=0; - - if(!pHalData->ExternalPA) - { - return rtStatus; - } - - // 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the - // same code as SU. It is already updated in radio_a_1T_HP.txt. -#if 0 - //add for SU High Power PA - for(i = 0;i PHY_ConfigRFWithHeaderFile() Radio_A:Rtl8188ERadioA_1TArray\n")); -// RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> PHY_ConfigRFWithHeaderFile() Radio_B:Rtl8188ERadioB_1TArray\n")); - - switch (eRFPath) - { - case RF_PATH_A: - #ifdef CONFIG_IOL_RF_RF_PATH_A - { - struct xmit_frame *xmit_frame; - if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { - rtStatus = _FAIL; - goto exit; - } - - for(i = 0;iPHYRegDef[eRFPath]; - u32 NewOffset = 0; - u32 DataAndAddr = 0; - - NewOffset = Rtl819XRadioA_Array_Table[i] & 0x3f; - DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioA_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; // T65 RF - rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr); - } - } - rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0); - } - #else - for(i = 0;iPHYRegDef[eRFPath]; - u32 NewOffset = 0; - u32 DataAndAddr = 0; - - NewOffset = Rtl819XRadioB_Array_Table[i] & 0x3f; - DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioB_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; // T65 RF - rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr); - } - } - rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0); - } - #else - for(i = 0;i actually we call PlatformStallExecution()) to do NdisStallExecution() - // [busy wait] instead of NdisMSleep(). So we acquire RT_INITIAL_SPINLOCK - // to run at Dispatch level to achive it. - //cosa PlatformAcquireSpinLock(Adapter, RT_INITIAL_SPINLOCK); - WriteData[i] &= 0xfff; - PHY_SetRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bRFRegOffsetMask, WriteData[i]); - // TODO: we should not delay for such a long time. Ask SD3 - rtw_mdelay_os(10); - ulRegRead = PHY_QueryRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bMaskDWord); - rtw_mdelay_os(10); - //cosa PlatformReleaseSpinLock(Adapter, RT_INITIAL_SPINLOCK); - break; - - default: - rtStatus = _FAIL; - break; - } - - - // - // Check whether readback data is correct - // - if(ulRegRead != WriteData[i]) - { - //RT_TRACE(COMP_FPGA, DBG_LOUD, ("ulRegRead: %lx, WriteData: %lx \n", ulRegRead, WriteData[i])); - rtStatus = _FAIL; - break; - } - } - - return rtStatus; -} - - -VOID -rtl8192c_PHY_GetHWRegOriginalValue( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - // read rx initial gain - pHalData->DefaultInitialGain[0] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XAAGCCore1, bMaskByte0); - pHalData->DefaultInitialGain[1] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XBAGCCore1, bMaskByte0); - pHalData->DefaultInitialGain[2] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XCAGCCore1, bMaskByte0); - pHalData->DefaultInitialGain[3] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XDAGCCore1, bMaskByte0); - //RT_TRACE(COMP_INIT, DBG_LOUD, - //("Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x) \n", - //pHalData->DefaultInitialGain[0], pHalData->DefaultInitialGain[1], - //pHalData->DefaultInitialGain[2], pHalData->DefaultInitialGain[3])); - - // read framesync - pHalData->framesync = (u8)PHY_QueryBBReg(Adapter, rOFDM0_RxDetector3, bMaskByte0); - pHalData->framesyncC34 = PHY_QueryBBReg(Adapter, rOFDM0_RxDetector2, bMaskDWord); - //RT_TRACE(COMP_INIT, DBG_LOUD, ("Default framesync (0x%x) = 0x%x \n", - // rOFDM0_RxDetector3, pHalData->framesync)); -} - - -// -// Description: -// Map dBm into Tx power index according to -// current HW model, for example, RF and PA, and -// current wireless mode. -// By Bruce, 2008-01-29. -// -static u8 -phy_DbmToTxPwrIdx( - IN PADAPTER Adapter, - IN WIRELESS_MODE WirelessMode, - IN int PowerInDbm - ) -{ - u8 TxPwrIdx = 0; - int Offset = 0; - - - // - // Tested by MP, we found that CCK Index 0 equals to 8dbm, OFDM legacy equals to - // 3dbm, and OFDM HT equals to 0dbm repectively. - // Note: - // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. - // By Bruce, 2008-01-29. - // - switch(WirelessMode) - { - case WIRELESS_MODE_B: - Offset = -7; - break; - - case WIRELESS_MODE_G: - case WIRELESS_MODE_N_24G: - Offset = -8; - break; - default: - Offset = -8; - break; - } - - if((PowerInDbm - Offset) > 0) - { - TxPwrIdx = (u8)((PowerInDbm - Offset) * 2); - } - else - { - TxPwrIdx = 0; - } - - // Tx Power Index is too large. - if(TxPwrIdx > MAX_TXPWR_IDX_NMODE_92S) - TxPwrIdx = MAX_TXPWR_IDX_NMODE_92S; - - return TxPwrIdx; -} - -// -// Description: -// Map Tx power index into dBm according to -// current HW model, for example, RF and PA, and -// current wireless mode. -// By Bruce, 2008-01-29. -// -int -phy_TxPwrIdxToDbm( - IN PADAPTER Adapter, - IN WIRELESS_MODE WirelessMode, - IN u8 TxPwrIdx - ) -{ - int Offset = 0; - int PwrOutDbm = 0; - - // - // Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm. - // Note: - // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. - // By Bruce, 2008-01-29. - // - switch(WirelessMode) - { - case WIRELESS_MODE_B: - Offset = -7; - break; - - case WIRELESS_MODE_G: - case WIRELESS_MODE_N_24G: - Offset = -8; - default: - Offset = -8; - break; - } - - PwrOutDbm = TxPwrIdx / 2 + Offset; // Discard the decimal part. - - return PwrOutDbm; -} - - -/*----------------------------------------------------------------------------- - * Function: GetTxPowerLevel8190() - * - * Overview: This function is export to "common" moudule - * - * Input: PADAPTER Adapter - * psByte Power Level - * - * Output: NONE - * - * Return: NONE - * - *---------------------------------------------------------------------------*/ -VOID -PHY_GetTxPowerLevel8188E( - IN PADAPTER Adapter, - OUT u32* powerlevel - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 TxPwrLevel = 0; - int TxPwrDbm; - - // - // Because the Tx power indexes are different, we report the maximum of them to - // meet the CCX TPC request. By Bruce, 2008-01-31. - // - - // CCK - TxPwrLevel = pHalData->CurrentCckTxPwrIdx; - TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_B, TxPwrLevel); - - // Legacy OFDM - TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx + pHalData->LegacyHTTxPowerDiff; - - // Compare with Legacy OFDM Tx power. - if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel) > TxPwrDbm) - TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel); - - // HT OFDM - TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx; - - // Compare with HT OFDM Tx power. - if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel) > TxPwrDbm) - TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel); - - *powerlevel = TxPwrDbm; -} - -#if 0 -static void getTxPowerIndex( - IN PADAPTER Adapter, - IN u8 channel, - IN OUT u8* cckPowerLevel, - IN OUT u8* ofdmPowerLevel - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 index = (channel -1); - // 1. CCK - cckPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelCck[RF_PATH_A][index]; //RF-A - cckPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelCck[RF_PATH_B][index]; //RF-B - - // 2. OFDM for 1S or 2S - if (GET_RF_TYPE(Adapter) == RF_1T2R || GET_RF_TYPE(Adapter) == RF_1T1R) - { - // Read HT 40 OFDM TX power - ofdmPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelHT40_1S[RF_PATH_A][index]; - ofdmPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelHT40_1S[RF_PATH_B][index]; - } - else if (GET_RF_TYPE(Adapter) == RF_2T2R) - { - // Read HT 40 OFDM TX power - ofdmPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelHT40_2S[RF_PATH_A][index]; - ofdmPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelHT40_2S[RF_PATH_B][index]; - } - //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, set tx power index !!\n", channel)); -} -#endif - -void getTxPowerIndex88E( - IN PADAPTER Adapter, - IN u8 channel, - IN OUT u8* cckPowerLevel, - IN OUT u8* ofdmPowerLevel, - IN OUT u8* BW20PowerLevel, - IN OUT u8* BW40PowerLevel - ) -{ - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 index = (channel -1); - u8 TxCount=0,path_nums; - - - if((RF_1T2R == pHalData->rf_type) ||(RF_1T1R ==pHalData->rf_type )) - path_nums = 1; - else - path_nums = 2; - - for(TxCount=0;TxCount< path_nums ;TxCount++) - { - if(TxCount==RF_PATH_A) - { - // 1. CCK - cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; - //2. OFDM - ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->OFDM_24G_Diff[TxCount][RF_PATH_A]; - // 1. BW20 - BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[TxCount][RF_PATH_A]; - //2. BW40 - BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; - //RTPRINT(FPHY, PHY_TXPWR, ("getTxPowerIndex88E(): 40MBase=0x%x 20Mdiff=%d 20MBase=0x%x!!\n", - // pHalData->Index24G_BW40_Base[RF_PATH_A][index], - // pHalData->BW20_24G_Diff[TxCount][RF_PATH_A], - // BW20PowerLevel[TxCount])); - } - else if(TxCount==RF_PATH_B) - { - // 1. CCK - cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; - //2. OFDM - ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[TxCount][index]; - // 1. BW20 - BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[TxCount][RF_PATH_A]+ - pHalData->BW20_24G_Diff[TxCount][index]; - //2. BW40 - BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; - } - else if(TxCount==RF_PATH_C) - { - // 1. CCK - cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; - //2. OFDM - ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_B][index]+ - pHalData->BW20_24G_Diff[TxCount][index]; - // 1. BW20 - BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_B][index]+ - pHalData->BW20_24G_Diff[TxCount][index]; - //2. BW40 - BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; - } - else if(TxCount==RF_PATH_D) - { - // 1. CCK - cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; - //2. OFDM - ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_B][index]+ - pHalData->BW20_24G_Diff[RF_PATH_C][index]+ - pHalData->BW20_24G_Diff[TxCount][index]; - - // 1. BW20 - BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_B][index]+ - pHalData->BW20_24G_Diff[RF_PATH_C][index]+ - pHalData->BW20_24G_Diff[TxCount][index]; - - //2. BW40 - BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; - } - else - { - } - } - -#if 0 // (INTEL_PROXIMITY_SUPPORT == 1) - switch(pMgntInfo->IntelProximityModeInfo.PowerOutput){ - case 1: // 100% - break; - case 2: // 70% - cckPowerLevel[0] -= 3; - cckPowerLevel[1] -= 3; - ofdmPowerLevel[0] -=3; - ofdmPowerLevel[1] -= 3; - break; - case 3: // 50% - cckPowerLevel[0] -= 6; - cckPowerLevel[1] -= 6; - ofdmPowerLevel[0] -=6; - ofdmPowerLevel[1] -= 6; - break; - case 4: // 35% - cckPowerLevel[0] -= 9; - cckPowerLevel[1] -= 9; - ofdmPowerLevel[0] -=9; - ofdmPowerLevel[1] -= 9; - break; - case 5: // 15% - cckPowerLevel[0] -= 17; - cckPowerLevel[1] -= 17; - ofdmPowerLevel[0] -=17; - ofdmPowerLevel[1] -= 17; - break; - - default: - break; - } -#endif - //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, set tx power index !!\n", channel)); -} - -void phy_PowerIndexCheck88E( - IN PADAPTER Adapter, - IN u8 channel, - IN OUT u8 * cckPowerLevel, - IN OUT u8 * ofdmPowerLevel, - IN OUT u8 * BW20PowerLevel, - IN OUT u8 * BW40PowerLevel - ) -{ - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -#if 0 // (CCX_SUPPORT == 1) - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - PRT_CCX_INFO pCcxInfo = GET_CCX_INFO(pMgntInfo); - - // - // CCX 2 S31, AP control of client transmit power: - // 1. We shall not exceed Cell Power Limit as possible as we can. - // 2. Tolerance is +/- 5dB. - // 3. 802.11h Power Contraint takes higher precedence over CCX Cell Power Limit. - // - // TODO: - // 1. 802.11h power contraint - // - // 071011, by rcnjko. - // - if( pMgntInfo->OpMode == RT_OP_MODE_INFRASTRUCTURE && - pMgntInfo->mAssoc && - pCcxInfo->bUpdateCcxPwr && - pCcxInfo->bWithCcxCellPwr && - channel == pMgntInfo->dot11CurrentChannelNumber) - { - u1Byte CckCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, pCcxInfo->CcxCellPwr); - u1Byte LegacyOfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_G, pCcxInfo->CcxCellPwr); - u1Byte OfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, pCcxInfo->CcxCellPwr); - - RT_TRACE(COMP_TXAGC, DBG_LOUD, - ("CCX Cell Limit: %d dbm => CCK Tx power index : %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", - pCcxInfo->CcxCellPwr, CckCellPwrIdx, LegacyOfdmCellPwrIdx, OfdmCellPwrIdx)); - RT_TRACE(COMP_TXAGC, DBG_LOUD, - ("EEPROM channel(%d) => CCK Tx power index: %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", - channel, cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); - - // CCK - if(cckPowerLevel[0] > CckCellPwrIdx) - cckPowerLevel[0] = CckCellPwrIdx; - // Legacy OFDM, HT OFDM - if(ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff > LegacyOfdmCellPwrIdx) - { - if((OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff) > 0) - { - ofdmPowerLevel[0] = OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff; - } - else - { - ofdmPowerLevel[0] = 0; - } - } - - RT_TRACE(COMP_TXAGC, DBG_LOUD, - ("Altered CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", - cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); - } -#else - // Add or not ??? -#endif - - pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0]; - pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0]; - pHalData->CurrentBW2024GTxPwrIdx = BW20PowerLevel[0]; - pHalData->CurrentBW4024GTxPwrIdx = BW40PowerLevel[0]; - - //DBG_871X("PHY_SetTxPowerLevel8188E(): CurrentCckTxPwrIdx : 0x%x,CurrentOfdm24GTxPwrIdx: 0x%x, CurrentBW2024GTxPwrIdx: 0x%dx, CurrentBW4024GTxPwrIdx: 0x%x \n", - // pHalData->CurrentCckTxPwrIdx, pHalData->CurrentOfdm24GTxPwrIdx, pHalData->CurrentBW2024GTxPwrIdx, pHalData->CurrentBW4024GTxPwrIdx); -} -/*----------------------------------------------------------------------------- - * Function: SetTxPowerLevel8190() - * - * Overview: This function is export to "HalCommon" moudule - * We must consider RF path later!!!!!!! - * - * Input: PADAPTER Adapter - * u1Byte channel - * - * Output: NONE - * - * Return: NONE - * 2008/11/04 MHC We remove EEPROM_93C56. - * We need to move CCX relative code to independet file. - * 2009/01/21 MHC Support new EEPROM format from SD3 requirement. - * - *---------------------------------------------------------------------------*/ -VOID -PHY_SetTxPowerLevel8188E( - IN PADAPTER Adapter, - IN u8 channel - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - u8 cckPowerLevel[MAX_TX_COUNT], ofdmPowerLevel[MAX_TX_COUNT];// [0]:RF-A, [1]:RF-B - u8 BW20PowerLevel[MAX_TX_COUNT], BW40PowerLevel[MAX_TX_COUNT]; - u8 i=0; -/* -#if(MP_DRIVER == 1) - if (Adapter->registrypriv.mp_mode == 1) - return; -#endif -*/ - //getTxPowerIndex(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]); - getTxPowerIndex88E(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0],&BW20PowerLevel[0],&BW40PowerLevel[0]); - - //printk("Channel-%d, cckPowerLevel = 0x%x, ofdmPowerLeve = 0x%x, BW20PowerLevel = 0x%x, BW40PowerLevel = 0x%x,\n", - // channel, cckPowerLevel[0], ofdmPowerLevel[0], BW20PowerLevel[0] ,BW40PowerLevel[0]); - - //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, cckPowerLevel (A / B) = 0x%x / 0x%x, ofdmPowerLevel (A / B) = 0x%x / 0x%x\n", - // channel, cckPowerLevel[0], cckPowerLevel[1], ofdmPowerLevel[0], ofdmPowerLevel[1])); - - //ccxPowerIndexCheck(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]); - phy_PowerIndexCheck88E(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0],&BW20PowerLevel[0],&BW40PowerLevel[0]); - - rtl8188e_PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]); - rtl8188e_PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0],&BW20PowerLevel[0],&BW40PowerLevel[0], channel); - -#if 0 - switch(pHalData->rf_chip) - { - case RF_8225: - PHY_SetRF8225CckTxPower(Adapter, cckPowerLevel[0]); - PHY_SetRF8225OfdmTxPower(Adapter, ofdmPowerLevel[0]); - break; - - case RF_8256: - PHY_SetRF8256CCKTxPower(Adapter, cckPowerLevel[0]); - PHY_SetRF8256OFDMTxPower(Adapter, ofdmPowerLevel[0]); - break; - - case RF_6052: - PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]); - PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel); - break; - - case RF_8258: - break; - } -#endif - -} - - -// -// Description: -// Update transmit power level of all channel supported. -// -// TODO: -// A mode. -// By Bruce, 2008-02-04. -// -BOOLEAN -PHY_UpdateTxPowerDbm8188E( - IN PADAPTER Adapter, - IN int powerInDbm - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 idx; - u8 rf_path; - - // TODO: A mode Tx power. - u8 CckTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, powerInDbm); - u8 OfdmTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, powerInDbm); - - if(OfdmTxPwrIdx - pHalData->LegacyHTTxPowerDiff > 0) - OfdmTxPwrIdx -= pHalData->LegacyHTTxPowerDiff; - else - OfdmTxPwrIdx = 0; - - //RT_TRACE(COMP_TXAGC, DBG_LOUD, ("PHY_UpdateTxPowerDbm8192S(): %ld dBm , CckTxPwrIdx = %d, OfdmTxPwrIdx = %d\n", powerInDbm, CckTxPwrIdx, OfdmTxPwrIdx)); - - for(idx = 0; idx < 14; idx++) - { - for (rf_path = 0; rf_path < 2; rf_path++) - { - pHalData->TxPwrLevelCck[rf_path][idx] = CckTxPwrIdx; - pHalData->TxPwrLevelHT40_1S[rf_path][idx] = - pHalData->TxPwrLevelHT40_2S[rf_path][idx] = OfdmTxPwrIdx; - } - } - - //Adapter->HalFunc.SetTxPowerLevelHandler(Adapter, pHalData->CurrentChannel);//gtest:todo - - return _TRUE; -} - - -/* - Description: - When beacon interval is changed, the values of the - hw registers should be modified. - By tynli, 2008.10.24. - -*/ - - -void -rtl8192c_PHY_SetBeaconHwReg( - IN PADAPTER Adapter, - IN u16 BeaconInterval - ) -{ - -} - - -VOID -PHY_ScanOperationBackup8188E( - IN PADAPTER Adapter, - IN u8 Operation - ) -{ -#if 0 - IO_TYPE IoType; - - if(!Adapter->bDriverStopped) - { - switch(Operation) - { - case SCAN_OPT_BACKUP: - IoType = IO_CMD_PAUSE_DM_BY_SCAN; - rtw_hal_set_hwreg(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); - - break; - - case SCAN_OPT_RESTORE: - IoType = IO_CMD_RESUME_DM_BY_SCAN; - rtw_hal_set_hwreg(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); - break; - - default: - RT_TRACE(COMP_SCAN, DBG_LOUD, ("Unknown Scan Backup Operation. \n")); - break; - } - } -#endif -} - -/*----------------------------------------------------------------------------- - * Function: PHY_SetBWModeCallback8192C() - * - * Overview: Timer callback function for SetSetBWMode - * - * Input: PRT_TIMER pTimer - * - * Output: NONE - * - * Return: NONE - * - * Note: (1) We do not take j mode into consideration now - * (2) Will two workitem of "switch channel" and "switch channel bandwidth" run - * concurrently? - *---------------------------------------------------------------------------*/ -static VOID -_PHY_SetBWMode92C( - IN PADAPTER Adapter -) -{ -// PADAPTER Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 regBwOpMode; - u8 regRRSR_RSC; - - //return; - - // Added it for 20/40 mhz switch time evaluation by guangan 070531 - //u4Byte NowL, NowH; - //u8Byte BeginTime, EndTime; - - /*RT_TRACE(COMP_SCAN, DBG_LOUD, ("==>PHY_SetBWModeCallback8192C() Switch to %s bandwidth\n", \ - pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"))*/ - - if(pHalData->rf_chip == RF_PSEUDO_11N) - { - //pHalData->SetBWModeInProgress= _FALSE; - return; - } - - // There is no 40MHz mode in RF_8225. - if(pHalData->rf_chip==RF_8225) - return; - - if(Adapter->bDriverStopped) - return; - - // Added it for 20/40 mhz switch time evaluation by guangan 070531 - //NowL = PlatformEFIORead4Byte(Adapter, TSFR); - //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); - //BeginTime = ((u8Byte)NowH << 32) + NowL; - - //3// - //3//<1>Set MAC register - //3// - //Adapter->HalFunc.SetBWModeHandler(); - - regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE); - regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2); - //regBwOpMode = rtw_hal_get_hwreg(Adapter,HW_VAR_BWMODE,(pu1Byte)®BwOpMode); - - switch(pHalData->CurrentChannelBW) - { - case HT_CHANNEL_WIDTH_20: - regBwOpMode |= BW_OPMODE_20MHZ; - // 2007/02/07 Mark by Emily becasue we have not verify whether this register works - rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); - break; - - case HT_CHANNEL_WIDTH_40: - regBwOpMode &= ~BW_OPMODE_20MHZ; - // 2007/02/07 Mark by Emily becasue we have not verify whether this register works - rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); - - regRRSR_RSC = (regRRSR_RSC&0x90) |(pHalData->nCur40MhzPrimeSC<<5); - rtw_write8(Adapter, REG_RRSR+2, regRRSR_RSC); - break; - - default: - /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): - unknown Bandwidth: %#X\n",pHalData->CurrentChannelBW));*/ - break; - } - - //3// - //3//<2>Set PHY related register - //3// - switch(pHalData->CurrentChannelBW) - { - /* 20 MHz channel*/ - case HT_CHANNEL_WIDTH_20: - PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); - PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); - //PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); - - break; - - - /* 40 MHz channel*/ - case HT_CHANNEL_WIDTH_40: - PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); - PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1); - - // Set Control channel to upper or lower. These settings are required only for 40MHz - PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1)); - PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); - //PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0); - - PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC==HAL_PRIME_CHNL_OFFSET_LOWER)?2:1); - - break; - - - - default: - /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): unknown Bandwidth: %#X\n"\ - ,pHalData->CurrentChannelBW));*/ - break; - - } - //Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315 - - // Added it for 20/40 mhz switch time evaluation by guangan 070531 - //NowL = PlatformEFIORead4Byte(Adapter, TSFR); - //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); - //EndTime = ((u8Byte)NowH << 32) + NowL; - //RT_TRACE(COMP_SCAN, DBG_LOUD, ("SetBWModeCallback8190Pci: time of SetBWMode = %I64d us!\n", (EndTime - BeginTime))); - - //3<3>Set RF related register - switch(pHalData->rf_chip) - { - case RF_8225: - //PHY_SetRF8225Bandwidth(Adapter, pHalData->CurrentChannelBW); - break; - - case RF_8256: - // Please implement this function in Hal8190PciPhy8256.c - //PHY_SetRF8256Bandwidth(Adapter, pHalData->CurrentChannelBW); - break; - - case RF_8258: - // Please implement this function in Hal8190PciPhy8258.c - // PHY_SetRF8258Bandwidth(); - break; - - case RF_PSEUDO_11N: - // Do Nothing - break; - - case RF_6052: - rtl8188e_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW); - break; - - default: - //RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); - break; - } - - //pHalData->SetBWModeInProgress= FALSE; - - //RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SetBWModeCallback8192C() \n" )); -} - - - /*----------------------------------------------------------------------------- - * Function: SetBWMode8190Pci() - * - * Overview: This function is export to "HalCommon" moudule - * - * Input: PADAPTER Adapter - * HT_CHANNEL_WIDTH Bandwidth //20M or 40M - * - * Output: NONE - * - * Return: NONE - * - * Note: We do not take j mode into consideration now - *---------------------------------------------------------------------------*/ -VOID -PHY_SetBWMode8188E( - IN PADAPTER Adapter, - IN HT_CHANNEL_WIDTH Bandwidth, // 20M or 40M - IN unsigned char Offset // Upper, Lower, or Don't care -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - HT_CHANNEL_WIDTH tmpBW= pHalData->CurrentChannelBW; - // Modified it for 20/40 mhz switch by guangan 070531 - //PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; - - //return; - - //if(pHalData->SwChnlInProgress) -// if(pMgntInfo->bScanInProgress) -// { -// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s Exit because bScanInProgress!\n", -// Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")); -// return; -// } - -// if(pHalData->SetBWModeInProgress) -// { -// // Modified it for 20/40 mhz switch by guangan 070531 -// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s cancel last timer because SetBWModeInProgress!\n", -// Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")); -// PlatformCancelTimer(Adapter, &pHalData->SetBWModeTimer); -// //return; -// } - - //if(pHalData->SetBWModeInProgress) - // return; - - //pHalData->SetBWModeInProgress= TRUE; - - pHalData->CurrentChannelBW = Bandwidth; - -#if 0 - if(Offset==HT_EXTCHNL_OFFSET_LOWER) - pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; - else if(Offset==HT_EXTCHNL_OFFSET_UPPER) - pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; - else - pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; -#else - pHalData->nCur40MhzPrimeSC = Offset; -#endif - - if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) - { - #if 0 - //PlatformSetTimer(Adapter, &(pHalData->SetBWModeTimer), 0); - #else - _PHY_SetBWMode92C(Adapter); - #endif - } - else - { - //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() SetBWModeInProgress FALSE driver sleep or unload\n")); - //pHalData->SetBWModeInProgress= FALSE; - pHalData->CurrentChannelBW = tmpBW; - } - -} - - -static void _PHY_SwChnl8192C(PADAPTER Adapter, u8 channel) -{ - u8 eRFPath; - u32 param1, param2; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - if ( Adapter->bNotifyChannelChange ) - { - DBG_871X( "[%s] ch = %d\n", __FUNCTION__, channel ); - } - - //s1. pre common command - CmdID_SetTxPowerLevel - PHY_SetTxPowerLevel8188E(Adapter, channel); - - //s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel - param1 = RF_CHNLBW; - param2 = channel; - for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) - { - pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2); - PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); - } - - - //s3. post common command - CmdID_End, None - -} -// <20130708, James> A workaround to eliminate the 2480MHz spur for 8188E I-Cut -void -phy_SpurCalibration_8188E( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - //DbgPrint("===> phy_SpurCalibration_8188E CurrentChannelBW = %d, CurrentChannel = %d\n", pHalData->CurrentChannelBW, pHalData->CurrentChannel); - if(pHalData->CurrentChannelBW == 0 && pHalData->CurrentChannel == 13){ - PHY_SetBBReg(Adapter, rOFDM1_CFOTracking, BIT(28), 0x1); //enable CSI Mask - PHY_SetBBReg(Adapter, rOFDM1_csi_fix_mask, BIT(26)|BIT(25), 0x3); //Fix CSI Mask Tone - } - else{ - PHY_SetBBReg(Adapter, rOFDM1_CFOTracking, BIT(28), 0x0); //disable CSI Mask - PHY_SetBBReg(Adapter, rOFDM1_csi_fix_mask, BIT(26)|BIT(25), 0x0); - } - -} -VOID -PHY_SwChnl8188E( // Call after initialization - IN PADAPTER Adapter, - IN u8 channel - ) -{ - //PADAPTER Adapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, _TRUE); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 tmpchannel = pHalData->CurrentChannel; - BOOLEAN bResult = _TRUE; - - if(pHalData->rf_chip == RF_PSEUDO_11N) - { - //pHalData->SwChnlInProgress=FALSE; - return; //return immediately if it is peudo-phy - } - - //if(pHalData->SwChnlInProgress) - // return; - - //if(pHalData->SetBWModeInProgress) - // return; - - //-------------------------------------------- - switch(pHalData->CurrentWirelessMode) - { - case WIRELESS_MODE_A: - case WIRELESS_MODE_N_5G: - //RT_ASSERT((channel>14), ("WIRELESS_MODE_A but channel<=14")); - break; - - case WIRELESS_MODE_B: - //RT_ASSERT((channel<=14), ("WIRELESS_MODE_B but channel>14")); - break; - - case WIRELESS_MODE_G: - case WIRELESS_MODE_N_24G: - //RT_ASSERT((channel<=14), ("WIRELESS_MODE_G but channel>14")); - break; - - default: - //RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode)); - break; - } - //-------------------------------------------- - - //pHalData->SwChnlInProgress = TRUE; - if(channel == 0) - channel = 1; - - pHalData->CurrentChannel=channel; - - //pHalData->SwChnlStage=0; - //pHalData->SwChnlStep=0; - - if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) - { - #if 0 - //PlatformSetTimer(Adapter, &(pHalData->SwChnlTimer), 0); - #else - _PHY_SwChnl8192C(Adapter, channel); - #endif - if (IS_VENDOR_8188E_I_CUT_SERIES(Adapter)) - phy_SpurCalibration_8188E( Adapter); - if(bResult) - { - //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress TRUE schdule workitem done\n")); - } - else - { - //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE schdule workitem error\n")); - //if(IS_HARDWARE_TYPE_8192SU(Adapter)) - //{ - // pHalData->SwChnlInProgress = FALSE; - pHalData->CurrentChannel = tmpchannel; - //} - } - - } - else - { - //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE driver sleep or unload\n")); - //if(IS_HARDWARE_TYPE_8192SU(Adapter)) - //{ - // pHalData->SwChnlInProgress = FALSE; - pHalData->CurrentChannel = tmpchannel; - //} - } -} - - -static BOOLEAN -phy_SwChnlStepByStep( - IN PADAPTER Adapter, - IN u8 channel, - IN u8 *stage, - IN u8 *step, - OUT u32 *delay - ) -{ -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PCHANNEL_ACCESS_SETTING pChnlAccessSetting; - SwChnlCmd PreCommonCmd[MAX_PRECMD_CNT]; - u4Byte PreCommonCmdCnt; - SwChnlCmd PostCommonCmd[MAX_POSTCMD_CNT]; - u4Byte PostCommonCmdCnt; - SwChnlCmd RfDependCmd[MAX_RFDEPENDCMD_CNT]; - u4Byte RfDependCmdCnt; - SwChnlCmd *CurrentCmd; - u1Byte eRFPath; - u4Byte RfTXPowerCtrl; - BOOLEAN bAdjRfTXPowerCtrl = _FALSE; - - - RT_ASSERT((Adapter != NULL), ("Adapter should not be NULL\n")); -#if(MP_DRIVER != 1) - RT_ASSERT(IsLegalChannel(Adapter, channel), ("illegal channel: %d\n", channel)); -#endif - RT_ASSERT((pHalData != NULL), ("pHalData should not be NULL\n")); - - pChnlAccessSetting = &Adapter->MgntInfo.Info8185.ChannelAccessSetting; - RT_ASSERT((pChnlAccessSetting != NULL), ("pChnlAccessSetting should not be NULL\n")); - - //for(eRFPath = RF_PATH_A; eRFPath NumTotalRFPath; eRFPath++) - //for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) - //{ - // <1> Fill up pre common command. - PreCommonCmdCnt = 0; - phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, - CmdID_SetTxPowerLevel, 0, 0, 0); - phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, - CmdID_End, 0, 0, 0); - - // <2> Fill up post common command. - PostCommonCmdCnt = 0; - - phy_SetSwChnlCmdArray(PostCommonCmd, PostCommonCmdCnt++, MAX_POSTCMD_CNT, - CmdID_End, 0, 0, 0); - - // <3> Fill up RF dependent command. - RfDependCmdCnt = 0; - switch( pHalData->RFChipID ) - { - case RF_8225: - RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); - // 2008/09/04 MH Change channel. - if(channel==14) channel++; - phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_RF_WriteReg, rZebra1_Channel, (0x10+channel-1), 10); - phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_End, 0, 0, 0); - break; - - case RF_8256: - // TEST!! This is not the table for 8256!! - RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); - phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_RF_WriteReg, rRfChannel, channel, 10); - phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_End, 0, 0, 0); - break; - - case RF_6052: - RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); - phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_RF_WriteReg, RF_CHNLBW, channel, 10); - phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, - CmdID_End, 0, 0, 0); - - break; - - case RF_8258: - break; - - // For FPGA two MAC verification - case RF_PSEUDO_11N: - return TRUE; - default: - RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); - return FALSE; - break; - } - - - do{ - switch(*stage) - { - case 0: - CurrentCmd=&PreCommonCmd[*step]; - break; - case 1: - CurrentCmd=&RfDependCmd[*step]; - break; - case 2: - CurrentCmd=&PostCommonCmd[*step]; - break; - } - - if(CurrentCmd->CmdID==CmdID_End) - { - if((*stage)==2) - { - return TRUE; - } - else - { - (*stage)++; - (*step)=0; - continue; - } - } - - switch(CurrentCmd->CmdID) - { - case CmdID_SetTxPowerLevel: - PHY_SetTxPowerLevel8192C(Adapter,channel); - break; - case CmdID_WritePortUlong: - PlatformEFIOWrite4Byte(Adapter, CurrentCmd->Para1, CurrentCmd->Para2); - break; - case CmdID_WritePortUshort: - PlatformEFIOWrite2Byte(Adapter, CurrentCmd->Para1, (u2Byte)CurrentCmd->Para2); - break; - case CmdID_WritePortUchar: - PlatformEFIOWrite1Byte(Adapter, CurrentCmd->Para1, (u1Byte)CurrentCmd->Para2); - break; - case CmdID_RF_WriteReg: // Only modify channel for the register now !!!!! - for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) - { -#if 1 - pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | CurrentCmd->Para2); - PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); -#else - PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, (CurrentCmd->Para2)); -#endif - } - break; - } - - break; - }while(TRUE); - //cosa }/*for(Number of RF paths)*/ - - (*delay)=CurrentCmd->msDelay; - (*step)++; - return FALSE; -#endif - return _TRUE; -} - - -static BOOLEAN -phy_SetSwChnlCmdArray( - SwChnlCmd* CmdTable, - u32 CmdTableIdx, - u32 CmdTableSz, - SwChnlCmdID CmdID, - u32 Para1, - u32 Para2, - u32 msDelay - ) -{ - SwChnlCmd* pCmd; - - if(CmdTable == NULL) - { - //RT_ASSERT(FALSE, ("phy_SetSwChnlCmdArray(): CmdTable cannot be NULL.\n")); - return _FALSE; - } - if(CmdTableIdx >= CmdTableSz) - { - //RT_ASSERT(FALSE, - // ("phy_SetSwChnlCmdArray(): Access invalid index, please check size of the table, CmdTableIdx:%ld, CmdTableSz:%ld\n", - // CmdTableIdx, CmdTableSz)); - return _FALSE; - } - - pCmd = CmdTable + CmdTableIdx; - pCmd->CmdID = CmdID; - pCmd->Para1 = Para1; - pCmd->Para2 = Para2; - pCmd->msDelay = msDelay; - - return _TRUE; -} - - -static void -phy_FinishSwChnlNow( // We should not call this function directly - IN PADAPTER Adapter, - IN u8 channel - ) -{ -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u32 delay; - - while(!phy_SwChnlStepByStep(Adapter,channel,&pHalData->SwChnlStage,&pHalData->SwChnlStep,&delay)) - { - if(delay>0) - rtw_mdelay_os(delay); - } -#endif -} - - - -// -// Description: -// Switch channel synchronously. Called by SwChnlByDelayHandler. -// -// Implemented by Bruce, 2008-02-14. -// The following procedure is operted according to SwChanlCallback8190Pci(). -// However, this procedure is performed synchronously which should be running under -// passive level. -// -VOID -PHY_SwChnlPhy8192C( // Only called during initialize - IN PADAPTER Adapter, - IN u8 channel - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - //RT_TRACE(COMP_SCAN | COMP_RM, DBG_LOUD, ("==>PHY_SwChnlPhy8192S(), switch from channel %d to channel %d.\n", pHalData->CurrentChannel, channel)); - - // Cannot IO. - //if(RT_CANNOT_IO(Adapter)) - // return; - - // Channel Switching is in progress. - //if(pHalData->SwChnlInProgress) - // return; - - //return immediately if it is peudo-phy - if(pHalData->rf_chip == RF_PSEUDO_11N) - { - //pHalData->SwChnlInProgress=FALSE; - return; - } - - //pHalData->SwChnlInProgress = TRUE; - if( channel == 0) - channel = 1; - - pHalData->CurrentChannel=channel; - - //pHalData->SwChnlStage = 0; - //pHalData->SwChnlStep = 0; - - phy_FinishSwChnlNow(Adapter,channel); - - //pHalData->SwChnlInProgress = FALSE; -} - - -// -// Description: -// Configure H/W functionality to enable/disable Monitor mode. -// Note, because we possibly need to configure BB and RF in this function, -// so caller should in PASSIVE_LEVEL. 080118, by rcnjko. -// -VOID -PHY_SetMonitorMode8192C( - IN PADAPTER pAdapter, - IN BOOLEAN bEnableMonitorMode - ) -{ -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - BOOLEAN bFilterOutNonAssociatedBSSID = FALSE; - - //2 Note: we may need to stop antenna diversity. - if(bEnableMonitorMode) - { - bFilterOutNonAssociatedBSSID = FALSE; - RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): enable monitor mode\n")); - - pHalData->bInMonitorMode = TRUE; - pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, TRUE, TRUE); - rtw_hal_set_hwreg(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); - } - else - { - bFilterOutNonAssociatedBSSID = TRUE; - RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): disable monitor mode\n")); - - pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, FALSE, TRUE); - pHalData->bInMonitorMode = FALSE; - rtw_hal_set_hwreg(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); - } -#endif -} - - -/*----------------------------------------------------------------------------- - * Function: PHYCheckIsLegalRfPath8190Pci() - * - * Overview: Check different RF type to execute legal judgement. If RF Path is illegal - * We will return false. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/15/2007 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -BOOLEAN -PHY_CheckIsLegalRfPath8192C( - IN PADAPTER pAdapter, - IN u32 eRFPath) -{ -// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - BOOLEAN rtValue = _TRUE; - - // NOt check RF Path now.! -#if 0 - if (pHalData->RF_Type == RF_1T2R && eRFPath != RF_PATH_A) - { - rtValue = FALSE; - } - if (pHalData->RF_Type == RF_1T2R && eRFPath != RF_PATH_A) - { - - } -#endif - return rtValue; - -} /* PHY_CheckIsLegalRfPath8192C */ - -static VOID _PHY_SetRFPathSwitch( - IN PADAPTER pAdapter, - IN BOOLEAN bMain, - IN BOOLEAN is2T - ) -{ - u8 u1bTmp; - - if(!pAdapter->hw_init_completed) - { - u1bTmp = rtw_read8(pAdapter, REG_LEDCFG2) | BIT7; - rtw_write8(pAdapter, REG_LEDCFG2, u1bTmp); - //PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); - } - - if(is2T) - { - if(bMain) - PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); //92C_Path_A - else - PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); //BT - } - else - { - - if(bMain) - PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x2); //Main - else - PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x1); //Aux - } - -} - -//return value TRUE => Main; FALSE => Aux - -static BOOLEAN _PHY_QueryRFPathSwitch( - IN PADAPTER pAdapter, - IN BOOLEAN is2T - ) -{ -// if(is2T) -// return _TRUE; - - if(!pAdapter->hw_init_completed) - { - PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); - PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); - } - - if(is2T) - { - if(PHY_QueryBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) - return _TRUE; - else - return _FALSE; - } - else - { - if(PHY_QueryBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300) == 0x02) - return _TRUE; - else - return _FALSE; - } -} - - -static VOID -_PHY_DumpRFReg(IN PADAPTER pAdapter) -{ - u32 rfRegValue,rfRegOffset; - - //RTPRINT(FINIT, INIT_RF, ("PHY_DumpRFReg()====>\n")); - - for(rfRegOffset = 0x00;rfRegOffset<=0x30;rfRegOffset++){ - rfRegValue = PHY_QueryRFReg(pAdapter,RF_PATH_A, rfRegOffset, bMaskDWord); - //RTPRINT(FINIT, INIT_RF, (" 0x%02x = 0x%08x\n",rfRegOffset,rfRegValue)); - } - //RTPRINT(FINIT, INIT_RF, ("<===== PHY_DumpRFReg()\n")); -} - - -// -// Move from phycfg.c to gen.c to be code independent later -// -//-------------------------Move to other DIR later----------------------------*/ -#ifdef CONFIG_USB_HCI - -// -// Description: -// To dump all Tx FIFO LLT related link-list table. -// Added by Roger, 2009.03.10. -// -VOID -DumpBBDbgPort_92CU( - IN PADAPTER Adapter - ) -{ - - //RT_TRACE(COMP_SEND, DBG_WARNING, ("\n>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>\n")); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("BaseBand Debug Ports:\n")); - - PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0000); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); - - PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0803); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); - - PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0a06); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); - - PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0007); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); - - PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100); - PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x000f0000); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); - - PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100); - PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x00150000); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); - - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x800, PHY_QueryBBReg(Adapter, 0x0800, bMaskDWord))); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x900, PHY_QueryBBReg(Adapter, 0x0900, bMaskDWord))); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa00, PHY_QueryBBReg(Adapter, 0x0a00, bMaskDWord))); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa54, PHY_QueryBBReg(Adapter, 0x0a54, bMaskDWord))); - //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa58, PHY_QueryBBReg(Adapter, 0x0a58, bMaskDWord))); - -} -#endif - diff --git a/hal/rtl8188e/rtl8188e_rf6052.c b/hal/rtl8188e/rtl8188e_rf6052.c deleted file mode 100755 index 33f6397..0000000 --- a/hal/rtl8188e/rtl8188e_rf6052.c +++ /dev/null @@ -1,1272 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -/****************************************************************************** - * - * - * Module: rtl8192c_rf6052.c ( Source C File) - * - * Note: Provide RF 6052 series relative API. - * - * Function: - * - * Export: - * - * Abbrev: - * - * History: - * Data Who Remark - * - * 09/25/2008 MHC Create initial version. - * 11/05/2008 MHC Add API for tw power setting. - * - * -******************************************************************************/ - -#define _RTL8188E_RF6052_C_ - -#include -#include -#include -#include - -#include - -/*---------------------------Define Local Constant---------------------------*/ -// Define local structure for debug!!!!! -typedef struct RF_Shadow_Compare_Map { - // Shadow register value - u32 Value; - // Compare or not flag - u8 Compare; - // Record If it had ever modified unpredicted - u8 ErrorOrNot; - // Recorver Flag - u8 Recorver; - // - u8 Driver_Write; -}RF_SHADOW_T; -/*---------------------------Define Local Constant---------------------------*/ - - -/*------------------------Define global variable-----------------------------*/ -/*------------------------Define global variable-----------------------------*/ - - -/*------------------------Define local variable------------------------------*/ -// 2008/11/20 MH For Debug only, RF -//static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG] = {0}; -static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG]; -/*------------------------Define local variable------------------------------*/ - - -/*----------------------------------------------------------------------------- - * Function: RF_ChangeTxPath - * - * Overview: For RL6052, we must change some RF settign for 1T or 2T. - * - * Input: u2Byte DataRate // 0x80-8f, 0x90-9f - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 09/25/2008 MHC Create Version 0. - * Firmwaer support the utility later. - * - *---------------------------------------------------------------------------*/ -void rtl8188e_RF_ChangeTxPath( IN PADAPTER Adapter, - IN u16 DataRate) -{ -// We do not support gain table change inACUT now !!!! Delete later !!! -#if 0//(RTL92SE_FPGA_VERIFY == 0) - static u1Byte RF_Path_Type = 2; // 1 = 1T 2= 2T - static u4Byte tx_gain_tbl1[6] - = {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100}; - static u4Byte tx_gain_tbl2[6] - = {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030}; - u1Byte i; - - if (RF_Path_Type == 2 && (DataRate&0xF) <= 0x7) - { - // Set TX SYNC power G2G3 loop filter - PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, - RF_TXPA_G2, bRFRegOffsetMask, 0x0f000); - PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, - RF_TXPA_G3, bRFRegOffsetMask, 0xeacf1); - - // Change TX AGC gain table - for (i = 0; i < 6; i++) - PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, - RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl1[i]); - - // Set PA to high value - PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, - RF_TXPA_G2, bRFRegOffsetMask, 0x01e39); - } - else if (RF_Path_Type == 1 && (DataRate&0xF) >= 0x8) - { - // Set TX SYNC power G2G3 loop filter - PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, - RF_TXPA_G2, bRFRegOffsetMask, 0x04440); - PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, - RF_TXPA_G3, bRFRegOffsetMask, 0xea4f1); - - // Change TX AGC gain table - for (i = 0; i < 6; i++) - PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, - RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl2[i]); - - // Set PA low gain - PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, - RF_TXPA_G2, bRFRegOffsetMask, 0x01e19); - } -#endif - -} /* RF_ChangeTxPath */ - - -/*----------------------------------------------------------------------------- - * Function: PHY_RF6052SetBandwidth() - * - * Overview: This function is called by SetBWModeCallback8190Pci() only - * - * Input: PADAPTER Adapter - * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M - * - * Output: NONE - * - * Return: NONE - * - * Note: For RF type 0222D - *---------------------------------------------------------------------------*/ -VOID -rtl8188e_PHY_RF6052SetBandwidth( - IN PADAPTER Adapter, - IN HT_CHANNEL_WIDTH Bandwidth) //20M or 40M -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - switch(Bandwidth) - { - case HT_CHANNEL_WIDTH_20: - pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10) | BIT(11)); - PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); - break; - - case HT_CHANNEL_WIDTH_40: - pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff)| BIT(10)); - PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); - break; - - default: - //RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth )); - break; - } - -} - - -/*----------------------------------------------------------------------------- - * Function: PHY_RF6052SetCckTxPower - * - * Overview: - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/05/2008 MHC Simulate 8192series.. - * - *---------------------------------------------------------------------------*/ - -VOID -rtl8188e_PHY_RF6052SetCckTxPower( - IN PADAPTER Adapter, - IN u8* pPowerlevel) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - //PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; - u32 TxAGC[2]={0, 0}, tmpval=0,pwrtrac_value; - BOOLEAN TurboScanOff = _FALSE; - u8 idx1, idx2; - u8* ptr; - u8 direction; - //FOR CE ,must disable turbo scan - TurboScanOff = _TRUE; - - - if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS) - { - TxAGC[RF_PATH_A] = 0x3f3f3f3f; - TxAGC[RF_PATH_B] = 0x3f3f3f3f; - - TurboScanOff = _TRUE;//disable turbo scan - - if(TurboScanOff) - { - for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++) - { - TxAGC[idx1] = - pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | - (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); -#ifdef CONFIG_USB_HCI - // 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. - if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA) - TxAGC[idx1] = 0x20; -#endif - } - } - } - else - { -// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. -// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. -// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. - if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) - { - TxAGC[RF_PATH_A] = 0x10101010; - TxAGC[RF_PATH_B] = 0x10101010; - } - else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) - { - TxAGC[RF_PATH_A] = 0x00000000; - TxAGC[RF_PATH_B] = 0x00000000; - } - else - { - for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++) - { - TxAGC[idx1] = - pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | - (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); - } - - if(pHalData->EEPROMRegulatory==0) - { - tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) + - (pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8); - TxAGC[RF_PATH_A] += tmpval; - - tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) + - (pHalData->MCSTxPowerLevelOriginalOffset[0][15]<<24); - TxAGC[RF_PATH_B] += tmpval; - } - } - } - - - ODM_TxPwrTrackAdjust88E(&pHalData->odmpriv, 1, &direction, &pwrtrac_value); - //printk("ODM_TxPwrTrackAdjust88E => direction:%02x, pwrtrac_value:%d \n", direction, pwrtrac_value); - //printk(" ==> TxAGC:0x%08x \n",TxAGC[0] ); - - if (direction == 1) // Increase TX pwoer - { - TxAGC[0] += pwrtrac_value; - TxAGC[1] += pwrtrac_value; - - } - else if (direction == 2) // Decrease TX pwoer - { - TxAGC[0] -= pwrtrac_value; - TxAGC[1] -= pwrtrac_value; - } - - for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++) - { - ptr = (u8*)(&(TxAGC[idx1])); - for(idx2=0; idx2<4; idx2++) - { - if(*ptr > RF6052_MAX_TX_PWR) - *ptr = RF6052_MAX_TX_PWR; - ptr++; - } - } - //printk(" ==> TxAGC:0x%08x \n",TxAGC[0] ); - - // rf-A cck tx power - tmpval = TxAGC[RF_PATH_A]&0xff; - PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval); - //printk("CCK PWR 1M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_A_CCK1_Mcs32); - - - tmpval = TxAGC[RF_PATH_A]>>8; - PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); - //printk("CCK PWR 2~11M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11); - -/* - // rf-B cck tx power - tmpval = TxAGC[RF_PATH_B]>>24; - PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval); - //printk("CCK PWR 11M (rf-B) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11); - tmpval = TxAGC[RF_PATH_B]&0x00ffffff; - PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); - //printk("CCK PWR 1~5.5M (rf-B) = 0x%x (reg 0x%x)\n",tmpval, rTxAGC_B_CCK1_55_Mcs32); -*/ -} /* PHY_RF6052SetCckTxPower */ - -#if 0 -// -// powerbase0 for OFDM rates -// powerbase1 for HT MCS rates -// -static void getPowerBase( - IN PADAPTER Adapter, - IN u8* pPowerLevel, - IN u8 Channel, - IN OUT u32* OfdmBase, - IN OUT u32* MCSBase - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u32 powerBase0, powerBase1; - u8 Legacy_pwrdiff=0, HT20_pwrdiff=0; - u8 i, powerlevel[2]; - - for(i=0; i<2; i++) - { - powerlevel[i] = pPowerLevel[i]; - Legacy_pwrdiff = pHalData->TxPwrLegacyHtDiff[i][Channel-1]; - powerBase0 = powerlevel[i] + Legacy_pwrdiff; - - powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0; - *(OfdmBase+i) = powerBase0; - //RTPRINT(FPHY, PHY_TXPWR, (" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i))); - } - - for(i=0; i<2; i++) - { - //Check HT20 to HT40 diff - if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) - { - HT20_pwrdiff = pHalData->TxPwrHt20Diff[i][Channel-1]; - powerlevel[i] += HT20_pwrdiff; - } - powerBase1 = powerlevel[i]; - powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1; - *(MCSBase+i) = powerBase1; - //RTPRINT(FPHY, PHY_TXPWR, (" [MCS power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(MCSBase+i))); - } -} -#endif -// -// powerbase0 for OFDM rates -// powerbase1 for HT MCS rates -// -void getPowerBase88E( - IN PADAPTER Adapter, - IN u8* pPowerLevelOFDM, - IN u8* pPowerLevelBW20, - IN u8* pPowerLevelBW40, - IN u8 Channel, - IN OUT u32* OfdmBase, - IN OUT u32* MCSBase - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u32 powerBase0, powerBase1; - u8 Legacy_pwrdiff=0; - s8 HT20_pwrdiff=0; - u8 i, powerlevel[2]; - - for(i=0; i<2; i++) - { - powerBase0 = pPowerLevelOFDM[i]; - - powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0; - *(OfdmBase+i) = powerBase0; - //DBG_871X(" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i)); - } - - for(i=0; iNumTotalRFPath; i++) - { - //Check HT20 to HT40 diff - if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) - { - powerlevel[i] = pPowerLevelBW20[i]; - } - else - { - powerlevel[i] = pPowerLevelBW40[i]; - } - powerBase1 = powerlevel[i]; - powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1; - *(MCSBase+i) = powerBase1; - //DBG_871X(" [MCS power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(MCSBase+i)); - } -} -#if 0 -static void getTxPowerWriteValByRegulatory( - IN PADAPTER Adapter, - IN u8 Channel, - IN u8 index, - IN u32* powerBase0, - IN u32* powerBase1, - OUT u32* pOutWriteVal - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - u8 i, chnlGroup, pwr_diff_limit[4]; - u32 writeVal, customer_limit, rf; - - // - // Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate - // - for(rf=0; rf<2; rf++) - { - switch(pHalData->EEPROMRegulatory) - { - case 0: // Realtek better performance - // increase power diff defined by Realtek for large power - chnlGroup = 0; - //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", - // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); - writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + - ((index<2)?powerBase0[rf]:powerBase1[rf]); - //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); - break; - case 1: // Realtek regulatory - // increase power diff defined by Realtek for regulatory - { - if(pHalData->pwrGroupCnt == 1) - chnlGroup = 0; - if(pHalData->pwrGroupCnt >= 3) - { - if(Channel <= 3) - chnlGroup = 0; - else if(Channel >= 4 && Channel <= 9) - chnlGroup = 1; - else if(Channel > 9) - chnlGroup = 2; - - if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) - chnlGroup++; - else - chnlGroup+=4; - } - //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", - //chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); - writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + - ((index<2)?powerBase0[rf]:powerBase1[rf]); - //RTPRINT(FPHY, PHY_TXPWR, ("Realtek regulatory, 20MHz, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); - } - break; - case 2: // Better regulatory - // don't increase any power diff - writeVal = ((index<2)?powerBase0[rf]:powerBase1[rf]); - //RTPRINT(FPHY, PHY_TXPWR, ("Better regulatory, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); - break; - case 3: // Customer defined power diff. - // increase power diff defined by customer. - chnlGroup = 0; - //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", - // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); - - if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) - { - //RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 40MHz rf(%c) = 0x%x\n", - // ((rf==0)?'A':'B'), pHalData->PwrGroupHT40[rf][Channel-1])); - } - else - { - //RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 20MHz rf(%c) = 0x%x\n", - // ((rf==0)?'A':'B'), pHalData->PwrGroupHT20[rf][Channel-1])); - } - for (i=0; i<4; i++) - { - pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8)); - if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) - { - if(pwr_diff_limit[i] > pHalData->PwrGroupHT40[rf][Channel-1]) - pwr_diff_limit[i] = pHalData->PwrGroupHT40[rf][Channel-1]; - } - else - { - if(pwr_diff_limit[i] > pHalData->PwrGroupHT20[rf][Channel-1]) - pwr_diff_limit[i] = pHalData->PwrGroupHT20[rf][Channel-1]; - } - } - customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) | - (pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]); - //RTPRINT(FPHY, PHY_TXPWR, ("Customer's limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_limit)); - - writeVal = customer_limit + ((index<2)?powerBase0[rf]:powerBase1[rf]); - //RTPRINT(FPHY, PHY_TXPWR, ("Customer, writeVal rf(%c)= 0x%x\n", ((rf==0)?'A':'B'), writeVal)); - break; - default: - chnlGroup = 0; - writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + - ((index<2)?powerBase0[rf]:powerBase1[rf]); - //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); - break; - } - -// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. -// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. -// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. - - if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) - writeVal = 0x14141414; - else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) - writeVal = 0x00000000; - - - // 20100628 Joseph: High power mode for BT-Coexist mechanism. - // This mechanism is only applied when Driver-Highpower-Mechanism is OFF. - if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1) - { - //RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n")); - writeVal = writeVal - 0x06060606; - } - else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2) - { - //RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n")); - writeVal = writeVal; - } - *(pOutWriteVal+rf) = writeVal; - } -} -#endif -void getTxPowerWriteValByRegulatory88E( - IN PADAPTER Adapter, - IN u8 Channel, - IN u8 index, - IN u32* powerBase0, - IN u32* powerBase1, - OUT u32* pOutWriteVal - ) -{ - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - u1Byte i, chnlGroup=0, pwr_diff_limit[4], customer_pwr_limit; - s1Byte pwr_diff=0; - u4Byte writeVal, customer_limit, rf; - u1Byte Regulatory = pHalData->EEPROMRegulatory; - - // - // Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate - // -#if 0 // (INTEL_PROXIMITY_SUPPORT == 1) - if(pMgntInfo->IntelProximityModeInfo.PowerOutput > 0) - Regulatory = 2; -#endif - - for(rf=0; rf<2; rf++) - { - switch(Regulatory) - { - case 0: // Realtek better performance - // increase power diff defined by Realtek for large power - chnlGroup = 0; - //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", - // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); - writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + - ((index<2)?powerBase0[rf]:powerBase1[rf]); - //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); - break; - case 1: // Realtek regulatory - // increase power diff defined by Realtek for regulatory - { - if(pHalData->pwrGroupCnt == 1) - chnlGroup = 0; - //if(pHalData->pwrGroupCnt >= pHalData->PGMaxGroup) - { - if (Channel < 3) // Chanel 1-2 - chnlGroup = 0; - else if (Channel < 6) // Channel 3-5 - chnlGroup = 1; - else if(Channel <9) // Channel 6-8 - chnlGroup = 2; - else if(Channel <12) // Channel 9-11 - chnlGroup = 3; - else if(Channel <14) // Channel 12-13 - chnlGroup = 4; - else if(Channel ==14) // Channel 14 - chnlGroup = 4; - - if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) - chnlGroup++; - else - chnlGroup+=6; - -/* - if(Channel <= 3) - chnlGroup = 0; - else if(Channel >= 4 && Channel <= 9) - chnlGroup = 1; - else if(Channel > 9) - chnlGroup = 2; - - - if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) - chnlGroup++; - else - chnlGroup+=4; -*/ - } - //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", - //chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); - writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + - ((index<2)?powerBase0[rf]:powerBase1[rf]); - //RTPRINT(FPHY, PHY_TXPWR, ("Realtek regulatory, 20MHz, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); - } - break; - case 2: // Better regulatory - // don't increase any power diff - writeVal = ((index<2)?powerBase0[rf]:powerBase1[rf]); - //RTPRINT(FPHY, PHY_TXPWR, ("Better regulatory, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); - break; - case 3: // Customer defined power diff. - // increase power diff defined by customer. - chnlGroup = 0; - //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", - // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); - - /* - if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40) - { - RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 40MHz rf(%c) = 0x%x\n", - ((rf==0)?'A':'B'), pHalData->PwrGroupHT40[rf][Channel-1])); - } - else - { - RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 20MHz rf(%c) = 0x%x\n", - ((rf==0)?'A':'B'), pHalData->PwrGroupHT20[rf][Channel-1])); - }*/ - - if(index < 2) - pwr_diff = pHalData->TxPwrLegacyHtDiff[rf][Channel-1]; - else if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) - pwr_diff = pHalData->TxPwrHt20Diff[rf][Channel-1]; - - //RTPRINT(FPHY, PHY_TXPWR, ("power diff rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), pwr_diff)); - - if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) - customer_pwr_limit = pHalData->PwrGroupHT40[rf][Channel-1]; - else - customer_pwr_limit = pHalData->PwrGroupHT20[rf][Channel-1]; - - //RTPRINT(FPHY, PHY_TXPWR, ("customer pwr limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_pwr_limit)); - - if(pwr_diff >= customer_pwr_limit) - pwr_diff = 0; - else - pwr_diff = customer_pwr_limit - pwr_diff; - - for (i=0; i<4; i++) - { - pwr_diff_limit[i] = (u1Byte)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8)); - - if(pwr_diff_limit[i] > pwr_diff) - pwr_diff_limit[i] = pwr_diff; - } - customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) | - (pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]); - //RTPRINT(FPHY, PHY_TXPWR, ("Customer's limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_limit)); - writeVal = customer_limit + ((index<2)?powerBase0[rf]:powerBase1[rf]); - //RTPRINT(FPHY, PHY_TXPWR, ("Customer, writeVal rf(%c)= 0x%x\n", ((rf==0)?'A':'B'), writeVal)); - break; - default: - chnlGroup = 0; - writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + - ((index<2)?powerBase0[rf]:powerBase1[rf]); - //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); - break; - } - -// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. -// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. -// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. - //92d do not need this - if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) - writeVal = 0x14141414; - else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) - writeVal = 0x00000000; - - // 20100628 Joseph: High power mode for BT-Coexist mechanism. - // This mechanism is only applied when Driver-Highpower-Mechanism is OFF. - if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1) - { - //RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n")); - writeVal = writeVal - 0x06060606; - } - else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2) - { - //RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n")); - writeVal = writeVal ; - } - /* - if(pMgntInfo->bDisableTXPowerByRate) - { - // add for OID_RT_11N_TX_POWER_BY_RATE ,disable tx powre change by rate - writeVal = 0x2c2c2c2c; - } - */ - *(pOutWriteVal+rf) = writeVal; - } -} - -static void writeOFDMPowerReg88E( - IN PADAPTER Adapter, - IN u8 index, - IN u32* pValue - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u16 RegOffset_A[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24, - rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04, - rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12}; - u16 RegOffset_B[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24, - rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04, - rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12}; - u8 i, rf, pwr_val[4]; - u32 writeVal; - u16 RegOffset; - - for(rf=0; rf<2; rf++) - { - writeVal = pValue[rf]; - for(i=0; i<4; i++) - { - pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8)); - if (pwr_val[i] > RF6052_MAX_TX_PWR) - pwr_val[i] = RF6052_MAX_TX_PWR; - } - writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) |(pwr_val[1]<<8) |pwr_val[0]; - - if(rf == 0) - RegOffset = RegOffset_A[index]; - else - RegOffset = RegOffset_B[index]; - - PHY_SetBBReg(Adapter, RegOffset, bMaskDWord, writeVal); - //printk("Set OFDM tx pwr- 0x%x = %08x\n", RegOffset, writeVal); - - // 201005115 Joseph: Set Tx Power diff for Tx power training mechanism. - if(((pHalData->rf_type == RF_2T2R) && - (RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs15_Mcs12))|| - ((pHalData->rf_type != RF_2T2R) && - (RegOffset == rTxAGC_A_Mcs07_Mcs04 || RegOffset == rTxAGC_B_Mcs07_Mcs04)) ) - { - writeVal = pwr_val[3]; - if(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_A_Mcs07_Mcs04) - RegOffset = 0xc90; - if(RegOffset == rTxAGC_B_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs07_Mcs04) - RegOffset = 0xc98; - for(i=0; i<3; i++) - { - if(i!=2) - writeVal = (writeVal>8)?(writeVal-8):0; - else - writeVal = (writeVal>6)?(writeVal-6):0; - rtw_write8(Adapter, (u32)(RegOffset+i), (u8)writeVal); - } - } - } -} - - -/*----------------------------------------------------------------------------- - * Function: PHY_RF6052SetOFDMTxPower - * - * Overview: For legacy and HY OFDM, we must read EEPROM TX power index for - * different channel and read original value in TX power register area from - * 0xe00. We increase offset and original value to be correct tx pwr. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/05/2008 MHC Simulate 8192 series method. - * 01/06/2009 MHC 1. Prevent Path B tx power overflow or underflow dure to - * A/B pwr difference or legacy/HT pwr diff. - * 2. We concern with path B legacy/HT OFDM difference. - * 01/22/2009 MHC Support new EPRO format from SD3. - * - *---------------------------------------------------------------------------*/ - -VOID -rtl8188e_PHY_RF6052SetOFDMTxPower( - IN PADAPTER Adapter, - IN u8* pPowerLevelOFDM, - IN u8* pPowerLevelBW20, - IN u8* pPowerLevelBW40, - IN u8 Channel) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u32 writeVal[2], powerBase0[2], powerBase1[2], pwrtrac_value; - u8 direction; - u8 index = 0; - - - //DBG_871X("PHY_RF6052SetOFDMTxPower, channel(%d) \n", Channel); - - getPowerBase88E(Adapter, pPowerLevelOFDM,pPowerLevelBW20,pPowerLevelBW40, Channel, &powerBase0[0], &powerBase1[0]); - - // - // 2012/04/23 MH According to power tracking value, we need to revise OFDM tx power. - // This is ued to fix unstable power tracking mode. - // - ODM_TxPwrTrackAdjust88E(&pHalData->odmpriv, 0, &direction, &pwrtrac_value); - - for(index=0; index<6; index++) - { - getTxPowerWriteValByRegulatory88E(Adapter, Channel, index, - &powerBase0[0], &powerBase1[0], &writeVal[0]); - - if (direction == 1) - { - writeVal[0] += pwrtrac_value; - writeVal[1] += pwrtrac_value; - } - else if (direction == 2) - { - writeVal[0] -= pwrtrac_value; - writeVal[1] -= pwrtrac_value; - } - - writeOFDMPowerReg88E(Adapter, index, &writeVal[0]); - } -} - - -static VOID -phy_RF6052_Config_HardCode( - IN PADAPTER Adapter - ) -{ - - // Set Default Bandwidth to 20M - //Adapter->HalFunc .SetBWModeHandler(Adapter, HT_CHANNEL_WIDTH_20); - - // TODO: Set Default Channel to channel one for RTL8225 - -} - -static int -phy_RF6052_Config_ParaFile( - IN PADAPTER Adapter - ) -{ - u32 u4RegValue; - u8 eRFPath; - BB_REGISTER_DEFINITION_T *pPhyReg; - - int rtStatus = _SUCCESS; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - static char sz88eRadioAFile[] = RTL8188E_PHY_RADIO_A; - static char sz88eRadioBFile[] = RTL8188E_PHY_RADIO_B; - char *pszRadioAFile, *pszRadioBFile; - - - - pszRadioAFile = sz88eRadioAFile; - pszRadioBFile = sz88eRadioBFile; - - - //3//----------------------------------------------------------------- - //3// <2> Initialize RF - //3//----------------------------------------------------------------- - //for(eRFPath = RF_PATH_A; eRFPath NumTotalRFPath; eRFPath++) - for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) - { - - pPhyReg = &pHalData->PHYRegDef[eRFPath]; - - /*----Store original RFENV control type----*/ - switch(eRFPath) - { - case RF_PATH_A: - case RF_PATH_C: - u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); - break; - case RF_PATH_B : - case RF_PATH_D: - u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16); - break; - } - - /*----Set RF_ENV enable----*/ - PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); - rtw_udelay_os(1);//PlatformStallExecution(1); - - /*----Set RF_ENV output high----*/ - PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); - rtw_udelay_os(1);//PlatformStallExecution(1); - - /* Set bit number of Address and Data for RF register */ - PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255 - rtw_udelay_os(1);//PlatformStallExecution(1); - - PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255 - rtw_udelay_os(1);//PlatformStallExecution(1); - - /*----Initialize RF fom connfiguration file----*/ - switch(eRFPath) - { - case RF_PATH_A: -#ifdef CONFIG_EMBEDDED_FWIMG - #ifdef CONFIG_PHY_SETTING_WITH_ODM - if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath)) - rtStatus= _FAIL; - #else - rtStatus= rtl8188e_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath); - #endif//#ifdef CONFIG_PHY_SETTING_WITH_ODM -#else - rtStatus = rtl8188e_PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF_RADIO_PATH_E)eRFPath); -#endif//#ifdef CONFIG_EMBEDDED_FWIMG - break; - case RF_PATH_B: -#ifdef CONFIG_EMBEDDED_FWIMG - #ifdef CONFIG_PHY_SETTING_WITH_ODM - if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath)) - rtStatus= _FAIL; - #else - rtStatus = rtl8188e_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath); - #endif //#ifdef CONFIG_PHY_SETTING_WITH_ODM -#else - rtStatus =rtl8188e_PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF_RADIO_PATH_E)eRFPath); -#endif - break; - case RF_PATH_C: - break; - case RF_PATH_D: - break; - } - - /*----Restore RFENV control type----*/; - switch(eRFPath) - { - case RF_PATH_A: - case RF_PATH_C: - PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); - break; - case RF_PATH_B : - case RF_PATH_D: - PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); - break; - } - - if(rtStatus != _SUCCESS){ - //RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath)); - goto phy_RF6052_Config_ParaFile_Fail; - } - - } - - //RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n")); - return rtStatus; - -phy_RF6052_Config_ParaFile_Fail: - return rtStatus; -} - - -int -PHY_RF6052_Config8188E( - IN PADAPTER Adapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - int rtStatus = _SUCCESS; - - // - // Initialize general global value - // - // TODO: Extend RF_PATH_C and RF_PATH_D in the future - if(pHalData->rf_type == RF_1T1R) - pHalData->NumTotalRFPath = 1; - else - pHalData->NumTotalRFPath = 2; - - // - // Config BB and RF - // - rtStatus = phy_RF6052_Config_ParaFile(Adapter); -#if 0 - switch( Adapter->MgntInfo.bRegHwParaFile ) - { - case 0: - phy_RF6052_Config_HardCode(Adapter); - break; - - case 1: - rtStatus = phy_RF6052_Config_ParaFile(Adapter); - break; - - case 2: - // Partial Modify. - phy_RF6052_Config_HardCode(Adapter); - phy_RF6052_Config_ParaFile(Adapter); - break; - - default: - phy_RF6052_Config_HardCode(Adapter); - break; - } -#endif - return rtStatus; - -} - - -// -// ==> RF shadow Operation API Code Section!!! -// -/*----------------------------------------------------------------------------- - * Function: PHY_RFShadowRead - * PHY_RFShadowWrite - * PHY_RFShadowCompare - * PHY_RFShadowRecorver - * PHY_RFShadowCompareAll - * PHY_RFShadowRecorverAll - * PHY_RFShadowCompareFlagSet - * PHY_RFShadowRecorverFlagSet - * - * Overview: When we set RF register, we must write shadow at first. - * When we are running, we must compare shadow abd locate error addr. - * Decide to recorver or not. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/20/2008 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -u32 -PHY_RFShadowRead( - IN PADAPTER Adapter, - IN RF_RADIO_PATH_E eRFPath, - IN u32 Offset) -{ - return RF_Shadow[eRFPath][Offset].Value; - -} /* PHY_RFShadowRead */ - - -VOID -PHY_RFShadowWrite( - IN PADAPTER Adapter, - IN RF_RADIO_PATH_E eRFPath, - IN u32 Offset, - IN u32 Data) -{ - RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask); - RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE; - -} /* PHY_RFShadowWrite */ - - -BOOLEAN -PHY_RFShadowCompare( - IN PADAPTER Adapter, - IN RF_RADIO_PATH_E eRFPath, - IN u32 Offset) -{ - u32 reg; - // Check if we need to check the register - if (RF_Shadow[eRFPath][Offset].Compare == _TRUE) - { - reg = PHY_QueryRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask); - // Compare shadow and real rf register for 20bits!! - if (RF_Shadow[eRFPath][Offset].Value != reg) - { - // Locate error position. - RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE; - //RT_TRACE(COMP_INIT, DBG_LOUD, - //("PHY_RFShadowCompare RF-%d Addr%02lx Err = %05lx\n", - //eRFPath, Offset, reg)); - } - return RF_Shadow[eRFPath][Offset].ErrorOrNot ; - } - return _FALSE; -} /* PHY_RFShadowCompare */ - - -VOID -PHY_RFShadowRecorver( - IN PADAPTER Adapter, - IN RF_RADIO_PATH_E eRFPath, - IN u32 Offset) -{ - // Check if the address is error - if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE) - { - // Check if we need to recorver the register. - if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE) - { - PHY_SetRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask, - RF_Shadow[eRFPath][Offset].Value); - //RT_TRACE(COMP_INIT, DBG_LOUD, - //("PHY_RFShadowRecorver RF-%d Addr%02lx=%05lx", - //eRFPath, Offset, RF_Shadow[eRFPath][Offset].Value)); - } - } - -} /* PHY_RFShadowRecorver */ - - -VOID -PHY_RFShadowCompareAll( - IN PADAPTER Adapter) -{ - u32 eRFPath; - u32 Offset; - - for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) - { - for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) - { - PHY_RFShadowCompare(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset); - } - } - -} /* PHY_RFShadowCompareAll */ - - -VOID -PHY_RFShadowRecorverAll( - IN PADAPTER Adapter) -{ - u32 eRFPath; - u32 Offset; - - for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) - { - for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) - { - PHY_RFShadowRecorver(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset); - } - } - -} /* PHY_RFShadowRecorverAll */ - - -VOID -PHY_RFShadowCompareFlagSet( - IN PADAPTER Adapter, - IN RF_RADIO_PATH_E eRFPath, - IN u32 Offset, - IN u8 Type) -{ - // Set True or False!!! - RF_Shadow[eRFPath][Offset].Compare = Type; - -} /* PHY_RFShadowCompareFlagSet */ - - -VOID -PHY_RFShadowRecorverFlagSet( - IN PADAPTER Adapter, - IN RF_RADIO_PATH_E eRFPath, - IN u32 Offset, - IN u8 Type) -{ - // Set True or False!!! - RF_Shadow[eRFPath][Offset].Recorver= Type; - -} /* PHY_RFShadowRecorverFlagSet */ - - -VOID -PHY_RFShadowCompareFlagSetAll( - IN PADAPTER Adapter) -{ - u32 eRFPath; - u32 Offset; - - for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) - { - for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) - { - // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! - if (Offset != 0x26 && Offset != 0x27) - PHY_RFShadowCompareFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _FALSE); - else - PHY_RFShadowCompareFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _TRUE); - } - } - -} /* PHY_RFShadowCompareFlagSetAll */ - - -VOID -PHY_RFShadowRecorverFlagSetAll( - IN PADAPTER Adapter) -{ - u32 eRFPath; - u32 Offset; - - for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) - { - for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) - { - // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! - if (Offset != 0x26 && Offset != 0x27) - PHY_RFShadowRecorverFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _FALSE); - else - PHY_RFShadowRecorverFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _TRUE); - } - } - -} /* PHY_RFShadowCompareFlagSetAll */ - -VOID -PHY_RFShadowRefresh( - IN PADAPTER Adapter) -{ - u32 eRFPath; - u32 Offset; - - for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) - { - for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) - { - RF_Shadow[eRFPath][Offset].Value = 0; - RF_Shadow[eRFPath][Offset].Compare = _FALSE; - RF_Shadow[eRFPath][Offset].Recorver = _FALSE; - RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE; - RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE; - } - } - -} /* PHY_RFShadowRead */ - -/* End of HalRf6052.c */ - diff --git a/hal/rtl8188e/rtl8188e_rxdesc.c b/hal/rtl8188e/rtl8188e_rxdesc.c deleted file mode 100755 index 7489a66..0000000 --- a/hal/rtl8188e/rtl8188e_rxdesc.c +++ /dev/null @@ -1,350 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _RTL8188E_REDESC_C_ - -#include -#include -#include -#include - -static s32 translate2dbm(u8 signal_strength_idx) -{ - s32 signal_power; // in dBm. - - - // Translate to dBm (x=0.5y-95). - signal_power = (s32)((signal_strength_idx + 1) >> 1); - signal_power -= 95; - - return signal_power; -} - - -static void process_rssi(_adapter *padapter,union recv_frame *prframe) -{ - u32 last_rssi, tmp_val; - struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; -#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS - struct signal_stat * signal_stat = &padapter->recvpriv.signal_strength_data; -#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS - - //DBG_8192C("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->RecvSignalPower,pattrib->signal_strength); - //if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon) - { - - #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS - if(signal_stat->update_req) { - signal_stat->total_num = 0; - signal_stat->total_val = 0; - signal_stat->update_req = 0; - } - - signal_stat->total_num++; - signal_stat->total_val += pattrib->phy_info.SignalStrength; - signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; - #else //CONFIG_NEW_SIGNAL_STAT_PROCESS - - //Adapter->RxStats.RssiCalculateCnt++; //For antenna Test - if(padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX) - { - padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX; - last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index]; - padapter->recvpriv.signal_strength_data.total_val -= last_rssi; - } - padapter->recvpriv.signal_strength_data.total_val +=pattrib->phy_info.SignalStrength; - - padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->phy_info.SignalStrength; - if(padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX) - padapter->recvpriv.signal_strength_data.index = 0; - - - tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num; - - if(padapter->recvpriv.is_signal_dbg) { - padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg; - padapter->recvpriv.rssi=(s8)translate2dbm((u8)padapter->recvpriv.signal_strength_dbg); - } else { - padapter->recvpriv.signal_strength= tmp_val; - padapter->recvpriv.rssi=(s8)translate2dbm((u8)tmp_val); - } - - RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("UI RSSI = %d, ui_rssi.TotalVal = %d, ui_rssi.TotalNum = %d\n", tmp_val, padapter->recvpriv.signal_strength_data.total_val,padapter->recvpriv.signal_strength_data.total_num)); - #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS - } - -}// Process_UI_RSSI_8192C - - - -static void process_link_qual(_adapter *padapter,union recv_frame *prframe) -{ - u32 last_evm=0, tmpVal; - struct rx_pkt_attrib *pattrib; -#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS - struct signal_stat * signal_stat; -#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS - - if(prframe == NULL || padapter==NULL){ - return; - } - - pattrib = &prframe->u.hdr.attrib; -#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS - signal_stat = &padapter->recvpriv.signal_qual_data; -#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS - - //DBG_8192C("process_link_qual=> pattrib->signal_qual(%d)\n ",pattrib->signal_qual); - -#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS - if(signal_stat->update_req) { - signal_stat->total_num = 0; - signal_stat->total_val = 0; - signal_stat->update_req = 0; - } - - signal_stat->total_num++; - signal_stat->total_val += pattrib->phy_info.SignalQuality; - signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; - -#else //CONFIG_NEW_SIGNAL_STAT_PROCESS - if(pattrib->phy_info.SignalQuality != 0) - { - // - // 1. Record the general EVM to the sliding window. - // - if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX) - { - padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX; - last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index]; - padapter->recvpriv.signal_qual_data.total_val -= last_evm; - } - padapter->recvpriv.signal_qual_data.total_val += pattrib->phy_info.SignalQuality; - - padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->phy_info.SignalQuality; - if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX) - padapter->recvpriv.signal_qual_data.index = 0; - - RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, pattrib->phy_info.SignalQuality)); - - // <1> Showed on UI for user, in percentage. - tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num; - padapter->recvpriv.signal_qual=(u8)tmpVal; - - } - else - { - RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" pattrib->signal_qual =%d\n", pattrib->phy_info.SignalQuality)); - } -#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS - -} - -//void rtl8188e_process_phy_info(_adapter *padapter, union recv_frame *prframe) -void rtl8188e_process_phy_info(_adapter *padapter, void *prframe) -{ - union recv_frame *precvframe = (union recv_frame *)prframe; - - // - // Check RSSI - // - process_rssi(padapter, precvframe); - // - // Check PWDB. - // - //process_PWDB(padapter, precvframe); - - //UpdateRxSignalStatistics8192C(Adapter, pRfd); - // - // Check EVM - // - process_link_qual(padapter, precvframe); - -} - - -void update_recvframe_attrib_88e( - union recv_frame *precvframe, - struct recv_stat *prxstat) -{ - struct rx_pkt_attrib *pattrib; - struct recv_stat report; - PRXREPORT prxreport; - //struct recv_frame_hdr *phdr; - - //phdr = &precvframe->u.hdr; - - report.rxdw0 = le32_to_cpu(prxstat->rxdw0); - report.rxdw1 = le32_to_cpu(prxstat->rxdw1); - report.rxdw2 = le32_to_cpu(prxstat->rxdw2); - report.rxdw3 = le32_to_cpu(prxstat->rxdw3); - report.rxdw4 = le32_to_cpu(prxstat->rxdw4); - report.rxdw5 = le32_to_cpu(prxstat->rxdw5); - - prxreport = (PRXREPORT)&report; - - pattrib = &precvframe->u.hdr.attrib; - _rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib)); - - pattrib->crc_err = (u8)((report.rxdw0 >> 14) & 0x1);;//(u8)prxreport->crc32; - - // update rx report to recv_frame attribute - pattrib->pkt_rpt_type = (u8)((report.rxdw3 >> 14) & 0x3);//prxreport->rpt_sel; - - if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet - { - pattrib->pkt_len = (u16)(report.rxdw0 &0x00003fff);//(u16)prxreport->pktlen; - pattrib->drvinfo_sz = (u8)((report.rxdw0 >> 16) & 0xf) * 8;//(u8)(prxreport->drvinfosize << 3); - - pattrib->physt = (u8)((report.rxdw0 >> 26) & 0x1);//(u8)prxreport->physt; - - pattrib->bdecrypted = (report.rxdw0 & BIT(27))? 0:1;//(u8)(prxreport->swdec ? 0 : 1); - pattrib->encrypt = (u8)((report.rxdw0 >> 20) & 0x7);//(u8)prxreport->security; - - pattrib->qos = (u8)((report.rxdw0 >> 23) & 0x1);//(u8)prxreport->qos; - pattrib->priority = (u8)((report.rxdw1 >> 8) & 0xf);//(u8)prxreport->tid; - - pattrib->amsdu = (u8)((report.rxdw1 >> 13) & 0x1);//(u8)prxreport->amsdu; - - pattrib->seq_num = (u16)(report.rxdw2 & 0x00000fff);//(u16)prxreport->seq; - pattrib->frag_num = (u8)((report.rxdw2 >> 12) & 0xf);//(u8)prxreport->frag; - pattrib->mfrag = (u8)((report.rxdw1 >> 27) & 0x1);//(u8)prxreport->mf; - pattrib->mdata = (u8)((report.rxdw1 >> 26) & 0x1);//(u8)prxreport->md; - - pattrib->mcs_rate = (u8)(report.rxdw3 & 0x3f);//(u8)prxreport->rxmcs; - pattrib->rxht = (u8)((report.rxdw3 >> 6) & 0x1);//(u8)prxreport->rxht; - - pattrib->icv_err = (u8)((report.rxdw0 >> 15) & 0x1);//(u8)prxreport->icverr; - pattrib->shift_sz = (u8)((report.rxdw0 >> 24) & 0x3); - - } - else if(pattrib->pkt_rpt_type == TX_REPORT1)//CCX - { - pattrib->pkt_len = TX_RPT1_PKT_LEN; - pattrib->drvinfo_sz = 0; - } - else if(pattrib->pkt_rpt_type == TX_REPORT2)// TX RPT - { - pattrib->pkt_len =(u16)(report.rxdw0 & 0x3FF);//Rx length[9:0] - pattrib->drvinfo_sz = 0; - - // - // Get TX report MAC ID valid. - // - pattrib->MacIDValidEntry[0] = report.rxdw4; - pattrib->MacIDValidEntry[1] = report.rxdw5; - - } - else if(pattrib->pkt_rpt_type == HIS_REPORT)// USB HISR RPT - { - pattrib->pkt_len = (u16)(report.rxdw0 &0x00003fff);//(u16)prxreport->pktlen; - } - -} - -/* - * Notice: - * Before calling this function, - * precvframe->u.hdr.rx_data should be ready! - */ -void update_recvframe_phyinfo_88e( - union recv_frame *precvframe, - struct phy_stat *pphy_status) -{ - PADAPTER padapter = precvframe->u.hdr.adapter; - struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - PODM_PHY_INFO_T pPHYInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info); - u8 *wlanhdr; - ODM_PACKET_INFO_T pkt_info; - u8 *sa; - struct sta_priv *pstapriv; - struct sta_info *psta; - //_irqL irqL; - - pkt_info.bPacketMatchBSSID =_FALSE; - pkt_info.bPacketToSelf = _FALSE; - pkt_info.bPacketBeacon = _FALSE; - - wlanhdr = get_recvframe_data(precvframe); - - pkt_info.bPacketMatchBSSID = ((!IsFrameTypeCtrl(wlanhdr)) && - !pattrib->icv_err && !pattrib->crc_err && - _rtw_memcmp(get_hdr_bssid(wlanhdr), get_bssid(&padapter->mlmepriv), ETH_ALEN)); - - pkt_info.bPacketToSelf = pkt_info.bPacketMatchBSSID && (_rtw_memcmp(get_da(wlanhdr), myid(&padapter->eeprompriv), ETH_ALEN)); - - pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID && (GetFrameSubType(wlanhdr) == WIFI_BEACON); - - if(pkt_info.bPacketBeacon){ - if(check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){ - sa = padapter->mlmepriv.cur_network.network.MacAddress; - #if 0 - { - DBG_8192C("==> rx beacon from AP[%02x:%02x:%02x:%02x:%02x:%02x]\n", - sa[0],sa[1],sa[2],sa[3],sa[4],sa[5]); - } - #endif - } - else - sa = get_sa(wlanhdr); - } - else{ - sa = get_sa(wlanhdr); - } - - pstapriv = &padapter->stapriv; - pkt_info.StationID = 0xFF; - psta = rtw_get_stainfo(pstapriv, sa); - if (psta) - { - pkt_info.StationID = psta->mac_id; - //DBG_8192C("%s ==> StationID(%d)\n",__FUNCTION__,pkt_info.StationID); - } - pkt_info.Rate = pattrib->mcs_rate; - //rtl8188e_query_rx_phy_status(precvframe, pphy_status); - - //_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); - ODM_PhyStatusQuery(&pHalData->odmpriv,pPHYInfo,(u8 *)pphy_status,&(pkt_info)); - //_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); - - precvframe->u.hdr.psta = NULL; - if (pkt_info.bPacketMatchBSSID && - (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)) - { - if (psta) - { - precvframe->u.hdr.psta = psta; - rtl8188e_process_phy_info(padapter, precvframe); - - } - } - else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon) - { - if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) - { - if (psta) - { - precvframe->u.hdr.psta = psta; - } - } - rtl8188e_process_phy_info(padapter, precvframe); - } -} - diff --git a/hal/rtl8188e/rtl8188e_sreset.c b/hal/rtl8188e/rtl8188e_sreset.c deleted file mode 100755 index 7c588cb..0000000 --- a/hal/rtl8188e/rtl8188e_sreset.c +++ /dev/null @@ -1,125 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _RTL8188E_SRESET_C_ - -#include -#include - -#ifdef DBG_CONFIG_ERROR_DETECT - -void rtl8188e_sreset_xmit_status_check(_adapter *padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct sreset_priv *psrtpriv = &pHalData->srestpriv; - - unsigned long current_time; - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - unsigned int diff_time; - u32 txdma_status; - - if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){ - DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status); - rtw_hal_sreset_reset(padapter); - } -#ifdef CONFIG_USB_HCI - //total xmit irp = 4 - //DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); - //if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) - current_time = rtw_get_current_time(); - - if(0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) { - - diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time); - - if (diff_time > 2000) { - if (psrtpriv->last_tx_complete_time == 0) { - psrtpriv->last_tx_complete_time = current_time; - } - else{ - diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time); - if (diff_time > 4000) { - u32 ability; - - //padapter->Wifi_Error_Status = WIFI_TX_HANG; - rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DM_FUNC, &ability); - - DBG_871X("%s tx hang %s\n", __FUNCTION__, - (ability & ODM_BB_ADAPTIVITY)? "ODM_BB_ADAPTIVITY" : ""); - - if (!(ability & ODM_BB_ADAPTIVITY)) - rtw_hal_sreset_reset(padapter); - } - } - } - } -#endif //CONFIG_USB_HCI - - if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) { - psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; - rtw_hal_sreset_reset(padapter); - return; - } -} - -void rtl8188e_sreset_linked_status_check(_adapter *padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct sreset_priv *psrtpriv = &pHalData->srestpriv; - - u32 rx_dma_status = 0; - u8 fw_status=0; - rx_dma_status = rtw_read32(padapter,REG_RXDMA_STATUS); - if(rx_dma_status!= 0x00){ - DBG_8192C("%s REG_RXDMA_STATUS:0x%08x \n",__FUNCTION__,rx_dma_status); - rtw_write32(padapter,REG_RXDMA_STATUS,rx_dma_status); - } - fw_status = rtw_read8(padapter,REG_FMETHR); - if(fw_status != 0x00) - { - if(fw_status == 1) - DBG_8192C("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !! \n",__FUNCTION__,fw_status); - else if(fw_status == 2) - DBG_8192C("%s REG_FW_STATUS (0x%02x), Condition_No_Match !! \n",__FUNCTION__,fw_status); - } -#if 0 - u32 regc50,regc58,reg824,reg800; - regc50 = rtw_read32(padapter,0xc50); - regc58 = rtw_read32(padapter,0xc58); - reg824 = rtw_read32(padapter,0x824); - reg800 = rtw_read32(padapter,0x800); - if( ((regc50&0xFFFFFF00)!= 0x69543400)|| - ((regc58&0xFFFFFF00)!= 0x69543400)|| - (((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))|| - ( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000))) - { - DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__, - regc50, regc58, reg824, reg800); - rtw_hal_sreset_reset(padapter); - } -#endif - - if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) { - psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; - rtw_hal_sreset_reset(padapter); - return; - } -} -#endif - diff --git a/hal/rtl8188e/rtl8188e_xmit.c b/hal/rtl8188e/rtl8188e_xmit.c deleted file mode 100755 index d472236..0000000 --- a/hal/rtl8188e/rtl8188e_xmit.c +++ /dev/null @@ -1,292 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _RTL8188E_XMIT_C_ - -#include -#include -#include -#include - -#ifdef CONFIG_XMIT_ACK -void dump_txrpt_ccx_88e(void *buf) -{ - struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf; - - DBG_871X("%s:\n" - "tag1:%u, pkt_num:%u, txdma_underflow:%u, int_bt:%u, int_tri:%u, int_ccx:%u\n" - "mac_id:%u, pkt_ok:%u, bmc:%u\n" - "retry_cnt:%u, lifetime_over:%u, retry_over:%u\n" - "ccx_qtime:%u\n" - "final_data_rate:0x%02x\n" - "qsel:%u, sw:0x%03x\n" - , __func__ - , txrpt_ccx->tag1, txrpt_ccx->pkt_num, txrpt_ccx->txdma_underflow, txrpt_ccx->int_bt, txrpt_ccx->int_tri, txrpt_ccx->int_ccx - , txrpt_ccx->mac_id, txrpt_ccx->pkt_ok, txrpt_ccx->bmc - , txrpt_ccx->retry_cnt, txrpt_ccx->lifetime_over, txrpt_ccx->retry_over - , txrpt_ccx_qtime_88e(txrpt_ccx) - , txrpt_ccx->final_data_rate - , txrpt_ccx->qsel, txrpt_ccx_sw_88e(txrpt_ccx) - ); -} - -void handle_txrpt_ccx_88e(_adapter *adapter, u8 *buf) -{ - struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf; - - #ifdef DBG_CCX - dump_txrpt_ccx_88e(buf); - #endif - - if (txrpt_ccx->int_ccx) { - if (txrpt_ccx->pkt_ok) - rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_SUCCESS); - else - rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_CCX_PKT_FAIL); - } -} -#endif //CONFIG_XMIT_ACK - -void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc) -{ - u8 bDumpTxPkt; - u8 bDumpTxDesc = _FALSE; - rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DUMP_TXPKT, &(bDumpTxPkt)); - - if(bDumpTxPkt ==1){//dump txdesc for data frame - DBG_871X("dump tx_desc for data frame\n"); - if((frame_tag&0x0f) == DATA_FRAMETAG){ - bDumpTxDesc = _TRUE; - } - } - else if(bDumpTxPkt ==2){//dump txdesc for mgnt frame - DBG_871X("dump tx_desc for mgnt frame\n"); - if((frame_tag&0x0f) == MGNT_FRAMETAG){ - bDumpTxDesc = _TRUE; - } - } - else if(bDumpTxPkt ==3){//dump early info - } - - if(bDumpTxDesc){ - // ptxdesc->txdw4 = cpu_to_le32(0x00001006);//RTS Rate=24M - // ptxdesc->txdw6 = 0x6666f800; - DBG_8192C("=====================================\n"); - DBG_8192C("txdw0(0x%08x)\n",ptxdesc->txdw0); - DBG_8192C("txdw1(0x%08x)\n",ptxdesc->txdw1); - DBG_8192C("txdw2(0x%08x)\n",ptxdesc->txdw2); - DBG_8192C("txdw3(0x%08x)\n",ptxdesc->txdw3); - DBG_8192C("txdw4(0x%08x)\n",ptxdesc->txdw4); - DBG_8192C("txdw5(0x%08x)\n",ptxdesc->txdw5); - DBG_8192C("txdw6(0x%08x)\n",ptxdesc->txdw6); - DBG_8192C("txdw7(0x%08x)\n",ptxdesc->txdw7); - DBG_8192C("=====================================\n"); - } - -} - -/* - * Description: - * Aggregation packets and send to hardware - * - * Return: - * 0 Success - * -1 Hardware resource(TX FIFO) not ready - * -2 Software resource(xmitbuf) not ready - */ -#ifdef CONFIG_TX_EARLY_MODE - -//#define DBG_EMINFO - -#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 - #define EARLY_MODE_MAX_PKT_NUM 10 -#else - #define EARLY_MODE_MAX_PKT_NUM 5 -#endif - - -struct EMInfo{ - u8 EMPktNum; - u16 EMPktLen[EARLY_MODE_MAX_PKT_NUM]; -}; - - -void -InsertEMContent_8188E( - struct EMInfo *pEMInfo, - IN pu1Byte VirtualAddress) -{ - -#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 - u1Byte index=0; - u4Byte dwtmp=0; -#endif - - _rtw_memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE); - if(pEMInfo->EMPktNum==0) - return; - - #ifdef DBG_EMINFO - { - int i; - DBG_8192C("\n%s ==> pEMInfo->EMPktNum =%d\n",__FUNCTION__,pEMInfo->EMPktNum); - for(i=0;i< EARLY_MODE_MAX_PKT_NUM;i++){ - DBG_8192C("%s ==> pEMInfo->EMPktLen[%d] =%d\n",__FUNCTION__,i,pEMInfo->EMPktLen[i]); - } - - } - #endif - -#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 - SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); - - if(pEMInfo->EMPktNum == 1){ - dwtmp = pEMInfo->EMPktLen[0]; - }else{ - dwtmp = pEMInfo->EMPktLen[0]; - dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; - dwtmp += pEMInfo->EMPktLen[1]; - } - SET_EARLYMODE_LEN0(VirtualAddress, dwtmp); - if(pEMInfo->EMPktNum <= 3){ - dwtmp = pEMInfo->EMPktLen[2]; - }else{ - dwtmp = pEMInfo->EMPktLen[2]; - dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; - dwtmp += pEMInfo->EMPktLen[3]; - } - SET_EARLYMODE_LEN1(VirtualAddress, dwtmp); - if(pEMInfo->EMPktNum <= 5){ - dwtmp = pEMInfo->EMPktLen[4]; - }else{ - dwtmp = pEMInfo->EMPktLen[4]; - dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; - dwtmp += pEMInfo->EMPktLen[5]; - } - SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp&0xF); - SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp>>4); - if(pEMInfo->EMPktNum <= 7){ - dwtmp = pEMInfo->EMPktLen[6]; - }else{ - dwtmp = pEMInfo->EMPktLen[6]; - dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; - dwtmp += pEMInfo->EMPktLen[7]; - } - SET_EARLYMODE_LEN3(VirtualAddress, dwtmp); - if(pEMInfo->EMPktNum <= 9){ - dwtmp = pEMInfo->EMPktLen[8]; - }else{ - dwtmp = pEMInfo->EMPktLen[8]; - dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; - dwtmp += pEMInfo->EMPktLen[9]; - } - SET_EARLYMODE_LEN4(VirtualAddress, dwtmp); -#else - SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); - SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]); - SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]); - SET_EARLYMODE_LEN2_1(VirtualAddress, pEMInfo->EMPktLen[2]&0xF); - SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2]>>4); - SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]); - SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]); -#endif - //RT_PRINT_DATA(COMP_SEND, DBG_LOUD, "EMHdr:", VirtualAddress, 8); - -} - - - -void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ) -{ - //_adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq - int index,j; - u16 offset,pktlen; - PTXDESC ptxdesc; - - u8 *pmem,*pEMInfo_mem; - s8 node_num_0=0,node_num_1=0; - struct EMInfo eminfo; - struct agg_pkt_info *paggpkt; - struct xmit_frame *pframe = (struct xmit_frame*)pxmitbuf->priv_data; - pmem= pframe->buf_addr; - - #ifdef DBG_EMINFO - DBG_8192C("\n%s ==> agg_num:%d\n",__FUNCTION__, pframe->agg_num); - for(index=0;indexagg_num;index++){ - offset = pxmitpriv->agg_pkt[index].offset; - pktlen = pxmitpriv->agg_pkt[index].pkt_len; - DBG_8192C("%s ==> agg_pkt[%d].offset=%d\n",__FUNCTION__,index,offset); - DBG_8192C("%s ==> agg_pkt[%d].pkt_len=%d\n",__FUNCTION__,index,pktlen); - } - #endif - - if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM) - { - node_num_0 = pframe->agg_num; - node_num_1= EARLY_MODE_MAX_PKT_NUM-1; - } - - for(index=0;indexagg_num;index++){ - - offset = pxmitpriv->agg_pkt[index].offset; - pktlen = pxmitpriv->agg_pkt[index].pkt_len; - - _rtw_memset(&eminfo,0,sizeof(struct EMInfo)); - if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM){ - if(node_num_0 > EARLY_MODE_MAX_PKT_NUM){ - eminfo.EMPktNum = EARLY_MODE_MAX_PKT_NUM; - node_num_0--; - } - else{ - eminfo.EMPktNum = node_num_1; - node_num_1--; - } - } - else{ - eminfo.EMPktNum = pframe->agg_num-(index+1); - } - for(j=0;j< eminfo.EMPktNum ;j++){ - eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index+1+j].pkt_len+4;// 4 bytes CRC - } - - if(pmem){ - if(index==0){ - ptxdesc = (PTXDESC)(pmem); - pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE; - } - else{ - pmem = pmem + pxmitpriv->agg_pkt[index-1].offset; - ptxdesc = (PTXDESC)(pmem); - pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE; - } - - #ifdef DBG_EMINFO - DBG_8192C("%s ==> desc.pkt_len=%d\n",__FUNCTION__,ptxdesc->pktlen); - #endif - InsertEMContent_8188E(&eminfo,pEMInfo_mem); - } - - - } - _rtw_memset(pxmitpriv->agg_pkt,0,sizeof(struct agg_pkt_info)*MAX_AGG_PKT_NUM); - -} -#endif - - diff --git a/hal/rtl8188e/sdio/rtl8189es_led.c b/hal/rtl8188e/sdio/rtl8189es_led.c deleted file mode 100755 index 06c90c5..0000000 --- a/hal/rtl8188e/sdio/rtl8189es_led.c +++ /dev/null @@ -1,124 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _RTL8189ES_LED_C_ - -#include "drv_types.h" -#include "rtl8188e_hal.h" - -//================================================================================ -// LED object. -//================================================================================ - - -//================================================================================ -// Prototype of protected function. -//================================================================================ - -//================================================================================ -// LED_819xUsb routines. -//================================================================================ - -// -// Description: -// Turn on LED according to LedPin specified. -// -void -SwLedOn( - _adapter *padapter, - PLED_871x pLed -) -{ - u8 LedCfg; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) - { - return; - } - - pLed->bLedOn = _TRUE; -} - - -// -// Description: -// Turn off LED according to LedPin specified. -// -void -SwLedOff( - _adapter *padapter, - PLED_871x pLed -) -{ - u8 LedCfg; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - if((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) - { - goto exit; - } - -exit: - pLed->bLedOn = _FALSE; - -} - -//================================================================================ -// Default LED behavior. -//================================================================================ - -// -// Description: -// Initialize all LED_871x objects. -// -void -rtl8188es_InitSwLeds( - _adapter *padapter - ) -{ - struct led_priv *pledpriv = &(padapter->ledpriv); - -#if 0 - pledpriv->LedControlHandler = LedControl871x; - - InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); - - InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED1); -#endif -} - - -// -// Description: -// DeInitialize all LED_819xUsb objects. -// -void -rtl8188es_DeInitSwLeds( - _adapter *padapter - ) -{ -#if 0 - struct led_priv *ledpriv = &(padapter->ledpriv); - - DeInitLed871x( &(ledpriv->SwLed0) ); - DeInitLed871x( &(ledpriv->SwLed1) ); -#endif -} - diff --git a/hal/rtl8188e/sdio/rtl8189es_recv.c b/hal/rtl8188e/sdio/rtl8189es_recv.c deleted file mode 100755 index 5b27803..0000000 --- a/hal/rtl8188e/sdio/rtl8189es_recv.c +++ /dev/null @@ -1,824 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _RTL8189ES_RECV_C_ - -#include - -#include -#include -#include - -static void rtl8188es_recv_tasklet(void *priv); - -static s32 initrecvbuf(struct recv_buf *precvbuf, PADAPTER padapter) -{ - _rtw_init_listhead(&precvbuf->list); - _rtw_spinlock_init(&precvbuf->recvbuf_lock); - - precvbuf->adapter = padapter; - - return _SUCCESS; -} - -static void freerecvbuf(struct recv_buf *precvbuf) -{ - _rtw_spinlock_free(&precvbuf->recvbuf_lock); -} - -/* - * Initialize recv private variable for hardware dependent - * 1. recv buf - * 2. recv tasklet - * - */ -s32 rtl8188es_init_recv_priv(PADAPTER padapter) -{ - s32 res; - u32 i, n; - struct recv_priv *precvpriv; - struct recv_buf *precvbuf; - - - res = _SUCCESS; - precvpriv = &padapter->recvpriv; - - //3 1. init recv buffer - _rtw_init_queue(&precvpriv->free_recv_buf_queue); - _rtw_init_queue(&precvpriv->recv_buf_pending_queue); - - n = NR_RECVBUFF * sizeof(struct recv_buf) + 4; - precvpriv->pallocated_recv_buf = rtw_zmalloc(n); - if (precvpriv->pallocated_recv_buf == NULL) { - res = _FAIL; - RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("alloc recv_buf fail!\n")); - goto exit; - } - - precvpriv->precv_buf = (u8*)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4); - - // init each recv buffer - precvbuf = (struct recv_buf*)precvpriv->precv_buf; - for (i = 0; i < NR_RECVBUFF; i++) - { - res = initrecvbuf(precvbuf, padapter); - if (res == _FAIL) - break; - - res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf); - if (res == _FAIL) { - freerecvbuf(precvbuf); - break; - } - -#ifdef CONFIG_SDIO_RX_COPY - if (precvbuf->pskb == NULL) { - SIZE_PTR tmpaddr=0; - SIZE_PTR alignment=0; - - precvbuf->pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); - - if(precvbuf->pskb) - { - precvbuf->pskb->dev = padapter->pnetdev; - - tmpaddr = (SIZE_PTR)precvbuf->pskb->data; - alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); - skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment)); - - precvbuf->phead = precvbuf->pskb->head; - precvbuf->pdata = precvbuf->pskb->data; - precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); - precvbuf->pend = skb_end_pointer(precvbuf->pskb); - precvbuf->len = 0; - } - - if (precvbuf->pskb == NULL) { - DBG_871X("%s: alloc_skb fail!\n", __FUNCTION__); - } - } -#endif - - rtw_list_insert_tail(&precvbuf->list, &precvpriv->free_recv_buf_queue.queue); - - precvbuf++; - } - precvpriv->free_recv_buf_queue_cnt = i; - - if (res == _FAIL) - goto initbuferror; - - //3 2. init tasklet - tasklet_init(&precvpriv->recv_tasklet, - (void(*)(unsigned long))rtl8188es_recv_tasklet, - (unsigned long)padapter); - goto exit; - -initbuferror: - precvbuf = (struct recv_buf*)precvpriv->precv_buf; - if (precvbuf) { - n = precvpriv->free_recv_buf_queue_cnt; - precvpriv->free_recv_buf_queue_cnt = 0; - for (i = 0; i < n ; i++) - { - rtw_list_delete(&precvbuf->list); - rtw_os_recvbuf_resource_free(padapter, precvbuf); - freerecvbuf(precvbuf); - precvbuf++; - } - precvpriv->precv_buf = NULL; - } - - if (precvpriv->pallocated_recv_buf) { - n = NR_RECVBUFF * sizeof(struct recv_buf) + 4; - rtw_mfree(precvpriv->pallocated_recv_buf, n); - precvpriv->pallocated_recv_buf = NULL; - } - -exit: - return res; -} - -/* - * Free recv private variable of hardware dependent - * 1. recv buf - * 2. recv tasklet - * - */ -void rtl8188es_free_recv_priv(PADAPTER padapter) -{ - u32 i, n; - struct recv_priv *precvpriv; - struct recv_buf *precvbuf; - - - precvpriv = &padapter->recvpriv; - - //3 1. kill tasklet - tasklet_kill(&precvpriv->recv_tasklet); - - //3 2. free all recv buffers - precvbuf = (struct recv_buf*)precvpriv->precv_buf; - if (precvbuf) { - n = NR_RECVBUFF; - precvpriv->free_recv_buf_queue_cnt = 0; - for (i = 0; i < n ; i++) - { - rtw_list_delete(&precvbuf->list); - rtw_os_recvbuf_resource_free(padapter, precvbuf); - freerecvbuf(precvbuf); - precvbuf++; - } - precvpriv->precv_buf = NULL; - } - - if (precvpriv->pallocated_recv_buf) { - n = NR_RECVBUFF * sizeof(struct recv_buf) + 4; - rtw_mfree(precvpriv->pallocated_recv_buf, n); - precvpriv->pallocated_recv_buf = NULL; - } -} - -#ifdef CONFIG_SDIO_RX_COPY -static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_buf *precvbuf, struct phy_stat *pphy_status) -{ - s32 ret=_SUCCESS; -#ifdef CONFIG_CONCURRENT_MODE - u8 *primary_myid, *secondary_myid, *paddr1; - union recv_frame *precvframe_if2 = NULL; - _adapter *primary_padapter = precvframe->u.hdr.adapter; - _adapter *secondary_padapter = primary_padapter->pbuddy_adapter; - struct recv_priv *precvpriv = &primary_padapter->recvpriv; - _queue *pfree_recv_queue = &precvpriv->free_recv_queue; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(primary_padapter); - - if(!secondary_padapter) - return ret; - - paddr1 = GetAddr1Ptr(precvframe->u.hdr.rx_data); - - if(IS_MCAST(paddr1) == _FALSE)//unicast packets - { - //primary_myid = myid(&primary_padapter->eeprompriv); - secondary_myid = myid(&secondary_padapter->eeprompriv); - - if(_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN)) - { - //change to secondary interface - precvframe->u.hdr.adapter = secondary_padapter; - } - - //ret = recv_entry(precvframe); - - } - else // Handle BC/MC Packets - { - //clone/copy to if2 - _pkt *pkt_copy = NULL; - struct rx_pkt_attrib *pattrib = NULL; - - precvframe_if2 = rtw_alloc_recvframe(pfree_recv_queue); - - if(!precvframe_if2) - return _FAIL; - - precvframe_if2->u.hdr.adapter = secondary_padapter; - _rtw_memcpy(&precvframe_if2->u.hdr.attrib, &precvframe->u.hdr.attrib, sizeof(struct rx_pkt_attrib)); - pattrib = &precvframe_if2->u.hdr.attrib; - - //driver need to set skb len for rtw_skb_copy(). - //If skb->len is zero, rtw_skb_copy() will not copy data from original skb. - skb_put(precvframe->u.hdr.pkt, pattrib->pkt_len); - - pkt_copy = rtw_skb_copy( precvframe->u.hdr.pkt); - if (pkt_copy == NULL) - { - if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)) - { - DBG_8192C("pre_recv_entry(): rtw_skb_copy fail , drop frag frame \n"); - rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); - return ret; - } - - pkt_copy = rtw_skb_clone(precvframe->u.hdr.pkt); - if(pkt_copy == NULL) - { - DBG_8192C("pre_recv_entry(): rtw_skb_clone fail , drop frame\n"); - rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); - return ret; - } - } - - pkt_copy->dev = secondary_padapter->pnetdev; - - precvframe_if2->u.hdr.pkt = pkt_copy; - precvframe_if2->u.hdr.rx_head = pkt_copy->head; - precvframe_if2->u.hdr.rx_data = pkt_copy->data; - precvframe_if2->u.hdr.rx_tail = skb_tail_pointer(pkt_copy); - precvframe_if2->u.hdr.rx_end = skb_end_pointer(pkt_copy); - precvframe_if2->u.hdr.len = pkt_copy->len; - - //recvframe_put(precvframe_if2, pattrib->pkt_len); - - if ( pHalData->ReceiveConfig & RCR_APPFCS) - recvframe_pull_tail(precvframe_if2, IEEE80211_FCS_LEN); - - if (pattrib->physt) - update_recvframe_phyinfo_88e(precvframe_if2, pphy_status); - - if(rtw_recv_entry(precvframe_if2) != _SUCCESS) - { - RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, - ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); - } - } - - if (precvframe->u.hdr.attrib.physt) - update_recvframe_phyinfo_88e(precvframe, pphy_status); - ret = rtw_recv_entry(precvframe); - -#endif - - return ret; - -} - -static void rtl8188es_recv_tasklet(void *priv) -{ - PADAPTER padapter; - PHAL_DATA_TYPE pHalData; - struct recv_priv *precvpriv; - struct recv_buf *precvbuf; - union recv_frame *precvframe; - struct recv_frame_hdr *phdr; - struct rx_pkt_attrib *pattrib; - _irqL irql; - u8 *ptr; - u32 pkt_offset, skb_len, alloc_sz; - s32 transfer_len; - _pkt *pkt_copy = NULL; - struct phy_stat *pphy_status = NULL; - u8 shift_sz = 0, rx_report_sz = 0; - - - padapter = (PADAPTER)priv; - pHalData = GET_HAL_DATA(padapter); - precvpriv = &padapter->recvpriv; - - do { - if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) - { - DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n"); - break; - } - - precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue); - if (NULL == precvbuf) break; - - transfer_len = (s32)precvbuf->len; - ptr = precvbuf->pdata; - - do { - precvframe = rtw_alloc_recvframe(&precvpriv->free_recv_queue); - if (precvframe == NULL) { - RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("%s: no enough recv frame!\n",__FUNCTION__)); - rtw_enqueue_recvbuf_to_head(precvbuf, &precvpriv->recv_buf_pending_queue); - - // The case of can't allocte recvframe should be temporary, - // schedule again and hope recvframe is available next time. - tasklet_schedule(&precvpriv->recv_tasklet); - return; - } - - //rx desc parsing - update_recvframe_attrib_88e(precvframe, (struct recv_stat*)ptr); - - pattrib = &precvframe->u.hdr.attrib; - - // fix Hardware RX data error, drop whole recv_buffer - if ((!(pHalData->ReceiveConfig & RCR_ACRC32)) && pattrib->crc_err) - { - DBG_8192C("%s()-%d: RX Warning! rx CRC ERROR !!\n", __FUNCTION__, __LINE__); - rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); - break; - } - - if (pHalData->ReceiveConfig & RCR_APP_BA_SSN) - rx_report_sz = RXDESC_SIZE + 4 + pattrib->drvinfo_sz; - else - rx_report_sz = RXDESC_SIZE + pattrib->drvinfo_sz; - - pkt_offset = rx_report_sz + pattrib->shift_sz + pattrib->pkt_len; - - if ((pattrib->pkt_len==0) || (pkt_offset>transfer_len)) { - DBG_8192C("%s()-%d: RX Warning!,pkt_len==0 or pkt_offset(%d)> transfoer_len(%d) \n", __FUNCTION__, __LINE__, pkt_offset, transfer_len); - rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); - break; - } - - if ((pattrib->crc_err) || (pattrib->icv_err)) - { - DBG_8192C("%s: crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); - rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); - } - else - { - // Modified by Albert 20101213 - // For 8 bytes IP header alignment. - if (pattrib->qos) // Qos data, wireless lan header length is 26 - { - shift_sz = 6; - } - else - { - shift_sz = 0; - } - - skb_len = pattrib->pkt_len; - - // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. - // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 - if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ - //alloc_sz = 1664; //1664 is 128 alignment. - if(skb_len <= 1650) - alloc_sz = 1664; - else - alloc_sz = skb_len + 14; - } - else { - alloc_sz = skb_len; - // 6 is for IP header 8 bytes alignment in QoS packet case. - // 8 is for skb->data 4 bytes alignment. - alloc_sz += 14; - } - - pkt_copy = rtw_skb_alloc(alloc_sz); - - if(pkt_copy) - { - pkt_copy->dev = padapter->pnetdev; - precvframe->u.hdr.pkt = pkt_copy; - skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address - skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. - _rtw_memcpy(pkt_copy->data, (ptr + rx_report_sz + pattrib->shift_sz), skb_len); - precvframe->u.hdr.rx_head = pkt_copy->head; - precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; - precvframe->u.hdr.rx_end = skb_end_pointer(pkt_copy); - } - else - { - if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)) - { - DBG_8192C("rtl8188es_recv_tasklet: alloc_skb fail , drop frag frame \n"); - rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); - break; - } - - precvframe->u.hdr.pkt = rtw_skb_clone(precvbuf->pskb); - if(precvframe->u.hdr.pkt) - { - _pkt *pkt_clone = precvframe->u.hdr.pkt; - - pkt_clone->data = ptr + rx_report_sz + pattrib->shift_sz; - skb_reset_tail_pointer(pkt_clone); - precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail - = pkt_clone->data; - precvframe->u.hdr.rx_end = pkt_clone->data + skb_len; - } - else - { - DBG_8192C("rtl8188es_recv_tasklet: rtw_skb_clone fail\n"); - rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); - break; - } - } - - recvframe_put(precvframe, skb_len); - //recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); - - if (pHalData->ReceiveConfig & RCR_APPFCS) - recvframe_pull_tail(precvframe, IEEE80211_FCS_LEN); - - // update drv info - if (pHalData->ReceiveConfig & RCR_APP_BA_SSN) { - //rtl8723s_update_bassn(padapter, (ptr + RXDESC_SIZE)); - } - - if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet - { - pphy_status = (struct phy_stat *)(ptr + (rx_report_sz - pattrib->drvinfo_sz)); - -#ifdef CONFIG_CONCURRENT_MODE - if(rtw_buddy_adapter_up(padapter)) - { - if(pre_recv_entry(precvframe, precvbuf, (struct phy_stat*)pphy_status) != _SUCCESS) - { - RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, - ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); - } - } - else -#endif - { - if (pattrib->physt) - update_recvframe_phyinfo_88e(precvframe, (struct phy_stat*)pphy_status); - - if (rtw_recv_entry(precvframe) != _SUCCESS) - { - RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("%s: rtw_recv_entry(precvframe) != _SUCCESS\n",__FUNCTION__)); - } - } - } - else{ // pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP - - //enqueue recvframe to txrtp queue - if(pattrib->pkt_rpt_type == TX_REPORT1){ - //DBG_8192C("rx CCX \n"); - //CCX-TXRPT ack for xmit mgmt frames. - handle_txrpt_ccx_88e(padapter, precvframe->u.hdr.rx_data); - } - else if(pattrib->pkt_rpt_type == TX_REPORT2){ - //printk("rx TX RPT \n"); - ODM_RA_TxRPT2Handle_8188E( - &pHalData->odmpriv, - precvframe->u.hdr.rx_data, - pattrib->pkt_len, - pattrib->MacIDValidEntry[0], - pattrib->MacIDValidEntry[1] - ); - - } - /* - else if(pattrib->pkt_rpt_type == HIS_REPORT){ - printk("rx USB HISR \n"); - }*/ - - rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); - - } - } - - // Page size of receive package is 128 bytes alignment =>DMA AGG - // refer to _InitTransferPageSize() - pkt_offset = _RND128(pkt_offset); - transfer_len -= pkt_offset; - ptr += pkt_offset; - precvframe = NULL; - pkt_copy = NULL; - }while(transfer_len>0); - - precvbuf->len = 0; - - rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue); - } while (1); - -} -#else -static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_buf *precvbuf, struct phy_stat *pphy_status) -{ - s32 ret=_SUCCESS; -#ifdef CONFIG_CONCURRENT_MODE - u8 *primary_myid, *secondary_myid, *paddr1; - union recv_frame *precvframe_if2 = NULL; - _adapter *primary_padapter = precvframe->u.hdr.adapter; - _adapter *secondary_padapter = primary_padapter->pbuddy_adapter; - struct recv_priv *precvpriv = &primary_padapter->recvpriv; - _queue *pfree_recv_queue = &precvpriv->free_recv_queue; - u8 *pbuf = precvframe->u.hdr.rx_head; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(primary_padapter); - - if(!secondary_padapter) - return ret; - - paddr1 = GetAddr1Ptr(precvframe->u.hdr.rx_data); - - if(IS_MCAST(paddr1) == _FALSE)//unicast packets - { - //primary_myid = myid(&primary_padapter->eeprompriv); - secondary_myid = myid(&secondary_padapter->eeprompriv); - - if(_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN)) - { - //change to secondary interface - precvframe->u.hdr.adapter = secondary_padapter; - } - - //ret = recv_entry(precvframe); - - } - else // Handle BC/MC Packets - { - //clone/copy to if2 - u8 shift_sz = 0; - u32 alloc_sz, skb_len; - _pkt *pkt_copy = NULL; - struct rx_pkt_attrib *pattrib = NULL; - - precvframe_if2 = rtw_alloc_recvframe(pfree_recv_queue); - - if(!precvframe_if2) - return _FAIL; - - precvframe_if2->u.hdr.adapter = secondary_padapter; - _rtw_init_listhead(&precvframe_if2->u.hdr.list); - precvframe_if2->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. - precvframe_if2->u.hdr.len=0; - _rtw_memcpy(&precvframe_if2->u.hdr.attrib, &precvframe->u.hdr.attrib, sizeof(struct rx_pkt_attrib)); - pattrib = &precvframe_if2->u.hdr.attrib; - - pkt_copy = rtw_skb_copy( precvframe->u.hdr.pkt); - if (pkt_copy == NULL) - { - RT_TRACE(_module_rtl871x_recv_c_, _drv_crit_, ("%s: no enough memory to allocate SKB!\n",__FUNCTION__)); - rtw_free_recvframe(precvframe_if2, &precvpriv->free_recv_queue); - rtw_enqueue_recvbuf_to_head(precvbuf, &precvpriv->recv_buf_pending_queue); - - // The case of can't allocte skb is serious and may never be recovered, - // once bDriverStopped is enable, this task should be stopped. - if (secondary_padapter->bDriverStopped == _FALSE) - tasklet_schedule(&precvpriv->recv_tasklet); - return ret; - } - pkt_copy->dev = secondary_padapter->pnetdev; - - - - if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ - //alloc_sz = 1664; //1664 is 128 alignment. - if(skb_len <= 1650) - alloc_sz = 1664; - else - alloc_sz = skb_len + 14; - } - else { - alloc_sz = skb_len; - // 6 is for IP header 8 bytes alignment in QoS packet case. - // 8 is for skb->data 4 bytes alignment. - alloc_sz += 14; - } - -#if 1 - precvframe_if2->u.hdr.pkt = pkt_copy; - precvframe_if2->u.hdr.rx_head = pkt_copy->head; - precvframe_if2->u.hdr.rx_data = precvframe_if2->u.hdr.rx_tail = pkt_copy->data; - precvframe_if2->u.hdr.rx_end = pkt_copy->data + alloc_sz; -#endif - recvframe_put(precvframe_if2, pkt_offset); - recvframe_pull(precvframe_if2, RXDESC_SIZE + pattrib->drvinfo_sz); - - if ( pHalData->ReceiveConfig & RCR_APPFCS) - recvframe_pull_tail(precvframe_if2, IEEE80211_FCS_LEN); - - if (pattrib->physt) - update_recvframe_phyinfo_88e(precvframe_if2, pphy_status); - - if(rtw_recv_entry(precvframe_if2) != _SUCCESS) - { - RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, - ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); - } - } - - if (precvframe->u.hdr.attrib.physt) - update_recvframe_phyinfo_88e(precvframe, (struct phy_stat*)pphy_status); - ret = rtw_recv_entry(precvframe); - -#endif - - return ret; - -} - -static void rtl8188es_recv_tasklet(void *priv) -{ - PADAPTER padapter; - PHAL_DATA_TYPE pHalData; - struct recv_priv *precvpriv; - struct recv_buf *precvbuf; - union recv_frame *precvframe; - struct recv_frame_hdr *phdr; - struct rx_pkt_attrib *pattrib; - u8 *ptr; - _pkt *ppkt; - u32 pkt_offset; - _irqL irql; -#ifdef CONFIG_CONCURRENT_MODE - struct recv_stat *prxstat; -#endif - - padapter = (PADAPTER)priv; - pHalData = GET_HAL_DATA(padapter); - precvpriv = &padapter->recvpriv; - - do { - precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue); - if (NULL == precvbuf) break; - - ptr = precvbuf->pdata; - - while (ptr < precvbuf->ptail) - { - precvframe = rtw_alloc_recvframe(&precvpriv->free_recv_queue); - if (precvframe == NULL) { - RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("%s: no enough recv frame!\n",__FUNCTION__)); - rtw_enqueue_recvbuf_to_head(precvbuf, &precvpriv->recv_buf_pending_queue); - - // The case of can't allocte recvframe should be temporary, - // schedule again and hope recvframe is available next time. - tasklet_schedule(&precvpriv->recv_tasklet); - return; - } - - phdr = &precvframe->u.hdr; - pattrib = &phdr->attrib; - - //rx desc parsing - update_recvframe_attrib_88e(precvframe, (struct recv_stat*)ptr); -#ifdef CONFIG_CONCURRENT_MODE - prxstat = (struct recv_stat*)ptr; -#endif - // fix Hardware RX data error, drop whole recv_buffer - if ((!(pHalData->ReceiveConfig & RCR_ACRC32)) && pattrib->crc_err) - { - DBG_8192C("%s()-%d: RX Warning! rx CRC ERROR !!\n", __FUNCTION__, __LINE__); - rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); - break; - } - - pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->pkt_len; - - if ((ptr + pkt_offset) > precvbuf->ptail) { - DBG_8192C("%s()-%d: : next pkt len(%p,%d) exceed ptail(%p)!\n", __FUNCTION__, __LINE__, ptr, pkt_offset, precvbuf->ptail); - rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); - break; - } - - if ((pattrib->crc_err) || (pattrib->icv_err)) - { - - DBG_8192C("%s: crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); - rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); - } - else - { - ppkt = rtw_skb_clone(precvbuf->pskb); - if (ppkt == NULL) - { - RT_TRACE(_module_rtl871x_recv_c_, _drv_crit_, ("%s: no enough memory to allocate SKB!\n",__FUNCTION__)); - rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); - rtw_enqueue_recvbuf_to_head(precvbuf, &precvpriv->recv_buf_pending_queue); - - // The case of can't allocte skb is serious and may never be recovered, - // once bDriverStopped is enable, this task should be stopped. - if (padapter->bDriverStopped == _FALSE) { - tasklet_schedule(&precvpriv->recv_tasklet); - } - - return; - } - - phdr->pkt = ppkt; - phdr->len = 0; - phdr->rx_head = precvbuf->phead; - phdr->rx_data = phdr->rx_tail = precvbuf->pdata; - phdr->rx_end = precvbuf->pend; - - recvframe_put(precvframe, pkt_offset); - recvframe_pull(precvframe, RXDESC_SIZE + pattrib->drvinfo_sz); - - if (pHalData->ReceiveConfig & RCR_APPFCS) - recvframe_pull_tail(precvframe, IEEE80211_FCS_LEN); - - // move to drv info position - ptr += RXDESC_SIZE; - - // update drv info - if (pHalData->ReceiveConfig & RCR_APP_BA_SSN) { -// rtl8723s_update_bassn(padapter, pdrvinfo); - ptr += 4; - } - - if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet - { -#ifdef CONFIG_CONCURRENT_MODE - if(rtw_buddy_adapter_up(padapter)) - { - if(pre_recv_entry(precvframe, precvbuf, (struct phy_stat*)ptr) != _SUCCESS) - { - RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, - ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); - } - } - else -#endif - { - if (pattrib->physt) - update_recvframe_phyinfo_88e(precvframe, (struct phy_stat*)ptr); - - if (rtw_recv_entry(precvframe) != _SUCCESS) - { - RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, - ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); - } - } - } - else{ // pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP - - //enqueue recvframe to txrtp queue - if(pattrib->pkt_rpt_type == TX_REPORT1){ - DBG_8192C("rx CCX \n"); - } - else if(pattrib->pkt_rpt_type == TX_REPORT2){ - //DBG_8192C("rx TX RPT \n"); - ODM_RA_TxRPT2Handle_8188E( - &pHalData->odmpriv, - precvframe->u.hdr.rx_data, - pattrib->pkt_len, - pattrib->MacIDValidEntry[0], - pattrib->MacIDValidEntry[1] - ); - - } - /* - else if(pattrib->pkt_rpt_type == HIS_REPORT){ - DBG_8192C("rx USB HISR \n"); - }*/ - - rtw_free_recvframe(precvframe, &precvpriv->free_recv_queue); - - } - } - - // Page size of receive package is 128 bytes alignment =>DMA AGG - // refer to _InitTransferPageSize() - pkt_offset = _RND128(pkt_offset); - precvbuf->pdata += pkt_offset; - ptr = precvbuf->pdata; - - } - - rtw_skb_free(precvbuf->pskb); - precvbuf->pskb = NULL; - rtw_enqueue_recvbuf(precvbuf, &precvpriv->free_recv_buf_queue); - - } while (1); - -} -#endif - diff --git a/hal/rtl8188e/sdio/rtl8189es_xmit.c b/hal/rtl8188e/sdio/rtl8189es_xmit.c deleted file mode 100755 index d9823ec..0000000 --- a/hal/rtl8188e/sdio/rtl8189es_xmit.c +++ /dev/null @@ -1,1699 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _RTL8189ES_XMIT_C_ - -#include -#include -#include -#include -#include - -static void fill_txdesc_sectype(struct pkt_attrib *pattrib, PTXDESC ptxdesc) -{ - if ((pattrib->encrypt > 0) && !pattrib->bswenc) - { - switch (pattrib->encrypt) - { - // SEC_TYPE - case _WEP40_: - case _WEP104_: - case _TKIP_: - case _TKIP_WTMIC_: - ptxdesc->sectype = 1; - break; -#ifdef CONFIG_WAPI_SUPPORT - case _SMS4_: - ptxdesc->sectype = 2; - break; -#endif - case _AES_: - ptxdesc->sectype = 3; - break; - - case _NO_PRIVACY_: - default: - break; - } - } -} - - - static void fill_txdesc_vcs(struct pkt_attrib *pattrib, PTXDESC ptxdesc) -{ - //DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode); - - switch (pattrib->vcs_mode) - { - case RTS_CTS: - ptxdesc->rtsen = 1; - break; - - case CTS_TO_SELF: - ptxdesc->cts2self = 1; - break; - - case NONE_VCS: - default: - break; - } - - if(pattrib->vcs_mode) { - ptxdesc->hw_rts_en = 1; // ENABLE HW RTS - - // Set RTS BW - if(pattrib->ht_en) - { - if (pattrib->bwmode & HT_CHANNEL_WIDTH_40) - ptxdesc->rts_bw = 1; - - switch (pattrib->ch_offset) - { - case HAL_PRIME_CHNL_OFFSET_DONT_CARE: - ptxdesc->rts_sc = 0; - break; - - case HAL_PRIME_CHNL_OFFSET_LOWER: - ptxdesc->rts_sc = 1; - break; - - case HAL_PRIME_CHNL_OFFSET_UPPER: - ptxdesc->rts_sc = 2; - break; - - default: - ptxdesc->rts_sc = 3; // Duplicate - break; - } - } - } -} - -static void fill_txdesc_phy(struct pkt_attrib *pattrib, PTXDESC ptxdesc) -{ - //DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); - - if (pattrib->ht_en) - { - if (pattrib->bwmode & HT_CHANNEL_WIDTH_40) - ptxdesc->data_bw = 1; - - switch (pattrib->ch_offset) - { - case HAL_PRIME_CHNL_OFFSET_DONT_CARE: - ptxdesc->data_sc = 0; - break; - - case HAL_PRIME_CHNL_OFFSET_LOWER: - ptxdesc->data_sc = 1; - break; - - case HAL_PRIME_CHNL_OFFSET_UPPER: - ptxdesc->data_sc = 2; - break; - - default: - ptxdesc->data_sc = 3; // Duplicate - break; - } - } -} - -static void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc) -{ - u16 *usPtr = (u16*)ptxdesc; - u32 count = 16; // (32 bytes / 2 bytes per XOR) => 16 times - u32 index; - u16 checksum = 0; - - - // Clear first - ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); - - for (index = 0; index < count; index++) { - checksum ^= le16_to_cpu(*(usPtr + index)); - } - - ptxdesc->txdw7 |= cpu_to_le32(checksum & 0x0000ffff); -} -// -// Description: In normal chip, we should send some packet to Hw which will be used by Fw -// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then -// Fw can tell Hw to send these packet derectly. -// -void rtl8188e_fill_fake_txdesc( - PADAPTER padapter, - u8* pDesc, - u32 BufferLen, - u8 IsPsPoll, - u8 IsBTQosNull) -{ - struct tx_desc *ptxdesc; - - - // Clear all status - ptxdesc = (struct tx_desc*)pDesc; - _rtw_memset(pDesc, 0, TXDESC_SIZE); - - //offset 0 - ptxdesc->txdw0 |= cpu_to_le32( OWN | FSG | LSG); //own, bFirstSeg, bLastSeg; - - ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); // Buffer size + command header - - //offset 4 - ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<txdw1 |= cpu_to_le32(NAVUSEHDR); - } - else - { - ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number - ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. - } - - if (_TRUE == IsBTQosNull) - { - ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); // BT NULL - } - - //offset 16 - ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate - -#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) - // USB interface drop packet if the checksum of descriptor isn't correct. - // Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). - rtl8188e_cal_txdesc_chksum(ptxdesc); -#endif -} - - -#define SDIO_TX_AGG_MAX (5) -//#define CONFIG_FIX_CORE_DUMP ==> have bug -//#define DBG_EMINFO - -#if 0 -void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc) -{ - u16 *usPtr = (u16*)ptxdesc; - u32 count = 16; // (32 bytes / 2 bytes per XOR) => 16 times - u32 index; - u16 checksum = 0; - - - // Clear first - ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); - - for (index = 0; index < count; index++) { - checksum ^= le16_to_cpu(*(usPtr + index)); - } - - ptxdesc->txdw7 |= cpu_to_le32(checksum & 0x0000ffff); -} - -static void fill_txdesc_sectype(struct pkt_attrib *pattrib, PTXDESC ptxdesc) -{ - if ((pattrib->encrypt > 0) && !pattrib->bswenc) - { - switch (pattrib->encrypt) - { - // SEC_TYPE - case _WEP40_: - case _WEP104_: - case _TKIP_: - case _TKIP_WTMIC_: - ptxdesc->sectype = 1; - break; - - case _AES_: - ptxdesc->sectype = 3; - break; - - case _NO_PRIVACY_: - default: - break; - } - } -} - -static void fill_txdesc_vcs(struct pkt_attrib *pattrib, PTXDESC ptxdesc) -{ - //DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode); - - switch (pattrib->vcs_mode) - { - case RTS_CTS: - ptxdesc->rtsen = 1; - break; - - case CTS_TO_SELF: - ptxdesc->cts2self = 1; - break; - - case NONE_VCS: - default: - break; - } - - if (pattrib->vcs_mode) - ptxdesc->hw_rts_en = 1; // ENABLE HW RTS -} - -static void fill_txdesc_phy(struct pkt_attrib *pattrib, PTXDESC ptxdesc) -{ - //DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); - - if (pattrib->ht_en) - { - if (pattrib->bwmode & HT_CHANNEL_WIDTH_40) - ptxdesc->data_bw = 1; - - switch (pattrib->ch_offset) - { - case HAL_PRIME_CHNL_OFFSET_DONT_CARE: - ptxdesc->data_sc = 0; - break; - - case HAL_PRIME_CHNL_OFFSET_LOWER: - ptxdesc->data_sc = 1; - break; - - case HAL_PRIME_CHNL_OFFSET_UPPER: - ptxdesc->data_sc = 2; - break; - - default: - ptxdesc->data_sc = 3; // Duplicate - break; - } - } -} -#endif - -void rtl8188es_fill_default_txdesc( - struct xmit_frame *pxmitframe, - u8 *pbuf) -{ - PADAPTER padapter; - HAL_DATA_TYPE *pHalData; - struct mlme_ext_priv *pmlmeext; - struct mlme_ext_info *pmlmeinfo; - struct dm_priv *pdmpriv; - struct pkt_attrib *pattrib; - PTXDESC ptxdesc; - s32 bmcst; - - - padapter = pxmitframe->padapter; - pHalData = GET_HAL_DATA(padapter); - //pdmpriv = &pHalData->dmpriv; - pmlmeext = &padapter->mlmeextpriv; - pmlmeinfo = &(pmlmeext->mlmext_info); - - pattrib = &pxmitframe->attrib; - bmcst = IS_MCAST(pattrib->ra); - - ptxdesc = (PTXDESC)pbuf; - - - if (pxmitframe->frame_tag == DATA_FRAMETAG) - { - ptxdesc->macid = pattrib->mac_id; // CAM_ID(MAC_ID) - - if (pattrib->ampdu_en == _TRUE) - ptxdesc->agg_en = 1; // AGG EN - else - ptxdesc->bk = 1; // AGG BK - - ptxdesc->qsel = pattrib->qsel; - ptxdesc->rate_id = pattrib->raid; - - fill_txdesc_sectype(pattrib, ptxdesc); - - ptxdesc->seq = pattrib->seqnum; - - //todo: qos_en - - ptxdesc->userate = 1; // driver uses rate - - if ((pattrib->ether_type != 0x888e) && - (pattrib->ether_type != 0x0806) && - (pattrib->dhcp_pkt != 1)) - { - // Non EAP & ARP & DHCP type data packet - - fill_txdesc_vcs(pattrib, ptxdesc); - fill_txdesc_phy(pattrib, ptxdesc); - - ptxdesc->rtsrate = 8; // RTS Rate=24M - ptxdesc->data_ratefb_lmt = 0x1F; - ptxdesc->rts_ratefb_lmt = 0xF; - #if (RATE_ADAPTIVE_SUPPORT == 1) - if(pattrib->ht_en){ - ptxdesc->sgi = ODM_RA_GetShortGI_8188E(&pHalData->odmpriv,pattrib->mac_id); - } - ptxdesc->datarate = ODM_RA_GetDecisionRate_8188E(&pHalData->odmpriv,pattrib->mac_id); - - //for debug - #if 1 - if(padapter->fix_rate!= 0xFF){ - ptxdesc->datarate = padapter->fix_rate; - } - #endif - #if (POWER_TRAINING_ACTIVE==1) - ptxdesc->pwr_status = ODM_RA_GetHwPwrStatus_8188E(&pHalData->odmpriv,pattrib->mac_id); - #endif - #else - ptxdesc->datarate = 0x13; //MCS7 - ptxdesc->sgi = 1; // SGI - if(padapter->fix_rate!= 0xFF){//modify datat by iwpriv - ptxdesc->datarate = padapter->fix_rate; - } - #endif - - - } - else - { - // EAP data packet and ARP and DHCP packet. - // Use the 1M or 6M data rate to send the EAP/ARP packet. - // This will maybe make the handshake smooth. - - ptxdesc->bk = 1; // AGG BK - - if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) - ptxdesc->data_short = 1;// DATA_SHORT - - ptxdesc->datarate = MRateToHwRate(pmlmeext->tx_rate); - } - - ptxdesc->usb_txagg_num = pxmitframe->agg_num; - } - else if (pxmitframe->frame_tag == MGNT_FRAMETAG) - { -// RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("%s: MGNT_FRAMETAG\n", __FUNCTION__)); - - ptxdesc->macid = pattrib->mac_id; // CAM_ID(MAC_ID) - ptxdesc->qsel = pattrib->qsel; - ptxdesc->rate_id = pattrib->raid; // Rate ID - ptxdesc->seq = pattrib->seqnum; - ptxdesc->userate = 1; // driver uses rate, 1M - ptxdesc->rty_lmt_en = 1; // retry limit enable - ptxdesc->data_rt_lmt = 6; // retry limit = 6 - -#ifdef CONFIG_XMIT_ACK - //CCX-TXRPT ack for xmit mgmt frames. - if (pxmitframe->ack_report) { - #ifdef DBG_CCX - static u16 ccx_sw = 0x123; - txdesc_set_ccx_sw_88e(ptxdesc, ccx_sw); - DBG_871X("%s set ccx, sw:0x%03x\n", __func__, ccx_sw); - ccx_sw = (ccx_sw+1)%0xfff; - #endif - ptxdesc->ccx = 1; - } -#endif //CONFIG_XMIT_ACK - -#ifdef CONFIG_INTEL_PROXIM - if((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){ - DBG_871X("\n %s pattrib->rate=%d\n",__FUNCTION__,pattrib->rate); - ptxdesc->datarate = pattrib->rate; - } - else -#endif - { - ptxdesc->datarate = MRateToHwRate(pmlmeext->tx_rate); - } - } - else if (pxmitframe->frame_tag == TXAGG_FRAMETAG) - { - RT_TRACE(_module_hal_xmit_c_, _drv_warning_, ("%s: TXAGG_FRAMETAG\n", __FUNCTION__)); - } - else - { - RT_TRACE(_module_hal_xmit_c_, _drv_warning_, ("%s: frame_tag=0x%x\n", __FUNCTION__, pxmitframe->frame_tag)); - - ptxdesc->macid = 4; // CAM_ID(MAC_ID) - ptxdesc->rate_id = 6; // Rate ID - ptxdesc->seq = pattrib->seqnum; - ptxdesc->userate = 1; // driver uses rate - ptxdesc->datarate = MRateToHwRate(pmlmeext->tx_rate); - } - - ptxdesc->pktlen = pattrib->last_txcmdsz; - if (pxmitframe->frame_tag == DATA_FRAMETAG){ - #ifdef CONFIG_TX_EARLY_MODE - ptxdesc->offset = TXDESC_SIZE +EARLY_MODE_INFO_SIZE ; - ptxdesc->pkt_offset = 0x01; - #else - ptxdesc->offset = TXDESC_SIZE ; - ptxdesc->pkt_offset = 0; - #endif - } - else{ - ptxdesc->offset = TXDESC_SIZE ; - } - - if (bmcst) ptxdesc->bmc = 1; - ptxdesc->ls = 1; - ptxdesc->fs = 1; - ptxdesc->own = 1; - - // 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. - // (1) The sequence number of each non-Qos frame / broadcast / multicast / - // mgnt frame should be controled by Hw because Fw will also send null data - // which we cannot control when Fw LPS enable. - // --> default enable non-Qos data sequense number. 2010.06.23. by tynli. - // (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. - // (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. - // 2010.06.23. Added by tynli. - if (!pattrib->qos_en) - { - // Hw set sequence number - ptxdesc->hwseq_en = 1; // HWSEQ_EN - ptxdesc->hwseq_sel = 0; // HWSEQ_SEL - } - -} - -/* - * Description: - * - * Parameters: - * pxmitframe xmitframe - * pbuf where to fill tx desc - */ -void rtl8188es_update_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf) -{ - struct tx_desc *pdesc; - - - pdesc = (struct tx_desc*)pbuf; - _rtw_memset(pdesc, 0, sizeof(struct tx_desc)); - - rtl8188es_fill_default_txdesc(pxmitframe, pbuf); - - pdesc->txdw0 = cpu_to_le32(pdesc->txdw0); - pdesc->txdw1 = cpu_to_le32(pdesc->txdw1); - pdesc->txdw2 = cpu_to_le32(pdesc->txdw2); - pdesc->txdw3 = cpu_to_le32(pdesc->txdw3); - pdesc->txdw4 = cpu_to_le32(pdesc->txdw4); - pdesc->txdw5 = cpu_to_le32(pdesc->txdw5); - pdesc->txdw6 = cpu_to_le32(pdesc->txdw6); - pdesc->txdw7 = cpu_to_le32(pdesc->txdw7); - - rtl8188e_cal_txdesc_chksum(pdesc); -} - -static inline u32 ffaddr2deviceId(struct dvobj_priv *pdvobj, u32 addr) -{ - return pdvobj->Queue2Pipe[addr]; -} - -#ifdef CONFIG_SDIO_REDUCE_TX_POLLING -static u8 rtl8188es_query_tx_freepage(_adapter *padapter, struct xmit_buf *pxmitbuf) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); - u8 TxRequiredPageNum = 0; - u8 DedicatedPgNum = 0; - u8 RequiredPublicFreePgNum = 0; - u8 PageIdx = 0; - u8 CheckStep = 0; - u8 bResult = _TRUE; - u8 bUpdatePageNum = _FALSE; - u32 deviceId; - - - TxRequiredPageNum = pxmitbuf->pg_num; - - deviceId = ffaddr2deviceId(pdvobjpriv, pxmitbuf->ff_hwaddr); - - // translate fifo addr to queue index - switch (deviceId) { - case WLAN_TX_HIQ_DEVICE_ID: - PageIdx = HI_QUEUE_IDX; - break; - - case WLAN_TX_MIQ_DEVICE_ID: - PageIdx = MID_QUEUE_IDX; - break; - - case WLAN_TX_LOQ_DEVICE_ID: - PageIdx = LOW_QUEUE_IDX; - break; - } - - do { - if ( - (padapter->bSurpriseRemoved == _TRUE) || (padapter->bDriverStopped == _TRUE) -#ifdef CONFIG_CONCURRENT_MODE - ||((padapter->pbuddy_adapter) - && ((padapter->pbuddy_adapter->bSurpriseRemoved) ||(padapter->pbuddy_adapter->bDriverStopped))) -#endif - - ){ - RT_TRACE(_module_hal_xmit_c_, _drv_notice_, - ("%s: bSurpriseRemoved(update TX FIFO page)\n", __FUNCTION__)); - break; - } - - // The number of page which public page is included is available . - if ((pHalData->SdioTxFIFOFreePage[PageIdx]+pHalData->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX]) > (TxRequiredPageNum+1)) { - DedicatedPgNum = pHalData->SdioTxFIFOFreePage[PageIdx]; - if (TxRequiredPageNum <= DedicatedPgNum) { - pHalData->SdioTxFIFOFreePage[PageIdx] -= TxRequiredPageNum; - break; - } else { - pHalData->SdioTxFIFOFreePage[PageIdx] = 0; - RequiredPublicFreePgNum = TxRequiredPageNum - DedicatedPgNum; - pHalData->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX] -= RequiredPublicFreePgNum; - break; - } - } else { // Total number of page is NOT available, so update current FIFO status. - if (!bUpdatePageNum) { - bResult = HalQueryTxBufferStatus8189ESdio(padapter); // Set to default value. - bUpdatePageNum = _TRUE; - } else { - bResult = _FALSE; - } - } - }while(++CheckStep < 2); // step1: user page variables, step2: physical page number - - RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("%s(): HIQ(%#x), MIQ(%#x), LOQ(%#x), PUBQ(%#x)\n", - __FUNCTION__, - pHalData->SdioTxFIFOFreePage[HI_QUEUE_IDX], - pHalData->SdioTxFIFOFreePage[MID_QUEUE_IDX], - pHalData->SdioTxFIFOFreePage[LOW_QUEUE_IDX], - pHalData->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX])); - - RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("%s(): TxRequiredPageNum(%d) is available to send?(%d)\n", - __FUNCTION__, TxRequiredPageNum, bResult)); - - return bResult; -} -#else -static u8 rtl8188es_query_tx_freepage(_adapter *padapter, struct xmit_buf *pxmitbuf) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); - u8 TxRequiredPageNum = 0; - u8 DedicatedPgNum = 0; - u8 RequiredPublicFreePgNum = 0; - u8 PageIdx = 0; - u8 bResult = _TRUE; - u32 n, deviceId; - - TxRequiredPageNum = pxmitbuf->pg_num; - - deviceId = ffaddr2deviceId(pdvobjpriv, pxmitbuf->ff_hwaddr); - - // translate fifo addr to queue index - switch (deviceId) { - case WLAN_TX_HIQ_DEVICE_ID: - PageIdx = HI_QUEUE_IDX; - break; - - case WLAN_TX_MIQ_DEVICE_ID: - PageIdx = MID_QUEUE_IDX; - break; - - case WLAN_TX_LOQ_DEVICE_ID: - PageIdx = LOW_QUEUE_IDX; - break; - } - - // check if hardware tx fifo page is enough - n = 0; - do { - if ( - (padapter->bSurpriseRemoved == _TRUE) || (padapter->bDriverStopped == _TRUE) - -#ifdef CONFIG_CONCURRENT_MODE - ||((padapter->pbuddy_adapter) - && ((padapter->pbuddy_adapter->bSurpriseRemoved) ||(padapter->pbuddy_adapter->bDriverStopped))) -#endif - ){ - RT_TRACE(_module_hal_xmit_c_, _drv_notice_, - ("%s: bSurpriseRemoved(update TX FIFO page)\n", __FUNCTION__)); - break; - } - - - // The number of page which public page is included is available . - if ((pHalData->SdioTxFIFOFreePage[PageIdx]+pHalData->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX]) > (TxRequiredPageNum+1)) { - DedicatedPgNum = pHalData->SdioTxFIFOFreePage[PageIdx]; - if (TxRequiredPageNum <= DedicatedPgNum) { - pHalData->SdioTxFIFOFreePage[PageIdx] -= TxRequiredPageNum; - break; - } else { - pHalData->SdioTxFIFOFreePage[PageIdx] = 0; - RequiredPublicFreePgNum = TxRequiredPageNum - DedicatedPgNum; - pHalData->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX] -= RequiredPublicFreePgNum; - break; - } - } - - n++; - -#if 0 - if (n >= 5000) - { - u8 reg_value_1 = 0; - u8 reg_value_2 = 0; - u8 reg_value_3 = 0; - - //try to recover the transmission - reg_value_1 = rtw_read8(padapter, REG_SYS_FUNC_EN); - reg_value_2 = rtw_read8(padapter, REG_CR); - reg_value_3 = rtw_read8(padapter, REG_TXPAUSE); - DBG_871X("Before recovery: REG_SYS_FUNC_EN = 0x%X, REG_CR = 0x%X, REG_TXPAUSE = 0x%X\n", reg_value_1, reg_value_2, reg_value_3); - - rtw_write8(padapter, REG_SYS_FUNC_EN, reg_value_1 | 0x01); - rtw_write8(padapter, REG_CR, reg_value_2 | 0xC0); - rtw_write8(padapter, REG_TXPAUSE, 0); - DBG_871X("After recovery: REG_SYS_FUNC_EN = 0x%X, REG_CR = 0x%X, REG_TXPAUSE = 0x%X\n", - rtw_read8(padapter, REG_SYS_FUNC_EN), rtw_read8(padapter, REG_CR), rtw_read8(padapter, REG_TXPAUSE)); - } -#endif - - if ((n % 60) == 0) {//or 80 - //DBG_871X("%s: FIFO starvation!(%d) len=%d agg=%d page=(R)%d(A)%d\n", - // __func__, n, pxmitbuf->len, pxmitbuf->agg_num, pframe->pg_num, freePage[PageIdx] + freePage[PUBLIC_QUEUE_IDX]); - rtw_msleep_os(10); - rtw_yield_os(); - } - - // Total number of page is NOT available, so update current FIFO status - HalQueryTxBufferStatus8189ESdio(padapter); - } while (1); - - return bResult; -} -#endif - -//todo: static -s32 rtl8188es_dequeue_writeport(PADAPTER padapter, u8 *freePage) -{ - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); - struct xmit_buf *pxmitbuf; - PADAPTER pri_padapter = padapter; - s32 ret = 0; - -#ifdef CONFIG_CONCURRENT_MODE - if (padapter->adapter_type > 0) - pri_padapter = padapter->pbuddy_adapter; - - if(rtw_buddy_adapter_up(padapter)) - ret = check_buddy_fwstate( padapter, _FW_UNDER_SURVEY); -#endif - - ret = ret || check_fwstate(pmlmepriv, _FW_UNDER_SURVEY); - - if (_TRUE == ret) - pxmitbuf = dequeue_pending_xmitbuf_under_survey(pxmitpriv); - else - pxmitbuf = dequeue_pending_xmitbuf(pxmitpriv); - - if (pxmitbuf == NULL) - return _TRUE; - -query_free_page: - // check if hardware tx fifo page is enough - if( _FALSE == rtl8188es_query_tx_freepage(pri_padapter, pxmitbuf)) - { - rtw_msleep_os(1); - goto query_free_page; - } - - if ((padapter->bSurpriseRemoved == _TRUE) - || (padapter->bDriverStopped == _TRUE) -#ifdef CONFIG_CONCURRENT_MODE - ||((padapter->pbuddy_adapter) - && ((padapter->pbuddy_adapter->bSurpriseRemoved) ||(padapter->pbuddy_adapter->bDriverStopped))) -#endif - ){ - RT_TRACE(_module_hal_xmit_c_, _drv_notice_, - ("%s: bSurpriseRemoved(wirte port)\n", __FUNCTION__)); - goto free_xmitbuf; - } - - rtw_write_port(padapter, ffaddr2deviceId(pdvobjpriv, pxmitbuf->ff_hwaddr), pxmitbuf->len, (u8 *)pxmitbuf); - -free_xmitbuf: - //rtw_free_xmitframe(pxmitpriv, pframe); - //pxmitbuf->priv_data = NULL; - rtw_free_xmitbuf(pxmitpriv, pxmitbuf); - -#ifdef CONFIG_SDIO_TX_TASKLET - tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); -#endif - - return _FAIL; -} - -/* - * Description - * Transmit xmitbuf to hardware tx fifo - * - * Return - * _SUCCESS ok - * _FAIL something error - */ -s32 rtl8188es_xmit_buf_handler(PADAPTER padapter) -{ - struct mlme_priv *pmlmepriv; - struct xmit_priv *pxmitpriv; - struct xmit_buf *pxmitbuf; - struct xmit_frame *pframe; - u8 *freePage; - u32 requiredPage; - u8 PageIdx , queue_empty; - _irqL irql; - u32 n; - s32 ret; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -#ifdef CONFIG_CONCURRENT_MODE - s32 buddy_rm_stop = _FAIL; -#endif - - pmlmepriv = &padapter->mlmepriv; - pxmitpriv = &padapter->xmitpriv; - freePage = pHalData->SdioTxFIFOFreePage; - - ret = _rtw_down_sema(&pxmitpriv->xmit_sema); - if (ret == _FAIL) { - RT_TRACE(_module_hal_xmit_c_, _drv_emerg_, ("down SdioXmitBufSema fail!\n")); - return _FAIL; - } - -//#ifdef CONFIG_CONCURRENT_MODE -// if (padapter->pbuddy_adapter->bup){ -// if ((padapter->pbuddy_adapter->bSurpriseRemoved == _TRUE) || -// (padapter->pbuddy_adapter->bDriverStopped == _TRUE)) -// buddy_rm_stop = _TRUE; -// } -//#endif - if ((padapter->bSurpriseRemoved == _TRUE) || - (padapter->bDriverStopped == _TRUE) -//#ifdef CONFIG_CONCURRENT_MODE -// ||(buddy_rm_stop == _TRUE) -//#endif - ) { - -#ifdef CONFIG_LPS_LCLK - rtw_unregister_tx_alive(padapter); -#endif - RT_TRACE(_module_hal_xmit_c_, _drv_notice_, - ("%s: bDriverStopped(%d) bSurpriseRemoved(%d)\n", - __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved)); - return _FAIL; - } - -#ifdef CONFIG_LPS_LCLK - ret = rtw_register_tx_alive(padapter); - if (ret != _SUCCESS) return _SUCCESS; -#endif - - do { - queue_empty = rtl8188es_dequeue_writeport(padapter, freePage); -// dump secondary adapter xmitbuf -#ifdef CONFIG_CONCURRENT_MODE - if(rtw_buddy_adapter_up(padapter)) - queue_empty &= rtl8188es_dequeue_writeport(padapter->pbuddy_adapter, freePage); -#endif - - } while ( !queue_empty); - -#ifdef CONFIG_LPS_LCLK - rtw_unregister_tx_alive(padapter); -#endif - return _SUCCESS; -} - -#if 0 -/* - * Description: - * Aggregation packets and send to hardware - * - * Return: - * 0 Success - * -1 Hardware resource(TX FIFO) not ready - * -2 Software resource(xmitbuf) not ready - */ -#ifdef CONFIG_TX_EARLY_MODE -#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 - #define EARLY_MODE_MAX_PKT_NUM 10 -#else - #define EARLY_MODE_MAX_PKT_NUM 5 -#endif - - -struct EMInfo{ - u8 EMPktNum; - u16 EMPktLen[EARLY_MODE_MAX_PKT_NUM]; -}; - - -void -InsertEMContent_8188E( - struct EMInfo *pEMInfo, - IN pu1Byte VirtualAddress) -{ - -#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 - u1Byte index=0; - u4Byte dwtmp=0; -#endif - - _rtw_memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE); - if(pEMInfo->EMPktNum==0) - return; - - #ifdef DBG_EMINFO - { - int i; - DBG_8192C("\n%s ==> pEMInfo->EMPktNum =%d\n",__FUNCTION__,pEMInfo->EMPktNum); - for(i=0;i< EARLY_MODE_MAX_PKT_NUM;i++){ - DBG_8192C("%s ==> pEMInfo->EMPktLen[%d] =%d\n",__FUNCTION__,i,pEMInfo->EMPktLen[i]); - } - - } - #endif - -#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 - SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); - - if(pEMInfo->EMPktNum == 1){ - dwtmp = pEMInfo->EMPktLen[0]; - }else{ - dwtmp = pEMInfo->EMPktLen[0]; - dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; - dwtmp += pEMInfo->EMPktLen[1]; - } - SET_EARLYMODE_LEN0(VirtualAddress, dwtmp); - if(pEMInfo->EMPktNum <= 3){ - dwtmp = pEMInfo->EMPktLen[2]; - }else{ - dwtmp = pEMInfo->EMPktLen[2]; - dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; - dwtmp += pEMInfo->EMPktLen[3]; - } - SET_EARLYMODE_LEN1(VirtualAddress, dwtmp); - if(pEMInfo->EMPktNum <= 5){ - dwtmp = pEMInfo->EMPktLen[4]; - }else{ - dwtmp = pEMInfo->EMPktLen[4]; - dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; - dwtmp += pEMInfo->EMPktLen[5]; - } - SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp&0xF); - SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp>>4); - if(pEMInfo->EMPktNum <= 7){ - dwtmp = pEMInfo->EMPktLen[6]; - }else{ - dwtmp = pEMInfo->EMPktLen[6]; - dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; - dwtmp += pEMInfo->EMPktLen[7]; - } - SET_EARLYMODE_LEN3(VirtualAddress, dwtmp); - if(pEMInfo->EMPktNum <= 9){ - dwtmp = pEMInfo->EMPktLen[8]; - }else{ - dwtmp = pEMInfo->EMPktLen[8]; - dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; - dwtmp += pEMInfo->EMPktLen[9]; - } - SET_EARLYMODE_LEN4(VirtualAddress, dwtmp); -#else - SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); - SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]); - SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]); - SET_EARLYMODE_LEN2_1(VirtualAddress, pEMInfo->EMPktLen[2]&0xF); - SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2]>>4); - SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]); - SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]); -#endif - //RT_PRINT_DATA(COMP_SEND, DBG_LOUD, "EMHdr:", VirtualAddress, 8); - -} - - - -void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ) -{ - //_adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq - int index,j; - u16 offset,pktlen; - PTXDESC ptxdesc; - - u8 *pmem,*pEMInfo_mem; - s8 node_num_0=0,node_num_1=0; - struct EMInfo eminfo; - struct agg_pkt_info *paggpkt; - struct xmit_frame *pframe = (struct xmit_frame*)pxmitbuf->priv_data; - pmem= pframe->buf_addr; - - #ifdef DBG_EMINFO - DBG_8192C("\n%s ==> agg_num:%d\n",__FUNCTION__, pframe->agg_num); - for(index=0;indexagg_num;index++){ - offset = pxmitpriv->agg_pkt[index].offset; - pktlen = pxmitpriv->agg_pkt[index].pkt_len; - DBG_8192C("%s ==> agg_pkt[%d].offset=%d\n",__FUNCTION__,index,offset); - DBG_8192C("%s ==> agg_pkt[%d].pkt_len=%d\n",__FUNCTION__,index,pktlen); - } - #endif - - if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM) - { - node_num_0 = pframe->agg_num; - node_num_1= EARLY_MODE_MAX_PKT_NUM-1; - } - - for(index=0;indexagg_num;index++){ - offset = pxmitpriv->agg_pkt[index].offset; - pktlen = pxmitpriv->agg_pkt[index].pkt_len; - - _rtw_memset(&eminfo,0,sizeof(struct EMInfo)); - if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM){ - if(node_num_0 > EARLY_MODE_MAX_PKT_NUM){ - eminfo.EMPktNum = EARLY_MODE_MAX_PKT_NUM; - node_num_0--; - } - else{ - eminfo.EMPktNum = node_num_1; - node_num_1--; - } - } - else{ - eminfo.EMPktNum = pframe->agg_num-(index+1); - } - for(j=0;j< eminfo.EMPktNum ;j++){ - eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index+1+j].pkt_len+4;//CRC - } - - if(pmem){ - ptxdesc = (PTXDESC)(pmem+offset); - pEMInfo_mem = pmem+offset+TXDESC_SIZE; - #ifdef DBG_EMINFO - DBG_8192C("%s ==> desc.pkt_len=%d\n",__FUNCTION__,ptxdesc->pktlen); - #endif - InsertEMContent_8188E(&eminfo,pEMInfo_mem); - } - - - } - _rtw_memset(pxmitpriv->agg_pkt,0,sizeof(struct agg_pkt_info)*MAX_AGG_PKT_NUM); - -} -#endif - -#endif - -#ifdef CONFIG_SDIO_TX_TASKLET -static s32 xmit_xmitframes(PADAPTER padapter, struct xmit_priv *pxmitpriv) -{ - s32 ret; - _irqL irqL; - struct xmit_buf *pxmitbuf; - struct hw_xmit *phwxmit = pxmitpriv->hwxmits; - struct tx_servq *ptxservq = NULL; - _list *xmitframe_plist = NULL, *xmitframe_phead = NULL; - struct xmit_frame *pxmitframe = NULL, *pfirstframe = NULL; - u32 pbuf = 0; // next pkt address - u32 pbuf_tail = 0; // last pkt tail - u32 txlen = 0; //packet length, except TXDESC_SIZE and PKT_OFFSET - u32 total_len = 0; - u8 ac_index = 0; - u8 bfirst = _TRUE;//first aggregation xmitframe - u8 bulkstart = _FALSE; -#ifdef CONFIG_TX_EARLY_MODE - u8 pkt_index=0; -#endif - - pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); - if (pxmitbuf == NULL) { - RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: xmit_buf is not enough!\n", __FUNCTION__)); - return _FALSE; - } - - do { - //3 1. pick up first frame - if(bfirst) - { - pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); - if (pxmitframe == NULL) { - // no more xmit frame, release xmit buffer - rtw_free_xmitbuf(pxmitpriv, pxmitbuf); - return _FALSE; - } - - pxmitframe->pxmitbuf = pxmitbuf; - pxmitframe->buf_addr = pxmitbuf->pbuf; - pxmitbuf->priv_data = pxmitframe; - pxmitbuf->ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); - - pfirstframe = pxmitframe; - - _enter_critical_bh(&pxmitpriv->lock, &irqL); - ptxservq = rtw_get_sta_pending(padapter, pfirstframe->attrib.psta, pfirstframe->attrib.priority, (u8 *)(&ac_index)); - _exit_critical_bh(&pxmitpriv->lock, &irqL); - } - //3 2. aggregate same priority and same DA(AP or STA) frames - else - { - // dequeue same priority packet from station tx queue - _enter_critical_bh(&pxmitpriv->lock, &irqL); - - if (_rtw_queue_empty(&ptxservq->sta_pending) == _FALSE) - { - xmitframe_phead = get_list_head(&ptxservq->sta_pending); - xmitframe_plist = get_next(xmitframe_phead); - - pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); - - // check xmit_buf size enough or not - txlen = TXDESC_SIZE + - #ifdef CONFIG_TX_EARLY_MODE - EARLY_MODE_INFO_SIZE + - #endif - rtw_wlan_pkt_size(pxmitframe); - - if (pbuf + _RND8(txlen) > MAX_XMITBUF_SZ) - { - bulkstart = _TRUE; - } - else - { - rtw_list_delete(&pxmitframe->list); - ptxservq->qcnt--; - phwxmit[ac_index].accnt--; - - //Remove sta node when there is no pending packets. - if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE) - rtw_list_delete(&ptxservq->tx_pending); - } - } - else - { - bulkstart = _TRUE; - } - - _exit_critical_bh(&pxmitpriv->lock, &irqL); - - if(bulkstart) - { - break; - } - - pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf; - - pxmitframe->agg_num = 0; // not first frame of aggregation - } - - ret = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); - if (ret == _FAIL) { - DBG_871X("%s: coalesce FAIL!", __FUNCTION__); - rtw_free_xmitframe(pxmitpriv, pxmitframe); - continue; - } - - // always return ndis_packet after rtw_xmitframe_coalesce - //rtw_os_xmit_complete(padapter, pxmitframe); - -#ifdef CONFIG_TX_EARLY_MODE - pxmitpriv->agg_pkt[pkt_index].pkt_len = pxmitframe->attrib.last_txcmdsz; //get from rtw_xmitframe_coalesce - pxmitpriv->agg_pkt[pkt_index].offset = _RND8(pxmitframe->attrib.last_txcmdsz+ TXDESC_SIZE+EARLY_MODE_INFO_SIZE); - pkt_index++; -#endif - - if(bfirst) - { - txlen = TXDESC_SIZE + - #ifdef CONFIG_TX_EARLY_MODE - EARLY_MODE_INFO_SIZE + - #endif - pxmitframe->attrib.last_txcmdsz; - - total_len = txlen; - - pxmitframe->pg_num = (txlen + 127)/128; - pxmitbuf->pg_num = (txlen + 127)/128; - pbuf_tail = txlen; - pbuf = _RND8(pbuf_tail); - bfirst = _FALSE; - } - else - { - rtl8188es_update_txdesc(pxmitframe, pxmitframe->buf_addr); - - // don't need xmitframe any more - rtw_free_xmitframe(pxmitpriv, pxmitframe); - - pxmitframe->pg_num = (txlen + 127)/128; - //pfirstframe->pg_num += pxmitframe->pg_num; - pxmitbuf->pg_num += (txlen + 127)/128; - - total_len += txlen; - - // handle pointer and stop condition - pbuf_tail = pbuf + txlen; - pbuf = _RND8(pbuf_tail); - - pfirstframe->agg_num++; - #ifdef SDIO_TX_AGG_MAX - if(pfirstframe->agg_num >= SDIO_TX_AGG_MAX) - break; - #endif - } - }while(1); - - //3 3. update first frame txdesc - rtl8188es_update_txdesc(pfirstframe, pfirstframe->buf_addr); -#ifdef CONFIG_TX_EARLY_MODE - UpdateEarlyModeInfo8188E(pxmitpriv,pxmitbuf ); -#endif - - // - pxmitbuf->agg_num = pfirstframe->agg_num; - pxmitbuf->priv_data = NULL; - - //3 4. write xmit buffer to USB FIFO - pxmitbuf->len = pbuf_tail; - enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); - - //3 5. update statisitc - rtw_count_tx_stats(padapter, pfirstframe, total_len); - - rtw_free_xmitframe(pxmitpriv, pfirstframe); - - //rtw_yield_os(); - - return _TRUE; -} - -void rtl8188es_xmit_tasklet(void *priv) -{ - int ret = _FALSE; - _adapter *padapter = (_adapter*)priv; - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - - while(1) - { - if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE) || (padapter->bWritePortCancel == _TRUE)) - { - DBG_871X("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n"); - break; - } - - ret = xmit_xmitframes(padapter, pxmitpriv); - if(ret==_FALSE) - break; - - } -} -#else -static s32 xmit_xmitframes(PADAPTER padapter, struct xmit_priv *pxmitpriv) -{ - u32 err, agg_num=0; - u8 pkt_index=0; - struct hw_xmit *hwxmits, *phwxmit; - u8 idx, hwentry; - _irqL irql; - struct tx_servq *ptxservq; - _list *sta_plist, *sta_phead, *frame_plist, *frame_phead; - struct xmit_frame *pxmitframe; - _queue *pframe_queue; - struct xmit_buf *pxmitbuf; - u32 txlen; - s32 ret; - int inx[4]; - - err = 0; - hwxmits = pxmitpriv->hwxmits; - hwentry = pxmitpriv->hwxmit_entry; - ptxservq = NULL; - pxmitframe = NULL; - pframe_queue = NULL; - pxmitbuf = NULL; - - if (padapter->registrypriv.wifi_spec == 1) { - for(idx=0; idx<4; idx++) - inx[idx] = pxmitpriv->wmm_para_seq[idx]; - } else { - inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3; - } - - // 0(VO), 1(VI), 2(BE), 3(BK) - for (idx = 0; idx < hwentry; idx++) - { - phwxmit = hwxmits + inx[idx]; - -// _enter_critical(&hwxmits->sta_queue->lock, &irqL0); - _enter_critical_bh(&pxmitpriv->lock, &irql); - - sta_phead = get_list_head(phwxmit->sta_queue); - sta_plist = get_next(sta_phead); - - while (rtw_end_of_queue_search(sta_phead, sta_plist) == _FALSE) - { - ptxservq = LIST_CONTAINOR(sta_plist, struct tx_servq, tx_pending); - - sta_plist = get_next(sta_plist); - - pframe_queue = &ptxservq->sta_pending; - -// _enter_critical(&pframe_queue->lock, &irqL1); - //_enter_critical_bh(&pxmitpriv->lock, &irql); - - frame_phead = get_list_head(pframe_queue); - frame_plist = get_next(frame_phead); - - while (rtw_end_of_queue_search(frame_phead, frame_plist) == _FALSE) - { - pxmitframe = LIST_CONTAINOR(frame_plist, struct xmit_frame, list); - - // check xmit_buf size enough or not - #ifdef CONFIG_TX_EARLY_MODE - txlen = TXDESC_SIZE +EARLY_MODE_INFO_SIZE+ rtw_wlan_pkt_size(pxmitframe); - #else - txlen = TXDESC_SIZE + rtw_wlan_pkt_size(pxmitframe); - #endif - if ((NULL == pxmitbuf) || - ((pxmitbuf->ptail + txlen) > pxmitbuf->pend) - #ifdef SDIO_TX_AGG_MAX - || (agg_num>= SDIO_TX_AGG_MAX) - #endif - ) - { - if (pxmitbuf) { - struct xmit_frame *pframe; - pframe = (struct xmit_frame*)pxmitbuf->priv_data; - pframe->agg_num = agg_num; - pxmitbuf->agg_num = agg_num; - //DBG_8192C("==> agg_num:%d\n",agg_num); - rtl8188es_update_txdesc(pframe, pframe->buf_addr); - #ifdef CONFIG_TX_EARLY_MODE - UpdateEarlyModeInfo8188E(pxmitpriv, pxmitbuf); - #endif - rtw_free_xmitframe(pxmitpriv, pframe); - pxmitbuf->priv_data = NULL; - enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); - //rtw_yield_os(); - } - - pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); - if (pxmitbuf == NULL) { - RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: xmit_buf is not enough!\n", __FUNCTION__)); - err = -2; - break; - } - agg_num = 0; - pkt_index =0; - } - - // ok to send, remove frame from queue - - - frame_plist = get_next(frame_plist); - rtw_list_delete(&pxmitframe->list); - ptxservq->qcnt--; - phwxmit->accnt--; - - - if (agg_num == 0) { - pxmitbuf->ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); - pxmitbuf->priv_data = (u8*)pxmitframe; - } - - // coalesce the xmitframe to xmitbuf - pxmitframe->pxmitbuf = pxmitbuf; - pxmitframe->buf_addr = pxmitbuf->ptail; - - ret = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); - if (ret == _FAIL) { - DBG_871X("%s: coalesce FAIL!", __FUNCTION__); - // Todo: error handler - //rtw_free_xmitframe(pxmitpriv, pxmitframe); - } else { - agg_num++; - if (agg_num != 1) - rtl8188es_update_txdesc(pxmitframe, pxmitframe->buf_addr); - rtw_count_tx_stats(padapter, pxmitframe, pxmitframe->attrib.last_txcmdsz); - #ifdef CONFIG_TX_EARLY_MODE - txlen = TXDESC_SIZE+ EARLY_MODE_INFO_SIZE+ pxmitframe->attrib.last_txcmdsz; - #else - txlen = TXDESC_SIZE + pxmitframe->attrib.last_txcmdsz; - #endif - pxmitframe->pg_num = (txlen + 127)/128; - pxmitbuf->pg_num += (txlen + 127)/128; - //if (agg_num != 1) - //((struct xmit_frame*)pxmitbuf->priv_data)->pg_num += pxmitframe->pg_num; - - #ifdef CONFIG_TX_EARLY_MODE - pxmitpriv->agg_pkt[pkt_index].pkt_len = pxmitframe->attrib.last_txcmdsz; //get from rtw_xmitframe_coalesce - pxmitpriv->agg_pkt[pkt_index].offset = _RND8(pxmitframe->attrib.last_txcmdsz+ TXDESC_SIZE+EARLY_MODE_INFO_SIZE); - #endif - - pkt_index++; - pxmitbuf->ptail += _RND(txlen, 8); // round to 8 bytes alignment - pxmitbuf->len = _RND(pxmitbuf->len, 8) + txlen; - } - - if (agg_num != 1) - rtw_free_xmitframe(pxmitpriv, pxmitframe); - pxmitframe = NULL; - } - - if (_rtw_queue_empty(pframe_queue)) { - rtw_list_delete(&ptxservq->tx_pending); - } - -// _exit_critical(&pframe_queue->lock, &irqL1); - //_exit_critical_bh(&pxmitpriv->lock, &irql); - - } - -// _exit_critical(&hwxmits->sta_queue->lock, &irqL0); - _exit_critical_bh(&pxmitpriv->lock, &irql); - - // dump xmit_buf to hw tx fifo - if (pxmitbuf) - { - RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("pxmitbuf->len=%d enqueue\n",pxmitbuf->len)); - - if (pxmitbuf->len > 0) { - struct xmit_frame *pframe; - pframe = (struct xmit_frame*)pxmitbuf->priv_data; - pframe->agg_num = agg_num; - pxmitbuf->agg_num = agg_num; - rtl8188es_update_txdesc(pframe, pframe->buf_addr); - #ifdef CONFIG_TX_EARLY_MODE - UpdateEarlyModeInfo8188E(pxmitpriv,pxmitbuf ); - #endif - rtw_free_xmitframe(pxmitpriv, pframe); - pxmitbuf->priv_data = NULL; - enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); - rtw_yield_os(); - } - else - rtw_free_xmitbuf(pxmitpriv, pxmitbuf); - - pxmitbuf = NULL; - - } - - } - - return err; - -} - -/* - * Description - * Transmit xmitframe from queue - * - * Return - * _SUCCESS ok - * _FAIL something error - */ -s32 rtl8188es_xmit_handler(PADAPTER padapter) -{ - struct xmit_priv *pxmitpriv = &padapter->xmitpriv ; - s32 ret; - _irqL irql; -//#ifdef CONFIG_CONCURRENT_MODE -// s32 buddy_rm_stop = _FAIL; -//#endif - - -wait: - ret = _rtw_down_sema(&pxmitpriv->SdioXmitSema); - if (_FAIL == ret) { - RT_TRACE(_module_hal_xmit_c_, _drv_emerg_, ("%s: down sema fail!\n", __FUNCTION__)); - return _FAIL; - } - -next: -//#ifdef CONFIG_CONCURRENT_MODE -// if (padapter->pbuddy_adapter){ -// if ((padapter->pbuddy_adapter->bSurpriseRemoved == _TRUE) || -// (padapter->pbuddy_adapter->bDriverStopped == _TRUE)) -// buddy_rm_stop = _TRUE; -// } -//#endif - if ((padapter->bSurpriseRemoved == _TRUE) || - (padapter->bDriverStopped == _TRUE) -//#ifdef CONFIG_CONCURRENT_MODE -// ||(buddy_rm_stop == _TRUE) -//#endif - ) { - RT_TRACE(_module_hal_xmit_c_, _drv_notice_, - ("%s: bDriverStopped(%d) bSurpriseRemoved(%d)\n", - __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved)); - return _FAIL; - } - _enter_critical_bh(&pxmitpriv->lock, &irql); - ret = rtw_txframes_pending(padapter); - _exit_critical_bh(&pxmitpriv->lock, &irql); - if (ret == 0) { - return _SUCCESS; - } - // dequeue frame and write to hardware - - ret = xmit_xmitframes(padapter, pxmitpriv); - if (ret == -2) { - rtw_msleep_os(1); - goto next; - } - _enter_critical_bh(&pxmitpriv->lock, &irql); - ret = rtw_txframes_pending(padapter); - _exit_critical_bh(&pxmitpriv->lock, &irql); - if (ret == 1) { - rtw_msleep_os(1); - goto next; - } - - return _SUCCESS; -} - -thread_return rtl8188es_xmit_thread(thread_context context) -{ - s32 ret; - PADAPTER padapter= (PADAPTER)context; - struct xmit_priv *pxmitpriv= &padapter->xmitpriv; - - ret = _SUCCESS; - - thread_enter("RTWHALXT"); - - DBG_871X("start %s\n", __FUNCTION__); - - do { - ret = rtl8188es_xmit_handler(padapter); - if (signal_pending(current)) { - flush_signals(current); - } - } while (_SUCCESS == ret); - - _rtw_up_sema(&pxmitpriv->SdioXmitTerminateSema); - - RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("-%s\n", __FUNCTION__)); - DBG_871X("exit %s\n", __FUNCTION__); - - thread_exit(); -} -#endif - -#ifdef CONFIG_IOL_IOREG_CFG_DBG -#include -#endif -s32 rtl8188es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe) -{ - s32 ret = _SUCCESS; - struct pkt_attrib *pattrib; - struct xmit_buf *pxmitbuf; - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); - u8 *pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; - u8 pattrib_subtype; - - RT_TRACE(_module_hal_xmit_c_, _drv_info_, ("+%s\n", __FUNCTION__)); - - pattrib = &pmgntframe->attrib; - pxmitbuf = pmgntframe->pxmitbuf; - - rtl8188es_update_txdesc(pmgntframe, pmgntframe->buf_addr); - - pxmitbuf->len = TXDESC_SIZE + pattrib->last_txcmdsz; - //pmgntframe->pg_num = (pxmitbuf->len + 127)/128; // 128 is tx page size - pxmitbuf->pg_num = (pxmitbuf->len + 127)/128; // 128 is tx page size - pxmitbuf->ptail = pmgntframe->buf_addr + pxmitbuf->len; - pxmitbuf->ff_hwaddr = rtw_get_ff_hwaddr(pmgntframe); - - rtw_count_tx_stats(padapter, pmgntframe, pattrib->last_txcmdsz); - pattrib_subtype = pattrib->subtype; - rtw_free_xmitframe(pxmitpriv, pmgntframe); - - pxmitbuf->priv_data = NULL; - - if((pattrib_subtype == WIFI_BEACON) || (GetFrameSubType(pframe)==WIFI_BEACON)) //dump beacon directly - { -#ifdef CONFIG_IOL_IOREG_CFG_DBG - rtw_IOL_cmd_buf_dump(padapter,pxmitbuf->len,pxmitbuf->pdata); -#endif - - rtw_write_port(padapter, ffaddr2deviceId(pdvobjpriv, pxmitbuf->ff_hwaddr), pxmitbuf->len, (u8 *)pxmitbuf); - - //rtw_free_xmitframe(pxmitpriv, pmgntframe); - - //pxmitbuf->priv_data = NULL; - - rtw_free_xmitbuf(pxmitpriv, pxmitbuf); - } - else - { - enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); - } - - if (ret != _SUCCESS) - rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN); - - return ret; -} - -/* - * Description: - * Handle xmitframe(packet) come from rtw_xmit() - * - * Return: - * _TRUE dump packet directly ok - * _FALSE enqueue, temporary can't transmit packets to hardware - */ -s32 rtl8188es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe) -{ - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - _irqL irql; - s32 err; - - //pxmitframe->attrib.qsel = pxmitframe->attrib.priority; - -#ifdef CONFIG_80211N_HT - if ((pxmitframe->frame_tag == DATA_FRAMETAG) && - (pxmitframe->attrib.ether_type != 0x0806) && - (pxmitframe->attrib.ether_type != 0x888e) && - (pxmitframe->attrib.dhcp_pkt != 1)) - { - if (padapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE) - rtw_issue_addbareq_cmd(padapter, pxmitframe); - } -#endif - - _enter_critical_bh(&pxmitpriv->lock, &irql); - err = rtw_xmitframe_enqueue(padapter, pxmitframe); - _exit_critical_bh(&pxmitpriv->lock, &irql); - if (err != _SUCCESS) { - RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: enqueue xmitframe fail\n",__FUNCTION__)); - rtw_free_xmitframe(pxmitpriv, pxmitframe); - - // Trick, make the statistics correct - pxmitpriv->tx_pkts--; - pxmitpriv->tx_drop++; - return _TRUE; - } - -#ifdef CONFIG_SDIO_TX_TASKLET - tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); -#else - _rtw_up_sema(&pxmitpriv->SdioXmitSema); -#endif - - return _FALSE; -} - -s32 rtl8188es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) -{ - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - s32 err; - - if ((err=rtw_xmitframe_enqueue(padapter, pxmitframe)) != _SUCCESS) - { - rtw_free_xmitframe(pxmitpriv, pxmitframe); - - // Trick, make the statistics correct - pxmitpriv->tx_pkts--; - pxmitpriv->tx_drop++; - } - else - { -#ifdef CONFIG_SDIO_TX_TASKLET - tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); -#else - _rtw_up_sema(&pxmitpriv->SdioXmitSema); -#endif - } - - return err; - -} - - -/* - * Return - * _SUCCESS start thread ok - * _FAIL start thread fail - * - */ -s32 rtl8188es_init_xmit_priv(PADAPTER padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - -#ifdef CONFIG_SDIO_TX_TASKLET - tasklet_init(&pxmitpriv->xmit_tasklet, - (void(*)(unsigned long))rtl8188es_xmit_tasklet, - (unsigned long)padapter); -#else //CONFIG_SDIO_TX_TASKLET - - _rtw_init_sema(&pxmitpriv->SdioXmitSema, 0); - _rtw_init_sema(&pxmitpriv->SdioXmitTerminateSema, 0); -#endif //CONFIG_SDIO_TX_TASKLET - - _rtw_spinlock_init(&pHalData->SdioTxFIFOFreePageLock); - -#ifdef CONFIG_TX_EARLY_MODE - pHalData->bEarlyModeEnable = padapter->registrypriv.early_mode; -#endif - - return _SUCCESS; -} - -void rtl8188es_free_xmit_priv(PADAPTER padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - _rtw_spinlock_free(&pHalData->SdioTxFIFOFreePageLock); -} - diff --git a/hal/rtl8188e/sdio/sdio_halinit.c b/hal/rtl8188e/sdio/sdio_halinit.c deleted file mode 100755 index c3ae471..0000000 --- a/hal/rtl8188e/sdio/sdio_halinit.c +++ /dev/null @@ -1,4218 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _SDIO_HALINIT_C_ - -#include -#include -#include - -#ifndef CONFIG_SDIO_HCI -#error "CONFIG_SDIO_HCI shall be on!\n" -#endif - -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_EFUSE_CONFIG_FILE -#include -#include -#endif //CONFIG_EFUSE_CONFIG_FILE - - -/* - * Description: - * Call this function to make sure power on successfully - * - * Return: - * _SUCCESS enable success - * _FAIL enable fail - */ - -static int PowerOnCheck(PADAPTER padapter) -{ - u32 val_offset0, val_offset1, val_offset2, val_offset3; - u32 val_mix = 0; - u32 res = 0; - u8 ret = _FAIL; - int index = 0; - - val_offset0 = rtw_read8(padapter, REG_CR); - val_offset1 = rtw_read8(padapter, REG_CR+1); - val_offset2 = rtw_read8(padapter, REG_CR+2); - val_offset3 = rtw_read8(padapter, REG_CR+3); - - if (val_offset0 == 0xEA || val_offset1 == 0xEA || - val_offset2 == 0xEA || val_offset3 ==0xEA) { - DBG_871X("%s: power on fail, do Power on again\n", __func__); - return ret; - } - - val_mix = val_offset3 << 24 | val_mix; - val_mix = val_offset2 << 16 | val_mix; - val_mix = val_offset1 << 8 | val_mix; - val_mix = val_offset0 | val_mix; - - res = rtw_read32(padapter, REG_CR); - - DBG_871X("%s: val_mix:0x%08x, res:0x%08x\n", __func__, val_mix, res); - - while(index < 100) { - if (res == val_mix) { - DBG_871X("%s: 0x100 the result of cmd52 and cmd53 is the same.\n", __func__); - ret = _SUCCESS; - break; - } else { - DBG_871X("%s: 0x100 cmd52 and cmd53 is not the same(index:%d).\n", __func__, index); - res = rtw_read32(padapter, REG_CR); - index ++; - ret = _FAIL; - } - } - - if (ret) { - index = 0; - while(index < 100) { - rtw_write32(padapter, 0x1B8, 0x12345678); - res = rtw_read32(padapter, 0x1B8); - if (res == 0x12345678) { - DBG_871X("%s: 0x1B8 test Pass.\n", __func__); - ret = _SUCCESS; - break; - } else { - index ++; - DBG_871X("%s: 0x1B8 test Fail(index: %d).\n", __func__, index); - ret = _FAIL; - } - } - } else { - DBG_871X("%s: fail at cmd52, cmd53.\n", __func__); - } - return ret; -} - -#ifdef CONFIG_EXT_CLK -void EnableGpio5ClockReq(PADAPTER Adapter, u8 in_interrupt, u32 Enable) -{ - u32 value32; - HAL_DATA_TYPE *pHalData; - - pHalData = GET_HAL_DATA(Adapter); - if(IS_D_CUT(pHalData->VersionID)) - return; - - //dbgdump("%s Enable:%x time:%d", __RTL_FUNC__, Enable, rtw_get_current_time()); - - if(in_interrupt) - value32 = _sdio_read32(Adapter, REG_GPIO_PIN_CTRL); - else - value32 = rtw_read32(Adapter, REG_GPIO_PIN_CTRL); - - //open GPIO 5 - if (Enable) - value32 |= BIT(13);//5+8 - else - value32 &= ~BIT(13); - - //GPIO 5 out put - value32 |= BIT(21);//5+16 - - //if (Enable) - // rtw_write8(Adapter, REG_GPIO_PIN_CTRL + 1, 0x20); - //else - // rtw_write8(Adapter, REG_GPIO_PIN_CTRL + 1, 0x00); - - if(in_interrupt) - _sdio_write32(Adapter, REG_GPIO_PIN_CTRL, value32); - else - rtw_write32(Adapter, REG_GPIO_PIN_CTRL, value32); - -} //end of _rtl8192cs_disable_gpio() - -void _InitClockTo26MHz( - IN PADAPTER Adapter - ) -{ - u8 u1temp = 0; - HAL_DATA_TYPE *pHalData; - - pHalData = GET_HAL_DATA(Adapter); - - if(IS_D_CUT(pHalData->VersionID)) { - //FW special init - u1temp = rtw_read8(Adapter, REG_XCK_OUT_CTRL); - u1temp |= 0x18; - rtw_write8(Adapter, REG_XCK_OUT_CTRL, u1temp); - MSG_8192C("D cut version\n"); - } - - EnableGpio5ClockReq(Adapter, _FALSE, 1); - - //0x2c[3:0] = 5 will set clock to 26MHz - u1temp = rtw_read8(Adapter, REG_APE_PLL_CTRL_EXT); - u1temp = (u1temp & 0xF0) | 0x05; - rtw_write8(Adapter, REG_APE_PLL_CTRL_EXT, u1temp); -} -#endif - - -static void rtl8188es_interface_configure(PADAPTER padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); - struct registry_priv *pregistrypriv = &padapter->registrypriv; - BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; - - - pdvobjpriv->RtOutPipe[0] = WLAN_TX_HIQ_DEVICE_ID; - pdvobjpriv->RtOutPipe[1] = WLAN_TX_MIQ_DEVICE_ID; - pdvobjpriv->RtOutPipe[2] = WLAN_TX_LOQ_DEVICE_ID; - - if (bWiFiConfig) - pHalData->OutEpNumber = 2; - else - pHalData->OutEpNumber = SDIO_MAX_TX_QUEUE; - - switch(pHalData->OutEpNumber){ - case 3: - pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_LQ|TX_SELE_NQ; - break; - case 2: - pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_NQ; - break; - case 1: - pHalData->OutEpQueueSel=TX_SELE_HQ; - break; - default: - break; - } - - Hal_MappingOutPipe(padapter, pHalData->OutEpNumber); -} - -/* - * Description: - * Call power on sequence to enable card - * - * Return: - * _SUCCESS enable success - * _FAIL enable fail - */ -static u8 _CardEnable(PADAPTER padapter) -{ - u8 bMacPwrCtrlOn; - u8 ret; - - DBG_871X("=>%s\n", __FUNCTION__); - - rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - if (bMacPwrCtrlOn == _FALSE) - { -#ifdef CONFIG_PLATFORM_SPRD - u8 val8; -#endif // CONFIG_PLATFORM_SPRD - - // RSV_CTRL 0x1C[7:0] = 0x00 - // unlock ISO/CLK/Power control register - rtw_write8(padapter, REG_RSV_CTRL, 0x0); - -#ifdef CONFIG_PLATFORM_SPRD -#ifdef CONFIG_EXT_CLK - _InitClockTo26MHz(padapter); -#endif //CONFIG_EXT_CLK - - val8 = rtw_read8(padapter, 0x4); - val8 = val8 & ~BIT(5); - rtw_write8(padapter, 0x4, val8); -#endif // CONFIG_PLATFORM_SPRD - - ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, Rtl8188E_NIC_ENABLE_FLOW); - if (ret == _SUCCESS) { - u8 bMacPwrCtrlOn = _TRUE; - rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - } - else - { - DBG_871X(KERN_ERR "%s: run power on flow fail\n", __func__); - return _FAIL; - } - - } - else - { - ret = _SUCCESS; - } - - DBG_871X("<=%s\n", __FUNCTION__); - - return ret; - -} - -static u32 InitPowerOn_rtl8188es(PADAPTER padapter) -{ - u8 value8; - u16 value16; - u32 value32; - u8 ret; - - DBG_871X("=>%s\n", __FUNCTION__); - - ret = _CardEnable(padapter); - if (ret == _FAIL) { - return ret; - } - -/* - // Radio-Off Pin Trigger - value8 = rtw_read8(padapter, REG_GPIO_INTM+1); - value8 |= BIT(1); // Enable falling edge triggering interrupt - rtw_write8(padapter, REG_GPIO_INTM+1, value8); - value8 = rtw_read8(padapter, REG_GPIO_IO_SEL_2+1); - value8 |= BIT(1); - rtw_write8(padapter, REG_GPIO_IO_SEL_2+1, value8); -*/ - - // Enable power down and GPIO interrupt - value16 = rtw_read16(padapter, REG_APS_FSMCO); - value16 |= EnPDN; // Enable HW power down and RF on - rtw_write16(padapter, REG_APS_FSMCO, value16); - - - // Enable MAC DMA/WMAC/SCHEDULE/SEC block - value16 = rtw_read16(padapter, REG_CR); - value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN - | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN); - // for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. - - rtw_write16(padapter, REG_CR, value16); - - - - // Enable CMD53 R/W Operation -// bMacPwrCtrlOn = TRUE; -// rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, (pu8)(&bMacPwrCtrlOn)); - - DBG_871X("<=%s\n", __FUNCTION__); - - return _SUCCESS; - -} - -static void _InitQueueReservedPage(PADAPTER padapter) -{ -#ifdef RTL8188ES_MAC_LOOPBACK - -//#define MAC_LOOPBACK_PAGE_NUM_PUBQ 0x26 -//#define MAC_LOOPBACK_PAGE_NUM_HPQ 0x0b -//#define MAC_LOOPBACK_PAGE_NUM_LPQ 0x0b -//#define MAC_LOOPBACK_PAGE_NUM_NPQ 0x0b // 71 pages=>9088 bytes, 8.875k - - rtw_write16(padapter, REG_RQPN_NPQ, 0x0b0b); - rtw_write32(padapter, REG_RQPN, 0x80260b0b); - -#else //TX_PAGE_BOUNDARY_LOOPBACK_MODE - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct registry_priv *pregistrypriv = &padapter->registrypriv; - u32 outEPNum = (u32)pHalData->OutEpNumber; - u32 numHQ = 0; - u32 numLQ = 0; - u32 numNQ = 0; - u32 numPubQ; - u32 value32; - u8 value8; - BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; - - if(bWiFiConfig) - { - if (pHalData->OutEpQueueSel & TX_SELE_HQ) - { - numHQ = 0x29; - } - - if (pHalData->OutEpQueueSel & TX_SELE_LQ) - { - numLQ = 0x1C; - } - - // NOTE: This step shall be proceed before writting REG_RQPN. - if (pHalData->OutEpQueueSel & TX_SELE_NQ) { - numNQ = 0x1C; - } - value8 = (u8)_NPQ(numNQ); - rtw_write8(padapter, REG_RQPN_NPQ, value8); - - numPubQ = 0xA9 - numHQ - numLQ - numNQ; - - // TX DMA - value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN; - rtw_write32(padapter, REG_RQPN, value32); - } - else - { - rtw_write16(padapter, REG_RQPN_NPQ, 0x0000); - rtw_write32(padapter,REG_RQPN, 0x80a00900); - } -#endif - return; -} - -static void _InitTxBufferBoundary(PADAPTER padapter, u8 txpktbuf_bndy) -{ - struct registry_priv *pregistrypriv = &padapter->registrypriv; - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - //u16 txdmactrl; - - rtw_write8(padapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy); - rtw_write8(padapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy); - rtw_write8(padapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy); - rtw_write8(padapter, REG_TRXFF_BNDY, txpktbuf_bndy); - rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy); - -} - -static VOID -_InitNormalChipRegPriority( - IN PADAPTER Adapter, - IN u16 beQ, - IN u16 bkQ, - IN u16 viQ, - IN u16 voQ, - IN u16 mgtQ, - IN u16 hiQ - ) -{ - u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7); - - value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | - _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | - _TXDMA_MGQ_MAP(mgtQ)| _TXDMA_HIQ_MAP(hiQ); - - rtw_write16(Adapter, REG_TRXDMA_CTRL, value16); -} - -static VOID -_InitNormalChipOneOutEpPriority( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - u16 value = 0; - switch(pHalData->OutEpQueueSel) - { - case TX_SELE_HQ: - value = QUEUE_HIGH; - break; - case TX_SELE_LQ: - value = QUEUE_LOW; - break; - case TX_SELE_NQ: - value = QUEUE_NORMAL; - break; - default: - //RT_ASSERT(FALSE,("Shall not reach here!\n")); - break; - } - - _InitNormalChipRegPriority(Adapter, - value, - value, - value, - value, - value, - value - ); - -} - -static VOID -_InitNormalChipTwoOutEpPriority( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct registry_priv *pregistrypriv = &Adapter->registrypriv; - u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; - - - u16 valueHi = 0; - u16 valueLow = 0; - - switch(pHalData->OutEpQueueSel) - { - case (TX_SELE_HQ | TX_SELE_LQ): - valueHi = QUEUE_HIGH; - valueLow = QUEUE_LOW; - break; - case (TX_SELE_NQ | TX_SELE_LQ): - valueHi = QUEUE_NORMAL; - valueLow = QUEUE_LOW; - break; - case (TX_SELE_HQ | TX_SELE_NQ): - valueHi = QUEUE_HIGH; - valueLow = QUEUE_NORMAL; - break; - default: - //RT_ASSERT(FALSE,("Shall not reach here!\n")); - break; - } - - if(!pregistrypriv->wifi_spec ){ - beQ = valueLow; - bkQ = valueLow; - viQ = valueHi; - voQ = valueHi; - mgtQ = valueHi; - hiQ = valueHi; - } - else{//for WMM ,CONFIG_OUT_EP_WIFI_MODE - beQ = valueLow; - bkQ = valueHi; - viQ = valueHi; - voQ = valueLow; - mgtQ = valueHi; - hiQ = valueHi; - } - - _InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); - -} - -static VOID -_InitNormalChipThreeOutEpPriority( - IN PADAPTER padapter - ) -{ - struct registry_priv *pregistrypriv = &padapter->registrypriv; - u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ; - - if (!pregistrypriv->wifi_spec){// typical setting - beQ = QUEUE_LOW; - bkQ = QUEUE_LOW; - viQ = QUEUE_NORMAL; - voQ = QUEUE_HIGH; - mgtQ = QUEUE_HIGH; - hiQ = QUEUE_HIGH; - } - else {// for WMM - beQ = QUEUE_LOW; - bkQ = QUEUE_NORMAL; - viQ = QUEUE_NORMAL; - voQ = QUEUE_HIGH; - mgtQ = QUEUE_HIGH; - hiQ = QUEUE_HIGH; - } - _InitNormalChipRegPriority(padapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); -} - -static VOID -_InitNormalChipQueuePriority( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - switch(pHalData->OutEpNumber) - { - case 1: - _InitNormalChipOneOutEpPriority(Adapter); - break; - case 2: - _InitNormalChipTwoOutEpPriority(Adapter); - break; - case 3: - _InitNormalChipThreeOutEpPriority(Adapter); - break; - default: - //RT_ASSERT(FALSE,("Shall not reach here!\n")); - break; - } - - -} - - -static void _InitQueuePriority(PADAPTER padapter) -{ - _InitNormalChipQueuePriority(padapter); -} - -static void _InitPageBoundary(PADAPTER padapter) -{ - // RX Page Boundary - u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E-1; - - rtw_write16(padapter, (REG_TRXFF_BNDY + 2), rxff_bndy); - -} - -static void _InitTransferPageSize(PADAPTER padapter) -{ - // Tx page size is always 128. - - u8 value8; - value8 = _PSRX(PBP_128) | _PSTX(PBP_128); - rtw_write8(padapter, REG_PBP, value8); -} - -void _InitDriverInfoSize(PADAPTER padapter, u8 drvInfoSize) -{ - rtw_write8(padapter, REG_RX_DRVINFO_SZ, drvInfoSize); -} - -void _InitNetworkType(PADAPTER padapter) -{ - u32 value32; - - value32 = rtw_read32(padapter, REG_CR); - - // TODO: use the other function to set network type -// value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AD_HOC); - value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP); - - rtw_write32(padapter, REG_CR, value32); -} - -void _InitWMACSetting(PADAPTER padapter) -{ - u16 value16; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - - //pHalData->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | RCR_CBSSID_BCN | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_PHYSTS | RCR_APP_ICV | RCR_APP_MIC; - // don't turn on AAP, it will allow all packets to driver - pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | RCR_CBSSID_BCN | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_PHYST_RXFF | RCR_APP_ICV | RCR_APP_MIC; - - rtw_write32(padapter, REG_RCR, pHalData->ReceiveConfig); - - // Accept all data frames - value16 = 0xFFFF; - rtw_write16(padapter, REG_RXFLTMAP2, value16); - - // 2010.09.08 hpfan - // Since ADF is removed from RCR, ps-poll will not be indicate to driver, - // RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. - value16 = 0x400; - rtw_write16(padapter, REG_RXFLTMAP1, value16); - - // Accept all management frames - value16 = 0xFFFF; - rtw_write16(padapter, REG_RXFLTMAP0, value16); - -} - -void _InitAdaptiveCtrl(PADAPTER padapter) -{ - u16 value16; - u32 value32; - - // Response Rate Set - value32 = rtw_read32(padapter, REG_RRSR); - value32 &= ~RATE_BITMAP_ALL; - value32 |= RATE_RRSR_CCK_ONLY_1M; - rtw_write32(padapter, REG_RRSR, value32); - - // CF-END Threshold - //m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1); - - // SIFS (used in NAV) - value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10); - rtw_write16(padapter, REG_SPEC_SIFS, value16); - - // Retry Limit - value16 = _LRL(0x30) | _SRL(0x30); - rtw_write16(padapter, REG_RL, value16); -} - -void _InitEDCA(PADAPTER padapter) -{ - // Set Spec SIFS (used in NAV) - rtw_write16(padapter, REG_SPEC_SIFS, 0x100a); - rtw_write16(padapter, REG_MAC_SPEC_SIFS, 0x100a); - - // Set SIFS for CCK - rtw_write16(padapter, REG_SIFS_CTX, 0x100a); - - // Set SIFS for OFDM - rtw_write16(padapter, REG_SIFS_TRX, 0x100a); - - // TXOP - rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x005EA42B); - rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A44F); - rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005EA324); - rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002FA226); -} - -void _InitRateFallback(PADAPTER padapter) -{ - // Set Data Auto Rate Fallback Retry Count register. - rtw_write32(padapter, REG_DARFRC, 0x00000000); - rtw_write32(padapter, REG_DARFRC+4, 0x10080404); - rtw_write32(padapter, REG_RARFRC, 0x04030201); - rtw_write32(padapter, REG_RARFRC+4, 0x08070605); - -} - -void _InitRetryFunction(PADAPTER padapter) -{ - u8 value8; - - value8 = rtw_read8(padapter, REG_FWHW_TXQ_CTRL); - value8 |= EN_AMPDU_RTY_NEW; - rtw_write8(padapter, REG_FWHW_TXQ_CTRL, value8); - - // Set ACK timeout - rtw_write8(padapter, REG_ACKTO, 0x40); -} - -static void HalRxAggr8188ESdio(PADAPTER padapter) -{ -#if 1 - struct registry_priv *pregistrypriv; - u8 valueDMATimeout; - u8 valueDMAPageCount; - - - pregistrypriv = &padapter->registrypriv; - - if (pregistrypriv->wifi_spec) - { - // 2010.04.27 hpfan - // Adjust RxAggrTimeout to close to zero disable RxAggr, suggested by designer - // Timeout value is calculated by 34 / (2^n) - valueDMATimeout = 0x0f; - valueDMAPageCount = 0x01; - } - else - { - valueDMATimeout = 0x06; - //valueDMAPageCount = 0x0F; - //valueDMATimeout = 0x0a; - valueDMAPageCount = 0x24; - } - - rtw_write8(padapter, REG_RXDMA_AGG_PG_TH+1, valueDMATimeout); - rtw_write8(padapter, REG_RXDMA_AGG_PG_TH, valueDMAPageCount); -#endif -} - -void sdio_AggSettingRxUpdate(PADAPTER padapter) -{ -#if 1 - //HAL_DATA_TYPE *pHalData; - u8 valueDMA; - - - //pHalData = GET_HAL_DATA(padapter); - - valueDMA = rtw_read8(padapter, REG_TRXDMA_CTRL); - valueDMA |= RXDMA_AGG_EN; - rtw_write8(padapter, REG_TRXDMA_CTRL, valueDMA); - -#if 0 - switch (RX_PAGE_SIZE_REG_VALUE) - { - case PBP_64: - pHalData->HwRxPageSize = 64; - break; - case PBP_128: - pHalData->HwRxPageSize = 128; - break; - case PBP_256: - pHalData->HwRxPageSize = 256; - break; - case PBP_512: - pHalData->HwRxPageSize = 512; - break; - case PBP_1024: - pHalData->HwRxPageSize = 1024; - break; - default: - RT_TRACE(_module_hci_hal_init_c_, _drv_err_, - ("%s: RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n", __FUNCTION__)); - break; - } -#endif -#endif -} - -void _initSdioAggregationSetting(PADAPTER padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - // Tx aggregation setting - //sdio_AggSettingTxUpdate(padapter); - - // Rx aggregation setting - HalRxAggr8188ESdio(padapter); - sdio_AggSettingRxUpdate(padapter); - - // 201/12/10 MH Add for USB agg mode dynamic switch. - pHalData->UsbRxHighSpeedMode = _FALSE; -} - - -void _InitOperationMode(PADAPTER padapter) -{ - PHAL_DATA_TYPE pHalData; - struct mlme_ext_priv *pmlmeext; - u8 regBwOpMode = 0; - u32 regRATR = 0, regRRSR = 0; - u8 MinSpaceCfg; - - - pHalData = GET_HAL_DATA(padapter); - pmlmeext = &padapter->mlmeextpriv; - - //1 This part need to modified according to the rate set we filtered!! - // - // Set RRSR, RATR, and REG_BWOPMODE registers - // - switch(pmlmeext->cur_wireless_mode) - { - case WIRELESS_MODE_B: - regBwOpMode = BW_OPMODE_20MHZ; - regRATR = RATE_ALL_CCK; - regRRSR = RATE_ALL_CCK; - break; - case WIRELESS_MODE_A: -// RT_ASSERT(FALSE,("Error wireless a mode\n")); -#if 0 - regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ; - regRATR = RATE_ALL_OFDM_AG; - regRRSR = RATE_ALL_OFDM_AG; -#endif - break; - case WIRELESS_MODE_G: - regBwOpMode = BW_OPMODE_20MHZ; - regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; - regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; - break; - case WIRELESS_MODE_AUTO: -#if 0 - if (padapter->bInHctTest) - { - regBwOpMode = BW_OPMODE_20MHZ; - regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; - regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; - } - else -#endif - { - regBwOpMode = BW_OPMODE_20MHZ; - regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; - regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; - } - break; - case WIRELESS_MODE_N_24G: - // It support CCK rate by default. - // CCK rate will be filtered out only when associated AP does not support it. - regBwOpMode = BW_OPMODE_20MHZ; - regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; - regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; - break; - case WIRELESS_MODE_N_5G: -// RT_ASSERT(FALSE,("Error wireless mode")); -#if 0 - regBwOpMode = BW_OPMODE_5G; - regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; - regRRSR = RATE_ALL_OFDM_AG; -#endif - break; - - default: //for MacOSX compiler warning. - break; - } - - rtw_write8(padapter, REG_BWOPMODE, regBwOpMode); - - // For Min Spacing configuration. - switch(pHalData->rf_type) - { - case RF_1T2R: - case RF_1T1R: - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializepadapter: RF_Type%s\n", (pHalData->rf_type==RF_1T1R? "(1T1R)":"(1T2R)"))); -// padapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3); - MinSpaceCfg = (MAX_MSS_DENSITY_1T << 3); - break; - case RF_2T2R: - case RF_2T2R_GREEN: - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializepadapter:RF_Type(2T2R)\n")); -// padapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3); - MinSpaceCfg = (MAX_MSS_DENSITY_2T << 3); - break; - } - -// rtw_write8(padapter, REG_AMPDU_MIN_SPACE, padapter->MgntInfo.MinSpaceCfg); - rtw_write8(padapter, REG_AMPDU_MIN_SPACE, MinSpaceCfg); -} - - -void _InitBeaconParameters(PADAPTER padapter) -{ - PHAL_DATA_TYPE pHalData; - - - pHalData = GET_HAL_DATA(padapter); - - rtw_write16(padapter, REG_BCN_CTRL, 0x1010); - - // TODO: Remove these magic number - rtw_write16(padapter, REG_TBTT_PROHIBIT, 0x6404);// ms - rtw_write8(padapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);//ms - rtw_write8(padapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); - - // Suggested by designer timchen. Change beacon AIFS to the largest number - // beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 - rtw_write16(padapter, REG_BCNTCFG, 0x660F); - - - pHalData->RegBcnCtrlVal = rtw_read8(padapter, REG_BCN_CTRL); - pHalData->RegTxPause = rtw_read8(padapter, REG_TXPAUSE); - pHalData->RegFwHwTxQCtrl = rtw_read8(padapter, REG_FWHW_TXQ_CTRL+2); - pHalData->RegReg542 = rtw_read8(padapter, REG_TBTT_PROHIBIT+2); - pHalData->RegCR_1 = rtw_read8(padapter, REG_CR+1); - -} - -void _InitBeaconMaxError(PADAPTER padapter, BOOLEAN InfraMode) -{ -#ifdef RTL8192CU_ADHOC_WORKAROUND_SETTING - rtw_write8(padapter, REG_BCN_MAX_ERR, 0xFF); -#endif -} - -void _InitInterrupt(PADAPTER padapter) -{ - - //HISR write one to clear - rtw_write32(padapter, REG_HISR_88E, 0xFFFFFFFF); - - // HIMR - turn all off - rtw_write32(padapter, REG_HIMR_88E, 0); - - // - // Initialize and enable SDIO Host Interrupt. - // - InitInterrupt8188ESdio(padapter); - - - // - // Initialize and enable system Host Interrupt. - // - //InitSysInterrupt8188ESdio(Adapter);//TODO: - - // - // Enable SDIO Host Interrupt. - // - //EnableInterrupt8188ESdio(padapter);//Move to sd_intf_start()/stop - -} - -void _InitRDGSetting(PADAPTER padapter) -{ - rtw_write8(padapter, REG_RD_CTRL, 0xFF); - rtw_write16(padapter, REG_RD_NAV_NXT, 0x200); - rtw_write8(padapter, REG_RD_RESP_PKT_TH, 0x05); -} - - -static void _InitRxSetting(PADAPTER padapter) -{ - rtw_write32(padapter, REG_MACID, 0x87654321); - rtw_write32(padapter, 0x0700, 0x87654321); -} - - -static void _InitRFType(PADAPTER padapter) -{ - struct registry_priv *pregpriv = &padapter->registrypriv; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - //BOOLEAN is92CU = IS_92C_SERIAL(pHalData->VersionID); - BOOLEAN is2T2R = IS_2T2R(pHalData->VersionID); - -#if DISABLE_BB_RF - pHalData->rf_chip = RF_PSEUDO_11N; - return; -#endif - - pHalData->rf_chip = RF_6052; - - //if (_FALSE == is92CU) { - if(_FALSE == is2T2R){ - pHalData->rf_type = RF_1T1R; - DBG_8192C("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n"); - return; - } - - // TODO: Consider that EEPROM set 92CU to 1T1R later. - // Force to overwrite setting according to chip version. Ignore EEPROM setting. - //pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R; - MSG_8192C("Set RF Chip ID to RF_6052 and RF type to %d.\n", pHalData->rf_type); -} - -// Set CCK and OFDM Block "ON" -static void _BBTurnOnBlock(PADAPTER padapter) -{ -#if (DISABLE_BB_RF) - return; -#endif - - PHY_SetBBReg(padapter, rFPGA0_RFMOD, bCCKEn, 0x1); - PHY_SetBBReg(padapter, rFPGA0_RFMOD, bOFDMEn, 0x1); -} - -#if 0 -static void _InitAntenna_Selection(PADAPTER padapter) -{ - rtw_write8(padapter, REG_LEDCFG2, 0x82); -} -#endif - -static void _InitPABias(PADAPTER padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - u8 pa_setting; - BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); - - //FIXED PA current issue - //efuse_one_byte_read(padapter, 0x1FA, &pa_setting); - pa_setting = EFUSE_Read1Byte(padapter, 0x1FA); - - //RT_TRACE(COMP_INIT, DBG_LOUD, ("_InitPABias 0x1FA 0x%x \n",pa_setting)); - - if(!(pa_setting & BIT0)) - { - PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x0F406); - PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x4F406); - PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x8F406); - PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0xCF406); - //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path A\n")); - } - - if(!(pa_setting & BIT1) && is92C) - { - PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0x0F406); - PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0x4F406); - PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0x8F406); - PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0xCF406); - //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path B\n")); - } - - if(!(pa_setting & BIT4)) - { - pa_setting = rtw_read8(padapter, 0x16); - pa_setting &= 0x0F; - rtw_write8(padapter, 0x16, pa_setting | 0x80); - rtw_write8(padapter, 0x16, pa_setting | 0x90); - } -} - -#if 0 -VOID -_InitRDGSetting_8188E( - IN PADAPTER Adapter - ) -{ - PlatformEFIOWrite1Byte(Adapter,REG_RD_CTRL,0xFF); - PlatformEFIOWrite2Byte(Adapter, REG_RD_NAV_NXT, 0x200); - PlatformEFIOWrite1Byte(Adapter,REG_RD_RESP_PKT_TH,0x05); -} -#endif - -static u32 rtl8188es_hal_init(PADAPTER padapter) -{ - s32 ret; - u8 txpktbuf_bndy; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); - struct registry_priv *pregistrypriv = &padapter->registrypriv; - u8 is92C = IS_92C_SERIAL(pHalData->VersionID); - rt_rf_power_state eRfPowerStateToSet; - u8 value8; - u16 value16; - - u32 init_start_time = rtw_get_current_time(); - -#ifdef DBG_HAL_INIT_PROFILING - enum HAL_INIT_STAGES { - HAL_INIT_STAGES_BEGIN = 0, - HAL_INIT_STAGES_INIT_PW_ON, - HAL_INIT_STAGES_MISC01, - HAL_INIT_STAGES_DOWNLOAD_FW, - HAL_INIT_STAGES_MAC, - HAL_INIT_STAGES_BB, - HAL_INIT_STAGES_RF, - HAL_INIT_STAGES_EFUSE_PATCH, - HAL_INIT_STAGES_INIT_LLTT, - - HAL_INIT_STAGES_MISC02, - HAL_INIT_STAGES_TURN_ON_BLOCK, - HAL_INIT_STAGES_INIT_SECURITY, - HAL_INIT_STAGES_MISC11, - HAL_INIT_STAGES_INIT_HAL_DM, - //HAL_INIT_STAGES_RF_PS, - HAL_INIT_STAGES_IQK, - HAL_INIT_STAGES_PW_TRACK, - HAL_INIT_STAGES_LCK, - //HAL_INIT_STAGES_MISC21, - HAL_INIT_STAGES_INIT_PABIAS, - //HAL_INIT_STAGES_ANTENNA_SEL, - HAL_INIT_STAGES_MISC31, - HAL_INIT_STAGES_END, - HAL_INIT_STAGES_NUM - }; - - char * hal_init_stages_str[] = { - "HAL_INIT_STAGES_BEGIN", - "HAL_INIT_STAGES_INIT_PW_ON", - "HAL_INIT_STAGES_MISC01", - "HAL_INIT_STAGES_DOWNLOAD_FW", - "HAL_INIT_STAGES_MAC", - "HAL_INIT_STAGES_BB", - "HAL_INIT_STAGES_RF", - "HAL_INIT_STAGES_EFUSE_PATCH", - "HAL_INIT_STAGES_INIT_LLTT", - "HAL_INIT_STAGES_MISC02", - "HAL_INIT_STAGES_TURN_ON_BLOCK", - "HAL_INIT_STAGES_INIT_SECURITY", - "HAL_INIT_STAGES_MISC11", - "HAL_INIT_STAGES_INIT_HAL_DM", - //"HAL_INIT_STAGES_RF_PS", - "HAL_INIT_STAGES_IQK", - "HAL_INIT_STAGES_PW_TRACK", - "HAL_INIT_STAGES_LCK", - //"HAL_INIT_STAGES_MISC21", - "HAL_INIT_STAGES_INIT_PABIAS" - //"HAL_INIT_STAGES_ANTENNA_SEL", - "HAL_INIT_STAGES_MISC31", - "HAL_INIT_STAGES_END", - }; - - - int hal_init_profiling_i; - u32 hal_init_stages_timestamp[HAL_INIT_STAGES_NUM]; //used to record the time of each stage's starting point - - for(hal_init_profiling_i=0;hal_init_profiling_iwowlan_wake_reason & FWDecisionDisconnect)) { - u8 reg_val=0; - DBG_8192C("+Reset Entry+\n"); - rtw_write8(padapter, REG_MCUFWDL, 0x00); - _8051Reset88E(padapter); - //reset BB - reg_val = rtw_read8(padapter, REG_SYS_FUNC_EN); - reg_val &= ~(BIT(0) | BIT(1)); - rtw_write8(padapter, REG_SYS_FUNC_EN, reg_val); - //reset RF - rtw_write8(padapter, REG_RF_CTRL, 0); - //reset TRX path - rtw_write16(padapter, REG_CR, 0); - //reset MAC, Digital Core - reg_val = rtw_read8(padapter, REG_SYS_FUNC_EN+1); - reg_val &= ~(BIT(4) | BIT(7)); - rtw_write8(padapter, REG_SYS_FUNC_EN+1, reg_val); - reg_val = rtw_read8(padapter, REG_SYS_FUNC_EN+1); - reg_val |= BIT(4) | BIT(7); - rtw_write8(padapter, REG_SYS_FUNC_EN+1, reg_val); - DBG_8192C("-Reset Entry-\n"); - } -#endif //CONFIG_WOWLAN - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON); - ret = InitPowerOn_rtl8188es(padapter); - if (_FAIL == ret) { - RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init Power On!\n")); - goto exit; - } - - ret = PowerOnCheck(padapter); - if (_FAIL == ret ) { - DBG_871X("Power on Fail! do it again\n"); - ret = InitPowerOn_rtl8188es(padapter); - if (_FAIL == ret) { - DBG_871X("Failed to init Power On!\n"); - goto exit; - } - } - DBG_871X("Power on ok!\n"); - - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01); - if (!pregistrypriv->wifi_spec) { - txpktbuf_bndy = TX_PAGE_BOUNDARY_88E; - } else { - // for WMM - txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E; - } - _InitQueueReservedPage(padapter); - _InitQueuePriority(padapter); - _InitPageBoundary(padapter); - _InitTransferPageSize(padapter); -#ifdef CONFIG_IOL_IOREG_CFG - _InitTxBufferBoundary(padapter, 0); -#endif - // - // Configure SDIO TxRx Control to enable Rx DMA timer masking. - // 2010.02.24. - // - value8 = SdioLocalCmd52Read1Byte(padapter, SDIO_REG_TX_CTRL); - SdioLocalCmd52Write1Byte(padapter, SDIO_REG_TX_CTRL, 0x02); - - rtw_write8(padapter, SDIO_LOCAL_BASE|SDIO_REG_HRPWM1, 0); - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW); -#if (MP_DRIVER == 1) - if (padapter->registrypriv.mp_mode == 1) - { - _InitRxSetting(padapter); - } -#endif //MP_DRIVER == 1 - { -#if 0 - padapter->bFWReady = _FALSE; //because no fw for test chip - pHalData->fw_ractrl = _FALSE; -#else -#ifdef CONFIG_WOWLAN - ret = rtl8188e_FirmwareDownload(padapter, _FALSE); -#else - ret = rtl8188e_FirmwareDownload(padapter); -#endif //CONFIG_WOWLAN - - if (ret != _SUCCESS) { - DBG_871X("%s: Download Firmware failed!!\n", __FUNCTION__); - padapter->bFWReady = _FALSE; - pHalData->fw_ractrl = _FALSE; - goto exit; - } else { - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializepadapter8192CSdio(): Download Firmware Success!!\n")); - padapter->bFWReady = _TRUE; - pHalData->fw_ractrl = _FALSE; - } -#endif - } - - rtl8188e_InitializeFirmwareVars(padapter); - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC); -#if (HAL_MAC_ENABLE == 1) - ret = PHY_MACConfig8188E(padapter); - if(ret != _SUCCESS){ -// RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializepadapter8192CSdio(): Fail to configure MAC!!\n")); - goto exit; - } -#endif - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB); - // - //d. Initialize BB related configurations. - // -#if (HAL_BB_ENABLE == 1) - ret = PHY_BBConfig8188E(padapter); - if(ret != _SUCCESS){ -// RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Initializepadapter8192CSdio(): Fail to configure BB!!\n")); - goto exit; - } -#endif - - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF); - -#if (HAL_RF_ENABLE == 1) - ret = PHY_RFConfig8188E(padapter); - - if(ret != _SUCCESS){ -// RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializepadapter8192CSdio(): Fail to configure RF!!\n")); - goto exit; - } -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH); -#if defined(CONFIG_IOL_EFUSE_PATCH) - ret = rtl8188e_iol_efuse_patch(padapter); - if(ret != _SUCCESS){ - DBG_871X("%s rtl8188e_iol_efuse_patch failed \n",__FUNCTION__); - goto exit; - } -#endif - _InitTxBufferBoundary(padapter, txpktbuf_bndy); -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT); - ret = InitLLTTable(padapter, txpktbuf_bndy); - if (_SUCCESS != ret) { - RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT Table!\n")); - goto exit; - } - -#if (RATE_ADAPTIVE_SUPPORT==1) - {//Enable TX Report - //Enable Tx Report Timer - value8 = rtw_read8(padapter, REG_TX_RPT_CTRL); - rtw_write8(padapter, REG_TX_RPT_CTRL, (value8|BIT1|BIT0)); - //Set MAX RPT MACID - rtw_write8(padapter, REG_TX_RPT_CTRL+1, 2);//FOR sta mode ,0: bc/mc ,1:AP - //Tx RPT Timer. Unit: 32us - rtw_write16(padapter, REG_TX_RPT_TIME, 0xCdf0); - } -#endif - -#if 0 - if(pHTInfo->bRDGEnable){ - _InitRDGSetting_8188E(Adapter); - } -#endif - -#ifdef CONFIG_TX_EARLY_MODE - if( pHalData->bEarlyModeEnable) - { - RT_TRACE(_module_hci_hal_init_c_, _drv_info_,("EarlyMode Enabled!!!\n")); - - value8 = rtw_read8(padapter, REG_EARLY_MODE_CONTROL); -#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 - value8 = value8|0x1f; -#else - value8 = value8|0xf; -#endif - rtw_write8(padapter, REG_EARLY_MODE_CONTROL, value8); - - rtw_write8(padapter, REG_EARLY_MODE_CONTROL+3, 0x80); - - value8 = rtw_read8(padapter, REG_TCR+1); - value8 = value8|0x40; - rtw_write8(padapter,REG_TCR+1, value8); - } - else -#endif - { - rtw_write8(padapter, REG_EARLY_MODE_CONTROL, 0); - } - - -#if(SIC_ENABLE == 1) - SIC_Init(padapter); -#endif - - - if (pwrctrlpriv->reg_rfoff == _TRUE) { - pwrctrlpriv->rf_pwrstate = rf_off; - } - - // 2010/08/09 MH We need to check if we need to turnon or off RF after detecting - // HW GPIO pin. Before PHY_RFConfig8192C. - HalDetectPwrDownMode88E(padapter); - - - // Set RF type for BB/RF configuration - _InitRFType(padapter); - - // Save target channel - // Current Channel will be updated again later. - pHalData->CurrentChannel = 1; - - - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02); - // Get Rx PHY status in order to report RSSI and others. - _InitDriverInfoSize(padapter, 4); - hal_init_macaddr(padapter); - _InitNetworkType(padapter); - _InitWMACSetting(padapter); - _InitAdaptiveCtrl(padapter); - _InitEDCA(padapter); - _InitRateFallback(padapter); - _InitRetryFunction(padapter); - _initSdioAggregationSetting(padapter); - _InitOperationMode(padapter); - _InitBeaconParameters(padapter); - _InitBeaconMaxError(padapter, _TRUE); - _InitInterrupt(padapter); - - // Enable MACTXEN/MACRXEN block - value16 = rtw_read16(padapter, REG_CR); - value16 |= (MACTXEN | MACRXEN); - rtw_write8(padapter, REG_CR, value16); - - rtw_write32(padapter,REG_MACID_NO_LINK_0,0xFFFFFFFF); - rtw_write32(padapter,REG_MACID_NO_LINK_1,0xFFFFFFFF); - -#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_TX_MCAST2UNI) - -#ifdef CONFIG_CHECK_AC_LIFETIME - // Enable lifetime check for the four ACs - rtw_write8(padapter, REG_LIFETIME_EN, 0x0F); -#endif // CONFIG_CHECK_AC_LIFETIME - -#ifdef CONFIG_TX_MCAST2UNI - rtw_write16(padapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); // unit: 256us. 256ms - rtw_write16(padapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); // unit: 256us. 256ms -#else // CONFIG_TX_MCAST2UNI - rtw_write16(padapter, REG_PKT_VO_VI_LIFE_TIME, 0x3000); // unit: 256us. 3s - rtw_write16(padapter, REG_PKT_BE_BK_LIFE_TIME, 0x3000); // unit: 256us. 3s -#endif // CONFIG_TX_MCAST2UNI -#endif // CONFIG_CONCURRENT_MODE || CONFIG_TX_MCAST2UNI - - - - -#endif //HAL_RF_ENABLE == 1 - - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK); - _BBTurnOnBlock(padapter); - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY); -#if 1 - invalidate_cam_all(padapter); -#else - CamResetAllEntry(padapter); - padapter->HalFunc.EnableHWSecCfgHandler(padapter); -#endif - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); - // 2010/12/17 MH We need to set TX power according to EFUSE content at first. - PHY_SetTxPowerLevel8188E(padapter, pHalData->CurrentChannel); - // Record original value for template. This is arough data, we can only use the data - // for power adjust. The value can not be adjustde according to different power!!! -// pHalData->OriginalCckTxPwrIdx = pHalData->CurrentCckTxPwrIdx; -// pHalData->OriginalOfdm24GTxPwrIdx = pHalData->CurrentOfdm24GTxPwrIdx; - -// Move by Neo for USB SS to below setp -//_RfPowerSave(padapter); -#if 0 //ANTENNA_SELECTION_STATIC_SETTING -#if 0 - if (!IS_92C_SERIAL( pHalData->VersionID) && (pHalData->AntDivCfg!=0)) -#else - if (IS_1T1R( pHalData->VersionID) && (pHalData->AntDivCfg!=0)) -#endif - { //for 88CU ,1T1R - _InitAntenna_Selection(padapter); - } -#endif - - // - // Disable BAR, suggested by Scott - // 2010.04.09 add by hpfan - // - rtw_write32(padapter, REG_BAR_MODE_CTRL, 0x0201ffff); - - // HW SEQ CTRL - // set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. - rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); - - -#ifdef RTL8188ES_MAC_LOOPBACK - value8 = rtw_read8(padapter, REG_SYS_FUNC_EN); - value8 &= ~(FEN_BBRSTB|FEN_BB_GLB_RSTn); - rtw_write8(padapter, REG_SYS_FUNC_EN, value8);//disable BB, CCK/OFDM - - rtw_write8(padapter, REG_RD_CTRL, 0x0F); - rtw_write8(padapter, REG_RD_CTRL+1, 0xCF); - //rtw_write8(padapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, 0x80);//to check _InitPageBoundary() - rtw_write32(padapter, REG_CR, 0x0b0202ff);//0x100[28:24]=0x01011, enable mac loopback, no HW Security Eng. -#endif - - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); - // InitHalDm(padapter); - rtl8188e_InitHalDm(padapter); - - -#if (MP_DRIVER == 1) - if (padapter->registrypriv.mp_mode == 1) - { - padapter->mppriv.channel = pHalData->CurrentChannel; - MPT_InitializeAdapter(padapter, padapter->mppriv.channel); - } - else -#endif //(MP_DRIVER == 1) - { - // - // 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status - // and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not - // call init_adapter. May cause some problem?? - // - // Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed - // in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState - // is the same as eRfOff, we should change it to eRfOn after we config RF parameters. - // Added by tynli. 2010.03.30. - pwrctrlpriv->rf_pwrstate = rf_on; - RT_CLEAR_PS_LEVEL(pwrctrlpriv, RT_RF_OFF_LEVL_HALT_NIC); - - // 20100326 Joseph: Copy from GPIOChangeRFWorkItemCallBack() function to check HW radio on/off. - // 20100329 Joseph: Revise and integrate the HW/SW radio off code in initialization. -// pHalData->bHwRadioOff = _FALSE; - pwrctrlpriv->b_hw_radio_off = _FALSE; - eRfPowerStateToSet = rf_on; - - // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. - // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. - if(pHalData->pwrdown && eRfPowerStateToSet == rf_off) - { - // Enable register area 0x0-0xc. - rtw_write8(padapter, REG_RSV_CTRL, 0x0); - - // - // We should configure HW PDn source for WiFi ONLY, and then - // our HW will be set in power-down mode if PDn source from all functions are configured. - // 2010.10.06. - // - if(IS_HARDWARE_TYPE_8723AS(padapter)) - { - value8 = rtw_read8(padapter, REG_MULTI_FUNC_CTRL); - rtw_write8(padapter, REG_MULTI_FUNC_CTRL, (value8|WL_HWPDN_EN)); - } - else - { - rtw_write16(padapter, REG_APS_FSMCO, 0x8812); - } - } - //DrvIFIndicateCurrentPhyStatus(padapter); // 2010/08/17 MH Disable to prevent BSOD. - - // 2010/08/26 MH Merge from 8192CE. - if(pwrctrlpriv->rf_pwrstate == rf_on) - { - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); - if(pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized){ -// PHY_IQCalibrate(padapter, _TRUE); - PHY_IQCalibrate_8188E(padapter,_TRUE); - } - else - { -// PHY_IQCalibrate(padapter, _FALSE); - PHY_IQCalibrate_8188E(padapter,_FALSE); - pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized = _TRUE; - } - -// dm_CheckTXPowerTracking(padapter); -// PHY_LCCalibrate(padapter); - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); - ODM_TXPowerTrackingCheck(&pHalData->odmpriv ); - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); - PHY_LCCalibrate_8188E(padapter); - - - } -} - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); - //if(pHalData->eRFPowerState == eRfOn) - { - _InitPABias(padapter); - } - - // Init BT hw config. -// HALBT_InitHwConfig(padapter); - - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC31); - // 2010/05/20 MH We need to init timer after update setting. Otherwise, we can not get correct inf setting. - // 2010/05/18 MH For SE series only now. Init GPIO detect time -#if 0 - if(pDevice->RegUsbSS) - { - RT_TRACE(COMP_INIT, DBG_LOUD, (" call GpioDetectTimerStart\n")); - GpioDetectTimerStart(padapter); // Disable temporarily - } -#endif - - // 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW enter - // suspend mode automatically. - //HwSuspendModeEnable92Cu(padapter, FALSE); - - // 2010/12/17 MH For TX power level OID modification from UI. -// padapter->HalFunc.GetTxPowerLevelHandler( padapter, &pHalData->DefaultTxPwrDbm ); - //DbgPrint("pHalData->DefaultTxPwrDbm = %d\n", pHalData->DefaultTxPwrDbm); - -// if(pHalData->SwBeaconType < HAL92CSDIO_DEFAULT_BEACON_TYPE) // The lowest Beacon Type that HW can support -// pHalData->SwBeaconType = HAL92CSDIO_DEFAULT_BEACON_TYPE; - - // - // Update current Tx FIFO page status. - // - HalQueryTxBufferStatus8189ESdio(padapter); - - - if(pregistrypriv->wifi_spec) - rtw_write16(padapter,REG_FAST_EDCA_CTRL ,0); - - - //TODO:Setting HW_VAR_NAV_UPPER !!!!!!!!!!!!!!!!!!!! - //rtw_hal_set_hwreg(Adapter, HW_VAR_NAV_UPPER, ((pu1Byte)&NavUpper)); - - if(IS_HARDWARE_TYPE_8188ES(padapter)) - { - value8= rtw_read8(padapter, 0x4d3); - rtw_write8(padapter, 0x4d3, (value8|0x1)); - } - - //pHalData->PreRpwmVal = PlatformEFSdioLocalCmd52Read1Byte(Adapter, SDIO_REG_HRPWM1)&0x80; - - - // enable Tx report. - rtw_write8(padapter, REG_FWHW_TXQ_CTRL+1, 0x0F); -/* - // Suggested by SD1 pisa. Added by tynli. 2011.10.21. - PlatformEFIOWrite1Byte(Adapter, REG_EARLY_MODE_CONTROL+3, 0x01); - -*/ //tynli_test_tx_report. - rtw_write16(padapter, REG_TX_RPT_TIME, 0x3DF0); - //RT_TRACE(COMP_INIT, DBG_TRACE, ("InitializeAdapter8188EUsb() <====\n")); - - - //enable tx DMA to drop the redundate data of packet - rtw_write16(padapter,REG_TXDMA_OFFSET_CHK, (rtw_read16(padapter,REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN)); - -//#debug print for checking compile flags - //DBG_8192C("RTL8188E_FPGA_TRUE_PHY_VERIFICATION=%d\n", RTL8188E_FPGA_TRUE_PHY_VERIFICATION); - DBG_8192C("DISABLE_BB_RF=%d\n", DISABLE_BB_RF); - DBG_8192C("IS_HARDWARE_TYPE_8188ES=%d\n", IS_HARDWARE_TYPE_8188ES(padapter)); -//# - -#ifdef CONFIG_PLATFORM_SPRD - // For Power Consumption, set all GPIO pin to ouput mode - //0x44~0x47 (GPIO 0~7), Note:GPIO5 is enabled for controlling external 26MHz request - rtw_write8(padapter, GPIO_IO_SEL, 0xFF);//Reg0x46, set to o/p mode - - //0x42~0x43 (GPIO 8~11) - value8 = rtw_read8(padapter, REG_GPIO_IO_SEL); - rtw_write8(padapter, REG_GPIO_IO_SEL, (value8<<4)|value8); - value8 = rtw_read8(padapter, REG_GPIO_IO_SEL+1); - rtw_write8(padapter, REG_GPIO_IO_SEL+1, value8|0x0F);//Reg0x43 -#endif //CONFIG_PLATFORM_SPRD - - -#ifdef CONFIG_XMIT_ACK - //ack for xmit mgmt frames. - rtw_write32(padapter, REG_FWHW_TXQ_CTRL, rtw_read32(padapter, REG_FWHW_TXQ_CTRL)|BIT(12)); -#endif //CONFIG_XMIT_ACK - - - - //RT_TRACE(COMP_INIT, DBG_LOUD, ("<---Initializepadapter8192CSdio()\n")); - DBG_8192C("-rtl8188es_hal_init\n"); - -exit: -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); - - DBG_871X("%s in %dms\n", __FUNCTION__, rtw_get_passing_time_ms(init_start_time)); - - #ifdef DBG_HAL_INIT_PROFILING - hal_init_stages_timestamp[HAL_INIT_STAGES_END]=rtw_get_current_time(); - - for(hal_init_profiling_i=0;hal_init_profiling_i%s\n", __FUNCTION__); - - - //Stop Tx Report Timer. 0x4EC[Bit1]=b'0 - u1bTmp = rtw_read8(padapter, REG_TX_RPT_CTRL); - rtw_write8(padapter, REG_TX_RPT_CTRL, u1bTmp&(~BIT1)); - - // stop rx - rtw_write8(padapter,REG_CR, 0x0); - - -#ifdef CONFIG_EXT_CLK //for sprd For Power Consumption. - EnableGpio5ClockReq(padapter, _FALSE, 0); -#endif //CONFIG_EXT_CLK - -#if 1 - // For Power Consumption. - u1bTmp = rtw_read8(padapter, GPIO_IN); - rtw_write8(padapter, GPIO_OUT, u1bTmp); - rtw_write8(padapter, GPIO_IO_SEL, 0xFF);//Reg0x46 - - u1bTmp = rtw_read8(padapter, REG_GPIO_IO_SEL); - rtw_write8(padapter, REG_GPIO_IO_SEL, (u1bTmp<<4)|u1bTmp); - u1bTmp = rtw_read8(padapter, REG_GPIO_IO_SEL+1); - rtw_write8(padapter, REG_GPIO_IO_SEL+1, u1bTmp|0x0F);//Reg0x43 -#endif - - - // Run LPS WL RFOFF flow - ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, Rtl8188E_NIC_LPS_ENTER_FLOW); - if (ret == _FALSE) { - DBG_871X("%s: run RF OFF flow fail!\n", __func__); - } - - // ==== Reset digital sequence ====== - - u1bTmp = rtw_read8(padapter, REG_MCUFWDL); - if ((u1bTmp & RAM_DL_SEL) && padapter->bFWReady) //8051 RAM code - { - //rtl8723a_FirmwareSelfReset(padapter); - //_8051Reset88E(padapter); - - // Reset MCU 0x2[10]=0. - u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1); - u1bTmp &= ~BIT(2); // 0x2[10], FEN_CPUEN - rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp); - } - - //u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1); - //u1bTmp &= ~BIT(2); // 0x2[10], FEN_CPUEN - //rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp); - - // MCUFWDL 0x80[1:0]=0 - // reset MCU ready status - rtw_write8(padapter, REG_MCUFWDL, 0); - - //==== Reset digital sequence end ====== - - - bMacPwrCtrlOn = _FALSE; // Disable CMD53 R/W - rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - - -/* - if((pMgntInfo->RfOffReason & RF_CHANGE_BY_HW) && pHalData->pwrdown) - {// Power Down - - // Card disable power action flow - ret = HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, Rtl8188E_NIC_PDN_FLOW); - } - else -*/ - { // Non-Power Down - - // Card disable power action flow - ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, Rtl8188E_NIC_DISABLE_FLOW); - - - if (ret == _FALSE) { - DBG_871X("%s: run CARD DISABLE flow fail!\n", __func__); - } - } - - -/* - // Reset MCU IO Wrapper, added by Roger, 2011.08.30 - u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1); - u1bTmp &= ~BIT(0); - rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp); - u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1); - u1bTmp |= BIT(0); - rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp); -*/ - - - // RSV_CTRL 0x1C[7:0]=0x0E - // lock ISO/CLK/Power control register - rtw_write8(padapter, REG_RSV_CTRL, 0x0E); - - padapter->bFWReady = _FALSE; - DBG_871X("<=%s\n", __FUNCTION__); - -} - -static u32 rtl8188es_hal_deinit(PADAPTER padapter) -{ - DBG_871X("=>%s\n", __FUNCTION__); - - if (padapter->hw_init_completed == _TRUE) - hal_poweroff_rtl8188es(padapter); - - DBG_871X("<=%s\n", __FUNCTION__); - - return _SUCCESS; -} - -static u32 rtl8188es_inirp_init(PADAPTER padapter) -{ - u32 status; - -_func_enter_; - - status = _SUCCESS; - -_func_exit_; - - return status; -} - -static u32 rtl8188es_inirp_deinit(PADAPTER padapter) -{ - RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("+rtl8188es_inirp_deinit\n")); - - RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("-rtl8188es_inirp_deinit\n")); - - return _SUCCESS; -} - -static void rtl8188es_init_default_value(PADAPTER padapter) -{ - PHAL_DATA_TYPE pHalData; - struct pwrctrl_priv *pwrctrlpriv; - struct dm_priv *pdmpriv; - u8 i; - - pHalData = GET_HAL_DATA(padapter); - pwrctrlpriv = adapter_to_pwrctl(padapter); - pdmpriv = &pHalData->dmpriv; - - - //init default value - pHalData->fw_ractrl = _FALSE; - if(!pwrctrlpriv->bkeepfwalive) - pHalData->LastHMEBoxNum = 0; - - //init dm default value - pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized = _FALSE; - pHalData->odmpriv.RFCalibrateInfo.TM_Trigger = 0;//for IQK - //pdmpriv->binitialized = _FALSE; -// pdmpriv->prv_traffic_idx = 3; -// pdmpriv->initialize = 0; - pHalData->pwrGroupCnt = 0; - pHalData->PGMaxGroup= 13; - pHalData->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0; - for(i = 0; i < HP_THERMAL_NUM; i++) - pHalData->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0; - - // interface related variable - pHalData->SdioRxFIFOCnt = 0; -} - -// -// Description: -// We should set Efuse cell selection to WiFi cell in default. -// -// Assumption: -// PASSIVE_LEVEL -// -// Added by Roger, 2010.11.23. -// -static void _EfuseCellSel( - IN PADAPTER padapter - ) -{ - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - u32 value32; - - //if(INCLUDE_MULTI_FUNC_BT(padapter)) - { - value32 = rtw_read32(padapter, EFUSE_TEST); - value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); - rtw_write32(padapter, EFUSE_TEST, value32); - } -} - -static VOID -_ReadRFType( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - -#if DISABLE_BB_RF - pHalData->rf_chip = RF_PSEUDO_11N; -#else - pHalData->rf_chip = RF_6052; -#endif -} - -static void -Hal_EfuseParsePIDVID_8188ES( - IN PADAPTER pAdapter, - IN u8* hwinfo, - IN BOOLEAN AutoLoadFail - ) -{ -// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - // - // The PID/VID info was parsed from CISTPL_MANFID Tuple in CIS area before. - // VID is parsed from Manufacture code field and PID is parsed from Manufacture information field. - // 2011.04.01. - // - -// RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM VID = 0x%4x\n", pHalData->EEPROMVID)); -// RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM PID = 0x%4x\n", pHalData->EEPROMPID)); -} - -static void -Hal_EfuseParseMACAddr_8188ES( - IN PADAPTER padapter, - IN u8* hwinfo, - IN BOOLEAN AutoLoadFail - ) -{ - u16 i, usValue; - u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x77}; - EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); - - if (AutoLoadFail) - { -// sMacAddr[5] = (u1Byte)GetRandomNumber(1, 254); - for (i=0; i<6; i++) - pEEPROM->mac_addr[i] = sMacAddr[i]; - } - else - { - //Read Permanent MAC address - _rtw_memcpy(pEEPROM->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88ES], ETH_ALEN); - - } -// NicIFSetMacAddress(pAdapter, pAdapter->PermanentAddress); - - DBG_871X("Hal_EfuseParseMACAddr_8188ES: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", - pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], - pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], - pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]); -} - - -#ifdef CONFIG_EFUSE_CONFIG_FILE -static u32 Hal_readPGDataFromConfigFile( - PADAPTER padapter) -{ - u32 i; - struct file *fp; - mm_segment_t fs; - u8 temp[3]; - loff_t pos = 0; - EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); - u8 *PROMContent = pEEPROM->efuse_eeprom_data; - - - temp[2] = 0; // add end of string '\0' - - fp = filp_open("/system/etc/wifi/wifi_efuse.map", O_RDONLY, 0); - if (IS_ERR(fp)) { - pEEPROM->bloadfile_fail_flag = _TRUE; - DBG_871X("Error, Efuse configure file doesn't exist.\n"); - return _FAIL; - } - - fs = get_fs(); - set_fs(KERNEL_DS); - - DBG_871X("Efuse configure file:\n"); - for (i=0; ibloadfile_fail_flag = _FALSE; - return _SUCCESS; -} - -static void -Hal_ReadMACAddrFromFile_8188ES( - PADAPTER padapter - ) -{ - u32 i; - struct file *fp; - mm_segment_t fs; - u8 source_addr[18]; - loff_t pos = 0; - u32 curtime = rtw_get_current_time(); - EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); - u8 *head, *end; - - u8 null_mac_addr[ETH_ALEN] = {0, 0, 0,0, 0, 0}; - u8 multi_mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; - - _rtw_memset(source_addr, 0, 18); - _rtw_memset(pEEPROM->mac_addr, 0, ETH_ALEN); - - fp = filp_open("/data/wifimac.txt", O_RDWR, 0644); - if (IS_ERR(fp)) { - pEEPROM->bloadmac_fail_flag = _TRUE; - DBG_871X("Error, wifi mac address file doesn't exist.\n"); - } else { - fs = get_fs(); - set_fs(KERNEL_DS); - - DBG_871X("wifi mac address:\n"); - vfs_read(fp, source_addr, 18, &pos); - source_addr[17] = ':'; - - head = end = source_addr; - for (i=0; imac_addr[i] = simple_strtoul(head, NULL, 16 ); - - if (end) { - end++; - head = end; - } - DBG_871X("%02x \n", pEEPROM->mac_addr[i]); - } - DBG_871X("\n"); - set_fs(fs); - pEEPROM->bloadmac_fail_flag = _FALSE; - filp_close(fp, NULL); - } - - if ( (_rtw_memcmp(pEEPROM->mac_addr, null_mac_addr, ETH_ALEN)) || - (_rtw_memcmp(pEEPROM->mac_addr, multi_mac_addr, ETH_ALEN)) ) { - pEEPROM->mac_addr[0] = 0x00; - pEEPROM->mac_addr[1] = 0xe0; - pEEPROM->mac_addr[2] = 0x4c; - pEEPROM->mac_addr[3] = (u8)(curtime & 0xff) ; - pEEPROM->mac_addr[4] = (u8)((curtime>>8) & 0xff) ; - pEEPROM->mac_addr[5] = (u8)((curtime>>16) & 0xff) ; - } - - DBG_871X("Hal_ReadMACAddrFromFile_8188ES: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", - pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], - pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], - pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]); -} -#endif //CONFIG_EFUSE_CONFIG_FILE - -static VOID -readAdapterInfo_8188ES( - IN PADAPTER padapter - ) -{ - EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); - - /* parse the eeprom/efuse content */ - Hal_EfuseParseIDCode88E(padapter, pEEPROM->efuse_eeprom_data); - Hal_EfuseParsePIDVID_8188ES(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - -#ifdef CONFIG_EFUSE_CONFIG_FILE - Hal_ReadMACAddrFromFile_8188ES(padapter); -#else //CONFIG_EFUSE_CONFIG_FILE - Hal_EfuseParseMACAddr_8188ES(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); -#endif //CONFIG_EFUSE_CONFIG_FILE - - Hal_ReadPowerSavingMode88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - Hal_ReadTxPowerInfo88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - Hal_EfuseParseEEPROMVer88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - rtl8188e_EfuseParseChnlPlan(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - Hal_EfuseParseXtal_8188E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - Hal_EfuseParseCustomerID88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - //Hal_ReadAntennaDiversity88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - Hal_EfuseParseBoardType88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - Hal_ReadThermalMeter_88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - // - // The following part initialize some vars by PG info. - // - Hal_InitChannelPlan(padapter); -#ifdef CONFIG_WOWLAN - Hal_DetectWoWMode(padapter); -#endif //CONFIG_WOWLAN -#ifdef CONFIG_RF_GAIN_OFFSET - Hal_ReadRFGainOffset(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); -#endif //CONFIG_RF_GAIN_OFFSET -} - -static void _ReadPROMContent( - IN PADAPTER padapter - ) -{ - EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); - u8 eeValue; - - /* check system boot selection */ - eeValue = rtw_read8(padapter, REG_9346CR); - pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; - pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE; - - DBG_871X("%s: 9346CR=0x%02X, Boot from %s, Autoload %s\n", - __FUNCTION__, eeValue, - (pEEPROM->EepromOrEfuse ? "EEPROM" : "EFUSE"), - (pEEPROM->bautoload_fail_flag ? "Fail" : "OK")); - -// pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; - -#ifdef CONFIG_EFUSE_CONFIG_FILE - Hal_readPGDataFromConfigFile(padapter); -#else //CONFIG_EFUSE_CONFIG_FILE - Hal_InitPGData88E(padapter); -#endif //CONFIG_EFUSE_CONFIG_FILE - readAdapterInfo_8188ES(padapter); -} - -static VOID -_InitOtherVariable( - IN PADAPTER Adapter - ) -{ - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - - //if(Adapter->bInHctTest){ - // pMgntInfo->PowerSaveControl.bInactivePs = FALSE; - // pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; - // pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; - // pMgntInfo->keepAliveLevel = 0; - //} - - -} - -// -// Description: -// Read HW adapter information by E-Fuse or EEPROM according CR9346 reported. -// -// Assumption: -// PASSIVE_LEVEL (SDIO interface) -// -// -static s32 _ReadAdapterInfo8188ES(PADAPTER padapter) -{ - u32 start; - - - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+_ReadAdapterInfo8188ES\n")); - - // before access eFuse, make sure card enable has been called - if(_CardEnable(padapter) == _FAIL) - { - DBG_871X(KERN_ERR "%s: run power on flow fail\n", __func__); - return _FAIL; - } - - start = rtw_get_current_time(); - -// Efuse_InitSomeVar(Adapter); -// pHalData->VersionID = ReadChipVersion(Adapter); -// _EfuseCellSel(padapter); - - _ReadRFType(padapter);//rf_chip -> _InitRFType() - _ReadPROMContent(padapter); - - // 2010/10/25 MH THe function must be called after borad_type & IC-Version recognize. - //ReadSilmComboMode(Adapter); - _InitOtherVariable(padapter); - - - //MSG_8192C("%s()(done), rf_chip=0x%x, rf_type=0x%x\n", __FUNCTION__, pHalData->rf_chip, pHalData->rf_type); - MSG_8192C("<==== ReadAdapterInfo8188ES in %d ms\n", rtw_get_passing_time_ms(start)); - - return _SUCCESS; -} - -static void ReadAdapterInfo8188ES(PADAPTER padapter) -{ - // Read EEPROM size before call any EEPROM function - padapter->EepromAddressSize = GetEEPROMSize8188E(padapter); - - _ReadAdapterInfo8188ES(padapter); -} - -static void ResumeTxBeacon(PADAPTER padapter) -{ - HAL_DATA_TYPE* pHalData = GET_HAL_DATA(padapter); - - // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value - // which should be read from register to a global variable. - - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+ResumeTxBeacon\n")); - - rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) | BIT6); - pHalData->RegFwHwTxQCtrl |= BIT6; - rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0xff); - pHalData->RegReg542 |= BIT0; - rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542); -} - -static void StopTxBeacon(PADAPTER padapter) -{ - HAL_DATA_TYPE* pHalData = GET_HAL_DATA(padapter); - - // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value - // which should be read from register to a global variable. - - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+StopTxBeacon\n")); - - rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) & (~BIT6)); - pHalData->RegFwHwTxQCtrl &= (~BIT6); - rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0x64); - pHalData->RegReg542 &= ~(BIT0); - rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542); - - CheckFwRsvdPageContent(padapter); // 2010.06.23. Added by tynli. -} - -// todo static -void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8* val) -{ - u8 val8; - u8 mode = *((u8 *)val); - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - -#ifdef CONFIG_CONCURRENT_MODE - if(Adapter->iface_type == IFACE_PORT1) - { - // disable Port1 TSF update - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); - - // set net_type - val8 = rtw_read8(Adapter, MSR)&0x03; - val8 |= (mode<<2); - rtw_write8(Adapter, MSR, val8); - - DBG_871X("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode); - - if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) - { - if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) - { - #ifdef CONFIG_INTERRUPT_BASED_TXBCN - - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - rtw_write8(Adapter, REG_DRVERLYINT, 0x05);//restore early int time to 5ms - UpdateInterruptMask8188ESdio(Adapter, 0, SDIO_HIMR_BCNERLY_INT_MSK); - #endif // CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - UpdateInterruptMask8188ESdio(Adapter, 0, (SDIO_HIMR_TXBCNOK_MSK|SDIO_HIMR_TXBCNERR_MSK)); - #endif// CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - - #endif //CONFIG_INTERRUPT_BASED_TXBCN - - - StopTxBeacon(Adapter); - } - - rtw_write8(Adapter,REG_BCN_CTRL_1, 0x11);//disable atim wnd and disable beacon function - //rtw_write8(Adapter,REG_BCN_CTRL_1, 0x18); - } - else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) - { - ResumeTxBeacon(Adapter); - rtw_write8(Adapter,REG_BCN_CTRL_1, 0x1a); - //BIT4 - If set 0, hw will clr bcnq when tx becon ok/fail or port 1 - rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); - } - else if(mode == _HW_STATE_AP_) - { -#ifdef CONFIG_INTERRUPT_BASED_TXBCN - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - UpdateInterruptMask8188ESdio(Adapter, SDIO_HIMR_BCNERLY_INT_MSK, 0); - #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - UpdateInterruptMask8188ESdio(Adapter, (SDIO_HIMR_TXBCNOK_MSK|SDIO_HIMR_TXBCNERR_MSK), 0); - #endif//CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - -#endif //CONFIG_INTERRUPT_BASED_TXBCN - - ResumeTxBeacon(Adapter); - - rtw_write8(Adapter, REG_BCN_CTRL_1, 0x12); - - //enable SW Beacon - rtw_write32(Adapter, REG_CR, rtw_read32(Adapter, REG_CR)|BIT(8)); - - //Set RCR - //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 - rtw_write32(Adapter, REG_RCR, 0x7000208e);//CBSSID_DATA must set to 0,Reject ICV_ERROR packets - - //enable to rx data frame - rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); - //enable to rx ps-poll - rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400); - - //Beacon Control related register for first time - rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms - - //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); - rtw_write8(Adapter, REG_ATIMWND_1, 0x0a); // 10ms for port1 - rtw_write16(Adapter, REG_BCNTCFG, 0x00); - rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); - rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms) - - //reset TSF2 - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); - - - //BIT4 - If set 0, hw will clr bcnq when tx becon ok/fail or port 1 - rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); - //enable BCN1 Function for if2 - //don't enable update TSF1 for if2 (due to TSF update when beacon/probe rsp are received) - rtw_write8(Adapter, REG_BCN_CTRL_1, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | EN_TXBCN_RPT|BIT(1))); - -#ifdef CONFIG_CONCURRENT_MODE - if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE)) - rtw_write8(Adapter, REG_BCN_CTRL, - rtw_read8(Adapter, REG_BCN_CTRL) & ~EN_BCN_FUNCTION); -#endif - //BCN1 TSF will sync to BCN0 TSF with offset(0x518) if if1_sta linked - //rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(5)); - //rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(3)); - - //dis BCN0 ATIM WND if if1 is station - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(0)); - -#ifdef CONFIG_TSF_RESET_OFFLOAD - // Reset TSF for STA+AP concurrent mode - if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) { - if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE) - DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n", - __FUNCTION__, __LINE__); - } -#endif // CONFIG_TSF_RESET_OFFLOAD - } - } - else -#endif //CONFIG_CONCURRENT_MODE - { - // disable Port0 TSF update - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); - - // set net_type - val8 = rtw_read8(Adapter, MSR)&0x0c; - val8 |= mode; - rtw_write8(Adapter, MSR, val8); - - DBG_871X("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode); - - if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) - { -#ifdef CONFIG_CONCURRENT_MODE - if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) -#endif //CONFIG_CONCURRENT_MODE - { - #ifdef CONFIG_INTERRUPT_BASED_TXBCN - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - rtw_write8(Adapter, REG_DRVERLYINT, 0x05);//restore early int time to 5ms - UpdateInterruptMask8188ESdio(Adapter, 0, SDIO_HIMR_BCNERLY_INT_MSK); - #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - UpdateInterruptMask8188ESdio(Adapter, 0, (SDIO_HIMR_TXBCNOK_MSK|SDIO_HIMR_TXBCNERR_MSK)); - #endif //CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - #endif //CONFIG_INTERRUPT_BASED_TXBCN - StopTxBeacon(Adapter); - } - - rtw_write8(Adapter,REG_BCN_CTRL, 0x19);//disable atim wnd - //rtw_write8(Adapter,REG_BCN_CTRL, 0x18); - } - else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) - { - ResumeTxBeacon(Adapter); - rtw_write8(Adapter,REG_BCN_CTRL, 0x1a); - //BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 - rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); - } - else if(mode == _HW_STATE_AP_) - { - -#ifdef CONFIG_INTERRUPT_BASED_TXBCN - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - UpdateInterruptMask8188ESdio(Adapter, SDIO_HIMR_BCNERLY_INT_MSK, 0); - #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - UpdateInterruptMask8188ESdio(Adapter, (SDIO_HIMR_TXBCNOK_MSK|SDIO_HIMR_TXBCNERR_MSK), 0); - #endif//CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR -#endif //CONFIG_INTERRUPT_BASED_TXBCN - - - ResumeTxBeacon(Adapter); - - rtw_write8(Adapter, REG_BCN_CTRL, 0x12); - - //enable SW Beacon - rtw_write32(Adapter, REG_CR, rtw_read32(Adapter, REG_CR)|BIT(8)); - - //Set RCR - //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 - rtw_write32(Adapter, REG_RCR, 0x7000208e);//CBSSID_DATA must set to 0,reject ICV_ERR packet - //enable to rx data frame - rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); - //enable to rx ps-poll - rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400); - - //Beacon Control related register for first time - rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms - - //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); - rtw_write8(Adapter, REG_ATIMWND, 0x0a); // 10ms - rtw_write16(Adapter, REG_BCNTCFG, 0x00); - rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); - rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms) - - //reset TSF - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); - - //BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 - rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); - - //enable BCN0 Function for if1 - //don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) - rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | EN_TXBCN_RPT|BIT(1))); - -#ifdef CONFIG_CONCURRENT_MODE - if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE)) - rtw_write8(Adapter, REG_BCN_CTRL_1, - rtw_read8(Adapter, REG_BCN_CTRL_1) & ~EN_BCN_FUNCTION); -#endif - - //dis BCN1 ATIM WND if if2 is station - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(0)); -#ifdef CONFIG_TSF_RESET_OFFLOAD - // Reset TSF for STA+AP concurrent mode - if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) { - if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE) - DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n", - __FUNCTION__, __LINE__); - } -#endif // CONFIG_TSF_RESET_OFFLOAD - } - } - -} - -static void hw_var_set_macaddr(PADAPTER Adapter, u8 variable, u8* val) -{ - u8 idx = 0; - u32 reg_macid; - -#ifdef CONFIG_CONCURRENT_MODE - if(Adapter->iface_type == IFACE_PORT1) - { - reg_macid = REG_MACID1; - } - else -#endif - { - reg_macid = REG_MACID; - } - - for(idx = 0 ; idx < 6; idx++) - { - rtw_write8(Adapter, (reg_macid+idx), val[idx]); - } - -} - -static void hw_var_set_bssid(PADAPTER Adapter, u8 variable, u8* val) -{ - u8 idx = 0; - u32 reg_bssid; - - -#ifdef CONFIG_CONCURRENT_MODE - if(Adapter->iface_type == IFACE_PORT1) - { - reg_bssid = REG_BSSID1; - } - else -#endif - { - reg_bssid = REG_BSSID; - } - -printk("hw_var_set_bssid reg=%x \n", reg_bssid); - - for(idx = 0 ; idx < 6; idx++) - { - rtw_write8(Adapter, (reg_bssid+idx), val[idx]); - } - -} - -static void hw_var_set_bcn_func(PADAPTER Adapter, u8 variable, u8* val) -{ - u32 bcn_ctrl_reg; - -#ifdef CONFIG_CONCURRENT_MODE - if(Adapter->iface_type == IFACE_PORT1) - { - bcn_ctrl_reg = REG_BCN_CTRL_1; - } - else -#endif - { - bcn_ctrl_reg = REG_BCN_CTRL; - } - - if(*((u8 *)val)) - { - rtw_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT)); - } - else - { - rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT))); - } - - -} - -static void hw_var_set_correct_tsf(PADAPTER Adapter, u8 variable, u8* val) -{ -#ifdef CONFIG_CONCURRENT_MODE - u64 tsf; - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; - - //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us - tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us - - if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) - { - //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) - //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); - StopTxBeacon(Adapter); - } - - if(Adapter->iface_type == IFACE_PORT1) - { - //disable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); - - rtw_write32(Adapter, REG_TSFTR1, tsf); - rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32); - //enable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3)); - // Update buddy port's TSF if it is SoftAP for beacon TX issue! - if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE - && check_buddy_fwstate(Adapter, WIFI_AP_STATE) - ) { - //disable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); - - rtw_write32(Adapter, REG_TSFTR, tsf); - rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); - - //enable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); -#ifdef CONFIG_TSF_RESET_OFFLOAD - // Update buddy port's TSF(TBTT) if it is SoftAP for beacon TX issue! - if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE) - DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n", - __FUNCTION__, __LINE__); - -#endif // CONFIG_TSF_RESET_OFFLOAD - } - - } - else - { - //disable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); - - rtw_write32(Adapter, REG_TSFTR, tsf); - rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); - - //enable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); - // Update buddy port's TSF if it is SoftAP for beacon TX issue! - if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE - && check_buddy_fwstate(Adapter, WIFI_AP_STATE) - ) { - //disable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); - - rtw_write32(Adapter, REG_TSFTR1, tsf); - rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32); - - //enable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3)); -#ifdef CONFIG_TSF_RESET_OFFLOAD - // Update buddy port's TSF if it is SoftAP for beacon TX issue! - if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE) - DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n", - __FUNCTION__, __LINE__); -#endif // CONFIG_TSF_RESET_OFFLOAD - } - } - - - if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) - { - //pHalData->RegTxPause &= (~STOP_BCNQ); - //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6)))); - ResumeTxBeacon(Adapter); - } -#endif -} - -static void hw_var_set_mlme_disconnect(PADAPTER Adapter, u8 variable, u8* val) -{ -#ifdef CONFIG_CONCURRENT_MODE - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; - - - if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_)) - rtw_write16(Adapter, REG_RXFLTMAP2, 0x00); - - - if(Adapter->iface_type == IFACE_PORT1) - { - //reset TSF1 - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); - - //disable update TSF1 - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); - - // disable Port1's beacon function - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); - } - else - { - //reset TSF - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); - - //disable update TSF - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); - } -#endif -} - -static void hw_var_set_mlme_sitesurvey(PADAPTER Adapter, u8 variable, u8* val) -{ -#ifdef CONFIG_CONCURRENT_MODE - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - if(*((u8 *)val))//under sitesurvey - { - //config RCR to receive different BSSID & not to receive data frame - u32 v = rtw_read32(Adapter, REG_RCR); - v &= ~(RCR_CBSSID_BCN); - rtw_write32(Adapter, REG_RCR, v); - - //disable update TSF - if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) - { - if(Adapter->iface_type == IFACE_PORT1) - { - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); - } - else - { - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); - } - } - - if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && - check_buddy_fwstate(Adapter, _FW_LINKED)) - { - StopTxBeacon(Adapter); - } - - } - else//sitesurvey done - { - //enable to rx data frame - //write32(Adapter, REG_RCR, read32(padapter, REG_RCR)|RCR_ADF); - rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); - - //enable update TSF - if(Adapter->iface_type == IFACE_PORT1) - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4))); - else - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); - - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); - - if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && - check_buddy_fwstate(Adapter, _FW_LINKED)) - { - ResumeTxBeacon(Adapter); - } - - } -#endif -} - -static void hw_var_set_mlme_join(PADAPTER Adapter, u8 variable, u8* val) -{ -#ifdef CONFIG_CONCURRENT_MODE - u8 RetryLimit = 0x30; - u8 type = *((u8 *)val); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - - if(type == 0) // prepare to join - { - if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && - check_buddy_fwstate(Adapter, _FW_LINKED)) - { - StopTxBeacon(Adapter); - } - - //enable to rx data frame.Accept all data frame - //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); - rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); - - if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); - else - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); - - if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) - { - RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; - } - else // Ad-hoc Mode - { - RetryLimit = 0x7; - } - } - else if(type == 1) //joinbss_event call back when join res < 0 - { - if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_)) - rtw_write16(Adapter, REG_RXFLTMAP2,0x00); - - if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && - check_buddy_fwstate(Adapter, _FW_LINKED)) - { - ResumeTxBeacon(Adapter); - - //reset TSF 1/2 after ResumeTxBeacon - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); - - } - } - else if(type == 2) //sta add event call back - { - - //enable update TSF - if(Adapter->iface_type == IFACE_PORT1) - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4))); - else - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); - - - if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) - { - //fixed beacon issue for 8191su........... - rtw_write8(Adapter,0x542 ,0x02); - RetryLimit = 0x7; - } - - - if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && - check_buddy_fwstate(Adapter, _FW_LINKED)) - { - ResumeTxBeacon(Adapter); - - //reset TSF 1/2 after ResumeTxBeacon - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); - } - - } - - rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); - -#endif -} -static void SetHwReg8188ES(PADAPTER Adapter, u8 variable, u8* val) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DM_ODM_T *podmpriv = &pHalData->odmpriv; -_func_enter_; - - switch(variable) - { - case HW_VAR_MEDIA_STATUS: - { - u8 val8; - - val8 = rtw_read8(Adapter, MSR)&0x0c; - val8 |= *((u8 *)val); - rtw_write8(Adapter, MSR, val8); - } - break; - case HW_VAR_MEDIA_STATUS1: - { - u8 val8; - - val8 = rtw_read8(Adapter, MSR)&0x03; - val8 |= *((u8 *)val) <<2; - rtw_write8(Adapter, MSR, val8); - } - break; - case HW_VAR_SET_OPMODE: - hw_var_set_opmode(Adapter, variable, val); - break; - case HW_VAR_MAC_ADDR: - hw_var_set_macaddr(Adapter, variable, val); - break; - case HW_VAR_BSSID: - hw_var_set_bssid(Adapter, variable, val); - break; - case HW_VAR_BASIC_RATE: - { - u16 BrateCfg = 0; - u8 RateIndex = 0; - - // 2007.01.16, by Emily - // Select RRSR (in Legacy-OFDM and CCK) - // For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. - // We do not use other rates. - HalSetBrateCfg( Adapter, val, &BrateCfg ); - DBG_8192C("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg); - - //2011.03.30 add by Luke Lee - //CCK 2M ACK should be disabled for some BCM and Atheros AP IOT - //because CCK 2M has poor TXEVM - //CCK 5.5M & 11M ACK should be enabled for better performance - - pHalData->BasicRateSet = BrateCfg = (BrateCfg |0xd) & 0x15d; - - BrateCfg |= 0x01; // default enable 1M ACK rate - // Set RRSR rate table. - rtw_write8(Adapter, REG_RRSR, BrateCfg&0xff); - rtw_write8(Adapter, REG_RRSR+1, (BrateCfg>>8)&0xff); - rtw_write8(Adapter, REG_RRSR+2, rtw_read8(Adapter, REG_RRSR+2)&0xf0); - - // Set RTS initial rate - while(BrateCfg > 0x1) - { - BrateCfg = (BrateCfg>> 1); - RateIndex++; - } - // Ziv - Check - rtw_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex); - } - break; - case HW_VAR_TXPAUSE: - rtw_write8(Adapter, REG_TXPAUSE, *((u8 *)val)); - break; - case HW_VAR_BCN_FUNC: - hw_var_set_bcn_func(Adapter, variable, val); - break; - case HW_VAR_CORRECT_TSF: -#ifdef CONFIG_CONCURRENT_MODE - hw_var_set_correct_tsf(Adapter, variable, val); -#else - { - u64 tsf; - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - //f = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us - tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) - 1024; //us - - if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || - ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) - { - //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) - //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); - StopTxBeacon(Adapter); - } - - // disable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); - - rtw_write32(Adapter, REG_TSFTR, tsf); - rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); - - // enable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); - - if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || - ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) - { - //pHalData->RegTxPause &= (~STOP_BCNQ); - //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6)))); - ResumeTxBeacon(Adapter); - } - } -#endif - break; - case HW_VAR_CHECK_BSSID: - if(*((u8 *)val)) - { - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); - } - else - { - u32 val32; - - val32 = rtw_read32(Adapter, REG_RCR); - - val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN); - - rtw_write32(Adapter, REG_RCR, val32); - } - break; - case HW_VAR_MLME_DISCONNECT: -#ifdef CONFIG_CONCURRENT_MODE - hw_var_set_mlme_disconnect(Adapter, variable, val); -#else - { - //Set RCR to not to receive data frame when NO LINK state - //rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR) & ~RCR_ADF); - //reject all data frames - rtw_write16(Adapter, REG_RXFLTMAP2,0x00); - - //reset TSF - rtw_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); - - //disable update TSF - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); - } -#endif - break; - case HW_VAR_MLME_SITESURVEY: -#ifdef CONFIG_CONCURRENT_MODE - hw_var_set_mlme_sitesurvey(Adapter, variable, val); -#else - if(*((u8 *)val))//under sitesurvey - { - //config RCR to receive different BSSID & not to receive data frame - u32 v = rtw_read32(Adapter, REG_RCR); - v &= ~(RCR_CBSSID_BCN); - rtw_write32(Adapter, REG_RCR, v); - //reject all data frame - rtw_write16(Adapter, REG_RXFLTMAP2,0x00); - - //disable update TSF - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); - } - else//sitesurvey done - { - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - if ((is_client_associated_to_ap(Adapter) == _TRUE) || - ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ) - { - //enable to rx data frame - //rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); - rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); - - //enable update TSF - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); - } - else if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) - { - //rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_ADF); - rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); - - //enable update TSF - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); - } - - if(Adapter->in_cta_test) - { - if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) - { - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); - } - else - { - u32 v = rtw_read32(Adapter, REG_RCR); - v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF - rtw_write32(Adapter, REG_RCR, v); - } - } - else - { - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); - } - } -#endif - break; - case HW_VAR_MLME_JOIN: -#ifdef CONFIG_CONCURRENT_MODE - hw_var_set_mlme_join(Adapter, variable, val); -#else - { - u8 RetryLimit = 0x30; - u8 type = *((u8 *)val); - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - - if(type == 0) // prepare to join - { - //enable to rx data frame.Accept all data frame - //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); - rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); - if(Adapter->in_cta_test) - { - u32 v = rtw_read32(Adapter, REG_RCR); - v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF - rtw_write32(Adapter, REG_RCR, v); - } - else - { - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); - } - if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) - { - RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; - } - else // Ad-hoc Mode - { - RetryLimit = 0x7; - } - } - else if(type == 1) //joinbss_event call back when join res < 0 - { - rtw_write16(Adapter, REG_RXFLTMAP2,0x00); - } - else if(type == 2) //sta add event call back - { - // enable update TSF - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); - - if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) - { - RetryLimit = 0x7; - } - } - - rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); - } -#endif - break; - case HW_VAR_ON_RCR_AM: - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_AM); - DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(Adapter, REG_RCR)); - break; - case HW_VAR_OFF_RCR_AM: - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)& (~RCR_AM)); - DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(Adapter, REG_RCR)); - break; - case HW_VAR_BEACON_INTERVAL: - rtw_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val)); - -#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - { - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - u16 bcn_interval = *((u16 *)val); - if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE){ - DBG_8192C("%s==> bcn_interval:%d, eraly_int:%d \n",__FUNCTION__,bcn_interval,bcn_interval>>1); - rtw_write8(Adapter, REG_DRVERLYINT, bcn_interval>>1);// 50ms for sdio - } - else{ - - } - } -#endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - - break; - case HW_VAR_SLOT_TIME: - { - u8 u1bAIFS, aSifsTime; - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - rtw_write8(Adapter, REG_SLOT, val[0]); - - if(pmlmeinfo->WMM_enable == 0) - { - if( pmlmeext->cur_wireless_mode == WIRELESS_11B) - aSifsTime = 10; - else - aSifsTime = 16; - - u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime); - - // Temporary removed, 2008.06.20. - rtw_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS); - rtw_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS); - rtw_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS); - rtw_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS); - } - } - break; - case HW_VAR_RESP_SIFS: - { -#if 0 - // SIFS for OFDM Data ACK - rtw_write8(Adapter, REG_SIFS_CTX+1, val[0]); - // SIFS for OFDM consecutive tx like CTS data! - rtw_write8(Adapter, REG_SIFS_TRX+1, val[1]); - - rtw_write8(Adapter,REG_SPEC_SIFS+1, val[0]); - rtw_write8(Adapter,REG_MAC_SPEC_SIFS+1, val[0]); - - // 20100719 Joseph: Revise SIFS setting due to Hardware register definition change. - rtw_write8(Adapter, REG_R2T_SIFS+1, val[0]); - rtw_write8(Adapter, REG_T2T_SIFS+1, val[0]); -#else - //SIFS_Timer = 0x0a0a0808; - //RESP_SIFS for CCK - rtw_write8(Adapter, REG_R2T_SIFS, val[0]); // SIFS_T2T_CCK (0x08) - rtw_write8(Adapter, REG_R2T_SIFS+1, val[1]); //SIFS_R2T_CCK(0x08) - //RESP_SIFS for OFDM - rtw_write8(Adapter, REG_T2T_SIFS, val[2]); //SIFS_T2T_OFDM (0x0a) - rtw_write8(Adapter, REG_T2T_SIFS+1, val[3]); //SIFS_R2T_OFDM(0x0a) -#endif - } - break; - case HW_VAR_ACK_PREAMBLE: - { - u8 regTmp; - u8 bShortPreamble = *( (PBOOLEAN)val ); - // Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) - regTmp = (pHalData->nCur40MhzPrimeSC)<<5; - //regTmp = 0; - if(bShortPreamble) - regTmp |= 0x80; - - rtw_write8(Adapter, REG_RRSR+2, regTmp); - } - break; - case HW_VAR_SEC_CFG: -#ifdef CONFIG_CONCURRENT_MODE - rtw_write8(Adapter, REG_SECCFG, 0x0c|BIT(5));// enable tx enc and rx dec engine, and no key search for MC/BC -#else - rtw_write8(Adapter, REG_SECCFG, *((u8 *)val)); -#endif - break; - case HW_VAR_DM_FLAG: - podmpriv->SupportAbility = *((u8 *)val); - break; - case HW_VAR_DM_FUNC_OP: - if(val[0]) - {// save dm flag - podmpriv->BK_SupportAbility = podmpriv->SupportAbility; - } - else - {// restore dm flag - podmpriv->SupportAbility = podmpriv->BK_SupportAbility; - } - break; - case HW_VAR_DM_FUNC_SET: - if(*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE){ - pdmpriv->DMFlag = pdmpriv->InitDMFlag; - podmpriv->SupportAbility = pdmpriv->InitODMFlag; - } - else{ - podmpriv->SupportAbility |= *((u32 *)val); - } - break; - case HW_VAR_DM_FUNC_CLR: - podmpriv->SupportAbility &= *((u32 *)val); - break; - case HW_VAR_CAM_EMPTY_ENTRY: - { - u8 ucIndex = *((u8 *)val); - u8 i; - u32 ulCommand=0; - u32 ulContent=0; - u32 ulEncAlgo=CAM_AES; - - for(i=0;iAcParam_BE = ((u32 *)(val))[0]; - rtw_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]); - break; - case HW_VAR_AC_PARAM_BK: - rtw_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]); - break; - case HW_VAR_AMPDU_MIN_SPACE: - { - u8 MinSpacingToSet; - u8 SecMinSpace; - - MinSpacingToSet = *((u8 *)val); - if(MinSpacingToSet <= 7) - { - switch(Adapter->securitypriv.dot11PrivacyAlgrthm) - { - case _NO_PRIVACY_: - case _AES_: - SecMinSpace = 0; - break; - - case _WEP40_: - case _WEP104_: - case _TKIP_: - case _TKIP_WTMIC_: - SecMinSpace = 6; - break; - default: - SecMinSpace = 7; - break; - } - - if(MinSpacingToSet < SecMinSpace){ - MinSpacingToSet = SecMinSpace; - } - - //RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", Adapter->MgntInfo.MinSpaceCfg)); - rtw_write8(Adapter, REG_AMPDU_MIN_SPACE, (rtw_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet); - } - } - break; - case HW_VAR_AMPDU_FACTOR: - { - u8 RegToSet_Normal[4]={0x41,0xa8,0x72, 0xb9}; - u8 RegToSet_BT[4]={0x31,0x74,0x42, 0x97}; - u8 FactorToSet; - u8 *pRegToSet; - u8 index = 0; - -#ifdef CONFIG_BT_COEXIST - if( (pHalData->bt_coexist.BT_Coexist) && - (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) ) - pRegToSet = RegToSet_BT; // 0x97427431; - else -#endif - pRegToSet = RegToSet_Normal; // 0xb972a841; - - FactorToSet = *((u8 *)val); - if(FactorToSet <= 3) - { - FactorToSet = (1<<(FactorToSet + 2)); - if(FactorToSet>0xf) - FactorToSet = 0xf; - - for(index=0; index<4; index++) - { - if((pRegToSet[index] & 0xf0) > (FactorToSet<<4)) - pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4); - - if((pRegToSet[index] & 0x0f) > FactorToSet) - pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet); - - rtw_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]); - } - - //RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_FACTOR: %#x\n", FactorToSet)); - } - } - break; - case HW_VAR_RXDMA_AGG_PG_TH: - rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, *((u8 *)val)); - break; - case HW_VAR_SET_RPWM: -#ifdef CONFIG_LPS_LCLK - { - u8 ps_state = *((u8 *)val); - DBG_871X_LEVEL(_drv_debug_, "+%s: ps_state:0x%02x+\n", __func__, ps_state); - //rpwm value only use BIT0(clock bit) ,BIT6(Ack bit), and BIT7(Toggle bit) for 88e. - //BIT0 value - 1: 32k, 0:40MHz. - //BIT6 value - 1: report cpwm value after success set, 0:do not report. - //BIT7 value - Toggle bit change. - //modify by Thomas. 2012/4/2. - ps_state = ps_state & 0xC1; - -#ifdef CONFIG_EXT_CLK //for sprd - if(ps_state&BIT(6)) // want to leave 32k - { - //enable ext clock req before leave LPS-32K - //DBG_871X("enable ext clock req before leaving LPS-32K\n"); - EnableGpio5ClockReq(Adapter, _FALSE, 1); - } -#endif //CONFIG_EXT_CLK - - //DBG_871X("##### Change RPWM value to = %x for switch clk #####\n",ps_state); - rtw_write8(Adapter, SDIO_LOCAL_BASE|SDIO_REG_HRPWM1, ps_state); - DBG_871X_LEVEL(_drv_debug_, "-%s: ps_state:0x%02x-\n", __func__, ps_state); - } -#endif - break; - case HW_VAR_H2C_FW_PWRMODE: - { - u8 psmode = (*(u8 *)val); - - // Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power - // saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. - if( (psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(pHalData->VersionID))) - { - ODM_RF_Saving(podmpriv, _TRUE); - } - rtl8188e_set_FwPwrMode_cmd(Adapter, psmode); - } - break; - case HW_VAR_H2C_FW_JOINBSSRPT: - { - u8 mstatus = (*(u8 *)val); - rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus); - } - break; -#ifdef CONFIG_P2P_PS - case HW_VAR_H2C_FW_P2P_PS_OFFLOAD: - { - u8 p2p_ps_state = (*(u8 *)val); - rtl8188e_set_p2p_ps_offload_cmd(Adapter, p2p_ps_state); - } - break; -#endif // CONFIG_P2P_PS - case HW_VAR_INITIAL_GAIN: - { - DIG_T *pDigTable = &podmpriv->DM_DigTable; - u32 rx_gain = ((u32 *)(val))[0]; - - if(rx_gain == 0xff){//restore rx gain - ODM_Write_DIG(podmpriv,pDigTable->BackupIGValue); - } - else{ - pDigTable->BackupIGValue = pDigTable->CurIGValue; - ODM_Write_DIG(podmpriv,rx_gain); - } - } - break; - case HW_VAR_TRIGGER_GPIO_0: -// rtl8192cu_trigger_gpio_0(Adapter); - break; -#ifdef CONFIG_BT_COEXIST - case HW_VAR_BT_SET_COEXIST: - { - u8 bStart = (*(u8 *)val); - rtl8192c_set_dm_bt_coexist(Adapter, bStart); - } - break; - case HW_VAR_BT_ISSUE_DELBA: - { - u8 dir = (*(u8 *)val); - rtl8192c_issue_delete_ba(Adapter, dir); - } - break; -#endif -#if (RATE_ADAPTIVE_SUPPORT==1) - case HW_VAR_RPT_TIMER_SETTING: - { - u16 min_rpt_time = (*(u16 *)val); - - //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); - - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, Optimum_antenna); - ODM_RA_Set_TxRPT_Time(podmpriv,min_rpt_time); - } - break; -#endif - -#ifdef CONFIG_SW_ANTENNA_DIVERSITY - case HW_VAR_ANTENNA_DIVERSITY_LINK: - //SwAntDivRestAfterLink8192C(Adapter); - ODM_SwAntDivRestAfterLink(podmpriv); - break; -#endif -#ifdef CONFIG_ANTENNA_DIVERSITY - case HW_VAR_ANTENNA_DIVERSITY_SELECT: - { - u8 Optimum_antenna = (*(u8 *)val); - u8 Ant ; - //switch antenna to Optimum_antenna - //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); - if(pHalData->CurAntenna != Optimum_antenna) - { - Ant = (Optimum_antenna==2)?MAIN_ANT:AUX_ANT; - ODM_UpdateRxIdleAnt_88E(&pHalData->odmpriv, Ant); - - pHalData->CurAntenna = Optimum_antenna ; - //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); - } - } - break; -#endif - case HW_VAR_EFUSE_BYTES: // To set EFUE total used bytes, added by Roger, 2008.12.22. - pHalData->EfuseUsedBytes = *((u16 *)val); - break; - case HW_VAR_FIFO_CLEARN_UP: - { - struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(Adapter); - u8 trycnt = 100; - - //pause tx - rtw_write8(Adapter,REG_TXPAUSE,0xff); - - //keep sn - Adapter->xmitpriv.nqos_ssn = rtw_read16(Adapter,REG_NQOS_SEQ); - - //RX DMA stop - rtw_write32(Adapter,REG_RXPKT_NUM,(rtw_read32(Adapter,REG_RXPKT_NUM)|RW_RELEASE_EN)); - do{ - if(!(rtw_read32(Adapter,REG_RXPKT_NUM)&RXDMA_IDLE)) - break; - }while(trycnt--); - if(trycnt ==0) - DBG_8192C("Stop RX DMA failed...... \n"); - - //RQPN Load 0 - rtw_write16(Adapter,REG_RQPN_NPQ,0x0); - rtw_write32(Adapter,REG_RQPN,0x80000000); - rtw_mdelay_os(10); - - } - break; - case HW_VAR_CHECK_TXBUF: -#ifdef CONFIG_CONCURRENT_MODE - { - int i; - u8 RetryLimit = 0x01; - - rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); - for(i=0;i<1000;i++) - { - if(rtw_read32(Adapter, 0x200) != rtw_read32(Adapter, 0x204)) - { - //DBG_871X("packet in tx packet buffer - 0x204=%x, 0x200=%x (%d)\n", rtw_read32(Adapter, 0x204), rtw_read32(Adapter, 0x200), i); - rtw_msleep_os(10); - } - else - { - DBG_871X("no packet in tx packet buffer (%d)\n", i); - break; - } - } - - RetryLimit = 0x30; - rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); - - } -#endif - break; -#ifdef CONFIG_WOWLAN - case HW_VAR_WOWLAN: - { - struct wowlan_ioctl_param *poidparam; - struct recv_buf *precvbuf; - struct security_priv *psecuritypriv = &Adapter->securitypriv; - struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter); - int res, i; - u32 tmp; - u16 len = 0; - u64 iv_low = 0, iv_high = 0; - u8 mstatus = (*(u8 *)val); - u8 trycnt = 100; - u8 data[4]; - u8 val8; - - poidparam = (struct wowlan_ioctl_param *)val; - switch (poidparam->subcode){ - case WOWLAN_ENABLE: - DBG_871X_LEVEL(_drv_always_, "WOWLAN_ENABLE\n"); - - val8 = (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)? 0xcc: 0xcf; - rtw_write8(Adapter, REG_SECCFG, val8); - DBG_871X_LEVEL(_drv_always_, "REG_SECCFG: %02x\n", rtw_read8(Adapter, REG_SECCFG)); - - SetFwRelatedForWoWLAN8188ES(Adapter, _TRUE); - - rtl8188e_set_FwJoinBssReport_cmd(Adapter, 1); - rtw_msleep_os(2); - - //Set Pattern - //if(adapter_to_pwrctl(Adapter)->wowlan_pattern==_TRUE) - // rtw_wowlan_reload_pattern(Adapter); - - //RX DMA stop - DBG_871X_LEVEL(_drv_always_, "Pause DMA\n"); - rtw_write32(Adapter,REG_RXPKT_NUM,(rtw_read32(Adapter,REG_RXPKT_NUM)|RW_RELEASE_EN)); - do{ - if((rtw_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE)) { - DBG_871X_LEVEL(_drv_always_, "RX_DMA_IDLE is true\n"); - break; - } else { - // If RX_DMA is not idle, receive one pkt from DMA - res = sdio_local_read(Adapter, SDIO_REG_RX0_REQ_LEN, 4, (u8*)&tmp); - //len = le16_to_cpu(*(u16*)data); - if (tmp == 0){ - res = sdio_local_read(Adapter, SDIO_REG_HISR, 4, (u8*)&tmp); - DBG_871X_LEVEL(_drv_info_, "read SDIO_REG_HISR: 0x%08x\n", tmp); - } - res = RecvOnePkt(Adapter, tmp); - DBG_871X_LEVEL(_drv_always_, "RecvOnePkt Result: %d\n", res); - } - }while(trycnt--); - if(trycnt ==0) - DBG_871X_LEVEL(_drv_always_, "Stop RX DMA failed...... \n"); - - //Enable CPWM2 only. - DBG_871X_LEVEL(_drv_always_, "Enable only CPWM2\n"); - res = sdio_local_read(Adapter, SDIO_REG_HIMR, 4, (u8*)&tmp); - if (!res) - DBG_871X_LEVEL(_drv_info_, "read SDIO_REG_HIMR: 0x%08x\n", tmp); - else - DBG_871X_LEVEL(_drv_info_, "sdio_local_read fail\n"); - - tmp = SDIO_HIMR_CPWM2_MSK; - - res = sdio_local_write(Adapter, SDIO_REG_HIMR, 4, (u8*)&tmp); - - if (!res){ - res = sdio_local_read(Adapter, SDIO_REG_HIMR, 4, (u8*)&tmp); - DBG_871X_LEVEL(_drv_info_, "read again SDIO_REG_HIMR: 0x%08x\n", tmp); - }else - DBG_871X_LEVEL(_drv_info_, "sdio_local_write fail\n"); - - //Set WOWLAN H2C command. - DBG_871X_LEVEL(_drv_always_, "Set WOWLan cmd\n"); - rtl8188es_set_wowlan_cmd(Adapter, 1); - - mstatus = rtw_read8(Adapter, REG_WOW_CTRL); - trycnt = 10; - - while(!(mstatus&BIT1) && trycnt>1) { - mstatus = rtw_read8(Adapter, REG_WOW_CTRL); - DBG_871X_LEVEL(_drv_always_, "Loop index: %d :0x%02x\n", trycnt, mstatus); - trycnt --; - rtw_msleep_os(2); - } - - pwrctl->wowlan_wake_reason = rtw_read8(Adapter, REG_WOWLAN_WAKE_REASON); - DBG_871X_LEVEL(_drv_always_, "wowlan_wake_reason: 0x%02x\n", pwrctl->wowlan_wake_reason); - - //rtw_msleep_os(10); - break; - case WOWLAN_DISABLE: - trycnt = 10; - - DBG_871X_LEVEL(_drv_always_, "WOWLAN_DISABLE\n"); - rtl8188e_set_FwJoinBssReport_cmd(Adapter, 0); - - rtw_write8( Adapter, REG_SECCFG, 0x0c|BIT(5));// enable tx enc and rx dec engine, and no key search for MC/BC - DBG_871X_LEVEL(_drv_always_, "REG_SECCFG: %02x\n", rtw_read8(Adapter, REG_SECCFG)); - - pwrctl->wowlan_wake_reason = rtw_read8(Adapter, REG_WOWLAN_WAKE_REASON); - DBG_871X_LEVEL(_drv_always_, "wakeup_reason: 0x%02x\n", pwrctl->wowlan_wake_reason); - rtl8188es_set_wowlan_cmd(Adapter, 0); - mstatus = rtw_read8(Adapter, REG_WOW_CTRL); - DBG_871X_LEVEL(_drv_info_, "%s mstatus:0x%02x\n", __func__, mstatus); - - while(mstatus&BIT1 && trycnt>1) { - mstatus = rtw_read8(Adapter, REG_WOW_CTRL); - DBG_871X_LEVEL(_drv_always_, "Loop index: %d :0x%02x\n", trycnt, mstatus); - trycnt --; - rtw_msleep_os(2); - } - - if (mstatus & BIT1) { - printk("System did not release RX_DMA\n"); - } else { - // 3.1 read fw iv - iv_low = rtw_read32(Adapter, REG_TXPKTBUF_IV_LOW); - iv_high = rtw_read32(Adapter, REG_TXPKTBUF_IV_HIGH); - pwrctl->wowlan_fw_iv = iv_high << 32 | iv_low; - DBG_871X_LEVEL(_drv_always_, "fw_iv: 0x%016llx\n", pwrctl->wowlan_fw_iv); - //Update TX iv data. - //rtw_set_sec_iv(Adapter); - SetFwRelatedForWoWLAN8188ES(Adapter, _FALSE); - } - if((pwrctl->wowlan_wake_reason != FWDecisionDisconnect) && - (pwrctl->wowlan_wake_reason != Rx_Pairwisekey) && - (pwrctl->wowlan_wake_reason != Rx_DisAssoc) && - (pwrctl->wowlan_wake_reason != Rx_DeAuth)) - rtl8188e_set_FwJoinBssReport_cmd(Adapter, 1); - - rtw_msleep_os(5); - - //rtw_msleep_os(10); - break; - default: - break; - } - } - break; -#endif //CONFIG_WOWLAN - case HW_VAR_APFM_ON_MAC: - pHalData->bMacPwrCtrlOn = *val; - DBG_871X("%s: bMacPwrCtrlOn=%d\n", __func__, pHalData->bMacPwrCtrlOn); - break; -#if (RATE_ADAPTIVE_SUPPORT == 1) - case HW_VAR_TX_RPT_MAX_MACID: - { - u8 maxMacid = *val; - DBG_8192C("### MacID(%d),Set Max Tx RPT MID(%d)\n",maxMacid,maxMacid+1); - rtw_write8(Adapter, REG_TX_RPT_CTRL+1, maxMacid+1); - } - break; -#endif // (RATE_ADAPTIVE_SUPPORT == 1) - case HW_VAR_H2C_MEDIA_STATUS_RPT: - { - rtl8188e_set_FwMediaStatus_cmd(Adapter , (*(u16 *)val)); - } - break; - case HW_VAR_BCN_VALID: - //BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw - rtw_write8(Adapter, REG_TDECTRL+2, rtw_read8(Adapter, REG_TDECTRL+2) | BIT0); - break; - default: - - break; - } - -_func_exit_; -} - -static void GetHwReg8188ES(PADAPTER padapter, u8 variable, u8 *val) -{ - PHAL_DATA_TYPE pHalData= GET_HAL_DATA(padapter); - DM_ODM_T *podmpriv = &pHalData->odmpriv; -_func_enter_; - - switch (variable) - { - case HW_VAR_BASIC_RATE: - *((u16*)val) = pHalData->BasicRateSet; - break; - - case HW_VAR_TXPAUSE: - val[0] = rtw_read8(padapter, REG_TXPAUSE); - break; - - case HW_VAR_BCN_VALID: - //BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 - val[0] = (BIT0 & rtw_read8(padapter, REG_TDECTRL+2))?_TRUE:_FALSE; - break; - - case HW_VAR_DM_FLAG: - val[0] = podmpriv->SupportAbility; - break; - - case HW_VAR_RF_TYPE: - val[0] = pHalData->rf_type; - break; - - case HW_VAR_FWLPS_RF_ON: - { - //When we halt NIC, we should check if FW LPS is leave. - if ((padapter->bSurpriseRemoved == _TRUE) || - (adapter_to_pwrctl(padapter)->rf_pwrstate == rf_off)) - { - // If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, - // because Fw is unload. - val[0] = _TRUE; - } - else - { - u32 valRCR; - valRCR = rtw_read32(padapter, REG_RCR); - valRCR &= 0x00070000; - if(valRCR) - val[0] = _FALSE; - else - val[0] = _TRUE; - } - } - break; -#ifdef CONFIG_ANTENNA_DIVERSITY - case HW_VAR_CURRENT_ANTENNA: - val[0] = pHalData->CurAntenna; - break; -#endif - case HW_VAR_EFUSE_BYTES: // To get EFUE total used bytes, added by Roger, 2008.12.22. - *((u16*)val) = pHalData->EfuseUsedBytes; - break; - - case HW_VAR_APFM_ON_MAC: - *val = pHalData->bMacPwrCtrlOn; - break; - case HW_VAR_CHK_HI_QUEUE_EMPTY: - *val = ((rtw_read32(padapter, REG_HGQ_INFORMATION)&0x0000ff00)==0) ? _TRUE:_FALSE; - break; - case HW_VAR_GET_CPWM: - *val = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HCPWM1); - break; - case HW_VAR_C2HEVT_CLEAR: - *val = rtw_read8(padapter, REG_C2HEVT_CLEAR); - break; - case HW_VAR_C2HEVT_MSG_NORMAL: - *val = rtw_read8(padapter, REG_C2HEVT_MSG_NORMAL); - break; - case HW_VAR_SYS_CLKR: - *val = rtw_read8(padapter, REG_SYS_CLKR); - break; - default: - break; - } - -_func_exit_; -} - -// -// Description: -// Query setting of specified variable. -// -u8 -GetHalDefVar8188ESDIO( - IN PADAPTER Adapter, - IN HAL_DEF_VARIABLE eVariable, - IN PVOID pValue - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 bResult = _SUCCESS; - - switch(eVariable) - { - case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB: - { - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - struct sta_priv * pstapriv = &Adapter->stapriv; - struct sta_info * psta; - psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress); - if(psta) - { - *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB; - } - } - - break; - case HAL_DEF_IS_SUPPORT_ANT_DIV: - #ifdef CONFIG_ANTENNA_DIVERSITY - *((u8 *)pValue) = (pHalData->AntDivCfg==0)?_FALSE:_TRUE; - #endif - break; - case HAL_DEF_CURRENT_ANTENNA: -#ifdef CONFIG_ANTENNA_DIVERSITY - *(( u8*)pValue) = pHalData->CurAntenna; -#endif - break; -#if (RATE_ADAPTIVE_SUPPORT == 1) - case HAL_DEF_RA_DECISION_RATE: - { - u8 MacID = *((u8*)pValue); - *((u8*)pValue) = ODM_RA_GetDecisionRate_8188E(&(pHalData->odmpriv), MacID); - } - break; - - case HAL_DEF_RA_SGI: - { - u8 MacID = *((u8*)pValue); - *((u8*)pValue) = ODM_RA_GetShortGI_8188E(&(pHalData->odmpriv), MacID); - } - break; -#endif - - - case HAL_DEF_PT_PWR_STATUS: -#if(POWER_TRAINING_ACTIVE==1) - { - u8 MacID = *((u8*)pValue); - *((u8*)pValue) = ODM_RA_GetHwPwrStatus_8188E(&(pHalData->odmpriv), MacID); - } -#endif //(POWER_TRAINING_ACTIVE==1) - break; - - case HW_VAR_MAX_RX_AMPDU_FACTOR: - *(( u32*)pValue) = MAX_AMPDU_FACTOR_16K; - break; - - case HW_DEF_RA_INFO_DUMP: -#if (RATE_ADAPTIVE_SUPPORT == 1) - { - u8 entry_id = *((u8*)pValue); - u8 i; - u8 bLinked = _FALSE; -#ifdef CONFIG_CONCURRENT_MODE - PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; -#endif //CONFIG_CONCURRENT_MODE - - //if(check_fwstate(&Adapter->mlmepriv, _FW_LINKED)== _TRUE) - - if(rtw_linked_check(Adapter)) - bLinked = _TRUE; - -#ifdef CONFIG_CONCURRENT_MODE - if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter)) - bLinked = _TRUE; -#endif - - if(bLinked){ - DBG_871X("============ RA status check ===================\n"); - if(Adapter->bRxRSSIDisplay >30) - Adapter->bRxRSSIDisplay = 1; - for(i=0;i< Adapter->bRxRSSIDisplay;i++){ - DBG_8192C("Mac_id:%d ,RSSI:%d ,RateID = %d,RAUseRate = 0x%08x,RateSGI = %d, DecisionRate = 0x%02x ,PTStage = %d\n", - i, - pHalData->odmpriv.RAInfo[i].RssiStaRA, - pHalData->odmpriv.RAInfo[i].RateID, - pHalData->odmpriv.RAInfo[i].RAUseRate, - pHalData->odmpriv.RAInfo[i].RateSGI, - pHalData->odmpriv.RAInfo[i].DecisionRate, - pHalData->odmpriv.RAInfo[i].PTStage); - } - } - } -#endif // (RATE_ADAPTIVE_SUPPORT == 1) - break; - - case HAL_DEF_DBG_DUMP_RXPKT: - *(( u8*)pValue) = pHalData->bDumpRxPkt; - break; - case HAL_DEF_DBG_DUMP_TXPKT: - *(( u8*)pValue) = pHalData->bDumpTxPkt; - break; - default: - bResult = GetHalDefVar(Adapter, eVariable, pValue); - break; - } - - return bResult; -} - - - - -// -// Description: -// Change default setting of specified variable. -// -u8 -SetHalDefVar8188ESDIO( - IN PADAPTER Adapter, - IN HAL_DEF_VARIABLE eVariable, - IN PVOID pValue - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 bResult = _TRUE; - - switch(eVariable) - { - case HAL_DEF_DBG_DM_FUNC: - { - u8 dm_func = *(( u8*)pValue); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DM_ODM_T *podmpriv = &pHalData->odmpriv; - - if(dm_func == 0){ //disable all dynamic func - podmpriv->SupportAbility = DYNAMIC_FUNC_DISABLE; - DBG_8192C("==> Disable all dynamic function...\n"); - } - else if(dm_func == 1){//disable DIG - podmpriv->SupportAbility &= (~DYNAMIC_BB_DIG); - DBG_8192C("==> Disable DIG...\n"); - } - else if(dm_func == 2){//disable High power - podmpriv->SupportAbility &= (~DYNAMIC_BB_DYNAMIC_TXPWR); - } - else if(dm_func == 3){//disable tx power tracking - podmpriv->SupportAbility &= (~DYNAMIC_RF_CALIBRATION); - DBG_8192C("==> Disable tx power tracking...\n"); - } - //else if(dm_func == 4){//disable BT coexistence - // pdmpriv->DMFlag &= (~DYNAMIC_FUNC_BT); - //} - else if(dm_func == 5){//disable antenna diversity - podmpriv->SupportAbility &= (~DYNAMIC_BB_ANT_DIV); - } - else if(dm_func == 6){//turn on all dynamic func - if(!(podmpriv->SupportAbility & DYNAMIC_BB_DIG)) - { - DIG_T *pDigTable = &podmpriv->DM_DigTable; - pDigTable->CurIGValue= rtw_read8(Adapter,0xc50); - } - //pdmpriv->DMFlag |= DYNAMIC_FUNC_BT; - podmpriv->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE; - DBG_8192C("==> Turn on all dynamic function...\n"); - } - } - break; - case HAL_DEF_DBG_DUMP_RXPKT: - pHalData->bDumpRxPkt = *(( u8*)pValue); - break; - case HAL_DEF_DBG_DUMP_TXPKT: - pHalData->bDumpTxPkt = *(( u8*)pValue); - break; - default: - bResult = SetHalDefVar(Adapter, eVariable, pValue); - break; - } - - return bResult; -} - -void UpdateHalRAMask8188ESdio(PADAPTER padapter, u32 mac_id, u8 rssi_level) -{ - //volatile unsigned int result; - u8 init_rate=0; - u8 networkType, raid; - u32 mask,rate_bitmap; - u8 shortGIrate = _FALSE; - int supportRateNum = 0; - struct sta_info *psta; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - //struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); - - if (mac_id >= NUM_STA) //CAM_SIZE - { - return; - } - - psta = pmlmeinfo->FW_sta_info[mac_id].psta; - if(psta == NULL) - { - return; - } - - switch (mac_id) - { - case 0:// for infra mode -#ifdef CONFIG_CONCURRENT_MODE - case 2:// first station uses macid=0, second station uses macid=2 -#endif - supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates); - networkType = judge_network_type(padapter, cur_network->SupportedRates, supportRateNum) & 0xf; - //pmlmeext->cur_wireless_mode = networkType; - raid = networktype_to_raid(networkType); - - mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); - mask |= (pmlmeinfo->HT_enable)? update_MSC_rate(&(pmlmeinfo->HT_caps)): 0; - - - if (support_short_GI(padapter, &(pmlmeinfo->HT_caps))) - { - shortGIrate = _TRUE; - } - - break; - - case 1://for broadcast/multicast - supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); - if(pmlmeext->cur_wireless_mode & WIRELESS_11B) - networkType = WIRELESS_11B; - else - networkType = WIRELESS_11G; - raid = networktype_to_raid(networkType); - mask = update_basic_rate(cur_network->SupportedRates, supportRateNum); - - - break; - - default: //for each sta in IBSS - supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); - networkType = judge_network_type(padapter, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf; - //pmlmeext->cur_wireless_mode = networkType; - raid = networktype_to_raid(networkType); - mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); - - //todo: support HT in IBSS - - break; - } - - //mask &=0xffffffff; - rate_bitmap = 0x0fffffff; -#ifdef CONFIG_ODM_REFRESH_RAMASK - { - rate_bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv,mac_id,mask,rssi_level); - DBG_8192C("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n", - __FUNCTION__,mac_id,networkType,mask,rssi_level,rate_bitmap); - } -#endif - mask &= rate_bitmap; - - - init_rate = get_highest_rate_idx(mask)&0x3f; - - if(pHalData->fw_ractrl == _TRUE) - { - u8 arg = 0; - - //arg = (cam_idx-4)&0x1f;//MACID - arg = mac_id&0x1f;//MACID - - arg |= BIT(7); - - if (shortGIrate==_TRUE) - arg |= BIT(5); - mask |= ((raid<<28)&0xf0000000); - - DBG_871X("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg); - psta->ra_mask=mask; -#ifdef CONFIG_INTEL_PROXIM - if(padapter->proximity.proxim_on ==_TRUE){ - arg &= ~BIT(6); - } - else { - arg |= BIT(6); - } -#endif //CONFIG_INTEL_PROXIM - rtl8188e_set_raid_cmd(padapter, mask); - - } - else - { - -#if(RATE_ADAPTIVE_SUPPORT == 1) - - ODM_RA_UpdateRateInfo_8188E( - &(pHalData->odmpriv), - mac_id, - raid, - mask, - shortGIrate - ); - -#endif - } - - - //set ra_id - psta->raid = raid; - psta->init_rate = init_rate; - - -} - - -static VOID -_BeaconFunctionEnable( - IN PADAPTER padapter, - IN BOOLEAN Enable, - IN BOOLEAN Linked - ) -{ - rtw_write8(padapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1)); -// RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("_BeaconFunctionEnable 0x550 0x%x\n", rtw_read8(padapter, 0x550))); - - rtw_write8(padapter, REG_RD_CTRL+1, 0x6F); -} - -void SetBeaconRelatedRegisters8188ESdio(PADAPTER padapter) -{ - u32 value32; - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - u32 bcn_ctrl_reg = REG_BCN_CTRL; - //reset TSF, enable update TSF, correcting TSF On Beacon - - //REG_BCN_INTERVAL - //REG_BCNDMATIM - //REG_ATIMWND - //REG_TBTT_PROHIBIT - //REG_DRVERLYINT - //REG_BCN_MAX_ERR - //REG_BCNTCFG //(0x510) - //REG_DUAL_TSF_RST - //REG_BCN_CTRL //(0x550) - - -#ifdef CONFIG_CONCURRENT_MODE - if (padapter->iface_type == IFACE_PORT1){ - bcn_ctrl_reg = REG_BCN_CTRL_1; - } -#endif - // - // ATIM window - // - rtw_write16(padapter, REG_ATIMWND, 2); - - // - // Beacon interval (in unit of TU). - // - rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval); - - _InitBeaconParameters(padapter); - - rtw_write8(padapter, REG_SLOT, 0x09); - - // - // Force beacon frame transmission even after receiving beacon frame from other ad hoc STA - // - //PlatformEFIOWrite1Byte(Adapter, BCN_ERR_THRESH, 0x0a); // We force beacon sent to prevent unexpect disconnect status in Ad hoc mode - - // - // Reset TSF Timer to zero, added by Roger. 2008.06.24 - // - value32 = rtw_read32(padapter, REG_TCR); - value32 &= ~TSFRST; - rtw_write32(padapter, REG_TCR, value32); - - value32 |= TSFRST; - rtw_write32(padapter, REG_TCR, value32); - - // TODO: Modify later (Find the right parameters) - // NOTE: Fix test chip's bug (about contention windows's randomness) -// if (OpMode == RT_OP_MODE_IBSS || OpMode == RT_OP_MODE_AP) - if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_AP_STATE) == _TRUE) - { - rtw_write8(padapter, REG_RXTSF_OFFSET_CCK, 0x50); - rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50); - } - - _BeaconFunctionEnable(padapter, _TRUE, _TRUE); - - ResumeTxBeacon(padapter); - rtw_write8(padapter, bcn_ctrl_reg, rtw_read8(padapter, bcn_ctrl_reg)|BIT(1)); -} - -void rtl8188es_set_hal_ops(PADAPTER padapter) -{ - struct hal_ops *pHalFunc = &padapter->HalFunc; - -_func_enter_; - - -#ifdef CONFIG_CONCURRENT_MODE - if(padapter->isprimary) -#endif //CONFIG_CONCURRENT_MODE - { - //set hardware operation functions - padapter->HalData = rtw_zmalloc(sizeof(HAL_DATA_TYPE)); - if(padapter->HalData == NULL){ - DBG_8192C("cant not alloc memory for HAL DATA \n"); - } - } - - padapter->hal_data_sz = sizeof(HAL_DATA_TYPE); - - pHalFunc->hal_power_on = InitPowerOn_rtl8188es; - pHalFunc->hal_power_off = hal_poweroff_rtl8188es; - - pHalFunc->hal_init = &rtl8188es_hal_init; - pHalFunc->hal_deinit = &rtl8188es_hal_deinit; - - pHalFunc->inirp_init = &rtl8188es_inirp_init; - pHalFunc->inirp_deinit = &rtl8188es_inirp_deinit; - - pHalFunc->init_xmit_priv = &rtl8188es_init_xmit_priv; - pHalFunc->free_xmit_priv = &rtl8188es_free_xmit_priv; - - pHalFunc->init_recv_priv = &rtl8188es_init_recv_priv; - pHalFunc->free_recv_priv = &rtl8188es_free_recv_priv; - - pHalFunc->InitSwLeds = &rtl8188es_InitSwLeds; - pHalFunc->DeInitSwLeds = &rtl8188es_DeInitSwLeds; - - pHalFunc->init_default_value = &rtl8188es_init_default_value; - pHalFunc->intf_chip_configure = &rtl8188es_interface_configure; - pHalFunc->read_adapter_info = &ReadAdapterInfo8188ES; - - pHalFunc->enable_interrupt = &EnableInterrupt8188ESdio; - pHalFunc->disable_interrupt = &DisableInterrupt8188ESdio; - -#ifdef CONFIG_WOWLAN - pHalFunc->clear_interrupt = &ClearInterrupt8189ESdio; -#endif - - pHalFunc->SetHwRegHandler = &SetHwReg8188ES; - pHalFunc->GetHwRegHandler = &GetHwReg8188ES; - - pHalFunc->GetHalDefVarHandler = &GetHalDefVar8188ESDIO; - pHalFunc->SetHalDefVarHandler = &SetHalDefVar8188ESDIO; - - pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8188ESdio; - pHalFunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8188ESdio; - - pHalFunc->hal_xmit = &rtl8188es_hal_xmit; - pHalFunc->mgnt_xmit = &rtl8188es_mgnt_xmit; - pHalFunc->hal_xmitframe_enqueue = &rtl8188es_hal_xmitframe_enqueue; - -#ifdef CONFIG_HOSTAPD_MLME - pHalFunc->hostap_mgnt_xmit_entry = NULL; -// pHalFunc->hostap_mgnt_xmit_entry = &rtl8192cu_hostap_mgnt_xmit_entry; -#endif - rtl8188e_set_hal_ops(pHalFunc); -_func_exit_; - -} - diff --git a/hal/rtl8188e/sdio/sdio_ops.c b/hal/rtl8188e/sdio/sdio_ops.c deleted file mode 100755 index 8646143..0000000 --- a/hal/rtl8188e/sdio/sdio_ops.c +++ /dev/null @@ -1,1957 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - *******************************************************************************/ -#define _SDIO_OPS_C_ - -#include -#include -#include -#include - -//#define SDIO_DEBUG_IO 1 - -#ifdef CONFIG_EXT_CLK -void EnableGpio5ClockReq(PADAPTER Adapter, u8 in_interrupt, u32 Enable); -#endif //CONFIG_EXT_CLK -// -// Description: -// The following mapping is for SDIO host local register space. -// -// Creadted by Roger, 2011.01.31. -// -static void HalSdioGetCmdAddr8723ASdio( - IN PADAPTER padapter, - IN u8 DeviceID, - IN u32 Addr, - OUT u32* pCmdAddr - ) -{ - switch (DeviceID) - { - case SDIO_LOCAL_DEVICE_ID: - *pCmdAddr = ((SDIO_LOCAL_DEVICE_ID << 13) | (Addr & SDIO_LOCAL_MSK)); - break; - - case WLAN_IOREG_DEVICE_ID: - *pCmdAddr = ((WLAN_IOREG_DEVICE_ID << 13) | (Addr & WLAN_IOREG_MSK)); - break; - - case WLAN_TX_HIQ_DEVICE_ID: - *pCmdAddr = ((WLAN_TX_HIQ_DEVICE_ID << 13) | (Addr & WLAN_FIFO_MSK)); - break; - - case WLAN_TX_MIQ_DEVICE_ID: - *pCmdAddr = ((WLAN_TX_MIQ_DEVICE_ID << 13) | (Addr & WLAN_FIFO_MSK)); - break; - - case WLAN_TX_LOQ_DEVICE_ID: - *pCmdAddr = ((WLAN_TX_LOQ_DEVICE_ID << 13) | (Addr & WLAN_FIFO_MSK)); - break; - - case WLAN_RX0FF_DEVICE_ID: - *pCmdAddr = ((WLAN_RX0FF_DEVICE_ID << 13) | (Addr & WLAN_RX0FF_MSK)); - break; - - default: - break; - } -} - -static u8 get_deviceid(u32 addr) -{ - u8 devideId; - u16 pseudoId; - - - pseudoId = (u16)(addr >> 16); - switch (pseudoId) - { - case 0x1025: - devideId = SDIO_LOCAL_DEVICE_ID; - break; - - case 0x1026: - devideId = WLAN_IOREG_DEVICE_ID; - break; - -// case 0x1027: -// devideId = SDIO_FIRMWARE_FIFO; -// break; - - case 0x1031: - devideId = WLAN_TX_HIQ_DEVICE_ID; - break; - - case 0x1032: - devideId = WLAN_TX_MIQ_DEVICE_ID; - break; - - case 0x1033: - devideId = WLAN_TX_LOQ_DEVICE_ID; - break; - - case 0x1034: - devideId = WLAN_RX0FF_DEVICE_ID; - break; - - default: -// devideId = (u8)((addr >> 13) & 0xF); - devideId = WLAN_IOREG_DEVICE_ID; - break; - } - - return devideId; -} - -/* - * Ref: - * HalSdioGetCmdAddr8723ASdio() - */ -static u32 _cvrt2ftaddr(const u32 addr, u8 *pdeviceId, u16 *poffset) -{ - u8 deviceId; - u16 offset; - u32 ftaddr; - - - deviceId = get_deviceid(addr); - offset = 0; - - switch (deviceId) - { - case SDIO_LOCAL_DEVICE_ID: - offset = addr & SDIO_LOCAL_MSK; - break; - - case WLAN_TX_HIQ_DEVICE_ID: - case WLAN_TX_MIQ_DEVICE_ID: - case WLAN_TX_LOQ_DEVICE_ID: - offset = addr & WLAN_FIFO_MSK; - break; - - case WLAN_RX0FF_DEVICE_ID: - offset = addr & WLAN_RX0FF_MSK; - break; - - case WLAN_IOREG_DEVICE_ID: - default: - deviceId = WLAN_IOREG_DEVICE_ID; - offset = addr & WLAN_IOREG_MSK; - break; - } - ftaddr = (deviceId << 13) | offset; - - if (pdeviceId) *pdeviceId = deviceId; - if (poffset) *poffset = offset; - - return ftaddr; -} - -u8 _sdio_read8(PADAPTER padapter, u32 addr) -{ - struct intf_hdl * pintfhdl; - u32 ftaddr; - u8 val; - -_func_enter_; - - pintfhdl=&padapter->iopriv.intf; - - ftaddr = _cvrt2ftaddr(addr, NULL, NULL); - val = _sd_read8(pintfhdl, ftaddr, NULL); - -_func_exit_; - - return val; -} - -u8 sdio_read8(struct intf_hdl *pintfhdl, u32 addr) -{ - u32 ftaddr; - u8 val; - -_func_enter_; - ftaddr = _cvrt2ftaddr(addr, NULL, NULL); - val = sd_read8(pintfhdl, ftaddr, NULL); - -_func_exit_; - - return val; -} - -u16 sdio_read16(struct intf_hdl *pintfhdl, u32 addr) -{ - u32 ftaddr; - u16 val; - -_func_enter_; - - ftaddr = _cvrt2ftaddr(addr, NULL, NULL); - sd_cmd52_read(pintfhdl, ftaddr, 2, (u8*)&val); - val = le16_to_cpu(val); - -_func_exit_; - - return val; -} - -u32 _sdio_read32(PADAPTER padapter, u32 addr) -{ - //PADAPTER padapter; - struct intf_hdl * pintfhdl; - u8 bMacPwrCtrlOn; - u8 deviceId; - u16 offset; - u32 ftaddr; - u8 shift; - u32 val; - s32 err; - -_func_enter_; - - pintfhdl=&padapter->iopriv.intf; - - ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); - - rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) - || (_FALSE == bMacPwrCtrlOn) -#ifdef CONFIG_LPS_LCLK - || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -#endif - ) - { - err = _sd_cmd52_read(pintfhdl, ftaddr, 4, (u8*)&val); -#ifdef SDIO_DEBUG_IO - if (!err) { -#endif - val = le32_to_cpu(val); - return val; -#ifdef SDIO_DEBUG_IO - } - - DBG_871X(KERN_ERR "%s: Mac Power off, Read FAIL(%d)! addr=0x%x\n", __func__, err, addr); - return SDIO_ERR_VAL32; -#endif - } - - // 4 bytes alignment - shift = ftaddr & 0x3; - if (shift == 0) { - val = _sd_read32(pintfhdl, ftaddr, NULL); - } else { - u8 *ptmpbuf; - - ptmpbuf = (u8*)rtw_malloc(8); - if (NULL == ptmpbuf) { - DBG_871X(KERN_ERR "%s: Allocate memory FAIL!(size=8) addr=0x%x\n", __func__, addr); - return SDIO_ERR_VAL32; - } - - ftaddr &= ~(u16)0x3; - _sd_read(pintfhdl, ftaddr, 8, ptmpbuf); - _rtw_memcpy(&val, ptmpbuf+shift, 4); - val = le32_to_cpu(val); - - rtw_mfree(ptmpbuf, 8); - } - -_func_exit_; - - return val; -} - -u32 sdio_read32(struct intf_hdl *pintfhdl, u32 addr) -{ - PADAPTER padapter; - u8 bMacPwrCtrlOn; - u8 deviceId; - u16 offset; - u32 ftaddr; - u8 shift; - u32 val; - s32 err; - -_func_enter_; - - padapter = pintfhdl->padapter; - - ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); - - rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) - || (_FALSE == bMacPwrCtrlOn) -#ifdef CONFIG_LPS_LCLK - || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -#endif - ) - { - err = sd_cmd52_read(pintfhdl, ftaddr, 4, (u8*)&val); -#ifdef SDIO_DEBUG_IO - if (!err) { -#endif - val = le32_to_cpu(val); - return val; -#ifdef SDIO_DEBUG_IO - } - - DBG_871X(KERN_ERR "%s: Mac Power off, Read FAIL(%d)! addr=0x%x\n", __func__, err, addr); - return SDIO_ERR_VAL32; -#endif - } - - // 4 bytes alignment - shift = ftaddr & 0x3; - if (shift == 0) { - val = sd_read32(pintfhdl, ftaddr, NULL); - } else { - u8 *ptmpbuf; - - ptmpbuf = (u8*)rtw_malloc(8); - if (NULL == ptmpbuf) { - DBG_871X(KERN_ERR "%s: Allocate memory FAIL!(size=8) addr=0x%x\n", __func__, addr); - return SDIO_ERR_VAL32; - } - - ftaddr &= ~(u16)0x3; - sd_read(pintfhdl, ftaddr, 8, ptmpbuf); - _rtw_memcpy(&val, ptmpbuf+shift, 4); - val = le32_to_cpu(val); - - rtw_mfree(ptmpbuf, 8); - } - -_func_exit_; - - return val; -} - -s32 sdio_readN(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8* pbuf) -{ - PADAPTER padapter; - u8 bMacPwrCtrlOn; - u8 deviceId; - u16 offset; - u32 ftaddr; - u8 shift; - s32 err; - -_func_enter_; - - padapter = pintfhdl->padapter; - err = 0; - - ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); - - rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) - || (_FALSE == bMacPwrCtrlOn) -#ifdef CONFIG_LPS_LCLK - || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -#endif - ) - { - err = sd_cmd52_read(pintfhdl, ftaddr, cnt, pbuf); - return err; - } - - // 4 bytes alignment - shift = ftaddr & 0x3; - if (shift == 0) { - err = sd_read(pintfhdl, ftaddr, cnt, pbuf); - } else { - u8 *ptmpbuf; - u32 n; - - ftaddr &= ~(u16)0x3; - n = cnt + shift; - ptmpbuf = rtw_malloc(n); - if (NULL == ptmpbuf) return -1; - err = sd_read(pintfhdl, ftaddr, n, ptmpbuf); - if (!err) - _rtw_memcpy(pbuf, ptmpbuf+shift, cnt); - rtw_mfree(ptmpbuf, n); - } - -_func_exit_; - - return err; -} - -s32 sdio_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) -{ - u32 ftaddr; - s32 err; - -_func_enter_; - ftaddr = _cvrt2ftaddr(addr, NULL, NULL); - sd_write8(pintfhdl, ftaddr, val, &err); - -_func_exit_; - - return err; -} - -s32 sdio_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) -{ - u32 ftaddr; - u8 shift; - s32 err; - -_func_enter_; - ftaddr = _cvrt2ftaddr(addr, NULL, NULL); - val = cpu_to_le16(val); - err = sd_cmd52_write(pintfhdl, ftaddr, 2, (u8*)&val); - -_func_exit_; - - return err; -} - -s32 _sdio_write32(PADAPTER padapter, u32 addr, u32 val) -{ - //PADAPTER padapter; - struct intf_hdl * pintfhdl; - u8 bMacPwrCtrlOn; - u8 deviceId; - u16 offset; - u32 ftaddr; - u8 shift; - s32 err; - -_func_enter_; - - pintfhdl=&padapter->iopriv.intf; - err = 0; - - ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); - - rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) - || (_FALSE == bMacPwrCtrlOn) -#ifdef CONFIG_LPS_LCLK - || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -#endif - ) - { - val = cpu_to_le32(val); - err = _sd_cmd52_write(pintfhdl, ftaddr, 4, (u8*)&val); - return err; - } - - // 4 bytes alignment - shift = ftaddr & 0x3; -#if 1 - if (shift == 0) - { - _sd_write32(pintfhdl, ftaddr, val, &err); - } - else - { - val = cpu_to_le32(val); - err = _sd_cmd52_write(pintfhdl, ftaddr, 4, (u8*)&val); - } -#else - if (shift == 0) { - sd_write32(pintfhdl, ftaddr, val, &err); - } else { - u8 *ptmpbuf; - - ptmpbuf = (u8*)rtw_malloc(8); - if (NULL == ptmpbuf) return (-1); - - ftaddr &= ~(u16)0x3; - err = sd_read(pintfhdl, ftaddr, 8, ptmpbuf); - if (err) { - rtw_mfree(ptmpbuf, 8); - return err; - } - val = cpu_to_le32(val); - _rtw_memcpy(ptmpbuf+shift, &val, 4); - err = sd_write(pintfhdl, ftaddr, 8, ptmpbuf); - - rtw_mfree(ptmpbuf, 8); - } -#endif - -_func_exit_; - - return err; -} - - -s32 sdio_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) -{ - PADAPTER padapter; - u8 bMacPwrCtrlOn; - u8 deviceId; - u16 offset; - u32 ftaddr; - u8 shift; - s32 err; - -_func_enter_; - - padapter = pintfhdl->padapter; - err = 0; - - ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); - - rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) - || (_FALSE == bMacPwrCtrlOn) -#ifdef CONFIG_LPS_LCLK - || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -#endif - ) - { - val = cpu_to_le32(val); - err = sd_cmd52_write(pintfhdl, ftaddr, 4, (u8*)&val); - return err; - } - - // 4 bytes alignment - shift = ftaddr & 0x3; -#if 1 - if (shift == 0) - { - sd_write32(pintfhdl, ftaddr, val, &err); - } - else - { - val = cpu_to_le32(val); - err = sd_cmd52_write(pintfhdl, ftaddr, 4, (u8*)&val); - } -#else - if (shift == 0) { - sd_write32(pintfhdl, ftaddr, val, &err); - } else { - u8 *ptmpbuf; - - ptmpbuf = (u8*)rtw_malloc(8); - if (NULL == ptmpbuf) return (-1); - - ftaddr &= ~(u16)0x3; - err = sd_read(pintfhdl, ftaddr, 8, ptmpbuf); - if (err) { - rtw_mfree(ptmpbuf, 8); - return err; - } - val = cpu_to_le32(val); - _rtw_memcpy(ptmpbuf+shift, &val, 4); - err = sd_write(pintfhdl, ftaddr, 8, ptmpbuf); - - rtw_mfree(ptmpbuf, 8); - } -#endif - -_func_exit_; - - return err; -} - -s32 sdio_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8* pbuf) -{ - PADAPTER padapter; - u8 bMacPwrCtrlOn; - u8 deviceId; - u16 offset; - u32 ftaddr; - u8 shift; - s32 err; - -_func_enter_; - - padapter = pintfhdl->padapter; - err = 0; - - ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset); - - rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100)) - || (_FALSE == bMacPwrCtrlOn) -#ifdef CONFIG_LPS_LCLK - || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -#endif - ) - { - err = sd_cmd52_write(pintfhdl, ftaddr, cnt, pbuf); - return err; - } - - shift = ftaddr & 0x3; - if (shift == 0) { - err = sd_write(pintfhdl, ftaddr, cnt, pbuf); - } else { - u8 *ptmpbuf; - u32 n; - - ftaddr &= ~(u16)0x3; - n = cnt + shift; - ptmpbuf = rtw_malloc(n); - if (NULL == ptmpbuf) return -1; - err = sd_read(pintfhdl, ftaddr, 4, ptmpbuf); - if (err) { - rtw_mfree(ptmpbuf, n); - return err; - } - _rtw_memcpy(ptmpbuf+shift, pbuf, cnt); - err = sd_write(pintfhdl, ftaddr, n, ptmpbuf); - rtw_mfree(ptmpbuf, n); - } - -_func_exit_; - - return err; -} - -void sdio_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) -{ - s32 err; - -_func_enter_; - - err = sdio_readN(pintfhdl, addr, cnt, rmem); - -_func_exit_; -} - -void sdio_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) -{ -_func_enter_; - - sdio_writeN(pintfhdl, addr, cnt, wmem); - -_func_exit_; -} - -/* - * Description: - * Read from RX FIFO - * Round read size to block size, - * and make sure data transfer will be done in one command. - * - * Parameters: - * pintfhdl a pointer of intf_hdl - * addr port ID - * cnt size to read - * rmem address to put data - * - * Return: - * _SUCCESS(1) Success - * _FAIL(0) Fail - */ -static u32 sdio_read_port( - struct intf_hdl *pintfhdl, - u32 addr, - u32 cnt, - u8 *mem) -{ - PADAPTER padapter = pintfhdl->padapter; - PSDIO_DATA psdio= &adapter_to_dvobj(padapter)->intf_data; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - s32 err; - - HalSdioGetCmdAddr8723ASdio(padapter, addr, pHalData->SdioRxFIFOCnt++, &addr); - - - cnt = _RND4(cnt); - if (cnt > psdio->block_transfer_len) - cnt = _RND(cnt, psdio->block_transfer_len); - -// cnt = sdio_align_size(cnt); - - err = _sd_read(pintfhdl, addr, cnt, mem); - //err = sd_read(pintfhdl, addr, cnt, mem); - - - - if (err) return _FAIL; - return _SUCCESS; -} - -/* - * Description: - * Write to TX FIFO - * Align write size block size, - * and make sure data could be written in one command. - * - * Parameters: - * pintfhdl a pointer of intf_hdl - * addr port ID - * cnt size to write - * wmem data pointer to write - * - * Return: - * _SUCCESS(1) Success - * _FAIL(0) Fail - */ -static u32 sdio_write_port( - struct intf_hdl *pintfhdl, - u32 addr, - u32 cnt, - u8 *mem) -{ - PADAPTER padapter; - PSDIO_DATA psdio; - s32 err; - struct xmit_buf *xmitbuf = (struct xmit_buf *)mem; - - padapter = pintfhdl->padapter; - psdio = &adapter_to_dvobj(padapter)->intf_data; - - if(padapter->hw_init_completed == _FALSE) - { - DBG_871X("%s [addr=0x%x cnt=%d] padapter->hw_init_completed == _FALSE \n",__func__,addr,cnt); - return _FAIL; - } - - cnt = _RND4(cnt); - HalSdioGetCmdAddr8723ASdio(padapter, addr, cnt >> 2, &addr); - - if (cnt > psdio->block_transfer_len) - cnt = _RND(cnt, psdio->block_transfer_len); -// cnt = sdio_align_size(cnt); - - err = sd_write(pintfhdl, addr, cnt, xmitbuf->pdata); - - rtw_sctx_done_err(&xmitbuf->sctx, - err ? RTW_SCTX_DONE_WRITE_PORT_ERR : RTW_SCTX_DONE_SUCCESS); - - if (err) - { - DBG_871X("%s, error=%d\n", __func__, err); - - return _FAIL; - } - return _SUCCESS; -} - -void sdio_set_intf_ops(struct _io_ops *pops) -{ -_func_enter_; - - pops->_read8 = &sdio_read8; - pops->_read16 = &sdio_read16; - pops->_read32 = &sdio_read32; - pops->_read_mem = &sdio_read_mem; - pops->_read_port = &sdio_read_port; - - pops->_write8 = &sdio_write8; - pops->_write16 = &sdio_write16; - pops->_write32 = &sdio_write32; - pops->_writeN = &sdio_writeN; - pops->_write_mem = &sdio_write_mem; - pops->_write_port = &sdio_write_port; - -_func_exit_; -} - -/* - * Todo: align address to 4 bytes. - */ -s32 _sdio_local_read( - PADAPTER padapter, - u32 addr, - u32 cnt, - u8 *pbuf) -{ - struct intf_hdl * pintfhdl; - u8 bMacPwrCtrlOn; - s32 err; - u8 *ptmpbuf; - u32 n; - - pintfhdl=&padapter->iopriv.intf; - - HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); - - rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - if ((_FALSE == bMacPwrCtrlOn) -#ifdef CONFIG_LPS_LCLK -// || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -#endif - ) - { - err = _sd_cmd52_read(pintfhdl, addr, cnt, pbuf); - return err; - } - - n = RND4(cnt); - ptmpbuf = (u8*)rtw_malloc(n); - if(!ptmpbuf) - return (-1); - - err = _sd_read(pintfhdl, addr, n, ptmpbuf); - if (!err) - _rtw_memcpy(pbuf, ptmpbuf, cnt); - - if(ptmpbuf) - rtw_mfree(ptmpbuf, n); - - return err; -} - -/* - * Todo: align address to 4 bytes. - */ -s32 sdio_local_read( - PADAPTER padapter, - u32 addr, - u32 cnt, - u8 *pbuf) -{ - struct intf_hdl * pintfhdl; - u8 bMacPwrCtrlOn; - s32 err; - u8 *ptmpbuf; - u32 n; - - pintfhdl=&padapter->iopriv.intf; - - HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); - - rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - if ((_FALSE == bMacPwrCtrlOn) -#ifdef CONFIG_LPS_LCLK - || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -#endif - ) - { - err = sd_cmd52_read(pintfhdl, addr, cnt, pbuf); - return err; - } - - n = RND4(cnt); - ptmpbuf = (u8*)rtw_malloc(n); - if(!ptmpbuf) - return (-1); - - err = sd_read(pintfhdl, addr, n, ptmpbuf); - if (!err) - _rtw_memcpy(pbuf, ptmpbuf, cnt); - - if(ptmpbuf) - rtw_mfree(ptmpbuf, n); - - return err; -} - -/* - * Todo: align address to 4 bytes. - */ -s32 _sdio_local_write( - PADAPTER padapter, - u32 addr, - u32 cnt, - u8 *pbuf) -{ - struct intf_hdl * pintfhdl; - u8 bMacPwrCtrlOn; - s32 err; - u8 *ptmpbuf; - - if(addr & 0x3) - DBG_8192C("%s, address must be 4 bytes alignment\n", __FUNCTION__); - - if(cnt & 0x3) - DBG_8192C("%s, size must be the multiple of 4 \n", __FUNCTION__); - - pintfhdl=&padapter->iopriv.intf; - - HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); - - rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - if ((_FALSE == bMacPwrCtrlOn) -#ifdef CONFIG_LPS_LCLK -// || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -#endif - ) - { - err = _sd_cmd52_write(pintfhdl, addr, cnt, pbuf); - return err; - } - - ptmpbuf = (u8*)rtw_malloc(cnt); - if(!ptmpbuf) - return (-1); - - _rtw_memcpy(ptmpbuf, pbuf, cnt); - - err = _sd_write(pintfhdl, addr, cnt, ptmpbuf); - - if (ptmpbuf) - rtw_mfree(ptmpbuf, cnt); - - return err; -} - -/* - * Todo: align address to 4 bytes. - */ -s32 sdio_local_write( - PADAPTER padapter, - u32 addr, - u32 cnt, - u8 *pbuf) -{ - - struct intf_hdl * pintfhdl; - u8 bMacPwrCtrlOn; - s32 err; - u8 *ptmpbuf; - - if(addr & 0x3) - DBG_8192C("%s, address must be 4 bytes alignment\n", __FUNCTION__); - - if(cnt & 0x3) - DBG_8192C("%s, size must be the multiple of 4 \n", __FUNCTION__); - - pintfhdl=&padapter->iopriv.intf; - HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); - - rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - if ((_FALSE == bMacPwrCtrlOn) -#ifdef CONFIG_LPS_LCLK - || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -#endif - ) - { - err = sd_cmd52_write(pintfhdl, addr, cnt, pbuf); - return err; - } - - ptmpbuf = (u8*)rtw_malloc(cnt); - if(!ptmpbuf) - return (-1); - - _rtw_memcpy(ptmpbuf, pbuf, cnt); - - err = sd_write(pintfhdl, addr, cnt, ptmpbuf); - - if (ptmpbuf) - rtw_mfree(ptmpbuf, cnt); - - return err; -} - -u8 SdioLocalCmd52Read1Byte(PADAPTER padapter, u32 addr) -{ - struct intf_hdl * pintfhdl; - u8 val = 0; - - pintfhdl=&padapter->iopriv.intf; - - HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); - sd_cmd52_read(pintfhdl, addr, 1, &val); - - return val; -} - -u16 SdioLocalCmd52Read2Byte(PADAPTER padapter, u32 addr) -{ - struct intf_hdl * pintfhdl; - u16 val = 0; - - pintfhdl=&padapter->iopriv.intf; - HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); - sd_cmd52_read(pintfhdl, addr, 2, (u8*)&val); - - val = le16_to_cpu(val); - - return val; -} - -u32 SdioLocalCmd52Read4Byte(PADAPTER padapter, u32 addr) -{ - struct intf_hdl * pintfhdl; - u32 val = 0; - - - pintfhdl=&padapter->iopriv.intf; - HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); - sd_cmd52_read(pintfhdl, addr, 4, (u8*)&val); - - val = le32_to_cpu(val); - - return val; -} - -u32 SdioLocalCmd53Read4Byte(PADAPTER padapter, u32 addr) -{ - struct intf_hdl * pintfhdl; - u8 bMacPwrCtrlOn; - u32 val=0; - - pintfhdl=&padapter->iopriv.intf; - HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); - rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - if ((_FALSE == bMacPwrCtrlOn) -#ifdef CONFIG_LPS_LCLK - || (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode) -#endif - ) - { - sd_cmd52_read(pintfhdl, addr, 4, (u8*)&val); - val = le32_to_cpu(val); - } - else - val = sd_read32(pintfhdl, addr, NULL); - - return val; -} - -void SdioLocalCmd52Write1Byte(PADAPTER padapter, u32 addr, u8 v) -{ - struct intf_hdl * pintfhdl; - - pintfhdl=&padapter->iopriv.intf; - HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); - sd_cmd52_write(pintfhdl, addr, 1, &v); -} - -void SdioLocalCmd52Write2Byte(PADAPTER padapter, u32 addr, u16 v) -{ - struct intf_hdl * pintfhdl; - - pintfhdl=&padapter->iopriv.intf; - HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); - v = cpu_to_le16(v); - sd_cmd52_write(pintfhdl, addr, 2, (u8*)&v); -} - -void SdioLocalCmd52Write4Byte(PADAPTER padapter, u32 addr, u32 v) -{ - struct intf_hdl * pintfhdl; - - pintfhdl=&padapter->iopriv.intf; - HalSdioGetCmdAddr8723ASdio(padapter, SDIO_LOCAL_DEVICE_ID, addr, &addr); - v = cpu_to_le32(v); - sd_cmd52_write(pintfhdl, addr, 4, (u8*)&v); -} - -#if 0 -void -DumpLoggedInterruptHistory8723Sdio( - PADAPTER padapter -) -{ - HAL_DATA_TYPE *pHalData=GET_HAL_DATA(padapter); - u4Byte DebugLevel = DBG_LOUD; - - if (DBG_Var.DbgPrintIsr == 0) - return; - - DBG_ChkDrvResource(padapter); - - - if(pHalData->InterruptLog.nISR_RX_REQUEST) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# RX_REQUEST[%ld]\t\n", pHalData->InterruptLog.nISR_RX_REQUEST)); - - if(pHalData->InterruptLog.nISR_AVAL) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# AVAL[%ld]\t\n", pHalData->InterruptLog.nISR_AVAL)); - - if(pHalData->InterruptLog.nISR_TXERR) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# TXERR[%ld]\t\n", pHalData->InterruptLog.nISR_TXERR)); - - if(pHalData->InterruptLog.nISR_RXERR) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# RXERR[%ld]\t\n", pHalData->InterruptLog.nISR_RXERR)); - - if(pHalData->InterruptLog.nISR_TXFOVW) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# TXFOVW[%ld]\t\n", pHalData->InterruptLog.nISR_TXFOVW)); - - if(pHalData->InterruptLog.nISR_RXFOVW) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# RXFOVW[%ld]\t\n", pHalData->InterruptLog.nISR_RXFOVW)); - - if(pHalData->InterruptLog.nISR_TXBCNOK) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# TXBCNOK[%ld]\t\n", pHalData->InterruptLog.nISR_TXBCNOK)); - - if(pHalData->InterruptLog.nISR_TXBCNERR) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# TXBCNERR[%ld]\t\n", pHalData->InterruptLog.nISR_TXBCNERR)); - - if(pHalData->InterruptLog.nISR_BCNERLY_INT) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# BCNERLY_INT[%ld]\t\n", pHalData->InterruptLog.nISR_BCNERLY_INT)); - - if(pHalData->InterruptLog.nISR_C2HCMD) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# C2HCMD[%ld]\t\n", pHalData->InterruptLog.nISR_C2HCMD)); - - if(pHalData->InterruptLog.nISR_CPWM1) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# CPWM1L[%ld]\t\n", pHalData->InterruptLog.nISR_CPWM1)); - - if(pHalData->InterruptLog.nISR_CPWM2) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# CPWM2[%ld]\t\n", pHalData->InterruptLog.nISR_CPWM2)); - - if(pHalData->InterruptLog.nISR_HSISR_IND) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# HSISR_IND[%ld]\t\n", pHalData->InterruptLog.nISR_HSISR_IND)); - - if(pHalData->InterruptLog.nISR_GTINT3_IND) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# GTINT3_IND[%ld]\t\n", pHalData->InterruptLog.nISR_GTINT3_IND)); - - if(pHalData->InterruptLog.nISR_GTINT4_IND) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# GTINT4_IND[%ld]\t\n", pHalData->InterruptLog.nISR_GTINT4_IND)); - - if(pHalData->InterruptLog.nISR_PSTIMEOUT) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# PSTIMEOUT[%ld]\t\n", pHalData->InterruptLog.nISR_PSTIMEOUT)); - - if(pHalData->InterruptLog.nISR_OCPINT) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# OCPINT[%ld]\t\n", pHalData->InterruptLog.nISR_OCPINT)); - - if(pHalData->InterruptLog.nISR_ATIMEND) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# ATIMEND[%ld]\t\n", pHalData->InterruptLog.nISR_ATIMEND)); - - if(pHalData->InterruptLog.nISR_ATIMEND_E) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# ATIMEND_E[%ld]\t\n", pHalData->InterruptLog.nISR_ATIMEND_E)); - - if(pHalData->InterruptLog.nISR_CTWEND) - RT_TRACE(COMP_SEND|COMP_RECV, DebugLevel, ("# CTWEND[%ld]\t\n", pHalData->InterruptLog.nISR_CTWEND)); -} - -void -LogInterruptHistory8723Sdio( - PADAPTER padapter, - PRT_ISR_CONTENT pIsrContent -) -{ - HAL_DATA_TYPE *pHalData=GET_HAL_DATA(padapter); - - if((pHalData->IntrMask[0] & SDIO_HIMR_RX_REQUEST_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_RX_REQUEST)) - pHalData->InterruptLog.nISR_RX_REQUEST ++; - if((pHalData->IntrMask[0] & SDIO_HIMR_AVAL_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_AVAL)) - pHalData->InterruptLog.nISR_AVAL++; - if((pHalData->IntrMask[0] & SDIO_HIMR_TXERR_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_TXERR)) - pHalData->InterruptLog.nISR_TXERR++; - if((pHalData->IntrMask[0] & SDIO_HIMR_RXERR_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_RXERR)) - pHalData->InterruptLog.nISR_RXERR++; - if((pHalData->IntrMask[0] & SDIO_HIMR_TXFOVW_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_TXFOVW)) - pHalData->InterruptLog.nISR_TXFOVW++; - if((pHalData->IntrMask[0] & SDIO_HIMR_RXFOVW_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_RXFOVW)) - pHalData->InterruptLog.nISR_RXFOVW++; - if((pHalData->IntrMask[0] & SDIO_HIMR_TXBCNOK_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_TXBCNOK)) - pHalData->InterruptLog.nISR_TXBCNOK++; - if((pHalData->IntrMask[0] & SDIO_HIMR_TXBCNERR_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_TXBCNERR)) - pHalData->InterruptLog.nISR_TXBCNERR++; - if((pHalData->IntrMask[0] & SDIO_HIMR_BCNERLY_INT_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_BCNERLY_INT)) - pHalData->InterruptLog.nISR_BCNERLY_INT ++; - if((pHalData->IntrMask[0] & SDIO_HIMR_C2HCMD_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_C2HCMD)) - pHalData->InterruptLog.nISR_C2HCMD++; - if((pHalData->IntrMask[0] & SDIO_HIMR_CPWM1_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_CPWM1)) - pHalData->InterruptLog.nISR_CPWM1++; - if((pHalData->IntrMask[0] & SDIO_HIMR_CPWM2_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_CPWM2)) - pHalData->InterruptLog.nISR_CPWM2++; - if((pHalData->IntrMask[0] & SDIO_HIMR_HSISR_IND_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_HSISR_IND)) - pHalData->InterruptLog.nISR_HSISR_IND++; - if((pHalData->IntrMask[0] & SDIO_HIMR_GTINT3_IND_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_GTINT3_IND)) - pHalData->InterruptLog.nISR_GTINT3_IND++; - if((pHalData->IntrMask[0] & SDIO_HIMR_GTINT4_IND_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_GTINT4_IND)) - pHalData->InterruptLog.nISR_GTINT4_IND++; - if((pHalData->IntrMask[0] & SDIO_HIMR_PSTIMEOUT_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_PSTIMEOUT)) - pHalData->InterruptLog.nISR_PSTIMEOUT++; - if((pHalData->IntrMask[0] & SDIO_HIMR_OCPINT_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_OCPINT)) - pHalData->InterruptLog.nISR_OCPINT++; - if((pHalData->IntrMask[0] & SDIO_HIMR_ATIMEND_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_ATIMEND)) - pHalData->InterruptLog.nISR_ATIMEND++; - if((pHalData->IntrMask[0] & SDIO_HIMR_ATIMEND_E_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_ATIMEND_E)) - pHalData->InterruptLog.nISR_ATIMEND_E++; - if((pHalData->IntrMask[0] & SDIO_HIMR_CTWEND_MSK) && - (pIsrContent->IntArray[0] & SDIO_HISR_CTWEND)) - pHalData->InterruptLog.nISR_CTWEND++; - -} - -void -DumpHardwareProfile8723Sdio( - IN PADAPTER padapter -) -{ - DumpLoggedInterruptHistory8723Sdio(padapter); -} -#endif - -#ifdef CONFIG_USING_CMD52_READ_INT -static s32 ReadInterrupt8188ESdio(PADAPTER padapter, u32 *phisr) -{ - u8 val8, hisr_len; - u32 hisr, himr; - - - if (phisr == NULL) - return _FALSE; - - himr = GET_HAL_DATA(padapter)->sdio_himr; - - // decide how many bytes need to be read - hisr_len = 0; - while (himr) - { - hisr_len++; - himr >>= 8; - } - - hisr = 0; - - while (hisr_len != 0) - { - hisr_len--; - val8 = SdioLocalCmd52Read1Byte(padapter, SDIO_REG_HISR+hisr_len); - hisr |= (val8 << (8*hisr_len)); - } - - *phisr = hisr; - - return _TRUE; -} -#endif - -// -// Description: -// Initialize SDIO Host Interrupt Mask configuration variables for future use. -// -// Assumption: -// Using SDIO Local register ONLY for configuration. -// -// Created by Roger, 2011.02.11. -// -void InitInterrupt8188ESdio(PADAPTER padapter) -{ - HAL_DATA_TYPE *pHalData; - - - pHalData = GET_HAL_DATA(padapter); - pHalData->sdio_himr = (u32)( \ - SDIO_HIMR_RX_REQUEST_MSK | -// SDIO_HIMR_AVAL_MSK | -// SDIO_HIMR_TXERR_MSK | -// SDIO_HIMR_RXERR_MSK | -// SDIO_HIMR_TXFOVW_MSK | -// SDIO_HIMR_RXFOVW_MSK | -// SDIO_HIMR_TXBCNOK_MSK | -// SDIO_HIMR_TXBCNERR_MSK | -#ifdef CONFIG_EXT_CLK -//for sprd - SDIO_HIMR_BCNERLY_INT_MSK | -#endif //CONFIG_EXT_CLK -// SDIO_HIMR_C2HCMD_MSK | -#if defined(CONFIG_LPS_LCLK) && (!defined(CONFIG_DETECT_CPWM_BY_POLLING)) - SDIO_HIMR_CPWM1_MSK | - SDIO_HIMR_CPWM2_MSK | -#endif -// SDIO_HIMR_HSISR_IND_MSK | -// SDIO_HIMR_GTINT3_IND_MSK | -// SDIO_HIMR_GTINT4_IND_MSK | -// SDIO_HIMR_PSTIMEOUT_MSK | -// SDIO_HIMR_OCPINT_MSK | -// SDIO_HIMR_ATIMEND_MSK | -// SDIO_HIMR_ATIMEND_E_MSK | -// SDIO_HIMR_CTWEND_MSK | - 0); -} - -// -// Description: -// Clear corresponding SDIO Host ISR interrupt service. -// -// Assumption: -// Using SDIO Local register ONLY for configuration. -// -// Created by Roger, 2011.02.11. -// -void ClearInterrupt8723ASdio(PADAPTER padapter) -{ - u32 tmp = 0; - tmp = SdioLocalCmd52Read4Byte(padapter, SDIO_REG_HISR); - SdioLocalCmd52Write4Byte(padapter, SDIO_REG_HISR, tmp); -// padapter->IsrContent.IntArray[0] = 0; - padapter->IsrContent = 0; -} - -// -// Description: -// Enalbe SDIO Host Interrupt Mask configuration on SDIO local domain. -// -// Assumption: -// 1. Using SDIO Local register ONLY for configuration. -// 2. PASSIVE LEVEL -// -// Created by Roger, 2011.02.11. -// -void EnableInterrupt8188ESdio(PADAPTER padapter) -{ - PHAL_DATA_TYPE pHalData; - u32 himr; - -#ifdef CONFIG_CONCURRENT_MODE - if ((padapter->isprimary == _FALSE) && padapter->pbuddy_adapter){ - padapter = padapter->pbuddy_adapter; - } -#endif - pHalData = GET_HAL_DATA(padapter); - himr = cpu_to_le32(pHalData->sdio_himr); - sdio_local_write(padapter, SDIO_REG_HIMR, 4, (u8*)&himr); - - - // - // There are some C2H CMDs have been sent before system interrupt is enabled, e.g., C2H, CPWM. - // So we need to clear all C2H events that FW has notified, otherwise FW won't schedule any commands anymore. - // 2011.10.19. - // - rtw_write8(padapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE); - -} - -// -// Description: -// Disable SDIO Host IMR configuration to mask unnecessary interrupt service. -// -// Assumption: -// Using SDIO Local register ONLY for configuration. -// -// Created by Roger, 2011.02.11. -// -void DisableInterrupt8188ESdio(PADAPTER padapter) -{ - u32 himr; - -#ifdef CONFIG_CONCURRENT_MODE - if ((padapter->isprimary == _FALSE) && padapter->pbuddy_adapter){ - padapter = padapter->pbuddy_adapter; - } -#endif - himr = cpu_to_le32(SDIO_HIMR_DISABLED); - sdio_local_write(padapter, SDIO_REG_HIMR, 4, (u8*)&himr); - -} - -// -// Description: -// Update SDIO Host Interrupt Mask configuration on SDIO local domain. -// -// Assumption: -// 1. Using SDIO Local register ONLY for configuration. -// 2. PASSIVE LEVEL -// -// Created by Roger, 2011.02.11. -// -void UpdateInterruptMask8188ESdio(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR) -{ - HAL_DATA_TYPE *pHalData; - -#ifdef CONFIG_CONCURRENT_MODE - if ((padapter->isprimary == _FALSE) && padapter->pbuddy_adapter){ - padapter = padapter->pbuddy_adapter; - } -#endif - pHalData = GET_HAL_DATA(padapter); - - if (AddMSR) - pHalData->sdio_himr |= AddMSR; - - if (RemoveMSR) - pHalData->sdio_himr &= (~RemoveMSR); - - DisableInterrupt8188ESdio(padapter); - EnableInterrupt8188ESdio(padapter); -} - -#ifdef CONFIG_WOWLAN -void ClearInterrupt8189ESdio(PADAPTER padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - u32 v32 = 0; - - v32 = pHalData->sdio_himr | SDIO_HISR_CPWM2; - - pHalData->sdio_hisr &= v32; - - // clear HISR - v32 = pHalData->sdio_hisr & MASK_SDIO_HISR_CLEAR; - if (v32) { - v32 = cpu_to_le32(v32); - sdio_local_write(padapter, SDIO_REG_HISR, 4, (u8*)&v32); - } -} -#endif - -#ifdef CONFIG_MAC_LOOPBACK_DRIVER -static void sd_recv_loopback(PADAPTER padapter, u32 size) -{ - PLOOPBACKDATA ploopback; - u32 readsize, allocsize; - u8 *preadbuf; - - - readsize = size; - DBG_8192C("%s: read size=%d\n", __func__, readsize); - allocsize = _RND(readsize, adapter_to_dvobj(padapter)->intf_data.block_transfer_len); - - ploopback = padapter->ploopback; - if (ploopback) { - ploopback->rxsize = readsize; - preadbuf = ploopback->rxbuf; - } - else { - preadbuf = rtw_malloc(allocsize); - if (preadbuf == NULL) { - DBG_8192C("%s: malloc fail size=%d\n", __func__, allocsize); - return; - } - } - -// rtw_read_port(padapter, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); - sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); - - if (ploopback) - _rtw_up_sema(&ploopback->sema); - else { - u32 i; - - DBG_8192C("%s: drop pkt\n", __func__); - for (i = 0; i < readsize; i+=4) { - DBG_8192C("%08X", *(u32*)(preadbuf + i)); - if ((i+4) & 0x1F) printk(" "); - else printk("\n"); - } - printk("\n"); - rtw_mfree(preadbuf, allocsize); - } -} -#endif // CONFIG_MAC_LOOPBACK_DRIVER - -#ifdef CONFIG_SDIO_RX_COPY -static struct recv_buf* sd_recv_rxfifo(PADAPTER padapter, u32 size) -{ - u32 readsize, ret; - u8 *preadbuf; - struct recv_priv *precvpriv; - struct recv_buf *precvbuf; - - - readsize = size; - - //3 1. alloc recvbuf - precvpriv = &padapter->recvpriv; - precvbuf = rtw_dequeue_recvbuf(&precvpriv->free_recv_buf_queue); - if (precvbuf == NULL) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: alloc recvbuf FAIL!\n", __FUNCTION__)); - return NULL; - } - - //3 2. alloc skb - if (precvbuf->pskb == NULL) { - SIZE_PTR tmpaddr=0; - SIZE_PTR alignment=0; - - DBG_871X("%s: alloc_skb for rx buffer\n", __FUNCTION__); - - precvbuf->pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); - - if(precvbuf->pskb) - { - precvbuf->pskb->dev = padapter->pnetdev; - - tmpaddr = (SIZE_PTR)precvbuf->pskb->data; - alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); - skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment)); - - precvbuf->phead = precvbuf->pskb->head; - precvbuf->pdata = precvbuf->pskb->data; - precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); - precvbuf->pend = skb_end_pointer(precvbuf->pskb); - precvbuf->len = 0; - } - - if (precvbuf->pskb == NULL) { - DBG_871X("%s: alloc_skb fail! read=%d\n", __FUNCTION__, readsize); - return NULL; - } - } - - //3 3. read data from rxfifo - preadbuf = precvbuf->pdata; -// rtw_read_port(padapter, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); - ret = sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); - if (ret == _FAIL) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: read port FAIL!\n", __FUNCTION__)); - return NULL; - } - - - //3 4. init recvbuf - precvbuf->len = readsize; - - return precvbuf; -} -#else -static struct recv_buf* sd_recv_rxfifo(PADAPTER padapter, u32 size) -{ - u32 readsize, allocsize, ret; - u8 *preadbuf; - _pkt *ppkt; - struct recv_priv *precvpriv; - struct recv_buf *precvbuf; - - - readsize = size; - - //3 1. alloc skb - // align to block size - allocsize = _RND(readsize, adapter_to_dvobj(padapter)->intf_data.block_transfer_len); - - ppkt = rtw_skb_alloc(allocsize); - - if (ppkt == NULL) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: alloc_skb fail! alloc=%d read=%d\n", __FUNCTION__, allocsize, readsize)); - return NULL; - } - - //3 2. read data from rxfifo - preadbuf = skb_put(ppkt, readsize); -// rtw_read_port(padapter, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); - ret = sdio_read_port(&padapter->iopriv.intf, WLAN_RX0FF_DEVICE_ID, readsize, preadbuf); - if (ret == _FAIL) { - rtw_skb_free(ppkt); - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: read port FAIL!\n", __FUNCTION__)); - return NULL; - } - - //3 3. alloc recvbuf - precvpriv = &padapter->recvpriv; - precvbuf = rtw_dequeue_recvbuf(&precvpriv->free_recv_buf_queue); - if (precvbuf == NULL) { - rtw_skb_free(ppkt); - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("%s: alloc recvbuf FAIL!\n", __FUNCTION__)); - return NULL; - } - - //3 4. init recvbuf - precvbuf->pskb = ppkt; - - precvbuf->len = ppkt->len; - - precvbuf->phead = ppkt->head; - precvbuf->pdata = ppkt->data; - precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); - precvbuf->pend = skb_end_pointer(precvbuf->pskb); - - return precvbuf; -} -#endif - -static void sd_rxhandler(PADAPTER padapter, struct recv_buf *precvbuf) -{ - struct recv_priv *precvpriv; - _queue *ppending_queue; - - - precvpriv = &padapter->recvpriv; - ppending_queue = &precvpriv->recv_buf_pending_queue; - - //3 1. enqueue recvbuf - rtw_enqueue_recvbuf(precvbuf, ppending_queue); - - //3 2. schedule tasklet - tasklet_schedule(&precvpriv->recv_tasklet); -} - -void sd_int_dpc(PADAPTER padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct intf_hdl * pintfhdl=&padapter->iopriv.intf; - if (pHalData->sdio_hisr & SDIO_HISR_CPWM1) - { - struct reportpwrstate_parm report; - -#ifdef CONFIG_LPS_RPWM_TIMER - u8 bcancelled; - _cancel_timer(&(adapter_to_pwrctl(padapter)->pwr_rpwm_timer), &bcancelled); -#endif // CONFIG_LPS_RPWM_TIMER - -#ifdef CONFIG_USING_CMD52_READ_INT - report.state = SdioLocalCmd52Read1Byte(padapter,SDIO_REG_HCPWM1); -#else //CONFIG_USING_CMD52_READ_INT - _sdio_local_read(padapter, SDIO_REG_HCPWM1, 1, &report.state); -#endif - -#ifdef CONFIG_LPS_LCLK - //88e's cpwm value only change BIT0, so driver need to add PS_STATE_S2 for LPS flow. - //modify by Thomas. 2012/4/2. - -#ifdef CONFIG_EXT_CLK //for sprd - if(report.state & BIT(4)) //indicate FW entering 32k - { - u8 chk_cnt = 0; - - do{ - if(_sdio_read8(padapter, 0x90)&BIT(0))//FW in 32k already - { - struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); - - if(pwrpriv->rpwm < PS_STATE_S2) - { - //DBG_871X("disable ext clk when FW in LPS-32K already!\n"); - EnableGpio5ClockReq(padapter, _TRUE, 0); - } - - break; - } - - chk_cnt++; - - }while(chk_cnt<10); - - if(chk_cnt==10) - { - DBG_871X("polling fw in 32k already, fail!\n"); - } - - } - else //indicate fw leaving 32K -#endif //CONFIG_EXT_CLK - { - report.state |= PS_STATE_S2; - //cpwm_int_hdl(padapter, &report); - _set_workitem(&(adapter_to_pwrctl(padapter)->cpwm_event)); - } -#endif - } - -#ifdef CONFIG_WOWLAN - if (pHalData->sdio_hisr & SDIO_HISR_CPWM2) { - u32 value; - value = rtw_read32(padapter, SDIO_LOCAL_BASE+SDIO_REG_HISR); - DBG_871X_LEVEL(_drv_always_, "Reset SDIO HISR(0x%08x) original:0x%08x\n", - SDIO_LOCAL_BASE+SDIO_REG_HISR, value); - value |= BIT19; - rtw_write32(padapter, SDIO_LOCAL_BASE+SDIO_REG_HISR, value); - - value = rtw_read8(padapter, SDIO_LOCAL_BASE+SDIO_REG_HIMR+2); - DBG_871X_LEVEL(_drv_always_, "Reset SDIO HIMR CPWM2(0x%08x) original:0x%02x\n", - SDIO_LOCAL_BASE+SDIO_REG_HIMR + 2, value); - } -#endif - if (pHalData->sdio_hisr & SDIO_HISR_TXERR) - { - u8 *status; - u32 addr; - - status = rtw_malloc(4); - if (status) - { - addr = REG_TXDMA_STATUS; - HalSdioGetCmdAddr8723ASdio(padapter, WLAN_IOREG_DEVICE_ID, addr, &addr); - _sd_read(pintfhdl, addr, 4, status); - _sd_write(pintfhdl, addr, 4, status); - DBG_8192C("%s: SDIO_HISR_TXERR (0x%08x)\n", __func__, le32_to_cpu(*(u32*)status)); - rtw_mfree(status, 4); - } else { - DBG_8192C("%s: SDIO_HISR_TXERR, but can't allocate memory to read status!\n", __func__); - } - } - -#ifdef CONFIG_INTERRUPT_BASED_TXBCN - - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - if (pHalData->sdio_hisr & SDIO_HISR_BCNERLY_INT) - #endif - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - if (pHalData->sdio_hisr & (SDIO_HISR_TXBCNOK|SDIO_HISR_TXBCNERR)) - #endif - { - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - - #if 0 //for debug - if (pHalData->sdio_hisr & SDIO_HISR_BCNERLY_INT) - DBG_8192C("%s: SDIO_HISR_BCNERLY_INT\n", __func__); - - if (pHalData->sdio_hisr & SDIO_HISR_TXBCNOK) - DBG_8192C("%s: SDIO_HISR_TXBCNOK\n", __func__); - - if (pHalData->sdio_hisr & SDIO_HISR_TXBCNERR) - DBG_8192C("%s: SDIO_HISR_TXBCNERR\n", __func__); - #endif - - - if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) - { - //send_beacon(padapter); - if(pmlmepriv->update_bcn == _TRUE) - { - //tx_beacon_hdl(padapter, NULL); - set_tx_beacon_cmd(padapter); - } - } -#ifdef CONFIG_CONCURRENT_MODE - if(check_buddy_fwstate(padapter, WIFI_AP_STATE)) - { - //send_beacon(padapter); - if(padapter->pbuddy_adapter->mlmepriv.update_bcn == _TRUE) - { - //tx_beacon_hdl(padapter, NULL); - set_tx_beacon_cmd(padapter->pbuddy_adapter); - } - } -#endif - } -#endif //CONFIG_INTERRUPT_BASED_TXBCN - -#ifdef CONFIG_EXT_CLK - if (pHalData->sdio_hisr & SDIO_HISR_BCNERLY_INT) - { - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - - if(check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE)) - { - //DBG_8192C("BCNERLY_INT for enabling ext clk\n"); - EnableGpio5ClockReq(padapter, _TRUE, 1); - } - } -#endif //CONFIG_EXT_CLK - - if (pHalData->sdio_hisr & SDIO_HISR_C2HCMD) - { - DBG_8192C("%s: C2H Command\n", __func__); - } - - if (pHalData->sdio_hisr & SDIO_HISR_RX_REQUEST) - { - struct recv_buf *precvbuf; -#ifdef CONFIG_USING_CMD52_READ_INT - u32 hisr; - u8 data[4]; - - //DBG_8192C("%s: RX Request, size=%d\n", __func__, phal->SdioRxFIFOSize); - pHalData->sdio_hisr ^= SDIO_HISR_RX_REQUEST; - -#ifdef CONFIG_MAC_LOOPBACK_DRIVER - sd_recv_loopback(padapter, pHalData->SdioRxFIFOSize); -#else - _sdio_local_read(padapter, SDIO_REG_RX0_REQ_LEN, 4, data); - pHalData->SdioRxFIFOSize = le16_to_cpu(*(u16*)data); - - do { - //pHalData->SdioRxFIFOSize = SdioLocalCmd52Read2Byte(padapter, SDIO_REG_RX0_REQ_LEN); - - if(pHalData->SdioRxFIFOSize == 0){ - _sdio_local_read(padapter, SDIO_REG_RX0_REQ_LEN, 4, data); - pHalData->SdioRxFIFOSize = le16_to_cpu(*(u16*)data); - } - - if(pHalData->SdioRxFIFOSize != 0) - { - precvbuf = sd_recv_rxfifo(padapter, pHalData->SdioRxFIFOSize); - - pHalData->SdioRxFIFOSize = 0; - - if (precvbuf) - sd_rxhandler(padapter, precvbuf); - else - break; - } - else - { - //DBG_871X("%s, WARNING!!, SdioRxFIFOSize = 0!!\n", __func__); - break; - } - -#ifdef CONFIG_SDIO_DISABLE_RXFIFO_POLLING_LOOP - } while (0); -#else - } while (1); - -#endif //CONFIG_SDIO_DISABLE_RXFIFO_POLLING_LOOP -#endif //CONFIG_MAC_LOOPBACK_DRIVER -#else //!CONFIG_USING_CMD52_READ_INT - - //DBG_8192C("%s: RX Request, size=%d\n", __func__, phal->SdioRxFIFOSize); - pHalData->sdio_hisr ^= SDIO_HISR_RX_REQUEST; -#ifdef CONFIG_MAC_LOOPBACK_DRIVER - sd_recv_loopback(padapter, pHalData->SdioRxFIFOSize); -#else - do { - //Sometimes rx length will be zero. driver need to use cmd53 read again. - if(pHalData->SdioRxFIFOSize == 0) - { - u8 data[4]; - - _sdio_local_read(padapter, SDIO_REG_RX0_REQ_LEN, 4, data); - - pHalData->SdioRxFIFOSize = le16_to_cpu(*(u16*)data); - } - - if(pHalData->SdioRxFIFOSize) - { - precvbuf = sd_recv_rxfifo(padapter, pHalData->SdioRxFIFOSize); - - pHalData->SdioRxFIFOSize = 0; - - if (precvbuf) - sd_rxhandler(padapter, precvbuf); - else - break; - } - else{ - - break; - } -#ifdef CONFIG_SDIO_DISABLE_RXFIFO_POLLING_LOOP - } while (0); -#else - } while (1); -#endif //CONFIG_SDIO_DISABLE_RXFIFO_POLLING_LOOP -#endif //CONFIG_MAC_LOOPBACK_DRIVER -#endif //CONFIG_USING_CMD52_READ_INT - } -} - -void sd_int_hdl(PADAPTER padapter) -{ - u8 data[6]; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - if ((padapter->bDriverStopped == _TRUE) || - (padapter->bSurpriseRemoved == _TRUE)) - return; - -#ifdef CONFIG_USING_CMD52_READ_INT - pHalData->sdio_hisr = 0; - //ReadInterrupt8188ESdio(padapter, &pHalData->sdio_hisr); - pHalData->sdio_hisr = SdioLocalCmd52Read1Byte(padapter, SDIO_REG_HISR); -#else //CONFIG_USING_CMD52_READ_INT - _sdio_local_read(padapter, SDIO_REG_HISR, 6, data); - pHalData->sdio_hisr = le32_to_cpu(*(u32*)data); - pHalData->SdioRxFIFOSize = le16_to_cpu(*(u16*)&data[4]); -#endif - - if (pHalData->sdio_hisr & pHalData->sdio_himr) - { - u32 v32; - - pHalData->sdio_hisr &= pHalData->sdio_himr; - - // clear HISR - v32 = pHalData->sdio_hisr & MASK_SDIO_HISR_CLEAR; - if (v32) { -#ifdef CONFIG_USING_CMD52_READ_INT - SdioLocalCmd52Write4Byte(padapter, SDIO_REG_HISR, v32); -#else //CONFIG_USING_CMD52_READ_INT - v32 = cpu_to_le32(v32); - _sdio_local_write(padapter, SDIO_REG_HISR, 4, (u8*)&v32); -#endif - } - - sd_int_dpc(padapter); - } - else - { - RT_TRACE(_module_hci_ops_c_, _drv_err_, - ("%s: HISR(0x%08x) and HIMR(0x%08x) not match!\n", - __FUNCTION__, pHalData->sdio_hisr, pHalData->sdio_himr)); - } - -} - -// -// Description: -// Query SDIO Local register to query current the number of Free TxPacketBuffer page. -// -// Assumption: -// 1. Running at PASSIVE_LEVEL -// 2. RT_TX_SPINLOCK is NOT acquired. -// -// Created by Roger, 2011.01.28. -// -u8 HalQueryTxBufferStatus8189ESdio(PADAPTER padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - u32 NumOfFreePage; -// _irqL irql; - - - pHalData = GET_HAL_DATA(padapter); - - NumOfFreePage = SdioLocalCmd53Read4Byte(padapter, SDIO_REG_FREE_TXPG); - -// _enter_critical_bh(&phal->SdioTxFIFOFreePageLock, &irql); - _rtw_memcpy(pHalData->SdioTxFIFOFreePage, &NumOfFreePage, 4); - RT_TRACE(_module_hci_ops_c_, _drv_notice_, - ("%s: Free page for HIQ(%#x),MIDQ(%#x),LOWQ(%#x),PUBQ(%#x)\n", - __FUNCTION__, - pHalData->SdioTxFIFOFreePage[HI_QUEUE_IDX], - pHalData->SdioTxFIFOFreePage[MID_QUEUE_IDX], - pHalData->SdioTxFIFOFreePage[LOW_QUEUE_IDX], - pHalData->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX])); -// _exit_critical_bh(&phal->SdioTxFIFOFreePageLock, &irql); - - return _TRUE; -} - -#ifdef CONFIG_WOWLAN -u8 RecvOnePkt(PADAPTER padapter, u32 size) -{ - struct recv_buf *precvbuf; - struct dvobj_priv *psddev; - PSDIO_DATA psdio_data; - struct sdio_func *func; - - u8 res = _FALSE; - - DBG_8192C("+%s: size: %d+\n", __func__, size); - - if (padapter == NULL) { - DBG_8192C(KERN_ERR "%s: padapter is NULL!\n", __func__); - return _FALSE; - } - - psddev = padapter->dvobj; - psdio_data = &psddev->intf_data; - func = psdio_data->func; - - if(size) { - sdio_claim_host(func); - precvbuf = sd_recv_rxfifo(padapter, size); - - if (precvbuf) { - //printk("Completed Recv One Pkt.\n"); - sd_rxhandler(padapter, precvbuf); - res = _TRUE; - }else{ - res = _FALSE; - } - sdio_release_host(func); - } - DBG_8192C("-%s-\n", __func__); - return res; -} -#endif //CONFIG_WOWLAN diff --git a/hal/rtl8188e/usb/rtl8188eu_led.c b/hal/rtl8188e/usb/rtl8188eu_led.c deleted file mode 100755 index 712965a..0000000 --- a/hal/rtl8188e/usb/rtl8188eu_led.c +++ /dev/null @@ -1,170 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -#include -#include -#include -#include - -//================================================================================ -// LED object. -//================================================================================ - - -//================================================================================ -// Prototype of protected function. -//================================================================================ - - -//================================================================================ -// LED_819xUsb routines. -//================================================================================ - -// -// Description: -// Turn on LED according to LedPin specified. -// -void -SwLedOn( - _adapter *padapter, - PLED_871x pLed -) -{ - u8 LedCfg; - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) - { - return; - } - - LedCfg = rtw_read8(padapter, REG_LEDCFG2); - switch(pLed->LedPin) - { - case LED_PIN_LED0: - rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on. - break; - - case LED_PIN_LED1: - rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); // SW control led1 on. - break; - - default: - break; - } - - pLed->bLedOn = _TRUE; -} - - -// -// Description: -// Turn off LED according to LedPin specified. -// -void -SwLedOff( - _adapter *padapter, - PLED_871x pLed -) -{ - u8 LedCfg; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - if((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) - { - goto exit; - } - - - LedCfg = rtw_read8(padapter, REG_LEDCFG2);//0x4E - - switch(pLed->LedPin) - { - case LED_PIN_LED0: - if(pHalData->bLedOpenDrain == _TRUE) // Open-drain arrangement for controlling the LED) - { - LedCfg &= 0x90; // Set to software control. - rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); - LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG); - LedCfg &= 0xFE; - rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg); - } - else - { - rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6)); - } - break; - - case LED_PIN_LED1: - LedCfg &= 0x0f; // Set to software control. - rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); - break; - - default: - break; - } -exit: - pLed->bLedOn = _FALSE; - -} - -//================================================================================ -// Interface to manipulate LED objects. -//================================================================================ - - -//================================================================================ -// Default LED behavior. -//================================================================================ - -// -// Description: -// Initialize all LED_871x objects. -// -void -rtl8188eu_InitSwLeds( - _adapter *padapter - ) -{ - struct led_priv *pledpriv = &(padapter->ledpriv); - - pledpriv->LedControlHandler = LedControl871x; - - InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); - - InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED1); -} - - -// -// Description: -// DeInitialize all LED_819xUsb objects. -// -void -rtl8188eu_DeInitSwLeds( - _adapter *padapter - ) -{ - struct led_priv *ledpriv = &(padapter->ledpriv); - - DeInitLed871x( &(ledpriv->SwLed0) ); - DeInitLed871x( &(ledpriv->SwLed1) ); -} - diff --git a/hal/rtl8188e/usb/rtl8188eu_recv.c b/hal/rtl8188e/usb/rtl8188eu_recv.c deleted file mode 100755 index eabf487..0000000 --- a/hal/rtl8188e/usb/rtl8188eu_recv.c +++ /dev/null @@ -1,212 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _RTL8188EU_RECV_C_ -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include - - -void rtl8188eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf) -{ - - precvbuf->transfer_len = 0; - - precvbuf->len = 0; - - precvbuf->ref_cnt = 0; - - if(precvbuf->pbuf) - { - precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pbuf; - precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ; - } - -} - -int rtl8188eu_init_recv_priv(_adapter *padapter) -{ - struct recv_priv *precvpriv = &padapter->recvpriv; - int i, res = _SUCCESS; - struct recv_buf *precvbuf; - -#ifdef CONFIG_RECV_THREAD_MODE - _rtw_init_sema(&precvpriv->recv_sema, 0);//will be removed - _rtw_init_sema(&precvpriv->terminate_recvthread_sema, 0);//will be removed -#endif - - tasklet_init(&precvpriv->recv_tasklet, - (void(*)(unsigned long))rtl8188eu_recv_tasklet, - (unsigned long)padapter); - -#ifdef CONFIG_USB_INTERRUPT_IN_PIPE - precvpriv->int_in_urb = usb_alloc_urb(0, GFP_KERNEL); - if(precvpriv->int_in_urb == NULL){ - res= _FAIL; - DBG_8192C("alloc_urb for interrupt in endpoint fail !!!!\n"); - goto exit; - } - precvpriv->int_in_buf = rtw_zmalloc(INTERRUPT_MSG_FORMAT_LEN); - if(precvpriv->int_in_buf == NULL){ - res= _FAIL; - DBG_8192C("alloc_mem for interrupt in endpoint fail !!!!\n"); - goto exit; - } -#endif - - //init recv_buf - _rtw_init_queue(&precvpriv->free_recv_buf_queue); - -#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX - _rtw_init_queue(&precvpriv->recv_buf_pending_queue); -#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX - - precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF *sizeof(struct recv_buf) + 4); - if(precvpriv->pallocated_recv_buf==NULL){ - res= _FAIL; - RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("alloc recv_buf fail!\n")); - goto exit; - } - _rtw_memset(precvpriv->pallocated_recv_buf, 0, NR_RECVBUFF *sizeof(struct recv_buf) + 4); - - precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4); - //precvpriv->precv_buf = precvpriv->pallocated_recv_buf + 4 - - // ((uint) (precvpriv->pallocated_recv_buf) &(4-1)); - - - precvbuf = (struct recv_buf*)precvpriv->precv_buf; - - for(i=0; i < NR_RECVBUFF ; i++) - { - _rtw_init_listhead(&precvbuf->list); - - _rtw_spinlock_init(&precvbuf->recvbuf_lock); - - precvbuf->alloc_sz = MAX_RECVBUF_SZ; - - res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf); - if(res==_FAIL) - break; - - precvbuf->ref_cnt = 0; - precvbuf->adapter =padapter; - - - //rtw_list_insert_tail(&precvbuf->list, &(precvpriv->free_recv_buf_queue.queue)); - - precvbuf++; - - } - - precvpriv->free_recv_buf_queue_cnt = NR_RECVBUFF; - - - skb_queue_head_init(&precvpriv->rx_skb_queue); - -#ifdef CONFIG_PREALLOC_RECV_SKB - { - int i; - SIZE_PTR tmpaddr=0; - SIZE_PTR alignment=0; - struct sk_buff *pskb=NULL; - - skb_queue_head_init(&precvpriv->free_recv_skb_queue); - - for(i=0; idev = padapter->pnetdev; - - tmpaddr = (SIZE_PTR)pskb->data; - alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); - skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment)); - - skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb); - } - - pskb=NULL; - - } - } -#endif - -exit: - - return res; -} - -void rtl8188eu_free_recv_priv (_adapter *padapter) -{ - int i; - struct recv_buf *precvbuf; - struct recv_priv *precvpriv = &padapter->recvpriv; - - precvbuf = (struct recv_buf *)precvpriv->precv_buf; - - for(i=0; i < NR_RECVBUFF ; i++) - { - rtw_os_recvbuf_resource_free(padapter, precvbuf); - precvbuf++; - } - - if(precvpriv->pallocated_recv_buf) - rtw_mfree(precvpriv->pallocated_recv_buf, NR_RECVBUFF *sizeof(struct recv_buf) + 4); - -#ifdef CONFIG_USB_INTERRUPT_IN_PIPE - if(precvpriv->int_in_urb) - usb_free_urb(precvpriv->int_in_urb); - - if(precvpriv->int_in_buf) - rtw_mfree(precvpriv->int_in_buf, INTERRUPT_MSG_FORMAT_LEN); -#endif//CONFIG_USB_INTERRUPT_IN_PIPE - - if (skb_queue_len(&precvpriv->rx_skb_queue)) { - DBG_8192C(KERN_WARNING "rx_skb_queue not empty\n"); - } - - rtw_skb_queue_purge(&precvpriv->rx_skb_queue); - -#ifdef CONFIG_PREALLOC_RECV_SKB - - if (skb_queue_len(&precvpriv->free_recv_skb_queue)) { - DBG_8192C(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue)); - } - - rtw_skb_queue_purge(&precvpriv->free_recv_skb_queue); - -#endif - -} - - diff --git a/hal/rtl8188e/usb/rtl8188eu_xmit.c b/hal/rtl8188e/usb/rtl8188eu_xmit.c deleted file mode 100755 index 8372b67..0000000 --- a/hal/rtl8188e/usb/rtl8188eu_xmit.c +++ /dev/null @@ -1,1327 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _RTL8188E_XMIT_C_ -#include -#include -#include -#include -#include -#include -#include -#include -#include - -s32 rtl8188eu_init_xmit_priv(_adapter *padapter) -{ - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - tasklet_init(&pxmitpriv->xmit_tasklet, - (void(*)(unsigned long))rtl8188eu_xmit_tasklet, - (unsigned long)padapter); -#ifdef CONFIG_TX_EARLY_MODE - pHalData->bEarlyModeEnable = padapter->registrypriv.early_mode; -#endif - - return _SUCCESS; -} - -void rtl8188eu_free_xmit_priv(_adapter *padapter) -{ -} - -u8 urb_zero_packet_chk(_adapter *padapter, int sz) -{ - u8 blnSetTxDescOffset; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - blnSetTxDescOffset = (((sz + TXDESC_SIZE) % pHalData->UsbBulkOutSize) ==0)?1:0; - - return blnSetTxDescOffset; -} - -void rtl8188eu_cal_txdesc_chksum(struct tx_desc *ptxdesc) -{ - u16 *usPtr = (u16*)ptxdesc; - u32 count = 16; // (32 bytes / 2 bytes per XOR) => 16 times - u32 index; - u16 checksum = 0; - - //Clear first - ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); - - for(index = 0 ; index < count ; index++){ - checksum = checksum ^ le16_to_cpu(*(usPtr + index)); - } - - ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff&checksum); - -} -// -// Description: In normal chip, we should send some packet to Hw which will be used by Fw -// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then -// Fw can tell Hw to send these packet derectly. -// -void rtl8188e_fill_fake_txdesc( - PADAPTER padapter, - u8* pDesc, - u32 BufferLen, - u8 IsPsPoll, - u8 IsBTQosNull) -{ - struct tx_desc *ptxdesc; - - - // Clear all status - ptxdesc = (struct tx_desc*)pDesc; - _rtw_memset(pDesc, 0, TXDESC_SIZE); - - //offset 0 - ptxdesc->txdw0 |= cpu_to_le32( OWN | FSG | LSG); //own, bFirstSeg, bLastSeg; - - ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); // Buffer size + command header - - //offset 4 - ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<txdw1 |= cpu_to_le32(NAVUSEHDR); - } - else - { - ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number - ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. - } - - if (_TRUE == IsBTQosNull) - { - ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); // BT NULL - } - - //offset 16 - ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate - -#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) - // USB interface drop packet if the checksum of descriptor isn't correct. - // Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). - rtl8188eu_cal_txdesc_chksum(ptxdesc); -#endif -} - -void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc) -{ - if ((pattrib->encrypt > 0) && !pattrib->bswenc) - { - switch (pattrib->encrypt) - { - //SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES - case _WEP40_: - case _WEP104_: - ptxdesc->txdw1 |= cpu_to_le32((0x01<txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); - break; - case _TKIP_: - case _TKIP_WTMIC_: - ptxdesc->txdw1 |= cpu_to_le32((0x01<txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); - break; -#ifdef CONFIG_WAPI_SUPPORT - case _SMS4_: - ptxdesc->txdw1 |= cpu_to_le32((0x02<txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); - break; -#endif - case _AES_: - ptxdesc->txdw1 |= cpu_to_le32((0x03<txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); - break; - case _NO_PRIVACY_: - default: - break; - - } - - } - -} - -void fill_txdesc_vcs(struct pkt_attrib *pattrib, u32 *pdw) -{ - //DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode); - - switch(pattrib->vcs_mode) - { - case RTS_CTS: - *pdw |= cpu_to_le32(RTS_EN); - break; - case CTS_TO_SELF: - *pdw |= cpu_to_le32(CTS_2_SELF); - break; - case NONE_VCS: - default: - break; - } - - if(pattrib->vcs_mode) { - *pdw |= cpu_to_le32(HW_RTS_EN); - - // Set RTS BW - if(pattrib->ht_en) - { - *pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)? cpu_to_le32(BIT(27)):0; - - if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) - *pdw |= cpu_to_le32((0x01<<28)&0x30000000); - else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) - *pdw |= cpu_to_le32((0x02<<28)&0x30000000); - else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) - *pdw |= 0; - else - *pdw |= cpu_to_le32((0x03<<28)&0x30000000); - } - } -} - -void fill_txdesc_phy(struct pkt_attrib *pattrib, u32 *pdw) -{ - //DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); - - if(pattrib->ht_en) - { - *pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)? cpu_to_le32(BIT(25)):0; - - if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) - *pdw |= cpu_to_le32((0x01<ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) - *pdw |= cpu_to_le32((0x02<ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) - *pdw |= 0; - else - *pdw |= cpu_to_le32((0x03<padapter; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct pkt_attrib *pattrib = &pxmitframe->attrib; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - //struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct tx_desc *ptxdesc = (struct tx_desc *)pmem; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - sint bmcst = IS_MCAST(pattrib->ra); - -#ifdef CONFIG_P2P - struct wifidirect_info* pwdinfo = &padapter->wdinfo; -#endif //CONFIG_P2P - -#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX -if (padapter->registrypriv.mp_mode == 0) -{ - if((!bagg_pkt) &&(urb_zero_packet_chk(padapter, sz)==0))//(sz %512) != 0 - //if((!bagg_pkt) &&(rtw_usb_bulk_size_boundary(padapter,TXDESC_SIZE+sz)==_FALSE)) - { - ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ); - //DBG_8192C("==> non-agg-pkt,shift pointer...\n"); - pull = 1; - } -} -#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX - - _rtw_memset(ptxdesc, 0, sizeof(struct tx_desc)); - - //4 offset 0 - ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); - //DBG_8192C("%s==> pkt_len=%d,bagg_pkt=%02x\n",__FUNCTION__,sz,bagg_pkt); - ptxdesc->txdw0 |= cpu_to_le32(sz & 0x0000ffff);//update TXPKTSIZE - - offset = TXDESC_SIZE + OFFSET_SZ; - - #ifdef CONFIG_TX_EARLY_MODE - if(bagg_pkt){ - offset += EARLY_MODE_INFO_SIZE ;//0x28 - } - #endif - //DBG_8192C("%s==>offset(0x%02x) \n",__FUNCTION__,offset); - ptxdesc->txdw0 |= cpu_to_le32(((offset) << OFFSET_SHT) & 0x00ff0000);//32 bytes for TX Desc - - if (bmcst) ptxdesc->txdw0 |= cpu_to_le32(BMC); - -#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX -if (padapter->registrypriv.mp_mode == 0) -{ - if(!bagg_pkt){ - if((pull) && (pxmitframe->pkt_offset>0)) { - pxmitframe->pkt_offset = pxmitframe->pkt_offset -1; - } - } -} -#endif - //DBG_8192C("%s, pkt_offset=0x%02x\n",__FUNCTION__,pxmitframe->pkt_offset); - - // pkt_offset, unit:8 bytes padding - if (pxmitframe->pkt_offset > 0) - ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000); - - //driver uses rate - ptxdesc->txdw4 |= cpu_to_le32(USERATE);//rate control always by driver - - if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) - { - //DBG_8192C("pxmitframe->frame_tag == DATA_FRAMETAG\n"); - - //offset 4 - ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x3F); - - qsel = (uint)(pattrib->qsel & 0x0000001f); - //DBG_8192C("==> macid(%d) qsel:0x%02x \n",pattrib->mac_id,qsel); - ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); - - ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< RATE_ID_SHT) & 0x000F0000); - - fill_txdesc_sectype(pattrib, ptxdesc); - - if(pattrib->ampdu_en==_TRUE){ - ptxdesc->txdw2 |= cpu_to_le32(AGG_EN);//AGG EN - - //SET_TX_DESC_MAX_AGG_NUM_88E(pDesc, 0x1F); - //SET_TX_DESC_MCSG1_MAX_LEN_88E(pDesc, 0x6); - //SET_TX_DESC_MCSG2_MAX_LEN_88E(pDesc, 0x6); - //SET_TX_DESC_MCSG3_MAX_LEN_88E(pDesc, 0x6); - //SET_TX_DESC_MCS7_SGI_MAX_LEN_88E(pDesc, 0x6); - ptxdesc->txdw6 = 0x6666f800; - } - else{ - ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);//AGG BK - } - - //offset 8 - - - //offset 12 - ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<< SEQ_SHT)&0x0FFF0000); - - - //offset 16 , offset 20 - if (pattrib->qos_en) - ptxdesc->txdw4 |= cpu_to_le32(QOS);//QoS - - //offset 20 - #ifdef CONFIG_USB_TX_AGGREGATION - if (pxmitframe->agg_num > 1){ - //DBG_8192C("%s agg_num:%d\n",__FUNCTION__,pxmitframe->agg_num ); - ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << USB_TXAGG_NUM_SHT) & 0xFF000000); - } - #endif - - if ((pattrib->ether_type != 0x888e) && - (pattrib->ether_type != 0x0806) && - (pattrib->ether_type != 0x88b4) && - (pattrib->dhcp_pkt != 1)) - { - //Non EAP & ARP & DHCP type data packet - - fill_txdesc_vcs(pattrib, &ptxdesc->txdw4); - fill_txdesc_phy(pattrib, &ptxdesc->txdw4); - - ptxdesc->txdw4 |= cpu_to_le32(0x00000008);//RTS Rate=24M - ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);//DATA/RTS Rate FB LMT - - #if (RATE_ADAPTIVE_SUPPORT == 1) - if(pattrib->ht_en){ - if( ODM_RA_GetShortGI_8188E(&pHalData->odmpriv,pattrib->mac_id)) - ptxdesc->txdw5 |= cpu_to_le32(SGI);//SGI - } - - data_rate =ODM_RA_GetDecisionRate_8188E(&pHalData->odmpriv,pattrib->mac_id); - //for debug - #if 1 - if(padapter->fix_rate!= 0xFF){ - - data_rate = padapter->fix_rate; - ptxdesc->txdw4 |= cpu_to_le32(DISDATAFB); - //printk("==> fix data_rate:0x%02x\n",data_rate); - } - #endif - - ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F); - - #if (POWER_TRAINING_ACTIVE==1) - pwr_status = ODM_RA_GetHwPwrStatus_8188E(&pHalData->odmpriv,pattrib->mac_id); - ptxdesc->txdw4 |=cpu_to_le32( (pwr_status & 0x7)<< PWR_STATUS_SHT); - #endif //(POWER_TRAINING_ACTIVE==1) - #else//if (RATE_ADAPTIVE_SUPPORT == 1) - - if(pattrib->ht_en) - ptxdesc->txdw5 |= cpu_to_le32(SGI);//SGI - - data_rate = 0x13; //default rate: MCS7 - if(padapter->fix_rate!= 0xFF){//rate control by iwpriv - data_rate = padapter->fix_rate; - ptxdesc->txdw4 | cpu_to_le32(DISDATAFB); - } - ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F); - - #endif//if (RATE_ADAPTIVE_SUPPORT == 1) - - } - else - { - // EAP data packet and ARP packet and DHCP. - // Use the 1M data rate to send the EAP/ARP packet. - // This will maybe make the handshake smooth. - - ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);//AGG BK - - if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) - ptxdesc->txdw4 |= cpu_to_le32(BIT(24));// DATA_SHORT - - ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); - } - -#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX - //offset 24 - if ( pattrib->hw_tcp_csum == 1 ) { - // ptxdesc->txdw6 = 0; // clear TCP_CHECKSUM and IP_CHECKSUM. It's zero already!! - u8 ip_hdr_offset = 32 + pattrib->hdrlen + pattrib->iv_len + 8; - ptxdesc->txdw7 = (1 << 31) | (ip_hdr_offset << 16); - DBG_8192C("ptxdesc->txdw7 = %08x\n", ptxdesc->txdw7); - } -#endif - } - else if((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG) - { - //DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n"); - - //offset 4 - ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x3f); - - qsel = (uint)(pattrib->qsel&0x0000001f); - ptxdesc->txdw1 |= cpu_to_le32((qsel<txdw1 |= cpu_to_le32((pattrib->raid<< RATE_ID_SHT) & 0x000f0000); - - //fill_txdesc_sectype(pattrib, ptxdesc); - - //offset 8 -#ifdef CONFIG_XMIT_ACK - //CCX-TXRPT ack for xmit mgmt frames. - if (pxmitframe->ack_report) { - #ifdef DBG_CCX - static u16 ccx_sw = 0x123; - ptxdesc->txdw7 |= cpu_to_le32(((ccx_sw)<<16)&0x0fff0000); - DBG_871X("%s set ccx, sw:0x%03x\n", __func__, ccx_sw); - ccx_sw = (ccx_sw+1)%0xfff; - #endif - ptxdesc->txdw2 |= cpu_to_le32(BIT(19)); - } -#endif //CONFIG_XMIT_ACK - - //offset 12 - ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<txdw5 |= cpu_to_le32(RTY_LMT_EN);//retry limit enable - if(pattrib->retry_ctrl == _TRUE) - ptxdesc->txdw5 |= cpu_to_le32(0x00180000);//retry limit = 6 - else - ptxdesc->txdw5 |= cpu_to_le32(0x00300000);//retry limit = 12 - -#ifdef CONFIG_INTEL_PROXIM - if((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){ - DBG_871X("\n %s pattrib->rate=%d\n",__FUNCTION__,pattrib->rate); - ptxdesc->txdw5 |= cpu_to_le32( pattrib->rate); - } - else -#endif - { - ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); - } - } - else if((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG) - { - DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n"); - } - else - { - DBG_8192C("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag); - - //offset 4 - ptxdesc->txdw1 |= cpu_to_le32((4)&0x3f);//CAM_ID(MAC_ID) - - ptxdesc->txdw1 |= cpu_to_le32((6<< RATE_ID_SHT) & 0x000f0000);//raid - - //offset 8 - - //offset 12 - ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); - } - - // 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. - // (1) The sequence number of each non-Qos frame / broadcast / multicast / - // mgnt frame should be controled by Hw because Fw will also send null data - // which we cannot control when Fw LPS enable. - // --> default enable non-Qos data sequense number. 2010.06.23. by tynli. - // (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. - // (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. - // 2010.06.23. Added by tynli. - if(!pattrib->qos_en) - { - //ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number - //ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. - - ptxdesc->txdw3 |= cpu_to_le32(EN_HWSEQ); // Hw set sequence number - ptxdesc->txdw4 |= cpu_to_le32(HW_SSN); // Hw set sequence number - - } - -#ifdef CONFIG_HW_ANTENNA_DIVERSITY //CONFIG_ANTENNA_DIVERSITY - ODM_SetTxAntByTxInfo_88E(&pHalData->odmpriv, pmem, pattrib->mac_id); -#endif - - rtl8188eu_cal_txdesc_chksum(ptxdesc); - _dbg_dump_tx_info(padapter,pxmitframe->frame_tag,ptxdesc); - return pull; - -} - - -#ifdef CONFIG_XMIT_THREAD_MODE -/* - * Description - * Transmit xmitbuf to hardware tx fifo - * - * Return - * _SUCCESS ok - * _FAIL something error - */ -s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter) -{ - //PHAL_DATA_TYPE phal; - struct xmit_priv *pxmitpriv; - struct xmit_buf *pxmitbuf; - s32 ret; - - - //phal = GET_HAL_DATA(padapter); - pxmitpriv = &padapter->xmitpriv; - - ret = _rtw_down_sema(&pxmitpriv->xmit_sema); - if (_FAIL == ret) { - RT_TRACE(_module_hal_xmit_c_, _drv_emerg_, - ("%s: down SdioXmitBufSema fail!\n", __FUNCTION__)); - return _FAIL; - } - - ret = (padapter->bDriverStopped == _TRUE) || (padapter->bSurpriseRemoved == _TRUE); - if (ret) { - RT_TRACE(_module_hal_xmit_c_, _drv_notice_, - ("%s: bDriverStopped(%d) bSurpriseRemoved(%d)!\n", - __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved)); - return _FAIL; - } - - if(check_pending_xmitbuf(pxmitpriv) == _FALSE) - return _SUCCESS; - -#ifdef CONFIG_LPS_LCLK - ret = rtw_register_tx_alive(padapter); - if (ret != _SUCCESS) { - RT_TRACE(_module_hal_xmit_c_, _drv_notice_, - ("%s: wait to leave LPS_LCLK\n", __FUNCTION__)); - return _SUCCESS; - } -#endif - - do { - pxmitbuf = dequeue_pending_xmitbuf(pxmitpriv); - if (pxmitbuf == NULL) break; - - rtw_write_port(padapter, pxmitbuf->ff_hwaddr, pxmitbuf->len, (unsigned char*)pxmitbuf); - - } while (1); - -#ifdef CONFIG_LPS_LCLK - rtw_unregister_tx_alive(padapter); -#endif - - return _SUCCESS; -} -#endif - -#ifdef CONFIG_IOL_IOREG_CFG_DBG -#include -#endif -//for non-agg data frame or management frame -static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe) -{ - s32 ret = _SUCCESS; - s32 inner_ret = _SUCCESS; - int t, sz, w_sz, pull=0; - u8 *mem_addr; - u32 ff_hwaddr; - struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf; - struct pkt_attrib *pattrib = &pxmitframe->attrib; - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - struct security_priv *psecuritypriv = &padapter->securitypriv; -#ifdef CONFIG_80211N_HT - if ((pxmitframe->frame_tag == DATA_FRAMETAG) && - (pxmitframe->attrib.ether_type != 0x0806) && - (pxmitframe->attrib.ether_type != 0x888e) && - (pxmitframe->attrib.ether_type != 0x88b4) && - (pxmitframe->attrib.dhcp_pkt != 1)) - { - rtw_issue_addbareq_cmd(padapter, pxmitframe); - } -#endif //CONFIG_80211N_HT - mem_addr = pxmitframe->buf_addr; - - RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_dump_xframe()\n")); - - for (t = 0; t < pattrib->nr_frags; t++) - { - if (inner_ret != _SUCCESS && ret == _SUCCESS) - ret = _FAIL; - - if (t != (pattrib->nr_frags - 1)) - { - RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("pattrib->nr_frags=%d\n", pattrib->nr_frags)); - - sz = pxmitpriv->frag_len; - sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len); - } - else //no frag - { - sz = pattrib->last_txcmdsz; - } - - pull = update_txdesc(pxmitframe, mem_addr, sz, _FALSE); - - if(pull) - { - mem_addr += PACKET_OFFSET_SZ; //pull txdesc head - - //pxmitbuf ->pbuf = mem_addr; - pxmitframe->buf_addr = mem_addr; - - w_sz = sz + TXDESC_SIZE; - } - else - { - w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ; - } -#ifdef CONFIG_IOL_IOREG_CFG_DBG - rtw_IOL_cmd_buf_dump(padapter,w_sz,pxmitframe->buf_addr); -#endif - ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); - -#ifdef CONFIG_XMIT_THREAD_MODE - pxmitbuf->len = w_sz; - pxmitbuf->ff_hwaddr = ff_hwaddr; - enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); -#else - inner_ret = rtw_write_port(padapter, ff_hwaddr, w_sz, (unsigned char*)pxmitbuf); -#endif - - rtw_count_tx_stats(padapter, pxmitframe, sz); - - RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_write_port, w_sz=%d\n", w_sz)); - //DBG_8192C("rtw_write_port, w_sz=%d, sz=%d, txdesc_sz=%d, tid=%d\n", w_sz, sz, w_sz-sz, pattrib->priority); - - mem_addr += w_sz; - - mem_addr = (u8 *)RND4(((SIZE_PTR)(mem_addr))); - - } - - rtw_free_xmitframe(pxmitpriv, pxmitframe); - - if (ret != _SUCCESS) - rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN); - - return ret; -} - -#ifdef CONFIG_USB_TX_AGGREGATION -static u32 xmitframe_need_length(struct xmit_frame *pxmitframe) -{ - struct pkt_attrib *pattrib = &pxmitframe->attrib; - - u32 len = 0; - - // no consider fragement - len = pattrib->hdrlen + pattrib->iv_len + - SNAP_SIZE + sizeof(u16) + - pattrib->pktlen + - ((pattrib->bswenc) ? pattrib->icv_len : 0); - - if(pattrib->encrypt ==_TKIP_) - len += 8; - - return len; -} - -#define IDEA_CONDITION 1 // check all packets before enqueue -s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct xmit_frame *pxmitframe = NULL; - struct xmit_frame *pfirstframe = NULL; - - // aggregate variable - struct hw_xmit *phwxmit; - struct sta_info *psta = NULL; - struct tx_servq *ptxservq = NULL; - - _irqL irqL; - _list *xmitframe_plist = NULL, *xmitframe_phead = NULL; - - u32 pbuf; // next pkt address - u32 pbuf_tail; // last pkt tail - u32 len; // packet length, except TXDESC_SIZE and PKT_OFFSET - - u32 bulkSize = pHalData->UsbBulkOutSize; - u8 descCount; - u32 bulkPtr; - - // dump frame variable - u32 ff_hwaddr; - -#ifndef IDEA_CONDITION - int res = _SUCCESS; -#endif - - RT_TRACE(_module_rtl8192c_xmit_c_, _drv_info_, ("+xmitframe_complete\n")); - - - // check xmitbuffer is ok - if (pxmitbuf == NULL) { - pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); - if (pxmitbuf == NULL){ - //DBG_871X("%s #1, connot alloc xmitbuf!!!! \n",__FUNCTION__); - return _FALSE; - } - } - -//DBG_8192C("%s ===================================== \n",__FUNCTION__); - //3 1. pick up first frame - do { - rtw_free_xmitframe(pxmitpriv, pxmitframe); - - pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); - if (pxmitframe == NULL) { - // no more xmit frame, release xmit buffer - //DBG_8192C("no more xmit frame ,return\n"); - rtw_free_xmitbuf(pxmitpriv, pxmitbuf); - return _FALSE; - } - -#ifndef IDEA_CONDITION - if (pxmitframe->frame_tag != DATA_FRAMETAG) { - RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, - ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n", - pxmitframe->frame_tag, DATA_FRAMETAG)); -// rtw_free_xmitframe(pxmitpriv, pxmitframe); - continue; - } - - // TID 0~15 - if ((pxmitframe->attrib.priority < 0) || - (pxmitframe->attrib.priority > 15)) { - RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, - ("xmitframe_complete: TID(%d) should be 0~15!\n", - pxmitframe->attrib.priority)); -// rtw_free_xmitframe(pxmitpriv, pxmitframe); - continue; - } -#endif - //DBG_8192C("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); - pxmitframe->pxmitbuf = pxmitbuf; - pxmitframe->buf_addr = pxmitbuf->pbuf; - pxmitbuf->priv_data = pxmitframe; - - pxmitframe->agg_num = 1; // alloc xmitframe should assign to 1. - #ifdef CONFIG_TX_EARLY_MODE - pxmitframe->pkt_offset = 2; // first frame of aggregation, reserve one offset for EM info ,another for usb bulk-out block check - #else - pxmitframe->pkt_offset = 1; // first frame of aggregation, reserve offset - #endif - - if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == _FALSE) { - DBG_871X("%s coalesce 1st xmitframe failed \n",__FUNCTION__); - continue; - } - - // always return ndis_packet after rtw_xmitframe_coalesce - rtw_os_xmit_complete(padapter, pxmitframe); - - break; - } while (1); - - //3 2. aggregate same priority and same DA(AP or STA) frames - pfirstframe = pxmitframe; - len = xmitframe_need_length(pfirstframe) + TXDESC_SIZE+(pfirstframe->pkt_offset*PACKET_OFFSET_SZ); - pbuf_tail = len; - pbuf = _RND8(pbuf_tail); - - // check pkt amount in one bulk - descCount = 0; - bulkPtr = bulkSize; - if (pbuf < bulkPtr) - descCount++; - else { - descCount = 0; - bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; // round to next bulkSize - } - - // dequeue same priority packet from station tx queue - //psta = pfirstframe->attrib.psta; - psta = rtw_get_stainfo(&padapter->stapriv, pfirstframe->attrib.ra); - if(pfirstframe->attrib.psta != psta){ - DBG_871X("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pfirstframe->attrib.psta, psta); - } - if (psta == NULL) { - DBG_8192C("rtw_xmit_classifier: psta == NULL\n"); - } - if(!(psta->state &_FW_LINKED)){ - DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); - } - - switch (pfirstframe->attrib.priority) { - case 1: - case 2: - ptxservq = &(psta->sta_xmitpriv.bk_q); - phwxmit = pxmitpriv->hwxmits + 3; - break; - - case 4: - case 5: - ptxservq = &(psta->sta_xmitpriv.vi_q); - phwxmit = pxmitpriv->hwxmits + 1; - break; - - case 6: - case 7: - ptxservq = &(psta->sta_xmitpriv.vo_q); - phwxmit = pxmitpriv->hwxmits; - break; - - case 0: - case 3: - default: - ptxservq = &(psta->sta_xmitpriv.be_q); - phwxmit = pxmitpriv->hwxmits + 2; - break; - } -//DBG_8192C("==> pkt_no=%d,pkt_len=%d,len=%d,RND8_LEN=%d,pkt_offset=0x%02x\n", - //pxmitframe->agg_num,pxmitframe->attrib.last_txcmdsz,len,pbuf,pxmitframe->pkt_offset ); - - _enter_critical_bh(&pxmitpriv->lock, &irqL); - - xmitframe_phead = get_list_head(&ptxservq->sta_pending); - xmitframe_plist = get_next(xmitframe_phead); - - while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE) - { - pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); - xmitframe_plist = get_next(xmitframe_plist); - - pxmitframe->agg_num = 0; // not first frame of aggregation - #ifdef CONFIG_TX_EARLY_MODE - pxmitframe->pkt_offset = 1;// not first frame of aggregation,reserve offset for EM Info - #else - pxmitframe->pkt_offset = 0; // not first frame of aggregation, no need to reserve offset - #endif - - len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE +(pxmitframe->pkt_offset*PACKET_OFFSET_SZ); - - if (_RND8(pbuf + len) > MAX_XMITBUF_SZ) - //if (_RND8(pbuf + len) > (MAX_XMITBUF_SZ/2))//to do : for TX TP finial tune , Georgia 2012-0323 - { - //DBG_8192C("%s....len> MAX_XMITBUF_SZ\n",__FUNCTION__); - pxmitframe->agg_num = 1; - pxmitframe->pkt_offset = 1; - break; - } - rtw_list_delete(&pxmitframe->list); - ptxservq->qcnt--; - phwxmit->accnt--; - -#ifndef IDEA_CONDITION - // suppose only data frames would be in queue - if (pxmitframe->frame_tag != DATA_FRAMETAG) { - RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, - ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n", - pxmitframe->frame_tag, DATA_FRAMETAG)); - rtw_free_xmitframe(pxmitpriv, pxmitframe); - continue; - } - - // TID 0~15 - if ((pxmitframe->attrib.priority < 0) || - (pxmitframe->attrib.priority > 15)) { - RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, - ("xmitframe_complete: TID(%d) should be 0~15!\n", - pxmitframe->attrib.priority)); - rtw_free_xmitframe(pxmitpriv, pxmitframe); - continue; - } -#endif - -// pxmitframe->pxmitbuf = pxmitbuf; - pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf; - - if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == _FALSE) { - DBG_871X("%s coalesce failed \n",__FUNCTION__); - rtw_free_xmitframe(pxmitpriv, pxmitframe); - continue; - } - - //DBG_8192C("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); - // always return ndis_packet after rtw_xmitframe_coalesce - rtw_os_xmit_complete(padapter, pxmitframe); - - // (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz - update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz,_TRUE); - - // don't need xmitframe any more - rtw_free_xmitframe(pxmitpriv, pxmitframe); - - // handle pointer and stop condition - pbuf_tail = pbuf + len; - pbuf = _RND8(pbuf_tail); - - - pfirstframe->agg_num++; -#ifdef CONFIG_TX_EARLY_MODE - pxmitpriv->agg_pkt[pfirstframe->agg_num-1].offset = _RND8(len); - pxmitpriv->agg_pkt[pfirstframe->agg_num-1].pkt_len = pxmitframe->attrib.last_txcmdsz; -#endif - if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num) - break; - - if (pbuf < bulkPtr) { - descCount++; - if (descCount == pHalData->UsbTxAggDescNum) - break; - } else { - descCount = 0; - bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; - } - }//end while( aggregate same priority and same DA(AP or STA) frames) - - - if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE) - rtw_list_delete(&ptxservq->tx_pending); - - _exit_critical_bh(&pxmitpriv->lock, &irqL); -#ifdef CONFIG_80211N_HT - if ((pfirstframe->attrib.ether_type != 0x0806) && - (pfirstframe->attrib.ether_type != 0x888e) && - (pfirstframe->attrib.ether_type != 0x88b4) && - (pfirstframe->attrib.dhcp_pkt != 1)) - { - rtw_issue_addbareq_cmd(padapter, pfirstframe); - } -#endif //CONFIG_80211N_HT -#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX - //3 3. update first frame txdesc - if ((pbuf_tail % bulkSize) == 0) { - // remove pkt_offset - pbuf_tail -= PACKET_OFFSET_SZ; - pfirstframe->buf_addr += PACKET_OFFSET_SZ; - pfirstframe->pkt_offset--; - //DBG_8192C("$$$$$ buf size equal to USB block size $$$$$$\n"); - } -#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX - - update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz,_TRUE); - - #ifdef CONFIG_TX_EARLY_MODE - //prepare EM info for first frame, agg_num value start from 1 - pxmitpriv->agg_pkt[0].offset = _RND8(pfirstframe->attrib.last_txcmdsz +TXDESC_SIZE +(pfirstframe->pkt_offset*PACKET_OFFSET_SZ)); - pxmitpriv->agg_pkt[0].pkt_len = pfirstframe->attrib.last_txcmdsz;//get from rtw_xmitframe_coalesce - - UpdateEarlyModeInfo8188E(pxmitpriv,pxmitbuf ); - #endif - - //3 4. write xmit buffer to USB FIFO - ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe); -//DBG_8192C("%s ===================================== write port,buf_size(%d) \n",__FUNCTION__,pbuf_tail); - // xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr - rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8*)pxmitbuf); - - - //3 5. update statisitc - pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE); - pbuf_tail -= (pfirstframe->pkt_offset * PACKET_OFFSET_SZ); - - - rtw_count_tx_stats(padapter, pfirstframe, pbuf_tail); - - rtw_free_xmitframe(pxmitpriv, pfirstframe); - - return _TRUE; -} - -#else - -s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) -{ - - struct hw_xmit *phwxmits; - sint hwentry; - struct xmit_frame *pxmitframe=NULL; - int res=_SUCCESS, xcnt = 0; - - phwxmits = pxmitpriv->hwxmits; - hwentry = pxmitpriv->hwxmit_entry; - - RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete()\n")); - - if(pxmitbuf==NULL) - { - pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); - if(!pxmitbuf) - { - return _FALSE; - } - } - - - do - { - pxmitframe = rtw_dequeue_xframe(pxmitpriv, phwxmits, hwentry); - - if(pxmitframe) - { - pxmitframe->pxmitbuf = pxmitbuf; - - pxmitframe->buf_addr = pxmitbuf->pbuf; - - pxmitbuf->priv_data = pxmitframe; - - if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) - { - if(pxmitframe->attrib.priority<=15)//TID0~15 - { - res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); - } - //DBG_8192C("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); - rtw_os_xmit_complete(padapter, pxmitframe);//always return ndis_packet after rtw_xmitframe_coalesce - } - - - RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete(): rtw_dump_xframe\n")); - - - if(res == _SUCCESS) - { - rtw_dump_xframe(padapter, pxmitframe); - } - else - { - rtw_free_xmitbuf(pxmitpriv, pxmitbuf); - rtw_free_xmitframe(pxmitpriv, pxmitframe); - } - - xcnt++; - - } - else - { - rtw_free_xmitbuf(pxmitpriv, pxmitbuf); - return _FALSE; - } - - break; - - }while(0/*xcnt < (NR_XMITFRAME >> 3)*/); - - return _TRUE; - -} -#endif - - - -static s32 xmitframe_direct(_adapter *padapter, struct xmit_frame *pxmitframe) -{ - s32 res = _SUCCESS; -//DBG_8192C("==> %s \n",__FUNCTION__); - - res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); - if (res == _SUCCESS) { - rtw_dump_xframe(padapter, pxmitframe); - } - else{ - DBG_8192C("==> %s xmitframe_coalsece failed\n",__FUNCTION__); - } - - return res; -} - -/* - * Return - * _TRUE dump packet directly - * _FALSE enqueue packet - */ -static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe) -{ - _irqL irqL; - s32 res; - struct xmit_buf *pxmitbuf = NULL; - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - struct pkt_attrib *pattrib = &pxmitframe->attrib; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; -#ifdef CONFIG_CONCURRENT_MODE - PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; - struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); -#endif - - _enter_critical_bh(&pxmitpriv->lock, &irqL); - -//DBG_8192C("==> %s \n",__FUNCTION__); - - if (rtw_txframes_sta_ac_pending(padapter, pattrib) > 0) - { - //DBG_8192C("enqueue AC(%d)\n",pattrib->priority); - goto enqueue; - } - - - if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) - goto enqueue; - -#ifdef CONFIG_CONCURRENT_MODE - if (check_fwstate(pbuddy_mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) - goto enqueue; -#endif - - pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); - if (pxmitbuf == NULL) - goto enqueue; - - _exit_critical_bh(&pxmitpriv->lock, &irqL); - - pxmitframe->pxmitbuf = pxmitbuf; - pxmitframe->buf_addr = pxmitbuf->pbuf; - pxmitbuf->priv_data = pxmitframe; - - if (xmitframe_direct(padapter, pxmitframe) != _SUCCESS) { - rtw_free_xmitbuf(pxmitpriv, pxmitbuf); - rtw_free_xmitframe(pxmitpriv, pxmitframe); - } - - return _TRUE; - -enqueue: - res = rtw_xmitframe_enqueue(padapter, pxmitframe); - _exit_critical_bh(&pxmitpriv->lock, &irqL); - - if (res != _SUCCESS) { - RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("pre_xmitframe: enqueue xmitframe fail\n")); - rtw_free_xmitframe(pxmitpriv, pxmitframe); - - // Trick, make the statistics correct - pxmitpriv->tx_pkts--; - pxmitpriv->tx_drop++; - return _TRUE; - } - - return _FALSE; -} - -s32 rtl8188eu_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe) -{ - return rtw_dump_xframe(padapter, pmgntframe); -} - -/* - * Return - * _TRUE dump packet directly ok - * _FALSE temporary can't transmit packets to hardware - */ -s32 rtl8188eu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe) -{ - return pre_xmitframe(padapter, pxmitframe); -} - -s32 rtl8188eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) -{ - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - s32 err; - - if ((err=rtw_xmitframe_enqueue(padapter, pxmitframe)) != _SUCCESS) - { - rtw_free_xmitframe(pxmitpriv, pxmitframe); - - // Trick, make the statistics correct - pxmitpriv->tx_pkts--; - pxmitpriv->tx_drop++; - } - else - { - tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); - } - - return err; - -} - - -#ifdef CONFIG_HOSTAPD_MLME - -static void rtl8188eu_hostap_mgnt_xmit_cb(struct urb *urb) -{ - struct sk_buff *skb = (struct sk_buff *)urb->context; - - //DBG_8192C("%s\n", __FUNCTION__); - - rtw_skb_free(skb); -} - -s32 rtl8188eu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt) -{ - u16 fc; - int rc, len, pipe; - unsigned int bmcst, tid, qsel; - struct sk_buff *skb, *pxmit_skb; - struct urb *urb; - unsigned char *pxmitbuf; - struct tx_desc *ptxdesc; - struct rtw_ieee80211_hdr *tx_hdr; - struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; - struct net_device *pnetdev = padapter->pnetdev; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); - - - //DBG_8192C("%s\n", __FUNCTION__); - - skb = pkt; - - len = skb->len; - tx_hdr = (struct rtw_ieee80211_hdr *)(skb->data); - fc = le16_to_cpu(tx_hdr->frame_ctl); - bmcst = IS_MCAST(tx_hdr->addr1); - - if ((fc & RTW_IEEE80211_FCTL_FTYPE) != RTW_IEEE80211_FTYPE_MGMT) - goto _exit; - - pxmit_skb = rtw_skb_alloc(len + TXDESC_SIZE); - - if(!pxmit_skb) - goto _exit; - - pxmitbuf = pxmit_skb->data; - - urb = usb_alloc_urb(0, GFP_ATOMIC); - if (!urb) { - goto _exit; - } - - // ----- fill tx desc ----- - ptxdesc = (struct tx_desc *)pxmitbuf; - _rtw_memset(ptxdesc, 0, sizeof(*ptxdesc)); - - //offset 0 - ptxdesc->txdw0 |= cpu_to_le32(len&0x0000ffff); - ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32(OWN | FSG | LSG); - - if(bmcst) - { - ptxdesc->txdw0 |= cpu_to_le32(BIT(24)); - } - - //offset 4 - ptxdesc->txdw1 |= cpu_to_le32(0x00);//MAC_ID - - ptxdesc->txdw1 |= cpu_to_le32((0x12<txdw1 |= cpu_to_le32((0x06<< 16) & 0x000f0000);//b mode - - //offset 8 - - //offset 12 - ptxdesc->txdw3 |= cpu_to_le32((le16_to_cpu(tx_hdr->seq_ctl)<<16)&0xffff0000); - - //offset 16 - ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate - - //offset 20 - - - //HW append seq - ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number - ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. - - - rtl8188eu_cal_txdesc_chksum(ptxdesc); - // ----- end of fill tx desc ----- - - // - skb_put(pxmit_skb, len + TXDESC_SIZE); - pxmitbuf = pxmitbuf + TXDESC_SIZE; - _rtw_memcpy(pxmitbuf, skb->data, len); - - //DBG_8192C("mgnt_xmit, len=%x\n", pxmit_skb->len); - - - // ----- prepare urb for submit ----- - - //translate DMA FIFO addr to pipehandle - //pipe = ffaddr2pipehdl(pdvobj, MGT_QUEUE_INX); - pipe = usb_sndbulkpipe(pdvobj->pusbdev, pHalData->Queue2EPNum[(u8)MGT_QUEUE_INX]&0x0f); - - usb_fill_bulk_urb(urb, pdvobj->pusbdev, pipe, - pxmit_skb->data, pxmit_skb->len, rtl8192cu_hostap_mgnt_xmit_cb, pxmit_skb); - - urb->transfer_flags |= URB_ZERO_PACKET; - usb_anchor_urb(urb, &phostapdpriv->anchored); - rc = usb_submit_urb(urb, GFP_ATOMIC); - if (rc < 0) { - usb_unanchor_urb(urb); - kfree_skb(skb); - } - usb_free_urb(urb); - - -_exit: - - rtw_skb_free(skb); - return 0; - -} -#endif - diff --git a/hal/rtl8188e/usb/usb_halinit.c b/hal/rtl8188e/usb/usb_halinit.c deleted file mode 100755 index 99620b6..0000000 --- a/hal/rtl8188e/usb/usb_halinit.c +++ /dev/null @@ -1,5220 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _HCI_HAL_INIT_C_ - -#include -#include -#include -#include - -#include -#include - -#ifdef CONFIG_IOL -#include -#endif - -#ifndef CONFIG_USB_HCI - -#error "CONFIG_USB_HCI shall be on!\n" - -#endif - -#include -#include -#include - -#ifdef CONFIG_EFUSE_CONFIG_FILE -#include -#include -#endif //CONFIG_EFUSE_CONFIG_FILE - -#if DISABLE_BB_RF - #define HAL_MAC_ENABLE 0 - #define HAL_BB_ENABLE 0 - #define HAL_RF_ENABLE 0 -#else - #define HAL_MAC_ENABLE 1 - #define HAL_BB_ENABLE 1 - #define HAL_RF_ENABLE 1 -#endif - - -static VOID -_ConfigNormalChipOutEP_8188E( - IN PADAPTER pAdapter, - IN u8 NumOutPipe - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - switch(NumOutPipe){ - case 3: - pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_LQ|TX_SELE_NQ; - pHalData->OutEpNumber=3; - break; - case 2: - pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_NQ; - pHalData->OutEpNumber=2; - break; - case 1: - pHalData->OutEpQueueSel=TX_SELE_HQ; - pHalData->OutEpNumber=1; - break; - default: - break; - - } - DBG_871X("%s OutEpQueueSel(0x%02x), OutEpNumber(%d) \n",__FUNCTION__,pHalData->OutEpQueueSel,pHalData->OutEpNumber ); - -} - -static BOOLEAN HalUsbSetQueuePipeMapping8188EUsb( - IN PADAPTER pAdapter, - IN u8 NumInPipe, - IN u8 NumOutPipe - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - BOOLEAN result = _FALSE; - - _ConfigNormalChipOutEP_8188E(pAdapter, NumOutPipe); - - // Normal chip with one IN and one OUT doesn't have interrupt IN EP. - if(1 == pHalData->OutEpNumber){ - if(1 != NumInPipe){ - return result; - } - } - - // All config other than above support one Bulk IN and one Interrupt IN. - //if(2 != NumInPipe){ - // return result; - //} - - result = Hal_MappingOutPipe(pAdapter, NumOutPipe); - - return result; - -} - -void rtl8188eu_interface_configure(_adapter *padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); - - if (pdvobjpriv->ishighspeed == _TRUE) - { - pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;//512 bytes - } - else - { - pHalData->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;//64 bytes - } - - pHalData->interfaceIndex = pdvobjpriv->InterfaceNumber; - -#ifdef CONFIG_USB_TX_AGGREGATION - pHalData->UsbTxAggMode = 1; - pHalData->UsbTxAggDescNum = 0x6; // only 4 bits -#endif - -#ifdef CONFIG_USB_RX_AGGREGATION - pHalData->UsbRxAggMode = USB_RX_AGG_DMA;// USB_RX_AGG_DMA; - pHalData->UsbRxAggBlockCount = 8; //unit : 512b - pHalData->UsbRxAggBlockTimeout = 0x6; - pHalData->UsbRxAggPageCount = 48; //uint :128 b //0x0A; // 10 = MAX_RX_DMA_BUFFER_SIZE/2/pHalData->UsbBulkOutSize - pHalData->UsbRxAggPageTimeout = 0x4; //6, absolute time = 34ms/(2^6) -#endif - - HalUsbSetQueuePipeMapping8188EUsb(padapter, - pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes); - -} - -static u32 InitPowerOn_rtl8188eu(_adapter *padapter) -{ - u16 value16; - u8 bMacPwrCtrlOn=_FALSE; - // HW Power on sequence - - rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - if(bMacPwrCtrlOn == _TRUE) - return _SUCCESS; - - if(!HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_PWR_ON_FLOW)) - { - DBG_871X(KERN_ERR "%s: run power on flow fail\n", __func__); - return _FAIL; - } - - // Enable MAC DMA/WMAC/SCHEDULE/SEC block - // Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. - rtw_write16(padapter, REG_CR, 0x00); //suggseted by zhouzhou, by page, 20111230 - - - // Enable MAC DMA/WMAC/SCHEDULE/SEC block - value16 = rtw_read16(padapter, REG_CR); - value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN - | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN); - // for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. - - rtw_write16(padapter, REG_CR, value16); - - bMacPwrCtrlOn = _TRUE; - rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - - return _SUCCESS; - -} - - -static void _dbg_dump_macreg(_adapter *padapter) -{ - u32 offset = 0; - u32 val32 = 0; - u32 index =0 ; - for(index=0;index<64;index++) - { - offset = index*4; - val32 = rtw_read32(padapter,offset); - DBG_8192C("offset : 0x%02x ,val:0x%08x\n",offset,val32); - } -} - - -static void _InitPABias(_adapter *padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - u8 pa_setting; - BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); - - //FIXED PA current issue - //efuse_one_byte_read(padapter, 0x1FA, &pa_setting); - pa_setting = EFUSE_Read1Byte(padapter, 0x1FA); - - //RT_TRACE(COMP_INIT, DBG_LOUD, ("_InitPABias 0x1FA 0x%x \n",pa_setting)); - - if(!(pa_setting & BIT0)) - { - PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x0F406); - PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x4F406); - PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x8F406); - PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0xCF406); - //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path A\n")); - } - - if(!(pa_setting & BIT1) && is92C) - { - PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0x0F406); - PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0x4F406); - PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0x8F406); - PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0xCF406); - //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path B\n")); - } - - if(!(pa_setting & BIT4)) - { - pa_setting = rtw_read8(padapter, 0x16); - pa_setting &= 0x0F; - rtw_write8(padapter, 0x16, pa_setting | 0x80); - rtw_write8(padapter, 0x16, pa_setting | 0x90); - } -} -#ifdef CONFIG_BT_COEXIST -static void _InitBTCoexist(_adapter *padapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); - u8 u1Tmp; - - if(pbtpriv->BT_Coexist && pbtpriv->BT_CoexistType == BT_CSR_BC4) - { - -//#if MP_DRIVER != 1 - if (padapter->registrypriv.mp_mode == 0) - { - if(pbtpriv->BT_Ant_isolation) - { - rtw_write8( padapter,REG_GPIO_MUXCFG, 0xa0); - DBG_8192C("BT write 0x%x = 0x%x\n", REG_GPIO_MUXCFG, 0xa0); - } - } -//#endif - - u1Tmp = rtw_read8(padapter, 0x4fd) & BIT0; - u1Tmp = u1Tmp | - ((pbtpriv->BT_Ant_isolation==1)?0:BIT1) | - ((pbtpriv->BT_Service==BT_SCO)?0:BIT2); - rtw_write8( padapter, 0x4fd, u1Tmp); - DBG_8192C("BT write 0x%x = 0x%x for non-isolation\n", 0x4fd, u1Tmp); - - - rtw_write32(padapter, REG_BT_COEX_TABLE+4, 0xaaaa9aaa); - DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+4, 0xaaaa9aaa); - - rtw_write32(padapter, REG_BT_COEX_TABLE+8, 0xffbd0040); - DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+8, 0xffbd0040); - - rtw_write32(padapter, REG_BT_COEX_TABLE+0xc, 0x40000010); - DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+0xc, 0x40000010); - - //Config to 1T1R - u1Tmp = rtw_read8(padapter,rOFDM0_TRxPathEnable); - u1Tmp &= ~(BIT1); - rtw_write8( padapter, rOFDM0_TRxPathEnable, u1Tmp); - DBG_8192C("BT write 0xC04 = 0x%x\n", u1Tmp); - - u1Tmp = rtw_read8(padapter, rOFDM1_TRxPathEnable); - u1Tmp &= ~(BIT1); - rtw_write8( padapter, rOFDM1_TRxPathEnable, u1Tmp); - DBG_8192C("BT write 0xD04 = 0x%x\n", u1Tmp); - - } -} -#endif - - - -//--------------------------------------------------------------- -// -// MAC init functions -// -//--------------------------------------------------------------- -static VOID -_SetMacID( - IN PADAPTER Adapter, u8* MacID - ) -{ - u32 i; - for(i=0 ; i< MAC_ADDR_LEN ; i++){ -#ifdef CONFIG_CONCURRENT_MODE - if(Adapter->iface_type == IFACE_PORT1) - rtw_write32(Adapter, REG_MACID1+i, MacID[i]); - else -#endif - rtw_write32(Adapter, REG_MACID+i, MacID[i]); - } -} - -static VOID -_SetBSSID( - IN PADAPTER Adapter, u8* BSSID - ) -{ - u32 i; - for(i=0 ; i< MAC_ADDR_LEN ; i++){ -#ifdef CONFIG_CONCURRENT_MODE - if(Adapter->iface_type == IFACE_PORT1) - rtw_write32(Adapter, REG_BSSID1+i, BSSID[i]); - else -#endif - rtw_write32(Adapter, REG_BSSID+i, BSSID[i]); - } -} - - -// Shall USB interface init this? -static VOID -_InitInterrupt( - IN PADAPTER Adapter - ) -{ - u32 imr,imr_ex; - u8 usb_opt; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - //HISR write one to clear - rtw_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF); - // HIMR - - imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E ; - rtw_write32(Adapter, REG_HIMR_88E, imr); - pHalData->IntrMask[0]=imr; - - imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E |IMR_RXFOVW_88E; - rtw_write32(Adapter, REG_HIMRE_88E, imr_ex); - pHalData->IntrMask[1]=imr_ex; - -#ifdef CONFIG_SUPPORT_USB_INT - // REG_USB_SPECIAL_OPTION - BIT(4) - // 0; Use interrupt endpoint to upload interrupt pkt - // 1; Use bulk endpoint to upload interrupt pkt, - usb_opt = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION); - - - if(!adapter_to_dvobj(Adapter)->ishighspeed - #ifdef CONFIG_USB_INTERRUPT_IN_PIPE - || pHalData->RtIntInPipe == 0x05 - #endif - ) - usb_opt = usb_opt & (~INT_BULK_SEL); - else - usb_opt = usb_opt | (INT_BULK_SEL); - - rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt ); - -#endif//CONFIG_SUPPORT_USB_INT - -} - - -static VOID -_InitQueueReservedPage( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct registry_priv *pregistrypriv = &Adapter->registrypriv; - u32 outEPNum = (u32)pHalData->OutEpNumber; - u32 numHQ = 0; - u32 numLQ = 0; - u32 numNQ = 0; - u32 numPubQ; - u32 value32; - u8 value8; - BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; - - if((bWiFiConfig)|| (pregistrypriv->qos_opt_enable)) - { - if (pHalData->OutEpQueueSel & TX_SELE_HQ) - { - numHQ = 0x29; - } - - if (pHalData->OutEpQueueSel & TX_SELE_LQ) - { - numLQ = 0x1C; - } - - // NOTE: This step shall be proceed before writting REG_RQPN. - if (pHalData->OutEpQueueSel & TX_SELE_NQ) { - numNQ = 0x1C; - } - value8 = (u8)_NPQ(numNQ); - rtw_write8(Adapter, REG_RQPN_NPQ, value8); - - numPubQ = 0xA8 - numHQ - numLQ - numNQ; - - // TX DMA - value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN; - rtw_write32(Adapter, REG_RQPN, value32); - } - else - { - rtw_write16(Adapter,REG_RQPN_NPQ, 0x0000);//Just follow MP Team,??? Georgia 03/28 - rtw_write16(Adapter,REG_RQPN_NPQ, 0x0d); - rtw_write32(Adapter,REG_RQPN, 0x808E000d);//reserve 7 page for LPS - } -} - -static VOID -_InitTxBufferBoundary( - IN PADAPTER Adapter, - IN u8 txpktbuf_bndy - ) -{ - struct registry_priv *pregistrypriv = &Adapter->registrypriv; - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - //u16 txdmactrl; - - rtw_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy); - rtw_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy); - rtw_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy); - rtw_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy); - rtw_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy); - -} - -static VOID -_InitPageBoundary( - IN PADAPTER Adapter - ) -{ - // RX Page Boundary - // - u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E-1; - - #if 0 - - // RX Page Boundary - //srand(static_cast(time(NULL)) ); - if(bSupportRemoteWakeUp) - { - Offset = MAX_RX_DMA_BUFFER_SIZE_88E+MAX_TX_REPORT_BUFFER_SIZE-MAX_SUPPORT_WOL_PATTERN_NUM(Adapter)*WKFMCAM_SIZE; - Offset = Offset / 128; // RX page size = 128 byte - rxff_bndy= (Offset*128) -1; - } - else - - #endif - rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy); -} - - -static VOID -_InitNormalChipRegPriority( - IN PADAPTER Adapter, - IN u16 beQ, - IN u16 bkQ, - IN u16 viQ, - IN u16 voQ, - IN u16 mgtQ, - IN u16 hiQ - ) -{ - u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7); - - value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | - _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | - _TXDMA_MGQ_MAP(mgtQ)| _TXDMA_HIQ_MAP(hiQ); - - rtw_write16(Adapter, REG_TRXDMA_CTRL, value16); -} - -static VOID -_InitNormalChipOneOutEpPriority( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - u16 value = 0; - switch(pHalData->OutEpQueueSel) - { - case TX_SELE_HQ: - value = QUEUE_HIGH; - break; - case TX_SELE_LQ: - value = QUEUE_LOW; - break; - case TX_SELE_NQ: - value = QUEUE_NORMAL; - break; - default: - //RT_ASSERT(FALSE,("Shall not reach here!\n")); - break; - } - - _InitNormalChipRegPriority(Adapter, - value, - value, - value, - value, - value, - value - ); - -} - -static VOID -_InitNormalChipTwoOutEpPriority( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct registry_priv *pregistrypriv = &Adapter->registrypriv; - u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; - - - u16 valueHi = 0; - u16 valueLow = 0; - - switch(pHalData->OutEpQueueSel) - { - case (TX_SELE_HQ | TX_SELE_LQ): - valueHi = QUEUE_HIGH; - valueLow = QUEUE_LOW; - break; - case (TX_SELE_NQ | TX_SELE_LQ): - valueHi = QUEUE_NORMAL; - valueLow = QUEUE_LOW; - break; - case (TX_SELE_HQ | TX_SELE_NQ): - valueHi = QUEUE_HIGH; - valueLow = QUEUE_NORMAL; - break; - default: - //RT_ASSERT(FALSE,("Shall not reach here!\n")); - break; - } - - if(!pregistrypriv->wifi_spec ){ - beQ = valueLow; - bkQ = valueLow; - viQ = valueHi; - voQ = valueHi; - mgtQ = valueHi; - hiQ = valueHi; - } - else{//for WMM ,CONFIG_OUT_EP_WIFI_MODE - beQ = valueLow; - bkQ = valueHi; - viQ = valueHi; - voQ = valueLow; - mgtQ = valueHi; - hiQ = valueHi; - } - - _InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); - -} - -static VOID -_InitNormalChipThreeOutEpPriority( - IN PADAPTER Adapter - ) -{ - struct registry_priv *pregistrypriv = &Adapter->registrypriv; - u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; - - if(!pregistrypriv->wifi_spec ){// typical setting - beQ = QUEUE_LOW; - bkQ = QUEUE_LOW; - viQ = QUEUE_NORMAL; - voQ = QUEUE_HIGH; - mgtQ = QUEUE_HIGH; - hiQ = QUEUE_HIGH; - } - else{// for WMM - beQ = QUEUE_LOW; - bkQ = QUEUE_NORMAL; - viQ = QUEUE_NORMAL; - voQ = QUEUE_HIGH; - mgtQ = QUEUE_HIGH; - hiQ = QUEUE_HIGH; - } - _InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); -} - -static VOID -_InitQueuePriority( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - switch(pHalData->OutEpNumber) - { - case 1: - _InitNormalChipOneOutEpPriority(Adapter); - break; - case 2: - _InitNormalChipTwoOutEpPriority(Adapter); - break; - case 3: - _InitNormalChipThreeOutEpPriority(Adapter); - break; - default: - //RT_ASSERT(FALSE,("Shall not reach here!\n")); - break; - } - - -} - - - -static VOID -_InitHardwareDropIncorrectBulkOut( - IN PADAPTER Adapter - ) -{ -#ifdef ENABLE_USB_DROP_INCORRECT_OUT - u32 value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK); - value32 |= DROP_DATA_EN; - rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32); -#endif -} - -static VOID -_InitNetworkType( - IN PADAPTER Adapter - ) -{ - u32 value32; - - value32 = rtw_read32(Adapter, REG_CR); - // TODO: use the other function to set network type - value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP); - - rtw_write32(Adapter, REG_CR, value32); -// RASSERT(pIoBase->rtw_read8(REG_CR + 2) == 0x2); -} - -static VOID -_InitTransferPageSize( - IN PADAPTER Adapter - ) -{ - // Tx page size is always 128. - - u8 value8; - value8 = _PSRX(PBP_128) | _PSTX(PBP_128); - rtw_write8(Adapter, REG_PBP, value8); -} - -static VOID -_InitDriverInfoSize( - IN PADAPTER Adapter, - IN u8 drvInfoSize - ) -{ - rtw_write8(Adapter,REG_RX_DRVINFO_SZ, drvInfoSize); -} - -static VOID -_InitWMACSetting( - IN PADAPTER Adapter - ) -{ - //u4Byte value32; - //u16 value16; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - //pHalData->ReceiveConfig = AAP | APM | AM | AB | APP_ICV | ADF | AMF | APP_FCS | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS; - //pHalData->ReceiveConfig = - //RCR_AAP | RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS; - // don't turn on AAP, it will allow all packets to driver - pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS; - -#if (1 == RTL8188E_RX_PACKET_INCLUDE_CRC) - pHalData->ReceiveConfig |= ACRC32; -#endif - - // some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() - rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig); - - // Accept all multicast address - rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF); - rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF); - - - // Accept all data frames - //value16 = 0xFFFF; - //rtw_write16(Adapter, REG_RXFLTMAP2, value16); - - // 2010.09.08 hpfan - // Since ADF is removed from RCR, ps-poll will not be indicate to driver, - // RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. - //value16 = 0x400; - //rtw_write16(Adapter, REG_RXFLTMAP1, value16); - - // Accept all management frames - //value16 = 0xFFFF; - //rtw_write16(Adapter, REG_RXFLTMAP0, value16); - - //enable RX_SHIFT bits - //rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter, REG_TRXDMA_CTRL)|BIT(1)); - -} - -static VOID -_InitAdaptiveCtrl( - IN PADAPTER Adapter - ) -{ - u16 value16; - u32 value32; - - // Response Rate Set - value32 = rtw_read32(Adapter, REG_RRSR); - value32 &= ~RATE_BITMAP_ALL; - value32 |= RATE_RRSR_CCK_ONLY_1M; - rtw_write32(Adapter, REG_RRSR, value32); - - // CF-END Threshold - //m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1); - - // SIFS (used in NAV) - value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10); - rtw_write16(Adapter, REG_SPEC_SIFS, value16); - - // Retry Limit - value16 = _LRL(0x30) | _SRL(0x30); - rtw_write16(Adapter, REG_RL, value16); - -} - -static VOID -_InitRateFallback( - IN PADAPTER Adapter - ) -{ - // Set Data Auto Rate Fallback Retry Count register. - rtw_write32(Adapter, REG_DARFRC, 0x00000000); - rtw_write32(Adapter, REG_DARFRC+4, 0x10080404); - rtw_write32(Adapter, REG_RARFRC, 0x04030201); - rtw_write32(Adapter, REG_RARFRC+4, 0x08070605); - -} - - -static VOID -_InitEDCA( - IN PADAPTER Adapter - ) -{ - // Set Spec SIFS (used in NAV) - rtw_write16(Adapter,REG_SPEC_SIFS, 0x100a); - rtw_write16(Adapter,REG_MAC_SPEC_SIFS, 0x100a); - - // Set SIFS for CCK - rtw_write16(Adapter,REG_SIFS_CTX, 0x100a); - - // Set SIFS for OFDM - rtw_write16(Adapter,REG_SIFS_TRX, 0x100a); - - // TXOP - rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B); - rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F); - rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324); - rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226); -} - - -static VOID -_InitBeaconMaxError( - IN PADAPTER Adapter, - IN BOOLEAN InfraMode - ) -{ - -} - - -#ifdef CONFIG_LED -static void _InitHWLed(PADAPTER Adapter) -{ - struct led_priv *pledpriv = &(Adapter->ledpriv); - - if( pledpriv->LedStrategy != HW_LED) - return; - -// HW led control -// to do .... -//must consider cases of antenna diversity/ commbo card/solo card/mini card - -} -#endif //CONFIG_LED - -static VOID -_InitRDGSetting( - IN PADAPTER Adapter - ) -{ - rtw_write8(Adapter,REG_RD_CTRL,0xFF); - rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200); - rtw_write8(Adapter,REG_RD_RESP_PKT_TH,0x05); -} - -static VOID -_InitRxSetting( - IN PADAPTER Adapter - ) -{ - rtw_write32(Adapter, REG_MACID, 0x87654321); - rtw_write32(Adapter, 0x0700, 0x87654321); -} - -static VOID -_InitRetryFunction( - IN PADAPTER Adapter - ) -{ - u8 value8; - //#if 0 //MAC SPEC - value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL); - value8 |= EN_AMPDU_RTY_NEW; - rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8); - //#endif - // Set ACK timeout - rtw_write8(Adapter, REG_ACKTO, 0x40); -} - -/*----------------------------------------------------------------------------- - * Function: usb_AggSettingTxUpdate() - * - * Overview: Seperate TX/RX parameters update independent for TP detection and - * dynamic TX/RX aggreagtion parameters update. - * - * Input: PADAPTER - * - * Output/Return: NONE - * - * Revised History: - * When Who Remark - * 12/10/2010 MHC Seperate to smaller function. - * - *---------------------------------------------------------------------------*/ -static VOID -usb_AggSettingTxUpdate( - IN PADAPTER Adapter - ) -{ -#ifdef CONFIG_USB_TX_AGGREGATION - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - u32 value32; - - if(Adapter->registrypriv.wifi_spec) - pHalData->UsbTxAggMode = _FALSE; - - if(pHalData->UsbTxAggMode){ - value32 = rtw_read32(Adapter, REG_TDECTRL); - value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT); - value32 |= ((pHalData->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT); - - rtw_write32(Adapter, REG_TDECTRL, value32); - } - -#endif -} // usb_AggSettingTxUpdate - - -/*----------------------------------------------------------------------------- - * Function: usb_AggSettingRxUpdate() - * - * Overview: Seperate TX/RX parameters update independent for TP detection and - * dynamic TX/RX aggreagtion parameters update. - * - * Input: PADAPTER - * - * Output/Return: NONE - * - * Revised History: - * When Who Remark - * 12/10/2010 MHC Seperate to smaller function. - * - *---------------------------------------------------------------------------*/ -static VOID -usb_AggSettingRxUpdate( - IN PADAPTER Adapter - ) -{ -#ifdef CONFIG_USB_RX_AGGREGATION - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - u8 valueDMA; - u8 valueUSB; - - valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL); - valueUSB = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION); - - switch(pHalData->UsbRxAggMode) - { - case USB_RX_AGG_DMA: - valueDMA |= RXDMA_AGG_EN; - valueUSB &= ~USB_AGG_EN; - break; - case USB_RX_AGG_USB: - valueDMA &= ~RXDMA_AGG_EN; - valueUSB |= USB_AGG_EN; - break; - case USB_RX_AGG_MIX: - valueDMA |= RXDMA_AGG_EN; - valueUSB |= USB_AGG_EN; - break; - case USB_RX_AGG_DISABLE: - default: - valueDMA &= ~RXDMA_AGG_EN; - valueUSB &= ~USB_AGG_EN; - break; - } - - rtw_write8(Adapter, REG_TRXDMA_CTRL, valueDMA); - rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB); - - switch(pHalData->UsbRxAggMode) - { - case USB_RX_AGG_DMA: - rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount); - rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, pHalData->UsbRxAggPageTimeout); - break; - case USB_RX_AGG_USB: - rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount); - rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout); - break; - case USB_RX_AGG_MIX: - rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount); - rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, (pHalData->UsbRxAggPageTimeout& 0x1F));//0x280[12:8] - - rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount); - rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout); - - break; - case USB_RX_AGG_DISABLE: - default: - // TODO: - break; - } - - switch(PBP_128) - { - case PBP_128: - pHalData->HwRxPageSize = 128; - break; - case PBP_64: - pHalData->HwRxPageSize = 64; - break; - case PBP_256: - pHalData->HwRxPageSize = 256; - break; - case PBP_512: - pHalData->HwRxPageSize = 512; - break; - case PBP_1024: - pHalData->HwRxPageSize = 1024; - break; - default: - //RT_ASSERT(FALSE, ("RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n")); - break; - } -#endif -} // usb_AggSettingRxUpdate - -static VOID -InitUsbAggregationSetting( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - // Tx aggregation setting - usb_AggSettingTxUpdate(Adapter); - - // Rx aggregation setting - usb_AggSettingRxUpdate(Adapter); - - // 201/12/10 MH Add for USB agg mode dynamic switch. - pHalData->UsbRxHighSpeedMode = _FALSE; -} -VOID -HalRxAggr8188EUsb( - IN PADAPTER Adapter, - IN BOOLEAN Value - ) -{ -#if 0//USB_RX_AGGREGATION_92C - - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - u1Byte valueDMATimeout; - u1Byte valueDMAPageCount; - u1Byte valueUSBTimeout; - u1Byte valueUSBBlockCount; - - // selection to prevent bad TP. - if( IS_WIRELESS_MODE_B(Adapter) || IS_WIRELESS_MODE_G(Adapter) || IS_WIRELESS_MODE_A(Adapter)|| pMgntInfo->bWiFiConfg) - { - // 2010.04.27 hpfan - // Adjust RxAggrTimeout to close to zero disable RxAggr, suggested by designer - // Timeout value is calculated by 34 / (2^n) - valueDMATimeout = 0x0f; - valueDMAPageCount = 0x01; - valueUSBTimeout = 0x0f; - valueUSBBlockCount = 0x01; - rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_PGTO, (pu1Byte)&valueDMATimeout); - rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_PGTH, (pu1Byte)&valueDMAPageCount); - rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTO, (pu1Byte)&valueUSBTimeout); - rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTH, (pu1Byte)&valueUSBBlockCount); - } - else - { - rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTO, (pu1Byte)&pMgntInfo->RegRxAggBlockTimeout); - rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTH, (pu1Byte)&pMgntInfo->RegRxAggBlockCount); - } - -#endif -} - -/*----------------------------------------------------------------------------- - * Function: USB_AggModeSwitch() - * - * Overview: When RX traffic is more than 40M, we need to adjust some parameters to increase - * RX speed by increasing batch indication size. This will decrease TCP ACK speed, we - * need to monitor the influence of FTP/network share. - * For TX mode, we are still ubder investigation. - * - * Input: PADAPTER - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 12/10/2010 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -VOID -USB_AggModeSwitch( - IN PADAPTER Adapter - ) -{ -} // USB_AggModeSwitch - -static VOID -_InitOperationMode( - IN PADAPTER Adapter - ) -{ -} - - - static VOID -_InitBeaconParameters( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - rtw_write16(Adapter, REG_BCN_CTRL, 0x1010); - - // TODO: Remove these magic number - rtw_write16(Adapter, REG_TBTT_PROHIBIT,0x6404);// ms - rtw_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);// 5ms - rtw_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); // 2ms - - // Suggested by designer timchen. Change beacon AIFS to the largest number - // beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 - rtw_write16(Adapter, REG_BCNTCFG, 0x660F); - - pHalData->RegBcnCtrlVal = rtw_read8(Adapter, REG_BCN_CTRL); - pHalData->RegTxPause = rtw_read8(Adapter, REG_TXPAUSE); - pHalData->RegFwHwTxQCtrl = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL+2); - pHalData->RegReg542 = rtw_read8(Adapter, REG_TBTT_PROHIBIT+2); - pHalData->RegCR_1 = rtw_read8(Adapter, REG_CR+1); -} - -static VOID -_InitRFType( - IN PADAPTER Adapter - ) -{ - struct registry_priv *pregpriv = &Adapter->registrypriv; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - BOOLEAN is92CU = IS_92C_SERIAL(pHalData->VersionID); - -#if DISABLE_BB_RF - pHalData->rf_chip = RF_PSEUDO_11N; - return; -#endif - - pHalData->rf_chip = RF_6052; - - if(_FALSE == is92CU){ - pHalData->rf_type = RF_1T1R; - DBG_8192C("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n"); - return; - } - - // TODO: Consider that EEPROM set 92CU to 1T1R later. - // Force to overwrite setting according to chip version. Ignore EEPROM setting. - //pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R; - MSG_8192C("Set RF Chip ID to RF_6052 and RF type to %d.\n", pHalData->rf_type); - -} - - -static VOID -_BeaconFunctionEnable( - IN PADAPTER Adapter, - IN BOOLEAN Enable, - IN BOOLEAN Linked - ) -{ - rtw_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1)); - //SetBcnCtrlReg(Adapter, (BIT4 | BIT3 | BIT1), 0x00); - //RT_TRACE(COMP_BEACON, DBG_LOUD, ("_BeaconFunctionEnable 0x550 0x%x\n", PlatformEFIORead1Byte(Adapter, 0x550))); - - rtw_write8(Adapter, REG_RD_CTRL+1, 0x6F); -} - - -// Set CCK and OFDM Block "ON" -static VOID _BBTurnOnBlock( - IN PADAPTER Adapter - ) -{ -#if (DISABLE_BB_RF) - return; -#endif - - PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1); - PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1); -} - -static VOID _RfPowerSave( - IN PADAPTER Adapter - ) -{ -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - u1Byte eRFPath; - -#if (DISABLE_BB_RF) - return; -#endif - - if(pMgntInfo->RegRfOff == TRUE){ // User disable RF via registry. - RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RegRfOff.\n")); - MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_SW); - // Those action will be discard in MgntActSet_RF_State because off the same state - for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) - PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0); - } - else if(pMgntInfo->RfOffReason > RF_CHANGE_BY_PS){ // H/W or S/W RF OFF before sleep. - RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RfOffReason(%ld).\n", pMgntInfo->RfOffReason)); - MgntActSet_RF_State(Adapter, eRfOff, pMgntInfo->RfOffReason); - } - else{ - pHalData->eRFPowerState = eRfOn; - pMgntInfo->RfOffReason = 0; - if(Adapter->bInSetPower || Adapter->bResetInProgress) - PlatformUsbEnableInPipes(Adapter); - RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): RF is on.\n")); - } -#endif -} - -enum { - Antenna_Lfet = 1, - Antenna_Right = 2, -}; - -static VOID -_InitAntenna_Selection(IN PADAPTER Adapter) -{ - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - if(pHalData->AntDivCfg==0) - return; - DBG_8192C("==> %s ....\n",__FUNCTION__); - - rtw_write32(Adapter, REG_LEDCFG0, rtw_read32(Adapter, REG_LEDCFG0)|BIT23); - PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); - - if(PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A) - pHalData->CurAntenna = Antenna_A; - else - pHalData->CurAntenna = Antenna_B; - DBG_8192C("%s,Cur_ant:(%x)%s\n",__FUNCTION__,pHalData->CurAntenna,(pHalData->CurAntenna == Antenna_A)?"Antenna_A":"Antenna_B"); - - -} - -// -// 2010/08/26 MH Add for selective suspend mode check. -// If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and -// slim card. -// -static VOID -HalDetectSelectiveSuspendMode( - IN PADAPTER Adapter - ) -{ -#if 0 - u8 tmpvalue; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); - - // If support HW radio detect, we need to enable WOL ability, otherwise, we - // can not use FW to notify host the power state switch. - - EFUSE_ShadowRead(Adapter, 1, EEPROM_USB_OPTIONAL1, (u32 *)&tmpvalue); - - DBG_8192C("HalDetectSelectiveSuspendMode(): SS "); - if(tmpvalue & BIT1) - { - DBG_8192C("Enable\n"); - } - else - { - DBG_8192C("Disable\n"); - pdvobjpriv->RegUsbSS = _FALSE; - } - - // 2010/09/01 MH According to Dongle Selective Suspend INF. We can switch SS mode. - if (pdvobjpriv->RegUsbSS && !SUPPORT_HW_RADIO_DETECT(pHalData)) - { - //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - - //if (!pMgntInfo->bRegDongleSS) - //{ - // RT_TRACE(COMP_INIT, DBG_LOUD, ("Dongle disable SS\n")); - pdvobjpriv->RegUsbSS = _FALSE; - //} - } -#endif -} // HalDetectSelectiveSuspendMode -/*----------------------------------------------------------------------------- - * Function: HwSuspendModeEnable92Cu() - * - * Overview: HW suspend mode switch. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 08/23/2010 MHC HW suspend mode switch test.. - *---------------------------------------------------------------------------*/ -static VOID -HwSuspendModeEnable_88eu( - IN PADAPTER pAdapter, - IN u8 Type - ) -{ - //PRT_USB_DEVICE pDevice = GET_RT_USB_DEVICE(pAdapter); - u16 reg = rtw_read16(pAdapter, REG_GPIO_MUXCFG); - - //if (!pDevice->RegUsbSS) - { - return; - } - - // - // 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW - // to enter suspend mode automatically. Otherwise, it will shut down major power - // domain and 8051 will stop. When we try to enter selective suspend mode, we - // need to prevent HW to enter D2 mode aumotmatically. Another way, Host will - // issue a S10 signal to power domain. Then it will cleat SIC setting(from Yngli). - // We need to enable HW suspend mode when enter S3/S4 or disable. We need - // to disable HW suspend mode for IPS/radio_off. - // - //RT_TRACE(COMP_RF, DBG_LOUD, ("HwSuspendModeEnable92Cu = %d\n", Type)); - if (Type == _FALSE) - { - reg |= BIT14; - //RT_TRACE(COMP_RF, DBG_LOUD, ("REG_GPIO_MUXCFG = %x\n", reg)); - rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); - reg |= BIT12; - //RT_TRACE(COMP_RF, DBG_LOUD, ("REG_GPIO_MUXCFG = %x\n", reg)); - rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); - } - else - { - reg &= (~BIT12); - rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); - reg &= (~BIT14); - rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); - } - -} // HwSuspendModeEnable92Cu -rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u8 val8; - rt_rf_power_state rfpowerstate = rf_off; - - if(adapter_to_pwrctl(pAdapter)->bHWPowerdown) - { - val8 = rtw_read8(pAdapter, REG_HSISR); - DBG_8192C("pwrdown, 0x5c(BIT7)=%02x\n", val8); - rfpowerstate = (val8 & BIT7) ? rf_off: rf_on; - } - else // rf on/off - { - rtw_write8( pAdapter, REG_MAC_PINMUX_CFG,rtw_read8(pAdapter, REG_MAC_PINMUX_CFG)&~(BIT3)); - val8 = rtw_read8(pAdapter, REG_GPIO_IO_SEL); - DBG_8192C("GPIO_IN=%02x\n", val8); - rfpowerstate = (val8 & BIT3) ? rf_on : rf_off; - } - return rfpowerstate; -} // HalDetectPwrDownMode - -void _ps_open_RF(_adapter *padapter); - -u32 rtl8188eu_hal_init(PADAPTER Adapter) -{ - u8 value8 = 0; - u16 value16; - u8 txpktbuf_bndy; - u32 status = _SUCCESS; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); - struct registry_priv *pregistrypriv = &Adapter->registrypriv; - - rt_rf_power_state eRfPowerStateToSet; -#ifdef CONFIG_BT_COEXIST - struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); -#endif - - u32 init_start_time = rtw_get_current_time(); - - -#ifdef DBG_HAL_INIT_PROFILING - - enum HAL_INIT_STAGES { - HAL_INIT_STAGES_BEGIN = 0, - HAL_INIT_STAGES_INIT_PW_ON, - HAL_INIT_STAGES_MISC01, - HAL_INIT_STAGES_DOWNLOAD_FW, - HAL_INIT_STAGES_MAC, - HAL_INIT_STAGES_BB, - HAL_INIT_STAGES_RF, - HAL_INIT_STAGES_EFUSE_PATCH, - HAL_INIT_STAGES_INIT_LLTT, - - HAL_INIT_STAGES_MISC02, - HAL_INIT_STAGES_TURN_ON_BLOCK, - HAL_INIT_STAGES_INIT_SECURITY, - HAL_INIT_STAGES_MISC11, - HAL_INIT_STAGES_INIT_HAL_DM, - //HAL_INIT_STAGES_RF_PS, - HAL_INIT_STAGES_IQK, - HAL_INIT_STAGES_PW_TRACK, - HAL_INIT_STAGES_LCK, - //HAL_INIT_STAGES_MISC21, - //HAL_INIT_STAGES_INIT_PABIAS, - #ifdef CONFIG_BT_COEXIST - HAL_INIT_STAGES_BT_COEXIST, - #endif - //HAL_INIT_STAGES_ANTENNA_SEL, - //HAL_INIT_STAGES_MISC31, - HAL_INIT_STAGES_END, - HAL_INIT_STAGES_NUM - }; - - char * hal_init_stages_str[] = { - "HAL_INIT_STAGES_BEGIN", - "HAL_INIT_STAGES_INIT_PW_ON", - "HAL_INIT_STAGES_MISC01", - "HAL_INIT_STAGES_DOWNLOAD_FW", - "HAL_INIT_STAGES_MAC", - "HAL_INIT_STAGES_BB", - "HAL_INIT_STAGES_RF", - "HAL_INIT_STAGES_EFUSE_PATCH", - "HAL_INIT_STAGES_INIT_LLTT", - "HAL_INIT_STAGES_MISC02", - "HAL_INIT_STAGES_TURN_ON_BLOCK", - "HAL_INIT_STAGES_INIT_SECURITY", - "HAL_INIT_STAGES_MISC11", - "HAL_INIT_STAGES_INIT_HAL_DM", - //"HAL_INIT_STAGES_RF_PS", - "HAL_INIT_STAGES_IQK", - "HAL_INIT_STAGES_PW_TRACK", - "HAL_INIT_STAGES_LCK", - //"HAL_INIT_STAGES_MISC21", - #ifdef CONFIG_BT_COEXIST - "HAL_INIT_STAGES_BT_COEXIST", - #endif - //"HAL_INIT_STAGES_ANTENNA_SEL", - //"HAL_INIT_STAGES_MISC31", - "HAL_INIT_STAGES_END", - }; - - int hal_init_profiling_i; - u32 hal_init_stages_timestamp[HAL_INIT_STAGES_NUM]; //used to record the time of each stage's starting point - - for(hal_init_profiling_i=0;hal_init_profiling_iwowlan_wake_reason = rtw_read8(Adapter, REG_WOWLAN_WAKE_REASON); - DBG_8192C("%s wowlan_wake_reason: 0x%02x\n", - __func__, pwrctrlpriv->wowlan_wake_reason); - - if(rtw_read8(Adapter, REG_MCUFWDL)&BIT7){ /*&& - (pwrctrlpriv->wowlan_wake_reason & FWDecisionDisconnect)) {*/ - u8 reg_val=0; - DBG_8192C("+Reset Entry+\n"); - rtw_write8(Adapter, REG_MCUFWDL, 0x00); - _8051Reset88E(Adapter); - //reset BB - reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN); - reg_val &= ~(BIT(0) | BIT(1)); - rtw_write8(Adapter, REG_SYS_FUNC_EN, reg_val); - //reset RF - rtw_write8(Adapter, REG_RF_CTRL, 0); - //reset TRX path - rtw_write16(Adapter, REG_CR, 0); - //reset MAC, Digital Core - reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); - reg_val &= ~(BIT(4) | BIT(7)); - rtw_write8(Adapter, REG_SYS_FUNC_EN+1, reg_val); - reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); - reg_val |= BIT(4) | BIT(7); - rtw_write8(Adapter, REG_SYS_FUNC_EN+1, reg_val); - DBG_8192C("-Reset Entry-\n"); - } -#endif //CONFIG_WOWLAN - - if(pwrctrlpriv->bkeepfwalive) - { - _ps_open_RF(Adapter); - - if(pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized){ -// PHY_IQCalibrate(padapter, _TRUE); - PHY_IQCalibrate_8188E(Adapter,_TRUE); - } - else - { -// PHY_IQCalibrate(padapter, _FALSE); - PHY_IQCalibrate_8188E(Adapter,_FALSE); - pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized = _TRUE; - } - -// dm_CheckTXPowerTracking(padapter); -// PHY_LCCalibrate(padapter); - ODM_TXPowerTrackingCheck(&pHalData->odmpriv ); - PHY_LCCalibrate_8188E(Adapter); - - goto exit; - } - - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON); - status = InitPowerOn_rtl8188eu(Adapter); - if(status == _FAIL){ - RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n")); - goto exit; - } - - // Save target channel - pHalData->CurrentChannel = 6;//default set to 6 - - - if(pwrctrlpriv->reg_rfoff == _TRUE){ - pwrctrlpriv->rf_pwrstate = rf_off; - } - - // 2010/08/09 MH We need to check if we need to turnon or off RF after detecting - // HW GPIO pin. Before PHY_RFConfig8192C. - //HalDetectPwrDownMode(Adapter); - // 2010/08/26 MH If Efuse does not support sective suspend then disable the function. - //HalDetectSelectiveSuspendMode(Adapter); - - if (!pregistrypriv->wifi_spec) { - txpktbuf_bndy = TX_PAGE_BOUNDARY_88E; - } else { - // for WMM - txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E; - } - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01); - _InitQueueReservedPage(Adapter); - _InitQueuePriority(Adapter); - _InitPageBoundary(Adapter); - _InitTransferPageSize(Adapter); - -#ifdef CONFIG_IOL_IOREG_CFG - _InitTxBufferBoundary(Adapter, 0); -#endif - - - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW); -#if (MP_DRIVER == 1) - if (Adapter->registrypriv.mp_mode == 1) - { - _InitRxSetting(Adapter); - } -#endif //MP_DRIVER == 1 - { - #if 0 - Adapter->bFWReady = _FALSE; //because no fw for test chip - pHalData->fw_ractrl = _FALSE; - #else - -#ifdef CONFIG_WOWLAN - status = rtl8188e_FirmwareDownload(Adapter, _FALSE); -#else - status = rtl8188e_FirmwareDownload(Adapter); -#endif //CONFIG_WOWLAN - - if (status != _SUCCESS) { - DBG_871X("%s: Download Firmware failed!!\n", __FUNCTION__); - Adapter->bFWReady = _FALSE; - pHalData->fw_ractrl = _FALSE; - return status; - } else { - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializepadapter8192CSdio(): Download Firmware Success!!\n")); - Adapter->bFWReady = _TRUE; - pHalData->fw_ractrl = _FALSE; - } - #endif - } - - - rtl8188e_InitializeFirmwareVars(Adapter); - - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC); -#if (HAL_MAC_ENABLE == 1) - status = PHY_MACConfig8188E(Adapter); - if(status == _FAIL) - { - DBG_871X(" ### Failed to init MAC ...... \n "); - goto exit; - } -#endif - - // - //d. Initialize BB related configurations. - // -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB); -#if (HAL_BB_ENABLE == 1) - status = PHY_BBConfig8188E(Adapter); - if(status == _FAIL) - { - DBG_871X(" ### Failed to init BB ...... \n "); - goto exit; - } -#endif - - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF); -#if (HAL_RF_ENABLE == 1) - status = PHY_RFConfig8188E(Adapter); - if(status == _FAIL) - { - DBG_871X(" ### Failed to init RF ...... \n "); - goto exit; - } -#endif - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH); -#if defined(CONFIG_IOL_EFUSE_PATCH) - status = rtl8188e_iol_efuse_patch(Adapter); - if(status == _FAIL){ - DBG_871X("%s rtl8188e_iol_efuse_patch failed \n",__FUNCTION__); - goto exit; - } -#endif - - _InitTxBufferBoundary(Adapter, txpktbuf_bndy); - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT); - status = InitLLTTable(Adapter, txpktbuf_bndy); - if(status == _FAIL){ - RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n")); - goto exit; - } - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02); - // Get Rx PHY status in order to report RSSI and others. - _InitDriverInfoSize(Adapter, DRVINFO_SZ); - - _InitInterrupt(Adapter); - hal_init_macaddr(Adapter);//set mac_address - _InitNetworkType(Adapter);//set msr - _InitWMACSetting(Adapter); - _InitAdaptiveCtrl(Adapter); - _InitEDCA(Adapter); - //_InitRateFallback(Adapter);//just follow MP Team ???Georgia - _InitRetryFunction(Adapter); - InitUsbAggregationSetting(Adapter); - _InitOperationMode(Adapter);//todo - _InitBeaconParameters(Adapter); - _InitBeaconMaxError(Adapter, _TRUE); - - // - // Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch - // Hw bug which Hw initials RxFF boundry size to a value which is larger than the real Rx buffer size in 88E. - // - // Enable MACTXEN/MACRXEN block - value16 = rtw_read16(Adapter, REG_CR); - value16 |= (MACTXEN | MACRXEN); - rtw_write8(Adapter, REG_CR, value16); - - - _InitHardwareDropIncorrectBulkOut(Adapter); - - - if(pHalData->bRDGEnable){ - _InitRDGSetting(Adapter); - } - -#if (RATE_ADAPTIVE_SUPPORT==1) - {//Enable TX Report - //Enable Tx Report Timer - value8 = rtw_read8(Adapter, REG_TX_RPT_CTRL); - rtw_write8(Adapter, REG_TX_RPT_CTRL, (value8|BIT1|BIT0)); - //Set MAX RPT MACID - rtw_write8(Adapter, REG_TX_RPT_CTRL+1, 2);//FOR sta mode ,0: bc/mc ,1:AP - //Tx RPT Timer. Unit: 32us - rtw_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0); - } -#endif - -#if 0 - if(pHTInfo->bRDGEnable){ - _InitRDGSetting_8188E(Adapter); - } -#endif - -#ifdef CONFIG_TX_EARLY_MODE - if( pHalData->bEarlyModeEnable) - { - RT_TRACE(_module_hci_hal_init_c_, _drv_info_,("EarlyMode Enabled!!!\n")); - - value8 = rtw_read8(Adapter, REG_EARLY_MODE_CONTROL); -#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 - value8 = value8|0x1f; -#else - value8 = value8|0xf; -#endif - rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, value8); - - rtw_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x80); - - value8 = rtw_read8(Adapter, REG_TCR+1); - value8 = value8|0x40; - rtw_write8(Adapter,REG_TCR+1, value8); - } - else -#endif - { - rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, 0); - } - - rtw_write32(Adapter,REG_MACID_NO_LINK_0,0xFFFFFFFF); - rtw_write32(Adapter,REG_MACID_NO_LINK_1,0xFFFFFFFF); - -#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_TX_MCAST2UNI) - -#ifdef CONFIG_CHECK_AC_LIFETIME - // Enable lifetime check for the four ACs - rtw_write8(Adapter, REG_LIFETIME_EN, 0x0F); -#endif // CONFIG_CHECK_AC_LIFETIME - -#ifdef CONFIG_TX_MCAST2UNI - rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); // unit: 256us. 256ms - rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); // unit: 256us. 256ms -#else // CONFIG_TX_MCAST2UNI - rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x3000); // unit: 256us. 3s - rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x3000); // unit: 256us. 3s -#endif // CONFIG_TX_MCAST2UNI -#endif // CONFIG_CONCURRENT_MODE || CONFIG_TX_MCAST2UNI - - -#ifdef CONFIG_LED - _InitHWLed(Adapter); -#endif //CONFIG_LED - - - // - // Joseph Note: Keep RfRegChnlVal for later use. - // - pHalData->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E)0, RF_CHNLBW, bRFRegOffsetMask); - pHalData->RfRegChnlVal[1] = PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E)1, RF_CHNLBW, bRFRegOffsetMask); - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK); - _BBTurnOnBlock(Adapter); - //NicIFSetMacAddress(padapter, padapter->PermanentAddress); - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY); - invalidate_cam_all(Adapter); - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); - // 2010/12/17 MH We need to set TX power according to EFUSE content at first. - PHY_SetTxPowerLevel8188E(Adapter, pHalData->CurrentChannel); - -// Move by Neo for USB SS to below setp -//_RfPowerSave(Adapter); - - _InitAntenna_Selection(Adapter); - - // - // Disable BAR, suggested by Scott - // 2010.04.09 add by hpfan - // - rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff); - - // HW SEQ CTRL - //set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. - rtw_write8(Adapter,REG_HWSEQ_CTRL, 0xFF); - - if(pregistrypriv->wifi_spec) - rtw_write16(Adapter,REG_FAST_EDCA_CTRL ,0); - - //Nav limit , suggest by scott - rtw_write8(Adapter, 0x652, 0x0); - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); - rtl8188e_InitHalDm(Adapter); - -#if (MP_DRIVER == 1) - if (Adapter->registrypriv.mp_mode == 1) - { - Adapter->mppriv.channel = pHalData->CurrentChannel; - MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel); - } - else -#endif //#if (MP_DRIVER == 1) - { - // - // 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status - // and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not - // call init_adapter. May cause some problem?? - // - // Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed - // in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState - // is the same as eRfOff, we should change it to eRfOn after we config RF parameters. - // Added by tynli. 2010.03.30. - pwrctrlpriv->rf_pwrstate = rf_on; - -#if 0 //to do - RT_CLEAR_PS_LEVEL(pwrctrlpriv, RT_RF_OFF_LEVL_HALT_NIC); -#if 1 //Todo - // 20100326 Joseph: Copy from GPIOChangeRFWorkItemCallBack() function to check HW radio on/off. - // 20100329 Joseph: Revise and integrate the HW/SW radio off code in initialization. - - eRfPowerStateToSet = (rt_rf_power_state) RfOnOffDetect(Adapter); - pwrctrlpriv->rfoff_reason |= eRfPowerStateToSet==rf_on ? RF_CHANGE_BY_INIT : RF_CHANGE_BY_HW; - pwrctrlpriv->rfoff_reason |= (pwrctrlpriv->reg_rfoff) ? RF_CHANGE_BY_SW : 0; - - if(pwrctrlpriv->rfoff_reason&RF_CHANGE_BY_HW) - pwrctrlpriv->b_hw_radio_off = _TRUE; - - DBG_8192C("eRfPowerStateToSet=%d\n", eRfPowerStateToSet); - - if(pwrctrlpriv->reg_rfoff == _TRUE) - { // User disable RF via registry. - DBG_8192C("InitializeAdapter8192CU(): Turn off RF for RegRfOff.\n"); - //MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_SW, _TRUE); - - // Those action will be discard in MgntActSet_RF_State because off the same state - //for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) - //PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0); - } - else if(pwrctrlpriv->rfoff_reason > RF_CHANGE_BY_PS) - { // H/W or S/W RF OFF before sleep. - DBG_8192C(" Turn off RF for RfOffReason(%x) ----------\n", pwrctrlpriv->rfoff_reason); - //pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; - pwrctrlpriv->rf_pwrstate = rf_on; - //MgntActSet_RF_State(Adapter, rf_off, pwrctrlpriv->rfoff_reason, _TRUE); - } - else - { - // Perform GPIO polling to find out current RF state. added by Roger, 2010.04.09. - if(pHalData->BoardType == BOARD_MINICARD /*&& (Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)*/) - { - DBG_8192C("InitializeAdapter8192CU(): RF=%d \n", eRfPowerStateToSet); - if (eRfPowerStateToSet == rf_off) - { - //MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_HW, _TRUE); - pwrctrlpriv->b_hw_radio_off = _TRUE; - } - else - { - pwrctrlpriv->rf_pwrstate = rf_off; - pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; - pwrctrlpriv->b_hw_radio_off = _FALSE; - //MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE); - } - } - else - { - pwrctrlpriv->rf_pwrstate = rf_off; - pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; - //MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE); - } - - pwrctrlpriv->rfoff_reason = 0; - pwrctrlpriv->b_hw_radio_off = _FALSE; - pwrctrlpriv->rf_pwrstate = rf_on; - rtw_led_control(Adapter, LED_CTL_POWER_ON); - - } - - // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. - // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. - if(pHalData->pwrdown && eRfPowerStateToSet == rf_off) - { - // Enable register area 0x0-0xc. - rtw_write8(Adapter, REG_RSV_CTRL, 0x0); - - // - // We should configure HW PDn source for WiFi ONLY, and then - // our HW will be set in power-down mode if PDn source from all functions are configured. - // 2010.10.06. - // - //if(IS_HARDWARE_TYPE_8723AU(Adapter)) - //{ - // u1bTmp = rtw_read8(Adapter, REG_MULTI_FUNC_CTRL); - // rtw_write8(Adapter, REG_MULTI_FUNC_CTRL, (u1bTmp|WL_HWPDN_EN)); - //} - //else - //{ - rtw_write16(Adapter, REG_APS_FSMCO, 0x8812); - //} - } - //DrvIFIndicateCurrentPhyStatus(Adapter); // 2010/08/17 MH Disable to prevent BSOD. -#endif -#endif - - - // enable Tx report. - rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+1, 0x0F); - - // Suggested by SD1 pisa. Added by tynli. 2011.10.21. - rtw_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x01);//Pretx_en, for WEP/TKIP SEC - - //tynli_test_tx_report. - rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0); - //RT_TRACE(COMP_INIT, DBG_TRACE, ("InitializeAdapter8188EUsb() <====\n")); - - //enable tx DMA to drop the redundate data of packet - rtw_write16(Adapter,REG_TXDMA_OFFSET_CHK, (rtw_read16(Adapter,REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN)); - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); - // 2010/08/26 MH Merge from 8192CE. - if(pwrctrlpriv->rf_pwrstate == rf_on) - { - if(pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized){ - PHY_IQCalibrate_8188E(Adapter,_TRUE); - } - else - { - PHY_IQCalibrate_8188E(Adapter,_FALSE); - pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized = _TRUE; - } - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); - - ODM_TXPowerTrackingCheck(&pHalData->odmpriv ); - - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); - PHY_LCCalibrate_8188E(Adapter); - } -} - -//HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); -// _InitPABias(Adapter); - rtw_write8(Adapter, REG_USB_HRPWM, 0); - -#ifdef CONFIG_XMIT_ACK - //ack for xmit mgmt frames. - rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12)); -#endif //CONFIG_XMIT_ACK - -exit: -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); - - DBG_871X("%s in %dms\n", __FUNCTION__, rtw_get_passing_time_ms(init_start_time)); - - #ifdef DBG_HAL_INIT_PROFILING - hal_init_stages_timestamp[HAL_INIT_STAGES_END]=rtw_get_current_time(); - - for(hal_init_profiling_i=0;hal_init_profiling_iMgntInfo); - u8 val8; - u16 val16; - u32 val32; - u8 bMacPwrCtrlOn=_FALSE; - - rtw_hal_get_hwreg(Adapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - if(bMacPwrCtrlOn == _FALSE) - return ; - - RT_TRACE(COMP_INIT, DBG_LOUD, ("%s\n",__FUNCTION__)); - - //Stop Tx Report Timer. 0x4EC[Bit1]=b'0 - val8 = rtw_read8(Adapter, REG_TX_RPT_CTRL); - rtw_write8(Adapter, REG_TX_RPT_CTRL, val8&(~BIT1)); - - // stop rx - rtw_write8(Adapter, REG_CR, 0x0); - - // Run LPS WL RFOFF flow - HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_LPS_ENTER_FLOW); - - - // 2. 0x1F[7:0] = 0 // turn off RF - //rtw_write8(Adapter, REG_RF_CTRL, 0x00); - - val8 = rtw_read8(Adapter, REG_MCUFWDL); - if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) //8051 RAM code - { - //rtl8723a_FirmwareSelfReset(padapter); - //_8051Reset88E(padapter); - - // Reset MCU 0x2[10]=0. - val8 = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); - val8 &= ~BIT(2); // 0x2[10], FEN_CPUEN - rtw_write8(Adapter, REG_SYS_FUNC_EN+1, val8); - } - - //val8 = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); - //val8 &= ~BIT(2); // 0x2[10], FEN_CPUEN - //rtw_write8(Adapter, REG_SYS_FUNC_EN+1, val8); - - // MCUFWDL 0x80[1:0]=0 - // reset MCU ready status - rtw_write8(Adapter, REG_MCUFWDL, 0); - - //YJ,add,111212 - //Disable 32k - val8 = rtw_read8(Adapter, REG_32K_CTRL); - rtw_write8(Adapter, REG_32K_CTRL, val8&(~BIT0)); - - // Card disable power action flow - HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_DISABLE_FLOW); - - // Reset MCU IO Wrapper - val8 = rtw_read8(Adapter, REG_RSV_CTRL+1); - rtw_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT3))); - val8 = rtw_read8(Adapter, REG_RSV_CTRL+1); - rtw_write8(Adapter, REG_RSV_CTRL+1, val8|BIT3); - -#if 0 - // 7. RSV_CTRL 0x1C[7:0] = 0x0E // lock ISO/CLK/Power control register - rtw_write8(Adapter, REG_RSV_CTRL, 0x0e); -#endif -#if 1 - //YJ,test add, 111207. For Power Consumption. - val8 = rtw_read8(Adapter, GPIO_IN); - rtw_write8(Adapter, GPIO_OUT, val8); - rtw_write8(Adapter, GPIO_IO_SEL, 0xFF);//Reg0x46 - - val8 = rtw_read8(Adapter, REG_GPIO_IO_SEL); - //rtw_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4)|val8); - rtw_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4)); - val8 = rtw_read8(Adapter, REG_GPIO_IO_SEL+1); - rtw_write8(Adapter, REG_GPIO_IO_SEL+1, val8|0x0F);//Reg0x43 - rtw_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);//set LNA ,TRSW,EX_PA Pin to output mode -#endif - bMacPwrCtrlOn = _FALSE; - rtw_hal_set_hwreg(Adapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - Adapter->bFWReady = _FALSE; -} -static void rtl8188eu_hw_power_down(_adapter *padapter) -{ - // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. - // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. - - // Enable register area 0x0-0xc. - rtw_write8(padapter,REG_RSV_CTRL, 0x0); - rtw_write16(padapter, REG_APS_FSMCO, 0x8812); -} - -u32 rtl8188eu_hal_deinit(PADAPTER Adapter) - { - struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - DBG_8192C("==> %s \n",__FUNCTION__); - -#ifdef CONFIG_SUPPORT_USB_INT - rtw_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E); - rtw_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E); -#endif - - #ifdef SUPPORT_HW_RFOFF_DETECTED - DBG_8192C("bkeepfwalive(%x)\n", pwrctl->bkeepfwalive); - if(pwrctl->bkeepfwalive) - { - _ps_close_RF(Adapter); - if((pwrctl->bHWPwrPindetect) && (pwrctl->bHWPowerdown)) - rtl8188eu_hw_power_down(Adapter); - } - else -#endif - { - if(Adapter->hw_init_completed == _TRUE){ - hal_poweroff_rtl8188eu(Adapter); - - if((pwrctl->bHWPwrPindetect ) && (pwrctl->bHWPowerdown)) - rtl8188eu_hw_power_down(Adapter); - - } - } - return _SUCCESS; - } - - -unsigned int rtl8188eu_inirp_init(PADAPTER Adapter) -{ - u8 i; - struct recv_buf *precvbuf; - uint status; - struct dvobj_priv *pdev= adapter_to_dvobj(Adapter); - struct intf_hdl * pintfhdl=&Adapter->iopriv.intf; - struct recv_priv *precvpriv = &(Adapter->recvpriv); - u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); -#ifdef CONFIG_USB_INTERRUPT_IN_PIPE - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr); -#endif - -_func_enter_; - - _read_port = pintfhdl->io_ops._read_port; - - status = _SUCCESS; - - RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("===> usb_inirp_init \n")); - - precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR; - - //issue Rx irp to receive data - precvbuf = (struct recv_buf *)precvpriv->precv_buf; - for(i=0; iff_hwaddr, 0, (unsigned char *)precvbuf) == _FALSE ) - { - RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_port error \n")); - status = _FAIL; - goto exit; - } - - precvbuf++; - precvpriv->free_recv_buf_queue_cnt--; - } - -#ifdef CONFIG_USB_INTERRUPT_IN_PIPE - if(pHalData->RtIntInPipe != 0x05) - { - status = _FAIL; - DBG_871X("%s =>Warning !! Have not USB Int-IN pipe, pHalData->RtIntInPipe(%d)!!!\n",__FUNCTION__,pHalData->RtIntInPipe); - goto exit; - } - _read_interrupt = pintfhdl->io_ops._read_interrupt; - if(_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == _FALSE ) - { - RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_interrupt error \n")); - status = _FAIL; - } -#endif - -exit: - - RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("<=== usb_inirp_init \n")); - -_func_exit_; - - return status; - -} - -unsigned int rtl8188eu_inirp_deinit(PADAPTER Adapter) -{ - RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n ===> usb_rx_deinit \n")); - - rtw_read_port_cancel(Adapter); - - RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n <=== usb_rx_deinit \n")); - - return _SUCCESS; -} - - - -//------------------------------------------------------------------------- -// -// EEPROM Power index mapping -// -//------------------------------------------------------------------------- -#if 0 - static VOID -_ReadPowerValueFromPROM( - IN PTxPowerInfo pwrInfo, - IN u8* PROMContent, - IN BOOLEAN AutoLoadFail - ) -{ - u32 rfPath, eeAddr, group; - - _rtw_memset(pwrInfo, 0, sizeof(TxPowerInfo)); - - if(AutoLoadFail){ - for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){ - for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){ - pwrInfo->CCKIndex[rfPath][group] = EEPROM_Default_TxPowerLevel; - pwrInfo->HT40_1SIndex[rfPath][group] = EEPROM_Default_TxPowerLevel; - pwrInfo->HT40_2SIndexDiff[rfPath][group]= EEPROM_Default_HT40_2SDiff; - pwrInfo->HT20IndexDiff[rfPath][group] = EEPROM_Default_HT20_Diff; - pwrInfo->OFDMIndexDiff[rfPath][group] = EEPROM_Default_LegacyHTTxPowerDiff; - pwrInfo->HT40MaxOffset[rfPath][group] = EEPROM_Default_HT40_PwrMaxOffset; - pwrInfo->HT20MaxOffset[rfPath][group] = EEPROM_Default_HT20_PwrMaxOffset; - } - } - - pwrInfo->TSSI_A = EEPROM_Default_TSSI; - pwrInfo->TSSI_B = EEPROM_Default_TSSI; - - return; - } - - for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){ - for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){ - eeAddr = EEPROM_CCK_TX_PWR_INX + (rfPath * 3) + group; - pwrInfo->CCKIndex[rfPath][group] = PROMContent[eeAddr]; - - eeAddr = EEPROM_HT40_1S_TX_PWR_INX + (rfPath * 3) + group; - pwrInfo->HT40_1SIndex[rfPath][group] = PROMContent[eeAddr]; - } - } - - for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){ - for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){ - pwrInfo->HT40_2SIndexDiff[rfPath][group] = - (PROMContent[EEPROM_HT40_2S_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF; - -#if 1 - pwrInfo->HT20IndexDiff[rfPath][group] = - (PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF; - if(pwrInfo->HT20IndexDiff[rfPath][group] & BIT3) //4bit sign number to 8 bit sign number - pwrInfo->HT20IndexDiff[rfPath][group] |= 0xF0; -#else - pwrInfo->HT20IndexDiff[rfPath][group] = - (PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF; -#endif - - pwrInfo->OFDMIndexDiff[rfPath][group] = - (PROMContent[EEPROM_OFDM_TX_PWR_INX_DIFF+ group] >> (rfPath * 4)) & 0xF; - - pwrInfo->HT40MaxOffset[rfPath][group] = - (PROMContent[EEPROM_HT40_MAX_PWR_OFFSET+ group] >> (rfPath * 4)) & 0xF; - - pwrInfo->HT20MaxOffset[rfPath][group] = - (PROMContent[EEPROM_HT20_MAX_PWR_OFFSET+ group] >> (rfPath * 4)) & 0xF; - } - } - - pwrInfo->TSSI_A = PROMContent[EEPROM_TSSI_A]; - pwrInfo->TSSI_B = PROMContent[EEPROM_TSSI_B]; - -} - - -static u32 -_GetChannelGroup( - IN u32 channel - ) -{ - //RT_ASSERT((channel < 14), ("Channel %d no is supported!\n")); - - if(channel < 3){ // Channel 1~3 - return 0; - } - else if(channel < 9){ // Channel 4~9 - return 1; - } - - return 2; // Channel 10~14 -} - - -static VOID -ReadTxPowerInfo( - IN PADAPTER Adapter, - IN u8* PROMContent, - IN BOOLEAN AutoLoadFail - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - TxPowerInfo pwrInfo; - u32 rfPath, ch, group; - u8 pwr, diff; - - _ReadPowerValueFromPROM(&pwrInfo, PROMContent, AutoLoadFail); - - if(!AutoLoadFail) - pHalData->bTXPowerDataReadFromEEPORM = _TRUE; - - for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){ - for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ - group = _GetChannelGroup(ch); - - pHalData->TxPwrLevelCck[rfPath][ch] = pwrInfo.CCKIndex[rfPath][group]; - pHalData->TxPwrLevelHT40_1S[rfPath][ch] = pwrInfo.HT40_1SIndex[rfPath][group]; - - pHalData->TxPwrHt20Diff[rfPath][ch] = pwrInfo.HT20IndexDiff[rfPath][group]; - pHalData->TxPwrLegacyHtDiff[rfPath][ch] = pwrInfo.OFDMIndexDiff[rfPath][group]; - pHalData->PwrGroupHT20[rfPath][ch] = pwrInfo.HT20MaxOffset[rfPath][group]; - pHalData->PwrGroupHT40[rfPath][ch] = pwrInfo.HT40MaxOffset[rfPath][group]; - - pwr = pwrInfo.HT40_1SIndex[rfPath][group]; - diff = pwrInfo.HT40_2SIndexDiff[rfPath][group]; - - pHalData->TxPwrLevelHT40_2S[rfPath][ch] = (pwr > diff) ? (pwr - diff) : 0; - } - } - -#if 0 //DBG - - for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){ - for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ - RTPRINT(FINIT, INIT_TxPower, - ("RF(%d)-Ch(%d) [CCK / HT40_1S / HT40_2S] = [0x%x / 0x%x / 0x%x]\n", - rfPath, ch, pHalData->TxPwrLevelCck[rfPath][ch], - pHalData->TxPwrLevelHT40_1S[rfPath][ch], - pHalData->TxPwrLevelHT40_2S[rfPath][ch])); - - } - } - - for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ - RTPRINT(FINIT, INIT_TxPower, ("RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrHt20Diff[RF_PATH_A][ch])); - } - - for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ - RTPRINT(FINIT, INIT_TxPower, ("RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF_PATH_A][ch])); - } - - for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ - RTPRINT(FINIT, INIT_TxPower, ("RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrHt20Diff[RF_PATH_B][ch])); - } - - for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ - RTPRINT(FINIT, INIT_TxPower, ("RF-B Legacy to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF_PATH_B][ch])); - } - -#endif - // 2010/10/19 MH Add Regulator recognize for CU. - if(!AutoLoadFail) - { - pHalData->EEPROMRegulatory = (PROMContent[RF_OPTION1]&0x7); //bit0~2 - } - else - { - pHalData->EEPROMRegulatory = 0; - } - DBG_8192C("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory); - -} -#endif - -//------------------------------------------------------------------- -// -// EEPROM/EFUSE Content Parsing -// -//------------------------------------------------------------------- -static void -_ReadIDs( - IN PADAPTER Adapter, - IN u8* PROMContent, - IN BOOLEAN AutoloadFail - ) -{ -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - if(_FALSE == AutoloadFail){ - // VID, PID - pHalData->EEPROMVID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_VID]); - pHalData->EEPROMPID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_PID]); - - // Customer ID, 0x00 and 0xff are reserved for Realtek. - pHalData->EEPROMCustomerID = *(u8 *)&PROMContent[EEPROM_CUSTOMER_ID]; - pHalData->EEPROMSubCustomerID = *(u8 *)&PROMContent[EEPROM_SUBCUSTOMER_ID]; - - } - else{ - pHalData->EEPROMVID = EEPROM_Default_VID; - pHalData->EEPROMPID = EEPROM_Default_PID; - - // Customer ID, 0x00 and 0xff are reserved for Realtek. - pHalData->EEPROMCustomerID = EEPROM_Default_CustomerID; - pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; - - } - - // For customized behavior. - if((pHalData->EEPROMVID == 0x103C) && (pHalData->EEPROMVID == 0x1629))// HP Lite-On for RTL8188CUS Slim Combo. - pHalData->CustomerID = RT_CID_819x_HP; - - // Decide CustomerID according to VID/DID or EEPROM - switch(pHalData->EEPROMCustomerID) - { - case EEPROM_CID_DEFAULT: - if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308)) - pHalData->CustomerID = RT_CID_DLINK; - else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309)) - pHalData->CustomerID = RT_CID_DLINK; - else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a)) - pHalData->CustomerID = RT_CID_DLINK; - break; - case EEPROM_CID_WHQL: -/* - Adapter->bInHctTest = TRUE; - - pMgntInfo->bSupportTurboMode = FALSE; - pMgntInfo->bAutoTurboBy8186 = FALSE; - - pMgntInfo->PowerSaveControl.bInactivePs = FALSE; - pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; - pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; - - pMgntInfo->keepAliveLevel = 0; - - Adapter->bUnloadDriverwhenS3S4 = FALSE; -*/ - break; - default: - pHalData->CustomerID = RT_CID_DEFAULT; - break; - - } - - MSG_8192C("EEPROMVID = 0x%04x\n", pHalData->EEPROMVID); - MSG_8192C("EEPROMPID = 0x%04x\n", pHalData->EEPROMPID); - MSG_8192C("EEPROMCustomerID : 0x%02x\n", pHalData->EEPROMCustomerID); - MSG_8192C("EEPROMSubCustomerID: 0x%02x\n", pHalData->EEPROMSubCustomerID); - - MSG_8192C("RT_CustomerID: 0x%02x\n", pHalData->CustomerID); -#endif -} - - -static VOID -_ReadMACAddress( - IN PADAPTER Adapter, - IN u8* PROMContent, - IN BOOLEAN AutoloadFail - ) -{ -#if 0 - - EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); - - if(_FALSE == AutoloadFail){ - //Read Permanent MAC address and set value to hardware - _rtw_memcpy(pEEPROM->mac_addr, &PROMContent[EEPROM_MAC_ADDR], ETH_ALEN); - } - else{ - //Random assigh MAC address - u8 sMacAddr[MAC_ADDR_LEN] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00}; - //sMacAddr[5] = (u8)GetRandomNumber(1, 254); - _rtw_memcpy(pEEPROM->mac_addr, sMacAddr, ETH_ALEN); - } - DBG_8192C("%s MAC Address from EFUSE = "MAC_FMT"\n",__FUNCTION__, MAC_ARG(pEEPROM->mac_addr)); - //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress); - //RT_PRINT_ADDR(COMP_INIT|COMP_EFUSE, DBG_LOUD, "MAC Addr: %s", Adapter->PermanentAddress); -#endif -} - -static VOID -_ReadBoardType( - IN PADAPTER Adapter, - IN u8* PROMContent, - IN BOOLEAN AutoloadFail - ) -{ - -} - - -static VOID -_ReadLEDSetting( - IN PADAPTER Adapter, - IN u8* PROMContent, - IN BOOLEAN AutoloadFail - ) -{ - struct led_priv *pledpriv = &(Adapter->ledpriv); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -#ifdef CONFIG_SW_LED - pledpriv->bRegUseLed = _TRUE; - - switch(pHalData->CustomerID) - { - default: - pledpriv->LedStrategy = SW_LED_MODE1; - break; - } - pHalData->bLedOpenDrain = _TRUE;// Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. -#else // HW LED - pledpriv->LedStrategy = HW_LED; -#endif //CONFIG_SW_LED -} - -static VOID -_ReadThermalMeter( - IN PADAPTER Adapter, - IN u8* PROMContent, - IN BOOLEAN AutoloadFail - ) -{ -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - u8 tempval; - - // - // ThermalMeter from EEPROM - // - if(!AutoloadFail) - tempval = PROMContent[EEPROM_THERMAL_METER]; - else - tempval = EEPROM_Default_ThermalMeter; - - pHalData->EEPROMThermalMeter = (tempval&0x1f); //[4:0] - - if(pHalData->EEPROMThermalMeter == 0x1f || AutoloadFail) - pdmpriv->bAPKThermalMeterIgnore = _TRUE; - -#if 0 - if(pHalData->EEPROMThermalMeter < 0x06 || pHalData->EEPROMThermalMeter > 0x1c) - pHalData->EEPROMThermalMeter = 0x12; -#endif - - pdmpriv->ThermalMeter[0] = pHalData->EEPROMThermalMeter; - - //RTPRINT(FINIT, INIT_TxPower, ("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter)); -#endif -} - -static VOID -_ReadRFSetting( - IN PADAPTER Adapter, - IN u8* PROMContent, - IN BOOLEAN AutoloadFail - ) -{ -} - -static void -_ReadPROMVersion( - IN PADAPTER Adapter, - IN u8* PROMContent, - IN BOOLEAN AutoloadFail - ) -{ -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - if(AutoloadFail){ - pHalData->EEPROMVersion = EEPROM_Default_Version; - } - else{ - pHalData->EEPROMVersion = *(u8 *)&PROMContent[EEPROM_VERSION]; - } -#endif -} - -static VOID -readAntennaDiversity( - IN PADAPTER pAdapter, - IN u8 *hwinfo, - IN BOOLEAN AutoLoadFail - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct registry_priv *registry_par = &pAdapter->registrypriv; - - pHalData->AntDivCfg = registry_par->antdiv_cfg ; // 0:OFF , 1:ON, -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct registry_priv *registry_par = &pAdapter->registrypriv; - - if(!AutoLoadFail) - { - // Antenna Diversity setting. - if(registry_par->antdiv_cfg == 2) // 2: From Efuse - pHalData->AntDivCfg = (hwinfo[EEPROM_RF_OPT1]&0x18)>>3; - else - pHalData->AntDivCfg = registry_par->antdiv_cfg ; // 0:OFF , 1:ON, - - DBG_8192C("### AntDivCfg(%x)\n",pHalData->AntDivCfg); - - //if(pHalData->EEPROMBluetoothCoexist!=0 && pHalData->EEPROMBluetoothAntNum==Ant_x1) - // pHalData->AntDivCfg = 0; - } - else - { - pHalData->AntDivCfg = 0; - } -#endif -} - -static VOID -hal_InitPGData( - IN PADAPTER pAdapter, - IN OUT u8 *PROMContent - ) -{ -#if 0 - EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u32 i; - u16 value16; - - if(_FALSE == pEEPROM->bautoload_fail_flag) - { // autoload OK. - if (_TRUE == pEEPROM->EepromOrEfuse) - { - // Read all Content from EEPROM or EFUSE. - for(i = 0; i < HWSET_MAX_SIZE_88E; i += 2) - { - //value16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1))); - //*((u16 *)(&PROMContent[i])) = value16; - } - } - else - { - // Read EFUSE real map to shadow. - EFUSE_ShadowMapUpdate(pAdapter, EFUSE_WIFI, _FALSE); - _rtw_memcpy((void*)PROMContent, (void*)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE_88E); - } - } - else - {//autoload fail - //RT_TRACE(COMP_INIT, DBG_LOUD, ("AutoLoad Fail reported from CR9346!!\n")); - pEEPROM->bautoload_fail_flag = _TRUE; - //update to default value 0xFF - if (_FALSE == pEEPROM->EepromOrEfuse) - EFUSE_ShadowMapUpdate(pAdapter, EFUSE_WIFI, _FALSE); - } -#endif -} -static void -Hal_EfuseParsePIDVID_8188EU( - IN PADAPTER pAdapter, - IN u8* hwinfo, - IN BOOLEAN AutoLoadFail - ) -{ - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - if( !AutoLoadFail ) - { - // VID, PID - pHalData->EEPROMVID = EF2Byte( *(u16 *)&hwinfo[EEPROM_VID_88EU] ); - pHalData->EEPROMPID = EF2Byte( *(u16 *)&hwinfo[EEPROM_PID_88EU] ); - - // Customer ID, 0x00 and 0xff are reserved for Realtek. - pHalData->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CUSTOMERID_88E]; - pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; - - } - else - { - pHalData->EEPROMVID = EEPROM_Default_VID; - pHalData->EEPROMPID = EEPROM_Default_PID; - - // Customer ID, 0x00 and 0xff are reserved for Realtek. - pHalData->EEPROMCustomerID = EEPROM_Default_CustomerID; - pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; - - } - - DBG_871X("VID = 0x%04X, PID = 0x%04X\n", pHalData->EEPROMVID, pHalData->EEPROMPID); - DBG_871X("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", pHalData->EEPROMCustomerID, pHalData->EEPROMSubCustomerID); -} - -static void -Hal_EfuseParseMACAddr_8188EU( - IN PADAPTER padapter, - IN u8* hwinfo, - IN BOOLEAN AutoLoadFail - ) -{ - u16 i, usValue; - u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02}; - EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); - - if (AutoLoadFail) - { -// sMacAddr[5] = (u1Byte)GetRandomNumber(1, 254); - for (i=0; i<6; i++) - pEEPROM->mac_addr[i] = sMacAddr[i]; - } - else - { - //Read Permanent MAC address - _rtw_memcpy(pEEPROM->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN); - - } -// NicIFSetMacAddress(pAdapter, pAdapter->PermanentAddress); - - RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, - ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", - pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], - pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], - pEEPROM->mac_addr[4], pEEPROM->mac_addr[5])); -} - - -static void -Hal_CustomizeByCustomerID_8188EU( - IN PADAPTER padapter - ) -{ -#if 0 - PMGNT_INFO pMgntInfo = &(padapter->MgntInfo); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - - // For customized behavior. - if((pHalData->EEPROMVID == 0x103C) && (pHalData->EEPROMVID == 0x1629))// HP Lite-On for RTL8188CUS Slim Combo. - pMgntInfo->CustomerID = RT_CID_819x_HP; - - // Decide CustomerID according to VID/DID or EEPROM - switch(pHalData->EEPROMCustomerID) - { - case EEPROM_CID_DEFAULT: - if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308)) - pMgntInfo->CustomerID = RT_CID_DLINK; - else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309)) - pMgntInfo->CustomerID = RT_CID_DLINK; - else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a)) - pMgntInfo->CustomerID = RT_CID_DLINK; - break; - case EEPROM_CID_WHQL: - padapter->bInHctTest = TRUE; - - pMgntInfo->bSupportTurboMode = FALSE; - pMgntInfo->bAutoTurboBy8186 = FALSE; - - pMgntInfo->PowerSaveControl.bInactivePs = FALSE; - pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; - pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; - pMgntInfo->PowerSaveControl.bLeisurePsModeBackup =FALSE; - pMgntInfo->keepAliveLevel = 0; - - padapter->bUnloadDriverwhenS3S4 = FALSE; - break; - default: - pMgntInfo->CustomerID = RT_CID_DEFAULT; - break; - - } - - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Mgnt Customer ID: 0x%02x\n", pMgntInfo->CustomerID)); - - hal_CustomizedBehavior_8723U(padapter); -#endif -} - -// Read HW power down mode selection -static void _ReadPSSetting(IN PADAPTER Adapter,IN u8*PROMContent,IN u8 AutoloadFail) -{ -#if 0 - struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter); - - if(AutoloadFail){ - pwrctl->bHWPowerdown = _FALSE; - pwrctl->bSupportRemoteWakeup = _FALSE; - } - else { - //if(SUPPORT_HW_RADIO_DETECT(Adapter)) - pwrctl->bHWPwrPindetect = Adapter->registrypriv.hwpwrp_detect; - //else - //pwrctl->bHWPwrPindetect = _FALSE;//dongle not support new - - - //hw power down mode selection , 0:rf-off / 1:power down - - if(Adapter->registrypriv.hwpdn_mode==2) - pwrctl->bHWPowerdown = (PROMContent[EEPROM_RF_OPT3] & BIT4); - else - pwrctl->bHWPowerdown = Adapter->registrypriv.hwpdn_mode; - - // decide hw if support remote wakeup function - // if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume - pwrctl->bSupportRemoteWakeup = (PROMContent[EEPROM_TEST_USB_OPT] & BIT1)?_TRUE :_FALSE; - - //if(SUPPORT_HW_RADIO_DETECT(Adapter)) - //Adapter->registrypriv.usbss_enable = pwrctl->bSupportRemoteWakeup ; - - DBG_8192C("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) ,bSupportRemoteWakeup(%x)\n",__FUNCTION__, - pwrctl->bHWPwrPindetect,pwrctl->bHWPowerdown ,pwrctl->bSupportRemoteWakeup); - - DBG_8192C("### PS params=> power_mgnt(%x),usbss_enable(%x) ###\n",Adapter->registrypriv.power_mgnt,Adapter->registrypriv.usbss_enable); - - } -#endif -} - -#ifdef CONFIG_EFUSE_CONFIG_FILE -static u32 Hal_readPGDataFromConfigFile( - PADAPTER padapter) -{ - u32 i; - struct file *fp; - mm_segment_t fs; - u8 temp[3]; - loff_t pos = 0; - EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); - u8 *PROMContent = pEEPROM->efuse_eeprom_data; - - - temp[2] = 0; // add end of string '\0' - - fp = filp_open("/system/etc/wifi/wifi_efuse.map", O_RDWR, 0644); - if (IS_ERR(fp)) { - pEEPROM->bloadfile_fail_flag = _TRUE; - DBG_871X("Error, Efuse configure file doesn't exist.\n"); - return _FAIL; - } - - fs = get_fs(); - set_fs(KERNEL_DS); - - DBG_871X("Efuse configure file:\n"); - for (i=0; ibloadfile_fail_flag = _FALSE; - - return _SUCCESS; -} - -static void -Hal_ReadMACAddrFromFile_8188EU( - PADAPTER padapter - ) -{ - u32 i; - struct file *fp; - mm_segment_t fs; - u8 source_addr[18]; - loff_t pos = 0; - u32 curtime = rtw_get_current_time(); - EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); - u8 *head, *end; - - u8 null_mac_addr[ETH_ALEN] = {0, 0, 0,0, 0, 0}; - u8 multi_mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; - - _rtw_memset(source_addr, 0, 18); - _rtw_memset(pEEPROM->mac_addr, 0, ETH_ALEN); - - fp = filp_open("/data/wifimac.txt", O_RDWR, 0644); - if (IS_ERR(fp)) { - pEEPROM->bloadmac_fail_flag = _TRUE; - DBG_871X("Error, wifi mac address file doesn't exist.\n"); - } else { - fs = get_fs(); - set_fs(KERNEL_DS); - - DBG_871X("wifi mac address:\n"); - vfs_read(fp, source_addr, 18, &pos); - source_addr[17] = ':'; - - head = end = source_addr; - for (i=0; imac_addr[i] = simple_strtoul(head, NULL, 16 ); - - if (end) { - end++; - head = end; - } - DBG_871X("%02x \n", pEEPROM->mac_addr[i]); - } - DBG_871X("\n"); - set_fs(fs); - pEEPROM->bloadmac_fail_flag = _FALSE; - filp_close(fp, NULL); - } - - if ( (_rtw_memcmp(pEEPROM->mac_addr, null_mac_addr, ETH_ALEN)) || - (_rtw_memcmp(pEEPROM->mac_addr, multi_mac_addr, ETH_ALEN)) ) { - pEEPROM->mac_addr[0] = 0x00; - pEEPROM->mac_addr[1] = 0xe0; - pEEPROM->mac_addr[2] = 0x4c; - pEEPROM->mac_addr[3] = (u8)(curtime & 0xff) ; - pEEPROM->mac_addr[4] = (u8)((curtime>>8) & 0xff) ; - pEEPROM->mac_addr[5] = (u8)((curtime>>16) & 0xff) ; - } - - DBG_871X("Hal_ReadMACAddrFromFile_8188ES: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", - pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], - pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], - pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]); -} -#endif //CONFIG_EFUSE_CONFIG_FILE - -static VOID -readAdapterInfo_8188EU( - IN PADAPTER padapter - ) -{ -#if 1 - EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); - - /* parse the eeprom/efuse content */ - Hal_EfuseParseIDCode88E(padapter, pEEPROM->efuse_eeprom_data); - Hal_EfuseParsePIDVID_8188EU(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); -#ifdef CONFIG_EFUSE_CONFIG_FILE - Hal_ReadMACAddrFromFile_8188EU(padapter); -#else //CONFIG_EFUSE_CONFIG_FILE - Hal_EfuseParseMACAddr_8188EU(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); -#endif //CONFIG_EFUSE_CONFIG_FILE - - Hal_ReadPowerSavingMode88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - Hal_ReadTxPowerInfo88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - Hal_EfuseParseEEPROMVer88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - rtl8188e_EfuseParseChnlPlan(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - Hal_EfuseParseXtal_8188E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - Hal_EfuseParseCustomerID88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - Hal_ReadAntennaDiversity88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - Hal_EfuseParseBoardType88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - Hal_ReadThermalMeter_88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - - // - // The following part initialize some vars by PG info. - // - Hal_InitChannelPlan(padapter); -#if defined(CONFIG_WOWLAN) && defined(CONFIG_SDIO_HCI) - Hal_DetectWoWMode(padapter); -#endif //CONFIG_WOWLAN && CONFIG_SDIO_HCI - Hal_CustomizeByCustomerID_8188EU(padapter); - - _ReadLEDSetting(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - -#else - -#ifdef CONFIG_INTEL_PROXIM - /* for intel proximity */ - if (pHalData->rf_type== RF_1T1R) { - Adapter->proximity.proxim_support = _TRUE; - } else if (pHalData->rf_type== RF_2T2R) { - if ((pHalData->EEPROMPID == 0x8186) && - (pHalData->EEPROMVID== 0x0bda)) - Adapter->proximity.proxim_support = _TRUE; - } else { - Adapter->proximity.proxim_support = _FALSE; - } -#endif //CONFIG_INTEL_PROXIM -#endif -} - -static void _ReadPROMContent( - IN PADAPTER Adapter - ) -{ - EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); - u8 eeValue; - - /* check system boot selection */ - eeValue = rtw_read8(Adapter, REG_9346CR); - pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; - pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE; - - - DBG_8192C("Boot from %s, Autoload %s !\n", (pEEPROM->EepromOrEfuse ? "EEPROM" : "EFUSE"), - (pEEPROM->bautoload_fail_flag ? "Fail" : "OK") ); - - //pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; -#ifdef CONFIG_EFUSE_CONFIG_FILE - Hal_readPGDataFromConfigFile(Adapter); -#else //CONFIG_EFUSE_CONFIG_FILE - Hal_InitPGData88E(Adapter); -#endif //CONFIG_EFUSE_CONFIG_FILE - readAdapterInfo_8188EU(Adapter); -} - - - -static VOID -_ReadRFType( - IN PADAPTER Adapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - -#if DISABLE_BB_RF - pHalData->rf_chip = RF_PSEUDO_11N; -#else - pHalData->rf_chip = RF_6052; -#endif -} - -static int _ReadAdapterInfo8188EU(PADAPTER Adapter) -{ - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u32 start=rtw_get_current_time(); - - MSG_8192C("====> %s\n", __FUNCTION__); - - //Efuse_InitSomeVar(Adapter); - - //if(IS_HARDWARE_TYPE_8723A(Adapter)) - // _EfuseCellSel(Adapter); - - _ReadRFType(Adapter);//rf_chip -> _InitRFType() - _ReadPROMContent(Adapter); - - //MSG_8192C("%s()(done), rf_chip=0x%x, rf_type=0x%x\n", __FUNCTION__, pHalData->rf_chip, pHalData->rf_type); - - MSG_8192C("<==== %s in %d ms\n", __FUNCTION__, rtw_get_passing_time_ms(start)); - - return _SUCCESS; -} - - -static void ReadAdapterInfo8188EU(PADAPTER Adapter) -{ - // Read EEPROM size before call any EEPROM function - Adapter->EepromAddressSize = GetEEPROMSize8188E(Adapter); - - _ReadAdapterInfo8188EU(Adapter); -} - - -#define GPIO_DEBUG_PORT_NUM 0 -static void rtl8192cu_trigger_gpio_0(_adapter *padapter) -{ -#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ - u32 gpioctrl; - DBG_8192C("==> trigger_gpio_0...\n"); - rtw_write16_async(padapter,REG_GPIO_PIN_CTRL,0); - rtw_write8_async(padapter,REG_GPIO_PIN_CTRL+2,0xFF); - gpioctrl = (BIT(GPIO_DEBUG_PORT_NUM)<<24 )|(BIT(GPIO_DEBUG_PORT_NUM)<<16); - rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl); - gpioctrl |= (BIT(GPIO_DEBUG_PORT_NUM)<<8); - rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl); - DBG_8192C("<=== trigger_gpio_0...\n"); -#endif -} - -static void ResumeTxBeacon(_adapter *padapter) -{ - HAL_DATA_TYPE* pHalData = GET_HAL_DATA(padapter); - - // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value - // which should be read from register to a global variable. - - rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) | BIT6); - pHalData->RegFwHwTxQCtrl |= BIT6; - rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0xff); - pHalData->RegReg542 |= BIT0; - rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542); -} -void UpdateInterruptMask8188EU(PADAPTER padapter,u8 bHIMR0 ,u32 AddMSR, u32 RemoveMSR) -{ - HAL_DATA_TYPE *pHalData; - - u32 *himr; - pHalData = GET_HAL_DATA(padapter); - - if(bHIMR0) - himr = &(pHalData->IntrMask[0]); - else - himr = &(pHalData->IntrMask[1]); - - if (AddMSR) - *himr |= AddMSR; - - if (RemoveMSR) - *himr &= (~RemoveMSR); - - if(bHIMR0) - rtw_write32(padapter, REG_HIMR_88E, *himr); - else - rtw_write32(padapter, REG_HIMRE_88E, *himr); - -} - -static void StopTxBeacon(_adapter *padapter) -{ - HAL_DATA_TYPE* pHalData = GET_HAL_DATA(padapter); - - // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value - // which should be read from register to a global variable. - - rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) & (~BIT6)); - pHalData->RegFwHwTxQCtrl &= (~BIT6); - rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0x64); - pHalData->RegReg542 &= ~(BIT0); - rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542); - - //todo: CheckFwRsvdPageContent(Adapter); // 2010.06.23. Added by tynli. - -} - - -static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8* val) -{ - u8 val8; - u8 mode = *((u8 *)val); - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - -#ifdef CONFIG_CONCURRENT_MODE - if(Adapter->iface_type == IFACE_PORT1) - { - // disable Port1 TSF update - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); - - // set net_type - val8 = rtw_read8(Adapter, MSR)&0x03; - val8 |= (mode<<2); - rtw_write8(Adapter, MSR, val8); - - DBG_871X("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode); - - if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) - { - if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) - { - #ifdef CONFIG_INTERRUPT_BASED_TXBCN - - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - rtw_write8(Adapter, REG_DRVERLYINT, 0x05);//restore early int time to 5ms - UpdateInterruptMask8188EU(Adapter,_TRUE, 0, IMR_BCNDMAINT0_88E); - #endif // CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - UpdateInterruptMask8188EU(Adapter,_TRUE ,0, (IMR_TBDER_88E|IMR_TBDOK_88E)); - #endif// CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - - #endif //CONFIG_INTERRUPT_BASED_TXBCN - - - StopTxBeacon(Adapter); - } - - rtw_write8(Adapter,REG_BCN_CTRL_1, 0x11);//disable atim wnd and disable beacon function - //rtw_write8(Adapter,REG_BCN_CTRL_1, 0x18); - } - else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) - { - ResumeTxBeacon(Adapter); - rtw_write8(Adapter,REG_BCN_CTRL_1, 0x1a); - //BIT4 - If set 0, hw will clr bcnq when tx becon ok/fail or port 1 - rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); - } - else if(mode == _HW_STATE_AP_) - { -#ifdef CONFIG_INTERRUPT_BASED_TXBCN - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - UpdateInterruptMask8188EU(Adapter,_TRUE ,IMR_BCNDMAINT0_88E, 0); - #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - UpdateInterruptMask8188EU(Adapter,_TRUE ,(IMR_TBDER_88E|IMR_TBDOK_88E), 0); - #endif//CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - -#endif //CONFIG_INTERRUPT_BASED_TXBCN - - ResumeTxBeacon(Adapter); - - rtw_write8(Adapter, REG_BCN_CTRL_1, 0x12); - - //Set RCR - //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 - //rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0 - rtw_write32(Adapter, REG_RCR, 0x7000208e);//CBSSID_DATA must set to 0,reject ICV_ERR packet - //enable to rx data frame - rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); - //enable to rx ps-poll - rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400); - - //Beacon Control related register for first time - rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms - - //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); - rtw_write8(Adapter, REG_ATIMWND_1, 0x0a); // 10ms for port1 - rtw_write16(Adapter, REG_BCNTCFG, 0x00); - rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); - rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms) - - //reset TSF2 - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); - - - //BIT4 - If set 0, hw will clr bcnq when tx becon ok/fail or port 1 - rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); - //enable BCN1 Function for if2 - //don't enable update TSF1 for if2 (due to TSF update when beacon/probe rsp are received) - rtw_write8(Adapter, REG_BCN_CTRL_1, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | EN_TXBCN_RPT|BIT(1))); - -#ifdef CONFIG_CONCURRENT_MODE - if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE)) - rtw_write8(Adapter, REG_BCN_CTRL, - rtw_read8(Adapter, REG_BCN_CTRL) & ~EN_BCN_FUNCTION); -#endif - //BCN1 TSF will sync to BCN0 TSF with offset(0x518) if if1_sta linked - //rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(5)); - //rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(3)); - - //dis BCN0 ATIM WND if if1 is station - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(0)); - -#ifdef CONFIG_TSF_RESET_OFFLOAD - // Reset TSF for STA+AP concurrent mode - if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) { - if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE) - DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n", - __FUNCTION__, __LINE__); - } -#endif // CONFIG_TSF_RESET_OFFLOAD - } - } - else -#endif //CONFIG_CONCURRENT_MODE - { - // disable Port0 TSF update - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); - - // set net_type - val8 = rtw_read8(Adapter, MSR)&0x0c; - val8 |= mode; - rtw_write8(Adapter, MSR, val8); - - DBG_871X("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode); - - if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) - { -#ifdef CONFIG_CONCURRENT_MODE - if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) -#endif //CONFIG_CONCURRENT_MODE - { - #ifdef CONFIG_INTERRUPT_BASED_TXBCN - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - rtw_write8(Adapter, REG_DRVERLYINT, 0x05);//restore early int time to 5ms - UpdateInterruptMask8188EU(Adapter,_TRUE, 0, IMR_BCNDMAINT0_88E); - #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - UpdateInterruptMask8188EU(Adapter,_TRUE ,0, (IMR_TBDER_88E|IMR_TBDOK_88E)); - #endif //CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - - #endif //CONFIG_INTERRUPT_BASED_TXBCN - StopTxBeacon(Adapter); - } - - rtw_write8(Adapter,REG_BCN_CTRL, 0x19);//disable atim wnd - //rtw_write8(Adapter,REG_BCN_CTRL, 0x18); - } - else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) - { - ResumeTxBeacon(Adapter); - rtw_write8(Adapter,REG_BCN_CTRL, 0x1a); - //BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 - rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); - } - else if(mode == _HW_STATE_AP_) - { - -#ifdef CONFIG_INTERRUPT_BASED_TXBCN - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - UpdateInterruptMask8188EU(Adapter,_TRUE ,IMR_BCNDMAINT0_88E, 0); - #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - UpdateInterruptMask8188EU(Adapter,_TRUE ,(IMR_TBDER_88E|IMR_TBDOK_88E), 0); - #endif//CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - -#endif //CONFIG_INTERRUPT_BASED_TXBCN - - - ResumeTxBeacon(Adapter); - - rtw_write8(Adapter, REG_BCN_CTRL, 0x12); - - //Set RCR - //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 - //rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0 - rtw_write32(Adapter, REG_RCR, 0x7000208e);//CBSSID_DATA must set to 0,reject ICV_ERR packet - //enable to rx data frame - rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); - //enable to rx ps-poll - rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400); - - //Beacon Control related register for first time - rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms - - //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); - rtw_write8(Adapter, REG_ATIMWND, 0x0a); // 10ms - rtw_write16(Adapter, REG_BCNTCFG, 0x00); - rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); - rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms) - - //reset TSF - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); - - //BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 - rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); - - //enable BCN0 Function for if1 - //don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) - #if defined(CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR) - rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | EN_TXBCN_RPT|BIT(1))); - #else - rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION |BIT(1))); - #endif - -#ifdef CONFIG_CONCURRENT_MODE - if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE)) - rtw_write8(Adapter, REG_BCN_CTRL_1, - rtw_read8(Adapter, REG_BCN_CTRL_1) & ~EN_BCN_FUNCTION); -#endif - - //dis BCN1 ATIM WND if if2 is station - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(0)); -#ifdef CONFIG_TSF_RESET_OFFLOAD - // Reset TSF for STA+AP concurrent mode - if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) { - if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE) - DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n", - __FUNCTION__, __LINE__); - } -#endif // CONFIG_TSF_RESET_OFFLOAD - } - } - -} - -static void hw_var_set_macaddr(PADAPTER Adapter, u8 variable, u8* val) -{ - u8 idx = 0; - u32 reg_macid; - -#ifdef CONFIG_CONCURRENT_MODE - if(Adapter->iface_type == IFACE_PORT1) - { - reg_macid = REG_MACID1; - } - else -#endif - { - reg_macid = REG_MACID; - } - - for(idx = 0 ; idx < 6; idx++) - { - rtw_write8(Adapter, (reg_macid+idx), val[idx]); - } - -} - -static void hw_var_set_bssid(PADAPTER Adapter, u8 variable, u8* val) -{ - u8 idx = 0; - u32 reg_bssid; - -#ifdef CONFIG_CONCURRENT_MODE - if(Adapter->iface_type == IFACE_PORT1) - { - reg_bssid = REG_BSSID1; - } - else -#endif - { - reg_bssid = REG_BSSID; - } - - for(idx = 0 ; idx < 6; idx++) - { - rtw_write8(Adapter, (reg_bssid+idx), val[idx]); - } - -} - -static void hw_var_set_bcn_func(PADAPTER Adapter, u8 variable, u8* val) -{ - u32 bcn_ctrl_reg; - -#ifdef CONFIG_CONCURRENT_MODE - if(Adapter->iface_type == IFACE_PORT1) - { - bcn_ctrl_reg = REG_BCN_CTRL_1; - } - else -#endif - { - bcn_ctrl_reg = REG_BCN_CTRL; - } - - if(*((u8 *)val)) - { - rtw_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT)); - } - else - { - rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT))); - } - - -} - -static void hw_var_set_correct_tsf(PADAPTER Adapter, u8 variable, u8* val) -{ -#ifdef CONFIG_CONCURRENT_MODE - u64 tsf; - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; - - //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us - tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us - - if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) - { - //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) - //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); - StopTxBeacon(Adapter); - } - - if(Adapter->iface_type == IFACE_PORT1) - { - //disable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); - - rtw_write32(Adapter, REG_TSFTR1, tsf); - rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32); - - - //enable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3)); - - // Update buddy port's TSF if it is SoftAP for beacon TX issue! - if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE - && check_buddy_fwstate(Adapter, WIFI_AP_STATE) - ) { - //disable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); - - rtw_write32(Adapter, REG_TSFTR, tsf); - rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); - - //enable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); -#ifdef CONFIG_TSF_RESET_OFFLOAD - // Update buddy port's TSF(TBTT) if it is SoftAP for beacon TX issue! - if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE) - DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n", - __FUNCTION__, __LINE__); - -#endif // CONFIG_TSF_RESET_OFFLOAD - } - - - } - else - { - //disable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); - - rtw_write32(Adapter, REG_TSFTR, tsf); - rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); - - //enable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); - - // Update buddy port's TSF if it is SoftAP for beacon TX issue! - if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE - && check_buddy_fwstate(Adapter, WIFI_AP_STATE) - ) { - //disable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); - - rtw_write32(Adapter, REG_TSFTR1, tsf); - rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32); - - //enable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3)); -#ifdef CONFIG_TSF_RESET_OFFLOAD - // Update buddy port's TSF if it is SoftAP for beacon TX issue! - if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE) - DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n", - __FUNCTION__, __LINE__); -#endif // CONFIG_TSF_RESET_OFFLOAD - } - - } - - - if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) - { - //pHalData->RegTxPause &= (~STOP_BCNQ); - //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6)))); - ResumeTxBeacon(Adapter); - } -#endif -} - -static void hw_var_set_mlme_disconnect(PADAPTER Adapter, u8 variable, u8* val) -{ -#ifdef CONFIG_CONCURRENT_MODE - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; - - - if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_)) - rtw_write16(Adapter, REG_RXFLTMAP2, 0x00); - - - if(Adapter->iface_type == IFACE_PORT1) - { - //reset TSF1 - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); - - //disable update TSF1 - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); - - // disable Port1's beacon function - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); - } - else - { - //reset TSF - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); - - //disable update TSF - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); - } -#endif -} - -static void hw_var_set_mlme_sitesurvey(PADAPTER Adapter, u8 variable, u8* val) -{ -#ifdef CONFIG_CONCURRENT_MODE - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - if(*((u8 *)val))//under sitesurvey - { - //config RCR to receive different BSSID & not to receive data frame - u32 v = rtw_read32(Adapter, REG_RCR); - v &= ~(RCR_CBSSID_BCN); - rtw_write32(Adapter, REG_RCR, v); - - //disable update TSF - if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) - { - if(Adapter->iface_type == IFACE_PORT1) - { - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); - } - else - { - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); - } - } - - if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && - check_buddy_fwstate(Adapter, _FW_LINKED)) - { - StopTxBeacon(Adapter); - } - } - else//sitesurvey done - { - //enable to rx data frame - //write32(Adapter, REG_RCR, read32(padapter, REG_RCR)|RCR_ADF); - rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); - - //enable update TSF - if(Adapter->iface_type == IFACE_PORT1) - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4))); - else - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); - - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); - - if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && - check_buddy_fwstate(Adapter, _FW_LINKED)) - { - ResumeTxBeacon(Adapter); - } - } -#endif -} - -static void hw_var_set_mlme_join(PADAPTER Adapter, u8 variable, u8* val) -{ -#ifdef CONFIG_CONCURRENT_MODE - u8 RetryLimit = 0x30; - u8 type = *((u8 *)val); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - - if(type == 0) // prepare to join - { - if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && - check_buddy_fwstate(Adapter, _FW_LINKED)) - { - StopTxBeacon(Adapter); - } - - //enable to rx data frame.Accept all data frame - //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); - rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); - - if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); - else - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); - - if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) - { - RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; - } - else // Ad-hoc Mode - { - RetryLimit = 0x7; - } - } - else if(type == 1) //joinbss_event call back when join res < 0 - { - if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_)) - rtw_write16(Adapter, REG_RXFLTMAP2,0x00); - - if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && - check_buddy_fwstate(Adapter, _FW_LINKED)) - { - ResumeTxBeacon(Adapter); - - //reset TSF 1/2 after ResumeTxBeacon - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); - - } - } - else if(type == 2) //sta add event call back - { - - //enable update TSF - if(Adapter->iface_type == IFACE_PORT1) - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4))); - else - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); - - - if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) - { - //fixed beacon issue for 8191su........... - rtw_write8(Adapter,0x542 ,0x02); - RetryLimit = 0x7; - } - - - if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && - check_buddy_fwstate(Adapter, _FW_LINKED)) - { - ResumeTxBeacon(Adapter); - - //reset TSF 1/2 after ResumeTxBeacon - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); - } - - } - - rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); - -#endif -} - -void SetHwReg8188EU(PADAPTER Adapter, u8 variable, u8* val) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DM_ODM_T *podmpriv = &pHalData->odmpriv; -_func_enter_; - - switch(variable) - { - case HW_VAR_MEDIA_STATUS: - { - u8 val8; - - val8 = rtw_read8(Adapter, MSR)&0x0c; - val8 |= *((u8 *)val); - rtw_write8(Adapter, MSR, val8); - } - break; - case HW_VAR_MEDIA_STATUS1: - { - u8 val8; - - val8 = rtw_read8(Adapter, MSR)&0x03; - val8 |= *((u8 *)val) <<2; - rtw_write8(Adapter, MSR, val8); - } - break; - case HW_VAR_SET_OPMODE: - hw_var_set_opmode(Adapter, variable, val); - break; - case HW_VAR_MAC_ADDR: - hw_var_set_macaddr(Adapter, variable, val); - break; - case HW_VAR_BSSID: - hw_var_set_bssid(Adapter, variable, val); - break; - case HW_VAR_BASIC_RATE: - { - u16 BrateCfg = 0; - u8 RateIndex = 0; - - // 2007.01.16, by Emily - // Select RRSR (in Legacy-OFDM and CCK) - // For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. - // We do not use other rates. - HalSetBrateCfg( Adapter, val, &BrateCfg ); - DBG_8192C("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg); - - //2011.03.30 add by Luke Lee - //CCK 2M ACK should be disabled for some BCM and Atheros AP IOT - //because CCK 2M has poor TXEVM - //CCK 5.5M & 11M ACK should be enabled for better performance - - pHalData->BasicRateSet = BrateCfg = (BrateCfg |0xd) & 0x15d; - - BrateCfg |= 0x01; // default enable 1M ACK rate - // Set RRSR rate table. - rtw_write8(Adapter, REG_RRSR, BrateCfg&0xff); - rtw_write8(Adapter, REG_RRSR+1, (BrateCfg>>8)&0xff); - rtw_write8(Adapter, REG_RRSR+2, rtw_read8(Adapter, REG_RRSR+2)&0xf0); - - // Set RTS initial rate - while(BrateCfg > 0x1) - { - BrateCfg = (BrateCfg>> 1); - RateIndex++; - } - // Ziv - Check - rtw_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex); - } - break; - case HW_VAR_TXPAUSE: - rtw_write8(Adapter, REG_TXPAUSE, *((u8 *)val)); - break; - case HW_VAR_BCN_FUNC: - hw_var_set_bcn_func(Adapter, variable, val); - break; - case HW_VAR_CORRECT_TSF: -#ifdef CONFIG_CONCURRENT_MODE - hw_var_set_correct_tsf(Adapter, variable, val); -#else - { - u64 tsf; - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us - tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us - - if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) - { - //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) - //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); - StopTxBeacon(Adapter); - } - - //disable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); - - rtw_write32(Adapter, REG_TSFTR, tsf); - rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); - - //enable related TSF function - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); - - - if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) - { - //pHalData->RegTxPause &= (~STOP_BCNQ); - //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6)))); - ResumeTxBeacon(Adapter); - } - } -#endif - break; - case HW_VAR_CHECK_BSSID: - if(*((u8 *)val)) - { - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); - } - else - { - u32 val32; - - val32 = rtw_read32(Adapter, REG_RCR); - - val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN); - - rtw_write32(Adapter, REG_RCR, val32); - } - break; - case HW_VAR_MLME_DISCONNECT: -#ifdef CONFIG_CONCURRENT_MODE - hw_var_set_mlme_disconnect(Adapter, variable, val); -#else - { - //Set RCR to not to receive data frame when NO LINK state - //rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR) & ~RCR_ADF); - //reject all data frames - rtw_write16(Adapter, REG_RXFLTMAP2,0x00); - - //reset TSF - rtw_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); - - //disable update TSF - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); - } -#endif - break; - case HW_VAR_MLME_SITESURVEY: -#ifdef CONFIG_CONCURRENT_MODE - hw_var_set_mlme_sitesurvey(Adapter, variable, val); -#else - if(*((u8 *)val))//under sitesurvey - { - //config RCR to receive different BSSID & not to receive data frame - u32 v = rtw_read32(Adapter, REG_RCR); - v &= ~(RCR_CBSSID_BCN); - rtw_write32(Adapter, REG_RCR, v); - //reject all data frame - rtw_write16(Adapter, REG_RXFLTMAP2,0x00); - - //disable update TSF - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); - } - else//sitesurvey done - { - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - if ((is_client_associated_to_ap(Adapter) == _TRUE) || - ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ) - { - //enable to rx data frame - //rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); - rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); - - //enable update TSF - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); - } - else if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) - { - //rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_ADF); - rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); - - //enable update TSF - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); - } - - if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); - else - { - if(Adapter->in_cta_test) - { - u32 v = rtw_read32(Adapter, REG_RCR); - v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF - rtw_write32(Adapter, REG_RCR, v); - } - else - { - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); - } - } - } -#endif - break; - case HW_VAR_MLME_JOIN: -#ifdef CONFIG_CONCURRENT_MODE - hw_var_set_mlme_join(Adapter, variable, val); -#else - { - u8 RetryLimit = 0x30; - u8 type = *((u8 *)val); - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - - if(type == 0) // prepare to join - { - //enable to rx data frame.Accept all data frame - //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); - rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); - - if(Adapter->in_cta_test) - { - u32 v = rtw_read32(Adapter, REG_RCR); - v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF - rtw_write32(Adapter, REG_RCR, v); - } - else - { - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); - } - - if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) - { - RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; - } - else // Ad-hoc Mode - { - RetryLimit = 0x7; - } - } - else if(type == 1) //joinbss_event call back when join res < 0 - { - rtw_write16(Adapter, REG_RXFLTMAP2,0x00); - } - else if(type == 2) //sta add event call back - { - //enable update TSF - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); - - if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) - { - RetryLimit = 0x7; - } - } - - rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); - } -#endif - break; - case HW_VAR_ON_RCR_AM: - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_AM); - DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(Adapter, REG_RCR)); - break; - case HW_VAR_OFF_RCR_AM: - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)& (~RCR_AM)); - DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(Adapter, REG_RCR)); - break; - case HW_VAR_BEACON_INTERVAL: - rtw_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val)); -#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - { - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - u16 bcn_interval = *((u16 *)val); - if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE){ - DBG_8192C("%s==> bcn_interval:%d, eraly_int:%d \n",__FUNCTION__,bcn_interval,bcn_interval>>1); - rtw_write8(Adapter, REG_DRVERLYINT, bcn_interval>>1);// 50ms for sdio - } - } -#endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - - break; - case HW_VAR_SLOT_TIME: - { - u8 u1bAIFS, aSifsTime; - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - rtw_write8(Adapter, REG_SLOT, val[0]); - - if(pmlmeinfo->WMM_enable == 0) - { - if( pmlmeext->cur_wireless_mode == WIRELESS_11B) - aSifsTime = 10; - else - aSifsTime = 16; - - u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime); - - // Temporary removed, 2008.06.20. - rtw_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS); - rtw_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS); - rtw_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS); - rtw_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS); - } - } - break; - case HW_VAR_RESP_SIFS: - { -#if 0 - // SIFS for OFDM Data ACK - rtw_write8(Adapter, REG_SIFS_CTX+1, val[0]); - // SIFS for OFDM consecutive tx like CTS data! - rtw_write8(Adapter, REG_SIFS_TRX+1, val[1]); - - rtw_write8(Adapter,REG_SPEC_SIFS+1, val[0]); - rtw_write8(Adapter,REG_MAC_SPEC_SIFS+1, val[0]); - - // 20100719 Joseph: Revise SIFS setting due to Hardware register definition change. - rtw_write8(Adapter, REG_R2T_SIFS+1, val[0]); - rtw_write8(Adapter, REG_T2T_SIFS+1, val[0]); -#else - - //SIFS_Timer = 0x0a0a0808; - //RESP_SIFS for CCK - rtw_write8(Adapter, REG_R2T_SIFS, val[0]); // SIFS_T2T_CCK (0x08) - rtw_write8(Adapter, REG_R2T_SIFS+1, val[1]); //SIFS_R2T_CCK(0x08) - //RESP_SIFS for OFDM - rtw_write8(Adapter, REG_T2T_SIFS, val[2]); //SIFS_T2T_OFDM (0x0a) - rtw_write8(Adapter, REG_T2T_SIFS+1, val[3]); //SIFS_R2T_OFDM(0x0a) -#endif - } - break; - case HW_VAR_ACK_PREAMBLE: - { - u8 regTmp; - u8 bShortPreamble = *( (PBOOLEAN)val ); - // Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) - regTmp = (pHalData->nCur40MhzPrimeSC)<<5; - //regTmp = 0; - if(bShortPreamble) - regTmp |= 0x80; - - rtw_write8(Adapter, REG_RRSR+2, regTmp); - } - break; - case HW_VAR_SEC_CFG: -#ifdef CONFIG_CONCURRENT_MODE - rtw_write8(Adapter, REG_SECCFG, 0x0c|BIT(5));// enable tx enc and rx dec engine, and no key search for MC/BC -#else - rtw_write8(Adapter, REG_SECCFG, *((u8 *)val)); -#endif - break; - case HW_VAR_DM_FLAG: - podmpriv->SupportAbility = *((u8 *)val); - //DBG_871X("HW_VAR_DM_FLAG ==> SupportAbility:0x%08x \n",podmpriv->SupportAbility ); - break; - case HW_VAR_DM_FUNC_OP: - if(val[0]) - {// save dm flag - podmpriv->BK_SupportAbility = podmpriv->SupportAbility; - } - else - {// restore dm flag - podmpriv->SupportAbility = podmpriv->BK_SupportAbility; - } - //DBG_871X("HW_VAR_DM_FUNC_OP ==> %s SupportAbility:0x%08x \n", - // (val[0]==1)?"Save":"Restore", - // podmpriv->SupportAbility - // ); - break; - case HW_VAR_DM_FUNC_SET: - if(*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE){ - pdmpriv->DMFlag = pdmpriv->InitDMFlag; - podmpriv->SupportAbility = pdmpriv->InitODMFlag; - } - else{ - podmpriv->SupportAbility |= *((u32 *)val); - } - //DBG_871X("HW_VAR_DM_FUNC_SET ==> SupportAbility:0x%08x \n",podmpriv->SupportAbility ); - break; - case HW_VAR_DM_FUNC_CLR: - podmpriv->SupportAbility &= *((u32 *)val); - break; - - case HW_VAR_CAM_EMPTY_ENTRY: - { - u8 ucIndex = *((u8 *)val); - u8 i; - u32 ulCommand=0; - u32 ulContent=0; - u32 ulEncAlgo=CAM_AES; - - for(i=0;iAcParam_BE = ((u32 *)(val))[0]; - rtw_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]); - break; - case HW_VAR_AC_PARAM_BK: - rtw_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]); - break; - case HW_VAR_ACM_CTRL: - { - u8 acm_ctrl = *((u8 *)val); - u8 AcmCtrl = rtw_read8( Adapter, REG_ACMHWCTRL); - - if(acm_ctrl > 1) - AcmCtrl = AcmCtrl | 0x1; - - if(acm_ctrl & BIT(3)) - AcmCtrl |= AcmHw_VoqEn; - else - AcmCtrl &= (~AcmHw_VoqEn); - - if(acm_ctrl & BIT(2)) - AcmCtrl |= AcmHw_ViqEn; - else - AcmCtrl &= (~AcmHw_ViqEn); - - if(acm_ctrl & BIT(1)) - AcmCtrl |= AcmHw_BeqEn; - else - AcmCtrl &= (~AcmHw_BeqEn); - - DBG_871X("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl ); - rtw_write8(Adapter, REG_ACMHWCTRL, AcmCtrl ); - } - break; - case HW_VAR_AMPDU_MIN_SPACE: - { - u8 MinSpacingToSet; - u8 SecMinSpace; - - MinSpacingToSet = *((u8 *)val); - if(MinSpacingToSet <= 7) - { - switch(Adapter->securitypriv.dot11PrivacyAlgrthm) - { - case _NO_PRIVACY_: - case _AES_: - SecMinSpace = 0; - break; - - case _WEP40_: - case _WEP104_: - case _TKIP_: - case _TKIP_WTMIC_: - SecMinSpace = 6; - break; - default: - SecMinSpace = 7; - break; - } - - if(MinSpacingToSet < SecMinSpace){ - MinSpacingToSet = SecMinSpace; - } - - //RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", Adapter->MgntInfo.MinSpaceCfg)); - rtw_write8(Adapter, REG_AMPDU_MIN_SPACE, (rtw_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet); - } - } - break; - case HW_VAR_AMPDU_FACTOR: - { - u8 RegToSet_Normal[4]={0x41,0xa8,0x72, 0xb9}; - u8 RegToSet_BT[4]={0x31,0x74,0x42, 0x97}; - u8 FactorToSet; - u8 *pRegToSet; - u8 index = 0; - -#ifdef CONFIG_BT_COEXIST - if( (pHalData->bt_coexist.BT_Coexist) && - (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) ) - pRegToSet = RegToSet_BT; // 0x97427431; - else -#endif - pRegToSet = RegToSet_Normal; // 0xb972a841; - - FactorToSet = *((u8 *)val); - if(FactorToSet <= 3) - { - FactorToSet = (1<<(FactorToSet + 2)); - if(FactorToSet>0xf) - FactorToSet = 0xf; - - for(index=0; index<4; index++) - { - if((pRegToSet[index] & 0xf0) > (FactorToSet<<4)) - pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4); - - if((pRegToSet[index] & 0x0f) > FactorToSet) - pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet); - - rtw_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]); - } - - //RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_FACTOR: %#x\n", FactorToSet)); - } - } - break; - case HW_VAR_RXDMA_AGG_PG_TH: - #ifdef CONFIG_USB_RX_AGGREGATION - { - u8 threshold = *((u8 *)val); - if( threshold == 0) - { - threshold = pHalData->UsbRxAggPageCount; - } - rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold); - } - #endif - break; - case HW_VAR_SET_RPWM: -#ifdef CONFIG_LPS_LCLK - { - u8 ps_state = *((u8 *)val); - //rpwm value only use BIT0(clock bit) ,BIT6(Ack bit), and BIT7(Toggle bit) for 88e. - //BIT0 value - 1: 32k, 0:40MHz. - //BIT6 value - 1: report cpwm value after success set, 0:do not report. - //BIT7 value - Toggle bit change. - //modify by Thomas. 2012/4/2. - ps_state = ps_state & 0xC1; - //DBG_871X("##### Change RPWM value to = %x for switch clk #####\n",ps_state); - rtw_write8(Adapter, REG_USB_HRPWM, ps_state); - } -#endif - break; - case HW_VAR_H2C_FW_PWRMODE: - { - u8 psmode = (*(u8 *)val); - - // Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power - // saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. - if( (psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(pHalData->VersionID))) - { - ODM_RF_Saving(podmpriv, _TRUE); - } - rtl8188e_set_FwPwrMode_cmd(Adapter, psmode); - } - break; - case HW_VAR_H2C_FW_JOINBSSRPT: - { - u8 mstatus = (*(u8 *)val); - rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus); - } - break; -#ifdef CONFIG_P2P_PS - case HW_VAR_H2C_FW_P2P_PS_OFFLOAD: - { - u8 p2p_ps_state = (*(u8 *)val); - rtl8188e_set_p2p_ps_offload_cmd(Adapter, p2p_ps_state); - } - break; -#endif //CONFIG_P2P_PS -#ifdef CONFIG_TDLS - case HW_VAR_TDLS_WRCR: - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)&(~RCR_CBSSID_DATA )); - break; - case HW_VAR_TDLS_INIT_CH_SEN: - { - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)&(~ RCR_CBSSID_DATA )&(~RCR_CBSSID_BCN )); - rtw_write16(Adapter, REG_RXFLTMAP2,0xffff); - - //disable update TSF - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); - } - break; - case HW_VAR_TDLS_DONE_CH_SEN: - { - //enable update TSF - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~ BIT(4))); - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|(RCR_CBSSID_BCN )); - } - break; - case HW_VAR_TDLS_RS_RCR: - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|(RCR_CBSSID_DATA)); - break; -#endif //CONFIG_TDLS - case HW_VAR_INITIAL_GAIN: - { - DIG_T *pDigTable = &podmpriv->DM_DigTable; - u32 rx_gain = ((u32 *)(val))[0]; - - if(rx_gain == 0xff){//restore rx gain - ODM_Write_DIG(podmpriv,pDigTable->BackupIGValue); - } - else{ - pDigTable->BackupIGValue = pDigTable->CurIGValue; - ODM_Write_DIG(podmpriv,rx_gain); - } - } - break; - case HW_VAR_TRIGGER_GPIO_0: - rtl8192cu_trigger_gpio_0(Adapter); - break; -#ifdef CONFIG_BT_COEXIST - case HW_VAR_BT_SET_COEXIST: - { - u8 bStart = (*(u8 *)val); - rtl8192c_set_dm_bt_coexist(Adapter, bStart); - } - break; - case HW_VAR_BT_ISSUE_DELBA: - { - u8 dir = (*(u8 *)val); - rtl8192c_issue_delete_ba(Adapter, dir); - } - break; -#endif -#if (RATE_ADAPTIVE_SUPPORT==1) - case HW_VAR_RPT_TIMER_SETTING: - { - u16 min_rpt_time = (*(u16 *)val); - ODM_RA_Set_TxRPT_Time(podmpriv,min_rpt_time); - } - break; -#endif -#ifdef CONFIG_SW_ANTENNA_DIVERSITY - - case HW_VAR_ANTENNA_DIVERSITY_LINK: - //odm_SwAntDivRestAfterLink8192C(Adapter); - ODM_SwAntDivRestAfterLink(podmpriv); - break; -#endif -#ifdef CONFIG_ANTENNA_DIVERSITY - case HW_VAR_ANTENNA_DIVERSITY_SELECT: - { - u8 Optimum_antenna = (*(u8 *)val); - u8 Ant ; - //switch antenna to Optimum_antenna - //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); - if(pHalData->CurAntenna != Optimum_antenna) - { - Ant = (Optimum_antenna==2)?MAIN_ANT:AUX_ANT; - ODM_UpdateRxIdleAnt_88E(&pHalData->odmpriv, Ant); - - pHalData->CurAntenna = Optimum_antenna ; - //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); - } - } - break; -#endif - case HW_VAR_EFUSE_BYTES: // To set EFUE total used bytes, added by Roger, 2008.12.22. - pHalData->EfuseUsedBytes = *((u16 *)val); - break; - case HW_VAR_FIFO_CLEARN_UP: - { - struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(Adapter); - u8 trycnt = 100; - - //pause tx - rtw_write8(Adapter,REG_TXPAUSE,0xff); - - //keep sn - Adapter->xmitpriv.nqos_ssn = rtw_read16(Adapter,REG_NQOS_SEQ); - - if(pwrpriv->bkeepfwalive != _TRUE) - { - //RX DMA stop - rtw_write32(Adapter,REG_RXPKT_NUM,(rtw_read32(Adapter,REG_RXPKT_NUM)|RW_RELEASE_EN)); - do{ - if(!(rtw_read32(Adapter,REG_RXPKT_NUM)&RXDMA_IDLE)) - break; - }while(trycnt--); - if(trycnt ==0) - DBG_8192C("Stop RX DMA failed...... \n"); - - //RQPN Load 0 - rtw_write16(Adapter,REG_RQPN_NPQ,0x0); - rtw_write32(Adapter,REG_RQPN,0x80000000); - rtw_mdelay_os(10); - } - } - break; - case HW_VAR_CHECK_TXBUF: - -#ifdef CONFIG_CONCURRENT_MODE - { - int i; - #if 0 //for Miracast source PKT lost issue - u8 RetryLimit = 0x01; - rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); - #endif - - for(i=0;i<1000;i++) - { - if(rtw_read32(Adapter, 0x200) != rtw_read32(Adapter, 0x204)) - { - //DBG_871X("packet in tx packet buffer - 0x204=%x, 0x200=%x (%d)\n", rtw_read32(Adapter, 0x204), rtw_read32(Adapter, 0x200), i); - rtw_msleep_os(10); - } - else - { - DBG_871X("no packet in tx packet buffer (%d)\n", i); - break; - } - } - #if 0 //for Miracast source PKT lost issue - RetryLimit = 0x30; - rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); - #endif - } -#endif - break; - - case HW_VAR_APFM_ON_MAC: - pHalData->bMacPwrCtrlOn = *val; - DBG_871X("%s: bMacPwrCtrlOn=%d\n", __func__, pHalData->bMacPwrCtrlOn); - break; - -#ifdef CONFIG_WOWLAN - case HW_VAR_WOWLAN: - { - struct wowlan_ioctl_param *poidparam; - struct recv_buf *precvbuf; - int res, i; - u32 tmp; - u16 len = 0; - u8 mstatus = (*(u8 *)val); - u8 trycnt = 100; - u8 data[4]; - - poidparam = (struct wowlan_ioctl_param *)val; - switch (poidparam->subcode){ - case WOWLAN_ENABLE: - DBG_871X_LEVEL(_drv_always_, "WOWLAN_ENABLE\n"); - - SetFwRelatedForWoWLAN8188ES(Adapter, _TRUE); - - //Set Pattern - //if(adapter_to_pwrctl(Adapter)->wowlan_pattern==_TRUE) - // rtw_wowlan_reload_pattern(Adapter); - - //RX DMA stop - DBG_871X_LEVEL(_drv_always_, "Pause DMA\n"); - rtw_write32(Adapter,REG_RXPKT_NUM,(rtw_read32(Adapter,REG_RXPKT_NUM)|RW_RELEASE_EN)); - do{ - if((rtw_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE)) { - DBG_871X_LEVEL(_drv_always_, "RX_DMA_IDLE is true\n"); - break; - } else { - // If RX_DMA is not idle, receive one pkt from DMA - DBG_871X_LEVEL(_drv_always_, "RX_DMA_IDLE is not true\n"); - } - }while(trycnt--); - if(trycnt ==0) - DBG_871X_LEVEL(_drv_always_, "Stop RX DMA failed...... \n"); - - //Set WOWLAN H2C command. - DBG_871X_LEVEL(_drv_always_, "Set WOWLan cmd\n"); - rtl8188es_set_wowlan_cmd(Adapter, 1); - - mstatus = rtw_read8(Adapter, REG_WOW_CTRL); - trycnt = 10; - - while(!(mstatus&BIT1) && trycnt>1) { - mstatus = rtw_read8(Adapter, REG_WOW_CTRL); - DBG_871X_LEVEL(_drv_always_, "Loop index: %d :0x%02x\n", trycnt, mstatus); - trycnt --; - rtw_msleep_os(2); - } - - adapter_to_pwrctl(Adapter)->wowlan_wake_reason = rtw_read8(Adapter, REG_WOWLAN_WAKE_REASON); - DBG_871X_LEVEL(_drv_always_, "wowlan_wake_reason: 0x%02x\n", - adapter_to_pwrctl(Adapter)->wowlan_wake_reason); - - /* Invoid SE0 reset signal during suspending*/ - rtw_write8(Adapter, REG_RSV_CTRL, 0x20); - rtw_write8(Adapter, REG_RSV_CTRL, 0x60); - - //rtw_msleep_os(10); - break; - case WOWLAN_DISABLE: - DBG_871X_LEVEL(_drv_always_, "WOWLAN_DISABLE\n"); - trycnt = 10; - rtl8188es_set_wowlan_cmd(Adapter, 0); - mstatus = rtw_read8(Adapter, REG_WOW_CTRL); - DBG_871X_LEVEL(_drv_info_, "%s mstatus:0x%02x\n", __func__, mstatus); - - while(mstatus&BIT1 && trycnt>1) { - mstatus = rtw_read8(Adapter, REG_WOW_CTRL); - DBG_871X_LEVEL(_drv_always_, "Loop index: %d :0x%02x\n", trycnt, mstatus); - trycnt --; - rtw_msleep_os(2); - } - - if (mstatus & BIT1) - printk("System did not release RX_DMA\n"); - else - SetFwRelatedForWoWLAN8188ES(Adapter, _FALSE); - - rtw_msleep_os(2); - if(!(adapter_to_pwrctl(Adapter)->wowlan_wake_reason & FWDecisionDisconnect)) - rtl8188e_set_FwJoinBssReport_cmd(Adapter, 1); - //rtw_msleep_os(10); - break; - default: - break; - } - } - break; -#endif //CONFIG_WOWLAN - - - #if (RATE_ADAPTIVE_SUPPORT == 1) - case HW_VAR_TX_RPT_MAX_MACID: - { - u8 maxMacid = *val; - DBG_871X("### MacID(%d),Set Max Tx RPT MID(%d)\n",maxMacid,maxMacid+1); - rtw_write8(Adapter, REG_TX_RPT_CTRL+1, maxMacid+1); - } - break; - #endif - case HW_VAR_H2C_MEDIA_STATUS_RPT: - { - rtl8188e_set_FwMediaStatus_cmd(Adapter , (*(u16 *)val)); - } - break; - case HW_VAR_BCN_VALID: - //BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw - rtw_write8(Adapter, REG_TDECTRL+2, rtw_read8(Adapter, REG_TDECTRL+2) | BIT0); - break; - default: - - break; - } - -_func_exit_; -} - -void GetHwReg8188EU(PADAPTER Adapter, u8 variable, u8* val) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - DM_ODM_T *podmpriv = &pHalData->odmpriv; -_func_enter_; - - switch(variable) - { - case HW_VAR_BASIC_RATE: - *((u16 *)(val)) = pHalData->BasicRateSet; - case HW_VAR_TXPAUSE: - val[0] = rtw_read8(Adapter, REG_TXPAUSE); - break; - case HW_VAR_BCN_VALID: - //BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 - val[0] = (BIT0 & rtw_read8(Adapter, REG_TDECTRL+2))?_TRUE:_FALSE; - break; - case HW_VAR_DM_FLAG: - val[0] = podmpriv->SupportAbility; - break; - case HW_VAR_RF_TYPE: - val[0] = pHalData->rf_type; - break; - case HW_VAR_FWLPS_RF_ON: - { - //When we halt NIC, we should check if FW LPS is leave. - if(adapter_to_pwrctl(Adapter)->rf_pwrstate == rf_off) - { - // If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, - // because Fw is unload. - val[0] = _TRUE; - } - else - { - u32 valRCR; - valRCR = rtw_read32(Adapter, REG_RCR); - valRCR &= 0x00070000; - if(valRCR) - val[0] = _FALSE; - else - val[0] = _TRUE; - } - } - break; -#ifdef CONFIG_ANTENNA_DIVERSITY - case HW_VAR_CURRENT_ANTENNA: - val[0] = pHalData->CurAntenna; - break; -#endif - case HW_VAR_EFUSE_BYTES: // To get EFUE total used bytes, added by Roger, 2008.12.22. - *((u16 *)(val)) = pHalData->EfuseUsedBytes; - break; - case HW_VAR_APFM_ON_MAC: - *val = pHalData->bMacPwrCtrlOn; - break; - case HW_VAR_CHK_HI_QUEUE_EMPTY: - *val = ((rtw_read32(Adapter, REG_HGQ_INFORMATION)&0x0000ff00)==0) ? _TRUE:_FALSE; - break; - - case HW_VAR_READ_LLT_TAB: - { - Read_LLT_Tab(Adapter); - } - break; - case HW_VAR_GET_CPWM: -#ifdef CONFIG_LPS_LCLK - { - *val = rtw_read8(Adapter, REG_USB_HCPWM); - } -#endif - break; - case HW_VAR_C2HEVT_CLEAR: - *val = rtw_read8(Adapter, REG_C2HEVT_CLEAR); - break; - case HW_VAR_C2HEVT_MSG_NORMAL: - *val = rtw_read8(Adapter, REG_C2HEVT_MSG_NORMAL); - break; - - default: - break; - } - -_func_exit_; -} - -// -// Description: -// Query setting of specified variable. -// -u8 -GetHalDefVar8188EUsb( - IN PADAPTER Adapter, - IN HAL_DEF_VARIABLE eVariable, - IN PVOID pValue - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DM_ODM_T *podmpriv = &pHalData->odmpriv; - u8 bResult = _SUCCESS; - - switch(eVariable) - { - case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB: -#if 1 //trunk - { - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - struct sta_priv * pstapriv = &Adapter->stapriv; - struct sta_info * psta; - psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress); - if(psta) - { - *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB; - } - } -#else //V4 branch - if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){ - *((int *)pValue) = pHalData->dmpriv.UndecoratedSmoothedPWDB; - } - else{ - - } -#endif - break; - case HAL_DEF_IS_SUPPORT_ANT_DIV: -#ifdef CONFIG_ANTENNA_DIVERSITY - *((u8 *)pValue) = (pHalData->AntDivCfg==0)?_FALSE:_TRUE; -#endif - break; - case HAL_DEF_CURRENT_ANTENNA: -#ifdef CONFIG_ANTENNA_DIVERSITY - *(( u8*)pValue) = pHalData->CurAntenna; -#endif - break; - case HAL_DEF_DRVINFO_SZ: - *(( u32*)pValue) = DRVINFO_SZ; - break; - case HAL_DEF_MAX_RECVBUF_SZ: - *(( u32*)pValue) = MAX_RECVBUF_SZ; - break; - case HAL_DEF_RX_PACKET_OFFSET: - *(( u32*)pValue) = RXDESC_SIZE + DRVINFO_SZ; - break; -#if (RATE_ADAPTIVE_SUPPORT == 1) - case HAL_DEF_RA_DECISION_RATE: - { - u8 MacID = *((u8*)pValue); - *((u8*)pValue) = ODM_RA_GetDecisionRate_8188E(podmpriv, MacID); - } - break; - - case HAL_DEF_RA_SGI: - { - u8 MacID = *((u8*)pValue); - *((u8*)pValue) = ODM_RA_GetShortGI_8188E(podmpriv, MacID); - } - break; -#endif - - - case HAL_DEF_PT_PWR_STATUS: -#if(POWER_TRAINING_ACTIVE==1) - { - u8 MacID = *((u8*)pValue); - *((u8*)pValue) = ODM_RA_GetHwPwrStatus_8188E(podmpriv, MacID); - } -#endif//(POWER_TRAINING_ACTIVE==1) - break; - - case HW_VAR_MAX_RX_AMPDU_FACTOR: - *(( u32*)pValue) = MAX_AMPDU_FACTOR_64K; - break; - - case HW_DEF_RA_INFO_DUMP: -#if (RATE_ADAPTIVE_SUPPORT == 1) - { - u8 entry_id = *((u8*)pValue); - u8 i; - u8 bLinked = _FALSE; -#ifdef CONFIG_CONCURRENT_MODE - PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; -#endif //CONFIG_CONCURRENT_MODE - - //if(check_fwstate(&Adapter->mlmepriv, _FW_LINKED)== _TRUE) - - if(rtw_linked_check(Adapter)) - bLinked = _TRUE; - -#ifdef CONFIG_CONCURRENT_MODE - if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter)) - bLinked = _TRUE; -#endif - - if(bLinked){ - DBG_871X("============ RA status check ===================\n"); - if(Adapter->bRxRSSIDisplay >30) - Adapter->bRxRSSIDisplay = 1; - for(i=0;i< Adapter->bRxRSSIDisplay;i++){ - DBG_8192C("Mac_id:%d ,RSSI:%d,RateID = %d,RAUseRate = 0x%08x,RateSGI = %d, DecisionRate = 0x%02x ,PTStage = %d, RetryOver drop:%d, LifeTimeOver drop:%d\n", - i, - podmpriv->RAInfo[i].RssiStaRA, - podmpriv->RAInfo[i].RateID, - podmpriv->RAInfo[i].RAUseRate, - podmpriv->RAInfo[i].RateSGI, - podmpriv->RAInfo[i].DecisionRate, - podmpriv->RAInfo[i].PTStage, - podmpriv->RAInfo[i].DROP, - podmpriv->RAInfo[i].DROP1 - ); - } - } - } -#endif //(RATE_ADAPTIVE_SUPPORT == 1) - break; - case HAL_DEF_DBG_DUMP_RXPKT: - *(( u8*)pValue) = pHalData->bDumpRxPkt; - break; - case HAL_DEF_DBG_DUMP_TXPKT: - *(( u8*)pValue) = pHalData->bDumpTxPkt; - break; - - default: - bResult = GetHalDefVar(Adapter, eVariable, pValue); - break; - } - - return bResult; -} - - - - -// -// Description: -// Change default setting of specified variable. -// -u8 -SetHalDefVar8188EUsb( - IN PADAPTER Adapter, - IN HAL_DEF_VARIABLE eVariable, - IN PVOID pValue - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DM_ODM_T *podmpriv = &pHalData->odmpriv; - u8 bResult = _SUCCESS; - - switch(eVariable) - { - case HAL_DEF_DBG_DM_FUNC: - { - u8 dm_func = *(( u8*)pValue); - - if(dm_func == 0){ //disable all dynamic func - podmpriv->SupportAbility = DYNAMIC_FUNC_DISABLE; - DBG_8192C("==> Disable all dynamic function...\n"); - } - else if(dm_func == 1){//disable DIG - podmpriv->SupportAbility &= (~DYNAMIC_BB_DIG); - DBG_8192C("==> Disable DIG...\n"); - } - else if(dm_func == 2){//disable High power - podmpriv->SupportAbility &= (~DYNAMIC_BB_DYNAMIC_TXPWR); - } - else if(dm_func == 3){//disable tx power tracking - podmpriv->SupportAbility &= (~DYNAMIC_RF_CALIBRATION); - DBG_8192C("==> Disable tx power tracking...\n"); - } - //else if(dm_func == 4){//disable BT coexistence - // pdmpriv->DMFlag &= (~DYNAMIC_FUNC_BT); - //} - else if(dm_func == 5){//disable antenna diversity - podmpriv->SupportAbility &= (~DYNAMIC_BB_ANT_DIV); - } - else if(dm_func == 6){//turn on all dynamic func - if(!(podmpriv->SupportAbility & DYNAMIC_BB_DIG)) - { - DIG_T *pDigTable = &podmpriv->DM_DigTable; - pDigTable->CurIGValue= rtw_read8(Adapter,0xc50); - } - //pdmpriv->DMFlag |= DYNAMIC_FUNC_BT; - podmpriv->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE; - DBG_8192C("==> Turn on all dynamic function...\n"); - } - } - break; - case HAL_DEF_DBG_DUMP_RXPKT: - pHalData->bDumpRxPkt = *(( u8*)pValue); - break; - case HAL_DEF_DBG_DUMP_TXPKT: - pHalData->bDumpTxPkt = *(( u8*)pValue); - break; - default: - bResult = SetHalDefVar(Adapter, eVariable, pValue); - break; - } - - return bResult; -} -/* -u32 _update_92cu_basic_rate(_adapter *padapter, unsigned int mask) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); -#ifdef CONFIG_BT_COEXIST - struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); -#endif - unsigned int BrateCfg = 0; - -#ifdef CONFIG_BT_COEXIST - if( (pbtpriv->BT_Coexist) && (pbtpriv->BT_CoexistType == BT_CSR_BC4) ) - { - BrateCfg = mask & 0x151; - //DBG_8192C("BT temp disable cck 2/5.5/11M, (0x%x = 0x%x)\n", REG_RRSR, BrateCfg & 0x151); - } - else -#endif - { - //if(pHalData->VersionID != VERSION_TEST_CHIP_88C) - BrateCfg = mask & 0x15F; - //else //for 88CU 46PING setting, Disable CCK 2M, 5.5M, Others must tuning - // BrateCfg = mask & 0x159; - } - - BrateCfg |= 0x01; // default enable 1M ACK rate - - return BrateCfg; -} -*/ -void _update_response_rate(_adapter *padapter,unsigned int mask) -{ - u8 RateIndex = 0; - // Set RRSR rate table. - rtw_write8(padapter, REG_RRSR, mask&0xff); - rtw_write8(padapter,REG_RRSR+1, (mask>>8)&0xff); - - // Set RTS initial rate - while(mask > 0x1) - { - mask = (mask>> 1); - RateIndex++; - } - rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex); -} - -void UpdateHalRAMask8188EUsb(PADAPTER padapter, u32 mac_id, u8 rssi_level) -{ - //volatile unsigned int result; - u8 init_rate=0; - u8 networkType, raid; - u32 mask,rate_bitmap; - u8 shortGIrate = _FALSE; - int supportRateNum = 0; - struct sta_info *psta; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - //struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); - - if (mac_id >= NUM_STA) //CAM_SIZE - { - return; - } - - psta = pmlmeinfo->FW_sta_info[mac_id].psta; - if(psta == NULL) - { - return; - } - - switch (mac_id) - { - case 0:// for infra mode -#ifdef CONFIG_CONCURRENT_MODE - case 2:// first station uses macid=0, second station uses macid=2 -#endif - supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates); - networkType = judge_network_type(padapter, cur_network->SupportedRates, supportRateNum) & 0xf; - //pmlmeext->cur_wireless_mode = networkType; - raid = networktype_to_raid(networkType); - - mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); - mask |= (pmlmeinfo->HT_enable)? update_MSC_rate(&(pmlmeinfo->HT_caps)): 0; - - - if (support_short_GI(padapter, &(pmlmeinfo->HT_caps))) - { - shortGIrate = _TRUE; - } - - break; - - case 1://for broadcast/multicast - supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); - if(pmlmeext->cur_wireless_mode & WIRELESS_11B) - networkType = WIRELESS_11B; - else - networkType = WIRELESS_11G; - raid = networktype_to_raid(networkType); - mask = update_basic_rate(cur_network->SupportedRates, supportRateNum); - - - break; - - default: //for each sta in IBSS - supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); - networkType = judge_network_type(padapter, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf; - //pmlmeext->cur_wireless_mode = networkType; - raid = networktype_to_raid(networkType); - mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); - - //todo: support HT in IBSS - - break; - } - - //mask &=0x0fffffff; - rate_bitmap = 0x0fffffff; -#ifdef CONFIG_ODM_REFRESH_RAMASK - { - rate_bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv,mac_id,mask,rssi_level); - printk("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n", - __FUNCTION__,mac_id,networkType,mask,rssi_level,rate_bitmap); - } -#endif - - mask &= rate_bitmap; - - init_rate = get_highest_rate_idx(mask)&0x3f; - - if(pHalData->fw_ractrl == _TRUE) - { - u8 arg = 0; - - //arg = (cam_idx-4)&0x1f;//MACID - arg = mac_id&0x1f;//MACID - - arg |= BIT(7); - - if (shortGIrate==_TRUE) - arg |= BIT(5); - mask |= ((raid<<28)&0xf0000000); - DBG_871X("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg); - psta->ra_mask=mask; -#ifdef CONFIG_INTEL_PROXIM - if(padapter->proximity.proxim_on ==_TRUE){ - arg &= ~BIT(6); - } - else { - arg |= BIT(6); - } -#endif //CONFIG_INTEL_PROXIM - mask |= ((raid<<28)&0xf0000000); - - //to do - /* - *(pu4Byte)&RateMask=EF4Byte((ratr_bitmap&0x0fffffff) | (ratr_index<<28)); - RateMask[4] = macId | (bShortGI?0x20:0x00) | 0x80; - */ - rtl8188e_set_raid_cmd(padapter, mask); - - } - else - { - -#if(RATE_ADAPTIVE_SUPPORT == 1) - - ODM_RA_UpdateRateInfo_8188E( - &(pHalData->odmpriv), - mac_id, - raid, - mask, - shortGIrate - ); - -#endif - } - - - //set ra_id - psta->raid = raid; - psta->init_rate = init_rate; - - -} - - -void SetBeaconRelatedRegisters8188EUsb(PADAPTER padapter) -{ - u32 value32; - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - u32 bcn_ctrl_reg = REG_BCN_CTRL; - //reset TSF, enable update TSF, correcting TSF On Beacon - - //REG_BCN_INTERVAL - //REG_BCNDMATIM - //REG_ATIMWND - //REG_TBTT_PROHIBIT - //REG_DRVERLYINT - //REG_BCN_MAX_ERR - //REG_BCNTCFG //(0x510) - //REG_DUAL_TSF_RST - //REG_BCN_CTRL //(0x550) - - //BCN interval -#ifdef CONFIG_CONCURRENT_MODE - if (padapter->iface_type == IFACE_PORT1){ - bcn_ctrl_reg = REG_BCN_CTRL_1; - } -#endif - rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval); - rtw_write8(padapter, REG_ATIMWND, 0x02);// 2ms - - _InitBeaconParameters(padapter); - - rtw_write8(padapter, REG_SLOT, 0x09); - - value32 =rtw_read32(padapter, REG_TCR); - value32 &= ~TSFRST; - rtw_write32(padapter, REG_TCR, value32); - - value32 |= TSFRST; - rtw_write32(padapter, REG_TCR, value32); - - // NOTE: Fix test chip's bug (about contention windows's randomness) - rtw_write8(padapter, REG_RXTSF_OFFSET_CCK, 0x50); - rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50); - - _BeaconFunctionEnable(padapter, _TRUE, _TRUE); - - ResumeTxBeacon(padapter); - - //rtw_write8(padapter, 0x422, rtw_read8(padapter, 0x422)|BIT(6)); - - //rtw_write8(padapter, 0x541, 0xff); - - //rtw_write8(padapter, 0x542, rtw_read8(padapter, 0x541)|BIT(0)); - - rtw_write8(padapter, bcn_ctrl_reg, rtw_read8(padapter, bcn_ctrl_reg)|BIT(1)); - -} - -static void rtl8188eu_init_default_value(_adapter * padapter) -{ - PHAL_DATA_TYPE pHalData; - struct pwrctrl_priv *pwrctrlpriv; - struct dm_priv *pdmpriv; - u8 i; - - pHalData = GET_HAL_DATA(padapter); - pwrctrlpriv = adapter_to_pwrctl(padapter); - pdmpriv = &pHalData->dmpriv; - - - //init default value - pHalData->fw_ractrl = _FALSE; - if(!pwrctrlpriv->bkeepfwalive) - pHalData->LastHMEBoxNum = 0; - - //init dm default value - pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized = _FALSE; - pHalData->odmpriv.RFCalibrateInfo.TM_Trigger = 0;//for IQK - //pdmpriv->binitialized = _FALSE; -// pdmpriv->prv_traffic_idx = 3; -// pdmpriv->initialize = 0; - pHalData->pwrGroupCnt = 0; - pHalData->PGMaxGroup= 13; - pHalData->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0; - for(i = 0; i < HP_THERMAL_NUM; i++) - pHalData->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0; -} - -static u8 rtl8188eu_ps_func(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8 *val) -{ - u8 bResult = _TRUE; - switch(efunc_id){ - - #if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED) - case HAL_USB_SELECT_SUSPEND: - { - u8 bfwpoll = *(( u8*)val); - //rtl8188e_set_FwSelectSuspend_cmd(Adapter,bfwpoll ,500);//note fw to support hw power down ping detect - } - break; - #endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED - - default: - break; - } - return bResult; -} - -void rtl8188eu_set_hal_ops(_adapter * padapter) -{ - struct hal_ops *pHalFunc = &padapter->HalFunc; - -_func_enter_; - -#ifdef CONFIG_CONCURRENT_MODE - if(padapter->isprimary) -#endif //CONFIG_CONCURRENT_MODE - { - padapter->HalData = rtw_zmalloc(sizeof(HAL_DATA_TYPE)); - if(padapter->HalData == NULL){ - DBG_8192C("cant not alloc memory for HAL DATA \n"); - } - } - - //_rtw_memset(padapter->HalData, 0, sizeof(HAL_DATA_TYPE)); - padapter->hal_data_sz = sizeof(HAL_DATA_TYPE); - - pHalFunc->hal_power_on = InitPowerOn_rtl8188eu; - pHalFunc->hal_power_off = hal_poweroff_rtl8188eu; - - pHalFunc->hal_init = &rtl8188eu_hal_init; - pHalFunc->hal_deinit = &rtl8188eu_hal_deinit; - - //pHalFunc->free_hal_data = &rtl8192c_free_hal_data; - - pHalFunc->inirp_init = &rtl8188eu_inirp_init; - pHalFunc->inirp_deinit = &rtl8188eu_inirp_deinit; - - pHalFunc->init_xmit_priv = &rtl8188eu_init_xmit_priv; - pHalFunc->free_xmit_priv = &rtl8188eu_free_xmit_priv; - - pHalFunc->init_recv_priv = &rtl8188eu_init_recv_priv; - pHalFunc->free_recv_priv = &rtl8188eu_free_recv_priv; -#ifdef CONFIG_SW_LED - pHalFunc->InitSwLeds = &rtl8188eu_InitSwLeds; - pHalFunc->DeInitSwLeds = &rtl8188eu_DeInitSwLeds; -#else //case of hw led or no led - pHalFunc->InitSwLeds = NULL; - pHalFunc->DeInitSwLeds = NULL; -#endif//CONFIG_SW_LED - - pHalFunc->init_default_value = &rtl8188eu_init_default_value; - pHalFunc->intf_chip_configure = &rtl8188eu_interface_configure; - pHalFunc->read_adapter_info = &ReadAdapterInfo8188EU; - - //pHalFunc->set_bwmode_handler = &PHY_SetBWMode8192C; - //pHalFunc->set_channel_handler = &PHY_SwChnl8192C; - - //pHalFunc->hal_dm_watchdog = &rtl8192c_HalDmWatchDog; - - - pHalFunc->SetHwRegHandler = &SetHwReg8188EU; - pHalFunc->GetHwRegHandler = &GetHwReg8188EU; - pHalFunc->GetHalDefVarHandler = &GetHalDefVar8188EUsb; - pHalFunc->SetHalDefVarHandler = &SetHalDefVar8188EUsb; - - pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8188EUsb; - pHalFunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8188EUsb; - - //pHalFunc->Add_RateATid = &rtl8192c_Add_RateATid; - - pHalFunc->hal_xmit = &rtl8188eu_hal_xmit; - pHalFunc->mgnt_xmit = &rtl8188eu_mgnt_xmit; - pHalFunc->hal_xmitframe_enqueue = &rtl8188eu_hal_xmitframe_enqueue; - - -#ifdef CONFIG_HOSTAPD_MLME - pHalFunc->hostap_mgnt_xmit_entry = &rtl8188eu_hostap_mgnt_xmit_entry; -#endif - pHalFunc->interface_ps_func = &rtl8188eu_ps_func; - - rtl8188e_set_hal_ops(pHalFunc); -_func_exit_; - -} - diff --git a/hal/rtl8188e/usb/usb_ops_linux.c b/hal/rtl8188e/usb/usb_ops_linux.c deleted file mode 100755 index 374d9ec..0000000 --- a/hal/rtl8188e/usb/usb_ops_linux.c +++ /dev/null @@ -1,1737 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _HCI_OPS_OS_C_ - -#include -#include -#include -#include -#include -#include -#include -#include - -static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype) -{ - _adapter *padapter = pintfhdl->padapter; - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); - struct usb_device *udev=pdvobjpriv->pusbdev; - - unsigned int pipe; - int status = 0; - u32 tmp_buflen=0; - u8 reqtype; - u8 *pIo_buf; - int vendorreq_times = 0; - - #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE - u8 *tmp_buf; - #else // use stack memory - u8 tmp_buf[MAX_USB_IO_CTL_SIZE]; - #endif - -#ifdef CONFIG_CONCURRENT_MODE - if(padapter->adapter_type > PRIMARY_ADAPTER) - { - padapter = padapter->pbuddy_adapter; - pdvobjpriv = adapter_to_dvobj(padapter); - udev = pdvobjpriv->pusbdev; - } -#endif - - //DBG_871X("%s %s:%d\n",__FUNCTION__, current->comm, current->pid); - - if((padapter->bSurpriseRemoved) ||(dvobj_to_pwrctl(pdvobjpriv)->pnp_bstop_trx)){ - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq:(padapter->bSurpriseRemoved ||pwrctl->pnp_bstop_trx)!!!\n")); - status = -EPERM; - goto exit; - } - - if(len>MAX_VENDOR_REQ_CMD_SIZE){ - DBG_8192C( "[%s] Buffer len error ,vendor request failed\n", __FUNCTION__ ); - status = -EINVAL; - goto exit; - } - - #ifdef CONFIG_USB_VENDOR_REQ_MUTEX - _enter_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL); - #endif - - - // Acquire IO memory for vendorreq -#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC - pIo_buf = pdvobjpriv->usb_vendor_req_buf; -#else - #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE - tmp_buf = rtw_malloc( (u32) len + ALIGNMENT_UNIT); - tmp_buflen = (u32)len + ALIGNMENT_UNIT; - #else // use stack memory - tmp_buflen = MAX_USB_IO_CTL_SIZE; - #endif - - // Added by Albert 2010/02/09 - // For mstar platform, mstar suggests the address for USB IO should be 16 bytes alignment. - // Trying to fix it here. - pIo_buf = (tmp_buf==NULL)?NULL:tmp_buf + ALIGNMENT_UNIT -((SIZE_PTR)(tmp_buf) & 0x0f ); -#endif - - if ( pIo_buf== NULL) { - DBG_8192C( "[%s] pIo_buf == NULL \n", __FUNCTION__ ); - status = -ENOMEM; - goto release_mutex; - } - - while(++vendorreq_times<= MAX_USBCTRL_VENDORREQ_TIMES) - { - _rtw_memset(pIo_buf, 0, len); - - if (requesttype == 0x01) - { - pipe = usb_rcvctrlpipe(udev, 0);//read_in - reqtype = REALTEK_USB_VENQT_READ; - } - else - { - pipe = usb_sndctrlpipe(udev, 0);//write_out - reqtype = REALTEK_USB_VENQT_WRITE; - _rtw_memcpy( pIo_buf, pdata, len); - } - - #if 0 - //timeout test for firmware downloading - status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len - , (value == FW_8188E_START_ADDRESS) ?RTW_USB_CONTROL_MSG_TIMEOUT_TEST : RTW_USB_CONTROL_MSG_TIMEOUT - ); - #else - status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len, RTW_USB_CONTROL_MSG_TIMEOUT); - #endif - - if ( status == len) // Success this control transfer. - { - rtw_reset_continual_io_error(pdvobjpriv); - if ( requesttype == 0x01 ) - { // For Control read transfer, we have to copy the read data from pIo_buf to pdata. - _rtw_memcpy( pdata, pIo_buf, len ); - } - } - else { // error cases - DBG_8192C("reg 0x%x, usb %s %u fail, status:%d value=0x%x, vendorreq_times:%d\n" - , value,(requesttype == 0x01)?"read":"write" , len, status, *(u32*)pdata, vendorreq_times); - - if (status < 0) { - if(status == (-ESHUTDOWN) || status == -ENODEV ) - { - padapter->bSurpriseRemoved = _TRUE; - } else { - #ifdef DBG_CONFIG_ERROR_DETECT - { - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - pHalData->srestpriv.Wifi_Error_Status = USB_VEN_REQ_CMD_FAIL; - } - #endif - } - } - else // status != len && status >= 0 - { - if(status > 0) { - if ( requesttype == 0x01 ) - { // For Control read transfer, we have to copy the read data from pIo_buf to pdata. - _rtw_memcpy( pdata, pIo_buf, len ); - } - } - } - - if(rtw_inc_and_chk_continual_io_error(pdvobjpriv) == _TRUE ){ - padapter->bSurpriseRemoved = _TRUE; - break; - } - - } - - // firmware download is checksumed, don't retry - if( (value >= FW_8188E_START_ADDRESS && value <= FW_8188E_END_ADDRESS) || status == len ) - break; - - } - - // release IO memory used by vendorreq - #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE - rtw_mfree(tmp_buf, tmp_buflen); - #endif - -release_mutex: - #ifdef CONFIG_USB_VENDOR_REQ_MUTEX - _exit_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL); - #endif -exit: - return status; - -} - -static u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr) -{ - u8 request; - u8 requesttype; - u16 wvalue; - u16 index; - u16 len; - u8 data=0; - - _func_enter_; - - request = 0x05; - requesttype = 0x01;//read_in - index = 0;//n/a - - wvalue = (u16)(addr&0x0000ffff); - len = 1; - - usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); - - _func_exit_; - - return data; - -} - -static u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr) -{ - u8 request; - u8 requesttype; - u16 wvalue; - u16 index; - u16 len; - u16 data=0; - - _func_enter_; - - request = 0x05; - requesttype = 0x01;//read_in - index = 0;//n/a - - wvalue = (u16)(addr&0x0000ffff); - len = 2; - - usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); - - _func_exit_; - - return data; - -} - -static u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr) -{ - u8 request; - u8 requesttype; - u16 wvalue; - u16 index; - u16 len; - u32 data=0; - - _func_enter_; - - request = 0x05; - requesttype = 0x01;//read_in - index = 0;//n/a - - wvalue = (u16)(addr&0x0000ffff); - len = 4; - - usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); - - _func_exit_; - - return data; - -} - -static int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) -{ - u8 request; - u8 requesttype; - u16 wvalue; - u16 index; - u16 len; - u8 data; - int ret; - - _func_enter_; - - request = 0x05; - requesttype = 0x00;//write_out - index = 0;//n/a - - wvalue = (u16)(addr&0x0000ffff); - len = 1; - - data = val; - - ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); - - _func_exit_; - - return ret; - -} - -static int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) -{ - u8 request; - u8 requesttype; - u16 wvalue; - u16 index; - u16 len; - u16 data; - int ret; - - _func_enter_; - - request = 0x05; - requesttype = 0x00;//write_out - index = 0;//n/a - - wvalue = (u16)(addr&0x0000ffff); - len = 2; - - data = val; - - ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); - - _func_exit_; - - return ret; - -} - -static int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) -{ - u8 request; - u8 requesttype; - u16 wvalue; - u16 index; - u16 len; - u32 data; - int ret; - - _func_enter_; - - request = 0x05; - requesttype = 0x00;//write_out - index = 0;//n/a - - wvalue = (u16)(addr&0x0000ffff); - len = 4; - data =val; - - ret =usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); - - _func_exit_; - - return ret; - -} - -static int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata) -{ - u8 request; - u8 requesttype; - u16 wvalue; - u16 index; - u16 len; - u8 buf[VENDOR_CMD_MAX_DATA_LEN]={0}; - int ret; - - _func_enter_; - - request = 0x05; - requesttype = 0x00;//write_out - index = 0;//n/a - - wvalue = (u16)(addr&0x0000ffff); - len = length; - _rtw_memcpy(buf, pdata, len ); - - ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, buf, len, requesttype); - - _func_exit_; - - return ret; - -} - -#ifdef CONFIG_SUPPORT_USB_INT -void interrupt_handler_8188eu(_adapter *padapter,u16 pkt_len,u8 *pbuf) -{ - HAL_DATA_TYPE *pHalData=GET_HAL_DATA(padapter); - struct reportpwrstate_parm pwr_rpt; - - if ( pkt_len != INTERRUPT_MSG_FORMAT_LEN ) - { - DBG_8192C("%s Invalid interrupt content length (%d)!\n", __FUNCTION__, pkt_len); - return ; - } - - // HISR - _rtw_memcpy(&(pHalData->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4); - _rtw_memcpy(&(pHalData->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4); - - #if 0 //DBG - { - u32 hisr=0 ,hisr_ex=0; - _rtw_memcpy(&hisr,&(pHalData->IntArray[0]),4); - hisr = le32_to_cpu(hisr); - - _rtw_memcpy(&hisr_ex,&(pHalData->IntArray[1]),4); - hisr_ex = le32_to_cpu(hisr_ex); - - if((hisr != 0) || (hisr_ex!=0)) - DBG_871X("===> %s hisr:0x%08x ,hisr_ex:0x%08x \n",__FUNCTION__,hisr,hisr_ex); - } - #endif - - -#ifdef CONFIG_LPS_LCLK - if( pHalData->IntArray[0] & IMR_CPWM_88E ) - { - _rtw_memcpy(&pwr_rpt.state, &(pbuf[USB_INTR_CONTENT_CPWM1_OFFSET]), 1); - //_rtw_memcpy(&pwr_rpt.state2, &(pbuf[USB_INTR_CONTENT_CPWM2_OFFSET]), 1); - - //88e's cpwm value only change BIT0, so driver need to add PS_STATE_S2 for LPS flow. - pwr_rpt.state |= PS_STATE_S2; - _set_workitem(&(adapter_to_pwrctl(padapter)->cpwm_event)); - } -#endif//CONFIG_LPS_LCLK - -#ifdef CONFIG_INTERRUPT_BASED_TXBCN - - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - if (pHalData->IntArray[0] & IMR_BCNDMAINT0_88E) - #endif - #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR - if (pHalData->IntArray[0] & (IMR_TBDER_88E|IMR_TBDOK_88E)) - #endif - { - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - #if 0 - if(pHalData->IntArray[0] & IMR_BCNDMAINT0_88E) - DBG_8192C("%s: HISR_BCNERLY_INT\n", __func__); - if(pHalData->IntArray[0] & IMR_TBDOK_88E) - DBG_8192C("%s: HISR_TXBCNOK\n", __func__); - if(pHalData->IntArray[0] & IMR_TBDER_88E) - DBG_8192C("%s: HISR_TXBCNERR\n", __func__); - #endif - - - if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) - { - //send_beacon(padapter); - if(pmlmepriv->update_bcn == _TRUE) - { - //tx_beacon_hdl(padapter, NULL); - set_tx_beacon_cmd(padapter); - } - } -#ifdef CONFIG_CONCURRENT_MODE - if(check_buddy_fwstate(padapter, WIFI_AP_STATE)) - { - //send_beacon(padapter); - if(padapter->pbuddy_adapter->mlmepriv.update_bcn == _TRUE) - { - //tx_beacon_hdl(padapter, NULL); - set_tx_beacon_cmd(padapter->pbuddy_adapter); - } - } -#endif - - } -#endif //CONFIG_INTERRUPT_BASED_TXBCN - - - - -#ifdef DBG_CONFIG_ERROR_DETECT_INT - if( pHalData->IntArray[1] & IMR_TXERR_88E ) - DBG_871X("===> %s Tx Error Flag Interrupt Status \n",__FUNCTION__); - if( pHalData->IntArray[1] & IMR_RXERR_88E ) - DBG_871X("===> %s Rx Error Flag INT Status \n",__FUNCTION__); - if( pHalData->IntArray[1] & IMR_TXFOVW_88E ) - DBG_871X("===> %s Transmit FIFO Overflow \n",__FUNCTION__); - if( pHalData->IntArray[1] & IMR_RXFOVW_88E ) - DBG_871X("===> %s Receive FIFO Overflow \n",__FUNCTION__); -#endif//DBG_CONFIG_ERROR_DETECT_INT - - - // C2H Event - if(pbuf[0]!= 0){ - _rtw_memcpy(&(pHalData->C2hArray[0]), &(pbuf[USB_INTR_CONTENT_C2H_OFFSET]), 16); - //rtw_c2h_wk_cmd(padapter); to do.. - } - -} -#endif - -#ifdef CONFIG_USB_INTERRUPT_IN_PIPE -static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs) -{ - int err; - _adapter *padapter = (_adapter *)purb->context; - - if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel) - { - DBG_8192C("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n", - __FUNCTION__,padapter->bDriverStopped, padapter->bSurpriseRemoved,padapter->bReadPortCancel); - - return; - } - - if(purb->status==0)//SUCCESS - { - if (purb->actual_length > INTERRUPT_MSG_FORMAT_LEN) - { - DBG_8192C("usb_read_interrupt_complete: purb->actual_length > INTERRUPT_MSG_FORMAT_LEN(%d)\n",INTERRUPT_MSG_FORMAT_LEN); - } - - interrupt_handler_8188eu(padapter, purb->actual_length,purb->transfer_buffer ); - - err = usb_submit_urb(purb, GFP_ATOMIC); - if((err) && (err != (-EPERM))) - { - DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, purb->status); - } - } - else - { - DBG_8192C("###=> usb_read_interrupt_complete => urb status(%d)\n", purb->status); - - switch(purb->status) { - case -EINVAL: - case -EPIPE: - case -ENODEV: - case -ESHUTDOWN: - //padapter->bSurpriseRemoved=_TRUE; - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); - case -ENOENT: - padapter->bDriverStopped=_TRUE; - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); - break; - case -EPROTO: - break; - case -EINPROGRESS: - DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); - break; - default: - break; - } - } - -} - -static u32 usb_read_interrupt(struct intf_hdl *pintfhdl, u32 addr) -{ - int err; - unsigned int pipe; - u32 ret = _SUCCESS; - _adapter *adapter = pintfhdl->padapter; - struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); - struct recv_priv *precvpriv = &adapter->recvpriv; - struct usb_device *pusbd = pdvobj->pusbdev; - -_func_enter_; - - //translate DMA FIFO addr to pipehandle - pipe = ffaddr2pipehdl(pdvobj, addr); - - usb_fill_int_urb(precvpriv->int_in_urb, pusbd, pipe, - precvpriv->int_in_buf, - INTERRUPT_MSG_FORMAT_LEN, - usb_read_interrupt_complete, - adapter, - 1); - - err = usb_submit_urb(precvpriv->int_in_urb, GFP_ATOMIC); - if((err) && (err != (-EPERM))) - { - DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, precvpriv->int_in_urb->status); - ret = _FAIL; - } - -_func_exit_; - - return ret; -} -#endif - -static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxstat, struct phy_stat *pphy_status) -{ - s32 ret=_SUCCESS; -#ifdef CONFIG_CONCURRENT_MODE - u8 *primary_myid, *secondary_myid, *paddr1; - union recv_frame *precvframe_if2 = NULL; - _adapter *primary_padapter = precvframe->u.hdr.adapter; - _adapter *secondary_padapter = primary_padapter->pbuddy_adapter; - struct recv_priv *precvpriv = &primary_padapter->recvpriv; - _queue *pfree_recv_queue = &precvpriv->free_recv_queue; - u8 *pbuf = precvframe->u.hdr.rx_data; - - if(!secondary_padapter) - return ret; - - paddr1 = GetAddr1Ptr(precvframe->u.hdr.rx_data); - - if(IS_MCAST(paddr1) == _FALSE)//unicast packets - { - //primary_myid = myid(&primary_padapter->eeprompriv); - secondary_myid = myid(&secondary_padapter->eeprompriv); - - if(_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN)) - { - //change to secondary interface - precvframe->u.hdr.adapter = secondary_padapter; - } - - //ret = recv_entry(precvframe); - - } - else // Handle BC/MC Packets - { - - u8 clone = _TRUE; -#if 0 - u8 type, subtype, *paddr2, *paddr3; - - type = GetFrameType(pbuf); - subtype = GetFrameSubType(pbuf); //bit(7)~bit(2) - - switch (type) - { - case WIFI_MGT_TYPE: //Handle BC/MC mgnt Packets - if(subtype == WIFI_BEACON) - { - paddr3 = GetAddr3Ptr(precvframe->u.hdr.rx_data); - - if (check_fwstate(&secondary_padapter->mlmepriv, _FW_LINKED) && - _rtw_memcmp(paddr3, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN)) - { - //change to secondary interface - precvframe->u.hdr.adapter = secondary_padapter; - clone = _FALSE; - } - - if(check_fwstate(&primary_padapter->mlmepriv, _FW_LINKED) && - _rtw_memcmp(paddr3, get_bssid(&primary_padapter->mlmepriv), ETH_ALEN)) - { - if(clone==_FALSE) - { - clone = _TRUE; - } - else - { - clone = _FALSE; - } - - precvframe->u.hdr.adapter = primary_padapter; - } - - if(check_fwstate(&primary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) || - check_fwstate(&secondary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING)) - { - clone = _TRUE; - precvframe->u.hdr.adapter = primary_padapter; - } - - } - else if(subtype == WIFI_PROBEREQ) - { - //probe req frame is only for interface2 - //change to secondary interface - precvframe->u.hdr.adapter = secondary_padapter; - clone = _FALSE; - } - break; - case WIFI_CTRL_TYPE: // Handle BC/MC ctrl Packets - - break; - case WIFI_DATA_TYPE: //Handle BC/MC data Packets - //Notes: AP MODE never rx BC/MC data packets - - paddr2 = GetAddr2Ptr(precvframe->u.hdr.rx_data); - - if(_rtw_memcmp(paddr2, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN)) - { - //change to secondary interface - precvframe->u.hdr.adapter = secondary_padapter; - clone = _FALSE; - } - - break; - default: - - break; - } -#endif - - if(_TRUE == clone) - { - //clone/copy to if2 - u8 shift_sz = 0; - u32 alloc_sz, skb_len; - _pkt *pkt_copy = NULL; - struct rx_pkt_attrib *pattrib = NULL; - - precvframe_if2 = rtw_alloc_recvframe(pfree_recv_queue); - if(precvframe_if2) - { - precvframe_if2->u.hdr.adapter = secondary_padapter; - - _rtw_init_listhead(&precvframe_if2->u.hdr.list); - precvframe_if2->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. - precvframe_if2->u.hdr.len=0; - - _rtw_memcpy(&precvframe_if2->u.hdr.attrib, &precvframe->u.hdr.attrib, sizeof(struct rx_pkt_attrib)); - - pattrib = &precvframe_if2->u.hdr.attrib; - - // Modified by Albert 20101213 - // For 8 bytes IP header alignment. - if (pattrib->qos) // Qos data, wireless lan header length is 26 - { - shift_sz = 6; - } - else - { - shift_sz = 0; - } - - skb_len = pattrib->pkt_len; - - // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. - // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 - if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ - //alloc_sz = 1664; //1664 is 128 alignment. - if(skb_len <= 1650) - alloc_sz = 1664; - else - alloc_sz = skb_len + 14; - } - else { - alloc_sz = skb_len; - // 6 is for IP header 8 bytes alignment in QoS packet case. - // 8 is for skb->data 4 bytes alignment. - alloc_sz += 14; - } - - pkt_copy = rtw_skb_alloc(alloc_sz); - - if(pkt_copy) - { - pkt_copy->dev = secondary_padapter->pnetdev; - precvframe_if2->u.hdr.pkt = pkt_copy; - precvframe_if2->u.hdr.rx_head = pkt_copy->data; - precvframe_if2->u.hdr.rx_end = pkt_copy->data + alloc_sz; - skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address - skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. - _rtw_memcpy(pkt_copy->data, pbuf, skb_len); - precvframe_if2->u.hdr.rx_data = precvframe_if2->u.hdr.rx_tail = pkt_copy->data; - - - recvframe_put(precvframe_if2, skb_len); - if (pattrib->physt) - update_recvframe_phyinfo_88e(precvframe_if2, (struct phy_stat*)pphy_status); - ret = rtw_recv_entry(precvframe_if2); - - } - else { - rtw_free_recvframe(precvframe_if2, pfree_recv_queue); - DBG_8192C("%s()-%d: alloc_skb() failed!\n", __FUNCTION__, __LINE__); - } - - } - - } - - } - if (precvframe->u.hdr.attrib.physt) - update_recvframe_phyinfo_88e(precvframe, (struct phy_stat*)pphy_status); - ret = rtw_recv_entry(precvframe); - -#endif - - return ret; - -} - -#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX -static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf) -{ - u8 *pbuf; - u8 shift_sz = 0; - u16 pkt_cnt, drvinfo_sz; - u32 pkt_offset, skb_len, alloc_sz; - s32 transfer_len; - struct recv_stat *prxstat; - struct phy_stat *pphy_status = NULL; - _pkt *pkt_copy = NULL; - union recv_frame *precvframe = NULL; - struct rx_pkt_attrib *pattrib = NULL; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct recv_priv *precvpriv = &padapter->recvpriv; - _queue *pfree_recv_queue = &precvpriv->free_recv_queue; - - - transfer_len = (s32)precvbuf->transfer_len; - pbuf = precvbuf->pbuf; - - prxstat = (struct recv_stat *)pbuf; - pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; - -#if 0 //temp remove when disable usb rx aggregation - if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_lenrxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4)); - - prxstat = (struct recv_stat *)pbuf; - - precvframe = rtw_alloc_recvframe(pfree_recv_queue); - if(precvframe==NULL) - { - RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n")); - DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__); - goto _exit_recvbuf2recvframe; - } - - _rtw_init_listhead(&precvframe->u.hdr.list); - precvframe->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. - precvframe->u.hdr.len=0; - - //rtl8192c_query_rx_desc_status(precvframe, prxstat); - update_recvframe_attrib_88e(precvframe, prxstat); - - pattrib = &precvframe->u.hdr.attrib; - - if ((padapter->registrypriv.mp_mode == 0) &&((pattrib->crc_err) || (pattrib->icv_err))) - { - DBG_8192C("%s: RX Warning! crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); - - rtw_free_recvframe(precvframe, pfree_recv_queue); - goto _exit_recvbuf2recvframe; - } - - - if( (pattrib->physt) && (pattrib->pkt_rpt_type == NORMAL_RX)) - { - pphy_status = (struct phy_stat *)(pbuf + RXDESC_OFFSET); - } - - pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len; - - if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len)) - { - RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n")); - DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__); - rtw_free_recvframe(precvframe, pfree_recv_queue); - goto _exit_recvbuf2recvframe; - } - - // Modified by Albert 20101213 - // For 8 bytes IP header alignment. - if (pattrib->qos) // Qos data, wireless lan header length is 26 - { - shift_sz = 6; - } - else - { - shift_sz = 0; - } - - skb_len = pattrib->pkt_len; - - // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. - // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 - if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ - //alloc_sz = 1664; //1664 is 128 alignment. - if(skb_len <= 1650) - alloc_sz = 1664; - else - alloc_sz = skb_len + 14; - } - else { - alloc_sz = skb_len; - // 6 is for IP header 8 bytes alignment in QoS packet case. - // 8 is for skb->data 4 bytes alignment. - alloc_sz += 14; - } - - pkt_copy = rtw_skb_alloc(alloc_sz); - - if(pkt_copy) - { - pkt_copy->dev = padapter->pnetdev; - precvframe->u.hdr.pkt = pkt_copy; - precvframe->u.hdr.rx_head = pkt_copy->data; - precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz; - skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address - skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. - _rtw_memcpy(pkt_copy->data, (pbuf + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len); - precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; - } - else - { - DBG_8192C("recvbuf2recvframe:can not allocate memory for skb copy\n"); - //precvframe->u.hdr.pkt = rtw_skb_clone(pskb); - //precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pbuf; - //precvframe->u.hdr.rx_end = pbuf + (pkt_offset>1612?pkt_offset:1612); - - precvframe->u.hdr.pkt = NULL; - rtw_free_recvframe(precvframe, pfree_recv_queue); - - goto _exit_recvbuf2recvframe; - } - - recvframe_put(precvframe, skb_len); - //recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); - -#ifdef CONFIG_USB_RX_AGGREGATION - switch(pHalData->UsbRxAggMode) - { - case USB_RX_AGG_DMA: - case USB_RX_AGG_MIX: - pkt_offset = (u16)_RND128(pkt_offset); - break; - case USB_RX_AGG_USB: - pkt_offset = (u16)_RND4(pkt_offset); - break; - case USB_RX_AGG_DISABLE: - default: - break; - } -#endif - - if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet - { -#ifdef CONFIG_CONCURRENT_MODE - if(rtw_buddy_adapter_up(padapter)) - { - if(pre_recv_entry(precvframe, prxstat, pphy_status) != _SUCCESS) - { - RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, - ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); - } - } - else -#endif - { - if (pattrib->physt) - update_recvframe_phyinfo_88e(precvframe, (struct phy_stat*)pphy_status); - if(rtw_recv_entry(precvframe) != _SUCCESS) - { - RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, - ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); - } - } - - } - else{ // pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP - - //enqueue recvframe to txrtp queue - if(pattrib->pkt_rpt_type == TX_REPORT1){ - //DBG_8192C("rx CCX \n"); - //CCX-TXRPT ack for xmit mgmt frames. - handle_txrpt_ccx_88e(padapter, precvframe->u.hdr.rx_data); - - } - else if(pattrib->pkt_rpt_type == TX_REPORT2){ - //DBG_8192C("rx TX RPT \n"); - ODM_RA_TxRPT2Handle_8188E( - &pHalData->odmpriv, - precvframe->u.hdr.rx_data, - pattrib->pkt_len, - pattrib->MacIDValidEntry[0], - pattrib->MacIDValidEntry[1] - ); - - } - else if(pattrib->pkt_rpt_type == HIS_REPORT) - { - //DBG_8192C("%s , rx USB HISR \n",__FUNCTION__); - #ifdef CONFIG_SUPPORT_USB_INT - interrupt_handler_8188eu(padapter,pattrib->pkt_len,precvframe->u.hdr.rx_data); - #endif - } - rtw_free_recvframe(precvframe, pfree_recv_queue); - - } - - pkt_cnt--; - transfer_len -= pkt_offset; - pbuf += pkt_offset; - precvframe = NULL; - pkt_copy = NULL; - - if(transfer_len>0 && pkt_cnt==0) - pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; - - }while((transfer_len>0) && (pkt_cnt>0)); - -_exit_recvbuf2recvframe: - - return _SUCCESS; -} - -void rtl8188eu_recv_tasklet(void *priv) -{ - struct recv_buf *precvbuf = NULL; - _adapter *padapter = (_adapter*)priv; - struct recv_priv *precvpriv = &padapter->recvpriv; - - while (NULL != (precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue))) - { - if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) - { - DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n"); - - break; - } - - - recvbuf2recvframe(padapter, precvbuf); - - rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); - } - -} - -static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) -{ - struct recv_buf *precvbuf = (struct recv_buf *)purb->context; - _adapter *padapter =(_adapter *)precvbuf->adapter; - struct recv_priv *precvpriv = &padapter->recvpriv; - - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n")); - - precvpriv->rx_pending_cnt --; - - if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel) - { - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved)); - DBG_8192C("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n", - __FUNCTION__,padapter->bDriverStopped, padapter->bSurpriseRemoved,padapter->bReadPortCancel); - goto exit; - } - - if(purb->status==0)//SUCCESS - { - if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) - { - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n")); - - rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); - } - else - { - rtw_reset_continual_io_error(adapter_to_dvobj(padapter)); - - precvbuf->transfer_len = purb->actual_length; - - //rtw_enqueue_rx_transfer_buffer(precvpriv, rx_transfer_buf); - rtw_enqueue_recvbuf(precvbuf, &precvpriv->recv_buf_pending_queue); - - tasklet_schedule(&precvpriv->recv_tasklet); - } - } - else - { - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status)); - - DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status); - - if(rtw_inc_and_chk_continual_io_error(adapter_to_dvobj(padapter)) == _TRUE ){ - padapter->bSurpriseRemoved = _TRUE; - } - - switch(purb->status) { - case -EINVAL: - case -EPIPE: - case -ENODEV: - case -ESHUTDOWN: - //padapter->bSurpriseRemoved=_TRUE; - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); - case -ENOENT: - padapter->bDriverStopped=_TRUE; - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); - break; - case -EPROTO: - case -EILSEQ: - case -ETIME: - case -ECOMM: - case -EOVERFLOW: - #ifdef DBG_CONFIG_ERROR_DETECT - { - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL; - } - #endif - rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); - break; - case -EINPROGRESS: - DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); - break; - default: - break; - } - - } - -exit: - -_func_exit_; - -} - -static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) -{ - int err; - unsigned int pipe; - u32 ret = _SUCCESS; - PURB purb = NULL; - struct recv_buf *precvbuf = (struct recv_buf *)rmem; - _adapter *adapter = pintfhdl->padapter; - struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); - struct recv_priv *precvpriv = &adapter->recvpriv; - struct usb_device *pusbd = pdvobj->pusbdev; - -_func_enter_; - - if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||dvobj_to_pwrctl(pdvobj)->pnp_bstop_trx) - { - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||pwrctl->pnp_bstop_trx)!!!\n")); - return _FAIL; - } - - if(precvbuf !=NULL) - { - rtl8188eu_init_recvbuf(adapter, precvbuf); - - if(precvbuf->pbuf) - { - precvpriv->rx_pending_cnt++; - - purb = precvbuf->purb; - - //translate DMA FIFO addr to pipehandle - pipe = ffaddr2pipehdl(pdvobj, addr); - - usb_fill_bulk_urb(purb, pusbd, pipe, - precvbuf->pbuf, - MAX_RECVBUF_SZ, - usb_read_port_complete, - precvbuf);//context is precvbuf - - purb->transfer_dma = precvbuf->dma_transfer_addr; - purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; - - err = usb_submit_urb(purb, GFP_ATOMIC); - if((err) && (err != (-EPERM))) - { - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status)); - DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status); - ret = _FAIL; - } - - } - - } - else - { - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n")); - ret = _FAIL; - } - -_func_exit_; - - return ret; -} -#else // CONFIG_USE_USB_BUFFER_ALLOC_RX -static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb) -{ - u8 *pbuf; - u8 shift_sz = 0; - u16 pkt_cnt; - u32 pkt_offset, skb_len, alloc_sz; - s32 transfer_len; - struct recv_stat *prxstat; - struct phy_stat *pphy_status = NULL; - _pkt *pkt_copy = NULL; - union recv_frame *precvframe = NULL; - struct rx_pkt_attrib *pattrib = NULL; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - struct recv_priv *precvpriv = &padapter->recvpriv; - _queue *pfree_recv_queue = &precvpriv->free_recv_queue; - - - transfer_len = (s32)pskb->len; - pbuf = pskb->data; - - prxstat = (struct recv_stat *)pbuf; - pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; - -#if 0 //temp remove when disable usb rx aggregation - if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_lenrxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4)); - - prxstat = (struct recv_stat *)pbuf; - - precvframe = rtw_alloc_recvframe(pfree_recv_queue); - if(precvframe==NULL) - { - RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n")); - DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__); - goto _exit_recvbuf2recvframe; - } - - _rtw_init_listhead(&precvframe->u.hdr.list); - precvframe->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. - precvframe->u.hdr.len=0; - - //rtl8192c_query_rx_desc_status(precvframe, prxstat); - update_recvframe_attrib_88e(precvframe, prxstat); - - pattrib = &precvframe->u.hdr.attrib; - - if ((padapter->registrypriv.mp_mode == 0) &&((pattrib->crc_err) || (pattrib->icv_err))) - { - DBG_8192C("%s: RX Warning! crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); - - rtw_free_recvframe(precvframe, pfree_recv_queue); - goto _exit_recvbuf2recvframe; - } - - if( (pattrib->physt) && (pattrib->pkt_rpt_type == NORMAL_RX)) - { - pphy_status = (struct phy_stat *)(pbuf + RXDESC_OFFSET); - } - - pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len; - - if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len)) - { - RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n")); - DBG_8192C("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfoer_len \n", __FUNCTION__, __LINE__); - rtw_free_recvframe(precvframe, pfree_recv_queue); - goto _exit_recvbuf2recvframe; - } - - // Modified by Albert 20101213 - // For 8 bytes IP header alignment. - if (pattrib->qos) // Qos data, wireless lan header length is 26 - { - shift_sz = 6; - } - else - { - shift_sz = 0; - } - - skb_len = pattrib->pkt_len; - - // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. - // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 - if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ - //alloc_sz = 1664; //1664 is 128 alignment. - if(skb_len <= 1650) - alloc_sz = 1664; - else - alloc_sz = skb_len + 14; - } - else { - alloc_sz = skb_len; - // 6 is for IP header 8 bytes alignment in QoS packet case. - // 8 is for skb->data 4 bytes alignment. - alloc_sz += 14; - } - - pkt_copy = rtw_skb_alloc(alloc_sz); - - if(pkt_copy) - { - pkt_copy->dev = padapter->pnetdev; - precvframe->u.hdr.pkt = pkt_copy; - precvframe->u.hdr.rx_head = pkt_copy->data; - precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz; - skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address - skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. - _rtw_memcpy(pkt_copy->data, (pbuf + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len); - precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; - } - else - { - if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)) - { - DBG_8192C("recvbuf2recvframe: alloc_skb fail , drop frag frame \n"); - rtw_free_recvframe(precvframe, pfree_recv_queue); - goto _exit_recvbuf2recvframe; - } - - precvframe->u.hdr.pkt = rtw_skb_clone(pskb); - if(precvframe->u.hdr.pkt) - { - precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail - = pbuf+ pattrib->drvinfo_sz + RXDESC_SIZE; - precvframe->u.hdr.rx_end = pbuf +pattrib->drvinfo_sz + RXDESC_SIZE+ alloc_sz; - } - else - { - DBG_8192C("recvbuf2recvframe: rtw_skb_clone fail\n"); - rtw_free_recvframe(precvframe, pfree_recv_queue); - goto _exit_recvbuf2recvframe; - } - - } - - recvframe_put(precvframe, skb_len); - //recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); - -#ifdef CONFIG_USB_RX_AGGREGATION - switch(pHalData->UsbRxAggMode) - { - case USB_RX_AGG_DMA: - case USB_RX_AGG_MIX: - pkt_offset = (u16)_RND128(pkt_offset); - break; - case USB_RX_AGG_USB: - pkt_offset = (u16)_RND4(pkt_offset); - break; - case USB_RX_AGG_DISABLE: - default: - break; - } -#endif - - if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet - { -#ifdef CONFIG_CONCURRENT_MODE - if(rtw_buddy_adapter_up(padapter)) - { - if(pre_recv_entry(precvframe, prxstat, pphy_status) != _SUCCESS) - { - RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, - ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); - } - } - else -#endif - { - if (pattrib->physt) - update_recvframe_phyinfo_88e(precvframe, (struct phy_stat*)pphy_status); - if(rtw_recv_entry(precvframe) != _SUCCESS) - { - RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, - ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); - } - } - } - else{ // pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP - - //enqueue recvframe to txrtp queue - if(pattrib->pkt_rpt_type == TX_REPORT1){ - //DBG_8192C("rx CCX \n"); - //CCX-TXRPT ack for xmit mgmt frames. - handle_txrpt_ccx_88e(padapter, precvframe->u.hdr.rx_data); - } - else if(pattrib->pkt_rpt_type == TX_REPORT2){ - //DBG_8192C("rx TX RPT \n"); - ODM_RA_TxRPT2Handle_8188E( - &pHalData->odmpriv, - precvframe->u.hdr.rx_data, - pattrib->pkt_len, - pattrib->MacIDValidEntry[0], - pattrib->MacIDValidEntry[1] - ); - - } - else if(pattrib->pkt_rpt_type == HIS_REPORT) - { - //DBG_8192C("%s , rx USB HISR \n",__FUNCTION__); - #ifdef CONFIG_SUPPORT_USB_INT - interrupt_handler_8188eu(padapter,pattrib->pkt_len,precvframe->u.hdr.rx_data); - #endif - } - rtw_free_recvframe(precvframe, pfree_recv_queue); - - } - - pkt_cnt--; - transfer_len -= pkt_offset; - pbuf += pkt_offset; - precvframe = NULL; - pkt_copy = NULL; - - if(transfer_len>0 && pkt_cnt==0) - pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; - - }while((transfer_len>0) && (pkt_cnt>0)); - -_exit_recvbuf2recvframe: - - return _SUCCESS; -} - -void rtl8188eu_recv_tasklet(void *priv) -{ - _pkt *pskb; - _adapter *padapter = (_adapter*)priv; - struct recv_priv *precvpriv = &padapter->recvpriv; - - while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue))) - { - if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) - { - DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n"); - rtw_skb_free(pskb); - break; - } - - recvbuf2recvframe(padapter, pskb); - -#ifdef CONFIG_PREALLOC_RECV_SKB - - skb_reset_tail_pointer(pskb); - - pskb->len = 0; - - skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb); - -#else - rtw_skb_free(pskb); -#endif - - } - -} - - -static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) -{ - _irqL irqL; - uint isevt, *pbuf; - struct recv_buf *precvbuf = (struct recv_buf *)purb->context; - _adapter *padapter =(_adapter *)precvbuf->adapter; - struct recv_priv *precvpriv = &padapter->recvpriv; - - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n")); - - //_enter_critical(&precvpriv->lock, &irqL); - //precvbuf->irp_pending=_FALSE; - //precvpriv->rx_pending_cnt --; - //_exit_critical(&precvpriv->lock, &irqL); - - precvpriv->rx_pending_cnt --; - - //if(precvpriv->rx_pending_cnt== 0) - //{ - // RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: rx_pending_cnt== 0, set allrxreturnevt!\n")); - // _rtw_up_sema(&precvpriv->allrxreturnevt); - //} - - if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel) - { - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved)); - - #ifdef CONFIG_PREALLOC_RECV_SKB - precvbuf->reuse = _TRUE; - #else - if(precvbuf->pskb){ - DBG_8192C("==> free skb(%p)\n",precvbuf->pskb); - rtw_skb_free(precvbuf->pskb); - } - #endif - DBG_8192C("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n", - __FUNCTION__,padapter->bDriverStopped, padapter->bSurpriseRemoved,padapter->bReadPortCancel); - goto exit; - } - - if(purb->status==0)//SUCCESS - { - if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) - { - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n")); - precvbuf->reuse = _TRUE; - rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); - DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__); - } - else - { - rtw_reset_continual_io_error(adapter_to_dvobj(padapter)); - - precvbuf->transfer_len = purb->actual_length; - skb_put(precvbuf->pskb, purb->actual_length); - skb_queue_tail(&precvpriv->rx_skb_queue, precvbuf->pskb); - - if (skb_queue_len(&precvpriv->rx_skb_queue)<=1) - tasklet_schedule(&precvpriv->recv_tasklet); - - precvbuf->pskb = NULL; - precvbuf->reuse = _FALSE; - rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); - } - } - else - { - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status)); - - DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status); - - if(rtw_inc_and_chk_continual_io_error(adapter_to_dvobj(padapter)) == _TRUE ){ - padapter->bSurpriseRemoved = _TRUE; - } - - switch(purb->status) { - case -EINVAL: - case -EPIPE: - case -ENODEV: - case -ESHUTDOWN: - //padapter->bSurpriseRemoved=_TRUE; - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); - case -ENOENT: - padapter->bDriverStopped=_TRUE; - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); - break; - case -EPROTO: - case -EILSEQ: - case -ETIME: - case -ECOMM: - case -EOVERFLOW: - #ifdef DBG_CONFIG_ERROR_DETECT - { - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL; - } - #endif - precvbuf->reuse = _TRUE; - rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); - break; - case -EINPROGRESS: - DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); - break; - default: - break; - } - - } - -exit: - -_func_exit_; - -} - -static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) -{ - _irqL irqL; - int err; - unsigned int pipe; - SIZE_PTR tmpaddr=0; - SIZE_PTR alignment=0; - u32 ret = _SUCCESS; - PURB purb = NULL; - struct recv_buf *precvbuf = (struct recv_buf *)rmem; - _adapter *adapter = pintfhdl->padapter; - struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); - struct recv_priv *precvpriv = &adapter->recvpriv; - struct usb_device *pusbd = pdvobj->pusbdev; - - -_func_enter_; - - if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||dvobj_to_pwrctl(pdvobj)->pnp_bstop_trx) - { - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||pwrctl->pnp_bstop_trx)!!!\n")); - return _FAIL; - } - -#ifdef CONFIG_PREALLOC_RECV_SKB - if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL)) - { - if (NULL != (precvbuf->pskb = skb_dequeue(&precvpriv->free_recv_skb_queue))) - { - precvbuf->reuse = _TRUE; - } - } -#endif - - - if(precvbuf !=NULL) - { - rtl8188eu_init_recvbuf(adapter, precvbuf); - - //re-assign for linux based on skb - if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL)) - { - precvbuf->pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); - - if(precvbuf->pskb == NULL) - { - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("init_recvbuf(): alloc_skb fail!\n")); - DBG_8192C("#### usb_read_port() alloc_skb fail!#####\n"); - return _FAIL; - } - - tmpaddr = (SIZE_PTR)precvbuf->pskb->data; - alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); - skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment)); - - precvbuf->phead = precvbuf->pskb->head; - precvbuf->pdata = precvbuf->pskb->data; - precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); - precvbuf->pend = skb_end_pointer(precvbuf->pskb); - precvbuf->pbuf = precvbuf->pskb->data; - } - else//reuse skb - { - precvbuf->phead = precvbuf->pskb->head; - precvbuf->pdata = precvbuf->pskb->data; - precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); - precvbuf->pend = skb_end_pointer(precvbuf->pskb); - precvbuf->pbuf = precvbuf->pskb->data; - - precvbuf->reuse = _FALSE; - } - - //_enter_critical(&precvpriv->lock, &irqL); - //precvpriv->rx_pending_cnt++; - //precvbuf->irp_pending = _TRUE; - //_exit_critical(&precvpriv->lock, &irqL); - - precvpriv->rx_pending_cnt++; - - purb = precvbuf->purb; - - //translate DMA FIFO addr to pipehandle - pipe = ffaddr2pipehdl(pdvobj, addr); - - usb_fill_bulk_urb(purb, pusbd, pipe, - precvbuf->pbuf, - MAX_RECVBUF_SZ, - usb_read_port_complete, - precvbuf);//context is precvbuf - - err = usb_submit_urb(purb, GFP_ATOMIC); - if((err) && (err != (-EPERM))) - { - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status)); - DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status); - ret = _FAIL; - } - } - else - { - RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n")); - ret = _FAIL; - } - -_func_exit_; - - return ret; -} -#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX - -void rtl8188eu_xmit_tasklet(void *priv) -{ - int ret = _FALSE; - _adapter *padapter = (_adapter*)priv; - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - - if(check_fwstate(&padapter->mlmepriv, _FW_UNDER_SURVEY) == _TRUE) - return; - - while(1) - { - if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE) || (padapter->bWritePortCancel == _TRUE)) - { - DBG_8192C("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n"); - break; - } - - ret = rtl8188eu_xmitframe_complete(padapter, pxmitpriv, NULL); - - if(ret==_FALSE) - break; - - } - -} - -void rtl8188eu_set_intf_ops(struct _io_ops *pops) -{ - _func_enter_; - - _rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops)); - - pops->_read8 = &usb_read8; - pops->_read16 = &usb_read16; - pops->_read32 = &usb_read32; - pops->_read_mem = &usb_read_mem; - pops->_read_port = &usb_read_port; - - pops->_write8 = &usb_write8; - pops->_write16 = &usb_write16; - pops->_write32 = &usb_write32; - pops->_writeN = &usb_writeN; - -#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ - pops->_write8_async= &usb_async_write8; - pops->_write16_async = &usb_async_write16; - pops->_write32_async = &usb_async_write32; -#endif - pops->_write_mem = &usb_write_mem; - pops->_write_port = &usb_write_port; - - pops->_read_port_cancel = &usb_read_port_cancel; - pops->_write_port_cancel = &usb_write_port_cancel; - -#ifdef CONFIG_USB_INTERRUPT_IN_PIPE - pops->_read_interrupt = &usb_read_interrupt; -#endif - - _func_exit_; - -} - -void rtl8188eu_set_hw_type(_adapter *padapter) -{ - padapter->chip_type = RTL8188E; - padapter->HardwareType = HARDWARE_TYPE_RTL8188EU; - DBG_871X("CHIP TYPE: RTL8188E\n"); -} - diff --git a/hal/rtl8188e_cmd.c b/hal/rtl8188e_cmd.c old mode 100644 new mode 100755 index eed8109..4decacc --- a/hal/rtl8188e_cmd.c +++ b/hal/rtl8188e_cmd.c @@ -1,762 +1,1493 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _RTL8188E_CMD_C_ - -#include -#include -#include -#include -#include -#include - -#include - -#define RTL88E_MAX_H2C_BOX_NUMS 4 -#define RTL88E_MAX_CMD_LEN 7 -#define RTL88E_MESSAGE_BOX_SIZE 4 -#define RTL88E_EX_MESSAGE_BOX_SIZE 4 - -static u8 _is_fw_read_cmd_down(struct adapter *adapt, u8 msgbox_num) -{ - u8 read_down = false; - int retry_cnts = 100; - - u8 valid; - - do { - valid = rtw_read8(adapt, REG_HMETFR) & BIT(msgbox_num); - if (0 == valid) - read_down = true; - } while ((!read_down) && (retry_cnts--)); - - return read_down; -} - -/***************************************** -* H2C Msg format : -* 0x1DF - 0x1D0 -*| 31 - 8 | 7-5 4 - 0 | -*| h2c_msg |Class_ID CMD_ID | -* -* Extend 0x1FF - 0x1F0 -*|31 - 0 | -*|ext_msg| -******************************************/ -static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer) -{ - u8 bcmd_down = false; - s32 retry_cnts = 100; - u8 h2c_box_num; - u32 msgbox_addr; - u32 msgbox_ex_addr; - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - u8 cmd_idx, ext_cmd_len; - u32 h2c_cmd = 0; - u32 h2c_cmd_ex = 0; - s32 ret = _FAIL; - - if (!adapt->bFWReady) { - DBG_88E("FillH2CCmd_88E(): return H2C cmd because fw is not ready\n"); - return ret; - } - - if (!pCmdBuffer) - goto exit; - if (CmdLen > RTL88E_MAX_CMD_LEN) - goto exit; - if (adapt->bSurpriseRemoved) - goto exit; - - /* pay attention to if race condition happened in H2C cmd setting. */ - do { - h2c_box_num = haldata->LastHMEBoxNum; - - if (!_is_fw_read_cmd_down(adapt, h2c_box_num)) { - DBG_88E(" fw read cmd failed...\n"); - goto exit; - } - - *(u8 *)(&h2c_cmd) = ElementID; - - if (CmdLen <= 3) { - memcpy((u8 *)(&h2c_cmd)+1, pCmdBuffer, CmdLen); - } else { - memcpy((u8 *)(&h2c_cmd)+1, pCmdBuffer, 3); - ext_cmd_len = CmdLen-3; - memcpy((u8 *)(&h2c_cmd_ex), pCmdBuffer+3, ext_cmd_len); - - /* Write Ext command */ - msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num * RTL88E_EX_MESSAGE_BOX_SIZE); - for (cmd_idx = 0; cmd_idx < ext_cmd_len; cmd_idx++) { - rtw_write8(adapt, msgbox_ex_addr+cmd_idx, *((u8 *)(&h2c_cmd_ex)+cmd_idx)); - } - } - /* Write command */ - msgbox_addr = REG_HMEBOX_0 + (h2c_box_num * RTL88E_MESSAGE_BOX_SIZE); - for (cmd_idx = 0; cmd_idx < RTL88E_MESSAGE_BOX_SIZE; cmd_idx++) { - rtw_write8(adapt, msgbox_addr+cmd_idx, *((u8 *)(&h2c_cmd)+cmd_idx)); - } - bcmd_down = true; - - haldata->LastHMEBoxNum = (h2c_box_num+1) % RTL88E_MAX_H2C_BOX_NUMS; - - } while ((!bcmd_down) && (retry_cnts--)); - - ret = _SUCCESS; - -exit: - - return ret; -} - -u8 rtl8188e_set_rssi_cmd(struct adapter *adapt, u8 *param) -{ - u8 res = _SUCCESS; - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - - if (haldata->fw_ractrl) { - ; - } else { - DBG_88E("==>%s fw dont support RA\n", __func__); - res = _FAIL; - } - - return res; -} - -u8 rtl8188e_set_raid_cmd(struct adapter *adapt, u32 mask) -{ - u8 buf[3]; - u8 res = _SUCCESS; - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - - if (haldata->fw_ractrl) { - __le32 lmask; - - _rtw_memset(buf, 0, 3); - lmask = cpu_to_le32(mask); - memcpy(buf, &lmask, 3); - - FillH2CCmd_88E(adapt, H2C_DM_MACID_CFG, 3, buf); - } else { - DBG_88E("==>%s fw dont support RA\n", __func__); - res = _FAIL; - } - - return res; -} - -/* bitmap[0:27] = tx_rate_bitmap */ -/* bitmap[28:31]= Rate Adaptive id */ -/* arg[0:4] = macid */ -/* arg[5] = Short GI */ -void rtl8188e_Add_RateATid(struct adapter *pAdapter, u32 bitmap, u8 arg, u8 rssi_level) -{ - struct hal_data_8188e *haldata = GET_HAL_DATA(pAdapter); - - u8 macid, init_rate, raid, shortGIrate = false; - - macid = arg&0x1f; - - raid = (bitmap>>28) & 0x0f; - bitmap &= 0x0fffffff; - - if (rssi_level != DM_RATR_STA_INIT) - bitmap = ODM_Get_Rate_Bitmap(&haldata->odmpriv, macid, bitmap, rssi_level); - - bitmap |= ((raid<<28)&0xf0000000); - - init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f; - - shortGIrate = (arg&BIT(5)) ? true : false; - - if (shortGIrate) - init_rate |= BIT(6); - - raid = (bitmap>>28) & 0x0f; - - bitmap &= 0x0fffffff; - - DBG_88E("%s=> mac_id:%d, raid:%d, ra_bitmap=0x%x, shortGIrate=0x%02x\n", - __func__, macid, raid, bitmap, shortGIrate); - - ODM_RA_UpdateRateInfo_8188E(&(haldata->odmpriv), macid, raid, bitmap, shortGIrate); -} - -void rtl8188e_set_FwPwrMode_cmd(struct adapter *adapt, u8 Mode) -{ - struct setpwrmode_parm H2CSetPwrMode; - struct pwrctrl_priv *pwrpriv = &adapt->pwrctrlpriv; - u8 RLBM = 0; /* 0:Min, 1:Max, 2:User define */ - - DBG_88E("%s: Mode=%d SmartPS=%d UAPSD=%d\n", __func__, - Mode, pwrpriv->smart_ps, adapt->registrypriv.uapsd_enable); - - switch (Mode) { - case PS_MODE_ACTIVE: - H2CSetPwrMode.Mode = 0; - break; - case PS_MODE_MIN: - H2CSetPwrMode.Mode = 1; - break; - case PS_MODE_MAX: - RLBM = 1; - H2CSetPwrMode.Mode = 1; - break; - case PS_MODE_DTIM: - RLBM = 2; - H2CSetPwrMode.Mode = 1; - break; - case PS_MODE_UAPSD_WMM: - H2CSetPwrMode.Mode = 2; - break; - default: - H2CSetPwrMode.Mode = 0; - break; - } - - H2CSetPwrMode.SmartPS_RLBM = (((pwrpriv->smart_ps<<4)&0xf0) | (RLBM & 0x0f)); - - H2CSetPwrMode.AwakeInterval = 1; - - H2CSetPwrMode.bAllQueueUAPSD = adapt->registrypriv.uapsd_enable; - - if (Mode > 0) - H2CSetPwrMode.PwrState = 0x00;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */ - else - H2CSetPwrMode.PwrState = 0x0C;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */ - - FillH2CCmd_88E(adapt, H2C_PS_PWR_MODE, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode); - -} - -void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, __le16 mstatus_rpt) -{ - u8 opmode, macid; - u16 mst_rpt = le16_to_cpu(mstatus_rpt); - opmode = (u8) mst_rpt; - macid = (u8)(mst_rpt >> 8); - - DBG_88E("### %s: MStatus=%x MACID=%d\n", __func__, opmode, macid); - FillH2CCmd_88E(adapt, H2C_COM_MEDIA_STATUS_RPT, sizeof(mst_rpt), (u8 *)&mst_rpt); -} - -static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength) -{ - struct rtw_ieee80211_hdr *pwlanhdr; - __le16 *fctrl; - u32 rate_len, pktlen; - struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); - u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - - memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); - memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN); - memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); - - SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); - SetFrameSubType(pframe, WIFI_BEACON); - - pframe += sizeof(struct rtw_ieee80211_hdr_3addr); - pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); - - /* timestamp will be inserted by hardware */ - pframe += 8; - pktlen += 8; - - /* beacon interval: 2 bytes */ - memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); - - pframe += 2; - pktlen += 2; - - /* capability info: 2 bytes */ - memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); - - pframe += 2; - pktlen += 2; - - if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { - pktlen += cur_network->IELength - sizeof(struct ndis_802_11_fixed_ie); - memcpy(pframe, cur_network->IEs+sizeof(struct ndis_802_11_fixed_ie), pktlen); - - goto _ConstructBeacon; - } - - /* below for ad-hoc mode */ - - /* SSID */ - pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen); - - /* supported rates... */ - rate_len = rtw_get_rateset_len(cur_network->SupportedRates); - pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8) ? 8 : rate_len), cur_network->SupportedRates, &pktlen); - - /* DS parameter set */ - pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen); - - if ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) { - u32 ATIMWindow; - /* IBSS Parameter Set... */ - ATIMWindow = 0; - pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen); - } - - /* todo: ERP IE */ - - /* EXTERNDED SUPPORTED RATE */ - if (rate_len > 8) - pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); - - /* todo:HT for adhoc */ - -_ConstructBeacon: - - if ((pktlen + TXDESC_SIZE) > 512) { - DBG_88E("beacon frame too large\n"); - return; - } - - *pLength = pktlen; -} - -static void ConstructPSPoll(struct adapter *adapt, u8 *pframe, u32 *pLength) -{ - struct rtw_ieee80211_hdr *pwlanhdr; - struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - __le16 *fctrl; - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - /* Frame control. */ - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - SetPwrMgt(fctrl); - SetFrameSubType(pframe, WIFI_PSPOLL); - - /* AID. */ - SetDuration(pframe, (pmlmeinfo->aid | 0xc000)); - - /* BSSID. */ - memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - - /* TA. */ - memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN); - - *pLength = 16; -} - -static void ConstructNullFunctionData(struct adapter *adapt, u8 *pframe, - u32 *pLength, - u8 *StaAddr, - u8 bQoS, - u8 AC, - u8 bEosp, - u8 bForcePowerSave) -{ - struct rtw_ieee80211_hdr *pwlanhdr; - __le16 *fctrl; - u32 pktlen; - struct mlme_priv *pmlmepriv = &adapt->mlmepriv; - struct wlan_network *cur_network = &pmlmepriv->cur_network; - struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - fctrl = &pwlanhdr->frame_ctl; - *(fctrl) = 0; - if (bForcePowerSave) - SetPwrMgt(fctrl); - - switch (cur_network->network.InfrastructureMode) { - case Ndis802_11Infrastructure: - SetToDs(fctrl); - memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN); - memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN); - break; - case Ndis802_11APMode: - SetFrDs(fctrl); - memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); - memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - memcpy(pwlanhdr->addr3, myid(&(adapt->eeprompriv)), ETH_ALEN); - break; - case Ndis802_11IBSS: - default: - memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); - memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN); - memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); - break; - } - - SetSeqNum(pwlanhdr, 0); - - if (bQoS) { - struct rtw_ieee80211_hdr_3addr_qos *pwlanqoshdr; - - SetFrameSubType(pframe, WIFI_QOS_DATA_NULL); - - pwlanqoshdr = (struct rtw_ieee80211_hdr_3addr_qos *)pframe; - SetPriority(&pwlanqoshdr->qc, AC); - SetEOSP(&pwlanqoshdr->qc, bEosp); - - pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); - } else { - SetFrameSubType(pframe, WIFI_DATA_NULL); - - pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); - } - - *pLength = pktlen; -} - -static void ConstructProbeRsp(struct adapter *adapt, u8 *pframe, u32 *pLength, u8 *StaAddr, bool bHideSSID) -{ - struct rtw_ieee80211_hdr *pwlanhdr; - __le16 *fctrl; - u8 *mac, *bssid; - u32 pktlen; - struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); - - pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - - mac = myid(&(adapt->eeprompriv)); - bssid = cur_network->MacAddress; - - fctrl = &(pwlanhdr->frame_ctl); - *(fctrl) = 0; - memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); - memcpy(pwlanhdr->addr2, mac, ETH_ALEN); - memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); - - SetSeqNum(pwlanhdr, 0); - SetFrameSubType(fctrl, WIFI_PROBERSP); - - pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); - pframe += pktlen; - - if (cur_network->IELength > MAX_IE_SZ) - return; - - memcpy(pframe, cur_network->IEs, cur_network->IELength); - pframe += cur_network->IELength; - pktlen += cur_network->IELength; - - *pLength = pktlen; -} - -/* To check if reserved page content is destroyed by beacon because beacon is too large. */ -/* 2010.06.23. Added by tynli. */ -void CheckFwRsvdPageContent(struct adapter *Adapter) -{ -} - -/* */ -/* Description: Fill the reserved packets that FW will use to RSVD page. */ -/* Now we just send 4 types packet to rsvd page. */ -/* (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp. */ -/* Input: */ -/* bDLFinished - false: At the first time we will send all the packets as a large packet to Hw, */ -/* so we need to set the packet length to total length. */ -/* true: At the second time, we should send the first packet (default:beacon) */ -/* to Hw again and set the length in descriptor to the real beacon length. */ -/* 2009.10.15 by tynli. */ -static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished) -{ - struct hal_data_8188e *haldata; - struct xmit_frame *pmgntframe; - struct pkt_attrib *pattrib; - struct xmit_priv *pxmitpriv; - struct mlme_ext_priv *pmlmeext; - struct mlme_ext_info *pmlmeinfo; - u32 BeaconLength = 0, ProbeRspLength = 0, PSPollLength; - u32 NullDataLength, QosNullLength; - u8 *ReservedPagePacket; - u8 PageNum, PageNeed, TxDescLen; - u16 BufIndex; - u32 TotalPacketLen; - struct rsvdpage_loc RsvdPageLoc; - - DBG_88E("%s\n", __func__); - ReservedPagePacket = (u8 *)rtw_zmalloc(1000); - if (ReservedPagePacket == NULL) { - DBG_88E("%s: alloc ReservedPagePacket fail!\n", __func__); - return; - } - - haldata = GET_HAL_DATA(adapt); - pxmitpriv = &adapt->xmitpriv; - pmlmeext = &adapt->mlmeextpriv; - pmlmeinfo = &pmlmeext->mlmext_info; - - TxDescLen = TXDESC_SIZE; - PageNum = 0; - - /* 3 (1) beacon * 2 pages */ - BufIndex = TXDESC_OFFSET; - ConstructBeacon(adapt, &ReservedPagePacket[BufIndex], &BeaconLength); - - /* When we count the first page size, we need to reserve description size for the RSVD */ - /* packet, it will be filled in front of the packet in TXPKTBUF. */ - PageNeed = (u8)PageNum_128(TxDescLen + BeaconLength); - /* To reserved 2 pages for beacon buffer. 2010.06.24. */ - if (PageNeed == 1) - PageNeed += 1; - PageNum += PageNeed; - haldata->FwRsvdPageStartOffset = PageNum; - - BufIndex += PageNeed*128; - - /* 3 (2) ps-poll *1 page */ - RsvdPageLoc.LocPsPoll = PageNum; - ConstructPSPoll(adapt, &ReservedPagePacket[BufIndex], &PSPollLength); - rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, true, false); - - PageNeed = (u8)PageNum_128(TxDescLen + PSPollLength); - PageNum += PageNeed; - - BufIndex += PageNeed*128; - - /* 3 (3) null data * 1 page */ - RsvdPageLoc.LocNullData = PageNum; - ConstructNullFunctionData(adapt, &ReservedPagePacket[BufIndex], &NullDataLength, get_my_bssid(&pmlmeinfo->network), false, 0, 0, false); - rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex-TxDescLen], NullDataLength, false, false); - - PageNeed = (u8)PageNum_128(TxDescLen + NullDataLength); - PageNum += PageNeed; - - BufIndex += PageNeed*128; - - /* 3 (4) probe response * 1page */ - RsvdPageLoc.LocProbeRsp = PageNum; - ConstructProbeRsp(adapt, &ReservedPagePacket[BufIndex], &ProbeRspLength, get_my_bssid(&pmlmeinfo->network), false); - rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, false, false); - - PageNeed = (u8)PageNum_128(TxDescLen + ProbeRspLength); - PageNum += PageNeed; - - BufIndex += PageNeed*128; - - /* 3 (5) Qos null data */ - RsvdPageLoc.LocQosNull = PageNum; - ConstructNullFunctionData(adapt, &ReservedPagePacket[BufIndex], - &QosNullLength, get_my_bssid(&pmlmeinfo->network), true, 0, 0, false); - rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex-TxDescLen], QosNullLength, false, false); - - PageNeed = (u8)PageNum_128(TxDescLen + QosNullLength); - PageNum += PageNeed; - - TotalPacketLen = BufIndex + QosNullLength; - pmgntframe = alloc_mgtxmitframe(pxmitpriv); - if (pmgntframe == NULL) - goto exit; - - /* update attribute */ - pattrib = &pmgntframe->attrib; - update_mgntframe_attrib(adapt, pattrib); - pattrib->qsel = 0x10; - pattrib->last_txcmdsz = TotalPacketLen - TXDESC_OFFSET; - pattrib->pktlen = pattrib->last_txcmdsz; - memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen); - - rtw_hal_mgnt_xmit(adapt, pmgntframe); - - DBG_88E("%s: Set RSVD page location to Fw\n", __func__); - FillH2CCmd_88E(adapt, H2C_COM_RSVD_PAGE, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc); - -exit: - kfree(ReservedPagePacket); -} - -void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus) -{ - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - bool bSendBeacon = false; - bool bcn_valid = false; - u8 DLBcnCount = 0; - u32 poll = 0; - - DBG_88E("%s mstatus(%x)\n", __func__, mstatus); - - if (mstatus == 1) { - /* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */ - /* Suggested by filen. Added by tynli. */ - rtw_write16(adapt, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid)); - /* Do not set TSF again here or vWiFi beacon DMA INT will not work. */ - - /* Set REG_CR bit 8. DMA beacon by SW. */ - haldata->RegCR_1 |= BIT0; - rtw_write8(adapt, REG_CR+1, haldata->RegCR_1); - - /* Disable Hw protection for a time which revserd for Hw sending beacon. */ - /* Fix download reserved page packet fail that access collision with the protection time. */ - /* 2010.05.11. Added by tynli. */ - rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)&(~BIT(3))); - rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)|BIT(4)); - - if (haldata->RegFwHwTxQCtrl&BIT6) { - DBG_88E("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n"); - bSendBeacon = true; - } - - /* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */ - rtw_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl&(~BIT6))); - haldata->RegFwHwTxQCtrl &= (~BIT6); - - /* Clear beacon valid check bit. */ - rtw_hal_set_hwreg(adapt, HW_VAR_BCN_VALID, NULL); - DLBcnCount = 0; - poll = 0; - do { - /* download rsvd page. */ - SetFwRsvdPagePkt(adapt, false); - DLBcnCount++; - do { - rtw_yield_os(); - /* rtw_mdelay_os(10); */ - /* check rsvd page download OK. */ - rtw_hal_get_hwreg(adapt, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid)); - poll++; - } while (!bcn_valid && (poll%10) != 0 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped); - } while (!bcn_valid && DLBcnCount <= 100 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped); - - if (adapt->bSurpriseRemoved || adapt->bDriverStopped) - ; - else if (!bcn_valid) - DBG_88E("%s: 1 Download RSVD page failed! DLBcnCount:%u, poll:%u\n", __func__, DLBcnCount, poll); - else - DBG_88E("%s: 1 Download RSVD success! DLBcnCount:%u, poll:%u\n", __func__, DLBcnCount, poll); - /* */ - /* We just can send the reserved page twice during the time that Tx thread is stopped (e.g. pnpsetpower) */ - /* because we need to free the Tx BCN Desc which is used by the first reserved page packet. */ - /* At run time, we cannot get the Tx Desc until it is released in TxHandleInterrupt() so we will return */ - /* the beacon TCB in the following code. 2011.11.23. by tynli. */ - /* */ - - /* Enable Bcn */ - rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)|BIT(3)); - rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)&(~BIT(4))); - - /* To make sure that if there exists an adapter which would like to send beacon. */ - /* If exists, the origianl value of 0x422[6] will be 1, we should check this to */ - /* prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ - /* the beacon cannot be sent by HW. */ - /* 2010.06.23. Added by tynli. */ - if (bSendBeacon) { - rtw_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl|BIT6)); - haldata->RegFwHwTxQCtrl |= BIT6; - } - - /* Update RSVD page location H2C to Fw. */ - if (bcn_valid) { - rtw_hal_set_hwreg(adapt, HW_VAR_BCN_VALID, NULL); - DBG_88E("Set RSVD page location to Fw.\n"); - } - - /* Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. */ - /* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */ - haldata->RegCR_1 &= (~BIT0); - rtw_write8(adapt, REG_CR+1, haldata->RegCR_1); - } - -} - -void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state) -{ -#ifdef CONFIG_88EU_P2P - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - struct wifidirect_info *pwdinfo = &(adapt->wdinfo); - struct P2P_PS_Offload_t *p2p_ps_offload = &haldata->p2p_ps_offload; - u8 i; - - switch (p2p_ps_state) { - case P2P_PS_DISABLE: - DBG_88E("P2P_PS_DISABLE\n"); - _rtw_memset(p2p_ps_offload, 0, 1); - break; - case P2P_PS_ENABLE: - DBG_88E("P2P_PS_ENABLE\n"); - /* update CTWindow value. */ - if (pwdinfo->ctwindow > 0) { - p2p_ps_offload->CTWindow_En = 1; - rtw_write8(adapt, REG_P2P_CTWIN, pwdinfo->ctwindow); - } - - /* hw only support 2 set of NoA */ - for (i = 0; i < pwdinfo->noa_num; i++) { - /* To control the register setting for which NOA */ - rtw_write8(adapt, REG_NOA_DESC_SEL, (i << 4)); - if (i == 0) - p2p_ps_offload->NoA0_En = 1; - else - p2p_ps_offload->NoA1_En = 1; - - /* config P2P NoA Descriptor Register */ - rtw_write32(adapt, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]); - rtw_write32(adapt, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]); - rtw_write32(adapt, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]); - rtw_write8(adapt, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]); - } - - if ((pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0)) { - /* rst p2p circuit */ - rtw_write8(adapt, REG_DUAL_TSF_RST, BIT(4)); - - p2p_ps_offload->Offload_En = 1; - - if (pwdinfo->role == P2P_ROLE_GO) { - p2p_ps_offload->role = 1; - p2p_ps_offload->AllStaSleep = 0; - } else { - p2p_ps_offload->role = 0; - } - - p2p_ps_offload->discovery = 0; - } - break; - case P2P_PS_SCAN: - DBG_88E("P2P_PS_SCAN\n"); - p2p_ps_offload->discovery = 1; - break; - case P2P_PS_SCAN_DONE: - DBG_88E("P2P_PS_SCAN_DONE\n"); - p2p_ps_offload->discovery = 0; - pwdinfo->p2p_ps_state = P2P_PS_ENABLE; - break; - default: - break; - } - - FillH2CCmd_88E(adapt, H2C_PS_P2P_OFFLOAD, 1, (u8 *)p2p_ps_offload); -#endif - -} +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8188E_CMD_C_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define CONFIG_H2C_EF + +#define RTL88E_MAX_H2C_BOX_NUMS 4 +#define RTL88E_MAX_CMD_LEN 7 +#define RTL88E_MESSAGE_BOX_SIZE 4 +#define RTL88E_EX_MESSAGE_BOX_SIZE 4 +#define RTL88E_RSVDPAGE_SIZE 1024 + +static u8 _is_fw_read_cmd_down(_adapter* padapter, u8 msgbox_num) +{ + u8 read_down = _FALSE; + int retry_cnts = 100; + + u8 valid; + + //DBG_8192C(" _is_fw_read_cmd_down ,reg_1cc(%x),msg_box(%d)...\n",rtw_read8(padapter,REG_HMETFR),msgbox_num); + + do{ + valid = rtw_read8(padapter,REG_HMETFR) & BIT(msgbox_num); + if(0 == valid ){ + read_down = _TRUE; + } +#ifdef CONFIG_WOWLAN + rtw_msleep_os(2); +#endif + }while( (!read_down) && (retry_cnts--)); + + return read_down; + +} + + +/***************************************** +* H2C Msg format : +* 0x1DF - 0x1D0 +*| 31 - 8 | 7-5 4 - 0 | +*| h2c_msg |Class_ID CMD_ID | +* +* Extend 0x1FF - 0x1F0 +*|31 - 0 | +*|ext_msg| +******************************************/ +static s32 FillH2CCmd_88E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer) +{ + u8 bcmd_down = _FALSE; + s32 retry_cnts = 100; + u8 h2c_box_num; + u32 msgbox_addr; + u32 msgbox_ex_addr; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 cmd_idx,ext_cmd_len; + u32 h2c_cmd = 0; + u32 h2c_cmd_ex = 0; + s32 ret = _FAIL; + +_func_enter_; + + padapter = GET_PRIMARY_ADAPTER(padapter); + pHalData = GET_HAL_DATA(padapter); + + if(padapter->bFWReady == _FALSE) + { + DBG_8192C("FillH2CCmd_88E(): return H2C cmd because fw is not ready\n"); + return ret; + } + + _enter_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL); + + if (!pCmdBuffer) { + goto exit; + } + if (CmdLen > RTL88E_MAX_CMD_LEN) { + goto exit; + } + if (padapter->bSurpriseRemoved == _TRUE) + goto exit; + + //pay attention to if race condition happened in H2C cmd setting. + do{ + h2c_box_num = pHalData->LastHMEBoxNum; + + if(!_is_fw_read_cmd_down(padapter, h2c_box_num)){ + DBG_8192C(" fw read cmd failed...\n"); + goto exit; + } + + *(u8*)(&h2c_cmd) = ElementID; + + if(CmdLen<=3) + { + _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer, CmdLen ); + } + else{ + _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer,3); + ext_cmd_len = CmdLen-3; + _rtw_memcpy((u8*)(&h2c_cmd_ex), pCmdBuffer+3,ext_cmd_len ); + + //Write Ext command + msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num *RTL88E_EX_MESSAGE_BOX_SIZE); + #ifdef CONFIG_H2C_EF + for(cmd_idx=0;cmd_idxh2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" + // ,pHalData->LastHMEBoxNum ,CmdLen,msgbox_addr,h2c_cmd,msgbox_ex_addr,h2c_cmd_ex); + + pHalData->LastHMEBoxNum = (h2c_box_num+1) % RTL88E_MAX_H2C_BOX_NUMS; + + }while((!bcmd_down) && (retry_cnts--)); + + ret = _SUCCESS; + +exit: + + _exit_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL); + +_func_exit_; + + return ret; +} + +u8 rtl8192c_h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf) +{ + u8 ElementID, CmdLen; + u8 *pCmdBuffer; + struct cmd_msg_parm *pcmdmsg; + + if(!pbuf) + return H2C_PARAMETERS_ERROR; + + pcmdmsg = (struct cmd_msg_parm*)pbuf; + ElementID = pcmdmsg->eid; + CmdLen = pcmdmsg->sz; + pCmdBuffer = pcmdmsg->buf; + + FillH2CCmd_88E(padapter, ElementID, CmdLen, pCmdBuffer); + + return H2C_SUCCESS; +} +/* +#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED) +u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter *padapter ,u8 bfwpoll, u16 period) +{ + u8 res=_SUCCESS; + struct H2C_SS_RFOFF_PARAM param; + DBG_8192C("==>%s bfwpoll(%x)\n",__FUNCTION__,bfwpoll); + param.gpio_period = period;//Polling GPIO_11 period time + param.ROFOn = (_TRUE == bfwpoll)?1:0; + FillH2CCmd_88E(padapter, SELECTIVE_SUSPEND_ROF_CMD, sizeof(param), (u8*)(¶m)); + return res; +} +#endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED +*/ +u8 rtl8188e_set_rssi_cmd(_adapter*padapter, u8 *param) +{ + u8 res=_SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +_func_enter_; + + if(pHalData->fw_ractrl == _TRUE){ + #if 0 + *((u32*) param ) = cpu_to_le32( *((u32*) param ) ); + + FillH2CCmd_88E(padapter, RSSI_SETTING_EID, 3, param); + #endif + }else{ + DBG_8192C("==>%s fw dont support RA \n",__FUNCTION__); + res=_FAIL; + } + +_func_exit_; + + return res; +} + +u8 rtl8188e_set_raid_cmd(_adapter*padapter, u32 mask) +{ + u8 buf[3]; + u8 res=_SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +_func_enter_; + if(pHalData->fw_ractrl == _TRUE){ + _rtw_memset(buf, 0, 3); + mask = cpu_to_le32( mask ); + _rtw_memcpy(buf, &mask, 3); + + FillH2CCmd_88E(padapter, H2C_DM_MACID_CFG, 3, buf); + }else{ + DBG_8192C("==>%s fw dont support RA \n",__FUNCTION__); + res=_FAIL; + } + +_func_exit_; + + return res; + +} + +//bitmap[0:27] = tx_rate_bitmap +//bitmap[28:31]= Rate Adaptive id +//arg[0:4] = macid +//arg[5] = Short GI +void rtl8188e_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 rssi_level) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + //struct dm_priv *pdmpriv = &pHalData->dmpriv; + + u8 macid, init_rate, raid, shortGIrate=_FALSE; + + macid = arg&0x1f; + +#ifdef CONFIG_ODM_REFRESH_RAMASK + raid = (bitmap>>28) & 0x0f; + bitmap &=0x0fffffff; + + if(rssi_level != DM_RATR_STA_INIT) + bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv, macid, bitmap, rssi_level); + + bitmap |= ((raid<<28)&0xf0000000); +#endif //CONFIG_ODM_REFRESH_RAMASK + + + init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f; + + shortGIrate = (arg&BIT(5)) ? _TRUE:_FALSE; + + if (shortGIrate==_TRUE) + init_rate |= BIT(6); + + + //rtw_write8(pAdapter, (REG_INIDATA_RATE_SEL+macid), (u8)init_rate); + + raid = (bitmap>>28) & 0x0f; + + bitmap &= 0x0fffffff; + + DBG_871X("%s=> mac_id:%d , raid:%d , ra_bitmap=0x%x, shortGIrate=0x%02x\n", + __FUNCTION__,macid ,raid ,bitmap, shortGIrate); + + +#if(RATE_ADAPTIVE_SUPPORT == 1) + ODM_RA_UpdateRateInfo_8188E( + &(pHalData->odmpriv), + macid, + raid, + bitmap, + shortGIrate + ); +#endif + +} + +void rtl8188e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode) +{ + SETPWRMODE_PARM H2CSetPwrMode; + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + u8 RLBM = 0; // 0:Min, 1:Max , 2:User define +_func_enter_; + + DBG_871X("%s: Mode=%d SmartPS=%d UAPSD=%d\n", __FUNCTION__, + Mode, pwrpriv->smart_ps, padapter->registrypriv.uapsd_enable); + + H2CSetPwrMode.AwakeInterval = 2; //DTIM =1 + + switch(Mode) + { + case PS_MODE_ACTIVE: + H2CSetPwrMode.Mode = 0; + break; + case PS_MODE_MIN: + H2CSetPwrMode.Mode = 1; + break; + case PS_MODE_MAX: + RLBM = 1; + H2CSetPwrMode.Mode = 1; + break; + case PS_MODE_DTIM: + RLBM = 2; + H2CSetPwrMode.Mode = 1; + break; + case PS_MODE_UAPSD_WMM: + H2CSetPwrMode.Mode = 2; + break; + default: + H2CSetPwrMode.Mode = 0; + break; + } + + //H2CSetPwrMode.Mode = Mode; + + H2CSetPwrMode.SmartPS_RLBM = (((pwrpriv->smart_ps<<4)&0xf0) | (RLBM & 0x0f)); + + H2CSetPwrMode.bAllQueueUAPSD = padapter->registrypriv.uapsd_enable; + + if(Mode > 0) + { + H2CSetPwrMode.PwrState = 0x00;// AllON(0x0C), RFON(0x04), RFOFF(0x00) +#ifdef CONFIG_EXT_CLK + H2CSetPwrMode.Mode |= BIT(7);//supporting 26M XTAL CLK_Request feature. +#endif //CONFIG_EXT_CLK + } + else + H2CSetPwrMode.PwrState = 0x0C;// AllON(0x0C), RFON(0x04), RFOFF(0x00) + + FillH2CCmd_88E(padapter, H2C_PS_PWR_MODE, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode); + + +_func_exit_; +} + +void rtl8188e_set_FwMediaStatus_cmd(PADAPTER padapter, u16 mstatus_rpt ) +{ + u8 opmode,macid; + u16 mst_rpt = cpu_to_le16 (mstatus_rpt); + u32 reg_macid_no_link = REG_MACID_NO_LINK_0; + opmode = (u8) mst_rpt; + macid = (u8)(mst_rpt >> 8) ; + DBG_871X("### %s: MStatus=%x MACID=%d \n", __FUNCTION__,opmode,macid); + FillH2CCmd_88E(padapter, H2C_COM_MEDIA_STATUS_RPT, sizeof(mst_rpt), (u8 *)&mst_rpt); + + if(macid > 31){ + macid = macid-32; + reg_macid_no_link = REG_MACID_NO_LINK_1; + } + + //Delete select macid (MACID 0~63) from queue list. + if(opmode == 1)// 1:connect + { + rtw_write32(padapter,reg_macid_no_link, (rtw_read32(padapter,reg_macid_no_link) & (~BIT(macid)))); + } + else//0: disconnect + { + rtw_write32(padapter,reg_macid_no_link, (rtw_read32(padapter,reg_macid_no_link)|BIT(macid))); + } + + + +} + +void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u32 rate_len, pktlen; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); + u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + + + //DBG_871X("%s\n", __FUNCTION__); + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); + + SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); + //pmlmeext->mgnt_seq++; + SetFrameSubType(pframe, WIFI_BEACON); + + pframe += sizeof(struct rtw_ieee80211_hdr_3addr); + pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); + + //timestamp will be inserted by hardware + pframe += 8; + pktlen += 8; + + // beacon interval: 2 bytes + _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); + + pframe += 2; + pktlen += 2; + + // capability info: 2 bytes + _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); + + pframe += 2; + pktlen += 2; + + if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) + { + //DBG_871X("ie len=%d\n", cur_network->IELength); + pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs); + _rtw_memcpy(pframe, cur_network->IEs+sizeof(NDIS_802_11_FIXED_IEs), pktlen); + + goto _ConstructBeacon; + } + + //below for ad-hoc mode + + // SSID + pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen); + + // supported rates... + rate_len = rtw_get_rateset_len(cur_network->SupportedRates); + pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pktlen); + + // DS parameter set + pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen); + + if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) + { + u32 ATIMWindow; + // IBSS Parameter Set... + //ATIMWindow = cur->Configuration.ATIMWindow; + ATIMWindow = 0; + pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen); + } + + + //todo: ERP IE + + + // EXTERNDED SUPPORTED RATE + if (rate_len > 8) + { + pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); + } + + + //todo:HT for adhoc + +_ConstructBeacon: + + if ((pktlen + TXDESC_SIZE) > 512) + { + DBG_871X("beacon frame too large\n"); + return; + } + + *pLength = pktlen; + + //DBG_871X("%s bcn_sz=%d\n", __FUNCTION__, pktlen); + +} + +void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u32 pktlen; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + //DBG_871X("%s\n", __FUNCTION__); + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + // Frame control. + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + SetPwrMgt(fctrl); + SetFrameSubType(pframe, WIFI_PSPOLL); + + // AID. + SetDuration(pframe, (pmlmeinfo->aid | 0xc000)); + + // BSSID. + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + // TA. + _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + + *pLength = 16; +} + +void ConstructNullFunctionData( + PADAPTER padapter, + u8 *pframe, + u32 *pLength, + u8 *StaAddr, + u8 bQoS, + u8 AC, + u8 bEosp, + u8 bForcePowerSave) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u32 pktlen; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wlan_network *cur_network = &pmlmepriv->cur_network; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + + //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave); + + pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; + + fctrl = &pwlanhdr->frame_ctl; + *(fctrl) = 0; + if (bForcePowerSave) + { + SetPwrMgt(fctrl); + } + + switch(cur_network->network.InfrastructureMode) + { + case Ndis802_11Infrastructure: + SetToDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN); + break; + case Ndis802_11APMode: + SetFrDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); + break; + case Ndis802_11IBSS: + default: + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + break; + } + + SetSeqNum(pwlanhdr, 0); + + if (bQoS == _TRUE) { + struct rtw_ieee80211_hdr_3addr_qos *pwlanqoshdr; + + SetFrameSubType(pframe, WIFI_QOS_DATA_NULL); + + pwlanqoshdr = (struct rtw_ieee80211_hdr_3addr_qos*)pframe; + SetPriority(&pwlanqoshdr->qc, AC); + SetEOSP(&pwlanqoshdr->qc, bEosp); + + pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); + } else { + SetFrameSubType(pframe, WIFI_DATA_NULL); + + pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); + } + + *pLength = pktlen; +} + +void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bHideSSID) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u8 *mac, *bssid; + u32 pktlen; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); + + + //DBG_871X("%s\n", __FUNCTION__); + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + mac = myid(&(padapter->eeprompriv)); + bssid = cur_network->MacAddress; + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); + + SetSeqNum(pwlanhdr, 0); + SetFrameSubType(fctrl, WIFI_PROBERSP); + + pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); + pframe += pktlen; + + if(cur_network->IELength>MAX_IE_SZ) + return; + + _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); + pframe += cur_network->IELength; + pktlen += cur_network->IELength; + + *pLength = pktlen; +} + +#ifdef CONFIG_WOWLAN +// +// Description: +// Construct the ARP response packet to support ARP offload. +// +static void ConstructARPResponse( + PADAPTER padapter, + u8 *pframe, + u32 *pLength, + u8 *pIPAddress + ) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wlan_network *cur_network = &pmlmepriv->cur_network; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct security_priv *psecuritypriv = &padapter->securitypriv; + static u8 ARPLLCHeader[8] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x08, 0x06}; + + u16 *fctrl; + u32 pktlen; + u8 *pARPRspPkt = pframe; + //for TKIP Cal MIC + u8 *payload = pframe; + u8 EncryptionHeadOverhead = 0; + + pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; + + fctrl = &pwlanhdr->frame_ctl; + *(fctrl) = 0; + + //------------------------------------------------------------------------- + // MAC Header. + //------------------------------------------------------------------------- + SetFrameType(fctrl, WIFI_DATA); + //SetFrameSubType(fctrl, 0); + SetToDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + SetSeqNum(pwlanhdr, 0); + SetDuration(pwlanhdr, 0); + //SET_80211_HDR_FRAME_CONTROL(pARPRspPkt, 0); + //SET_80211_HDR_TYPE_AND_SUBTYPE(pARPRspPkt, Type_Data); + //SET_80211_HDR_TO_DS(pARPRspPkt, 1); + //SET_80211_HDR_ADDRESS1(pARPRspPkt, pMgntInfo->Bssid); + //SET_80211_HDR_ADDRESS2(pARPRspPkt, Adapter->CurrentAddress); + //SET_80211_HDR_ADDRESS3(pARPRspPkt, pMgntInfo->Bssid); + + //SET_80211_HDR_DURATION(pARPRspPkt, 0); + //SET_80211_HDR_FRAGMENT_SEQUENCE(pARPRspPkt, 0); + *pLength = 24; + +//YJ,del,120503 +#if 0 + //------------------------------------------------------------------------- + // Qos Header: leave space for it if necessary. + //------------------------------------------------------------------------- + if(pStaQos->CurrentQosMode > QOS_DISABLE) + { + SET_80211_HDR_QOS_EN(pARPRspPkt, 1); + PlatformZeroMemory(&(Buffer[*pLength]), sQoSCtlLng); + *pLength += sQoSCtlLng; + } +#endif + //------------------------------------------------------------------------- + // Security Header: leave space for it if necessary. + //------------------------------------------------------------------------- + + switch (psecuritypriv->dot11PrivacyAlgrthm) + { + case _WEP40_: + case _WEP104_: + EncryptionHeadOverhead = 4; + break; + case _TKIP_: + EncryptionHeadOverhead = 8; + break; + case _AES_: + EncryptionHeadOverhead = 8; + break; +#ifdef CONFIG_WAPI_SUPPORT + case _SMS4_: + EncryptionHeadOverhead = 18; + break; +#endif + default: + EncryptionHeadOverhead = 0; + } + + if(EncryptionHeadOverhead > 0) + { + _rtw_memset(&(pframe[*pLength]), 0,EncryptionHeadOverhead); + *pLength += EncryptionHeadOverhead; + //SET_80211_HDR_WEP(pARPRspPkt, 1); //Suggested by CCW. + SetPrivacy(fctrl); + } + + //------------------------------------------------------------------------- + // Frame Body. + //------------------------------------------------------------------------- + pARPRspPkt = (u8*)(pframe+ *pLength); + // LLC header + _rtw_memcpy(pARPRspPkt, ARPLLCHeader, 8); + *pLength += 8; + + // ARP element + pARPRspPkt += 8; + SET_ARP_PKT_HW(pARPRspPkt, 0x0100); + SET_ARP_PKT_PROTOCOL(pARPRspPkt, 0x0008); // IP protocol + SET_ARP_PKT_HW_ADDR_LEN(pARPRspPkt, 6); + SET_ARP_PKT_PROTOCOL_ADDR_LEN(pARPRspPkt, 4); + SET_ARP_PKT_OPERATION(pARPRspPkt, 0x0200); // ARP response + SET_ARP_PKT_SENDER_MAC_ADDR(pARPRspPkt, myid(&(padapter->eeprompriv))); + SET_ARP_PKT_SENDER_IP_ADDR(pARPRspPkt, pIPAddress); +#ifdef CONFIG_ARP_KEEP_ALIVE + if (rtw_gw_addr_query(padapter)==0) { + SET_ARP_PKT_TARGET_MAC_ADDR(pARPRspPkt, pmlmepriv->gw_mac_addr); + SET_ARP_PKT_TARGET_IP_ADDR(pARPRspPkt, pmlmepriv->gw_ip); + } + else +#endif + { + SET_ARP_PKT_TARGET_MAC_ADDR(pARPRspPkt, get_my_bssid(&(pmlmeinfo->network))); + SET_ARP_PKT_TARGET_IP_ADDR(pARPRspPkt, pIPAddress); + DBG_871X("%s Target Mac Addr:" MAC_FMT "\n", __FUNCTION__, MAC_ARG(get_my_bssid(&(pmlmeinfo->network)))); + DBG_871X("%s Target IP Addr" IP_FMT "\n", __FUNCTION__, IP_ARG(pIPAddress)); + } + *pLength += 28; + if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) + { + u8 mic[8]; + struct mic_data micdata; + struct sta_info *psta = NULL; + u8 priority[4]={0x0,0x0,0x0,0x0}; + u8 null_key[16]={0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}; + + DBG_871X("%s(): Add MIC\n",__FUNCTION__); + + psta = rtw_get_stainfo(&padapter->stapriv, get_my_bssid(&(pmlmeinfo->network))); + if (psta != NULL) { + if(_rtw_memcmp(&psta->dot11tkiptxmickey.skey[0],null_key, 16)==_TRUE){ + DBG_871X("%s(): STA dot11tkiptxmickey==0\n",__FUNCTION__); + } + //start to calculate the mic code + rtw_secmicsetkey(&micdata, &psta->dot11tkiptxmickey.skey[0]); + } + + rtw_secmicappend(&micdata, pwlanhdr->addr3, 6); //DA + + rtw_secmicappend(&micdata, pwlanhdr->addr2, 6); //SA + + priority[0]=0; + rtw_secmicappend(&micdata, &priority[0], 4); + + rtw_secmicappend(&micdata, payload, 36); //payload length = 8 + 28 + + rtw_secgetmic(&micdata,&(mic[0])); + + pARPRspPkt += 28; + _rtw_memcpy(pARPRspPkt, &(mic[0]),8); + + *pLength += 8; + } +} +#endif + +void rtl8188e_set_FwRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc) +{ + u8 u1H2CRsvdPageParm[H2C_8188E_RSVDPAGE_LOC_LEN]={0}; + u8 u1H2CAoacRsvdPageParm[H2C_8188E_AOAC_RSVDPAGE_LOC_LEN]={0}; + + //DBG_871X("8188RsvdPageLoc: PsPoll=%d Null=%d QoSNull=%d\n", + // rsvdpageloc->LocPsPoll, rsvdpageloc->LocNullData, rsvdpageloc->LocQosNull); + + SET_8188E_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1H2CRsvdPageParm, rsvdpageloc->LocPsPoll); + SET_8188E_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocNullData); + SET_8188E_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocQosNull); + + FillH2CCmd_88E(padapter, H2C_COM_RSVD_PAGE, H2C_8188E_RSVDPAGE_LOC_LEN, u1H2CRsvdPageParm); + +#ifdef CONFIG_WOWLAN + //DBG_871X("8188E_AOACRsvdPageLoc: RWC=%d ArpRsp=%d\n", rsvdpageloc->LocRemoteCtrlInfo, rsvdpageloc->LocArpRsp); + SET_8188E_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocRemoteCtrlInfo); + SET_8188E_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocArpRsp); + + FillH2CCmd_88E(padapter, H2C_COM_AOAC_RSVD_PAGE, H2C_8188E_AOAC_RSVDPAGE_LOC_LEN, u1H2CAoacRsvdPageParm); +#endif +} + +// To check if reserved page content is destroyed by beacon beacuse beacon is too large. +// 2010.06.23. Added by tynli. +VOID +CheckFwRsvdPageContent( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); + u32 MaxBcnPageNum; + + if(pHalData->FwRsvdPageStartOffset != 0) + { + /*MaxBcnPageNum = PageNum_128(pMgntInfo->MaxBeaconSize); + RT_ASSERT((MaxBcnPageNum <= pHalData->FwRsvdPageStartOffset), + ("CheckFwRsvdPageContent(): The reserved page content has been"\ + "destroyed by beacon!!! MaxBcnPageNum(%d) FwRsvdPageStartOffset(%d)\n!", + MaxBcnPageNum, pHalData->FwRsvdPageStartOffset));*/ + } +} + +// +// Description: Fill the reserved packets that FW will use to RSVD page. +// Now we just send 4 types packet to rsvd page. +// (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp. +// Input: +// bDLFinished - FALSE: At the first time we will send all the packets as a large packet to Hw, +// so we need to set the packet length to total lengh. +// TRUE: At the second time, we should send the first packet (default:beacon) +// to Hw again and set the lengh in descriptor to the real beacon lengh. +// 2009.10.15 by tynli. +static void SetFwRsvdPagePkt(PADAPTER padapter, BOOLEAN bDLFinished) +{ + PHAL_DATA_TYPE pHalData; + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + struct xmit_priv *pxmitpriv; + struct mlme_ext_priv *pmlmeext; + struct mlme_ext_info *pmlmeinfo; + u32 BeaconLength, ProbeRspLength, PSPollLength; + u32 NullDataLength, QosNullLength, BTQosNullLength; + u8 *ReservedPagePacket; + u8 PageNum, PageNeed, TxDescLen; + u16 BufIndex; + u32 TotalPacketLen; + RSVDPAGE_LOC RsvdPageLoc; +#ifdef CONFIG_WOWLAN + u32 ARPLegnth = 0; + struct security_priv *psecuritypriv = &padapter->securitypriv; + u8 currentip[4]; + u8 cur_dot11txpn[8]; +#endif + + DBG_871X("%s\n", __FUNCTION__); + + ReservedPagePacket = (u8*)rtw_zmalloc(RTL88E_RSVDPAGE_SIZE); + if (ReservedPagePacket == NULL) { + DBG_871X("%s: alloc ReservedPagePacket fail!\n", __FUNCTION__); + return; + } + + pHalData = GET_HAL_DATA(padapter); + pxmitpriv = &padapter->xmitpriv; + pmlmeext = &padapter->mlmeextpriv; + pmlmeinfo = &pmlmeext->mlmext_info; + + TxDescLen = TXDESC_SIZE; + PageNum = 0; + + //3 (1) beacon * 2 pages + BufIndex = TXDESC_OFFSET; + ConstructBeacon(padapter, &ReservedPagePacket[BufIndex], &BeaconLength); + + // When we count the first page size, we need to reserve description size for the RSVD + // packet, it will be filled in front of the packet in TXPKTBUF. + PageNeed = (u8)PageNum_128(TxDescLen + BeaconLength); + // To reserved 2 pages for beacon buffer. 2010.06.24. + if (PageNeed == 1) + PageNeed += 1; + PageNum += PageNeed; + pHalData->FwRsvdPageStartOffset = PageNum; + + BufIndex += PageNeed*128; + + //3 (2) ps-poll *1 page + RsvdPageLoc.LocPsPoll = PageNum; + ConstructPSPoll(padapter, &ReservedPagePacket[BufIndex], &PSPollLength); + rtl8188e_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, _TRUE, _FALSE); + + PageNeed = (u8)PageNum_128(TxDescLen + PSPollLength); + PageNum += PageNeed; + + BufIndex += PageNeed*128; + + //3 (3) null data * 1 page + RsvdPageLoc.LocNullData = PageNum; + ConstructNullFunctionData( + padapter, + &ReservedPagePacket[BufIndex], + &NullDataLength, + get_my_bssid(&pmlmeinfo->network), + _FALSE, 0, 0, _FALSE); + rtl8188e_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], NullDataLength, _FALSE, _FALSE); + + PageNeed = (u8)PageNum_128(TxDescLen + NullDataLength); + PageNum += PageNeed; + + BufIndex += PageNeed*128; + + //3 (5) Qos null data + RsvdPageLoc.LocQosNull = PageNum; + ConstructNullFunctionData( + padapter, + &ReservedPagePacket[BufIndex], + &QosNullLength, + get_my_bssid(&pmlmeinfo->network), + _TRUE, 0, 0, _FALSE); + rtl8188e_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], QosNullLength, _FALSE, _FALSE); + + PageNeed = (u8)PageNum_128(TxDescLen + QosNullLength); + PageNum += PageNeed; + + BufIndex += PageNeed*128; + +#ifdef CONFIG_WOWLAN + //3(7) ARP + rtw_get_current_ip_address(padapter, currentip); + RsvdPageLoc.LocArpRsp = PageNum; + ConstructARPResponse( + padapter, + &ReservedPagePacket[BufIndex], + &ARPLegnth, + currentip + ); + rtl8188e_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], ARPLegnth, _FALSE, _FALSE); + + switch (psecuritypriv->dot11PrivacyAlgrthm) + { + case _WEP40_: + case _WEP104_: + case _TKIP_: + ReservedPagePacket[BufIndex-TxDescLen+6] |= BIT(6); + break; + case _AES_: + ReservedPagePacket[BufIndex-TxDescLen+6] |= BIT(6)|BIT(7); + break; +#ifdef CONFIG_WAPI_SUPPORT + case _SMS4_: + ReservedPagePacket[BufIndex-TxDescLen+6] |= BIT(7); + break; +#endif + default: + ; + } + + PageNeed = (u8)PageNum_128(TxDescLen + ARPLegnth); + PageNum += PageNeed; + + BufIndex += PageNeed*128; + + //3(8) sec IV + rtw_get_sec_iv(padapter, cur_dot11txpn, get_my_bssid(&pmlmeinfo->network)); + RsvdPageLoc.LocRemoteCtrlInfo = PageNum; + _rtw_memcpy(ReservedPagePacket+BufIndex-TxDescLen, cur_dot11txpn, 8); + + TotalPacketLen = BufIndex-TxDescLen + sizeof (union pn48); //IV len +#else + TotalPacketLen = BufIndex + QosNullLength; +#endif + + pmgntframe = alloc_mgtxmitframe(pxmitpriv); + if (pmgntframe == NULL) + goto exit; + + // update attribute + pattrib = &pmgntframe->attrib; + update_mgntframe_attrib(padapter, pattrib); + pattrib->qsel = 0x10; + pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TXDESC_OFFSET; + + if (TotalPacketLen < RTL88E_RSVDPAGE_SIZE) + _rtw_memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen); + else + DBG_871X("%s: memory copy fail at Line: %d\n", __FUNCTION__, __LINE__); + + rtw_hal_mgnt_xmit(padapter, pmgntframe); + + DBG_871X("%s: Set RSVD page location to Fw\n", __FUNCTION__); + rtl8188e_set_FwRsvdPage_cmd(padapter, &RsvdPageLoc); + //FillH2CCmd_88E(padapter, H2C_COM_RSVD_PAGE, sizeof(RsvdPageLoc), (u8*)&RsvdPageLoc); + +exit: + rtw_mfree(ReservedPagePacket, RTL88E_RSVDPAGE_SIZE); +} + +void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus) +{ + JOINBSSRPT_PARM JoinBssRptParm; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +#ifdef CONFIG_WOWLAN + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct sta_info *psta = NULL; +#endif + BOOLEAN bSendBeacon=_FALSE; + BOOLEAN bcn_valid = _FALSE; + u8 DLBcnCount=0; + u32 poll = 0; + +_func_enter_; + + DBG_871X("%s mstatus(%x)\n", __FUNCTION__,mstatus); + + if(mstatus == 1) + { + // We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. + // Suggested by filen. Added by tynli. + rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid)); + // Do not set TSF again here or vWiFi beacon DMA INT will not work. + //correct_TSF(padapter, pmlmeext); + // Hw sequende enable by dedault. 2010.06.23. by tynli. + //rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF)); + //rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); + + //Set REG_CR bit 8. DMA beacon by SW. + pHalData->RegCR_1 |= BIT0; + rtw_write8(padapter, REG_CR+1, pHalData->RegCR_1); + + // Disable Hw protection for a time which revserd for Hw sending beacon. + // Fix download reserved page packet fail that access collision with the protection time. + // 2010.05.11. Added by tynli. + //SetBcnCtrlReg(padapter, 0, BIT3); + //SetBcnCtrlReg(padapter, BIT4, 0); + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3))); + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)); + + if(pHalData->RegFwHwTxQCtrl&BIT6) + { + DBG_871X("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n"); + bSendBeacon = _TRUE; + } + + // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&(~BIT6))); + pHalData->RegFwHwTxQCtrl &= (~BIT6); + + // Clear beacon valid check bit. + rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); + DLBcnCount = 0; + poll = 0; + do + { + // download rsvd page. + SetFwRsvdPagePkt(padapter, _FALSE); + DLBcnCount++; + do + { + rtw_yield_os(); + //rtw_mdelay_os(10); + // check rsvd page download OK. + rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid)); + poll++; + } while(!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); + + }while(!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); + + //RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage88ES(): 1 Download RSVD page failed!\n")); + if(padapter->bSurpriseRemoved || padapter->bDriverStopped) + { + } + else if(!bcn_valid) + DBG_871X("%s: 1 Download RSVD page failed! DLBcnCount:%u, poll:%u\n", __FUNCTION__ ,DLBcnCount, poll); + else + DBG_871X("%s: 1 Download RSVD success! DLBcnCount:%u, poll:%u\n", __FUNCTION__, DLBcnCount, poll); + // + // We just can send the reserved page twice during the time that Tx thread is stopped (e.g. pnpsetpower) + // becuase we need to free the Tx BCN Desc which is used by the first reserved page packet. + // At run time, we cannot get the Tx Desc until it is released in TxHandleInterrupt() so we will return + // the beacon TCB in the following code. 2011.11.23. by tynli. + // + //if(bcn_valid && padapter->bEnterPnpSleep) + if(0) + { + if(bSendBeacon) + { + rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); + DLBcnCount = 0; + poll = 0; + do + { + SetFwRsvdPagePkt(padapter, _TRUE); + DLBcnCount++; + + do + { + rtw_yield_os(); + //rtw_mdelay_os(10); + // check rsvd page download OK. + rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid)); + poll++; + } while(!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); + }while(!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); + + //RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage(): 2 Download RSVD page failed!\n")); + if(padapter->bSurpriseRemoved || padapter->bDriverStopped) + { + } + else if(!bcn_valid) + DBG_871X("%s: 2 Download RSVD page failed! DLBcnCount:%u, poll:%u\n", __FUNCTION__ ,DLBcnCount, poll); + else + DBG_871X("%s: 2 Download RSVD success! DLBcnCount:%u, poll:%u\n", __FUNCTION__, DLBcnCount, poll); + } + } + + // Enable Bcn + //SetBcnCtrlReg(padapter, BIT3, 0); + //SetBcnCtrlReg(padapter, 0, BIT4); + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3)); + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(4))); + + // To make sure that if there exists an adapter which would like to send beacon. + // If exists, the origianl value of 0x422[6] will be 1, we should check this to + // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause + // the beacon cannot be sent by HW. + // 2010.06.23. Added by tynli. + if(bSendBeacon) + { + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6)); + pHalData->RegFwHwTxQCtrl |= BIT6; + } + + // + // Update RSVD page location H2C to Fw. + // + if(bcn_valid) + { + rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); + DBG_871X("Set RSVD page location to Fw.\n"); + //FillH2CCmd88E(Adapter, H2C_88E_RSVDPAGE, H2C_RSVDPAGE_LOC_LENGTH, pMgntInfo->u1RsvdPageLoc); + } + + // Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. + //if(!padapter->bEnterPnpSleep) + { + // Clear CR[8] or beacon packet will not be send to TxBuf anymore. + pHalData->RegCR_1 &= (~BIT0); + rtw_write8(padapter, REG_CR+1, pHalData->RegCR_1); + } + } +#ifdef CONFIG_WOWLAN + if (adapter_to_pwrctl(padapter)->wowlan_mode){ + JoinBssRptParm.OpMode = mstatus; + psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(pmlmepriv)); + if (psta != NULL) { + JoinBssRptParm.MacID = psta->mac_id; + } else { + JoinBssRptParm.MacID = 0; + } + FillH2CCmd_88E(padapter, H2C_COM_MEDIA_STATUS_RPT, sizeof(JoinBssRptParm), (u8 *)&JoinBssRptParm); + DBG_871X_LEVEL(_drv_info_, "%s opmode:%d MacId:%d\n", __func__, JoinBssRptParm.OpMode, JoinBssRptParm.MacID); + } else { + DBG_871X_LEVEL(_drv_info_, "%s wowlan_mode is off\n", __func__); + } +#endif //CONFIG_WOWLAN +_func_exit_; +} + +#ifdef CONFIG_P2P_PS +void rtl8188e_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); + struct P2P_PS_Offload_t *p2p_ps_offload = &pHalData->p2p_ps_offload; + u8 i; + +_func_enter_; + +#if 1 + switch(p2p_ps_state) + { + case P2P_PS_DISABLE: + DBG_8192C("P2P_PS_DISABLE \n"); + _rtw_memset(p2p_ps_offload, 0 ,1); + break; + case P2P_PS_ENABLE: + DBG_8192C("P2P_PS_ENABLE \n"); + // update CTWindow value. + if( pwdinfo->ctwindow > 0 ) + { + p2p_ps_offload->CTWindow_En = 1; + rtw_write8(padapter, REG_P2P_CTWIN, pwdinfo->ctwindow); + } + + // hw only support 2 set of NoA + for( i=0 ; inoa_num ; i++) + { + // To control the register setting for which NOA + rtw_write8(padapter, REG_NOA_DESC_SEL, (i << 4)); + if(i == 0) + p2p_ps_offload->NoA0_En = 1; + else + p2p_ps_offload->NoA1_En = 1; + + // config P2P NoA Descriptor Register + //DBG_8192C("%s(): noa_duration = %x\n",__FUNCTION__,pwdinfo->noa_duration[i]); + rtw_write32(padapter, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]); + + //DBG_8192C("%s(): noa_interval = %x\n",__FUNCTION__,pwdinfo->noa_interval[i]); + rtw_write32(padapter, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]); + + //DBG_8192C("%s(): start_time = %x\n",__FUNCTION__,pwdinfo->noa_start_time[i]); + rtw_write32(padapter, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]); + + //DBG_8192C("%s(): noa_count = %x\n",__FUNCTION__,pwdinfo->noa_count[i]); + rtw_write8(padapter, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]); + } + + if( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) ) + { + // rst p2p circuit + rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4)); + + p2p_ps_offload->Offload_En = 1; + + if(pwdinfo->role == P2P_ROLE_GO) + { + p2p_ps_offload->role= 1; + p2p_ps_offload->AllStaSleep = 0; + } + else + { + p2p_ps_offload->role= 0; + } + + p2p_ps_offload->discovery = 0; + } + break; + case P2P_PS_SCAN: + DBG_8192C("P2P_PS_SCAN \n"); + p2p_ps_offload->discovery = 1; + break; + case P2P_PS_SCAN_DONE: + DBG_8192C("P2P_PS_SCAN_DONE \n"); + p2p_ps_offload->discovery = 0; + pwdinfo->p2p_ps_state = P2P_PS_ENABLE; + break; + default: + break; + } + + FillH2CCmd_88E(padapter, H2C_PS_P2P_OFFLOAD, 1, (u8 *)p2p_ps_offload); +#endif + +_func_exit_; + +} +#endif //CONFIG_P2P_PS + +#ifdef CONFIG_TSF_RESET_OFFLOAD +/* + ask FW to Reset sync register at Beacon early interrupt +*/ +u8 rtl8188e_reset_tsf(_adapter *padapter, u8 reset_port ) +{ + u8 buf[2]; + u8 res=_SUCCESS; + + s32 ret; +_func_enter_; + if (IFACE_PORT0==reset_port) { + buf[0] = 0x1; buf[1] = 0; + } else{ + buf[0] = 0x0; buf[1] = 0x1; + } + + ret = FillH2CCmd_88E(padapter, H2C_RESET_TSF, 2, buf); + +_func_exit_; + + return res; +} + +int reset_tsf(PADAPTER Adapter, u8 reset_port ) +{ + u8 reset_cnt_before = 0, reset_cnt_after = 0, loop_cnt = 0; + u32 reg_reset_tsf_cnt = (IFACE_PORT0==reset_port) ? + REG_FW_RESET_TSF_CNT_0:REG_FW_RESET_TSF_CNT_1; + u32 reg_bcncrtl = (IFACE_PORT0==reset_port) ? + REG_BCN_CTRL_1:REG_BCN_CTRL; + + rtw_scan_abort(Adapter->pbuddy_adapter); /* site survey will cause reset_tsf fail */ + reset_cnt_after = reset_cnt_before = rtw_read8(Adapter,reg_reset_tsf_cnt); + rtl8188e_reset_tsf(Adapter, reset_port); + + while ((reset_cnt_after == reset_cnt_before ) && (loop_cnt < 10)) { + rtw_msleep_os(100); + loop_cnt++; + reset_cnt_after = rtw_read8(Adapter, reg_reset_tsf_cnt); + } + + return(loop_cnt >= 10) ? _FAIL : _TRUE; +} + + +#endif // CONFIG_TSF_RESET_OFFLOAD + +#ifdef CONFIG_WOWLAN +#ifdef CONFIG_GPIO_WAKEUP +void rtl8188es_set_output_gpio(_adapter* padapter, u8 index, u8 outputval) +{ + if ( index <= 7 ) { + /* config GPIO mode */ + rtw_write8(padapter, REG_GPIO_PIN_CTRL + 3, rtw_read8(padapter, REG_GPIO_PIN_CTRL + 3) & ~BIT(index) ); + + /* config GPIO Sel */ + /* 0: input */ + /* 1: output */ + rtw_write8(padapter, REG_GPIO_PIN_CTRL + 2, rtw_read8(padapter, REG_GPIO_PIN_CTRL + 2) | BIT(index)); + + /* set output value */ + if ( outputval ) { + rtw_write8(padapter, REG_GPIO_PIN_CTRL + 1, rtw_read8(padapter, REG_GPIO_PIN_CTRL + 1) | BIT(index)); + } else { + rtw_write8(padapter, REG_GPIO_PIN_CTRL + 1, rtw_read8(padapter, REG_GPIO_PIN_CTRL + 1) & ~BIT(index)); + } + } else { + /* 88C Series: */ + /* index: 11~8 transform to 3~0 */ + /* 8723 Series: */ + /* index: 12~8 transform to 4~0 */ + index -= 8; + + /* config GPIO mode */ + rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 3, rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 3) & ~BIT(index) ); + + /* config GPIO Sel */ + /* 0: input */ + /* 1: output */ + rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 2, rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 2) | BIT(index)); + + /* set output value */ + if ( outputval ) { + rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 1, rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 1) | BIT(index)); + } else { + rtw_write8(padapter, REG_GPIO_PIN_CTRL_2 + 1, rtw_read8(padapter, REG_GPIO_PIN_CTRL_2 + 1) & ~BIT(index)); + } + } +} +#endif //CONFIG_GPIO_WAKEUP + +void rtl8188es_set_wowlan_cmd(_adapter* padapter, u8 enable) +{ + u8 res=_SUCCESS; + u32 test=0; + struct recv_priv *precvpriv = &padapter->recvpriv; + SETWOWLAN_PARM pwowlan_parm; + SETAOAC_GLOBAL_INFO paoac_global_info_parm; + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + struct security_priv *psecpriv = &padapter->securitypriv; +#ifdef CONFIG_GPIO_WAKEUP + u8 gpio_wake_pin = 7; + u8 gpio_high_active = 0; //default low active +#endif + +_func_enter_; + DBG_871X_LEVEL(_drv_always_, "+%s+\n", __func__); + + pwowlan_parm.mode =0; + pwowlan_parm.gpio_index=0; + pwowlan_parm.gpio_duration=0; + pwowlan_parm.second_mode =0; + pwowlan_parm.reserve=0; + + if(enable){ + + pwowlan_parm.mode |=FW_WOWLAN_FUN_EN; + pwrpriv->wowlan_magic =_TRUE; + if (psecpriv->dot11PrivacyAlgrthm == _WEP40_ || psecpriv->dot11PrivacyAlgrthm == _WEP104_) + pwrpriv->wowlan_unicast =_TRUE; + + if(pwrpriv->wowlan_pattern ==_TRUE){ + pwowlan_parm.mode |= FW_WOWLAN_PATTERN_MATCH; + DBG_871X_LEVEL(_drv_info_, "%s 2.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); + } + if(pwrpriv->wowlan_magic ==_TRUE){ + pwowlan_parm.mode |=FW_WOWLAN_MAGIC_PKT; + DBG_871X_LEVEL(_drv_info_, "%s 3.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); + } + if(pwrpriv->wowlan_unicast ==_TRUE){ + pwowlan_parm.mode |=FW_WOWLAN_UNICAST; + DBG_871X_LEVEL(_drv_info_, "%s 4.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); + } + + pwowlan_parm.mode |=FW_WOWLAN_REKEY_WAKEUP; + pwowlan_parm.mode |=FW_WOWLAN_DEAUTH_WAKEUP; + + //DataPinWakeUp +#ifdef CONFIG_USB_HCI + pwowlan_parm.gpio_index=0x0; +#endif //CONFIG_USB_HCI + +#ifdef CONFIG_SDIO_HCI + pwowlan_parm.gpio_index = 0x80; +#endif //CONFIG_SDIO_HCI + +#ifdef CONFIG_GPIO_WAKEUP + pwowlan_parm.gpio_index = gpio_wake_pin; + + //WOWLAN_GPIO_ACTIVE means GPIO high active + //pwowlan_parm.mode |=FW_WOWLAN_GPIO_ACTIVE; + if (gpio_high_active) + pwowlan_parm.mode |=FW_WOWLAN_GPIO_ACTIVE; +#endif //CONFIG_GPIO_WAKEUP + + DBG_871X_LEVEL(_drv_info_, "%s 5.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode); + DBG_871X_LEVEL(_drv_info_, "%s 6.pwowlan_parm.index=0x%x \n",__FUNCTION__,pwowlan_parm.gpio_index); + res = FillH2CCmd_88E(padapter, H2C_COM_WWLAN, 2, (u8 *)&pwowlan_parm); + + rtw_msleep_os(2); + + //disconnect decision + pwowlan_parm.mode =1; + pwowlan_parm.gpio_index=0; + pwowlan_parm.gpio_duration=0; + FillH2CCmd_88E(padapter, H2C_COM_DISCNT_DECISION, 3, (u8 *)&pwowlan_parm); + + //keep alive period = 10 * 10 BCN interval + pwowlan_parm.mode = FW_WOWLAN_KEEP_ALIVE_EN | FW_ADOPT_USER | FW_WOWLAN_KEEP_ALIVE_PKT_TYPE; + pwowlan_parm.gpio_index=10; + res = FillH2CCmd_88E(padapter, H2C_COM_KEEP_ALIVE, 2, (u8 *)&pwowlan_parm); + + rtw_msleep_os(2); + //Configure STA security information for GTK rekey wakeup event. + paoac_global_info_parm.pairwiseEncAlg= + padapter->securitypriv.dot11PrivacyAlgrthm; + paoac_global_info_parm.groupEncAlg= + padapter->securitypriv.dot118021XGrpPrivacy; + res = FillH2CCmd_88E(padapter, H2C_COM_AOAC_GLOBAL_INFO, 2, (u8 *)&paoac_global_info_parm); + + rtw_msleep_os(2); + //enable Remote wake ctrl + pwowlan_parm.mode = FW_REMOTE_WAKE_CTRL_EN | FW_WOW_FW_UNICAST_EN | FW_ARP_EN; + if (psecpriv->dot11PrivacyAlgrthm == _AES_ || psecpriv->dot11PrivacyAlgrthm == _NO_PRIVACY_) + { + pwowlan_parm.gpio_index=0; + } else { + pwowlan_parm.gpio_index=1; + } + pwowlan_parm.gpio_duration=0; + + res = FillH2CCmd_88E(padapter, H2C_COM_REMOTE_WAKE_CTRL, 3, (u8 *)&pwowlan_parm); + } else { + pwrpriv->wowlan_magic =_FALSE; +#ifdef CONFIG_GPIO_WAKEUP + rtl8188es_set_output_gpio(padapter, gpio_wake_pin, !gpio_high_active); +#endif //CONFIG_GPIO_WAKEUP + res = FillH2CCmd_88E(padapter, H2C_COM_WWLAN, 2, (u8 *)&pwowlan_parm); + rtw_msleep_os(2); + res = FillH2CCmd_88E(padapter, H2C_COM_REMOTE_WAKE_CTRL, 3, (u8 *)&pwowlan_parm); + } +_func_exit_; + DBG_871X_LEVEL(_drv_always_, "-%s res:%d-\n", __func__, res); + return ; +} +#endif //CONFIG_WOWLAN diff --git a/hal/rtl8188e_dm.c b/hal/rtl8188e_dm.c old mode 100644 new mode 100755 index 7945bae..dcff835 --- a/hal/rtl8188e_dm.c +++ b/hal/rtl8188e_dm.c @@ -1,267 +1,647 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -/* */ -/* Description: */ -/* */ -/* This file is for 92CE/92CU dynamic mechanism only */ -/* */ -/* */ -/* */ -#define _RTL8188E_DM_C_ - -#include -#include - -#include - -static void dm_CheckStatistics(struct adapter *Adapter) -{ -} - -/* Initialize GPIO setting registers */ -static void dm_InitGPIOSetting(struct adapter *Adapter) -{ - u8 tmp1byte; - - tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG); - tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); - - rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); -} - -/* */ -/* functions */ -/* */ -static void Init_ODM_ComInfo_88E(struct adapter *Adapter) -{ - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &hal_data->dmpriv; - struct odm_dm_struct *dm_odm = &(hal_data->odmpriv); - u8 cut_ver, fab_ver; - - /* Init Value */ - _rtw_memset(dm_odm, 0, sizeof(*dm_odm)); - - dm_odm->Adapter = Adapter; - - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_PLATFORM, ODM_CE); - - if (Adapter->interface_type == RTW_GSPI) - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO); - else - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_INTERFACE, Adapter->interface_type);/* RTL871X_HCI_TYPE */ - - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8188E); - - fab_ver = ODM_TSMC; - cut_ver = ODM_CUT_A; - - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_FAB_VER, fab_ver); - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_CUT_VER, cut_ver); - - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(hal_data->VersionID)); - - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_PATCH_ID, hal_data->CustomerID); - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_BWIFI_TEST, Adapter->registrypriv.wifi_spec); - - if (hal_data->rf_type == RF_1T1R) - ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R); - else if (hal_data->rf_type == RF_2T2R) - ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R); - else if (hal_data->rf_type == RF_1T2R) - ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R); - - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType); - - pdmpriv->InitODMFlag = ODM_RF_CALIBRATION | - ODM_RF_TX_PWR_TRACK; - - ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_ABILITY, pdmpriv->InitODMFlag); -} - -static void Update_ODM_ComInfo_88E(struct adapter *Adapter) -{ - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv; - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); - struct odm_dm_struct *dm_odm = &(hal_data->odmpriv); - struct dm_priv *pdmpriv = &hal_data->dmpriv; - int i; - - pdmpriv->InitODMFlag = ODM_BB_DIG | - ODM_BB_RA_MASK | - ODM_BB_DYNAMIC_TXPWR | - ODM_BB_FA_CNT | - ODM_BB_RSSI_MONITOR | - ODM_BB_CCK_PD | - ODM_BB_PWR_SAVE | - ODM_MAC_EDCA_TURBO | - ODM_RF_CALIBRATION | - ODM_RF_TX_PWR_TRACK; - if (hal_data->AntDivCfg) - pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV; - - if (Adapter->registrypriv.mp_mode == 1) { - pdmpriv->InitODMFlag = ODM_RF_CALIBRATION | - ODM_RF_TX_PWR_TRACK; - } - - ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_ABILITY, pdmpriv->InitODMFlag); - - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_TX_UNI, &(Adapter->xmitpriv.tx_bytes)); - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_RX_UNI, &(Adapter->recvpriv.rx_bytes)); - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_WM_MODE, &(pmlmeext->cur_wireless_mode)); - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &(hal_data->nCur40MhzPrimeSC)); - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SEC_MODE, &(Adapter->securitypriv.dot11PrivacyAlgrthm)); - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_BW, &(hal_data->CurrentChannelBW)); - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_CHNL, &(hal_data->CurrentChannel)); - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_NET_CLOSED, &(Adapter->net_closed)); - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_MP_MODE, &(Adapter->registrypriv.mp_mode)); - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SCAN, &(pmlmepriv->bScanInProcess)); - ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_POWER_SAVING, &(pwrctrlpriv->bpower_saving)); - ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType); - - for (i = 0; i < NUM_STA; i++) - ODM_CmnInfoPtrArrayHook(dm_odm, ODM_CMNINFO_STA_STATUS, i, NULL); -} - -void rtl8188e_InitHalDm(struct adapter *Adapter) -{ - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &hal_data->dmpriv; - struct odm_dm_struct *dm_odm = &(hal_data->odmpriv); - - dm_InitGPIOSetting(Adapter); - pdmpriv->DM_Type = DM_Type_ByDriver; - pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE; - Update_ODM_ComInfo_88E(Adapter); - ODM_DMInit(dm_odm); - Adapter->fix_rate = 0xFF; -} - -void rtl8188e_HalDmWatchDog(struct adapter *Adapter) -{ - bool fw_cur_in_ps = false; - bool fw_ps_awake = true; - u8 hw_init_completed = false; - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); - - - hw_init_completed = Adapter->hw_init_completed; - - if (!hw_init_completed) - goto skip_dm; - - fw_cur_in_ps = Adapter->pwrctrlpriv.bFwCurrentInPSMode; - rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&fw_ps_awake)); - - /* Fw is under p2p powersaving mode, driver should stop dynamic mechanism. */ - /* modifed by thomas. 2011.06.11. */ - if (Adapter->wdinfo.p2p_ps_mode) - fw_ps_awake = false; - - if (hw_init_completed && ((!fw_cur_in_ps) && fw_ps_awake)) { - /* Calculate Tx/Rx statistics. */ - dm_CheckStatistics(Adapter); - - - } - - /* ODM */ - if (hw_init_completed) { - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - u8 bLinked = false; - - if ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) || - (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))) { - if (Adapter->stapriv.asoc_sta_count > 2) - bLinked = true; - } else {/* Station mode */ - if (check_fwstate(pmlmepriv, _FW_LINKED)) - bLinked = true; - } - - ODM_CmnInfoUpdate(&hal_data->odmpriv, ODM_CMNINFO_LINK, bLinked); - ODM_DMWatchdog(&hal_data->odmpriv); - } -skip_dm: - /* Check GPIO to determine current RF on/off and Pbc status. */ - /* Check Hardware Radio ON/OFF or not */ - return; -} - -void rtl8188e_init_dm_priv(struct adapter *Adapter) -{ - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &hal_data->dmpriv; - struct odm_dm_struct *podmpriv = &hal_data->odmpriv; - - _rtw_memset(pdmpriv, 0, sizeof(struct dm_priv)); - Init_ODM_ComInfo_88E(Adapter); - ODM_InitDebugSetting(podmpriv); -} - -void rtl8188e_deinit_dm_priv(struct adapter *Adapter) -{ -} - -/* Add new function to reset the state of antenna diversity before link. */ -/* Compare RSSI for deciding antenna */ -void AntDivCompare8188E(struct adapter *Adapter, struct wlan_bssid_ex *dst, struct wlan_bssid_ex *src) -{ - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); - - if (0 != hal_data->AntDivCfg) { - /* select optimum_antenna for before linked =>For antenna diversity */ - if (dst->Rssi >= src->Rssi) {/* keep org parameter */ - src->Rssi = dst->Rssi; - src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna; - } - } -} - -/* Add new function to reset the state of antenna diversity before link. */ -u8 AntDivBeforeLink8188E(struct adapter *Adapter) -{ - struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter); - struct odm_dm_struct *dm_odm = &hal_data->odmpriv; - struct sw_ant_switch *dm_swat_tbl = &dm_odm->DM_SWAT_Table; - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - - /* Condition that does not need to use antenna diversity. */ - if (hal_data->AntDivCfg == 0) - return false; - - if (check_fwstate(pmlmepriv, _FW_LINKED)) - return false; - - if (dm_swat_tbl->SWAS_NoLink_State == 0) { - /* switch channel */ - dm_swat_tbl->SWAS_NoLink_State = 1; - dm_swat_tbl->CurAntenna = (dm_swat_tbl->CurAntenna == Antenna_A) ? Antenna_B : Antenna_A; - - rtw_antenna_select_cmd(Adapter, dm_swat_tbl->CurAntenna, false); - return true; - } else { - dm_swat_tbl->SWAS_NoLink_State = 0; - return false; - } -} +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +//============================================================ +// Description: +// +// This file is for 92CE/92CU dynamic mechanism only +// +// +//============================================================ +#define _RTL8188E_DM_C_ + +//============================================================ +// include files +//============================================================ +#include +#include +#include +#include + +#include + +//============================================================ +// Global var +//============================================================ + + +static VOID +dm_CheckProtection( + IN PADAPTER Adapter + ) +{ +#if 0 + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + u1Byte CurRate, RateThreshold; + + if(pMgntInfo->pHTInfo->bCurBW40MHz) + RateThreshold = MGN_MCS1; + else + RateThreshold = MGN_MCS3; + + if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold) + { + pMgntInfo->bDmDisableProtect = TRUE; + DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); + } + else + { + pMgntInfo->bDmDisableProtect = FALSE; + DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); + } +#endif +} + +static VOID +dm_CheckStatistics( + IN PADAPTER Adapter + ) +{ +#if 0 + if(!Adapter->MgntInfo.bMediaConnect) + return; + + //2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly. + rtw_hal_get_hwreg( Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate) ); + + // Calculate current Tx Rate(Successful transmited!!) + + // Calculate current Rx Rate(Successful received!!) + + //for tx tx retry count + rtw_hal_get_hwreg( Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount) ); +#endif +} + +static void dm_CheckPbcGPIO(_adapter *padapter) +{ + u8 tmp1byte; + u8 bPbcPressed = _FALSE; + + if(!padapter->registrypriv.hw_wps_pbc) + return; + +#ifdef CONFIG_USB_HCI + tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); + tmp1byte |= (HAL_8188E_HW_GPIO_WPS_BIT); + rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as output mode + + tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT); + rtw_write8(padapter, GPIO_IN, tmp1byte); //reset the floating voltage level + + tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); + tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT); + rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as input mode + + tmp1byte =rtw_read8(padapter, GPIO_IN); + + if (tmp1byte == 0xff) + return ; + + if (tmp1byte&HAL_8188E_HW_GPIO_WPS_BIT) + { + bPbcPressed = _TRUE; + } +#else + tmp1byte = rtw_read8(padapter, GPIO_IN); + //RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte)); + + if (tmp1byte == 0xff || padapter->init_adpt_in_progress) + return ; + + if((tmp1byte&HAL_8188E_HW_GPIO_WPS_BIT)==0) + { + bPbcPressed = _TRUE; + } +#endif + + if( _TRUE == bPbcPressed) + { + // Here we only set bPbcPressed to true + // After trigger PBC, the variable will be set to false + DBG_8192C("CheckPbcGPIO - PBC is pressed\n"); + +#ifdef RTK_DMP_PLATFORM +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) + kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_NET_PBC); +#else + kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_NET_PBC); +#endif +#else + + if ( padapter->pid[0] == 0 ) + { // 0 is the default value and it means the application monitors the HW PBC doesn't privde its pid to driver. + return; + } + rtw_signal_process(padapter->pid[0], SIGUSR1); +#endif + } +} + +#ifdef CONFIG_PCI_HCI +// +// Description: +// Perform interrupt migration dynamically to reduce CPU utilization. +// +// Assumption: +// 1. Do not enable migration under WIFI test. +// +// Created by Roger, 2010.03.05. +// +VOID +dm_InterruptMigration( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + BOOLEAN bCurrentIntMt, bCurrentACIntDisable; + BOOLEAN IntMtToSet = _FALSE; + BOOLEAN ACIntToSet = _FALSE; + + + // Retrieve current interrupt migration and Tx four ACs IMR settings first. + bCurrentIntMt = pHalData->bInterruptMigration; + bCurrentACIntDisable = pHalData->bDisableTxInt; + + // + // Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics + // when interrupt migration is set before. 2010.03.05. + // + if(!Adapter->registrypriv.wifi_spec && + (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && + pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) + { + IntMtToSet = _TRUE; + + // To check whether we should disable Tx interrupt or not. + if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic ) + ACIntToSet = _TRUE; + } + + //Update current settings. + if( bCurrentIntMt != IntMtToSet ){ + DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet); + if(IntMtToSet) + { + // + // Set interrrupt migration timer and corresponging Tx/Rx counter. + // timer 25ns*0xfa0=100us for 0xf packets. + // 2010.03.05. + // + rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx + pHalData->bInterruptMigration = IntMtToSet; + } + else + { + // Reset all interrupt migration settings. + rtw_write32(Adapter, REG_INT_MIG, 0); + pHalData->bInterruptMigration = IntMtToSet; + } + } + + /*if( bCurrentACIntDisable != ACIntToSet ){ + DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet); + if(ACIntToSet) // Disable four ACs interrupts. + { + // + // Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. + // When extremely highly Rx OK occurs, we will disable Tx interrupts. + // 2010.03.05. + // + UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS ); + pHalData->bDisableTxInt = ACIntToSet; + } + else// Enable four ACs interrupts. + { + UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 ); + pHalData->bDisableTxInt = ACIntToSet; + } + }*/ + +} + +#endif + +// +// Initialize GPIO setting registers +// +static void +dm_InitGPIOSetting( + IN PADAPTER Adapter + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + + u8 tmp1byte; + + tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG); + tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); + +#ifdef CONFIG_BT_COEXIST + // UMB-B cut bug. We need to support the modification. + if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) && + pHalData->bt_coexist.BT_Coexist) + { + tmp1byte |= (BIT5); + } +#endif + rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); + +} + +//============================================================ +// functions +//============================================================ +static void Init_ODM_ComInfo_88E(PADAPTER Adapter) +{ + + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); + u8 cut_ver,fab_ver; + + // + // Init Value + // + _rtw_memset(pDM_Odm,0,sizeof(pDM_Odm)); + + pDM_Odm->Adapter = Adapter; + + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PLATFORM,ODM_CE); + + if(Adapter->interface_type == RTW_GSPI ) + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,ODM_ITRF_SDIO); + else + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,Adapter->interface_type);//RTL871X_HCI_TYPE + + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_IC_TYPE,ODM_RTL8188E); + + fab_ver = ODM_TSMC; + cut_ver = ODM_CUT_A; + + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_FAB_VER,fab_ver); + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_CUT_VER,cut_ver); + + ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP,IS_NORMAL_CHIP(pHalData->VersionID)); + +#if 0 +//#ifdef CONFIG_USB_HCI + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BOARD_TYPE,pHalData->BoardType); + + if(pHalData->BoardType == BOARD_USB_High_PA){ + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_LNA,_TRUE); + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_PA,_TRUE); + } +#endif + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PATCH_ID,pHalData->CustomerID); + // ODM_CMNINFO_BINHCT_TEST only for MP Team + ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BWIFI_TEST,Adapter->registrypriv.wifi_spec); + + + if(pHalData->rf_type == RF_1T1R){ + ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T1R); + } + else if(pHalData->rf_type == RF_2T2R){ + ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_2T2R); + } + else if(pHalData->rf_type == RF_1T2R){ + ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T2R); + } + + ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType); + + #ifdef CONFIG_DISABLE_ODM + pdmpriv->InitODMFlag = 0; + #else + pdmpriv->InitODMFlag = ODM_RF_CALIBRATION | + ODM_RF_TX_PWR_TRACK //| + ; + //if(pHalData->AntDivCfg) + // pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV; + #endif + + ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag); + +} +static void Update_ODM_ComInfo_88E(PADAPTER Adapter) +{ + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + int i; + + pdmpriv->InitODMFlag = 0 + | ODM_BB_DIG +#ifdef CONFIG_ODM_REFRESH_RAMASK + | ODM_BB_RA_MASK +#endif + | ODM_BB_DYNAMIC_TXPWR + | ODM_BB_FA_CNT + | ODM_BB_RSSI_MONITOR + | ODM_BB_CCK_PD + | ODM_BB_PWR_SAVE + | ODM_RF_CALIBRATION + | ODM_RF_TX_PWR_TRACK +#ifdef CONFIG_ODM_ADAPTIVITY + | ODM_BB_ADAPTIVITY +#endif + ; + + if (!Adapter->registrypriv.qos_opt_enable) { + pdmpriv->InitODMFlag |= ODM_MAC_EDCA_TURBO; + } + + if(pHalData->AntDivCfg) + pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV; + +#if (MP_DRIVER==1) + if (Adapter->registrypriv.mp_mode == 1) { + pdmpriv->InitODMFlag = 0 + | ODM_RF_CALIBRATION + | ODM_RF_TX_PWR_TRACK + ; + } +#endif//(MP_DRIVER==1) + +#ifdef CONFIG_DISABLE_ODM + pdmpriv->InitODMFlag = 0; +#endif//CONFIG_DISABLE_ODM + + ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag); + + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_TX_UNI,&(Adapter->xmitpriv.tx_bytes)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_RX_UNI,&(Adapter->recvpriv.rx_bytes)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_WM_MODE,&(pmlmeext->cur_wireless_mode)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_SEC_CHNL_OFFSET,&(pHalData->nCur40MhzPrimeSC)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_SEC_MODE,&(Adapter->securitypriv.dot11PrivacyAlgrthm)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BW,&(pHalData->CurrentChannelBW )); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_CHNL,&( pHalData->CurrentChannel)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_NET_CLOSED,&( Adapter->net_closed)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_MP_MODE,&(Adapter->registrypriv.mp_mode)); + + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BAND,&(pDM_Odm->u1Byte_temp)); + //================= only for 8192D ================= + /* + //pHalData->CurrentBandType92D + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BAND,&(pDM_Odm->u1Byte_temp)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_DMSP_GET_VALUE,&(pDM_Odm->u1Byte_temp)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BUDDY_ADAPTOR,&(pDM_Odm->PADAPTER_temp)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_DMSP_IS_MASTER,&(pDM_Odm->u1Byte_temp)); + //================= only for 8192D ================= + // driver havn't those variable now + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BT_OPERATION,&(pDM_Odm->u1Byte_temp)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BT_DISABLE_EDCA,&(pDM_Odm->u1Byte_temp)); + */ + + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_SCAN,&(pmlmepriv->bScanInProcess)); + ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_POWER_SAVING,&(pwrctrlpriv->bpower_saving)); + ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType); + + for(i=0; i< NUM_STA; i++) + { + //pDM_Odm->pODM_StaInfo[i] = NULL; + ODM_CmnInfoPtrArrayHook(pDM_Odm, ODM_CMNINFO_STA_STATUS,i,NULL); + } +} + +void +rtl8188e_InitHalDm( + IN PADAPTER Adapter + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); + u8 i; + +#ifdef CONFIG_USB_HCI + dm_InitGPIOSetting(Adapter); +#endif + + pdmpriv->DM_Type = DM_Type_ByDriver; + pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE; + + Update_ODM_ComInfo_88E(Adapter); + ODM_DMInit(pDM_Odm); + + Adapter->fix_rate = 0xFF; + +} + + +VOID +rtl8188e_HalDmWatchDog( + IN PADAPTER Adapter + ) +{ + BOOLEAN bFwCurrentInPSMode = _FALSE; + BOOLEAN bFwPSAwake = _TRUE; + u8 hw_init_completed = _FALSE; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); +#ifdef CONFIG_CONCURRENT_MODE + PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; +#endif //CONFIG_CONCURRENT_MODE + + _func_enter_; + + hw_init_completed = Adapter->hw_init_completed; + + if (hw_init_completed == _FALSE) + goto skip_dm; + +#ifdef CONFIG_LPS + bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode; + rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake)); +#endif + +#ifdef CONFIG_P2P_PS + // Fw is under p2p powersaving mode, driver should stop dynamic mechanism. + // modifed by thomas. 2011.06.11. + if(Adapter->wdinfo.p2p_ps_mode) + bFwPSAwake = _FALSE; +#endif //CONFIG_P2P_PS + + if( (hw_init_completed == _TRUE) + && ((!bFwCurrentInPSMode) && bFwPSAwake)) + { + // + // Calculate Tx/Rx statistics. + // + dm_CheckStatistics(Adapter); + + // + // Dynamically switch RTS/CTS protection. + // + //dm_CheckProtection(Adapter); + +#ifdef CONFIG_PCI_HCI + // 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. + // Tx Migration settings. + //dm_InterruptMigration(Adapter); + + //if(Adapter->HalFunc.TxCheckStuckHandler(Adapter)) + // PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); +#endif + + } + + + //ODM + if (hw_init_completed == _TRUE) + { + u8 bLinked=_FALSE; + u8 bsta_state = _FALSE; + + #ifdef CONFIG_DISABLE_ODM + pHalData->odmpriv.SupportAbility = 0; + #endif + + if(rtw_linked_check(Adapter)) + bLinked = _TRUE; + +#ifdef CONFIG_CONCURRENT_MODE + if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter)) + bLinked = _TRUE; +#endif //CONFIG_CONCURRENT_MODE + ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked); + + + if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE)) + bsta_state = _TRUE; +#ifdef CONFIG_CONCURRENT_MODE + if(pbuddy_adapter && check_fwstate(&pbuddy_adapter->mlmepriv, WIFI_STATION_STATE)) + bsta_state = _TRUE; +#endif //CONFIG_CONCURRENT_MODE + ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_STATION_STATE, bsta_state); + + ODM_DMWatchdog(&pHalData->odmpriv); + + } + +skip_dm: + + // Check GPIO to determine current RF on/off and Pbc status. + // Check Hardware Radio ON/OFF or not +#ifdef CONFIG_PCI_HCI + if(pHalData->bGpioHwWpsPbc) +#endif + { + //temp removed + //dm_CheckPbcGPIO(Adapter); + } + return; +} + +void rtl8188e_init_dm_priv(IN PADAPTER Adapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PDM_ODM_T podmpriv = &pHalData->odmpriv; + _rtw_memset(pdmpriv, 0, sizeof(struct dm_priv)); + //_rtw_spinlock_init(&(pHalData->odm_stainfo_lock)); + Init_ODM_ComInfo_88E(Adapter); +#ifdef CONFIG_SW_ANTENNA_DIVERSITY + //_init_timer(&(pdmpriv->SwAntennaSwitchTimer), Adapter->pnetdev , odm_SW_AntennaSwitchCallback, Adapter); + ODM_InitAllTimers(podmpriv ); +#endif + ODM_InitDebugSetting(podmpriv); +} + +void rtl8188e_deinit_dm_priv(IN PADAPTER Adapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PDM_ODM_T podmpriv = &pHalData->odmpriv; + //_rtw_spinlock_free(&pHalData->odm_stainfo_lock); +#ifdef CONFIG_SW_ANTENNA_DIVERSITY + //_cancel_timer_ex(&pdmpriv->SwAntennaSwitchTimer); + ODM_CancelAllTimers(podmpriv); +#endif +} + + +#ifdef CONFIG_ANTENNA_DIVERSITY +// Add new function to reset the state of antenna diversity before link. +// +// Compare RSSI for deciding antenna +void AntDivCompare8188E(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src) +{ + //PADAPTER Adapter = pDM_Odm->Adapter ; + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + if(0 != pHalData->AntDivCfg ) + { + //DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi), + // src->Rssi,query_rx_pwr_percentage(src->Rssi)); + //select optimum_antenna for before linked =>For antenna diversity + if(dst->Rssi >= src->Rssi )//keep org parameter + { + src->Rssi = dst->Rssi; + src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna; + } + } +} + +// Add new function to reset the state of antenna diversity before link. +u8 AntDivBeforeLink8188E(PADAPTER Adapter ) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm =&pHalData->odmpriv; + SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + + // Condition that does not need to use antenna diversity. + if(pHalData->AntDivCfg==0) + { + //DBG_8192C("odm_AntDivBeforeLink8192C(): No AntDiv Mechanism.\n"); + return _FALSE; + } + + if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) + { + return _FALSE; + } + + + if(pDM_SWAT_Table->SWAS_NoLink_State == 0){ + //switch channel + pDM_SWAT_Table->SWAS_NoLink_State = 1; + pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; + + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna); + rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, _FALSE); + //DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B"); + return _TRUE; + } + else + { + pDM_SWAT_Table->SWAS_NoLink_State = 0; + return _FALSE; + } + +} +#endif + diff --git a/hal/rtl8188e_hal_init.c b/hal/rtl8188e_hal_init.c old mode 100644 new mode 100755 index 8d28898..1e38e22 --- a/hal/rtl8188e_hal_init.c +++ b/hal/rtl8188e_hal_init.c @@ -19,434 +19,652 @@ ******************************************************************************/ #define _HAL_INIT_C_ -#include #include +#include #include #include #include +#if defined(CONFIG_IOL) +#ifdef CONFIG_USB_HCI #include - -static void iol_mode_enable(struct adapter *padapter, u8 enable) +#endif +static void iol_mode_enable(PADAPTER padapter, u8 enable) { u8 reg_0xf0 = 0; - - if (enable) { - /* Enable initial offload */ + + if(enable) + { + //Enable initial offload reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG); + //DBG_871X("%s reg_0xf0:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0xf0, reg_0xf0|SW_OFFLOAD_EN); rtw_write8(padapter, REG_SYS_CFG, reg_0xf0|SW_OFFLOAD_EN); - - if (!padapter->bFWReady) { - DBG_88E("bFWReady == false call reset 8051...\n"); + + if(padapter->bFWReady == _FALSE) + { + printk("bFWReady == _FALSE call reset 8051...\n"); _8051Reset88E(padapter); - } - - } else { - /* disable initial offload */ + } + + } + else + { + //disable initial offload reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG); + //DBG_871X("%s reg_0xf0:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0xf0, reg_0xf0& ~SW_OFFLOAD_EN); rtw_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN); } } -static s32 iol_execute(struct adapter *padapter, u8 control) +static s32 iol_execute(PADAPTER padapter, u8 control) { s32 status = _FAIL; - u8 reg_0x88 = 0; + u8 reg_0x88 = 0,reg_1c7=0; u32 start = 0, passing_time = 0; - + + u32 t1,t2; control = control&0x0f; reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0); + //DBG_871X("%s reg_0x88:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x88, reg_0x88|control); rtw_write8(padapter, REG_HMEBOX_E0, reg_0x88|control); - start = rtw_get_current_time(); - while ((reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0)) & control && - (passing_time = rtw_get_passing_time_ms(start)) < 1000) { - ; + t1 = start = rtw_get_current_time(); + while( + //(reg_1c7 = rtw_read8(padapter, 0x1c7) >1) && + (reg_0x88=rtw_read8(padapter, REG_HMEBOX_E0)) & control + && (passing_time=rtw_get_passing_time_ms(start))<1000 + ) { + //DBG_871X("%s polling reg_0x88:0x%02x,reg_0x1c7:0x%02x\n", __FUNCTION__, reg_0x88,rtw_read8(padapter, 0x1c7) ); + //rtw_udelay_os(100); } reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0); - status = (reg_0x88 & control) ? _FAIL : _SUCCESS; - if (reg_0x88 & control<<4) + status = (reg_0x88 & control)?_FAIL:_SUCCESS; + if(reg_0x88 & control<<4) status = _FAIL; + t2= rtw_get_current_time(); + //printk("==> step iol_execute : %5u reg-0x1c0= 0x%02x\n",rtw_get_time_interval_ms(t1,t2),rtw_read8(padapter, 0x1c0)); + //DBG_871X("%s in %u ms, reg_0x88:0x%02x\n", __FUNCTION__, passing_time, reg_0x88); + return status; } -static s32 iol_InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy) +static s32 iol_InitLLTTable( + PADAPTER padapter, + u8 txpktbuf_bndy + ) { - s32 rst = _SUCCESS; + s32 rst = _SUCCESS; iol_mode_enable(padapter, 1); + //DBG_871X("%s txpktbuf_bndy:%u\n", __FUNCTION__, txpktbuf_bndy); rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy); rst = iol_execute(padapter, CMD_INIT_LLT); iol_mode_enable(padapter, 0); return rst; } -static void -efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf) +static VOID +efuse_phymap_to_logical(u8 * phymap, u16 _offset, u16 _size_byte, u8 *pbuf) { - u8 *efuseTbl = NULL; - u8 rtemp8; + u8 *efuseTbl = NULL; + u8 rtemp8; u16 eFuse_Addr = 0; - u8 offset, wren; + u8 offset, wren; u16 i, j; u16 **eFuseWord = NULL; u16 efuse_utilized = 0; - u8 u1temp = 0; + u8 efuse_usage = 0; + u8 u1temp = 0; - efuseTbl = (u8 *)rtw_zmalloc(EFUSE_MAP_LEN_88E); - if (efuseTbl == NULL) { - DBG_88E("%s: alloc efuseTbl fail!\n", __func__); + + efuseTbl = (u8*)rtw_zmalloc(EFUSE_MAP_LEN_88E); + if(efuseTbl == NULL) + { + DBG_871X("%s: alloc efuseTbl fail!\n", __FUNCTION__); goto exit; } - eFuseWord = (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); - if (eFuseWord == NULL) { - DBG_88E("%s: alloc eFuseWord fail!\n", __func__); + eFuseWord= (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); + if(eFuseWord == NULL) + { + DBG_871X("%s: alloc eFuseWord fail!\n", __FUNCTION__); goto exit; } - /* 0. Refresh efuse init map as all oxFF. */ + // 0. Refresh efuse init map as all oxFF. for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) eFuseWord[i][j] = 0xFFFF; - /* */ - /* 1. Read the first byte to check if efuse is empty!!! */ - /* */ - /* */ + // + // 1. Read the first byte to check if efuse is empty!!! + // + // rtemp8 = *(phymap+eFuse_Addr); - if (rtemp8 != 0xFF) { + if(rtemp8 != 0xFF) + { efuse_utilized++; + //printk("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8); eFuse_Addr++; - } else { - DBG_88E("EFUSE is empty efuse_Addr-%d efuse_data =%x\n", eFuse_Addr, rtemp8); + } + else + { + DBG_871X("EFUSE is empty efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, rtemp8); goto exit; } - /* */ - /* 2. Read real efuse content. Filter PG header and every section data. */ - /* */ - while ((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) { - /* Check PG header for section num. */ - if ((rtemp8 & 0x1F) == 0x0F) { /* extended header */ - u1temp = ((rtemp8 & 0xE0) >> 5); - rtemp8 = *(phymap+eFuse_Addr); - if ((rtemp8 & 0x0F) == 0x0F) { - eFuse_Addr++; - rtemp8 = *(phymap+eFuse_Addr); - if (rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) - eFuse_Addr++; + // + // 2. Read real efuse content. Filter PG header and every section data. + // + while((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) + { + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr-1, *rtemp8)); + + // Check PG header for section num. + if((rtemp8 & 0x1F ) == 0x0F) //extended header + { + u1temp =( (rtemp8 & 0xE0) >> 5); + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x *rtemp&0xE0 0x%x\n", u1temp, *rtemp8 & 0xE0)); + + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x \n", u1temp)); + + rtemp8 = *(phymap+eFuse_Addr); + + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8)); + + if((rtemp8 & 0x0F) == 0x0F) + { + eFuse_Addr++; + rtemp8 = *(phymap+eFuse_Addr); + + if(rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) + { + eFuse_Addr++; + } continue; - } else { + } + else + { offset = ((rtemp8 & 0xF0) >> 1) | u1temp; wren = (rtemp8 & 0x0F); - eFuse_Addr++; + eFuse_Addr++; } - } else { - offset = ((rtemp8 >> 4) & 0x0f); - wren = (rtemp8 & 0x0f); } + else + { + offset = ((rtemp8 >> 4) & 0x0f); + wren = (rtemp8 & 0x0f); + } + + if(offset < EFUSE_MAX_SECTION_88E) + { + // Get word enable value from PG header + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren)); - if (offset < EFUSE_MAX_SECTION_88E) { - /* Get word enable value from PG header */ - for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) { - /* Check word enable condition in the section */ - if (!(wren & 0x01)) { + for(i=0; i= EFUSE_REAL_CONTENT_LEN_88E) + + + if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) break; + + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d", eFuse_Addr)); rtemp8 = *(phymap+eFuse_Addr); eFuse_Addr++; + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); + efuse_utilized++; - eFuseWord[offset][i] |= (((u16)rtemp8 << 8) & 0xff00); + eFuseWord[offset][i] |= (((u2Byte)rtemp8 << 8) & 0xff00); - if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) + if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) break; } + wren >>= 1; + } } - /* Read next PG header */ - rtemp8 = *(phymap+eFuse_Addr); - if (rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) { + // Read next PG header + rtemp8 = *(phymap+eFuse_Addr); + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d rtemp 0x%x\n", eFuse_Addr, *rtemp8)); + + if(rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) + { efuse_utilized++; eFuse_Addr++; } } - /* */ - /* 3. Collect 16 sections and 4 word unit into Efuse map. */ - /* */ - for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) { - for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) { - efuseTbl[(i*8)+(j*2)] = (eFuseWord[i][j] & 0xff); - efuseTbl[(i*8)+((j*2)+1)] = ((eFuseWord[i][j] >> 8) & 0xff); + // + // 3. Collect 16 sections and 4 word unit into Efuse map. + // + for(i=0; i> 8) & 0xff); } } - /* */ - /* 4. Copy from Efuse map to output pointer memory!!! */ - /* */ - for (i = 0; i < _size_byte; i++) - pbuf[i] = efuseTbl[_offset+i]; - /* */ - /* 5. Calculate Efuse utilization. */ - /* */ + // + // 4. Copy from Efuse map to output pointer memory!!! + // + for(i=0; i<_size_byte; i++) + { + pbuf[i] = efuseTbl[_offset+i]; + } + + // + // 5. Calculate Efuse utilization. + // + efuse_usage = (u1Byte)((efuse_utilized*100)/EFUSE_REAL_CONTENT_LEN_88E); + //Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized); exit: - kfree(efuseTbl); + if(efuseTbl) + rtw_mfree(efuseTbl, EFUSE_MAP_LEN_88E); - if (eFuseWord) + if(eFuseWord) rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); } -static void efuse_read_phymap_from_txpktbuf( - struct adapter *adapter, - int bcnhead, /* beacon head, where FW store len(2-byte) and efuse physical map. */ - u8 *content, /* buffer to store efuse physical map */ - u16 *size /* for efuse content: the max byte to read. will update to byte read */ +void efuse_read_phymap_from_txpktbuf( + ADAPTER *adapter, + int bcnhead, //beacon head, where FW store len(2-byte) and efuse physical map. + u8 *content, //buffer to store efuse physical map + u16 *size //for efuse content: the max byte to read. will update to byte read ) { u16 dbg_addr = 0; u32 start = 0, passing_time = 0; u8 reg_0x143 = 0; + u8 reg_0x106 = 0; u32 lo32 = 0, hi32 = 0; u16 len = 0, count = 0; int i = 0; u16 limit = *size; u8 *pos = content; - - if (bcnhead < 0) /* if not valid */ + + if(bcnhead<0) //if not valid bcnhead = rtw_read8(adapter, REG_TDECTRL+1); - DBG_88E("%s bcnhead:%d\n", __func__, bcnhead); + DBG_871X("%s bcnhead:%d\n", __FUNCTION__, bcnhead); + //reg_0x106 = rtw_read8(adapter, REG_PKT_BUFF_ACCESS_CTRL); + //DBG_871X("%s reg_0x106:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x106, 0x69); rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); + //DBG_871X("%s reg_0x106:0x%02x\n", __FUNCTION__, rtw_read8(adapter, 0x106)); - dbg_addr = bcnhead*128/8; /* 8-bytes addressing */ + dbg_addr = bcnhead*128/8; //8-bytes addressing - while (1) { + while(1) + { + //DBG_871X("%s dbg_addr:0x%x\n", __FUNCTION__, dbg_addr+i); rtw_write16(adapter, REG_PKTBUF_DBG_ADDR, dbg_addr+i); + //DBG_871X("%s write reg_0x143:0x00\n", __FUNCTION__); rtw_write8(adapter, REG_TXPKTBUF_DBG, 0); start = rtw_get_current_time(); - while (!(reg_0x143 = rtw_read8(adapter, REG_TXPKTBUF_DBG)) && - (passing_time = rtw_get_passing_time_ms(start)) < 1000) { - DBG_88E("%s polling reg_0x143:0x%02x, reg_0x106:0x%02x\n", __func__, reg_0x143, rtw_read8(adapter, 0x106)); + while(!(reg_0x143=rtw_read8(adapter, REG_TXPKTBUF_DBG))//dbg + //while(rtw_read8(adapter, REG_TXPKTBUF_DBG) & BIT0 + && (passing_time=rtw_get_passing_time_ms(start))<1000 + ) { + DBG_871X("%s polling reg_0x143:0x%02x, reg_0x106:0x%02x\n", __FUNCTION__, reg_0x143, rtw_read8(adapter, 0x106)); rtw_usleep_os(100); } - lo32 = le32_to_cpu((__le32)rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L)); - hi32 = le32_to_cpu((__le32)rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H)); - if (i == 0) { + lo32 = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L); + hi32 = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H); + + #if 0 + DBG_871X("%s lo32:0x%08x, %02x %02x %02x %02x\n", __FUNCTION__, lo32 + , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L) + , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+1) + , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+2) + , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+3) + ); + DBG_871X("%s hi32:0x%08x, %02x %02x %02x %02x\n", __FUNCTION__, hi32 + , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H) + , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H+1) + , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H+2) + , rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H+3) + ); + #endif + + if(i==0) + { + #if 1 //for debug u8 lenc[2]; u16 lenbak, aaabak; u16 aaa; lenc[0] = rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L); lenc[1] = rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L+1); - aaabak = le16_to_cpup((__le16 *)lenc); - lenbak = le16_to_cpu(*((__le16 *)lenc)); - aaa = le16_to_cpup((__le16 *)&lo32); - len = le16_to_cpu(*((__le16 *)&lo32)); + aaabak = le16_to_cpup((u16*)lenc); + lenbak = le16_to_cpu(*((u16*)lenc)); + aaa = le16_to_cpup((u16*)&lo32); + #endif + len = le16_to_cpu(*((u16*)&lo32)); - limit = (len-2 < limit) ? len-2 : limit; + limit = (len-2= count+2) ? 2 : limit-count); - count += (limit >= count+2) ? 2 : limit-count; - pos = content+count; + _rtw_memcpy(pos, ((u8*)&lo32)+2, (limit>=count+2)?2:limit-count); + count+= (limit>=count+2)?2:limit-count; + pos=content+count; + + } + else + { + _rtw_memcpy(pos, ((u8*)&lo32), (limit>=count+4)?4:limit-count); + count+=(limit>=count+4)?4:limit-count; + pos=content+count; + - } else { - memcpy(pos, ((u8 *)&lo32), (limit >= count+4) ? 4 : limit-count); - count += (limit >= count+4) ? 4 : limit-count; - pos = content+count; } - if (limit > count && len-2 > count) { - memcpy(pos, (u8 *)&hi32, (limit >= count+4) ? 4 : limit-count); - count += (limit >= count+4) ? 4 : limit-count; - pos = content+count; + if(limit>count && len-2>count) { + _rtw_memcpy(pos, (u8*)&hi32, (limit>=count+4)?4:limit-count); + count+=(limit>=count+4)?4:limit-count; + pos=content+count; } - if (limit <= count || len-2 <= count) + if(limit<=count || len-2<=count) break; + i++; } + rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, DISABLE_TRXPKT_BUF_ACCESS); - DBG_88E("%s read count:%u\n", __func__, count); + + DBG_871X("%s read count:%u\n", __FUNCTION__, count); *size = count; + } -static s32 iol_read_efuse(struct adapter *padapter, u8 txpktbuf_bndy, u16 offset, u16 size_byte, u8 *logical_map) + +static s32 iol_read_efuse( + PADAPTER padapter, + u8 txpktbuf_bndy, + u16 offset, + u16 size_byte, + u8 *logical_map + ) { s32 status = _FAIL; + u8 reg_0x106 = 0; u8 physical_map[512]; u16 size = 512; + int i; + rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy); _rtw_memset(physical_map, 0xFF, 512); + + ///reg_0x106 = rtw_read8(padapter, REG_PKT_BUFF_ACCESS_CTRL); + //DBG_871X("%s reg_0x106:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x106, 0x69); rtw_write8(padapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); + //DBG_871X("%s reg_0x106:0x%02x\n", __FUNCTION__, rtw_read8(padapter, 0x106)); + status = iol_execute(padapter, CMD_READ_EFUSE_MAP); - if (status == _SUCCESS) + + if(status == _SUCCESS) efuse_read_phymap_from_txpktbuf(padapter, txpktbuf_bndy, physical_map, &size); + + #if 0 + DBG_871X("%s physical map\n", __FUNCTION__); + for(i=0;i %s\n", __func__); - if (rtw_IOL_applied(padapter)) { + printk("==> %s \n",__FUNCTION__); + + if(rtw_IOL_applied(padapter)){ iol_mode_enable(padapter, 1); result = iol_execute(padapter, CMD_READ_EFUSE_MAP); - if (result == _SUCCESS) + if(result == _SUCCESS) result = iol_execute(padapter, CMD_EFUSE_PATCH); - + iol_mode_enable(padapter, 0); } return result; } -static s32 iol_ioconfig(struct adapter *padapter, u8 iocfg_bndy) +static s32 iol_ioconfig( + PADAPTER padapter, + u8 iocfg_bndy + ) { - s32 rst = _SUCCESS; - + s32 rst = _SUCCESS; + + //DBG_871X("%s iocfg_bndy:%u\n", __FUNCTION__, iocfg_bndy); rtw_write8(padapter, REG_TDECTRL+1, iocfg_bndy); rst = iol_execute(padapter, CMD_IOCONFIG); + return rst; } -static int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt) +int rtl8188e_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms,u32 bndy_cnt) { - struct pkt_attrib *pattrib = &xmit_frame->attrib; - u8 i; + + u32 start_time = rtw_get_current_time(); + u32 passing_time_ms; + u8 polling_ret,i; int ret = _FAIL; - + u32 t1,t2; + + //printk("===> %s ,bndy_cnt = %d \n",__FUNCTION__,bndy_cnt); if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS) goto exit; - if (rtw_usb_bulk_size_boundary(adapter, TXDESC_SIZE+pattrib->last_txcmdsz)) { - if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS) - goto exit; +#ifdef CONFIG_USB_HCI + { + struct pkt_attrib *pattrib = &xmit_frame->attrib; + if(rtw_usb_bulk_size_boundary(adapter,TXDESC_SIZE+pattrib->last_txcmdsz)) + { + if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS) + goto exit; + } } - +#endif //CONFIG_USB_HCI + + //rtw_IOL_cmd_buf_dump(adapter,xmit_frame->attrib.pktlen+TXDESC_OFFSET,xmit_frame->buf_addr); + //rtw_hal_mgnt_xmit(adapter, xmit_frame); + //rtw_dump_xframe_sync(adapter, xmit_frame); + dump_mgntframe_and_wait(adapter, xmit_frame, max_wating_ms); - + + t1= rtw_get_current_time(); iol_mode_enable(adapter, 1); - for (i = 0; i < bndy_cnt; i++) { + for(i=0;i %s : %5u\n",__FUNCTION__,rtw_get_time_interval_ms(t1,t2)); exit: - /* restore BCN_HEAD */ - rtw_write8(adapter, REG_TDECTRL+1, 0); + //restore BCN_HEAD + rtw_write8(adapter, REG_TDECTRL+1, 0); return ret; } -void rtw_IOL_cmd_tx_pkt_buf_dump(struct adapter *Adapter, int data_len) +void rtw_IOL_cmd_tx_pkt_buf_dump(ADAPTER *Adapter,int data_len) { - u32 fifo_data, reg_140; - u32 addr, rstatus, loop = 0; - u16 data_cnts = (data_len/8)+1; - u8 *pbuf = rtw_zvmalloc(data_len+10); - DBG_88E("###### %s ######\n", __func__); + u32 fifo_data,reg_140; + u32 addr,rstatus,loop=0; + u16 data_cnts = (data_len/8)+1; + u8 *pbuf =rtw_zvmalloc(data_len+10); + printk("###### %s ######\n",__FUNCTION__); + rtw_write8(Adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); - if (pbuf) { - for (addr = 0; addr < data_cnts; addr++) { - rtw_write32(Adapter, 0x140, addr); + if(pbuf){ + for(addr=0;addr< data_cnts;addr++){ + //printk("==> addr:0x%02x\n",addr); + rtw_write32(Adapter,0x140,addr); rtw_usleep_os(2); - loop = 0; - do { - rstatus = (reg_140 = rtw_read32(Adapter, REG_PKTBUF_DBG_CTRL)&BIT24); - if (rstatus) { - fifo_data = rtw_read32(Adapter, REG_PKTBUF_DBG_DATA_L); - memcpy(pbuf+(addr*8), &fifo_data, 4); - - fifo_data = rtw_read32(Adapter, REG_PKTBUF_DBG_DATA_H); - memcpy(pbuf+(addr*8+4), &fifo_data, 4); + loop=0; + do{ + rstatus=(reg_140=rtw_read32(Adapter,REG_PKTBUF_DBG_CTRL)&BIT24); + //printk("rstatus = %02x, reg_140:0x%08x\n",rstatus,reg_140); + if(rstatus){ + fifo_data = rtw_read32(Adapter,REG_PKTBUF_DBG_DATA_L); + //printk("fifo_data_144:0x%08x\n",fifo_data); + _rtw_memcpy(pbuf+(addr*8),&fifo_data , 4); + + fifo_data = rtw_read32(Adapter,REG_PKTBUF_DBG_DATA_H); + //printk("fifo_data_148:0x%08x\n",fifo_data); + _rtw_memcpy(pbuf+(addr*8+4), &fifo_data, 4); + } rtw_usleep_os(2); - } while (!rstatus && (loop++ < 10)); + }while( !rstatus && (loop++ <10)); } - rtw_IOL_cmd_buf_dump(Adapter, data_len, pbuf); - rtw_vmfree(pbuf, data_len+10); - } - DBG_88E("###### %s ######\n", __func__); + rtw_IOL_cmd_buf_dump(Adapter,data_len,pbuf); + rtw_vmfree(pbuf, data_len+10); + + } + printk("###### %s ######\n",__FUNCTION__); } -static void _FWDownloadEnable(struct adapter *padapter, bool enable) +#endif /* defined(CONFIG_IOL) */ + + +static VOID +_FWDownloadEnable( + IN PADAPTER padapter, + IN BOOLEAN enable + ) { - u8 tmp; + u8 tmp; - if (enable) { - /* MCU firmware download enable. */ + if(enable) + { + // MCU firmware download enable. tmp = rtw_read8(padapter, REG_MCUFWDL); - rtw_write8(padapter, REG_MCUFWDL, tmp | 0x01); + rtw_write8(padapter, REG_MCUFWDL, tmp|0x01); - /* 8051 reset */ + // 8051 reset tmp = rtw_read8(padapter, REG_MCUFWDL+2); rtw_write8(padapter, REG_MCUFWDL+2, tmp&0xf7); - } else { - /* MCU firmware download disable. */ + } + else + { + + // MCU firmware download disable. tmp = rtw_read8(padapter, REG_MCUFWDL); rtw_write8(padapter, REG_MCUFWDL, tmp&0xfe); - /* Reserved for fw extension. */ + // Reserved for fw extension. rtw_write8(padapter, REG_MCUFWDL+1, 0x00); } } - -#define MAX_REG_BOLCK_SIZE 196 - -static int _BlockWrite(struct adapter *padapter, void *buffer, u32 buffSize) +#define MAX_REG_BOLCK_SIZE 196 +static int +_BlockWrite( + IN PADAPTER padapter, + IN PVOID buffer, + IN u32 buffSize + ) { int ret = _SUCCESS; - u32 blockSize_p1 = 4; /* (Default) Phase #1 : PCI muse use 4-byte write to download FW */ - u32 blockSize_p2 = 8; /* Phase #2 : Use 8-byte, if Phase#1 use big size to write FW. */ - u32 blockSize_p3 = 1; /* Phase #3 : Use 1-byte, the remnant of FW image. */ - u32 blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0; - u32 remainSize_p1 = 0, remainSize_p2 = 0; - u8 *bufferPtr = (u8 *)buffer; - u32 i = 0, offset = 0; + u32 blockSize_p1 = 4; // (Default) Phase #1 : PCI muse use 4-byte write to download FW + u32 blockSize_p2 = 8; // Phase #2 : Use 8-byte, if Phase#1 use big size to write FW. + u32 blockSize_p3 = 1; // Phase #3 : Use 1-byte, the remnant of FW image. + u32 blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0; + u32 remainSize_p1 = 0, remainSize_p2 = 0; + u8 *bufferPtr = (u8*)buffer; + u32 i=0, offset=0; +#ifdef CONFIG_PCI_HCI + u8 remainFW[4] = {0, 0, 0, 0}; + u8 *p = NULL; +#endif + +#ifdef CONFIG_USB_HCI blockSize_p1 = MAX_REG_BOLCK_SIZE; +#endif - /* 3 Phase #1 */ + //3 Phase #1 blockCount_p1 = buffSize / blockSize_p1; remainSize_p1 = buffSize % blockSize_p1; if (blockCount_p1) { RT_TRACE(_module_hal_init_c_, _drv_notice_, - ("_BlockWrite: [P1] buffSize(%d) blockSize_p1(%d) blockCount_p1(%d) remainSize_p1(%d)\n", - buffSize, blockSize_p1, blockCount_p1, remainSize_p1)); + ("_BlockWrite: [P1] buffSize(%d) blockSize_p1(%d) blockCount_p1(%d) remainSize_p1(%d)\n", + buffSize, blockSize_p1, blockCount_p1, remainSize_p1)); } - for (i = 0; i < blockCount_p1; i++) { + for (i = 0; i < blockCount_p1; i++) + { +#ifdef CONFIG_USB_HCI ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1)); - if (ret == _FAIL) +#else + ret = rtw_write32(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), le32_to_cpu(*((u32*)(bufferPtr + i * blockSize_p1)))); +#endif + + if(ret == _FAIL) goto exit; } - /* 3 Phase #2 */ +#ifdef CONFIG_PCI_HCI + p = (u8*)((u32*)(bufferPtr + blockCount_p1 * blockSize_p1)); if (remainSize_p1) { + switch (remainSize_p1) { + case 0: + break; + case 3: + remainFW[2]=*(p+2); + case 2: + remainFW[1]=*(p+1); + case 1: + remainFW[0]=*(p); + ret = rtw_write32(padapter, (FW_8188E_START_ADDRESS + blockCount_p1 * blockSize_p1), + le32_to_cpu(*(u32*)remainFW)); + } + return ret; + } +#endif + + //3 Phase #2 + if (remainSize_p1) + { offset = blockCount_p1 * blockSize_p1; blockCount_p2 = remainSize_p1/blockSize_p2; @@ -454,32 +672,35 @@ static int _BlockWrite(struct adapter *padapter, void *buffer, u32 buffSize) if (blockCount_p2) { RT_TRACE(_module_hal_init_c_, _drv_notice_, - ("_BlockWrite: [P2] buffSize_p2(%d) blockSize_p2(%d) blockCount_p2(%d) remainSize_p2(%d)\n", - (buffSize-offset), blockSize_p2 , blockCount_p2, remainSize_p2)); + ("_BlockWrite: [P2] buffSize_p2(%d) blockSize_p2(%d) blockCount_p2(%d) remainSize_p2(%d)\n", + (buffSize-offset), blockSize_p2 ,blockCount_p2, remainSize_p2)); } +#ifdef CONFIG_USB_HCI for (i = 0; i < blockCount_p2; i++) { ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + offset + i*blockSize_p2), blockSize_p2, (bufferPtr + offset + i*blockSize_p2)); - - if (ret == _FAIL) + + if(ret == _FAIL) goto exit; } +#endif } - /* 3 Phase #3 */ - if (remainSize_p2) { + //3 Phase #3 + if (remainSize_p2) + { offset = (blockCount_p1 * blockSize_p1) + (blockCount_p2 * blockSize_p2); blockCount_p3 = remainSize_p2 / blockSize_p3; RT_TRACE(_module_hal_init_c_, _drv_notice_, - ("_BlockWrite: [P3] buffSize_p3(%d) blockSize_p3(%d) blockCount_p3(%d)\n", - (buffSize-offset), blockSize_p3, blockCount_p3)); + ("_BlockWrite: [P3] buffSize_p3(%d) blockSize_p3(%d) blockCount_p3(%d)\n", + (buffSize-offset), blockSize_p3, blockCount_p3)); - for (i = 0; i < blockCount_p3; i++) { - ret = rtw_write8(padapter, (FW_8188E_START_ADDRESS + offset + i), *(bufferPtr + offset + i)); - - if (ret == _FAIL) + for(i = 0 ; i < blockCount_p3 ; i++){ + ret =rtw_write8(padapter, (FW_8188E_START_ADDRESS + offset + i), *(bufferPtr + offset + i)); + + if(ret == _FAIL) goto exit; } } @@ -488,76 +709,135 @@ exit: return ret; } -static int _PageWrite(struct adapter *padapter, u32 page, void *buffer, u32 size) +static int +_PageWrite( + IN PADAPTER padapter, + IN u32 page, + IN PVOID buffer, + IN u32 size + ) { u8 value8; - u8 u8Page = (u8)(page & 0x07); + u8 u8Page = (u8) (page & 0x07) ; - value8 = (rtw_read8(padapter, REG_MCUFWDL+2) & 0xF8) | u8Page; - rtw_write8(padapter, REG_MCUFWDL+2, value8); + value8 = (rtw_read8(padapter, REG_MCUFWDL+2) & 0xF8) | u8Page ; + rtw_write8(padapter, REG_MCUFWDL+2,value8); - return _BlockWrite(padapter, buffer, size); + return _BlockWrite(padapter,buffer,size); } -static int _WriteFW(struct adapter *padapter, void *buffer, u32 size) +static VOID +_FillDummy( + u8* pFwBuf, + u32* pFwLen + ) { - /* Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. */ - /* We can remove _ReadChipVersion from ReadpadapterInfo8192C later. */ - int ret = _SUCCESS; - u32 pageNums, remainSize; - u32 page, offset; - u8 *bufferPtr = (u8 *)buffer; + u32 FwLen = *pFwLen; + u8 remain = (u8)(FwLen%4); + remain = (remain==0)?0:(4-remain); - pageNums = size / MAX_PAGE_SIZE; + while(remain>0) + { + pFwBuf[FwLen] = 0; + FwLen++; + remain--; + } + + *pFwLen = FwLen; +} + +static int +_WriteFW( + IN PADAPTER padapter, + IN PVOID buffer, + IN u32 size + ) +{ + // Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. + // We can remove _ReadChipVersion from ReadpadapterInfo8192C later. + int ret = _SUCCESS; + u32 pageNums,remainSize ; + u32 page, offset; + u8 *bufferPtr = (u8*)buffer; + +#ifdef CONFIG_PCI_HCI + // 20100120 Joseph: Add for 88CE normal chip. + // Fill in zero to make firmware image to dword alignment. +// _FillDummy(bufferPtr, &size); +#endif + + pageNums = size / MAX_PAGE_SIZE ; + //RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4 \n")); remainSize = size % MAX_PAGE_SIZE; for (page = 0; page < pageNums; page++) { offset = page * MAX_PAGE_SIZE; ret = _PageWrite(padapter, page, bufferPtr+offset, MAX_PAGE_SIZE); - - if (ret == _FAIL) + + if(ret == _FAIL) goto exit; } if (remainSize) { offset = pageNums * MAX_PAGE_SIZE; page = pageNums; ret = _PageWrite(padapter, page, bufferPtr+offset, remainSize); - - if (ret == _FAIL) + + if(ret == _FAIL) goto exit; + } RT_TRACE(_module_hal_init_c_, _drv_info_, ("_WriteFW Done- for Normal chip.\n")); + exit: return ret; } -void _8051Reset88E(struct adapter *padapter) +void _MCUIO_Reset88E(PADAPTER padapter,u8 bReset) { u8 u1bTmp; + if(bReset==_TRUE){ + // Reset MCU IO Wrapper- sugggest by SD1-Gimmy + u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1); + rtw_write8(padapter,REG_RSV_CTRL+1, (u1bTmp&(~BIT3))); + }else{ + // Enable MCU IO Wrapper + u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1); + rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp|BIT3); + } + +} +void _8051Reset88E(PADAPTER padapter) +{ + u8 u1bTmp; + + _MCUIO_Reset88E(padapter,_TRUE); u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1); rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp&(~BIT2)); + _MCUIO_Reset88E(padapter,_FALSE); rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp|(BIT2)); - DBG_88E("=====> _8051Reset88E(): 8051 reset success .\n"); + + DBG_871X("=====> _8051Reset88E(): 8051 reset success .\n"); } -static s32 _FWFreeToGo(struct adapter *padapter) +static s32 _FWFreeToGo(PADAPTER padapter) { u32 counter = 0; u32 value32; + u8 value8; - /* polling CheckSum report */ + // polling CheckSum report do { value32 = rtw_read32(padapter, REG_MCUFWDL); - if (value32 & FWDL_ChkSum_rpt) - break; + if (value32 & FWDL_ChkSum_rpt) break; } while (counter++ < POLLING_READY_TIMEOUT_COUNT); if (counter >= POLLING_READY_TIMEOUT_COUNT) { - DBG_88E("%s: chksum report fail! REG_MCUFWDL:0x%08x\n", __func__, value32); + DBG_871X("%s: chksum report fail! REG_MCUFWDL:0x%08x\n", __FUNCTION__, value32); return _FAIL; } - DBG_88E("%s: Checksum report OK! REG_MCUFWDL:0x%08x\n", __func__, value32); + DBG_871X("%s: Checksum report OK! REG_MCUFWDL:0x%08x\n", __FUNCTION__, value32); + value32 = rtw_read32(padapter, REG_MCUFWDL); value32 |= MCUFWDL_RDY; @@ -566,857 +846,1360 @@ static s32 _FWFreeToGo(struct adapter *padapter) _8051Reset88E(padapter); - /* polling for FW ready */ + // polling for FW ready counter = 0; do { value32 = rtw_read32(padapter, REG_MCUFWDL); if (value32 & WINTINI_RDY) { - DBG_88E("%s: Polling FW ready success!! REG_MCUFWDL:0x%08x\n", __func__, value32); + DBG_871X("%s: Polling FW ready success!! REG_MCUFWDL:0x%08x\n", __FUNCTION__, value32); return _SUCCESS; } rtw_udelay_os(5); } while (counter++ < POLLING_READY_TIMEOUT_COUNT); - DBG_88E("%s: Polling FW ready fail!! REG_MCUFWDL:0x%08x\n", __func__, value32); + DBG_871X ("%s: Polling FW ready fail!! REG_MCUFWDL:0x%08x\n", __FUNCTION__, value32); return _FAIL; } #define IS_FW_81xxC(padapter) (((GET_HAL_DATA(padapter))->FirmwareSignature & 0xFFF0) == 0x88C0) -static int load_firmware(struct rt_firmware *pFirmware, struct device *device) -{ - s32 rtStatus = _SUCCESS; - const struct firmware *fw; - const char *fw_name = "rtlwifi/rtl8188eufw.bin"; - int err = request_firmware(&fw, fw_name, device); - if (err) { - pr_err("Request firmware failed with error 0x%x\n", err); - rtStatus = _FAIL; - goto Exit; - } - if (!fw) { - pr_err("Firmware %s not available\n", fw_name); - rtStatus = _FAIL; - goto Exit; - } - if (fw->size > FW_8188E_SIZE) { - rtStatus = _FAIL; - RT_TRACE(_module_hal_init_c_, _drv_err_, ("Firmware size exceed 0x%X. Check it.\n", FW_8188E_SIZE)); - goto Exit; - } - - pFirmware->szFwBuffer = kzalloc(FW_8188E_SIZE, GFP_KERNEL); - if (!pFirmware->szFwBuffer) { - pr_err("Failed to allocate pFirmware->szFwBuffer\n"); - rtStatus = _FAIL; - goto Exit; - } - memcpy(pFirmware->szFwBuffer, fw->data, fw->size); - pFirmware->ulFwLength = fw->size; - release_firmware(fw); - DBG_88E_LEVEL(_drv_info_, "+%s: !bUsedWoWLANFw, FmrmwareLen:%d+\n", __func__, pFirmware->ulFwLength); - -Exit: - return rtStatus; -} - -s32 rtl8188e_FirmwareDownload(struct adapter *padapter) +#ifdef CONFIG_FILE_FWIMG +extern char *rtw_fw_file_path; +u8 FwBuffer8188E[FW_8188E_SIZE]; +#endif //CONFIG_FILE_FWIMG +#ifdef CONFIG_WOWLAN +// +// Description: +// Download 8192C firmware code. +// +// +s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw) +#else +s32 rtl8188e_FirmwareDownload(PADAPTER padapter) +#endif { s32 rtStatus = _SUCCESS; u8 writeFW_retry = 0; u32 fwdl_start_time; - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); - struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); - struct device *device = dvobj_to_dev(dvobj); - struct rt_firmware_hdr *pFwHdr = NULL; - u8 *pFirmwareBuf; - u32 FirmwareLen; - static int log_version; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + u8 *FwImage; + u32 FwImageLen; + u8 *pFwImageFileName; +#ifdef CONFIG_WOWLAN + u8 *FwImageWoWLAN; + u32 FwImageWoWLANLen; +#endif + u8 *pucMappedFile = NULL; + PRT_FIRMWARE_8188E pFirmware = NULL; + PRT_8188E_FIRMWARE_HDR pFwHdr = NULL; + u8 *pFirmwareBuf; + u32 FirmwareLen; - RT_TRACE(_module_hal_init_c_, _drv_info_, ("+%s\n", __func__)); - if (!dvobj->firmware.szFwBuffer) - rtStatus = load_firmware(&dvobj->firmware, device); - if (rtStatus == _FAIL) { - dvobj->firmware.szFwBuffer = NULL; + + RT_TRACE(_module_hal_init_c_, _drv_info_, ("+%s\n", __FUNCTION__)); + pFirmware = (PRT_FIRMWARE_8188E)rtw_zmalloc(sizeof(RT_FIRMWARE_8188E)); + if(!pFirmware) + { + + rtStatus = _FAIL; goto Exit; } - pFirmwareBuf = dvobj->firmware.szFwBuffer; - FirmwareLen = dvobj->firmware.ulFwLength; + + FwImage = (u8*)Rtl8188E_FwImageArray; + FwImageLen = Rtl8188E_FWImgArrayLength; - /* To Check Fw header. Added by tynli. 2009.12.04. */ - pFwHdr = (struct rt_firmware_hdr *)dvobj->firmware.szFwBuffer; +#ifdef CONFIG_WOWLAN + FwImageWoWLAN = (u8*)Rtl8188E_FwWoWImageArray; + FwImageWoWLANLen = Rtl8188E_FwWoWImgArrayLength; +#endif //CONFIG_WOWLAN + +// RT_TRACE(_module_hal_init_c_, _drv_err_, ("rtl8723a_FirmwareDownload: %s\n", pFwImageFileName)); + + #ifdef CONFIG_FILE_FWIMG + if(rtw_is_file_readable(rtw_fw_file_path) == _TRUE) + { + DBG_871X("%s accquire FW from file:%s\n", __FUNCTION__, rtw_fw_file_path); + pFirmware->eFWSource = FW_SOURCE_IMG_FILE; + } + else + #endif //CONFIG_FILE_FWIMG + { + pFirmware->eFWSource = FW_SOURCE_HEADER_FILE; + } + + switch(pFirmware->eFWSource) + { + case FW_SOURCE_IMG_FILE: + #ifdef CONFIG_FILE_FWIMG + rtStatus = rtw_retrive_from_file(rtw_fw_file_path, FwBuffer8188E, FW_8188E_SIZE); + pFirmware->ulFwLength = rtStatus>=0?rtStatus:0; + pFirmware->szFwBuffer = FwBuffer8188E; + #endif //CONFIG_FILE_FWIMG + break; + case FW_SOURCE_HEADER_FILE: + if (FwImageLen > FW_8188E_SIZE) { + rtStatus = _FAIL; + RT_TRACE(_module_hal_init_c_, _drv_err_, ("Firmware size exceed 0x%X. Check it.\n", FW_8188E_SIZE) ); + goto Exit; + } + + pFirmware->szFwBuffer = FwImage; + pFirmware->ulFwLength = FwImageLen; +#ifdef CONFIG_WOWLAN + if(bUsedWoWLANFw){ + pFirmware->szWoWLANFwBuffer = FwImageWoWLAN; + pFirmware->ulWoWLANFwLength = FwImageWoWLANLen; + } +#endif //CONFIG_WOWLAN + break; + } +#ifdef CONFIG_WOWLAN + if(bUsedWoWLANFw) { + pFirmwareBuf = pFirmware->szWoWLANFwBuffer; + FirmwareLen = pFirmware->ulWoWLANFwLength; + pFwHdr = (PRT_8188E_FIRMWARE_HDR)pFirmware->szWoWLANFwBuffer; + } else +#endif + { + pFirmwareBuf = pFirmware->szFwBuffer; + FirmwareLen = pFirmware->ulFwLength; + DBG_871X_LEVEL(_drv_info_, "+%s: !bUsedWoWLANFw, FmrmwareLen:%d+\n", __func__, FirmwareLen); + + // To Check Fw header. Added by tynli. 2009.12.04. + pFwHdr = (PRT_8188E_FIRMWARE_HDR)pFirmware->szFwBuffer; + } pHalData->FirmwareVersion = le16_to_cpu(pFwHdr->Version); pHalData->FirmwareSubVersion = pFwHdr->Subversion; pHalData->FirmwareSignature = le16_to_cpu(pFwHdr->Signature); - if (!log_version++) - pr_info("%sFirmware Version %d, SubVersion %d, Signature 0x%x\n", - DRIVER_PREFIX, pHalData->FirmwareVersion, - pHalData->FirmwareSubVersion, pHalData->FirmwareSignature); + DBG_871X ("%s: fw_ver=%d fw_subver=%d sig=0x%x\n", + __FUNCTION__, pHalData->FirmwareVersion, pHalData->FirmwareSubVersion, pHalData->FirmwareSignature); - if (IS_FW_HEADER_EXIST(pFwHdr)) { - /* Shift 32 bytes for FW header */ + if (IS_FW_HEADER_EXIST(pFwHdr)) + { + // Shift 32 bytes for FW header pFirmwareBuf = pFirmwareBuf + 32; FirmwareLen = FirmwareLen - 32; } - /* Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, */ - /* or it will cause download Fw fail. 2010.02.01. by tynli. */ - if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) { /* 8051 RAM code */ + // Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, + // or it will cause download Fw fail. 2010.02.01. by tynli. + if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) //8051 RAM code + { rtw_write8(padapter, REG_MCUFWDL, 0x00); - _8051Reset88E(padapter); + _8051Reset88E(padapter); } - _FWDownloadEnable(padapter, true); + _FWDownloadEnable(padapter, _TRUE); fwdl_start_time = rtw_get_current_time(); - while (1) { - /* reset the FWDL chksum */ - rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL) | FWDL_ChkSum_rpt); - + while(1) { + //reset the FWDL chksum + rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL)|FWDL_ChkSum_rpt); + rtStatus = _WriteFW(padapter, pFirmwareBuf, FirmwareLen); - if (rtStatus == _SUCCESS || - (rtw_get_passing_time_ms(fwdl_start_time) > 500 && writeFW_retry++ >= 3)) + if(rtStatus == _SUCCESS || padapter->bDriverStopped || padapter->bSurpriseRemoved + ||(writeFW_retry++ >= 3 && rtw_get_passing_time_ms(fwdl_start_time) > 500) + ) break; - - DBG_88E("%s writeFW_retry:%u, time after fwdl_start_time:%ums\n", - __func__, writeFW_retry, rtw_get_passing_time_ms(fwdl_start_time) - ); } - _FWDownloadEnable(padapter, false); - if (_SUCCESS != rtStatus) { - DBG_88E("DL Firmware failed!\n"); + _FWDownloadEnable(padapter, _FALSE); + + DBG_871X("%s writeFW_retry:%u, time after fwdl_start_time:%ums\n", __FUNCTION__ + , writeFW_retry + , rtw_get_passing_time_ms(fwdl_start_time) + ); + + if(_SUCCESS != rtStatus){ + DBG_871X("DL Firmware failed!\n"); goto Exit; } rtStatus = _FWFreeToGo(padapter); if (_SUCCESS != rtStatus) { - DBG_88E("DL Firmware failed!\n"); + DBG_871X("DL Firmware failed!\n"); goto Exit; } RT_TRACE(_module_hal_init_c_, _drv_info_, ("Firmware is ready to run!\n")); Exit: + + if (pFirmware) + rtw_mfree((u8*)pFirmware, sizeof(RT_FIRMWARE_8188E)); + + //RT_TRACE(COMP_INIT, DBG_LOUD, (" <=== FirmwareDownload91C()\n")); +#ifdef CONFIG_WOWLAN + if (adapter_to_pwrctl(padapter)->wowlan_mode) + rtl8188e_InitializeFirmwareVars(padapter); + else + DBG_871X_LEVEL(_drv_always_, "%s: wowland_mode:%d wowlan_wake_reason:%d\n", + __func__, adapter_to_pwrctl(padapter)->wowlan_mode, + adapter_to_pwrctl(padapter)->wowlan_wake_reason); +#endif + return rtStatus; } -void rtl8188e_InitializeFirmwareVars(struct adapter *padapter) +#ifdef CONFIG_WOWLAN +void rtl8188e_InitializeFirmwareVars(PADAPTER padapter) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); - /* Init Fw LPS related. */ - padapter->pwrctrlpriv.bFwCurrentInPSMode = false; - - /* Init H2C counter. by tynli. 2009.12.09. */ + // Init Fw LPS related. + pwrpriv->bFwCurrentInPSMode = _FALSE; + // Init H2C counter. by tynli. 2009.12.09. pHalData->LastHMEBoxNum = 0; } -static void rtl8188e_free_hal_data(struct adapter *padapter) +//=========================================== + +// +// Description: Prepare some information to Fw for WoWLAN. +// (1) Download wowlan Fw. +// (2) Download RSVD page packets. +// (3) Enable AP offload if needed. +// +// 2011.04.12 by tynli. +// +VOID +SetFwRelatedForWoWLAN8188ES( + IN PADAPTER padapter, + IN u8 bHostIsGoingtoSleep +) { + int status=_FAIL; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 bRecover = _FALSE; + // + // 1. Before WoWLAN we need to re-download WoWLAN Fw. + // + status = rtl8188e_FirmwareDownload(padapter, bHostIsGoingtoSleep); + if(status != _SUCCESS) { + DBG_871X("ConfigFwRelatedForWoWLAN8188ES(): Re-Download Firmware failed!!\n"); + return; + } else { + DBG_871X("ConfigFwRelatedForWoWLAN8188ES(): Re-Download Firmware Success !!\n"); + } + // + // 2. Re-Init the variables about Fw related setting. + // + rtl8188e_InitializeFirmwareVars(padapter); +} +#else +void rtl8188e_InitializeFirmwareVars(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); - kfree(padapter->HalData); - padapter->HalData = NULL; + // Init Fw LPS related. + adapter_to_pwrctl(padapter)->bFwCurrentInPSMode = _FALSE; + // Init H2C counter. by tynli. 2009.12.09. + pHalData->LastHMEBoxNum = 0; +// pHalData->H2CQueueHead = 0; +// pHalData->H2CQueueTail = 0; +// pHalData->H2CStopInsertQueue = FALSE; +} +#endif //CONFIG_WOWLAN + +static void rtl8188e_free_hal_data(PADAPTER padapter) +{ +_func_enter_; + + if(padapter->HalData) + { + rtw_mfree(padapter->HalData, sizeof(HAL_DATA_TYPE)); + padapter->HalData = NULL; + } + +_func_exit_; } -/* */ -/* Efuse related code */ -/* */ +//=========================================================== +// Efuse related code +//=========================================================== enum{ VOLTAGE_V25 = 0x03, LDOE25_SHIFT = 28 , }; -static bool +static BOOLEAN hal_EfusePgPacketWrite2ByteHeader( - struct adapter *pAdapter, - u8 efuseType, - u16 *pAddr, - struct pgpkt *pTargetPkt, - bool bPseudoTest); -static bool + IN PADAPTER pAdapter, + IN u8 efuseType, + IN u16 *pAddr, + IN PPGPKT_STRUCT pTargetPkt, + IN BOOLEAN bPseudoTest); +static BOOLEAN hal_EfusePgPacketWrite1ByteHeader( - struct adapter *pAdapter, - u8 efuseType, - u16 *pAddr, - struct pgpkt *pTargetPkt, - bool bPseudoTest); -static bool + IN PADAPTER pAdapter, + IN u8 efuseType, + IN u16 *pAddr, + IN PPGPKT_STRUCT pTargetPkt, + IN BOOLEAN bPseudoTest); +static BOOLEAN hal_EfusePgPacketWriteData( - struct adapter *pAdapter, - u8 efuseType, - u16 *pAddr, - struct pgpkt *pTargetPkt, - bool bPseudoTest); + IN PADAPTER pAdapter, + IN u8 efuseType, + IN u16 *pAddr, + IN PPGPKT_STRUCT pTargetPkt, + IN BOOLEAN bPseudoTest); -static void +static VOID hal_EfusePowerSwitch_RTL8188E( - struct adapter *pAdapter, - u8 bWrite, - u8 PwrState) + IN PADAPTER pAdapter, + IN u8 bWrite, + IN u8 PwrState) { - u8 tempval; + u8 tempval; u16 tmpV16; - if (PwrState) { + if (PwrState == _TRUE) + { rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON); - /* 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid */ - tmpV16 = rtw_read16(pAdapter, REG_SYS_ISO_CTRL); - if (!(tmpV16 & PWC_EV12V)) { - tmpV16 |= PWC_EV12V; - rtw_write16(pAdapter, REG_SYS_ISO_CTRL, tmpV16); + // 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid + tmpV16 = rtw_read16(pAdapter,REG_SYS_ISO_CTRL); + if( ! (tmpV16 & PWC_EV12V ) ){ + tmpV16 |= PWC_EV12V ; + rtw_write16(pAdapter,REG_SYS_ISO_CTRL,tmpV16); } - /* Reset: 0x0000h[28], default valid */ - tmpV16 = rtw_read16(pAdapter, REG_SYS_FUNC_EN); - if (!(tmpV16 & FEN_ELDR)) { - tmpV16 |= FEN_ELDR; - rtw_write16(pAdapter, REG_SYS_FUNC_EN, tmpV16); + // Reset: 0x0000h[28], default valid + tmpV16 = rtw_read16(pAdapter,REG_SYS_FUNC_EN); + if( !(tmpV16 & FEN_ELDR) ){ + tmpV16 |= FEN_ELDR ; + rtw_write16(pAdapter,REG_SYS_FUNC_EN,tmpV16); } - /* Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid */ - tmpV16 = rtw_read16(pAdapter, REG_SYS_CLKR); - if ((!(tmpV16 & LOADER_CLK_EN)) || (!(tmpV16 & ANA8M))) { - tmpV16 |= (LOADER_CLK_EN | ANA8M); - rtw_write16(pAdapter, REG_SYS_CLKR, tmpV16); + // Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid + tmpV16 = rtw_read16(pAdapter,REG_SYS_CLKR); + if( (!(tmpV16 & LOADER_CLK_EN) ) ||(!(tmpV16 & ANA8M) ) ){ + tmpV16 |= (LOADER_CLK_EN |ANA8M ) ; + rtw_write16(pAdapter,REG_SYS_CLKR,tmpV16); } - if (bWrite) { - /* Enable LDO 2.5V before read/write action */ + if(bWrite == _TRUE) + { + // Enable LDO 2.5V before read/write action tempval = rtw_read8(pAdapter, EFUSE_TEST+3); tempval &= 0x0F; tempval |= (VOLTAGE_V25 << 4); rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80)); } - } else { + } + else + { rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF); - if (bWrite) { - /* Disable LDO 2.5V after read/write action */ + if(bWrite == _TRUE){ + // Disable LDO 2.5V after read/write action tempval = rtw_read8(pAdapter, EFUSE_TEST+3); rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F)); } } } -static void +static VOID rtl8188e_EfusePowerSwitch( - struct adapter *pAdapter, - u8 bWrite, - u8 PwrState) + IN PADAPTER pAdapter, + IN u8 bWrite, + IN u8 PwrState) { - hal_EfusePowerSwitch_RTL8188E(pAdapter, bWrite, PwrState); + hal_EfusePowerSwitch_RTL8188E(pAdapter, bWrite, PwrState); } -static void Hal_EfuseReadEFuse88E(struct adapter *Adapter, - u16 _offset, - u16 _size_byte, - u8 *pbuf, - bool bPseudoTest + + +static bool efuse_read_phymap( + PADAPTER Adapter, + u8 *pbuf, //buffer to store efuse physical map + u16 *size //the max byte to read. will update to byte read ) { - u8 *efuseTbl = NULL; - u8 rtemp8[1]; + u8 *pos = pbuf; + u16 limit = *size; + u16 addr = 0; + bool reach_end = _FALSE; + + // + // Refresh efuse init map as all 0xFF. + // + _rtw_memset(pbuf, 0xFF, limit); + + + // + // Read physical efuse content. + // + while(addr < limit) + { + ReadEFuseByte(Adapter, addr, pos, _FALSE); + if(*pos != 0xFF) + { + pos++; + addr++; + } + else + { + reach_end = _TRUE; + break; + } + } + + *size = addr; + + return reach_end; + +} + +static VOID +Hal_EfuseReadEFuse88E( + PADAPTER Adapter, + u16 _offset, + u16 _size_byte, + u8 *pbuf, + IN BOOLEAN bPseudoTest + ) +{ + //u8 efuseTbl[EFUSE_MAP_LEN_88E]; + u8 *efuseTbl = NULL; + u8 rtemp8[1]; u16 eFuse_Addr = 0; - u8 offset, wren; + u8 offset, wren; u16 i, j; + //u16 eFuseWord[EFUSE_MAX_SECTION_88E][EFUSE_MAX_WORD_UNIT]; u16 **eFuseWord = NULL; u16 efuse_utilized = 0; - u8 u1temp = 0; + u8 efuse_usage = 0; + u8 u1temp = 0; - /* */ - /* Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. */ - /* */ - if ((_offset + _size_byte) > EFUSE_MAP_LEN_88E) {/* total E-Fuse table is 512bytes */ - DBG_88E("Hal_EfuseReadEFuse88E(): Invalid offset(%#x) with read bytes(%#x)!!\n", _offset, _size_byte); + // + // Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. + // + if((_offset + _size_byte)>EFUSE_MAP_LEN_88E) + {// total E-Fuse table is 512bytes + DBG_8192C("Hal_EfuseReadEFuse88E(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte); goto exit; } - efuseTbl = (u8 *)rtw_zmalloc(EFUSE_MAP_LEN_88E); - if (efuseTbl == NULL) { - DBG_88E("%s: alloc efuseTbl fail!\n", __func__); + efuseTbl = (u8*)rtw_zmalloc(EFUSE_MAP_LEN_88E); + if(efuseTbl == NULL) + { + DBG_871X("%s: alloc efuseTbl fail!\n", __FUNCTION__); goto exit; } - eFuseWord = (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); - if (eFuseWord == NULL) { - DBG_88E("%s: alloc eFuseWord fail!\n", __func__); + eFuseWord= (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); + if(eFuseWord == NULL) + { + DBG_871X("%s: alloc eFuseWord fail!\n", __FUNCTION__); goto exit; } - /* 0. Refresh efuse init map as all oxFF. */ + // 0. Refresh efuse init map as all oxFF. for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) eFuseWord[i][j] = 0xFFFF; - /* */ - /* 1. Read the first byte to check if efuse is empty!!! */ - /* */ - /* */ - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); - if (*rtemp8 != 0xFF) { + // + // 1. Read the first byte to check if efuse is empty!!! + // + // + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + if(*rtemp8 != 0xFF) + { efuse_utilized++; + //DBG_8192C("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8); eFuse_Addr++; - } else { - DBG_88E("EFUSE is empty efuse_Addr-%d efuse_data =%x\n", eFuse_Addr, *rtemp8); + } + else + { + DBG_871X("EFUSE is empty efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8); goto exit; } - /* */ - /* 2. Read real efuse content. Filter PG header and every section data. */ - /* */ - while ((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) { - /* Check PG header for section num. */ - if ((*rtemp8 & 0x1F) == 0x0F) { /* extended header */ - u1temp = ((*rtemp8 & 0xE0) >> 5); - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + // + // 2. Read real efuse content. Filter PG header and every section data. + // + while((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) + { + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr-1, *rtemp8)); + + // Check PG header for section num. + if((*rtemp8 & 0x1F ) == 0x0F) //extended header + { + u1temp =( (*rtemp8 & 0xE0) >> 5); + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x *rtemp&0xE0 0x%x\n", u1temp, *rtemp8 & 0xE0)); - if ((*rtemp8 & 0x0F) == 0x0F) { - eFuse_Addr++; - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x \n", u1temp)); + + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); - if (*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) - eFuse_Addr++; + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8)); + + if((*rtemp8 & 0x0F) == 0x0F) + { + eFuse_Addr++; + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + + if(*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) + { + eFuse_Addr++; + } continue; - } else { + } + else + { offset = ((*rtemp8 & 0xF0) >> 1) | u1temp; wren = (*rtemp8 & 0x0F); - eFuse_Addr++; + eFuse_Addr++; } - } else { - offset = ((*rtemp8 >> 4) & 0x0f); - wren = (*rtemp8 & 0x0f); } + else + { + offset = ((*rtemp8 >> 4) & 0x0f); + wren = (*rtemp8 & 0x0f); + } + + if(offset < EFUSE_MAX_SECTION_88E) + { + // Get word enable value from PG header + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren)); - if (offset < EFUSE_MAX_SECTION_88E) { - /* Get word enable value from PG header */ - - for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) { - /* Check word enable condition in the section */ - if (!(wren & 0x01)) { - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + for(i=0; i= EFUSE_REAL_CONTENT_LEN_88E) + + + if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) break; - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d", eFuse_Addr)); + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); eFuse_Addr++; + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); + efuse_utilized++; - eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00); - if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) + eFuseWord[offset][i] |= (((u2Byte)*rtemp8 << 8) & 0xff00); + + if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) break; } + wren >>= 1; + } } - /* Read next PG header */ - ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); - - if (*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) { + // Read next PG header + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d rtemp 0x%x\n", eFuse_Addr, *rtemp8)); + + if(*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) + { efuse_utilized++; eFuse_Addr++; } } - /* 3. Collect 16 sections and 4 word unit into Efuse map. */ - for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) { - for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) { - efuseTbl[(i*8)+(j*2)] = (eFuseWord[i][j] & 0xff); - efuseTbl[(i*8)+((j*2)+1)] = ((eFuseWord[i][j] >> 8) & 0xff); + // + // 3. Collect 16 sections and 4 word unit into Efuse map. + // + for(i=0; i> 8) & 0xff); } } - /* 4. Copy from Efuse map to output pointer memory!!! */ - for (i = 0; i < _size_byte; i++) - pbuf[i] = efuseTbl[_offset+i]; - /* 5. Calculate Efuse utilization. */ + // + // 4. Copy from Efuse map to output pointer memory!!! + // + for(i=0; i<_size_byte; i++) + { + pbuf[i] = efuseTbl[_offset+i]; + } + + // + // 5. Calculate Efuse utilization. + // + efuse_usage = (u1Byte)((eFuse_Addr*100)/EFUSE_REAL_CONTENT_LEN_88E); rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr); exit: - kfree(efuseTbl); + if(efuseTbl) + rtw_mfree(efuseTbl, EFUSE_MAP_LEN_88E); - if (eFuseWord) + if(eFuseWord) rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); } -static void ReadEFuseByIC(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool bPseudoTest) + +static BOOLEAN +Hal_EfuseSwitchToBank( + IN PADAPTER pAdapter, + IN u8 bank, + IN BOOLEAN bPseudoTest + ) { - if (!bPseudoTest) { + BOOLEAN bRet = _FALSE; + u32 value32=0; + + //RTPRINT(FEEPROM, EFUSE_PG, ("Efuse switch bank to %d\n", bank)); + if(bPseudoTest) + { + fakeEfuseBank = bank; + bRet = _TRUE; + } + else + { + if(IS_HARDWARE_TYPE_8723A(pAdapter) && + INCLUDE_MULTI_FUNC_BT(pAdapter)) + { + value32 = rtw_read32(pAdapter, EFUSE_TEST); + bRet = _TRUE; + switch(bank) + { + case 0: + value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); + break; + case 1: + value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_0); + break; + case 2: + value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_1); + break; + case 3: + value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_2); + break; + default: + value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); + bRet = _FALSE; + break; + } + rtw_write32(pAdapter, EFUSE_TEST, value32); + } + else + bRet = _TRUE; + } + return bRet; +} + + + +static VOID +ReadEFuseByIC( + PADAPTER Adapter, + u8 efuseType, + u16 _offset, + u16 _size_byte, + u8 *pbuf, + IN BOOLEAN bPseudoTest + ) +{ +#ifdef DBG_IOL_READ_EFUSE_MAP + u8 logical_map[512]; +#endif + +#ifdef CONFIG_IOL_READ_EFUSE_MAP + if(!bPseudoTest )//&& rtw_IOL_applied(Adapter)) + { int ret = _FAIL; - if (rtw_IOL_applied(Adapter)) { + if(rtw_IOL_applied(Adapter)) + { rtw_hal_power_on(Adapter); - + iol_mode_enable(Adapter, 1); + #ifdef DBG_IOL_READ_EFUSE_MAP + iol_read_efuse(Adapter, 0, _offset, _size_byte, logical_map); + #else ret = iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf); - iol_mode_enable(Adapter, 0); - - if (_SUCCESS == ret) + #endif + iol_mode_enable(Adapter, 0); + + if(_SUCCESS == ret) goto exit; } } +#endif Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest); exit: - return; + +#ifdef DBG_IOL_READ_EFUSE_MAP + if(_rtw_memcmp(logical_map, Adapter->eeprompriv.efuse_eeprom_data, 0x130) == _FALSE) + { + int i; + DBG_871X("%s compare first 0x130 byte fail\n", __FUNCTION__); + for(i=0;i<512;i++) + { + if(i%16==0) + DBG_871X("0x%03x: ", i); + DBG_871X("%02x ", logical_map[i]); + if(i%16==15) + DBG_871X("\n"); + } + DBG_871X("\n"); + } +#endif + + return; } -static void ReadEFuse_Pseudo(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool bPseudoTest) +static VOID +ReadEFuse_Pseudo( + PADAPTER Adapter, + u8 efuseType, + u16 _offset, + u16 _size_byte, + u8 *pbuf, + IN BOOLEAN bPseudoTest + ) { Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest); } -static void rtl8188e_ReadEFuse(struct adapter *Adapter, u8 efuseType, - u16 _offset, u16 _size_byte, u8 *pbuf, - bool bPseudoTest) +static VOID +rtl8188e_ReadEFuse( + PADAPTER Adapter, + u8 efuseType, + u16 _offset, + u16 _size_byte, + u8 *pbuf, + IN BOOLEAN bPseudoTest + ) { - if (bPseudoTest) - ReadEFuse_Pseudo (Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); + if(bPseudoTest) + { + ReadEFuse_Pseudo(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); + } else + { ReadEFuseByIC(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); -} - -/* Do not support BT */ -static void Hal_EFUSEGetEfuseDefinition88E(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut) -{ - switch (type) { - case TYPE_EFUSE_MAX_SECTION: - { - u8 *pMax_section; - pMax_section = (u8 *)pOut; - *pMax_section = EFUSE_MAX_SECTION_88E; - } - break; - case TYPE_EFUSE_REAL_CONTENT_LEN: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; - } - break; - case TYPE_EFUSE_CONTENT_LEN_BANK: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; - } - break; - case TYPE_AVAILABLE_EFUSE_BYTES_BANK: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - case TYPE_EFUSE_MAP_LEN: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = (u16)EFUSE_MAP_LEN_88E; - } - break; - case TYPE_EFUSE_PROTECT_BYTES_BANK: - { - u8 *pu1Tmp; - pu1Tmp = (u8 *)pOut; - *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - default: - { - u8 *pu1Tmp; - pu1Tmp = (u8 *)pOut; - *pu1Tmp = 0; - } - break; } } -static void Hal_EFUSEGetEfuseDefinition_Pseudo88E(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut) +//Do not support BT +VOID +Hal_EFUSEGetEfuseDefinition88E( + IN PADAPTER pAdapter, + IN u1Byte efuseType, + IN u1Byte type, + OUT PVOID pOut + ) { - switch (type) { - case TYPE_EFUSE_MAX_SECTION: - { - u8 *pMax_section; - pMax_section = (u8 *)pOut; - *pMax_section = EFUSE_MAX_SECTION_88E; - } - break; - case TYPE_EFUSE_REAL_CONTENT_LEN: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; - } - break; - case TYPE_EFUSE_CONTENT_LEN_BANK: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; - } - break; - case TYPE_AVAILABLE_EFUSE_BYTES_BANK: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - case TYPE_EFUSE_MAP_LEN: - { - u16 *pu2Tmp; - pu2Tmp = (u16 *)pOut; - *pu2Tmp = (u16)EFUSE_MAP_LEN_88E; - } - break; - case TYPE_EFUSE_PROTECT_BYTES_BANK: - { - u8 *pu1Tmp; - pu1Tmp = (u8 *)pOut; - *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E); - } - break; - default: - { - u8 *pu1Tmp; - pu1Tmp = (u8 *)pOut; - *pu1Tmp = 0; - } - break; + switch(type) + { + case TYPE_EFUSE_MAX_SECTION: + { + u8* pMax_section; + pMax_section = (u8*)pOut; + *pMax_section = EFUSE_MAX_SECTION_88E; + } + break; + case TYPE_EFUSE_REAL_CONTENT_LEN: + { + u16* pu2Tmp; + pu2Tmp = (u16*)pOut; + *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; + } + break; + case TYPE_EFUSE_CONTENT_LEN_BANK: + { + u16* pu2Tmp; + pu2Tmp = (u16*)pOut; + *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; + } + break; + case TYPE_AVAILABLE_EFUSE_BYTES_BANK: + { + u16* pu2Tmp; + pu2Tmp = (u16*)pOut; + *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); + } + break; + case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: + { + u16* pu2Tmp; + pu2Tmp = (u16*)pOut; + *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); + } + break; + case TYPE_EFUSE_MAP_LEN: + { + u16* pu2Tmp; + pu2Tmp = (u16*)pOut; + *pu2Tmp = (u16)EFUSE_MAP_LEN_88E; + } + break; + case TYPE_EFUSE_PROTECT_BYTES_BANK: + { + u8* pu1Tmp; + pu1Tmp = (u8*)pOut; + *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E); + } + break; + default: + { + u8* pu1Tmp; + pu1Tmp = (u8*)pOut; + *pu1Tmp = 0; + } + break; + } +} +VOID +Hal_EFUSEGetEfuseDefinition_Pseudo88E( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN u8 type, + OUT PVOID pOut + ) +{ + switch(type) + { + case TYPE_EFUSE_MAX_SECTION: + { + u8* pMax_section; + pMax_section = (pu1Byte)pOut; + *pMax_section = EFUSE_MAX_SECTION_88E; + } + break; + case TYPE_EFUSE_REAL_CONTENT_LEN: + { + u16* pu2Tmp; + pu2Tmp = (pu2Byte)pOut; + *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; + } + break; + case TYPE_EFUSE_CONTENT_LEN_BANK: + { + u16* pu2Tmp; + pu2Tmp = (pu2Byte)pOut; + *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; + } + break; + case TYPE_AVAILABLE_EFUSE_BYTES_BANK: + { + u16* pu2Tmp; + pu2Tmp = (pu2Byte)pOut; + *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); + } + break; + case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: + { + u16* pu2Tmp; + pu2Tmp = (pu2Byte)pOut; + *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); + } + break; + case TYPE_EFUSE_MAP_LEN: + { + u16* pu2Tmp; + pu2Tmp = (pu2Byte)pOut; + *pu2Tmp = (u2Byte)EFUSE_MAP_LEN_88E; + } + break; + case TYPE_EFUSE_PROTECT_BYTES_BANK: + { + u8* pu1Tmp; + pu1Tmp = (u8*)pOut; + *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E); + } + break; + default: + { + u8* pu1Tmp; + pu1Tmp = (u8*)pOut; + *pu1Tmp = 0; + } + break; } } -static void rtl8188e_EFUSE_GetEfuseDefinition(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut, bool bPseudoTest) + +static VOID +rtl8188e_EFUSE_GetEfuseDefinition( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN u8 type, + OUT void *pOut, + IN BOOLEAN bPseudoTest + ) { - if (bPseudoTest) + if(bPseudoTest) + { Hal_EFUSEGetEfuseDefinition_Pseudo88E(pAdapter, efuseType, type, pOut); + } else + { Hal_EFUSEGetEfuseDefinition88E(pAdapter, efuseType, type, pOut); + } } -static u8 Hal_EfuseWordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest) +static u8 +Hal_EfuseWordEnableDataWrite( IN PADAPTER pAdapter, + IN u16 efuse_addr, + IN u8 word_en, + IN u8 *data, + IN BOOLEAN bPseudoTest) { u16 tmpaddr = 0; u16 start_addr = efuse_addr; - u8 badworden = 0x0F; - u8 tmpdata[8]; + u8 badworden = 0x0F; + u8 tmpdata[8]; - _rtw_memset((void *)tmpdata, 0xff, PGPKT_DATA_SIZE); + _rtw_memset((PVOID)tmpdata, 0xff, PGPKT_DATA_SIZE); + //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("word_en = %x efuse_addr=%x\n", word_en, efuse_addr)); - if (!(word_en&BIT0)) { + if(!(word_en&BIT0)) + { tmpaddr = start_addr; - efuse_OneByteWrite(pAdapter, start_addr++, data[0], bPseudoTest); - efuse_OneByteWrite(pAdapter, start_addr++, data[1], bPseudoTest); + efuse_OneByteWrite(pAdapter,start_addr++, data[0], bPseudoTest); + efuse_OneByteWrite(pAdapter,start_addr++, data[1], bPseudoTest); - efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[0], bPseudoTest); - efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[1], bPseudoTest); - if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1])) + efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[0], bPseudoTest); + efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[1], bPseudoTest); + if((data[0]!=tmpdata[0])||(data[1]!=tmpdata[1])){ badworden &= (~BIT0); + } } - if (!(word_en&BIT1)) { + if(!(word_en&BIT1)) + { tmpaddr = start_addr; - efuse_OneByteWrite(pAdapter, start_addr++, data[2], bPseudoTest); - efuse_OneByteWrite(pAdapter, start_addr++, data[3], bPseudoTest); + efuse_OneByteWrite(pAdapter,start_addr++, data[2], bPseudoTest); + efuse_OneByteWrite(pAdapter,start_addr++, data[3], bPseudoTest); - efuse_OneByteRead(pAdapter, tmpaddr , &tmpdata[2], bPseudoTest); - efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[3], bPseudoTest); - if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3])) - badworden &= (~BIT1); + efuse_OneByteRead(pAdapter,tmpaddr , &tmpdata[2], bPseudoTest); + efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[3], bPseudoTest); + if((data[2]!=tmpdata[2])||(data[3]!=tmpdata[3])){ + badworden &=( ~BIT1); + } } - if (!(word_en&BIT2)) { + if(!(word_en&BIT2)) + { tmpaddr = start_addr; - efuse_OneByteWrite(pAdapter, start_addr++, data[4], bPseudoTest); - efuse_OneByteWrite(pAdapter, start_addr++, data[5], bPseudoTest); + efuse_OneByteWrite(pAdapter,start_addr++, data[4], bPseudoTest); + efuse_OneByteWrite(pAdapter,start_addr++, data[5], bPseudoTest); - efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[4], bPseudoTest); - efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[5], bPseudoTest); - if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5])) - badworden &= (~BIT2); + efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[4], bPseudoTest); + efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[5], bPseudoTest); + if((data[4]!=tmpdata[4])||(data[5]!=tmpdata[5])){ + badworden &=( ~BIT2); + } } - if (!(word_en&BIT3)) { + if(!(word_en&BIT3)) + { tmpaddr = start_addr; - efuse_OneByteWrite(pAdapter, start_addr++, data[6], bPseudoTest); - efuse_OneByteWrite(pAdapter, start_addr++, data[7], bPseudoTest); + efuse_OneByteWrite(pAdapter,start_addr++, data[6], bPseudoTest); + efuse_OneByteWrite(pAdapter,start_addr++, data[7], bPseudoTest); - efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[6], bPseudoTest); - efuse_OneByteRead(pAdapter, tmpaddr+1, &tmpdata[7], bPseudoTest); - if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7])) - badworden &= (~BIT3); + efuse_OneByteRead(pAdapter,tmpaddr, &tmpdata[6], bPseudoTest); + efuse_OneByteRead(pAdapter,tmpaddr+1, &tmpdata[7], bPseudoTest); + if((data[6]!=tmpdata[6])||(data[7]!=tmpdata[7])){ + badworden &=( ~BIT3); + } } return badworden; } -static u8 Hal_EfuseWordEnableDataWrite_Pseudo(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest) +static u8 +Hal_EfuseWordEnableDataWrite_Pseudo( IN PADAPTER pAdapter, + IN u16 efuse_addr, + IN u8 word_en, + IN u8 *data, + IN BOOLEAN bPseudoTest) { - u8 ret; + u8 ret=0; ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest); + return ret; } -static u8 rtl8188e_Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest) +static u8 +rtl8188e_Efuse_WordEnableDataWrite( IN PADAPTER pAdapter, + IN u16 efuse_addr, + IN u8 word_en, + IN u8 *data, + IN BOOLEAN bPseudoTest) { - u8 ret = 0; + u8 ret=0; - if (bPseudoTest) - ret = Hal_EfuseWordEnableDataWrite_Pseudo (pAdapter, efuse_addr, word_en, data, bPseudoTest); + if(bPseudoTest) + { + ret = Hal_EfuseWordEnableDataWrite_Pseudo(pAdapter, efuse_addr, word_en, data, bPseudoTest); + } else + { ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest); + } + return ret; } -static u16 hal_EfuseGetCurrentSize_8188e(struct adapter *pAdapter, bool bPseudoTest) + +static u16 +hal_EfuseGetCurrentSize_8188e(IN PADAPTER pAdapter, + IN BOOLEAN bPseudoTest) { - int bContinual = true; + int bContinual = _TRUE; + u16 efuse_addr = 0; - u8 hoffset = 0, hworden = 0; - u8 efuse_data, word_cnts = 0; + u8 hoffset=0,hworden=0; + u8 efuse_data,word_cnts=0; - if (bPseudoTest) + if(bPseudoTest) + { efuse_addr = (u16)(fakeEfuseUsedBytes); + } else + { rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); + } + //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), start_efuse_addr = %d\n", efuse_addr)); - while (bContinual && - efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest) && - AVAILABLE_EFUSE_ADDR(efuse_addr)) { - if (efuse_data != 0xFF) { - if ((efuse_data&0x1F) == 0x0F) { /* extended header */ + while ( bContinual && + efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && + AVAILABLE_EFUSE_ADDR(efuse_addr)) + { + if(efuse_data!=0xFF) + { + if((efuse_data&0x1F) == 0x0F) //extended header + { hoffset = efuse_data; efuse_addr++; - efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest); - if ((efuse_data & 0x0F) == 0x0F) { + efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest); + if((efuse_data & 0x0F) == 0x0F) + { efuse_addr++; continue; - } else { + } + else + { hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); hworden = efuse_data & 0x0F; } - } else { + } + else + { hoffset = (efuse_data>>4) & 0x0F; hworden = efuse_data & 0x0F; } word_cnts = Efuse_CalculateWordCnts(hworden); - /* read next header */ + //read next header efuse_addr = efuse_addr + (word_cnts*2)+1; - } else { - bContinual = false; + } + else + { + bContinual = _FALSE ; } } - if (bPseudoTest) + if(bPseudoTest) + { fakeEfuseUsedBytes = efuse_addr; + //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), return %d\n", fakeEfuseUsedBytes)); + } else + { rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); + //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), return %d\n", efuse_addr)); + } return efuse_addr; } -static u16 Hal_EfuseGetCurrentSize_Pseudo(struct adapter *pAdapter, bool bPseudoTest) +static u16 +Hal_EfuseGetCurrentSize_Pseudo(IN PADAPTER pAdapter, + IN BOOLEAN bPseudoTest) { - u16 ret = 0; + u16 ret=0; ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest); + return ret; } -static u16 rtl8188e_EfuseGetCurrentSize(struct adapter *pAdapter, u8 efuseType, bool bPseudoTest) -{ - u16 ret = 0; - if (bPseudoTest) +static u16 +rtl8188e_EfuseGetCurrentSize( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN BOOLEAN bPseudoTest) +{ + u16 ret=0; + + if(bPseudoTest) + { ret = Hal_EfuseGetCurrentSize_Pseudo(pAdapter, bPseudoTest); + } else + { ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest); + + } + return ret; } -static int hal_EfusePgPacketRead_8188e(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest) + +static int +hal_EfusePgPacketRead_8188e( + IN PADAPTER pAdapter, + IN u8 offset, + IN u8 *data, + IN BOOLEAN bPseudoTest) { - u8 ReadState = PG_STATE_HEADER; - int bContinual = true; - int bDataEmpty = true; - u8 efuse_data, word_cnts = 0; + u8 ReadState = PG_STATE_HEADER; + + int bContinual = _TRUE; + int bDataEmpty = _TRUE ; + + u8 efuse_data,word_cnts = 0; u16 efuse_addr = 0; - u8 hoffset = 0, hworden = 0; - u8 tmpidx = 0; - u8 tmpdata[8]; - u8 max_section = 0; - u8 tmp_header = 0; + u8 hoffset = 0,hworden = 0; + u8 tmpidx = 0; + u8 tmpdata[8]; + u8 max_section = 0; + u8 tmp_header = 0; - EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (void *)&max_section, bPseudoTest); + EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (PVOID)&max_section, bPseudoTest); - if (data == NULL) - return false; - if (offset > max_section) - return false; + if(data==NULL) + return _FALSE; + if(offset>max_section) + return _FALSE; - _rtw_memset((void *)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); - _rtw_memset((void *)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); + _rtw_memset((PVOID)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); + _rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); - /* Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. */ - /* Skip dummy parts to prevent unexpected data read from Efuse. */ - /* By pass right now. 2009.02.19. */ - while (bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr)) { - /* Header Read ------------- */ - if (ReadState & PG_STATE_HEADER) { - if (efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) { - if (EXT_HEADER(efuse_data)) { + + // + // Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. + // Skip dummy parts to prevent unexpected data read from Efuse. + // By pass right now. 2009.02.19. + // + while(bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr) ) + { + //------- Header Read ------------- + if(ReadState & PG_STATE_HEADER) + { + if(efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest)&&(efuse_data!=0xFF)) + { + if(EXT_HEADER(efuse_data)) + { tmp_header = efuse_data; efuse_addr++; - efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest); - if (!ALL_WORDS_DISABLED(efuse_data)) { + efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest); + if(!ALL_WORDS_DISABLED(efuse_data)) + { hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); hworden = efuse_data & 0x0F; - } else { - DBG_88E("Error, All words disabled\n"); + } + else + { + DBG_8192C("Error, All words disabled\n"); efuse_addr++; continue; } - } else { + } + else + { hoffset = (efuse_data>>4) & 0x0F; hworden = efuse_data & 0x0F; } word_cnts = Efuse_CalculateWordCnts(hworden); - bDataEmpty = true; + bDataEmpty = _TRUE ; - if (hoffset == offset) { - for (tmpidx = 0; tmpidx < word_cnts*2; tmpidx++) { - if (efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx, &efuse_data, bPseudoTest)) { + if(hoffset==offset) + { + for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++) + { + if(efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx ,&efuse_data, bPseudoTest) ) + { tmpdata[tmpidx] = efuse_data; - if (efuse_data != 0xff) - bDataEmpty = false; + if(efuse_data!=0xff) + { + bDataEmpty = _FALSE; + } } } - if (bDataEmpty == false) { + if(bDataEmpty==_FALSE){ ReadState = PG_STATE_DATA; - } else {/* read next header */ + }else{//read next header efuse_addr = efuse_addr + (word_cnts*2)+1; ReadState = PG_STATE_HEADER; } - } else {/* read next header */ + } + else{//read next header efuse_addr = efuse_addr + (word_cnts*2)+1; ReadState = PG_STATE_HEADER; } - } else { - bContinual = false; + } - } else if (ReadState & PG_STATE_DATA) { - /* Data section Read ------------- */ - efuse_WordEnableDataRead(hworden, tmpdata, data); + else{ + bContinual = _FALSE ; + } + } + //------- Data section Read ------------- + else if(ReadState & PG_STATE_DATA) + { + efuse_WordEnableDataRead(hworden,tmpdata,data); efuse_addr = efuse_addr + (word_cnts*2)+1; ReadState = PG_STATE_HEADER; } } - if ((data[0] == 0xff) && (data[1] == 0xff) && (data[2] == 0xff) && (data[3] == 0xff) && - (data[4] == 0xff) && (data[5] == 0xff) && (data[6] == 0xff) && (data[7] == 0xff)) - return false; + if( (data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff) && (data[3]==0xff) && + (data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff) && (data[7]==0xff)) + return _FALSE; else - return true; + return _TRUE; + } -static int Hal_EfusePgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest) +static int +Hal_EfusePgPacketRead( IN PADAPTER pAdapter, + IN u8 offset, + IN u8 *data, + IN BOOLEAN bPseudoTest) { - int ret; + int ret=0; ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest); + + return ret; } -static int Hal_EfusePgPacketRead_Pseudo(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest) +static int +Hal_EfusePgPacketRead_Pseudo( IN PADAPTER pAdapter, + IN u8 offset, + IN u8 *data, + IN BOOLEAN bPseudoTest) { - int ret; + int ret=0; ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest); + return ret; } -static int rtl8188e_Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest) +static int +rtl8188e_Efuse_PgPacketRead( IN PADAPTER pAdapter, + IN u8 offset, + IN u8 *data, + IN BOOLEAN bPseudoTest) { - int ret; + int ret=0; - if (bPseudoTest) - ret = Hal_EfusePgPacketRead_Pseudo (pAdapter, offset, data, bPseudoTest); + if(bPseudoTest) + { + ret = Hal_EfusePgPacketRead_Pseudo(pAdapter, offset, data, bPseudoTest); + } else + { ret = Hal_EfusePgPacketRead(pAdapter, offset, data, bPseudoTest); + } + return ret; } -static bool hal_EfuseFixHeaderProcess(struct adapter *pAdapter, u8 efuseType, struct pgpkt *pFixPkt, u16 *pAddr, bool bPseudoTest) +static BOOLEAN +hal_EfuseFixHeaderProcess( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN PPGPKT_STRUCT pFixPkt, + IN u16 *pAddr, + IN BOOLEAN bPseudoTest +) { - u8 originaldata[8], badworden = 0; - u16 efuse_addr = *pAddr; - u32 PgWriteSuccess = 0; + u8 originaldata[8], badworden=0; + u16 efuse_addr=*pAddr; + u32 PgWriteSuccess=0; - _rtw_memset((void *)originaldata, 0xff, 8); + _rtw_memset((PVOID)originaldata, 0xff, 8); - if (Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) { - /* check if data exist */ + if(Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) + { //check if data exist badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pFixPkt->word_en, originaldata, bPseudoTest); - if (badworden != 0xf) { /* write fail */ + if(badworden != 0xf) // write fail + { PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest); - if (!PgWriteSuccess) - return false; + if(!PgWriteSuccess) + return _FALSE; else efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); - } else { - efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) + 1; } - } else { - efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) + 1; + else + { + efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1; + } + } + else + { + efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1; } *pAddr = efuse_addr; - return true; + return _TRUE; } -static bool hal_EfusePgPacketWrite2ByteHeader(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest) +static BOOLEAN +hal_EfusePgPacketWrite2ByteHeader( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN u16 *pAddr, + IN PPGPKT_STRUCT pTargetPkt, + IN BOOLEAN bPseudoTest) { - bool bRet = false; - u16 efuse_addr = *pAddr, efuse_max_available_len = 0; - u8 pg_header = 0, tmp_header = 0, pg_header_temp = 0; - u8 repeatcnt = 0; + BOOLEAN bRet=_FALSE, bContinual=_TRUE; + u16 efuse_addr=*pAddr, efuse_max_available_len=0; + u8 pg_header=0, tmp_header=0, pg_header_temp=0; + u8 repeatcnt=0; - EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest); + //RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 2byte header\n")); + EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest); - while (efuse_addr < efuse_max_available_len) { + while(efuse_addr < efuse_max_available_len) + { pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F; + //RTPRINT(FEEPROM, EFUSE_PG, ("pg_header = 0x%x\n", pg_header)); efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); - while (tmp_header == 0xFF) { - if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) - return false; + while(tmp_header == 0xFF) + { + if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) + { + //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for pg_header!!\n")); + return _FALSE; + } efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); } - /* to write ext_header */ - if (tmp_header == pg_header) { + //to write ext_header + if(tmp_header == pg_header) + { efuse_addr++; pg_header_temp = pg_header; pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en; @@ -1424,34 +2207,50 @@ static bool hal_EfusePgPacketWrite2ByteHeader(struct adapter *pAdapter, u8 efuse efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); - while (tmp_header == 0xFF) { - if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) - return false; + while(tmp_header == 0xFF) + { + if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) + { + //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for ext_header!!\n")); + return _FALSE; + } efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); } - if ((tmp_header & 0x0F) == 0x0F) { /* word_en PG fail */ - if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) { - return false; - } else { + if((tmp_header & 0x0F) == 0x0F) //word_en PG fail + { + if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) + { + //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for word_en!!\n")); + return _FALSE; + } + else + { efuse_addr++; continue; } - } else if (pg_header != tmp_header) { /* offset PG fail */ - struct pgpkt fixPkt; + } + else if(pg_header != tmp_header) //offset PG fail + { + PGPKT_STRUCT fixPkt; + //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for offset PG fail, need to cover the existed data\n")); fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1); fixPkt.word_en = tmp_header & 0x0F; fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); - if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) - return false; - } else { - bRet = true; + if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) + return _FALSE; + } + else + { + bRet = _TRUE; break; } - } else if ((tmp_header & 0x1F) == 0x0F) { /* wrong extended header */ - efuse_addr += 2; + } + else if ((tmp_header & 0x1F) == 0x0F) //wrong extended header + { + efuse_addr+=2; continue; } } @@ -1460,381 +2259,596 @@ static bool hal_EfusePgPacketWrite2ByteHeader(struct adapter *pAdapter, u8 efuse return bRet; } -static bool hal_EfusePgPacketWrite1ByteHeader(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest) +static BOOLEAN +hal_EfusePgPacketWrite1ByteHeader( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN u16 *pAddr, + IN PPGPKT_STRUCT pTargetPkt, + IN BOOLEAN bPseudoTest) { - bool bRet = false; - u8 pg_header = 0, tmp_header = 0; - u16 efuse_addr = *pAddr; - u8 repeatcnt = 0; + BOOLEAN bRet=_FALSE; + u8 pg_header=0, tmp_header=0; + u16 efuse_addr=*pAddr; + u8 repeatcnt=0; - pg_header = ((pTargetPkt->offset << 4) & 0xf0) | pTargetPkt->word_en; + //RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 1byte header\n")); + pg_header = ((pTargetPkt->offset << 4) & 0xf0) |pTargetPkt->word_en; efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); - while (tmp_header == 0xFF) { - if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) - return false; - efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); - efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); + while(tmp_header == 0xFF) + { + if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) + { + return _FALSE; + } + efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest); + efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest); } - if (pg_header == tmp_header) { - bRet = true; - } else { - struct pgpkt fixPkt; + if(pg_header == tmp_header) + { + bRet = _TRUE; + } + else + { + PGPKT_STRUCT fixPkt; + //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for fixed PG packet, need to cover the existed data\n")); fixPkt.offset = (tmp_header>>4) & 0x0F; fixPkt.word_en = tmp_header & 0x0F; fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); - if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) - return false; + if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) + return _FALSE; } *pAddr = efuse_addr; return bRet; } -static bool hal_EfusePgPacketWriteData(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest) +static BOOLEAN +hal_EfusePgPacketWriteData( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN u16 *pAddr, + IN PPGPKT_STRUCT pTargetPkt, + IN BOOLEAN bPseudoTest) { - u16 efuse_addr = *pAddr; - u8 badworden = 0; - u32 PgWriteSuccess = 0; + BOOLEAN bRet=_FALSE; + u16 efuse_addr=*pAddr; + u8 badworden=0; + u32 PgWriteSuccess=0; badworden = 0x0f; badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest); - if (badworden == 0x0F) { - /* write ok */ - return true; - } else { - /* reorganize other pg packet */ - PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); - if (!PgWriteSuccess) - return false; - else - return true; + if(badworden == 0x0F) + { + // write ok + //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData ok!!\n")); + return _TRUE; } -} - -static bool -hal_EfusePgPacketWriteHeader( - struct adapter *pAdapter, - u8 efuseType, - u16 *pAddr, - struct pgpkt *pTargetPkt, - bool bPseudoTest) -{ - bool bRet = false; - - if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE) - bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); else - bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); + { + //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData Fail!!\n")); + //reorganize other pg packet + + PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); + + if(!PgWriteSuccess) + return _FALSE; + else + return _TRUE; + } return bRet; } -static bool wordEnMatched(struct pgpkt *pTargetPkt, struct pgpkt *pCurPkt, - u8 *pWden) +static BOOLEAN +hal_EfusePgPacketWriteHeader( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN u16 *pAddr, + IN PPGPKT_STRUCT pTargetPkt, + IN BOOLEAN bPseudoTest) { - u8 match_word_en = 0x0F; /* default all words are disabled */ + BOOLEAN bRet=_FALSE; - /* check if the same words are enabled both target and current PG packet */ - if (((pTargetPkt->word_en & BIT0) == 0) && - ((pCurPkt->word_en & BIT0) == 0)) - match_word_en &= ~BIT0; /* enable word 0 */ - if (((pTargetPkt->word_en & BIT1) == 0) && - ((pCurPkt->word_en & BIT1) == 0)) - match_word_en &= ~BIT1; /* enable word 1 */ - if (((pTargetPkt->word_en & BIT2) == 0) && - ((pCurPkt->word_en & BIT2) == 0)) - match_word_en &= ~BIT2; /* enable word 2 */ - if (((pTargetPkt->word_en & BIT3) == 0) && - ((pCurPkt->word_en & BIT3) == 0)) - match_word_en &= ~BIT3; /* enable word 3 */ + if(pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE) + { + bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); + } + else + { + bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); + } + + return bRet; +} + +static BOOLEAN +wordEnMatched( + IN PPGPKT_STRUCT pTargetPkt, + IN PPGPKT_STRUCT pCurPkt, + IN u8 *pWden +) +{ + u8 match_word_en = 0x0F; // default all words are disabled + u8 i; + + // check if the same words are enabled both target and current PG packet + if( ((pTargetPkt->word_en & BIT0) == 0) && + ((pCurPkt->word_en & BIT0) == 0) ) + { + match_word_en &= ~BIT0; // enable word 0 + } + if( ((pTargetPkt->word_en & BIT1) == 0) && + ((pCurPkt->word_en & BIT1) == 0) ) + { + match_word_en &= ~BIT1; // enable word 1 + } + if( ((pTargetPkt->word_en & BIT2) == 0) && + ((pCurPkt->word_en & BIT2) == 0) ) + { + match_word_en &= ~BIT2; // enable word 2 + } + if( ((pTargetPkt->word_en & BIT3) == 0) && + ((pCurPkt->word_en & BIT3) == 0) ) + { + match_word_en &= ~BIT3; // enable word 3 + } *pWden = match_word_en; - if (match_word_en != 0xf) - return true; + if(match_word_en != 0xf) + return _TRUE; else - return false; + return _FALSE; } -static bool hal_EfuseCheckIfDatafollowed(struct adapter *pAdapter, u8 word_cnts, u16 startAddr, bool bPseudoTest) +static BOOLEAN +hal_EfuseCheckIfDatafollowed( + IN PADAPTER pAdapter, + IN u8 word_cnts, + IN u16 startAddr, + IN BOOLEAN bPseudoTest + ) { - bool bRet = false; - u8 i, efuse_data; + BOOLEAN bRet=_FALSE; + u8 i, efuse_data; - for (i = 0; i < (word_cnts*2); i++) { - if (efuse_OneByteRead(pAdapter, (startAddr+i), &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) - bRet = true; + for(i=0; i<(word_cnts*2) ; i++) + { + if(efuse_OneByteRead(pAdapter, (startAddr+i) ,&efuse_data, bPseudoTest)&&(efuse_data != 0xFF)) + bRet = _TRUE; } + return bRet; } -static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest) +static BOOLEAN +hal_EfusePartialWriteCheck( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN u16 *pAddr, + IN PPGPKT_STRUCT pTargetPkt, + IN BOOLEAN bPseudoTest + ) { - bool bRet = false; - u8 i, efuse_data = 0, cur_header = 0; - u8 matched_wden = 0, badworden = 0; - u16 startAddr = 0, efuse_max_available_len = 0, efuse_max = 0; - struct pgpkt curPkt; + BOOLEAN bRet=_FALSE; + u8 i, efuse_data=0, cur_header=0; + u8 new_wden=0, matched_wden=0, badworden=0; + u16 startAddr=0, efuse_max_available_len=0, efuse_max=0; + PGPKT_STRUCT curPkt; - EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest); - EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&efuse_max, bPseudoTest); + EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest); + EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&efuse_max, bPseudoTest); - if (efuseType == EFUSE_WIFI) { - if (bPseudoTest) { + if(efuseType == EFUSE_WIFI) + { + if(bPseudoTest) + { startAddr = (u16)(fakeEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); - } else { - rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr); - startAddr %= EFUSE_REAL_CONTENT_LEN; } - } else { - if (bPseudoTest) - startAddr = (u16)(fakeBTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); else - startAddr = (u16)(BTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); + { + rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr); + startAddr%=EFUSE_REAL_CONTENT_LEN; + } } + else + { + if(bPseudoTest) + { + startAddr = (u16)(fakeBTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); + } + else + { + startAddr = (u16)(BTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); + } + } + //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePartialWriteCheck(), startAddr=%d\n", startAddr)); - while (1) { - if (startAddr >= efuse_max_available_len) { - bRet = false; + while(1) + { + if(startAddr >= efuse_max_available_len) + { + bRet = _FALSE; break; } - if (efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) { - if (EXT_HEADER(efuse_data)) { + if(efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data!=0xFF)) + { + if(EXT_HEADER(efuse_data)) + { cur_header = efuse_data; startAddr++; efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest); - if (ALL_WORDS_DISABLED(efuse_data)) { - bRet = false; + if(ALL_WORDS_DISABLED(efuse_data)) + { + //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition, all words disabled")); + bRet = _FALSE; break; - } else { + } + else + { curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); curPkt.word_en = efuse_data & 0x0F; } - } else { + } + else + { cur_header = efuse_data; curPkt.offset = (cur_header>>4) & 0x0F; curPkt.word_en = cur_header & 0x0F; } curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en); - /* if same header is found but no data followed */ - /* write some part of data followed by the header. */ - if ((curPkt.offset == pTargetPkt->offset) && - (!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr+1, bPseudoTest)) && - wordEnMatched(pTargetPkt, &curPkt, &matched_wden)) { - /* Here to write partial data */ + // if same header is found but no data followed + // write some part of data followed by the header. + if( (curPkt.offset == pTargetPkt->offset) && + (!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr+1, bPseudoTest)) && + wordEnMatched(pTargetPkt, &curPkt, &matched_wden) ) + { + //RTPRINT(FEEPROM, EFUSE_PG, ("Need to partial write data by the previous wrote header\n")); + // Here to write partial data badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr+1, matched_wden, pTargetPkt->data, bPseudoTest); - if (badworden != 0x0F) { - u32 PgWriteSuccess = 0; - /* if write fail on some words, write these bad words again */ - + if(badworden != 0x0F) + { + u32 PgWriteSuccess=0; + // if write fail on some words, write these bad words again + PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); - - if (!PgWriteSuccess) { - bRet = false; /* write fail, return */ + + if(!PgWriteSuccess) + { + bRet = _FALSE; // write fail, return break; } } - /* partial write ok, update the target packet for later use */ - for (i = 0; i < 4; i++) { - if ((matched_wden & (0x1<word_en |= (0x1<word_en |= (0x1<word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); } - /* read from next header */ - startAddr = startAddr + (curPkt.word_cnts*2) + 1; - } else { - /* not used header, 0xff */ + // read from next header + startAddr = startAddr + (curPkt.word_cnts*2) +1; + } + else + { + // not used header, 0xff *pAddr = startAddr; - bRet = true; + //RTPRINT(FEEPROM, EFUSE_PG, ("Started from unused header offset=%d\n", startAddr)); + bRet = _TRUE; break; } } return bRet; } -static bool +static BOOLEAN hal_EfusePgCheckAvailableAddr( - struct adapter *pAdapter, - u8 efuseType, - bool bPseudoTest + IN PADAPTER pAdapter, + IN u8 efuseType, + IN BOOLEAN bPseudoTest ) { - u16 efuse_max_available_len = 0; + u16 efuse_max_available_len=0; - /* Change to check TYPE_EFUSE_MAP_LEN , because 8188E raw 256, logic map over 256. */ - EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&efuse_max_available_len, false); + //Change to check TYPE_EFUSE_MAP_LEN ,beacuse 8188E raw 256,logic map over 256. + EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&efuse_max_available_len, _FALSE); + + //EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&efuse_max_available_len, bPseudoTest); + //RTPRINT(FEEPROM, EFUSE_PG, ("efuse_max_available_len = %d\n", efuse_max_available_len)); - if (Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len) - return false; - return true; + if(Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len) + { + //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgCheckAvailableAddr error!!\n")); + return _FALSE; + } + return _TRUE; } -static void hal_EfuseConstructPGPkt(u8 offset, u8 word_en, u8 *pData, struct pgpkt *pTargetPkt) +static VOID +hal_EfuseConstructPGPkt( + IN u8 offset, + IN u8 word_en, + IN u8 *pData, + IN PPGPKT_STRUCT pTargetPkt + +) { - _rtw_memset((void *)pTargetPkt->data, 0xFF, sizeof(u8)*8); + _rtw_memset((PVOID)pTargetPkt->data, 0xFF, sizeof(u8)*8); pTargetPkt->offset = offset; - pTargetPkt->word_en = word_en; + pTargetPkt->word_en= word_en; efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data); pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); + + //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseConstructPGPkt(), targetPkt, offset=%d, word_en=0x%x, word_cnts=%d\n", pTargetPkt->offset, pTargetPkt->word_en, pTargetPkt->word_cnts)); } -static bool hal_EfusePgPacketWrite_8188e(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *pData, bool bPseudoTest) +static BOOLEAN +hal_EfusePgPacketWrite_BT( + IN PADAPTER pAdapter, + IN u8 offset, + IN u8 word_en, + IN u8 *pData, + IN BOOLEAN bPseudoTest + ) { - struct pgpkt targetPkt; - u16 startAddr = 0; - u8 efuseType = EFUSE_WIFI; + PGPKT_STRUCT targetPkt; + u16 startAddr=0; + u8 efuseType=EFUSE_BT; - if (!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) - return false; + if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) + return _FALSE; hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); - if (!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) - return false; + if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; - if (!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) - return false; + if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; - if (!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) - return false; + if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; - return true; + return _TRUE; } -static int Hal_EfusePgPacketWrite_Pseudo(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest) +static BOOLEAN +hal_EfusePgPacketWrite_8188e( + IN PADAPTER pAdapter, + IN u8 offset, + IN u8 word_en, + IN u8 *pData, + IN BOOLEAN bPseudoTest + ) +{ + PGPKT_STRUCT targetPkt; + u16 startAddr=0; + u8 efuseType=EFUSE_WIFI; + + if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) + return _FALSE; + + hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); + + if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; + + if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; + + if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; + + return _TRUE; +} + + +static int +Hal_EfusePgPacketWrite_Pseudo(IN PADAPTER pAdapter, + IN u8 offset, + IN u8 word_en, + IN u8 *data, + IN BOOLEAN bPseudoTest) { int ret; ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest); + return ret; } -static int Hal_EfusePgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest) +static int +Hal_EfusePgPacketWrite(IN PADAPTER pAdapter, + IN u8 offset, + IN u8 word_en, + IN u8 *data, + IN BOOLEAN bPseudoTest) { - int ret = 0; + int ret=0; ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest); + return ret; } -static int rtl8188e_Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest) +static int +rtl8188e_Efuse_PgPacketWrite(IN PADAPTER pAdapter, + IN u8 offset, + IN u8 word_en, + IN u8 *data, + IN BOOLEAN bPseudoTest) { int ret; - if (bPseudoTest) - ret = Hal_EfusePgPacketWrite_Pseudo (pAdapter, offset, word_en, data, bPseudoTest); + if(bPseudoTest) + { + ret = Hal_EfusePgPacketWrite_Pseudo(pAdapter, offset, word_en, data, bPseudoTest); + } else + { ret = Hal_EfusePgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest); + } return ret; } -static struct HAL_VERSION ReadChipVersion8188E(struct adapter *padapter) +static HAL_VERSION +ReadChipVersion8188E( + IN PADAPTER padapter + ) { u32 value32; - struct HAL_VERSION ChipVersion; - struct hal_data_8188e *pHalData; + HAL_VERSION ChipVersion; + HAL_DATA_TYPE *pHalData; + pHalData = GET_HAL_DATA(padapter); value32 = rtw_read32(padapter, REG_SYS_CFG); - ChipVersion.ICType = CHIP_8188E; + ChipVersion.ICType = CHIP_8188E ; ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP); ChipVersion.RFType = RF_TYPE_1T1R; ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC); - ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; /* IC version (CUT) */ + ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; // IC version (CUT) - /* For regulator mode. by tynli. 2011.01.14 */ + // For regulator mode. by tynli. 2011.01.14 pHalData->RegulatorMode = ((value32 & TRP_BT_EN) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR); - ChipVersion.ROMVer = 0; /* ROM code version. */ + ChipVersion.ROMVer = 0; // ROM code version. pHalData->MultiFunc = RT_MULTI_FUNC_NONE; + +//#if DBG +#if 1 dump_chip_info(ChipVersion); +#endif pHalData->VersionID = ChipVersion; - if (IS_1T2R(ChipVersion)) { + if (IS_1T2R(ChipVersion)){ pHalData->rf_type = RF_1T2R; pHalData->NumTotalRFPath = 2; - } else if (IS_2T2R(ChipVersion)) { + } + else if (IS_2T2R(ChipVersion)){ pHalData->rf_type = RF_2T2R; pHalData->NumTotalRFPath = 2; - } else{ + } + else{ pHalData->rf_type = RF_1T1R; pHalData->NumTotalRFPath = 1; } - - MSG_88E("RF_Type is %x!!\n", pHalData->rf_type); + + MSG_8192C("RF_Type is %x!!\n", pHalData->rf_type); return ChipVersion; } -static void rtl8188e_read_chip_version(struct adapter *padapter) +static void rtl8188e_read_chip_version(PADAPTER padapter) { - ReadChipVersion8188E(padapter); + ReadChipVersion8188E(padapter); } - -static void rtl8188e_GetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet) +void rtl8188e_GetHalODMVar( + PADAPTER Adapter, + HAL_ODM_VARIABLE eVariable, + PVOID pValue1, + BOOLEAN bSet) { -} - -static void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - struct odm_dm_struct *podmpriv = &pHalData->odmpriv; - switch (eVariable) { - case HAL_ODM_STA_INFO: - { - struct sta_info *psta = (struct sta_info *)pValue1; - if (bSet) { - DBG_88E("### Set STA_(%d) info\n", psta->mac_id); - ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta); - ODM_RAInfo_Init(podmpriv, psta->mac_id); - } else { - DBG_88E("### Clean STA_(%d) info\n", psta->mac_id); - ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL); - } - } - break; - case HAL_ODM_P2P_STATE: - ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet); - break; - case HAL_ODM_WIFI_DISPLAY_STATE: - ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet); - break; - default: - break; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T podmpriv = &pHalData->odmpriv; + switch(eVariable){ + case HAL_ODM_STA_INFO: + break; + default: + break; } } - -void rtl8188e_clone_haldata(struct adapter *dst_adapter, struct adapter *src_adapter) +void rtl8188e_SetHalODMVar( + PADAPTER Adapter, + HAL_ODM_VARIABLE eVariable, + PVOID pValue1, + BOOLEAN bSet) { - memcpy(dst_adapter->HalData, src_adapter->HalData, dst_adapter->hal_data_sz); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T podmpriv = &pHalData->odmpriv; + //_irqL irqL; + switch(eVariable){ + case HAL_ODM_STA_INFO: + { + struct sta_info *psta = (struct sta_info *)pValue1; + if(bSet){ + DBG_8192C("### Set STA_(%d) info\n",psta->mac_id); + ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,psta); + #if(RATE_ADAPTIVE_SUPPORT==1) + ODM_RAInfo_Init(podmpriv,psta->mac_id); + #endif + } + else{ + DBG_8192C("### Clean STA_(%d) info\n",psta->mac_id); + //_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); + ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,NULL); + + //_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); + } + } + break; + case HAL_ODM_P2P_STATE: + ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DIRECT,bSet); + break; + case HAL_ODM_WIFI_DISPLAY_STATE: + ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DISPLAY,bSet); + break; + default: + break; + } +} + +void rtl8188e_start_thread(_adapter *padapter) +{ +#ifdef CONFIG_SDIO_HCI +#ifndef CONFIG_SDIO_TX_TASKLET + struct xmit_priv *xmitpriv = &padapter->xmitpriv; + + xmitpriv->SdioXmitThread = kthread_run(rtl8188es_xmit_thread, padapter, "RTWHALXT"); + if (IS_ERR(xmitpriv->SdioXmitThread)) + { + RT_TRACE(_module_hal_xmit_c_, _drv_err_, ("%s: start rtl8188es_xmit_thread FAIL!!\n", __FUNCTION__)); + } +#endif +#endif } -void rtl8188e_start_thread(struct adapter *padapter) +void rtl8188e_stop_thread(_adapter *padapter) { -} +#ifdef CONFIG_SDIO_HCI +#ifndef CONFIG_SDIO_TX_TASKLET + struct xmit_priv *xmitpriv = &padapter->xmitpriv; -void rtl8188e_stop_thread(struct adapter *padapter) -{ + // stop xmit_buf_thread + if (xmitpriv->SdioXmitThread ) { + _rtw_up_sema(&xmitpriv->SdioXmitSema); + _rtw_down_sema(&xmitpriv->SdioXmitTerminateSema); + xmitpriv->SdioXmitThread = 0; + } +#endif +#endif } - -static void hal_notch_filter_8188e(struct adapter *adapter, bool enable) +void hal_notch_filter_8188e(_adapter *adapter, bool enable) { if (enable) { - DBG_88E("Enable notch filter\n"); + DBG_871X("Enable notch filter\n"); rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) | BIT1); } else { - DBG_88E("Disable notch filter\n"); + DBG_871X("Disable notch filter\n"); rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1); } } @@ -1853,17 +2867,22 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc) pHalFunc->hal_dm_watchdog = &rtl8188e_HalDmWatchDog; pHalFunc->Add_RateATid = &rtl8188e_Add_RateATid; - pHalFunc->run_thread = &rtl8188e_start_thread; - pHalFunc->cancel_thread = &rtl8188e_stop_thread; + pHalFunc->run_thread= &rtl8188e_start_thread; + pHalFunc->cancel_thread= &rtl8188e_stop_thread; + +#ifdef CONFIG_ANTENNA_DIVERSITY pHalFunc->AntDivBeforeLinkHandler = &AntDivBeforeLink8188E; pHalFunc->AntDivCompareHandler = &AntDivCompare8188E; +#endif + pHalFunc->read_bbreg = &rtl8188e_PHY_QueryBBReg; pHalFunc->write_bbreg = &rtl8188e_PHY_SetBBReg; pHalFunc->read_rfreg = &rtl8188e_PHY_QueryRFReg; pHalFunc->write_rfreg = &rtl8188e_PHY_SetRFReg; - /* Efuse related function */ + + // Efuse related function pHalFunc->EfusePowerSwitch = &rtl8188e_EfusePowerSwitch; pHalFunc->ReadEFuse = &rtl8188e_ReadEFuse; pHalFunc->EFUSEGetEfuseDefinition = &rtl8188e_EFUSE_GetEfuseDefinition; @@ -1872,54 +2891,67 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc) pHalFunc->Efuse_PgPacketWrite = &rtl8188e_Efuse_PgPacketWrite; pHalFunc->Efuse_WordEnableDataWrite = &rtl8188e_Efuse_WordEnableDataWrite; +#ifdef DBG_CONFIG_ERROR_DETECT pHalFunc->sreset_init_value = &sreset_init_value; pHalFunc->sreset_reset_value = &sreset_reset_value; - pHalFunc->silentreset = &rtl8188e_silentreset_for_specific_platform; + pHalFunc->silentreset = &sreset_reset; pHalFunc->sreset_xmit_status_check = &rtl8188e_sreset_xmit_status_check; pHalFunc->sreset_linked_status_check = &rtl8188e_sreset_linked_status_check; pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status; + pHalFunc->sreset_inprogress= &sreset_inprogress; +#endif //DBG_CONFIG_ERROR_DETECT pHalFunc->GetHalODMVarHandler = &rtl8188e_GetHalODMVar; pHalFunc->SetHalODMVarHandler = &rtl8188e_SetHalODMVar; +#ifdef CONFIG_XMIT_THREAD_MODE + pHalFunc->xmit_thread_handler = &hal_xmit_handler; +#endif + +#ifdef CONFIG_IOL pHalFunc->IOL_exec_cmds_sync = &rtl8188e_IOL_exec_cmds_sync; +#endif pHalFunc->hal_notch_filter = &hal_notch_filter_8188e; + } -u8 GetEEPROMSize8188E(struct adapter *padapter) +u8 GetEEPROMSize8188E(PADAPTER padapter) { u8 size = 0; u32 cr; cr = rtw_read16(padapter, REG_9346CR); - /* 6: EEPROM used is 93C46, 4: boot from E-Fuse. */ + // 6: EEPROM used is 93C46, 4: boot from E-Fuse. size = (cr & BOOT_FROM_EEPROM) ? 6 : 4; - MSG_88E("EEPROM type is %s\n", size == 4 ? "E-FUSE" : "93C46"); + MSG_8192C("EEPROM type is %s\n", size==4 ? "E-FUSE" : "93C46"); return size; } -/* */ -/* */ -/* LLT R/W/Init function */ -/* */ -/* */ -static s32 _LLTWrite(struct adapter *padapter, u32 address, u32 data) +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_PCI_HCI) +//------------------------------------------------------------------------- +// +// LLT R/W/Init function +// +//------------------------------------------------------------------------- +s32 _LLTWrite(PADAPTER padapter, u32 address, u32 data) { s32 status = _SUCCESS; s32 count = 0; u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS); u16 LLTReg = REG_LLT_INIT; + rtw_write32(padapter, LLTReg, value); - /* polling */ + //polling do { value = rtw_read32(padapter, LLTReg); - if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) + if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) { break; + } if (count > POLLING_LLT_THRESHOLD) { RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling write LLT done at address %d!\n", address)); @@ -1931,36 +2963,84 @@ static s32 _LLTWrite(struct adapter *padapter, u32 address, u32 data) return status; } -s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy) +u8 _LLTRead(PADAPTER padapter, u32 address) +{ + s32 count = 0; + u32 value = _LLT_INIT_ADDR(address) | _LLT_OP(_LLT_READ_ACCESS); + u16 LLTReg = REG_LLT_INIT; + + + rtw_write32(padapter, LLTReg, value); + + //polling and get value + do { + value = rtw_read32(padapter, LLTReg); + if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) { + return (u8)value; + } + + if (count > POLLING_LLT_THRESHOLD) { + RT_TRACE(_module_hal_init_c_, _drv_err_, ("Failed to polling read LLT done at address %d!\n", address)); + break; + } + } while (count++); + + return 0xFF; +} +void Read_LLT_Tab(PADAPTER padapter) +{ + u32 addr,next_addr; + printk("############### %s ###################\n",__FUNCTION__); + for(addr=0;addr<176;addr++) + { + next_addr = _LLTRead(padapter,addr); + printk("%d->",next_addr); + if(((addr+1) %8) ==0) + printk("\n"); + } + printk("\n##################################\n"); + +} + +s32 InitLLTTable(PADAPTER padapter, u8 txpktbuf_bndy) { s32 status = _FAIL; u32 i; - u32 Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;/* 176, 22k */ + u32 Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;// 176, 22k + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - if (rtw_IOL_applied(padapter)) { - status = iol_InitLLTTable(padapter, txpktbuf_bndy); - } else { +#if defined(CONFIG_IOL_LLT) + if(rtw_IOL_applied(padapter)) + { + status = iol_InitLLTTable(padapter, txpktbuf_bndy); + } + else +#endif + { for (i = 0; i < (txpktbuf_bndy - 1); i++) { status = _LLTWrite(padapter, i, i + 1); - if (_SUCCESS != status) + if (_SUCCESS != status) { return status; + } } - /* end of list */ + // end of list status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF); - if (_SUCCESS != status) + if (_SUCCESS != status) { return status; + } - /* Make the other pages as ring buffer */ - /* This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. */ - /* Otherwise used as local loopback buffer. */ + // Make the other pages as ring buffer + // This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. + // Otherwise used as local loopback buffer. for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) { status = _LLTWrite(padapter, i, (i + 1)); - if (_SUCCESS != status) + if (_SUCCESS != status) { return status; + } } - /* Let last entry point to the start entry of ring buffer */ + // Let last entry point to the start entry of ring buffer status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy); if (_SUCCESS != status) { return status; @@ -1969,425 +3049,752 @@ s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy) return status; } +#endif + void -Hal_InitPGData88E(struct adapter *padapter) +Hal_InitPGData88E(PADAPTER padapter) { - struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u32 i; + u16 value16; - if (!pEEPROM->bautoload_fail_flag) { /* autoload OK. */ - if (!is_boot_from_eeprom(padapter)) { - /* Read EFUSE real map to shadow. */ - EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, false); + if(_FALSE == pEEPROM->bautoload_fail_flag) + { // autoload OK. + if (is_boot_from_eeprom(padapter)) + { + // Read all Content from EEPROM or EFUSE. + for(i = 0; i < HWSET_MAX_SIZE_88E; i += 2) + { +// value16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1))); +// *((u16*)(&PROMContent[i])) = value16; + } } - } else {/* autoload fail */ + else + { + // Read EFUSE real map to shadow. + EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); + } + } + else + {//autoload fail RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("AutoLoad Fail reported from CR9346!!\n")); - /* update to default value 0xFF */ +// pHalData->AutoloadFailFlag = _TRUE; + //update to default value 0xFF if (!is_boot_from_eeprom(padapter)) - EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, false); + EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); } } void Hal_EfuseParseIDCode88E( - struct adapter *padapter, - u8 *hwinfo + IN PADAPTER padapter, + IN u8 *hwinfo ) { - struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); +// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); u16 EEPROMId; - /* Check 0x8129 again for making sure autoload status!! */ - EEPROMId = le16_to_cpu(*((__le16 *)hwinfo)); - if (EEPROMId != RTL_EEPROM_ID) { - pr_err("EEPROM ID(%#x) is invalid!!\n", EEPROMId); - pEEPROM->bautoload_fail_flag = true; - } else { - pEEPROM->bautoload_fail_flag = false; + + // Checl 0x8129 again for making sure autoload status!! + EEPROMId = le16_to_cpu(*((u16*)hwinfo)); + if (EEPROMId != RTL_EEPROM_ID) + { + DBG_8192C("EEPROM ID(%#x) is invalid!!\n", EEPROMId); + pEEPROM->bautoload_fail_flag = _TRUE; + } + else + { + pEEPROM->bautoload_fail_flag = _FALSE; } - pr_info("EEPROM ID = 0x%04x\n", EEPROMId); + DBG_871X("EEPROM ID=0x%04x\n", EEPROMId); } -static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, u8 *PROMContent, bool AutoLoadFail) +static void +Hal_EEValueCheck( + IN u8 EEType, + IN PVOID pInValue, + OUT PVOID pOutValue + ) { - u32 rfPath, eeAddr = EEPROM_TX_PWR_INX_88E, group, TxCount = 0; + switch(EEType) + { + case EETYPE_TX_PWR: + { + u8 *pIn, *pOut; + pIn = (u8*)pInValue; + pOut = (u8*)pOutValue; + if(*pIn >= 0 && *pIn <= 63) + { + *pOut = *pIn; + } + else + { + RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("EETYPE_TX_PWR, value=%d is invalid, set to default=0x%x\n", + *pIn, EEPROM_Default_TxPowerLevel)); + *pOut = EEPROM_Default_TxPowerLevel; + } + } + break; + default: + break; + } +} - _rtw_memset(pwrInfo24G, 0, sizeof(struct txpowerinfo24g)); +static void +Hal_ReadPowerValueFromPROM_8188E( + IN PADAPTER padapter, + IN PTxPowerInfo24G pwrInfo24G, + IN u8* PROMContent, + IN BOOLEAN AutoLoadFail + ) +{ + u32 rfPath, eeAddr=EEPROM_TX_PWR_INX_88E, group,TxCount=0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + _rtw_memset(pwrInfo24G, 0, sizeof(TxPowerInfo24G)); - if (AutoLoadFail) { - for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) { - /* 2.4G default value */ - for (group = 0; group < MAX_CHNL_GROUP_24G; group++) { + if(AutoLoadFail) + { + for(rfPath = 0 ; rfPath < pHalData->NumTotalRFPath ; rfPath++) + { + //2.4G default value + for(group = 0 ; group < MAX_CHNL_GROUP_24G; group++) + { pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; } - for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) { - if (TxCount == 0) { - pwrInfo24G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF; - pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF; - } else { - pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + for(TxCount=0;TxCountBW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF; + pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF; } + else + { + pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + } + } + + + } + + //pHalData->bNOPG = TRUE; + return; + } + + for(rfPath = 0 ; rfPath < pHalData->NumTotalRFPath ; rfPath++) + { + //2.4G default value + for(group = 0 ; group < MAX_CHNL_GROUP_24G; group++) + { + //printk(" IndexCCK_Base rfPath:%d group:%d,eeAddr:0x%02x ",rfPath,group,eeAddr); + pwrInfo24G->IndexCCK_Base[rfPath][group] = PROMContent[eeAddr++]; + //printk(" IndexCCK_Base:%02x \n",pwrInfo24G->IndexCCK_Base[rfPath][group] ); + if(pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF) + { + pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; +// pHalData->bNOPG = TRUE; } } - return; - } - - for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) { - /* 2.4G default value */ - for (group = 0; group < MAX_CHNL_GROUP_24G; group++) { - pwrInfo24G->IndexCCK_Base[rfPath][group] = PROMContent[eeAddr++]; - if (pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF) - pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; - } - for (group = 0; group < MAX_CHNL_GROUP_24G-1; group++) { + for(group = 0 ; group < MAX_CHNL_GROUP_24G-1; group++) + { + //printk(" IndexBW40_Base rfPath:%d group:%d,eeAddr:0x%02x ",rfPath,group,eeAddr); pwrInfo24G->IndexBW40_Base[rfPath][group] = PROMContent[eeAddr++]; - if (pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF) + //printk(" IndexBW40_Base: %02x \n",pwrInfo24G->IndexBW40_Base[rfPath][group] ); + if(pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF) pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; - } - for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) { - if (TxCount == 0) { + } + for(TxCount=0;TxCountBW40_Diff[rfPath][TxCount] = 0; - if (PROMContent[eeAddr] == 0xFF) { - pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF; - } else { - pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; - if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ + if(PROMContent[eeAddr] == 0xFF) + pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF; + else + { + pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; + if(pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; } - if (PROMContent[eeAddr] == 0xFF) { - pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_OFDM_DIFF; - } else { - pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); - if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ + if(PROMContent[eeAddr] == 0xFF) + pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_OFDM_DIFF; + else + { + pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); + if(pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; - } + } pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0; eeAddr++; - } else { - if (PROMContent[eeAddr] == 0xFF) { - pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - } else { - pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; - if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ + } + else + { + if(PROMContent[eeAddr] == 0xFF) + pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + else + { + pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; + if(pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0; } - - if (PROMContent[eeAddr] == 0xFF) { - pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - } else { - pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); - if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ + + if(PROMContent[eeAddr] == 0xFF) + pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + else + { + pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); + if(pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; } eeAddr++; - - if (PROMContent[eeAddr] == 0xFF) { - pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - } else { - pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; - if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ + + if(PROMContent[eeAddr] == 0xFF) + pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + else + { + pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; + if(pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; } - - if (PROMContent[eeAddr] == 0xFF) { - pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; - } else { - pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); - if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT3) /* 4bit sign number to 8 bit sign number */ + + if(PROMContent[eeAddr] == 0xFF) + pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + else + { + pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); + if(pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0; } eeAddr++; } } + } + + } -static u8 Hal_GetChnlGroup88E(u8 chnl, u8 *pGroup) +static u8 +Hal_GetChnlGroup( + IN u8 chnl + ) { - u8 bIn24G = true; + u8 group=0; - if (chnl <= 14) { - bIn24G = true; + if (chnl < 3) // Cjanel 1-3 + group = 0; + else if (chnl < 9) // Channel 4-9 + group = 1; + else // Channel 10-14 + group = 2; - if (chnl < 3) /* Channel 1-2 */ + return group; +} +static u8 +Hal_GetChnlGroup88E( + IN u8 chnl, + OUT u8* pGroup + ) +{ + u8 bIn24G=_TRUE; + + if(chnl<=14) + { + bIn24G=_TRUE; + + if (chnl < 3) // Chanel 1-2 *pGroup = 0; - else if (chnl < 6) /* Channel 3-5 */ + else if (chnl < 6) // Channel 3-5 *pGroup = 1; - else if (chnl < 9) /* Channel 6-8 */ + else if(chnl <9) // Channel 6-8 *pGroup = 2; - else if (chnl < 12) /* Channel 9-11 */ + else if(chnl <12) // Channel 9-11 *pGroup = 3; - else if (chnl < 14) /* Channel 12-13 */ + else if(chnl <14) // Channel 12-13 *pGroup = 4; - else if (chnl == 14) /* Channel 14 */ - *pGroup = 5; - } else { - bIn24G = false; - - if (chnl <= 40) - *pGroup = 0; - else if (chnl <= 48) - *pGroup = 1; - else if (chnl <= 56) - *pGroup = 2; - else if (chnl <= 64) - *pGroup = 3; - else if (chnl <= 104) - *pGroup = 4; - else if (chnl <= 112) - *pGroup = 5; - else if (chnl <= 120) - *pGroup = 5; - else if (chnl <= 128) - *pGroup = 6; - else if (chnl <= 136) - *pGroup = 7; - else if (chnl <= 144) - *pGroup = 8; - else if (chnl <= 153) - *pGroup = 9; - else if (chnl <= 161) - *pGroup = 10; - else if (chnl <= 177) - *pGroup = 11; + else if(chnl ==14) // Channel 14 + *pGroup = 5; + else + { + //RT_TRACE(COMP_EFUSE,DBG_LOUD,("==>Hal_GetChnlGroup88E in 2.4 G, but Channel %d in Group not found \n",chnl)); + } } + else + { + bIn24G=_FALSE; + + if (chnl <=40) + *pGroup = 0; + else if (chnl <=48) + *pGroup = 1; + else if(chnl <=56) + *pGroup = 2; + else if(chnl <=64) + *pGroup = 3; + else if(chnl <=104) + *pGroup = 4; + else if(chnl <=112) + *pGroup = 5; + else if(chnl <=120) + *pGroup = 5; + else if(chnl <=128) + *pGroup = 6; + else if(chnl <=136) + *pGroup = 7; + else if(chnl <=144) + *pGroup = 8; + else if(chnl <=153) + *pGroup = 9; + else if(chnl <=161) + *pGroup = 10; + else if(chnl <=177) + *pGroup = 11; + else + { + //RT_TRACE(COMP_EFUSE,DBG_LOUD,("==>Hal_GetChnlGroup88E in 5G, but Channel %d in Group not found \n",chnl)); + } + + } + //RT_TRACE(COMP_EFUSE,DBG_LOUD,("<==Hal_GetChnlGroup88E, Channel = %d, bIn24G =%d,\n",chnl,bIn24G)); return bIn24G; } -void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail) +void Hal_ReadPowerSavingMode88E( + PADAPTER padapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) { - if (AutoLoadFail) { - padapter->pwrctrlpriv.bHWPowerdown = false; - padapter->pwrctrlpriv.bSupportRemoteWakeup = false; - } else { - /* hw power down mode selection , 0:rf-off / 1:power down */ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); + u8 tmpvalue; - if (padapter->registrypriv.hwpdn_mode == 2) - padapter->pwrctrlpriv.bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT4); - else - padapter->pwrctrlpriv.bHWPowerdown = padapter->registrypriv.hwpdn_mode; - - /* decide hw if support remote wakeup function */ - /* if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */ - padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT1) ? true : false; - - DBG_88E("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) , bSupportRemoteWakeup(%x)\n", __func__, - padapter->pwrctrlpriv.bHWPwrPindetect, padapter->pwrctrlpriv.bHWPowerdown , padapter->pwrctrlpriv.bSupportRemoteWakeup); - - DBG_88E("### PS params => power_mgnt(%x), usbss_enable(%x) ###\n", padapter->registrypriv.power_mgnt, padapter->registrypriv.usbss_enable); + if(AutoLoadFail){ + pwrctl->bHWPowerdown = _FALSE; + pwrctl->bSupportRemoteWakeup = _FALSE; } + else { + + //hw power down mode selection , 0:rf-off / 1:power down + + if(padapter->registrypriv.hwpdn_mode==2) + pwrctl->bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT4)?_TRUE:_FALSE; + else + pwrctl->bHWPowerdown = padapter->registrypriv.hwpdn_mode; + + pwrctl->bHWPwrPindetect = padapter->registrypriv.hwpwrp_detect; + + // decide hw if support remote wakeup function + // if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume +#ifdef CONFIG_USB_HCI + pwrctl->bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT1)?_TRUE :_FALSE; +#endif //CONFIG_USB_HCI + + //if(SUPPORT_HW_RADIO_DETECT(Adapter)) + //Adapter->registrypriv.usbss_enable = pwrctl->bSupportRemoteWakeup ; + + DBG_8192C("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) ,bSupportRemoteWakeup(%x)\n",__FUNCTION__, + pwrctl->bHWPwrPindetect, pwrctl->bHWPowerdown, pwrctl->bSupportRemoteWakeup); + + DBG_8192C("### PS params=> power_mgnt(%x),usbss_enable(%x) ###\n",padapter->registrypriv.power_mgnt,padapter->registrypriv.usbss_enable); + + } + } -void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); - struct txpowerinfo24g pwrInfo24G; - u8 rfPath, ch, group; - u8 bIn24G, TxCount; +void +Hal_ReadTxPowerInfo88E( + IN PADAPTER padapter, + IN u8* PROMContent, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + TxPowerInfo24G pwrInfo24G; + u8 rfPath, ch, group, rfPathMax=1; + u8 pwr, diff,bIn24G,TxCount; - Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail); + Hal_ReadPowerValueFromPROM_8188E(padapter,&pwrInfo24G, PROMContent, AutoLoadFail); - if (!AutoLoadFail) - pHalData->bTXPowerDataReadFromEEPORM = true; + if(!AutoLoadFail) + pHalData->bTXPowerDataReadFromEEPORM = TRUE; - for (rfPath = 0; rfPath < pHalData->NumTotalRFPath; rfPath++) { - for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) { - bIn24G = Hal_GetChnlGroup88E(ch, &group); - if (bIn24G) { - pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group]; - if (ch == 14) - pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][4]; + //for(rfPath = 0 ; rfPath < MAX_RF_PATH ; rfPath++) + for(rfPath = 0 ; rfPath < pHalData->NumTotalRFPath ; rfPath++) + { + for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++) + { + bIn24G = Hal_GetChnlGroup88E(ch+1,&group); + if(bIn24G) + { + + pHalData->Index24G_CCK_Base[rfPath][ch]=pwrInfo24G.IndexCCK_Base[rfPath][group]; + + if(ch==(14-1)) + pHalData->Index24G_BW40_Base[rfPath][ch]=pwrInfo24G.IndexBW40_Base[rfPath][4]; else - pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group]; + pHalData->Index24G_BW40_Base[rfPath][ch]=pwrInfo24G.IndexBW40_Base[rfPath][group]; } - if (bIn24G) { - DBG_88E("======= Path %d, Channel %d =======\n", rfPath, ch); - DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch , pHalData->Index24G_CCK_Base[rfPath][ch]); - DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch , pHalData->Index24G_BW40_Base[rfPath][ch]); - } - } - for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) { - pHalData->CCK_24G_Diff[rfPath][TxCount] = pwrInfo24G.CCK_Diff[rfPath][TxCount]; - pHalData->OFDM_24G_Diff[rfPath][TxCount] = pwrInfo24G.OFDM_Diff[rfPath][TxCount]; - pHalData->BW20_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW20_Diff[rfPath][TxCount]; - pHalData->BW40_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW40_Diff[rfPath][TxCount]; - DBG_88E("======= TxCount %d =======\n", TxCount); - DBG_88E("CCK_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->CCK_24G_Diff[rfPath][TxCount]); - DBG_88E("OFDM_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->OFDM_24G_Diff[rfPath][TxCount]); - DBG_88E("BW20_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW20_24G_Diff[rfPath][TxCount]); - DBG_88E("BW40_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW40_24G_Diff[rfPath][TxCount]); + + if(bIn24G) + { + DBG_871X("======= Path %d, Channel %d =======\n",rfPath,ch+1 ); + DBG_871X("Index24G_CCK_Base[%d][%d] = 0x%x\n",rfPath,ch+1 ,pHalData->Index24G_CCK_Base[rfPath][ch]); + DBG_871X("Index24G_BW40_Base[%d][%d] = 0x%x\n",rfPath,ch+1 ,pHalData->Index24G_BW40_Base[rfPath][ch]); + } + } + + for(TxCount=0;TxCountCCK_24G_Diff[rfPath][TxCount]=pwrInfo24G.CCK_Diff[rfPath][TxCount]; + pHalData->OFDM_24G_Diff[rfPath][TxCount]=pwrInfo24G.OFDM_Diff[rfPath][TxCount]; + pHalData->BW20_24G_Diff[rfPath][TxCount]=pwrInfo24G.BW20_Diff[rfPath][TxCount]; + pHalData->BW40_24G_Diff[rfPath][TxCount]=pwrInfo24G.BW40_Diff[rfPath][TxCount]; +#if DBG + DBG_871X("======= TxCount %d =======\n",TxCount ); + DBG_871X("CCK_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->CCK_24G_Diff[rfPath][TxCount]); + DBG_871X("OFDM_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->OFDM_24G_Diff[rfPath][TxCount]); + DBG_871X("BW20_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW20_24G_Diff[rfPath][TxCount]); + DBG_871X("BW40_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW40_24G_Diff[rfPath][TxCount]); +#endif } } - /* 2010/10/19 MH Add Regulator recognize for CU. */ - if (!AutoLoadFail) { - pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x7); /* bit0~2 */ - if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF) - pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); /* bit0~2 */ - } else { + + // 2010/10/19 MH Add Regulator recognize for EU. + if(!AutoLoadFail) + { + struct registry_priv *registry_par = &padapter->registrypriv; + if( registry_par->regulatory_tid == 0xff){ + if(PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF) + pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); //bit0~2 + else + pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x7); //bit0~2 + }else{ + pHalData->EEPROMRegulatory = registry_par->regulatory_tid; + } + } + else + { pHalData->EEPROMRegulatory = 0; } - DBG_88E("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory); + DBG_871X("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory); + } -void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); - if (!AutoLoadFail) { +VOID +Hal_EfuseParseXtal_8188E( + IN PADAPTER pAdapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + if(!AutoLoadFail) + { pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E]; - if (pHalData->CrystalCap == 0xFF) - pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E; - } else { + if(pHalData->CrystalCap == 0xFF) + pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E; + } + else + { pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E; } - DBG_88E("CrystalCap: 0x%2x\n", pHalData->CrystalCap); + DBG_871X("CrystalCap: 0x%2x\n", pHalData->CrystalCap); } -void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail) +void +Hal_EfuseParseBoardType88E( + IN PADAPTER pAdapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); if (!AutoLoadFail) pHalData->BoardType = ((hwinfo[EEPROM_RF_BOARD_OPTION_88E]&0xE0)>>5); else pHalData->BoardType = 0; - DBG_88E("Board Type: 0x%2x\n", pHalData->BoardType); + DBG_871X("Board Type: 0x%2x\n", pHalData->BoardType); } -void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail) +void +Hal_EfuseParseEEPROMVer88E( + IN PADAPTER padapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - if (!AutoLoadFail) { + if(!AutoLoadFail){ pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E]; - if (pHalData->EEPROMVersion == 0xFF) - pHalData->EEPROMVersion = EEPROM_Default_Version; - } else { + if(pHalData->EEPROMVersion == 0xFF) + pHalData->EEPROMVersion = EEPROM_Default_Version; + } + else{ pHalData->EEPROMVersion = 1; } - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n", - pHalData->EEPROMVersion)); + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Hal_EfuseParseEEPROMVer(), EEVer = %d\n", + pHalData->EEPROMVersion)); } -void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail) +void +rtl8188e_EfuseParseChnlPlan( + IN PADAPTER padapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) { - padapter->mlmepriv.ChannelPlan = - hal_com_get_channel_plan(padapter, - hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF, - padapter->registrypriv.channel_plan, - RT_CHANNEL_DOMAIN_WORLD_WIDE_13, AutoLoadFail); + padapter->mlmepriv.ChannelPlan = hal_com_get_channel_plan( + padapter + , hwinfo?hwinfo[EEPROM_ChannelPlan_88E]:0xFF + , padapter->registrypriv.channel_plan + , RT_CHANNEL_DOMAIN_WORLD_WIDE_13 + , AutoLoadFail + ); - DBG_88E("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan); + DBG_871X("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan); } -void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail) +void +Hal_EfuseParseCustomerID88E( + IN PADAPTER padapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - if (!AutoLoadFail) { + if (!AutoLoadFail) + { pHalData->EEPROMCustomerID = hwinfo[EEPROM_CUSTOMERID_88E]; - } else { + //pHalData->EEPROMSubCustomerID = hwinfo[EEPROM_CUSTOMERID_88E]; + } + else + { pHalData->EEPROMCustomerID = 0; pHalData->EEPROMSubCustomerID = 0; } - DBG_88E("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID); + DBG_871X("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID); + //DBG_871X("EEPROM SubCustomer ID: 0x%02x\n", pHalData->EEPROMSubCustomerID); } -void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool AutoLoadFail) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); - struct registry_priv *registry_par = &pAdapter->registrypriv; - if (!AutoLoadFail) { - /* Antenna Diversity setting. */ - if (registry_par->antdiv_cfg == 2) { /* 2:By EFUSE */ +void +Hal_ReadAntennaDiversity88E( + IN PADAPTER pAdapter, + IN u8* PROMContent, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct registry_priv *registry_par = &pAdapter->registrypriv; + + if(!AutoLoadFail) + { + // Antenna Diversity setting. + if(registry_par->antdiv_cfg == 2)// 2:By EFUSE + { pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E]&0x18)>>3; - if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF) - pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION&0x18)>>3;; - } else { - pHalData->AntDivCfg = registry_par->antdiv_cfg; /* 0:OFF , 1:ON, 2:By EFUSE */ + if(PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF) + pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION&0x18)>>3;; + } + else + { + pHalData->AntDivCfg = registry_par->antdiv_cfg ; // 0:OFF , 1:ON, 2:By EFUSE } - if (registry_par->antdiv_type == 0) { - /* If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. */ - pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E]; - if (pHalData->TRxAntDivType == 0xFF) - pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; /* For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */ - } else { - pHalData->TRxAntDivType = registry_par->antdiv_type; + if(registry_par->antdiv_type == 0)// If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. + { + pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E]; + if (pHalData->TRxAntDivType == 0xFF) + pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; // For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) } - + else{ + pHalData->TRxAntDivType = registry_par->antdiv_type ; + } + if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV) - pHalData->AntDivCfg = 1; /* 0xC1[3] is ignored. */ - } else { - pHalData->AntDivCfg = 0; - pHalData->TRxAntDivType = pHalData->TRxAntDivType; /* The value in the driver setting of device manager. */ + pHalData->AntDivCfg = 1; // 0xC1[3] is ignored. } - DBG_88E("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType); + else + { + pHalData->AntDivCfg = 0; + pHalData->TRxAntDivType = pHalData->TRxAntDivType; // The value in the driver setting of device manager. + } + + DBG_871X("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n",pHalData->AntDivCfg, pHalData->TRxAntDivType); + + } -void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail) +void +Hal_ReadThermalMeter_88E( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) { - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u1Byte tempval; - /* ThermalMeter from EEPROM */ - if (!AutoloadFail) + // + // ThermalMeter from EEPROM + // + if(!AutoloadFail) pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_88E]; else pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E; +// pHalData->EEPROMThermalMeter = (tempval&0x1f); //[4:0] - if (pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) { - pHalData->bAPKThermalMeterIgnore = true; - pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E; + if(pHalData->EEPROMThermalMeter == 0xff || AutoloadFail) + { + pHalData->bAPKThermalMeterIgnore = _TRUE; + pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E; } - DBG_88E("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter); + + //pHalData->ThermalMeter[0] = pHalData->EEPROMThermalMeter; + DBG_871X("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter); + } -void Hal_InitChannelPlan(struct adapter *padapter) + +void +Hal_InitChannelPlan( + IN PADAPTER padapter + ) { +#if 0 + PMGNT_INFO pMgntInfo = &(padapter->MgntInfo); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if((pMgntInfo->RegChannelPlan >= RT_CHANNEL_DOMAIN_MAX) || (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)) + { + pMgntInfo->ChannelPlan = hal_MapChannelPlan8192C(padapter, (pHalData->EEPROMChannelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK)))); + pMgntInfo->bChnlPlanFromHW = (pHalData->EEPROMChannelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? TRUE : FALSE; // User cannot change channel plan. + } + else + { + pMgntInfo->ChannelPlan = (RT_CHANNEL_DOMAIN)pMgntInfo->RegChannelPlan; + } + + switch(pMgntInfo->ChannelPlan) + { + case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN: + { + PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo); + + pDot11dInfo->bEnabled = TRUE; + } + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("ReadAdapterInfo8187(): Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n")); + break; + + default: //for MacOSX compiler warning. + break; + } + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("RegChannelPlan(%d) EEPROMChannelPlan(%d)", pMgntInfo->RegChannelPlan, pHalData->EEPROMChannelPlan)); + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Mgnt ChannelPlan = %d\n" , pMgntInfo->ChannelPlan)); +#endif } -bool HalDetectPwrDownMode88E(struct adapter *Adapter) +BOOLEAN HalDetectPwrDownMode88E(PADAPTER Adapter) { u8 tmpvalue = 0; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); EFUSE_ShadowRead(Adapter, 1, EEPROM_RF_FEATURE_OPTION_88E, (u32 *)&tmpvalue); - /* 2010/08/25 MH INF priority > PDN Efuse value. */ - if (tmpvalue & BIT(4) && pwrctrlpriv->reg_pdnmode) - pHalData->pwrdown = true; + // 2010/08/25 MH INF priority > PDN Efuse value. + if(tmpvalue & BIT(4) && pwrctrlpriv->reg_pdnmode) + { + pHalData->pwrdown = _TRUE; + } else - pHalData->pwrdown = false; + { + pHalData->pwrdown = _FALSE; + } - DBG_88E("HalDetectPwrDownMode(): PDN =%d\n", pHalData->pwrdown); + DBG_8192C("HalDetectPwrDownMode(): PDN=%d\n", pHalData->pwrdown); return pHalData->pwrdown; -} /* HalDetectPwrDownMode */ +} // HalDetectPwrDownMode -/* This function is used only for 92C to set REG_BCN_CTRL(0x550) register. */ -/* We just reserve the value of the register in variable pHalData->RegBcnCtrlVal and then operate */ -/* the value of the register via atomic operation. */ -/* This prevents from race condition when setting this register. */ -/* The value of pHalData->RegBcnCtrlVal is initialized in HwConfigureRTL8192CE() function. */ - -void SetBcnCtrlReg(struct adapter *padapter, u8 SetBits, u8 ClearBits) +#ifdef CONFIG_WOWLAN +void Hal_DetectWoWMode(PADAPTER pAdapter) { - struct hal_data_8188e *pHalData; + adapter_to_pwrctl(pAdapter)->bSupportRemoteWakeup = _TRUE; + DBG_871X("%s\n", __func__); +} +#endif + +#ifdef CONFIG_RF_GAIN_OFFSET +void Hal_ReadRFGainOffset( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail) +{ + u8 buff[EFUSE_MAX_SIZE]; + u32 res; + // + // BB_RF Gain Offset from EEPROM + // + //res = rtw_efuse_access(Adapter, _FALSE, 0, EFUSE_MAX_SIZE, buff); + if(!AutoloadFail ){ + Adapter->eeprompriv.EEPROMRFGainOffset = PROMContent[EEPROM_RF_GAIN_OFFSET_88E]; + Adapter->eeprompriv.EEPROMRFGainVal=EFUSE_Read1Byte(Adapter, EEPROM_RF_GAIN_VAL_88E); + } + else{ + Adapter->eeprompriv.EEPROMRFGainOffset = EEPROM_Default_RFGainOffset; + Adapter->eeprompriv.EEPROMRFGainVal=0xff; + } + DBG_871X("EEPRORFGainOffset = 0x%02x\n", Adapter->eeprompriv.EEPROMRFGainOffset); +} +#endif //CONFIG_RF_GAIN_OFFSET + +//==================================================================================== +// +// 20100209 Joseph: +// This function is used only for 92C to set REG_BCN_CTRL(0x550) register. +// We just reserve the value of the register in variable pHalData->RegBcnCtrlVal and then operate +// the value of the register via atomic operation. +// This prevents from race condition when setting this register. +// The value of pHalData->RegBcnCtrlVal is initialized in HwConfigureRTL8192CE() function. +// +void SetBcnCtrlReg( + PADAPTER padapter, + u8 SetBits, + u8 ClearBits) +{ + PHAL_DATA_TYPE pHalData; + pHalData = GET_HAL_DATA(padapter); pHalData->RegBcnCtrlVal |= SetBits; pHalData->RegBcnCtrlVal &= ~ClearBits; +#if 0 +//#ifdef CONFIG_SDIO_HCI + if (pHalData->sdio_himr & (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK)) + pHalData->RegBcnCtrlVal |= EN_TXBCN_RPT; +#endif + rtw_write8(padapter, REG_BCN_CTRL, (u8)pHalData->RegBcnCtrlVal); } + diff --git a/hal/rtl8188e_phycfg.c b/hal/rtl8188e_phycfg.c old mode 100644 new mode 100755 index 36ad9db..99bc334 --- a/hal/rtl8188e_phycfg.c +++ b/hal/rtl8188e_phycfg.c @@ -1,1135 +1,3552 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _RTL8188E_PHYCFG_C_ - -#include -#include -#include -#include - -/*---------------------------Define Local Constant---------------------------*/ -/* Channel switch:The size of command tables for switch channel*/ -#define MAX_PRECMD_CNT 16 -#define MAX_RFDEPENDCMD_CNT 16 -#define MAX_POSTCMD_CNT 16 - -#define MAX_DOZE_WAITING_TIMES_9x 64 - -/*---------------------------Define Local Constant---------------------------*/ - -/*------------------------Define global variable-----------------------------*/ - -/*------------------------Define local variable------------------------------*/ - -/*--------------------Define export function prototype-----------------------*/ -/* Please refer to header file */ -/*--------------------Define export function prototype-----------------------*/ - -/*----------------------------Function Body----------------------------------*/ -/* */ -/* 1. BB register R/W API */ -/* */ - -/** -* Function: phy_CalculateBitShift -* -* OverView: Get shifted position of the BitMask -* -* Input: -* u32 BitMask, -* -* Output: none -* Return: u32 Return the shift bit bit position of the mask -*/ -static u32 phy_CalculateBitShift(u32 BitMask) -{ - u32 i; - - for (i = 0; i <= 31; i++) { - if (((BitMask>>i) & 0x1) == 1) - break; - } - return i; -} - -/** -* Function: PHY_QueryBBReg -* -* OverView: Read "sepcific bits" from BB register -* -* Input: -* struct adapter *Adapter, -* u32 RegAddr, The target address to be readback -* u32 BitMask The target bit position in the target address -* to be readback -* Output: None -* Return: u32 Data The readback register value -* Note: This function is equal to "GetRegSetting" in PHY programming guide -*/ -u32 -rtl8188e_PHY_QueryBBReg( - struct adapter *Adapter, - u32 RegAddr, - u32 BitMask - ) -{ - u32 ReturnValue = 0, OriginalValue, BitShift; - - OriginalValue = rtw_read32(Adapter, RegAddr); - BitShift = phy_CalculateBitShift(BitMask); - ReturnValue = (OriginalValue & BitMask) >> BitShift; - return ReturnValue; -} - -/** -* Function: PHY_SetBBReg -* -* OverView: Write "Specific bits" to BB register (page 8~) -* -* Input: -* struct adapter *Adapter, -* u32 RegAddr, The target address to be modified -* u32 BitMask The target bit position in the target address -* to be modified -* u32 Data The new register value in the target bit position -* of the target address -* -* Output: None -* Return: None -* Note: This function is equal to "PutRegSetting" in PHY programming guide -*/ - -void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u32 Data) -{ - u32 OriginalValue, BitShift; - - if (BitMask != bMaskDWord) { /* if not "double word" write */ - OriginalValue = rtw_read32(Adapter, RegAddr); - BitShift = phy_CalculateBitShift(BitMask); - Data = ((OriginalValue & (~BitMask)) | (Data << BitShift)); - } - - rtw_write32(Adapter, RegAddr, Data); -} - -/* */ -/* 2. RF register R/W API */ -/* */ -/** -* Function: phy_RFSerialRead -* -* OverView: Read regster from RF chips -* -* Input: -* struct adapter *Adapter, -* enum rf_radio_path eRFPath, Radio path of A/B/C/D -* u32 Offset, The target address to be read -* -* Output: None -* Return: u32 reback value -* Note: Threre are three types of serial operations: -* 1. Software serial write -* 2. Hardware LSSI-Low Speed Serial Interface -* 3. Hardware HSSI-High speed -* serial write. Driver need to implement (1) and (2). -* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() -*/ -static u32 -phy_RFSerialRead( - struct adapter *Adapter, - enum rf_radio_path eRFPath, - u32 Offset - ) -{ - u32 retValue = 0; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; - u32 NewOffset; - u32 tmplong, tmplong2; - u8 RfPiEnable = 0; - /* */ - /* Make sure RF register offset is correct */ - /* */ - Offset &= 0xff; - - /* */ - /* Switch page for 8256 RF IC */ - /* */ - NewOffset = Offset; - - /* For 92S LSSI Read RFLSSIRead */ - /* For RF A/B write 0x824/82c(does not work in the future) */ - /* We must use 0x824 for RF A and B to execute read trigger */ - tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord); - if (eRFPath == RF_PATH_A) - tmplong2 = tmplong; - else - tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord); - - tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; /* T65 RF */ - - PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong&(~bLSSIReadEdge)); - rtw_udelay_os(10);/* PlatformStallExecution(10); */ - - PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2); - rtw_udelay_os(100);/* PlatformStallExecution(100); */ - - rtw_udelay_os(10);/* PlatformStallExecution(10); */ - - if (eRFPath == RF_PATH_A) - RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT8); - else if (eRFPath == RF_PATH_B) - RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT8); - - if (RfPiEnable) { /* Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF */ - retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData); - } else { /* Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF */ - retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData); - } - return retValue; -} - -/** -* Function: phy_RFSerialWrite -* -* OverView: Write data to RF register (page 8~) -* -* Input: -* struct adapter *Adapter, -* enum rf_radio_path eRFPath, Radio path of A/B/C/D -* u32 Offset, The target address to be read -* u32 Data The new register Data in the target bit position -* of the target to be read -* -* Output: None -* Return: None -* Note: Threre are three types of serial operations: -* 1. Software serial write -* 2. Hardware LSSI-Low Speed Serial Interface -* 3. Hardware HSSI-High speed -* serial write. Driver need to implement (1) and (2). -* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() - * - * Note: For RF8256 only - * The total count of RTL8256(Zebra4) register is around 36 bit it only employs - * 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) - * to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration - * programming guide" for more details. - * Thus, we define a sub-finction for RTL8526 register address conversion - * =========================================================== - * Register Mode RegCTL[1] RegCTL[0] Note - * (Reg00[12]) (Reg00[10]) - * =========================================================== - * Reg_Mode0 0 x Reg 0 ~15(0x0 ~ 0xf) - * ------------------------------------------------------------------ - * Reg_Mode1 1 0 Reg 16 ~30(0x1 ~ 0xf) - * ------------------------------------------------------------------ - * Reg_Mode2 1 1 Reg 31 ~ 45(0x1 ~ 0xf) - * ------------------------------------------------------------------ - * - * 2008/09/02 MH Add 92S RF definition - * - * - * -*/ -static void -phy_RFSerialWrite( - struct adapter *Adapter, - enum rf_radio_path eRFPath, - u32 Offset, - u32 Data - ) -{ - u32 DataAndAddr = 0; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[eRFPath]; - u32 NewOffset; - - /* 2009/06/17 MH We can not execute IO for power save or other accident mode. */ - - Offset &= 0xff; - - /* */ - /* Switch page for 8256 RF IC */ - /* */ - NewOffset = Offset; - - /* */ - /* Put write addr in [5:0] and write data in [31:16] */ - /* */ - DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; /* T65 RF */ - - /* */ - /* Write Operation */ - /* */ - PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); -} - -/** -* Function: PHY_QueryRFReg -* -* OverView: Query "Specific bits" to RF register (page 8~) -* -* Input: -* struct adapter *Adapter, -* enum rf_radio_path eRFPath, Radio path of A/B/C/D -* u32 RegAddr, The target address to be read -* u32 BitMask The target bit position in the target address -* to be read -* -* Output: None -* Return: u32 Readback value -* Note: This function is equal to "GetRFRegSetting" in PHY programming guide -*/ -u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum rf_radio_path eRFPath, - u32 RegAddr, u32 BitMask) -{ - u32 Original_Value, Readback_Value, BitShift; - - Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); - - BitShift = phy_CalculateBitShift(BitMask); - Readback_Value = (Original_Value & BitMask) >> BitShift; - return Readback_Value; -} - -/** -* Function: PHY_SetRFReg -* -* OverView: Write "Specific bits" to RF register (page 8~) -* -* Input: -* struct adapter *Adapter, -* enum rf_radio_path eRFPath, Radio path of A/B/C/D -* u32 RegAddr, The target address to be modified -* u32 BitMask The target bit position in the target address -* to be modified -* u32 Data The new register Data in the target bit position -* of the target address -* -* Output: None -* Return: None -* Note: This function is equal to "PutRFRegSetting" in PHY programming guide -*/ -void -rtl8188e_PHY_SetRFReg( - struct adapter *Adapter, - enum rf_radio_path eRFPath, - u32 RegAddr, - u32 BitMask, - u32 Data - ) -{ - u32 Original_Value, BitShift; - - /* RF data is 12 bits only */ - if (BitMask != bRFRegOffsetMask) { - Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); - BitShift = phy_CalculateBitShift(BitMask); - Data = ((Original_Value & (~BitMask)) | (Data << BitShift)); - } - - phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data); -} - -/* */ -/* 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. */ -/* */ - -/*----------------------------------------------------------------------------- - * Function: PHY_MACConfig8192C - * - * Overview: Condig MAC by header file or parameter file. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 08/12/2008 MHC Create Version 0. - * - *---------------------------------------------------------------------------*/ -s32 PHY_MACConfig8188E(struct adapter *Adapter) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - int rtStatus = _SUCCESS; - - /* */ - /* Config MAC */ - /* */ - if (HAL_STATUS_FAILURE == ODM_ConfigMACWithHeaderFile(&pHalData->odmpriv)) - rtStatus = _FAIL; - - /* 2010.07.13 AMPDU aggregation number B */ - rtw_write16(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM); - - return rtStatus; -} - -/** -* Function: phy_InitBBRFRegisterDefinition -* -* OverView: Initialize Register definition offset for Radio Path A/B/C/D -* -* Input: -* struct adapter *Adapter, -* -* Output: None -* Return: None -* Note: The initialization value is constant and it should never be changes -*/ -static void -phy_InitBBRFRegisterDefinition( - struct adapter *Adapter -) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - - /* RF Interface Sowrtware Control */ - pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from 0x870 */ - pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) */ - pHalData->PHYRegDef[RF_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;/* 16 LSBs if read 32-bit from 0x874 */ - pHalData->PHYRegDef[RF_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;/* 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876) */ - - /* RF Interface Readback Value */ - pHalData->PHYRegDef[RF_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; /* 16 LSBs if read 32-bit from 0x8E0 */ - pHalData->PHYRegDef[RF_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;/* 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2) */ - pHalData->PHYRegDef[RF_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;/* 16 LSBs if read 32-bit from 0x8E4 */ - pHalData->PHYRegDef[RF_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;/* 16 MSBs if read 32-bit from 0x8E4 (16-bit for 0x8E6) */ - - /* RF Interface Output (and Enable) */ - pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x860 */ - pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x864 */ - - /* RF Interface (Output and) Enable */ - pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) */ - pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) */ - - /* Addr of LSSI. Wirte RF register by driver */ - pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */ - pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; - - /* RF parameter */ - pHalData->PHYRegDef[RF_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; /* BB Band Select */ - pHalData->PHYRegDef[RF_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter; - pHalData->PHYRegDef[RF_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter; - pHalData->PHYRegDef[RF_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter; - - /* Tx AGC Gain Stage (same for all path. Should we remove this?) */ - pHalData->PHYRegDef[RF_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */ - pHalData->PHYRegDef[RF_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */ - pHalData->PHYRegDef[RF_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */ - pHalData->PHYRegDef[RF_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */ - - /* Tranceiver A~D HSSI Parameter-1 */ - pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; /* wire control parameter1 */ - pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; /* wire control parameter1 */ - - /* Tranceiver A~D HSSI Parameter-2 */ - pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2 */ - pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2 */ - - /* RF switch Control */ - pHalData->PHYRegDef[RF_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; /* TR/Ant switch control */ - pHalData->PHYRegDef[RF_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl; - pHalData->PHYRegDef[RF_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl; - pHalData->PHYRegDef[RF_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl; - - /* AGC control 1 */ - pHalData->PHYRegDef[RF_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; - pHalData->PHYRegDef[RF_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1; - pHalData->PHYRegDef[RF_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1; - pHalData->PHYRegDef[RF_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1; - - /* AGC control 2 */ - pHalData->PHYRegDef[RF_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2; - pHalData->PHYRegDef[RF_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2; - pHalData->PHYRegDef[RF_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2; - pHalData->PHYRegDef[RF_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2; - - /* RX AFE control 1 */ - pHalData->PHYRegDef[RF_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance; - pHalData->PHYRegDef[RF_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance; - pHalData->PHYRegDef[RF_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance; - pHalData->PHYRegDef[RF_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance; - - /* RX AFE control 1 */ - pHalData->PHYRegDef[RF_PATH_A].rfRxAFE = rOFDM0_XARxAFE; - pHalData->PHYRegDef[RF_PATH_B].rfRxAFE = rOFDM0_XBRxAFE; - pHalData->PHYRegDef[RF_PATH_C].rfRxAFE = rOFDM0_XCRxAFE; - pHalData->PHYRegDef[RF_PATH_D].rfRxAFE = rOFDM0_XDRxAFE; - - /* Tx AFE control 1 */ - pHalData->PHYRegDef[RF_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance; - pHalData->PHYRegDef[RF_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance; - pHalData->PHYRegDef[RF_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance; - pHalData->PHYRegDef[RF_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance; - - /* Tx AFE control 2 */ - pHalData->PHYRegDef[RF_PATH_A].rfTxAFE = rOFDM0_XATxAFE; - pHalData->PHYRegDef[RF_PATH_B].rfTxAFE = rOFDM0_XBTxAFE; - pHalData->PHYRegDef[RF_PATH_C].rfTxAFE = rOFDM0_XCTxAFE; - pHalData->PHYRegDef[RF_PATH_D].rfTxAFE = rOFDM0_XDTxAFE; - - /* Tranceiver LSSI Readback SI mode */ - pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; - pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; - pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack; - pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack; - - /* Tranceiver LSSI Readback PI mode */ - pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; - pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback; -} - -void storePwrIndexDiffRateOffset(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u32 Data) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - - if (RegAddr == rTxAGC_A_Rate18_06) - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data; - if (RegAddr == rTxAGC_A_Rate54_24) - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1] = Data; - if (RegAddr == rTxAGC_A_CCK1_Mcs32) - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6] = Data; - if (RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0xffffff00) - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7] = Data; - if (RegAddr == rTxAGC_A_Mcs03_Mcs00) - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2] = Data; - if (RegAddr == rTxAGC_A_Mcs07_Mcs04) - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3] = Data; - if (RegAddr == rTxAGC_A_Mcs11_Mcs08) - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data; - if (RegAddr == rTxAGC_A_Mcs15_Mcs12) { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data; - if (pHalData->rf_type == RF_1T1R) - pHalData->pwrGroupCnt++; - } - if (RegAddr == rTxAGC_B_Rate18_06) - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data; - if (RegAddr == rTxAGC_B_Rate54_24) - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9] = Data; - if (RegAddr == rTxAGC_B_CCK1_55_Mcs32) - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14] = Data; - if (RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0x000000ff) - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15] = Data; - if (RegAddr == rTxAGC_B_Mcs03_Mcs00) - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10] = Data; - if (RegAddr == rTxAGC_B_Mcs07_Mcs04) - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data; - if (RegAddr == rTxAGC_B_Mcs11_Mcs08) - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data; - if (RegAddr == rTxAGC_B_Mcs15_Mcs12) { - pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data; - if (pHalData->rf_type != RF_1T1R) - pHalData->pwrGroupCnt++; - } -} - -static int phy_BB8188E_Config_ParaFile(struct adapter *Adapter) -{ - struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - int rtStatus = _SUCCESS; - - /* */ - /* 1. Read PHY_REG.TXT BB INIT!! */ - /* We will separate as 88C / 92C according to chip version */ - /* */ - if (HAL_STATUS_FAILURE == ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG)) - rtStatus = _FAIL; - if (rtStatus != _SUCCESS) - goto phy_BB8190_Config_ParaFile_Fail; - - /* 2. If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt */ - if (!pEEPROM->bautoload_fail_flag) { - pHalData->pwrGroupCnt = 0; - - if (HAL_STATUS_FAILURE == ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_PG)) - rtStatus = _FAIL; - } - - if (rtStatus != _SUCCESS) - goto phy_BB8190_Config_ParaFile_Fail; - - /* 3. BB AGC table Initialization */ - if (HAL_STATUS_FAILURE == ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_AGC_TAB)) - rtStatus = _FAIL; - - if (rtStatus != _SUCCESS) - goto phy_BB8190_Config_ParaFile_Fail; - -phy_BB8190_Config_ParaFile_Fail: - - return rtStatus; -} - -int -PHY_BBConfig8188E( - struct adapter *Adapter - ) -{ - int rtStatus = _SUCCESS; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u32 RegVal; - u8 CrystalCap; - - phy_InitBBRFRegisterDefinition(Adapter); - - /* Enable BB and RF */ - RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN); - rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1)); - - /* 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. */ - - rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB); - - rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB); - - /* Config BB and AGC */ - rtStatus = phy_BB8188E_Config_ParaFile(Adapter); - - /* write 0x24[16:11] = 0x24[22:17] = CrystalCap */ - CrystalCap = pHalData->CrystalCap & 0x3F; - PHY_SetBBReg(Adapter, REG_AFE_XTAL_CTRL, 0x7ff800, (CrystalCap | (CrystalCap << 6))); - - return rtStatus; -} - -int PHY_RFConfig8188E(struct adapter *Adapter) -{ - int rtStatus = _SUCCESS; - - /* RF config */ - rtStatus = PHY_RF6052_Config8188E(Adapter); - return rtStatus; -} - -/*----------------------------------------------------------------------------- - * Function: PHY_ConfigRFWithParaFile() - * - * Overview: This function read RF parameters from general file format, and do RF 3-wire - * - * Input: struct adapter *Adapter - * ps8 pFileName - * enum rf_radio_path eRFPath - * - * Output: NONE - * - * Return: RT_STATUS_SUCCESS: configuration file exist - * - * Note: Delay may be required for RF configuration - *---------------------------------------------------------------------------*/ -int rtl8188e_PHY_ConfigRFWithParaFile(struct adapter *Adapter, u8 *pFileName, enum rf_radio_path eRFPath) -{ - return _SUCCESS; -} - -void -rtl8192c_PHY_GetHWRegOriginalValue( - struct adapter *Adapter - ) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - - /* read rx initial gain */ - pHalData->DefaultInitialGain[0] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XAAGCCore1, bMaskByte0); - pHalData->DefaultInitialGain[1] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XBAGCCore1, bMaskByte0); - pHalData->DefaultInitialGain[2] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XCAGCCore1, bMaskByte0); - pHalData->DefaultInitialGain[3] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XDAGCCore1, bMaskByte0); - - /* read framesync */ - pHalData->framesync = (u8)PHY_QueryBBReg(Adapter, rOFDM0_RxDetector3, bMaskByte0); - pHalData->framesyncC34 = PHY_QueryBBReg(Adapter, rOFDM0_RxDetector2, bMaskDWord); -} - -/* */ -/* Description: */ -/* Map dBm into Tx power index according to */ -/* current HW model, for example, RF and PA, and */ -/* current wireless mode. */ -/* By Bruce, 2008-01-29. */ -/* */ -static u8 phy_DbmToTxPwrIdx(struct adapter *Adapter, enum wireless_mode WirelessMode, int PowerInDbm) -{ - u8 TxPwrIdx = 0; - int Offset = 0; - - /* */ - /* Tested by MP, we found that CCK Index 0 equals to 8dbm, OFDM legacy equals to */ - /* 3dbm, and OFDM HT equals to 0dbm respectively. */ - /* Note: */ - /* The mapping may be different by different NICs. Do not use this formula for what needs accurate result. */ - /* By Bruce, 2008-01-29. */ - /* */ - switch (WirelessMode) { - case WIRELESS_MODE_B: - Offset = -7; - break; - - case WIRELESS_MODE_G: - case WIRELESS_MODE_N_24G: - default: - Offset = -8; - break; - } - - if ((PowerInDbm - Offset) > 0) - TxPwrIdx = (u8)((PowerInDbm - Offset) * 2); - else - TxPwrIdx = 0; - - /* Tx Power Index is too large. */ - if (TxPwrIdx > MAX_TXPWR_IDX_NMODE_92S) - TxPwrIdx = MAX_TXPWR_IDX_NMODE_92S; - - return TxPwrIdx; -} - -/* */ -/* Description: */ -/* Map Tx power index into dBm according to */ -/* current HW model, for example, RF and PA, and */ -/* current wireless mode. */ -/* By Bruce, 2008-01-29. */ -/* */ -static int phy_TxPwrIdxToDbm(struct adapter *Adapter, enum wireless_mode WirelessMode, u8 TxPwrIdx) -{ - int Offset = 0; - int PwrOutDbm = 0; - - /* */ - /* Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm. */ - /* Note: */ - /* The mapping may be different by different NICs. Do not use this formula for what needs accurate result. */ - /* By Bruce, 2008-01-29. */ - /* */ - switch (WirelessMode) { - case WIRELESS_MODE_B: - Offset = -7; - break; - case WIRELESS_MODE_G: - case WIRELESS_MODE_N_24G: - default: - Offset = -8; - break; - } - - PwrOutDbm = TxPwrIdx / 2 + Offset; /* Discard the decimal part. */ - - return PwrOutDbm; -} - -/*----------------------------------------------------------------------------- - * Function: GetTxPowerLevel8190() - * - * Overview: This function is export to "common" moudule - * - * Input: struct adapter *Adapter - * psByte Power Level - * - * Output: NONE - * - * Return: NONE - * - *---------------------------------------------------------------------------*/ -void PHY_GetTxPowerLevel8188E(struct adapter *Adapter, u32 *powerlevel) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u8 TxPwrLevel = 0; - int TxPwrDbm; - - /* */ - /* Because the Tx power indexes are different, we report the maximum of them to */ - /* meet the CCX TPC request. By Bruce, 2008-01-31. */ - /* */ - - /* CCK */ - TxPwrLevel = pHalData->CurrentCckTxPwrIdx; - TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_B, TxPwrLevel); - - /* Legacy OFDM */ - TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx + pHalData->LegacyHTTxPowerDiff; - - /* Compare with Legacy OFDM Tx power. */ - if (phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel) > TxPwrDbm) - TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel); - - /* HT OFDM */ - TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx; - - /* Compare with HT OFDM Tx power. */ - if (phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel) > TxPwrDbm) - TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel); - - *powerlevel = TxPwrDbm; -} - -static void getTxPowerIndex88E(struct adapter *Adapter, u8 channel, u8 *cckPowerLevel, - u8 *ofdmPowerLevel, u8 *BW20PowerLevel, - u8 *BW40PowerLevel) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u8 index = (channel - 1); - u8 TxCount = 0, path_nums; - - if ((RF_1T2R == pHalData->rf_type) || (RF_1T1R == pHalData->rf_type)) - path_nums = 1; - else - path_nums = 2; - - for (TxCount = 0; TxCount < path_nums; TxCount++) { - if (TxCount == RF_PATH_A) { - /* 1. CCK */ - cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; - /* 2. OFDM */ - ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->OFDM_24G_Diff[TxCount][RF_PATH_A]; - /* 1. BW20 */ - BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[TxCount][RF_PATH_A]; - /* 2. BW40 */ - BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; - } else if (TxCount == RF_PATH_B) { - /* 1. CCK */ - cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; - /* 2. OFDM */ - ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[TxCount][index]; - /* 1. BW20 */ - BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[TxCount][RF_PATH_A]+ - pHalData->BW20_24G_Diff[TxCount][index]; - /* 2. BW40 */ - BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; - } else if (TxCount == RF_PATH_C) { - /* 1. CCK */ - cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; - /* 2. OFDM */ - ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_B][index]+ - pHalData->BW20_24G_Diff[TxCount][index]; - /* 1. BW20 */ - BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_B][index]+ - pHalData->BW20_24G_Diff[TxCount][index]; - /* 2. BW40 */ - BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; - } else if (TxCount == RF_PATH_D) { - /* 1. CCK */ - cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; - /* 2. OFDM */ - ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_B][index]+ - pHalData->BW20_24G_Diff[RF_PATH_C][index]+ - pHalData->BW20_24G_Diff[TxCount][index]; - - /* 1. BW20 */ - BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_A][index]+ - pHalData->BW20_24G_Diff[RF_PATH_B][index]+ - pHalData->BW20_24G_Diff[RF_PATH_C][index]+ - pHalData->BW20_24G_Diff[TxCount][index]; - - /* 2. BW40 */ - BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; - } - } -} - -static void phy_PowerIndexCheck88E(struct adapter *Adapter, u8 channel, u8 *cckPowerLevel, - u8 *ofdmPowerLevel, u8 *BW20PowerLevel, u8 *BW40PowerLevel) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - - pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0]; - pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0]; - pHalData->CurrentBW2024GTxPwrIdx = BW20PowerLevel[0]; - pHalData->CurrentBW4024GTxPwrIdx = BW40PowerLevel[0]; -} - -/*----------------------------------------------------------------------------- - * Function: SetTxPowerLevel8190() - * - * Overview: This function is export to "HalCommon" moudule - * We must consider RF path later!!!!!!! - * - * Input: struct adapter *Adapter - * u8 channel - * - * Output: NONE - * - * Return: NONE - * 2008/11/04 MHC We remove EEPROM_93C56. - * We need to move CCX relative code to independet file. - * 2009/01/21 MHC Support new EEPROM format from SD3 requirement. - * - *---------------------------------------------------------------------------*/ -void -PHY_SetTxPowerLevel8188E( - struct adapter *Adapter, - u8 channel - ) -{ - u8 cckPowerLevel[MAX_TX_COUNT] = {0}; - u8 ofdmPowerLevel[MAX_TX_COUNT] = {0};/* [0]:RF-A, [1]:RF-B */ - u8 BW20PowerLevel[MAX_TX_COUNT] = {0}; - u8 BW40PowerLevel[MAX_TX_COUNT] = {0}; - - getTxPowerIndex88E(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0], &BW20PowerLevel[0], &BW40PowerLevel[0]); - - phy_PowerIndexCheck88E(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0], &BW20PowerLevel[0], &BW40PowerLevel[0]); - - rtl8188e_PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]); - rtl8188e_PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], &BW20PowerLevel[0], &BW40PowerLevel[0], channel); -} - -/* */ -/* Description: */ -/* Update transmit power level of all channel supported. */ -/* */ -/* TODO: */ -/* A mode. */ -/* By Bruce, 2008-02-04. */ -/* */ -bool -PHY_UpdateTxPowerDbm8188E( - struct adapter *Adapter, - int powerInDbm - ) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u8 idx; - u8 rf_path; - - /* TODO: A mode Tx power. */ - u8 CckTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, powerInDbm); - u8 OfdmTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, powerInDbm); - - if (OfdmTxPwrIdx - pHalData->LegacyHTTxPowerDiff > 0) - OfdmTxPwrIdx -= pHalData->LegacyHTTxPowerDiff; - else - OfdmTxPwrIdx = 0; - - for (idx = 0; idx < 14; idx++) { - for (rf_path = 0; rf_path < 2; rf_path++) { - pHalData->TxPwrLevelCck[rf_path][idx] = CckTxPwrIdx; - pHalData->TxPwrLevelHT40_1S[rf_path][idx] = - pHalData->TxPwrLevelHT40_2S[rf_path][idx] = OfdmTxPwrIdx; - } - } - return true; -} - -void -PHY_ScanOperationBackup8188E( - struct adapter *Adapter, - u8 Operation - ) -{ -} - -/*----------------------------------------------------------------------------- - * Function: PHY_SetBWModeCallback8192C() - * - * Overview: Timer callback function for SetSetBWMode - * - * Input: PRT_TIMER pTimer - * - * Output: NONE - * - * Return: NONE - * - * Note: (1) We do not take j mode into consideration now - * (2) Will two workitem of "switch channel" and "switch channel bandwidth" run - * concurrently? - *---------------------------------------------------------------------------*/ -static void -_PHY_SetBWMode92C( - struct adapter *Adapter -) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u8 regBwOpMode; - u8 regRRSR_RSC; - - if (pHalData->rf_chip == RF_PSEUDO_11N) - return; - - /* There is no 40MHz mode in RF_8225. */ - if (pHalData->rf_chip == RF_8225) - return; - - if (Adapter->bDriverStopped) - return; - - /* 3 */ - /* 3<1>Set MAC register */ - /* 3 */ - - regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE); - regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2); - - switch (pHalData->CurrentChannelBW) { - case HT_CHANNEL_WIDTH_20: - regBwOpMode |= BW_OPMODE_20MHZ; - /* 2007/02/07 Mark by Emily because we have not verify whether this register works */ - rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); - break; - case HT_CHANNEL_WIDTH_40: - regBwOpMode &= ~BW_OPMODE_20MHZ; - /* 2007/02/07 Mark by Emily because we have not verify whether this register works */ - rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); - regRRSR_RSC = (regRRSR_RSC&0x90) | (pHalData->nCur40MhzPrimeSC<<5); - rtw_write8(Adapter, REG_RRSR+2, regRRSR_RSC); - break; - default: - break; - } - - /* 3 */ - /* 3 <2>Set PHY related register */ - /* 3 */ - switch (pHalData->CurrentChannelBW) { - /* 20 MHz channel*/ - case HT_CHANNEL_WIDTH_20: - PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); - PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); - break; - /* 40 MHz channel*/ - case HT_CHANNEL_WIDTH_40: - PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); - PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1); - /* Set Control channel to upper or lower. These settings are required only for 40MHz */ - PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1)); - PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); - PHY_SetBBReg(Adapter, 0x818, (BIT26 | BIT27), - (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); - break; - default: - break; - } - /* Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315 */ - - /* 3<3>Set RF related register */ - switch (pHalData->rf_chip) { - case RF_8225: - break; - case RF_8256: - /* Please implement this function in Hal8190PciPhy8256.c */ - break; - case RF_8258: - /* Please implement this function in Hal8190PciPhy8258.c */ - break; - case RF_PSEUDO_11N: - break; - case RF_6052: - rtl8188e_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW); - break; - default: - break; - } -} - - /*----------------------------------------------------------------------------- - * Function: SetBWMode8190Pci() - * - * Overview: This function is export to "HalCommon" moudule - * - * Input: struct adapter *Adapter - * enum ht_channel_width Bandwidth 20M or 40M - * - * Output: NONE - * - * Return: NONE - * - * Note: We do not take j mode into consideration now - *---------------------------------------------------------------------------*/ -void PHY_SetBWMode8188E(struct adapter *Adapter, enum ht_channel_width Bandwidth, /* 20M or 40M */ - unsigned char Offset) /* Upper, Lower, or Don't care */ -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - enum ht_channel_width tmpBW = pHalData->CurrentChannelBW; - - pHalData->CurrentChannelBW = Bandwidth; - - pHalData->nCur40MhzPrimeSC = Offset; - - if ((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) - _PHY_SetBWMode92C(Adapter); - else - pHalData->CurrentChannelBW = tmpBW; -} - -static void _PHY_SwChnl8192C(struct adapter *Adapter, u8 channel) -{ - u8 eRFPath; - u32 param1, param2; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - - if (Adapter->bNotifyChannelChange) - DBG_88E("[%s] ch = %d\n", __func__, channel); - - /* s1. pre common command - CmdID_SetTxPowerLevel */ - PHY_SetTxPowerLevel8188E(Adapter, channel); - - /* s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel */ - param1 = RF_CHNLBW; - param2 = channel; - for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) { - pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2); - PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); - } -} - -void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel) -{ - /* Call after initialization */ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u8 tmpchannel = pHalData->CurrentChannel; - bool bResult = true; - - if (pHalData->rf_chip == RF_PSEUDO_11N) - return; /* return immediately if it is peudo-phy */ - - if (channel == 0) - channel = 1; - - pHalData->CurrentChannel = channel; - - if ((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) { - _PHY_SwChnl8192C(Adapter, channel); - - if (bResult) - ; - else - pHalData->CurrentChannel = tmpchannel; - - } else { - pHalData->CurrentChannel = tmpchannel; - } -} +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8188E_PHYCFG_C_ + +#include +#include +#include +#include + +#ifdef CONFIG_IOL +#include +#endif + +#include + + +/*---------------------------Define Local Constant---------------------------*/ +/* Channel switch:The size of command tables for switch channel*/ +#define MAX_PRECMD_CNT 16 +#define MAX_RFDEPENDCMD_CNT 16 +#define MAX_POSTCMD_CNT 16 + +#define MAX_DOZE_WAITING_TIMES_9x 64 + +/*---------------------------Define Local Constant---------------------------*/ + + +/*------------------------Define global variable-----------------------------*/ + +/*------------------------Define local variable------------------------------*/ + + +/*--------------------Define export function prototype-----------------------*/ +// Please refer to header file +/*--------------------Define export function prototype-----------------------*/ + +/*----------------------------Function Body----------------------------------*/ +// +// 1. BB register R/W API +// + +/** +* Function: phy_CalculateBitShift +* +* OverView: Get shifted position of the BitMask +* +* Input: +* u4Byte BitMask, +* +* Output: none +* Return: u4Byte Return the shift bit bit position of the mask +*/ +static u32 +phy_CalculateBitShift( + u32 BitMask + ) +{ + u32 i; + + for(i=0; i<=31; i++) + { + if ( ((BitMask>>i) & 0x1 ) == 1) + break; + } + + return (i); +} + +#if(SIC_ENABLE == 1) +static BOOLEAN +sic_IsSICReady( + IN PADAPTER Adapter + ) +{ + BOOLEAN bRet=_FALSE; + u32 retryCnt=0; + u8 sic_cmd=0xff; + + while(1) + { + if(retryCnt++ >= SIC_MAX_POLL_CNT) + { + //RTPRINT(FPHY, (PHY_SICR|PHY_SICW), ("[SIC], sic_IsSICReady() return FALSE\n")); + return _FALSE; + } + + //if(RT_SDIO_CANNOT_IO(Adapter)) + // return _FALSE; + + sic_cmd = rtw_read8(Adapter, SIC_CMD_REG); + //sic_cmd = PlatformEFIORead1Byte(Adapter, SIC_CMD_REG); +#if(SIC_HW_SUPPORT == 1) + sic_cmd &= 0xf0; // [7:4] +#endif + //RTPRINT(FPHY, (PHY_SICR|PHY_SICW), ("[SIC], sic_IsSICReady(), readback 0x%x=0x%x\n", SIC_CMD_REG, sic_cmd)); + if(sic_cmd == SIC_CMD_READY) + return _TRUE; + else + { + rtw_msleep_os(1); + //delay_ms(1); + } + } + + return bRet; +} + +/* +u32 +sic_CalculateBitShift( + u32 BitMask + ) +{ + u32 i; + + for(i=0; i<=31; i++) + { + if ( ((BitMask>>i) & 0x1 ) == 1) + break; + } + + return (i); +} +*/ + +static u32 +sic_Read4Byte( + PVOID Adapter, + u32 offset + ) +{ + u32 u4ret=0xffffffff; +#if RTL8188E_SUPPORT == 1 + u8 retry = 0; +#endif + + //RTPRINT(FPHY, PHY_SICR, ("[SIC], sic_Read4Byte(): read offset(%#x)\n", offset)); + + if(sic_IsSICReady(Adapter)) + { +#if(SIC_HW_SUPPORT == 1) + rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_PREREAD); + //PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_PREREAD); + //RTPRINT(FPHY, PHY_SICR, ("write cmdreg 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_PREREAD)); +#endif + rtw_write8(Adapter, SIC_ADDR_REG, (u8)(offset&0xff)); + //PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u1Byte)(offset&0xff)); + //RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG, (u1Byte)(offset&0xff))); + rtw_write8(Adapter, SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8)); + //PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8)); + //RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8))); + rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_READ); + //PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_READ); + //RTPRINT(FPHY, PHY_SICR, ("write cmdreg 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_READ)); + +#if RTL8188E_SUPPORT == 1 + retry = 4; + while(retry--){ + rtw_udelay_os(50); + //PlatformStallExecution(50); + } +#else + rtw_udelay_os(200); + //PlatformStallExecution(200); +#endif + + if(sic_IsSICReady(Adapter)) + { + u4ret = rtw_read32(Adapter, SIC_DATA_REG); + //u4ret = PlatformEFIORead4Byte(Adapter, SIC_DATA_REG); + //RTPRINT(FPHY, PHY_SICR, ("read 0x%x = 0x%x\n", SIC_DATA_REG, u4ret)); + //DbgPrint("<===Read 0x%x = 0x%x\n", offset, u4ret); + } + } + + return u4ret; +} + +static VOID +sic_Write4Byte( + PVOID Adapter, + u32 offset, + u32 data + ) +{ +#if RTL8188E_SUPPORT == 1 + u8 retry = 6; +#endif + //DbgPrint("=>Write 0x%x = 0x%x\n", offset, data); + //RTPRINT(FPHY, PHY_SICW, ("[SIC], sic_Write4Byte(): write offset(%#x)=0x%x\n", offset, data)); + if(sic_IsSICReady(Adapter)) + { +#if(SIC_HW_SUPPORT == 1) + rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_PREWRITE); + //PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_PREWRITE); + //RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_PREWRITE)); +#endif + rtw_write8(Adapter, SIC_ADDR_REG, (u8)(offset&0xff)); + //PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u1Byte)(offset&0xff)); + //RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", SIC_ADDR_REG, (u1Byte)(offset&0xff))); + rtw_write8(Adapter, SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8)); + //PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8)); + //RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", (SIC_ADDR_REG+1), (u1Byte)((offset&0xff00)>>8))); + rtw_write32(Adapter, SIC_DATA_REG, (u32)data); + //PlatformEFIOWrite4Byte(Adapter, SIC_DATA_REG, (u4Byte)data); + //RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_DATA_REG, data)); + rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_WRITE); + //PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_WRITE); + //RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_WRITE)); +#if RTL8188E_SUPPORT == 1 + while(retry--){ + rtw_udelay_os(50); + //PlatformStallExecution(50); + } +#else + rtw_udelay_os(150); + //PlatformStallExecution(150); +#endif + + } +} +//============================================================ +// extern function +//============================================================ +static VOID +SIC_SetBBReg( + IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask, + IN u32 Data + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 OriginalValue, BitShift; + u16 BBWaitCounter = 0; + + //RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg() start\n")); +/* + while(PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _TRUE) == _TRUE) + { + BBWaitCounter ++; + delay_ms(10); // 1 ms + + if((BBWaitCounter > 100) || RT_CANNOT_IO(Adapter)) + {// Wait too long, return FALSE to avoid to be stuck here. + RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg(), Fail to set BB offset(%#x)!!, WaitCnt(%d)\n", RegAddr, BBWaitCounter)); + return; + } + } +*/ + // + // Critical section start + // + + //RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg(), mask=0x%x, addr[0x%x]=0x%x\n", BitMask, RegAddr, Data)); + + if(BitMask!= bMaskDWord){//if not "double word" write + OriginalValue = sic_Read4Byte(Adapter, RegAddr); + //BitShift = sic_CalculateBitShift(BitMask); + BitShift = phy_CalculateBitShift(BitMask); + Data = (((OriginalValue) & (~BitMask)) | (Data << BitShift)); + } + + sic_Write4Byte(Adapter, RegAddr, Data); + + //PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _FALSE); + //RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg() end\n")); +} + +static u32 +SIC_QueryBBReg( + IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 ReturnValue = 0, OriginalValue, BitShift; + u16 BBWaitCounter = 0; + + //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_QueryBBReg() start\n")); + +/* + while(PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _TRUE) == _TRUE) + { + BBWaitCounter ++; + delay_ms(10); // 10 ms + + if((BBWaitCounter > 100) || RT_CANNOT_IO(Adapter)) + {// Wait too long, return FALSE to avoid to be stuck here. + RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_QueryBBReg(), Fail to query BB offset(%#x)!!, WaitCnt(%d)\n", RegAddr, BBWaitCounter)); + return ReturnValue; + } + } +*/ + OriginalValue = sic_Read4Byte(Adapter, RegAddr); + //BitShift = sic_CalculateBitShift(BitMask); + BitShift = phy_CalculateBitShift(BitMask); + ReturnValue = (OriginalValue & BitMask) >> BitShift; + + //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_QueryBBReg(), 0x%x=0x%x\n", RegAddr, OriginalValue)); + //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_QueryBBReg() end\n")); + + //PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _FALSE); + return (ReturnValue); +} + +VOID +SIC_Init( + IN PADAPTER Adapter + ) +{ + // Here we need to write 0x1b8~0x1bf = 0 after fw is downloaded + // because for 8723E at beginning 0x1b8=0x1e, that will cause + // sic always not be ready +#if(SIC_HW_SUPPORT == 1) + //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_Init(), write 0x%x = 0x%x\n", + // SIC_INIT_REG, SIC_INIT_VAL)); + rtw_write8(Adapter, SIC_INIT_REG, SIC_INIT_VAL); + //PlatformEFIOWrite1Byte(Adapter, SIC_INIT_REG, SIC_INIT_VAL); + //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_Init(), write 0x%x = 0x%x\n", + // SIC_CMD_REG, SIC_CMD_INIT)); + rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_INIT); + //PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_INIT); +#else + //RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_Init(), write 0x1b8~0x1bf = 0x0\n")); + rtw_write32(Adapter, SIC_CMD_REG, 0); + //PlatformEFIOWrite4Byte(Adapter, SIC_CMD_REG, 0); + rtw_write32(Adapter, SIC_CMD_REG+4, 0); + //PlatformEFIOWrite4Byte(Adapter, SIC_CMD_REG+4, 0); +#endif +} + +static BOOLEAN +SIC_LedOff( + IN PADAPTER Adapter + ) +{ + // When SIC is enabled, led pin will be used as debug pin, + // so don't execute led function when SIC is enabled. + return _TRUE; +} +#endif + +/** +* Function: PHY_QueryBBReg +* +* OverView: Read "sepcific bits" from BB register +* +* Input: +* PADAPTER Adapter, +* u4Byte RegAddr, //The target address to be readback +* u4Byte BitMask //The target bit position in the target address +* //to be readback +* Output: None +* Return: u4Byte Data //The readback register value +* Note: This function is equal to "GetRegSetting" in PHY programming guide +*/ +u32 +rtl8188e_PHY_QueryBBReg( + IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask + ) +{ + u32 ReturnValue = 0, OriginalValue, BitShift; + u16 BBWaitCounter = 0; + +#if (DISABLE_BB_RF == 1) + return 0; +#endif + +#if(SIC_ENABLE == 1) + return SIC_QueryBBReg(Adapter, RegAddr, BitMask); +#endif + + //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask)); + + OriginalValue = rtw_read32(Adapter, RegAddr); + BitShift = phy_CalculateBitShift(BitMask); + ReturnValue = (OriginalValue & BitMask) >> BitShift; + + //RTPRINT(FPHY, PHY_BBR, ("BBR MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, OriginalValue)); + //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx), OriginalValue(%#lx)\n", RegAddr, BitMask, OriginalValue)); + + return (ReturnValue); + +} + + +/** +* Function: PHY_SetBBReg +* +* OverView: Write "Specific bits" to BB register (page 8~) +* +* Input: +* PADAPTER Adapter, +* u4Byte RegAddr, //The target address to be modified +* u4Byte BitMask //The target bit position in the target address +* //to be modified +* u4Byte Data //The new register value in the target bit position +* //of the target address +* +* Output: None +* Return: None +* Note: This function is equal to "PutRegSetting" in PHY programming guide +*/ + +VOID +rtl8188e_PHY_SetBBReg( + IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask, + IN u32 Data + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //u16 BBWaitCounter = 0; + u32 OriginalValue, BitShift; + +#if (DISABLE_BB_RF == 1) + return; +#endif + +#if(SIC_ENABLE == 1) + SIC_SetBBReg(Adapter, RegAddr, BitMask, Data); + return; +#endif + + //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); + + if(BitMask!= bMaskDWord){//if not "double word" write + OriginalValue = rtw_read32(Adapter, RegAddr); + BitShift = phy_CalculateBitShift(BitMask); + Data = ((OriginalValue & (~BitMask)) | ((Data << BitShift) & BitMask)); + } + + rtw_write32(Adapter, RegAddr, Data); + + //RTPRINT(FPHY, PHY_BBW, ("BBW MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, Data)); + //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); + +} + + +// +// 2. RF register R/W API +// +/** +* Function: phy_RFSerialRead +* +* OverView: Read regster from RF chips +* +* Input: +* PADAPTER Adapter, +* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D +* u4Byte Offset, //The target address to be read +* +* Output: None +* Return: u4Byte reback value +* Note: Threre are three types of serial operations: +* 1. Software serial write +* 2. Hardware LSSI-Low Speed Serial Interface +* 3. Hardware HSSI-High speed +* serial write. Driver need to implement (1) and (2). +* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() +*/ +static u32 +phy_RFSerialRead( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset + ) +{ + u32 retValue = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; + u32 NewOffset; + u32 tmplong,tmplong2; + u8 RfPiEnable=0; +#if 0 + if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs + return retValue; + if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs + return retValue; +#endif + // + // Make sure RF register offset is correct + // + Offset &= 0xff; + + // + // Switch page for 8256 RF IC + // + NewOffset = Offset; + + // 2009/06/17 MH We can not execute IO for power save or other accident mode. + //if(RT_CANNOT_IO(Adapter)) + //{ + // RTPRINT(FPHY, PHY_RFR, ("phy_RFSerialRead return all one\n")); + // return 0xFFFFFFFF; + //} + + // For 92S LSSI Read RFLSSIRead + // For RF A/B write 0x824/82c(does not work in the future) + // We must use 0x824 for RF A and B to execute read trigger + tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord); + if(eRFPath == RF_PATH_A) + tmplong2 = tmplong; + else + tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord); + + tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; //T65 RF + + PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong&(~bLSSIReadEdge)); + rtw_udelay_os(10);// PlatformStallExecution(10); + + PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2); + rtw_udelay_os(100);//PlatformStallExecution(100); + + //PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong|bLSSIReadEdge); + rtw_udelay_os(10);//PlatformStallExecution(10); + + if(eRFPath == RF_PATH_A) + RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT8); + else if(eRFPath == RF_PATH_B) + RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT8); + + if(RfPiEnable) + { // Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF + retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData); + //DBG_8192C("Readback from RF-PI : 0x%x\n", retValue); + } + else + { //Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF + retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData); + //DBG_8192C("Readback from RF-SI : 0x%x\n", retValue); + } + //DBG_8192C("RFR-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rfLSSIReadBack, retValue); + + return retValue; + +} + + + +/** +* Function: phy_RFSerialWrite +* +* OverView: Write data to RF register (page 8~) +* +* Input: +* PADAPTER Adapter, +* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D +* u4Byte Offset, //The target address to be read +* u4Byte Data //The new register Data in the target bit position +* //of the target to be read +* +* Output: None +* Return: None +* Note: Threre are three types of serial operations: +* 1. Software serial write +* 2. Hardware LSSI-Low Speed Serial Interface +* 3. Hardware HSSI-High speed +* serial write. Driver need to implement (1) and (2). +* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() + * + * Note: For RF8256 only + * The total count of RTL8256(Zebra4) register is around 36 bit it only employs + * 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) + * to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration + * programming guide" for more details. + * Thus, we define a sub-finction for RTL8526 register address conversion + * =========================================================== + * Register Mode RegCTL[1] RegCTL[0] Note + * (Reg00[12]) (Reg00[10]) + * =========================================================== + * Reg_Mode0 0 x Reg 0 ~15(0x0 ~ 0xf) + * ------------------------------------------------------------------ + * Reg_Mode1 1 0 Reg 16 ~30(0x1 ~ 0xf) + * ------------------------------------------------------------------ + * Reg_Mode2 1 1 Reg 31 ~ 45(0x1 ~ 0xf) + * ------------------------------------------------------------------ + * + * 2008/09/02 MH Add 92S RF definition + * + * + * +*/ +static VOID +phy_RFSerialWrite( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset, + IN u32 Data + ) +{ + u32 DataAndAddr = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; + u32 NewOffset; + +#if 0 + // We should check valid regs for RF_6052 case. + if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs + return; + if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs + return; +#endif + + // 2009/06/17 MH We can not execute IO for power save or other accident mode. + //if(RT_CANNOT_IO(Adapter)) + //{ + // RTPRINT(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n")); + // return; + //} + + Offset &= 0xff; + + // + // Shadow Update + // + //PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); + + // + // Switch page for 8256 RF IC + // + NewOffset = Offset; + + // + // Put write addr in [5:0] and write data in [31:16] + // + //DataAndAddr = (Data<<16) | (NewOffset&0x3f); + DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; // T65 RF + + // + // Write Operation + // + PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); + //RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); + +} + + +/** +* Function: PHY_QueryRFReg +* +* OverView: Query "Specific bits" to RF register (page 8~) +* +* Input: +* PADAPTER Adapter, +* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D +* u4Byte RegAddr, //The target address to be read +* u4Byte BitMask //The target bit position in the target address +* //to be read +* +* Output: None +* Return: u4Byte Readback value +* Note: This function is equal to "GetRFRegSetting" in PHY programming guide +*/ +u32 +rtl8188e_PHY_QueryRFReg( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 RegAddr, + IN u32 BitMask + ) +{ + u32 Original_Value, Readback_Value, BitShift; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //u8 RFWaitCounter = 0; + //_irqL irqL; + +#if (DISABLE_BB_RF == 1) + return 0; +#endif + + //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), BitMask(%#lx)\n", RegAddr, eRFPath,BitMask)); + +#ifdef CONFIG_USB_HCI + //PlatformAcquireMutex(&pHalData->mxRFOperate); +#else + //_enter_critical(&pHalData->rf_lock, &irqL); +#endif + + + Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); + + BitShift = phy_CalculateBitShift(BitMask); + Readback_Value = (Original_Value & BitMask) >> BitShift; + +#ifdef CONFIG_USB_HCI + //PlatformReleaseMutex(&pHalData->mxRFOperate); +#else + //_exit_critical(&pHalData->rf_lock, &irqL); +#endif + + + //RTPRINT(FPHY, PHY_RFR, ("RFR-%d MASK=0x%lx Addr[0x%lx]=0x%lx\n", eRFPath, BitMask, RegAddr, Original_Value));//BitMask(%#lx),BitMask, + //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), Original_Value(%#lx)\n", + // RegAddr, eRFPath, Original_Value)); + + return (Readback_Value); +} + +/** +* Function: PHY_SetRFReg +* +* OverView: Write "Specific bits" to RF register (page 8~) +* +* Input: +* PADAPTER Adapter, +* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D +* u4Byte RegAddr, //The target address to be modified +* u4Byte BitMask //The target bit position in the target address +* //to be modified +* u4Byte Data //The new register Data in the target bit position +* //of the target address +* +* Output: None +* Return: None +* Note: This function is equal to "PutRFRegSetting" in PHY programming guide +*/ +VOID +rtl8188e_PHY_SetRFReg( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 RegAddr, + IN u32 BitMask, + IN u32 Data + ) +{ + + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //u1Byte RFWaitCounter = 0; + u32 Original_Value, BitShift; + //_irqL irqL; + +#if (DISABLE_BB_RF == 1) + return; +#endif + + //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", + // RegAddr, BitMask, Data, eRFPath)); + //RTPRINT(FINIT, INIT_RF, ("PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", + // RegAddr, BitMask, Data, eRFPath)); + + +#ifdef CONFIG_USB_HCI + //PlatformAcquireMutex(&pHalData->mxRFOperate); +#else + //_enter_critical(&pHalData->rf_lock, &irqL); +#endif + + + // RF data is 12 bits only + if (BitMask != bRFRegOffsetMask) + { + Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); + BitShift = phy_CalculateBitShift(BitMask); + Data = ((Original_Value & (~BitMask)) | (Data<< BitShift)); + } + + phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data); + + +#ifdef CONFIG_USB_HCI + //PlatformReleaseMutex(&pHalData->mxRFOperate); +#else + //_exit_critical(&pHalData->rf_lock, &irqL); +#endif + + //PHY_QueryRFReg(Adapter,eRFPath,RegAddr,BitMask); + //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", + // RegAddr, BitMask, Data, eRFPath)); + +} + + +// +// 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. +// + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigMACWithParaFile() + * + * Overview: This function read BB parameters from general file format, and do register + * Read/Write + * + * Input: PADAPTER Adapter + * ps1Byte pFileName + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * + * Note: The format of MACPHY_REG.txt is different from PHY and RF. + * [Register][Mask][Value] + *---------------------------------------------------------------------------*/ +static int +phy_ConfigMACWithParaFile( + IN PADAPTER Adapter, + IN u8* pFileName +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + int rtStatus = _FAIL; + + return rtStatus; +} + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigMACWithHeaderFile() + * + * Overview: This function read BB parameters from Header file we gen, and do register + * Read/Write + * + * Input: PADAPTER Adapter + * ps1Byte pFileName + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * + * Note: The format of MACPHY_REG.txt is different from PHY and RF. + * [Register][Mask][Value] + *---------------------------------------------------------------------------*/ +#ifndef CONFIG_PHY_SETTING_WITH_ODM +static int +phy_ConfigMACWithHeaderFile( + IN PADAPTER Adapter +) +{ + u32 i = 0; + u32 ArrayLength = 0; + u32* ptrArray; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //2008.11.06 Modified by tynli. + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Read Rtl819XMACPHY_Array\n")); + ArrayLength = Rtl8188E_MAC_ArrayLength; + ptrArray = (u32*)Rtl8188E_MAC_Array; + +#ifdef CONFIG_IOL_MAC + { + struct xmit_frame *xmit_frame; + if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) + return _FAIL; + + for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column + rtw_IOL_append_WB_cmd(xmit_frame, ptrArray[i], (u8)ptrArray[i+1]); + } + + return rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0); + } +#else + for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column + rtw_write8(Adapter, ptrArray[i], (u8)ptrArray[i+1]); + } +#endif + + return _SUCCESS; + +} +#endif //#ifndef CONFIG_PHY_SETTING_WITH_ODM + +/*----------------------------------------------------------------------------- + * Function: PHY_MACConfig8192C + * + * Overview: Condig MAC by header file or parameter file. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 08/12/2008 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +s32 PHY_MACConfig8188E(PADAPTER Adapter) +{ + int rtStatus = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + s8 *pszMACRegFile; + s8 sz8188EMACRegFile[] = RTL8188E_PHY_MACREG; + + pszMACRegFile = sz8188EMACRegFile; + + // + // Config MAC + // +#ifdef CONFIG_EMBEDDED_FWIMG + #ifdef CONFIG_PHY_SETTING_WITH_ODM + if(HAL_STATUS_FAILURE == ODM_ConfigMACWithHeaderFile(&pHalData->odmpriv)) + rtStatus = _FAIL; + #else + rtStatus = phy_ConfigMACWithHeaderFile(Adapter); + #endif//#ifdef CONFIG_PHY_SETTING_WITH_ODM +#else + + // Not make sure EEPROM, add later + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Read MACREG.txt\n")); + rtStatus = phy_ConfigMACWithParaFile(Adapter, pszMACRegFile); +#endif//CONFIG_EMBEDDED_FWIMG + + + // 2010.07.13 AMPDU aggregation number B + rtw_write8(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM); + //rtw_write8(Adapter, REG_MAX_AGGR_NUM, 0x0B); + + return rtStatus; + +} + + +/** +* Function: phy_InitBBRFRegisterDefinition +* +* OverView: Initialize Register definition offset for Radio Path A/B/C/D +* +* Input: +* PADAPTER Adapter, +* +* Output: None +* Return: None +* Note: The initialization value is constant and it should never be changes +*/ +static VOID +phy_InitBBRFRegisterDefinition( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + // RF Interface Sowrtware Control + pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870 + pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) + pHalData->PHYRegDef[RF_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 LSBs if read 32-bit from 0x874 + pHalData->PHYRegDef[RF_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876) + + // RF Interface Readback Value + pHalData->PHYRegDef[RF_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; // 16 LSBs if read 32-bit from 0x8E0 + pHalData->PHYRegDef[RF_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2) + pHalData->PHYRegDef[RF_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 LSBs if read 32-bit from 0x8E4 + pHalData->PHYRegDef[RF_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E4 (16-bit for 0x8E6) + + // RF Interface Output (and Enable) + pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860 + pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864 + + // RF Interface (Output and) Enable + pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) + pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) + + //Addr of LSSI. Wirte RF register by driver + pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter + pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; + + // RF parameter + pHalData->PHYRegDef[RF_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; //BB Band Select + pHalData->PHYRegDef[RF_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter; + pHalData->PHYRegDef[RF_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter; + pHalData->PHYRegDef[RF_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter; + + // Tx AGC Gain Stage (same for all path. Should we remove this?) + pHalData->PHYRegDef[RF_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage + pHalData->PHYRegDef[RF_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage + pHalData->PHYRegDef[RF_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage + pHalData->PHYRegDef[RF_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage + + // Tranceiver A~D HSSI Parameter-1 + pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; //wire control parameter1 + pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; //wire control parameter1 + + // Tranceiver A~D HSSI Parameter-2 + pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; //wire control parameter2 + pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; //wire control parameter2 + + // RF switch Control + pHalData->PHYRegDef[RF_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; //TR/Ant switch control + pHalData->PHYRegDef[RF_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl; + pHalData->PHYRegDef[RF_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl; + pHalData->PHYRegDef[RF_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl; + + // AGC control 1 + pHalData->PHYRegDef[RF_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; + pHalData->PHYRegDef[RF_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1; + pHalData->PHYRegDef[RF_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1; + pHalData->PHYRegDef[RF_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1; + + // AGC control 2 + pHalData->PHYRegDef[RF_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2; + pHalData->PHYRegDef[RF_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2; + pHalData->PHYRegDef[RF_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2; + pHalData->PHYRegDef[RF_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2; + + // RX AFE control 1 + pHalData->PHYRegDef[RF_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance; + pHalData->PHYRegDef[RF_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance; + pHalData->PHYRegDef[RF_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance; + pHalData->PHYRegDef[RF_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance; + + // RX AFE control 1 + pHalData->PHYRegDef[RF_PATH_A].rfRxAFE = rOFDM0_XARxAFE; + pHalData->PHYRegDef[RF_PATH_B].rfRxAFE = rOFDM0_XBRxAFE; + pHalData->PHYRegDef[RF_PATH_C].rfRxAFE = rOFDM0_XCRxAFE; + pHalData->PHYRegDef[RF_PATH_D].rfRxAFE = rOFDM0_XDRxAFE; + + // Tx AFE control 1 + pHalData->PHYRegDef[RF_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance; + pHalData->PHYRegDef[RF_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance; + pHalData->PHYRegDef[RF_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance; + pHalData->PHYRegDef[RF_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance; + + // Tx AFE control 2 + pHalData->PHYRegDef[RF_PATH_A].rfTxAFE = rOFDM0_XATxAFE; + pHalData->PHYRegDef[RF_PATH_B].rfTxAFE = rOFDM0_XBTxAFE; + pHalData->PHYRegDef[RF_PATH_C].rfTxAFE = rOFDM0_XCTxAFE; + pHalData->PHYRegDef[RF_PATH_D].rfTxAFE = rOFDM0_XDTxAFE; + + // Tranceiver LSSI Readback SI mode + pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; + pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; + pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack; + pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack; + + // Tranceiver LSSI Readback PI mode + pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; + pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback; + //pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBackPi = rFPGA0_XC_LSSIReadBack; + //pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBackPi = rFPGA0_XD_LSSIReadBack; + +} + + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigBBWithParaFile() + * + * Overview: This function read BB parameters from general file format, and do register + * Read/Write + * + * Input: PADAPTER Adapter + * ps1Byte pFileName + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * 2008/11/06 MH For 92S we do not support silent reset now. Disable + * parameter file compare!!!!!!?? + * + *---------------------------------------------------------------------------*/ +static int +phy_ConfigBBWithParaFile( + IN PADAPTER Adapter, + IN u8* pFileName +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + int rtStatus = _SUCCESS; + + return rtStatus; +} + + + +//**************************************** +// The following is for High Power PA +//**************************************** +VOID +phy_ConfigBBExternalPA( + IN PADAPTER Adapter +) +{ +#ifdef CONFIG_USB_HCI + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u16 i=0; + u32 temp=0; + + if(!pHalData->ExternalPA) + { + return; + } + + // 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the + // same code as SU. It is already updated in PHY_REG_1T_HP.txt. +#if 0 + PHY_SetBBReg(Adapter, 0xee8, BIT28, 1); + temp = PHY_QueryBBReg(Adapter, 0x860, bMaskDWord); + temp |= (BIT26|BIT21|BIT10|BIT5); + PHY_SetBBReg(Adapter, 0x860, bMaskDWord, temp); + PHY_SetBBReg(Adapter, 0x870, BIT10, 0); + PHY_SetBBReg(Adapter, 0xc80, bMaskDWord, 0x20000080); + PHY_SetBBReg(Adapter, 0xc88, bMaskDWord, 0x40000100); +#endif + +#endif +} + +/*----------------------------------------------------------------------------- + * Function: phy_ConfigBBWithHeaderFile() + * + * Overview: This function read BB parameters from general file format, and do register + * Read/Write + * + * Input: PADAPTER Adapter + * u1Byte ConfigType 0 => PHY_CONFIG + * 1 =>AGC_TAB + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * + *---------------------------------------------------------------------------*/ +#ifndef CONFIG_PHY_SETTING_WITH_ODM +static int +phy_ConfigBBWithHeaderFile( + IN PADAPTER Adapter, + IN u8 ConfigType +) +{ + int i; + u32* Rtl819XPHY_REGArray_Table; + u32* Rtl819XAGCTAB_Array_Table; + u16 PHY_REGArrayLen, AGCTAB_ArrayLen; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + DM_ODM_T *podmpriv = &pHalData->odmpriv; + int ret = _SUCCESS; + + + AGCTAB_ArrayLen = Rtl8188E_AGCTAB_1TArrayLength; + Rtl819XAGCTAB_Array_Table = (u32*)Rtl8188E_AGCTAB_1TArray; + PHY_REGArrayLen = Rtl8188E_PHY_REG_1TArrayLength; + Rtl819XPHY_REGArray_Table = (u32*)Rtl8188E_PHY_REG_1TArray; +// RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8188EAGCTAB_1TArray\n")); +// RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8188EPHY_REG_1TArray\n")); + + if(ConfigType == CONFIG_BB_PHY_REG) + { + #ifdef CONFIG_IOL_BB_PHY_REG + { + struct xmit_frame *xmit_frame; + u32 tmp_value; + + if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { + ret = _FAIL; + goto exit; + } + + for(i=0;iRFCalibrateInfo.RegA24 = Rtl819XPHY_REGArray_Table[i+1]; + + rtw_IOL_append_WD_cmd(xmit_frame, Rtl819XPHY_REGArray_Table[i], tmp_value); + //RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XPHY_REGArray_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XPHY_REGArray_Table[i], Rtl819XPHY_REGArray_Table[i+1])); + } + + ret = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0); + } + #else + for(i=0;iRFCalibrateInfo.RegA24 = Rtl819XPHY_REGArray_Table[i+1]; + + PHY_SetBBReg(Adapter, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]); + + // Add 1us delay between BB/RF register setting. + rtw_udelay_os(1); + + //RT_TRACE(COMP_INIT, DBG_TRACE, ("The Rtl819XPHY_REGArray_Table[0] is %lx Rtl819XPHY_REGArray[1] is %lx \n",Rtl819XPHY_REGArray_Table[i], Rtl819XPHY_REGArray_Table[i+1])); + } + #endif + // for External PA + phy_ConfigBBExternalPA(Adapter); + } + else if(ConfigType == CONFIG_BB_AGC_TAB) + { + #ifdef CONFIG_IOL_BB_AGC_TAB + { + struct xmit_frame *xmit_frame; + + if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { + ret = _FAIL; + goto exit; + } + + for(i=0;iMCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][0]-TxAGC_A_Rate18_06 = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0]); + } + if(RegAddr == rTxAGC_A_Rate54_24) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][1]-TxAGC_A_Rate54_24 = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1]); + } + if(RegAddr == rTxAGC_A_CCK1_Mcs32) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][6]-TxAGC_A_CCK1_Mcs32 = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6]); + } + if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0xffffff00) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][7]-TxAGC_B_CCK11_A_CCK2_11 = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7]); + } + if(RegAddr == rTxAGC_A_Mcs03_Mcs00) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][2]-TxAGC_A_Mcs03_Mcs00 = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2]); + } + if(RegAddr == rTxAGC_A_Mcs07_Mcs04) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][3]-TxAGC_A_Mcs07_Mcs04 = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3]); + } + if(RegAddr == rTxAGC_A_Mcs11_Mcs08) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][4]-TxAGC_A_Mcs11_Mcs08 = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4]); + } + if(RegAddr == rTxAGC_A_Mcs15_Mcs12) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][5]-TxAGC_A_Mcs15_Mcs12 = 0x%x\n", pHalData->pwrGroupCnt,pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5]); + if(pHalData->rf_type== RF_1T1R) + { + //printk("pwrGroupCnt = %d\n", pHalData->pwrGroupCnt); + pHalData->pwrGroupCnt++; + } + } + if(RegAddr == rTxAGC_B_Rate18_06) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][8]-TxAGC_B_Rate18_06 = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8]); + } + if(RegAddr == rTxAGC_B_Rate54_24) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][9]-TxAGC_B_Rate54_24 = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9]); + } + if(RegAddr == rTxAGC_B_CCK1_55_Mcs32) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][14]-TxAGC_B_CCK1_55_Mcs32 = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14]); + } + if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0x000000ff) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][15]-TxAGC_B_CCK11_A_CCK2_11 = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15]); + } + if(RegAddr == rTxAGC_B_Mcs03_Mcs00) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][10]-TxAGC_B_Mcs03_Mcs00 = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10]); + } + if(RegAddr == rTxAGC_B_Mcs07_Mcs04) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][11]-TxAGC_B_Mcs07_Mcs04 = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11]); + } + if(RegAddr == rTxAGC_B_Mcs11_Mcs08) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][12]-TxAGC_B_Mcs11_Mcs08 = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12]); + } + if(RegAddr == rTxAGC_B_Mcs15_Mcs12) + { + pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data; + //printk("MCSTxPowerLevelOriginalOffset[%d][13]-TxAGC_B_Mcs15_Mcs12 = 0x%x\n", pHalData->pwrGroupCnt, + // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13]); + + if(pHalData->rf_type != RF_1T1R) + { + //printk("pwrGroupCnt = %d\n", pHalData->pwrGroupCnt); + pHalData->pwrGroupCnt++; + } + } +} +/*----------------------------------------------------------------------------- + * Function: phy_ConfigBBWithPgParaFile + * + * Overview: + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/06/2008 MHC Create Version 0. + * 2009/07/29 tynli (porting from 92SE branch)2009/03/11 Add copy parameter file to buffer for silent reset + *---------------------------------------------------------------------------*/ +static int +phy_ConfigBBWithPgParaFile( + IN PADAPTER Adapter, + IN u8* pFileName) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + int rtStatus = _SUCCESS; + + + return rtStatus; + +} /* phy_ConfigBBWithPgParaFile */ + +#ifndef CONFIG_PHY_SETTING_WITH_ODM +/*----------------------------------------------------------------------------- + * Function: phy_ConfigBBWithPgHeaderFile + * + * Overview: Config PHY_REG_PG array + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/06/2008 MHC Add later!!!!!!.. Please modify for new files!!!! + * 11/10/2008 tynli Modify to mew files. + *---------------------------------------------------------------------------*/ +static int +phy_ConfigBBWithPgHeaderFile( + IN PADAPTER Adapter, + IN u8 ConfigType) +{ + int i; + u32* Rtl819XPHY_REGArray_Table_PG; + u16 PHY_REGArrayPGLen; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + + PHY_REGArrayPGLen = Rtl8188E_PHY_REG_Array_PGLength; + Rtl819XPHY_REGArray_Table_PG = (u32*)Rtl8188E_PHY_REG_Array_PG; + + if(ConfigType == CONFIG_BB_PHY_REG) + { + for(i=0;iphy_BB8192S_Config_ParaFile\n")); + + pszBBRegFile = sz8188EBBRegFile ; + pszAGCTableFile = sz8188EAGCTableFile; + pszBBRegPgFile = sz8188EBBRegPgFile; + pszBBRegMpFile = sz8188EBBRegMpFile; + + // + // 1. Read PHY_REG.TXT BB INIT!! + // We will seperate as 88C / 92C according to chip version + // +#ifdef CONFIG_EMBEDDED_FWIMG + #ifdef CONFIG_PHY_SETTING_WITH_ODM + if(HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG)) + rtStatus = _FAIL; + #else + rtStatus = phy_ConfigBBWithHeaderFile(Adapter, CONFIG_BB_PHY_REG); + #endif//#ifdef CONFIG_PHY_SETTING_WITH_ODM +#else + // No matter what kind of CHIP we always read PHY_REG.txt. We must copy different + // type of parameter files to phy_reg.txt at first. + rtStatus = phy_ConfigBBWithParaFile(Adapter,pszBBRegFile); +#endif//#ifdef CONFIG_EMBEDDED_FWIMG + + if(rtStatus != _SUCCESS){ + //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg Fail!!")); + goto phy_BB8190_Config_ParaFile_Fail; + } + + // + // 20100318 Joseph: Config 2T2R to 1T2R if necessary. + // + //if(pHalData->rf_type == RF_1T2R) + //{ + //phy_BB8192C_Config_1T(Adapter); + //DBG_8192C("phy_BB8188E_Config_ParaFile():Config to 1T!!\n"); + //} + + // + // 2. If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt + // + if (pEEPROM->bautoload_fail_flag == _FALSE) + { + pHalData->pwrGroupCnt = 0; + +#ifdef CONFIG_EMBEDDED_FWIMG + #ifdef CONFIG_PHY_SETTING_WITH_ODM + if(HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_PG)) + rtStatus = _FAIL; + #else + rtStatus = phy_ConfigBBWithPgHeaderFile(Adapter, CONFIG_BB_PHY_REG_PG); + #endif +#else + rtStatus = phy_ConfigBBWithPgParaFile(Adapter, pszBBRegPgFile); +#endif + } + + if(rtStatus != _SUCCESS){ + //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():BB_PG Reg Fail!!")); + goto phy_BB8190_Config_ParaFile_Fail; + } + + // + // 3. BB AGC table Initialization + // +#ifdef CONFIG_EMBEDDED_FWIMG + #ifdef CONFIG_PHY_SETTING_WITH_ODM + if(HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_AGC_TAB)) + rtStatus = _FAIL; + #else + rtStatus = phy_ConfigBBWithHeaderFile(Adapter, CONFIG_BB_AGC_TAB); + #endif//#ifdef CONFIG_PHY_SETTING_WITH_ODM +#else + //RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_BB8192S_Config_ParaFile AGC_TAB.txt\n")); + rtStatus = phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile); +#endif//#ifdef CONFIG_EMBEDDED_FWIMG + + if(rtStatus != _SUCCESS){ + //RT_TRACE(COMP_FPGA, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():AGC Table Fail\n")); + goto phy_BB8190_Config_ParaFile_Fail; + } + + +phy_BB8190_Config_ParaFile_Fail: + + return rtStatus; +} + + +int +PHY_BBConfig8188E( + IN PADAPTER Adapter + ) +{ + int rtStatus = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 RegVal; + u8 TmpU1B=0; + u8 value8,CrystalCap; + + phy_InitBBRFRegisterDefinition(Adapter); + + + // Enable BB and RF + RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN); + rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1)); + + // 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. + //rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x83); + //rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xdb); + + rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB); + +#ifdef CONFIG_USB_HCI + rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB); +#else + rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB); +#endif + +#if 0 +#ifdef CONFIG_USB_HCI + //To Fix MAC loopback mode fail. Suggested by SD4 Johnny. 2010.03.23. + rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x0f); + rtw_write8(Adapter, 0x15, 0xe9); +#endif + + rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, 0x80); +#endif + +#ifdef CONFIG_USB_HCI + //rtw_write8(Adapter, 0x15, 0xe9); +#endif + + +#ifdef CONFIG_PCI_HCI + // Force use left antenna by default for 88C. + // if(!IS_92C_SERIAL(pHalData->VersionID) || IS_92C_1T2R(pHalData->VersionID)) + if(Adapter->ledpriv.LedStrategy != SW_LED_MODE10) + { + RegVal = rtw_read32(Adapter, REG_LEDCFG0); + rtw_write32(Adapter, REG_LEDCFG0, RegVal|BIT23); + } +#endif + + // + // Config BB and AGC + // + rtStatus = phy_BB8188E_Config_ParaFile(Adapter); + + // write 0x24[16:11] = 0x24[22:17] = CrystalCap + CrystalCap = pHalData->CrystalCap & 0x3F; + PHY_SetBBReg(Adapter, REG_AFE_XTAL_CTRL, 0x7ff800, (CrystalCap | (CrystalCap << 6))); + + return rtStatus; + +} + + +int +PHY_RFConfig8188E( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + int rtStatus = _SUCCESS; + + // + // RF config + // + rtStatus = PHY_RF6052_Config8188E(Adapter); +#if 0 + switch(pHalData->rf_chip) + { + case RF_6052: + rtStatus = PHY_RF6052_Config(Adapter); + break; + case RF_8225: + rtStatus = PHY_RF8225_Config(Adapter); + break; + case RF_8256: + rtStatus = PHY_RF8256_Config(Adapter); + break; + case RF_8258: + break; + case RF_PSEUDO_11N: + rtStatus = PHY_RF8225_Config(Adapter); + break; + default: //for MacOs Warning: "RF_TYPE_MIN" not handled in switch + break; + } +#endif + return rtStatus; +} + + +/*----------------------------------------------------------------------------- + * Function: PHY_ConfigRFWithParaFile() + * + * Overview: This function read RF parameters from general file format, and do RF 3-wire + * + * Input: PADAPTER Adapter + * ps1Byte pFileName + * RF_RADIO_PATH_E eRFPath + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * + * Note: Delay may be required for RF configuration + *---------------------------------------------------------------------------*/ +int +rtl8188e_PHY_ConfigRFWithParaFile( + IN PADAPTER Adapter, + IN u8* pFileName, + RF_RADIO_PATH_E eRFPath +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + int rtStatus = _SUCCESS; + + + return rtStatus; + +} + +//**************************************** +// The following is for High Power PA +//**************************************** +#define HighPowerRadioAArrayLen 22 +//This is for High power PA +u32 Rtl8192S_HighPower_RadioA_Array[HighPowerRadioAArrayLen] = { +0x013,0x00029ea4, +0x013,0x00025e74, +0x013,0x00020ea4, +0x013,0x0001ced0, +0x013,0x00019f40, +0x013,0x00014e70, +0x013,0x000106a0, +0x013,0x0000c670, +0x013,0x000082a0, +0x013,0x00004270, +0x013,0x00000240, +}; + +int +PHY_ConfigRFExternalPA( + IN PADAPTER Adapter, + RF_RADIO_PATH_E eRFPath +) +{ + int rtStatus = _SUCCESS; +#ifdef CONFIG_USB_HCI + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u16 i=0; + + if(!pHalData->ExternalPA) + { + return rtStatus; + } + + // 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the + // same code as SU. It is already updated in radio_a_1T_HP.txt. +#if 0 + //add for SU High Power PA + for(i = 0;i PHY_ConfigRFWithHeaderFile() Radio_A:Rtl8188ERadioA_1TArray\n")); +// RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> PHY_ConfigRFWithHeaderFile() Radio_B:Rtl8188ERadioB_1TArray\n")); + + switch (eRFPath) + { + case RF_PATH_A: + #ifdef CONFIG_IOL_RF_RF_PATH_A + { + struct xmit_frame *xmit_frame; + if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { + rtStatus = _FAIL; + goto exit; + } + + for(i = 0;iPHYRegDef[eRFPath]; + u32 NewOffset = 0; + u32 DataAndAddr = 0; + + NewOffset = Rtl819XRadioA_Array_Table[i] & 0x3f; + DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioA_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; // T65 RF + rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr); + } + } + rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0); + } + #else + for(i = 0;iPHYRegDef[eRFPath]; + u32 NewOffset = 0; + u32 DataAndAddr = 0; + + NewOffset = Rtl819XRadioB_Array_Table[i] & 0x3f; + DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioB_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; // T65 RF + rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr); + } + } + rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0); + } + #else + for(i = 0;i actually we call PlatformStallExecution()) to do NdisStallExecution() + // [busy wait] instead of NdisMSleep(). So we acquire RT_INITIAL_SPINLOCK + // to run at Dispatch level to achive it. + //cosa PlatformAcquireSpinLock(Adapter, RT_INITIAL_SPINLOCK); + WriteData[i] &= 0xfff; + PHY_SetRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bRFRegOffsetMask, WriteData[i]); + // TODO: we should not delay for such a long time. Ask SD3 + rtw_mdelay_os(10); + ulRegRead = PHY_QueryRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bMaskDWord); + rtw_mdelay_os(10); + //cosa PlatformReleaseSpinLock(Adapter, RT_INITIAL_SPINLOCK); + break; + + default: + rtStatus = _FAIL; + break; + } + + + // + // Check whether readback data is correct + // + if(ulRegRead != WriteData[i]) + { + //RT_TRACE(COMP_FPGA, DBG_LOUD, ("ulRegRead: %lx, WriteData: %lx \n", ulRegRead, WriteData[i])); + rtStatus = _FAIL; + break; + } + } + + return rtStatus; +} + + +VOID +rtl8192c_PHY_GetHWRegOriginalValue( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + // read rx initial gain + pHalData->DefaultInitialGain[0] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XAAGCCore1, bMaskByte0); + pHalData->DefaultInitialGain[1] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XBAGCCore1, bMaskByte0); + pHalData->DefaultInitialGain[2] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XCAGCCore1, bMaskByte0); + pHalData->DefaultInitialGain[3] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XDAGCCore1, bMaskByte0); + //RT_TRACE(COMP_INIT, DBG_LOUD, + //("Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x) \n", + //pHalData->DefaultInitialGain[0], pHalData->DefaultInitialGain[1], + //pHalData->DefaultInitialGain[2], pHalData->DefaultInitialGain[3])); + + // read framesync + pHalData->framesync = (u8)PHY_QueryBBReg(Adapter, rOFDM0_RxDetector3, bMaskByte0); + pHalData->framesyncC34 = PHY_QueryBBReg(Adapter, rOFDM0_RxDetector2, bMaskDWord); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Default framesync (0x%x) = 0x%x \n", + // rOFDM0_RxDetector3, pHalData->framesync)); +} + + +// +// Description: +// Map dBm into Tx power index according to +// current HW model, for example, RF and PA, and +// current wireless mode. +// By Bruce, 2008-01-29. +// +static u8 +phy_DbmToTxPwrIdx( + IN PADAPTER Adapter, + IN WIRELESS_MODE WirelessMode, + IN int PowerInDbm + ) +{ + u8 TxPwrIdx = 0; + int Offset = 0; + + + // + // Tested by MP, we found that CCK Index 0 equals to 8dbm, OFDM legacy equals to + // 3dbm, and OFDM HT equals to 0dbm repectively. + // Note: + // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. + // By Bruce, 2008-01-29. + // + switch(WirelessMode) + { + case WIRELESS_MODE_B: + Offset = -7; + break; + + case WIRELESS_MODE_G: + case WIRELESS_MODE_N_24G: + Offset = -8; + break; + default: + Offset = -8; + break; + } + + if((PowerInDbm - Offset) > 0) + { + TxPwrIdx = (u8)((PowerInDbm - Offset) * 2); + } + else + { + TxPwrIdx = 0; + } + + // Tx Power Index is too large. + if(TxPwrIdx > MAX_TXPWR_IDX_NMODE_92S) + TxPwrIdx = MAX_TXPWR_IDX_NMODE_92S; + + return TxPwrIdx; +} + +// +// Description: +// Map Tx power index into dBm according to +// current HW model, for example, RF and PA, and +// current wireless mode. +// By Bruce, 2008-01-29. +// +int +phy_TxPwrIdxToDbm( + IN PADAPTER Adapter, + IN WIRELESS_MODE WirelessMode, + IN u8 TxPwrIdx + ) +{ + int Offset = 0; + int PwrOutDbm = 0; + + // + // Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm. + // Note: + // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. + // By Bruce, 2008-01-29. + // + switch(WirelessMode) + { + case WIRELESS_MODE_B: + Offset = -7; + break; + + case WIRELESS_MODE_G: + case WIRELESS_MODE_N_24G: + Offset = -8; + default: + Offset = -8; + break; + } + + PwrOutDbm = TxPwrIdx / 2 + Offset; // Discard the decimal part. + + return PwrOutDbm; +} + + +/*----------------------------------------------------------------------------- + * Function: GetTxPowerLevel8190() + * + * Overview: This function is export to "common" moudule + * + * Input: PADAPTER Adapter + * psByte Power Level + * + * Output: NONE + * + * Return: NONE + * + *---------------------------------------------------------------------------*/ +VOID +PHY_GetTxPowerLevel8188E( + IN PADAPTER Adapter, + OUT u32* powerlevel + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 TxPwrLevel = 0; + int TxPwrDbm; + + // + // Because the Tx power indexes are different, we report the maximum of them to + // meet the CCX TPC request. By Bruce, 2008-01-31. + // + + // CCK + TxPwrLevel = pHalData->CurrentCckTxPwrIdx; + TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_B, TxPwrLevel); + + // Legacy OFDM + TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx + pHalData->LegacyHTTxPowerDiff; + + // Compare with Legacy OFDM Tx power. + if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel) > TxPwrDbm) + TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel); + + // HT OFDM + TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx; + + // Compare with HT OFDM Tx power. + if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel) > TxPwrDbm) + TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel); + + *powerlevel = TxPwrDbm; +} + +#if 0 +static void getTxPowerIndex( + IN PADAPTER Adapter, + IN u8 channel, + IN OUT u8* cckPowerLevel, + IN OUT u8* ofdmPowerLevel + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 index = (channel -1); + // 1. CCK + cckPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelCck[RF_PATH_A][index]; //RF-A + cckPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelCck[RF_PATH_B][index]; //RF-B + + // 2. OFDM for 1S or 2S + if (GET_RF_TYPE(Adapter) == RF_1T2R || GET_RF_TYPE(Adapter) == RF_1T1R) + { + // Read HT 40 OFDM TX power + ofdmPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelHT40_1S[RF_PATH_A][index]; + ofdmPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelHT40_1S[RF_PATH_B][index]; + } + else if (GET_RF_TYPE(Adapter) == RF_2T2R) + { + // Read HT 40 OFDM TX power + ofdmPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelHT40_2S[RF_PATH_A][index]; + ofdmPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelHT40_2S[RF_PATH_B][index]; + } + //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, set tx power index !!\n", channel)); +} +#endif + +void getTxPowerIndex88E( + IN PADAPTER Adapter, + IN u8 channel, + IN OUT u8* cckPowerLevel, + IN OUT u8* ofdmPowerLevel, + IN OUT u8* BW20PowerLevel, + IN OUT u8* BW40PowerLevel + ) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 index = (channel -1); + u8 TxCount=0,path_nums; + + + if((RF_1T2R == pHalData->rf_type) ||(RF_1T1R ==pHalData->rf_type )) + path_nums = 1; + else + path_nums = 2; + + for(TxCount=0;TxCount< path_nums ;TxCount++) + { + if(TxCount==RF_PATH_A) + { + // 1. CCK + cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; + //2. OFDM + ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ + pHalData->OFDM_24G_Diff[TxCount][RF_PATH_A]; + // 1. BW20 + BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ + pHalData->BW20_24G_Diff[TxCount][RF_PATH_A]; + //2. BW40 + BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; + //RTPRINT(FPHY, PHY_TXPWR, ("getTxPowerIndex88E(): 40MBase=0x%x 20Mdiff=%d 20MBase=0x%x!!\n", + // pHalData->Index24G_BW40_Base[RF_PATH_A][index], + // pHalData->BW20_24G_Diff[TxCount][RF_PATH_A], + // BW20PowerLevel[TxCount])); + } + else if(TxCount==RF_PATH_B) + { + // 1. CCK + cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; + //2. OFDM + ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ + pHalData->BW20_24G_Diff[RF_PATH_A][index]+ + pHalData->BW20_24G_Diff[TxCount][index]; + // 1. BW20 + BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ + pHalData->BW20_24G_Diff[TxCount][RF_PATH_A]+ + pHalData->BW20_24G_Diff[TxCount][index]; + //2. BW40 + BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; + } + else if(TxCount==RF_PATH_C) + { + // 1. CCK + cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; + //2. OFDM + ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ + pHalData->BW20_24G_Diff[RF_PATH_A][index]+ + pHalData->BW20_24G_Diff[RF_PATH_B][index]+ + pHalData->BW20_24G_Diff[TxCount][index]; + // 1. BW20 + BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ + pHalData->BW20_24G_Diff[RF_PATH_A][index]+ + pHalData->BW20_24G_Diff[RF_PATH_B][index]+ + pHalData->BW20_24G_Diff[TxCount][index]; + //2. BW40 + BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; + } + else if(TxCount==RF_PATH_D) + { + // 1. CCK + cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index]; + //2. OFDM + ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ + pHalData->BW20_24G_Diff[RF_PATH_A][index]+ + pHalData->BW20_24G_Diff[RF_PATH_B][index]+ + pHalData->BW20_24G_Diff[RF_PATH_C][index]+ + pHalData->BW20_24G_Diff[TxCount][index]; + + // 1. BW20 + BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+ + pHalData->BW20_24G_Diff[RF_PATH_A][index]+ + pHalData->BW20_24G_Diff[RF_PATH_B][index]+ + pHalData->BW20_24G_Diff[RF_PATH_C][index]+ + pHalData->BW20_24G_Diff[TxCount][index]; + + //2. BW40 + BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index]; + } + else + { + } + } + +#if 0 // (INTEL_PROXIMITY_SUPPORT == 1) + switch(pMgntInfo->IntelProximityModeInfo.PowerOutput){ + case 1: // 100% + break; + case 2: // 70% + cckPowerLevel[0] -= 3; + cckPowerLevel[1] -= 3; + ofdmPowerLevel[0] -=3; + ofdmPowerLevel[1] -= 3; + break; + case 3: // 50% + cckPowerLevel[0] -= 6; + cckPowerLevel[1] -= 6; + ofdmPowerLevel[0] -=6; + ofdmPowerLevel[1] -= 6; + break; + case 4: // 35% + cckPowerLevel[0] -= 9; + cckPowerLevel[1] -= 9; + ofdmPowerLevel[0] -=9; + ofdmPowerLevel[1] -= 9; + break; + case 5: // 15% + cckPowerLevel[0] -= 17; + cckPowerLevel[1] -= 17; + ofdmPowerLevel[0] -=17; + ofdmPowerLevel[1] -= 17; + break; + + default: + break; + } +#endif + //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, set tx power index !!\n", channel)); +} + +void phy_PowerIndexCheck88E( + IN PADAPTER Adapter, + IN u8 channel, + IN OUT u8 * cckPowerLevel, + IN OUT u8 * ofdmPowerLevel, + IN OUT u8 * BW20PowerLevel, + IN OUT u8 * BW40PowerLevel + ) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +#if 0 // (CCX_SUPPORT == 1) + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + PRT_CCX_INFO pCcxInfo = GET_CCX_INFO(pMgntInfo); + + // + // CCX 2 S31, AP control of client transmit power: + // 1. We shall not exceed Cell Power Limit as possible as we can. + // 2. Tolerance is +/- 5dB. + // 3. 802.11h Power Contraint takes higher precedence over CCX Cell Power Limit. + // + // TODO: + // 1. 802.11h power contraint + // + // 071011, by rcnjko. + // + if( pMgntInfo->OpMode == RT_OP_MODE_INFRASTRUCTURE && + pMgntInfo->mAssoc && + pCcxInfo->bUpdateCcxPwr && + pCcxInfo->bWithCcxCellPwr && + channel == pMgntInfo->dot11CurrentChannelNumber) + { + u1Byte CckCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, pCcxInfo->CcxCellPwr); + u1Byte LegacyOfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_G, pCcxInfo->CcxCellPwr); + u1Byte OfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, pCcxInfo->CcxCellPwr); + + RT_TRACE(COMP_TXAGC, DBG_LOUD, + ("CCX Cell Limit: %d dbm => CCK Tx power index : %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", + pCcxInfo->CcxCellPwr, CckCellPwrIdx, LegacyOfdmCellPwrIdx, OfdmCellPwrIdx)); + RT_TRACE(COMP_TXAGC, DBG_LOUD, + ("EEPROM channel(%d) => CCK Tx power index: %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", + channel, cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); + + // CCK + if(cckPowerLevel[0] > CckCellPwrIdx) + cckPowerLevel[0] = CckCellPwrIdx; + // Legacy OFDM, HT OFDM + if(ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff > LegacyOfdmCellPwrIdx) + { + if((OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff) > 0) + { + ofdmPowerLevel[0] = OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff; + } + else + { + ofdmPowerLevel[0] = 0; + } + } + + RT_TRACE(COMP_TXAGC, DBG_LOUD, + ("Altered CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", + cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); + } +#else + // Add or not ??? +#endif + + pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0]; + pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0]; + pHalData->CurrentBW2024GTxPwrIdx = BW20PowerLevel[0]; + pHalData->CurrentBW4024GTxPwrIdx = BW40PowerLevel[0]; + + //DBG_871X("PHY_SetTxPowerLevel8188E(): CurrentCckTxPwrIdx : 0x%x,CurrentOfdm24GTxPwrIdx: 0x%x, CurrentBW2024GTxPwrIdx: 0x%dx, CurrentBW4024GTxPwrIdx: 0x%x \n", + // pHalData->CurrentCckTxPwrIdx, pHalData->CurrentOfdm24GTxPwrIdx, pHalData->CurrentBW2024GTxPwrIdx, pHalData->CurrentBW4024GTxPwrIdx); +} +/*----------------------------------------------------------------------------- + * Function: SetTxPowerLevel8190() + * + * Overview: This function is export to "HalCommon" moudule + * We must consider RF path later!!!!!!! + * + * Input: PADAPTER Adapter + * u1Byte channel + * + * Output: NONE + * + * Return: NONE + * 2008/11/04 MHC We remove EEPROM_93C56. + * We need to move CCX relative code to independet file. + * 2009/01/21 MHC Support new EEPROM format from SD3 requirement. + * + *---------------------------------------------------------------------------*/ +VOID +PHY_SetTxPowerLevel8188E( + IN PADAPTER Adapter, + IN u8 channel + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + u8 cckPowerLevel[MAX_TX_COUNT], ofdmPowerLevel[MAX_TX_COUNT];// [0]:RF-A, [1]:RF-B + u8 BW20PowerLevel[MAX_TX_COUNT], BW40PowerLevel[MAX_TX_COUNT]; + u8 i=0; +/* +#if(MP_DRIVER == 1) + if (Adapter->registrypriv.mp_mode == 1) + return; +#endif +*/ + //getTxPowerIndex(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]); + getTxPowerIndex88E(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0],&BW20PowerLevel[0],&BW40PowerLevel[0]); + + //printk("Channel-%d, cckPowerLevel = 0x%x, ofdmPowerLeve = 0x%x, BW20PowerLevel = 0x%x, BW40PowerLevel = 0x%x,\n", + // channel, cckPowerLevel[0], ofdmPowerLevel[0], BW20PowerLevel[0] ,BW40PowerLevel[0]); + + //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, cckPowerLevel (A / B) = 0x%x / 0x%x, ofdmPowerLevel (A / B) = 0x%x / 0x%x\n", + // channel, cckPowerLevel[0], cckPowerLevel[1], ofdmPowerLevel[0], ofdmPowerLevel[1])); + + //ccxPowerIndexCheck(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]); + phy_PowerIndexCheck88E(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0],&BW20PowerLevel[0],&BW40PowerLevel[0]); + + rtl8188e_PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]); + rtl8188e_PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0],&BW20PowerLevel[0],&BW40PowerLevel[0], channel); + +#if 0 + switch(pHalData->rf_chip) + { + case RF_8225: + PHY_SetRF8225CckTxPower(Adapter, cckPowerLevel[0]); + PHY_SetRF8225OfdmTxPower(Adapter, ofdmPowerLevel[0]); + break; + + case RF_8256: + PHY_SetRF8256CCKTxPower(Adapter, cckPowerLevel[0]); + PHY_SetRF8256OFDMTxPower(Adapter, ofdmPowerLevel[0]); + break; + + case RF_6052: + PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]); + PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel); + break; + + case RF_8258: + break; + } +#endif + +} + + +// +// Description: +// Update transmit power level of all channel supported. +// +// TODO: +// A mode. +// By Bruce, 2008-02-04. +// +BOOLEAN +PHY_UpdateTxPowerDbm8188E( + IN PADAPTER Adapter, + IN int powerInDbm + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 idx; + u8 rf_path; + + // TODO: A mode Tx power. + u8 CckTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, powerInDbm); + u8 OfdmTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, powerInDbm); + + if(OfdmTxPwrIdx - pHalData->LegacyHTTxPowerDiff > 0) + OfdmTxPwrIdx -= pHalData->LegacyHTTxPowerDiff; + else + OfdmTxPwrIdx = 0; + + //RT_TRACE(COMP_TXAGC, DBG_LOUD, ("PHY_UpdateTxPowerDbm8192S(): %ld dBm , CckTxPwrIdx = %d, OfdmTxPwrIdx = %d\n", powerInDbm, CckTxPwrIdx, OfdmTxPwrIdx)); + + for(idx = 0; idx < 14; idx++) + { + for (rf_path = 0; rf_path < 2; rf_path++) + { + pHalData->TxPwrLevelCck[rf_path][idx] = CckTxPwrIdx; + pHalData->TxPwrLevelHT40_1S[rf_path][idx] = + pHalData->TxPwrLevelHT40_2S[rf_path][idx] = OfdmTxPwrIdx; + } + } + + //Adapter->HalFunc.SetTxPowerLevelHandler(Adapter, pHalData->CurrentChannel);//gtest:todo + + return _TRUE; +} + + +/* + Description: + When beacon interval is changed, the values of the + hw registers should be modified. + By tynli, 2008.10.24. + +*/ + + +void +rtl8192c_PHY_SetBeaconHwReg( + IN PADAPTER Adapter, + IN u16 BeaconInterval + ) +{ + +} + + +VOID +PHY_ScanOperationBackup8188E( + IN PADAPTER Adapter, + IN u8 Operation + ) +{ +#if 0 + IO_TYPE IoType; + + if(!Adapter->bDriverStopped) + { + switch(Operation) + { + case SCAN_OPT_BACKUP: + IoType = IO_CMD_PAUSE_DM_BY_SCAN; + rtw_hal_set_hwreg(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); + + break; + + case SCAN_OPT_RESTORE: + IoType = IO_CMD_RESUME_DM_BY_SCAN; + rtw_hal_set_hwreg(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); + break; + + default: + RT_TRACE(COMP_SCAN, DBG_LOUD, ("Unknown Scan Backup Operation. \n")); + break; + } + } +#endif +} + +/*----------------------------------------------------------------------------- + * Function: PHY_SetBWModeCallback8192C() + * + * Overview: Timer callback function for SetSetBWMode + * + * Input: PRT_TIMER pTimer + * + * Output: NONE + * + * Return: NONE + * + * Note: (1) We do not take j mode into consideration now + * (2) Will two workitem of "switch channel" and "switch channel bandwidth" run + * concurrently? + *---------------------------------------------------------------------------*/ +static VOID +_PHY_SetBWMode92C( + IN PADAPTER Adapter +) +{ +// PADAPTER Adapter = (PADAPTER)pTimer->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 regBwOpMode; + u8 regRRSR_RSC; + + //return; + + // Added it for 20/40 mhz switch time evaluation by guangan 070531 + //u4Byte NowL, NowH; + //u8Byte BeginTime, EndTime; + + /*RT_TRACE(COMP_SCAN, DBG_LOUD, ("==>PHY_SetBWModeCallback8192C() Switch to %s bandwidth\n", \ + pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"))*/ + + if(pHalData->rf_chip == RF_PSEUDO_11N) + { + //pHalData->SetBWModeInProgress= _FALSE; + return; + } + + // There is no 40MHz mode in RF_8225. + if(pHalData->rf_chip==RF_8225) + return; + + if(Adapter->bDriverStopped) + return; + + // Added it for 20/40 mhz switch time evaluation by guangan 070531 + //NowL = PlatformEFIORead4Byte(Adapter, TSFR); + //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); + //BeginTime = ((u8Byte)NowH << 32) + NowL; + + //3// + //3//<1>Set MAC register + //3// + //Adapter->HalFunc.SetBWModeHandler(); + + regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE); + regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2); + //regBwOpMode = rtw_hal_get_hwreg(Adapter,HW_VAR_BWMODE,(pu1Byte)®BwOpMode); + + switch(pHalData->CurrentChannelBW) + { + case HT_CHANNEL_WIDTH_20: + regBwOpMode |= BW_OPMODE_20MHZ; + // 2007/02/07 Mark by Emily becasue we have not verify whether this register works + rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); + break; + + case HT_CHANNEL_WIDTH_40: + regBwOpMode &= ~BW_OPMODE_20MHZ; + // 2007/02/07 Mark by Emily becasue we have not verify whether this register works + rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); + + regRRSR_RSC = (regRRSR_RSC&0x90) |(pHalData->nCur40MhzPrimeSC<<5); + rtw_write8(Adapter, REG_RRSR+2, regRRSR_RSC); + break; + + default: + /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): + unknown Bandwidth: %#X\n",pHalData->CurrentChannelBW));*/ + break; + } + + //3// + //3//<2>Set PHY related register + //3// + switch(pHalData->CurrentChannelBW) + { + /* 20 MHz channel*/ + case HT_CHANNEL_WIDTH_20: + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); + PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); + //PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); + + break; + + + /* 40 MHz channel*/ + case HT_CHANNEL_WIDTH_40: + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); + PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1); + + // Set Control channel to upper or lower. These settings are required only for 40MHz + PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1)); + PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); + //PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0); + + PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC==HAL_PRIME_CHNL_OFFSET_LOWER)?2:1); + + break; + + + + default: + /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): unknown Bandwidth: %#X\n"\ + ,pHalData->CurrentChannelBW));*/ + break; + + } + //Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315 + + // Added it for 20/40 mhz switch time evaluation by guangan 070531 + //NowL = PlatformEFIORead4Byte(Adapter, TSFR); + //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); + //EndTime = ((u8Byte)NowH << 32) + NowL; + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("SetBWModeCallback8190Pci: time of SetBWMode = %I64d us!\n", (EndTime - BeginTime))); + + //3<3>Set RF related register + switch(pHalData->rf_chip) + { + case RF_8225: + //PHY_SetRF8225Bandwidth(Adapter, pHalData->CurrentChannelBW); + break; + + case RF_8256: + // Please implement this function in Hal8190PciPhy8256.c + //PHY_SetRF8256Bandwidth(Adapter, pHalData->CurrentChannelBW); + break; + + case RF_8258: + // Please implement this function in Hal8190PciPhy8258.c + // PHY_SetRF8258Bandwidth(); + break; + + case RF_PSEUDO_11N: + // Do Nothing + break; + + case RF_6052: + rtl8188e_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW); + break; + + default: + //RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); + break; + } + + //pHalData->SetBWModeInProgress= FALSE; + + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SetBWModeCallback8192C() \n" )); +} + + + /*----------------------------------------------------------------------------- + * Function: SetBWMode8190Pci() + * + * Overview: This function is export to "HalCommon" moudule + * + * Input: PADAPTER Adapter + * HT_CHANNEL_WIDTH Bandwidth //20M or 40M + * + * Output: NONE + * + * Return: NONE + * + * Note: We do not take j mode into consideration now + *---------------------------------------------------------------------------*/ +VOID +PHY_SetBWMode8188E( + IN PADAPTER Adapter, + IN HT_CHANNEL_WIDTH Bandwidth, // 20M or 40M + IN unsigned char Offset // Upper, Lower, or Don't care +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + HT_CHANNEL_WIDTH tmpBW= pHalData->CurrentChannelBW; + // Modified it for 20/40 mhz switch by guangan 070531 + //PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; + + //return; + + //if(pHalData->SwChnlInProgress) +// if(pMgntInfo->bScanInProgress) +// { +// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s Exit because bScanInProgress!\n", +// Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")); +// return; +// } + +// if(pHalData->SetBWModeInProgress) +// { +// // Modified it for 20/40 mhz switch by guangan 070531 +// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s cancel last timer because SetBWModeInProgress!\n", +// Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")); +// PlatformCancelTimer(Adapter, &pHalData->SetBWModeTimer); +// //return; +// } + + //if(pHalData->SetBWModeInProgress) + // return; + + //pHalData->SetBWModeInProgress= TRUE; + + pHalData->CurrentChannelBW = Bandwidth; + +#if 0 + if(Offset==HT_EXTCHNL_OFFSET_LOWER) + pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; + else if(Offset==HT_EXTCHNL_OFFSET_UPPER) + pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; + else + pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +#else + pHalData->nCur40MhzPrimeSC = Offset; +#endif + + if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) + { + #if 0 + //PlatformSetTimer(Adapter, &(pHalData->SetBWModeTimer), 0); + #else + _PHY_SetBWMode92C(Adapter); + #endif + } + else + { + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() SetBWModeInProgress FALSE driver sleep or unload\n")); + //pHalData->SetBWModeInProgress= FALSE; + pHalData->CurrentChannelBW = tmpBW; + } + +} + + +static void _PHY_SwChnl8192C(PADAPTER Adapter, u8 channel) +{ + u8 eRFPath; + u32 param1, param2; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if ( Adapter->bNotifyChannelChange ) + { + DBG_871X( "[%s] ch = %d\n", __FUNCTION__, channel ); + } + + //s1. pre common command - CmdID_SetTxPowerLevel + PHY_SetTxPowerLevel8188E(Adapter, channel); + + //s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel + param1 = RF_CHNLBW; + param2 = channel; + for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) + { + pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2); + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); + } + + + //s3. post common command - CmdID_End, None + +} +// <20130708, James> A workaround to eliminate the 2480MHz spur for 8188E I-Cut +void +phy_SpurCalibration_8188E( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //DbgPrint("===> phy_SpurCalibration_8188E CurrentChannelBW = %d, CurrentChannel = %d\n", pHalData->CurrentChannelBW, pHalData->CurrentChannel); + if(pHalData->CurrentChannelBW == 0 && pHalData->CurrentChannel == 13){ + PHY_SetBBReg(Adapter, rOFDM1_CFOTracking, BIT(28), 0x1); //enable CSI Mask + PHY_SetBBReg(Adapter, rOFDM1_csi_fix_mask, BIT(26)|BIT(25), 0x3); //Fix CSI Mask Tone + } + else{ + PHY_SetBBReg(Adapter, rOFDM1_CFOTracking, BIT(28), 0x0); //disable CSI Mask + PHY_SetBBReg(Adapter, rOFDM1_csi_fix_mask, BIT(26)|BIT(25), 0x0); + } + +} +VOID +PHY_SwChnl8188E( // Call after initialization + IN PADAPTER Adapter, + IN u8 channel + ) +{ + //PADAPTER Adapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, _TRUE); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 tmpchannel = pHalData->CurrentChannel; + BOOLEAN bResult = _TRUE; + + if(pHalData->rf_chip == RF_PSEUDO_11N) + { + //pHalData->SwChnlInProgress=FALSE; + return; //return immediately if it is peudo-phy + } + + //if(pHalData->SwChnlInProgress) + // return; + + //if(pHalData->SetBWModeInProgress) + // return; + + //-------------------------------------------- + switch(pHalData->CurrentWirelessMode) + { + case WIRELESS_MODE_A: + case WIRELESS_MODE_N_5G: + //RT_ASSERT((channel>14), ("WIRELESS_MODE_A but channel<=14")); + break; + + case WIRELESS_MODE_B: + //RT_ASSERT((channel<=14), ("WIRELESS_MODE_B but channel>14")); + break; + + case WIRELESS_MODE_G: + case WIRELESS_MODE_N_24G: + //RT_ASSERT((channel<=14), ("WIRELESS_MODE_G but channel>14")); + break; + + default: + //RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode)); + break; + } + //-------------------------------------------- + + //pHalData->SwChnlInProgress = TRUE; + if(channel == 0) + channel = 1; + + pHalData->CurrentChannel=channel; + + //pHalData->SwChnlStage=0; + //pHalData->SwChnlStep=0; + + if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) + { + #if 0 + //PlatformSetTimer(Adapter, &(pHalData->SwChnlTimer), 0); + #else + _PHY_SwChnl8192C(Adapter, channel); + #endif + if (IS_VENDOR_8188E_I_CUT_SERIES(Adapter)) + phy_SpurCalibration_8188E( Adapter); + if(bResult) + { + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress TRUE schdule workitem done\n")); + } + else + { + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE schdule workitem error\n")); + //if(IS_HARDWARE_TYPE_8192SU(Adapter)) + //{ + // pHalData->SwChnlInProgress = FALSE; + pHalData->CurrentChannel = tmpchannel; + //} + } + + } + else + { + //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE driver sleep or unload\n")); + //if(IS_HARDWARE_TYPE_8192SU(Adapter)) + //{ + // pHalData->SwChnlInProgress = FALSE; + pHalData->CurrentChannel = tmpchannel; + //} + } +} + + +static BOOLEAN +phy_SwChnlStepByStep( + IN PADAPTER Adapter, + IN u8 channel, + IN u8 *stage, + IN u8 *step, + OUT u32 *delay + ) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PCHANNEL_ACCESS_SETTING pChnlAccessSetting; + SwChnlCmd PreCommonCmd[MAX_PRECMD_CNT]; + u4Byte PreCommonCmdCnt; + SwChnlCmd PostCommonCmd[MAX_POSTCMD_CNT]; + u4Byte PostCommonCmdCnt; + SwChnlCmd RfDependCmd[MAX_RFDEPENDCMD_CNT]; + u4Byte RfDependCmdCnt; + SwChnlCmd *CurrentCmd; + u1Byte eRFPath; + u4Byte RfTXPowerCtrl; + BOOLEAN bAdjRfTXPowerCtrl = _FALSE; + + + RT_ASSERT((Adapter != NULL), ("Adapter should not be NULL\n")); +#if(MP_DRIVER != 1) + RT_ASSERT(IsLegalChannel(Adapter, channel), ("illegal channel: %d\n", channel)); +#endif + RT_ASSERT((pHalData != NULL), ("pHalData should not be NULL\n")); + + pChnlAccessSetting = &Adapter->MgntInfo.Info8185.ChannelAccessSetting; + RT_ASSERT((pChnlAccessSetting != NULL), ("pChnlAccessSetting should not be NULL\n")); + + //for(eRFPath = RF_PATH_A; eRFPath NumTotalRFPath; eRFPath++) + //for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) + //{ + // <1> Fill up pre common command. + PreCommonCmdCnt = 0; + phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, + CmdID_SetTxPowerLevel, 0, 0, 0); + phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, + CmdID_End, 0, 0, 0); + + // <2> Fill up post common command. + PostCommonCmdCnt = 0; + + phy_SetSwChnlCmdArray(PostCommonCmd, PostCommonCmdCnt++, MAX_POSTCMD_CNT, + CmdID_End, 0, 0, 0); + + // <3> Fill up RF dependent command. + RfDependCmdCnt = 0; + switch( pHalData->RFChipID ) + { + case RF_8225: + RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); + // 2008/09/04 MH Change channel. + if(channel==14) channel++; + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_RF_WriteReg, rZebra1_Channel, (0x10+channel-1), 10); + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_End, 0, 0, 0); + break; + + case RF_8256: + // TEST!! This is not the table for 8256!! + RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_RF_WriteReg, rRfChannel, channel, 10); + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_End, 0, 0, 0); + break; + + case RF_6052: + RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_RF_WriteReg, RF_CHNLBW, channel, 10); + phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, + CmdID_End, 0, 0, 0); + + break; + + case RF_8258: + break; + + // For FPGA two MAC verification + case RF_PSEUDO_11N: + return TRUE; + default: + RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); + return FALSE; + break; + } + + + do{ + switch(*stage) + { + case 0: + CurrentCmd=&PreCommonCmd[*step]; + break; + case 1: + CurrentCmd=&RfDependCmd[*step]; + break; + case 2: + CurrentCmd=&PostCommonCmd[*step]; + break; + } + + if(CurrentCmd->CmdID==CmdID_End) + { + if((*stage)==2) + { + return TRUE; + } + else + { + (*stage)++; + (*step)=0; + continue; + } + } + + switch(CurrentCmd->CmdID) + { + case CmdID_SetTxPowerLevel: + PHY_SetTxPowerLevel8192C(Adapter,channel); + break; + case CmdID_WritePortUlong: + PlatformEFIOWrite4Byte(Adapter, CurrentCmd->Para1, CurrentCmd->Para2); + break; + case CmdID_WritePortUshort: + PlatformEFIOWrite2Byte(Adapter, CurrentCmd->Para1, (u2Byte)CurrentCmd->Para2); + break; + case CmdID_WritePortUchar: + PlatformEFIOWrite1Byte(Adapter, CurrentCmd->Para1, (u1Byte)CurrentCmd->Para2); + break; + case CmdID_RF_WriteReg: // Only modify channel for the register now !!!!! + for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) + { +#if 1 + pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | CurrentCmd->Para2); + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); +#else + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, (CurrentCmd->Para2)); +#endif + } + break; + } + + break; + }while(TRUE); + //cosa }/*for(Number of RF paths)*/ + + (*delay)=CurrentCmd->msDelay; + (*step)++; + return FALSE; +#endif + return _TRUE; +} + + +static BOOLEAN +phy_SetSwChnlCmdArray( + SwChnlCmd* CmdTable, + u32 CmdTableIdx, + u32 CmdTableSz, + SwChnlCmdID CmdID, + u32 Para1, + u32 Para2, + u32 msDelay + ) +{ + SwChnlCmd* pCmd; + + if(CmdTable == NULL) + { + //RT_ASSERT(FALSE, ("phy_SetSwChnlCmdArray(): CmdTable cannot be NULL.\n")); + return _FALSE; + } + if(CmdTableIdx >= CmdTableSz) + { + //RT_ASSERT(FALSE, + // ("phy_SetSwChnlCmdArray(): Access invalid index, please check size of the table, CmdTableIdx:%ld, CmdTableSz:%ld\n", + // CmdTableIdx, CmdTableSz)); + return _FALSE; + } + + pCmd = CmdTable + CmdTableIdx; + pCmd->CmdID = CmdID; + pCmd->Para1 = Para1; + pCmd->Para2 = Para2; + pCmd->msDelay = msDelay; + + return _TRUE; +} + + +static void +phy_FinishSwChnlNow( // We should not call this function directly + IN PADAPTER Adapter, + IN u8 channel + ) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 delay; + + while(!phy_SwChnlStepByStep(Adapter,channel,&pHalData->SwChnlStage,&pHalData->SwChnlStep,&delay)) + { + if(delay>0) + rtw_mdelay_os(delay); + } +#endif +} + + + +// +// Description: +// Switch channel synchronously. Called by SwChnlByDelayHandler. +// +// Implemented by Bruce, 2008-02-14. +// The following procedure is operted according to SwChanlCallback8190Pci(). +// However, this procedure is performed synchronously which should be running under +// passive level. +// +VOID +PHY_SwChnlPhy8192C( // Only called during initialize + IN PADAPTER Adapter, + IN u8 channel + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //RT_TRACE(COMP_SCAN | COMP_RM, DBG_LOUD, ("==>PHY_SwChnlPhy8192S(), switch from channel %d to channel %d.\n", pHalData->CurrentChannel, channel)); + + // Cannot IO. + //if(RT_CANNOT_IO(Adapter)) + // return; + + // Channel Switching is in progress. + //if(pHalData->SwChnlInProgress) + // return; + + //return immediately if it is peudo-phy + if(pHalData->rf_chip == RF_PSEUDO_11N) + { + //pHalData->SwChnlInProgress=FALSE; + return; + } + + //pHalData->SwChnlInProgress = TRUE; + if( channel == 0) + channel = 1; + + pHalData->CurrentChannel=channel; + + //pHalData->SwChnlStage = 0; + //pHalData->SwChnlStep = 0; + + phy_FinishSwChnlNow(Adapter,channel); + + //pHalData->SwChnlInProgress = FALSE; +} + + +// +// Description: +// Configure H/W functionality to enable/disable Monitor mode. +// Note, because we possibly need to configure BB and RF in this function, +// so caller should in PASSIVE_LEVEL. 080118, by rcnjko. +// +VOID +PHY_SetMonitorMode8192C( + IN PADAPTER pAdapter, + IN BOOLEAN bEnableMonitorMode + ) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN bFilterOutNonAssociatedBSSID = FALSE; + + //2 Note: we may need to stop antenna diversity. + if(bEnableMonitorMode) + { + bFilterOutNonAssociatedBSSID = FALSE; + RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): enable monitor mode\n")); + + pHalData->bInMonitorMode = TRUE; + pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, TRUE, TRUE); + rtw_hal_set_hwreg(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); + } + else + { + bFilterOutNonAssociatedBSSID = TRUE; + RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): disable monitor mode\n")); + + pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, FALSE, TRUE); + pHalData->bInMonitorMode = FALSE; + rtw_hal_set_hwreg(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); + } +#endif +} + + +/*----------------------------------------------------------------------------- + * Function: PHYCheckIsLegalRfPath8190Pci() + * + * Overview: Check different RF type to execute legal judgement. If RF Path is illegal + * We will return false. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/15/2007 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +BOOLEAN +PHY_CheckIsLegalRfPath8192C( + IN PADAPTER pAdapter, + IN u32 eRFPath) +{ +// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN rtValue = _TRUE; + + // NOt check RF Path now.! +#if 0 + if (pHalData->RF_Type == RF_1T2R && eRFPath != RF_PATH_A) + { + rtValue = FALSE; + } + if (pHalData->RF_Type == RF_1T2R && eRFPath != RF_PATH_A) + { + + } +#endif + return rtValue; + +} /* PHY_CheckIsLegalRfPath8192C */ + +static VOID _PHY_SetRFPathSwitch( + IN PADAPTER pAdapter, + IN BOOLEAN bMain, + IN BOOLEAN is2T + ) +{ + u8 u1bTmp; + + if(!pAdapter->hw_init_completed) + { + u1bTmp = rtw_read8(pAdapter, REG_LEDCFG2) | BIT7; + rtw_write8(pAdapter, REG_LEDCFG2, u1bTmp); + //PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); + } + + if(is2T) + { + if(bMain) + PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); //92C_Path_A + else + PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); //BT + } + else + { + + if(bMain) + PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x2); //Main + else + PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x1); //Aux + } + +} + +//return value TRUE => Main; FALSE => Aux + +static BOOLEAN _PHY_QueryRFPathSwitch( + IN PADAPTER pAdapter, + IN BOOLEAN is2T + ) +{ +// if(is2T) +// return _TRUE; + + if(!pAdapter->hw_init_completed) + { + PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); + PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); + } + + if(is2T) + { + if(PHY_QueryBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) + return _TRUE; + else + return _FALSE; + } + else + { + if(PHY_QueryBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300) == 0x02) + return _TRUE; + else + return _FALSE; + } +} + + +static VOID +_PHY_DumpRFReg(IN PADAPTER pAdapter) +{ + u32 rfRegValue,rfRegOffset; + + //RTPRINT(FINIT, INIT_RF, ("PHY_DumpRFReg()====>\n")); + + for(rfRegOffset = 0x00;rfRegOffset<=0x30;rfRegOffset++){ + rfRegValue = PHY_QueryRFReg(pAdapter,RF_PATH_A, rfRegOffset, bMaskDWord); + //RTPRINT(FINIT, INIT_RF, (" 0x%02x = 0x%08x\n",rfRegOffset,rfRegValue)); + } + //RTPRINT(FINIT, INIT_RF, ("<===== PHY_DumpRFReg()\n")); +} + + +// +// Move from phycfg.c to gen.c to be code independent later +// +//-------------------------Move to other DIR later----------------------------*/ +#ifdef CONFIG_USB_HCI + +// +// Description: +// To dump all Tx FIFO LLT related link-list table. +// Added by Roger, 2009.03.10. +// +VOID +DumpBBDbgPort_92CU( + IN PADAPTER Adapter + ) +{ + + //RT_TRACE(COMP_SEND, DBG_WARNING, ("\n>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>\n")); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("BaseBand Debug Ports:\n")); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0000); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0803); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0a06); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0007); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100); + PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x000f0000); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100); + PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x00150000); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); + + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x800, PHY_QueryBBReg(Adapter, 0x0800, bMaskDWord))); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x900, PHY_QueryBBReg(Adapter, 0x0900, bMaskDWord))); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa00, PHY_QueryBBReg(Adapter, 0x0a00, bMaskDWord))); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa54, PHY_QueryBBReg(Adapter, 0x0a54, bMaskDWord))); + //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa58, PHY_QueryBBReg(Adapter, 0x0a58, bMaskDWord))); + +} +#endif + diff --git a/hal/rtl8188e_rf6052.c b/hal/rtl8188e_rf6052.c old mode 100644 new mode 100755 index 52dcce4..33f6397 --- a/hal/rtl8188e_rf6052.c +++ b/hal/rtl8188e_rf6052.c @@ -1,569 +1,1272 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -/****************************************************************************** - * - * - * Module: rtl8192c_rf6052.c ( Source C File) - * - * Note: Provide RF 6052 series relative API. - * - * Function: - * - * Export: - * - * Abbrev: - * - * History: - * Data Who Remark - * - * 09/25/2008 MHC Create initial version. - * 11/05/2008 MHC Add API for tw power setting. - * - * -******************************************************************************/ - -#define _RTL8188E_RF6052_C_ - -#include -#include - -#include - -/*---------------------------Define Local Constant---------------------------*/ -/* Define local structure for debug!!!!! */ -struct rf_shadow { - /* Shadow register value */ - u32 Value; - /* Compare or not flag */ - u8 Compare; - /* Record If it had ever modified unpredicted */ - u8 ErrorOrNot; - /* Recorver Flag */ - u8 Recorver; - /* */ - u8 Driver_Write; -}; - -/*---------------------------Define Local Constant---------------------------*/ - -/*------------------------Define global variable-----------------------------*/ - -/*------------------------Define local variable------------------------------*/ - -/*----------------------------------------------------------------------------- - * Function: RF_ChangeTxPath - * - * Overview: For RL6052, we must change some RF settign for 1T or 2T. - * - * Input: u16 DataRate 0x80-8f, 0x90-9f - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 09/25/2008 MHC Create Version 0. - * Firmwaer support the utility later. - * - *---------------------------------------------------------------------------*/ -void rtl8188e_RF_ChangeTxPath(struct adapter *Adapter, u16 DataRate) -{ -/* We do not support gain table change inACUT now !!!! Delete later !!! */ -} /* RF_ChangeTxPath */ - -/*----------------------------------------------------------------------------- - * Function: PHY_RF6052SetBandwidth() - * - * Overview: This function is called by SetBWModeCallback8190Pci() only - * - * Input: struct adapter *Adapter - * WIRELESS_BANDWIDTH_E Bandwidth 20M or 40M - * - * Output: NONE - * - * Return: NONE - * - * Note: For RF type 0222D - *---------------------------------------------------------------------------*/ -void rtl8188e_PHY_RF6052SetBandwidth(struct adapter *Adapter, - enum ht_channel_width Bandwidth) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - - switch (Bandwidth) { - case HT_CHANNEL_WIDTH_20: - pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10) | BIT(11)); - PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); - break; - case HT_CHANNEL_WIDTH_40: - pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10)); - PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); - break; - default: - break; - } -} - -/*----------------------------------------------------------------------------- - * Function: PHY_RF6052SetCckTxPower - * - * Overview: - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/05/2008 MHC Simulate 8192series.. - * - *---------------------------------------------------------------------------*/ - -void -rtl8188e_PHY_RF6052SetCckTxPower( - struct adapter *Adapter, - u8 *pPowerlevel) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - u32 TxAGC[2] = {0, 0}, tmpval = 0, pwrtrac_value; - bool TurboScanOff = false; - u8 idx1, idx2; - u8 *ptr; - u8 direction; - /* FOR CE ,must disable turbo scan */ - TurboScanOff = true; - - if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) { - TxAGC[RF_PATH_A] = 0x3f3f3f3f; - TxAGC[RF_PATH_B] = 0x3f3f3f3f; - - TurboScanOff = true;/* disable turbo scan */ - - if (TurboScanOff) { - for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) { - TxAGC[idx1] = - pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | - (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); - /* 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. */ - if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA) - TxAGC[idx1] = 0x20; - } - } - } else { - /* Driver dynamic Tx power shall not affect Tx power. - * It shall be determined by power training mechanism. -i * Currently, we cannot fully disable driver dynamic - * tx power mechanism because it is referenced by BT - * coexist mechanism. - * In the future, two mechanism shall be separated from - * each other and maintained independently. */ - if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) { - TxAGC[RF_PATH_A] = 0x10101010; - TxAGC[RF_PATH_B] = 0x10101010; - } else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) { - TxAGC[RF_PATH_A] = 0x00000000; - TxAGC[RF_PATH_B] = 0x00000000; - } else { - for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) { - TxAGC[idx1] = - pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | - (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); - } - if (pHalData->EEPROMRegulatory == 0) { - tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) + - (pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8); - TxAGC[RF_PATH_A] += tmpval; - - tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) + - (pHalData->MCSTxPowerLevelOriginalOffset[0][15]<<24); - TxAGC[RF_PATH_B] += tmpval; - } - } - } - for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) { - ptr = (u8 *)(&(TxAGC[idx1])); - for (idx2 = 0; idx2 < 4; idx2++) { - if (*ptr > RF6052_MAX_TX_PWR) - *ptr = RF6052_MAX_TX_PWR; - ptr++; - } - } - ODM_TxPwrTrackAdjust88E(&pHalData->odmpriv, 1, &direction, &pwrtrac_value); - - if (direction == 1) { - /* Increase TX power */ - TxAGC[0] += pwrtrac_value; - TxAGC[1] += pwrtrac_value; - } else if (direction == 2) { - /* Decrease TX power */ - TxAGC[0] -= pwrtrac_value; - TxAGC[1] -= pwrtrac_value; - } - - /* rf-A cck tx power */ - tmpval = TxAGC[RF_PATH_A]&0xff; - PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval); - tmpval = TxAGC[RF_PATH_A]>>8; - PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); - - /* rf-B cck tx power */ - tmpval = TxAGC[RF_PATH_B]>>24; - PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval); - tmpval = TxAGC[RF_PATH_B]&0x00ffffff; - PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); -} /* PHY_RF6052SetCckTxPower */ - -/* */ -/* powerbase0 for OFDM rates */ -/* powerbase1 for HT MCS rates */ -/* */ -static void getpowerbase88e(struct adapter *Adapter, u8 *pPowerLevelOFDM, - u8 *pPowerLevelBW20, u8 *pPowerLevelBW40, u8 Channel, u32 *OfdmBase, u32 *MCSBase) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u32 powerBase0, powerBase1; - u8 i, powerlevel[2]; - - for (i = 0; i < 2; i++) { - powerBase0 = pPowerLevelOFDM[i]; - - powerBase0 = (powerBase0<<24) | (powerBase0<<16) | (powerBase0<<8) | powerBase0; - *(OfdmBase+i) = powerBase0; - } - for (i = 0; i < pHalData->NumTotalRFPath; i++) { - /* Check HT20 to HT40 diff */ - if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) - powerlevel[i] = pPowerLevelBW20[i]; - else - powerlevel[i] = pPowerLevelBW40[i]; - powerBase1 = powerlevel[i]; - powerBase1 = (powerBase1<<24) | (powerBase1<<16) | (powerBase1<<8) | powerBase1; - *(MCSBase+i) = powerBase1; - } -} -static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel, - u8 index, u32 *powerBase0, u32 *powerBase1, - u32 *pOutWriteVal) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit; - s8 pwr_diff = 0; - u32 writeVal, customer_limit, rf; - u8 Regulatory = pHalData->EEPROMRegulatory; - - /* Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate */ - - for (rf = 0; rf < 2; rf++) { - switch (Regulatory) { - case 0: /* Realtek better performance */ - /* increase power diff defined by Realtek for large power */ - chnlGroup = 0; - writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] + - ((index < 2) ? powerBase0[rf] : powerBase1[rf]); - break; - case 1: /* Realtek regulatory */ - /* increase power diff defined by Realtek for regulatory */ - if (pHalData->pwrGroupCnt == 1) - chnlGroup = 0; - if (pHalData->pwrGroupCnt >= pHalData->PGMaxGroup) { - if (Channel < 3) /* Channel 1-2 */ - chnlGroup = 0; - else if (Channel < 6) /* Channel 3-5 */ - chnlGroup = 1; - else if (Channel < 9) /* Channel 6-8 */ - chnlGroup = 2; - else if (Channel < 12) /* Channel 9-11 */ - chnlGroup = 3; - else if (Channel < 14) /* Channel 12-13 */ - chnlGroup = 4; - else if (Channel == 14) /* Channel 14 */ - chnlGroup = 5; - } - writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] + - ((index < 2) ? powerBase0[rf] : powerBase1[rf]); - break; - case 2: /* Better regulatory */ - /* don't increase any power diff */ - writeVal = ((index < 2) ? powerBase0[rf] : powerBase1[rf]); - break; - case 3: /* Customer defined power diff. */ - /* increase power diff defined by customer. */ - chnlGroup = 0; - - if (index < 2) - pwr_diff = pHalData->TxPwrLegacyHtDiff[rf][Channel-1]; - else if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) - pwr_diff = pHalData->TxPwrHt20Diff[rf][Channel-1]; - - if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) - customer_pwr_limit = pHalData->PwrGroupHT40[rf][Channel-1]; - else - customer_pwr_limit = pHalData->PwrGroupHT20[rf][Channel-1]; - - if (pwr_diff >= customer_pwr_limit) - pwr_diff = 0; - else - pwr_diff = customer_pwr_limit - pwr_diff; - - for (i = 0; i < 4; i++) { - pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)]&(0x7f<<(i*8)))>>(i*8)); - - if (pwr_diff_limit[i] > pwr_diff) - pwr_diff_limit[i] = pwr_diff; - } - customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) | - (pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]); - writeVal = customer_limit + ((index < 2) ? powerBase0[rf] : powerBase1[rf]); - break; - default: - chnlGroup = 0; - writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] + - ((index < 2) ? powerBase0[rf] : powerBase1[rf]); - break; - } -/* 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. */ -/* Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. */ -/* In the future, two mechanism shall be separated from each other and maintained independently. Thanks for Lanhsin's reminder. */ - /* 92d do not need this */ - if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) - writeVal = 0x14141414; - else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) - writeVal = 0x00000000; - - /* 20100628 Joseph: High power mode for BT-Coexist mechanism. */ - /* This mechanism is only applied when Driver-Highpower-Mechanism is OFF. */ - if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1) - writeVal = writeVal - 0x06060606; - else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2) - writeVal = writeVal; - *(pOutWriteVal+rf) = writeVal; - } -} -static void writeOFDMPowerReg88E(struct adapter *Adapter, u8 index, u32 *pValue) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u16 regoffset_a[6] = { - rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24, - rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04, - rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12}; - u16 regoffset_b[6] = { - rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24, - rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04, - rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12}; - u8 i, rf, pwr_val[4]; - u32 writeVal; - u16 regoffset; - - for (rf = 0; rf < 2; rf++) { - writeVal = pValue[rf]; - for (i = 0; i < 4; i++) { - pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8)); - if (pwr_val[i] > RF6052_MAX_TX_PWR) - pwr_val[i] = RF6052_MAX_TX_PWR; - } - writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) | (pwr_val[1]<<8) | pwr_val[0]; - - if (rf == 0) - regoffset = regoffset_a[index]; - else - regoffset = regoffset_b[index]; - - PHY_SetBBReg(Adapter, regoffset, bMaskDWord, writeVal); - - /* 201005115 Joseph: Set Tx Power diff for Tx power training mechanism. */ - if (((pHalData->rf_type == RF_2T2R) && - (regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_B_Mcs15_Mcs12)) || - ((pHalData->rf_type != RF_2T2R) && - (regoffset == rTxAGC_A_Mcs07_Mcs04 || regoffset == rTxAGC_B_Mcs07_Mcs04))) { - writeVal = pwr_val[3]; - if (regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_A_Mcs07_Mcs04) - regoffset = 0xc90; - if (regoffset == rTxAGC_B_Mcs15_Mcs12 || regoffset == rTxAGC_B_Mcs07_Mcs04) - regoffset = 0xc98; - for (i = 0; i < 3; i++) { - if (i != 2) - writeVal = (writeVal > 8) ? (writeVal-8) : 0; - else - writeVal = (writeVal > 6) ? (writeVal-6) : 0; - rtw_write8(Adapter, (u32)(regoffset+i), (u8)writeVal); - } - } - } -} - -/*----------------------------------------------------------------------------- - * Function: PHY_RF6052SetOFDMTxPower - * - * Overview: For legacy and HY OFDM, we must read EEPROM TX power index for - * different channel and read original value in TX power register area from - * 0xe00. We increase offset and original value to be correct tx pwr. - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 11/05/2008 MHC Simulate 8192 series method. - * 01/06/2009 MHC 1. Prevent Path B tx power overflow or underflow dure to - * A/B pwr difference or legacy/HT pwr diff. - * 2. We concern with path B legacy/HT OFDM difference. - * 01/22/2009 MHC Support new EPRO format from SD3. - * - *---------------------------------------------------------------------------*/ - -void -rtl8188e_PHY_RF6052SetOFDMTxPower( - struct adapter *Adapter, - u8 *pPowerLevelOFDM, - u8 *pPowerLevelBW20, - u8 *pPowerLevelBW40, - u8 Channel) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u32 writeVal[2], powerBase0[2], powerBase1[2], pwrtrac_value; - u8 direction; - u8 index = 0; - - getpowerbase88e(Adapter, pPowerLevelOFDM, pPowerLevelBW20, pPowerLevelBW40, Channel, &powerBase0[0], &powerBase1[0]); - - /* 2012/04/23 MH According to power tracking value, we need to revise OFDM tx power. */ - /* This is ued to fix unstable power tracking mode. */ - ODM_TxPwrTrackAdjust88E(&pHalData->odmpriv, 0, &direction, &pwrtrac_value); - - for (index = 0; index < 6; index++) { - get_rx_power_val_by_reg(Adapter, Channel, index, - &powerBase0[0], &powerBase1[0], - &writeVal[0]); - - if (direction == 1) { - writeVal[0] += pwrtrac_value; - writeVal[1] += pwrtrac_value; - } else if (direction == 2) { - writeVal[0] -= pwrtrac_value; - writeVal[1] -= pwrtrac_value; - } - writeOFDMPowerReg88E(Adapter, index, &writeVal[0]); - } -} - -static int phy_RF6052_Config_ParaFile(struct adapter *Adapter) -{ - struct bb_reg_def *pPhyReg; - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - u32 u4RegValue = 0; - u8 eRFPath; - int rtStatus = _SUCCESS; - - /* 3----------------------------------------------------------------- */ - /* 3 <2> Initialize RF */ - /* 3----------------------------------------------------------------- */ - for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) { - pPhyReg = &pHalData->PHYRegDef[eRFPath]; - - /*----Store original RFENV control type----*/ - switch (eRFPath) { - case RF_PATH_A: - case RF_PATH_C: - u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); - break; - case RF_PATH_B: - case RF_PATH_D: - u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16); - break; - } - /*----Set RF_ENV enable----*/ - PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); - rtw_udelay_os(1);/* PlatformStallExecution(1); */ - - /*----Set RF_ENV output high----*/ - PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); - rtw_udelay_os(1);/* PlatformStallExecution(1); */ - - /* Set bit number of Address and Data for RF register */ - PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */ - rtw_udelay_os(1);/* PlatformStallExecution(1); */ - - PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */ - rtw_udelay_os(1);/* PlatformStallExecution(1); */ - - /*----Initialize RF fom connfiguration file----*/ - switch (eRFPath) { - case RF_PATH_A: - if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, (enum ODM_RF_RADIO_PATH)eRFPath, (enum ODM_RF_RADIO_PATH)eRFPath)) - rtStatus = _FAIL; - break; - case RF_PATH_B: - if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, (enum ODM_RF_RADIO_PATH)eRFPath, (enum ODM_RF_RADIO_PATH)eRFPath)) - rtStatus = _FAIL; - break; - case RF_PATH_C: - break; - case RF_PATH_D: - break; - } - /*----Restore RFENV control type----*/; - switch (eRFPath) { - case RF_PATH_A: - case RF_PATH_C: - PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); - break; - case RF_PATH_B: - case RF_PATH_D: - PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); - break; - } - if (rtStatus != _SUCCESS) - goto phy_RF6052_Config_ParaFile_Fail; - } - return rtStatus; - -phy_RF6052_Config_ParaFile_Fail: - return rtStatus; -} - -int PHY_RF6052_Config8188E(struct adapter *Adapter) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); - int rtStatus = _SUCCESS; - - /* */ - /* Initialize general global value */ - /* */ - /* TODO: Extend RF_PATH_C and RF_PATH_D in the future */ - if (pHalData->rf_type == RF_1T1R) - pHalData->NumTotalRFPath = 1; - else - pHalData->NumTotalRFPath = 2; - - /* */ - /* Config BB and RF */ - /* */ - rtStatus = phy_RF6052_Config_ParaFile(Adapter); - return rtStatus; -} +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +/****************************************************************************** + * + * + * Module: rtl8192c_rf6052.c ( Source C File) + * + * Note: Provide RF 6052 series relative API. + * + * Function: + * + * Export: + * + * Abbrev: + * + * History: + * Data Who Remark + * + * 09/25/2008 MHC Create initial version. + * 11/05/2008 MHC Add API for tw power setting. + * + * +******************************************************************************/ + +#define _RTL8188E_RF6052_C_ + +#include +#include +#include +#include + +#include + +/*---------------------------Define Local Constant---------------------------*/ +// Define local structure for debug!!!!! +typedef struct RF_Shadow_Compare_Map { + // Shadow register value + u32 Value; + // Compare or not flag + u8 Compare; + // Record If it had ever modified unpredicted + u8 ErrorOrNot; + // Recorver Flag + u8 Recorver; + // + u8 Driver_Write; +}RF_SHADOW_T; +/*---------------------------Define Local Constant---------------------------*/ + + +/*------------------------Define global variable-----------------------------*/ +/*------------------------Define global variable-----------------------------*/ + + +/*------------------------Define local variable------------------------------*/ +// 2008/11/20 MH For Debug only, RF +//static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG] = {0}; +static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG]; +/*------------------------Define local variable------------------------------*/ + + +/*----------------------------------------------------------------------------- + * Function: RF_ChangeTxPath + * + * Overview: For RL6052, we must change some RF settign for 1T or 2T. + * + * Input: u2Byte DataRate // 0x80-8f, 0x90-9f + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 09/25/2008 MHC Create Version 0. + * Firmwaer support the utility later. + * + *---------------------------------------------------------------------------*/ +void rtl8188e_RF_ChangeTxPath( IN PADAPTER Adapter, + IN u16 DataRate) +{ +// We do not support gain table change inACUT now !!!! Delete later !!! +#if 0//(RTL92SE_FPGA_VERIFY == 0) + static u1Byte RF_Path_Type = 2; // 1 = 1T 2= 2T + static u4Byte tx_gain_tbl1[6] + = {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100}; + static u4Byte tx_gain_tbl2[6] + = {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030}; + u1Byte i; + + if (RF_Path_Type == 2 && (DataRate&0xF) <= 0x7) + { + // Set TX SYNC power G2G3 loop filter + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x0f000); + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TXPA_G3, bRFRegOffsetMask, 0xeacf1); + + // Change TX AGC gain table + for (i = 0; i < 6; i++) + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl1[i]); + + // Set PA to high value + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x01e39); + } + else if (RF_Path_Type == 1 && (DataRate&0xF) >= 0x8) + { + // Set TX SYNC power G2G3 loop filter + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x04440); + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TXPA_G3, bRFRegOffsetMask, 0xea4f1); + + // Change TX AGC gain table + for (i = 0; i < 6; i++) + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl2[i]); + + // Set PA low gain + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x01e19); + } +#endif + +} /* RF_ChangeTxPath */ + + +/*----------------------------------------------------------------------------- + * Function: PHY_RF6052SetBandwidth() + * + * Overview: This function is called by SetBWModeCallback8190Pci() only + * + * Input: PADAPTER Adapter + * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M + * + * Output: NONE + * + * Return: NONE + * + * Note: For RF type 0222D + *---------------------------------------------------------------------------*/ +VOID +rtl8188e_PHY_RF6052SetBandwidth( + IN PADAPTER Adapter, + IN HT_CHANNEL_WIDTH Bandwidth) //20M or 40M +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + switch(Bandwidth) + { + case HT_CHANNEL_WIDTH_20: + pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10) | BIT(11)); + PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); + break; + + case HT_CHANNEL_WIDTH_40: + pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff)| BIT(10)); + PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); + break; + + default: + //RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth )); + break; + } + +} + + +/*----------------------------------------------------------------------------- + * Function: PHY_RF6052SetCckTxPower + * + * Overview: + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/05/2008 MHC Simulate 8192series.. + * + *---------------------------------------------------------------------------*/ + +VOID +rtl8188e_PHY_RF6052SetCckTxPower( + IN PADAPTER Adapter, + IN u8* pPowerlevel) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + //PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; + u32 TxAGC[2]={0, 0}, tmpval=0,pwrtrac_value; + BOOLEAN TurboScanOff = _FALSE; + u8 idx1, idx2; + u8* ptr; + u8 direction; + //FOR CE ,must disable turbo scan + TurboScanOff = _TRUE; + + + if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS) + { + TxAGC[RF_PATH_A] = 0x3f3f3f3f; + TxAGC[RF_PATH_B] = 0x3f3f3f3f; + + TurboScanOff = _TRUE;//disable turbo scan + + if(TurboScanOff) + { + for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++) + { + TxAGC[idx1] = + pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | + (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); +#ifdef CONFIG_USB_HCI + // 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. + if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA) + TxAGC[idx1] = 0x20; +#endif + } + } + } + else + { +// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. +// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. +// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. + if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) + { + TxAGC[RF_PATH_A] = 0x10101010; + TxAGC[RF_PATH_B] = 0x10101010; + } + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) + { + TxAGC[RF_PATH_A] = 0x00000000; + TxAGC[RF_PATH_B] = 0x00000000; + } + else + { + for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++) + { + TxAGC[idx1] = + pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | + (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); + } + + if(pHalData->EEPROMRegulatory==0) + { + tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) + + (pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8); + TxAGC[RF_PATH_A] += tmpval; + + tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) + + (pHalData->MCSTxPowerLevelOriginalOffset[0][15]<<24); + TxAGC[RF_PATH_B] += tmpval; + } + } + } + + + ODM_TxPwrTrackAdjust88E(&pHalData->odmpriv, 1, &direction, &pwrtrac_value); + //printk("ODM_TxPwrTrackAdjust88E => direction:%02x, pwrtrac_value:%d \n", direction, pwrtrac_value); + //printk(" ==> TxAGC:0x%08x \n",TxAGC[0] ); + + if (direction == 1) // Increase TX pwoer + { + TxAGC[0] += pwrtrac_value; + TxAGC[1] += pwrtrac_value; + + } + else if (direction == 2) // Decrease TX pwoer + { + TxAGC[0] -= pwrtrac_value; + TxAGC[1] -= pwrtrac_value; + } + + for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++) + { + ptr = (u8*)(&(TxAGC[idx1])); + for(idx2=0; idx2<4; idx2++) + { + if(*ptr > RF6052_MAX_TX_PWR) + *ptr = RF6052_MAX_TX_PWR; + ptr++; + } + } + //printk(" ==> TxAGC:0x%08x \n",TxAGC[0] ); + + // rf-A cck tx power + tmpval = TxAGC[RF_PATH_A]&0xff; + PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval); + //printk("CCK PWR 1M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_A_CCK1_Mcs32); + + + tmpval = TxAGC[RF_PATH_A]>>8; + PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); + //printk("CCK PWR 2~11M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11); + +/* + // rf-B cck tx power + tmpval = TxAGC[RF_PATH_B]>>24; + PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval); + //printk("CCK PWR 11M (rf-B) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11); + tmpval = TxAGC[RF_PATH_B]&0x00ffffff; + PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); + //printk("CCK PWR 1~5.5M (rf-B) = 0x%x (reg 0x%x)\n",tmpval, rTxAGC_B_CCK1_55_Mcs32); +*/ +} /* PHY_RF6052SetCckTxPower */ + +#if 0 +// +// powerbase0 for OFDM rates +// powerbase1 for HT MCS rates +// +static void getPowerBase( + IN PADAPTER Adapter, + IN u8* pPowerLevel, + IN u8 Channel, + IN OUT u32* OfdmBase, + IN OUT u32* MCSBase + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 powerBase0, powerBase1; + u8 Legacy_pwrdiff=0, HT20_pwrdiff=0; + u8 i, powerlevel[2]; + + for(i=0; i<2; i++) + { + powerlevel[i] = pPowerLevel[i]; + Legacy_pwrdiff = pHalData->TxPwrLegacyHtDiff[i][Channel-1]; + powerBase0 = powerlevel[i] + Legacy_pwrdiff; + + powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0; + *(OfdmBase+i) = powerBase0; + //RTPRINT(FPHY, PHY_TXPWR, (" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i))); + } + + for(i=0; i<2; i++) + { + //Check HT20 to HT40 diff + if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) + { + HT20_pwrdiff = pHalData->TxPwrHt20Diff[i][Channel-1]; + powerlevel[i] += HT20_pwrdiff; + } + powerBase1 = powerlevel[i]; + powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1; + *(MCSBase+i) = powerBase1; + //RTPRINT(FPHY, PHY_TXPWR, (" [MCS power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(MCSBase+i))); + } +} +#endif +// +// powerbase0 for OFDM rates +// powerbase1 for HT MCS rates +// +void getPowerBase88E( + IN PADAPTER Adapter, + IN u8* pPowerLevelOFDM, + IN u8* pPowerLevelBW20, + IN u8* pPowerLevelBW40, + IN u8 Channel, + IN OUT u32* OfdmBase, + IN OUT u32* MCSBase + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 powerBase0, powerBase1; + u8 Legacy_pwrdiff=0; + s8 HT20_pwrdiff=0; + u8 i, powerlevel[2]; + + for(i=0; i<2; i++) + { + powerBase0 = pPowerLevelOFDM[i]; + + powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0; + *(OfdmBase+i) = powerBase0; + //DBG_871X(" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i)); + } + + for(i=0; iNumTotalRFPath; i++) + { + //Check HT20 to HT40 diff + if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) + { + powerlevel[i] = pPowerLevelBW20[i]; + } + else + { + powerlevel[i] = pPowerLevelBW40[i]; + } + powerBase1 = powerlevel[i]; + powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1; + *(MCSBase+i) = powerBase1; + //DBG_871X(" [MCS power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(MCSBase+i)); + } +} +#if 0 +static void getTxPowerWriteValByRegulatory( + IN PADAPTER Adapter, + IN u8 Channel, + IN u8 index, + IN u32* powerBase0, + IN u32* powerBase1, + OUT u32* pOutWriteVal + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + u8 i, chnlGroup, pwr_diff_limit[4]; + u32 writeVal, customer_limit, rf; + + // + // Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate + // + for(rf=0; rf<2; rf++) + { + switch(pHalData->EEPROMRegulatory) + { + case 0: // Realtek better performance + // increase power diff defined by Realtek for large power + chnlGroup = 0; + //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", + // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); + writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + case 1: // Realtek regulatory + // increase power diff defined by Realtek for regulatory + { + if(pHalData->pwrGroupCnt == 1) + chnlGroup = 0; + if(pHalData->pwrGroupCnt >= 3) + { + if(Channel <= 3) + chnlGroup = 0; + else if(Channel >= 4 && Channel <= 9) + chnlGroup = 1; + else if(Channel > 9) + chnlGroup = 2; + + if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) + chnlGroup++; + else + chnlGroup+=4; + } + //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", + //chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); + writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("Realtek regulatory, 20MHz, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + } + break; + case 2: // Better regulatory + // don't increase any power diff + writeVal = ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("Better regulatory, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + case 3: // Customer defined power diff. + // increase power diff defined by customer. + chnlGroup = 0; + //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", + // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); + + if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) + { + //RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 40MHz rf(%c) = 0x%x\n", + // ((rf==0)?'A':'B'), pHalData->PwrGroupHT40[rf][Channel-1])); + } + else + { + //RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 20MHz rf(%c) = 0x%x\n", + // ((rf==0)?'A':'B'), pHalData->PwrGroupHT20[rf][Channel-1])); + } + for (i=0; i<4; i++) + { + pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8)); + if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) + { + if(pwr_diff_limit[i] > pHalData->PwrGroupHT40[rf][Channel-1]) + pwr_diff_limit[i] = pHalData->PwrGroupHT40[rf][Channel-1]; + } + else + { + if(pwr_diff_limit[i] > pHalData->PwrGroupHT20[rf][Channel-1]) + pwr_diff_limit[i] = pHalData->PwrGroupHT20[rf][Channel-1]; + } + } + customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) | + (pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]); + //RTPRINT(FPHY, PHY_TXPWR, ("Customer's limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_limit)); + + writeVal = customer_limit + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("Customer, writeVal rf(%c)= 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + default: + chnlGroup = 0; + writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + } + +// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. +// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. +// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. + + if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) + writeVal = 0x14141414; + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) + writeVal = 0x00000000; + + + // 20100628 Joseph: High power mode for BT-Coexist mechanism. + // This mechanism is only applied when Driver-Highpower-Mechanism is OFF. + if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1) + { + //RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n")); + writeVal = writeVal - 0x06060606; + } + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2) + { + //RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n")); + writeVal = writeVal; + } + *(pOutWriteVal+rf) = writeVal; + } +} +#endif +void getTxPowerWriteValByRegulatory88E( + IN PADAPTER Adapter, + IN u8 Channel, + IN u8 index, + IN u32* powerBase0, + IN u32* powerBase1, + OUT u32* pOutWriteVal + ) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + u1Byte i, chnlGroup=0, pwr_diff_limit[4], customer_pwr_limit; + s1Byte pwr_diff=0; + u4Byte writeVal, customer_limit, rf; + u1Byte Regulatory = pHalData->EEPROMRegulatory; + + // + // Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate + // +#if 0 // (INTEL_PROXIMITY_SUPPORT == 1) + if(pMgntInfo->IntelProximityModeInfo.PowerOutput > 0) + Regulatory = 2; +#endif + + for(rf=0; rf<2; rf++) + { + switch(Regulatory) + { + case 0: // Realtek better performance + // increase power diff defined by Realtek for large power + chnlGroup = 0; + //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", + // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); + writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + case 1: // Realtek regulatory + // increase power diff defined by Realtek for regulatory + { + if(pHalData->pwrGroupCnt == 1) + chnlGroup = 0; + //if(pHalData->pwrGroupCnt >= pHalData->PGMaxGroup) + { + if (Channel < 3) // Chanel 1-2 + chnlGroup = 0; + else if (Channel < 6) // Channel 3-5 + chnlGroup = 1; + else if(Channel <9) // Channel 6-8 + chnlGroup = 2; + else if(Channel <12) // Channel 9-11 + chnlGroup = 3; + else if(Channel <14) // Channel 12-13 + chnlGroup = 4; + else if(Channel ==14) // Channel 14 + chnlGroup = 4; + + if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) + chnlGroup++; + else + chnlGroup+=6; + +/* + if(Channel <= 3) + chnlGroup = 0; + else if(Channel >= 4 && Channel <= 9) + chnlGroup = 1; + else if(Channel > 9) + chnlGroup = 2; + + + if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) + chnlGroup++; + else + chnlGroup+=4; +*/ + } + //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", + //chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); + writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("Realtek regulatory, 20MHz, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + } + break; + case 2: // Better regulatory + // don't increase any power diff + writeVal = ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("Better regulatory, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + case 3: // Customer defined power diff. + // increase power diff defined by customer. + chnlGroup = 0; + //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", + // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); + + /* + if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40) + { + RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 40MHz rf(%c) = 0x%x\n", + ((rf==0)?'A':'B'), pHalData->PwrGroupHT40[rf][Channel-1])); + } + else + { + RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 20MHz rf(%c) = 0x%x\n", + ((rf==0)?'A':'B'), pHalData->PwrGroupHT20[rf][Channel-1])); + }*/ + + if(index < 2) + pwr_diff = pHalData->TxPwrLegacyHtDiff[rf][Channel-1]; + else if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) + pwr_diff = pHalData->TxPwrHt20Diff[rf][Channel-1]; + + //RTPRINT(FPHY, PHY_TXPWR, ("power diff rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), pwr_diff)); + + if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) + customer_pwr_limit = pHalData->PwrGroupHT40[rf][Channel-1]; + else + customer_pwr_limit = pHalData->PwrGroupHT20[rf][Channel-1]; + + //RTPRINT(FPHY, PHY_TXPWR, ("customer pwr limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_pwr_limit)); + + if(pwr_diff >= customer_pwr_limit) + pwr_diff = 0; + else + pwr_diff = customer_pwr_limit - pwr_diff; + + for (i=0; i<4; i++) + { + pwr_diff_limit[i] = (u1Byte)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8)); + + if(pwr_diff_limit[i] > pwr_diff) + pwr_diff_limit[i] = pwr_diff; + } + customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) | + (pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]); + //RTPRINT(FPHY, PHY_TXPWR, ("Customer's limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_limit)); + writeVal = customer_limit + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("Customer, writeVal rf(%c)= 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + default: + chnlGroup = 0; + writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + + ((index<2)?powerBase0[rf]:powerBase1[rf]); + //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); + break; + } + +// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. +// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. +// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. + //92d do not need this + if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) + writeVal = 0x14141414; + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) + writeVal = 0x00000000; + + // 20100628 Joseph: High power mode for BT-Coexist mechanism. + // This mechanism is only applied when Driver-Highpower-Mechanism is OFF. + if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1) + { + //RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n")); + writeVal = writeVal - 0x06060606; + } + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2) + { + //RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n")); + writeVal = writeVal ; + } + /* + if(pMgntInfo->bDisableTXPowerByRate) + { + // add for OID_RT_11N_TX_POWER_BY_RATE ,disable tx powre change by rate + writeVal = 0x2c2c2c2c; + } + */ + *(pOutWriteVal+rf) = writeVal; + } +} + +static void writeOFDMPowerReg88E( + IN PADAPTER Adapter, + IN u8 index, + IN u32* pValue + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u16 RegOffset_A[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24, + rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04, + rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12}; + u16 RegOffset_B[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24, + rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04, + rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12}; + u8 i, rf, pwr_val[4]; + u32 writeVal; + u16 RegOffset; + + for(rf=0; rf<2; rf++) + { + writeVal = pValue[rf]; + for(i=0; i<4; i++) + { + pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8)); + if (pwr_val[i] > RF6052_MAX_TX_PWR) + pwr_val[i] = RF6052_MAX_TX_PWR; + } + writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) |(pwr_val[1]<<8) |pwr_val[0]; + + if(rf == 0) + RegOffset = RegOffset_A[index]; + else + RegOffset = RegOffset_B[index]; + + PHY_SetBBReg(Adapter, RegOffset, bMaskDWord, writeVal); + //printk("Set OFDM tx pwr- 0x%x = %08x\n", RegOffset, writeVal); + + // 201005115 Joseph: Set Tx Power diff for Tx power training mechanism. + if(((pHalData->rf_type == RF_2T2R) && + (RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs15_Mcs12))|| + ((pHalData->rf_type != RF_2T2R) && + (RegOffset == rTxAGC_A_Mcs07_Mcs04 || RegOffset == rTxAGC_B_Mcs07_Mcs04)) ) + { + writeVal = pwr_val[3]; + if(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_A_Mcs07_Mcs04) + RegOffset = 0xc90; + if(RegOffset == rTxAGC_B_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs07_Mcs04) + RegOffset = 0xc98; + for(i=0; i<3; i++) + { + if(i!=2) + writeVal = (writeVal>8)?(writeVal-8):0; + else + writeVal = (writeVal>6)?(writeVal-6):0; + rtw_write8(Adapter, (u32)(RegOffset+i), (u8)writeVal); + } + } + } +} + + +/*----------------------------------------------------------------------------- + * Function: PHY_RF6052SetOFDMTxPower + * + * Overview: For legacy and HY OFDM, we must read EEPROM TX power index for + * different channel and read original value in TX power register area from + * 0xe00. We increase offset and original value to be correct tx pwr. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/05/2008 MHC Simulate 8192 series method. + * 01/06/2009 MHC 1. Prevent Path B tx power overflow or underflow dure to + * A/B pwr difference or legacy/HT pwr diff. + * 2. We concern with path B legacy/HT OFDM difference. + * 01/22/2009 MHC Support new EPRO format from SD3. + * + *---------------------------------------------------------------------------*/ + +VOID +rtl8188e_PHY_RF6052SetOFDMTxPower( + IN PADAPTER Adapter, + IN u8* pPowerLevelOFDM, + IN u8* pPowerLevelBW20, + IN u8* pPowerLevelBW40, + IN u8 Channel) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 writeVal[2], powerBase0[2], powerBase1[2], pwrtrac_value; + u8 direction; + u8 index = 0; + + + //DBG_871X("PHY_RF6052SetOFDMTxPower, channel(%d) \n", Channel); + + getPowerBase88E(Adapter, pPowerLevelOFDM,pPowerLevelBW20,pPowerLevelBW40, Channel, &powerBase0[0], &powerBase1[0]); + + // + // 2012/04/23 MH According to power tracking value, we need to revise OFDM tx power. + // This is ued to fix unstable power tracking mode. + // + ODM_TxPwrTrackAdjust88E(&pHalData->odmpriv, 0, &direction, &pwrtrac_value); + + for(index=0; index<6; index++) + { + getTxPowerWriteValByRegulatory88E(Adapter, Channel, index, + &powerBase0[0], &powerBase1[0], &writeVal[0]); + + if (direction == 1) + { + writeVal[0] += pwrtrac_value; + writeVal[1] += pwrtrac_value; + } + else if (direction == 2) + { + writeVal[0] -= pwrtrac_value; + writeVal[1] -= pwrtrac_value; + } + + writeOFDMPowerReg88E(Adapter, index, &writeVal[0]); + } +} + + +static VOID +phy_RF6052_Config_HardCode( + IN PADAPTER Adapter + ) +{ + + // Set Default Bandwidth to 20M + //Adapter->HalFunc .SetBWModeHandler(Adapter, HT_CHANNEL_WIDTH_20); + + // TODO: Set Default Channel to channel one for RTL8225 + +} + +static int +phy_RF6052_Config_ParaFile( + IN PADAPTER Adapter + ) +{ + u32 u4RegValue; + u8 eRFPath; + BB_REGISTER_DEFINITION_T *pPhyReg; + + int rtStatus = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + static char sz88eRadioAFile[] = RTL8188E_PHY_RADIO_A; + static char sz88eRadioBFile[] = RTL8188E_PHY_RADIO_B; + char *pszRadioAFile, *pszRadioBFile; + + + + pszRadioAFile = sz88eRadioAFile; + pszRadioBFile = sz88eRadioBFile; + + + //3//----------------------------------------------------------------- + //3// <2> Initialize RF + //3//----------------------------------------------------------------- + //for(eRFPath = RF_PATH_A; eRFPath NumTotalRFPath; eRFPath++) + for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) + { + + pPhyReg = &pHalData->PHYRegDef[eRFPath]; + + /*----Store original RFENV control type----*/ + switch(eRFPath) + { + case RF_PATH_A: + case RF_PATH_C: + u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); + break; + case RF_PATH_B : + case RF_PATH_D: + u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16); + break; + } + + /*----Set RF_ENV enable----*/ + PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); + rtw_udelay_os(1);//PlatformStallExecution(1); + + /*----Set RF_ENV output high----*/ + PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); + rtw_udelay_os(1);//PlatformStallExecution(1); + + /* Set bit number of Address and Data for RF register */ + PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255 + rtw_udelay_os(1);//PlatformStallExecution(1); + + PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255 + rtw_udelay_os(1);//PlatformStallExecution(1); + + /*----Initialize RF fom connfiguration file----*/ + switch(eRFPath) + { + case RF_PATH_A: +#ifdef CONFIG_EMBEDDED_FWIMG + #ifdef CONFIG_PHY_SETTING_WITH_ODM + if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath)) + rtStatus= _FAIL; + #else + rtStatus= rtl8188e_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath); + #endif//#ifdef CONFIG_PHY_SETTING_WITH_ODM +#else + rtStatus = rtl8188e_PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF_RADIO_PATH_E)eRFPath); +#endif//#ifdef CONFIG_EMBEDDED_FWIMG + break; + case RF_PATH_B: +#ifdef CONFIG_EMBEDDED_FWIMG + #ifdef CONFIG_PHY_SETTING_WITH_ODM + if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath)) + rtStatus= _FAIL; + #else + rtStatus = rtl8188e_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath); + #endif //#ifdef CONFIG_PHY_SETTING_WITH_ODM +#else + rtStatus =rtl8188e_PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF_RADIO_PATH_E)eRFPath); +#endif + break; + case RF_PATH_C: + break; + case RF_PATH_D: + break; + } + + /*----Restore RFENV control type----*/; + switch(eRFPath) + { + case RF_PATH_A: + case RF_PATH_C: + PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); + break; + case RF_PATH_B : + case RF_PATH_D: + PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); + break; + } + + if(rtStatus != _SUCCESS){ + //RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath)); + goto phy_RF6052_Config_ParaFile_Fail; + } + + } + + //RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n")); + return rtStatus; + +phy_RF6052_Config_ParaFile_Fail: + return rtStatus; +} + + +int +PHY_RF6052_Config8188E( + IN PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + int rtStatus = _SUCCESS; + + // + // Initialize general global value + // + // TODO: Extend RF_PATH_C and RF_PATH_D in the future + if(pHalData->rf_type == RF_1T1R) + pHalData->NumTotalRFPath = 1; + else + pHalData->NumTotalRFPath = 2; + + // + // Config BB and RF + // + rtStatus = phy_RF6052_Config_ParaFile(Adapter); +#if 0 + switch( Adapter->MgntInfo.bRegHwParaFile ) + { + case 0: + phy_RF6052_Config_HardCode(Adapter); + break; + + case 1: + rtStatus = phy_RF6052_Config_ParaFile(Adapter); + break; + + case 2: + // Partial Modify. + phy_RF6052_Config_HardCode(Adapter); + phy_RF6052_Config_ParaFile(Adapter); + break; + + default: + phy_RF6052_Config_HardCode(Adapter); + break; + } +#endif + return rtStatus; + +} + + +// +// ==> RF shadow Operation API Code Section!!! +// +/*----------------------------------------------------------------------------- + * Function: PHY_RFShadowRead + * PHY_RFShadowWrite + * PHY_RFShadowCompare + * PHY_RFShadowRecorver + * PHY_RFShadowCompareAll + * PHY_RFShadowRecorverAll + * PHY_RFShadowCompareFlagSet + * PHY_RFShadowRecorverFlagSet + * + * Overview: When we set RF register, we must write shadow at first. + * When we are running, we must compare shadow abd locate error addr. + * Decide to recorver or not. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 11/20/2008 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +u32 +PHY_RFShadowRead( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset) +{ + return RF_Shadow[eRFPath][Offset].Value; + +} /* PHY_RFShadowRead */ + + +VOID +PHY_RFShadowWrite( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset, + IN u32 Data) +{ + RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask); + RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE; + +} /* PHY_RFShadowWrite */ + + +BOOLEAN +PHY_RFShadowCompare( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset) +{ + u32 reg; + // Check if we need to check the register + if (RF_Shadow[eRFPath][Offset].Compare == _TRUE) + { + reg = PHY_QueryRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask); + // Compare shadow and real rf register for 20bits!! + if (RF_Shadow[eRFPath][Offset].Value != reg) + { + // Locate error position. + RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE; + //RT_TRACE(COMP_INIT, DBG_LOUD, + //("PHY_RFShadowCompare RF-%d Addr%02lx Err = %05lx\n", + //eRFPath, Offset, reg)); + } + return RF_Shadow[eRFPath][Offset].ErrorOrNot ; + } + return _FALSE; +} /* PHY_RFShadowCompare */ + + +VOID +PHY_RFShadowRecorver( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset) +{ + // Check if the address is error + if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE) + { + // Check if we need to recorver the register. + if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE) + { + PHY_SetRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask, + RF_Shadow[eRFPath][Offset].Value); + //RT_TRACE(COMP_INIT, DBG_LOUD, + //("PHY_RFShadowRecorver RF-%d Addr%02lx=%05lx", + //eRFPath, Offset, RF_Shadow[eRFPath][Offset].Value)); + } + } + +} /* PHY_RFShadowRecorver */ + + +VOID +PHY_RFShadowCompareAll( + IN PADAPTER Adapter) +{ + u32 eRFPath; + u32 Offset; + + for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) + { + for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) + { + PHY_RFShadowCompare(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset); + } + } + +} /* PHY_RFShadowCompareAll */ + + +VOID +PHY_RFShadowRecorverAll( + IN PADAPTER Adapter) +{ + u32 eRFPath; + u32 Offset; + + for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) + { + for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) + { + PHY_RFShadowRecorver(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset); + } + } + +} /* PHY_RFShadowRecorverAll */ + + +VOID +PHY_RFShadowCompareFlagSet( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset, + IN u8 Type) +{ + // Set True or False!!! + RF_Shadow[eRFPath][Offset].Compare = Type; + +} /* PHY_RFShadowCompareFlagSet */ + + +VOID +PHY_RFShadowRecorverFlagSet( + IN PADAPTER Adapter, + IN RF_RADIO_PATH_E eRFPath, + IN u32 Offset, + IN u8 Type) +{ + // Set True or False!!! + RF_Shadow[eRFPath][Offset].Recorver= Type; + +} /* PHY_RFShadowRecorverFlagSet */ + + +VOID +PHY_RFShadowCompareFlagSetAll( + IN PADAPTER Adapter) +{ + u32 eRFPath; + u32 Offset; + + for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) + { + for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) + { + // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! + if (Offset != 0x26 && Offset != 0x27) + PHY_RFShadowCompareFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _FALSE); + else + PHY_RFShadowCompareFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _TRUE); + } + } + +} /* PHY_RFShadowCompareFlagSetAll */ + + +VOID +PHY_RFShadowRecorverFlagSetAll( + IN PADAPTER Adapter) +{ + u32 eRFPath; + u32 Offset; + + for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) + { + for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) + { + // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! + if (Offset != 0x26 && Offset != 0x27) + PHY_RFShadowRecorverFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _FALSE); + else + PHY_RFShadowRecorverFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _TRUE); + } + } + +} /* PHY_RFShadowCompareFlagSetAll */ + +VOID +PHY_RFShadowRefresh( + IN PADAPTER Adapter) +{ + u32 eRFPath; + u32 Offset; + + for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) + { + for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) + { + RF_Shadow[eRFPath][Offset].Value = 0; + RF_Shadow[eRFPath][Offset].Compare = _FALSE; + RF_Shadow[eRFPath][Offset].Recorver = _FALSE; + RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE; + RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE; + } + } + +} /* PHY_RFShadowRead */ + +/* End of HalRf6052.c */ + diff --git a/hal/rtl8188e_rxdesc.c b/hal/rtl8188e_rxdesc.c old mode 100644 new mode 100755 index b076fe3..7489a66 --- a/hal/rtl8188e_rxdesc.c +++ b/hal/rtl8188e_rxdesc.c @@ -19,38 +19,101 @@ ******************************************************************************/ #define _RTL8188E_REDESC_C_ +#include #include #include #include -static void process_rssi(struct adapter *padapter, union recv_frame *prframe) +static s32 translate2dbm(u8 signal_strength_idx) { - struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; - struct signal_stat *signal_stat = &padapter->recvpriv.signal_strength_data; + s32 signal_power; // in dBm. - if (signal_stat->update_req) { - signal_stat->total_num = 0; - signal_stat->total_val = 0; - signal_stat->update_req = 0; + + // Translate to dBm (x=0.5y-95). + signal_power = (s32)((signal_strength_idx + 1) >> 1); + signal_power -= 95; + + return signal_power; +} + + +static void process_rssi(_adapter *padapter,union recv_frame *prframe) +{ + u32 last_rssi, tmp_val; + struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; +#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS + struct signal_stat * signal_stat = &padapter->recvpriv.signal_strength_data; +#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS + + //DBG_8192C("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->RecvSignalPower,pattrib->signal_strength); + //if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon) + { + + #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS + if(signal_stat->update_req) { + signal_stat->total_num = 0; + signal_stat->total_val = 0; + signal_stat->update_req = 0; + } + + signal_stat->total_num++; + signal_stat->total_val += pattrib->phy_info.SignalStrength; + signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; + #else //CONFIG_NEW_SIGNAL_STAT_PROCESS + + //Adapter->RxStats.RssiCalculateCnt++; //For antenna Test + if(padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX) + { + padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX; + last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index]; + padapter->recvpriv.signal_strength_data.total_val -= last_rssi; + } + padapter->recvpriv.signal_strength_data.total_val +=pattrib->phy_info.SignalStrength; + + padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->phy_info.SignalStrength; + if(padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX) + padapter->recvpriv.signal_strength_data.index = 0; + + + tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num; + + if(padapter->recvpriv.is_signal_dbg) { + padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg; + padapter->recvpriv.rssi=(s8)translate2dbm((u8)padapter->recvpriv.signal_strength_dbg); + } else { + padapter->recvpriv.signal_strength= tmp_val; + padapter->recvpriv.rssi=(s8)translate2dbm((u8)tmp_val); + } + + RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("UI RSSI = %d, ui_rssi.TotalVal = %d, ui_rssi.TotalNum = %d\n", tmp_val, padapter->recvpriv.signal_strength_data.total_val,padapter->recvpriv.signal_strength_data.total_num)); + #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS } - signal_stat->total_num++; - signal_stat->total_val += pattrib->phy_info.SignalStrength; - signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; -} /* Process_UI_RSSI_8192C */ +}// Process_UI_RSSI_8192C -static void process_link_qual(struct adapter *padapter, union recv_frame *prframe) + + +static void process_link_qual(_adapter *padapter,union recv_frame *prframe) { - struct rx_pkt_attrib *pattrib; - struct signal_stat *signal_stat; + u32 last_evm=0, tmpVal; + struct rx_pkt_attrib *pattrib; +#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS + struct signal_stat * signal_stat; +#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS - if (prframe == NULL || padapter == NULL) + if(prframe == NULL || padapter==NULL){ return; + } pattrib = &prframe->u.hdr.attrib; +#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS signal_stat = &padapter->recvpriv.signal_qual_data; +#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS - if (signal_stat->update_req) { + //DBG_8192C("process_link_qual=> pattrib->signal_qual(%d)\n ",pattrib->signal_qual); + +#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS + if(signal_stat->update_req) { signal_stat->total_num = 0; signal_stat->total_val = 0; signal_stat->update_req = 0; @@ -59,78 +122,140 @@ static void process_link_qual(struct adapter *padapter, union recv_frame *prfram signal_stat->total_num++; signal_stat->total_val += pattrib->phy_info.SignalQuality; signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; + +#else //CONFIG_NEW_SIGNAL_STAT_PROCESS + if(pattrib->phy_info.SignalQuality != 0) + { + // + // 1. Record the general EVM to the sliding window. + // + if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX) + { + padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX; + last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index]; + padapter->recvpriv.signal_qual_data.total_val -= last_evm; + } + padapter->recvpriv.signal_qual_data.total_val += pattrib->phy_info.SignalQuality; + + padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->phy_info.SignalQuality; + if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX) + padapter->recvpriv.signal_qual_data.index = 0; + + RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, pattrib->phy_info.SignalQuality)); + + // <1> Showed on UI for user, in percentage. + tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num; + padapter->recvpriv.signal_qual=(u8)tmpVal; + + } + else + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" pattrib->signal_qual =%d\n", pattrib->phy_info.SignalQuality)); + } +#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS + } -void rtl8188e_process_phy_info(struct adapter *padapter, void *prframe) +//void rtl8188e_process_phy_info(_adapter *padapter, union recv_frame *prframe) +void rtl8188e_process_phy_info(_adapter *padapter, void *prframe) { union recv_frame *precvframe = (union recv_frame *)prframe; - /* Check RSSI */ + // + // Check RSSI + // process_rssi(padapter, precvframe); - /* Check EVM */ + // + // Check PWDB. + // + //process_PWDB(padapter, precvframe); + + //UpdateRxSignalStatistics8192C(Adapter, pRfd); + // + // Check EVM + // process_link_qual(padapter, precvframe); + } -void update_recvframe_attrib_88e(union recv_frame *precvframe, struct recv_stat *prxstat) + +void update_recvframe_attrib_88e( + union recv_frame *precvframe, + struct recv_stat *prxstat) { struct rx_pkt_attrib *pattrib; struct recv_stat report; + PRXREPORT prxreport; + //struct recv_frame_hdr *phdr; - report.rxdw0 = prxstat->rxdw0; - report.rxdw1 = prxstat->rxdw1; - report.rxdw2 = prxstat->rxdw2; - report.rxdw3 = prxstat->rxdw3; - report.rxdw4 = prxstat->rxdw4; - report.rxdw5 = prxstat->rxdw5; + //phdr = &precvframe->u.hdr; + + report.rxdw0 = le32_to_cpu(prxstat->rxdw0); + report.rxdw1 = le32_to_cpu(prxstat->rxdw1); + report.rxdw2 = le32_to_cpu(prxstat->rxdw2); + report.rxdw3 = le32_to_cpu(prxstat->rxdw3); + report.rxdw4 = le32_to_cpu(prxstat->rxdw4); + report.rxdw5 = le32_to_cpu(prxstat->rxdw5); + + prxreport = (PRXREPORT)&report; pattrib = &precvframe->u.hdr.attrib; _rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib)); - pattrib->crc_err = (u8)((le32_to_cpu(report.rxdw0) >> 14) & 0x1);;/* u8)prxreport->crc32; */ + pattrib->crc_err = (u8)((report.rxdw0 >> 14) & 0x1);;//(u8)prxreport->crc32; + + // update rx report to recv_frame attribute + pattrib->pkt_rpt_type = (u8)((report.rxdw3 >> 14) & 0x3);//prxreport->rpt_sel; + + if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet + { + pattrib->pkt_len = (u16)(report.rxdw0 &0x00003fff);//(u16)prxreport->pktlen; + pattrib->drvinfo_sz = (u8)((report.rxdw0 >> 16) & 0xf) * 8;//(u8)(prxreport->drvinfosize << 3); + + pattrib->physt = (u8)((report.rxdw0 >> 26) & 0x1);//(u8)prxreport->physt; - /* update rx report to recv_frame attribute */ - pattrib->pkt_rpt_type = (u8)((le32_to_cpu(report.rxdw3) >> 14) & 0x3);/* prxreport->rpt_sel; */ + pattrib->bdecrypted = (report.rxdw0 & BIT(27))? 0:1;//(u8)(prxreport->swdec ? 0 : 1); + pattrib->encrypt = (u8)((report.rxdw0 >> 20) & 0x7);//(u8)prxreport->security; - if (pattrib->pkt_rpt_type == NORMAL_RX) { /* Normal rx packet */ - pattrib->pkt_len = (u16)(le32_to_cpu(report.rxdw0) & 0x00003fff);/* u16)prxreport->pktlen; */ - pattrib->drvinfo_sz = (u8)((le32_to_cpu(report.rxdw0) >> 16) & 0xf) * 8;/* u8)(prxreport->drvinfosize << 3); */ + pattrib->qos = (u8)((report.rxdw0 >> 23) & 0x1);//(u8)prxreport->qos; + pattrib->priority = (u8)((report.rxdw1 >> 8) & 0xf);//(u8)prxreport->tid; - pattrib->physt = (u8)((le32_to_cpu(report.rxdw0) >> 26) & 0x1);/* u8)prxreport->physt; */ + pattrib->amsdu = (u8)((report.rxdw1 >> 13) & 0x1);//(u8)prxreport->amsdu; - pattrib->bdecrypted = (le32_to_cpu(report.rxdw0) & BIT(27)) ? 0 : 1;/* u8)(prxreport->swdec ? 0 : 1); */ - pattrib->encrypt = (u8)((le32_to_cpu(report.rxdw0) >> 20) & 0x7);/* u8)prxreport->security; */ + pattrib->seq_num = (u16)(report.rxdw2 & 0x00000fff);//(u16)prxreport->seq; + pattrib->frag_num = (u8)((report.rxdw2 >> 12) & 0xf);//(u8)prxreport->frag; + pattrib->mfrag = (u8)((report.rxdw1 >> 27) & 0x1);//(u8)prxreport->mf; + pattrib->mdata = (u8)((report.rxdw1 >> 26) & 0x1);//(u8)prxreport->md; - pattrib->qos = (u8)((le32_to_cpu(report.rxdw0) >> 23) & 0x1);/* u8)prxreport->qos; */ - pattrib->priority = (u8)((le32_to_cpu(report.rxdw1) >> 8) & 0xf);/* u8)prxreport->tid; */ - - pattrib->amsdu = (u8)((le32_to_cpu(report.rxdw1) >> 13) & 0x1);/* u8)prxreport->amsdu; */ - - pattrib->seq_num = (u16)(le32_to_cpu(report.rxdw2) & 0x00000fff);/* u16)prxreport->seq; */ - pattrib->frag_num = (u8)((le32_to_cpu(report.rxdw2) >> 12) & 0xf);/* u8)prxreport->frag; */ - pattrib->mfrag = (u8)((le32_to_cpu(report.rxdw1) >> 27) & 0x1);/* u8)prxreport->mf; */ - pattrib->mdata = (u8)((le32_to_cpu(report.rxdw1) >> 26) & 0x1);/* u8)prxreport->md; */ - - pattrib->mcs_rate = (u8)(le32_to_cpu(report.rxdw3) & 0x3f);/* u8)prxreport->rxmcs; */ - pattrib->rxht = (u8)((le32_to_cpu(report.rxdw3) >> 6) & 0x1);/* u8)prxreport->rxht; */ - - pattrib->icv_err = (u8)((le32_to_cpu(report.rxdw0) >> 15) & 0x1);/* u8)prxreport->icverr; */ - pattrib->shift_sz = (u8)((le32_to_cpu(report.rxdw0) >> 24) & 0x3); - } else if (pattrib->pkt_rpt_type == TX_REPORT1) { /* CCX */ + pattrib->mcs_rate = (u8)(report.rxdw3 & 0x3f);//(u8)prxreport->rxmcs; + pattrib->rxht = (u8)((report.rxdw3 >> 6) & 0x1);//(u8)prxreport->rxht; + + pattrib->icv_err = (u8)((report.rxdw0 >> 15) & 0x1);//(u8)prxreport->icverr; + pattrib->shift_sz = (u8)((report.rxdw0 >> 24) & 0x3); + + } + else if(pattrib->pkt_rpt_type == TX_REPORT1)//CCX + { pattrib->pkt_len = TX_RPT1_PKT_LEN; pattrib->drvinfo_sz = 0; - } else if (pattrib->pkt_rpt_type == TX_REPORT2) { /* TX RPT */ - pattrib->pkt_len = (u16)(le32_to_cpu(report.rxdw0) & 0x3FF);/* Rx length[9:0] */ + } + else if(pattrib->pkt_rpt_type == TX_REPORT2)// TX RPT + { + pattrib->pkt_len =(u16)(report.rxdw0 & 0x3FF);//Rx length[9:0] pattrib->drvinfo_sz = 0; - /* */ - /* Get TX report MAC ID valid. */ - /* */ - pattrib->MacIDValidEntry[0] = le32_to_cpu(report.rxdw4); - pattrib->MacIDValidEntry[1] = le32_to_cpu(report.rxdw5); - - } else if (pattrib->pkt_rpt_type == HIS_REPORT) { /* USB HISR RPT */ - pattrib->pkt_len = (u16)(le32_to_cpu(report.rxdw0) & 0x00003fff);/* u16)prxreport->pktlen; */ + // + // Get TX report MAC ID valid. + // + pattrib->MacIDValidEntry[0] = report.rxdw4; + pattrib->MacIDValidEntry[1] = report.rxdw5; + } + else if(pattrib->pkt_rpt_type == HIS_REPORT)// USB HISR RPT + { + pattrib->pkt_len = (u16)(report.rxdw0 &0x00003fff);//(u16)prxreport->pktlen; + } + } /* @@ -138,65 +263,88 @@ void update_recvframe_attrib_88e(union recv_frame *precvframe, struct recv_stat * Before calling this function, * precvframe->u.hdr.rx_data should be ready! */ -void update_recvframe_phyinfo_88e(union recv_frame *precvframe, struct phy_stat *pphy_status) +void update_recvframe_phyinfo_88e( + union recv_frame *precvframe, + struct phy_stat *pphy_status) { - struct adapter *padapter = precvframe->u.hdr.adapter; - struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); - struct odm_phy_status_info *pPHYInfo = (struct odm_phy_status_info *)(&pattrib->phy_info); - u8 *wlanhdr; - struct odm_per_pkt_info pkt_info; - u8 *sa = NULL; + PADAPTER padapter = precvframe->u.hdr.adapter; + struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + PODM_PHY_INFO_T pPHYInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info); + u8 *wlanhdr; + ODM_PACKET_INFO_T pkt_info; + u8 *sa; struct sta_priv *pstapriv; struct sta_info *psta; - - pkt_info.bPacketMatchBSSID = false; - pkt_info.bPacketToSelf = false; - pkt_info.bPacketBeacon = false; - + //_irqL irqL; + + pkt_info.bPacketMatchBSSID =_FALSE; + pkt_info.bPacketToSelf = _FALSE; + pkt_info.bPacketBeacon = _FALSE; + wlanhdr = get_recvframe_data(precvframe); pkt_info.bPacketMatchBSSID = ((!IsFrameTypeCtrl(wlanhdr)) && !pattrib->icv_err && !pattrib->crc_err && - _rtw_memcmp(get_hdr_bssid(wlanhdr), - get_bssid(&padapter->mlmepriv), ETH_ALEN)); + _rtw_memcmp(get_hdr_bssid(wlanhdr), get_bssid(&padapter->mlmepriv), ETH_ALEN)); - pkt_info.bPacketToSelf = pkt_info.bPacketMatchBSSID && - (_rtw_memcmp(get_da(wlanhdr), - myid(&padapter->eeprompriv), ETH_ALEN)); + pkt_info.bPacketToSelf = pkt_info.bPacketMatchBSSID && (_rtw_memcmp(get_da(wlanhdr), myid(&padapter->eeprompriv), ETH_ALEN)); - pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID && - (GetFrameSubType(wlanhdr) == WIFI_BEACON); + pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID && (GetFrameSubType(wlanhdr) == WIFI_BEACON); - if (pkt_info.bPacketBeacon) { - if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE)) + if(pkt_info.bPacketBeacon){ + if(check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){ sa = padapter->mlmepriv.cur_network.network.MacAddress; - /* to do Ad-hoc */ - } else { - sa = get_sa(wlanhdr); + #if 0 + { + DBG_8192C("==> rx beacon from AP[%02x:%02x:%02x:%02x:%02x:%02x]\n", + sa[0],sa[1],sa[2],sa[3],sa[4],sa[5]); + } + #endif + } + else + sa = get_sa(wlanhdr); } - + else{ + sa = get_sa(wlanhdr); + } + pstapriv = &padapter->stapriv; pkt_info.StationID = 0xFF; psta = rtw_get_stainfo(pstapriv, sa); if (psta) - pkt_info.StationID = psta->mac_id; - pkt_info.Rate = pattrib->mcs_rate; + { + pkt_info.StationID = psta->mac_id; + //DBG_8192C("%s ==> StationID(%d)\n",__FUNCTION__,pkt_info.StationID); + } + pkt_info.Rate = pattrib->mcs_rate; + //rtl8188e_query_rx_phy_status(precvframe, pphy_status); - ODM_PhyStatusQuery(&pHalData->odmpriv, pPHYInfo, (u8 *)pphy_status, &(pkt_info), padapter); + //_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); + ODM_PhyStatusQuery(&pHalData->odmpriv,pPHYInfo,(u8 *)pphy_status,&(pkt_info)); + //_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); precvframe->u.hdr.psta = NULL; if (pkt_info.bPacketMatchBSSID && - (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE))) { - if (psta) { + (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE)) + { + if (psta) + { precvframe->u.hdr.psta = psta; rtl8188e_process_phy_info(padapter, precvframe); - } - } else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon) { - if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) { + + } + } + else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon) + { + if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) + { if (psta) + { precvframe->u.hdr.psta = psta; + } } - rtl8188e_process_phy_info(padapter, precvframe); + rtl8188e_process_phy_info(padapter, precvframe); } } + diff --git a/hal/rtl8188e_sreset.c b/hal/rtl8188e_sreset.c old mode 100644 new mode 100755 index 96d698e..7c588cb --- a/hal/rtl8188e_sreset.c +++ b/hal/rtl8188e_sreset.c @@ -1,80 +1,125 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ -#define _RTL8188E_SRESET_C_ - -#include -#include - -void rtl8188e_silentreset_for_specific_platform(struct adapter *padapter) -{ -} - -void rtl8188e_sreset_xmit_status_check(struct adapter *padapter) -{ - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); - struct sreset_priv *psrtpriv = &pHalData->srestpriv; - - unsigned long current_time; - struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - unsigned int diff_time; - u32 txdma_status; - - txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS); - if (txdma_status != 0x00) { - DBG_88E("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status); - rtw_write32(padapter, REG_TXDMA_STATUS, txdma_status); - rtl8188e_silentreset_for_specific_platform(padapter); - } - /* total xmit irp = 4 */ - current_time = rtw_get_current_time(); - if (0 == pxmitpriv->free_xmitbuf_cnt) { - diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_time); - - if (diff_time > 2000) { - if (psrtpriv->last_tx_complete_time == 0) { - psrtpriv->last_tx_complete_time = current_time; - } else { - diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_complete_time); - if (diff_time > 4000) { - DBG_88E("%s tx hang\n", __func__); - rtl8188e_silentreset_for_specific_platform(padapter); - } - } - } - } -} - -void rtl8188e_sreset_linked_status_check(struct adapter *padapter) -{ - u32 rx_dma_status = 0; - u8 fw_status = 0; - rx_dma_status = rtw_read32(padapter, REG_RXDMA_STATUS); - if (rx_dma_status != 0x00) { - DBG_88E("%s REG_RXDMA_STATUS:0x%08x\n", __func__, rx_dma_status); - rtw_write32(padapter, REG_RXDMA_STATUS, rx_dma_status); - } - fw_status = rtw_read8(padapter, REG_FMETHR); - if (fw_status != 0x00) { - if (fw_status == 1) - DBG_88E("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !!\n", __func__, fw_status); - else if (fw_status == 2) - DBG_88E("%s REG_FW_STATUS (0x%02x), Condition_No_Match !!\n", __func__, fw_status); - } -} +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8188E_SRESET_C_ + +#include +#include + +#ifdef DBG_CONFIG_ERROR_DETECT + +void rtl8188e_sreset_xmit_status_check(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct sreset_priv *psrtpriv = &pHalData->srestpriv; + + unsigned long current_time; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + unsigned int diff_time; + u32 txdma_status; + + if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){ + DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status); + rtw_hal_sreset_reset(padapter); + } +#ifdef CONFIG_USB_HCI + //total xmit irp = 4 + //DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); + //if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) + current_time = rtw_get_current_time(); + + if(0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) { + + diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time); + + if (diff_time > 2000) { + if (psrtpriv->last_tx_complete_time == 0) { + psrtpriv->last_tx_complete_time = current_time; + } + else{ + diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time); + if (diff_time > 4000) { + u32 ability; + + //padapter->Wifi_Error_Status = WIFI_TX_HANG; + rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DM_FUNC, &ability); + + DBG_871X("%s tx hang %s\n", __FUNCTION__, + (ability & ODM_BB_ADAPTIVITY)? "ODM_BB_ADAPTIVITY" : ""); + + if (!(ability & ODM_BB_ADAPTIVITY)) + rtw_hal_sreset_reset(padapter); + } + } + } + } +#endif //CONFIG_USB_HCI + + if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) { + psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; + rtw_hal_sreset_reset(padapter); + return; + } +} + +void rtl8188e_sreset_linked_status_check(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct sreset_priv *psrtpriv = &pHalData->srestpriv; + + u32 rx_dma_status = 0; + u8 fw_status=0; + rx_dma_status = rtw_read32(padapter,REG_RXDMA_STATUS); + if(rx_dma_status!= 0x00){ + DBG_8192C("%s REG_RXDMA_STATUS:0x%08x \n",__FUNCTION__,rx_dma_status); + rtw_write32(padapter,REG_RXDMA_STATUS,rx_dma_status); + } + fw_status = rtw_read8(padapter,REG_FMETHR); + if(fw_status != 0x00) + { + if(fw_status == 1) + DBG_8192C("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !! \n",__FUNCTION__,fw_status); + else if(fw_status == 2) + DBG_8192C("%s REG_FW_STATUS (0x%02x), Condition_No_Match !! \n",__FUNCTION__,fw_status); + } +#if 0 + u32 regc50,regc58,reg824,reg800; + regc50 = rtw_read32(padapter,0xc50); + regc58 = rtw_read32(padapter,0xc58); + reg824 = rtw_read32(padapter,0x824); + reg800 = rtw_read32(padapter,0x800); + if( ((regc50&0xFFFFFF00)!= 0x69543400)|| + ((regc58&0xFFFFFF00)!= 0x69543400)|| + (((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))|| + ( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000))) + { + DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__, + regc50, regc58, reg824, reg800); + rtw_hal_sreset_reset(padapter); + } +#endif + + if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) { + psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; + rtw_hal_sreset_reset(padapter); + return; + } +} +#endif + diff --git a/hal/rtl8188e_xmit.c b/hal/rtl8188e_xmit.c old mode 100644 new mode 100755 index 7ecbcf7..d472236 --- a/hal/rtl8188e_xmit.c +++ b/hal/rtl8188e_xmit.c @@ -19,73 +19,274 @@ ******************************************************************************/ #define _RTL8188E_XMIT_C_ +#include #include #include #include +#ifdef CONFIG_XMIT_ACK void dump_txrpt_ccx_88e(void *buf) { struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf; - DBG_88E("%s:\n" + DBG_871X("%s:\n" "tag1:%u, pkt_num:%u, txdma_underflow:%u, int_bt:%u, int_tri:%u, int_ccx:%u\n" "mac_id:%u, pkt_ok:%u, bmc:%u\n" "retry_cnt:%u, lifetime_over:%u, retry_over:%u\n" "ccx_qtime:%u\n" "final_data_rate:0x%02x\n" - "qsel:%u, sw:0x%03x\n", - __func__, txrpt_ccx->tag1, txrpt_ccx->pkt_num, - txrpt_ccx->txdma_underflow, txrpt_ccx->int_bt, - txrpt_ccx->int_tri, txrpt_ccx->int_ccx, - txrpt_ccx->mac_id, txrpt_ccx->pkt_ok, txrpt_ccx->bmc, - txrpt_ccx->retry_cnt, txrpt_ccx->lifetime_over, - txrpt_ccx->retry_over, txrpt_ccx_qtime_88e(txrpt_ccx), - txrpt_ccx->final_data_rate, txrpt_ccx->qsel, - txrpt_ccx_sw_88e(txrpt_ccx) + "qsel:%u, sw:0x%03x\n" + , __func__ + , txrpt_ccx->tag1, txrpt_ccx->pkt_num, txrpt_ccx->txdma_underflow, txrpt_ccx->int_bt, txrpt_ccx->int_tri, txrpt_ccx->int_ccx + , txrpt_ccx->mac_id, txrpt_ccx->pkt_ok, txrpt_ccx->bmc + , txrpt_ccx->retry_cnt, txrpt_ccx->lifetime_over, txrpt_ccx->retry_over + , txrpt_ccx_qtime_88e(txrpt_ccx) + , txrpt_ccx->final_data_rate + , txrpt_ccx->qsel, txrpt_ccx_sw_88e(txrpt_ccx) ); } -void handle_txrpt_ccx_88e(struct adapter *adapter, u8 *buf) +void handle_txrpt_ccx_88e(_adapter *adapter, u8 *buf) { struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf; + #ifdef DBG_CCX + dump_txrpt_ccx_88e(buf); + #endif + if (txrpt_ccx->int_ccx) { if (txrpt_ccx->pkt_ok) - rtw_ack_tx_done(&adapter->xmitpriv, - RTW_SCTX_DONE_SUCCESS); + rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_SUCCESS); else - rtw_ack_tx_done(&adapter->xmitpriv, - RTW_SCTX_DONE_CCX_PKT_FAIL); + rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_CCX_PKT_FAIL); } } +#endif //CONFIG_XMIT_ACK -void _dbg_dump_tx_info(struct adapter *padapter, int frame_tag, - struct tx_desc *ptxdesc) +void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc) { - u8 dmp_txpkt; - bool dump_txdesc = false; - rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DUMP_TXPKT, &(dmp_txpkt)); + u8 bDumpTxPkt; + u8 bDumpTxDesc = _FALSE; + rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DUMP_TXPKT, &(bDumpTxPkt)); - if (dmp_txpkt == 1) {/* dump txdesc for data frame */ - DBG_88E("dump tx_desc for data frame\n"); - if ((frame_tag & 0x0f) == DATA_FRAMETAG) - dump_txdesc = true; - } else if (dmp_txpkt == 2) {/* dump txdesc for mgnt frame */ - DBG_88E("dump tx_desc for mgnt frame\n"); - if ((frame_tag & 0x0f) == MGNT_FRAMETAG) - dump_txdesc = true; + if(bDumpTxPkt ==1){//dump txdesc for data frame + DBG_871X("dump tx_desc for data frame\n"); + if((frame_tag&0x0f) == DATA_FRAMETAG){ + bDumpTxDesc = _TRUE; + } + } + else if(bDumpTxPkt ==2){//dump txdesc for mgnt frame + DBG_871X("dump tx_desc for mgnt frame\n"); + if((frame_tag&0x0f) == MGNT_FRAMETAG){ + bDumpTxDesc = _TRUE; + } + } + else if(bDumpTxPkt ==3){//dump early info } - if (dump_txdesc) { - DBG_88E("=====================================\n"); - DBG_88E("txdw0(0x%08x)\n", ptxdesc->txdw0); - DBG_88E("txdw1(0x%08x)\n", ptxdesc->txdw1); - DBG_88E("txdw2(0x%08x)\n", ptxdesc->txdw2); - DBG_88E("txdw3(0x%08x)\n", ptxdesc->txdw3); - DBG_88E("txdw4(0x%08x)\n", ptxdesc->txdw4); - DBG_88E("txdw5(0x%08x)\n", ptxdesc->txdw5); - DBG_88E("txdw6(0x%08x)\n", ptxdesc->txdw6); - DBG_88E("txdw7(0x%08x)\n", ptxdesc->txdw7); - DBG_88E("=====================================\n"); + if(bDumpTxDesc){ + // ptxdesc->txdw4 = cpu_to_le32(0x00001006);//RTS Rate=24M + // ptxdesc->txdw6 = 0x6666f800; + DBG_8192C("=====================================\n"); + DBG_8192C("txdw0(0x%08x)\n",ptxdesc->txdw0); + DBG_8192C("txdw1(0x%08x)\n",ptxdesc->txdw1); + DBG_8192C("txdw2(0x%08x)\n",ptxdesc->txdw2); + DBG_8192C("txdw3(0x%08x)\n",ptxdesc->txdw3); + DBG_8192C("txdw4(0x%08x)\n",ptxdesc->txdw4); + DBG_8192C("txdw5(0x%08x)\n",ptxdesc->txdw5); + DBG_8192C("txdw6(0x%08x)\n",ptxdesc->txdw6); + DBG_8192C("txdw7(0x%08x)\n",ptxdesc->txdw7); + DBG_8192C("=====================================\n"); } + } + +/* + * Description: + * Aggregation packets and send to hardware + * + * Return: + * 0 Success + * -1 Hardware resource(TX FIFO) not ready + * -2 Software resource(xmitbuf) not ready + */ +#ifdef CONFIG_TX_EARLY_MODE + +//#define DBG_EMINFO + +#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 + #define EARLY_MODE_MAX_PKT_NUM 10 +#else + #define EARLY_MODE_MAX_PKT_NUM 5 +#endif + + +struct EMInfo{ + u8 EMPktNum; + u16 EMPktLen[EARLY_MODE_MAX_PKT_NUM]; +}; + + +void +InsertEMContent_8188E( + struct EMInfo *pEMInfo, + IN pu1Byte VirtualAddress) +{ + +#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 + u1Byte index=0; + u4Byte dwtmp=0; +#endif + + _rtw_memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE); + if(pEMInfo->EMPktNum==0) + return; + + #ifdef DBG_EMINFO + { + int i; + DBG_8192C("\n%s ==> pEMInfo->EMPktNum =%d\n",__FUNCTION__,pEMInfo->EMPktNum); + for(i=0;i< EARLY_MODE_MAX_PKT_NUM;i++){ + DBG_8192C("%s ==> pEMInfo->EMPktLen[%d] =%d\n",__FUNCTION__,i,pEMInfo->EMPktLen[i]); + } + + } + #endif + +#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 + SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); + + if(pEMInfo->EMPktNum == 1){ + dwtmp = pEMInfo->EMPktLen[0]; + }else{ + dwtmp = pEMInfo->EMPktLen[0]; + dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; + dwtmp += pEMInfo->EMPktLen[1]; + } + SET_EARLYMODE_LEN0(VirtualAddress, dwtmp); + if(pEMInfo->EMPktNum <= 3){ + dwtmp = pEMInfo->EMPktLen[2]; + }else{ + dwtmp = pEMInfo->EMPktLen[2]; + dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; + dwtmp += pEMInfo->EMPktLen[3]; + } + SET_EARLYMODE_LEN1(VirtualAddress, dwtmp); + if(pEMInfo->EMPktNum <= 5){ + dwtmp = pEMInfo->EMPktLen[4]; + }else{ + dwtmp = pEMInfo->EMPktLen[4]; + dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; + dwtmp += pEMInfo->EMPktLen[5]; + } + SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp&0xF); + SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp>>4); + if(pEMInfo->EMPktNum <= 7){ + dwtmp = pEMInfo->EMPktLen[6]; + }else{ + dwtmp = pEMInfo->EMPktLen[6]; + dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; + dwtmp += pEMInfo->EMPktLen[7]; + } + SET_EARLYMODE_LEN3(VirtualAddress, dwtmp); + if(pEMInfo->EMPktNum <= 9){ + dwtmp = pEMInfo->EMPktLen[8]; + }else{ + dwtmp = pEMInfo->EMPktLen[8]; + dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; + dwtmp += pEMInfo->EMPktLen[9]; + } + SET_EARLYMODE_LEN4(VirtualAddress, dwtmp); +#else + SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); + SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]); + SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]); + SET_EARLYMODE_LEN2_1(VirtualAddress, pEMInfo->EMPktLen[2]&0xF); + SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2]>>4); + SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]); + SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]); +#endif + //RT_PRINT_DATA(COMP_SEND, DBG_LOUD, "EMHdr:", VirtualAddress, 8); + +} + + + +void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ) +{ + //_adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq + int index,j; + u16 offset,pktlen; + PTXDESC ptxdesc; + + u8 *pmem,*pEMInfo_mem; + s8 node_num_0=0,node_num_1=0; + struct EMInfo eminfo; + struct agg_pkt_info *paggpkt; + struct xmit_frame *pframe = (struct xmit_frame*)pxmitbuf->priv_data; + pmem= pframe->buf_addr; + + #ifdef DBG_EMINFO + DBG_8192C("\n%s ==> agg_num:%d\n",__FUNCTION__, pframe->agg_num); + for(index=0;indexagg_num;index++){ + offset = pxmitpriv->agg_pkt[index].offset; + pktlen = pxmitpriv->agg_pkt[index].pkt_len; + DBG_8192C("%s ==> agg_pkt[%d].offset=%d\n",__FUNCTION__,index,offset); + DBG_8192C("%s ==> agg_pkt[%d].pkt_len=%d\n",__FUNCTION__,index,pktlen); + } + #endif + + if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM) + { + node_num_0 = pframe->agg_num; + node_num_1= EARLY_MODE_MAX_PKT_NUM-1; + } + + for(index=0;indexagg_num;index++){ + + offset = pxmitpriv->agg_pkt[index].offset; + pktlen = pxmitpriv->agg_pkt[index].pkt_len; + + _rtw_memset(&eminfo,0,sizeof(struct EMInfo)); + if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM){ + if(node_num_0 > EARLY_MODE_MAX_PKT_NUM){ + eminfo.EMPktNum = EARLY_MODE_MAX_PKT_NUM; + node_num_0--; + } + else{ + eminfo.EMPktNum = node_num_1; + node_num_1--; + } + } + else{ + eminfo.EMPktNum = pframe->agg_num-(index+1); + } + for(j=0;j< eminfo.EMPktNum ;j++){ + eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index+1+j].pkt_len+4;// 4 bytes CRC + } + + if(pmem){ + if(index==0){ + ptxdesc = (PTXDESC)(pmem); + pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE; + } + else{ + pmem = pmem + pxmitpriv->agg_pkt[index-1].offset; + ptxdesc = (PTXDESC)(pmem); + pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE; + } + + #ifdef DBG_EMINFO + DBG_8192C("%s ==> desc.pkt_len=%d\n",__FUNCTION__,ptxdesc->pktlen); + #endif + InsertEMContent_8188E(&eminfo,pEMInfo_mem); + } + + + } + _rtw_memset(pxmitpriv->agg_pkt,0,sizeof(struct agg_pkt_info)*MAX_AGG_PKT_NUM); + +} +#endif + + diff --git a/hal/rtl8188eu_led.c b/hal/rtl8188eu_led.c old mode 100644 new mode 100755 index 08dfd94..712965a --- a/hal/rtl8188eu_led.c +++ b/hal/rtl8188eu_led.c @@ -1,7 +1,7 @@ /****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * + * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. @@ -18,94 +18,153 @@ * ******************************************************************************/ +#include #include #include #include -#include -/* LED object. */ +//================================================================================ +// LED object. +//================================================================================ -/* LED_819xUsb routines. */ -/* Description: */ -/* Turn on LED according to LedPin specified. */ -void SwLedOn(struct adapter *padapter, struct LED_871x *pLed) + +//================================================================================ +// Prototype of protected function. +//================================================================================ + + +//================================================================================ +// LED_819xUsb routines. +//================================================================================ + +// +// Description: +// Turn on LED according to LedPin specified. +// +void +SwLedOn( + _adapter *padapter, + PLED_871x pLed +) { u8 LedCfg; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - if (padapter->bSurpriseRemoved || padapter->bDriverStopped) + if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) + { return; - LedCfg = rtw_read8(padapter, REG_LEDCFG2); - switch (pLed->LedPin) { - case LED_PIN_LED0: - rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); /* SW control led0 on. */ - break; - case LED_PIN_LED1: - rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); /* SW control led1 on. */ - break; - default: - break; } - pLed->bLedOn = true; + + LedCfg = rtw_read8(padapter, REG_LEDCFG2); + switch(pLed->LedPin) + { + case LED_PIN_LED0: + rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on. + break; + + case LED_PIN_LED1: + rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); // SW control led1 on. + break; + + default: + break; + } + + pLed->bLedOn = _TRUE; } -/* Description: */ -/* Turn off LED according to LedPin specified. */ -void SwLedOff(struct adapter *padapter, struct LED_871x *pLed) + +// +// Description: +// Turn off LED according to LedPin specified. +// +void +SwLedOff( + _adapter *padapter, + PLED_871x pLed +) { u8 LedCfg; - struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); - if (padapter->bSurpriseRemoved || padapter->bDriverStopped) + if((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) + { goto exit; + } - LedCfg = rtw_read8(padapter, REG_LEDCFG2);/* 0x4E */ - switch (pLed->LedPin) { - case LED_PIN_LED0: - if (pHalData->bLedOpenDrain) { - /* Open-drain arrangement for controlling the LED) */ - LedCfg &= 0x90; /* Set to software control. */ + LedCfg = rtw_read8(padapter, REG_LEDCFG2);//0x4E + + switch(pLed->LedPin) + { + case LED_PIN_LED0: + if(pHalData->bLedOpenDrain == _TRUE) // Open-drain arrangement for controlling the LED) + { + LedCfg &= 0x90; // Set to software control. + rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); + LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG); + LedCfg &= 0xFE; + rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg); + } + else + { + rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6)); + } + break; + + case LED_PIN_LED1: + LedCfg &= 0x0f; // Set to software control. rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); - LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG); - LedCfg &= 0xFE; - rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg); - } else { - rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6)); - } - break; - case LED_PIN_LED1: - LedCfg &= 0x0f; /* Set to software control. */ - rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); - break; - default: - break; + break; + + default: + break; } exit: - pLed->bLedOn = false; + pLed->bLedOn = _FALSE; + } -/* Interface to manipulate LED objects. */ -/* Default LED behavior. */ +//================================================================================ +// Interface to manipulate LED objects. +//================================================================================ -/* Description: */ -/* Initialize all LED_871x objects. */ -void rtl8188eu_InitSwLeds(struct adapter *padapter) + +//================================================================================ +// Default LED behavior. +//================================================================================ + +// +// Description: +// Initialize all LED_871x objects. +// +void +rtl8188eu_InitSwLeds( + _adapter *padapter + ) { struct led_priv *pledpriv = &(padapter->ledpriv); - pledpriv->LedControlHandler = LedControl8188eu; + pledpriv->LedControlHandler = LedControl871x; InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); - InitLed871x(padapter, &(pledpriv->SwLed1), LED_PIN_LED1); + InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED1); } -/* Description: */ -/* DeInitialize all LED_819xUsb objects. */ -void rtl8188eu_DeInitSwLeds(struct adapter *padapter) + +// +// Description: +// DeInitialize all LED_819xUsb objects. +// +void +rtl8188eu_DeInitSwLeds( + _adapter *padapter + ) { struct led_priv *ledpriv = &(padapter->ledpriv); - DeInitLed871x(&(ledpriv->SwLed0)); - DeInitLed871x(&(ledpriv->SwLed1)); + DeInitLed871x( &(ledpriv->SwLed0) ); + DeInitLed871x( &(ledpriv->SwLed1) ); } + diff --git a/hal/rtl8188eu_recv.c b/hal/rtl8188eu_recv.c old mode 100644 new mode 100755 index 7476d5b..eabf487 --- a/hal/rtl8188eu_recv.c +++ b/hal/rtl8188eu_recv.c @@ -1,7 +1,7 @@ /****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * + * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. @@ -18,6 +18,7 @@ * ******************************************************************************/ #define _RTL8188EU_RECV_C_ +#include #include #include #include @@ -27,90 +28,145 @@ #include #include + #include +#include #include -void rtl8188eu_init_recvbuf(struct adapter *padapter, struct recv_buf *precvbuf) + +void rtl8188eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf) { + precvbuf->transfer_len = 0; precvbuf->len = 0; precvbuf->ref_cnt = 0; - if (precvbuf->pbuf) { - precvbuf->pdata = precvbuf->pbuf; - precvbuf->phead = precvbuf->pbuf; - precvbuf->ptail = precvbuf->pbuf; + if(precvbuf->pbuf) + { + precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pbuf; precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ; } + } -int rtl8188eu_init_recv_priv(struct adapter *padapter) +int rtl8188eu_init_recv_priv(_adapter *padapter) { struct recv_priv *precvpriv = &padapter->recvpriv; int i, res = _SUCCESS; struct recv_buf *precvbuf; +#ifdef CONFIG_RECV_THREAD_MODE + _rtw_init_sema(&precvpriv->recv_sema, 0);//will be removed + _rtw_init_sema(&precvpriv->terminate_recvthread_sema, 0);//will be removed +#endif + tasklet_init(&precvpriv->recv_tasklet, - (void(*)(unsigned long))rtl8188eu_recv_tasklet, - (unsigned long)padapter); + (void(*)(unsigned long))rtl8188eu_recv_tasklet, + (unsigned long)padapter); - /* init recv_buf */ - _rtw_init_queue(&precvpriv->free_recv_buf_queue); - - precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF * sizeof(struct recv_buf) + 4); - if (precvpriv->pallocated_recv_buf == NULL) { - res = _FAIL; - RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("alloc recv_buf fail!\n")); +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + precvpriv->int_in_urb = usb_alloc_urb(0, GFP_KERNEL); + if(precvpriv->int_in_urb == NULL){ + res= _FAIL; + DBG_8192C("alloc_urb for interrupt in endpoint fail !!!!\n"); goto exit; } - _rtw_memset(precvpriv->pallocated_recv_buf, 0, NR_RECVBUFF * sizeof(struct recv_buf) + 4); - - precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((size_t)(precvpriv->pallocated_recv_buf), 4); - - precvbuf = (struct recv_buf *)precvpriv->precv_buf; - - for (i = 0; i < NR_RECVBUFF; i++) { - _rtw_init_listhead(&precvbuf->list); - spin_lock_init(&precvbuf->recvbuf_lock); - precvbuf->alloc_sz = MAX_RECVBUF_SZ; - res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf); - if (res == _FAIL) - break; - precvbuf->ref_cnt = 0; - precvbuf->adapter = padapter; - precvbuf++; + precvpriv->int_in_buf = rtw_zmalloc(INTERRUPT_MSG_FORMAT_LEN); + if(precvpriv->int_in_buf == NULL){ + res= _FAIL; + DBG_8192C("alloc_mem for interrupt in endpoint fail !!!!\n"); + goto exit; } +#endif + + //init recv_buf + _rtw_init_queue(&precvpriv->free_recv_buf_queue); + +#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX + _rtw_init_queue(&precvpriv->recv_buf_pending_queue); +#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX + + precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF *sizeof(struct recv_buf) + 4); + if(precvpriv->pallocated_recv_buf==NULL){ + res= _FAIL; + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("alloc recv_buf fail!\n")); + goto exit; + } + _rtw_memset(precvpriv->pallocated_recv_buf, 0, NR_RECVBUFF *sizeof(struct recv_buf) + 4); + + precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4); + //precvpriv->precv_buf = precvpriv->pallocated_recv_buf + 4 - + // ((uint) (precvpriv->pallocated_recv_buf) &(4-1)); + + + precvbuf = (struct recv_buf*)precvpriv->precv_buf; + + for(i=0; i < NR_RECVBUFF ; i++) + { + _rtw_init_listhead(&precvbuf->list); + + _rtw_spinlock_init(&precvbuf->recvbuf_lock); + + precvbuf->alloc_sz = MAX_RECVBUF_SZ; + + res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf); + if(res==_FAIL) + break; + + precvbuf->ref_cnt = 0; + precvbuf->adapter =padapter; + + + //rtw_list_insert_tail(&precvbuf->list, &(precvpriv->free_recv_buf_queue.queue)); + + precvbuf++; + + } + precvpriv->free_recv_buf_queue_cnt = NR_RECVBUFF; + + skb_queue_head_init(&precvpriv->rx_skb_queue); + +#ifdef CONFIG_PREALLOC_RECV_SKB { int i; - size_t tmpaddr = 0; - size_t alignment = 0; - struct sk_buff *pskb = NULL; + SIZE_PTR tmpaddr=0; + SIZE_PTR alignment=0; + struct sk_buff *pskb=NULL; skb_queue_head_init(&precvpriv->free_recv_skb_queue); - for (i = 0; i < NR_PREALLOC_RECV_SKB; i++) { - pskb = __netdev_alloc_skb(padapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ, GFP_KERNEL); - if (pskb) { + for(i=0; idev = padapter->pnetdev; - tmpaddr = (size_t)pskb->data; + + tmpaddr = (SIZE_PTR)pskb->data; alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment)); skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb); } - pskb = NULL; + + pskb=NULL; + } } +#endif + exit: + return res; } -void rtl8188eu_free_recv_priv(struct adapter *padapter) +void rtl8188eu_free_recv_priv (_adapter *padapter) { int i; struct recv_buf *precvbuf; @@ -118,19 +174,39 @@ void rtl8188eu_free_recv_priv(struct adapter *padapter) precvbuf = (struct recv_buf *)precvpriv->precv_buf; - for (i = 0; i < NR_RECVBUFF; i++) { + for(i=0; i < NR_RECVBUFF ; i++) + { rtw_os_recvbuf_resource_free(padapter, precvbuf); precvbuf++; } - kfree(precvpriv->pallocated_recv_buf); + if(precvpriv->pallocated_recv_buf) + rtw_mfree(precvpriv->pallocated_recv_buf, NR_RECVBUFF *sizeof(struct recv_buf) + 4); - if (skb_queue_len(&precvpriv->rx_skb_queue)) - DBG_88E(KERN_WARNING "rx_skb_queue not empty\n"); - skb_queue_purge(&precvpriv->rx_skb_queue); +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + if(precvpriv->int_in_urb) + usb_free_urb(precvpriv->int_in_urb); - if (skb_queue_len(&precvpriv->free_recv_skb_queue)) - DBG_88E(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue)); + if(precvpriv->int_in_buf) + rtw_mfree(precvpriv->int_in_buf, INTERRUPT_MSG_FORMAT_LEN); +#endif//CONFIG_USB_INTERRUPT_IN_PIPE + + if (skb_queue_len(&precvpriv->rx_skb_queue)) { + DBG_8192C(KERN_WARNING "rx_skb_queue not empty\n"); + } + + rtw_skb_queue_purge(&precvpriv->rx_skb_queue); + +#ifdef CONFIG_PREALLOC_RECV_SKB + + if (skb_queue_len(&precvpriv->free_recv_skb_queue)) { + DBG_8192C(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue)); + } + + rtw_skb_queue_purge(&precvpriv->free_recv_skb_queue); + +#endif - skb_queue_purge(&precvpriv->free_recv_skb_queue); } + + diff --git a/hal/rtl8188eu_xmit.c b/hal/rtl8188eu_xmit.c old mode 100644 new mode 100755 index 1de6042..8372b67 --- a/hal/rtl8188eu_xmit.c +++ b/hal/rtl8188eu_xmit.c @@ -1,7 +1,7 @@ /****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * + * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. @@ -18,686 +18,1310 @@ * ******************************************************************************/ #define _RTL8188E_XMIT_C_ +#include #include #include +#include #include #include +#include #include #include -s32 rtl8188eu_init_xmit_priv(struct adapter *adapt) +s32 rtl8188eu_init_xmit_priv(_adapter *padapter) { - struct xmit_priv *pxmitpriv = &adapt->xmitpriv; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); tasklet_init(&pxmitpriv->xmit_tasklet, - (void(*)(unsigned long))rtl8188eu_xmit_tasklet, - (unsigned long)adapt); + (void(*)(unsigned long))rtl8188eu_xmit_tasklet, + (unsigned long)padapter); +#ifdef CONFIG_TX_EARLY_MODE + pHalData->bEarlyModeEnable = padapter->registrypriv.early_mode; +#endif + return _SUCCESS; } -void rtl8188eu_free_xmit_priv(struct adapter *adapt) +void rtl8188eu_free_xmit_priv(_adapter *padapter) { } -static u8 urb_zero_packet_chk(struct adapter *adapt, int sz) +u8 urb_zero_packet_chk(_adapter *padapter, int sz) { - u8 set_tx_desc_offset; - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - set_tx_desc_offset = (((sz + TXDESC_SIZE) % haldata->UsbBulkOutSize) == 0) ? 1 : 0; - - return set_tx_desc_offset; + u8 blnSetTxDescOffset; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + blnSetTxDescOffset = (((sz + TXDESC_SIZE) % pHalData->UsbBulkOutSize) ==0)?1:0; + + return blnSetTxDescOffset; } -static void rtl8188eu_cal_txdesc_chksum(struct tx_desc *ptxdesc) +void rtl8188eu_cal_txdesc_chksum(struct tx_desc *ptxdesc) { - u16 *usptr = (u16 *)ptxdesc; - u32 count = 16; /* (32 bytes / 2 bytes per XOR) => 16 times */ - u32 index; - u16 checksum = 0; + u16 *usPtr = (u16*)ptxdesc; + u32 count = 16; // (32 bytes / 2 bytes per XOR) => 16 times + u32 index; + u16 checksum = 0; - /* Clear first */ - ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); + //Clear first + ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); + + for(index = 0 ; index < count ; index++){ + checksum = checksum ^ le16_to_cpu(*(usPtr + index)); + } + + ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff&checksum); - for (index = 0; index < count; index++) - checksum = checksum ^ le16_to_cpu(*(__le16 *)(usptr + index)); - ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff & checksum); } - -/* Description: In normal chip, we should send some packet to Hw which will be used by Fw */ -/* in FW LPS mode. The function is to fill the Tx descriptor of this packets, then */ -/* Fw can tell Hw to send these packet derectly. */ -void rtl8188e_fill_fake_txdesc(struct adapter *adapt, u8 *desc, u32 BufferLen, u8 ispspoll, u8 is_btqosnull) +// +// Description: In normal chip, we should send some packet to Hw which will be used by Fw +// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then +// Fw can tell Hw to send these packet derectly. +// +void rtl8188e_fill_fake_txdesc( + PADAPTER padapter, + u8* pDesc, + u32 BufferLen, + u8 IsPsPoll, + u8 IsBTQosNull) { struct tx_desc *ptxdesc; - /* Clear all status */ - ptxdesc = (struct tx_desc *)desc; - _rtw_memset(desc, 0, TXDESC_SIZE); - /* offset 0 */ - ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); /* own, bFirstSeg, bLastSeg; */ + // Clear all status + ptxdesc = (struct tx_desc*)pDesc; + _rtw_memset(pDesc, 0, TXDESC_SIZE); - ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32( OWN | FSG | LSG); //own, bFirstSeg, bLastSeg; - ptxdesc->txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); /* Buffer size + command header */ + ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw1 |= cpu_to_le32((QSLT_MGNT<txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); // Buffer size + command header - /* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. */ - if (ispspoll) { + //offset 4 + ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<txdw1 |= cpu_to_le32(NAVUSEHDR); - } else { - ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); /* Hw set sequence number */ - ptxdesc->txdw3 |= cpu_to_le32((8 << 28)); /* set bit3 to 1. Suugested by TimChen. 2009.12.29. */ + } + else + { + ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number + ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. } - if (is_btqosnull) - ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); /* BT NULL */ + if (_TRUE == IsBTQosNull) + { + ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); // BT NULL + } - /* offset 16 */ - ptxdesc->txdw4 |= cpu_to_le32(BIT(8));/* driver uses rate */ + //offset 16 + ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate - /* USB interface drop packet if the checksum of descriptor isn't correct. */ - /* Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). */ +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + // USB interface drop packet if the checksum of descriptor isn't correct. + // Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). rtl8188eu_cal_txdesc_chksum(ptxdesc); +#endif } -static void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc) +void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc) { - if ((pattrib->encrypt > 0) && !pattrib->bswenc) { - switch (pattrib->encrypt) { - /* SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES */ - case _WEP40_: - case _WEP104_: - ptxdesc->txdw1 |= cpu_to_le32((0x01<txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); - break; - case _TKIP_: - case _TKIP_WTMIC_: - ptxdesc->txdw1 |= cpu_to_le32((0x01<txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); - break; - case _AES_: - ptxdesc->txdw1 |= cpu_to_le32((0x03<txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); - break; - case _NO_PRIVACY_: - default: - break; + if ((pattrib->encrypt > 0) && !pattrib->bswenc) + { + switch (pattrib->encrypt) + { + //SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES + case _WEP40_: + case _WEP104_: + ptxdesc->txdw1 |= cpu_to_le32((0x01<txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); + break; + case _TKIP_: + case _TKIP_WTMIC_: + ptxdesc->txdw1 |= cpu_to_le32((0x01<txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); + break; +#ifdef CONFIG_WAPI_SUPPORT + case _SMS4_: + ptxdesc->txdw1 |= cpu_to_le32((0x02<txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); + break; +#endif + case _AES_: + ptxdesc->txdw1 |= cpu_to_le32((0x03<txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); + break; + case _NO_PRIVACY_: + default: + break; + } + } + } -static void fill_txdesc_vcs(struct pkt_attrib *pattrib, __le32 *pdw) +void fill_txdesc_vcs(struct pkt_attrib *pattrib, u32 *pdw) { - switch (pattrib->vcs_mode) { - case RTS_CTS: - *pdw |= cpu_to_le32(RTS_EN); - break; - case CTS_TO_SELF: - *pdw |= cpu_to_le32(CTS_2_SELF); - break; - case NONE_VCS: - default: - break; - } - if (pattrib->vcs_mode) { - *pdw |= cpu_to_le32(HW_RTS_EN); - /* Set RTS BW */ - if (pattrib->ht_en) { - *pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40) ? cpu_to_le32(BIT(27)) : 0; + //DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode); - if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) - *pdw |= cpu_to_le32((0x01 << 28) & 0x30000000); - else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) - *pdw |= cpu_to_le32((0x02 << 28) & 0x30000000); - else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) + switch(pattrib->vcs_mode) + { + case RTS_CTS: + *pdw |= cpu_to_le32(RTS_EN); + break; + case CTS_TO_SELF: + *pdw |= cpu_to_le32(CTS_2_SELF); + break; + case NONE_VCS: + default: + break; + } + + if(pattrib->vcs_mode) { + *pdw |= cpu_to_le32(HW_RTS_EN); + + // Set RTS BW + if(pattrib->ht_en) + { + *pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)? cpu_to_le32(BIT(27)):0; + + if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) + *pdw |= cpu_to_le32((0x01<<28)&0x30000000); + else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) + *pdw |= cpu_to_le32((0x02<<28)&0x30000000); + else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) *pdw |= 0; else - *pdw |= cpu_to_le32((0x03 << 28) & 0x30000000); + *pdw |= cpu_to_le32((0x03<<28)&0x30000000); } } } -static void fill_txdesc_phy(struct pkt_attrib *pattrib, __le32 *pdw) +void fill_txdesc_phy(struct pkt_attrib *pattrib, u32 *pdw) { - if (pattrib->ht_en) { - *pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40) ? cpu_to_le32(BIT(25)) : 0; + //DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); - if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) - *pdw |= cpu_to_le32((0x01 << DATA_SC_SHT) & 0x003f0000); - else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) - *pdw |= cpu_to_le32((0x02 << DATA_SC_SHT) & 0x003f0000); - else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) + if(pattrib->ht_en) + { + *pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)? cpu_to_le32(BIT(25)):0; + + if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) + *pdw |= cpu_to_le32((0x01<ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) + *pdw |= cpu_to_le32((0x02<ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) *pdw |= 0; else - *pdw |= cpu_to_le32((0x03 << DATA_SC_SHT) & 0x003f0000); + *pdw |= cpu_to_le32((0x03<padapter; - struct pkt_attrib *pattrib = &pxmitframe->attrib; - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - struct tx_desc *ptxdesc = (struct tx_desc *)pmem; - struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - int bmcst = IS_MCAST(pattrib->ra); - if (adapt->registrypriv.mp_mode == 0) { - if ((!bagg_pkt) && (urb_zero_packet_chk(adapt, sz) == 0)) { - ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ); - pull = 1; - } +static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bagg_pkt) +{ + int pull=0; + uint qsel; + u8 data_rate,pwr_status,offset; + _adapter *padapter = pxmitframe->padapter; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct pkt_attrib *pattrib = &pxmitframe->attrib; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + //struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct tx_desc *ptxdesc = (struct tx_desc *)pmem; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + sint bmcst = IS_MCAST(pattrib->ra); + +#ifdef CONFIG_P2P + struct wifidirect_info* pwdinfo = &padapter->wdinfo; +#endif //CONFIG_P2P + +#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX +if (padapter->registrypriv.mp_mode == 0) +{ + if((!bagg_pkt) &&(urb_zero_packet_chk(padapter, sz)==0))//(sz %512) != 0 + //if((!bagg_pkt) &&(rtw_usb_bulk_size_boundary(padapter,TXDESC_SIZE+sz)==_FALSE)) + { + ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ); + //DBG_8192C("==> non-agg-pkt,shift pointer...\n"); + pull = 1; } +} +#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX _rtw_memset(ptxdesc, 0, sizeof(struct tx_desc)); - - /* 4 offset 0 */ + + //4 offset 0 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); - ptxdesc->txdw0 |= cpu_to_le32(sz & 0x0000ffff);/* update TXPKTSIZE */ + //DBG_8192C("%s==> pkt_len=%d,bagg_pkt=%02x\n",__FUNCTION__,sz,bagg_pkt); + ptxdesc->txdw0 |= cpu_to_le32(sz & 0x0000ffff);//update TXPKTSIZE + + offset = TXDESC_SIZE + OFFSET_SZ; - offset = TXDESC_SIZE + OFFSET_SZ; + #ifdef CONFIG_TX_EARLY_MODE + if(bagg_pkt){ + offset += EARLY_MODE_INFO_SIZE ;//0x28 + } + #endif + //DBG_8192C("%s==>offset(0x%02x) \n",__FUNCTION__,offset); + ptxdesc->txdw0 |= cpu_to_le32(((offset) << OFFSET_SHT) & 0x00ff0000);//32 bytes for TX Desc - ptxdesc->txdw0 |= cpu_to_le32(((offset) << OFFSET_SHT) & 0x00ff0000);/* 32 bytes for TX Desc */ + if (bmcst) ptxdesc->txdw0 |= cpu_to_le32(BMC); - if (bmcst) - ptxdesc->txdw0 |= cpu_to_le32(BMC); - - if (adapt->registrypriv.mp_mode == 0) { - if (!bagg_pkt) { - if ((pull) && (pxmitframe->pkt_offset > 0)) - pxmitframe->pkt_offset = pxmitframe->pkt_offset - 1; +#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX +if (padapter->registrypriv.mp_mode == 0) +{ + if(!bagg_pkt){ + if((pull) && (pxmitframe->pkt_offset>0)) { + pxmitframe->pkt_offset = pxmitframe->pkt_offset -1; } } +} +#endif + //DBG_8192C("%s, pkt_offset=0x%02x\n",__FUNCTION__,pxmitframe->pkt_offset); - /* pkt_offset, unit:8 bytes padding */ + // pkt_offset, unit:8 bytes padding if (pxmitframe->pkt_offset > 0) ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000); - /* driver uses rate */ - ptxdesc->txdw4 |= cpu_to_le32(USERATE);/* rate control always by driver */ + //driver uses rate + ptxdesc->txdw4 |= cpu_to_le32(USERATE);//rate control always by driver - if ((pxmitframe->frame_tag & 0x0f) == DATA_FRAMETAG) { - /* offset 4 */ - ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id & 0x3F); + if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) + { + //DBG_8192C("pxmitframe->frame_tag == DATA_FRAMETAG\n"); + + //offset 4 + ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x3F); qsel = (uint)(pattrib->qsel & 0x0000001f); + //DBG_8192C("==> macid(%d) qsel:0x%02x \n",pattrib->mac_id,qsel); ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); - ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000F0000); + ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< RATE_ID_SHT) & 0x000F0000); fill_txdesc_sectype(pattrib, ptxdesc); - if (pattrib->ampdu_en) { - ptxdesc->txdw2 |= cpu_to_le32(AGG_EN);/* AGG EN */ - ptxdesc->txdw6 = cpu_to_le32(0x6666f800); - } else { - ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);/* AGG BK */ + if(pattrib->ampdu_en==_TRUE){ + ptxdesc->txdw2 |= cpu_to_le32(AGG_EN);//AGG EN + + //SET_TX_DESC_MAX_AGG_NUM_88E(pDesc, 0x1F); + //SET_TX_DESC_MCSG1_MAX_LEN_88E(pDesc, 0x6); + //SET_TX_DESC_MCSG2_MAX_LEN_88E(pDesc, 0x6); + //SET_TX_DESC_MCSG3_MAX_LEN_88E(pDesc, 0x6); + //SET_TX_DESC_MCS7_SGI_MAX_LEN_88E(pDesc, 0x6); + ptxdesc->txdw6 = 0x6666f800; } + else{ + ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);//AGG BK + } + + //offset 8 + - /* offset 8 */ + //offset 12 + ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<< SEQ_SHT)&0x0FFF0000); - /* offset 12 */ - ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0FFF0000); - /* offset 16 , offset 20 */ + //offset 16 , offset 20 if (pattrib->qos_en) - ptxdesc->txdw4 |= cpu_to_le32(QOS);/* QoS */ + ptxdesc->txdw4 |= cpu_to_le32(QOS);//QoS - /* offset 20 */ - if (pxmitframe->agg_num > 1) + //offset 20 + #ifdef CONFIG_USB_TX_AGGREGATION + if (pxmitframe->agg_num > 1){ + //DBG_8192C("%s agg_num:%d\n",__FUNCTION__,pxmitframe->agg_num ); ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << USB_TXAGG_NUM_SHT) & 0xFF000000); + } + #endif if ((pattrib->ether_type != 0x888e) && (pattrib->ether_type != 0x0806) && (pattrib->ether_type != 0x88b4) && - (pattrib->dhcp_pkt != 1)) { - /* Non EAP & ARP & DHCP type data packet */ - + (pattrib->dhcp_pkt != 1)) + { + //Non EAP & ARP & DHCP type data packet + fill_txdesc_vcs(pattrib, &ptxdesc->txdw4); fill_txdesc_phy(pattrib, &ptxdesc->txdw4); - ptxdesc->txdw4 |= cpu_to_le32(0x00000008);/* RTS Rate=24M */ - ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);/* DATA/RTS Rate FB LMT */ + ptxdesc->txdw4 |= cpu_to_le32(0x00000008);//RTS Rate=24M + ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);//DATA/RTS Rate FB LMT - if (pattrib->ht_en) { - if (ODM_RA_GetShortGI_8188E(&haldata->odmpriv, pattrib->mac_id)) - ptxdesc->txdw5 |= cpu_to_le32(SGI);/* SGI */ + #if (RATE_ADAPTIVE_SUPPORT == 1) + if(pattrib->ht_en){ + if( ODM_RA_GetShortGI_8188E(&pHalData->odmpriv,pattrib->mac_id)) + ptxdesc->txdw5 |= cpu_to_le32(SGI);//SGI } - data_rate = ODM_RA_GetDecisionRate_8188E(&haldata->odmpriv, pattrib->mac_id); - ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F); - pwr_status = ODM_RA_GetHwPwrStatus_8188E(&haldata->odmpriv, pattrib->mac_id); - ptxdesc->txdw4 |= cpu_to_le32((pwr_status & 0x7) << PWR_STATUS_SHT); - } else { - /* EAP data packet and ARP packet and DHCP. */ - /* Use the 1M data rate to send the EAP/ARP packet. */ - /* This will maybe make the handshake smooth. */ - ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);/* AGG BK */ + + data_rate =ODM_RA_GetDecisionRate_8188E(&pHalData->odmpriv,pattrib->mac_id); + //for debug + #if 1 + if(padapter->fix_rate!= 0xFF){ + + data_rate = padapter->fix_rate; + ptxdesc->txdw4 |= cpu_to_le32(DISDATAFB); + //printk("==> fix data_rate:0x%02x\n",data_rate); + } + #endif + + ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F); + + #if (POWER_TRAINING_ACTIVE==1) + pwr_status = ODM_RA_GetHwPwrStatus_8188E(&pHalData->odmpriv,pattrib->mac_id); + ptxdesc->txdw4 |=cpu_to_le32( (pwr_status & 0x7)<< PWR_STATUS_SHT); + #endif //(POWER_TRAINING_ACTIVE==1) + #else//if (RATE_ADAPTIVE_SUPPORT == 1) + + if(pattrib->ht_en) + ptxdesc->txdw5 |= cpu_to_le32(SGI);//SGI + + data_rate = 0x13; //default rate: MCS7 + if(padapter->fix_rate!= 0xFF){//rate control by iwpriv + data_rate = padapter->fix_rate; + ptxdesc->txdw4 | cpu_to_le32(DISDATAFB); + } + ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F); + + #endif//if (RATE_ADAPTIVE_SUPPORT == 1) + + } + else + { + // EAP data packet and ARP packet and DHCP. + // Use the 1M data rate to send the EAP/ARP packet. + // This will maybe make the handshake smooth. + + ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);//AGG BK + if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) - ptxdesc->txdw4 |= cpu_to_le32(BIT(24));/* DATA_SHORT */ + ptxdesc->txdw4 |= cpu_to_le32(BIT(24));// DATA_SHORT + ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); } - } else if ((pxmitframe->frame_tag&0x0f) == MGNT_FRAMETAG) { - /* offset 4 */ - ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id & 0x3f); +#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX + //offset 24 + if ( pattrib->hw_tcp_csum == 1 ) { + // ptxdesc->txdw6 = 0; // clear TCP_CHECKSUM and IP_CHECKSUM. It's zero already!! + u8 ip_hdr_offset = 32 + pattrib->hdrlen + pattrib->iv_len + 8; + ptxdesc->txdw7 = (1 << 31) | (ip_hdr_offset << 16); + DBG_8192C("ptxdesc->txdw7 = %08x\n", ptxdesc->txdw7); + } +#endif + } + else if((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG) + { + //DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n"); + + //offset 4 + ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x3f); + qsel = (uint)(pattrib->qsel&0x0000001f); - ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); + ptxdesc->txdw1 |= cpu_to_le32((qsel<txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000f0000); - - /* offset 8 */ - /* CCX-TXRPT ack for xmit mgmt frames. */ - if (pxmitframe->ack_report) + ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< RATE_ID_SHT) & 0x000f0000); + + //fill_txdesc_sectype(pattrib, ptxdesc); + + //offset 8 +#ifdef CONFIG_XMIT_ACK + //CCX-TXRPT ack for xmit mgmt frames. + if (pxmitframe->ack_report) { + #ifdef DBG_CCX + static u16 ccx_sw = 0x123; + ptxdesc->txdw7 |= cpu_to_le32(((ccx_sw)<<16)&0x0fff0000); + DBG_871X("%s set ccx, sw:0x%03x\n", __func__, ccx_sw); + ccx_sw = (ccx_sw+1)%0xfff; + #endif ptxdesc->txdw2 |= cpu_to_le32(BIT(19)); + } +#endif //CONFIG_XMIT_ACK - /* offset 12 */ + //offset 12 ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<txdw5 |= cpu_to_le32(RTY_LMT_EN);/* retry limit enable */ - if (pattrib->retry_ctrl) - ptxdesc->txdw5 |= cpu_to_le32(0x00180000);/* retry limit = 6 */ + + //offset 20 + ptxdesc->txdw5 |= cpu_to_le32(RTY_LMT_EN);//retry limit enable + if(pattrib->retry_ctrl == _TRUE) + ptxdesc->txdw5 |= cpu_to_le32(0x00180000);//retry limit = 6 else - ptxdesc->txdw5 |= cpu_to_le32(0x00300000);/* retry limit = 12 */ + ptxdesc->txdw5 |= cpu_to_le32(0x00300000);//retry limit = 12 - ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); - } else if ((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG) { - DBG_88E("pxmitframe->frame_tag == TXAGG_FRAMETAG\n"); - } else if (((pxmitframe->frame_tag&0x0f) == MP_FRAMETAG) && - (adapt->registrypriv.mp_mode == 1)) { - fill_txdesc_for_mp(adapt, ptxdesc); - } else { - DBG_88E("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag); +#ifdef CONFIG_INTEL_PROXIM + if((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){ + DBG_871X("\n %s pattrib->rate=%d\n",__FUNCTION__,pattrib->rate); + ptxdesc->txdw5 |= cpu_to_le32( pattrib->rate); + } + else +#endif + { + ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); + } + } + else if((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG) + { + DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n"); + } + else + { + DBG_8192C("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag); - /* offset 4 */ - ptxdesc->txdw1 |= cpu_to_le32((4) & 0x3f);/* CAM_ID(MAC_ID) */ + //offset 4 + ptxdesc->txdw1 |= cpu_to_le32((4)&0x3f);//CAM_ID(MAC_ID) - ptxdesc->txdw1 |= cpu_to_le32((6 << RATE_ID_SHT) & 0x000f0000);/* raid */ + ptxdesc->txdw1 |= cpu_to_le32((6<< RATE_ID_SHT) & 0x000f0000);//raid - /* offset 8 */ + //offset 8 - /* offset 12 */ + //offset 12 ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); } - /* 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. */ - /* (1) The sequence number of each non-Qos frame / broadcast / multicast / */ - /* mgnt frame should be controlled by Hw because Fw will also send null data */ - /* which we cannot control when Fw LPS enable. */ - /* --> default enable non-Qos data sequense number. 2010.06.23. by tynli. */ - /* (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. */ - /* (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. */ - /* 2010.06.23. Added by tynli. */ - if (!pattrib->qos_en) { - ptxdesc->txdw3 |= cpu_to_le32(EN_HWSEQ); /* Hw set sequence number */ - ptxdesc->txdw4 |= cpu_to_le32(HW_SSN); /* Hw set sequence number */ + // 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. + // (1) The sequence number of each non-Qos frame / broadcast / multicast / + // mgnt frame should be controled by Hw because Fw will also send null data + // which we cannot control when Fw LPS enable. + // --> default enable non-Qos data sequense number. 2010.06.23. by tynli. + // (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. + // (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. + // 2010.06.23. Added by tynli. + if(!pattrib->qos_en) + { + //ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number + //ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. + + ptxdesc->txdw3 |= cpu_to_le32(EN_HWSEQ); // Hw set sequence number + ptxdesc->txdw4 |= cpu_to_le32(HW_SSN); // Hw set sequence number + } - ODM_SetTxAntByTxInfo_88E(&haldata->odmpriv, pmem, pattrib->mac_id); +#ifdef CONFIG_HW_ANTENNA_DIVERSITY //CONFIG_ANTENNA_DIVERSITY + ODM_SetTxAntByTxInfo_88E(&pHalData->odmpriv, pmem, pattrib->mac_id); +#endif rtl8188eu_cal_txdesc_chksum(ptxdesc); - _dbg_dump_tx_info(adapt, pxmitframe->frame_tag, ptxdesc); + _dbg_dump_tx_info(padapter,pxmitframe->frame_tag,ptxdesc); return pull; + } -/* for non-agg data frame or management frame */ -static s32 rtw_dump_xframe(struct adapter *adapt, struct xmit_frame *pxmitframe) + +#ifdef CONFIG_XMIT_THREAD_MODE +/* + * Description + * Transmit xmitbuf to hardware tx fifo + * + * Return + * _SUCCESS ok + * _FAIL something error + */ +s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter) +{ + //PHAL_DATA_TYPE phal; + struct xmit_priv *pxmitpriv; + struct xmit_buf *pxmitbuf; + s32 ret; + + + //phal = GET_HAL_DATA(padapter); + pxmitpriv = &padapter->xmitpriv; + + ret = _rtw_down_sema(&pxmitpriv->xmit_sema); + if (_FAIL == ret) { + RT_TRACE(_module_hal_xmit_c_, _drv_emerg_, + ("%s: down SdioXmitBufSema fail!\n", __FUNCTION__)); + return _FAIL; + } + + ret = (padapter->bDriverStopped == _TRUE) || (padapter->bSurpriseRemoved == _TRUE); + if (ret) { + RT_TRACE(_module_hal_xmit_c_, _drv_notice_, + ("%s: bDriverStopped(%d) bSurpriseRemoved(%d)!\n", + __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved)); + return _FAIL; + } + + if(check_pending_xmitbuf(pxmitpriv) == _FALSE) + return _SUCCESS; + +#ifdef CONFIG_LPS_LCLK + ret = rtw_register_tx_alive(padapter); + if (ret != _SUCCESS) { + RT_TRACE(_module_hal_xmit_c_, _drv_notice_, + ("%s: wait to leave LPS_LCLK\n", __FUNCTION__)); + return _SUCCESS; + } +#endif + + do { + pxmitbuf = dequeue_pending_xmitbuf(pxmitpriv); + if (pxmitbuf == NULL) break; + + rtw_write_port(padapter, pxmitbuf->ff_hwaddr, pxmitbuf->len, (unsigned char*)pxmitbuf); + + } while (1); + +#ifdef CONFIG_LPS_LCLK + rtw_unregister_tx_alive(padapter); +#endif + + return _SUCCESS; +} +#endif + +#ifdef CONFIG_IOL_IOREG_CFG_DBG +#include +#endif +//for non-agg data frame or management frame +static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe) { s32 ret = _SUCCESS; s32 inner_ret = _SUCCESS; - int t, sz, w_sz, pull = 0; + int t, sz, w_sz, pull=0; u8 *mem_addr; u32 ff_hwaddr; struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf; struct pkt_attrib *pattrib = &pxmitframe->attrib; - struct xmit_priv *pxmitpriv = &adapt->xmitpriv; - struct security_priv *psecuritypriv = &adapt->securitypriv; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct security_priv *psecuritypriv = &padapter->securitypriv; +#ifdef CONFIG_80211N_HT if ((pxmitframe->frame_tag == DATA_FRAMETAG) && (pxmitframe->attrib.ether_type != 0x0806) && (pxmitframe->attrib.ether_type != 0x888e) && (pxmitframe->attrib.ether_type != 0x88b4) && (pxmitframe->attrib.dhcp_pkt != 1)) - rtw_issue_addbareq_cmd(adapt, pxmitframe); + { + rtw_issue_addbareq_cmd(padapter, pxmitframe); + } +#endif //CONFIG_80211N_HT mem_addr = pxmitframe->buf_addr; - RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_dump_xframe()\n")); - - for (t = 0; t < pattrib->nr_frags; t++) { + RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_dump_xframe()\n")); + + for (t = 0; t < pattrib->nr_frags; t++) + { if (inner_ret != _SUCCESS && ret == _SUCCESS) ret = _FAIL; - - if (t != (pattrib->nr_frags - 1)) { - RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("pattrib->nr_frags=%d\n", pattrib->nr_frags)); + + if (t != (pattrib->nr_frags - 1)) + { + RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("pattrib->nr_frags=%d\n", pattrib->nr_frags)); sz = pxmitpriv->frag_len; - sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len); - } else { - /* no frag */ + sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len); + } + else //no frag + { sz = pattrib->last_txcmdsz; } - pull = update_txdesc(pxmitframe, mem_addr, sz, false); - - if (pull) { - mem_addr += PACKET_OFFSET_SZ; /* pull txdesc head */ + pull = update_txdesc(pxmitframe, mem_addr, sz, _FALSE); + + if(pull) + { + mem_addr += PACKET_OFFSET_SZ; //pull txdesc head + + //pxmitbuf ->pbuf = mem_addr; pxmitframe->buf_addr = mem_addr; + w_sz = sz + TXDESC_SIZE; - } else { - w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ; } + else + { + w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ; + } +#ifdef CONFIG_IOL_IOREG_CFG_DBG + rtw_IOL_cmd_buf_dump(padapter,w_sz,pxmitframe->buf_addr); +#endif ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); - inner_ret = rtw_write_port(adapt, ff_hwaddr, w_sz, (unsigned char *)pxmitbuf); +#ifdef CONFIG_XMIT_THREAD_MODE + pxmitbuf->len = w_sz; + pxmitbuf->ff_hwaddr = ff_hwaddr; + enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); +#else + inner_ret = rtw_write_port(padapter, ff_hwaddr, w_sz, (unsigned char*)pxmitbuf); +#endif - rtw_count_tx_stats(adapt, pxmitframe, sz); + rtw_count_tx_stats(padapter, pxmitframe, sz); - RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_write_port, w_sz=%d\n", w_sz)); + RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_write_port, w_sz=%d\n", w_sz)); + //DBG_8192C("rtw_write_port, w_sz=%d, sz=%d, txdesc_sz=%d, tid=%d\n", w_sz, sz, w_sz-sz, pattrib->priority); mem_addr += w_sz; - mem_addr = (u8 *)RND4(((size_t)(mem_addr))); + mem_addr = (u8 *)RND4(((SIZE_PTR)(mem_addr))); + } - + rtw_free_xmitframe(pxmitpriv, pxmitframe); - + if (ret != _SUCCESS) rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN); - + return ret; } +#ifdef CONFIG_USB_TX_AGGREGATION static u32 xmitframe_need_length(struct xmit_frame *pxmitframe) { struct pkt_attrib *pattrib = &pxmitframe->attrib; - u32 len = 0; + u32 len = 0; - /* no consider fragement */ + // no consider fragement len = pattrib->hdrlen + pattrib->iv_len + SNAP_SIZE + sizeof(u16) + pattrib->pktlen + ((pattrib->bswenc) ? pattrib->icv_len : 0); - if (pattrib->encrypt == _TKIP_) + if(pattrib->encrypt ==_TKIP_) len += 8; return len; } -s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) +#define IDEA_CONDITION 1 // check all packets before enqueue +s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); struct xmit_frame *pxmitframe = NULL; struct xmit_frame *pfirstframe = NULL; - /* aggregate variable */ + // aggregate variable struct hw_xmit *phwxmit; struct sta_info *psta = NULL; struct tx_servq *ptxservq = NULL; - struct list_head *xmitframe_plist = NULL, *xmitframe_phead = NULL; - u32 pbuf; /* next pkt address */ - u32 pbuf_tail; /* last pkt tail */ - u32 len; /* packet length, except TXDESC_SIZE and PKT_OFFSET */ + _irqL irqL; + _list *xmitframe_plist = NULL, *xmitframe_phead = NULL; - u32 bulksize = haldata->UsbBulkOutSize; - u8 desc_cnt; - u32 bulkptr; + u32 pbuf; // next pkt address + u32 pbuf_tail; // last pkt tail + u32 len; // packet length, except TXDESC_SIZE and PKT_OFFSET - /* dump frame variable */ + u32 bulkSize = pHalData->UsbBulkOutSize; + u8 descCount; + u32 bulkPtr; + + // dump frame variable u32 ff_hwaddr; +#ifndef IDEA_CONDITION + int res = _SUCCESS; +#endif + RT_TRACE(_module_rtl8192c_xmit_c_, _drv_info_, ("+xmitframe_complete\n")); - /* check xmitbuffer is ok */ + + // check xmitbuffer is ok if (pxmitbuf == NULL) { pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); - if (pxmitbuf == NULL) - return false; + if (pxmitbuf == NULL){ + //DBG_871X("%s #1, connot alloc xmitbuf!!!! \n",__FUNCTION__); + return _FALSE; + } } - /* 3 1. pick up first frame */ +//DBG_8192C("%s ===================================== \n",__FUNCTION__); + //3 1. pick up first frame do { rtw_free_xmitframe(pxmitpriv, pxmitframe); - + pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); if (pxmitframe == NULL) { - /* no more xmit frame, release xmit buffer */ + // no more xmit frame, release xmit buffer + //DBG_8192C("no more xmit frame ,return\n"); rtw_free_xmitbuf(pxmitpriv, pxmitbuf); - return false; + return _FALSE; } +#ifndef IDEA_CONDITION + if (pxmitframe->frame_tag != DATA_FRAMETAG) { + RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, + ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n", + pxmitframe->frame_tag, DATA_FRAMETAG)); +// rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } + + // TID 0~15 + if ((pxmitframe->attrib.priority < 0) || + (pxmitframe->attrib.priority > 15)) { + RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, + ("xmitframe_complete: TID(%d) should be 0~15!\n", + pxmitframe->attrib.priority)); +// rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } +#endif + //DBG_8192C("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); pxmitframe->pxmitbuf = pxmitbuf; pxmitframe->buf_addr = pxmitbuf->pbuf; pxmitbuf->priv_data = pxmitframe; - pxmitframe->agg_num = 1; /* alloc xmitframe should assign to 1. */ - pxmitframe->pkt_offset = 1; /* first frame of aggregation, reserve offset */ + pxmitframe->agg_num = 1; // alloc xmitframe should assign to 1. + #ifdef CONFIG_TX_EARLY_MODE + pxmitframe->pkt_offset = 2; // first frame of aggregation, reserve one offset for EM info ,another for usb bulk-out block check + #else + pxmitframe->pkt_offset = 1; // first frame of aggregation, reserve offset + #endif - rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe); + if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == _FALSE) { + DBG_871X("%s coalesce 1st xmitframe failed \n",__FUNCTION__); + continue; + } - /* always return ndis_packet after rtw_xmitframe_coalesce */ - rtw_os_xmit_complete(adapt, pxmitframe); + // always return ndis_packet after rtw_xmitframe_coalesce + rtw_os_xmit_complete(padapter, pxmitframe); break; } while (1); - /* 3 2. aggregate same priority and same DA(AP or STA) frames */ + //3 2. aggregate same priority and same DA(AP or STA) frames pfirstframe = pxmitframe; - len = xmitframe_need_length(pfirstframe) + TXDESC_SIZE + (pfirstframe->pkt_offset*PACKET_OFFSET_SZ); + len = xmitframe_need_length(pfirstframe) + TXDESC_SIZE+(pfirstframe->pkt_offset*PACKET_OFFSET_SZ); pbuf_tail = len; pbuf = _RND8(pbuf_tail); - /* check pkt amount in one bulk */ - desc_cnt = 0; - bulkptr = bulksize; - if (pbuf < bulkptr) { - desc_cnt++; - } else { - desc_cnt = 0; - bulkptr = ((pbuf / bulksize) + 1) * bulksize; /* round to next bulksize */ + // check pkt amount in one bulk + descCount = 0; + bulkPtr = bulkSize; + if (pbuf < bulkPtr) + descCount++; + else { + descCount = 0; + bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; // round to next bulkSize } - /* dequeue same priority packet from station tx queue */ - psta = pfirstframe->attrib.psta; - switch (pfirstframe->attrib.priority) { - case 1: - case 2: - ptxservq = &(psta->sta_xmitpriv.bk_q); - phwxmit = pxmitpriv->hwxmits + 3; - break; - case 4: - case 5: - ptxservq = &(psta->sta_xmitpriv.vi_q); - phwxmit = pxmitpriv->hwxmits + 1; - break; - case 6: - case 7: - ptxservq = &(psta->sta_xmitpriv.vo_q); - phwxmit = pxmitpriv->hwxmits; - break; - case 0: - case 3: - default: - ptxservq = &(psta->sta_xmitpriv.be_q); - phwxmit = pxmitpriv->hwxmits + 2; - break; + // dequeue same priority packet from station tx queue + //psta = pfirstframe->attrib.psta; + psta = rtw_get_stainfo(&padapter->stapriv, pfirstframe->attrib.ra); + if(pfirstframe->attrib.psta != psta){ + DBG_871X("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pfirstframe->attrib.psta, psta); } - spin_lock_bh(&pxmitpriv->lock); + if (psta == NULL) { + DBG_8192C("rtw_xmit_classifier: psta == NULL\n"); + } + if(!(psta->state &_FW_LINKED)){ + DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); + } + + switch (pfirstframe->attrib.priority) { + case 1: + case 2: + ptxservq = &(psta->sta_xmitpriv.bk_q); + phwxmit = pxmitpriv->hwxmits + 3; + break; + + case 4: + case 5: + ptxservq = &(psta->sta_xmitpriv.vi_q); + phwxmit = pxmitpriv->hwxmits + 1; + break; + + case 6: + case 7: + ptxservq = &(psta->sta_xmitpriv.vo_q); + phwxmit = pxmitpriv->hwxmits; + break; + + case 0: + case 3: + default: + ptxservq = &(psta->sta_xmitpriv.be_q); + phwxmit = pxmitpriv->hwxmits + 2; + break; + } +//DBG_8192C("==> pkt_no=%d,pkt_len=%d,len=%d,RND8_LEN=%d,pkt_offset=0x%02x\n", + //pxmitframe->agg_num,pxmitframe->attrib.last_txcmdsz,len,pbuf,pxmitframe->pkt_offset ); + + _enter_critical_bh(&pxmitpriv->lock, &irqL); xmitframe_phead = get_list_head(&ptxservq->sta_pending); xmitframe_plist = get_next(xmitframe_phead); - - while (!rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) { + + while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE) + { pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); xmitframe_plist = get_next(xmitframe_plist); - pxmitframe->agg_num = 0; /* not first frame of aggregation */ - pxmitframe->pkt_offset = 0; /* not first frame of aggregation, no need to reserve offset */ + pxmitframe->agg_num = 0; // not first frame of aggregation + #ifdef CONFIG_TX_EARLY_MODE + pxmitframe->pkt_offset = 1;// not first frame of aggregation,reserve offset for EM Info + #else + pxmitframe->pkt_offset = 0; // not first frame of aggregation, no need to reserve offset + #endif - len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE + (pxmitframe->pkt_offset*PACKET_OFFSET_SZ); - - if (_RND8(pbuf + len) > MAX_XMITBUF_SZ) { + len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE +(pxmitframe->pkt_offset*PACKET_OFFSET_SZ); + + if (_RND8(pbuf + len) > MAX_XMITBUF_SZ) + //if (_RND8(pbuf + len) > (MAX_XMITBUF_SZ/2))//to do : for TX TP finial tune , Georgia 2012-0323 + { + //DBG_8192C("%s....len> MAX_XMITBUF_SZ\n",__FUNCTION__); pxmitframe->agg_num = 1; - pxmitframe->pkt_offset = 1; - break; + pxmitframe->pkt_offset = 1; + break; } rtw_list_delete(&pxmitframe->list); ptxservq->qcnt--; phwxmit->accnt--; +#ifndef IDEA_CONDITION + // suppose only data frames would be in queue + if (pxmitframe->frame_tag != DATA_FRAMETAG) { + RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, + ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n", + pxmitframe->frame_tag, DATA_FRAMETAG)); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } + + // TID 0~15 + if ((pxmitframe->attrib.priority < 0) || + (pxmitframe->attrib.priority > 15)) { + RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, + ("xmitframe_complete: TID(%d) should be 0~15!\n", + pxmitframe->attrib.priority)); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } +#endif + +// pxmitframe->pxmitbuf = pxmitbuf; pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf; + + if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == _FALSE) { + DBG_871X("%s coalesce failed \n",__FUNCTION__); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } - rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe); - /* always return ndis_packet after rtw_xmitframe_coalesce */ - rtw_os_xmit_complete(adapt, pxmitframe); + //DBG_8192C("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); + // always return ndis_packet after rtw_xmitframe_coalesce + rtw_os_xmit_complete(padapter, pxmitframe); - /* (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz */ - update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz, true); - - /* don't need xmitframe any more */ + // (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz + update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz,_TRUE); + + // don't need xmitframe any more rtw_free_xmitframe(pxmitpriv, pxmitframe); - /* handle pointer and stop condition */ + // handle pointer and stop condition pbuf_tail = pbuf + len; pbuf = _RND8(pbuf_tail); + pfirstframe->agg_num++; +#ifdef CONFIG_TX_EARLY_MODE + pxmitpriv->agg_pkt[pfirstframe->agg_num-1].offset = _RND8(len); + pxmitpriv->agg_pkt[pfirstframe->agg_num-1].pkt_len = pxmitframe->attrib.last_txcmdsz; +#endif if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num) break; - if (pbuf < bulkptr) { - desc_cnt++; - if (desc_cnt == haldata->UsbTxAggDescNum) + if (pbuf < bulkPtr) { + descCount++; + if (descCount == pHalData->UsbTxAggDescNum) break; } else { - desc_cnt = 0; - bulkptr = ((pbuf / bulksize) + 1) * bulksize; + descCount = 0; + bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; } - } /* end while (aggregate same priority and same DA(AP or STA) frames) */ + }//end while( aggregate same priority and same DA(AP or STA) frames) - if (_rtw_queue_empty(&ptxservq->sta_pending) == true) + + if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE) rtw_list_delete(&ptxservq->tx_pending); - spin_unlock_bh(&pxmitpriv->lock); + _exit_critical_bh(&pxmitpriv->lock, &irqL); +#ifdef CONFIG_80211N_HT if ((pfirstframe->attrib.ether_type != 0x0806) && (pfirstframe->attrib.ether_type != 0x888e) && (pfirstframe->attrib.ether_type != 0x88b4) && (pfirstframe->attrib.dhcp_pkt != 1)) - rtw_issue_addbareq_cmd(adapt, pfirstframe); - /* 3 3. update first frame txdesc */ - if ((pbuf_tail % bulksize) == 0) { - /* remove pkt_offset */ + { + rtw_issue_addbareq_cmd(padapter, pfirstframe); + } +#endif //CONFIG_80211N_HT +#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX + //3 3. update first frame txdesc + if ((pbuf_tail % bulkSize) == 0) { + // remove pkt_offset pbuf_tail -= PACKET_OFFSET_SZ; pfirstframe->buf_addr += PACKET_OFFSET_SZ; pfirstframe->pkt_offset--; + //DBG_8192C("$$$$$ buf size equal to USB block size $$$$$$\n"); } +#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX - update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz, true); + update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz,_TRUE); + + #ifdef CONFIG_TX_EARLY_MODE + //prepare EM info for first frame, agg_num value start from 1 + pxmitpriv->agg_pkt[0].offset = _RND8(pfirstframe->attrib.last_txcmdsz +TXDESC_SIZE +(pfirstframe->pkt_offset*PACKET_OFFSET_SZ)); + pxmitpriv->agg_pkt[0].pkt_len = pfirstframe->attrib.last_txcmdsz;//get from rtw_xmitframe_coalesce - /* 3 4. write xmit buffer to USB FIFO */ + UpdateEarlyModeInfo8188E(pxmitpriv,pxmitbuf ); + #endif + + //3 4. write xmit buffer to USB FIFO ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe); - rtw_write_port(adapt, ff_hwaddr, pbuf_tail, (u8 *)pxmitbuf); +//DBG_8192C("%s ===================================== write port,buf_size(%d) \n",__FUNCTION__,pbuf_tail); + // xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr + rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8*)pxmitbuf); - /* 3 5. update statisitc */ + + //3 5. update statisitc pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE); pbuf_tail -= (pfirstframe->pkt_offset * PACKET_OFFSET_SZ); - - rtw_count_tx_stats(adapt, pfirstframe, pbuf_tail); + + + rtw_count_tx_stats(padapter, pfirstframe, pbuf_tail); rtw_free_xmitframe(pxmitpriv, pfirstframe); - return true; + return _TRUE; } -static s32 xmitframe_direct(struct adapter *adapt, struct xmit_frame *pxmitframe) +#else + +s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) +{ + + struct hw_xmit *phwxmits; + sint hwentry; + struct xmit_frame *pxmitframe=NULL; + int res=_SUCCESS, xcnt = 0; + + phwxmits = pxmitpriv->hwxmits; + hwentry = pxmitpriv->hwxmit_entry; + + RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete()\n")); + + if(pxmitbuf==NULL) + { + pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); + if(!pxmitbuf) + { + return _FALSE; + } + } + + + do + { + pxmitframe = rtw_dequeue_xframe(pxmitpriv, phwxmits, hwentry); + + if(pxmitframe) + { + pxmitframe->pxmitbuf = pxmitbuf; + + pxmitframe->buf_addr = pxmitbuf->pbuf; + + pxmitbuf->priv_data = pxmitframe; + + if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) + { + if(pxmitframe->attrib.priority<=15)//TID0~15 + { + res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); + } + //DBG_8192C("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); + rtw_os_xmit_complete(padapter, pxmitframe);//always return ndis_packet after rtw_xmitframe_coalesce + } + + + RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete(): rtw_dump_xframe\n")); + + + if(res == _SUCCESS) + { + rtw_dump_xframe(padapter, pxmitframe); + } + else + { + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + } + + xcnt++; + + } + else + { + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + return _FALSE; + } + + break; + + }while(0/*xcnt < (NR_XMITFRAME >> 3)*/); + + return _TRUE; + +} +#endif + + + +static s32 xmitframe_direct(_adapter *padapter, struct xmit_frame *pxmitframe) { s32 res = _SUCCESS; +//DBG_8192C("==> %s \n",__FUNCTION__); + + res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); + if (res == _SUCCESS) { + rtw_dump_xframe(padapter, pxmitframe); + } + else{ + DBG_8192C("==> %s xmitframe_coalsece failed\n",__FUNCTION__); + } - res = rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe); - if (res == _SUCCESS) - rtw_dump_xframe(adapt, pxmitframe); - else - DBG_88E("==> %s xmitframe_coalsece failed\n", __func__); return res; } /* * Return - * true dump packet directly - * false enqueue packet + * _TRUE dump packet directly + * _FALSE enqueue packet */ -static s32 pre_xmitframe(struct adapter *adapt, struct xmit_frame *pxmitframe) +static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe) { + _irqL irqL; s32 res; struct xmit_buf *pxmitbuf = NULL; - struct xmit_priv *pxmitpriv = &adapt->xmitpriv; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; struct pkt_attrib *pattrib = &pxmitframe->attrib; - struct mlme_priv *pmlmepriv = &adapt->mlmepriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +#ifdef CONFIG_CONCURRENT_MODE + PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; + struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); +#endif + + _enter_critical_bh(&pxmitpriv->lock, &irqL); - spin_lock_bh(&pxmitpriv->lock); +//DBG_8192C("==> %s \n",__FUNCTION__); - if (rtw_txframes_sta_ac_pending(adapt, pattrib) > 0) + if (rtw_txframes_sta_ac_pending(padapter, pattrib) > 0) + { + //DBG_8192C("enqueue AC(%d)\n",pattrib->priority); + goto enqueue; + } + + + if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) goto enqueue; - if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == true) +#ifdef CONFIG_CONCURRENT_MODE + if (check_fwstate(pbuddy_mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) goto enqueue; +#endif pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); if (pxmitbuf == NULL) goto enqueue; - spin_unlock_bh(&pxmitpriv->lock); + _exit_critical_bh(&pxmitpriv->lock, &irqL); pxmitframe->pxmitbuf = pxmitbuf; pxmitframe->buf_addr = pxmitbuf->pbuf; pxmitbuf->priv_data = pxmitframe; - if (xmitframe_direct(adapt, pxmitframe) != _SUCCESS) { + if (xmitframe_direct(padapter, pxmitframe) != _SUCCESS) { rtw_free_xmitbuf(pxmitpriv, pxmitbuf); rtw_free_xmitframe(pxmitpriv, pxmitframe); } - return true; + return _TRUE; enqueue: - res = rtw_xmitframe_enqueue(adapt, pxmitframe); - spin_unlock_bh(&pxmitpriv->lock); + res = rtw_xmitframe_enqueue(padapter, pxmitframe); + _exit_critical_bh(&pxmitpriv->lock, &irqL); if (res != _SUCCESS) { RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("pre_xmitframe: enqueue xmitframe fail\n")); rtw_free_xmitframe(pxmitpriv, pxmitframe); - /* Trick, make the statistics correct */ + // Trick, make the statistics correct pxmitpriv->tx_pkts--; pxmitpriv->tx_drop++; - return true; + return _TRUE; } - return false; + return _FALSE; } -s32 rtl8188eu_mgnt_xmit(struct adapter *adapt, struct xmit_frame *pmgntframe) +s32 rtl8188eu_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe) { - return rtw_dump_xframe(adapt, pmgntframe); + return rtw_dump_xframe(padapter, pmgntframe); } /* * Return - * true dump packet directly ok - * false temporary can't transmit packets to hardware + * _TRUE dump packet directly ok + * _FALSE temporary can't transmit packets to hardware */ -s32 rtl8188eu_hal_xmit(struct adapter *adapt, struct xmit_frame *pxmitframe) +s32 rtl8188eu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe) { - return pre_xmitframe(adapt, pxmitframe); + return pre_xmitframe(padapter, pxmitframe); } + +s32 rtl8188eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + s32 err; + + if ((err=rtw_xmitframe_enqueue(padapter, pxmitframe)) != _SUCCESS) + { + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + // Trick, make the statistics correct + pxmitpriv->tx_pkts--; + pxmitpriv->tx_drop++; + } + else + { + tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); + } + + return err; + +} + + +#ifdef CONFIG_HOSTAPD_MLME + +static void rtl8188eu_hostap_mgnt_xmit_cb(struct urb *urb) +{ + struct sk_buff *skb = (struct sk_buff *)urb->context; + + //DBG_8192C("%s\n", __FUNCTION__); + + rtw_skb_free(skb); +} + +s32 rtl8188eu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt) +{ + u16 fc; + int rc, len, pipe; + unsigned int bmcst, tid, qsel; + struct sk_buff *skb, *pxmit_skb; + struct urb *urb; + unsigned char *pxmitbuf; + struct tx_desc *ptxdesc; + struct rtw_ieee80211_hdr *tx_hdr; + struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; + struct net_device *pnetdev = padapter->pnetdev; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); + + + //DBG_8192C("%s\n", __FUNCTION__); + + skb = pkt; + + len = skb->len; + tx_hdr = (struct rtw_ieee80211_hdr *)(skb->data); + fc = le16_to_cpu(tx_hdr->frame_ctl); + bmcst = IS_MCAST(tx_hdr->addr1); + + if ((fc & RTW_IEEE80211_FCTL_FTYPE) != RTW_IEEE80211_FTYPE_MGMT) + goto _exit; + + pxmit_skb = rtw_skb_alloc(len + TXDESC_SIZE); + + if(!pxmit_skb) + goto _exit; + + pxmitbuf = pxmit_skb->data; + + urb = usb_alloc_urb(0, GFP_ATOMIC); + if (!urb) { + goto _exit; + } + + // ----- fill tx desc ----- + ptxdesc = (struct tx_desc *)pxmitbuf; + _rtw_memset(ptxdesc, 0, sizeof(*ptxdesc)); + + //offset 0 + ptxdesc->txdw0 |= cpu_to_le32(len&0x0000ffff); + ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32(OWN | FSG | LSG); + + if(bmcst) + { + ptxdesc->txdw0 |= cpu_to_le32(BIT(24)); + } + + //offset 4 + ptxdesc->txdw1 |= cpu_to_le32(0x00);//MAC_ID + + ptxdesc->txdw1 |= cpu_to_le32((0x12<txdw1 |= cpu_to_le32((0x06<< 16) & 0x000f0000);//b mode + + //offset 8 + + //offset 12 + ptxdesc->txdw3 |= cpu_to_le32((le16_to_cpu(tx_hdr->seq_ctl)<<16)&0xffff0000); + + //offset 16 + ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate + + //offset 20 + + + //HW append seq + ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number + ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. + + + rtl8188eu_cal_txdesc_chksum(ptxdesc); + // ----- end of fill tx desc ----- + + // + skb_put(pxmit_skb, len + TXDESC_SIZE); + pxmitbuf = pxmitbuf + TXDESC_SIZE; + _rtw_memcpy(pxmitbuf, skb->data, len); + + //DBG_8192C("mgnt_xmit, len=%x\n", pxmit_skb->len); + + + // ----- prepare urb for submit ----- + + //translate DMA FIFO addr to pipehandle + //pipe = ffaddr2pipehdl(pdvobj, MGT_QUEUE_INX); + pipe = usb_sndbulkpipe(pdvobj->pusbdev, pHalData->Queue2EPNum[(u8)MGT_QUEUE_INX]&0x0f); + + usb_fill_bulk_urb(urb, pdvobj->pusbdev, pipe, + pxmit_skb->data, pxmit_skb->len, rtl8192cu_hostap_mgnt_xmit_cb, pxmit_skb); + + urb->transfer_flags |= URB_ZERO_PACKET; + usb_anchor_urb(urb, &phostapdpriv->anchored); + rc = usb_submit_urb(urb, GFP_ATOMIC); + if (rc < 0) { + usb_unanchor_urb(urb); + kfree_skb(skb); + } + usb_free_urb(urb); + + +_exit: + + rtw_skb_free(skb); + return 0; + +} +#endif + diff --git a/hal/usb_halinit.c b/hal/usb_halinit.c old mode 100644 new mode 100755 index 55785b0..99620b6 --- a/hal/usb_halinit.c +++ b/hal/usb_halinit.c @@ -1,7 +1,7 @@ /****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * + * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. @@ -19,650 +19,1253 @@ ******************************************************************************/ #define _HCI_HAL_INIT_C_ +#include #include #include #include #include #include + +#ifdef CONFIG_IOL #include +#endif + +#ifndef CONFIG_USB_HCI + +#error "CONFIG_USB_HCI shall be on!\n" + +#endif + #include #include #include -#define HAL_MAC_ENABLE 1 -#define HAL_BB_ENABLE 1 -#define HAL_RF_ENABLE 1 +#ifdef CONFIG_EFUSE_CONFIG_FILE +#include +#include +#endif //CONFIG_EFUSE_CONFIG_FILE -static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe) -{ - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); +#if DISABLE_BB_RF + #define HAL_MAC_ENABLE 0 + #define HAL_BB_ENABLE 0 + #define HAL_RF_ENABLE 0 +#else + #define HAL_MAC_ENABLE 1 + #define HAL_BB_ENABLE 1 + #define HAL_RF_ENABLE 1 +#endif - switch (NumOutPipe) { - case 3: - haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ; - haldata->OutEpNumber = 3; - break; - case 2: - haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ; - haldata->OutEpNumber = 2; - break; - case 1: - haldata->OutEpQueueSel = TX_SELE_HQ; - haldata->OutEpNumber = 1; - break; - default: - break; + +static VOID +_ConfigNormalChipOutEP_8188E( + IN PADAPTER pAdapter, + IN u8 NumOutPipe + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + switch(NumOutPipe){ + case 3: + pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_LQ|TX_SELE_NQ; + pHalData->OutEpNumber=3; + break; + case 2: + pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_NQ; + pHalData->OutEpNumber=2; + break; + case 1: + pHalData->OutEpQueueSel=TX_SELE_HQ; + pHalData->OutEpNumber=1; + break; + default: + break; + } - DBG_88E("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __func__, haldata->OutEpQueueSel, haldata->OutEpNumber); + DBG_871X("%s OutEpQueueSel(0x%02x), OutEpNumber(%d) \n",__FUNCTION__,pHalData->OutEpQueueSel,pHalData->OutEpNumber ); + } -static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPipe, u8 NumOutPipe) +static BOOLEAN HalUsbSetQueuePipeMapping8188EUsb( + IN PADAPTER pAdapter, + IN u8 NumInPipe, + IN u8 NumOutPipe + ) { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - bool result = false; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN result = _FALSE; - _ConfigNormalChipOutEP_8188E(adapt, NumOutPipe); - - /* Normal chip with one IN and one OUT doesn't have interrupt IN EP. */ - if (1 == haldata->OutEpNumber) { - if (1 != NumInPipe) + _ConfigNormalChipOutEP_8188E(pAdapter, NumOutPipe); + + // Normal chip with one IN and one OUT doesn't have interrupt IN EP. + if(1 == pHalData->OutEpNumber){ + if(1 != NumInPipe){ return result; + } } - /* All config other than above support one Bulk IN and one Interrupt IN. */ - - result = Hal_MappingOutPipe(adapt, NumOutPipe); + // All config other than above support one Bulk IN and one Interrupt IN. + //if(2 != NumInPipe){ + // return result; + //} + result = Hal_MappingOutPipe(pAdapter, NumOutPipe); + return result; + } -static void rtl8188eu_interface_configure(struct adapter *adapt) +void rtl8188eu_interface_configure(_adapter *padapter) { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapt); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); - if (pdvobjpriv->ishighspeed) - haldata->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */ + if (pdvobjpriv->ishighspeed == _TRUE) + { + pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;//512 bytes + } else - haldata->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */ + { + pHalData->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;//64 bytes + } - haldata->interfaceIndex = pdvobjpriv->InterfaceNumber; + pHalData->interfaceIndex = pdvobjpriv->InterfaceNumber; - haldata->UsbTxAggMode = 1; - haldata->UsbTxAggDescNum = 0x6; /* only 4 bits */ +#ifdef CONFIG_USB_TX_AGGREGATION + pHalData->UsbTxAggMode = 1; + pHalData->UsbTxAggDescNum = 0x6; // only 4 bits +#endif - haldata->UsbRxAggMode = USB_RX_AGG_DMA;/* USB_RX_AGG_DMA; */ - haldata->UsbRxAggBlockCount = 8; /* unit : 512b */ - haldata->UsbRxAggBlockTimeout = 0x6; - haldata->UsbRxAggPageCount = 48; /* uint :128 b 0x0A; 10 = MAX_RX_DMA_BUFFER_SIZE/2/haldata->UsbBulkOutSize */ - haldata->UsbRxAggPageTimeout = 0x4; /* 6, absolute time = 34ms/(2^6) */ +#ifdef CONFIG_USB_RX_AGGREGATION + pHalData->UsbRxAggMode = USB_RX_AGG_DMA;// USB_RX_AGG_DMA; + pHalData->UsbRxAggBlockCount = 8; //unit : 512b + pHalData->UsbRxAggBlockTimeout = 0x6; + pHalData->UsbRxAggPageCount = 48; //uint :128 b //0x0A; // 10 = MAX_RX_DMA_BUFFER_SIZE/2/pHalData->UsbBulkOutSize + pHalData->UsbRxAggPageTimeout = 0x4; //6, absolute time = 34ms/(2^6) +#endif - HalUsbSetQueuePipeMapping8188EUsb(adapt, + HalUsbSetQueuePipeMapping8188EUsb(padapter, pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes); + } -static u32 rtl8188eu_InitPowerOn(struct adapter *adapt) +static u32 InitPowerOn_rtl8188eu(_adapter *padapter) { u16 value16; - /* HW Power on sequence */ - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - if (haldata->bMacPwrCtrlOn) - return _SUCCESS; + u8 bMacPwrCtrlOn=_FALSE; + // HW Power on sequence - if (!HalPwrSeqCmdParsing(adapt, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_PWR_ON_FLOW)) { - DBG_88E(KERN_ERR "%s: run power on flow fail\n", __func__); - return _FAIL; + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if(bMacPwrCtrlOn == _TRUE) + return _SUCCESS; + + if(!HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_PWR_ON_FLOW)) + { + DBG_871X(KERN_ERR "%s: run power on flow fail\n", __func__); + return _FAIL; } - /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */ - /* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */ - rtw_write16(adapt, REG_CR, 0x00); /* suggseted by zhouzhou, by page, 20111230 */ + // Enable MAC DMA/WMAC/SCHEDULE/SEC block + // Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. + rtw_write16(padapter, REG_CR, 0x00); //suggseted by zhouzhou, by page, 20111230 - /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */ - value16 = rtw_read16(adapt, REG_CR); + + // Enable MAC DMA/WMAC/SCHEDULE/SEC block + value16 = rtw_read16(padapter, REG_CR); value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN); - /* for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */ + // for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. + + rtw_write16(padapter, REG_CR, value16); - rtw_write16(adapt, REG_CR, value16); - haldata->bMacPwrCtrlOn = true; + bMacPwrCtrlOn = _TRUE; + rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); return _SUCCESS; + } -/* Shall USB interface init this? */ -static void _InitInterrupt(struct adapter *Adapter) + +static void _dbg_dump_macreg(_adapter *padapter) { - u32 imr, imr_ex; + u32 offset = 0; + u32 val32 = 0; + u32 index =0 ; + for(index=0;index<64;index++) + { + offset = index*4; + val32 = rtw_read32(padapter,offset); + DBG_8192C("offset : 0x%02x ,val:0x%08x\n",offset,val32); + } +} + + +static void _InitPABias(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 pa_setting; + BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); + + //FIXED PA current issue + //efuse_one_byte_read(padapter, 0x1FA, &pa_setting); + pa_setting = EFUSE_Read1Byte(padapter, 0x1FA); + + //RT_TRACE(COMP_INIT, DBG_LOUD, ("_InitPABias 0x1FA 0x%x \n",pa_setting)); + + if(!(pa_setting & BIT0)) + { + PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x0F406); + PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x4F406); + PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x8F406); + PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0xCF406); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path A\n")); + } + + if(!(pa_setting & BIT1) && is92C) + { + PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0x0F406); + PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0x4F406); + PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0x8F406); + PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0xCF406); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path B\n")); + } + + if(!(pa_setting & BIT4)) + { + pa_setting = rtw_read8(padapter, 0x16); + pa_setting &= 0x0F; + rtw_write8(padapter, 0x16, pa_setting | 0x80); + rtw_write8(padapter, 0x16, pa_setting | 0x90); + } +} +#ifdef CONFIG_BT_COEXIST +static void _InitBTCoexist(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); + u8 u1Tmp; + + if(pbtpriv->BT_Coexist && pbtpriv->BT_CoexistType == BT_CSR_BC4) + { + +//#if MP_DRIVER != 1 + if (padapter->registrypriv.mp_mode == 0) + { + if(pbtpriv->BT_Ant_isolation) + { + rtw_write8( padapter,REG_GPIO_MUXCFG, 0xa0); + DBG_8192C("BT write 0x%x = 0x%x\n", REG_GPIO_MUXCFG, 0xa0); + } + } +//#endif + + u1Tmp = rtw_read8(padapter, 0x4fd) & BIT0; + u1Tmp = u1Tmp | + ((pbtpriv->BT_Ant_isolation==1)?0:BIT1) | + ((pbtpriv->BT_Service==BT_SCO)?0:BIT2); + rtw_write8( padapter, 0x4fd, u1Tmp); + DBG_8192C("BT write 0x%x = 0x%x for non-isolation\n", 0x4fd, u1Tmp); + + + rtw_write32(padapter, REG_BT_COEX_TABLE+4, 0xaaaa9aaa); + DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+4, 0xaaaa9aaa); + + rtw_write32(padapter, REG_BT_COEX_TABLE+8, 0xffbd0040); + DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+8, 0xffbd0040); + + rtw_write32(padapter, REG_BT_COEX_TABLE+0xc, 0x40000010); + DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+0xc, 0x40000010); + + //Config to 1T1R + u1Tmp = rtw_read8(padapter,rOFDM0_TRxPathEnable); + u1Tmp &= ~(BIT1); + rtw_write8( padapter, rOFDM0_TRxPathEnable, u1Tmp); + DBG_8192C("BT write 0xC04 = 0x%x\n", u1Tmp); + + u1Tmp = rtw_read8(padapter, rOFDM1_TRxPathEnable); + u1Tmp &= ~(BIT1); + rtw_write8( padapter, rOFDM1_TRxPathEnable, u1Tmp); + DBG_8192C("BT write 0xD04 = 0x%x\n", u1Tmp); + + } +} +#endif + + + +//--------------------------------------------------------------- +// +// MAC init functions +// +//--------------------------------------------------------------- +static VOID +_SetMacID( + IN PADAPTER Adapter, u8* MacID + ) +{ + u32 i; + for(i=0 ; i< MAC_ADDR_LEN ; i++){ +#ifdef CONFIG_CONCURRENT_MODE + if(Adapter->iface_type == IFACE_PORT1) + rtw_write32(Adapter, REG_MACID1+i, MacID[i]); + else +#endif + rtw_write32(Adapter, REG_MACID+i, MacID[i]); + } +} + +static VOID +_SetBSSID( + IN PADAPTER Adapter, u8* BSSID + ) +{ + u32 i; + for(i=0 ; i< MAC_ADDR_LEN ; i++){ +#ifdef CONFIG_CONCURRENT_MODE + if(Adapter->iface_type == IFACE_PORT1) + rtw_write32(Adapter, REG_BSSID1+i, BSSID[i]); + else +#endif + rtw_write32(Adapter, REG_BSSID+i, BSSID[i]); + } +} + + +// Shall USB interface init this? +static VOID +_InitInterrupt( + IN PADAPTER Adapter + ) +{ + u32 imr,imr_ex; u8 usb_opt; - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - /* HISR write one to clear */ + //HISR write one to clear rtw_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF); - /* HIMR - */ - imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E; + // HIMR - + imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E ; rtw_write32(Adapter, REG_HIMR_88E, imr); - haldata->IntrMask[0] = imr; - - imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E; + pHalData->IntrMask[0]=imr; + + imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E |IMR_RXFOVW_88E; rtw_write32(Adapter, REG_HIMRE_88E, imr_ex); - haldata->IntrMask[1] = imr_ex; - - /* REG_USB_SPECIAL_OPTION - BIT(4) */ - /* 0; Use interrupt endpoint to upload interrupt pkt */ - /* 1; Use bulk endpoint to upload interrupt pkt, */ + pHalData->IntrMask[1]=imr_ex; + +#ifdef CONFIG_SUPPORT_USB_INT + // REG_USB_SPECIAL_OPTION - BIT(4) + // 0; Use interrupt endpoint to upload interrupt pkt + // 1; Use bulk endpoint to upload interrupt pkt, usb_opt = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION); - if (!adapter_to_dvobj(Adapter)->ishighspeed) + + if(!adapter_to_dvobj(Adapter)->ishighspeed + #ifdef CONFIG_USB_INTERRUPT_IN_PIPE + || pHalData->RtIntInPipe == 0x05 + #endif + ) usb_opt = usb_opt & (~INT_BULK_SEL); - else + else usb_opt = usb_opt | (INT_BULK_SEL); - rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt); + rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt ); + +#endif//CONFIG_SUPPORT_USB_INT + } -static void _InitQueueReservedPage(struct adapter *Adapter) + +static VOID +_InitQueueReservedPage( + IN PADAPTER Adapter + ) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct registry_priv *pregistrypriv = &Adapter->registrypriv; - u32 numHQ = 0; - u32 numLQ = 0; - u32 numNQ = 0; - u32 numPubQ; - u32 value32; - u8 value8; - bool bWiFiConfig = pregistrypriv->wifi_spec; + u32 outEPNum = (u32)pHalData->OutEpNumber; + u32 numHQ = 0; + u32 numLQ = 0; + u32 numNQ = 0; + u32 numPubQ; + u32 value32; + u8 value8; + BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; - if (bWiFiConfig) { - if (haldata->OutEpQueueSel & TX_SELE_HQ) + if((bWiFiConfig)|| (pregistrypriv->qos_opt_enable)) + { + if (pHalData->OutEpQueueSel & TX_SELE_HQ) + { numHQ = 0x29; + } - if (haldata->OutEpQueueSel & TX_SELE_LQ) + if (pHalData->OutEpQueueSel & TX_SELE_LQ) + { numLQ = 0x1C; + } - /* NOTE: This step shall be proceed before writting REG_RQPN. */ - if (haldata->OutEpQueueSel & TX_SELE_NQ) + // NOTE: This step shall be proceed before writting REG_RQPN. + if (pHalData->OutEpQueueSel & TX_SELE_NQ) { numNQ = 0x1C; + } value8 = (u8)_NPQ(numNQ); rtw_write8(Adapter, REG_RQPN_NPQ, value8); numPubQ = 0xA8 - numHQ - numLQ - numNQ; - /* TX DMA */ + // TX DMA value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN; rtw_write32(Adapter, REG_RQPN, value32); - } else { - rtw_write16(Adapter, REG_RQPN_NPQ, 0x0000);/* Just follow MP Team,??? Georgia 03/28 */ - rtw_write16(Adapter, REG_RQPN_NPQ, 0x0d); - rtw_write32(Adapter, REG_RQPN, 0x808E000d);/* reserve 7 page for LPS */ + } + else + { + rtw_write16(Adapter,REG_RQPN_NPQ, 0x0000);//Just follow MP Team,??? Georgia 03/28 + rtw_write16(Adapter,REG_RQPN_NPQ, 0x0d); + rtw_write32(Adapter,REG_RQPN, 0x808E000d);//reserve 7 page for LPS } } -static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy) -{ +static VOID +_InitTxBufferBoundary( + IN PADAPTER Adapter, + IN u8 txpktbuf_bndy + ) +{ + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + //u16 txdmactrl; + rtw_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy); rtw_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy); rtw_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy); rtw_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy); rtw_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy); + } -static void _InitPageBoundary(struct adapter *Adapter) +static VOID +_InitPageBoundary( + IN PADAPTER Adapter + ) { - /* RX Page Boundary */ - /* */ + // RX Page Boundary + // u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E-1; + #if 0 + + // RX Page Boundary + //srand(static_cast(time(NULL)) ); + if(bSupportRemoteWakeUp) + { + Offset = MAX_RX_DMA_BUFFER_SIZE_88E+MAX_TX_REPORT_BUFFER_SIZE-MAX_SUPPORT_WOL_PATTERN_NUM(Adapter)*WKFMCAM_SIZE; + Offset = Offset / 128; // RX page size = 128 byte + rxff_bndy= (Offset*128) -1; + } + else + + #endif rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy); } -static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ, - u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ, - u16 hiQ) + +static VOID +_InitNormalChipRegPriority( + IN PADAPTER Adapter, + IN u16 beQ, + IN u16 bkQ, + IN u16 viQ, + IN u16 voQ, + IN u16 mgtQ, + IN u16 hiQ + ) { u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7); - value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | - _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | - _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ); - + value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | + _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | + _TXDMA_MGQ_MAP(mgtQ)| _TXDMA_HIQ_MAP(hiQ); + rtw_write16(Adapter, REG_TRXDMA_CTRL, value16); } -static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter) +static VOID +_InitNormalChipOneOutEpPriority( + IN PADAPTER Adapter + ) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u16 value = 0; - switch (haldata->OutEpQueueSel) { - case TX_SELE_HQ: - value = QUEUE_HIGH; - break; - case TX_SELE_LQ: - value = QUEUE_LOW; - break; - case TX_SELE_NQ: - value = QUEUE_NORMAL; - break; - default: - break; + u16 value = 0; + switch(pHalData->OutEpQueueSel) + { + case TX_SELE_HQ: + value = QUEUE_HIGH; + break; + case TX_SELE_LQ: + value = QUEUE_LOW; + break; + case TX_SELE_NQ: + value = QUEUE_NORMAL; + break; + default: + //RT_ASSERT(FALSE,("Shall not reach here!\n")); + break; } - _InitNormalChipRegPriority(Adapter, value, value, value, value, - value, value); + + _InitNormalChipRegPriority(Adapter, + value, + value, + value, + value, + value, + value + ); + } -static void _InitNormalChipTwoOutEpPriority(struct adapter *Adapter) +static VOID +_InitNormalChipTwoOutEpPriority( + IN PADAPTER Adapter + ) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct registry_priv *pregistrypriv = &Adapter->registrypriv; - u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ; - u16 valueHi = 0; - u16 valueLow = 0; + u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; + - switch (haldata->OutEpQueueSel) { - case (TX_SELE_HQ | TX_SELE_LQ): - valueHi = QUEUE_HIGH; - valueLow = QUEUE_LOW; - break; - case (TX_SELE_NQ | TX_SELE_LQ): - valueHi = QUEUE_NORMAL; - valueLow = QUEUE_LOW; - break; - case (TX_SELE_HQ | TX_SELE_NQ): - valueHi = QUEUE_HIGH; - valueLow = QUEUE_NORMAL; - break; - default: - break; + u16 valueHi = 0; + u16 valueLow = 0; + + switch(pHalData->OutEpQueueSel) + { + case (TX_SELE_HQ | TX_SELE_LQ): + valueHi = QUEUE_HIGH; + valueLow = QUEUE_LOW; + break; + case (TX_SELE_NQ | TX_SELE_LQ): + valueHi = QUEUE_NORMAL; + valueLow = QUEUE_LOW; + break; + case (TX_SELE_HQ | TX_SELE_NQ): + valueHi = QUEUE_HIGH; + valueLow = QUEUE_NORMAL; + break; + default: + //RT_ASSERT(FALSE,("Shall not reach here!\n")); + break; } - if (!pregistrypriv->wifi_spec) { - beQ = valueLow; - bkQ = valueLow; - viQ = valueHi; - voQ = valueHi; - mgtQ = valueHi; - hiQ = valueHi; - } else {/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */ - beQ = valueLow; - bkQ = valueHi; - viQ = valueHi; - voQ = valueLow; - mgtQ = valueHi; - hiQ = valueHi; + if(!pregistrypriv->wifi_spec ){ + beQ = valueLow; + bkQ = valueLow; + viQ = valueHi; + voQ = valueHi; + mgtQ = valueHi; + hiQ = valueHi; } - _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ); + else{//for WMM ,CONFIG_OUT_EP_WIFI_MODE + beQ = valueLow; + bkQ = valueHi; + viQ = valueHi; + voQ = valueLow; + mgtQ = valueHi; + hiQ = valueHi; + } + + _InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); + } -static void _InitNormalChipThreeOutEpPriority(struct adapter *Adapter) +static VOID +_InitNormalChipThreeOutEpPriority( + IN PADAPTER Adapter + ) { struct registry_priv *pregistrypriv = &Adapter->registrypriv; - u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ; + u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; - if (!pregistrypriv->wifi_spec) {/* typical setting */ - beQ = QUEUE_LOW; - bkQ = QUEUE_LOW; - viQ = QUEUE_NORMAL; - voQ = QUEUE_HIGH; - mgtQ = QUEUE_HIGH; - hiQ = QUEUE_HIGH; - } else {/* for WMM */ - beQ = QUEUE_LOW; - bkQ = QUEUE_NORMAL; - viQ = QUEUE_NORMAL; - voQ = QUEUE_HIGH; - mgtQ = QUEUE_HIGH; - hiQ = QUEUE_HIGH; + if(!pregistrypriv->wifi_spec ){// typical setting + beQ = QUEUE_LOW; + bkQ = QUEUE_LOW; + viQ = QUEUE_NORMAL; + voQ = QUEUE_HIGH; + mgtQ = QUEUE_HIGH; + hiQ = QUEUE_HIGH; } - _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ); + else{// for WMM + beQ = QUEUE_LOW; + bkQ = QUEUE_NORMAL; + viQ = QUEUE_NORMAL; + voQ = QUEUE_HIGH; + mgtQ = QUEUE_HIGH; + hiQ = QUEUE_HIGH; + } + _InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); } -static void _InitQueuePriority(struct adapter *Adapter) +static VOID +_InitQueuePriority( + IN PADAPTER Adapter + ) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - switch (haldata->OutEpNumber) { - case 1: - _InitNormalChipOneOutEpPriority(Adapter); - break; - case 2: - _InitNormalChipTwoOutEpPriority(Adapter); - break; - case 3: - _InitNormalChipThreeOutEpPriority(Adapter); - break; - default: - break; + switch(pHalData->OutEpNumber) + { + case 1: + _InitNormalChipOneOutEpPriority(Adapter); + break; + case 2: + _InitNormalChipTwoOutEpPriority(Adapter); + break; + case 3: + _InitNormalChipThreeOutEpPriority(Adapter); + break; + default: + //RT_ASSERT(FALSE,("Shall not reach here!\n")); + break; } + + } -static void _InitNetworkType(struct adapter *Adapter) + + +static VOID +_InitHardwareDropIncorrectBulkOut( + IN PADAPTER Adapter + ) { - u32 value32; +#ifdef ENABLE_USB_DROP_INCORRECT_OUT + u32 value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK); + value32 |= DROP_DATA_EN; + rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32); +#endif +} + +static VOID +_InitNetworkType( + IN PADAPTER Adapter + ) +{ + u32 value32; value32 = rtw_read32(Adapter, REG_CR); - /* TODO: use the other function to set network type */ + // TODO: use the other function to set network type value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP); rtw_write32(Adapter, REG_CR, value32); +// RASSERT(pIoBase->rtw_read8(REG_CR + 2) == 0x2); } -static void _InitTransferPageSize(struct adapter *Adapter) +static VOID +_InitTransferPageSize( + IN PADAPTER Adapter + ) { - /* Tx page size is always 128. */ - - u8 value8; + // Tx page size is always 128. + + u8 value8; value8 = _PSRX(PBP_128) | _PSTX(PBP_128); rtw_write8(Adapter, REG_PBP, value8); } -static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize) +static VOID +_InitDriverInfoSize( + IN PADAPTER Adapter, + IN u8 drvInfoSize + ) { - rtw_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize); + rtw_write8(Adapter,REG_RX_DRVINFO_SZ, drvInfoSize); } -static void _InitWMACSetting(struct adapter *Adapter) +static VOID +_InitWMACSetting( + IN PADAPTER Adapter + ) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + //u4Byte value32; + //u16 value16; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - haldata->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | - RCR_CBSSID_DATA | RCR_CBSSID_BCN | - RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | - RCR_APP_MIC | RCR_APP_PHYSTS; + //pHalData->ReceiveConfig = AAP | APM | AM | AB | APP_ICV | ADF | AMF | APP_FCS | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS; + //pHalData->ReceiveConfig = + //RCR_AAP | RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS; + // don't turn on AAP, it will allow all packets to driver + pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS; + +#if (1 == RTL8188E_RX_PACKET_INCLUDE_CRC) + pHalData->ReceiveConfig |= ACRC32; +#endif - /* some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */ - rtw_write32(Adapter, REG_RCR, haldata->ReceiveConfig); + // some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() + rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig); - /* Accept all multicast address */ + // Accept all multicast address rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF); rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF); + + + // Accept all data frames + //value16 = 0xFFFF; + //rtw_write16(Adapter, REG_RXFLTMAP2, value16); + + // 2010.09.08 hpfan + // Since ADF is removed from RCR, ps-poll will not be indicate to driver, + // RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. + //value16 = 0x400; + //rtw_write16(Adapter, REG_RXFLTMAP1, value16); + + // Accept all management frames + //value16 = 0xFFFF; + //rtw_write16(Adapter, REG_RXFLTMAP0, value16); + + //enable RX_SHIFT bits + //rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter, REG_TRXDMA_CTRL)|BIT(1)); + } -static void _InitAdaptiveCtrl(struct adapter *Adapter) +static VOID +_InitAdaptiveCtrl( + IN PADAPTER Adapter + ) { - u16 value16; - u32 value32; + u16 value16; + u32 value32; - /* Response Rate Set */ + // Response Rate Set value32 = rtw_read32(Adapter, REG_RRSR); value32 &= ~RATE_BITMAP_ALL; value32 |= RATE_RRSR_CCK_ONLY_1M; rtw_write32(Adapter, REG_RRSR, value32); - /* CF-END Threshold */ + // CF-END Threshold + //m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1); - /* SIFS (used in NAV) */ + // SIFS (used in NAV) value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10); rtw_write16(Adapter, REG_SPEC_SIFS, value16); - /* Retry Limit */ + // Retry Limit value16 = _LRL(0x30) | _SRL(0x30); rtw_write16(Adapter, REG_RL, value16); + } -static void _InitEDCA(struct adapter *Adapter) +static VOID +_InitRateFallback( + IN PADAPTER Adapter + ) { - /* Set Spec SIFS (used in NAV) */ - rtw_write16(Adapter, REG_SPEC_SIFS, 0x100a); - rtw_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a); + // Set Data Auto Rate Fallback Retry Count register. + rtw_write32(Adapter, REG_DARFRC, 0x00000000); + rtw_write32(Adapter, REG_DARFRC+4, 0x10080404); + rtw_write32(Adapter, REG_RARFRC, 0x04030201); + rtw_write32(Adapter, REG_RARFRC+4, 0x08070605); - /* Set SIFS for CCK */ - rtw_write16(Adapter, REG_SIFS_CTX, 0x100a); +} - /* Set SIFS for OFDM */ - rtw_write16(Adapter, REG_SIFS_TRX, 0x100a); - /* TXOP */ +static VOID +_InitEDCA( + IN PADAPTER Adapter + ) +{ + // Set Spec SIFS (used in NAV) + rtw_write16(Adapter,REG_SPEC_SIFS, 0x100a); + rtw_write16(Adapter,REG_MAC_SPEC_SIFS, 0x100a); + + // Set SIFS for CCK + rtw_write16(Adapter,REG_SIFS_CTX, 0x100a); + + // Set SIFS for OFDM + rtw_write16(Adapter,REG_SIFS_TRX, 0x100a); + + // TXOP rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B); rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F); rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324); rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226); } -static void _InitBeaconMaxError(struct adapter *Adapter, bool InfraMode) + +static VOID +_InitBeaconMaxError( + IN PADAPTER Adapter, + IN BOOLEAN InfraMode + ) { + } -static void _InitHWLed(struct adapter *Adapter) + +#ifdef CONFIG_LED +static void _InitHWLed(PADAPTER Adapter) { struct led_priv *pledpriv = &(Adapter->ledpriv); - - if (pledpriv->LedStrategy != HW_LED) + + if( pledpriv->LedStrategy != HW_LED) return; + +// HW led control +// to do .... +//must consider cases of antenna diversity/ commbo card/solo card/mini card -/* HW led control */ -/* to do .... */ -/* must consider cases of antenna diversity/ commbo card/solo card/mini card */ } +#endif //CONFIG_LED -static void _InitRDGSetting(struct adapter *Adapter) +static VOID +_InitRDGSetting( + IN PADAPTER Adapter + ) { - rtw_write8(Adapter, REG_RD_CTRL, 0xFF); + rtw_write8(Adapter,REG_RD_CTRL,0xFF); rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200); - rtw_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05); + rtw_write8(Adapter,REG_RD_RESP_PKT_TH,0x05); } -static void _InitRxSetting(struct adapter *Adapter) +static VOID +_InitRxSetting( + IN PADAPTER Adapter + ) { rtw_write32(Adapter, REG_MACID, 0x87654321); rtw_write32(Adapter, 0x0700, 0x87654321); } -static void _InitRetryFunction(struct adapter *Adapter) +static VOID +_InitRetryFunction( + IN PADAPTER Adapter + ) { - u8 value8; - + u8 value8; + //#if 0 //MAC SPEC value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL); value8 |= EN_AMPDU_RTY_NEW; rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8); - - /* Set ACK timeout */ + //#endif + // Set ACK timeout rtw_write8(Adapter, REG_ACKTO, 0x40); } /*----------------------------------------------------------------------------- * Function: usb_AggSettingTxUpdate() * - * Overview: Separate TX/RX parameters update independent for TP detection and + * Overview: Seperate TX/RX parameters update independent for TP detection and * dynamic TX/RX aggreagtion parameters update. * - * Input: struct adapter * + * Input: PADAPTER * * Output/Return: NONE * * Revised History: * When Who Remark - * 12/10/2010 MHC Separate to smaller function. + * 12/10/2010 MHC Seperate to smaller function. * *---------------------------------------------------------------------------*/ -static void usb_AggSettingTxUpdate(struct adapter *Adapter) +static VOID +usb_AggSettingTxUpdate( + IN PADAPTER Adapter + ) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); - u32 value32; +#ifdef CONFIG_USB_TX_AGGREGATION + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + u32 value32; - if (Adapter->registrypriv.wifi_spec) - haldata->UsbTxAggMode = false; + if(Adapter->registrypriv.wifi_spec) + pHalData->UsbTxAggMode = _FALSE; - if (haldata->UsbTxAggMode) { + if(pHalData->UsbTxAggMode){ value32 = rtw_read32(Adapter, REG_TDECTRL); value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT); - value32 |= ((haldata->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT); - + value32 |= ((pHalData->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT); + rtw_write32(Adapter, REG_TDECTRL, value32); } -} /* usb_AggSettingTxUpdate */ + +#endif +} // usb_AggSettingTxUpdate + /*----------------------------------------------------------------------------- * Function: usb_AggSettingRxUpdate() * - * Overview: Separate TX/RX parameters update independent for TP detection and + * Overview: Seperate TX/RX parameters update independent for TP detection and * dynamic TX/RX aggreagtion parameters update. * - * Input: struct adapter * + * Input: PADAPTER * * Output/Return: NONE * * Revised History: * When Who Remark - * 12/10/2010 MHC Separate to smaller function. + * 12/10/2010 MHC Seperate to smaller function. * *---------------------------------------------------------------------------*/ -static void +static VOID usb_AggSettingRxUpdate( - struct adapter *Adapter + IN PADAPTER Adapter ) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); - u8 valueDMA; - u8 valueUSB; +#ifdef CONFIG_USB_RX_AGGREGATION + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + u8 valueDMA; + u8 valueUSB; valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL); valueUSB = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION); - switch (haldata->UsbRxAggMode) { - case USB_RX_AGG_DMA: - valueDMA |= RXDMA_AGG_EN; - valueUSB &= ~USB_AGG_EN; - break; - case USB_RX_AGG_USB: - valueDMA &= ~RXDMA_AGG_EN; - valueUSB |= USB_AGG_EN; - break; - case USB_RX_AGG_MIX: - valueDMA |= RXDMA_AGG_EN; - valueUSB |= USB_AGG_EN; - break; - case USB_RX_AGG_DISABLE: - default: - valueDMA &= ~RXDMA_AGG_EN; - valueUSB &= ~USB_AGG_EN; - break; + switch(pHalData->UsbRxAggMode) + { + case USB_RX_AGG_DMA: + valueDMA |= RXDMA_AGG_EN; + valueUSB &= ~USB_AGG_EN; + break; + case USB_RX_AGG_USB: + valueDMA &= ~RXDMA_AGG_EN; + valueUSB |= USB_AGG_EN; + break; + case USB_RX_AGG_MIX: + valueDMA |= RXDMA_AGG_EN; + valueUSB |= USB_AGG_EN; + break; + case USB_RX_AGG_DISABLE: + default: + valueDMA &= ~RXDMA_AGG_EN; + valueUSB &= ~USB_AGG_EN; + break; } rtw_write8(Adapter, REG_TRXDMA_CTRL, valueDMA); rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB); - switch (haldata->UsbRxAggMode) { - case USB_RX_AGG_DMA: - rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount); - rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, haldata->UsbRxAggPageTimeout); - break; - case USB_RX_AGG_USB: - rtw_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount); - rtw_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout); - break; - case USB_RX_AGG_MIX: - rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount); - rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, (haldata->UsbRxAggPageTimeout & 0x1F));/* 0x280[12:8] */ - rtw_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount); - rtw_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout); - break; - case USB_RX_AGG_DISABLE: - default: - /* TODO: */ - break; + switch(pHalData->UsbRxAggMode) + { + case USB_RX_AGG_DMA: + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount); + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, pHalData->UsbRxAggPageTimeout); + break; + case USB_RX_AGG_USB: + rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount); + rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout); + break; + case USB_RX_AGG_MIX: + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount); + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, (pHalData->UsbRxAggPageTimeout& 0x1F));//0x280[12:8] + + rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount); + rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout); + + break; + case USB_RX_AGG_DISABLE: + default: + // TODO: + break; } - switch (PBP_128) { - case PBP_128: - haldata->HwRxPageSize = 128; - break; - case PBP_64: - haldata->HwRxPageSize = 64; - break; - case PBP_256: - haldata->HwRxPageSize = 256; - break; - case PBP_512: - haldata->HwRxPageSize = 512; - break; - case PBP_1024: - haldata->HwRxPageSize = 1024; - break; - default: - break; + switch(PBP_128) + { + case PBP_128: + pHalData->HwRxPageSize = 128; + break; + case PBP_64: + pHalData->HwRxPageSize = 64; + break; + case PBP_256: + pHalData->HwRxPageSize = 256; + break; + case PBP_512: + pHalData->HwRxPageSize = 512; + break; + case PBP_1024: + pHalData->HwRxPageSize = 1024; + break; + default: + //RT_ASSERT(FALSE, ("RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n")); + break; } -} /* usb_AggSettingRxUpdate */ +#endif +} // usb_AggSettingRxUpdate -static void InitUsbAggregationSetting(struct adapter *Adapter) +static VOID +InitUsbAggregationSetting( + IN PADAPTER Adapter + ) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - /* Tx aggregation setting */ + // Tx aggregation setting usb_AggSettingTxUpdate(Adapter); - /* Rx aggregation setting */ + // Rx aggregation setting usb_AggSettingRxUpdate(Adapter); - /* 201/12/10 MH Add for USB agg mode dynamic switch. */ - haldata->UsbRxHighSpeedMode = false; + // 201/12/10 MH Add for USB agg mode dynamic switch. + pHalData->UsbRxHighSpeedMode = _FALSE; +} +VOID +HalRxAggr8188EUsb( + IN PADAPTER Adapter, + IN BOOLEAN Value + ) +{ +#if 0//USB_RX_AGGREGATION_92C + + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + u1Byte valueDMATimeout; + u1Byte valueDMAPageCount; + u1Byte valueUSBTimeout; + u1Byte valueUSBBlockCount; + + // selection to prevent bad TP. + if( IS_WIRELESS_MODE_B(Adapter) || IS_WIRELESS_MODE_G(Adapter) || IS_WIRELESS_MODE_A(Adapter)|| pMgntInfo->bWiFiConfg) + { + // 2010.04.27 hpfan + // Adjust RxAggrTimeout to close to zero disable RxAggr, suggested by designer + // Timeout value is calculated by 34 / (2^n) + valueDMATimeout = 0x0f; + valueDMAPageCount = 0x01; + valueUSBTimeout = 0x0f; + valueUSBBlockCount = 0x01; + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_PGTO, (pu1Byte)&valueDMATimeout); + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_PGTH, (pu1Byte)&valueDMAPageCount); + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTO, (pu1Byte)&valueUSBTimeout); + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTH, (pu1Byte)&valueUSBBlockCount); + } + else + { + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTO, (pu1Byte)&pMgntInfo->RegRxAggBlockTimeout); + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTH, (pu1Byte)&pMgntInfo->RegRxAggBlockCount); + } + +#endif } -static void _InitOperationMode(struct adapter *Adapter) +/*----------------------------------------------------------------------------- + * Function: USB_AggModeSwitch() + * + * Overview: When RX traffic is more than 40M, we need to adjust some parameters to increase + * RX speed by increasing batch indication size. This will decrease TCP ACK speed, we + * need to monitor the influence of FTP/network share. + * For TX mode, we are still ubder investigation. + * + * Input: PADAPTER + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 12/10/2010 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +VOID +USB_AggModeSwitch( + IN PADAPTER Adapter + ) +{ +} // USB_AggModeSwitch + +static VOID +_InitOperationMode( + IN PADAPTER Adapter + ) { } -static void _InitBeaconParameters(struct adapter *Adapter) + + static VOID +_InitBeaconParameters( + IN PADAPTER Adapter + ) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); rtw_write16(Adapter, REG_BCN_CTRL, 0x1010); - /* TODO: Remove these magic number */ - rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);/* ms */ - rtw_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/* 5ms */ - rtw_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); /* 2ms */ + // TODO: Remove these magic number + rtw_write16(Adapter, REG_TBTT_PROHIBIT,0x6404);// ms + rtw_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);// 5ms + rtw_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); // 2ms - /* Suggested by designer timchen. Change beacon AIFS to the largest number */ - /* beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */ + // Suggested by designer timchen. Change beacon AIFS to the largest number + // beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 rtw_write16(Adapter, REG_BCNTCFG, 0x660F); - haldata->RegBcnCtrlVal = rtw_read8(Adapter, REG_BCN_CTRL); - haldata->RegTxPause = rtw_read8(Adapter, REG_TXPAUSE); - haldata->RegFwHwTxQCtrl = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL+2); - haldata->RegReg542 = rtw_read8(Adapter, REG_TBTT_PROHIBIT+2); - haldata->RegCR_1 = rtw_read8(Adapter, REG_CR+1); + pHalData->RegBcnCtrlVal = rtw_read8(Adapter, REG_BCN_CTRL); + pHalData->RegTxPause = rtw_read8(Adapter, REG_TXPAUSE); + pHalData->RegFwHwTxQCtrl = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL+2); + pHalData->RegReg542 = rtw_read8(Adapter, REG_TBTT_PROHIBIT+2); + pHalData->RegCR_1 = rtw_read8(Adapter, REG_CR+1); } -static void _BeaconFunctionEnable(struct adapter *Adapter, - bool Enable, bool Linked) +static VOID +_InitRFType( + IN PADAPTER Adapter + ) +{ + struct registry_priv *pregpriv = &Adapter->registrypriv; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BOOLEAN is92CU = IS_92C_SERIAL(pHalData->VersionID); + +#if DISABLE_BB_RF + pHalData->rf_chip = RF_PSEUDO_11N; + return; +#endif + + pHalData->rf_chip = RF_6052; + + if(_FALSE == is92CU){ + pHalData->rf_type = RF_1T1R; + DBG_8192C("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n"); + return; + } + + // TODO: Consider that EEPROM set 92CU to 1T1R later. + // Force to overwrite setting according to chip version. Ignore EEPROM setting. + //pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R; + MSG_8192C("Set RF Chip ID to RF_6052 and RF type to %d.\n", pHalData->rf_type); + +} + + +static VOID +_BeaconFunctionEnable( + IN PADAPTER Adapter, + IN BOOLEAN Enable, + IN BOOLEAN Linked + ) { rtw_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1)); + //SetBcnCtrlReg(Adapter, (BIT4 | BIT3 | BIT1), 0x00); + //RT_TRACE(COMP_BEACON, DBG_LOUD, ("_BeaconFunctionEnable 0x550 0x%x\n", PlatformEFIORead1Byte(Adapter, 0x550))); - rtw_write8(Adapter, REG_RD_CTRL+1, 0x6F); + rtw_write8(Adapter, REG_RD_CTRL+1, 0x6F); } -/* Set CCK and OFDM Block "ON" */ -static void _BBTurnOnBlock(struct adapter *Adapter) + +// Set CCK and OFDM Block "ON" +static VOID _BBTurnOnBlock( + IN PADAPTER Adapter + ) { +#if (DISABLE_BB_RF) + return; +#endif + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1); PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1); } -enum { - Antenna_Lfet = 1, - Antenna_Right = 2, -}; - -static void _InitAntenna_Selection(struct adapter *Adapter) +static VOID _RfPowerSave( + IN PADAPTER Adapter + ) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + u1Byte eRFPath; - if (haldata->AntDivCfg == 0) - return; - DBG_88E("==> %s ....\n", __func__); +#if (DISABLE_BB_RF) + return; +#endif - rtw_write32(Adapter, REG_LEDCFG0, rtw_read32(Adapter, REG_LEDCFG0)|BIT23); - PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); - - if (PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A) - haldata->CurAntenna = Antenna_A; - else - haldata->CurAntenna = Antenna_B; - DBG_88E("%s,Cur_ant:(%x)%s\n", __func__, haldata->CurAntenna, (haldata->CurAntenna == Antenna_A) ? "Antenna_A" : "Antenna_B"); + if(pMgntInfo->RegRfOff == TRUE){ // User disable RF via registry. + RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RegRfOff.\n")); + MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_SW); + // Those action will be discard in MgntActSet_RF_State because off the same state + for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) + PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0); + } + else if(pMgntInfo->RfOffReason > RF_CHANGE_BY_PS){ // H/W or S/W RF OFF before sleep. + RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RfOffReason(%ld).\n", pMgntInfo->RfOffReason)); + MgntActSet_RF_State(Adapter, eRfOff, pMgntInfo->RfOffReason); + } + else{ + pHalData->eRFPowerState = eRfOn; + pMgntInfo->RfOffReason = 0; + if(Adapter->bInSetPower || Adapter->bResetInProgress) + PlatformUsbEnableInPipes(Adapter); + RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): RF is on.\n")); + } +#endif } +enum { + Antenna_Lfet = 1, + Antenna_Right = 2, +}; + +static VOID +_InitAntenna_Selection(IN PADAPTER Adapter) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if(pHalData->AntDivCfg==0) + return; + DBG_8192C("==> %s ....\n",__FUNCTION__); + + rtw_write32(Adapter, REG_LEDCFG0, rtw_read32(Adapter, REG_LEDCFG0)|BIT23); + PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); + + if(PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A) + pHalData->CurAntenna = Antenna_A; + else + pHalData->CurAntenna = Antenna_B; + DBG_8192C("%s,Cur_ant:(%x)%s\n",__FUNCTION__,pHalData->CurAntenna,(pHalData->CurAntenna == Antenna_A)?"Antenna_A":"Antenna_B"); + + +} + +// +// 2010/08/26 MH Add for selective suspend mode check. +// If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and +// slim card. +// +static VOID +HalDetectSelectiveSuspendMode( + IN PADAPTER Adapter + ) +{ +#if 0 + u8 tmpvalue; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); + + // If support HW radio detect, we need to enable WOL ability, otherwise, we + // can not use FW to notify host the power state switch. + + EFUSE_ShadowRead(Adapter, 1, EEPROM_USB_OPTIONAL1, (u32 *)&tmpvalue); + + DBG_8192C("HalDetectSelectiveSuspendMode(): SS "); + if(tmpvalue & BIT1) + { + DBG_8192C("Enable\n"); + } + else + { + DBG_8192C("Disable\n"); + pdvobjpriv->RegUsbSS = _FALSE; + } + + // 2010/09/01 MH According to Dongle Selective Suspend INF. We can switch SS mode. + if (pdvobjpriv->RegUsbSS && !SUPPORT_HW_RADIO_DETECT(pHalData)) + { + //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + + //if (!pMgntInfo->bRegDongleSS) + //{ + // RT_TRACE(COMP_INIT, DBG_LOUD, ("Dongle disable SS\n")); + pdvobjpriv->RegUsbSS = _FALSE; + //} + } +#endif +} // HalDetectSelectiveSuspendMode /*----------------------------------------------------------------------------- * Function: HwSuspendModeEnable92Cu() * @@ -678,1656 +1281,3940 @@ static void _InitAntenna_Selection(struct adapter *Adapter) * When Who Remark * 08/23/2010 MHC HW suspend mode switch test.. *---------------------------------------------------------------------------*/ -enum rt_rf_power_state RfOnOffDetect(struct adapter *adapt) +static VOID +HwSuspendModeEnable_88eu( + IN PADAPTER pAdapter, + IN u8 Type + ) { - u8 val8; - enum rt_rf_power_state rfpowerstate = rf_off; + //PRT_USB_DEVICE pDevice = GET_RT_USB_DEVICE(pAdapter); + u16 reg = rtw_read16(pAdapter, REG_GPIO_MUXCFG); - if (adapt->pwrctrlpriv.bHWPowerdown) { - val8 = rtw_read8(adapt, REG_HSISR); - DBG_88E("pwrdown, 0x5c(BIT7)=%02x\n", val8); - rfpowerstate = (val8 & BIT7) ? rf_off : rf_on; - } else { /* rf on/off */ - rtw_write8(adapt, REG_MAC_PINMUX_CFG, rtw_read8(adapt, REG_MAC_PINMUX_CFG)&~(BIT3)); - val8 = rtw_read8(adapt, REG_GPIO_IO_SEL); - DBG_88E("GPIO_IN=%02x\n", val8); - rfpowerstate = (val8 & BIT3) ? rf_on : rf_off; + //if (!pDevice->RegUsbSS) + { + return; + } + + // + // 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW + // to enter suspend mode automatically. Otherwise, it will shut down major power + // domain and 8051 will stop. When we try to enter selective suspend mode, we + // need to prevent HW to enter D2 mode aumotmatically. Another way, Host will + // issue a S10 signal to power domain. Then it will cleat SIC setting(from Yngli). + // We need to enable HW suspend mode when enter S3/S4 or disable. We need + // to disable HW suspend mode for IPS/radio_off. + // + //RT_TRACE(COMP_RF, DBG_LOUD, ("HwSuspendModeEnable92Cu = %d\n", Type)); + if (Type == _FALSE) + { + reg |= BIT14; + //RT_TRACE(COMP_RF, DBG_LOUD, ("REG_GPIO_MUXCFG = %x\n", reg)); + rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); + reg |= BIT12; + //RT_TRACE(COMP_RF, DBG_LOUD, ("REG_GPIO_MUXCFG = %x\n", reg)); + rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); + } + else + { + reg &= (~BIT12); + rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); + reg &= (~BIT14); + rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); + } + +} // HwSuspendModeEnable92Cu +rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + u8 val8; + rt_rf_power_state rfpowerstate = rf_off; + + if(adapter_to_pwrctl(pAdapter)->bHWPowerdown) + { + val8 = rtw_read8(pAdapter, REG_HSISR); + DBG_8192C("pwrdown, 0x5c(BIT7)=%02x\n", val8); + rfpowerstate = (val8 & BIT7) ? rf_off: rf_on; + } + else // rf on/off + { + rtw_write8( pAdapter, REG_MAC_PINMUX_CFG,rtw_read8(pAdapter, REG_MAC_PINMUX_CFG)&~(BIT3)); + val8 = rtw_read8(pAdapter, REG_GPIO_IO_SEL); + DBG_8192C("GPIO_IN=%02x\n", val8); + rfpowerstate = (val8 & BIT3) ? rf_on : rf_off; } return rfpowerstate; -} /* HalDetectPwrDownMode */ +} // HalDetectPwrDownMode -static u32 rtl8188eu_hal_init(struct adapter *Adapter) +void _ps_open_RF(_adapter *padapter); + +u32 rtl8188eu_hal_init(PADAPTER Adapter) { - u8 value8 = 0; + u8 value8 = 0; u16 value16; - u8 txpktbuf_bndy; - u32 status = _SUCCESS; - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); - struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv; + u8 txpktbuf_bndy; + u32 status = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); struct registry_priv *pregistrypriv = &Adapter->registrypriv; + + rt_rf_power_state eRfPowerStateToSet; +#ifdef CONFIG_BT_COEXIST + struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); +#endif + u32 init_start_time = rtw_get_current_time(); - #define HAL_INIT_PROFILE_TAG(stage) do {} while (0) - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN); +#ifdef DBG_HAL_INIT_PROFILING - if (Adapter->pwrctrlpriv.bkeepfwalive) { + enum HAL_INIT_STAGES { + HAL_INIT_STAGES_BEGIN = 0, + HAL_INIT_STAGES_INIT_PW_ON, + HAL_INIT_STAGES_MISC01, + HAL_INIT_STAGES_DOWNLOAD_FW, + HAL_INIT_STAGES_MAC, + HAL_INIT_STAGES_BB, + HAL_INIT_STAGES_RF, + HAL_INIT_STAGES_EFUSE_PATCH, + HAL_INIT_STAGES_INIT_LLTT, + + HAL_INIT_STAGES_MISC02, + HAL_INIT_STAGES_TURN_ON_BLOCK, + HAL_INIT_STAGES_INIT_SECURITY, + HAL_INIT_STAGES_MISC11, + HAL_INIT_STAGES_INIT_HAL_DM, + //HAL_INIT_STAGES_RF_PS, + HAL_INIT_STAGES_IQK, + HAL_INIT_STAGES_PW_TRACK, + HAL_INIT_STAGES_LCK, + //HAL_INIT_STAGES_MISC21, + //HAL_INIT_STAGES_INIT_PABIAS, + #ifdef CONFIG_BT_COEXIST + HAL_INIT_STAGES_BT_COEXIST, + #endif + //HAL_INIT_STAGES_ANTENNA_SEL, + //HAL_INIT_STAGES_MISC31, + HAL_INIT_STAGES_END, + HAL_INIT_STAGES_NUM + }; + + char * hal_init_stages_str[] = { + "HAL_INIT_STAGES_BEGIN", + "HAL_INIT_STAGES_INIT_PW_ON", + "HAL_INIT_STAGES_MISC01", + "HAL_INIT_STAGES_DOWNLOAD_FW", + "HAL_INIT_STAGES_MAC", + "HAL_INIT_STAGES_BB", + "HAL_INIT_STAGES_RF", + "HAL_INIT_STAGES_EFUSE_PATCH", + "HAL_INIT_STAGES_INIT_LLTT", + "HAL_INIT_STAGES_MISC02", + "HAL_INIT_STAGES_TURN_ON_BLOCK", + "HAL_INIT_STAGES_INIT_SECURITY", + "HAL_INIT_STAGES_MISC11", + "HAL_INIT_STAGES_INIT_HAL_DM", + //"HAL_INIT_STAGES_RF_PS", + "HAL_INIT_STAGES_IQK", + "HAL_INIT_STAGES_PW_TRACK", + "HAL_INIT_STAGES_LCK", + //"HAL_INIT_STAGES_MISC21", + #ifdef CONFIG_BT_COEXIST + "HAL_INIT_STAGES_BT_COEXIST", + #endif + //"HAL_INIT_STAGES_ANTENNA_SEL", + //"HAL_INIT_STAGES_MISC31", + "HAL_INIT_STAGES_END", + }; + + int hal_init_profiling_i; + u32 hal_init_stages_timestamp[HAL_INIT_STAGES_NUM]; //used to record the time of each stage's starting point + + for(hal_init_profiling_i=0;hal_init_profiling_iwowlan_wake_reason = rtw_read8(Adapter, REG_WOWLAN_WAKE_REASON); + DBG_8192C("%s wowlan_wake_reason: 0x%02x\n", + __func__, pwrctrlpriv->wowlan_wake_reason); + + if(rtw_read8(Adapter, REG_MCUFWDL)&BIT7){ /*&& + (pwrctrlpriv->wowlan_wake_reason & FWDecisionDisconnect)) {*/ + u8 reg_val=0; + DBG_8192C("+Reset Entry+\n"); + rtw_write8(Adapter, REG_MCUFWDL, 0x00); + _8051Reset88E(Adapter); + //reset BB + reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN); + reg_val &= ~(BIT(0) | BIT(1)); + rtw_write8(Adapter, REG_SYS_FUNC_EN, reg_val); + //reset RF + rtw_write8(Adapter, REG_RF_CTRL, 0); + //reset TRX path + rtw_write16(Adapter, REG_CR, 0); + //reset MAC, Digital Core + reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); + reg_val &= ~(BIT(4) | BIT(7)); + rtw_write8(Adapter, REG_SYS_FUNC_EN+1, reg_val); + reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); + reg_val |= BIT(4) | BIT(7); + rtw_write8(Adapter, REG_SYS_FUNC_EN+1, reg_val); + DBG_8192C("-Reset Entry-\n"); + } +#endif //CONFIG_WOWLAN + + if(pwrctrlpriv->bkeepfwalive) + { _ps_open_RF(Adapter); - if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) { - PHY_IQCalibrate_8188E(Adapter, true); - } else { - PHY_IQCalibrate_8188E(Adapter, false); - haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true; + if(pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized){ +// PHY_IQCalibrate(padapter, _TRUE); + PHY_IQCalibrate_8188E(Adapter,_TRUE); + } + else + { +// PHY_IQCalibrate(padapter, _FALSE); + PHY_IQCalibrate_8188E(Adapter,_FALSE); + pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized = _TRUE; } - ODM_TXPowerTrackingCheck(&haldata->odmpriv); +// dm_CheckTXPowerTracking(padapter); +// PHY_LCCalibrate(padapter); + ODM_TXPowerTrackingCheck(&pHalData->odmpriv ); PHY_LCCalibrate_8188E(Adapter); goto exit; } + - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON); - status = rtl8188eu_InitPowerOn(Adapter); - if (status == _FAIL) { +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON); + status = InitPowerOn_rtl8188eu(Adapter); + if(status == _FAIL){ RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n")); goto exit; } - /* Save target channel */ - haldata->CurrentChannel = 6;/* default set to 6 */ + // Save target channel + pHalData->CurrentChannel = 6;//default set to 6 - if (pwrctrlpriv->reg_rfoff) { + + if(pwrctrlpriv->reg_rfoff == _TRUE){ pwrctrlpriv->rf_pwrstate = rf_off; } - /* 2010/08/09 MH We need to check if we need to turnon or off RF after detecting */ - /* HW GPIO pin. Before PHY_RFConfig8192C. */ - /* 2010/08/26 MH If Efuse does not support sective suspend then disable the function. */ + // 2010/08/09 MH We need to check if we need to turnon or off RF after detecting + // HW GPIO pin. Before PHY_RFConfig8192C. + //HalDetectPwrDownMode(Adapter); + // 2010/08/26 MH If Efuse does not support sective suspend then disable the function. + //HalDetectSelectiveSuspendMode(Adapter); if (!pregistrypriv->wifi_spec) { txpktbuf_bndy = TX_PAGE_BOUNDARY_88E; } else { - /* for WMM */ + // for WMM txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E; } - - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01); - _InitQueueReservedPage(Adapter); + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01); + _InitQueueReservedPage(Adapter); _InitQueuePriority(Adapter); - _InitPageBoundary(Adapter); + _InitPageBoundary(Adapter); _InitTransferPageSize(Adapter); + +#ifdef CONFIG_IOL_IOREG_CFG + _InitTxBufferBoundary(Adapter, 0); +#endif - _InitTxBufferBoundary(Adapter, 0); - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW); - if (Adapter->registrypriv.mp_mode == 1) { + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW); +#if (MP_DRIVER == 1) + if (Adapter->registrypriv.mp_mode == 1) + { _InitRxSetting(Adapter); - Adapter->bFWReady = false; - haldata->fw_ractrl = false; - } else { + } +#endif //MP_DRIVER == 1 + { + #if 0 + Adapter->bFWReady = _FALSE; //because no fw for test chip + pHalData->fw_ractrl = _FALSE; + #else + +#ifdef CONFIG_WOWLAN + status = rtl8188e_FirmwareDownload(Adapter, _FALSE); +#else status = rtl8188e_FirmwareDownload(Adapter); +#endif //CONFIG_WOWLAN if (status != _SUCCESS) { - DBG_88E("%s: Download Firmware failed!!\n", __func__); - Adapter->bFWReady = false; - haldata->fw_ractrl = false; + DBG_871X("%s: Download Firmware failed!!\n", __FUNCTION__); + Adapter->bFWReady = _FALSE; + pHalData->fw_ractrl = _FALSE; return status; } else { - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializeadapt8192CSdio(): Download Firmware Success!!\n")); - Adapter->bFWReady = true; - haldata->fw_ractrl = false; + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializepadapter8192CSdio(): Download Firmware Success!!\n")); + Adapter->bFWReady = _TRUE; + pHalData->fw_ractrl = _FALSE; } + #endif } + + rtl8188e_InitializeFirmwareVars(Adapter); - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC); + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC); #if (HAL_MAC_ENABLE == 1) status = PHY_MACConfig8188E(Adapter); - if (status == _FAIL) { - DBG_88E(" ### Failed to init MAC ......\n "); + if(status == _FAIL) + { + DBG_871X(" ### Failed to init MAC ...... \n "); goto exit; } -#endif +#endif - /* */ - /* d. Initialize BB related configurations. */ - /* */ - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB); + // + //d. Initialize BB related configurations. + // +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB); #if (HAL_BB_ENABLE == 1) status = PHY_BBConfig8188E(Adapter); - if (status == _FAIL) { - DBG_88E(" ### Failed to init BB ......\n "); + if(status == _FAIL) + { + DBG_871X(" ### Failed to init BB ...... \n "); goto exit; } #endif - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF); + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF); #if (HAL_RF_ENABLE == 1) - status = PHY_RFConfig8188E(Adapter); - if (status == _FAIL) { - DBG_88E(" ### Failed to init RF ......\n "); + status = PHY_RFConfig8188E(Adapter); + if(status == _FAIL) + { + DBG_871X(" ### Failed to init RF ...... \n "); goto exit; } #endif - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH); +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH); +#if defined(CONFIG_IOL_EFUSE_PATCH) status = rtl8188e_iol_efuse_patch(Adapter); - if (status == _FAIL) { - DBG_88E("%s rtl8188e_iol_efuse_patch failed\n", __func__); + if(status == _FAIL){ + DBG_871X("%s rtl8188e_iol_efuse_patch failed \n",__FUNCTION__); goto exit; - } + } +#endif - _InitTxBufferBoundary(Adapter, txpktbuf_bndy); + _InitTxBufferBoundary(Adapter, txpktbuf_bndy); - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT); +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT); status = InitLLTTable(Adapter, txpktbuf_bndy); - if (status == _FAIL) { + if(status == _FAIL){ RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n")); goto exit; } - - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02); - /* Get Rx PHY status in order to report RSSI and others. */ + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02); + // Get Rx PHY status in order to report RSSI and others. _InitDriverInfoSize(Adapter, DRVINFO_SZ); _InitInterrupt(Adapter); - hal_init_macaddr(Adapter);/* set mac_address */ - _InitNetworkType(Adapter);/* set msr */ + hal_init_macaddr(Adapter);//set mac_address + _InitNetworkType(Adapter);//set msr _InitWMACSetting(Adapter); _InitAdaptiveCtrl(Adapter); _InitEDCA(Adapter); + //_InitRateFallback(Adapter);//just follow MP Team ???Georgia _InitRetryFunction(Adapter); InitUsbAggregationSetting(Adapter); - _InitOperationMode(Adapter);/* todo */ + _InitOperationMode(Adapter);//todo _InitBeaconParameters(Adapter); - _InitBeaconMaxError(Adapter, true); + _InitBeaconMaxError(Adapter, _TRUE); - /* */ - /* Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */ - /* Hw bug which Hw initials RxFF boundary size to a value which is larger than the real Rx buffer size in 88E. */ - /* */ - /* Enable MACTXEN/MACRXEN block */ + // + // Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch + // Hw bug which Hw initials RxFF boundry size to a value which is larger than the real Rx buffer size in 88E. + // + // Enable MACTXEN/MACRXEN block value16 = rtw_read16(Adapter, REG_CR); value16 |= (MACTXEN | MACRXEN); - rtw_write8(Adapter, REG_CR, value16); + rtw_write8(Adapter, REG_CR, value16); - if (haldata->bRDGEnable) + + _InitHardwareDropIncorrectBulkOut(Adapter); + + + if(pHalData->bRDGEnable){ _InitRDGSetting(Adapter); + } - /* Enable TX Report */ - /* Enable Tx Report Timer */ - value8 = rtw_read8(Adapter, REG_TX_RPT_CTRL); - rtw_write8(Adapter, REG_TX_RPT_CTRL, (value8|BIT1|BIT0)); - /* Set MAX RPT MACID */ - rtw_write8(Adapter, REG_TX_RPT_CTRL+1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */ - /* Tx RPT Timer. Unit: 32us */ - rtw_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0); +#if (RATE_ADAPTIVE_SUPPORT==1) + {//Enable TX Report + //Enable Tx Report Timer + value8 = rtw_read8(Adapter, REG_TX_RPT_CTRL); + rtw_write8(Adapter, REG_TX_RPT_CTRL, (value8|BIT1|BIT0)); + //Set MAX RPT MACID + rtw_write8(Adapter, REG_TX_RPT_CTRL+1, 2);//FOR sta mode ,0: bc/mc ,1:AP + //Tx RPT Timer. Unit: 32us + rtw_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0); + } +#endif - rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, 0); +#if 0 + if(pHTInfo->bRDGEnable){ + _InitRDGSetting_8188E(Adapter); + } +#endif - rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */ - rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */ +#ifdef CONFIG_TX_EARLY_MODE + if( pHalData->bEarlyModeEnable) + { + RT_TRACE(_module_hci_hal_init_c_, _drv_info_,("EarlyMode Enabled!!!\n")); + value8 = rtw_read8(Adapter, REG_EARLY_MODE_CONTROL); +#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 + value8 = value8|0x1f; +#else + value8 = value8|0xf; +#endif + rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, value8); + + rtw_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x80); + + value8 = rtw_read8(Adapter, REG_TCR+1); + value8 = value8|0x40; + rtw_write8(Adapter,REG_TCR+1, value8); + } + else +#endif + { + rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, 0); + } + + rtw_write32(Adapter,REG_MACID_NO_LINK_0,0xFFFFFFFF); + rtw_write32(Adapter,REG_MACID_NO_LINK_1,0xFFFFFFFF); + +#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_TX_MCAST2UNI) + +#ifdef CONFIG_CHECK_AC_LIFETIME + // Enable lifetime check for the four ACs + rtw_write8(Adapter, REG_LIFETIME_EN, 0x0F); +#endif // CONFIG_CHECK_AC_LIFETIME + +#ifdef CONFIG_TX_MCAST2UNI + rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); // unit: 256us. 256ms + rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); // unit: 256us. 256ms +#else // CONFIG_TX_MCAST2UNI + rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x3000); // unit: 256us. 3s + rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x3000); // unit: 256us. 3s +#endif // CONFIG_TX_MCAST2UNI +#endif // CONFIG_CONCURRENT_MODE || CONFIG_TX_MCAST2UNI + + +#ifdef CONFIG_LED _InitHWLed(Adapter); +#endif //CONFIG_LED - /* Keep RfRegChnlVal for later use. */ - haldata->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask); - haldata->RfRegChnlVal[1] = PHY_QueryRFReg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask); + + // + // Joseph Note: Keep RfRegChnlVal for later use. + // + pHalData->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E)0, RF_CHNLBW, bRFRegOffsetMask); + pHalData->RfRegChnlVal[1] = PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E)1, RF_CHNLBW, bRFRegOffsetMask); HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK); _BBTurnOnBlock(Adapter); + //NicIFSetMacAddress(padapter, padapter->PermanentAddress); HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY); invalidate_cam_all(Adapter); HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); - /* 2010/12/17 MH We need to set TX power according to EFUSE content at first. */ - PHY_SetTxPowerLevel8188E(Adapter, haldata->CurrentChannel); + // 2010/12/17 MH We need to set TX power according to EFUSE content at first. + PHY_SetTxPowerLevel8188E(Adapter, pHalData->CurrentChannel); -/* Move by Neo for USB SS to below setp */ -/* _RfPowerSave(Adapter); */ +// Move by Neo for USB SS to below setp +//_RfPowerSave(Adapter); _InitAntenna_Selection(Adapter); - - /* */ - /* Disable BAR, suggested by Scott */ - /* 2010.04.09 add by hpfan */ - /* */ + + // + // Disable BAR, suggested by Scott + // 2010.04.09 add by hpfan + // rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff); - /* HW SEQ CTRL */ - /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */ - rtw_write8(Adapter, REG_HWSEQ_CTRL, 0xFF); + // HW SEQ CTRL + //set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. + rtw_write8(Adapter,REG_HWSEQ_CTRL, 0xFF); - if (pregistrypriv->wifi_spec) - rtw_write16(Adapter, REG_FAST_EDCA_CTRL, 0); + if(pregistrypriv->wifi_spec) + rtw_write16(Adapter,REG_FAST_EDCA_CTRL ,0); - /* Nav limit , suggest by scott */ + //Nav limit , suggest by scott rtw_write8(Adapter, 0x652, 0x0); HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); rtl8188e_InitHalDm(Adapter); - - if (Adapter->registrypriv.mp_mode == 1) { - Adapter->mppriv.channel = haldata->CurrentChannel; + +#if (MP_DRIVER == 1) + if (Adapter->registrypriv.mp_mode == 1) + { + Adapter->mppriv.channel = pHalData->CurrentChannel; MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel); - } else { - /* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */ - /* and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */ - /* call initstruct adapter. May cause some problem?? */ - /* Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */ - /* in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */ - /* is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */ - /* Added by tynli. 2010.03.30. */ + } + else +#endif //#if (MP_DRIVER == 1) + { + // + // 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status + // and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not + // call init_adapter. May cause some problem?? + // + // Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed + // in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState + // is the same as eRfOff, we should change it to eRfOn after we config RF parameters. + // Added by tynli. 2010.03.30. + pwrctrlpriv->rf_pwrstate = rf_on; + +#if 0 //to do + RT_CLEAR_PS_LEVEL(pwrctrlpriv, RT_RF_OFF_LEVL_HALT_NIC); +#if 1 //Todo + // 20100326 Joseph: Copy from GPIOChangeRFWorkItemCallBack() function to check HW radio on/off. + // 20100329 Joseph: Revise and integrate the HW/SW radio off code in initialization. + + eRfPowerStateToSet = (rt_rf_power_state) RfOnOffDetect(Adapter); + pwrctrlpriv->rfoff_reason |= eRfPowerStateToSet==rf_on ? RF_CHANGE_BY_INIT : RF_CHANGE_BY_HW; + pwrctrlpriv->rfoff_reason |= (pwrctrlpriv->reg_rfoff) ? RF_CHANGE_BY_SW : 0; + + if(pwrctrlpriv->rfoff_reason&RF_CHANGE_BY_HW) + pwrctrlpriv->b_hw_radio_off = _TRUE; + + DBG_8192C("eRfPowerStateToSet=%d\n", eRfPowerStateToSet); + + if(pwrctrlpriv->reg_rfoff == _TRUE) + { // User disable RF via registry. + DBG_8192C("InitializeAdapter8192CU(): Turn off RF for RegRfOff.\n"); + //MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_SW, _TRUE); + + // Those action will be discard in MgntActSet_RF_State because off the same state + //for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) + //PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0); + } + else if(pwrctrlpriv->rfoff_reason > RF_CHANGE_BY_PS) + { // H/W or S/W RF OFF before sleep. + DBG_8192C(" Turn off RF for RfOffReason(%x) ----------\n", pwrctrlpriv->rfoff_reason); + //pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; pwrctrlpriv->rf_pwrstate = rf_on; - - /* enable Tx report. */ - rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+1, 0x0F); - - /* Suggested by SD1 pisa. Added by tynli. 2011.10.21. */ - rtw_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x01);/* Pretx_en, for WEP/TKIP SEC */ - - /* tynli_test_tx_report. */ - rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0); - - /* enable tx DMA to drop the redundate data of packet */ - rtw_write16(Adapter, REG_TXDMA_OFFSET_CHK, (rtw_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN)); - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); - /* 2010/08/26 MH Merge from 8192CE. */ - if (pwrctrlpriv->rf_pwrstate == rf_on) { - if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) { - PHY_IQCalibrate_8188E(Adapter, true); - } else { - PHY_IQCalibrate_8188E(Adapter, false); - haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true; + //MgntActSet_RF_State(Adapter, rf_off, pwrctrlpriv->rfoff_reason, _TRUE); + } + else + { + // Perform GPIO polling to find out current RF state. added by Roger, 2010.04.09. + if(pHalData->BoardType == BOARD_MINICARD /*&& (Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)*/) + { + DBG_8192C("InitializeAdapter8192CU(): RF=%d \n", eRfPowerStateToSet); + if (eRfPowerStateToSet == rf_off) + { + //MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_HW, _TRUE); + pwrctrlpriv->b_hw_radio_off = _TRUE; } - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); - - ODM_TXPowerTrackingCheck(&haldata->odmpriv); - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); - PHY_LCCalibrate_8188E(Adapter); + else + { + pwrctrlpriv->rf_pwrstate = rf_off; + pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; + pwrctrlpriv->b_hw_radio_off = _FALSE; + //MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE); + } + } + else + { + pwrctrlpriv->rf_pwrstate = rf_off; + pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; + //MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE); } + + pwrctrlpriv->rfoff_reason = 0; + pwrctrlpriv->b_hw_radio_off = _FALSE; + pwrctrlpriv->rf_pwrstate = rf_on; + rtw_led_control(Adapter, LED_CTL_POWER_ON); + } -/* HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); */ -/* _InitPABias(Adapter); */ + // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. + // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. + if(pHalData->pwrdown && eRfPowerStateToSet == rf_off) + { + // Enable register area 0x0-0xc. + rtw_write8(Adapter, REG_RSV_CTRL, 0x0); + + // + // We should configure HW PDn source for WiFi ONLY, and then + // our HW will be set in power-down mode if PDn source from all functions are configured. + // 2010.10.06. + // + //if(IS_HARDWARE_TYPE_8723AU(Adapter)) + //{ + // u1bTmp = rtw_read8(Adapter, REG_MULTI_FUNC_CTRL); + // rtw_write8(Adapter, REG_MULTI_FUNC_CTRL, (u1bTmp|WL_HWPDN_EN)); + //} + //else + //{ + rtw_write16(Adapter, REG_APS_FSMCO, 0x8812); + //} + } + //DrvIFIndicateCurrentPhyStatus(Adapter); // 2010/08/17 MH Disable to prevent BSOD. +#endif +#endif + + + // enable Tx report. + rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+1, 0x0F); + + // Suggested by SD1 pisa. Added by tynli. 2011.10.21. + rtw_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x01);//Pretx_en, for WEP/TKIP SEC + + //tynli_test_tx_report. + rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0); + //RT_TRACE(COMP_INIT, DBG_TRACE, ("InitializeAdapter8188EUsb() <====\n")); + + //enable tx DMA to drop the redundate data of packet + rtw_write16(Adapter,REG_TXDMA_OFFSET_CHK, (rtw_read16(Adapter,REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN)); + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); + // 2010/08/26 MH Merge from 8192CE. + if(pwrctrlpriv->rf_pwrstate == rf_on) + { + if(pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized){ + PHY_IQCalibrate_8188E(Adapter,_TRUE); + } + else + { + PHY_IQCalibrate_8188E(Adapter,_FALSE); + pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized = _TRUE; + } + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); + + ODM_TXPowerTrackingCheck(&pHalData->odmpriv ); + + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); + PHY_LCCalibrate_8188E(Adapter); + } +} + +//HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); +// _InitPABias(Adapter); rtw_write8(Adapter, REG_USB_HRPWM, 0); - /* ack for xmit mgmt frames. */ +#ifdef CONFIG_XMIT_ACK + //ack for xmit mgmt frames. rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12)); +#endif //CONFIG_XMIT_ACK exit: HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); - DBG_88E("%s in %dms\n", __func__, rtw_get_passing_time_ms(init_start_time)); + DBG_871X("%s in %dms\n", __FUNCTION__, rtw_get_passing_time_ms(init_start_time)); + + #ifdef DBG_HAL_INIT_PROFILING + hal_init_stages_timestamp[HAL_INIT_STAGES_END]=rtw_get_current_time(); + + for(hal_init_profiling_i=0;hal_init_profiling_iMgntInfo); + u8 val8; + u16 val16; + u32 val32; + u8 bMacPwrCtrlOn=_FALSE; - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("CardDisableRTL8188EU\n")); + rtw_hal_get_hwreg(Adapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if(bMacPwrCtrlOn == _FALSE) + return ; - /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */ + RT_TRACE(COMP_INIT, DBG_LOUD, ("%s\n",__FUNCTION__)); + + //Stop Tx Report Timer. 0x4EC[Bit1]=b'0 val8 = rtw_read8(Adapter, REG_TX_RPT_CTRL); rtw_write8(Adapter, REG_TX_RPT_CTRL, val8&(~BIT1)); - /* stop rx */ + // stop rx rtw_write8(Adapter, REG_CR, 0x0); - - /* Run LPS WL RFOFF flow */ + + // Run LPS WL RFOFF flow HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_LPS_ENTER_FLOW); - /* 2. 0x1F[7:0] = 0 turn off RF */ + + // 2. 0x1F[7:0] = 0 // turn off RF + //rtw_write8(Adapter, REG_RF_CTRL, 0x00); val8 = rtw_read8(Adapter, REG_MCUFWDL); - if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) { /* 8051 RAM code */ - /* Reset MCU 0x2[10]=0. */ + if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) //8051 RAM code + { + //rtl8723a_FirmwareSelfReset(padapter); + //_8051Reset88E(padapter); + + // Reset MCU 0x2[10]=0. val8 = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); - val8 &= ~BIT(2); /* 0x2[10], FEN_CPUEN */ + val8 &= ~BIT(2); // 0x2[10], FEN_CPUEN rtw_write8(Adapter, REG_SYS_FUNC_EN+1, val8); - } + } - /* reset MCU ready status */ + //val8 = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); + //val8 &= ~BIT(2); // 0x2[10], FEN_CPUEN + //rtw_write8(Adapter, REG_SYS_FUNC_EN+1, val8); + + // MCUFWDL 0x80[1:0]=0 + // reset MCU ready status rtw_write8(Adapter, REG_MCUFWDL, 0); - /* YJ,add,111212 */ - /* Disable 32k */ + //YJ,add,111212 + //Disable 32k val8 = rtw_read8(Adapter, REG_32K_CTRL); rtw_write8(Adapter, REG_32K_CTRL, val8&(~BIT0)); - - /* Card disable power action flow */ - HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_DISABLE_FLOW); - - /* Reset MCU IO Wrapper */ + + // Card disable power action flow + HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_DISABLE_FLOW); + + // Reset MCU IO Wrapper val8 = rtw_read8(Adapter, REG_RSV_CTRL+1); - rtw_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT3))); + rtw_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT3))); val8 = rtw_read8(Adapter, REG_RSV_CTRL+1); rtw_write8(Adapter, REG_RSV_CTRL+1, val8|BIT3); - - /* YJ,test add, 111207. For Power Consumption. */ + +#if 0 + // 7. RSV_CTRL 0x1C[7:0] = 0x0E // lock ISO/CLK/Power control register + rtw_write8(Adapter, REG_RSV_CTRL, 0x0e); +#endif +#if 1 + //YJ,test add, 111207. For Power Consumption. val8 = rtw_read8(Adapter, GPIO_IN); rtw_write8(Adapter, GPIO_OUT, val8); - rtw_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */ + rtw_write8(Adapter, GPIO_IO_SEL, 0xFF);//Reg0x46 val8 = rtw_read8(Adapter, REG_GPIO_IO_SEL); + //rtw_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4)|val8); rtw_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4)); val8 = rtw_read8(Adapter, REG_GPIO_IO_SEL+1); - rtw_write8(Adapter, REG_GPIO_IO_SEL+1, val8|0x0F);/* Reg0x43 */ - rtw_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */ - haldata->bMacPwrCtrlOn = false; - Adapter->bFWReady = false; + rtw_write8(Adapter, REG_GPIO_IO_SEL+1, val8|0x0F);//Reg0x43 + rtw_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);//set LNA ,TRSW,EX_PA Pin to output mode +#endif + bMacPwrCtrlOn = _FALSE; + rtw_hal_set_hwreg(Adapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + Adapter->bFWReady = _FALSE; } -static void rtl8192cu_hw_power_down(struct adapter *adapt) +static void rtl8188eu_hw_power_down(_adapter *padapter) { - /* 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */ - /* Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */ - - /* Enable register area 0x0-0xc. */ - rtw_write8(adapt, REG_RSV_CTRL, 0x0); - rtw_write16(adapt, REG_APS_FSMCO, 0x8812); + // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. + // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. + + // Enable register area 0x0-0xc. + rtw_write8(padapter,REG_RSV_CTRL, 0x0); + rtw_write16(padapter, REG_APS_FSMCO, 0x8812); } -static u32 rtl8188eu_hal_deinit(struct adapter *Adapter) -{ - - DBG_88E("==> %s\n", __func__); +u32 rtl8188eu_hal_deinit(PADAPTER Adapter) + { + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + DBG_8192C("==> %s \n",__FUNCTION__); +#ifdef CONFIG_SUPPORT_USB_INT rtw_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E); rtw_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E); +#endif + + #ifdef SUPPORT_HW_RFOFF_DETECTED + DBG_8192C("bkeepfwalive(%x)\n", pwrctl->bkeepfwalive); + if(pwrctl->bkeepfwalive) + { + _ps_close_RF(Adapter); + if((pwrctl->bHWPwrPindetect) && (pwrctl->bHWPowerdown)) + rtl8188eu_hw_power_down(Adapter); + } + else +#endif + { + if(Adapter->hw_init_completed == _TRUE){ + hal_poweroff_rtl8188eu(Adapter); - DBG_88E("bkeepfwalive(%x)\n", Adapter->pwrctrlpriv.bkeepfwalive); - if (Adapter->pwrctrlpriv.bkeepfwalive) { - _ps_close_RF(Adapter); - if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown)) - rtl8192cu_hw_power_down(Adapter); - } else { - if (Adapter->hw_init_completed) { - CardDisableRTL8188EU(Adapter); - - if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown)) - rtl8192cu_hw_power_down(Adapter); + if((pwrctl->bHWPwrPindetect ) && (pwrctl->bHWPowerdown)) + rtl8188eu_hw_power_down(Adapter); + } - } + } return _SUCCESS; } -static unsigned int rtl8188eu_inirp_init(struct adapter *Adapter) -{ - u8 i; + +unsigned int rtl8188eu_inirp_init(PADAPTER Adapter) +{ + u8 i; struct recv_buf *precvbuf; uint status; - struct intf_hdl *pintfhdl = &Adapter->iopriv.intf; - struct recv_priv *precvpriv = &(Adapter->recvpriv); + struct dvobj_priv *pdev= adapter_to_dvobj(Adapter); + struct intf_hdl * pintfhdl=&Adapter->iopriv.intf; + struct recv_priv *precvpriv = &(Adapter->recvpriv); u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr); +#endif + +_func_enter_; _read_port = pintfhdl->io_ops._read_port; status = _SUCCESS; - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, - ("===> usb_inirp_init\n")); - + RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("===> usb_inirp_init \n")); + precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR; - /* issue Rx irp to receive data */ - precvbuf = (struct recv_buf *)precvpriv->precv_buf; - for (i = 0; i < NR_RECVBUFF; i++) { - if (_read_port(pintfhdl, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == false) { - RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("usb_rx_init: usb_read_port error\n")); + //issue Rx irp to receive data + precvbuf = (struct recv_buf *)precvpriv->precv_buf; + for(i=0; iff_hwaddr, 0, (unsigned char *)precvbuf) == _FALSE ) + { + RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_port error \n")); status = _FAIL; goto exit; } - - precvbuf++; + + precvbuf++; precvpriv->free_recv_buf_queue_cnt--; } -exit: +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + if(pHalData->RtIntInPipe != 0x05) + { + status = _FAIL; + DBG_871X("%s =>Warning !! Have not USB Int-IN pipe, pHalData->RtIntInPipe(%d)!!!\n",__FUNCTION__,pHalData->RtIntInPipe); + goto exit; + } + _read_interrupt = pintfhdl->io_ops._read_interrupt; + if(_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == _FALSE ) + { + RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_interrupt error \n")); + status = _FAIL; + } +#endif - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("<=== usb_inirp_init\n")); +exit: + + RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("<=== usb_inirp_init \n")); + +_func_exit_; return status; + } -static unsigned int rtl8188eu_inirp_deinit(struct adapter *Adapter) -{ - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("\n ===> usb_rx_deinit\n")); - +unsigned int rtl8188eu_inirp_deinit(PADAPTER Adapter) +{ + RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n ===> usb_rx_deinit \n")); + rtw_read_port_cancel(Adapter); - RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("\n <=== usb_rx_deinit\n")); + RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n <=== usb_rx_deinit \n")); return _SUCCESS; } -/* */ -/* */ -/* EEPROM/EFUSE Content Parsing */ -/* */ -/* */ -static void _ReadLEDSetting(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail) + + +//------------------------------------------------------------------------- +// +// EEPROM Power index mapping +// +//------------------------------------------------------------------------- +#if 0 + static VOID +_ReadPowerValueFromPROM( + IN PTxPowerInfo pwrInfo, + IN u8* PROMContent, + IN BOOLEAN AutoLoadFail + ) +{ + u32 rfPath, eeAddr, group; + + _rtw_memset(pwrInfo, 0, sizeof(TxPowerInfo)); + + if(AutoLoadFail){ + for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){ + for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){ + pwrInfo->CCKIndex[rfPath][group] = EEPROM_Default_TxPowerLevel; + pwrInfo->HT40_1SIndex[rfPath][group] = EEPROM_Default_TxPowerLevel; + pwrInfo->HT40_2SIndexDiff[rfPath][group]= EEPROM_Default_HT40_2SDiff; + pwrInfo->HT20IndexDiff[rfPath][group] = EEPROM_Default_HT20_Diff; + pwrInfo->OFDMIndexDiff[rfPath][group] = EEPROM_Default_LegacyHTTxPowerDiff; + pwrInfo->HT40MaxOffset[rfPath][group] = EEPROM_Default_HT40_PwrMaxOffset; + pwrInfo->HT20MaxOffset[rfPath][group] = EEPROM_Default_HT20_PwrMaxOffset; + } + } + + pwrInfo->TSSI_A = EEPROM_Default_TSSI; + pwrInfo->TSSI_B = EEPROM_Default_TSSI; + + return; + } + + for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){ + for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){ + eeAddr = EEPROM_CCK_TX_PWR_INX + (rfPath * 3) + group; + pwrInfo->CCKIndex[rfPath][group] = PROMContent[eeAddr]; + + eeAddr = EEPROM_HT40_1S_TX_PWR_INX + (rfPath * 3) + group; + pwrInfo->HT40_1SIndex[rfPath][group] = PROMContent[eeAddr]; + } + } + + for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){ + for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){ + pwrInfo->HT40_2SIndexDiff[rfPath][group] = + (PROMContent[EEPROM_HT40_2S_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF; + +#if 1 + pwrInfo->HT20IndexDiff[rfPath][group] = + (PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF; + if(pwrInfo->HT20IndexDiff[rfPath][group] & BIT3) //4bit sign number to 8 bit sign number + pwrInfo->HT20IndexDiff[rfPath][group] |= 0xF0; +#else + pwrInfo->HT20IndexDiff[rfPath][group] = + (PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF; +#endif + + pwrInfo->OFDMIndexDiff[rfPath][group] = + (PROMContent[EEPROM_OFDM_TX_PWR_INX_DIFF+ group] >> (rfPath * 4)) & 0xF; + + pwrInfo->HT40MaxOffset[rfPath][group] = + (PROMContent[EEPROM_HT40_MAX_PWR_OFFSET+ group] >> (rfPath * 4)) & 0xF; + + pwrInfo->HT20MaxOffset[rfPath][group] = + (PROMContent[EEPROM_HT20_MAX_PWR_OFFSET+ group] >> (rfPath * 4)) & 0xF; + } + } + + pwrInfo->TSSI_A = PROMContent[EEPROM_TSSI_A]; + pwrInfo->TSSI_B = PROMContent[EEPROM_TSSI_B]; + +} + + +static u32 +_GetChannelGroup( + IN u32 channel + ) +{ + //RT_ASSERT((channel < 14), ("Channel %d no is supported!\n")); + + if(channel < 3){ // Channel 1~3 + return 0; + } + else if(channel < 9){ // Channel 4~9 + return 1; + } + + return 2; // Channel 10~14 +} + + +static VOID +ReadTxPowerInfo( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + TxPowerInfo pwrInfo; + u32 rfPath, ch, group; + u8 pwr, diff; + + _ReadPowerValueFromPROM(&pwrInfo, PROMContent, AutoLoadFail); + + if(!AutoLoadFail) + pHalData->bTXPowerDataReadFromEEPORM = _TRUE; + + for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){ + for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ + group = _GetChannelGroup(ch); + + pHalData->TxPwrLevelCck[rfPath][ch] = pwrInfo.CCKIndex[rfPath][group]; + pHalData->TxPwrLevelHT40_1S[rfPath][ch] = pwrInfo.HT40_1SIndex[rfPath][group]; + + pHalData->TxPwrHt20Diff[rfPath][ch] = pwrInfo.HT20IndexDiff[rfPath][group]; + pHalData->TxPwrLegacyHtDiff[rfPath][ch] = pwrInfo.OFDMIndexDiff[rfPath][group]; + pHalData->PwrGroupHT20[rfPath][ch] = pwrInfo.HT20MaxOffset[rfPath][group]; + pHalData->PwrGroupHT40[rfPath][ch] = pwrInfo.HT40MaxOffset[rfPath][group]; + + pwr = pwrInfo.HT40_1SIndex[rfPath][group]; + diff = pwrInfo.HT40_2SIndexDiff[rfPath][group]; + + pHalData->TxPwrLevelHT40_2S[rfPath][ch] = (pwr > diff) ? (pwr - diff) : 0; + } + } + +#if 0 //DBG + + for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){ + for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ + RTPRINT(FINIT, INIT_TxPower, + ("RF(%d)-Ch(%d) [CCK / HT40_1S / HT40_2S] = [0x%x / 0x%x / 0x%x]\n", + rfPath, ch, pHalData->TxPwrLevelCck[rfPath][ch], + pHalData->TxPwrLevelHT40_1S[rfPath][ch], + pHalData->TxPwrLevelHT40_2S[rfPath][ch])); + + } + } + + for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ + RTPRINT(FINIT, INIT_TxPower, ("RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrHt20Diff[RF_PATH_A][ch])); + } + + for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ + RTPRINT(FINIT, INIT_TxPower, ("RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF_PATH_A][ch])); + } + + for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ + RTPRINT(FINIT, INIT_TxPower, ("RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrHt20Diff[RF_PATH_B][ch])); + } + + for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ + RTPRINT(FINIT, INIT_TxPower, ("RF-B Legacy to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF_PATH_B][ch])); + } + +#endif + // 2010/10/19 MH Add Regulator recognize for CU. + if(!AutoLoadFail) + { + pHalData->EEPROMRegulatory = (PROMContent[RF_OPTION1]&0x7); //bit0~2 + } + else + { + pHalData->EEPROMRegulatory = 0; + } + DBG_8192C("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory); + +} +#endif + +//------------------------------------------------------------------- +// +// EEPROM/EFUSE Content Parsing +// +//------------------------------------------------------------------- +static void +_ReadIDs( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if(_FALSE == AutoloadFail){ + // VID, PID + pHalData->EEPROMVID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_VID]); + pHalData->EEPROMPID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_PID]); + + // Customer ID, 0x00 and 0xff are reserved for Realtek. + pHalData->EEPROMCustomerID = *(u8 *)&PROMContent[EEPROM_CUSTOMER_ID]; + pHalData->EEPROMSubCustomerID = *(u8 *)&PROMContent[EEPROM_SUBCUSTOMER_ID]; + + } + else{ + pHalData->EEPROMVID = EEPROM_Default_VID; + pHalData->EEPROMPID = EEPROM_Default_PID; + + // Customer ID, 0x00 and 0xff are reserved for Realtek. + pHalData->EEPROMCustomerID = EEPROM_Default_CustomerID; + pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; + + } + + // For customized behavior. + if((pHalData->EEPROMVID == 0x103C) && (pHalData->EEPROMVID == 0x1629))// HP Lite-On for RTL8188CUS Slim Combo. + pHalData->CustomerID = RT_CID_819x_HP; + + // Decide CustomerID according to VID/DID or EEPROM + switch(pHalData->EEPROMCustomerID) + { + case EEPROM_CID_DEFAULT: + if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308)) + pHalData->CustomerID = RT_CID_DLINK; + else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309)) + pHalData->CustomerID = RT_CID_DLINK; + else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a)) + pHalData->CustomerID = RT_CID_DLINK; + break; + case EEPROM_CID_WHQL: +/* + Adapter->bInHctTest = TRUE; + + pMgntInfo->bSupportTurboMode = FALSE; + pMgntInfo->bAutoTurboBy8186 = FALSE; + + pMgntInfo->PowerSaveControl.bInactivePs = FALSE; + pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; + pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; + + pMgntInfo->keepAliveLevel = 0; + + Adapter->bUnloadDriverwhenS3S4 = FALSE; +*/ + break; + default: + pHalData->CustomerID = RT_CID_DEFAULT; + break; + + } + + MSG_8192C("EEPROMVID = 0x%04x\n", pHalData->EEPROMVID); + MSG_8192C("EEPROMPID = 0x%04x\n", pHalData->EEPROMPID); + MSG_8192C("EEPROMCustomerID : 0x%02x\n", pHalData->EEPROMCustomerID); + MSG_8192C("EEPROMSubCustomerID: 0x%02x\n", pHalData->EEPROMSubCustomerID); + + MSG_8192C("RT_CustomerID: 0x%02x\n", pHalData->CustomerID); +#endif +} + + +static VOID +_ReadMACAddress( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) +{ +#if 0 + + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); + + if(_FALSE == AutoloadFail){ + //Read Permanent MAC address and set value to hardware + _rtw_memcpy(pEEPROM->mac_addr, &PROMContent[EEPROM_MAC_ADDR], ETH_ALEN); + } + else{ + //Random assigh MAC address + u8 sMacAddr[MAC_ADDR_LEN] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00}; + //sMacAddr[5] = (u8)GetRandomNumber(1, 254); + _rtw_memcpy(pEEPROM->mac_addr, sMacAddr, ETH_ALEN); + } + DBG_8192C("%s MAC Address from EFUSE = "MAC_FMT"\n",__FUNCTION__, MAC_ARG(pEEPROM->mac_addr)); + //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress); + //RT_PRINT_ADDR(COMP_INIT|COMP_EFUSE, DBG_LOUD, "MAC Addr: %s", Adapter->PermanentAddress); +#endif +} + +static VOID +_ReadBoardType( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) +{ + +} + + +static VOID +_ReadLEDSetting( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) { struct led_priv *pledpriv = &(Adapter->ledpriv); - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +#ifdef CONFIG_SW_LED + pledpriv->bRegUseLed = _TRUE; - pledpriv->bRegUseLed = true; - pledpriv->LedStrategy = SW_LED_MODE1; - haldata->bLedOpenDrain = true;/* Support Open-drain arrangement for controlling the LED. */ -} - -static void Hal_EfuseParsePIDVID_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail) -{ - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - - if (!AutoLoadFail) { - /* VID, PID */ - haldata->EEPROMVID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_VID_88EU]); - haldata->EEPROMPID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_PID_88EU]); - - /* Customer ID, 0x00 and 0xff are reserved for Realtek. */ - haldata->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CUSTOMERID_88E]; - haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; - } else { - haldata->EEPROMVID = EEPROM_Default_VID; - haldata->EEPROMPID = EEPROM_Default_PID; - - /* Customer ID, 0x00 and 0xff are reserved for Realtek. */ - haldata->EEPROMCustomerID = EEPROM_Default_CustomerID; - haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; + switch(pHalData->CustomerID) + { + default: + pledpriv->LedStrategy = SW_LED_MODE1; + break; } - - DBG_88E("VID = 0x%04X, PID = 0x%04X\n", haldata->EEPROMVID, haldata->EEPROMPID); - DBG_88E("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", haldata->EEPROMCustomerID, haldata->EEPROMSubCustomerID); + pHalData->bLedOpenDrain = _TRUE;// Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. +#else // HW LED + pledpriv->LedStrategy = HW_LED; +#endif //CONFIG_SW_LED } -static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail) +static VOID +_ReadThermalMeter( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) { - u16 i; - u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02}; - struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt); +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + u8 tempval; - if (AutoLoadFail) { - for (i = 0; i < 6; i++) - eeprom->mac_addr[i] = sMacAddr[i]; - } else { - /* Read Permanent MAC address */ - memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN); - } - RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, - ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", - eeprom->mac_addr[0], eeprom->mac_addr[1], - eeprom->mac_addr[2], eeprom->mac_addr[3], - eeprom->mac_addr[4], eeprom->mac_addr[5])); + // + // ThermalMeter from EEPROM + // + if(!AutoloadFail) + tempval = PROMContent[EEPROM_THERMAL_METER]; + else + tempval = EEPROM_Default_ThermalMeter; + + pHalData->EEPROMThermalMeter = (tempval&0x1f); //[4:0] + + if(pHalData->EEPROMThermalMeter == 0x1f || AutoloadFail) + pdmpriv->bAPKThermalMeterIgnore = _TRUE; + +#if 0 + if(pHalData->EEPROMThermalMeter < 0x06 || pHalData->EEPROMThermalMeter > 0x1c) + pHalData->EEPROMThermalMeter = 0x12; +#endif + + pdmpriv->ThermalMeter[0] = pHalData->EEPROMThermalMeter; + + //RTPRINT(FINIT, INIT_TxPower, ("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter)); +#endif } -static void Hal_CustomizeByCustomerID_8188EU(struct adapter *adapt) +static VOID +_ReadRFSetting( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) { } static void -readAdapterInfo_8188EU( - struct adapter *adapt +_ReadPROMVersion( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail ) { - struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt); +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if(AutoloadFail){ + pHalData->EEPROMVersion = EEPROM_Default_Version; + } + else{ + pHalData->EEPROMVersion = *(u8 *)&PROMContent[EEPROM_VERSION]; + } +#endif +} + +static VOID +readAntennaDiversity( + IN PADAPTER pAdapter, + IN u8 *hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct registry_priv *registry_par = &pAdapter->registrypriv; + + pHalData->AntDivCfg = registry_par->antdiv_cfg ; // 0:OFF , 1:ON, +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct registry_priv *registry_par = &pAdapter->registrypriv; + + if(!AutoLoadFail) + { + // Antenna Diversity setting. + if(registry_par->antdiv_cfg == 2) // 2: From Efuse + pHalData->AntDivCfg = (hwinfo[EEPROM_RF_OPT1]&0x18)>>3; + else + pHalData->AntDivCfg = registry_par->antdiv_cfg ; // 0:OFF , 1:ON, + + DBG_8192C("### AntDivCfg(%x)\n",pHalData->AntDivCfg); + + //if(pHalData->EEPROMBluetoothCoexist!=0 && pHalData->EEPROMBluetoothAntNum==Ant_x1) + // pHalData->AntDivCfg = 0; + } + else + { + pHalData->AntDivCfg = 0; + } +#endif +} + +static VOID +hal_InitPGData( + IN PADAPTER pAdapter, + IN OUT u8 *PROMContent + ) +{ +#if 0 + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + u32 i; + u16 value16; + + if(_FALSE == pEEPROM->bautoload_fail_flag) + { // autoload OK. + if (_TRUE == pEEPROM->EepromOrEfuse) + { + // Read all Content from EEPROM or EFUSE. + for(i = 0; i < HWSET_MAX_SIZE_88E; i += 2) + { + //value16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1))); + //*((u16 *)(&PROMContent[i])) = value16; + } + } + else + { + // Read EFUSE real map to shadow. + EFUSE_ShadowMapUpdate(pAdapter, EFUSE_WIFI, _FALSE); + _rtw_memcpy((void*)PROMContent, (void*)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE_88E); + } + } + else + {//autoload fail + //RT_TRACE(COMP_INIT, DBG_LOUD, ("AutoLoad Fail reported from CR9346!!\n")); + pEEPROM->bautoload_fail_flag = _TRUE; + //update to default value 0xFF + if (_FALSE == pEEPROM->EepromOrEfuse) + EFUSE_ShadowMapUpdate(pAdapter, EFUSE_WIFI, _FALSE); + } +#endif +} +static void +Hal_EfuseParsePIDVID_8188EU( + IN PADAPTER pAdapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + if( !AutoLoadFail ) + { + // VID, PID + pHalData->EEPROMVID = EF2Byte( *(u16 *)&hwinfo[EEPROM_VID_88EU] ); + pHalData->EEPROMPID = EF2Byte( *(u16 *)&hwinfo[EEPROM_PID_88EU] ); + + // Customer ID, 0x00 and 0xff are reserved for Realtek. + pHalData->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CUSTOMERID_88E]; + pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; + + } + else + { + pHalData->EEPROMVID = EEPROM_Default_VID; + pHalData->EEPROMPID = EEPROM_Default_PID; + + // Customer ID, 0x00 and 0xff are reserved for Realtek. + pHalData->EEPROMCustomerID = EEPROM_Default_CustomerID; + pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; + + } + + DBG_871X("VID = 0x%04X, PID = 0x%04X\n", pHalData->EEPROMVID, pHalData->EEPROMPID); + DBG_871X("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", pHalData->EEPROMCustomerID, pHalData->EEPROMSubCustomerID); +} + +static void +Hal_EfuseParseMACAddr_8188EU( + IN PADAPTER padapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + u16 i, usValue; + u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02}; + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + + if (AutoLoadFail) + { +// sMacAddr[5] = (u1Byte)GetRandomNumber(1, 254); + for (i=0; i<6; i++) + pEEPROM->mac_addr[i] = sMacAddr[i]; + } + else + { + //Read Permanent MAC address + _rtw_memcpy(pEEPROM->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN); + + } +// NicIFSetMacAddress(pAdapter, pAdapter->PermanentAddress); + + RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, + ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", + pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], + pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], + pEEPROM->mac_addr[4], pEEPROM->mac_addr[5])); +} + + +static void +Hal_CustomizeByCustomerID_8188EU( + IN PADAPTER padapter + ) +{ +#if 0 + PMGNT_INFO pMgntInfo = &(padapter->MgntInfo); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + // For customized behavior. + if((pHalData->EEPROMVID == 0x103C) && (pHalData->EEPROMVID == 0x1629))// HP Lite-On for RTL8188CUS Slim Combo. + pMgntInfo->CustomerID = RT_CID_819x_HP; + + // Decide CustomerID according to VID/DID or EEPROM + switch(pHalData->EEPROMCustomerID) + { + case EEPROM_CID_DEFAULT: + if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308)) + pMgntInfo->CustomerID = RT_CID_DLINK; + else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309)) + pMgntInfo->CustomerID = RT_CID_DLINK; + else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a)) + pMgntInfo->CustomerID = RT_CID_DLINK; + break; + case EEPROM_CID_WHQL: + padapter->bInHctTest = TRUE; + + pMgntInfo->bSupportTurboMode = FALSE; + pMgntInfo->bAutoTurboBy8186 = FALSE; + + pMgntInfo->PowerSaveControl.bInactivePs = FALSE; + pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; + pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; + pMgntInfo->PowerSaveControl.bLeisurePsModeBackup =FALSE; + pMgntInfo->keepAliveLevel = 0; + + padapter->bUnloadDriverwhenS3S4 = FALSE; + break; + default: + pMgntInfo->CustomerID = RT_CID_DEFAULT; + break; + + } + + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Mgnt Customer ID: 0x%02x\n", pMgntInfo->CustomerID)); + + hal_CustomizedBehavior_8723U(padapter); +#endif +} + +// Read HW power down mode selection +static void _ReadPSSetting(IN PADAPTER Adapter,IN u8*PROMContent,IN u8 AutoloadFail) +{ +#if 0 + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter); + + if(AutoloadFail){ + pwrctl->bHWPowerdown = _FALSE; + pwrctl->bSupportRemoteWakeup = _FALSE; + } + else { + //if(SUPPORT_HW_RADIO_DETECT(Adapter)) + pwrctl->bHWPwrPindetect = Adapter->registrypriv.hwpwrp_detect; + //else + //pwrctl->bHWPwrPindetect = _FALSE;//dongle not support new + + + //hw power down mode selection , 0:rf-off / 1:power down + + if(Adapter->registrypriv.hwpdn_mode==2) + pwrctl->bHWPowerdown = (PROMContent[EEPROM_RF_OPT3] & BIT4); + else + pwrctl->bHWPowerdown = Adapter->registrypriv.hwpdn_mode; + + // decide hw if support remote wakeup function + // if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume + pwrctl->bSupportRemoteWakeup = (PROMContent[EEPROM_TEST_USB_OPT] & BIT1)?_TRUE :_FALSE; + + //if(SUPPORT_HW_RADIO_DETECT(Adapter)) + //Adapter->registrypriv.usbss_enable = pwrctl->bSupportRemoteWakeup ; + + DBG_8192C("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) ,bSupportRemoteWakeup(%x)\n",__FUNCTION__, + pwrctl->bHWPwrPindetect,pwrctl->bHWPowerdown ,pwrctl->bSupportRemoteWakeup); + + DBG_8192C("### PS params=> power_mgnt(%x),usbss_enable(%x) ###\n",Adapter->registrypriv.power_mgnt,Adapter->registrypriv.usbss_enable); + + } +#endif +} + +#ifdef CONFIG_EFUSE_CONFIG_FILE +static u32 Hal_readPGDataFromConfigFile( + PADAPTER padapter) +{ + u32 i; + struct file *fp; + mm_segment_t fs; + u8 temp[3]; + loff_t pos = 0; + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + u8 *PROMContent = pEEPROM->efuse_eeprom_data; + + + temp[2] = 0; // add end of string '\0' + + fp = filp_open("/system/etc/wifi/wifi_efuse.map", O_RDWR, 0644); + if (IS_ERR(fp)) { + pEEPROM->bloadfile_fail_flag = _TRUE; + DBG_871X("Error, Efuse configure file doesn't exist.\n"); + return _FAIL; + } + + fs = get_fs(); + set_fs(KERNEL_DS); + + DBG_871X("Efuse configure file:\n"); + for (i=0; ibloadfile_fail_flag = _FALSE; + + return _SUCCESS; +} + +static void +Hal_ReadMACAddrFromFile_8188EU( + PADAPTER padapter + ) +{ + u32 i; + struct file *fp; + mm_segment_t fs; + u8 source_addr[18]; + loff_t pos = 0; + u32 curtime = rtw_get_current_time(); + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + u8 *head, *end; + + u8 null_mac_addr[ETH_ALEN] = {0, 0, 0,0, 0, 0}; + u8 multi_mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + + _rtw_memset(source_addr, 0, 18); + _rtw_memset(pEEPROM->mac_addr, 0, ETH_ALEN); + + fp = filp_open("/data/wifimac.txt", O_RDWR, 0644); + if (IS_ERR(fp)) { + pEEPROM->bloadmac_fail_flag = _TRUE; + DBG_871X("Error, wifi mac address file doesn't exist.\n"); + } else { + fs = get_fs(); + set_fs(KERNEL_DS); + + DBG_871X("wifi mac address:\n"); + vfs_read(fp, source_addr, 18, &pos); + source_addr[17] = ':'; + + head = end = source_addr; + for (i=0; imac_addr[i] = simple_strtoul(head, NULL, 16 ); + + if (end) { + end++; + head = end; + } + DBG_871X("%02x \n", pEEPROM->mac_addr[i]); + } + DBG_871X("\n"); + set_fs(fs); + pEEPROM->bloadmac_fail_flag = _FALSE; + filp_close(fp, NULL); + } + + if ( (_rtw_memcmp(pEEPROM->mac_addr, null_mac_addr, ETH_ALEN)) || + (_rtw_memcmp(pEEPROM->mac_addr, multi_mac_addr, ETH_ALEN)) ) { + pEEPROM->mac_addr[0] = 0x00; + pEEPROM->mac_addr[1] = 0xe0; + pEEPROM->mac_addr[2] = 0x4c; + pEEPROM->mac_addr[3] = (u8)(curtime & 0xff) ; + pEEPROM->mac_addr[4] = (u8)((curtime>>8) & 0xff) ; + pEEPROM->mac_addr[5] = (u8)((curtime>>16) & 0xff) ; + } + + DBG_871X("Hal_ReadMACAddrFromFile_8188ES: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", + pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], + pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], + pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]); +} +#endif //CONFIG_EFUSE_CONFIG_FILE + +static VOID +readAdapterInfo_8188EU( + IN PADAPTER padapter + ) +{ +#if 1 + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); /* parse the eeprom/efuse content */ - Hal_EfuseParseIDCode88E(adapt, eeprom->efuse_eeprom_data); - Hal_EfuseParsePIDVID_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_EfuseParseMACAddr_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); + Hal_EfuseParseIDCode88E(padapter, pEEPROM->efuse_eeprom_data); + Hal_EfuseParsePIDVID_8188EU(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); +#ifdef CONFIG_EFUSE_CONFIG_FILE + Hal_ReadMACAddrFromFile_8188EU(padapter); +#else //CONFIG_EFUSE_CONFIG_FILE + Hal_EfuseParseMACAddr_8188EU(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); +#endif //CONFIG_EFUSE_CONFIG_FILE - Hal_ReadPowerSavingMode88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_ReadTxPowerInfo88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_EfuseParseEEPROMVer88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - rtl8188e_EfuseParseChnlPlan(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_EfuseParseXtal_8188E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_EfuseParseCustomerID88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_ReadAntennaDiversity88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_EfuseParseBoardType88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); - Hal_ReadThermalMeter_88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); + Hal_ReadPowerSavingMode88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); + Hal_ReadTxPowerInfo88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseEEPROMVer88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); + rtl8188e_EfuseParseChnlPlan(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseXtal_8188E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseCustomerID88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); + Hal_ReadAntennaDiversity88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); + Hal_EfuseParseBoardType88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); + Hal_ReadThermalMeter_88E(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); - /* */ - /* The following part initialize some vars by PG info. */ - /* */ - Hal_InitChannelPlan(adapt); - Hal_CustomizeByCustomerID_8188EU(adapt); + // + // The following part initialize some vars by PG info. + // + Hal_InitChannelPlan(padapter); +#if defined(CONFIG_WOWLAN) && defined(CONFIG_SDIO_HCI) + Hal_DetectWoWMode(padapter); +#endif //CONFIG_WOWLAN && CONFIG_SDIO_HCI + Hal_CustomizeByCustomerID_8188EU(padapter); - _ReadLEDSetting(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag); + _ReadLEDSetting(padapter, pEEPROM->efuse_eeprom_data, pEEPROM->bautoload_fail_flag); + +#else + +#ifdef CONFIG_INTEL_PROXIM + /* for intel proximity */ + if (pHalData->rf_type== RF_1T1R) { + Adapter->proximity.proxim_support = _TRUE; + } else if (pHalData->rf_type== RF_2T2R) { + if ((pHalData->EEPROMPID == 0x8186) && + (pHalData->EEPROMVID== 0x0bda)) + Adapter->proximity.proxim_support = _TRUE; + } else { + Adapter->proximity.proxim_support = _FALSE; + } +#endif //CONFIG_INTEL_PROXIM +#endif } static void _ReadPROMContent( - struct adapter *Adapter + IN PADAPTER Adapter ) -{ - struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(Adapter); - u8 eeValue; +{ + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); + u8 eeValue; /* check system boot selection */ eeValue = rtw_read8(Adapter, REG_9346CR); - eeprom->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? true : false; - eeprom->bautoload_fail_flag = (eeValue & EEPROM_EN) ? false : true; + pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; + pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE; - DBG_88E("Boot from %s, Autoload %s !\n", (eeprom->EepromOrEfuse ? "EEPROM" : "EFUSE"), - (eeprom->bautoload_fail_flag ? "Fail" : "OK")); + DBG_8192C("Boot from %s, Autoload %s !\n", (pEEPROM->EepromOrEfuse ? "EEPROM" : "EFUSE"), + (pEEPROM->bautoload_fail_flag ? "Fail" : "OK") ); + + //pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; +#ifdef CONFIG_EFUSE_CONFIG_FILE + Hal_readPGDataFromConfigFile(Adapter); +#else //CONFIG_EFUSE_CONFIG_FILE Hal_InitPGData88E(Adapter); +#endif //CONFIG_EFUSE_CONFIG_FILE readAdapterInfo_8188EU(Adapter); } -static void _ReadRFType(struct adapter *Adapter) -{ - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); - haldata->rf_chip = RF_6052; + +static VOID +_ReadRFType( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + +#if DISABLE_BB_RF + pHalData->rf_chip = RF_PSEUDO_11N; +#else + pHalData->rf_chip = RF_6052; +#endif } -static int _ReadAdapterInfo8188EU(struct adapter *Adapter) +static int _ReadAdapterInfo8188EU(PADAPTER Adapter) { - u32 start = rtw_get_current_time(); + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 start=rtw_get_current_time(); + + MSG_8192C("====> %s\n", __FUNCTION__); - MSG_88E("====> %s\n", __func__); + //Efuse_InitSomeVar(Adapter); - _ReadRFType(Adapter);/* rf_chip -> _InitRFType() */ + //if(IS_HARDWARE_TYPE_8723A(Adapter)) + // _EfuseCellSel(Adapter); + + _ReadRFType(Adapter);//rf_chip -> _InitRFType() _ReadPROMContent(Adapter); - MSG_88E("<==== %s in %d ms\n", __func__, rtw_get_passing_time_ms(start)); + //MSG_8192C("%s()(done), rf_chip=0x%x, rf_type=0x%x\n", __FUNCTION__, pHalData->rf_chip, pHalData->rf_type); + + MSG_8192C("<==== %s in %d ms\n", __FUNCTION__, rtw_get_passing_time_ms(start)); return _SUCCESS; } -static void ReadAdapterInfo8188EU(struct adapter *Adapter) -{ - /* Read EEPROM size before call any EEPROM function */ - Adapter->EepromAddressSize = GetEEPROMSize8188E(Adapter); +static void ReadAdapterInfo8188EU(PADAPTER Adapter) +{ + // Read EEPROM size before call any EEPROM function + Adapter->EepromAddressSize = GetEEPROMSize8188E(Adapter); + _ReadAdapterInfo8188EU(Adapter); } + #define GPIO_DEBUG_PORT_NUM 0 -static void rtl8192cu_trigger_gpio_0(struct adapter *adapt) +static void rtl8192cu_trigger_gpio_0(_adapter *padapter) { +#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ + u32 gpioctrl; + DBG_8192C("==> trigger_gpio_0...\n"); + rtw_write16_async(padapter,REG_GPIO_PIN_CTRL,0); + rtw_write8_async(padapter,REG_GPIO_PIN_CTRL+2,0xFF); + gpioctrl = (BIT(GPIO_DEBUG_PORT_NUM)<<24 )|(BIT(GPIO_DEBUG_PORT_NUM)<<16); + rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl); + gpioctrl |= (BIT(GPIO_DEBUG_PORT_NUM)<<8); + rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl); + DBG_8192C("<=== trigger_gpio_0...\n"); +#endif } -static void ResumeTxBeacon(struct adapter *adapt) +static void ResumeTxBeacon(_adapter *padapter) { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + HAL_DATA_TYPE* pHalData = GET_HAL_DATA(padapter); - /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */ - /* which should be read from register to a global variable. */ + // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value + // which should be read from register to a global variable. + + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) | BIT6); + pHalData->RegFwHwTxQCtrl |= BIT6; + rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0xff); + pHalData->RegReg542 |= BIT0; + rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542); +} +void UpdateInterruptMask8188EU(PADAPTER padapter,u8 bHIMR0 ,u32 AddMSR, u32 RemoveMSR) +{ + HAL_DATA_TYPE *pHalData; + + u32 *himr; + pHalData = GET_HAL_DATA(padapter); + + if(bHIMR0) + himr = &(pHalData->IntrMask[0]); + else + himr = &(pHalData->IntrMask[1]); + + if (AddMSR) + *himr |= AddMSR; + + if (RemoveMSR) + *himr &= (~RemoveMSR); + + if(bHIMR0) + rtw_write32(padapter, REG_HIMR_88E, *himr); + else + rtw_write32(padapter, REG_HIMRE_88E, *himr); - rtw_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) | BIT6); - haldata->RegFwHwTxQCtrl |= BIT6; - rtw_write8(adapt, REG_TBTT_PROHIBIT+1, 0xff); - haldata->RegReg542 |= BIT0; - rtw_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542); } -static void StopTxBeacon(struct adapter *adapt) +static void StopTxBeacon(_adapter *padapter) { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); + HAL_DATA_TYPE* pHalData = GET_HAL_DATA(padapter); - /* 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */ - /* which should be read from register to a global variable. */ + // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value + // which should be read from register to a global variable. - rtw_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) & (~BIT6)); - haldata->RegFwHwTxQCtrl &= (~BIT6); - rtw_write8(adapt, REG_TBTT_PROHIBIT+1, 0x64); - haldata->RegReg542 &= ~(BIT0); - rtw_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542); + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) & (~BIT6)); + pHalData->RegFwHwTxQCtrl &= (~BIT6); + rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0x64); + pHalData->RegReg542 &= ~(BIT0); + rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542); + + //todo: CheckFwRsvdPageContent(Adapter); // 2010.06.23. Added by tynli. - /* todo: CheckFwRsvdPageContent(Adapter); 2010.06.23. Added by tynli. */ } -static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val) + +static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8* val) { - u8 val8; - u8 mode = *((u8 *)val); + u8 val8; + u8 mode = *((u8 *)val); + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - /* disable Port0 TSF update */ - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); +#ifdef CONFIG_CONCURRENT_MODE + if(Adapter->iface_type == IFACE_PORT1) + { + // disable Port1 TSF update + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); + + // set net_type + val8 = rtw_read8(Adapter, MSR)&0x03; + val8 |= (mode<<2); + rtw_write8(Adapter, MSR, val8); + + DBG_871X("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode); - /* set net_type */ - val8 = rtw_read8(Adapter, MSR)&0x0c; - val8 |= mode; - rtw_write8(Adapter, MSR, val8); + if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) + { + if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) + { + #ifdef CONFIG_INTERRUPT_BASED_TXBCN - DBG_88E("%s()-%d mode = %d\n", __func__, __LINE__, mode); + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + rtw_write8(Adapter, REG_DRVERLYINT, 0x05);//restore early int time to 5ms + UpdateInterruptMask8188EU(Adapter,_TRUE, 0, IMR_BCNDMAINT0_88E); + #endif // CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + UpdateInterruptMask8188EU(Adapter,_TRUE ,0, (IMR_TBDER_88E|IMR_TBDOK_88E)); + #endif// CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + + #endif //CONFIG_INTERRUPT_BASED_TXBCN + - if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) { - StopTxBeacon(Adapter); + StopTxBeacon(Adapter); + } + + rtw_write8(Adapter,REG_BCN_CTRL_1, 0x11);//disable atim wnd and disable beacon function + //rtw_write8(Adapter,REG_BCN_CTRL_1, 0x18); + } + else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) + { + ResumeTxBeacon(Adapter); + rtw_write8(Adapter,REG_BCN_CTRL_1, 0x1a); + //BIT4 - If set 0, hw will clr bcnq when tx becon ok/fail or port 1 + rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); + } + else if(mode == _HW_STATE_AP_) + { +#ifdef CONFIG_INTERRUPT_BASED_TXBCN + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + UpdateInterruptMask8188EU(Adapter,_TRUE ,IMR_BCNDMAINT0_88E, 0); + #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT - rtw_write8(Adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */ - } else if ((mode == _HW_STATE_ADHOC_)) { - ResumeTxBeacon(Adapter); - rtw_write8(Adapter, REG_BCN_CTRL, 0x1a); - } else if (mode == _HW_STATE_AP_) { - ResumeTxBeacon(Adapter); + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + UpdateInterruptMask8188EU(Adapter,_TRUE ,(IMR_TBDER_88E|IMR_TBDOK_88E), 0); + #endif//CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + +#endif //CONFIG_INTERRUPT_BASED_TXBCN - rtw_write8(Adapter, REG_BCN_CTRL, 0x12); + ResumeTxBeacon(Adapter); + + rtw_write8(Adapter, REG_BCN_CTRL_1, 0x12); - /* Set RCR */ - rtw_write32(Adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */ - /* enable to rx data frame */ - rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); - /* enable to rx ps-poll */ - rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400); + //Set RCR + //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 + //rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0 + rtw_write32(Adapter, REG_RCR, 0x7000208e);//CBSSID_DATA must set to 0,reject ICV_ERR packet + //enable to rx data frame + rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); + //enable to rx ps-poll + rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400); - /* Beacon Control related register for first time */ - rtw_write8(Adapter, REG_BCNDMATIM, 0x02); /* 2ms */ + //Beacon Control related register for first time + rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms - rtw_write8(Adapter, REG_ATIMWND, 0x0a); /* 10ms */ - rtw_write16(Adapter, REG_BCNTCFG, 0x00); - rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); - rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */ + //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); + rtw_write8(Adapter, REG_ATIMWND_1, 0x0a); // 10ms for port1 + rtw_write16(Adapter, REG_BCNTCFG, 0x00); + rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); + rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms) + + //reset TSF2 + rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); - /* reset TSF */ - rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); - /* BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */ - rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4)); + //BIT4 - If set 0, hw will clr bcnq when tx becon ok/fail or port 1 + rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); + //enable BCN1 Function for if2 + //don't enable update TSF1 for if2 (due to TSF update when beacon/probe rsp are received) + rtw_write8(Adapter, REG_BCN_CTRL_1, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | EN_TXBCN_RPT|BIT(1))); - /* enable BCN0 Function for if1 */ - /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */ - rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | BIT(1))); +#ifdef CONFIG_CONCURRENT_MODE + if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE)) + rtw_write8(Adapter, REG_BCN_CTRL, + rtw_read8(Adapter, REG_BCN_CTRL) & ~EN_BCN_FUNCTION); +#endif + //BCN1 TSF will sync to BCN0 TSF with offset(0x518) if if1_sta linked + //rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(5)); + //rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(3)); + + //dis BCN0 ATIM WND if if1 is station + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(0)); - /* dis BCN1 ATIM WND if if2 is station */ - rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1) | BIT(0)); +#ifdef CONFIG_TSF_RESET_OFFLOAD + // Reset TSF for STA+AP concurrent mode + if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) { + if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE) + DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n", + __FUNCTION__, __LINE__); + } +#endif // CONFIG_TSF_RESET_OFFLOAD + } } + else +#endif //CONFIG_CONCURRENT_MODE + { + // disable Port0 TSF update + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); + + // set net_type + val8 = rtw_read8(Adapter, MSR)&0x0c; + val8 |= mode; + rtw_write8(Adapter, MSR, val8); + + DBG_871X("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode); + + if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) + { +#ifdef CONFIG_CONCURRENT_MODE + if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) +#endif //CONFIG_CONCURRENT_MODE + { + #ifdef CONFIG_INTERRUPT_BASED_TXBCN + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + rtw_write8(Adapter, REG_DRVERLYINT, 0x05);//restore early int time to 5ms + UpdateInterruptMask8188EU(Adapter,_TRUE, 0, IMR_BCNDMAINT0_88E); + #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + UpdateInterruptMask8188EU(Adapter,_TRUE ,0, (IMR_TBDER_88E|IMR_TBDOK_88E)); + #endif //CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + + #endif //CONFIG_INTERRUPT_BASED_TXBCN + StopTxBeacon(Adapter); + } + + rtw_write8(Adapter,REG_BCN_CTRL, 0x19);//disable atim wnd + //rtw_write8(Adapter,REG_BCN_CTRL, 0x18); + } + else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) + { + ResumeTxBeacon(Adapter); + rtw_write8(Adapter,REG_BCN_CTRL, 0x1a); + //BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 + rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); + } + else if(mode == _HW_STATE_AP_) + { + +#ifdef CONFIG_INTERRUPT_BASED_TXBCN + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + UpdateInterruptMask8188EU(Adapter,_TRUE ,IMR_BCNDMAINT0_88E, 0); + #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + UpdateInterruptMask8188EU(Adapter,_TRUE ,(IMR_TBDER_88E|IMR_TBDOK_88E), 0); + #endif//CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + +#endif //CONFIG_INTERRUPT_BASED_TXBCN + + + ResumeTxBeacon(Adapter); + + rtw_write8(Adapter, REG_BCN_CTRL, 0x12); + + //Set RCR + //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 + //rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0 + rtw_write32(Adapter, REG_RCR, 0x7000208e);//CBSSID_DATA must set to 0,reject ICV_ERR packet + //enable to rx data frame + rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); + //enable to rx ps-poll + rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400); + + //Beacon Control related register for first time + rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms + + //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); + rtw_write8(Adapter, REG_ATIMWND, 0x0a); // 10ms + rtw_write16(Adapter, REG_BCNTCFG, 0x00); + rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); + rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms) + + //reset TSF + rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); + + //BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 + rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM)|BIT(3)|BIT(4)); + + //enable BCN0 Function for if1 + //don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) + #if defined(CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR) + rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | EN_TXBCN_RPT|BIT(1))); + #else + rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION |BIT(1))); + #endif + +#ifdef CONFIG_CONCURRENT_MODE + if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE)) + rtw_write8(Adapter, REG_BCN_CTRL_1, + rtw_read8(Adapter, REG_BCN_CTRL_1) & ~EN_BCN_FUNCTION); +#endif + + //dis BCN1 ATIM WND if if2 is station + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(0)); +#ifdef CONFIG_TSF_RESET_OFFLOAD + // Reset TSF for STA+AP concurrent mode + if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) { + if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE) + DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n", + __FUNCTION__, __LINE__); + } +#endif // CONFIG_TSF_RESET_OFFLOAD + } + } + } -static void hw_var_set_macaddr(struct adapter *Adapter, u8 variable, u8 *val) +static void hw_var_set_macaddr(PADAPTER Adapter, u8 variable, u8* val) { u8 idx = 0; u32 reg_macid; - reg_macid = REG_MACID; +#ifdef CONFIG_CONCURRENT_MODE + if(Adapter->iface_type == IFACE_PORT1) + { + reg_macid = REG_MACID1; + } + else +#endif + { + reg_macid = REG_MACID; + } - for (idx = 0; idx < 6; idx++) + for(idx = 0 ; idx < 6; idx++) + { rtw_write8(Adapter, (reg_macid+idx), val[idx]); + } + } -static void hw_var_set_bssid(struct adapter *Adapter, u8 variable, u8 *val) +static void hw_var_set_bssid(PADAPTER Adapter, u8 variable, u8* val) { - u8 idx = 0; + u8 idx = 0; u32 reg_bssid; - reg_bssid = REG_BSSID; +#ifdef CONFIG_CONCURRENT_MODE + if(Adapter->iface_type == IFACE_PORT1) + { + reg_bssid = REG_BSSID1; + } + else +#endif + { + reg_bssid = REG_BSSID; + } - for (idx = 0; idx < 6; idx++) + for(idx = 0 ; idx < 6; idx++) + { rtw_write8(Adapter, (reg_bssid+idx), val[idx]); + } + } -static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val) +static void hw_var_set_bcn_func(PADAPTER Adapter, u8 variable, u8* val) { u32 bcn_ctrl_reg; - bcn_ctrl_reg = REG_BCN_CTRL; - - if (*((u8 *)val)) - rtw_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT)); +#ifdef CONFIG_CONCURRENT_MODE + if(Adapter->iface_type == IFACE_PORT1) + { + bcn_ctrl_reg = REG_BCN_CTRL_1; + } else +#endif + { + bcn_ctrl_reg = REG_BCN_CTRL; + } + + if(*((u8 *)val)) + { + rtw_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT)); + } + else + { rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT))); + } + + } -static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) +static void hw_var_set_correct_tsf(PADAPTER Adapter, u8 variable, u8* val) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &haldata->dmpriv; - struct odm_dm_struct *podmpriv = &haldata->odmpriv; +#ifdef CONFIG_CONCURRENT_MODE + u64 tsf; + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; - switch (variable) { - case HW_VAR_MEDIA_STATUS: - { - u8 val8; + //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us + tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us - val8 = rtw_read8(Adapter, MSR)&0x0c; - val8 |= *((u8 *)val); - rtw_write8(Adapter, MSR, val8); - } - break; - case HW_VAR_MEDIA_STATUS1: - { - u8 val8; + if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) + { + //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) + //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); + StopTxBeacon(Adapter); + } - val8 = rtw_read8(Adapter, MSR) & 0x03; - val8 |= *((u8 *)val) << 2; - rtw_write8(Adapter, MSR, val8); - } - break; - case HW_VAR_SET_OPMODE: - hw_var_set_opmode(Adapter, variable, val); - break; - case HW_VAR_MAC_ADDR: - hw_var_set_macaddr(Adapter, variable, val); - break; - case HW_VAR_BSSID: - hw_var_set_bssid(Adapter, variable, val); - break; - case HW_VAR_BASIC_RATE: - { - u16 BrateCfg = 0; - u8 RateIndex = 0; + if(Adapter->iface_type == IFACE_PORT1) + { + //disable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); + + rtw_write32(Adapter, REG_TSFTR1, tsf); + rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32); - /* 2007.01.16, by Emily */ - /* Select RRSR (in Legacy-OFDM and CCK) */ - /* For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */ - /* We do not use other rates. */ - HalSetBrateCfg(Adapter, val, &BrateCfg); - DBG_88E("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg); - /* 2011.03.30 add by Luke Lee */ - /* CCK 2M ACK should be disabled for some BCM and Atheros AP IOT */ - /* because CCK 2M has poor TXEVM */ - /* CCK 5.5M & 11M ACK should be enabled for better performance */ + //enable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3)); - BrateCfg = (BrateCfg | 0xd) & 0x15d; - haldata->BasicRateSet = BrateCfg; - - BrateCfg |= 0x01; /* default enable 1M ACK rate */ - /* Set RRSR rate table. */ - rtw_write8(Adapter, REG_RRSR, BrateCfg & 0xff); - rtw_write8(Adapter, REG_RRSR+1, (BrateCfg >> 8) & 0xff); - rtw_write8(Adapter, REG_RRSR+2, rtw_read8(Adapter, REG_RRSR+2)&0xf0); - - /* Set RTS initial rate */ - while (BrateCfg > 0x1) { - BrateCfg = (BrateCfg >> 1); - RateIndex++; - } - /* Ziv - Check */ - rtw_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex); - } - break; - case HW_VAR_TXPAUSE: - rtw_write8(Adapter, REG_TXPAUSE, *((u8 *)val)); - break; - case HW_VAR_BCN_FUNC: - hw_var_set_bcn_func(Adapter, variable, val); - break; - case HW_VAR_CORRECT_TSF: - { - u64 tsf; - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) - 1024; /* us */ - - if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) - StopTxBeacon(Adapter); - - /* disable related TSF function */ + // Update buddy port's TSF if it is SoftAP for beacon TX issue! + if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE + && check_buddy_fwstate(Adapter, WIFI_AP_STATE) + ) { + //disable related TSF function rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); rtw_write32(Adapter, REG_TSFTR, tsf); rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); - /* enable related TSF function */ + //enable related TSF function rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); +#ifdef CONFIG_TSF_RESET_OFFLOAD + // Update buddy port's TSF(TBTT) if it is SoftAP for beacon TX issue! + if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE) + DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n", + __FUNCTION__, __LINE__); - if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) - ResumeTxBeacon(Adapter); - } - break; - case HW_VAR_CHECK_BSSID: - if (*((u8 *)val)) { - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); - } else { - u32 val32; +#endif // CONFIG_TSF_RESET_OFFLOAD + } - val32 = rtw_read32(Adapter, REG_RCR); + + } + else + { + //disable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); + + rtw_write32(Adapter, REG_TSFTR, tsf); + rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); - val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN); + //enable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); + + // Update buddy port's TSF if it is SoftAP for beacon TX issue! + if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE + && check_buddy_fwstate(Adapter, WIFI_AP_STATE) + ) { + //disable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); - rtw_write32(Adapter, REG_RCR, val32); - } - break; - case HW_VAR_MLME_DISCONNECT: - /* Set RCR to not to receive data frame when NO LINK state */ - /* reject all data frames */ + rtw_write32(Adapter, REG_TSFTR1, tsf); + rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32); + + //enable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3)); +#ifdef CONFIG_TSF_RESET_OFFLOAD + // Update buddy port's TSF if it is SoftAP for beacon TX issue! + if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE) + DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n", + __FUNCTION__, __LINE__); +#endif // CONFIG_TSF_RESET_OFFLOAD + } + + } + + + if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) + { + //pHalData->RegTxPause &= (~STOP_BCNQ); + //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6)))); + ResumeTxBeacon(Adapter); + } +#endif +} + +static void hw_var_set_mlme_disconnect(PADAPTER Adapter, u8 variable, u8* val) +{ +#ifdef CONFIG_CONCURRENT_MODE + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; + + + if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_)) rtw_write16(Adapter, REG_RXFLTMAP2, 0x00); + - /* reset TSF */ - rtw_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); + if(Adapter->iface_type == IFACE_PORT1) + { + //reset TSF1 + rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); - /* disable update TSF */ + //disable update TSF1 + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); + + // disable Port1's beacon function + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); + } + else + { + //reset TSF + rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); + + //disable update TSF rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); - break; - case HW_VAR_MLME_SITESURVEY: - if (*((u8 *)val)) { /* under sitesurvey */ - /* config RCR to receive different BSSID & not to receive data frame */ - u32 v = rtw_read32(Adapter, REG_RCR); - v &= ~(RCR_CBSSID_BCN); - rtw_write32(Adapter, REG_RCR, v); - /* reject all data frame */ - rtw_write16(Adapter, REG_RXFLTMAP2, 0x00); + } +#endif +} - /* disable update TSF */ - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); - } else { /* sitesurvey done */ - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +static void hw_var_set_mlme_sitesurvey(PADAPTER Adapter, u8 variable, u8* val) +{ +#ifdef CONFIG_CONCURRENT_MODE + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - if ((is_client_associated_to_ap(Adapter)) || - ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) { - /* enable to rx data frame */ - rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - /* enable update TSF */ - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); - } else if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { - rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); - /* enable update TSF */ - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); - } - if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); - } else { - if (Adapter->in_cta_test) { - u32 v = rtw_read32(Adapter, REG_RCR); - v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/* RCR_ADF */ - rtw_write32(Adapter, REG_RCR, v); - } else { - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); - } - } - } - break; - case HW_VAR_MLME_JOIN: + if(*((u8 *)val))//under sitesurvey + { + //config RCR to receive different BSSID & not to receive data frame + u32 v = rtw_read32(Adapter, REG_RCR); + v &= ~(RCR_CBSSID_BCN); + rtw_write32(Adapter, REG_RCR, v); + + //disable update TSF + if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) { - u8 RetryLimit = 0x30; - u8 type = *((u8 *)val); - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - - if (type == 0) { /* prepare to join */ - /* enable to rx data frame.Accept all data frame */ - rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); - - if (Adapter->in_cta_test) { - u32 v = rtw_read32(Adapter, REG_RCR); - v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/* RCR_ADF */ - rtw_write32(Adapter, REG_RCR, v); - } else { - rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); - } - - if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) - RetryLimit = (haldata->CustomerID == RT_CID_CCX) ? 7 : 48; - else /* Ad-hoc Mode */ - RetryLimit = 0x7; - } else if (type == 1) { - /* joinbss_event call back when join res < 0 */ - rtw_write16(Adapter, REG_RXFLTMAP2, 0x00); - } else if (type == 2) { - /* sta add event call back */ - /* enable update TSF */ - rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); - - if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) - RetryLimit = 0x7; + if(Adapter->iface_type == IFACE_PORT1) + { + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); } - rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); + else + { + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); + } } - break; - case HW_VAR_BEACON_INTERVAL: - rtw_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val)); - break; - case HW_VAR_SLOT_TIME: + + if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && + check_buddy_fwstate(Adapter, _FW_LINKED)) { - u8 u1bAIFS, aSifsTime; - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - rtw_write8(Adapter, REG_SLOT, val[0]); - - if (pmlmeinfo->WMM_enable == 0) { - if (pmlmeext->cur_wireless_mode == WIRELESS_11B) - aSifsTime = 10; - else - aSifsTime = 16; - - u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime); - - /* Temporary removed, 2008.06.20. */ - rtw_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS); - rtw_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS); - rtw_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS); - rtw_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS); - } + StopTxBeacon(Adapter); } - break; - case HW_VAR_RESP_SIFS: - /* RESP_SIFS for CCK */ - rtw_write8(Adapter, REG_R2T_SIFS, val[0]); /* SIFS_T2T_CCK (0x08) */ - rtw_write8(Adapter, REG_R2T_SIFS+1, val[1]); /* SIFS_R2T_CCK(0x08) */ - /* RESP_SIFS for OFDM */ - rtw_write8(Adapter, REG_T2T_SIFS, val[2]); /* SIFS_T2T_OFDM (0x0a) */ - rtw_write8(Adapter, REG_T2T_SIFS+1, val[3]); /* SIFS_R2T_OFDM(0x0a) */ - break; - case HW_VAR_ACK_PREAMBLE: - { - u8 regTmp; - u8 bShortPreamble = *((bool *)val); - /* Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) */ - regTmp = (haldata->nCur40MhzPrimeSC)<<5; - if (bShortPreamble) - regTmp |= 0x80; + } + else//sitesurvey done + { + //enable to rx data frame + //write32(Adapter, REG_RCR, read32(padapter, REG_RCR)|RCR_ADF); + rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); - rtw_write8(Adapter, REG_RRSR+2, regTmp); - } - break; - case HW_VAR_SEC_CFG: - rtw_write8(Adapter, REG_SECCFG, *((u8 *)val)); - break; - case HW_VAR_DM_FLAG: - podmpriv->SupportAbility = *((u8 *)val); - break; - case HW_VAR_DM_FUNC_OP: - if (val[0]) - podmpriv->BK_SupportAbility = podmpriv->SupportAbility; + //enable update TSF + if(Adapter->iface_type == IFACE_PORT1) + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4))); else - podmpriv->SupportAbility = podmpriv->BK_SupportAbility; - break; - case HW_VAR_DM_FUNC_SET: - if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) { - pdmpriv->DMFlag = pdmpriv->InitDMFlag; - podmpriv->SupportAbility = pdmpriv->InitODMFlag; - } else { - podmpriv->SupportAbility |= *((u32 *)val); - } - break; - case HW_VAR_DM_FUNC_CLR: - podmpriv->SupportAbility &= *((u32 *)val); - break; - case HW_VAR_CAM_EMPTY_ENTRY: - { - u8 ucIndex = *((u8 *)val); - u8 i; - u32 ulCommand = 0; - u32 ulContent = 0; - u32 ulEncAlgo = CAM_AES; + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); - for (i = 0; i < CAM_CONTENT_COUNT; i++) { - /* filled id in CAM config 2 byte */ - if (i == 0) - ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo)<<2); - else - ulContent = 0; - /* polling bit, and No Write enable, and address */ - ulCommand = CAM_CONTENT_COUNT*ucIndex+i; - ulCommand = ulCommand | CAM_POLLINIG|CAM_WRITE; - /* write content 0 is equall to mark invalid */ - rtw_write32(Adapter, WCAMI, ulContent); /* delay_ms(40); */ - rtw_write32(Adapter, RWCAM, ulCommand); /* delay_ms(40); */ + rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); + + if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && + check_buddy_fwstate(Adapter, _FW_LINKED)) + { + ResumeTxBeacon(Adapter); + } + } +#endif +} + +static void hw_var_set_mlme_join(PADAPTER Adapter, u8 variable, u8* val) +{ +#ifdef CONFIG_CONCURRENT_MODE + u8 RetryLimit = 0x30; + u8 type = *((u8 *)val); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + + if(type == 0) // prepare to join + { + if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && + check_buddy_fwstate(Adapter, _FW_LINKED)) + { + StopTxBeacon(Adapter); + } + + //enable to rx data frame.Accept all data frame + //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); + rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); + + if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) + rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); + else + rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); + + if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) + { + RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; + } + else // Ad-hoc Mode + { + RetryLimit = 0x7; + } + } + else if(type == 1) //joinbss_event call back when join res < 0 + { + if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_)) + rtw_write16(Adapter, REG_RXFLTMAP2,0x00); + + if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && + check_buddy_fwstate(Adapter, _FW_LINKED)) + { + ResumeTxBeacon(Adapter); + + //reset TSF 1/2 after ResumeTxBeacon + rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); + + } + } + else if(type == 2) //sta add event call back + { + + //enable update TSF + if(Adapter->iface_type == IFACE_PORT1) + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4))); + else + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); + + + if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) + { + //fixed beacon issue for 8191su........... + rtw_write8(Adapter,0x542 ,0x02); + RetryLimit = 0x7; + } + + + if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && + check_buddy_fwstate(Adapter, _FW_LINKED)) + { + ResumeTxBeacon(Adapter); + + //reset TSF 1/2 after ResumeTxBeacon + rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); + } + + } + + rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); + +#endif +} + +void SetHwReg8188EU(PADAPTER Adapter, u8 variable, u8* val) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DM_ODM_T *podmpriv = &pHalData->odmpriv; +_func_enter_; + + switch(variable) + { + case HW_VAR_MEDIA_STATUS: + { + u8 val8; + + val8 = rtw_read8(Adapter, MSR)&0x0c; + val8 |= *((u8 *)val); + rtw_write8(Adapter, MSR, val8); } - } - break; - case HW_VAR_CAM_INVALID_ALL: - rtw_write32(Adapter, RWCAM, BIT(31)|BIT(30)); - break; - case HW_VAR_CAM_WRITE: - { - u32 cmd; - u32 *cam_val = (u32 *)val; - rtw_write32(Adapter, WCAMI, cam_val[0]); + break; + case HW_VAR_MEDIA_STATUS1: + { + u8 val8; + + val8 = rtw_read8(Adapter, MSR)&0x03; + val8 |= *((u8 *)val) <<2; + rtw_write8(Adapter, MSR, val8); + } + break; + case HW_VAR_SET_OPMODE: + hw_var_set_opmode(Adapter, variable, val); + break; + case HW_VAR_MAC_ADDR: + hw_var_set_macaddr(Adapter, variable, val); + break; + case HW_VAR_BSSID: + hw_var_set_bssid(Adapter, variable, val); + break; + case HW_VAR_BASIC_RATE: + { + u16 BrateCfg = 0; + u8 RateIndex = 0; - cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1]; - rtw_write32(Adapter, RWCAM, cmd); - } - break; - case HW_VAR_AC_PARAM_VO: - rtw_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]); - break; - case HW_VAR_AC_PARAM_VI: - rtw_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]); - break; - case HW_VAR_AC_PARAM_BE: - haldata->AcParam_BE = ((u32 *)(val))[0]; - rtw_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]); - break; - case HW_VAR_AC_PARAM_BK: - rtw_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]); - break; - case HW_VAR_ACM_CTRL: - { - u8 acm_ctrl = *((u8 *)val); - u8 AcmCtrl = rtw_read8(Adapter, REG_ACMHWCTRL); + // 2007.01.16, by Emily + // Select RRSR (in Legacy-OFDM and CCK) + // For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. + // We do not use other rates. + HalSetBrateCfg( Adapter, val, &BrateCfg ); + DBG_8192C("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg); - if (acm_ctrl > 1) - AcmCtrl = AcmCtrl | 0x1; + //2011.03.30 add by Luke Lee + //CCK 2M ACK should be disabled for some BCM and Atheros AP IOT + //because CCK 2M has poor TXEVM + //CCK 5.5M & 11M ACK should be enabled for better performance - if (acm_ctrl & BIT(3)) - AcmCtrl |= AcmHw_VoqEn; + pHalData->BasicRateSet = BrateCfg = (BrateCfg |0xd) & 0x15d; + + BrateCfg |= 0x01; // default enable 1M ACK rate + // Set RRSR rate table. + rtw_write8(Adapter, REG_RRSR, BrateCfg&0xff); + rtw_write8(Adapter, REG_RRSR+1, (BrateCfg>>8)&0xff); + rtw_write8(Adapter, REG_RRSR+2, rtw_read8(Adapter, REG_RRSR+2)&0xf0); + + // Set RTS initial rate + while(BrateCfg > 0x1) + { + BrateCfg = (BrateCfg>> 1); + RateIndex++; + } + // Ziv - Check + rtw_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex); + } + break; + case HW_VAR_TXPAUSE: + rtw_write8(Adapter, REG_TXPAUSE, *((u8 *)val)); + break; + case HW_VAR_BCN_FUNC: + hw_var_set_bcn_func(Adapter, variable, val); + break; + case HW_VAR_CORRECT_TSF: +#ifdef CONFIG_CONCURRENT_MODE + hw_var_set_correct_tsf(Adapter, variable, val); +#else + { + u64 tsf; + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us + tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us + + if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) + { + //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) + //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); + StopTxBeacon(Adapter); + } + + //disable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); + + rtw_write32(Adapter, REG_TSFTR, tsf); + rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); + + //enable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); + + + if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) + { + //pHalData->RegTxPause &= (~STOP_BCNQ); + //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6)))); + ResumeTxBeacon(Adapter); + } + } +#endif + break; + case HW_VAR_CHECK_BSSID: + if(*((u8 *)val)) + { + rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); + } else - AcmCtrl &= (~AcmHw_VoqEn); + { + u32 val32; - if (acm_ctrl & BIT(2)) - AcmCtrl |= AcmHw_ViqEn; + val32 = rtw_read32(Adapter, REG_RCR); + + val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN); + + rtw_write32(Adapter, REG_RCR, val32); + } + break; + case HW_VAR_MLME_DISCONNECT: +#ifdef CONFIG_CONCURRENT_MODE + hw_var_set_mlme_disconnect(Adapter, variable, val); +#else + { + //Set RCR to not to receive data frame when NO LINK state + //rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR) & ~RCR_ADF); + //reject all data frames + rtw_write16(Adapter, REG_RXFLTMAP2,0x00); + + //reset TSF + rtw_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); + + //disable update TSF + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); + } +#endif + break; + case HW_VAR_MLME_SITESURVEY: +#ifdef CONFIG_CONCURRENT_MODE + hw_var_set_mlme_sitesurvey(Adapter, variable, val); +#else + if(*((u8 *)val))//under sitesurvey + { + //config RCR to receive different BSSID & not to receive data frame + u32 v = rtw_read32(Adapter, REG_RCR); + v &= ~(RCR_CBSSID_BCN); + rtw_write32(Adapter, REG_RCR, v); + //reject all data frame + rtw_write16(Adapter, REG_RXFLTMAP2,0x00); + + //disable update TSF + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); + } + else//sitesurvey done + { + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + if ((is_client_associated_to_ap(Adapter) == _TRUE) || + ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ) + { + //enable to rx data frame + //rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); + rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); + + //enable update TSF + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); + } + else if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) + { + //rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_ADF); + rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); + + //enable update TSF + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); + } + + if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) + rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); + else + { + if(Adapter->in_cta_test) + { + u32 v = rtw_read32(Adapter, REG_RCR); + v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF + rtw_write32(Adapter, REG_RCR, v); + } + else + { + rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); + } + } + } +#endif + break; + case HW_VAR_MLME_JOIN: +#ifdef CONFIG_CONCURRENT_MODE + hw_var_set_mlme_join(Adapter, variable, val); +#else + { + u8 RetryLimit = 0x30; + u8 type = *((u8 *)val); + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + + if(type == 0) // prepare to join + { + //enable to rx data frame.Accept all data frame + //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); + rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); + + if(Adapter->in_cta_test) + { + u32 v = rtw_read32(Adapter, REG_RCR); + v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF + rtw_write32(Adapter, REG_RCR, v); + } + else + { + rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); + } + + if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) + { + RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; + } + else // Ad-hoc Mode + { + RetryLimit = 0x7; + } + } + else if(type == 1) //joinbss_event call back when join res < 0 + { + rtw_write16(Adapter, REG_RXFLTMAP2,0x00); + } + else if(type == 2) //sta add event call back + { + //enable update TSF + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); + + if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) + { + RetryLimit = 0x7; + } + } + + rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); + } +#endif + break; + case HW_VAR_ON_RCR_AM: + rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_AM); + DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(Adapter, REG_RCR)); + break; + case HW_VAR_OFF_RCR_AM: + rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)& (~RCR_AM)); + DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(Adapter, REG_RCR)); + break; + case HW_VAR_BEACON_INTERVAL: + rtw_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val)); +#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + { + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + u16 bcn_interval = *((u16 *)val); + if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE){ + DBG_8192C("%s==> bcn_interval:%d, eraly_int:%d \n",__FUNCTION__,bcn_interval,bcn_interval>>1); + rtw_write8(Adapter, REG_DRVERLYINT, bcn_interval>>1);// 50ms for sdio + } + } +#endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + + break; + case HW_VAR_SLOT_TIME: + { + u8 u1bAIFS, aSifsTime; + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + rtw_write8(Adapter, REG_SLOT, val[0]); + + if(pmlmeinfo->WMM_enable == 0) + { + if( pmlmeext->cur_wireless_mode == WIRELESS_11B) + aSifsTime = 10; + else + aSifsTime = 16; + + u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime); + + // Temporary removed, 2008.06.20. + rtw_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS); + rtw_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS); + rtw_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS); + rtw_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS); + } + } + break; + case HW_VAR_RESP_SIFS: + { +#if 0 + // SIFS for OFDM Data ACK + rtw_write8(Adapter, REG_SIFS_CTX+1, val[0]); + // SIFS for OFDM consecutive tx like CTS data! + rtw_write8(Adapter, REG_SIFS_TRX+1, val[1]); + + rtw_write8(Adapter,REG_SPEC_SIFS+1, val[0]); + rtw_write8(Adapter,REG_MAC_SPEC_SIFS+1, val[0]); + + // 20100719 Joseph: Revise SIFS setting due to Hardware register definition change. + rtw_write8(Adapter, REG_R2T_SIFS+1, val[0]); + rtw_write8(Adapter, REG_T2T_SIFS+1, val[0]); +#else + + //SIFS_Timer = 0x0a0a0808; + //RESP_SIFS for CCK + rtw_write8(Adapter, REG_R2T_SIFS, val[0]); // SIFS_T2T_CCK (0x08) + rtw_write8(Adapter, REG_R2T_SIFS+1, val[1]); //SIFS_R2T_CCK(0x08) + //RESP_SIFS for OFDM + rtw_write8(Adapter, REG_T2T_SIFS, val[2]); //SIFS_T2T_OFDM (0x0a) + rtw_write8(Adapter, REG_T2T_SIFS+1, val[3]); //SIFS_R2T_OFDM(0x0a) +#endif + } + break; + case HW_VAR_ACK_PREAMBLE: + { + u8 regTmp; + u8 bShortPreamble = *( (PBOOLEAN)val ); + // Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) + regTmp = (pHalData->nCur40MhzPrimeSC)<<5; + //regTmp = 0; + if(bShortPreamble) + regTmp |= 0x80; + + rtw_write8(Adapter, REG_RRSR+2, regTmp); + } + break; + case HW_VAR_SEC_CFG: +#ifdef CONFIG_CONCURRENT_MODE + rtw_write8(Adapter, REG_SECCFG, 0x0c|BIT(5));// enable tx enc and rx dec engine, and no key search for MC/BC +#else + rtw_write8(Adapter, REG_SECCFG, *((u8 *)val)); +#endif + break; + case HW_VAR_DM_FLAG: + podmpriv->SupportAbility = *((u8 *)val); + //DBG_871X("HW_VAR_DM_FLAG ==> SupportAbility:0x%08x \n",podmpriv->SupportAbility ); + break; + case HW_VAR_DM_FUNC_OP: + if(val[0]) + {// save dm flag + podmpriv->BK_SupportAbility = podmpriv->SupportAbility; + } else - AcmCtrl &= (~AcmHw_ViqEn); + {// restore dm flag + podmpriv->SupportAbility = podmpriv->BK_SupportAbility; + } + //DBG_871X("HW_VAR_DM_FUNC_OP ==> %s SupportAbility:0x%08x \n", + // (val[0]==1)?"Save":"Restore", + // podmpriv->SupportAbility + // ); + break; + case HW_VAR_DM_FUNC_SET: + if(*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE){ + pdmpriv->DMFlag = pdmpriv->InitDMFlag; + podmpriv->SupportAbility = pdmpriv->InitODMFlag; + } + else{ + podmpriv->SupportAbility |= *((u32 *)val); + } + //DBG_871X("HW_VAR_DM_FUNC_SET ==> SupportAbility:0x%08x \n",podmpriv->SupportAbility ); + break; + case HW_VAR_DM_FUNC_CLR: + podmpriv->SupportAbility &= *((u32 *)val); + break; - if (acm_ctrl & BIT(1)) - AcmCtrl |= AcmHw_BeqEn; - else - AcmCtrl &= (~AcmHw_BeqEn); + case HW_VAR_CAM_EMPTY_ENTRY: + { + u8 ucIndex = *((u8 *)val); + u8 i; + u32 ulCommand=0; + u32 ulContent=0; + u32 ulEncAlgo=CAM_AES; - DBG_88E("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl); - rtw_write8(Adapter, REG_ACMHWCTRL, AcmCtrl); - } - break; - case HW_VAR_AMPDU_MIN_SPACE: + for(i=0;iAcParam_BE = ((u32 *)(val))[0]; + rtw_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]); + break; + case HW_VAR_AC_PARAM_BK: + rtw_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]); + break; + case HW_VAR_ACM_CTRL: + { + u8 acm_ctrl = *((u8 *)val); + u8 AcmCtrl = rtw_read8( Adapter, REG_ACMHWCTRL); + + if(acm_ctrl > 1) + AcmCtrl = AcmCtrl | 0x1; + + if(acm_ctrl & BIT(3)) + AcmCtrl |= AcmHw_VoqEn; + else + AcmCtrl &= (~AcmHw_VoqEn); + + if(acm_ctrl & BIT(2)) + AcmCtrl |= AcmHw_ViqEn; + else + AcmCtrl &= (~AcmHw_ViqEn); + + if(acm_ctrl & BIT(1)) + AcmCtrl |= AcmHw_BeqEn; + else + AcmCtrl &= (~AcmHw_BeqEn); + + DBG_871X("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl ); + rtw_write8(Adapter, REG_ACMHWCTRL, AcmCtrl ); + } + break; + case HW_VAR_AMPDU_MIN_SPACE: + { + u8 MinSpacingToSet; + u8 SecMinSpace; + + MinSpacingToSet = *((u8 *)val); + if(MinSpacingToSet <= 7) + { + switch(Adapter->securitypriv.dot11PrivacyAlgrthm) + { + case _NO_PRIVACY_: + case _AES_: + SecMinSpace = 0; + break; + + case _WEP40_: + case _WEP104_: + case _TKIP_: + case _TKIP_WTMIC_: + SecMinSpace = 6; + break; + default: + SecMinSpace = 7; + break; + } + + if(MinSpacingToSet < SecMinSpace){ + MinSpacingToSet = SecMinSpace; + } + + //RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", Adapter->MgntInfo.MinSpaceCfg)); + rtw_write8(Adapter, REG_AMPDU_MIN_SPACE, (rtw_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet); + } + } + break; + case HW_VAR_AMPDU_FACTOR: + { + u8 RegToSet_Normal[4]={0x41,0xa8,0x72, 0xb9}; + u8 RegToSet_BT[4]={0x31,0x74,0x42, 0x97}; + u8 FactorToSet; + u8 *pRegToSet; + u8 index = 0; + +#ifdef CONFIG_BT_COEXIST + if( (pHalData->bt_coexist.BT_Coexist) && + (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) ) + pRegToSet = RegToSet_BT; // 0x97427431; + else +#endif + pRegToSet = RegToSet_Normal; // 0xb972a841; + + FactorToSet = *((u8 *)val); + if(FactorToSet <= 3) + { + FactorToSet = (1<<(FactorToSet + 2)); + if(FactorToSet>0xf) + FactorToSet = 0xf; + + for(index=0; index<4; index++) + { + if((pRegToSet[index] & 0xf0) > (FactorToSet<<4)) + pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4); + + if((pRegToSet[index] & 0x0f) > FactorToSet) + pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet); + + rtw_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]); + } + + //RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_FACTOR: %#x\n", FactorToSet)); + } + } + break; + case HW_VAR_RXDMA_AGG_PG_TH: + #ifdef CONFIG_USB_RX_AGGREGATION + { + u8 threshold = *((u8 *)val); + if( threshold == 0) + { + threshold = pHalData->UsbRxAggPageCount; + } + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold); + } + #endif + break; + case HW_VAR_SET_RPWM: +#ifdef CONFIG_LPS_LCLK + { + u8 ps_state = *((u8 *)val); + //rpwm value only use BIT0(clock bit) ,BIT6(Ack bit), and BIT7(Toggle bit) for 88e. + //BIT0 value - 1: 32k, 0:40MHz. + //BIT6 value - 1: report cpwm value after success set, 0:do not report. + //BIT7 value - Toggle bit change. + //modify by Thomas. 2012/4/2. + ps_state = ps_state & 0xC1; + //DBG_871X("##### Change RPWM value to = %x for switch clk #####\n",ps_state); + rtw_write8(Adapter, REG_USB_HRPWM, ps_state); + } +#endif + break; + case HW_VAR_H2C_FW_PWRMODE: + { + u8 psmode = (*(u8 *)val); + + // Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power + // saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. + if( (psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(pHalData->VersionID))) + { + ODM_RF_Saving(podmpriv, _TRUE); + } + rtl8188e_set_FwPwrMode_cmd(Adapter, psmode); + } + break; + case HW_VAR_H2C_FW_JOINBSSRPT: + { + u8 mstatus = (*(u8 *)val); + rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus); + } + break; +#ifdef CONFIG_P2P_PS + case HW_VAR_H2C_FW_P2P_PS_OFFLOAD: + { + u8 p2p_ps_state = (*(u8 *)val); + rtl8188e_set_p2p_ps_offload_cmd(Adapter, p2p_ps_state); + } + break; +#endif //CONFIG_P2P_PS +#ifdef CONFIG_TDLS + case HW_VAR_TDLS_WRCR: + rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)&(~RCR_CBSSID_DATA )); + break; + case HW_VAR_TDLS_INIT_CH_SEN: + { + rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)&(~ RCR_CBSSID_DATA )&(~RCR_CBSSID_BCN )); + rtw_write16(Adapter, REG_RXFLTMAP2,0xffff); + + //disable update TSF + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); + } + break; + case HW_VAR_TDLS_DONE_CH_SEN: + { + //enable update TSF + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~ BIT(4))); + rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|(RCR_CBSSID_BCN )); + } + break; + case HW_VAR_TDLS_RS_RCR: + rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|(RCR_CBSSID_DATA)); + break; +#endif //CONFIG_TDLS + case HW_VAR_INITIAL_GAIN: + { + DIG_T *pDigTable = &podmpriv->DM_DigTable; + u32 rx_gain = ((u32 *)(val))[0]; + + if(rx_gain == 0xff){//restore rx gain + ODM_Write_DIG(podmpriv,pDigTable->BackupIGValue); + } + else{ + pDigTable->BackupIGValue = pDigTable->CurIGValue; + ODM_Write_DIG(podmpriv,rx_gain); + } + } + break; + case HW_VAR_TRIGGER_GPIO_0: + rtl8192cu_trigger_gpio_0(Adapter); + break; +#ifdef CONFIG_BT_COEXIST + case HW_VAR_BT_SET_COEXIST: + { + u8 bStart = (*(u8 *)val); + rtl8192c_set_dm_bt_coexist(Adapter, bStart); + } + break; + case HW_VAR_BT_ISSUE_DELBA: + { + u8 dir = (*(u8 *)val); + rtl8192c_issue_delete_ba(Adapter, dir); + } + break; +#endif +#if (RATE_ADAPTIVE_SUPPORT==1) + case HW_VAR_RPT_TIMER_SETTING: + { + u16 min_rpt_time = (*(u16 *)val); + ODM_RA_Set_TxRPT_Time(podmpriv,min_rpt_time); + } + break; +#endif +#ifdef CONFIG_SW_ANTENNA_DIVERSITY + + case HW_VAR_ANTENNA_DIVERSITY_LINK: + //odm_SwAntDivRestAfterLink8192C(Adapter); + ODM_SwAntDivRestAfterLink(podmpriv); + break; +#endif +#ifdef CONFIG_ANTENNA_DIVERSITY + case HW_VAR_ANTENNA_DIVERSITY_SELECT: + { + u8 Optimum_antenna = (*(u8 *)val); + u8 Ant ; + //switch antenna to Optimum_antenna + //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); + if(pHalData->CurAntenna != Optimum_antenna) + { + Ant = (Optimum_antenna==2)?MAIN_ANT:AUX_ANT; + ODM_UpdateRxIdleAnt_88E(&pHalData->odmpriv, Ant); + + pHalData->CurAntenna = Optimum_antenna ; + //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); + } + } + break; +#endif + case HW_VAR_EFUSE_BYTES: // To set EFUE total used bytes, added by Roger, 2008.12.22. + pHalData->EfuseUsedBytes = *((u16 *)val); + break; + case HW_VAR_FIFO_CLEARN_UP: + { + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(Adapter); + u8 trycnt = 100; + + //pause tx + rtw_write8(Adapter,REG_TXPAUSE,0xff); + + //keep sn + Adapter->xmitpriv.nqos_ssn = rtw_read16(Adapter,REG_NQOS_SEQ); + + if(pwrpriv->bkeepfwalive != _TRUE) + { + //RX DMA stop + rtw_write32(Adapter,REG_RXPKT_NUM,(rtw_read32(Adapter,REG_RXPKT_NUM)|RW_RELEASE_EN)); + do{ + if(!(rtw_read32(Adapter,REG_RXPKT_NUM)&RXDMA_IDLE)) + break; + }while(trycnt--); + if(trycnt ==0) + DBG_8192C("Stop RX DMA failed...... \n"); + + //RQPN Load 0 + rtw_write16(Adapter,REG_RQPN_NPQ,0x0); + rtw_write32(Adapter,REG_RQPN,0x80000000); + rtw_mdelay_os(10); + } + } + break; + case HW_VAR_CHECK_TXBUF: + +#ifdef CONFIG_CONCURRENT_MODE + { + int i; + #if 0 //for Miracast source PKT lost issue + u8 RetryLimit = 0x01; + rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); + #endif + + for(i=0;i<1000;i++) + { + if(rtw_read32(Adapter, 0x200) != rtw_read32(Adapter, 0x204)) + { + //DBG_871X("packet in tx packet buffer - 0x204=%x, 0x200=%x (%d)\n", rtw_read32(Adapter, 0x204), rtw_read32(Adapter, 0x200), i); + rtw_msleep_os(10); + } + else + { + DBG_871X("no packet in tx packet buffer (%d)\n", i); + break; + } + } + #if 0 //for Miracast source PKT lost issue + RetryLimit = 0x30; + rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); + #endif + } +#endif + break; + + case HW_VAR_APFM_ON_MAC: + pHalData->bMacPwrCtrlOn = *val; + DBG_871X("%s: bMacPwrCtrlOn=%d\n", __func__, pHalData->bMacPwrCtrlOn); + break; + +#ifdef CONFIG_WOWLAN + case HW_VAR_WOWLAN: { - u8 MinSpacingToSet; - u8 SecMinSpace; + struct wowlan_ioctl_param *poidparam; + struct recv_buf *precvbuf; + int res, i; + u32 tmp; + u16 len = 0; + u8 mstatus = (*(u8 *)val); + u8 trycnt = 100; + u8 data[4]; - MinSpacingToSet = *((u8 *)val); - if (MinSpacingToSet <= 7) { - switch (Adapter->securitypriv.dot11PrivacyAlgrthm) { - case _NO_PRIVACY_: - case _AES_: - SecMinSpace = 0; + poidparam = (struct wowlan_ioctl_param *)val; + switch (poidparam->subcode){ + case WOWLAN_ENABLE: + DBG_871X_LEVEL(_drv_always_, "WOWLAN_ENABLE\n"); + + SetFwRelatedForWoWLAN8188ES(Adapter, _TRUE); + + //Set Pattern + //if(adapter_to_pwrctl(Adapter)->wowlan_pattern==_TRUE) + // rtw_wowlan_reload_pattern(Adapter); + + //RX DMA stop + DBG_871X_LEVEL(_drv_always_, "Pause DMA\n"); + rtw_write32(Adapter,REG_RXPKT_NUM,(rtw_read32(Adapter,REG_RXPKT_NUM)|RW_RELEASE_EN)); + do{ + if((rtw_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE)) { + DBG_871X_LEVEL(_drv_always_, "RX_DMA_IDLE is true\n"); + break; + } else { + // If RX_DMA is not idle, receive one pkt from DMA + DBG_871X_LEVEL(_drv_always_, "RX_DMA_IDLE is not true\n"); + } + }while(trycnt--); + if(trycnt ==0) + DBG_871X_LEVEL(_drv_always_, "Stop RX DMA failed...... \n"); + + //Set WOWLAN H2C command. + DBG_871X_LEVEL(_drv_always_, "Set WOWLan cmd\n"); + rtl8188es_set_wowlan_cmd(Adapter, 1); + + mstatus = rtw_read8(Adapter, REG_WOW_CTRL); + trycnt = 10; + + while(!(mstatus&BIT1) && trycnt>1) { + mstatus = rtw_read8(Adapter, REG_WOW_CTRL); + DBG_871X_LEVEL(_drv_always_, "Loop index: %d :0x%02x\n", trycnt, mstatus); + trycnt --; + rtw_msleep_os(2); + } + + adapter_to_pwrctl(Adapter)->wowlan_wake_reason = rtw_read8(Adapter, REG_WOWLAN_WAKE_REASON); + DBG_871X_LEVEL(_drv_always_, "wowlan_wake_reason: 0x%02x\n", + adapter_to_pwrctl(Adapter)->wowlan_wake_reason); + + /* Invoid SE0 reset signal during suspending*/ + rtw_write8(Adapter, REG_RSV_CTRL, 0x20); + rtw_write8(Adapter, REG_RSV_CTRL, 0x60); + + //rtw_msleep_os(10); break; - case _WEP40_: - case _WEP104_: - case _TKIP_: - case _TKIP_WTMIC_: - SecMinSpace = 6; + case WOWLAN_DISABLE: + DBG_871X_LEVEL(_drv_always_, "WOWLAN_DISABLE\n"); + trycnt = 10; + rtl8188es_set_wowlan_cmd(Adapter, 0); + mstatus = rtw_read8(Adapter, REG_WOW_CTRL); + DBG_871X_LEVEL(_drv_info_, "%s mstatus:0x%02x\n", __func__, mstatus); + + while(mstatus&BIT1 && trycnt>1) { + mstatus = rtw_read8(Adapter, REG_WOW_CTRL); + DBG_871X_LEVEL(_drv_always_, "Loop index: %d :0x%02x\n", trycnt, mstatus); + trycnt --; + rtw_msleep_os(2); + } + + if (mstatus & BIT1) + printk("System did not release RX_DMA\n"); + else + SetFwRelatedForWoWLAN8188ES(Adapter, _FALSE); + + rtw_msleep_os(2); + if(!(adapter_to_pwrctl(Adapter)->wowlan_wake_reason & FWDecisionDisconnect)) + rtl8188e_set_FwJoinBssReport_cmd(Adapter, 1); + //rtw_msleep_os(10); break; default: - SecMinSpace = 7; break; - } - if (MinSpacingToSet < SecMinSpace) - MinSpacingToSet = SecMinSpace; - rtw_write8(Adapter, REG_AMPDU_MIN_SPACE, (rtw_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet); } } break; - case HW_VAR_AMPDU_FACTOR: - { - u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9}; - u8 FactorToSet; - u8 *pRegToSet; - u8 index = 0; +#endif //CONFIG_WOWLAN - pRegToSet = RegToSet_Normal; /* 0xb972a841; */ - FactorToSet = *((u8 *)val); - if (FactorToSet <= 3) { - FactorToSet = (1<<(FactorToSet + 2)); - if (FactorToSet > 0xf) - FactorToSet = 0xf; - for (index = 0; index < 4; index++) { - if ((pRegToSet[index] & 0xf0) > (FactorToSet<<4)) - pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4); - - if ((pRegToSet[index] & 0x0f) > FactorToSet) - pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet); - - rtw_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]); - } + #if (RATE_ADAPTIVE_SUPPORT == 1) + case HW_VAR_TX_RPT_MAX_MACID: + { + u8 maxMacid = *val; + DBG_871X("### MacID(%d),Set Max Tx RPT MID(%d)\n",maxMacid,maxMacid+1); + rtw_write8(Adapter, REG_TX_RPT_CTRL+1, maxMacid+1); } - } - break; - case HW_VAR_RXDMA_AGG_PG_TH: - { - u8 threshold = *((u8 *)val); - if (threshold == 0) - threshold = haldata->UsbRxAggPageCount; - rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold); - } - break; - case HW_VAR_SET_RPWM: - break; - case HW_VAR_H2C_FW_PWRMODE: - { - u8 psmode = (*(u8 *)val); - - /* Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power */ - /* saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. */ - if ((psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(haldata->VersionID))) - ODM_RF_Saving(podmpriv, true); - rtl8188e_set_FwPwrMode_cmd(Adapter, psmode); - } - break; - case HW_VAR_H2C_FW_JOINBSSRPT: - { - u8 mstatus = (*(u8 *)val); - rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus); - } - break; -#ifdef CONFIG_88EU_P2P - case HW_VAR_H2C_FW_P2P_PS_OFFLOAD: - { - u8 p2p_ps_state = (*(u8 *)val); - rtl8188e_set_p2p_ps_offload_cmd(Adapter, p2p_ps_state); - } - break; -#endif - case HW_VAR_INITIAL_GAIN: - { - struct rtw_dig *pDigTable = &podmpriv->DM_DigTable; - u32 rx_gain = ((u32 *)(val))[0]; - - if (rx_gain == 0xff) {/* restore rx gain */ - ODM_Write_DIG(podmpriv, pDigTable->BackupIGValue); - } else { - pDigTable->BackupIGValue = pDigTable->CurIGValue; - ODM_Write_DIG(podmpriv, rx_gain); + break; + #endif + case HW_VAR_H2C_MEDIA_STATUS_RPT: + { + rtl8188e_set_FwMediaStatus_cmd(Adapter , (*(u16 *)val)); } - } - break; - case HW_VAR_TRIGGER_GPIO_0: - rtl8192cu_trigger_gpio_0(Adapter); - break; - case HW_VAR_RPT_TIMER_SETTING: - { - u16 min_rpt_time = (*(u16 *)val); - ODM_RA_Set_TxRPT_Time(podmpriv, min_rpt_time); - } - break; - case HW_VAR_ANTENNA_DIVERSITY_SELECT: - { - u8 Optimum_antenna = (*(u8 *)val); - u8 Ant; - /* switch antenna to Optimum_antenna */ - if (haldata->CurAntenna != Optimum_antenna) { - Ant = (Optimum_antenna == 2) ? MAIN_ANT : AUX_ANT; - ODM_UpdateRxIdleAnt_88E(&haldata->odmpriv, Ant); - - haldata->CurAntenna = Optimum_antenna; - } - } - break; - case HW_VAR_EFUSE_BYTES: /* To set EFUE total used bytes, added by Roger, 2008.12.22. */ - haldata->EfuseUsedBytes = *((u16 *)val); - break; - case HW_VAR_FIFO_CLEARN_UP: - { - struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv; - u8 trycnt = 100; - - /* pause tx */ - rtw_write8(Adapter, REG_TXPAUSE, 0xff); - - /* keep sn */ - Adapter->xmitpriv.nqos_ssn = rtw_read16(Adapter, REG_NQOS_SEQ); - - if (!pwrpriv->bkeepfwalive) { - /* RX DMA stop */ - rtw_write32(Adapter, REG_RXPKT_NUM, (rtw_read32(Adapter, REG_RXPKT_NUM)|RW_RELEASE_EN)); - do { - if (!(rtw_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE)) - break; - } while (trycnt--); - if (trycnt == 0) - DBG_88E("Stop RX DMA failed......\n"); - - /* RQPN Load 0 */ - rtw_write16(Adapter, REG_RQPN_NPQ, 0x0); - rtw_write32(Adapter, REG_RQPN, 0x80000000); - rtw_mdelay_os(10); - } - } - break; - case HW_VAR_CHECK_TXBUF: - break; - case HW_VAR_APFM_ON_MAC: - haldata->bMacPwrCtrlOn = *val; - DBG_88E("%s: bMacPwrCtrlOn=%d\n", __func__, haldata->bMacPwrCtrlOn); - break; - case HW_VAR_TX_RPT_MAX_MACID: - { - u8 maxMacid = *val; - DBG_88E("### MacID(%d),Set Max Tx RPT MID(%d)\n", maxMacid, maxMacid+1); - rtw_write8(Adapter, REG_TX_RPT_CTRL+1, maxMacid+1); - } - break; - case HW_VAR_H2C_MEDIA_STATUS_RPT: - rtl8188e_set_FwMediaStatus_cmd(Adapter , (*(__le16 *)val)); - break; - case HW_VAR_BCN_VALID: - /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw */ - rtw_write8(Adapter, REG_TDECTRL+2, rtw_read8(Adapter, REG_TDECTRL+2) | BIT0); - break; - default: - break; + break; + case HW_VAR_BCN_VALID: + //BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw + rtw_write8(Adapter, REG_TDECTRL+2, rtw_read8(Adapter, REG_TDECTRL+2) | BIT0); + break; + default: + + break; } +_func_exit_; } -static void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val) +void GetHwReg8188EU(PADAPTER Adapter, u8 variable, u8* val) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); - struct odm_dm_struct *podmpriv = &haldata->odmpriv; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + DM_ODM_T *podmpriv = &pHalData->odmpriv; +_func_enter_; - switch (variable) { - case HW_VAR_BASIC_RATE: - *((u16 *)(val)) = haldata->BasicRateSet; - case HW_VAR_TXPAUSE: - val[0] = rtw_read8(Adapter, REG_TXPAUSE); - break; - case HW_VAR_BCN_VALID: - /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 */ - val[0] = (BIT0 & rtw_read8(Adapter, REG_TDECTRL+2)) ? true : false; - break; - case HW_VAR_DM_FLAG: - val[0] = podmpriv->SupportAbility; - break; - case HW_VAR_RF_TYPE: - val[0] = haldata->rf_type; - break; - case HW_VAR_FWLPS_RF_ON: - { - /* When we halt NIC, we should check if FW LPS is leave. */ - if (Adapter->pwrctrlpriv.rf_pwrstate == rf_off) { - /* If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, */ - /* because Fw is unload. */ - val[0] = true; - } else { - u32 valRCR; - valRCR = rtw_read32(Adapter, REG_RCR); - valRCR &= 0x00070000; - if (valRCR) - val[0] = false; + switch(variable) + { + case HW_VAR_BASIC_RATE: + *((u16 *)(val)) = pHalData->BasicRateSet; + case HW_VAR_TXPAUSE: + val[0] = rtw_read8(Adapter, REG_TXPAUSE); + break; + case HW_VAR_BCN_VALID: + //BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 + val[0] = (BIT0 & rtw_read8(Adapter, REG_TDECTRL+2))?_TRUE:_FALSE; + break; + case HW_VAR_DM_FLAG: + val[0] = podmpriv->SupportAbility; + break; + case HW_VAR_RF_TYPE: + val[0] = pHalData->rf_type; + break; + case HW_VAR_FWLPS_RF_ON: + { + //When we halt NIC, we should check if FW LPS is leave. + if(adapter_to_pwrctl(Adapter)->rf_pwrstate == rf_off) + { + // If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, + // because Fw is unload. + val[0] = _TRUE; + } else - val[0] = true; + { + u32 valRCR; + valRCR = rtw_read32(Adapter, REG_RCR); + valRCR &= 0x00070000; + if(valRCR) + val[0] = _FALSE; + else + val[0] = _TRUE; + } } - } - break; - case HW_VAR_CURRENT_ANTENNA: - val[0] = haldata->CurAntenna; - break; - case HW_VAR_EFUSE_BYTES: /* To get EFUE total used bytes, added by Roger, 2008.12.22. */ - *((u16 *)(val)) = haldata->EfuseUsedBytes; - break; - case HW_VAR_APFM_ON_MAC: - *val = haldata->bMacPwrCtrlOn; - break; - case HW_VAR_CHK_HI_QUEUE_EMPTY: - *val = ((rtw_read32(Adapter, REG_HGQ_INFORMATION)&0x0000ff00) == 0) ? true : false; - break; - default: - break; + break; +#ifdef CONFIG_ANTENNA_DIVERSITY + case HW_VAR_CURRENT_ANTENNA: + val[0] = pHalData->CurAntenna; + break; +#endif + case HW_VAR_EFUSE_BYTES: // To get EFUE total used bytes, added by Roger, 2008.12.22. + *((u16 *)(val)) = pHalData->EfuseUsedBytes; + break; + case HW_VAR_APFM_ON_MAC: + *val = pHalData->bMacPwrCtrlOn; + break; + case HW_VAR_CHK_HI_QUEUE_EMPTY: + *val = ((rtw_read32(Adapter, REG_HGQ_INFORMATION)&0x0000ff00)==0) ? _TRUE:_FALSE; + break; + + case HW_VAR_READ_LLT_TAB: + { + Read_LLT_Tab(Adapter); + } + break; + case HW_VAR_GET_CPWM: +#ifdef CONFIG_LPS_LCLK + { + *val = rtw_read8(Adapter, REG_USB_HCPWM); + } +#endif + break; + case HW_VAR_C2HEVT_CLEAR: + *val = rtw_read8(Adapter, REG_C2HEVT_CLEAR); + break; + case HW_VAR_C2HEVT_MSG_NORMAL: + *val = rtw_read8(Adapter, REG_C2HEVT_MSG_NORMAL); + break; + + default: + break; } +_func_exit_; } -/* */ -/* Description: */ -/* Query setting of specified variable. */ -/* */ -static u8 +// +// Description: +// Query setting of specified variable. +// +u8 GetHalDefVar8188EUsb( - struct adapter *Adapter, - enum hal_def_variable eVariable, - void *pValue + IN PADAPTER Adapter, + IN HAL_DEF_VARIABLE eVariable, + IN PVOID pValue ) { - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); - u8 bResult = _SUCCESS; - - switch (eVariable) { - case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB: - { - struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; - struct sta_priv *pstapriv = &Adapter->stapriv; - struct sta_info *psta; - psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress); - if (psta) - *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB; - } - break; - case HAL_DEF_IS_SUPPORT_ANT_DIV: - *((u8 *)pValue) = (haldata->AntDivCfg == 0) ? false : true; - break; - case HAL_DEF_CURRENT_ANTENNA: - *((u8 *)pValue) = haldata->CurAntenna; - break; - case HAL_DEF_DRVINFO_SZ: - *((u32 *)pValue) = DRVINFO_SZ; - break; - case HAL_DEF_MAX_RECVBUF_SZ: - *((u32 *)pValue) = MAX_RECVBUF_SZ; - break; - case HAL_DEF_RX_PACKET_OFFSET: - *((u32 *)pValue) = RXDESC_SIZE + DRVINFO_SZ; - break; - case HAL_DEF_DBG_DM_FUNC: - *((u32 *)pValue) = haldata->odmpriv.SupportAbility; - break; - case HAL_DEF_RA_DECISION_RATE: - { - u8 MacID = *((u8 *)pValue); - *((u8 *)pValue) = ODM_RA_GetDecisionRate_8188E(&(haldata->odmpriv), MacID); - } - break; - case HAL_DEF_RA_SGI: - { - u8 MacID = *((u8 *)pValue); - *((u8 *)pValue) = ODM_RA_GetShortGI_8188E(&(haldata->odmpriv), MacID); - } - break; - case HAL_DEF_PT_PWR_STATUS: - { - u8 MacID = *((u8 *)pValue); - *((u8 *)pValue) = ODM_RA_GetHwPwrStatus_8188E(&(haldata->odmpriv), MacID); - } - break; - case HW_VAR_MAX_RX_AMPDU_FACTOR: - *((u32 *)pValue) = MAX_AMPDU_FACTOR_64K; - break; - case HW_DEF_RA_INFO_DUMP: - { - u8 entry_id = *((u8 *)pValue); - if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) { - DBG_88E("============ RA status check ===================\n"); - DBG_88E("Mac_id:%d , RateID = %d, RAUseRate = 0x%08x, RateSGI = %d, DecisionRate = 0x%02x ,PTStage = %d\n", - entry_id, - haldata->odmpriv.RAInfo[entry_id].RateID, - haldata->odmpriv.RAInfo[entry_id].RAUseRate, - haldata->odmpriv.RAInfo[entry_id].RateSGI, - haldata->odmpriv.RAInfo[entry_id].DecisionRate, - haldata->odmpriv.RAInfo[entry_id].PTStage); - } - } - break; - case HW_DEF_ODM_DBG_FLAG: - { - struct odm_dm_struct *dm_ocm = &(haldata->odmpriv); - pr_info("dm_ocm->DebugComponents = 0x%llx\n", dm_ocm->DebugComponents); - } - break; - case HAL_DEF_DBG_DUMP_RXPKT: - *((u8 *)pValue) = haldata->bDumpRxPkt; - break; - case HAL_DEF_DBG_DUMP_TXPKT: - *((u8 *)pValue) = haldata->bDumpTxPkt; - break; - default: - bResult = _FAIL; - break; - } - - return bResult; -} - -/* */ -/* Description: */ -/* Change default setting of specified variable. */ -/* */ -static u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue) -{ - struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter); - u8 bResult = _SUCCESS; - - switch (eVariable) { - case HAL_DEF_DBG_DM_FUNC: - { - u8 dm_func = *((u8 *)pValue); - struct odm_dm_struct *podmpriv = &haldata->odmpriv; - - if (dm_func == 0) { /* disable all dynamic func */ - podmpriv->SupportAbility = DYNAMIC_FUNC_DISABLE; - DBG_88E("==> Disable all dynamic function...\n"); - } else if (dm_func == 1) {/* disable DIG */ - podmpriv->SupportAbility &= (~DYNAMIC_BB_DIG); - DBG_88E("==> Disable DIG...\n"); - } else if (dm_func == 2) {/* disable High power */ - podmpriv->SupportAbility &= (~DYNAMIC_BB_DYNAMIC_TXPWR); - } else if (dm_func == 3) {/* disable tx power tracking */ - podmpriv->SupportAbility &= (~DYNAMIC_RF_CALIBRATION); - DBG_88E("==> Disable tx power tracking...\n"); - } else if (dm_func == 5) {/* disable antenna diversity */ - podmpriv->SupportAbility &= (~DYNAMIC_BB_ANT_DIV); - } else if (dm_func == 6) {/* turn on all dynamic func */ - if (!(podmpriv->SupportAbility & DYNAMIC_BB_DIG)) { - struct rtw_dig *pDigTable = &podmpriv->DM_DigTable; - pDigTable->CurIGValue = rtw_read8(Adapter, 0xc50); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DM_ODM_T *podmpriv = &pHalData->odmpriv; + u8 bResult = _SUCCESS; + + switch(eVariable) + { + case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB: +#if 1 //trunk + { + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + struct sta_priv * pstapriv = &Adapter->stapriv; + struct sta_info * psta; + psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress); + if(psta) + { + *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB; } - podmpriv->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE; - DBG_88E("==> Turn on all dynamic function...\n"); } - } - break; - case HAL_DEF_DBG_DUMP_RXPKT: - haldata->bDumpRxPkt = *((u8 *)pValue); - break; - case HAL_DEF_DBG_DUMP_TXPKT: - haldata->bDumpTxPkt = *((u8 *)pValue); - break; - case HW_DEF_FA_CNT_DUMP: - { - u8 bRSSIDump = *((u8 *)pValue); - struct odm_dm_struct *dm_ocm = &(haldata->odmpriv); - if (bRSSIDump) - dm_ocm->DebugComponents = ODM_COMP_DIG|ODM_COMP_FA_CNT ; - else - dm_ocm->DebugComponents = 0; - } - break; - case HW_DEF_ODM_DBG_FLAG: - { - u64 DebugComponents = *((u64 *)pValue); - struct odm_dm_struct *dm_ocm = &(haldata->odmpriv); - dm_ocm->DebugComponents = DebugComponents; - } - break; - default: - bResult = _FAIL; - break; +#else //V4 branch + if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){ + *((int *)pValue) = pHalData->dmpriv.UndecoratedSmoothedPWDB; + } + else{ + + } +#endif + break; + case HAL_DEF_IS_SUPPORT_ANT_DIV: +#ifdef CONFIG_ANTENNA_DIVERSITY + *((u8 *)pValue) = (pHalData->AntDivCfg==0)?_FALSE:_TRUE; +#endif + break; + case HAL_DEF_CURRENT_ANTENNA: +#ifdef CONFIG_ANTENNA_DIVERSITY + *(( u8*)pValue) = pHalData->CurAntenna; +#endif + break; + case HAL_DEF_DRVINFO_SZ: + *(( u32*)pValue) = DRVINFO_SZ; + break; + case HAL_DEF_MAX_RECVBUF_SZ: + *(( u32*)pValue) = MAX_RECVBUF_SZ; + break; + case HAL_DEF_RX_PACKET_OFFSET: + *(( u32*)pValue) = RXDESC_SIZE + DRVINFO_SZ; + break; +#if (RATE_ADAPTIVE_SUPPORT == 1) + case HAL_DEF_RA_DECISION_RATE: + { + u8 MacID = *((u8*)pValue); + *((u8*)pValue) = ODM_RA_GetDecisionRate_8188E(podmpriv, MacID); + } + break; + + case HAL_DEF_RA_SGI: + { + u8 MacID = *((u8*)pValue); + *((u8*)pValue) = ODM_RA_GetShortGI_8188E(podmpriv, MacID); + } + break; +#endif + + + case HAL_DEF_PT_PWR_STATUS: +#if(POWER_TRAINING_ACTIVE==1) + { + u8 MacID = *((u8*)pValue); + *((u8*)pValue) = ODM_RA_GetHwPwrStatus_8188E(podmpriv, MacID); + } +#endif//(POWER_TRAINING_ACTIVE==1) + break; + + case HW_VAR_MAX_RX_AMPDU_FACTOR: + *(( u32*)pValue) = MAX_AMPDU_FACTOR_64K; + break; + + case HW_DEF_RA_INFO_DUMP: +#if (RATE_ADAPTIVE_SUPPORT == 1) + { + u8 entry_id = *((u8*)pValue); + u8 i; + u8 bLinked = _FALSE; +#ifdef CONFIG_CONCURRENT_MODE + PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; +#endif //CONFIG_CONCURRENT_MODE + + //if(check_fwstate(&Adapter->mlmepriv, _FW_LINKED)== _TRUE) + + if(rtw_linked_check(Adapter)) + bLinked = _TRUE; + +#ifdef CONFIG_CONCURRENT_MODE + if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter)) + bLinked = _TRUE; +#endif + + if(bLinked){ + DBG_871X("============ RA status check ===================\n"); + if(Adapter->bRxRSSIDisplay >30) + Adapter->bRxRSSIDisplay = 1; + for(i=0;i< Adapter->bRxRSSIDisplay;i++){ + DBG_8192C("Mac_id:%d ,RSSI:%d,RateID = %d,RAUseRate = 0x%08x,RateSGI = %d, DecisionRate = 0x%02x ,PTStage = %d, RetryOver drop:%d, LifeTimeOver drop:%d\n", + i, + podmpriv->RAInfo[i].RssiStaRA, + podmpriv->RAInfo[i].RateID, + podmpriv->RAInfo[i].RAUseRate, + podmpriv->RAInfo[i].RateSGI, + podmpriv->RAInfo[i].DecisionRate, + podmpriv->RAInfo[i].PTStage, + podmpriv->RAInfo[i].DROP, + podmpriv->RAInfo[i].DROP1 + ); + } + } + } +#endif //(RATE_ADAPTIVE_SUPPORT == 1) + break; + case HAL_DEF_DBG_DUMP_RXPKT: + *(( u8*)pValue) = pHalData->bDumpRxPkt; + break; + case HAL_DEF_DBG_DUMP_TXPKT: + *(( u8*)pValue) = pHalData->bDumpTxPkt; + break; + + default: + bResult = GetHalDefVar(Adapter, eVariable, pValue); + break; } return bResult; } -static void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level) + + + +// +// Description: +// Change default setting of specified variable. +// +u8 +SetHalDefVar8188EUsb( + IN PADAPTER Adapter, + IN HAL_DEF_VARIABLE eVariable, + IN PVOID pValue + ) { - u8 init_rate = 0; - u8 networkType, raid; - u32 mask, rate_bitmap; - u8 shortGIrate = false; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DM_ODM_T *podmpriv = &pHalData->odmpriv; + u8 bResult = _SUCCESS; + + switch(eVariable) + { + case HAL_DEF_DBG_DM_FUNC: + { + u8 dm_func = *(( u8*)pValue); + + if(dm_func == 0){ //disable all dynamic func + podmpriv->SupportAbility = DYNAMIC_FUNC_DISABLE; + DBG_8192C("==> Disable all dynamic function...\n"); + } + else if(dm_func == 1){//disable DIG + podmpriv->SupportAbility &= (~DYNAMIC_BB_DIG); + DBG_8192C("==> Disable DIG...\n"); + } + else if(dm_func == 2){//disable High power + podmpriv->SupportAbility &= (~DYNAMIC_BB_DYNAMIC_TXPWR); + } + else if(dm_func == 3){//disable tx power tracking + podmpriv->SupportAbility &= (~DYNAMIC_RF_CALIBRATION); + DBG_8192C("==> Disable tx power tracking...\n"); + } + //else if(dm_func == 4){//disable BT coexistence + // pdmpriv->DMFlag &= (~DYNAMIC_FUNC_BT); + //} + else if(dm_func == 5){//disable antenna diversity + podmpriv->SupportAbility &= (~DYNAMIC_BB_ANT_DIV); + } + else if(dm_func == 6){//turn on all dynamic func + if(!(podmpriv->SupportAbility & DYNAMIC_BB_DIG)) + { + DIG_T *pDigTable = &podmpriv->DM_DigTable; + pDigTable->CurIGValue= rtw_read8(Adapter,0xc50); + } + //pdmpriv->DMFlag |= DYNAMIC_FUNC_BT; + podmpriv->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE; + DBG_8192C("==> Turn on all dynamic function...\n"); + } + } + break; + case HAL_DEF_DBG_DUMP_RXPKT: + pHalData->bDumpRxPkt = *(( u8*)pValue); + break; + case HAL_DEF_DBG_DUMP_TXPKT: + pHalData->bDumpTxPkt = *(( u8*)pValue); + break; + default: + bResult = SetHalDefVar(Adapter, eVariable, pValue); + break; + } + + return bResult; +} +/* +u32 _update_92cu_basic_rate(_adapter *padapter, unsigned int mask) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +#ifdef CONFIG_BT_COEXIST + struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); +#endif + unsigned int BrateCfg = 0; + +#ifdef CONFIG_BT_COEXIST + if( (pbtpriv->BT_Coexist) && (pbtpriv->BT_CoexistType == BT_CSR_BC4) ) + { + BrateCfg = mask & 0x151; + //DBG_8192C("BT temp disable cck 2/5.5/11M, (0x%x = 0x%x)\n", REG_RRSR, BrateCfg & 0x151); + } + else +#endif + { + //if(pHalData->VersionID != VERSION_TEST_CHIP_88C) + BrateCfg = mask & 0x15F; + //else //for 88CU 46PING setting, Disable CCK 2M, 5.5M, Others must tuning + // BrateCfg = mask & 0x159; + } + + BrateCfg |= 0x01; // default enable 1M ACK rate + + return BrateCfg; +} +*/ +void _update_response_rate(_adapter *padapter,unsigned int mask) +{ + u8 RateIndex = 0; + // Set RRSR rate table. + rtw_write8(padapter, REG_RRSR, mask&0xff); + rtw_write8(padapter,REG_RRSR+1, (mask>>8)&0xff); + + // Set RTS initial rate + while(mask > 0x1) + { + mask = (mask>> 1); + RateIndex++; + } + rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex); +} + +void UpdateHalRAMask8188EUsb(PADAPTER padapter, u32 mac_id, u8 rssi_level) +{ + //volatile unsigned int result; + u8 init_rate=0; + u8 networkType, raid; + u32 mask,rate_bitmap; + u8 shortGIrate = _FALSE; int supportRateNum = 0; struct sta_info *psta; - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + //struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); + WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); - if (mac_id >= NUM_STA) /* CAM_SIZE */ + if (mac_id >= NUM_STA) //CAM_SIZE + { return; - psta = pmlmeinfo->FW_sta_info[mac_id].psta; - if (psta == NULL) - return; - switch (mac_id) { - case 0:/* for infra mode */ - supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates); - networkType = judge_network_type(adapt, cur_network->SupportedRates, supportRateNum) & 0xf; - raid = networktype_to_raid(networkType); - mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); - mask |= (pmlmeinfo->HT_enable) ? update_MSC_rate(&(pmlmeinfo->HT_caps)) : 0; - if (support_short_GI(adapt, &(pmlmeinfo->HT_caps))) - shortGIrate = true; - break; - case 1:/* for broadcast/multicast */ - supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); - if (pmlmeext->cur_wireless_mode & WIRELESS_11B) - networkType = WIRELESS_11B; - else - networkType = WIRELESS_11G; - raid = networktype_to_raid(networkType); - mask = update_basic_rate(cur_network->SupportedRates, supportRateNum); - break; - default: /* for each sta in IBSS */ - supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); - networkType = judge_network_type(adapt, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf; - raid = networktype_to_raid(networkType); - mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); - - /* todo: support HT in IBSS */ - break; } - rate_bitmap = 0x0fffffff; - rate_bitmap = ODM_Get_Rate_Bitmap(&haldata->odmpriv, mac_id, mask, rssi_level); - DBG_88E("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n", - __func__, mac_id, networkType, mask, rssi_level, rate_bitmap); + psta = pmlmeinfo->FW_sta_info[mac_id].psta; + if(psta == NULL) + { + return; + } - mask &= rate_bitmap; + switch (mac_id) + { + case 0:// for infra mode +#ifdef CONFIG_CONCURRENT_MODE + case 2:// first station uses macid=0, second station uses macid=2 +#endif + supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates); + networkType = judge_network_type(padapter, cur_network->SupportedRates, supportRateNum) & 0xf; + //pmlmeext->cur_wireless_mode = networkType; + raid = networktype_to_raid(networkType); + + mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); + mask |= (pmlmeinfo->HT_enable)? update_MSC_rate(&(pmlmeinfo->HT_caps)): 0; + + + if (support_short_GI(padapter, &(pmlmeinfo->HT_caps))) + { + shortGIrate = _TRUE; + } + + break; + case 1://for broadcast/multicast + supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); + if(pmlmeext->cur_wireless_mode & WIRELESS_11B) + networkType = WIRELESS_11B; + else + networkType = WIRELESS_11G; + raid = networktype_to_raid(networkType); + mask = update_basic_rate(cur_network->SupportedRates, supportRateNum); + + + break; + + default: //for each sta in IBSS + supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); + networkType = judge_network_type(padapter, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf; + //pmlmeext->cur_wireless_mode = networkType; + raid = networktype_to_raid(networkType); + mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); + + //todo: support HT in IBSS + + break; + } + + //mask &=0x0fffffff; + rate_bitmap = 0x0fffffff; +#ifdef CONFIG_ODM_REFRESH_RAMASK + { + rate_bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv,mac_id,mask,rssi_level); + printk("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n", + __FUNCTION__,mac_id,networkType,mask,rssi_level,rate_bitmap); + } +#endif + + mask &= rate_bitmap; + init_rate = get_highest_rate_idx(mask)&0x3f; + + if(pHalData->fw_ractrl == _TRUE) + { + u8 arg = 0; - if (haldata->fw_ractrl) { - u8 arg; - - arg = mac_id & 0x1f;/* MACID */ + //arg = (cam_idx-4)&0x1f;//MACID + arg = mac_id&0x1f;//MACID + arg |= BIT(7); - if (shortGIrate) + + if (shortGIrate==_TRUE) arg |= BIT(5); - mask |= ((raid << 28) & 0xf0000000); - DBG_88E("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg); - psta->ra_mask = mask; - mask |= ((raid << 28) & 0xf0000000); + mask |= ((raid<<28)&0xf0000000); + DBG_871X("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg); + psta->ra_mask=mask; +#ifdef CONFIG_INTEL_PROXIM + if(padapter->proximity.proxim_on ==_TRUE){ + arg &= ~BIT(6); + } + else { + arg |= BIT(6); + } +#endif //CONFIG_INTEL_PROXIM + mask |= ((raid<<28)&0xf0000000); - /* to do ,for 8188E-SMIC */ - rtl8188e_set_raid_cmd(adapt, mask); - } else { - ODM_RA_UpdateRateInfo_8188E(&(haldata->odmpriv), + //to do + /* + *(pu4Byte)&RateMask=EF4Byte((ratr_bitmap&0x0fffffff) | (ratr_index<<28)); + RateMask[4] = macId | (bShortGI?0x20:0x00) | 0x80; + */ + rtl8188e_set_raid_cmd(padapter, mask); + + } + else + { + +#if(RATE_ADAPTIVE_SUPPORT == 1) + + ODM_RA_UpdateRateInfo_8188E( + &(pHalData->odmpriv), mac_id, - raid, + raid, mask, shortGIrate ); + +#endif } - /* set ra_id */ + + + //set ra_id psta->raid = raid; psta->init_rate = init_rate; + + } -static void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt) + +void SetBeaconRelatedRegisters8188EUsb(PADAPTER padapter) { - u32 value32; - struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv); + u32 value32; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - u32 bcn_ctrl_reg = REG_BCN_CTRL; - /* reset TSF, enable update TSF, correcting TSF On Beacon */ + u32 bcn_ctrl_reg = REG_BCN_CTRL; + //reset TSF, enable update TSF, correcting TSF On Beacon + + //REG_BCN_INTERVAL + //REG_BCNDMATIM + //REG_ATIMWND + //REG_TBTT_PROHIBIT + //REG_DRVERLYINT + //REG_BCN_MAX_ERR + //REG_BCNTCFG //(0x510) + //REG_DUAL_TSF_RST + //REG_BCN_CTRL //(0x550) - /* BCN interval */ - rtw_write16(adapt, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval); - rtw_write8(adapt, REG_ATIMWND, 0x02);/* 2ms */ + //BCN interval +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1){ + bcn_ctrl_reg = REG_BCN_CTRL_1; + } +#endif + rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval); + rtw_write8(padapter, REG_ATIMWND, 0x02);// 2ms - _InitBeaconParameters(adapt); + _InitBeaconParameters(padapter); - rtw_write8(adapt, REG_SLOT, 0x09); + rtw_write8(padapter, REG_SLOT, 0x09); - value32 = rtw_read32(adapt, REG_TCR); + value32 =rtw_read32(padapter, REG_TCR); value32 &= ~TSFRST; - rtw_write32(adapt, REG_TCR, value32); + rtw_write32(padapter, REG_TCR, value32); value32 |= TSFRST; - rtw_write32(adapt, REG_TCR, value32); + rtw_write32(padapter, REG_TCR, value32); - /* NOTE: Fix test chip's bug (about contention windows's randomness) */ - rtw_write8(adapt, REG_RXTSF_OFFSET_CCK, 0x50); - rtw_write8(adapt, REG_RXTSF_OFFSET_OFDM, 0x50); + // NOTE: Fix test chip's bug (about contention windows's randomness) + rtw_write8(padapter, REG_RXTSF_OFFSET_CCK, 0x50); + rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50); - _BeaconFunctionEnable(adapt, true, true); + _BeaconFunctionEnable(padapter, _TRUE, _TRUE); - ResumeTxBeacon(adapt); + ResumeTxBeacon(padapter); + + //rtw_write8(padapter, 0x422, rtw_read8(padapter, 0x422)|BIT(6)); + + //rtw_write8(padapter, 0x541, 0xff); + + //rtw_write8(padapter, 0x542, rtw_read8(padapter, 0x541)|BIT(0)); + + rtw_write8(padapter, bcn_ctrl_reg, rtw_read8(padapter, bcn_ctrl_reg)|BIT(1)); - rtw_write8(adapt, bcn_ctrl_reg, rtw_read8(adapt, bcn_ctrl_reg)|BIT(1)); } -static void rtl8188eu_init_default_value(struct adapter *adapt) +static void rtl8188eu_init_default_value(_adapter * padapter) { - struct hal_data_8188e *haldata; + PHAL_DATA_TYPE pHalData; struct pwrctrl_priv *pwrctrlpriv; + struct dm_priv *pdmpriv; u8 i; - haldata = GET_HAL_DATA(adapt); - pwrctrlpriv = &adapt->pwrctrlpriv; + pHalData = GET_HAL_DATA(padapter); + pwrctrlpriv = adapter_to_pwrctl(padapter); + pdmpriv = &pHalData->dmpriv; - /* init default value */ - haldata->fw_ractrl = false; - if (!pwrctrlpriv->bkeepfwalive) - haldata->LastHMEBoxNum = 0; - /* init dm default value */ - haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = false; - haldata->odmpriv.RFCalibrateInfo.TM_Trigger = 0;/* for IQK */ - haldata->pwrGroupCnt = 0; - haldata->PGMaxGroup = 13; - haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0; - for (i = 0; i < HP_THERMAL_NUM; i++) - haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0; + //init default value + pHalData->fw_ractrl = _FALSE; + if(!pwrctrlpriv->bkeepfwalive) + pHalData->LastHMEBoxNum = 0; + + //init dm default value + pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized = _FALSE; + pHalData->odmpriv.RFCalibrateInfo.TM_Trigger = 0;//for IQK + //pdmpriv->binitialized = _FALSE; +// pdmpriv->prv_traffic_idx = 3; +// pdmpriv->initialize = 0; + pHalData->pwrGroupCnt = 0; + pHalData->PGMaxGroup= 13; + pHalData->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0; + for(i = 0; i < HP_THERMAL_NUM; i++) + pHalData->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0; } -static u8 rtl8188eu_ps_func(struct adapter *Adapter, enum hal_intf_ps_func efunc_id, u8 *val) -{ - u8 bResult = true; +static u8 rtl8188eu_ps_func(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8 *val) +{ + u8 bResult = _TRUE; + switch(efunc_id){ + + #if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED) + case HAL_USB_SELECT_SUSPEND: + { + u8 bfwpoll = *(( u8*)val); + //rtl8188e_set_FwSelectSuspend_cmd(Adapter,bfwpoll ,500);//note fw to support hw power down ping detect + } + break; + #endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED + + default: + break; + } return bResult; } -void rtl8188eu_set_hal_ops(struct adapter *adapt) +void rtl8188eu_set_hal_ops(_adapter * padapter) { - struct hal_ops *halfunc = &adapt->HalFunc; + struct hal_ops *pHalFunc = &padapter->HalFunc; - adapt->HalData = rtw_zmalloc(sizeof(struct hal_data_8188e)); - if (adapt->HalData == NULL) - DBG_88E("cant not alloc memory for HAL DATA\n"); - adapt->hal_data_sz = sizeof(struct hal_data_8188e); +_func_enter_; - halfunc->hal_power_on = rtl8188eu_InitPowerOn; - halfunc->hal_init = &rtl8188eu_hal_init; - halfunc->hal_deinit = &rtl8188eu_hal_deinit; +#ifdef CONFIG_CONCURRENT_MODE + if(padapter->isprimary) +#endif //CONFIG_CONCURRENT_MODE + { + padapter->HalData = rtw_zmalloc(sizeof(HAL_DATA_TYPE)); + if(padapter->HalData == NULL){ + DBG_8192C("cant not alloc memory for HAL DATA \n"); + } + } - halfunc->inirp_init = &rtl8188eu_inirp_init; - halfunc->inirp_deinit = &rtl8188eu_inirp_deinit; + //_rtw_memset(padapter->HalData, 0, sizeof(HAL_DATA_TYPE)); + padapter->hal_data_sz = sizeof(HAL_DATA_TYPE); - halfunc->init_xmit_priv = &rtl8188eu_init_xmit_priv; - halfunc->free_xmit_priv = &rtl8188eu_free_xmit_priv; + pHalFunc->hal_power_on = InitPowerOn_rtl8188eu; + pHalFunc->hal_power_off = hal_poweroff_rtl8188eu; + + pHalFunc->hal_init = &rtl8188eu_hal_init; + pHalFunc->hal_deinit = &rtl8188eu_hal_deinit; - halfunc->init_recv_priv = &rtl8188eu_init_recv_priv; - halfunc->free_recv_priv = &rtl8188eu_free_recv_priv; - halfunc->InitSwLeds = &rtl8188eu_InitSwLeds; - halfunc->DeInitSwLeds = &rtl8188eu_DeInitSwLeds; + //pHalFunc->free_hal_data = &rtl8192c_free_hal_data; - halfunc->init_default_value = &rtl8188eu_init_default_value; - halfunc->intf_chip_configure = &rtl8188eu_interface_configure; - halfunc->read_adapter_info = &ReadAdapterInfo8188EU; + pHalFunc->inirp_init = &rtl8188eu_inirp_init; + pHalFunc->inirp_deinit = &rtl8188eu_inirp_deinit; - halfunc->SetHwRegHandler = &SetHwReg8188EU; - halfunc->GetHwRegHandler = &GetHwReg8188EU; - halfunc->GetHalDefVarHandler = &GetHalDefVar8188EUsb; - halfunc->SetHalDefVarHandler = &SetHalDefVar8188EUsb; + pHalFunc->init_xmit_priv = &rtl8188eu_init_xmit_priv; + pHalFunc->free_xmit_priv = &rtl8188eu_free_xmit_priv; - halfunc->UpdateRAMaskHandler = &UpdateHalRAMask8188EUsb; - halfunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8188EUsb; + pHalFunc->init_recv_priv = &rtl8188eu_init_recv_priv; + pHalFunc->free_recv_priv = &rtl8188eu_free_recv_priv; +#ifdef CONFIG_SW_LED + pHalFunc->InitSwLeds = &rtl8188eu_InitSwLeds; + pHalFunc->DeInitSwLeds = &rtl8188eu_DeInitSwLeds; +#else //case of hw led or no led + pHalFunc->InitSwLeds = NULL; + pHalFunc->DeInitSwLeds = NULL; +#endif//CONFIG_SW_LED + + pHalFunc->init_default_value = &rtl8188eu_init_default_value; + pHalFunc->intf_chip_configure = &rtl8188eu_interface_configure; + pHalFunc->read_adapter_info = &ReadAdapterInfo8188EU; - halfunc->hal_xmit = &rtl8188eu_hal_xmit; - halfunc->mgnt_xmit = &rtl8188eu_mgnt_xmit; + //pHalFunc->set_bwmode_handler = &PHY_SetBWMode8192C; + //pHalFunc->set_channel_handler = &PHY_SwChnl8192C; - halfunc->interface_ps_func = &rtl8188eu_ps_func; + //pHalFunc->hal_dm_watchdog = &rtl8192c_HalDmWatchDog; - rtl8188e_set_hal_ops(halfunc); + + pHalFunc->SetHwRegHandler = &SetHwReg8188EU; + pHalFunc->GetHwRegHandler = &GetHwReg8188EU; + pHalFunc->GetHalDefVarHandler = &GetHalDefVar8188EUsb; + pHalFunc->SetHalDefVarHandler = &SetHalDefVar8188EUsb; + + pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8188EUsb; + pHalFunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8188EUsb; + + //pHalFunc->Add_RateATid = &rtl8192c_Add_RateATid; + + pHalFunc->hal_xmit = &rtl8188eu_hal_xmit; + pHalFunc->mgnt_xmit = &rtl8188eu_mgnt_xmit; + pHalFunc->hal_xmitframe_enqueue = &rtl8188eu_hal_xmitframe_enqueue; + + +#ifdef CONFIG_HOSTAPD_MLME + pHalFunc->hostap_mgnt_xmit_entry = &rtl8188eu_hostap_mgnt_xmit_entry; +#endif + pHalFunc->interface_ps_func = &rtl8188eu_ps_func; + + rtl8188e_set_hal_ops(pHalFunc); +_func_exit_; } + diff --git a/hal/usb_ops_linux.c b/hal/usb_ops_linux.c old mode 100644 new mode 100755 index ef5a38f..374d9ec --- a/hal/usb_ops_linux.c +++ b/hal/usb_ops_linux.c @@ -1,7 +1,7 @@ /****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * + * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. @@ -19,101 +19,170 @@ ******************************************************************************/ #define _HCI_OPS_OS_C_ +#include #include #include #include #include +#include #include #include static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype) { - struct adapter *adapt = pintfhdl->padapter; - struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt); - struct usb_device *udev = dvobjpriv->pusbdev; + _adapter *padapter = pintfhdl->padapter; + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + struct usb_device *udev=pdvobjpriv->pusbdev; + unsigned int pipe; int status = 0; + u32 tmp_buflen=0; u8 reqtype; u8 *pIo_buf; int vendorreq_times = 0; - if ((adapt->bSurpriseRemoved) || (adapt->pwrctrlpriv.pnp_bstop_trx)) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usbctrl_vendorreq:(adapt->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); - status = -EPERM; - goto exit; - } + #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE + u8 *tmp_buf; + #else // use stack memory + u8 tmp_buf[MAX_USB_IO_CTL_SIZE]; + #endif - if (len > MAX_VENDOR_REQ_CMD_SIZE) { - DBG_88E("[%s] Buffer len error ,vendor request failed\n", __func__); +#ifdef CONFIG_CONCURRENT_MODE + if(padapter->adapter_type > PRIMARY_ADAPTER) + { + padapter = padapter->pbuddy_adapter; + pdvobjpriv = adapter_to_dvobj(padapter); + udev = pdvobjpriv->pusbdev; + } +#endif + + //DBG_871X("%s %s:%d\n",__FUNCTION__, current->comm, current->pid); + + if((padapter->bSurpriseRemoved) ||(dvobj_to_pwrctl(pdvobjpriv)->pnp_bstop_trx)){ + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq:(padapter->bSurpriseRemoved ||pwrctl->pnp_bstop_trx)!!!\n")); + status = -EPERM; + goto exit; + } + + if(len>MAX_VENDOR_REQ_CMD_SIZE){ + DBG_8192C( "[%s] Buffer len error ,vendor request failed\n", __FUNCTION__ ); status = -EINVAL; goto exit; - } + } - _enter_critical_mutex(&dvobjpriv->usb_vendor_req_mutex, NULL); + #ifdef CONFIG_USB_VENDOR_REQ_MUTEX + _enter_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL); + #endif + + + // Acquire IO memory for vendorreq +#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC + pIo_buf = pdvobjpriv->usb_vendor_req_buf; +#else + #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE + tmp_buf = rtw_malloc( (u32) len + ALIGNMENT_UNIT); + tmp_buflen = (u32)len + ALIGNMENT_UNIT; + #else // use stack memory + tmp_buflen = MAX_USB_IO_CTL_SIZE; + #endif - /* Acquire IO memory for vendorreq */ - pIo_buf = dvobjpriv->usb_vendor_req_buf; + // Added by Albert 2010/02/09 + // For mstar platform, mstar suggests the address for USB IO should be 16 bytes alignment. + // Trying to fix it here. + pIo_buf = (tmp_buf==NULL)?NULL:tmp_buf + ALIGNMENT_UNIT -((SIZE_PTR)(tmp_buf) & 0x0f ); +#endif - if (pIo_buf == NULL) { - DBG_88E("[%s] pIo_buf == NULL\n", __func__); + if ( pIo_buf== NULL) { + DBG_8192C( "[%s] pIo_buf == NULL \n", __FUNCTION__ ); status = -ENOMEM; goto release_mutex; } - - while (++vendorreq_times <= MAX_USBCTRL_VENDORREQ_TIMES) { + + while(++vendorreq_times<= MAX_USBCTRL_VENDORREQ_TIMES) + { _rtw_memset(pIo_buf, 0, len); - - if (requesttype == 0x01) { - pipe = usb_rcvctrlpipe(udev, 0);/* read_in */ - reqtype = REALTEK_USB_VENQT_READ; - } else { - pipe = usb_sndctrlpipe(udev, 0);/* write_out */ - reqtype = REALTEK_USB_VENQT_WRITE; - memcpy(pIo_buf, pdata, len); - } - + + if (requesttype == 0x01) + { + pipe = usb_rcvctrlpipe(udev, 0);//read_in + reqtype = REALTEK_USB_VENQT_READ; + } + else + { + pipe = usb_sndctrlpipe(udev, 0);//write_out + reqtype = REALTEK_USB_VENQT_WRITE; + _rtw_memcpy( pIo_buf, pdata, len); + } + + #if 0 + //timeout test for firmware downloading + status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len + , (value == FW_8188E_START_ADDRESS) ?RTW_USB_CONTROL_MSG_TIMEOUT_TEST : RTW_USB_CONTROL_MSG_TIMEOUT + ); + #else status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len, RTW_USB_CONTROL_MSG_TIMEOUT); - - if (status == len) { /* Success this control transfer. */ - rtw_reset_continual_urb_error(dvobjpriv); - if (requesttype == 0x01) - memcpy(pdata, pIo_buf, len); - } else { /* error cases */ - DBG_88E("reg 0x%x, usb %s %u fail, status:%d value=0x%x, vendorreq_times:%d\n", - value, (requesttype == 0x01) ? "read" : "write", - len, status, *(u32 *)pdata, vendorreq_times); - + #endif + + if ( status == len) // Success this control transfer. + { + rtw_reset_continual_io_error(pdvobjpriv); + if ( requesttype == 0x01 ) + { // For Control read transfer, we have to copy the read data from pIo_buf to pdata. + _rtw_memcpy( pdata, pIo_buf, len ); + } + } + else { // error cases + DBG_8192C("reg 0x%x, usb %s %u fail, status:%d value=0x%x, vendorreq_times:%d\n" + , value,(requesttype == 0x01)?"read":"write" , len, status, *(u32*)pdata, vendorreq_times); + if (status < 0) { - if (status == (-ESHUTDOWN) || status == -ENODEV) { - adapt->bSurpriseRemoved = true; + if(status == (-ESHUTDOWN) || status == -ENODEV ) + { + padapter->bSurpriseRemoved = _TRUE; } else { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - haldata->srestpriv.Wifi_Error_Status = USB_VEN_REQ_CMD_FAIL; + #ifdef DBG_CONFIG_ERROR_DETECT + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + pHalData->srestpriv.Wifi_Error_Status = USB_VEN_REQ_CMD_FAIL; + } + #endif } - } else { /* status != len && status >= 0 */ - if (status > 0) { - if (requesttype == 0x01) { - /* For Control read transfer, we have to copy the read data from pIo_buf to pdata. */ - memcpy(pdata, pIo_buf, len); + } + else // status != len && status >= 0 + { + if(status > 0) { + if ( requesttype == 0x01 ) + { // For Control read transfer, we have to copy the read data from pIo_buf to pdata. + _rtw_memcpy( pdata, pIo_buf, len ); } } } - if (rtw_inc_and_chk_continual_urb_error(dvobjpriv)) { - adapt->bSurpriseRemoved = true; + if(rtw_inc_and_chk_continual_io_error(pdvobjpriv) == _TRUE ){ + padapter->bSurpriseRemoved = _TRUE; break; } - + } - - /* firmware download is checksumed, don't retry */ - if ((value >= FW_8188E_START_ADDRESS && value <= FW_8188E_END_ADDRESS) || status == len) + + // firmware download is checksumed, don't retry + if( (value >= FW_8188E_START_ADDRESS && value <= FW_8188E_END_ADDRESS) || status == len ) break; + } + + // release IO memory used by vendorreq + #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE + rtw_mfree(tmp_buf, tmp_buflen); + #endif + release_mutex: - _exit_critical_mutex(&dvobjpriv->usb_vendor_req_mutex, NULL); + #ifdef CONFIG_USB_VENDOR_REQ_MUTEX + _exit_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL); + #endif exit: return status; + } static u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr) @@ -123,42 +192,49 @@ static u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr) u16 wvalue; u16 index; u16 len; - u8 data = 0; - + u8 data=0; + _func_enter_; request = 0x05; - requesttype = 0x01;/* read_in */ - index = 0;/* n/a */ + requesttype = 0x01;//read_in + index = 0;//n/a wvalue = (u16)(addr&0x0000ffff); - len = 1; - + len = 1; + usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); - + _func_exit_; return data; - + } static u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr) -{ +{ u8 request; u8 requesttype; u16 wvalue; u16 index; u16 len; - __le32 data; + u16 data=0; + + _func_enter_; request = 0x05; - requesttype = 0x01;/* read_in */ - index = 0;/* n/a */ + requesttype = 0x01;//read_in + index = 0;//n/a + wvalue = (u16)(addr&0x0000ffff); - len = 2; + len = 2; + usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); - return (u16)(le32_to_cpu(data)&0xffff); + _func_exit_; + + return data; + } static u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr) @@ -168,18 +244,23 @@ static u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr) u16 wvalue; u16 index; u16 len; - __le32 data; + u32 data=0; + + _func_enter_; request = 0x05; - requesttype = 0x01;/* read_in */ - index = 0;/* n/a */ + requesttype = 0x01;//read_in + index = 0;//n/a wvalue = (u16)(addr&0x0000ffff); - len = 4; - + len = 4; + usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); - return le32_to_cpu(data); + _func_exit_; + + return data; + } static int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) @@ -191,45 +272,53 @@ static int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) u16 len; u8 data; int ret; - + _func_enter_; + request = 0x05; - requesttype = 0x00;/* write_out */ - index = 0;/* n/a */ + requesttype = 0x00;//write_out + index = 0;//n/a + wvalue = (u16)(addr&0x0000ffff); len = 1; - data = val; - ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); + + data = val; + + ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); + + _func_exit_; return ret; + } static int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) -{ +{ u8 request; u8 requesttype; u16 wvalue; u16 index; u16 len; - __le32 data; + u16 data; int ret; - + _func_enter_; request = 0x05; - requesttype = 0x00;/* write_out */ - index = 0;/* n/a */ + requesttype = 0x00;//write_out + index = 0;//n/a wvalue = (u16)(addr&0x0000ffff); len = 2; - - data = cpu_to_le32(val & 0x0000ffff); - - ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); - - + data = val; + + ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); + + _func_exit_; + return ret; + } static int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) @@ -239,24 +328,25 @@ static int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) u16 wvalue; u16 index; u16 len; - __le32 data; + u32 data; int ret; - + _func_enter_; request = 0x05; - requesttype = 0x00;/* write_out */ - index = 0;/* n/a */ + requesttype = 0x00;//write_out + index = 0;//n/a wvalue = (u16)(addr&0x0000ffff); len = 4; - data = cpu_to_le32(val); - - ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); + data =val; + ret =usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); + + _func_exit_; - return ret; + } static int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata) @@ -266,45 +356,827 @@ static int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata u16 wvalue; u16 index; u16 len; - u8 buf[VENDOR_CMD_MAX_DATA_LEN] = {0}; + u8 buf[VENDOR_CMD_MAX_DATA_LEN]={0}; int ret; - + _func_enter_; request = 0x05; - requesttype = 0x00;/* write_out */ - index = 0;/* n/a */ + requesttype = 0x00;//write_out + index = 0;//n/a wvalue = (u16)(addr&0x0000ffff); len = length; - memcpy(buf, pdata, len); - - ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, buf, len, requesttype); - + _rtw_memcpy(buf, pdata, len ); + ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, buf, len, requesttype); + + _func_exit_; + + return ret; + +} + +#ifdef CONFIG_SUPPORT_USB_INT +void interrupt_handler_8188eu(_adapter *padapter,u16 pkt_len,u8 *pbuf) +{ + HAL_DATA_TYPE *pHalData=GET_HAL_DATA(padapter); + struct reportpwrstate_parm pwr_rpt; + + if ( pkt_len != INTERRUPT_MSG_FORMAT_LEN ) + { + DBG_8192C("%s Invalid interrupt content length (%d)!\n", __FUNCTION__, pkt_len); + return ; + } + + // HISR + _rtw_memcpy(&(pHalData->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4); + _rtw_memcpy(&(pHalData->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4); + + #if 0 //DBG + { + u32 hisr=0 ,hisr_ex=0; + _rtw_memcpy(&hisr,&(pHalData->IntArray[0]),4); + hisr = le32_to_cpu(hisr); + + _rtw_memcpy(&hisr_ex,&(pHalData->IntArray[1]),4); + hisr_ex = le32_to_cpu(hisr_ex); + + if((hisr != 0) || (hisr_ex!=0)) + DBG_871X("===> %s hisr:0x%08x ,hisr_ex:0x%08x \n",__FUNCTION__,hisr,hisr_ex); + } + #endif + + +#ifdef CONFIG_LPS_LCLK + if( pHalData->IntArray[0] & IMR_CPWM_88E ) + { + _rtw_memcpy(&pwr_rpt.state, &(pbuf[USB_INTR_CONTENT_CPWM1_OFFSET]), 1); + //_rtw_memcpy(&pwr_rpt.state2, &(pbuf[USB_INTR_CONTENT_CPWM2_OFFSET]), 1); + + //88e's cpwm value only change BIT0, so driver need to add PS_STATE_S2 for LPS flow. + pwr_rpt.state |= PS_STATE_S2; + _set_workitem(&(adapter_to_pwrctl(padapter)->cpwm_event)); + } +#endif//CONFIG_LPS_LCLK + +#ifdef CONFIG_INTERRUPT_BASED_TXBCN + + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + if (pHalData->IntArray[0] & IMR_BCNDMAINT0_88E) + #endif + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + if (pHalData->IntArray[0] & (IMR_TBDER_88E|IMR_TBDOK_88E)) + #endif + { + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + #if 0 + if(pHalData->IntArray[0] & IMR_BCNDMAINT0_88E) + DBG_8192C("%s: HISR_BCNERLY_INT\n", __func__); + if(pHalData->IntArray[0] & IMR_TBDOK_88E) + DBG_8192C("%s: HISR_TXBCNOK\n", __func__); + if(pHalData->IntArray[0] & IMR_TBDER_88E) + DBG_8192C("%s: HISR_TXBCNERR\n", __func__); + #endif + + + if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) + { + //send_beacon(padapter); + if(pmlmepriv->update_bcn == _TRUE) + { + //tx_beacon_hdl(padapter, NULL); + set_tx_beacon_cmd(padapter); + } + } +#ifdef CONFIG_CONCURRENT_MODE + if(check_buddy_fwstate(padapter, WIFI_AP_STATE)) + { + //send_beacon(padapter); + if(padapter->pbuddy_adapter->mlmepriv.update_bcn == _TRUE) + { + //tx_beacon_hdl(padapter, NULL); + set_tx_beacon_cmd(padapter->pbuddy_adapter); + } + } +#endif + + } +#endif //CONFIG_INTERRUPT_BASED_TXBCN + + + + +#ifdef DBG_CONFIG_ERROR_DETECT_INT + if( pHalData->IntArray[1] & IMR_TXERR_88E ) + DBG_871X("===> %s Tx Error Flag Interrupt Status \n",__FUNCTION__); + if( pHalData->IntArray[1] & IMR_RXERR_88E ) + DBG_871X("===> %s Rx Error Flag INT Status \n",__FUNCTION__); + if( pHalData->IntArray[1] & IMR_TXFOVW_88E ) + DBG_871X("===> %s Transmit FIFO Overflow \n",__FUNCTION__); + if( pHalData->IntArray[1] & IMR_RXFOVW_88E ) + DBG_871X("===> %s Receive FIFO Overflow \n",__FUNCTION__); +#endif//DBG_CONFIG_ERROR_DETECT_INT + + + // C2H Event + if(pbuf[0]!= 0){ + _rtw_memcpy(&(pHalData->C2hArray[0]), &(pbuf[USB_INTR_CONTENT_C2H_OFFSET]), 16); + //rtw_c2h_wk_cmd(padapter); to do.. + } + +} +#endif + +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE +static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs) +{ + int err; + _adapter *padapter = (_adapter *)purb->context; + + if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel) + { + DBG_8192C("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n", + __FUNCTION__,padapter->bDriverStopped, padapter->bSurpriseRemoved,padapter->bReadPortCancel); + + return; + } + + if(purb->status==0)//SUCCESS + { + if (purb->actual_length > INTERRUPT_MSG_FORMAT_LEN) + { + DBG_8192C("usb_read_interrupt_complete: purb->actual_length > INTERRUPT_MSG_FORMAT_LEN(%d)\n",INTERRUPT_MSG_FORMAT_LEN); + } + + interrupt_handler_8188eu(padapter, purb->actual_length,purb->transfer_buffer ); + + err = usb_submit_urb(purb, GFP_ATOMIC); + if((err) && (err != (-EPERM))) + { + DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, purb->status); + } + } + else + { + DBG_8192C("###=> usb_read_interrupt_complete => urb status(%d)\n", purb->status); + + switch(purb->status) { + case -EINVAL: + case -EPIPE: + case -ENODEV: + case -ESHUTDOWN: + //padapter->bSurpriseRemoved=_TRUE; + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); + case -ENOENT: + padapter->bDriverStopped=_TRUE; + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); + break; + case -EPROTO: + break; + case -EINPROGRESS: + DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); + break; + default: + break; + } + } + +} + +static u32 usb_read_interrupt(struct intf_hdl *pintfhdl, u32 addr) +{ + int err; + unsigned int pipe; + u32 ret = _SUCCESS; + _adapter *adapter = pintfhdl->padapter; + struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); + struct recv_priv *precvpriv = &adapter->recvpriv; + struct usb_device *pusbd = pdvobj->pusbdev; + +_func_enter_; + + //translate DMA FIFO addr to pipehandle + pipe = ffaddr2pipehdl(pdvobj, addr); + + usb_fill_int_urb(precvpriv->int_in_urb, pusbd, pipe, + precvpriv->int_in_buf, + INTERRUPT_MSG_FORMAT_LEN, + usb_read_interrupt_complete, + adapter, + 1); + + err = usb_submit_urb(precvpriv->int_in_urb, GFP_ATOMIC); + if((err) && (err != (-EPERM))) + { + DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, precvpriv->int_in_urb->status); + ret = _FAIL; + } + +_func_exit_; return ret; } +#endif -static void interrupt_handler_8188eu(struct adapter *adapt, u16 pkt_len, u8 *pbuf) -{ - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); +static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxstat, struct phy_stat *pphy_status) +{ + s32 ret=_SUCCESS; +#ifdef CONFIG_CONCURRENT_MODE + u8 *primary_myid, *secondary_myid, *paddr1; + union recv_frame *precvframe_if2 = NULL; + _adapter *primary_padapter = precvframe->u.hdr.adapter; + _adapter *secondary_padapter = primary_padapter->pbuddy_adapter; + struct recv_priv *precvpriv = &primary_padapter->recvpriv; + _queue *pfree_recv_queue = &precvpriv->free_recv_queue; + u8 *pbuf = precvframe->u.hdr.rx_data; + + if(!secondary_padapter) + return ret; + + paddr1 = GetAddr1Ptr(precvframe->u.hdr.rx_data); + + if(IS_MCAST(paddr1) == _FALSE)//unicast packets + { + //primary_myid = myid(&primary_padapter->eeprompriv); + secondary_myid = myid(&secondary_padapter->eeprompriv); + + if(_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN)) + { + //change to secondary interface + precvframe->u.hdr.adapter = secondary_padapter; + } + + //ret = recv_entry(precvframe); - if (pkt_len != INTERRUPT_MSG_FORMAT_LEN) { - DBG_88E("%s Invalid interrupt content length (%d)!\n", __func__, pkt_len); - return; } + else // Handle BC/MC Packets + { + + u8 clone = _TRUE; +#if 0 + u8 type, subtype, *paddr2, *paddr3; + + type = GetFrameType(pbuf); + subtype = GetFrameSubType(pbuf); //bit(7)~bit(2) + + switch (type) + { + case WIFI_MGT_TYPE: //Handle BC/MC mgnt Packets + if(subtype == WIFI_BEACON) + { + paddr3 = GetAddr3Ptr(precvframe->u.hdr.rx_data); + + if (check_fwstate(&secondary_padapter->mlmepriv, _FW_LINKED) && + _rtw_memcmp(paddr3, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN)) + { + //change to secondary interface + precvframe->u.hdr.adapter = secondary_padapter; + clone = _FALSE; + } - /* HISR */ - memcpy(&(haldata->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4); - memcpy(&(haldata->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4); + if(check_fwstate(&primary_padapter->mlmepriv, _FW_LINKED) && + _rtw_memcmp(paddr3, get_bssid(&primary_padapter->mlmepriv), ETH_ALEN)) + { + if(clone==_FALSE) + { + clone = _TRUE; + } + else + { + clone = _FALSE; + } + + precvframe->u.hdr.adapter = primary_padapter; + } + + if(check_fwstate(&primary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) || + check_fwstate(&secondary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING)) + { + clone = _TRUE; + precvframe->u.hdr.adapter = primary_padapter; + } + + } + else if(subtype == WIFI_PROBEREQ) + { + //probe req frame is only for interface2 + //change to secondary interface + precvframe->u.hdr.adapter = secondary_padapter; + clone = _FALSE; + } + break; + case WIFI_CTRL_TYPE: // Handle BC/MC ctrl Packets + + break; + case WIFI_DATA_TYPE: //Handle BC/MC data Packets + //Notes: AP MODE never rx BC/MC data packets + + paddr2 = GetAddr2Ptr(precvframe->u.hdr.rx_data); + + if(_rtw_memcmp(paddr2, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN)) + { + //change to secondary interface + precvframe->u.hdr.adapter = secondary_padapter; + clone = _FALSE; + } + + break; + default: + + break; + } +#endif + + if(_TRUE == clone) + { + //clone/copy to if2 + u8 shift_sz = 0; + u32 alloc_sz, skb_len; + _pkt *pkt_copy = NULL; + struct rx_pkt_attrib *pattrib = NULL; + + precvframe_if2 = rtw_alloc_recvframe(pfree_recv_queue); + if(precvframe_if2) + { + precvframe_if2->u.hdr.adapter = secondary_padapter; + + _rtw_init_listhead(&precvframe_if2->u.hdr.list); + precvframe_if2->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. + precvframe_if2->u.hdr.len=0; + + _rtw_memcpy(&precvframe_if2->u.hdr.attrib, &precvframe->u.hdr.attrib, sizeof(struct rx_pkt_attrib)); + + pattrib = &precvframe_if2->u.hdr.attrib; + + // Modified by Albert 20101213 + // For 8 bytes IP header alignment. + if (pattrib->qos) // Qos data, wireless lan header length is 26 + { + shift_sz = 6; + } + else + { + shift_sz = 0; + } + + skb_len = pattrib->pkt_len; + + // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. + // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 + if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ + //alloc_sz = 1664; //1664 is 128 alignment. + if(skb_len <= 1650) + alloc_sz = 1664; + else + alloc_sz = skb_len + 14; + } + else { + alloc_sz = skb_len; + // 6 is for IP header 8 bytes alignment in QoS packet case. + // 8 is for skb->data 4 bytes alignment. + alloc_sz += 14; + } + + pkt_copy = rtw_skb_alloc(alloc_sz); + + if(pkt_copy) + { + pkt_copy->dev = secondary_padapter->pnetdev; + precvframe_if2->u.hdr.pkt = pkt_copy; + precvframe_if2->u.hdr.rx_head = pkt_copy->data; + precvframe_if2->u.hdr.rx_end = pkt_copy->data + alloc_sz; + skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address + skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. + _rtw_memcpy(pkt_copy->data, pbuf, skb_len); + precvframe_if2->u.hdr.rx_data = precvframe_if2->u.hdr.rx_tail = pkt_copy->data; + + + recvframe_put(precvframe_if2, skb_len); + if (pattrib->physt) + update_recvframe_phyinfo_88e(precvframe_if2, (struct phy_stat*)pphy_status); + ret = rtw_recv_entry(precvframe_if2); + + } + else { + rtw_free_recvframe(precvframe_if2, pfree_recv_queue); + DBG_8192C("%s()-%d: alloc_skb() failed!\n", __FUNCTION__, __LINE__); + } + + } + + } + + } + if (precvframe->u.hdr.attrib.physt) + update_recvframe_phyinfo_88e(precvframe, (struct phy_stat*)pphy_status); + ret = rtw_recv_entry(precvframe); + +#endif + + return ret; - /* C2H Event */ - if (pbuf[0] != 0) - memcpy(&(haldata->C2hArray[0]), &(pbuf[USB_INTR_CONTENT_C2H_OFFSET]), 16); } -static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb) +#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX +static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf) +{ + u8 *pbuf; + u8 shift_sz = 0; + u16 pkt_cnt, drvinfo_sz; + u32 pkt_offset, skb_len, alloc_sz; + s32 transfer_len; + struct recv_stat *prxstat; + struct phy_stat *pphy_status = NULL; + _pkt *pkt_copy = NULL; + union recv_frame *precvframe = NULL; + struct rx_pkt_attrib *pattrib = NULL; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct recv_priv *precvpriv = &padapter->recvpriv; + _queue *pfree_recv_queue = &precvpriv->free_recv_queue; + + + transfer_len = (s32)precvbuf->transfer_len; + pbuf = precvbuf->pbuf; + + prxstat = (struct recv_stat *)pbuf; + pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; + +#if 0 //temp remove when disable usb rx aggregation + if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_lenrxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4)); + + prxstat = (struct recv_stat *)pbuf; + + precvframe = rtw_alloc_recvframe(pfree_recv_queue); + if(precvframe==NULL) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n")); + DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__); + goto _exit_recvbuf2recvframe; + } + + _rtw_init_listhead(&precvframe->u.hdr.list); + precvframe->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. + precvframe->u.hdr.len=0; + + //rtl8192c_query_rx_desc_status(precvframe, prxstat); + update_recvframe_attrib_88e(precvframe, prxstat); + + pattrib = &precvframe->u.hdr.attrib; + + if ((padapter->registrypriv.mp_mode == 0) &&((pattrib->crc_err) || (pattrib->icv_err))) + { + DBG_8192C("%s: RX Warning! crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); + + rtw_free_recvframe(precvframe, pfree_recv_queue); + goto _exit_recvbuf2recvframe; + } + + + if( (pattrib->physt) && (pattrib->pkt_rpt_type == NORMAL_RX)) + { + pphy_status = (struct phy_stat *)(pbuf + RXDESC_OFFSET); + } + + pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len; + + if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len)) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n")); + DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__); + rtw_free_recvframe(precvframe, pfree_recv_queue); + goto _exit_recvbuf2recvframe; + } + + // Modified by Albert 20101213 + // For 8 bytes IP header alignment. + if (pattrib->qos) // Qos data, wireless lan header length is 26 + { + shift_sz = 6; + } + else + { + shift_sz = 0; + } + + skb_len = pattrib->pkt_len; + + // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. + // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 + if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ + //alloc_sz = 1664; //1664 is 128 alignment. + if(skb_len <= 1650) + alloc_sz = 1664; + else + alloc_sz = skb_len + 14; + } + else { + alloc_sz = skb_len; + // 6 is for IP header 8 bytes alignment in QoS packet case. + // 8 is for skb->data 4 bytes alignment. + alloc_sz += 14; + } + + pkt_copy = rtw_skb_alloc(alloc_sz); + + if(pkt_copy) + { + pkt_copy->dev = padapter->pnetdev; + precvframe->u.hdr.pkt = pkt_copy; + precvframe->u.hdr.rx_head = pkt_copy->data; + precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz; + skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address + skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. + _rtw_memcpy(pkt_copy->data, (pbuf + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len); + precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; + } + else + { + DBG_8192C("recvbuf2recvframe:can not allocate memory for skb copy\n"); + //precvframe->u.hdr.pkt = rtw_skb_clone(pskb); + //precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pbuf; + //precvframe->u.hdr.rx_end = pbuf + (pkt_offset>1612?pkt_offset:1612); + + precvframe->u.hdr.pkt = NULL; + rtw_free_recvframe(precvframe, pfree_recv_queue); + + goto _exit_recvbuf2recvframe; + } + + recvframe_put(precvframe, skb_len); + //recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); + +#ifdef CONFIG_USB_RX_AGGREGATION + switch(pHalData->UsbRxAggMode) + { + case USB_RX_AGG_DMA: + case USB_RX_AGG_MIX: + pkt_offset = (u16)_RND128(pkt_offset); + break; + case USB_RX_AGG_USB: + pkt_offset = (u16)_RND4(pkt_offset); + break; + case USB_RX_AGG_DISABLE: + default: + break; + } +#endif + + if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet + { +#ifdef CONFIG_CONCURRENT_MODE + if(rtw_buddy_adapter_up(padapter)) + { + if(pre_recv_entry(precvframe, prxstat, pphy_status) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, + ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); + } + } + else +#endif + { + if (pattrib->physt) + update_recvframe_phyinfo_88e(precvframe, (struct phy_stat*)pphy_status); + if(rtw_recv_entry(precvframe) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, + ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); + } + } + + } + else{ // pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP + + //enqueue recvframe to txrtp queue + if(pattrib->pkt_rpt_type == TX_REPORT1){ + //DBG_8192C("rx CCX \n"); + //CCX-TXRPT ack for xmit mgmt frames. + handle_txrpt_ccx_88e(padapter, precvframe->u.hdr.rx_data); + + } + else if(pattrib->pkt_rpt_type == TX_REPORT2){ + //DBG_8192C("rx TX RPT \n"); + ODM_RA_TxRPT2Handle_8188E( + &pHalData->odmpriv, + precvframe->u.hdr.rx_data, + pattrib->pkt_len, + pattrib->MacIDValidEntry[0], + pattrib->MacIDValidEntry[1] + ); + + } + else if(pattrib->pkt_rpt_type == HIS_REPORT) + { + //DBG_8192C("%s , rx USB HISR \n",__FUNCTION__); + #ifdef CONFIG_SUPPORT_USB_INT + interrupt_handler_8188eu(padapter,pattrib->pkt_len,precvframe->u.hdr.rx_data); + #endif + } + rtw_free_recvframe(precvframe, pfree_recv_queue); + + } + + pkt_cnt--; + transfer_len -= pkt_offset; + pbuf += pkt_offset; + precvframe = NULL; + pkt_copy = NULL; + + if(transfer_len>0 && pkt_cnt==0) + pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; + + }while((transfer_len>0) && (pkt_cnt>0)); + +_exit_recvbuf2recvframe: + + return _SUCCESS; +} + +void rtl8188eu_recv_tasklet(void *priv) +{ + struct recv_buf *precvbuf = NULL; + _adapter *padapter = (_adapter*)priv; + struct recv_priv *precvpriv = &padapter->recvpriv; + + while (NULL != (precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue))) + { + if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) + { + DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n"); + + break; + } + + + recvbuf2recvframe(padapter, precvbuf); + + rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + } + +} + +static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) +{ + struct recv_buf *precvbuf = (struct recv_buf *)purb->context; + _adapter *padapter =(_adapter *)precvbuf->adapter; + struct recv_priv *precvpriv = &padapter->recvpriv; + + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n")); + + precvpriv->rx_pending_cnt --; + + if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved)); + DBG_8192C("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n", + __FUNCTION__,padapter->bDriverStopped, padapter->bSurpriseRemoved,padapter->bReadPortCancel); + goto exit; + } + + if(purb->status==0)//SUCCESS + { + if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n")); + + rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + } + else + { + rtw_reset_continual_io_error(adapter_to_dvobj(padapter)); + + precvbuf->transfer_len = purb->actual_length; + + //rtw_enqueue_rx_transfer_buffer(precvpriv, rx_transfer_buf); + rtw_enqueue_recvbuf(precvbuf, &precvpriv->recv_buf_pending_queue); + + tasklet_schedule(&precvpriv->recv_tasklet); + } + } + else + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status)); + + DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status); + + if(rtw_inc_and_chk_continual_io_error(adapter_to_dvobj(padapter)) == _TRUE ){ + padapter->bSurpriseRemoved = _TRUE; + } + + switch(purb->status) { + case -EINVAL: + case -EPIPE: + case -ENODEV: + case -ESHUTDOWN: + //padapter->bSurpriseRemoved=_TRUE; + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); + case -ENOENT: + padapter->bDriverStopped=_TRUE; + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); + break; + case -EPROTO: + case -EILSEQ: + case -ETIME: + case -ECOMM: + case -EOVERFLOW: + #ifdef DBG_CONFIG_ERROR_DETECT + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL; + } + #endif + rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + break; + case -EINPROGRESS: + DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); + break; + default: + break; + } + + } + +exit: + +_func_exit_; + +} + +static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) +{ + int err; + unsigned int pipe; + u32 ret = _SUCCESS; + PURB purb = NULL; + struct recv_buf *precvbuf = (struct recv_buf *)rmem; + _adapter *adapter = pintfhdl->padapter; + struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); + struct recv_priv *precvpriv = &adapter->recvpriv; + struct usb_device *pusbd = pdvobj->pusbdev; + +_func_enter_; + + if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||dvobj_to_pwrctl(pdvobj)->pnp_bstop_trx) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||pwrctl->pnp_bstop_trx)!!!\n")); + return _FAIL; + } + + if(precvbuf !=NULL) + { + rtl8188eu_init_recvbuf(adapter, precvbuf); + + if(precvbuf->pbuf) + { + precvpriv->rx_pending_cnt++; + + purb = precvbuf->purb; + + //translate DMA FIFO addr to pipehandle + pipe = ffaddr2pipehdl(pdvobj, addr); + + usb_fill_bulk_urb(purb, pusbd, pipe, + precvbuf->pbuf, + MAX_RECVBUF_SZ, + usb_read_port_complete, + precvbuf);//context is precvbuf + + purb->transfer_dma = precvbuf->dma_transfer_addr; + purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; + + err = usb_submit_urb(purb, GFP_ATOMIC); + if((err) && (err != (-EPERM))) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status)); + DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status); + ret = _FAIL; + } + + } + + } + else + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n")); + ret = _FAIL; + } + +_func_exit_; + + return ret; +} +#else // CONFIG_USE_USB_BUFFER_ALLOC_RX +static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb) { u8 *pbuf; u8 shift_sz = 0; @@ -313,20 +1185,27 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb) s32 transfer_len; struct recv_stat *prxstat; struct phy_stat *pphy_status = NULL; - struct sk_buff *pkt_copy = NULL; + _pkt *pkt_copy = NULL; union recv_frame *precvframe = NULL; struct rx_pkt_attrib *pattrib = NULL; - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - struct recv_priv *precvpriv = &adapt->recvpriv; - struct __queue *pfree_recv_queue = &precvpriv->free_recv_queue; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct recv_priv *precvpriv = &padapter->recvpriv; + _queue *pfree_recv_queue = &precvpriv->free_recv_queue; - transfer_len = (s32)pskb->len; + + transfer_len = (s32)pskb->len; pbuf = pskb->data; - prxstat = (struct recv_stat *)pbuf; - pkt_cnt = (le32_to_cpu(prxstat->rxdw2) >> 16) & 0xff; + prxstat = (struct recv_stat *)pbuf; + pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; - do { +#if 0 //temp remove when disable usb rx aggregation + if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_lenrxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4)); @@ -334,383 +1213,525 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb) prxstat = (struct recv_stat *)pbuf; precvframe = rtw_alloc_recvframe(pfree_recv_queue); - if (precvframe == NULL) { - RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("recvbuf2recvframe: precvframe==NULL\n")); - DBG_88E("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __func__, __LINE__); + if(precvframe==NULL) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n")); + DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__); goto _exit_recvbuf2recvframe; } - _rtw_init_listhead(&precvframe->u.hdr.list); - precvframe->u.hdr.precvbuf = NULL; /* can't access the precvbuf for new arch. */ - precvframe->u.hdr.len = 0; + _rtw_init_listhead(&precvframe->u.hdr.list); + precvframe->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. + precvframe->u.hdr.len=0; + //rtl8192c_query_rx_desc_status(precvframe, prxstat); update_recvframe_attrib_88e(precvframe, prxstat); - pattrib = &precvframe->u.hdr.attrib; - - if ((pattrib->crc_err) || (pattrib->icv_err)) { - DBG_88E("%s: RX Warning! crc_err=%d icv_err=%d, skip!\n", __func__, pattrib->crc_err, pattrib->icv_err); + pattrib = &precvframe->u.hdr.attrib; + + if ((padapter->registrypriv.mp_mode == 0) &&((pattrib->crc_err) || (pattrib->icv_err))) + { + DBG_8192C("%s: RX Warning! crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); rtw_free_recvframe(precvframe, pfree_recv_queue); goto _exit_recvbuf2recvframe; } - if ((pattrib->physt) && (pattrib->pkt_rpt_type == NORMAL_RX)) + if( (pattrib->physt) && (pattrib->pkt_rpt_type == NORMAL_RX)) + { pphy_status = (struct phy_stat *)(pbuf + RXDESC_OFFSET); + } pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len; - if ((pattrib->pkt_len <= 0) || (pkt_offset > transfer_len)) { - RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("recvbuf2recvframe: pkt_len<=0\n")); - DBG_88E("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfoer_len\n", __func__, __LINE__); + if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len)) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n")); + DBG_8192C("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfoer_len \n", __FUNCTION__, __LINE__); rtw_free_recvframe(precvframe, pfree_recv_queue); goto _exit_recvbuf2recvframe; } - - /* Modified by Albert 20101213 */ - /* For 8 bytes IP header alignment. */ - if (pattrib->qos) /* Qos data, wireless lan header length is 26 */ + + // Modified by Albert 20101213 + // For 8 bytes IP header alignment. + if (pattrib->qos) // Qos data, wireless lan header length is 26 + { shift_sz = 6; + } else + { shift_sz = 0; + } skb_len = pattrib->pkt_len; - /* for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. */ - /* modify alloc_sz for recvive crc error packet by thomas 2011-06-02 */ - if ((pattrib->mfrag == 1) && (pattrib->frag_num == 0)) { - if (skb_len <= 1650) + // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. + // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 + if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ + //alloc_sz = 1664; //1664 is 128 alignment. + if(skb_len <= 1650) alloc_sz = 1664; else alloc_sz = skb_len + 14; - } else { + } + else { alloc_sz = skb_len; - /* 6 is for IP header 8 bytes alignment in QoS packet case. */ - /* 8 is for skb->data 4 bytes alignment. */ + // 6 is for IP header 8 bytes alignment in QoS packet case. + // 8 is for skb->data 4 bytes alignment. alloc_sz += 14; } - pkt_copy = netdev_alloc_skb(adapt->pnetdev, alloc_sz); - if (pkt_copy) { - pkt_copy->dev = adapt->pnetdev; + pkt_copy = rtw_skb_alloc(alloc_sz); + + if(pkt_copy) + { + pkt_copy->dev = padapter->pnetdev; precvframe->u.hdr.pkt = pkt_copy; precvframe->u.hdr.rx_head = pkt_copy->data; precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz; - skb_reserve(pkt_copy, 8 - ((size_t)(pkt_copy->data) & 7));/* force pkt_copy->data at 8-byte alignment address */ - skb_reserve(pkt_copy, shift_sz);/* force ip_hdr at 8-byte alignment address according to shift_sz. */ - memcpy(pkt_copy->data, (pbuf + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len); - precvframe->u.hdr.rx_tail = pkt_copy->data; - precvframe->u.hdr.rx_data = pkt_copy->data; - } else { - if ((pattrib->mfrag == 1) && (pattrib->frag_num == 0)) { - DBG_88E("recvbuf2recvframe: alloc_skb fail , drop frag frame\n"); + skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address + skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. + _rtw_memcpy(pkt_copy->data, (pbuf + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len); + precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; + } + else + { + if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)) + { + DBG_8192C("recvbuf2recvframe: alloc_skb fail , drop frag frame \n"); rtw_free_recvframe(precvframe, pfree_recv_queue); goto _exit_recvbuf2recvframe; } - precvframe->u.hdr.pkt = skb_clone(pskb, GFP_ATOMIC); - if (precvframe->u.hdr.pkt) { - precvframe->u.hdr.rx_tail = pbuf + pattrib->drvinfo_sz + RXDESC_SIZE; - precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_tail; - precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail; - precvframe->u.hdr.rx_end = pbuf + pattrib->drvinfo_sz + RXDESC_SIZE + alloc_sz; - } else { - DBG_88E("recvbuf2recvframe: skb_clone fail\n"); + + precvframe->u.hdr.pkt = rtw_skb_clone(pskb); + if(precvframe->u.hdr.pkt) + { + precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail + = pbuf+ pattrib->drvinfo_sz + RXDESC_SIZE; + precvframe->u.hdr.rx_end = pbuf +pattrib->drvinfo_sz + RXDESC_SIZE+ alloc_sz; + } + else + { + DBG_8192C("recvbuf2recvframe: rtw_skb_clone fail\n"); rtw_free_recvframe(precvframe, pfree_recv_queue); goto _exit_recvbuf2recvframe; } + } recvframe_put(precvframe, skb_len); + //recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); - switch (haldata->UsbRxAggMode) { - case USB_RX_AGG_DMA: - case USB_RX_AGG_MIX: - pkt_offset = (u16)_RND128(pkt_offset); - break; - case USB_RX_AGG_USB: - pkt_offset = (u16)_RND4(pkt_offset); - break; - case USB_RX_AGG_DISABLE: - default: - break; +#ifdef CONFIG_USB_RX_AGGREGATION + switch(pHalData->UsbRxAggMode) + { + case USB_RX_AGG_DMA: + case USB_RX_AGG_MIX: + pkt_offset = (u16)_RND128(pkt_offset); + break; + case USB_RX_AGG_USB: + pkt_offset = (u16)_RND4(pkt_offset); + break; + case USB_RX_AGG_DISABLE: + default: + break; } - if (pattrib->pkt_rpt_type == NORMAL_RX) { /* Normal rx packet */ - if (pattrib->physt) - update_recvframe_phyinfo_88e(precvframe, (struct phy_stat *)pphy_status); - if (rtw_recv_entry(precvframe) != _SUCCESS) { - RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, - ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); +#endif + + if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet + { +#ifdef CONFIG_CONCURRENT_MODE + if(rtw_buddy_adapter_up(padapter)) + { + if(pre_recv_entry(precvframe, prxstat, pphy_status) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, + ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); + } } - } else { - /* enqueue recvframe to txrtp queue */ - if (pattrib->pkt_rpt_type == TX_REPORT1) { - /* CCX-TXRPT ack for xmit mgmt frames. */ - handle_txrpt_ccx_88e(adapt, precvframe->u.hdr.rx_data); - } else if (pattrib->pkt_rpt_type == TX_REPORT2) { + else +#endif + { + if (pattrib->physt) + update_recvframe_phyinfo_88e(precvframe, (struct phy_stat*)pphy_status); + if(rtw_recv_entry(precvframe) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, + ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); + } + } + } + else{ // pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP + + //enqueue recvframe to txrtp queue + if(pattrib->pkt_rpt_type == TX_REPORT1){ + //DBG_8192C("rx CCX \n"); + //CCX-TXRPT ack for xmit mgmt frames. + handle_txrpt_ccx_88e(padapter, precvframe->u.hdr.rx_data); + } + else if(pattrib->pkt_rpt_type == TX_REPORT2){ + //DBG_8192C("rx TX RPT \n"); ODM_RA_TxRPT2Handle_8188E( - &haldata->odmpriv, + &pHalData->odmpriv, precvframe->u.hdr.rx_data, pattrib->pkt_len, pattrib->MacIDValidEntry[0], pattrib->MacIDValidEntry[1] ); - } else if (pattrib->pkt_rpt_type == HIS_REPORT) { - interrupt_handler_8188eu(adapt, pattrib->pkt_len, precvframe->u.hdr.rx_data); + } - rtw_free_recvframe(precvframe, pfree_recv_queue); + else if(pattrib->pkt_rpt_type == HIS_REPORT) + { + //DBG_8192C("%s , rx USB HISR \n",__FUNCTION__); + #ifdef CONFIG_SUPPORT_USB_INT + interrupt_handler_8188eu(padapter,pattrib->pkt_len,precvframe->u.hdr.rx_data); + #endif + } + rtw_free_recvframe(precvframe, pfree_recv_queue); + } + pkt_cnt--; transfer_len -= pkt_offset; - pbuf += pkt_offset; + pbuf += pkt_offset; precvframe = NULL; pkt_copy = NULL; - if (transfer_len > 0 && pkt_cnt == 0) + if(transfer_len>0 && pkt_cnt==0) pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; - } while ((transfer_len > 0) && (pkt_cnt > 0)); + }while((transfer_len>0) && (pkt_cnt>0)); _exit_recvbuf2recvframe: - return _SUCCESS; + return _SUCCESS; } void rtl8188eu_recv_tasklet(void *priv) { - struct sk_buff *pskb; - struct adapter *adapt = (struct adapter *)priv; - struct recv_priv *precvpriv = &adapt->recvpriv; - - while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue))) { - if ((adapt->bDriverStopped) || (adapt->bSurpriseRemoved)) { - DBG_88E("recv_tasklet => bDriverStopped or bSurpriseRemoved\n"); - dev_kfree_skb_any(pskb); + _pkt *pskb; + _adapter *padapter = (_adapter*)priv; + struct recv_priv *precvpriv = &padapter->recvpriv; + + while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue))) + { + if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) + { + DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n"); + rtw_skb_free(pskb); break; } - recvbuf2recvframe(adapt, pskb); + + recvbuf2recvframe(padapter, pskb); + +#ifdef CONFIG_PREALLOC_RECV_SKB + skb_reset_tail_pointer(pskb); + pskb->len = 0; + skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb); + +#else + rtw_skb_free(pskb); +#endif + } + } + static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) { - struct recv_buf *precvbuf = (struct recv_buf *)purb->context; - struct adapter *adapt = (struct adapter *)precvbuf->adapter; - struct recv_priv *precvpriv = &adapt->recvpriv; + _irqL irqL; + uint isevt, *pbuf; + struct recv_buf *precvbuf = (struct recv_buf *)purb->context; + _adapter *padapter =(_adapter *)precvbuf->adapter; + struct recv_priv *precvpriv = &padapter->recvpriv; + + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n")); + + //_enter_critical(&precvpriv->lock, &irqL); + //precvbuf->irp_pending=_FALSE; + //precvpriv->rx_pending_cnt --; + //_exit_critical(&precvpriv->lock, &irqL); + + precvpriv->rx_pending_cnt --; + + //if(precvpriv->rx_pending_cnt== 0) + //{ + // RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: rx_pending_cnt== 0, set allrxreturnevt!\n")); + // _rtw_up_sema(&precvpriv->allrxreturnevt); + //} - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete!!!\n")); - - precvpriv->rx_pending_cnt--; - - if (adapt->bSurpriseRemoved || adapt->bDriverStopped || adapt->bReadPortCancel) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", - adapt->bDriverStopped, adapt->bSurpriseRemoved)); - - precvbuf->reuse = true; - DBG_88E("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n", - __func__, adapt->bDriverStopped, - adapt->bSurpriseRemoved, adapt->bReadPortCancel); - return; + if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved)); + + #ifdef CONFIG_PREALLOC_RECV_SKB + precvbuf->reuse = _TRUE; + #else + if(precvbuf->pskb){ + DBG_8192C("==> free skb(%p)\n",precvbuf->pskb); + rtw_skb_free(precvbuf->pskb); + } + #endif + DBG_8192C("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n", + __FUNCTION__,padapter->bDriverStopped, padapter->bSurpriseRemoved,padapter->bReadPortCancel); + goto exit; } - if (purb->status == 0) { /* SUCCESS */ - if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n")); - precvbuf->reuse = true; - rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); - DBG_88E("%s()-%d: RX Warning!\n", __func__, __LINE__); - } else { - rtw_reset_continual_urb_error(adapter_to_dvobj(adapt)); - - precvbuf->transfer_len = purb->actual_length; - skb_put(precvbuf->pskb, purb->actual_length); + if(purb->status==0)//SUCCESS + { + if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n")); + precvbuf->reuse = _TRUE; + rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__); + } + else + { + rtw_reset_continual_io_error(adapter_to_dvobj(padapter)); + + precvbuf->transfer_len = purb->actual_length; + skb_put(precvbuf->pskb, purb->actual_length); skb_queue_tail(&precvpriv->rx_skb_queue, precvbuf->pskb); - if (skb_queue_len(&precvpriv->rx_skb_queue) <= 1) + if (skb_queue_len(&precvpriv->rx_skb_queue)<=1) tasklet_schedule(&precvpriv->recv_tasklet); precvbuf->pskb = NULL; - precvbuf->reuse = false; - rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); - } - } else { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete : purb->status(%d) != 0\n", purb->status)); - - DBG_88E("###=> usb_read_port_complete => urb status(%d)\n", purb->status); - skb_put(precvbuf->pskb, purb->actual_length); - precvbuf->pskb = NULL; - - if (rtw_inc_and_chk_continual_urb_error(adapter_to_dvobj(adapt))) - adapt->bSurpriseRemoved = true; - - switch (purb->status) { - case -EINVAL: - case -EPIPE: - case -ENODEV: - case -ESHUTDOWN: - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete:bSurpriseRemoved=true\n")); - case -ENOENT: - adapt->bDriverStopped = true; - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete:bDriverStopped=true\n")); - break; - case -EPROTO: - case -EOVERFLOW: - { - struct hal_data_8188e *haldata = GET_HAL_DATA(adapt); - haldata->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL; - } - precvbuf->reuse = true; - rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); - break; - case -EINPROGRESS: - DBG_88E("ERROR: URB IS IN PROGRESS!/n"); - break; - default: - break; - } + precvbuf->reuse = _FALSE; + rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + } } + else + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status)); + + DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status); + + if(rtw_inc_and_chk_continual_io_error(adapter_to_dvobj(padapter)) == _TRUE ){ + padapter->bSurpriseRemoved = _TRUE; + } + + switch(purb->status) { + case -EINVAL: + case -EPIPE: + case -ENODEV: + case -ESHUTDOWN: + //padapter->bSurpriseRemoved=_TRUE; + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); + case -ENOENT: + padapter->bDriverStopped=_TRUE; + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); + break; + case -EPROTO: + case -EILSEQ: + case -ETIME: + case -ECOMM: + case -EOVERFLOW: + #ifdef DBG_CONFIG_ERROR_DETECT + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL; + } + #endif + precvbuf->reuse = _TRUE; + rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + break; + case -EINPROGRESS: + DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); + break; + default: + break; + } + + } + +exit: + +_func_exit_; + } static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) -{ - struct urb *purb = NULL; +{ + _irqL irqL; + int err; + unsigned int pipe; + SIZE_PTR tmpaddr=0; + SIZE_PTR alignment=0; + u32 ret = _SUCCESS; + PURB purb = NULL; struct recv_buf *precvbuf = (struct recv_buf *)rmem; - struct adapter *adapter = pintfhdl->padapter; + _adapter *adapter = pintfhdl->padapter; struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); struct recv_priv *precvpriv = &adapter->recvpriv; struct usb_device *pusbd = pdvobj->pusbdev; - int err; - unsigned int pipe; - size_t tmpaddr = 0; - size_t alignment = 0; - u32 ret = _SUCCESS; + - if (adapter->bDriverStopped || adapter->bSurpriseRemoved || - adapter->pwrctrlpriv.pnp_bstop_trx) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port:(adapt->bDriverStopped ||adapt->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); +_func_enter_; + + if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||dvobj_to_pwrctl(pdvobj)->pnp_bstop_trx) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||pwrctl->pnp_bstop_trx)!!!\n")); return _FAIL; } - if (!precvbuf) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("usb_read_port:precvbuf==NULL\n")); - return _FAIL; +#ifdef CONFIG_PREALLOC_RECV_SKB + if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL)) + { + if (NULL != (precvbuf->pskb = skb_dequeue(&precvpriv->free_recv_skb_queue))) + { + precvbuf->reuse = _TRUE; + } } +#endif + - if ((!precvbuf->reuse) || (precvbuf->pskb == NULL)) { - precvbuf->pskb = skb_dequeue(&precvpriv->free_recv_skb_queue); - if (NULL != precvbuf->pskb) - precvbuf->reuse = true; - } + if(precvbuf !=NULL) + { + rtl8188eu_init_recvbuf(adapter, precvbuf); - rtl8188eu_init_recvbuf(adapter, precvbuf); + //re-assign for linux based on skb + if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL)) + { + precvbuf->pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); - /* re-assign for linux based on skb */ - if ((!precvbuf->reuse) || (precvbuf->pskb == NULL)) { - precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); - if (precvbuf->pskb == NULL) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("init_recvbuf(): alloc_skb fail!\n")); - DBG_88E("#### usb_read_port() alloc_skb fail!#####\n"); + if(precvbuf->pskb == NULL) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("init_recvbuf(): alloc_skb fail!\n")); + DBG_8192C("#### usb_read_port() alloc_skb fail!#####\n"); return _FAIL; - } + } - tmpaddr = (size_t)precvbuf->pskb->data; - alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); + tmpaddr = (SIZE_PTR)precvbuf->pskb->data; + alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment)); precvbuf->phead = precvbuf->pskb->head; - precvbuf->pdata = precvbuf->pskb->data; + precvbuf->pdata = precvbuf->pskb->data; precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); precvbuf->pend = skb_end_pointer(precvbuf->pskb); precvbuf->pbuf = precvbuf->pskb->data; - } else { /* reuse skb */ + } + else//reuse skb + { precvbuf->phead = precvbuf->pskb->head; precvbuf->pdata = precvbuf->pskb->data; precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); precvbuf->pend = skb_end_pointer(precvbuf->pskb); - precvbuf->pbuf = precvbuf->pskb->data; + precvbuf->pbuf = precvbuf->pskb->data; - precvbuf->reuse = false; + precvbuf->reuse = _FALSE; } + //_enter_critical(&precvpriv->lock, &irqL); + //precvpriv->rx_pending_cnt++; + //precvbuf->irp_pending = _TRUE; + //_exit_critical(&precvpriv->lock, &irqL); + precvpriv->rx_pending_cnt++; purb = precvbuf->purb; - /* translate DMA FIFO addr to pipehandle */ + //translate DMA FIFO addr to pipehandle pipe = ffaddr2pipehdl(pdvobj, addr); - usb_fill_bulk_urb(purb, pusbd, pipe, - precvbuf->pbuf, - MAX_RECVBUF_SZ, - usb_read_port_complete, - precvbuf);/* context is precvbuf */ + usb_fill_bulk_urb(purb, pusbd, pipe, + precvbuf->pbuf, + MAX_RECVBUF_SZ, + usb_read_port_complete, + precvbuf);//context is precvbuf err = usb_submit_urb(purb, GFP_ATOMIC); - if ((err) && (err != (-EPERM))) { - RT_TRACE(_module_hci_ops_os_c_, _drv_err_, - ("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", - err, purb->status)); - DBG_88E("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n", - err, purb->status); + if((err) && (err != (-EPERM))) + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status)); + DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status); ret = _FAIL; } + } + else + { + RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n")); + ret = _FAIL; + } + +_func_exit_; return ret; } +#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX void rtl8188eu_xmit_tasklet(void *priv) -{ - int ret = false; - struct adapter *adapt = (struct adapter *)priv; - struct xmit_priv *pxmitpriv = &adapt->xmitpriv; +{ + int ret = _FALSE; + _adapter *padapter = (_adapter*)priv; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - if (check_fwstate(&adapt->mlmepriv, _FW_UNDER_SURVEY)) + if(check_fwstate(&padapter->mlmepriv, _FW_UNDER_SURVEY) == _TRUE) return; - while (1) { - if ((adapt->bDriverStopped) || - (adapt->bSurpriseRemoved) || - (adapt->bWritePortCancel)) { - DBG_88E("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n"); + while(1) + { + if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE) || (padapter->bWritePortCancel == _TRUE)) + { + DBG_8192C("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n"); break; } - ret = rtl8188eu_xmitframe_complete(adapt, pxmitpriv, NULL); + ret = rtl8188eu_xmitframe_complete(padapter, pxmitpriv, NULL); - if (!ret) + if(ret==_FALSE) break; + } + } void rtl8188eu_set_intf_ops(struct _io_ops *pops) -{ - - _rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops)); +{ + _func_enter_; + + _rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops)); + pops->_read8 = &usb_read8; pops->_read16 = &usb_read16; pops->_read32 = &usb_read32; pops->_read_mem = &usb_read_mem; - pops->_read_port = &usb_read_port; + pops->_read_port = &usb_read_port; + pops->_write8 = &usb_write8; pops->_write16 = &usb_write16; pops->_write32 = &usb_write32; pops->_writeN = &usb_writeN; + +#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ + pops->_write8_async= &usb_async_write8; + pops->_write16_async = &usb_async_write16; + pops->_write32_async = &usb_async_write32; +#endif pops->_write_mem = &usb_write_mem; pops->_write_port = &usb_write_port; + pops->_read_port_cancel = &usb_read_port_cancel; pops->_write_port_cancel = &usb_write_port_cancel; - + +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + pops->_read_interrupt = &usb_read_interrupt; +#endif + + _func_exit_; + } -void rtl8188eu_set_hw_type(struct adapter *adapt) +void rtl8188eu_set_hw_type(_adapter *padapter) { - adapt->chip_type = RTL8188E; - adapt->HardwareType = HARDWARE_TYPE_RTL8188EU; - DBG_88E("CHIP TYPE: RTL8188E\n"); + padapter->chip_type = RTL8188E; + padapter->HardwareType = HARDWARE_TYPE_RTL8188EU; + DBG_871X("CHIP TYPE: RTL8188E\n"); } + diff --git a/include/rtl8188e_hal.h b/include/rtl8188e_hal.h index 3bac83b..1302863 100755 --- a/include/rtl8188e_hal.h +++ b/include/rtl8188e_hal.h @@ -36,7 +36,7 @@ #endif #include "rtw_efuse.h" -#include "../hal/OUTSRC/odm_precomp.h" +#include "../hal/odm_precomp.h" // Fw Array #define Rtl8188E_FwImageArray Rtl8188EFwImgArray