diff --git a/hal/phydm/halhwimg8188e_bb.c b/hal/phydm/halhwimg8188e_bb.c
index c41c617..d63c676 100644
--- a/hal/phydm/halhwimg8188e_bb.c
+++ b/hal/phydm/halhwimg8188e_bb.c
@@ -22,7 +22,6 @@
 #include "mp_precomp.h"
 #include "phydm_precomp.h"
 
-#if (RTL8188E_SUPPORT == 1)
 static bool
 check_positive(
 	struct PHY_DM_STRUCT     *p_dm_odm,
@@ -1745,5 +1744,3 @@ odm_read_and_config_mp_8188e_phy_reg_pg(
 		odm_config_bb_phy_reg_pg_8188e(p_dm_odm, v1, v2, v3, v4, v5, v6);
 	}
 }
-
-#endif /* end of HWIMG_SUPPORT*/
diff --git a/hal/phydm/halphyrf_ap.h b/hal/phydm/halphyrf_ap.h
index 4ab2b96..fcdc560 100644
--- a/hal/phydm/halphyrf_ap.h
+++ b/hal/phydm/halphyrf_ap.h
@@ -61,32 +61,17 @@ configure_txpower_track(
 	struct _TXPWRTRACK_CFG	*p_config
 );
 
-
 void
 odm_txpowertracking_callback_thermal_meter(
 	struct _ADAPTER	*adapter
 );
 
-#if (RTL8814A_SUPPORT == 1)
-void
-odm_txpowertracking_callback_thermal_meter_jaguar_series2(
-	struct _ADAPTER	*adapter
-);
-
-#elif ODM_IC_11AC_SERIES_SUPPORT
+#if ODM_IC_11AC_SERIES_SUPPORT
 void
 odm_txpowertracking_callback_thermal_meter_jaguar_series(
 	struct _ADAPTER	*adapter
 );
 
-#elif (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
-void
-odm_txpowertracking_callback_thermal_meter_jaguar_series3(
-	struct _ADAPTER	*adapter
-);
-
-#endif
-
 #define IS_CCK_RATE(_rate)				(ODM_MGN_1M == _rate || _rate == ODM_MGN_2M || _rate == ODM_MGN_5_5M || _rate == ODM_MGN_11M)
 
 
diff --git a/hal/phydm/halphyrf_ce.c b/hal/phydm/halphyrf_ce.c
index 07da53a..f5ca535 100644
--- a/hal/phydm/halphyrf_ce.c
+++ b/hal/phydm/halphyrf_ce.c
@@ -43,55 +43,8 @@ void configure_txpower_track(
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 
-#if RTL8192E_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8192E)
-		configure_txpower_track_8192e(p_config);
-#endif
-#if RTL8821A_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8821)
-		configure_txpower_track_8821a(p_config);
-#endif
-#if RTL8812A_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8812)
-		configure_txpower_track_8812a(p_config);
-#endif
-#if RTL8188E_SUPPORT
 	if (p_dm_odm->support_ic_type == ODM_RTL8188E)
 		configure_txpower_track_8188e(p_config);
-#endif
-
-#if RTL8723B_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8723B)
-		configure_txpower_track_8723b(p_config);
-#endif
-
-#if RTL8814A_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8814A)
-		configure_txpower_track_8814a(p_config);
-#endif
-
-#if RTL8703B_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8703B)
-		configure_txpower_track_8703b(p_config);
-#endif
-
-#if RTL8188F_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8188F)
-		configure_txpower_track_8188f(p_config);
-#endif
-#if RTL8723D_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8723D)
-		configure_txpower_track_8723d(p_config);
-#endif
-#if RTL8822B_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8822B)
-		configure_txpower_track_8822b(p_config);
-#endif
-#if RTL8821C_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8821C)
-		configure_txpower_track_8821c(p_config);
-#endif
-
 }
 
 /* **********************************************************************
@@ -690,25 +643,7 @@ static void odm_iq_calibrate(struct PHY_DM_STRUCT *p_dm_odm)
 
 		if (p_dm_odm->linked_interval == 2) {
 			if (IS_HARDWARE_TYPE_8814A(adapter)) {
-#if (RTL8814A_SUPPORT == 1)
-				phy_iq_calibrate_8814a(p_dm_odm, false);
-#endif
 			}
-
-#if (RTL8822B_SUPPORT == 1)
-			else if (IS_HARDWARE_TYPE_8822B(adapter))
-				phy_iq_calibrate_8822b(p_dm_odm, false);
-#endif
-
-#if (RTL8821C_SUPPORT == 1)
-			else if (IS_HARDWARE_TYPE_8821C(adapter))
-				phy_iq_calibrate_8821c(p_dm_odm, false);
-#endif
-
-#if (RTL8821A_SUPPORT == 1)
-			else if (IS_HARDWARE_TYPE_8821(adapter))
-				phy_iq_calibrate_8821a(p_dm_odm, false);
-#endif
 		}
 	} else
 		p_dm_odm->linked_interval = 0;
diff --git a/hal/phydm/halphyrf_ce.h b/hal/phydm/halphyrf_ce.h
index ac2b690..8895dde 100644
--- a/hal/phydm/halphyrf_ce.h
+++ b/hal/phydm/halphyrf_ce.h
@@ -22,21 +22,8 @@
 #define __HAL_PHY_RF_H__
 
 #include "phydm_kfree.h"
-#if (RTL8814A_SUPPORT == 1)
-	#include "rtl8814a/phydm_iqk_8814a.h"
-#endif
-
-#if (RTL8822B_SUPPORT == 1)
-	#include "rtl8822b/phydm_iqk_8822b.h"
-#endif
-
-#if (RTL8821C_SUPPORT == 1)
-	#include "rtl8821c/phydm_iqk_8821c.h"
-#endif
-
 #include "phydm_powertracking_ce.h"
 
-
 enum spur_cal_method {
 	PLL_RESET,
 	AFE_PHASE_SEL
diff --git a/hal/phydm/phydm.c b/hal/phydm/phydm.c
index 07f04c3..fee6b86 100644
--- a/hal/phydm/phydm.c
+++ b/hal/phydm/phydm.c
@@ -180,8 +180,6 @@ phydm_init_trx_antenna_setting(
 	struct PHY_DM_STRUCT		*p_dm_odm
 )
 {
-	/*#if (RTL8814A_SUPPORT == 1)*/
-
 	if (p_dm_odm->support_ic_type & (ODM_RTL8814A)) {
 		u8	rx_ant = 0, tx_ant = 0;
 
@@ -194,7 +192,6 @@ phydm_init_trx_antenna_setting(
 		p_dm_odm->rx_ant_status = 0x1;
 
 	}
-	/*#endif*/
 }
 
 static void
@@ -255,42 +252,6 @@ phydm_config_ofdm_tx_path(
 )
 {
 	u8	ofdm_tx_path = 0x33;
-
-#if (RTL8192E_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & (ODM_RTL8192E)) {
-
-		if (path == PHYDM_A) {
-			odm_set_bb_reg(p_dm_odm, 0x90c, MASKDWORD, 0x81121111);
-			/**/
-		} else if (path == PHYDM_B) {
-			odm_set_bb_reg(p_dm_odm, 0x90c, MASKDWORD, 0x82221222);
-			/**/
-		} else  if (path == PHYDM_AB) {
-			odm_set_bb_reg(p_dm_odm, 0x90c, MASKDWORD, 0x83321333);
-			/**/
-		}
-
-
-	}
-#endif
-
-#if (RTL8812A_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & (ODM_RTL8812)) {
-
-		if (path == PHYDM_A) {
-			ofdm_tx_path = 0x11;
-			/**/
-		} else if (path == PHYDM_B) {
-			ofdm_tx_path = 0x22;
-			/**/
-		} else  if (path == PHYDM_AB) {
-			ofdm_tx_path = 0x33;
-			/**/
-		}
-
-		odm_set_bb_reg(p_dm_odm, 0x80c, 0xff00, ofdm_tx_path);
-	}
-#endif
 }
 
 void
@@ -303,39 +264,7 @@ phydm_config_ofdm_rx_path(
 
 
 	if (p_dm_odm->support_ic_type & (ODM_RTL8192E)) {
-#if (RTL8192E_SUPPORT == 1)
-		if (path == PHYDM_A) {
-			ofdm_rx_path = 1;
-			/**/
-		} else if (path == PHYDM_B) {
-			ofdm_rx_path = 2;
-			/**/
-		} else  if (path == PHYDM_AB) {
-			ofdm_rx_path = 3;
-			/**/
-		}
-
-		odm_set_bb_reg(p_dm_odm, 0xC04, 0xff, (((ofdm_rx_path) << 4) | ofdm_rx_path));
-		odm_set_bb_reg(p_dm_odm, 0xD04, 0xf, ofdm_rx_path);
-#endif
 	}
-#if (RTL8812A_SUPPORT || RTL8822B_SUPPORT)
-	else if (p_dm_odm->support_ic_type & (ODM_RTL8812 | ODM_RTL8822B)) {
-
-		if (path == PHYDM_A) {
-			ofdm_rx_path = 1;
-			/**/
-		} else if (path == PHYDM_B) {
-			ofdm_rx_path = 2;
-			/**/
-		} else  if (path == PHYDM_AB) {
-			ofdm_rx_path = 3;
-			/**/
-		}
-
-		odm_set_bb_reg(p_dm_odm, 0x808, MASKBYTE0, ((ofdm_rx_path << 4) | ofdm_rx_path));
-	}
-#endif
 }
 
 static void
@@ -343,19 +272,6 @@ phydm_config_cck_rx_antenna_init(
 	struct PHY_DM_STRUCT		*p_dm_odm
 )
 {
-#if ((RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1))
-	if (p_dm_odm->support_ic_type & (ODM_RTL8192E | ODM_RTL8812)) {
-
-		/*CCK 2R CCA parameters*/
-		odm_set_bb_reg(p_dm_odm, 0xa2c, BIT(18), 1); /*enable 2R Rx path*/
-		odm_set_bb_reg(p_dm_odm, 0xa2c, BIT(22), 1); /*enable 2R MRC*/
-		odm_set_bb_reg(p_dm_odm, 0xa84, BIT(28), 1); /*1. pdx1[5:0] > 2*PD_lim 2. RXIQ_3 = 0 ( signed )*/
-		odm_set_bb_reg(p_dm_odm, 0xa70, BIT(7), 0); /*Concurrent CCA at LSB & USB*/
-		odm_set_bb_reg(p_dm_odm, 0xa74, BIT(8), 0); /*RX path diversity enable*/
-		odm_set_bb_reg(p_dm_odm, 0xa08, BIT(28), 1); /* r_cck_2nd_sel_eco*/
-		odm_set_bb_reg(p_dm_odm, 0xa14, BIT(7), 0); /* r_en_mrc_antsel*/
-	}
-#endif
 }
 
 static void
@@ -367,34 +283,6 @@ phydm_config_cck_rx_path(
 {
 	u8	path_div_select = 0;
 	u8	cck_1_path = 0, cck_2_path = 0;
-
-#if ((RTL8192E_SUPPORT == 1) || (RTL8812A_SUPPORT == 1))
-	if (p_dm_odm->support_ic_type & (ODM_RTL8192E | ODM_RTL8812)) {
-
-		if (path == PHYDM_A) {
-			path_div_select = 0;
-			cck_1_path = 0;
-			cck_2_path = 0;
-		} else if (path == PHYDM_B) {
-			path_div_select = 0;
-			cck_1_path = 1;
-			cck_2_path = 1;
-		} else  if (path == PHYDM_AB) {
-
-			if (path_div_en == CCA_PATHDIV_ENABLE)
-				path_div_select = 1;
-
-			cck_1_path = 0;
-			cck_2_path = 1;
-
-		}
-
-		odm_set_bb_reg(p_dm_odm, 0xa04, (BIT(27) | BIT(26)), cck_1_path);
-		odm_set_bb_reg(p_dm_odm, 0xa04, (BIT(25) | BIT(24)), cck_2_path);
-		odm_set_bb_reg(p_dm_odm, 0xa74, BIT(8), path_div_select);
-
-	}
-#endif
 }
 
 void
@@ -469,41 +357,7 @@ phydm_init_cck_setting(
 
 	p_dm_odm->is_cck_high_power = (bool) odm_get_bb_reg(p_dm_odm, ODM_REG(CCK_RPT_FORMAT, p_dm_odm), ODM_BIT(CCK_RPT_FORMAT, p_dm_odm));
 
-#if (RTL8192E_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & (ODM_RTL8192E)) {
-		/* 0x824[9] = 0x82C[9] = 0xA80[7]  those registers setting should be equal or CCK RSSI report may be incorrect */
-		value_824 = odm_get_bb_reg(p_dm_odm, 0x824, BIT(9));
-		value_82c = odm_get_bb_reg(p_dm_odm, 0x82c, BIT(9));
-
-		if (value_824 != value_82c)
-			odm_set_bb_reg(p_dm_odm, 0x82c, BIT(9), value_824);
-		odm_set_bb_reg(p_dm_odm, 0xa80, BIT(7), value_824);
-		p_dm_odm->cck_agc_report_type = (bool)value_824;
-
-		ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("cck_agc_report_type = (( %d )), ext_lna_gain = (( %d ))\n", p_dm_odm->cck_agc_report_type, p_dm_odm->ext_lna_gain));
-	}
-#endif
-
-#if ((RTL8703B_SUPPORT == 1) || (RTL8723D_SUPPORT == 1))
-	if (p_dm_odm->support_ic_type & (ODM_RTL8703B | ODM_RTL8723D)) {
-
-		p_dm_odm->cck_agc_report_type = odm_get_bb_reg(p_dm_odm, 0x950, BIT(11)) ? 1 : 0; /*1: 4bit LNA, 0: 3bit LNA */
-
-		if (p_dm_odm->cck_agc_report_type != 1) {
-			dbg_print("[Warning] 8703B/8723D CCK should be 4bit LNA, ie. 0x950[11] = 1\n");
-			/**/
-		}
-	}
-#endif
-
-#if ((RTL8723D_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
-
-	if (p_dm_odm->support_ic_type & (ODM_RTL8723D | ODM_RTL8822B | ODM_RTL8197F)) {
-		p_dm_odm->cck_new_agc = odm_get_bb_reg(p_dm_odm, 0xa9c, BIT(17)) ? true : false;          /*1: new agc  0: old agc*/
-	} else
-#endif
-		p_dm_odm->cck_new_agc = false;
-
+	p_dm_odm->cck_new_agc = false;
 }
 
 static void
@@ -511,12 +365,6 @@ phydm_init_soft_ml_setting(
 	struct PHY_DM_STRUCT		*p_dm_odm
 )
 {
-#if (RTL8822B_SUPPORT == 1)
-	if (p_dm_odm->mp_mode == false) {
-		if (p_dm_odm->support_ic_type & ODM_RTL8822B)
-			odm_set_bb_reg(p_dm_odm, 0x19a8, MASKDWORD, 0xc10a0000);
-	}
-#endif
 }
 
 static void
@@ -524,18 +372,6 @@ phydm_init_hw_info_by_rfe(
 	struct PHY_DM_STRUCT		*p_dm_odm
 )
 {
-#if (RTL8822B_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & ODM_RTL8822B)
-		phydm_init_hw_info_by_rfe_type_8822b(p_dm_odm);
-#endif
-#if (RTL8821C_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & ODM_RTL8821C)
-		phydm_init_hw_info_by_rfe_type_8821c(p_dm_odm);
-#endif
-#if (RTL8197F_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & ODM_RTL8197F)
-		phydm_init_hw_info_by_rfe_type_8197f(p_dm_odm);
-#endif
 }
 
 static void
@@ -643,43 +479,21 @@ phydm_get_structure(
 
 {
 	void	*p_struct = NULL;
-#if RTL8195A_SUPPORT
-	switch (structure_type) {
-	case	PHYDM_FALSEALMCNT:
-		p_struct = &false_alm_cnt;
-		break;
 
-	case	PHYDM_CFOTRACK:
-		p_struct = &dm_cfo_track;
-		break;
-
-	case	PHYDM_ADAPTIVITY:
-		p_struct = &(p_dm_odm->adaptivity);
-		break;
-
-	default:
-		break;
-	}
-
-#else
 	switch (structure_type) {
 	case	PHYDM_FALSEALMCNT:
 		p_struct = &(p_dm_odm->false_alm_cnt);
 		break;
-
 	case	PHYDM_CFOTRACK:
 		p_struct = &(p_dm_odm->dm_cfo_track);
 		break;
-
 	case	PHYDM_ADAPTIVITY:
 		p_struct = &(p_dm_odm->adaptivity);
 		break;
-
 	default:
 		break;
 	}
 
-#endif
 	return	p_struct;
 }
 
@@ -688,25 +502,6 @@ odm_hw_setting(
 	struct PHY_DM_STRUCT		*p_dm_odm
 )
 {
-#if (RTL8821A_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & ODM_RTL8821)
-		odm_hw_setting_8821a(p_dm_odm);
-#endif
-
-#if (RTL8814A_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & ODM_RTL8814A)
-		phydm_hwsetting_8814a(p_dm_odm);
-#endif
-
-#if (RTL8822B_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & ODM_RTL8822B)
-		phydm_hwsetting_8822b(p_dm_odm);
-#endif
-
-#if (RTL8197F_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & ODM_RTL8197F)
-		phydm_hwsetting_8197f(p_dm_odm);
-#endif
 }
 #if SUPPORTABLITY_PHYDMLIZE
 static void
@@ -910,11 +705,6 @@ odm_dm_init(
 	phydm_rf_init(p_dm_odm);
 	odm_txpowertracking_init(p_dm_odm);
 
-#if (RTL8822B_SUPPORT == 1)
-			if (p_dm_odm->support_ic_type & ODM_RTL8822B)
-				phydm_txcurrentcalibration(p_dm_odm);
-#endif
-	
 	odm_antenna_diversity_init(p_dm_odm);
 #if (CONFIG_DYNAMIC_RX_PATH == 1)
 	phydm_dynamic_rx_path_init(p_dm_odm);
@@ -940,25 +730,11 @@ odm_dm_init(
 		odm_dynamic_bb_power_saving_init(p_dm_odm);
 #endif
 
-#if (RTL8188E_SUPPORT == 1)
 		if (p_dm_odm->support_ic_type == ODM_RTL8188E) {
 			odm_primary_cca_init(p_dm_odm);
 			odm_ra_info_init_all(p_dm_odm);
 		}
-#endif
-
-
-#if (RTL8723B_SUPPORT == 1)
-		if (p_dm_odm->support_ic_type == ODM_RTL8723B)
-			odm_sw_ant_detect_init(p_dm_odm);
-#endif
-
-#if (RTL8192E_SUPPORT == 1)
-		if (p_dm_odm->support_ic_type == ODM_RTL8192E)
-			odm_primary_cca_check_init(p_dm_odm);
-#endif
 	}
-
 }
 
 void
@@ -1102,15 +878,8 @@ odm_dm_watchdog(
 
 	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
 
-#if (RTL8188E_SUPPORT == 1)
 		if (p_dm_odm->support_ic_type == ODM_RTL8188E)
 			odm_dynamic_primary_cca(p_dm_odm);
-#endif
-
-#if (RTL8192E_SUPPORT == 1)
-		if (p_dm_odm->support_ic_type == ODM_RTL8192E)
-			odm_dynamic_primary_cca_check(p_dm_odm);
-#endif
 	}
 	odm_dtc(p_dm_odm);
 
diff --git a/hal/phydm/phydm.h b/hal/phydm/phydm.h
index aaff703..646ada2 100644
--- a/hal/phydm/phydm.h
+++ b/hal/phydm/phydm.h
@@ -719,10 +719,6 @@ enum phy_reg_pg_type {
 	struct _DYNAMIC_RX_PATH_						dm_drp_table;
 #endif
 
-#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-	struct _IQK_INFORMATION	IQK_info;
-#endif
-
 #if (defined(CONFIG_PATH_DIVERSITY))
 	struct _ODM_PATH_DIVERSITY_	dm_path_div;
 #endif
diff --git a/hal/phydm/phydm_adaptivity.c b/hal/phydm/phydm_adaptivity.c
index 2b54ff7..8a3f498 100644
--- a/hal/phydm/phydm_adaptivity.c
+++ b/hal/phydm/phydm_adaptivity.c
@@ -72,7 +72,6 @@ phydm_nhm_counter_statistics_init(
 		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, BIT(10) | BIT9 | BIT8, 0x1);	/*0x890[10:8]=1			ignoreCCA ignore PHYTXON enable CCX*/
 		odm_set_bb_reg(p_dm_odm, ODM_REG_OFDM_FA_RSTC_11N, BIT(7), 0x1);			/*0xc0c[7]=1				max power among all RX ants*/
 	}
-#if (RTL8195A_SUPPORT == 0)
 	else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
 		/*PHY parameters initialize for ac series*/
 		odm_write_2byte(p_dm_odm, ODM_REG_CCX_PERIOD_11AC + 2, 0xC350);			/*0x990[31:16]=0xC350	Time duration for NHM unit: us, 0xc350=200ms*/
@@ -84,7 +83,6 @@ phydm_nhm_counter_statistics_init(
 		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_9E8_11AC, BIT(0), 0x1);				/*0x9e8[7]=1				max power among all RX ants*/
 
 	}
-#endif
 }
 
 void
@@ -111,11 +109,9 @@ phydm_get_nhm_counter_statistics(
 {
 	struct PHY_DM_STRUCT	*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
 	u32		value32 = 0;
-#if (RTL8195A_SUPPORT == 0)
 	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
 		value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_NHM_CNT_11AC, MASKDWORD);
 	else if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES)
-#endif
 		value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_NHM_CNT_11N, MASKDWORD);
 
 	p_dm_odm->nhm_cnt_0 = (u8)(value32 & MASKBYTE0);
@@ -133,15 +129,10 @@ phydm_nhm_counter_statistics_reset(
 	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
 		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, BIT(1), 0);
 		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, BIT(1), 1);
-	}
-#if (RTL8195A_SUPPORT == 0)
-	else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
+	} else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
 		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC, BIT(1), 0);
 		odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC, BIT(1), 1);
 	}
-
-#endif
-
 }
 
 void
@@ -155,11 +146,8 @@ phydm_set_edcca_threshold(
 
 	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES)
 		odm_set_bb_reg(p_dm_odm, REG_OFDM_0_ECCA_THRESHOLD, MASKBYTE2 | MASKBYTE0, (u32)((u8)L2H | (u8)H2L << 16));
-#if (RTL8195A_SUPPORT == 0)
 	else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
 		odm_set_bb_reg(p_dm_odm, REG_FPGA0_XB_LSSI_READ_BACK, MASKLWORD, (u16)((u8)L2H | (u8)H2L << 8));
-#endif
-
 }
 
 static void
@@ -286,9 +274,7 @@ phydm_set_trx_mux(
 			odm_set_bb_reg(p_dm_odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT(3) | BIT2 | BIT1, tx_mode);		/*set TXmod to standby mode to remove outside noise affect*/
 			odm_set_bb_reg(p_dm_odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT(22) | BIT21 | BIT20, rx_mode);	/*set RXmod to standby mode to remove outside noise affect*/
 		}
-	}
-#if (RTL8195A_SUPPORT == 0)
-	else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
+	} else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
 		odm_set_bb_reg(p_dm_odm, ODM_REG_TRMUX_11AC, BIT(11) | BIT10 | BIT9 | BIT8, tx_mode);				/*set TXmod to standby mode to remove outside noise affect*/
 		odm_set_bb_reg(p_dm_odm, ODM_REG_TRMUX_11AC, BIT(7) | BIT6 | BIT5 | BIT4, rx_mode);				/*set RXmod to standby mode to remove outside noise affect*/
 		if (p_dm_odm->rf_type > ODM_1T1R) {
@@ -296,8 +282,6 @@ phydm_set_trx_mux(
 			odm_set_bb_reg(p_dm_odm, ODM_REG_TRMUX_11AC_B, BIT(7) | BIT6 | BIT5 | BIT4, rx_mode);			/*set RXmod to standby mode to remove outside noise affect*/
 		}
 	}
-#endif
-
 }
 
 void
@@ -429,22 +413,17 @@ phydm_search_pwdb_lower_bound(
 		if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
 			odm_set_bb_reg(p_dm_odm, ODM_REG_DBG_RPT_11N, MASKDWORD, 0x0);
 			reg_value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_RPT_11N, MASKDWORD);
-		}
-#if (RTL8195A_SUPPORT == 0)
-		else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
+		} else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
 			odm_set_bb_reg(p_dm_odm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x0);
 			reg_value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_RPT_11AC, MASKDWORD);
 		}
-#endif
 		while (reg_value32 & BIT(3) && try_count < 3) {
 			try_count = try_count + 1;
 			ODM_delay_ms(3);
 			if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES)
 				reg_value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_RPT_11N, MASKDWORD);
-#if (RTL8195A_SUPPORT == 0)
 			else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
 				reg_value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_RPT_11AC, MASKDWORD);
-#endif
 		}
 		try_count = 0;
 
@@ -452,13 +431,10 @@ phydm_search_pwdb_lower_bound(
 			if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
 				odm_set_bb_reg(p_dm_odm, ODM_REG_DBG_RPT_11N, MASKDWORD, 0x208);
 				value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_RPT_11N, MASKDWORD);
-			}
-#if (RTL8195A_SUPPORT == 0)
-			else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
+			} else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
 				odm_set_bb_reg(p_dm_odm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x209);
 				value32 = odm_get_bb_reg(p_dm_odm, ODM_REG_RPT_11AC, MASKDWORD);
 			}
-#endif
 			if (value32 & BIT(30) && (p_dm_odm->support_ic_type & (ODM_RTL8723B | ODM_RTL8188E)))
 				tx_edcca1 = tx_edcca1 + 1;
 			else if (value32 & BIT(29))
@@ -629,10 +605,8 @@ phydm_adaptivity_init(
 	/*Search pwdB lower bound*/
 	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES)
 		odm_set_bb_reg(p_dm_odm, ODM_REG_DBG_RPT_11N, MASKDWORD, 0x208);
-#if (RTL8195A_SUPPORT == 0)
 	else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
 		odm_set_bb_reg(p_dm_odm, ODM_REG_DBG_RPT_11AC, MASKDWORD, 0x209);
-#endif
 
 	if (p_dm_odm->support_ic_type & ODM_IC_11N_GAIN_IDX_EDCCA) {
 		/*odm_set_bb_reg(p_dm_odm, ODM_REG_EDCCA_DOWN_OPT_11N, BIT(12) | BIT11 | BIT10, 0x7);*/		/*interfernce need > 2^x us, and then EDCCA will be 1*/
@@ -643,7 +617,6 @@ phydm_adaptivity_init(
 		} else
 			odm_set_bb_reg(p_dm_odm, ODM_REG_EDCCA_DCNF_11N, BIT(21) | BIT20, 0x1);		/*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/
 	}
-#if (RTL8195A_SUPPORT == 0)
 	if (p_dm_odm->support_ic_type & ODM_IC_11AC_GAIN_IDX_EDCCA) {		/*8814a no need to find pwdB lower bound, maybe*/
 		/*odm_set_bb_reg(p_dm_odm, ODM_REG_EDCCA_DOWN_OPT, BIT(30) | BIT29 | BIT28, 0x7);*/		/*interfernce need > 2^x us, and then EDCCA will be 1*/
 		odm_set_bb_reg(p_dm_odm, ODM_REG_ACBB_EDCCA_ENHANCE, BIT(29) | BIT28, 0x1);		/*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/
@@ -654,7 +627,6 @@ phydm_adaptivity_init(
 		if (phydm_re_search_condition(p_dm_odm))
 			phydm_search_pwdb_lower_bound(p_dm_odm);
 	}
-#endif
 
 	/*we need to consider PwdB upper bound for 8814 later IC*/
 	adaptivity->adajust_igi_level = (u8)((p_dm_odm->th_l2h_ini + igi_target) - pwdb_upper_bound + dfir_loss);	/*IGI = L2H - PwdB - dfir_loss*/
@@ -692,21 +664,17 @@ phydm_adaptivity(
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("odm_Adaptivity() =====>\n"));
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("igi_base=0x%x, th_l2h_ini = %d, th_edcca_hl_diff = %d\n",
 		adaptivity->igi_base, p_dm_odm->th_l2h_ini, p_dm_odm->th_edcca_hl_diff));
-#if (RTL8195A_SUPPORT == 0)
 	if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) {
 		/*fix AC series when enable EDCCA hang issue*/
 		odm_set_bb_reg(p_dm_odm, 0x800, BIT(10), 1);	/*ADC_mask disable*/
 		odm_set_bb_reg(p_dm_odm, 0x800, BIT(10), 0);	/*ADC_mask enable*/
 	}
-#endif
 	if (*p_dm_odm->p_band_width == ODM_BW20M)		/*CHANNEL_WIDTH_20*/
 		igi_target = adaptivity->igi_base;
 	else if (*p_dm_odm->p_band_width == ODM_BW40M)
 		igi_target = adaptivity->igi_base + 2;
-#if (RTL8195A_SUPPORT == 0)
 	else if (*p_dm_odm->p_band_width == ODM_BW80M)
 		igi_target = adaptivity->igi_base + 2;
-#endif
 	else
 		igi_target = adaptivity->igi_base;
 	adaptivity->igi_target = (u8) igi_target;
@@ -728,9 +696,7 @@ phydm_adaptivity(
 
 		th_l2h_dmc = p_dm_odm->th_l2h_ini - diff + igi_target;
 		th_h2l_dmc = th_l2h_dmc - p_dm_odm->th_edcca_hl_diff;
-	}
-#if (RTL8195A_SUPPORT == 0)
-	else	{
+	} else	{
 		diff = igi_target - (s8)IGI;
 		th_l2h_dmc = p_dm_odm->th_l2h_ini + diff;
 		if (th_l2h_dmc > 10 && (p_dm_odm->adaptivity_enable == true))
@@ -744,7 +710,6 @@ phydm_adaptivity(
 		if (th_l2h_dmc < adaptivity->l2h_lb)
 			th_l2h_dmc = adaptivity->l2h_lb;
 	}
-#endif
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("IGI=0x%x, th_l2h_dmc = %d, th_h2l_dmc = %d\n", IGI, th_l2h_dmc, th_h2l_dmc));
 	ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("adaptivity_igi_upper=0x%x, h2l_lb = 0x%x, l2h_lb = 0x%x\n", p_dm_odm->adaptivity_igi_upper, adaptivity->h2l_lb, adaptivity->l2h_lb));
 
@@ -777,9 +742,7 @@ phydm_pause_edcca(
 
 			adaptivity->backup_l2h = p_dm_odm->th_l2h_ini - diff + adaptivity->igi_target;
 			adaptivity->backup_h2l = adaptivity->backup_l2h - p_dm_odm->th_edcca_hl_diff;
-		}
-#if (RTL8195A_SUPPORT == 0)
-		else {
+		} else {
 			diff = adaptivity->igi_target - (s8)IGI;
 			adaptivity->backup_l2h = p_dm_odm->th_l2h_ini + diff;
 			if (adaptivity->backup_l2h > 10)
@@ -793,7 +756,6 @@ phydm_pause_edcca(
 			if (adaptivity->backup_l2h < adaptivity->l2h_lb)
 				adaptivity->backup_l2h = adaptivity->l2h_lb;
 		}
-#endif
 		ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("pauseEDCCA : L2Hbak = 0x%x, H2Lbak = 0x%x, IGI = 0x%x\n", adaptivity->backup_l2h, adaptivity->backup_h2l, IGI));
 
 		/*Disable EDCCA*/
@@ -817,11 +779,8 @@ phydm_pause_edcca_work_item_callback(
 
 	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES)
 		odm_set_bb_reg(p_dm_odm, REG_OFDM_0_ECCA_THRESHOLD, MASKBYTE2 | MASKBYTE0, (u32)(0x7f | 0x7f << 16));
-#if (RTL8195A_SUPPORT == 0)
 	else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
 		odm_set_bb_reg(p_dm_odm, REG_FPGA0_XB_LSSI_READ_BACK, MASKLWORD, (u16)(0x7f | 0x7f << 8));
-#endif
-
 }
 
 void
@@ -834,11 +793,8 @@ phydm_resume_edcca_work_item_callback(
 
 	if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES)
 		odm_set_bb_reg(p_dm_odm, REG_OFDM_0_ECCA_THRESHOLD, MASKBYTE2 | MASKBYTE0, (u32)((u8)adaptivity->backup_l2h | (u8)adaptivity->backup_h2l << 16));
-#if (RTL8195A_SUPPORT == 0)
 	else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES)
 		odm_set_bb_reg(p_dm_odm, REG_FPGA0_XB_LSSI_READ_BACK, MASKLWORD, (u16)((u8)adaptivity->backup_l2h | (u8)adaptivity->backup_h2l << 8));
-#endif
-
 }
 
 
@@ -860,9 +816,7 @@ phydm_set_edcca_threshold_api(
 
 			th_l2h_dmc = p_dm_odm->th_l2h_ini - diff + igi_target;
 			th_h2l_dmc = th_l2h_dmc - p_dm_odm->th_edcca_hl_diff;
-		}
-#if (RTL8195A_SUPPORT == 0)
-		else	{
+		} else	{
 			diff = igi_target - (s8)IGI;
 			th_l2h_dmc = p_dm_odm->th_l2h_ini + diff;
 			if (th_l2h_dmc > 10)
@@ -876,7 +830,6 @@ phydm_set_edcca_threshold_api(
 			if (th_l2h_dmc < adaptivity->l2h_lb)
 				th_l2h_dmc = adaptivity->l2h_lb;
 		}
-#endif
 		ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("API :IGI=0x%x, th_l2h_dmc = %d, th_h2l_dmc = %d\n", IGI, th_l2h_dmc, th_h2l_dmc));
 		ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("API :adaptivity_igi_upper=0x%x, h2l_lb = 0x%x, l2h_lb = 0x%x\n", p_dm_odm->adaptivity_igi_upper, adaptivity->h2l_lb, adaptivity->l2h_lb));
 
diff --git a/hal/phydm/phydm_antdiv.c b/hal/phydm/phydm_antdiv.c
index 22aa365..9d4b0ef 100644
--- a/hal/phydm/phydm_antdiv.c
+++ b/hal/phydm/phydm_antdiv.c
@@ -1813,31 +1813,7 @@ phydm_update_beam_pattern(
 		}
 
 		if (p_dm_odm->support_ic_type == ODM_RTL8821) {
-#if (RTL8821A_SUPPORT == 1)
-		reg44_tmp_p = reg44_ori & (~(BIT(11) | BIT10)); /*clean bit 10 & 11*/
-		reg44_tmp_p |= ((1 << 11) | (beam_ctrl_signal << 10));
-		reg44_tmp_n = reg44_ori & (~(BIT(11) | BIT(10)));
-
-		/*ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n));*/
-		odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_p);
-		odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_n);
-#endif
 		}
-#if (RTL8822B_SUPPORT == 1)
-		else if (p_dm_odm->support_ic_type == ODM_RTL8822B) {
-
-			reg44_tmp_p = reg44_ori & (~(BIT(9) | BIT8)); /*clean bit 9 & 8*/
-			reg44_tmp_p |= ((1 << 9) | (beam_ctrl_signal << 8));
-			reg44_tmp_n = reg44_ori & (~(BIT(9) | BIT(8)));
-
-			/* ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("reg44_tmp_p =(( 0x%x )), reg44_tmp_n = (( 0x%x ))\n", reg44_tmp_p, reg44_tmp_n)); */
-			odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_p);
-			ODM_delay_us(10);
-			odm_set_mac_reg(p_dm_odm, 0x44, MASKDWORD, reg44_tmp_n);
-			ODM_delay_us(10);
-		}
-#endif
-
 	}
 }
 
@@ -2563,24 +2539,6 @@ odm_ant_div_init(
 	}
 #endif
 
-	/*[--8822B---]*/
-#if (RTL8822B_SUPPORT == 1)
-	else if (p_dm_odm->support_ic_type == ODM_RTL8822B) {
-#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
-		p_dm_odm->ant_div_type = HL_SW_SMART_ANT_TYPE1;
-
-		if (p_dm_odm->ant_div_type == HL_SW_SMART_ANT_TYPE1)
-
-			phydm_hl_smart_ant_type1_init_8822b(p_dm_odm);
-#endif
-	}
-#endif
-
-	/*
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** support_ic_type=[%lu]\n",p_dm_odm->support_ic_type));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** AntDiv support_ability=[%lu]\n",(p_dm_odm->support_ability & ODM_BB_ANT_DIV)>>6));
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("*** AntDiv type=[%d]\n",p_dm_odm->ant_div_type));
-	*/
 }
 
 void
diff --git a/hal/phydm/phydm_cfotracking.c b/hal/phydm/phydm_cfotracking.c
index deb2cb2..fb0ae9b 100644
--- a/hal/phydm/phydm_cfotracking.c
+++ b/hal/phydm/phydm_cfotracking.c
@@ -145,18 +145,6 @@ odm_cfo_tracking_init(
 	p_cfo_track->is_adjust = true;
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init()=========>\n"));
 	ODM_RT_TRACE(p_dm_odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init(): is_atc_status = %d, crystal_cap = 0x%x\n", p_cfo_track->is_atc_status, p_cfo_track->def_x_cap));
-
-#if RTL8822B_SUPPORT
-	/* Crystal cap. control by WiFi */
-	if (p_dm_odm->support_ic_type & ODM_RTL8822B)
-		odm_set_bb_reg(p_dm_odm, 0x10, 0x40, 0x1);
-#endif
-
-#if RTL8821C_SUPPORT
-	/* Crystal cap. control by WiFi */
-	if (p_dm_odm->support_ic_type & ODM_RTL8821C)
-		odm_set_bb_reg(p_dm_odm, 0x10, 0x40, 0x1);
-#endif
 }
 
 void
diff --git a/hal/phydm/phydm_debug.c b/hal/phydm/phydm_debug.c
index 4f6689d..2c4e188 100644
--- a/hal/phydm/phydm_debug.c
+++ b/hal/phydm/phydm_debug.c
@@ -938,14 +938,6 @@ phydm_basic_dbg_message
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("CFO_avg = ((%d kHz)) , CrystalCap_tracking = ((%s%d))\n",
 			p_cfo_track->CFO_ave_pre, ((p_cfo_track->crystal_cap > p_cfo_track->def_x_cap) ? "+" : "-"), tmp_val_u1));
 
-		/* Condition number */
-#if (RTL8822B_SUPPORT == 1)
-		if (p_dm_odm->support_ic_type == ODM_RTL8822B) {
-			tmp_val = phydm_get_condition_number_8822B(p_dm_odm);
-			ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Condition number = ((%d))\n", tmp_val));
-		}
-#endif
-
 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
 		/*STBC or LDPC pkt*/
 		ODM_RT_TRACE(p_dm_odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("LDPC = %s, STBC = %s\n", (p_dm_odm->phy_dbg_info.is_ldpc_pkt) ? "Y" : "N", (p_dm_odm->phy_dbg_info.is_stbc_pkt) ? "Y" : "N"));
@@ -991,117 +983,11 @@ void phydm_basic_profile(
 	PHYDM_SNPRINTF((output + used, out_len - used, "%-35s\n", "% Basic Profile %"));
 
 	if (p_dm_odm->support_ic_type == ODM_RTL8188E) {
-#if (RTL8188E_SUPPORT == 1)
 		ic_type = "RTL8188E";
 		date = RELEASE_DATE_8188E;
 		commit_by = COMMIT_BY_8188E;
 		release_ver = RELEASE_VERSION_8188E;
-#endif
 	}
-#if (RTL8812A_SUPPORT == 1)
-	else if (p_dm_odm->support_ic_type == ODM_RTL8812) {
-		ic_type = "RTL8812A";
-		date = RELEASE_DATE_8812A;
-		commit_by = COMMIT_BY_8812A;
-		release_ver = RELEASE_VERSION_8812A;
-	}
-#endif
-#if (RTL8821A_SUPPORT == 1)
-	else if (p_dm_odm->support_ic_type == ODM_RTL8821) {
-		ic_type = "RTL8821A";
-		date = RELEASE_DATE_8821A;
-		commit_by = COMMIT_BY_8821A;
-		release_ver = RELEASE_VERSION_8821A;
-	}
-#endif
-#if (RTL8192E_SUPPORT == 1)
-	else if (p_dm_odm->support_ic_type == ODM_RTL8192E) {
-		ic_type = "RTL8192E";
-		date = RELEASE_DATE_8192E;
-		commit_by = COMMIT_BY_8192E;
-		release_ver = RELEASE_VERSION_8192E;
-	}
-#endif
-#if (RTL8723B_SUPPORT == 1)
-	else if (p_dm_odm->support_ic_type == ODM_RTL8723B) {
-		ic_type = "RTL8723B";
-		date = RELEASE_DATE_8723B;
-		commit_by = COMMIT_BY_8723B;
-		release_ver = RELEASE_VERSION_8723B;
-	}
-#endif
-#if (RTL8814A_SUPPORT == 1)
-	else if (p_dm_odm->support_ic_type == ODM_RTL8814A) {
-		ic_type = "RTL8814A";
-		date = RELEASE_DATE_8814A;
-		commit_by = COMMIT_BY_8814A;
-		release_ver = RELEASE_VERSION_8814A;
-	}
-#endif
-#if (RTL8881A_SUPPORT == 1)
-	else if (p_dm_odm->support_ic_type == ODM_RTL8881A) {
-		ic_type = "RTL8881A";
-		/**/
-	}
-#endif
-#if (RTL8822B_SUPPORT == 1)
-	else if (p_dm_odm->support_ic_type == ODM_RTL8822B) {
-		ic_type = "RTL8822B";
-		date = RELEASE_DATE_8822B;
-		commit_by = COMMIT_BY_8822B;
-		release_ver = RELEASE_VERSION_8822B;
-	}
-#endif
-#if (RTL8197F_SUPPORT == 1)
-	else if (p_dm_odm->support_ic_type == ODM_RTL8197F) {
-		ic_type = "RTL8197F";
-		date = RELEASE_DATE_8197F;
-		commit_by = COMMIT_BY_8197F;
-		release_ver = RELEASE_VERSION_8197F;
-	}
-#endif
-
-#if (RTL8703B_SUPPORT == 1)
-	else if (p_dm_odm->support_ic_type == ODM_RTL8703B) {
-
-		ic_type = "RTL8703B";
-		date = RELEASE_DATE_8703B;
-		commit_by = COMMIT_BY_8703B;
-		release_ver = RELEASE_VERSION_8703B;
-
-	}
-#endif
-#if (RTL8195A_SUPPORT == 1)
-	else if (p_dm_odm->support_ic_type == ODM_RTL8195A) {
-		ic_type = "RTL8195A";
-		/**/
-	}
-#endif
-#if (RTL8188F_SUPPORT == 1)
-	else if (p_dm_odm->support_ic_type == ODM_RTL8188F) {
-		ic_type = "RTL8188F";
-		date = RELEASE_DATE_8188F;
-		commit_by = COMMIT_BY_8188F;
-		release_ver = RELEASE_VERSION_8188F;
-	}
-#endif
-#if (RTL8723D_SUPPORT == 1)
-	else if (p_dm_odm->support_ic_type == ODM_RTL8723D) {
-		ic_type = "RTL8723D";
-		date = RELEASE_DATE_8723D;
-		commit_by = COMMIT_BY_8723D;
-		release_ver = RELEASE_VERSION_8723D;
-		/**/
-	}
-#endif
-#if (RTL8821C_SUPPORT == 1)
-	else if (p_dm_odm->support_ic_type == ODM_RTL8821C) {
-		ic_type = "RTL8821C";
-		date = RELEASE_DATE_8821C;
-		commit_by = COMMIT_BY_8821C;
-		release_ver = RELEASE_VERSION_8821C;
-	}
-#endif
 	PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s: %s (MP Chip: %s)\n", "IC type", ic_type, p_dm_odm->is_mp_chip ? "Yes" : "No"));
 
 	if (p_dm_odm->cut_version == ODM_CUT_A)
@@ -1196,72 +1082,6 @@ phydm_fw_trace_en_h2c(
 	odm_fill_h2c_cmd(p_dm_odm, PHYDM_H2C_FW_TRACE_EN, cmd_length, h2c_parameter);
 }
 
-
-#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-bool
-phydm_api_set_txagc(
-	struct PHY_DM_STRUCT				*p_dm_odm,
-	u32					power_index,
-	enum odm_rf_radio_path_e		path,
-	u8					hw_rate,
-	bool					is_single_rate
-)
-{
-	bool		ret = false;
-
-	return ret;
-}
-
-u8
-phydm_api_get_txagc(
-	struct PHY_DM_STRUCT				*p_dm_odm,
-	enum odm_rf_radio_path_e	path,
-	u8					hw_rate
-)
-{
-	u8	ret = 0;
-
-	return ret;
-}
-
-
-bool
-phydm_api_switch_bw_channel(
-	struct PHY_DM_STRUCT				*p_dm_odm,
-	u8					central_ch,
-	u8					primary_ch_idx,
-	enum odm_bw_e				bandwidth
-)
-{
-	bool		ret = false;
-
-	return ret;
-}
-
-bool
-phydm_api_trx_mode(
-	struct PHY_DM_STRUCT				*p_dm_odm,
-	enum odm_rf_path_e			tx_path,
-	enum odm_rf_path_e			rx_path,
-	bool					is_tx2_path
-)
-{
-	bool		ret = false;
-
-#if (RTL8822B_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & ODM_RTL8822B)
-		ret = config_phydm_trx_mode_8822b(p_dm_odm, tx_path, rx_path, is_tx2_path);
-#endif
-
-#if (RTL8197F_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & ODM_RTL8197F)
-		ret = config_phydm_trx_mode_8197f(p_dm_odm, tx_path, rx_path, is_tx2_path);
-#endif
-
-	return ret;
-}
-#endif
-
 static void
 phydm_get_per_path_txagc(
 	void			*p_dm_void,
@@ -1277,42 +1097,8 @@ phydm_get_per_path_txagc(
 	u32			used = *_used;
 	u32			out_len = *_out_len;
 
-#if ((RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1) || (RTL8821C_SUPPORT == 1))
-	if (((p_dm_odm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F)) && (path <= ODM_RF_PATH_B)) ||
-	    ((p_dm_odm->support_ic_type & (ODM_RTL8821C)) && (path <= ODM_RF_PATH_A))) {
-		for (rate_idx = 0; rate_idx <= 0x53; rate_idx++) {
-			if (rate_idx == ODM_RATE1M)
-				PHYDM_SNPRINTF((output + used, out_len - used, "  %-35s\n", "CCK====>"));
-			else if (rate_idx == ODM_RATE6M)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "OFDM====>"));
-			else if (rate_idx == ODM_RATEMCS0)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "HT 1ss====>"));
-			else if (rate_idx == ODM_RATEMCS8)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "HT 2ss====>"));
-			else if (rate_idx == ODM_RATEMCS16)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "HT 3ss====>"));
-			else if (rate_idx == ODM_RATEMCS24)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "HT 4ss====>"));
-			else if (rate_idx == ODM_RATEVHTSS1MCS0)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "VHT 1ss====>"));
-			else if (rate_idx == ODM_RATEVHTSS2MCS0)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "VHT 2ss====>"));
-			else if (rate_idx == ODM_RATEVHTSS3MCS0)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "VHT 3ss====>"));
-			else if (rate_idx == ODM_RATEVHTSS4MCS0)
-				PHYDM_SNPRINTF((output + used, out_len - used, "\n  %-35s\n", "VHT 4ss====>"));
-
-			txagc = phydm_api_get_txagc(p_dm_odm, (enum odm_rf_radio_path_e) path, rate_idx);
-			if (config_phydm_read_txagc_check(txagc))
-				PHYDM_SNPRINTF((output + used, out_len - used, "  0x%02x    ", txagc));
-			else
-				PHYDM_SNPRINTF((output + used, out_len - used, "  0x%s    ", "xx"));
-		}
-	}
-#endif
 }
 
-
 static void
 phydm_get_txagc(
 	void			*p_dm_void,
@@ -1359,41 +1145,6 @@ phydm_set_txagc(
 	/*dm_value[1] = path*/
 	/*dm_value[2] = hw_rate*/
 	/*dm_value[3] = power_index*/
-
-#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C)) {
-		if (dm_value[1] <= 1) {
-			if ((u8)dm_value[2] != 0xff) {
-				if (phydm_api_set_txagc(p_dm_odm, dm_value[3], (enum odm_rf_radio_path_e) dm_value[1], (u8)dm_value[2], true))
-					PHYDM_SNPRINTF((output + used, out_len - used, "  %s%d   %s%x%s%x\n", "Write path-", dm_value[1], "rate index-0x", dm_value[2], " = 0x", dm_value[3]));
-				else
-					PHYDM_SNPRINTF((output + used, out_len - used, "  %s%d   %s%x%s\n", "Write path-", (dm_value[1] & 0x1), "rate index-0x", (dm_value[2] & 0x7f), " fail"));
-			} else {
-				u8	i;
-				u32	power_index;
-				bool	status = true;
-
-				power_index = (dm_value[3] & 0x3f);
-
-				if (p_dm_odm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) {
-					power_index = (power_index << 24) | (power_index << 16) | (power_index << 8) | (power_index);
-
-					for (i = 0; i < ODM_RATEVHTSS2MCS9; i += 4)
-						status = (status & phydm_api_set_txagc(p_dm_odm, power_index, (enum odm_rf_radio_path_e) dm_value[1], i, false));
-				} else if (p_dm_odm->support_ic_type & ODM_RTL8197F) {
-					for (i = 0; i <= ODM_RATEMCS15; i++)
-						status = (status & phydm_api_set_txagc(p_dm_odm, power_index, (enum odm_rf_radio_path_e) dm_value[1], i, false));
-				}
-
-				if (status)
-					PHYDM_SNPRINTF((output + used, out_len - used, "  %s%d   %s%x\n", "Write all TXAGC of path-", dm_value[1], " = 0x", dm_value[3]));
-				else
-					PHYDM_SNPRINTF((output + used, out_len - used, "  %s%d   %s\n", "Write all TXAGC of path-", dm_value[1], " fail"));
-			}
-		} else
-			PHYDM_SNPRINTF((output + used, out_len - used, "  %s%d   %s%x%s\n", "Write path-", (dm_value[1] & 0x1), "rate index-0x", (dm_value[2] & 0x7f), " fail"));
-	}
-#endif
 }
 
 static void
@@ -1613,63 +1364,8 @@ phydm_enable_big_jump(
 	bool		state
 )
 {
-#if (RTL8822B_SUPPORT == 1)
-	struct _dynamic_initial_gain_threshold_			*p_dm_dig_table = &p_dm_odm->dm_dig_table;
-
-	if (state == false) {
-		p_dm_odm->dm_dig_table.enable_adjust_big_jump = false;
-		odm_set_bb_reg(p_dm_odm, 0x8c8, 0xfe, ((p_dm_dig_table->big_jump_step3 << 5) | (p_dm_dig_table->big_jump_step2 << 3) | p_dm_dig_table->big_jump_step1));
-	} else
-		p_dm_odm->dm_dig_table.enable_adjust_big_jump = true;
-#endif
 }
 
-#if (RTL8822B_SUPPORT == 1)
-
-void
-phydm_show_rx_rate(
-	struct PHY_DM_STRUCT			*p_dm_odm,
-	u32			*_used,
-	char				*output,
-	u32			*_out_len
-)
-{
-	u32			used = *_used;
-	u32			out_len = *_out_len;
-
-	PHYDM_SNPRINTF((output + used, out_len - used, "=====Rx SU rate Statistics=====\n"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS0 = %d, 1SS MCS1 = %d, 1SS MCS2 = %d, 1SS MCS 3 = %d\n",
-		p_dm_odm->phy_dbg_info.num_qry_vht_pkt[0], p_dm_odm->phy_dbg_info.num_qry_vht_pkt[1], p_dm_odm->phy_dbg_info.num_qry_vht_pkt[2], p_dm_odm->phy_dbg_info.num_qry_vht_pkt[3]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS4 = %d, 1SS MCS5 = %d, 1SS MCS6 = %d, 1SS MCS 7 = %d\n",
-		p_dm_odm->phy_dbg_info.num_qry_vht_pkt[4], p_dm_odm->phy_dbg_info.num_qry_vht_pkt[5], p_dm_odm->phy_dbg_info.num_qry_vht_pkt[6], p_dm_odm->phy_dbg_info.num_qry_vht_pkt[7]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS8 = %d, 1SS MCS9 = %d\n",
-		p_dm_odm->phy_dbg_info.num_qry_vht_pkt[8], p_dm_odm->phy_dbg_info.num_qry_vht_pkt[9]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS0 = %d, 2SS MCS1 = %d, 2SS MCS2 = %d, 2SS MCS 3 = %d\n",
-		p_dm_odm->phy_dbg_info.num_qry_vht_pkt[10], p_dm_odm->phy_dbg_info.num_qry_vht_pkt[11], p_dm_odm->phy_dbg_info.num_qry_vht_pkt[12], p_dm_odm->phy_dbg_info.num_qry_vht_pkt[13]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS4 = %d, 2SS MCS5 = %d, 2SS MCS6 = %d, 2SS MCS 7 = %d\n",
-		p_dm_odm->phy_dbg_info.num_qry_vht_pkt[14], p_dm_odm->phy_dbg_info.num_qry_vht_pkt[15], p_dm_odm->phy_dbg_info.num_qry_vht_pkt[16], p_dm_odm->phy_dbg_info.num_qry_vht_pkt[17]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS8 = %d, 2SS MCS9 = %d\n",
-		p_dm_odm->phy_dbg_info.num_qry_vht_pkt[18], p_dm_odm->phy_dbg_info.num_qry_vht_pkt[19]));
-
-	PHYDM_SNPRINTF((output + used, out_len - used, "=====Rx MU rate Statistics=====\n"));
-	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS0 = %d, 1SS MCS1 = %d, 1SS MCS2 = %d, 1SS MCS 3 = %d\n",
-		p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[0], p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[1], p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[2], p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[3]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS4 = %d, 1SS MCS5 = %d, 1SS MCS6 = %d, 1SS MCS 7 = %d\n",
-		p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[4], p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[5], p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[6], p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[7]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "1SS MCS8 = %d, 1SS MCS9 = %d\n",
-		p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[8], p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[9]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS0 = %d, 2SS MCS1 = %d, 2SS MCS2 = %d, 2SS MCS 3 = %d\n",
-		p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[10], p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[11], p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[12], p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[13]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS4 = %d, 2SS MCS5 = %d, 2SS MCS6 = %d, 2SS MCS 7 = %d\n",
-		p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[14], p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[15], p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[16], p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[17]));
-	PHYDM_SNPRINTF((output + used, out_len - used, "2SS MCS8 = %d, 2SS MCS9 = %d\n",
-		p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[18], p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[19]));
-
-}
-
-#endif
-
-
 struct _PHYDM_COMMAND {
 	char name[16];
 	u8 id;
@@ -1948,47 +1644,14 @@ phydm_cmd_parser(
 		break;
 
 	case PHYDM_API:
-#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-		{
-			if (p_dm_odm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F | ODM_RTL8821C)) {
-				bool	is_enable_dbg_mode;
-				u8 central_ch, primary_ch_idx, bandwidth;
-
-				for (i = 0; i < 4; i++) {
-					if (input[i + 1])
-						PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
-				}
-
-				is_enable_dbg_mode = (bool)var1[0];
-				central_ch = (u8) var1[1];
-				primary_ch_idx = (u8) var1[2];
-				bandwidth = (enum odm_bw_e) var1[3];
-
-				if (is_enable_dbg_mode) {
-					p_dm_odm->is_disable_phy_api = false;
-					phydm_api_switch_bw_channel(p_dm_odm, central_ch, primary_ch_idx, (enum odm_bw_e) bandwidth);
-					p_dm_odm->is_disable_phy_api = true;
-					PHYDM_SNPRINTF((output + used, out_len - used, "central_ch = %d, primary_ch_idx = %d, bandwidth = %d\n", central_ch, primary_ch_idx, bandwidth));
-				} else {
-					p_dm_odm->is_disable_phy_api = false;
-					PHYDM_SNPRINTF((output + used, out_len - used, "Disable API debug mode\n"));
-				}
-			} else
-				PHYDM_SNPRINTF((output + used, out_len - used, "This IC doesn't support PHYDM API function\n"));
-		}
-#else
 		PHYDM_SNPRINTF((output + used, out_len - used, "This IC doesn't support PHYDM API function\n"));
-#endif
 		break;
-
 	case PHYDM_PROFILE: /*echo profile, >cmd*/
 		phydm_basic_profile(p_dm_odm, &used, output, &out_len);
 		break;
-
 	case PHYDM_GET_TXAGC:
 		phydm_get_txagc(p_dm_odm, &used, output, &out_len);
 		break;
-
 	case PHYDM_SET_TXAGC:
 	{
 		bool		is_enable_dbg_mode;
@@ -2025,29 +1688,7 @@ phydm_cmd_parser(
 			if (input[i + 1])
 				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
 		}
-#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1)
-		if (p_dm_odm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F)) {
-			u8		tx_path, rx_path;
-			bool		is_enable_dbg_mode, is_tx2_path;
-
-			is_enable_dbg_mode = (bool)var1[0];
-			tx_path = (u8) var1[1];
-			rx_path = (u8) var1[2];
-			is_tx2_path = (bool) var1[3];
-
-			if (is_enable_dbg_mode) {
-				p_dm_odm->is_disable_phy_api = false;
-				phydm_api_trx_mode(p_dm_odm, (enum odm_rf_path_e) tx_path, (enum odm_rf_path_e) rx_path, is_tx2_path);
-				p_dm_odm->is_disable_phy_api = true;
-				PHYDM_SNPRINTF((output + used, out_len - used, "tx_path = 0x%x, rx_path = 0x%x, is_tx2_path = %d\n", tx_path, rx_path, is_tx2_path));
-			} else {
-				p_dm_odm->is_disable_phy_api = false;
-				PHYDM_SNPRINTF((output + used, out_len - used, "Disable API debug mode\n"));
-			}
-		} else
-#endif
-			phydm_config_trx_path(p_dm_odm, (u32 *)var1, &used, output, &out_len);
-
+		phydm_config_trx_path(p_dm_odm, (u32 *)var1, &used, output, &out_len);
 		break;
 
 	case PHYDM_LA_MODE:
@@ -2079,116 +1720,16 @@ phydm_cmd_parser(
 	break;
 
 	case PHYDM_MU_MIMO:
-#if (RTL8822B_SUPPORT == 1)
-
-		if (input[1])
-			PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-		else
-			var1[0] = 0;
-
-		if (var1[0] == 1) {
-			int index, ptr;
-			u32 dword_h, dword_l;
-
-			PHYDM_SNPRINTF((output + used, out_len - used, "Get MU BFee CSI\n"));
-			odm_set_bb_reg(p_dm_odm, 0x9e8, BIT(17) | BIT16, 2); /*Read BFee*/
-			odm_set_bb_reg(p_dm_odm, 0x1910, BIT(15), 1); /*Select BFee's CSI report*/
-			odm_set_bb_reg(p_dm_odm, 0x19b8, BIT(6), 1); /*set as CSI report*/
-			odm_set_bb_reg(p_dm_odm, 0x19a8, 0xFFFF, 0xFFFF); /*disable gated_clk*/
-
-			for (index = 0; index < 80; index++) {
-				ptr = index + 256;
-				if (ptr > 311)
-					ptr -= 312;
-				odm_set_bb_reg(p_dm_odm, 0x1910, 0x03FF0000, ptr); /*Select Address*/
-				dword_h = odm_get_bb_reg(p_dm_odm, 0xF74, MASKDWORD);
-				dword_l = odm_get_bb_reg(p_dm_odm, 0xF5C, MASKDWORD);
-				if (index % 2 == 0)
-					PHYDM_SNPRINTF((output + used, out_len - used, "%02x  %02x  %02x  %02x  %02x  %02x  %02x  %02x\n",
-						dword_l & MASKBYTE0, (dword_l & MASKBYTE1) >> 8, (dword_l & MASKBYTE2) >> 16, (dword_l & MASKBYTE3) >> 24,
-						dword_h & MASKBYTE0, (dword_h & MASKBYTE1) >> 8, (dword_h & MASKBYTE2) >> 16, (dword_h & MASKBYTE3) >> 24));
-				else
-					PHYDM_SNPRINTF((output + used, out_len - used, "%02x  %02x  %02x  %02x  %02x  %02x  %02x  %02x\n",
-						dword_l & MASKBYTE0, (dword_l & MASKBYTE1) >> 8, (dword_l & MASKBYTE2) >> 16, (dword_l & MASKBYTE3) >> 24,
-						dword_h & MASKBYTE0, (dword_h & MASKBYTE1) >> 8, (dword_h & MASKBYTE2) >> 16, (dword_h & MASKBYTE3) >> 24));
-			}
-		} else if (var1[0] == 2) {
-			int index, ptr;
-			u32 dword_h, dword_l;
-
-			PHYDM_SSCANF(input[2], DCMD_DECIMAL, &var1[1]);
-			PHYDM_SNPRINTF((output + used, out_len - used, "Get MU BFer's STA%d CSI\n", var1[1]));
-			odm_set_bb_reg(p_dm_odm, 0x9e8, BIT(24), 0); /*Read BFer*/
-			odm_set_bb_reg(p_dm_odm, 0x9e8, BIT(25), 1); /*enable Read/Write RAM*/
-			odm_set_bb_reg(p_dm_odm, 0x9e8, BIT(30) | BIT29 | BIT28, var1[1]); /*read which STA's CSI report*/
-			odm_set_bb_reg(p_dm_odm, 0x1910, BIT(15), 0); /*select BFer's CSI*/
-			odm_set_bb_reg(p_dm_odm, 0x19e0, 0x00003FC0, 0xFF); /*disable gated_clk*/
-
-			for (index = 0; index < 80; index++) {
-				ptr = index + 256;
-				if (ptr > 311)
-					ptr -= 312;
-				odm_set_bb_reg(p_dm_odm, 0x1910, 0x03FF0000, ptr); /*Select Address*/
-				dword_h = odm_get_bb_reg(p_dm_odm, 0xF74, MASKDWORD);
-				dword_l = odm_get_bb_reg(p_dm_odm, 0xF5C, MASKDWORD);
-				if (index % 2 == 0)
-					PHYDM_SNPRINTF((output + used, out_len - used, "%02x  %02x  %02x  %02x  %02x  %02x  %02x  %02x\n",
-						dword_l & MASKBYTE0, (dword_l & MASKBYTE1) >> 8, (dword_l & MASKBYTE2) >> 16, (dword_l & MASKBYTE3) >> 24,
-						dword_h & MASKBYTE0, (dword_h & MASKBYTE1) >> 8, (dword_h & MASKBYTE2) >> 16, (dword_h & MASKBYTE3) >> 24));
-				else
-					PHYDM_SNPRINTF((output + used, out_len - used, "%02x  %02x  %02x  %02x  %02x  %02x  %02x  %02x\n",
-						dword_l & MASKBYTE0, (dword_l & MASKBYTE1) >> 8, (dword_l & MASKBYTE2) >> 16, (dword_l & MASKBYTE3) >> 24,
-						dword_h & MASKBYTE0, (dword_h & MASKBYTE1) >> 8, (dword_h & MASKBYTE2) >> 16, (dword_h & MASKBYTE3) >> 24));
-
-				PHYDM_SNPRINTF((output + used, out_len - used, "ptr=%d : 0x%8x  %8x\n", ptr, dword_h, dword_l));
-			}
-
-		}
-#endif
 		break;
-
 	case PHYDM_BIG_JUMP:
-	{
-#if (RTL8822B_SUPPORT == 1)
-		if (input[1]) {
-			PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-			phydm_enable_big_jump(p_dm_odm, (bool)(var1[0]));
-		} else
-			PHYDM_SNPRINTF((output + used, out_len - used, "unknown command!\n"));
-#else
 		PHYDM_SNPRINTF((output + used, out_len - used, "The command is only for 8822B!\n"));
-#endif
 		break;
-	}
-
 	case PHYDM_HANG:
 		phydm_bb_rx_hang_info(p_dm_odm, &used, output, &out_len);
 		break;
-
 	case PHYDM_SHOW_RXRATE:
-#if (RTL8822B_SUPPORT == 1)
-		{
-			u8	rate_idx;
-
-			if (input[1])
-				PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
-
-			if (var1[0] == 1)
-				phydm_show_rx_rate(p_dm_odm, &used, output, &out_len);
-			else {
-				PHYDM_SNPRINTF((output + used, out_len - used, "Reset Rx rate counter\n"));
-
-				for (rate_idx = 0; rate_idx < 40; rate_idx++) {
-					p_dm_odm->phy_dbg_info.num_qry_vht_pkt[rate_idx] = 0;
-					p_dm_odm->phy_dbg_info.num_qry_mu_vht_pkt[rate_idx] = 0;
-				}
-			}
-		}
-#endif
 		break;
-
 	case PHYDM_NBI_EN:
-
 		for (i = 0; i < 5; i++) {
 			if (input[i + 1]) {
 				PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
diff --git a/hal/phydm/phydm_dig.c b/hal/phydm/phydm_dig.c
index 1ac3f60..a5ad9ec 100644
--- a/hal/phydm/phydm_dig.c
+++ b/hal/phydm/phydm_dig.c
@@ -230,30 +230,6 @@ phydm_set_big_jump_step(
 	u8			current_igi
 )
 {
-#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1)
-	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-	struct _dynamic_initial_gain_threshold_			*p_dm_dig_table = &p_dm_odm->dm_dig_table;
-	u8			step1[8] = {24, 30, 40, 50, 60, 70, 80, 90};
-	u8			i;
-
-	if (p_dm_dig_table->enable_adjust_big_jump == 0)
-		return;
-
-	for (i = 0; i <= p_dm_dig_table->big_jump_step1; i++) {
-		if ((current_igi + step1[i]) > p_dm_dig_table->big_jump_lmt[p_dm_dig_table->agc_table_idx]) {
-			if (i != 0)
-				i = i - 1;
-			break;
-		} else if (i == p_dm_dig_table->big_jump_step1)
-			break;
-	}
-	if (p_dm_odm->support_ic_type & ODM_RTL8822B)
-		odm_set_bb_reg(p_dm_odm, 0x8c8, 0xe, i);
-	else if (p_dm_odm->support_ic_type & ODM_RTL8197F)
-		odm_set_bb_reg(p_dm_odm, ODM_REG_BB_AGC_SET_2_11N, 0xe, i);
-
-	ODM_RT_TRACE(p_dm_odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("phydm_set_big_jump_step(): bigjump = %d (ori = 0x%x), LMT=0x%x\n", i, p_dm_dig_table->big_jump_step1, p_dm_dig_table->big_jump_lmt[p_dm_dig_table->agc_table_idx]));
-#endif
 }
 
 void
@@ -289,12 +265,6 @@ odm_write_dig(
 
 	if (p_dm_dig_table->cur_ig_value != current_igi) {
 
-#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1)
-		/* Modify big jump step for 8822B and 8197F */
-		if (p_dm_odm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F))
-			phydm_set_big_jump_step(p_dm_odm, current_igi);
-#endif
-
 #if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1)
 		/* Set IGI value of CCK for new CCK AGC */
 		if (p_dm_odm->cck_new_agc) {
@@ -567,28 +537,6 @@ odm_dig_init(
 		p_dm_dig_table->rx_gain_range_max = DM_DIG_MAX_NIC;
 		p_dm_dig_table->rx_gain_range_min = DM_DIG_MIN_NIC;
 	}
-
-#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1)
-	p_dm_dig_table->enable_adjust_big_jump = 1;
-	if (p_dm_odm->support_ic_type & ODM_RTL8822B) {
-		ret_value = odm_get_bb_reg(p_dm_odm, 0x8c8, MASKLWORD);
-		p_dm_dig_table->big_jump_step1 = (u8)(ret_value & 0xe) >> 1;
-		p_dm_dig_table->big_jump_step2 = (u8)(ret_value & 0x30) >> 4;
-		p_dm_dig_table->big_jump_step3 = (u8)(ret_value & 0xc0) >> 6;
-
-	} else if (p_dm_odm->support_ic_type & ODM_RTL8197F) {
-		ret_value = odm_get_bb_reg(p_dm_odm, ODM_REG_BB_AGC_SET_2_11N, MASKLWORD);
-		p_dm_dig_table->big_jump_step1 = (u8)(ret_value & 0xe) >> 1;
-		p_dm_dig_table->big_jump_step2 = (u8)(ret_value & 0x30) >> 4;
-		p_dm_dig_table->big_jump_step3 = (u8)(ret_value & 0xc0) >> 6;
-	}
-	if (p_dm_odm->support_ic_type & (ODM_RTL8822B | ODM_RTL8197F)) {
-		for (i = 0; i < sizeof(p_dm_dig_table->big_jump_lmt); i++) {
-			if (p_dm_dig_table->big_jump_lmt[i] == 0)
-				p_dm_dig_table->big_jump_lmt[i] = 0x64;		/* Set -10dBm as default value */
-		}
-	}
-#endif
 }
 
 
diff --git a/hal/phydm/phydm_dig.h b/hal/phydm/phydm_dig.h
index 7d16c1e..f6fb74d 100644
--- a/hal/phydm/phydm_dig.h
+++ b/hal/phydm/phydm_dig.h
@@ -93,16 +93,6 @@ struct _dynamic_initial_gain_threshold_ {
 
 	u32		cck_fa_ma;
 	enum dig_goupcheck_level		dig_go_up_check_level;
-
-#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
-	u8		rf_gain_idx;
-	u8		agc_table_idx;
-	u8		big_jump_lmt[16];
-	u8		enable_adjust_big_jump:1;
-	u8		big_jump_step1:3;
-	u8		big_jump_step2:2;
-	u8		big_jump_step3:2;
-#endif
 };
 
 struct _FALSE_ALARM_STATISTICS {
diff --git a/hal/phydm/phydm_features.h b/hal/phydm/phydm_features.h
index 514f454..14f38b1 100644
--- a/hal/phydm/phydm_features.h
+++ b/hal/phydm/phydm_features.h
@@ -22,11 +22,7 @@
 #define __PHYDM_FEATURES
 
 #define	ODM_RECEIVER_BLOCKING_SUPPORT	(ODM_RTL8188E | ODM_RTL8192E)
-#if ((RTL8814A_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
-	#define PHYDM_LA_MODE_SUPPORT			1
-#else
-	#define PHYDM_LA_MODE_SUPPORT			0
-#endif
+#define PHYDM_LA_MODE_SUPPORT			0
 
 /*phydm debyg report & tools*/
 #define CONFIG_PHYDM_DEBUG_FUNCTION		1
diff --git a/hal/phydm/phydm_hwconfig.c b/hal/phydm/phydm_hwconfig.c
index 1e8489c..4352d37 100644
--- a/hal/phydm/phydm_hwconfig.c
+++ b/hal/phydm/phydm_hwconfig.c
@@ -1154,54 +1154,6 @@ odm_process_rssi_for_dm(
 	if (p_pktinfo->is_packet_to_self || p_pktinfo->is_packet_beacon) {
 
 		if (!is_cck_rate) { /* ofdm rate */
-#if (RTL8814A_SUPPORT == 1) || (RTL8822B_SUPPORT == 1)
-			if (p_dm_odm->support_ic_type & (ODM_RTL8814A | ODM_RTL8822B)) {
-				u8 RX_count = 0;
-				u32 RSSI_linear = 0;
-
-				if (p_dm_odm->rx_ant_status & ODM_RF_A) {
-					p_dm_odm->RSSI_A = p_phy_info->rx_mimo_signal_strength[ODM_RF_PATH_A];
-					RX_count++;
-					RSSI_linear += odm_convert_to_linear(p_phy_info->rx_mimo_signal_strength[ODM_RF_PATH_A]);
-				} else
-					p_dm_odm->RSSI_A = 0;
-
-				if (p_dm_odm->rx_ant_status & ODM_RF_B) {
-					p_dm_odm->RSSI_B = p_phy_info->rx_mimo_signal_strength[ODM_RF_PATH_B];
-					RX_count++;
-					RSSI_linear += odm_convert_to_linear(p_phy_info->rx_mimo_signal_strength[ODM_RF_PATH_B]);
-				} else
-					p_dm_odm->RSSI_B = 0;
-
-				if (p_dm_odm->rx_ant_status & ODM_RF_C) {
-					p_dm_odm->RSSI_C = p_phy_info->rx_mimo_signal_strength[ODM_RF_PATH_C];
-					RX_count++;
-					RSSI_linear += odm_convert_to_linear(p_phy_info->rx_mimo_signal_strength[ODM_RF_PATH_C]);
-				} else
-					p_dm_odm->RSSI_C = 0;
-
-				if (p_dm_odm->rx_ant_status & ODM_RF_D) {
-					p_dm_odm->RSSI_D = p_phy_info->rx_mimo_signal_strength[ODM_RF_PATH_D];
-					RX_count++;
-					RSSI_linear += odm_convert_to_linear(p_phy_info->rx_mimo_signal_strength[ODM_RF_PATH_D]);
-				} else
-					p_dm_odm->RSSI_D = 0;
-
-				/* Calculate average RSSI */
-				switch (RX_count) {
-				case 2:
-					RSSI_linear = (RSSI_linear >> 1);
-					break;
-				case 3:
-					RSSI_linear = ((RSSI_linear) + (RSSI_linear << 1) + (RSSI_linear << 3)) >> 5;	/* RSSI_linear/3 ~ RSSI_linear*11/32 */
-					break;
-				case 4:
-					RSSI_linear = (RSSI_linear >> 2);
-					break;
-				}
-				rssi_ave = odm_convert_to_db(RSSI_linear);
-			} else
-#endif
 			{
 				if (p_phy_info->rx_mimo_signal_strength[ODM_RF_PATH_B] == 0) {
 					rssi_ave = p_phy_info->rx_mimo_signal_strength[ODM_RF_PATH_A];
@@ -1486,91 +1438,6 @@ odm_config_rf_with_tx_pwr_track_header_file(
 	}
 
 	/* 1 All platforms support */
-#if RTL8723B_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8723B) {
-		if (p_dm_odm->support_interface == ODM_ITRF_PCIE)
-			READ_AND_CONFIG_MP(8723b, _txpowertrack_pcie);
-		else if (p_dm_odm->support_interface == ODM_ITRF_USB)
-			READ_AND_CONFIG_MP(8723b, _txpowertrack_usb);
-		else if (p_dm_odm->support_interface == ODM_ITRF_SDIO)
-			READ_AND_CONFIG_MP(8723b, _txpowertrack_sdio);
-	}
-#endif
-#if RTL8814A_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8814A) {
-		if (p_dm_odm->rfe_type == 0)
-			READ_AND_CONFIG_MP(8814a, _txpowertrack_type0);
-		else if (p_dm_odm->rfe_type == 2)
-			READ_AND_CONFIG_MP(8814a, _txpowertrack_type2);
-		else if (p_dm_odm->rfe_type == 5)
-			READ_AND_CONFIG_MP(8814a, _txpowertrack_type5);
-		else
-			READ_AND_CONFIG_MP(8814a, _txpowertrack);
-
-		READ_AND_CONFIG_MP(8814a, _txpowertssi);
-	}
-#endif
-#if RTL8703B_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8703B) {
-		if (p_dm_odm->support_interface == ODM_ITRF_USB)
-			READ_AND_CONFIG_MP(8703b, _txpowertrack_usb);
-		else if (p_dm_odm->support_interface == ODM_ITRF_SDIO)
-			READ_AND_CONFIG_MP(8703b, _txpowertrack_sdio);
-
-		READ_AND_CONFIG_MP(8703b, _txxtaltrack);
-	}
-#endif
-
-#if RTL8188F_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8188F) {
-		if (p_dm_odm->support_interface == ODM_ITRF_USB)
-			READ_AND_CONFIG_MP(8188f, _txpowertrack_usb);
-		else if (p_dm_odm->support_interface == ODM_ITRF_SDIO)
-			READ_AND_CONFIG_MP(8188f, _txpowertrack_sdio);
-	}
-#endif
-
-#if RTL8822B_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8822B) {
-		if (p_dm_odm->rfe_type == 0)
-			READ_AND_CONFIG_MP(8822b, _txpowertrack_type0);
-		else if (p_dm_odm->rfe_type == 1)
-			READ_AND_CONFIG_MP(8822b, _txpowertrack_type1);
-		else if (p_dm_odm->rfe_type == 2)
-			READ_AND_CONFIG_MP(8822b, _txpowertrack_type2);
-		else if ((p_dm_odm->rfe_type == 3) || (p_dm_odm->rfe_type == 5))
-			READ_AND_CONFIG_MP(8822b, _txpowertrack_type3_type5);
-		else if (p_dm_odm->rfe_type == 4)
-			READ_AND_CONFIG_MP(8822b, _txpowertrack_type4);
-		else if (p_dm_odm->rfe_type == 6)
-			READ_AND_CONFIG_MP(8822b, _txpowertrack_type6);
-		else if (p_dm_odm->rfe_type == 7)
-			READ_AND_CONFIG_MP(8822b, _txpowertrack_type7);
-		else if (p_dm_odm->rfe_type == 8)
-			READ_AND_CONFIG_MP(8822b, _txpowertrack_type8);
-		else if (p_dm_odm->rfe_type == 9)
-			READ_AND_CONFIG_MP(8822b, _txpowertrack_type9);
-		else
-			READ_AND_CONFIG_MP(8822b, _txpowertrack);
-	}
-#endif
-
-#if RTL8197F_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8197F) {
-		if (p_dm_odm->rfe_type == 0)
-			READ_AND_CONFIG_MP(8197f, _txpowertrack_type0);
-		else if (p_dm_odm->rfe_type == 1)
-			READ_AND_CONFIG_MP(8197f, _txpowertrack_type1);
-		else
-			READ_AND_CONFIG_MP(8197f, _txpowertrack);
-	}
-#endif
-
-#if RTL8821C_SUPPORT
-	if (p_dm_odm->support_ic_type == ODM_RTL8821C)
-		READ_AND_CONFIG(8821c, _txpowertrack);
-#endif
-
 	return HAL_STATUS_SUCCESS;
 }
 
@@ -1822,27 +1689,8 @@ phydm_get_rx_phy_status_type0(
 	if (p_dm_odm->cck_new_agc == false) {
 		u8	lna_idx, vga_idx;
 
-#if (RTL8197F_SUPPORT == 1)
-		if (p_dm_odm->support_ic_type & ODM_RTL8197F)
-			lna_idx = p_phy_sta_rpt->lna_l;
-		else
-#endif
 			lna_idx = ((p_phy_sta_rpt->lna_h << 3) | p_phy_sta_rpt->lna_l);
 		vga_idx = p_phy_sta_rpt->vga;
-
-#if (RTL8723D_SUPPORT == 1)
-		if (p_dm_odm->support_ic_type & ODM_RTL8723D)
-			rx_power = odm_cckrssi_8723d(lna_idx, vga_idx);
-#endif
-#if (RTL8822B_SUPPORT == 1)
-		/* Need to do !! */
-		/*if (p_dm_odm->support_ic_type & ODM_RTL8822B) */
-		/*rx_power = odm_CCKRSSI_8822B(LNA_idx, VGA_idx);*/
-#endif
-#if (RTL8197F_SUPPORT == 1)
-		if (p_dm_odm->support_ic_type & ODM_RTL8197F)
-			rx_power = odm_cckrssi_8197f(p_dm_odm, lna_idx, vga_idx);
-#endif
 	}
 
 	/* Update CCK packet counter */
diff --git a/hal/phydm/phydm_pre_define.h b/hal/phydm/phydm_pre_define.h
index 869b153..b1953fc 100644
--- a/hal/phydm/phydm_pre_define.h
+++ b/hal/phydm/phydm_pre_define.h
@@ -336,11 +336,7 @@ enum odm_ic_type_e {
 	#define ODM_CONFIG_BT_COEXIST				0
 #endif
 
-#if ((RTL8197F_SUPPORT == 1) || (RTL8723D_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1))
-	#define ODM_PHY_STATUS_NEW_TYPE_SUPPORT			1
-#else
-	#define ODM_PHY_STATUS_NEW_TYPE_SUPPORT			0
-#endif
+#define ODM_PHY_STATUS_NEW_TYPE_SUPPORT			0
 
 /* ODM_CMNINFO_CUT_VER */
 enum odm_cut_version_e {
diff --git a/hal/phydm/phydm_rainfo.c b/hal/phydm/phydm_rainfo.c
index 99f7267..2ae74f1 100644
--- a/hal/phydm/phydm_rainfo.c
+++ b/hal/phydm/phydm_rainfo.c
@@ -789,15 +789,6 @@ phydm_init_ra_info(
 )
 {
 	struct PHY_DM_STRUCT		*p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
-
-#if (RTL8822B_SUPPORT == 1)
-	if (p_dm_odm->support_ic_type == ODM_RTL8822B) {
-		u32	ret_value;
-
-		ret_value = odm_get_bb_reg(p_dm_odm, 0x4c8, MASKBYTE2);
-		odm_set_bb_reg(p_dm_odm, 0x4cc, MASKBYTE3, (ret_value - 1));
-	}
-#endif
 }
 
 void
diff --git a/hal/phydm/txbf/phydm_hal_txbf_api.h b/hal/phydm/txbf/phydm_hal_txbf_api.h
index 66a1254..bb63dc9 100644
--- a/hal/phydm/txbf/phydm_hal_txbf_api.h
+++ b/hal/phydm/txbf/phydm_hal_txbf_api.h
@@ -35,32 +35,9 @@ beamforming_get_vht_ndp_tx_rate(
 	u8	comp_steering_num_of_bfer
 );
 
-#if (RTL8822B_SUPPORT == 1)
-u8
-phydm_get_beamforming_sounding_info(
-	void		*p_dm_void,
-	u16	*troughput,
-	u8	total_bfee_num,
-	u8	*tx_rate
-);
-
-u8
-phydm_get_ndpa_rate(
-	void		*p_dm_void
-);
-
-u8
-phydm_get_mu_bfee_snding_decision(
-	void		*p_dm_void,
-	u16	throughput
-);
-
-#else
 #define phydm_get_beamforming_sounding_info(p_dm_void, troughput, total_bfee_num, tx_rate)
 #define phydm_get_ndpa_rate(p_dm_void)
 #define phydm_get_mu_bfee_snding_decision(p_dm_void, troughput)
 
-#endif
-
 #endif
 #endif
diff --git a/include/Hal8188EPhyCfg.h b/include/Hal8188EPhyCfg.h
index c0558bc..a3fb0b5 100644
--- a/include/Hal8188EPhyCfg.h
+++ b/include/Hal8188EPhyCfg.h
@@ -203,7 +203,7 @@ SetAntennaConfig92C(
  * 	2) "#define RTL8723_FPGA_VERIFICATION	1"				in Precomp.h.WlanE.Windows
  * 	3) "#define RTL8190_Download_Firmware_From_Header	0"	in Precomp.h.WlanE.Windows if needed.
  *   */
-#if (RTL8188E_SUPPORT == 1) && (RTL8188E_FPGA_TRUE_PHY_VERIFICATION == 1)
+#if (RTL8188E_FPGA_TRUE_PHY_VERIFICATION == 1)
 	#define	SIC_ENABLE				1
 	#define	SIC_HW_SUPPORT		1
 #else
@@ -218,7 +218,6 @@ SetAntennaConfig92C(
 #if (SIC_HW_SUPPORT == 1)
 	#define	SIC_CMD_READY			0
 	#define	SIC_CMD_PREWRITE		0x1
-	#if (RTL8188E_SUPPORT == 1)
 		#define	SIC_CMD_WRITE			0x40
 		#define	SIC_CMD_PREREAD		0x2
 		#define	SIC_CMD_READ			0x80
@@ -229,32 +228,14 @@ SetAntennaConfig92C(
 		#define	SIC_CMD_REG			0x1EB		/* 1byte */
 		#define	SIC_ADDR_REG			0x1E8		/* 1b4~1b5, 2 bytes */
 		#define	SIC_DATA_REG			0x1EC		/* 1b0~1b3 */
-	#else
-		#define	SIC_CMD_WRITE			0x11
-		#define	SIC_CMD_PREREAD		0x2
-		#define	SIC_CMD_READ			0x12
-		#define	SIC_CMD_INIT			0x1f
-		#define	SIC_INIT_VAL			0xff
-
-		#define	SIC_INIT_REG			0x1b7
-		#define	SIC_CMD_REG			0x1b6		/* 1byte */
-		#define	SIC_ADDR_REG			0x1b4		/* 1b4~1b5, 2 bytes */
-		#define	SIC_DATA_REG			0x1b0		/* 1b0~1b3 */
-	#endif
 #else
 	#define	SIC_CMD_READY			0
 	#define	SIC_CMD_WRITE			1
 	#define	SIC_CMD_READ			2
 
-	#if (RTL8188E_SUPPORT == 1)
 		#define	SIC_CMD_REG			0x1EB		/* 1byte */
 		#define	SIC_ADDR_REG			0x1E8		/* 1b9~1ba, 2 bytes */
 		#define	SIC_DATA_REG			0x1EC		/* 1bc~1bf */
-	#else
-		#define	SIC_CMD_REG			0x1b8		/* 1byte */
-		#define	SIC_ADDR_REG			0x1b9		/* 1b9~1ba, 2 bytes */
-		#define	SIC_DATA_REG			0x1bc		/* 1bc~1bf */
-	#endif
 #endif
 
 #if (SIC_ENABLE == 1)
diff --git a/include/rtw_recv.h b/include/rtw_recv.h
index 698a89e..ea67896 100644
--- a/include/rtw_recv.h
+++ b/include/rtw_recv.h
@@ -118,19 +118,8 @@ struct phy_info {
 	u8			SignalStrength;				/* in 0-100 index. */
 	s8			RxPwr[4];					/* per-path's pwdb */
 	s8			RxSNR[4];
-#if ((RTL8822B_SUPPORT == 1) || (RTL8723D_SUPPORT == 1) || (RTL8821C_SUPPORT == 1))
-	u8			RxCount:2;
-	u8			BandWidth:2;
-	u8			rxsc:4;
-#else
 	u8			BandWidth;
-#endif
 	u8			btCoexPwrAdjust;
-#if ((RTL8822B_SUPPORT == 1) || (RTL8723D_SUPPORT == 1) || (RTL8821C_SUPPORT == 1))
-	u8			channel;						/* channel number---*/
-	BOOLEAN		bMuPacket;					/* is MU packet or not---*/
-	BOOLEAN		bBeamformed;
-#endif
 };
 
 struct rx_raw_rssi {