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rtl8188eu: Remove dead code for devices other than RTL8188EU

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This commit handles files in core/.

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2018-11-03 13:09:10 -05:00
parent 4880865d31
commit 539f476e87
13 changed files with 7 additions and 2847 deletions
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1555
core/rtw_bt_mp.c
View file

File diff suppressed because it is too large Load diff

8
core/rtw_btcoex.c
View file

@ -464,14 +464,6 @@ u8 rtw_btcoex_get_pg_rfe_type(PADAPTER padapter)
u8 rtw_btcoex_is_tfbga_package_type(PADAPTER padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
#ifdef CONFIG_RTL8723B
if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA80)
|| (pHalData->PackageType == PACKAGE_TFBGA90))
return _TRUE;
#endif
return _FALSE;
}

55
core/rtw_cmd.c
View file

@ -1517,39 +1517,14 @@ u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network *pnetwork)
rtw_reset_ft_status(padapter);
}
#endif
pcmd->cmdsz = sizeof(WLAN_BSSID_EX);
#ifdef CONFIG_RTL8712
/* wlan_network endian conversion */
psecnetwork->Length = cpu_to_le32(psecnetwork->Length);
psecnetwork->Ssid.SsidLength = cpu_to_le32(psecnetwork->Ssid.SsidLength);
psecnetwork->Privacy = cpu_to_le32(psecnetwork->Privacy);
psecnetwork->Rssi = cpu_to_le32(psecnetwork->Rssi);
psecnetwork->NetworkTypeInUse = cpu_to_le32(psecnetwork->NetworkTypeInUse);
psecnetwork->Configuration.ATIMWindow = cpu_to_le32(psecnetwork->Configuration.ATIMWindow);
psecnetwork->Configuration.BeaconPeriod = cpu_to_le32(psecnetwork->Configuration.BeaconPeriod);
psecnetwork->Configuration.DSConfig = cpu_to_le32(psecnetwork->Configuration.DSConfig);
psecnetwork->Configuration.FHConfig.DwellTime = cpu_to_le32(psecnetwork->Configuration.FHConfig.DwellTime);
psecnetwork->Configuration.FHConfig.HopPattern = cpu_to_le32(psecnetwork->Configuration.FHConfig.HopPattern);
psecnetwork->Configuration.FHConfig.HopSet = cpu_to_le32(psecnetwork->Configuration.FHConfig.HopSet);
psecnetwork->Configuration.FHConfig.Length = cpu_to_le32(psecnetwork->Configuration.FHConfig.Length);
psecnetwork->Configuration.Length = cpu_to_le32(psecnetwork->Configuration.Length);
psecnetwork->InfrastructureMode = cpu_to_le32(psecnetwork->InfrastructureMode);
psecnetwork->IELength = cpu_to_le32(psecnetwork->IELength);
#endif
_rtw_init_listhead(&pcmd->list);
pcmd->cmdcode = _JoinBss_CMD_;/* GEN_CMD_CODE(_JoinBss) */
pcmd->parmbuf = (unsigned char *)psecnetwork;
pcmd->rsp = NULL;
pcmd->rspsz = 0;
res = rtw_enqueue_cmd(pcmdpriv, pcmd);
exit:
return res;
}
@ -3867,36 +3842,7 @@ static s32 rtw_mp_cmd_hdl(_adapter *padapter, u8 mp_cmd_id)
MPT_PwrCtlDM(padapter, 0);
}
padapter->mppriv.bmac_filter = _FALSE;
#ifdef CONFIG_RTL8723B
#ifdef CONFIG_USB_HCI
rtw_write32(padapter, 0x765, 0x0000);
rtw_write32(padapter, 0x948, 0x0280);
#else
rtw_write32(padapter, 0x765, 0x0000);
rtw_write32(padapter, 0x948, 0x0000);
#endif
#ifdef CONFIG_FOR_RTL8723BS_VQ0
rtw_write32(padapter, 0x765, 0x0000);
rtw_write32(padapter, 0x948, 0x0280);
#endif
rtw_write8(padapter, 0x66, 0x27); /*Open BT uart Log*/
rtw_write8(padapter, 0xc50, 0x20); /*for RX init Gain*/
#endif
#ifdef CONFIG_RTL8188F
RTW_INFO("Set reg 0x88c, 0x58, 0x00\n");
rfreg0 = phy_query_rf_reg(padapter, RF_PATH_A, 0x0, 0x1f);
phy_set_bb_reg(padapter, 0x88c, BIT21|BIT20, 0x3);
phy_set_rf_reg(padapter, RF_PATH_A, 0x58, BIT1, 0x1);
phy_set_rf_reg(padapter, RF_PATH_A, 0x0, 0xF001f, 0x2001f);
rtw_msleep_os(200);
phy_set_rf_reg(padapter, RF_PATH_A, 0x0, 0xF001f, 0x30000 | rfreg0);
phy_set_rf_reg(padapter, RF_PATH_A, 0x58, BIT1, 0x0);
phy_set_bb_reg(padapter, 0x88c, BIT21|BIT20, 0x0);
rtw_msleep_os(1000);
#endif
odm_write_dig(&pHalData->odmpriv, 0x20);
} else if (mp_cmd_id == MP_STOP) {
if (padapter->registrypriv.mp_mode == 1) {
MPT_DeInitAdapter(padapter);
@ -3909,7 +3855,6 @@ static s32 rtw_mp_cmd_hdl(_adapter *padapter, u8 mp_cmd_id)
mp_stop_test(padapter);
padapter->mppriv.mode = MP_OFF;
}
} else {
RTW_INFO(FUNC_ADPT_FMT"invalid id:%d\n", FUNC_ADPT_ARG(padapter), mp_cmd_id);
ret = H2C_PARAMETERS_ERROR;

80
core/rtw_debug.c
View file

@ -239,29 +239,6 @@ void mac_reg_dump(void *sel, _adapter *adapter)
if ((j++) % 4 == 0)
_RTW_PRINT_SEL(sel, "\n");
}
#ifdef CONFIG_RTL8814A
{
for (i = 0x1000; i < 0x1650; i += 4) {
if (j % 4 == 1)
RTW_PRINT_SEL(sel, "0x%04x", i);
_RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i));
if ((j++) % 4 == 0)
_RTW_PRINT_SEL(sel, "\n");
}
}
#endif /* CONFIG_RTL8814A */
#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
for (i = 0x1000; i < 0x1800; i += 4) {
if (j % 4 == 1)
RTW_PRINT_SEL(sel, "0x%04x", i);
_RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i));
if ((j++) % 4 == 0)
_RTW_PRINT_SEL(sel, "\n");
}
#endif /* CONFIG_RTL8822B */
}
void bb_reg_dump(void *sel, _adapter *adapter)
@ -276,16 +253,6 @@ void bb_reg_dump(void *sel, _adapter *adapter)
if ((j++) % 4 == 0)
_RTW_PRINT_SEL(sel, "\n");
}
#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
for (i = 0x1800; i < 0x2000; i += 4) {
if (j % 4 == 1)
RTW_PRINT_SEL(sel, "0x%04x", i);
_RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i));
if ((j++) % 4 == 0)
_RTW_PRINT_SEL(sel, "\n");
}
#endif /* CONFIG_RTL8822B */
}
void bb_reg_dump_ex(void *sel, _adapter *adapter)
@ -298,14 +265,6 @@ void bb_reg_dump_ex(void *sel, _adapter *adapter)
_RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i));
_RTW_PRINT_SEL(sel, "\n");
}
#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
for (i = 0x1800; i < 0x2000; i += 4) {
RTW_PRINT_SEL(sel, "0x%04x", i);
_RTW_PRINT_SEL(sel, " 0x%08x ", rtw_read32(adapter, i));
_RTW_PRINT_SEL(sel, "\n");
}
#endif /* CONFIG_RTL8822B */
}
void rf_reg_dump(void *sel, _adapter *adapter)
@ -2512,28 +2471,9 @@ int proc_get_mac_rptbuf(struct seq_file *m, void *v)
u16 mac_id;
u32 shcut_addr = 0;
u32 read_addr = 0;
#ifdef CONFIG_RTL8814A
RTW_PRINT_SEL(m, "TX ShortCut:\n");
for (mac_id = 0; mac_id < 64; mac_id++) {
rtw_write16(padapter, 0x140, 0x662 | ((mac_id & BIT5) >> 5));
shcut_addr = 0x8000;
shcut_addr = shcut_addr | ((mac_id & 0x1f) << 7);
RTW_PRINT_SEL(m, "mac_id=%d, 0x140=%x =>\n", mac_id, 0x662 | ((mac_id & BIT5) >> 5));
for (i = 0; i < 30; i++) {
read_addr = 0;
read_addr = shcut_addr | (i << 2);
RTW_PRINT_SEL(m, "i=%02d: MAC_%04x= %08x ", i, read_addr, rtw_read32(padapter, read_addr));
if (!((i + 1) % 4))
RTW_PRINT_SEL(m, "\n");
if (i == 29)
RTW_PRINT_SEL(m, "\n");
}
}
#endif /* CONFIG_RTL8814A */
return 0;
}
int proc_get_rx_ampdu(struct seq_file *m, void *v)
{
struct net_device *dev = m->private;
@ -5161,13 +5101,7 @@ int proc_get_ack_timeout(struct seq_file *m, void *v)
ack_timeout_val = rtw_read8(padapter, REG_ACKTO);
#ifdef CONFIG_RTL8821C
ack_timeout_val_cck = rtw_read8(padapter, REG_ACKTO_CCK_8821C);
RTW_PRINT_SEL(m, "Current CCK packet ACK Timeout = %d us (0x%x).\n", ack_timeout_val_cck, ack_timeout_val_cck);
RTW_PRINT_SEL(m, "Current non-CCK packet ACK Timeout = %d us (0x%x).\n", ack_timeout_val, ack_timeout_val);
#else
RTW_PRINT_SEL(m, "Current ACK Timeout = %d us (0x%x).\n", ack_timeout_val, ack_timeout_val);
#endif
return 0;
}
@ -5187,28 +5121,14 @@ ssize_t proc_set_ack_timeout(struct file *file, const char __user *buffer, size_
if (buffer && !copy_from_user(tmp, buffer, count)) {
int num = sscanf(tmp, "%u %u", &ack_timeout_ms, &ack_timeout_ms_cck);
#ifdef CONFIG_RTL8821C
if (num < 2) {
RTW_INFO(FUNC_ADPT_FMT ": input parameters < 2\n", FUNC_ADPT_ARG(padapter));
return -EINVAL;
}
#else
if (num < 1) {
RTW_INFO(FUNC_ADPT_FMT ": input parameters < 1\n", FUNC_ADPT_ARG(padapter));
return -EINVAL;
}
#endif
/* This register sets the Ack time out value after Tx unicast packet. It is in units of us. */
rtw_write8(padapter, REG_ACKTO, (u8)ack_timeout_ms);
#ifdef CONFIG_RTL8821C
/* This register sets the Ack time out value after Tx unicast CCK packet. It is in units of us. */
rtw_write8(padapter, REG_ACKTO_CCK_8821C, (u8)ack_timeout_ms_cck);
RTW_INFO("Set CCK packet ACK Timeout to %d us.\n", ack_timeout_ms_cck);
RTW_INFO("Set non-CCK packet ACK Timeout to %d us.\n", ack_timeout_ms);
#else
RTW_INFO("Set ACK Timeout to %d us.\n", ack_timeout_ms);
#endif
}
return count;

45
core/rtw_eeprom.c
View file

@ -161,19 +161,6 @@ out:
void eeprom_write16(_adapter *padapter, u16 reg, u16 data)
{
u8 x;
#ifdef CONFIG_RTL8712
u8 tmp8_ori, tmp8_new, tmp8_clk_ori, tmp8_clk_new;
tmp8_ori = rtw_read8(padapter, 0x102502f1);
tmp8_new = tmp8_ori & 0xf7;
if (tmp8_ori != tmp8_new) {
rtw_write8(padapter, 0x102502f1, tmp8_new);
}
tmp8_clk_ori = rtw_read8(padapter, 0x10250003);
tmp8_clk_new = tmp8_clk_ori | 0x20;
if (tmp8_clk_new != tmp8_clk_ori) {
rtw_write8(padapter, 0x10250003, tmp8_clk_new);
}
#endif
x = rtw_read8(padapter, EE_9346CR);
@ -226,13 +213,6 @@ void eeprom_write16(_adapter *padapter, u16 reg, u16 data)
eeprom_clean(padapter);
exit:
#ifdef CONFIG_RTL8712
if (tmp8_clk_new != tmp8_clk_ori)
rtw_write8(padapter, 0x10250003, tmp8_clk_ori);
if (tmp8_new != tmp8_ori)
rtw_write8(padapter, 0x102502f1, tmp8_ori);
#endif
return;
}
@ -241,19 +221,6 @@ u16 eeprom_read16(_adapter *padapter, u16 reg) /* ReadEEprom */
u16 x;
u16 data = 0;
#ifdef CONFIG_RTL8712
u8 tmp8_ori, tmp8_new, tmp8_clk_ori, tmp8_clk_new;
tmp8_ori = rtw_read8(padapter, 0x102502f1);
tmp8_new = tmp8_ori & 0xf7;
if (tmp8_ori != tmp8_new) {
rtw_write8(padapter, 0x102502f1, tmp8_new);
}
tmp8_clk_ori = rtw_read8(padapter, 0x10250003);
tmp8_clk_new = tmp8_clk_ori | 0x20;
if (tmp8_clk_new != tmp8_clk_ori) {
rtw_write8(padapter, 0x10250003, tmp8_clk_new);
}
#endif
if (rtw_is_surprise_removed(padapter)) {
goto out;
@ -279,21 +246,9 @@ u16 eeprom_read16(_adapter *padapter, u16 reg) /* ReadEEprom */
eeprom_clean(padapter);
out:
#ifdef CONFIG_RTL8712
if (tmp8_clk_new != tmp8_clk_ori)
rtw_write8(padapter, 0x10250003, tmp8_clk_ori);
if (tmp8_new != tmp8_ori)
rtw_write8(padapter, 0x102502f1, tmp8_ori);
#endif
return data;
}
/* From even offset */
void eeprom_read_sz(_adapter *padapter, u16 reg, u8 *data, u32 sz)
{

308
core/rtw_efuse.c
View file

@ -67,105 +67,8 @@ static BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
if (pAdapter->registrypriv.boffefusemask)
return FALSE;
#if DEV_BUS_TYPE == RT_USB_INTERFACE
#if defined(CONFIG_RTL8188E)
if (IS_HARDWARE_TYPE_8188E(pAdapter))
return (IS_MASKED(8188E, _MUSB, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8812A)
if (IS_HARDWARE_TYPE_8812(pAdapter))
return (IS_MASKED(8812A, _MUSB, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8821A)
#if 0
if (IS_HARDWARE_TYPE_8811AU(pAdapter))
return (IS_MASKED(8811A, _MUSB, Offset)) ? TRUE : FALSE;
#endif
if (IS_HARDWARE_TYPE_8821(pAdapter))
return (IS_MASKED(8821A, _MUSB, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8192E)
if (IS_HARDWARE_TYPE_8192E(pAdapter))
return (IS_MASKED(8192E, _MUSB, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8723B)
if (IS_HARDWARE_TYPE_8723B(pAdapter))
return (IS_MASKED(8723B, _MUSB, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8703B)
if (IS_HARDWARE_TYPE_8703B(pAdapter))
return (IS_MASKED(8703B, _MUSB, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8814A)
if (IS_HARDWARE_TYPE_8814A(pAdapter))
return (IS_MASKED(8814A, _MUSB, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8188F)
if (IS_HARDWARE_TYPE_8188F(pAdapter))
return (IS_MASKED(8188F, _MUSB, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8822B)
if (IS_HARDWARE_TYPE_8822B(pAdapter))
return (IS_MASKED(8822B, _MUSB, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8723D)
if (IS_HARDWARE_TYPE_8723D(pAdapter))
return (IS_MASKED(8723D, _MUSB, Offset)) ? TRUE : FALSE;
#endif
/*#if defined(CONFIG_RTL8821C)
if (IS_HARDWARE_TYPE_8821C(pAdapter))
return (IS_MASKED(8821C,_MUSB,Offset)) ? TRUE : FALSE;
#endif*/
#elif DEV_BUS_TYPE == RT_PCI_INTERFACE
#if defined(CONFIG_RTL8188E)
if (IS_HARDWARE_TYPE_8188E(pAdapter))
return (IS_MASKED(8188E, _MPCIE, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8192E)
if (IS_HARDWARE_TYPE_8192E(pAdapter))
return (IS_MASKED(8192E, _MPCIE, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8812A)
if (IS_HARDWARE_TYPE_8812(pAdapter))
return (IS_MASKED(8812A, _MPCIE, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8821A)
if (IS_HARDWARE_TYPE_8821(pAdapter))
return (IS_MASKED(8821A, _MPCIE, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8723B)
if (IS_HARDWARE_TYPE_8723B(pAdapter))
return (IS_MASKED(8723B, _MPCIE, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8814A)
if (IS_HARDWARE_TYPE_8814A(pAdapter))
return (IS_MASKED(8814A, _MPCIE, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8822B)
if (IS_HARDWARE_TYPE_8822B(pAdapter))
return (IS_MASKED(8822B, _MPCIE, Offset)) ? TRUE : FALSE;
#endif
#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
#ifdef CONFIG_RTL8188E_SDIO
if (IS_HARDWARE_TYPE_8188E(pAdapter))
return (IS_MASKED(8188E, _MSDIO, Offset)) ? TRUE : FALSE;
#endif
#ifdef CONFIG_RTL8188F_SDIO
if (IS_HARDWARE_TYPE_8188F(pAdapter))
return (IS_MASKED(8188F, _MSDIO, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8821C)
if (IS_HARDWARE_TYPE_8821C(pAdapter))
return (IS_MASKED(8821C, _MSDIO, Offset)) ? TRUE : FALSE;
#endif
#if defined(CONFIG_RTL8822B)
if (IS_HARDWARE_TYPE_8822B(pAdapter))
return (IS_MASKED(8822B, _MSDIO, Offset)) ? TRUE : FALSE;
#endif
#endif
return FALSE;
}
@ -174,188 +77,16 @@ void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
#if DEV_BUS_TYPE == RT_USB_INTERFACE
#if defined(CONFIG_RTL8188E)
if (IS_HARDWARE_TYPE_8188E(pAdapter))
GET_MASK_ARRAY(8188E, _MUSB, pArray);
#endif
#if defined(CONFIG_RTL8812A)
if (IS_HARDWARE_TYPE_8812(pAdapter))
GET_MASK_ARRAY(8812A, _MUSB, pArray);
#endif
#if defined(CONFIG_RTL8821A)
if (IS_HARDWARE_TYPE_8821(pAdapter))
GET_MASK_ARRAY(8821A, _MUSB, pArray);
#endif
#if defined(CONFIG_RTL8192E)
if (IS_HARDWARE_TYPE_8192E(pAdapter))
GET_MASK_ARRAY(8192E, _MUSB, pArray);
#endif
#if defined(CONFIG_RTL8723B)
if (IS_HARDWARE_TYPE_8723B(pAdapter))
GET_MASK_ARRAY(8723B, _MUSB, pArray);
#endif
#if defined(CONFIG_RTL8703B)
if (IS_HARDWARE_TYPE_8703B(pAdapter))
GET_MASK_ARRAY(8703B, _MUSB, pArray);
#endif
#if defined(CONFIG_RTL8188F)
if (IS_HARDWARE_TYPE_8188F(pAdapter))
GET_MASK_ARRAY(8188F, _MUSB, pArray);
#endif
#if defined(CONFIG_RTL8814A)
if (IS_HARDWARE_TYPE_8814A(pAdapter))
GET_MASK_ARRAY(8814A, _MUSB, pArray);
#endif
#if defined(CONFIG_RTL8822B)
if (IS_HARDWARE_TYPE_8822B(pAdapter))
GET_MASK_ARRAY(8822B, _MUSB, pArray);
#endif
/*#if defined(CONFIG_RTL8821C)
if (IS_HARDWARE_TYPE_8821C(pAdapter))
GET_MASK_ARRAY(8821C,_MUSB,pArray);
#endif*/
#elif DEV_BUS_TYPE == RT_PCI_INTERFACE
#if defined(CONFIG_RTL8188E)
if (IS_HARDWARE_TYPE_8188E(pAdapter))
GET_MASK_ARRAY(8188E, _MPCIE, pArray);
#endif
#if defined(CONFIG_RTL8192E)
if (IS_HARDWARE_TYPE_8192E(pAdapter))
GET_MASK_ARRAY(8192E, _MPCIE, pArray);
#endif
#if defined(CONFIG_RTL8812A)
if (IS_HARDWARE_TYPE_8812(pAdapter))
GET_MASK_ARRAY(8812A, _MPCIE, pArray);
#endif
#if defined(CONFIG_RTL8821A)
if (IS_HARDWARE_TYPE_8821(pAdapter))
GET_MASK_ARRAY(8821A, _MPCIE, pArray);
#endif
#if defined(CONFIG_RTL8723B)
if (IS_HARDWARE_TYPE_8723B(pAdapter))
GET_MASK_ARRAY(8723B, _MPCIE, pArray);
#endif
#if defined(CONFIG_RTL8814A)
if (IS_HARDWARE_TYPE_8814A(pAdapter))
GET_MASK_ARRAY(8814A, _MPCIE, pArray);
#endif
#if defined(CONFIG_RTL8822B)
if (IS_HARDWARE_TYPE_8822B(pAdapter))
GET_MASK_ARRAY(8822B, _MPCIE, pArray);
#endif
#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
#if defined(CONFIG_RTL8188E)
if (IS_HARDWARE_TYPE_8188E(pAdapter))
GET_MASK_ARRAY(8188E, _MSDIO, pArray);
#endif
#if defined(CONFIG_RTL8188F)
if (IS_HARDWARE_TYPE_8188F(pAdapter))
GET_MASK_ARRAY(8188F, _MSDIO, pArray);
#endif
#if defined(CONFIG_RTL8821C)
if (IS_HARDWARE_TYPE_8821C(pAdapter))
GET_MASK_ARRAY(8821C , _MSDIO, pArray);
#endif
#if defined(CONFIG_RTL8822B)
if (IS_HARDWARE_TYPE_8822B(pAdapter))
GET_MASK_ARRAY(8822B , _MSDIO, pArray);
#endif
#endif /*#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE*/
}
u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if DEV_BUS_TYPE == RT_USB_INTERFACE
#if defined(CONFIG_RTL8188E)
if (IS_HARDWARE_TYPE_8188E(pAdapter))
return GET_MASK_ARRAY_LEN(8188E, _MUSB);
#endif
#if defined(CONFIG_RTL8812A)
if (IS_HARDWARE_TYPE_8812(pAdapter))
return GET_MASK_ARRAY_LEN(8812A, _MUSB);
#endif
#if defined(CONFIG_RTL8821A)
if (IS_HARDWARE_TYPE_8821(pAdapter))
return GET_MASK_ARRAY_LEN(8821A, _MUSB);
#endif
#if defined(CONFIG_RTL8192E)
if (IS_HARDWARE_TYPE_8192E(pAdapter))
return GET_MASK_ARRAY_LEN(8192E, _MUSB);
#endif
#if defined(CONFIG_RTL8723B)
if (IS_HARDWARE_TYPE_8723B(pAdapter))
return GET_MASK_ARRAY_LEN(8723B, _MUSB);
#endif
#if defined(CONFIG_RTL8703B)
if (IS_HARDWARE_TYPE_8703B(pAdapter))
return GET_MASK_ARRAY_LEN(8703B, _MUSB);
#endif
#if defined(CONFIG_RTL8188F)
if (IS_HARDWARE_TYPE_8188F(pAdapter))
return GET_MASK_ARRAY_LEN(8188F, _MUSB);
#endif
#if defined(CONFIG_RTL8814A)
if (IS_HARDWARE_TYPE_8814A(pAdapter))
return GET_MASK_ARRAY_LEN(8814A, _MUSB);
#endif
#if defined(CONFIG_RTL8822B)
if (IS_HARDWARE_TYPE_8822B(pAdapter))
return GET_MASK_ARRAY_LEN(8822B, _MUSB);
#endif
/*#if defined(CONFIG_RTL8821C)
if (IS_HARDWARE_TYPE_8821C(pAdapter))
return GET_MASK_ARRAY_LEN(8821C,_MUSB);
#endif*/
#elif DEV_BUS_TYPE == RT_PCI_INTERFACE
#if defined(CONFIG_RTL8188E)
if (IS_HARDWARE_TYPE_8188E(pAdapter))
return GET_MASK_ARRAY_LEN(8188E, _MPCIE);
#endif
#if defined(CONFIG_RTL8192E)
if (IS_HARDWARE_TYPE_8192E(pAdapter))
return GET_MASK_ARRAY_LEN(8192E, _MPCIE);
#endif
#if defined(CONFIG_RTL8812A)
if (IS_HARDWARE_TYPE_8812(pAdapter))
return GET_MASK_ARRAY_LEN(8812A, _MPCIE);
#endif
#if defined(CONFIG_RTL8821A)
if (IS_HARDWARE_TYPE_8821(pAdapter))
return GET_MASK_ARRAY_LEN(8821A, _MPCIE);
#endif
#if defined(CONFIG_RTL8723B)
if (IS_HARDWARE_TYPE_8723B(pAdapter))
return GET_MASK_ARRAY_LEN(8723B, _MPCIE);
#endif
#if defined(CONFIG_RTL8814A)
if (IS_HARDWARE_TYPE_8814A(pAdapter))
return GET_MASK_ARRAY_LEN(8814A, _MPCIE);
#endif
#if defined(CONFIG_RTL8822B)
if (IS_HARDWARE_TYPE_8822B(pAdapter))
return GET_MASK_ARRAY_LEN(8822B, _MPCIE);
#endif
#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
#if defined(CONFIG_RTL8188E)
if (IS_HARDWARE_TYPE_8188E(pAdapter))
return GET_MASK_ARRAY_LEN(8188E, _MSDIO);
#endif
#if defined(CONFIG_RTL8188F)
if (IS_HARDWARE_TYPE_8188F(pAdapter))
return GET_MASK_ARRAY_LEN(8188F, _MSDIO);
#endif
#if defined(CONFIG_RTL8821C)
if (IS_HARDWARE_TYPE_8821C(pAdapter))
return GET_MASK_ARRAY_LEN(8821C, _MSDIO);
#endif
#if defined(CONFIG_RTL8822B)
if (IS_HARDWARE_TYPE_8822B(pAdapter))
return GET_MASK_ARRAY_LEN(8822B, _MSDIO);
#endif
#endif
return 0;
}
@ -1440,41 +1171,12 @@ static VOID efuse_PreUpdateAction(
PADAPTER pAdapter,
pu4Byte BackupRegs)
{
#if defined(CONFIG_RTL8812A)
if (IS_HARDWARE_TYPE_8812AU(pAdapter)) {
/* <20131115, Kordan> Turn off Rx to prevent from being busy when writing the EFUSE. (Asked by Chunchu.)*/
BackupRegs[0] = phy_query_mac_reg(pAdapter, REG_RCR, bMaskDWord);
BackupRegs[1] = phy_query_mac_reg(pAdapter, REG_RXFLTMAP0, bMaskDWord);
BackupRegs[2] = phy_query_mac_reg(pAdapter, REG_RXFLTMAP0+4, bMaskDWord);
BackupRegs[3] = phy_query_mac_reg(pAdapter, REG_AFE_MISC, bMaskDWord);
PlatformEFIOWrite4Byte(pAdapter, REG_RCR, 0x1);
PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0, 0);
PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+1, 0);
PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+2, 0);
PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+3, 0);
PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+4, 0);
PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+5, 0);
/* <20140410, Kordan> 0x11 = 0x4E, lower down LX_SPS0 voltage. (Asked by Chunchu)*/
phy_set_mac_reg(pAdapter, REG_AFE_MISC, bMaskByte1, 0x4E);
}
#endif
}
static VOID efuse_PostUpdateAction(
PADAPTER pAdapter,
pu4Byte BackupRegs)
{
#if defined(CONFIG_RTL8812A)
if (IS_HARDWARE_TYPE_8812AU(pAdapter)) {
/* <20131115, Kordan> Turn on Rx and restore the registers. (Asked by Chunchu.)*/
phy_set_mac_reg(pAdapter, REG_RCR, bMaskDWord, BackupRegs[0]);
phy_set_mac_reg(pAdapter, REG_RXFLTMAP0, bMaskDWord, BackupRegs[1]);
phy_set_mac_reg(pAdapter, REG_RXFLTMAP0+4, bMaskDWord, BackupRegs[2]);
phy_set_mac_reg(pAdapter, REG_AFE_MISC, bMaskDWord, BackupRegs[3]);
}
#endif
}
@ -2125,16 +1827,6 @@ u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data)
if (data[idx] != map[addr + idx]) {
word_en &= ~BIT(i >> 1);
newdata[i] = data[idx];
#ifdef CONFIG_RTL8723B
if (addr + idx == 0x8) {
if (IS_C_CUT(pHalData->version_id) || IS_B_CUT(pHalData->version_id)) {
if (pHalData->adjuseVoltageVal == 6) {
newdata[i] = map[addr + idx];
RTW_INFO(" %s ,\n adjuseVoltageVal = %d ,newdata[%d] = %x\n", __func__, pHalData->adjuseVoltageVal, i, newdata[i]);
}
}
}
#endif
}
}

39
core/rtw_mlme.c
View file

@ -1135,26 +1135,6 @@ void rtw_survey_event_callback(_adapter *adapter, u8 *pbuf)
pnetwork = (WLAN_BSSID_EX *)pbuf;
#ifdef CONFIG_RTL8712
/* endian_convert */
pnetwork->Length = le32_to_cpu(pnetwork->Length);
pnetwork->Ssid.SsidLength = le32_to_cpu(pnetwork->Ssid.SsidLength);
pnetwork->Privacy = le32_to_cpu(pnetwork->Privacy);
pnetwork->Rssi = le32_to_cpu(pnetwork->Rssi);
pnetwork->NetworkTypeInUse = le32_to_cpu(pnetwork->NetworkTypeInUse);
pnetwork->Configuration.ATIMWindow = le32_to_cpu(pnetwork->Configuration.ATIMWindow);
pnetwork->Configuration.BeaconPeriod = le32_to_cpu(pnetwork->Configuration.BeaconPeriod);
pnetwork->Configuration.DSConfig = le32_to_cpu(pnetwork->Configuration.DSConfig);
pnetwork->Configuration.FHConfig.DwellTime = le32_to_cpu(pnetwork->Configuration.FHConfig.DwellTime);
pnetwork->Configuration.FHConfig.HopPattern = le32_to_cpu(pnetwork->Configuration.FHConfig.HopPattern);
pnetwork->Configuration.FHConfig.HopSet = le32_to_cpu(pnetwork->Configuration.FHConfig.HopSet);
pnetwork->Configuration.FHConfig.Length = le32_to_cpu(pnetwork->Configuration.FHConfig.Length);
pnetwork->Configuration.Length = le32_to_cpu(pnetwork->Configuration.Length);
pnetwork->InfrastructureMode = le32_to_cpu(pnetwork->InfrastructureMode);
pnetwork->IELength = le32_to_cpu(pnetwork->IELength);
#endif
len = get_WLAN_BSSID_EX_sz(pnetwork);
if (len > (sizeof(WLAN_BSSID_EX))) {
return;
@ -2290,12 +2270,6 @@ void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf)
mlmeext_sta_add_event_callback(adapter, psta);
#ifdef CONFIG_RTL8711
/* submit SetStaKey_cmd to tell fw, fw will allocate an CAM entry for this sta */
rtw_setstakey_cmd(adapter, psta, GROUP_KEY, _TRUE);
#endif
exit:
return;
}
@ -4051,19 +4025,6 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui
RTW_INFO("%s IEEE80211_HT_CAP_MAX_AMSDU is set\n", __FUNCTION__);
ht_capie.cap_info = ht_capie.cap_info | cpu_to_le16(IEEE80211_HT_CAP_MAX_AMSDU);
}
/*
AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k
AMPDU_para [4:2]:Min MPDU Start Spacing
*/
/*
#if defined(CONFIG_RTL8188E) && defined(CONFIG_SDIO_HCI)
ht_capie.ampdu_params_info = 2;
#else
ht_capie.ampdu_params_info = (IEEE80211_HT_CAP_AMPDU_FACTOR&0x03);
#endif
*/
if (padapter->driver_rx_ampdu_factor != 0xFF)
max_rx_ampdu_factor = (HT_CAP_AMPDU_FACTOR)padapter->driver_rx_ampdu_factor;
else

4
core/rtw_mlme_ext.c
View file

@ -9855,11 +9855,7 @@ static int issue_action_ba(_adapter *padapter, unsigned char *raddr, unsigned ch
} while (pmlmeinfo->dialogToken == 0);
pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->dialogToken), &(pattrib->pktlen));
#if defined(CONFIG_RTL8188E) && defined(CONFIG_SDIO_HCI)
BA_para_set = (0x0802 | ((tid & 0xf) << 2)); /* immediate ack & 16 buffer size */
#else
BA_para_set = (0x1002 | ((tid & 0xf) << 2)); /* immediate ack & 64 buffer size */
#endif
#ifdef CONFIG_TX_AMSDU
if (padapter->tx_amsdu >= 1) /* TX AMSDU enabled */

655
core/rtw_mp.c
View file

@ -21,9 +21,6 @@
#include <drv_types.h>
#include "../hal/phydm/phydm_precomp.h"
#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A)
#include <rtw_bt_mp.h>
#endif
#ifdef CONFIG_MP_VHT_HW_TX_MODE
#define CEILING_POS(X) ((X - (int)(X)) > 0 ? (int)(X + 1) : (int)(X))
@ -323,56 +320,8 @@ static VOID PHY_SetRFPathSwitch_default(
static void mpt_InitHWConfig(PADAPTER Adapter)
{
if (IS_HARDWARE_TYPE_8723B(Adapter)) {
/* TODO: <20130114, Kordan> The following setting is only for DPDT and Fixed board type. */
/* TODO: A better solution is configure it according EFUSE during the run-time. */
phy_set_mac_reg(Adapter, 0x64, BIT20, 0x0); /* 0x66[4]=0 */
phy_set_mac_reg(Adapter, 0x64, BIT24, 0x0); /* 0x66[8]=0 */
phy_set_mac_reg(Adapter, 0x40, BIT4, 0x0); /* 0x40[4]=0 */
phy_set_mac_reg(Adapter, 0x40, BIT3, 0x1); /* 0x40[3]=1 */
phy_set_mac_reg(Adapter, 0x4C, BIT24, 0x1); /* 0x4C[24:23]=10 */
phy_set_mac_reg(Adapter, 0x4C, BIT23, 0x0); /* 0x4C[24:23]=10 */
phy_set_bb_reg(Adapter, 0x944, BIT1 | BIT0, 0x3); /* 0x944[1:0]=11 */
phy_set_bb_reg(Adapter, 0x930, bMaskByte0, 0x77);/* 0x930[7:0]=77 */
phy_set_mac_reg(Adapter, 0x38, BIT11, 0x1);/* 0x38[11]=1 */
/* TODO: <20130206, Kordan> The default setting is wrong, hard-coded here. */
phy_set_mac_reg(Adapter, 0x778, 0x3, 0x3); /* Turn off hardware PTA control (Asked by Scott) */
phy_set_mac_reg(Adapter, 0x64, bMaskDWord, 0x36000000);/* Fix BT S0/S1 */
phy_set_mac_reg(Adapter, 0x948, bMaskDWord, 0x0); /* Fix BT can't Tx */
/* <20130522, Kordan> Turn off equalizer to improve Rx sensitivity. (Asked by EEChou) */
phy_set_bb_reg(Adapter, 0xA00, BIT8, 0x0); /*0xA01[0] = 0*/
} else if (IS_HARDWARE_TYPE_8821(Adapter)) {
/* <20131121, VincentL> Add for 8821AU DPDT setting and fix switching antenna issue (Asked by Rock)
<20131122, VincentL> Enable for all 8821A/8811AU (Asked by Alex)*/
phy_set_mac_reg(Adapter, 0x4C, BIT23, 0x0); /*0x4C[23:22]=01*/
phy_set_mac_reg(Adapter, 0x4C, BIT22, 0x1); /*0x4C[23:22]=01*/
} else if (IS_HARDWARE_TYPE_8188ES(Adapter))
if (IS_HARDWARE_TYPE_8188ES(Adapter))
phy_set_mac_reg(Adapter, 0x4C , BIT23, 0); /*select DPDT_P and DPDT_N as output pin*/
#ifdef CONFIG_RTL8814A
else if (IS_HARDWARE_TYPE_8814A(Adapter))
PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8814A, 0x2000);
#endif
#ifdef CONFIG_RTL8822B
else if (IS_HARDWARE_TYPE_8822B(Adapter)) {
u32 tmp_reg = 0;
PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8822B, 0x2000);
/* fixed wifi can't 2.4g tx suggest by Szuyitasi 20160504 */
phy_set_bb_reg(Adapter, 0x70, bMaskByte3, 0x0e);
RTW_INFO(" 0x73 = 0x%x\n", phy_query_bb_reg(Adapter, 0x70, bMaskByte3));
phy_set_bb_reg(Adapter, 0x1704, bMaskDWord, 0x0000ff00);
RTW_INFO(" 0x1704 = 0x%x\n", phy_query_bb_reg(Adapter, 0x1704, bMaskDWord));
phy_set_bb_reg(Adapter, 0x1700, bMaskDWord, 0xc00f0038);
RTW_INFO(" 0x1700 = 0x%x\n", phy_query_bb_reg(Adapter, 0x1700, bMaskDWord));
}
#endif /* CONFIG_RTL8822B */
#ifdef CONFIG_RTL8821C
else if (IS_HARDWARE_TYPE_8821C(Adapter))
PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8821C, 0x2000);
#endif /* CONFIG_RTL8821C */
}
static void PHY_IQCalibrate(PADAPTER padapter, u8 bReCovery)
@ -381,159 +330,25 @@ static void PHY_IQCalibrate(PADAPTER padapter, u8 bReCovery)
u8 b2ant; /* false:1ant, true:2-ant */
u8 RF_Path; /* 0:S1, 1:S0 */
if (IS_HARDWARE_TYPE_8723B(padapter)) {
#ifdef CONFIG_RTL8723B
pHalData = GET_HAL_DATA(padapter);
b2ant = pHalData->EEPROMBluetoothAntNum == Ant_x2 ? _TRUE : _FALSE;
phy_iq_calibrate_8723b(padapter, bReCovery, _FALSE, b2ant, pHalData->ant_path);
#endif
} else if (IS_HARDWARE_TYPE_8188E(padapter)) {
#ifdef CONFIG_RTL8188E
if (IS_HARDWARE_TYPE_8188E(padapter))
phy_iq_calibrate_8188e(padapter, bReCovery);
#endif
} else if (IS_HARDWARE_TYPE_8814A(padapter)) {
#ifdef CONFIG_RTL8814A
phy_iq_calibrate_8814a(&(GET_HAL_DATA(padapter)->odmpriv), bReCovery);
#endif
} else if (IS_HARDWARE_TYPE_8812(padapter)) {
#ifdef CONFIG_RTL8812A
phy_iq_calibrate_8812a(padapter, bReCovery);
#endif
} else if (IS_HARDWARE_TYPE_8821(padapter)) {
#ifdef CONFIG_RTL8821A
phy_iq_calibrate_8821a(&(GET_HAL_DATA(padapter)->odmpriv), bReCovery);
#endif
} else if (IS_HARDWARE_TYPE_8192E(padapter)) {
#ifdef CONFIG_RTL8192E
phy_iq_calibrate_8192e(padapter, bReCovery);
#endif
} else if (IS_HARDWARE_TYPE_8703B(padapter)) {
#ifdef CONFIG_RTL8703B
phy_iq_calibrate_8703b(padapter, bReCovery);
#endif
} else if (IS_HARDWARE_TYPE_8188F(padapter)) {
#ifdef CONFIG_RTL8188F
phy_iq_calibrate_8188f(padapter, bReCovery, _FALSE);
#endif
} else if (IS_HARDWARE_TYPE_8822B(padapter)) {
#ifdef CONFIG_RTL8822B
phy_iq_calibrate_8822b(&(GET_HAL_DATA(padapter)->odmpriv), bReCovery);
#endif
} else if (IS_HARDWARE_TYPE_8723D(padapter)) {
#ifdef CONFIG_RTL8723D
phy_iq_calibrate_8723d(padapter, bReCovery);
#endif
} else if (IS_HARDWARE_TYPE_8821C(padapter)) {
#ifdef CONFIG_RTL8821C
phy_iq_calibrate_8821c(&(GET_HAL_DATA(padapter)->odmpriv), bReCovery);
#endif
}
}
static void PHY_LCCalibrate(PADAPTER padapter)
{
if (IS_HARDWARE_TYPE_8723B(padapter)) {
#ifdef CONFIG_RTL8723B
phy_lc_calibrate_8723b(&(GET_HAL_DATA(padapter)->odmpriv));
#endif
} else if (IS_HARDWARE_TYPE_8188E(padapter)) {
#ifdef CONFIG_RTL8188E
if (IS_HARDWARE_TYPE_8188E(padapter))
phy_lc_calibrate_8188e(&(GET_HAL_DATA(padapter)->odmpriv));
#endif
} else if (IS_HARDWARE_TYPE_8814A(padapter)) {
#ifdef CONFIG_RTL8814A
phy_lc_calibrate_8814a(&(GET_HAL_DATA(padapter)->odmpriv));
#endif
} else if (IS_HARDWARE_TYPE_8812(padapter)) {
#ifdef CONFIG_RTL8812A
phy_lc_calibrate_8812a(&(GET_HAL_DATA(padapter)->odmpriv));
#endif
} else if (IS_HARDWARE_TYPE_8821(padapter)) {
#ifdef CONFIG_RTL8821A
phy_lc_calibrate_8821a(&(GET_HAL_DATA(padapter)->odmpriv));
#endif
} else if (IS_HARDWARE_TYPE_8192E(padapter)) {
#ifdef CONFIG_RTL8192E
phy_lc_calibrate_8192e(&(GET_HAL_DATA(padapter)->odmpriv));
#endif
} else if (IS_HARDWARE_TYPE_8703B(padapter)) {
#ifdef CONFIG_RTL8703B
phy_lc_calibrate_8703b(&(GET_HAL_DATA(padapter)->odmpriv));
#endif
} else if (IS_HARDWARE_TYPE_8188F(padapter)) {
#ifdef CONFIG_RTL8188F
phy_lc_calibrate_8188f(&(GET_HAL_DATA(padapter)->odmpriv));
#endif
} else if (IS_HARDWARE_TYPE_8822B(padapter)) {
#ifdef CONFIG_RTL8822B
phy_lc_calibrate_8822b(&(GET_HAL_DATA(padapter)->odmpriv));
#endif
} else if (IS_HARDWARE_TYPE_8723D(padapter)) {
#ifdef CONFIG_RTL8723D
phy_lc_calibrate_8723d(&(GET_HAL_DATA(padapter)->odmpriv));
#endif
} else if (IS_HARDWARE_TYPE_8821C(padapter)) {
}
}
static u8 PHY_QueryRFPathSwitch(PADAPTER padapter)
{
u8 bmain = 0;
if (IS_HARDWARE_TYPE_8821C(padapter)) {
#ifdef CONFIG_RTL8821C
bmain = phy_query_rf_path_switch_8821c(padapter);
#endif
}
return bmain;
return 0;
}
static void PHY_SetRFPathSwitch(PADAPTER padapter , BOOLEAN bMain) {
if (IS_HARDWARE_TYPE_8723B(padapter)) {
#ifdef CONFIG_RTL8723B
phy_set_rf_path_switch_8723b(padapter, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8188E(padapter)) {
#ifdef CONFIG_RTL8188E
if (IS_HARDWARE_TYPE_8188E(padapter))
phy_set_rf_path_switch_8188e(padapter, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8814A(padapter)) {
#ifdef CONFIG_RTL8814A
phy_set_rf_path_switch_8814a(padapter, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8812(padapter) || IS_HARDWARE_TYPE_8821(padapter)) {
#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
phy_set_rf_path_switch_8812a(padapter, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8192E(padapter)) {
#ifdef CONFIG_RTL8192E
phy_set_rf_path_switch_8192e(padapter, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8703B(padapter)) {
#ifdef CONFIG_RTL8703B
phy_set_rf_path_switch_8703b(padapter, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8188F(padapter)) {
#ifdef CONFIG_RTL8188F
phy_set_rf_path_switch_8188f(padapter, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8822B(padapter)) {
#ifdef CONFIG_RTL8822B
phy_set_rf_path_switch_8822b(padapter, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8723D(padapter)) {
#ifdef CONFIG_RTL8723D
phy_set_rf_path_switch_8723d(padapter, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8821C(padapter)) {
#ifdef CONFIG_RTL8821C
phy_set_rf_path_switch_8821c(padapter, bMain);
#endif
}
}
s32
@ -553,34 +368,9 @@ MPT_InitializeAdapter(
pMptCtx->bMptIndexEven = _TRUE; /* default gain index is -6.0db */
pMptCtx->h2cReqNum = 0x0;
/* init for BT MP */
#if defined(CONFIG_RTL8723B)
pMptCtx->bMPh2c_timeout = _FALSE;
pMptCtx->MptH2cRspEvent = _FALSE;
pMptCtx->MptBtC2hEvent = _FALSE;
_rtw_init_sema(&pMptCtx->MPh2c_Sema, 0);
_init_timer(&pMptCtx->MPh2c_timeout_timer, pAdapter->pnetdev, MPh2c_timeout_handle, pAdapter);
#endif
mpt_InitHWConfig(pAdapter);
#ifdef CONFIG_RTL8723B
rtl8723b_InitAntenna_Selection(pAdapter);
if (IS_HARDWARE_TYPE_8723B(pAdapter)) {
/* <20130522, Kordan> Turn off equalizer to improve Rx sensitivity. (Asked by EEChou)*/
phy_set_bb_reg(pAdapter, 0xA00, BIT8, 0x0);
PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); /*default use Main*/
/*<20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten. */
if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90))
phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E);
else
phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E);
}
/*set ant to wifi side in mp mode*/
rtw_write16(pAdapter, 0x870, 0x300);
rtw_write16(pAdapter, 0x860, 0x110);
#endif
pMptCtx->bMptWorkItemInProgress = _FALSE;
pMptCtx->CurrMptAct = NULL;
pMptCtx->mpt_rf_path = ODM_RF_PATH_A;
@ -600,18 +390,8 @@ MPT_InitializeAdapter(
pMptCtx->backup0xc30 = (u1Byte)phy_query_bb_reg(pAdapter, rOFDM0_RxDetector1, bMaskByte0);
pMptCtx->backup0x52_RF_A = (u1Byte)phy_query_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0);
pMptCtx->backup0x52_RF_B = (u1Byte)phy_query_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0);
#ifdef CONFIG_RTL8188E
rtw_write32(pAdapter, REG_MACID_NO_LINK_0, 0x0);
rtw_write32(pAdapter, REG_MACID_NO_LINK_1, 0x0);
#endif
#ifdef CONFIG_RTL8814A
if (IS_HARDWARE_TYPE_8814A(pAdapter)) {
pHalData->BackUp_IG_REG_4_Chnl_Section[0] = (u1Byte)phy_query_bb_reg(pAdapter, rA_IGI_Jaguar, bMaskByte0);
pHalData->BackUp_IG_REG_4_Chnl_Section[1] = (u1Byte)phy_query_bb_reg(pAdapter, rB_IGI_Jaguar, bMaskByte0);
pHalData->BackUp_IG_REG_4_Chnl_Section[2] = (u1Byte)phy_query_bb_reg(pAdapter, rC_IGI_Jaguar2, bMaskByte0);
pHalData->BackUp_IG_REG_4_Chnl_Section[3] = (u1Byte)phy_query_bb_reg(pAdapter, rD_IGI_Jaguar2, bMaskByte0);
}
#endif
return rtStatus;
}
@ -640,13 +420,6 @@ MPT_DeInitAdapter(
PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.mpt_ctx;
pMptCtx->bMptDrvUnload = _TRUE;
#if defined(CONFIG_RTL8723B)
_rtw_free_sema(&(pMptCtx->MPh2c_Sema));
_cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer);
#endif
#if defined(CONFIG_RTL8723B)
phy_set_bb_reg(pAdapter, 0xA01, BIT0, 1); /* /suggestion by jerry for MP Rx. */
#endif
}
static u8 mpt_ProStartTest(PADAPTER padapter)
@ -889,37 +662,7 @@ s32 mp_start_test(PADAPTER padapter)
/* 3 disable dynamic mechanism */
disable_dm(padapter);
#ifdef CONFIG_RTL8814A
rtl8814_InitHalDm(padapter);
#endif /* CONFIG_RTL8814A */
#ifdef CONFIG_RTL8822B
rtl8822b_phy_init_haldm(padapter);
#endif /* CONFIG_RTL8822B */
#ifdef CONFIG_RTL8821C
rtl8821c_phy_init_haldm(padapter);
#endif /* CONFIG_RTL8821C */
#ifdef CONFIG_RTL8812A
rtl8812_InitHalDm(padapter);
#endif /* CONFIG_RTL8812A */
#ifdef CONFIG_RTL8723B
rtl8723b_InitHalDm(padapter);
#endif /* CONFIG_RTL8723B */
#ifdef CONFIG_RTL8703B
rtl8703b_InitHalDm(padapter);
#endif /* CONFIG_RTL8703B */
#ifdef CONFIG_RTL8192E
rtl8192e_InitHalDm(padapter);
#endif
#ifdef CONFIG_RTL8188F
rtl8188f_InitHalDm(padapter);
#endif
#ifdef CONFIG_RTL8188E
rtl8188e_InitHalDm(padapter);
#endif
#ifdef CONFIG_RTL8723D
rtl8723d_InitHalDm(padapter);
#endif /* CONFIG_RTL8723D */
/* 3 0. update mp_priv */
if (!RF_TYPE_VALID(padapter->registrypriv.rf_config)) {
@ -990,25 +733,6 @@ void mp_stop_test(PADAPTER padapter)
end_of_mp_stop_test:
_exit_critical_bh(&pmlmepriv->lock, &irqL);
#ifdef CONFIG_RTL8812A
rtl8812_InitHalDm(padapter);
#endif
#ifdef CONFIG_RTL8723B
rtl8723b_InitHalDm(padapter);
#endif
#ifdef CONFIG_RTL8703B
rtl8703b_InitHalDm(padapter);
#endif
#ifdef CONFIG_RTL8192E
rtl8192e_InitHalDm(padapter);
#endif
#ifdef CONFIG_RTL8188F
rtl8188f_InitHalDm(padapter);
#endif
#ifdef CONFIG_RTL8723D
rtl8723d_InitHalDm(padapter);
#endif
}
}
/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/
@ -1255,7 +979,6 @@ void fill_txdesc_for_mp(PADAPTER padapter, u8 *ptxdesc)
_rtw_memcpy(ptxdesc, pmp_priv->tx.desc, TXDESC_SIZE);
}
#if defined(CONFIG_RTL8188E)
static void fill_tx_desc_8188e(PADAPTER padapter)
{
struct mp_priv *pmp_priv = &padapter->mppriv;
@ -1264,7 +987,6 @@ static void fill_tx_desc_8188e(PADAPTER padapter)
u32 pkt_size = pattrib->last_txcmdsz;
s32 bmcast = IS_MCAST(pattrib->ra);
/* offset 0 */
#if !defined(CONFIG_RTL8188E_SDIO) && !defined(CONFIG_PCI_HCI)
desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
desc->txdw0 |= cpu_to_le32(pkt_size & 0x0000FFFF); /* packet size */
desc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00FF0000); /* 32 bytes for TX Desc */
@ -1272,7 +994,6 @@ static void fill_tx_desc_8188e(PADAPTER padapter)
desc->txdw0 |= cpu_to_le32(BMC); /* broadcast packet */
desc->txdw1 |= cpu_to_le32((0x01 << 26) & 0xff000000);
#endif
desc->txdw1 |= cpu_to_le32((pattrib->mac_id) & 0x3F); /* CAM_ID(MAC_ID) */
desc->txdw1 |= cpu_to_le32((pattrib->qsel << QSEL_SHT) & 0x00001F00); /* Queue Select, TID */
@ -1307,316 +1028,13 @@ static void fill_tx_desc_8188e(PADAPTER padapter)
}
#endif
#if defined(CONFIG_RTL8814A)
void fill_tx_desc_8814a(PADAPTER padapter)
{
struct mp_priv *pmp_priv = &padapter->mppriv;
u8 *pDesc = (u8 *)&(pmp_priv->tx.desc);
struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
u32 pkt_size = pattrib->last_txcmdsz;
s32 bmcast = IS_MCAST(pattrib->ra);
u8 data_rate, pwr_status, offset;
/* SET_TX_DESC_FIRST_SEG_8814A(pDesc, 1); */
SET_TX_DESC_LAST_SEG_8814A(pDesc, 1);
/* SET_TX_DESC_OWN_(pDesc, 1); */
SET_TX_DESC_PKT_SIZE_8814A(pDesc, pkt_size);
offset = TXDESC_SIZE + OFFSET_SZ;
SET_TX_DESC_OFFSET_8814A(pDesc, offset);
#if defined(CONFIG_PCI_HCI)
SET_TX_DESC_PKT_OFFSET_8814A(pDesc, 0); /* 8814AE pkt_offset is 0 */
#else
SET_TX_DESC_PKT_OFFSET_8814A(pDesc, 1);
#endif
if (bmcast)
SET_TX_DESC_BMC_8814A(pDesc, 1);
SET_TX_DESC_MACID_8814A(pDesc, pattrib->mac_id);
SET_TX_DESC_RATE_ID_8814A(pDesc, pattrib->raid);
/* SET_TX_DESC_RATE_ID_8812(pDesc, RATEID_IDX_G); */
SET_TX_DESC_QUEUE_SEL_8814A(pDesc, pattrib->qsel);
/* SET_TX_DESC_QUEUE_SEL_8812(pDesc, QSLT_MGNT); */
if (pmp_priv->preamble)
SET_TX_DESC_DATA_SHORT_8814A(pDesc, 1);
if (!pattrib->qos_en) {
SET_TX_DESC_HWSEQ_EN_8814A(pDesc, 1); /* Hw set sequence number */
} else
SET_TX_DESC_SEQ_8814A(pDesc, pattrib->seqnum);
if (pmp_priv->bandwidth <= CHANNEL_WIDTH_160)
SET_TX_DESC_DATA_BW_8814A(pDesc, pmp_priv->bandwidth);
else {
RTW_INFO("%s:Err: unknown bandwidth %d, use 20M\n", __func__, pmp_priv->bandwidth);
SET_TX_DESC_DATA_BW_8814A(pDesc, CHANNEL_WIDTH_20);
}
SET_TX_DESC_DISABLE_FB_8814A(pDesc, 1);
SET_TX_DESC_USE_RATE_8814A(pDesc, 1);
SET_TX_DESC_TX_RATE_8814A(pDesc, pmp_priv->rateidx);
}
#endif
#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
void fill_tx_desc_8812a(PADAPTER padapter)
{
struct mp_priv *pmp_priv = &padapter->mppriv;
u8 *pDesc = (u8 *)&(pmp_priv->tx.desc);
struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
u32 pkt_size = pattrib->last_txcmdsz;
s32 bmcast = IS_MCAST(pattrib->ra);
u8 data_rate, pwr_status, offset;
SET_TX_DESC_FIRST_SEG_8812(pDesc, 1);
SET_TX_DESC_LAST_SEG_8812(pDesc, 1);
SET_TX_DESC_OWN_8812(pDesc, 1);
SET_TX_DESC_PKT_SIZE_8812(pDesc, pkt_size);
offset = TXDESC_SIZE + OFFSET_SZ;
SET_TX_DESC_OFFSET_8812(pDesc, offset);
#if defined(CONFIG_PCI_HCI)
SET_TX_DESC_PKT_OFFSET_8812(pDesc, 0);
#else
SET_TX_DESC_PKT_OFFSET_8812(pDesc, 1);
#endif
if (bmcast)
SET_TX_DESC_BMC_8812(pDesc, 1);
SET_TX_DESC_MACID_8812(pDesc, pattrib->mac_id);
SET_TX_DESC_RATE_ID_8812(pDesc, pattrib->raid);
/* SET_TX_DESC_RATE_ID_8812(pDesc, RATEID_IDX_G); */
SET_TX_DESC_QUEUE_SEL_8812(pDesc, pattrib->qsel);
/* SET_TX_DESC_QUEUE_SEL_8812(pDesc, QSLT_MGNT); */
if (!pattrib->qos_en) {
SET_TX_DESC_HWSEQ_EN_8812(pDesc, 1); /* Hw set sequence number */
} else
SET_TX_DESC_SEQ_8812(pDesc, pattrib->seqnum);
if (pmp_priv->bandwidth <= CHANNEL_WIDTH_160)
SET_TX_DESC_DATA_BW_8812(pDesc, pmp_priv->bandwidth);
else {
RTW_INFO("%s:Err: unknown bandwidth %d, use 20M\n", __func__, pmp_priv->bandwidth);
SET_TX_DESC_DATA_BW_8812(pDesc, CHANNEL_WIDTH_20);
}
SET_TX_DESC_DISABLE_FB_8812(pDesc, 1);
SET_TX_DESC_USE_RATE_8812(pDesc, 1);
SET_TX_DESC_TX_RATE_8812(pDesc, pmp_priv->rateidx);
}
#endif
#if defined(CONFIG_RTL8192E)
void fill_tx_desc_8192e(PADAPTER padapter)
{
struct mp_priv *pmp_priv = &padapter->mppriv;
u8 *pDesc = (u8 *)&(pmp_priv->tx.desc);
struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
u32 pkt_size = pattrib->last_txcmdsz;
s32 bmcast = IS_MCAST(pattrib->ra);
u8 data_rate, pwr_status, offset;
SET_TX_DESC_PKT_SIZE_92E(pDesc, pkt_size);
offset = TXDESC_SIZE + OFFSET_SZ;
SET_TX_DESC_OFFSET_92E(pDesc, offset);
#if defined(CONFIG_PCI_HCI) /* 8192EE */
SET_TX_DESC_PKT_OFFSET_92E(pDesc, 0); /* 8192EE pkt_offset is 0 */
#else /* 8192EU 8192ES */
SET_TX_DESC_PKT_OFFSET_92E(pDesc, 1);
#endif
if (bmcast)
SET_TX_DESC_BMC_92E(pDesc, 1);
SET_TX_DESC_MACID_92E(pDesc, pattrib->mac_id);
SET_TX_DESC_RATE_ID_92E(pDesc, pattrib->raid);
SET_TX_DESC_QUEUE_SEL_92E(pDesc, pattrib->qsel);
/* SET_TX_DESC_QUEUE_SEL_8812(pDesc, QSLT_MGNT); */
if (!pattrib->qos_en) {
SET_TX_DESC_EN_HWSEQ_92E(pDesc, 1);/* Hw set sequence number */
SET_TX_DESC_HWSEQ_SEL_92E(pDesc, pattrib->hw_ssn_sel);
} else
SET_TX_DESC_SEQ_92E(pDesc, pattrib->seqnum);
if ((pmp_priv->bandwidth == CHANNEL_WIDTH_20) || (pmp_priv->bandwidth == CHANNEL_WIDTH_40))
SET_TX_DESC_DATA_BW_92E(pDesc, pmp_priv->bandwidth);
else {
RTW_INFO("%s:Err: unknown bandwidth %d, use 20M\n", __func__, pmp_priv->bandwidth);
SET_TX_DESC_DATA_BW_92E(pDesc, CHANNEL_WIDTH_20);
}
/* SET_TX_DESC_DATA_SC_92E(pDesc, SCMapping_92E(padapter,pattrib)); */
SET_TX_DESC_DISABLE_FB_92E(pDesc, 1);
SET_TX_DESC_USE_RATE_92E(pDesc, 1);
SET_TX_DESC_TX_RATE_92E(pDesc, pmp_priv->rateidx);
}
#endif
#if defined(CONFIG_RTL8723B)
void fill_tx_desc_8723b(PADAPTER padapter)
{
struct mp_priv *pmp_priv = &padapter->mppriv;
struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
u8 *ptxdesc = pmp_priv->tx.desc;
SET_TX_DESC_AGG_BREAK_8723B(ptxdesc, 1);
SET_TX_DESC_MACID_8723B(ptxdesc, pattrib->mac_id);
SET_TX_DESC_QUEUE_SEL_8723B(ptxdesc, pattrib->qsel);
SET_TX_DESC_RATE_ID_8723B(ptxdesc, pattrib->raid);
SET_TX_DESC_SEQ_8723B(ptxdesc, pattrib->seqnum);
SET_TX_DESC_HWSEQ_EN_8723B(ptxdesc, 1);
SET_TX_DESC_USE_RATE_8723B(ptxdesc, 1);
SET_TX_DESC_DISABLE_FB_8723B(ptxdesc, 1);
if (pmp_priv->preamble) {
if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M)
SET_TX_DESC_DATA_SHORT_8723B(ptxdesc, 1);
}
if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
SET_TX_DESC_DATA_BW_8723B(ptxdesc, 1);
SET_TX_DESC_TX_RATE_8723B(ptxdesc, pmp_priv->rateidx);
SET_TX_DESC_DATA_RATE_FB_LIMIT_8723B(ptxdesc, 0x1F);
SET_TX_DESC_RTS_RATE_FB_LIMIT_8723B(ptxdesc, 0xF);
}
#endif
#if defined(CONFIG_RTL8703B)
void fill_tx_desc_8703b(PADAPTER padapter)
{
struct mp_priv *pmp_priv = &padapter->mppriv;
struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
u8 *ptxdesc = pmp_priv->tx.desc;
SET_TX_DESC_AGG_BREAK_8703B(ptxdesc, 1);
SET_TX_DESC_MACID_8703B(ptxdesc, pattrib->mac_id);
SET_TX_DESC_QUEUE_SEL_8703B(ptxdesc, pattrib->qsel);
SET_TX_DESC_RATE_ID_8703B(ptxdesc, pattrib->raid);
SET_TX_DESC_SEQ_8703B(ptxdesc, pattrib->seqnum);
SET_TX_DESC_HWSEQ_EN_8703B(ptxdesc, 1);
SET_TX_DESC_USE_RATE_8703B(ptxdesc, 1);
SET_TX_DESC_DISABLE_FB_8703B(ptxdesc, 1);
if (pmp_priv->preamble) {
if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M)
SET_TX_DESC_DATA_SHORT_8703B(ptxdesc, 1);
}
if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
SET_TX_DESC_DATA_BW_8703B(ptxdesc, 1);
SET_TX_DESC_TX_RATE_8703B(ptxdesc, pmp_priv->rateidx);
SET_TX_DESC_DATA_RATE_FB_LIMIT_8703B(ptxdesc, 0x1F);
SET_TX_DESC_RTS_RATE_FB_LIMIT_8703B(ptxdesc, 0xF);
}
#endif
#if defined(CONFIG_RTL8188F)
void fill_tx_desc_8188f(PADAPTER padapter)
{
struct mp_priv *pmp_priv = &padapter->mppriv;
struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
u8 *ptxdesc = pmp_priv->tx.desc;
SET_TX_DESC_AGG_BREAK_8188F(ptxdesc, 1);
SET_TX_DESC_MACID_8188F(ptxdesc, pattrib->mac_id);
SET_TX_DESC_QUEUE_SEL_8188F(ptxdesc, pattrib->qsel);
SET_TX_DESC_RATE_ID_8188F(ptxdesc, pattrib->raid);
SET_TX_DESC_SEQ_8188F(ptxdesc, pattrib->seqnum);
SET_TX_DESC_HWSEQ_EN_8188F(ptxdesc, 1);
SET_TX_DESC_USE_RATE_8188F(ptxdesc, 1);
SET_TX_DESC_DISABLE_FB_8188F(ptxdesc, 1);
if (pmp_priv->preamble)
if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M)
SET_TX_DESC_DATA_SHORT_8188F(ptxdesc, 1);
if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
SET_TX_DESC_DATA_BW_8188F(ptxdesc, 1);
SET_TX_DESC_TX_RATE_8188F(ptxdesc, pmp_priv->rateidx);
SET_TX_DESC_DATA_RATE_FB_LIMIT_8188F(ptxdesc, 0x1F);
SET_TX_DESC_RTS_RATE_FB_LIMIT_8188F(ptxdesc, 0xF);
}
#endif
#if defined(CONFIG_RTL8723D)
void fill_tx_desc_8723d(PADAPTER padapter)
{
struct mp_priv *pmp_priv = &padapter->mppriv;
struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
u8 *ptxdesc = pmp_priv->tx.desc;
SET_TX_DESC_BK_8723D(ptxdesc, 1);
SET_TX_DESC_MACID_8723D(ptxdesc, pattrib->mac_id);
SET_TX_DESC_QUEUE_SEL_8723D(ptxdesc, pattrib->qsel);
SET_TX_DESC_RATE_ID_8723D(ptxdesc, pattrib->raid);
SET_TX_DESC_SEQ_8723D(ptxdesc, pattrib->seqnum);
SET_TX_DESC_HWSEQ_EN_8723D(ptxdesc, 1);
SET_TX_DESC_USE_RATE_8723D(ptxdesc, 1);
SET_TX_DESC_DISABLE_FB_8723D(ptxdesc, 1);
if (pmp_priv->preamble) {
if (HwRateToMPTRate(pmp_priv->rateidx) <= MPT_RATE_54M)
SET_TX_DESC_DATA_SHORT_8723D(ptxdesc, 1);
}
if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
SET_TX_DESC_DATA_BW_8723D(ptxdesc, 1);
SET_TX_DESC_TX_RATE_8723D(ptxdesc, pmp_priv->rateidx);
SET_TX_DESC_DATA_RATE_FB_LIMIT_8723D(ptxdesc, 0x1F);
SET_TX_DESC_RTS_RATE_FB_LIMIT_8723D(ptxdesc, 0xF);
}
#endif
static void Rtw_MPSetMacTxEDCA(PADAPTER padapter)
{
rtw_write32(padapter, 0x508 , 0x00a422); /* Disable EDCA BE Txop for MP pkt tx adjust Packet interval */
/* RTW_INFO("%s:write 0x508~~~~~~ 0x%x\n", __func__,rtw_read32(padapter, 0x508)); */
phy_set_mac_reg(padapter, 0x458 , bMaskDWord , 0x0);
/*RTW_INFO("%s()!!!!! 0x460 = 0x%x\n" ,__func__, phy_query_bb_reg(padapter, 0x460, bMaskDWord));*/
phy_set_mac_reg(padapter, 0x460 , bMaskLWord , 0x0); /* fast EDCA queue packet interval & time out value*/
/*phy_set_mac_reg(padapter, ODM_EDCA_VO_PARAM ,bMaskLWord , 0x431C);*/
/*phy_set_mac_reg(padapter, ODM_EDCA_BE_PARAM ,bMaskLWord , 0x431C);*/
/*phy_set_mac_reg(padapter, ODM_EDCA_BK_PARAM ,bMaskLWord , 0x431C);*/
RTW_INFO("%s()!!!!! 0x460 = 0x%x\n" , __func__, phy_query_bb_reg(padapter, 0x460, bMaskDWord));
}
void SetPacketTx(PADAPTER padapter)
@ -1674,53 +1092,8 @@ void SetPacketTx(PADAPTER padapter)
pkt_end = pkt_start + pkt_size;
/* 3 3. init TX descriptor */
#if defined(CONFIG_RTL8188E)
if (IS_HARDWARE_TYPE_8188E(padapter))
fill_tx_desc_8188e(padapter);
#endif
#if defined(CONFIG_RTL8814A)
if (IS_HARDWARE_TYPE_8814A(padapter))
fill_tx_desc_8814a(padapter);
#endif /* defined(CONFIG_RTL8814A) */
#if defined(CONFIG_RTL8822B)
if (IS_HARDWARE_TYPE_8822B(padapter))
rtl8822b_prepare_mp_txdesc(padapter, pmp_priv);
#endif /* CONFIG_RTL8822B */
#if defined(CONFIG_RTL8821C)
if (IS_HARDWARE_TYPE_8821C(padapter))
rtl8821c_prepare_mp_txdesc(padapter, pmp_priv);
#endif /* CONFIG_RTL8821C */
#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
if (IS_HARDWARE_TYPE_8812(padapter) || IS_HARDWARE_TYPE_8821(padapter))
fill_tx_desc_8812a(padapter);
#endif
#if defined(CONFIG_RTL8192E)
if (IS_HARDWARE_TYPE_8192E(padapter))
fill_tx_desc_8192e(padapter);
#endif
#if defined(CONFIG_RTL8723B)
if (IS_HARDWARE_TYPE_8723B(padapter))
fill_tx_desc_8723b(padapter);
#endif
#if defined(CONFIG_RTL8703B)
if (IS_HARDWARE_TYPE_8703B(padapter))
fill_tx_desc_8703b(padapter);
#endif
#if defined(CONFIG_RTL8188F)
if (IS_HARDWARE_TYPE_8188F(padapter))
fill_tx_desc_8188f(padapter);
#endif
#if defined(CONFIG_RTL8723D)
if (IS_HARDWARE_TYPE_8723D(padapter))
fill_tx_desc_8723d(padapter);
#endif
/* 3 4. make wlan header, make_wlanhdr() */
hdr = (struct rtw_ieee80211_hdr *)pkt_start;
@ -1782,10 +1155,6 @@ void SetPacketRx(PADAPTER pAdapter, u8 bStartRx, u8 bAB)
if (bStartRx) {
#ifdef CONFIG_RTL8723B
phy_set_mac_reg(pAdapter, 0xe70, BIT23 | BIT22, 0x3); /* Power on adc (in RX_WAIT_CCA state) */
write_bbreg(pAdapter, 0xa01, BIT0, bDisable);/* improve Rx performance by jerry */
#endif
pHalData->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AMF | RCR_HTC_LOC_CTRL;
pHalData->ReceiveConfig |= RCR_ACRC32;
pHalData->ReceiveConfig |= RCR_APP_PHYST_RXFF | RCR_APP_ICV | RCR_APP_MIC;
@ -1796,11 +1165,7 @@ void SetPacketRx(PADAPTER pAdapter, u8 bStartRx, u8 bAB)
pHalData->ReceiveConfig = 0;
pHalData->ReceiveConfig |= RCR_CBSSID_DATA | RCR_CBSSID_BCN |RCR_APM | RCR_AM | RCR_AB |RCR_AMF;
#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
write_bbreg(pAdapter, 0x550, BIT3, bEnable);
#endif
rtw_write16(pAdapter, REG_RXFLTMAP0, 0xFFEF); /* REG_RXFLTMAP0 (RX Filter Map Group 0) */
} else {
pHalData->ReceiveConfig |= RCR_ADF;
/* Accept all data frames */
@ -1810,10 +1175,6 @@ void SetPacketRx(PADAPTER pAdapter, u8 bStartRx, u8 bAB)
if (bAB)
pHalData->ReceiveConfig |= RCR_AB;
} else {
#ifdef CONFIG_RTL8723B
phy_set_mac_reg(pAdapter, 0xe70, BIT23 | BIT22, 0x00); /* Power off adc (in RX_WAIT_CCA state)*/
write_bbreg(pAdapter, 0xa01, BIT0, bEnable);/* improve Rx performance by jerry */
#endif
pHalData->ReceiveConfig = 0;
rtw_write16(pAdapter, REG_RXFLTMAP0, 0xFFFF); /* REG_RXFLTMAP0 (RX Filter Map Group 0) */
}
@ -1875,14 +1236,8 @@ u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter)
static u32 rtw_GetPSDData(PADAPTER pAdapter, u32 point)
{
u32 psd_val = 0;
#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
u16 psd_reg = 0x910;
u16 psd_regL = 0xF44;
#else
u16 psd_reg = 0x808;
u16 psd_regL = 0x8B4;
#endif
psd_val = rtw_read32(pAdapter, psd_reg);

4
core/rtw_mp_ioctl.c
View file

@ -1189,10 +1189,6 @@ NDIS_STATUS oid_rt_set_power_down_hdl(struct oid_par_priv *poid_par_priv)
_irqlevel_changed_(&oldirql, LOWER);
bpwrup = *(u8 *)poid_par_priv->information_buf;
/* CALL the power_down function */
#if defined(CONFIG_RTL8712) /* Linux MP insmod unknown symbol */
dev_power_down(padapter, bpwrup);
#endif
_irqlevel_changed_(&oldirql, RAISE);
return status;

6
core/rtw_pwrctrl.c
View file

@ -1229,12 +1229,10 @@ void LeaveAllPowerSaveModeDirect(PADAPTER Adapter)
} else
#endif
{
#if defined(CONFIG_FWLPS_IN_IPS) || defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_RTL8188E)
#ifdef CONFIG_IPS
if (_FALSE == ips_leave(pri_padapter))
RTW_INFO("======> ips_leave fail.............\n");
#endif
#endif /* CONFIG_SWLPS_IN_IPS || (CONFIG_PLATFORM_SPRD && CONFIG_RTL8188E) */
}
}
}
@ -1301,12 +1299,12 @@ void LeaveAllPowerSaveMode(IN PADAPTER Adapter)
} else
#endif
{
#if defined(CONFIG_FWLPS_IN_IPS) || defined(CONFIG_SWLPS_IN_IPS) || (defined(CONFIG_PLATFORM_SPRD) && defined(CONFIG_RTL8188E))
#if defined(CONFIG_FWLPS_IN_IPS) || defined(CONFIG_SWLPS_IN_IPS) || (defined(CONFIG_PLATFORM_SPRD))
#ifdef CONFIG_IPS
if (_FALSE == ips_leave(Adapter))
RTW_INFO("======> ips_leave fail.............\n");
#endif
#endif /* CONFIG_SWLPS_IN_IPS || (CONFIG_PLATFORM_SPRD && CONFIG_RTL8188E) */
#endif /* CONFIG_SWLPS_IN_IPS || (CONFIG_PLATFORM_SPRD) */
}
}
}

42
core/rtw_rf.c
View file

@ -1055,48 +1055,6 @@ void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset)
}
switch (rtw_get_chip_type(adapter)) {
#ifdef CONFIG_RTL8723D
case RTL8723D:
write_value = RF_TX_GAIN_OFFSET_8723D(offset);
if (path == PPG_8723D_S1)
rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value);
else if (path == PPG_8723D_S0)
rtw_hal_write_rfreg(adapter, target_path, 0x65, 0x0f8000, write_value);
break;
#endif /* CONFIG_RTL8723D */
#ifdef CONFIG_RTL8703B
case RTL8703B:
write_value = RF_TX_GAIN_OFFSET_8703B(offset);
rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value);
break;
#endif /* CONFIG_RTL8703B */
#ifdef CONFIG_RTL8188F
case RTL8188F:
write_value = RF_TX_GAIN_OFFSET_8188F(offset);
rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value);
break;
#endif /* CONFIG_RTL8188F */
#ifdef CONFIG_RTL8192E
case RTL8192E:
write_value = RF_TX_GAIN_OFFSET_8192E(offset);
rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value);
break;
#endif /* CONFIG_RTL8188F */
#ifdef CONFIG_RTL8821A
case RTL8821:
write_value = RF_TX_GAIN_OFFSET_8821A(offset);
rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value);
break;
#endif /* CONFIG_RTL8821A */
#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
case RTL8814A:
case RTL8822B:
case RTL8821C:
RTW_INFO("\nkfree by PhyDM on the sw CH. path %d\n", path);
break;
#endif /* CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C */
default:
rtw_warn_on(1);
break;

53
core/rtw_xmit.c
View file

@ -3431,7 +3431,6 @@ exit:
return pxmitframe;
}
#if 1
struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac)
{
struct tx_servq *ptxservq = NULL;
@ -3466,58 +3465,6 @@ struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta,
return ptxservq;
}
#else
__inline static struct tx_servq *rtw_get_sta_pending
(_adapter *padapter, _queue **ppstapending, struct sta_info *psta, sint up)
{
struct tx_servq *ptxservq;
struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits;
#ifdef CONFIG_RTL8711
if (IS_MCAST(psta->hwaddr)) {
ptxservq = &(psta->sta_xmitpriv.be_q); /* we will use be_q to queue bc/mc frames in BCMC_stainfo */
*ppstapending = &padapter->xmitpriv.bm_pending;
} else
#endif
{
switch (up) {
case 1:
case 2:
ptxservq = &(psta->sta_xmitpriv.bk_q);
*ppstapending = &padapter->xmitpriv.bk_pending;
(phwxmits + 3)->accnt++;
break;
case 4:
case 5:
ptxservq = &(psta->sta_xmitpriv.vi_q);
*ppstapending = &padapter->xmitpriv.vi_pending;
(phwxmits + 1)->accnt++;
break;
case 6:
case 7:
ptxservq = &(psta->sta_xmitpriv.vo_q);
*ppstapending = &padapter->xmitpriv.vo_pending;
(phwxmits + 0)->accnt++;
break;
case 0:
case 3:
default:
ptxservq = &(psta->sta_xmitpriv.be_q);
*ppstapending = &padapter->xmitpriv.be_pending;
(phwxmits + 2)->accnt++;
break;
}
}
return ptxservq;
}
#endif
/*
* Will enqueue pxmitframe to the proper queue,