diff --git a/hal/odm.c b/hal/odm.c
index 06868dd..d780398 100644
--- a/hal/odm.c
+++ b/hal/odm.c
@@ -673,6 +673,7 @@ ODM_CmnInfoInit(
 			break;
 		case	ODM_CMNINFO_PLATFORM:
 			pDM_Odm->SupportPlatform = (u8)Value;
+			pr_info("SupportPlatform 0x%x\n", Value);
 			break;
 
 		case	ODM_CMNINFO_INTERFACE:
@@ -1167,28 +1168,10 @@ ODM_Write_DIG(
 
 	if (pDM_DigTable->CurIGValue != CurrentIGI)/* if (pDM_DigTable->PreIGValue != CurrentIGI) */
 	{
-		if (pDM_Odm->SupportPlatform & (ODM_CE|ODM_MP)) {
+		if (pDM_Odm->SupportPlatform & (ODM_CE)) {
 			ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
 			if (pDM_Odm->SupportICType != ODM_RTL8188E)
 				ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
-		} else if (pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) {
-			switch (*(pDM_Odm->pOnePathCCA)) {
-			case ODM_CCA_2R:
-				ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
-				if (pDM_Odm->SupportICType != ODM_RTL8188E)
-					ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
-				break;
-			case ODM_CCA_1R_A:
-				ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
-				if (pDM_Odm->SupportICType != ODM_RTL8188E)
-					ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI));
-				break;
-			case ODM_CCA_1R_B:
-				ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI));
-				if (pDM_Odm->SupportICType != ODM_RTL8188E)
-					ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI);
-				break;
-			}
 		}
 		ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("CurrentIGI(0x%02x).\n",CurrentIGI));
 		/* pDM_DigTable->PreIGValue = pDM_DigTable->CurIGValue; */
@@ -1523,7 +1506,7 @@ odm_DIG(
 		}
 		else
 		{
-			if ((pDM_Odm->SupportICType >= ODM_RTL8188E) && (pDM_Odm->SupportPlatform & (ODM_MP|ODM_CE)))
+			if ((pDM_Odm->SupportICType >= ODM_RTL8188E) && (pDM_Odm->SupportPlatform & (ODM_CE)))
 				dm_dig_max = 0x5A;
 			else
 				dm_dig_max = DM_DIG_MAX_NIC;
@@ -1696,7 +1679,7 @@ odm_DIG(
 	}
 	ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): pDM_DigTable->LargeFAHit=%d\n",pDM_DigTable->LargeFAHit));
 
-	if ((pDM_Odm->SupportPlatform&(ODM_MP|ODM_CE))&&(pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 10) && (pDM_Odm->bsta_state))
+	if ((pDM_Odm->SupportPlatform&(ODM_CE))&&(pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 10) && (pDM_Odm->bsta_state))
 		pDM_DigTable->rx_gain_range_min = dm_dig_min;
 
 	if (pDM_DigTable->rx_gain_range_min > pDM_DigTable->rx_gain_range_max)
@@ -1761,7 +1744,7 @@ odm_DIG(
 					else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0)
 						CurrentIGI = CurrentIGI - 2;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */
 
-					if ((pDM_Odm->SupportPlatform&(ODM_MP|ODM_CE))&&(pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 10)
+					if ((pDM_Odm->SupportPlatform&(ODM_CE))&&(pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 10)
 						&&(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH1) && (pDM_Odm->bsta_state))
 					{
 						CurrentIGI = pDM_DigTable->rx_gain_range_min;
@@ -2067,7 +2050,7 @@ odm_DynamicBBPowerSaving(
 		return;
 	if (!(pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE))
 		return;
-	if (!(pDM_Odm->SupportPlatform & (ODM_MP|ODM_CE)))
+	if (!(pDM_Odm->SupportPlatform & (ODM_CE)))
 		return;
 
 	/* 1 2.Power Saving for 92C */
@@ -2369,21 +2352,7 @@ odm_RefreshRateAdaptiveMask(
 	/*  at the same time. In the stage2/3, we need to prive universal interface and merge all */
 	/*  HW dynamic mechanism. */
 	/*  */
-	switch	(pDM_Odm->SupportPlatform)
-	{
-		case	ODM_MP:
-			odm_RefreshRateAdaptiveMaskMP(pDM_Odm);
-			break;
-
-		case	ODM_CE:
-			odm_RefreshRateAdaptiveMaskCE(pDM_Odm);
-			break;
-
-		case	ODM_AP:
-		case	ODM_ADSL:
-			odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm);
-			break;
-	}
+	odm_RefreshRateAdaptiveMaskCE(pDM_Odm);
 
 }
 
@@ -2585,22 +2554,7 @@ odm_DynamicTxPower(
 	/*  at the same time. In the stage2/3, we need to prive universal interface and merge all */
 	/*  HW dynamic mechanism. */
 	/*  */
-	switch	(pDM_Odm->SupportPlatform)
-	{
-		case	ODM_MP:
-		case	ODM_CE:
-			odm_DynamicTxPowerNIC(pDM_Odm);
-			break;
-		case	ODM_AP:
-			odm_DynamicTxPowerAP(pDM_Odm);
-			break;
-
-		case	ODM_ADSL:
-			/* odm_DIGAP(pDM_Odm); */
-			break;
-	}
-
-
+	odm_DynamicTxPowerNIC(pDM_Odm);
 }
 
 
@@ -2685,25 +2639,7 @@ odm_RSSIMonitorCheck(
 	/*  at the same time. In the stage2/3, we need to prive universal interface and merge all */
 	/*  HW dynamic mechanism. */
 	/*  */
-	switch	(pDM_Odm->SupportPlatform)
-	{
-		case	ODM_MP:
-			odm_RSSIMonitorCheckMP(pDM_Odm);
-			break;
-
-		case	ODM_CE:
-			odm_RSSIMonitorCheckCE(pDM_Odm);
-			break;
-
-		case	ODM_AP:
-			odm_RSSIMonitorCheckAP(pDM_Odm);
-			break;
-
-		case	ODM_ADSL:
-			/* odm_DIGAP(pDM_Odm); */
-			break;
-	}
-
+	odm_RSSIMonitorCheckCE(pDM_Odm);
 }	/*  odm_RSSIMonitorCheck */
 
 
@@ -2917,25 +2853,7 @@ ODM_TXPowerTrackingCheck(
 	/*  at the same time. In the stage2/3, we need to prive universal interface and merge all */
 	/*  HW dynamic mechanism. */
 	/*  */
-	switch	(pDM_Odm->SupportPlatform)
-	{
-		case	ODM_MP:
-			odm_TXPowerTrackingCheckMP(pDM_Odm);
-			break;
-
-		case	ODM_CE:
-			odm_TXPowerTrackingCheckCE(pDM_Odm);
-			break;
-
-		case	ODM_AP:
-			odm_TXPowerTrackingCheckAP(pDM_Odm);
-			break;
-
-		case	ODM_ADSL:
-			/* odm_DIGAP(pDM_Odm); */
-			break;
-	}
-
+	odm_TXPowerTrackingCheckCE(pDM_Odm);
 }
 
 void
@@ -3348,16 +3266,7 @@ odm_EdcaTurboCheck(
 	if (!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))
 		return;
 
-	switch	(pDM_Odm->SupportPlatform) {
-	case	ODM_MP:
-		break;
-	case	ODM_CE:
-		odm_EdcaTurboCheckCE(pDM_Odm);
-		break;
-	case	ODM_AP:
-	case	ODM_ADSL:
-		break;
-	}
+	odm_EdcaTurboCheckCE(pDM_Odm);
 	ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("<========================odm_EdcaTurboCheck\n"));
 
 }	/*  odm_CheckEdcaTurbo */
diff --git a/hal/odm_HWConfig.c b/hal/odm_HWConfig.c
index ea2d666..71dc781 100644
--- a/hal/odm_HWConfig.c
+++ b/hal/odm_HWConfig.c
@@ -167,28 +167,9 @@ odm_SignalScaleMapping_92CSeries(
 #endif
 	return RetSig;
 }
-static s32
-odm_SignalScaleMapping(
-	PDM_ODM_T pDM_Odm,
-	s32 CurrSig
-)
+static s32 odm_SignalScaleMapping(PDM_ODM_T pDM_Odm, s32 CurrSig)
 {
-	if (	(pDM_Odm->SupportPlatform == ODM_MP) &&
-		(pDM_Odm->SupportInterface  != ODM_ITRF_PCIE) && /* USB & SDIO */
-		(pDM_Odm->PatchID==10))/* pMgntInfo->CustomerID == RT_CID_819x_Netcore */
-	{
-		return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(pDM_Odm,CurrSig);
-	}
-	else if (	(pDM_Odm->SupportPlatform == ODM_MP) &&
-			(pDM_Odm->SupportInterface  == ODM_ITRF_PCIE) &&
-			(pDM_Odm->PatchID==19))/* pMgntInfo->CustomerID == RT_CID_819x_Lenovo) */
-	{
-		return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(pDM_Odm, CurrSig);
-	}
-	else {
-		return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig);
-	}
-
+	return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig);
 }
 
 /* pMgntInfo->CustomerID == RT_CID_819x_Lenovo */
@@ -315,8 +296,7 @@ odm_RxPhyStatus92CSeries_Parsing(
 			}
 			rx_pwr_all += 6;
 			PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
-			if (cck_highpwr == false)
-			{
+			if (cck_highpwr == false) {
 				if (PWDB_ALL >= 80)
 					PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
 				else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
@@ -324,33 +304,27 @@ odm_RxPhyStatus92CSeries_Parsing(
 				if (PWDB_ALL>100)
 					PWDB_ALL = 100;
 			}
-		}
-		else
-		{
-			if (!cck_highpwr)
-			{
+		} else {
+			if (!cck_highpwr) {
 				report =( cck_agc_rpt & 0xc0 )>>6;
-				switch (report)
-				{
-					/*  03312009 modified by cosa */
-					/*  Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion */
-					/*  Note: different RF with the different RNA gain. */
-					case 0x3:
-						rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
-						break;
-					case 0x2:
-						rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
-						break;
-					case 0x1:
-						rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
-						break;
-					case 0x0:
-						rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
-						break;
+				switch (report) {
+				/*  03312009 modified by cosa */
+				/*  Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion */
+				/*  Note: different RF with the different RNA gain. */
+				case 0x3:
+					rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
+					break;
+				case 0x2:
+					rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
+					break;
+				case 0x1:
+					rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
+					break;
+				case 0x0:
+					rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
+					break;
 				}
-			}
-			else
-			{
+			} else {
 				/* report = pDrvInfo->cfosho[0] & 0x60; */
 				/* report = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a& 0x60; */
 
@@ -375,13 +349,10 @@ odm_RxPhyStatus92CSeries_Parsing(
 			PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
 
 			/* Modification for ext-LNA board */
-			if (pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))
-			{
+			if (pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) {
 				if ((cck_agc_rpt>>7) == 0) {
 					PWDB_ALL = (PWDB_ALL>94)?100:(PWDB_ALL +6);
-				}
-				else
-	                   {
+				} else {
 					if (PWDB_ALL > 38)
 						PWDB_ALL -= 16;
 					else
@@ -393,9 +364,7 @@ odm_RxPhyStatus92CSeries_Parsing(
 					PWDB_ALL += 6;
 				/* else if (PWDB_ALL <= 25) */
 				/* 	PWDB_ALL += 8; */
-			}
-			else/* Modification for int-LNA board */
-			{
+			} else { /* Modification for int-LNA board */
 				if (PWDB_ALL > 99)
 					PWDB_ALL -= 8;
 				else if (PWDB_ALL > 50 && PWDB_ALL <= 68)
@@ -409,17 +378,12 @@ odm_RxPhyStatus92CSeries_Parsing(
 		/*  */
 		/*  (3) Get Signal Quality (EVM) */
 		/*  */
-		if (pPktinfo->bPacketMatchBSSID)
-		{
+		if (pPktinfo->bPacketMatchBSSID) {
 			u8	SQ,SQ_rpt;
 
-			if ((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)) {/* pMgntInfo->CustomerID == RT_CID_819x_Lenovo */
-				SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0);
-			}
-			else if (pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest) {
+			if (pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest) {
 				SQ = 100;
-			}
-			else {
+			} else {
 				SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
 
 				if (SQ_rpt > 64)
@@ -430,28 +394,21 @@ odm_RxPhyStatus92CSeries_Parsing(
 					SQ = ((64-SQ_rpt) * 100) / 44;
 
 			}
-
 			/* DbgPrint("cck SQ = %d\n", SQ); */
 			pPhyInfo->SignalQuality = SQ;
 			pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = SQ;
 			pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
 		}
-	}
-	else /* is OFDM rate */
-	{
+	} else { /* is OFDM rate */
 		pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
 
 		/*  (1)Get RSSI for HT rate */
-		for (i = RF_PATH_A; i < RF_PATH_MAX; i++)
-		{
+		for (i = RF_PATH_A; i < RF_PATH_MAX; i++) {
 			/*  2008/01/30 MH we will judge RF RX path now. */
 			if (pDM_Odm->RFPathRxEnable & BIT(i))
 				rf_rx_num++;
-			/* else */
-				/* continue; */
 
 			rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110;
-
 			pPhyInfo->RxPwr[i] = rx_pwr[i];
 
 			/* Translate DBM to percentage. */
@@ -460,8 +417,7 @@ odm_RxPhyStatus92CSeries_Parsing(
 			/* RTPRINT(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI)); */
 
 			/* Modification for ext-LNA board */
-			if (pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))
-			{
+			if (pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA)) {
 				if ((pPhyStaRpt->path_agc[i].trsw) == 1)
 					RSSI = (RSSI>94)?100:(RSSI +6);
 				else
@@ -475,18 +431,6 @@ odm_RxPhyStatus92CSeries_Parsing(
 
 			/* Get Rx snr value in DB */
 			pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
-
-			/* Record Signal Strength for next packet */
-			if (pPktinfo->bPacketMatchBSSID)
-			{
-				if ((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19))
-				{
-					if (i==RF_PATH_A)
-						pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI);
-
-				}
-
-			}
 		}
 
 
@@ -502,50 +446,41 @@ odm_RxPhyStatus92CSeries_Parsing(
 		pPhyInfo->RxPower = rx_pwr_all;
 		pPhyInfo->RecvSignalPower = rx_pwr_all;
 
-		if ((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)) {
-			/* do nothing */
-		} else {/* pMgntInfo->CustomerID != RT_CID_819x_Lenovo */
-			/*  */
-			/*  (3)EVM of HT rate */
-			/*  */
-			if (pPktinfo->Rate >=DESC92C_RATEMCS8 && pPktinfo->Rate <=DESC92C_RATEMCS15)
-				Max_spatial_stream = 2; /* both spatial stream make sense */
-			else
-				Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
+		/*  */
+		/*  (3)EVM of HT rate */
+		/*  */
+		if (pPktinfo->Rate >=DESC92C_RATEMCS8 && pPktinfo->Rate <=DESC92C_RATEMCS15)
+			Max_spatial_stream = 2; /* both spatial stream make sense */
+		else
+			Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
 
-			for (i=0; i<Max_spatial_stream; i++) {
-				/*  Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
-				/*  fill most significant bit to "zero" when doing shifting operation which may change a negative */
-				/*  value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore. */
-				EVM = odm_EVMdbToPercentage( (pPhyStaRpt->stream_rxevm[i] ));	/* dbm */
+		for (i=0; i<Max_spatial_stream; i++) {
+			/*  Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
+			/*  fill most significant bit to "zero" when doing shifting operation which may change a negative */
+			/*  value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore. */
+			EVM = odm_EVMdbToPercentage( (pPhyStaRpt->stream_rxevm[i] ));	/* dbm */
 
-				/* RTPRINT(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n", */
-				/* GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM)); */
+			/* RTPRINT(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n", */
+			/* GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM)); */
 
-				if (pPktinfo->bPacketMatchBSSID)
+			if (pPktinfo->bPacketMatchBSSID)
+			{
+				if (i==RF_PATH_A) /*  Fill value in RFD, Get the first spatial stream only */
 				{
-					if (i==RF_PATH_A) /*  Fill value in RFD, Get the first spatial stream only */
-					{
-						pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
-					}
-					pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
+					pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
 				}
+				pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
 			}
 		}
 
 	}
 	/* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
 	/* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
-	if (isCCKrate)
-	{
+	if (isCCKrate) {
 		pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/* PWDB_ALL; */
-	}
-	else
-	{
+	} else {
 		if (rf_rx_num != 0)
-		{
 			pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num));
-		}
 	}
 
 	/* For 92C/92D HW (Hybrid) Antenna Diversity */
@@ -583,12 +518,6 @@ odm_Process_RSSIForDM(
 	if (pPktinfo->StationID == 0xFF)
 		return;
 
-	/*  2011/11/17 MH Need to debug */
-	/* if (pDM_Odm->SupportPlatform == ODM_MP) */
-	{
-
-	}
-
 	pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID];
 	if (!IS_STA_VALID(pEntry))
 		return;
diff --git a/hal/odm_types.h b/hal/odm_types.h
index 4acdabe..01e9bdb 100644
--- a/hal/odm_types.h
+++ b/hal/odm_types.h
@@ -26,7 +26,6 @@
 #define	ODM_AP		 	0x01	 /* BIT0  */
 #define	ODM_ADSL	 	0x02	/* BIT1 */
 #define	ODM_CE		 	0x04	/* BIT2 */
-#define	ODM_MP		 	0x08	/* BIT3 */
 
 /*  Deifne HW endian support */
 #define	ODM_ENDIAN_BIG	0
diff --git a/include/odm_HWConfig.h b/include/odm_HWConfig.h
index 80f549f..c9474b7 100644
--- a/include/odm_HWConfig.h
+++ b/include/odm_HWConfig.h
@@ -69,7 +69,7 @@ struct phy_rx_agc_info {
 };
 
 struct phy_status_rpt {
-	struct phy_rx_agc_info path_agc[3];
+	struct phy_rx_agc_info path_agc[RF_PATH_MAX];
 	u8	ch_corr[2];
 	u8	cck_sig_qual_ofdm_pwdb_all;
 	u8	cck_agc_rpt_ofdm_cfosho_a;
diff --git a/include/odm_types.h b/include/odm_types.h
index f62d8b4..e5c6c29 100644
--- a/include/odm_types.h
+++ b/include/odm_types.h
@@ -26,7 +26,6 @@
 #define	ODM_AP			0x01	 /* BIT0 */
 #define	ODM_ADSL		0x02	/* BIT1 */
 #define	ODM_CE			0x04	/* BIT2 */
-#define	ODM_MP			0x08	/* BIT3 */
 
 #define		RT_PCI_INTERFACE				1
 #define		RT_USB_INTERFACE				2