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rtl8188eu: Fix checkpatch errors for hal/rtl8188e_cmd.c, hal/odm_interface.c, hal/odm_RegConfig8188E.c, and hal/odm_RTL8188E.c

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Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2013-08-07 16:24:48 -05:00
parent f083317939
commit 5a29bf421e
4 changed files with 663 additions and 1202 deletions
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759
hal/odm_RTL8188E.c
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@ -18,317 +18,298 @@
* *
******************************************************************************/ ******************************************************************************/
/* */
/* include files */
/* */
#include "odm_precomp.h" #include "odm_precomp.h"
void ODM_DIG_LowerBound_88E(struct odm_dm_struct * pDM_Odm) void ODM_DIG_LowerBound_88E(struct odm_dm_struct *dm_odm)
{ {
struct rtw_dig * pDM_DigTable = &pDM_Odm->DM_DigTable; struct rtw_dig *pDM_DigTable = &dm_odm->DM_DigTable;
if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) {
{
pDM_DigTable->rx_gain_range_min = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; pDM_DigTable->rx_gain_range_min = (u1Byte) pDM_DigTable->AntDiv_RSSI_max;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("ODM_DIG_LowerBound_88E(): pDM_DigTable->AntDiv_RSSI_max=%d\n", pDM_DigTable->AntDiv_RSSI_max)); ("ODM_DIG_LowerBound_88E(): pDM_DigTable->AntDiv_RSSI_max=%d\n", pDM_DigTable->AntDiv_RSSI_max));
} }
/* If only one Entry connected */ /* If only one Entry connected */
} }
static void odm_RX_HWAntDivInit(struct odm_dm_struct * pDM_Odm) static void odm_RX_HWAntDivInit(struct odm_dm_struct *dm_odm)
{ {
u4Byte value32; u4Byte value32;
struct adapter *Adapter = pDM_Odm->Adapter; struct adapter *Adapter = dm_odm->Adapter;
if (*(pDM_Odm->mp_mode) == 1) if (*(dm_odm->mp_mode) == 1) {
{ dm_odm->AntDivType = CGCS_RX_SW_ANTDIV;
pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 0); /* disable HW AntDiv */
ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); /* disable HW AntDiv */ ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT31, 1); /* 1:CG, 0:CS */
ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); /* 1:CG, 0:CS */
return; return;
} }
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_RX_HWAntDivInit()\n")); ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_RX_HWAntDivInit()\n"));
/* MAC Setting */ /* MAC Setting */
value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
ODM_SetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
/* Pin Settings */ /* Pin Settings */
ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N , BIT9|BIT8, 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */ ODM_SetBBReg(dm_odm, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT10, 0); /* Reg864[10]=1'b0 antsel2 by HW */ ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0); /* Reg864[10]=1'b0 antsel2 by HW */
ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT22, 1); /* Regb2c[22]=1'b0 disable CS/CG switch */ ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT22, 1); /* Regb2c[22]=1'b0 disable CS/CG switch */
ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); /* Regb2c[31]=1'b1 output at CG only */ ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT31, 1); /* Regb2c[31]=1'b1 output at CG only */
/* OFDM Settings */ /* OFDM Settings */
ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N , bMaskDWord, 0x000000a0); ODM_SetBBReg(dm_odm, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0);
/* CCK Settings */ /* CCK Settings */
ODM_SetBBReg(pDM_Odm, ODM_REG_BB_PWR_SAV4_11N , BIT7, 1); /* Fix CCK PHY status report issue */ ODM_SetBBReg(dm_odm, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1); /* Fix CCK PHY status report issue */
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N , BIT4, 1); /* CCK complete HW AntDiv within 64 samples */ ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1); /* CCK complete HW AntDiv within 64 samples */
ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT); ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT);
ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , 0xFFFF, 0x0201); /* antenna mapping table */ ODM_SetBBReg(dm_odm, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0201); /* antenna mapping table */
} }
static void odm_TRX_HWAntDivInit(struct odm_dm_struct * pDM_Odm) static void odm_TRX_HWAntDivInit(struct odm_dm_struct *dm_odm)
{ {
u4Byte value32; u4Byte value32;
struct adapter * Adapter = pDM_Odm->Adapter; struct adapter *Adapter = dm_odm->Adapter;
if (*(pDM_Odm->mp_mode) == 1) { if (*(dm_odm->mp_mode) == 1) {
pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; dm_odm->AntDivType = CGCS_RX_SW_ANTDIV;
ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); /* disable HW AntDiv */ ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 0); /* disable HW AntDiv */
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, 0); /* Default RX (0/1) */ ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT5|BIT4|BIT3, 0); /* Default RX (0/1) */
return; return;
} }
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_TRX_HWAntDivInit()\n")); ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_TRX_HWAntDivInit()\n"));
/* MAC Setting */ /* MAC Setting */
value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord); value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
ODM_SetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
/* Pin Settings */ /* Pin Settings */
ODM_SetBBReg(pDM_Odm, ODM_REG_PIN_CTRL_11N , BIT9|BIT8, 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */ ODM_SetBBReg(dm_odm, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT10, 0); /* Reg864[10]=1'b0 antsel2 by HW */ ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0); /* Reg864[10]=1'b0 antsel2 by HW */
ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT22, 0); /* Regb2c[22]=1'b0 disable CS/CG switch */ ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT22, 0); /* Regb2c[22]=1'b0 disable CS/CG switch */
ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); /* Regb2c[31]=1'b1 output at CG only */ ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT31, 1); /* Regb2c[31]=1'b1 output at CG only */
/* OFDM Settings */ /* OFDM Settings */
ODM_SetBBReg(pDM_Odm, ODM_REG_ANTDIV_PARA1_11N , bMaskDWord, 0x000000a0); ODM_SetBBReg(dm_odm, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0);
/* CCK Settings */ /* CCK Settings */
ODM_SetBBReg(pDM_Odm, ODM_REG_BB_PWR_SAV4_11N , BIT7, 1); /* Fix CCK PHY status report issue */ ODM_SetBBReg(dm_odm, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1); /* Fix CCK PHY status report issue */
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA2_11N , BIT4, 1); /* CCK complete HW AntDiv within 64 samples */ ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1); /* CCK complete HW AntDiv within 64 samples */
/* Tx Settings */ /* Tx Settings */
ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N , BIT21, 0); /* Reg80c[21]=1'b0 from TX Reg */ ODM_SetBBReg(dm_odm, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0); /* Reg80c[21]=1'b0 from TX Reg */
ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT); ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT);
/* antenna mapping table */ /* antenna mapping table */
if (!pDM_Odm->bIsMPChip) /* testchip */ if (!dm_odm->bIsMPChip) { /* testchip */
{ ODM_SetBBReg(dm_odm, ODM_REG_RX_DEFUALT_A_11N, BIT10|BIT9|BIT8, 1); /* Reg858[10:8]=3'b001 */
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT10|BIT9|BIT8, 1); /* Reg858[10:8]=3'b001 */ ODM_SetBBReg(dm_odm, ODM_REG_RX_DEFUALT_A_11N, BIT13|BIT12|BIT11, 2); /* Reg858[13:11]=3'b010 */
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT13|BIT12|BIT11, 2); /* Reg858[13:11]=3'b010 */ } else { /* MPchip */
ODM_SetBBReg(dm_odm, ODM_REG_ANT_MAPPING1_11N, bMaskDWord, 0x0201); /* Reg914=3'b010, Reg915=3'b001 */
} }
else /* MPchip */
ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , bMaskDWord, 0x0201); /* Reg914=3'b010, Reg915=3'b001 */
} }
static void odm_FastAntTrainingInit(struct odm_dm_struct *pDM_Odm) static void odm_FastAntTrainingInit(struct odm_dm_struct *dm_odm)
{ {
u4Byte value32, i; u4Byte value32, i;
struct fast_ant_train *pDM_FatTable = &pDM_Odm->DM_FatTable; struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
u4Byte AntCombination = 2; u4Byte AntCombination = 2;
struct adapter * Adapter = pDM_Odm->Adapter; struct adapter *Adapter = dm_odm->Adapter;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_FastAntTrainingInit()\n"));
if (*(pDM_Odm->mp_mode) == 1) { ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_FastAntTrainingInit()\n"));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("pDM_Odm->AntDivType: %d\n", pDM_Odm->AntDivType));
if (*(dm_odm->mp_mode) == 1) {
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("dm_odm->AntDivType: %d\n", dm_odm->AntDivType));
return; return;
} }
for (i = 0; i < 6; i++) { for (i = 0; i < 6; i++) {
pDM_FatTable->Bssid[i] = 0; dm_fat_tbl->Bssid[i] = 0;
pDM_FatTable->antSumRSSI[i] = 0; dm_fat_tbl->antSumRSSI[i] = 0;
pDM_FatTable->antRSSIcnt[i] = 0; dm_fat_tbl->antRSSIcnt[i] = 0;
pDM_FatTable->antAveRSSI[i] = 0; dm_fat_tbl->antAveRSSI[i] = 0;
} }
pDM_FatTable->TrainIdx = 0; dm_fat_tbl->TrainIdx = 0;
pDM_FatTable->FAT_State = FAT_NORMAL_STATE; dm_fat_tbl->FAT_State = FAT_NORMAL_STATE;
/* MAC Setting */ /* MAC Setting */
value32 = ODM_GetMACReg(pDM_Odm, 0x4c, bMaskDWord); value32 = ODM_GetMACReg(dm_odm, 0x4c, bMaskDWord);
ODM_SetMACReg(pDM_Odm, 0x4c, bMaskDWord, value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */ ODM_SetMACReg(dm_odm, 0x4c, bMaskDWord, value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
value32 = ODM_GetMACReg(pDM_Odm, 0x7B4, bMaskDWord); value32 = ODM_GetMACReg(dm_odm, 0x7B4, bMaskDWord);
ODM_SetMACReg(pDM_Odm, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); /* Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */ ODM_SetMACReg(dm_odm, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); /* Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */
/* Match MAC ADDR */ /* Match MAC ADDR */
ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, 0); ODM_SetMACReg(dm_odm, 0x7b4, 0xFFFF, 0);
ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, 0); ODM_SetMACReg(dm_odm, 0x7b0, bMaskDWord, 0);
ODM_SetBBReg(pDM_Odm, 0x870 , BIT9|BIT8, 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */ ODM_SetBBReg(dm_odm, 0x870, BIT9|BIT8, 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */
ODM_SetBBReg(pDM_Odm, 0x864 , BIT10, 0); /* Reg864[10]=1'b0 antsel2 by HW */ ODM_SetBBReg(dm_odm, 0x864, BIT10, 0); /* Reg864[10]=1'b0 antsel2 by HW */
ODM_SetBBReg(pDM_Odm, 0xb2c , BIT22, 0); /* Regb2c[22]=1'b0 disable CS/CG switch */ ODM_SetBBReg(dm_odm, 0xb2c, BIT22, 0); /* Regb2c[22]=1'b0 disable CS/CG switch */
ODM_SetBBReg(pDM_Odm, 0xb2c , BIT31, 1); /* Regb2c[31]=1'b1 output at CG only */ ODM_SetBBReg(dm_odm, 0xb2c, BIT31, 1); /* Regb2c[31]=1'b1 output at CG only */
ODM_SetBBReg(pDM_Odm, 0xca4 , bMaskDWord, 0x000000a0); ODM_SetBBReg(dm_odm, 0xca4, bMaskDWord, 0x000000a0);
/* antenna mapping table */ /* antenna mapping table */
if (AntCombination == 2) if (AntCombination == 2) {
{ if (!dm_odm->bIsMPChip) { /* testchip */
if (!pDM_Odm->bIsMPChip) /* testchip */ ODM_SetBBReg(dm_odm, 0x858, BIT10|BIT9|BIT8, 1); /* Reg858[10:8]=3'b001 */
{ ODM_SetBBReg(dm_odm, 0x858, BIT13|BIT12|BIT11, 2); /* Reg858[13:11]=3'b010 */
ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 1); /* Reg858[10:8]=3'b001 */ } else { /* MPchip */
ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 2); /* Reg858[13:11]=3'b010 */ ODM_SetBBReg(dm_odm, 0x914, bMaskByte0, 1);
} ODM_SetBBReg(dm_odm, 0x914, bMaskByte1, 2);
else /* MPchip */
{
ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 1);
ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 2);
} }
} else if (AntCombination == 7) { } else if (AntCombination == 7) {
if (!pDM_Odm->bIsMPChip) /* testchip */ if (!dm_odm->bIsMPChip) { /* testchip */
{ ODM_SetBBReg(dm_odm, 0x858, BIT10|BIT9|BIT8, 0); /* Reg858[10:8]=3'b000 */
ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 0); /* Reg858[10:8]=3'b000 */ ODM_SetBBReg(dm_odm, 0x858, BIT13|BIT12|BIT11, 1); /* Reg858[13:11]=3'b001 */
ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 1); /* Reg858[13:11]=3'b001 */ ODM_SetBBReg(dm_odm, 0x878, BIT16, 0);
ODM_SetBBReg(pDM_Odm, 0x878 , BIT16, 0); ODM_SetBBReg(dm_odm, 0x858, BIT15|BIT14, 2); /* Reg878[0],Reg858[14:15])=3'b010 */
ODM_SetBBReg(pDM_Odm, 0x858 , BIT15|BIT14, 2); /* Reg878[0],Reg858[14:15])=3'b010 */ ODM_SetBBReg(dm_odm, 0x878, BIT19|BIT18|BIT17, 3);/* Reg878[3:1]=3b'011 */
ODM_SetBBReg(pDM_Odm, 0x878 , BIT19|BIT18|BIT17, 3);/* Reg878[3:1]=3b'011 */ ODM_SetBBReg(dm_odm, 0x878, BIT22|BIT21|BIT20, 4);/* Reg878[6:4]=3b'100 */
ODM_SetBBReg(pDM_Odm, 0x878 , BIT22|BIT21|BIT20, 4);/* Reg878[6:4]=3b'100 */ ODM_SetBBReg(dm_odm, 0x878, BIT25|BIT24|BIT23, 5);/* Reg878[9:7]=3b'101 */
ODM_SetBBReg(pDM_Odm, 0x878 , BIT25|BIT24|BIT23, 5);/* Reg878[9:7]=3b'101 */ ODM_SetBBReg(dm_odm, 0x878, BIT28|BIT27|BIT26, 6);/* Reg878[12:10]=3b'110 */
ODM_SetBBReg(pDM_Odm, 0x878 , BIT28|BIT27|BIT26, 6);/* Reg878[12:10]=3b'110 */ ODM_SetBBReg(dm_odm, 0x878, BIT31|BIT30|BIT29, 7);/* Reg878[15:13]=3b'111 */
ODM_SetBBReg(pDM_Odm, 0x878 , BIT31|BIT30|BIT29, 7);/* Reg878[15:13]=3b'111 */ } else { /* MPchip */
} ODM_SetBBReg(dm_odm, 0x914, bMaskByte0, 0);
else /* MPchip */ ODM_SetBBReg(dm_odm, 0x914, bMaskByte1, 1);
{ ODM_SetBBReg(dm_odm, 0x914, bMaskByte2, 2);
ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte0, 0); ODM_SetBBReg(dm_odm, 0x914, bMaskByte3, 3);
ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 1); ODM_SetBBReg(dm_odm, 0x918, bMaskByte0, 4);
ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte2, 2); ODM_SetBBReg(dm_odm, 0x918, bMaskByte1, 5);
ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte3, 3); ODM_SetBBReg(dm_odm, 0x918, bMaskByte2, 6);
ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte0, 4); ODM_SetBBReg(dm_odm, 0x918, bMaskByte3, 7);
ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte1, 5);
ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte2, 6);
ODM_SetBBReg(pDM_Odm, 0x918 , bMaskByte3, 7);
} }
} }
/* Default Ant Setting when no fast training */ /* Default Ant Setting when no fast training */
ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 1); /* Reg80c[21]=1'b1 from TX Info */ ODM_SetBBReg(dm_odm, 0x80c, BIT21, 1); /* Reg80c[21]=1'b1 from TX Info */
ODM_SetBBReg(pDM_Odm, 0x864 , BIT5|BIT4|BIT3, 0); /* Default RX */ ODM_SetBBReg(dm_odm, 0x864, BIT5|BIT4|BIT3, 0); /* Default RX */
ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, 1); /* Optional RX */ ODM_SetBBReg(dm_odm, 0x864, BIT8|BIT7|BIT6, 1); /* Optional RX */
/* ODM_SetBBReg(pDM_Odm, 0x860 , BIT14|BIT13|BIT12, 1); Default TX */
/* Enter Traing state */ /* Enter Traing state */
ODM_SetBBReg(pDM_Odm, 0x864 , BIT2|BIT1|BIT0, (AntCombination-1)); /* Reg864[2:0]=3'd6 ant combination=reg864[2:0]+1 */ ODM_SetBBReg(dm_odm, 0x864, BIT2|BIT1|BIT0, (AntCombination-1)); /* Reg864[2:0]=3'd6 ant combination=reg864[2:0]+1 */
ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 1); /* RegC50[7]=1'b1 enable HW AntDiv */ ODM_SetBBReg(dm_odm, 0xc50, BIT7, 1); /* RegC50[7]=1'b1 enable HW AntDiv */
} }
void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *pDM_Odm) void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *dm_odm)
{ {
if (pDM_Odm->SupportICType != ODM_RTL8188E) if (dm_odm->SupportICType != ODM_RTL8188E)
return; return;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->AntDivType=%d\n",pDM_Odm->AntDivType)); ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_odm->AntDivType=%d\n", dm_odm->AntDivType));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->bIsMPChip=%s\n",(pDM_Odm->bIsMPChip?"true":"false"))); ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_odm->bIsMPChip=%s\n", (dm_odm->bIsMPChip ? "true" : "false")));
if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)
odm_RX_HWAntDivInit(pDM_Odm); odm_RX_HWAntDivInit(dm_odm);
else if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) else if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
odm_TRX_HWAntDivInit(pDM_Odm); odm_TRX_HWAntDivInit(dm_odm);
else if (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV) else if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV)
odm_FastAntTrainingInit(pDM_Odm); odm_FastAntTrainingInit(dm_odm);
} }
void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *pDM_Odm, u1Byte Ant) void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *dm_odm, u1Byte Ant)
{ {
struct fast_ant_train *pDM_FatTable = &pDM_Odm->DM_FatTable; struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
u4Byte DefaultAnt, OptionalAnt; u4Byte DefaultAnt, OptionalAnt;
if (pDM_FatTable->RxIdleAnt != Ant) if (dm_fat_tbl->RxIdleAnt != Ant) {
{ ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Update Rx Idle Ant\n"));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Update Rx Idle Ant\n")); if (Ant == MAIN_ANT) {
if (Ant == MAIN_ANT) DefaultAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
{ OptionalAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
DefaultAnt = (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)?MAIN_ANT_CG_TRX:MAIN_ANT_CGCS_RX; } else {
OptionalAnt = (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)?AUX_ANT_CG_TRX:AUX_ANT_CGCS_RX; DefaultAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
} OptionalAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
else
{
DefaultAnt = (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)?AUX_ANT_CG_TRX:AUX_ANT_CGCS_RX;
OptionalAnt = (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)?MAIN_ANT_CG_TRX:MAIN_ANT_CGCS_RX;
} }
if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) {
{ ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT5|BIT4|BIT3, DefaultAnt); /* Default RX */
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, DefaultAnt); /* Default RX */ ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT8|BIT7|BIT6, OptionalAnt); /* Optional RX */
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT8|BIT7|BIT6, OptionalAnt); /* Optional RX */ ODM_SetBBReg(dm_odm, ODM_REG_ANTSEL_CTRL_11N, BIT14|BIT13|BIT12, DefaultAnt); /* Default TX */
ODM_SetBBReg(pDM_Odm, ODM_REG_ANTSEL_CTRL_11N , BIT14|BIT13|BIT12, DefaultAnt); /* Default TX */ ODM_SetMACReg(dm_odm, ODM_REG_RESP_TX_11N, BIT6|BIT7, DefaultAnt); /* Resp Tx */
ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11N , BIT6|BIT7, DefaultAnt); /* Resp Tx */ } else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) {
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT5|BIT4|BIT3, DefaultAnt); /* Default RX */
} ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT8|BIT7|BIT6, OptionalAnt); /* Optional RX */
else if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)
{
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, DefaultAnt); /* Default RX */
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT8|BIT7|BIT6, OptionalAnt); /* Optional RX */
} }
} }
pDM_FatTable->RxIdleAnt = Ant; dm_fat_tbl->RxIdleAnt = Ant;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RxIdleAnt=%s\n",(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RxIdleAnt=%s\n", (Ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
printk("RxIdleAnt=%s\n",(Ant==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"); pr_info("RxIdleAnt=%s\n", (Ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
} }
static void odm_UpdateTxAnt_88E(struct odm_dm_struct *dm_odm, u1Byte Ant, u4Byte MacId)
static void odm_UpdateTxAnt_88E(struct odm_dm_struct *pDM_Odm, u1Byte Ant, u4Byte MacId)
{ {
struct fast_ant_train *pDM_FatTable = &pDM_Odm->DM_FatTable; struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
u1Byte TargetAnt; u1Byte TargetAnt;
if (Ant == MAIN_ANT) if (Ant == MAIN_ANT)
TargetAnt = MAIN_ANT_CG_TRX; TargetAnt = MAIN_ANT_CG_TRX;
else else
TargetAnt = AUX_ANT_CG_TRX; TargetAnt = AUX_ANT_CG_TRX;
dm_fat_tbl->antsel_a[MacId] = TargetAnt&BIT0;
dm_fat_tbl->antsel_b[MacId] = (TargetAnt&BIT1)>>1;
dm_fat_tbl->antsel_c[MacId] = (TargetAnt&BIT2)>>2;
pDM_FatTable->antsel_a[MacId] = TargetAnt&BIT0; ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
pDM_FatTable->antsel_b[MacId] = (TargetAnt&BIT1)>>1; ("Tx from TxInfo, TargetAnt=%s\n",
pDM_FatTable->antsel_c[MacId] = (TargetAnt&BIT2)>>2;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Tx from TxInfo, TargetAnt=%s\n",
(Ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT")); (Ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=3'b%d%d%d\n", ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
pDM_FatTable->antsel_c[MacId] , pDM_FatTable->antsel_b[MacId] , pDM_FatTable->antsel_a[MacId] )); ("antsel_tr_mux=3'b%d%d%d\n",
dm_fat_tbl->antsel_c[MacId], dm_fat_tbl->antsel_b[MacId], dm_fat_tbl->antsel_a[MacId]));
} }
void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *pDM_Odm, pu1Byte pDesc, u1Byte macId) void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *dm_odm, pu1Byte pDesc, u1Byte macId)
{ {
struct fast_ant_train *pDM_FatTable = &pDM_Odm->DM_FatTable; struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) { if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV)) {
SET_TX_DESC_ANTSEL_A_88E(pDesc, pDM_FatTable->antsel_a[macId]); SET_TX_DESC_ANTSEL_A_88E(pDesc, dm_fat_tbl->antsel_a[macId]);
SET_TX_DESC_ANTSEL_B_88E(pDesc, pDM_FatTable->antsel_b[macId]); SET_TX_DESC_ANTSEL_B_88E(pDesc, dm_fat_tbl->antsel_b[macId]);
SET_TX_DESC_ANTSEL_C_88E(pDesc, pDM_FatTable->antsel_c[macId]); SET_TX_DESC_ANTSEL_C_88E(pDesc, dm_fat_tbl->antsel_c[macId]);
} }
} }
void ODM_AntselStatistics_88E(struct odm_dm_struct *pDM_Odm, u1Byte antsel_tr_mux, u4Byte MacId, u1Byte RxPWDBAll) void ODM_AntselStatistics_88E(struct odm_dm_struct *dm_odm, u1Byte antsel_tr_mux, u4Byte MacId, u1Byte RxPWDBAll)
{ {
struct fast_ant_train *pDM_FatTable = &pDM_Odm->DM_FatTable; struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) { if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) {
if (antsel_tr_mux == MAIN_ANT_CG_TRX) { if (antsel_tr_mux == MAIN_ANT_CG_TRX) {
dm_fat_tbl->MainAnt_Sum[MacId] += RxPWDBAll;
pDM_FatTable->MainAnt_Sum[MacId]+=RxPWDBAll; dm_fat_tbl->MainAnt_Cnt[MacId]++;
pDM_FatTable->MainAnt_Cnt[MacId]++;
} else { } else {
pDM_FatTable->AuxAnt_Sum[MacId]+=RxPWDBAll; dm_fat_tbl->AuxAnt_Sum[MacId] += RxPWDBAll;
pDM_FatTable->AuxAnt_Cnt[MacId]++; dm_fat_tbl->AuxAnt_Cnt[MacId]++;
} }
} else if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) { } else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) {
if (antsel_tr_mux == MAIN_ANT_CGCS_RX) { if (antsel_tr_mux == MAIN_ANT_CGCS_RX) {
pDM_FatTable->MainAnt_Sum[MacId]+=RxPWDBAll; dm_fat_tbl->MainAnt_Sum[MacId] += RxPWDBAll;
pDM_FatTable->MainAnt_Cnt[MacId]++; dm_fat_tbl->MainAnt_Cnt[MacId]++;
} else { } else {
pDM_FatTable->AuxAnt_Sum[MacId]+=RxPWDBAll; dm_fat_tbl->AuxAnt_Sum[MacId] += RxPWDBAll;
pDM_FatTable->AuxAnt_Cnt[MacId]++; dm_fat_tbl->AuxAnt_Cnt[MacId]++;
} }
} }
} }
#define TX_BY_REG 0 static void odm_HWAntDiv(struct odm_dm_struct *dm_odm)
static void odm_HWAntDiv(struct odm_dm_struct *pDM_Odm)
{ {
u4Byte i, MinRSSI = 0xFF, AntDivMaxRSSI = 0, MaxRSSI = 0, LocalMinRSSI, LocalMaxRSSI; u4Byte i, MinRSSI = 0xFF, AntDivMaxRSSI = 0, MaxRSSI = 0, LocalMinRSSI, LocalMaxRSSI;
u4Byte Main_RSSI, Aux_RSSI; u4Byte Main_RSSI, Aux_RSSI;
u1Byte RxIdleAnt = 0, TargetAnt = 7; u1Byte RxIdleAnt = 0, TargetAnt = 7;
struct fast_ant_train *pDM_FatTable = &pDM_Odm->DM_FatTable; struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; struct rtw_dig *pDM_DigTable = &dm_odm->DM_DigTable;
bool bMatchBSSID; bool bMatchBSSID;
bool bPktFilterMacth = false; bool bPktFilterMacth = false;
struct sta_info *pEntry; struct sta_info *pEntry;
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
pEntry = pDM_Odm->pODM_StaInfo[i]; pEntry = dm_odm->pODM_StaInfo[i];
if (IS_STA_VALID(pEntry)) { if (IS_STA_VALID(pEntry)) {
/* 2 Caculate RSSI per Antenna */ /* 2 Caculate RSSI per Antenna */
Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0; Main_RSSI = (dm_fat_tbl->MainAnt_Cnt[i] != 0) ? (dm_fat_tbl->MainAnt_Sum[i]/dm_fat_tbl->MainAnt_Cnt[i]) : 0;
Aux_RSSI = (pDM_FatTable->AuxAnt_Cnt[i]!=0)?(pDM_FatTable->AuxAnt_Sum[i]/pDM_FatTable->AuxAnt_Cnt[i]):0; Aux_RSSI = (dm_fat_tbl->AuxAnt_Cnt[i] != 0) ? (dm_fat_tbl->AuxAnt_Sum[i]/dm_fat_tbl->AuxAnt_Cnt[i]) : 0;
TargetAnt = (Main_RSSI >= Aux_RSSI) ? MAIN_ANT : AUX_ANT; TargetAnt = (Main_RSSI >= Aux_RSSI) ? MAIN_ANT : AUX_ANT;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MacID=%d, MainAnt_Sum=%d, MainAnt_Cnt=%d\n", i, pDM_FatTable->MainAnt_Sum[i], pDM_FatTable->MainAnt_Cnt[i])); ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MacID=%d, AuxAnt_Sum=%d, AuxAnt_Cnt=%d\n",i, pDM_FatTable->AuxAnt_Sum[i], pDM_FatTable->AuxAnt_Cnt[i])); ("MacID=%d, MainAnt_Sum=%d, MainAnt_Cnt=%d\n",
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MacID=%d, Main_RSSI= %d, Aux_RSSI= %d\n", i, Main_RSSI, Aux_RSSI)); i, dm_fat_tbl->MainAnt_Sum[i],
dm_fat_tbl->MainAnt_Cnt[i]));
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("MacID=%d, AuxAnt_Sum=%d, AuxAnt_Cnt=%d\n",
i, dm_fat_tbl->AuxAnt_Sum[i], dm_fat_tbl->AuxAnt_Cnt[i]));
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("MacID=%d, Main_RSSI= %d, Aux_RSSI= %d\n",
i, Main_RSSI, Aux_RSSI));
/* 2 Select MaxRSSI for DIG */ /* 2 Select MaxRSSI for DIG */
LocalMaxRSSI = (Main_RSSI > Aux_RSSI) ? Main_RSSI : Aux_RSSI; LocalMaxRSSI = (Main_RSSI > Aux_RSSI) ? Main_RSSI : Aux_RSSI;
if ((LocalMaxRSSI > AntDivMaxRSSI) && (LocalMaxRSSI < 40)) if ((LocalMaxRSSI > AntDivMaxRSSI) && (LocalMaxRSSI < 40))
@ -337,9 +318,9 @@ static void odm_HWAntDiv(struct odm_dm_struct *pDM_Odm)
MaxRSSI = LocalMaxRSSI; MaxRSSI = LocalMaxRSSI;
/* 2 Select RX Idle Antenna */ /* 2 Select RX Idle Antenna */
if ((pDM_FatTable->RxIdleAnt == MAIN_ANT) && (Main_RSSI == 0)) if ((dm_fat_tbl->RxIdleAnt == MAIN_ANT) && (Main_RSSI == 0))
Main_RSSI = Aux_RSSI; Main_RSSI = Aux_RSSI;
else if ((pDM_FatTable->RxIdleAnt == AUX_ANT) && (Aux_RSSI == 0)) else if ((dm_fat_tbl->RxIdleAnt == AUX_ANT) && (Aux_RSSI == 0))
Aux_RSSI = Main_RSSI; Aux_RSSI = Main_RSSI;
LocalMinRSSI = (Main_RSSI > Aux_RSSI) ? Aux_RSSI : Main_RSSI; LocalMinRSSI = (Main_RSSI > Aux_RSSI) ? Aux_RSSI : Main_RSSI;
@ -347,83 +328,62 @@ static void odm_HWAntDiv(struct odm_dm_struct *pDM_Odm)
MinRSSI = LocalMinRSSI; MinRSSI = LocalMinRSSI;
RxIdleAnt = TargetAnt; RxIdleAnt = TargetAnt;
} }
#if TX_BY_REG
#else
/* 2 Select TRX Antenna */ /* 2 Select TRX Antenna */
if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
odm_UpdateTxAnt_88E(pDM_Odm, TargetAnt, i); odm_UpdateTxAnt_88E(dm_odm, TargetAnt, i);
#endif
} }
pDM_FatTable->MainAnt_Sum[i] = 0; dm_fat_tbl->MainAnt_Sum[i] = 0;
pDM_FatTable->AuxAnt_Sum[i] = 0; dm_fat_tbl->AuxAnt_Sum[i] = 0;
pDM_FatTable->MainAnt_Cnt[i] = 0; dm_fat_tbl->MainAnt_Cnt[i] = 0;
pDM_FatTable->AuxAnt_Cnt[i] = 0; dm_fat_tbl->AuxAnt_Cnt[i] = 0;
} }
/* 2 Set RX Idle Antenna */ /* 2 Set RX Idle Antenna */
ODM_UpdateRxIdleAnt_88E(pDM_Odm, RxIdleAnt); ODM_UpdateRxIdleAnt_88E(dm_odm, RxIdleAnt);
pDM_DigTable->AntDiv_RSSI_max = AntDivMaxRSSI; pDM_DigTable->AntDiv_RSSI_max = AntDivMaxRSSI;
pDM_DigTable->RSSI_max = MaxRSSI; pDM_DigTable->RSSI_max = MaxRSSI;
} }
void void ODM_AntennaDiversity_88E(struct odm_dm_struct *dm_odm)
ODM_AntennaDiversity_88E(
struct odm_dm_struct * pDM_Odm
)
{ {
struct fast_ant_train *pDM_FatTable = &pDM_Odm->DM_FatTable; struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
if ((pDM_Odm->SupportICType != ODM_RTL8188E) || (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV))) if ((dm_odm->SupportICType != ODM_RTL8188E) || (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV)))
return; return;
if (!pDM_Odm->bLinked) if (!dm_odm->bLinked) {
{ ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_AntennaDiversity_88E(): No Link.\n"));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_AntennaDiversity_88E(): No Link.\n")); if (dm_fat_tbl->bBecomeLinked) {
if (pDM_FatTable->bBecomeLinked == true) ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn off HW AntDiv\n"));
{ ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 0); /* RegC50[7]=1'b1 enable HW AntDiv */
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn off HW AntDiv\n")); ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 0); /* Enable CCK AntDiv */
ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); /* RegC50[7]=1'b1 enable HW AntDiv */ if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA1_11N , BIT15, 0); /* Enable CCK AntDiv */ ODM_SetBBReg(dm_odm, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0); /* Reg80c[21]=1'b0 from TX Reg */
if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;
ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N , BIT21, 0); /* Reg80c[21]=1'b0 from TX Reg */
pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked;
} }
return; return;
} } else {
else if (!dm_fat_tbl->bBecomeLinked) {
{ ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn on HW AntDiv\n"));
if (pDM_FatTable->bBecomeLinked ==false)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn on HW AntDiv\n"));
/* Because HW AntDiv is disabled before Link, we enable HW AntDiv after link */ /* Because HW AntDiv is disabled before Link, we enable HW AntDiv after link */
ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 1); /* RegC50[7]=1'b1 enable HW AntDiv */ ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 1); /* RegC50[7]=1'b1 enable HW AntDiv */
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA1_11N , BIT15, 1); /* Enable CCK AntDiv */ ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 1); /* Enable CCK AntDiv */
if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) { if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
#if TX_BY_REG ODM_SetBBReg(dm_odm, ODM_REG_TX_ANT_CTRL_11N, BIT21, 1); /* Reg80c[21]=1'b1 from TX Info */
ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N , BIT21, 0); /* Reg80c[21]=1'b0 from Reg */ dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;
#else
ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N , BIT21, 1); /* Reg80c[21]=1'b1 from TX Info */
#endif
}
pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked;
} }
} }
if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV))
odm_HWAntDiv(dm_odm);
if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV))
odm_HWAntDiv(pDM_Odm);
} }
/* 3============================================================ */ /* 3============================================================ */
/* 3 Dynamic Primary CCA */ /* 3 Dynamic Primary CCA */
/* 3============================================================ */ /* 3============================================================ */
void void odm_PrimaryCCA_Init(struct odm_dm_struct *dm_odm)
odm_PrimaryCCA_Init(
struct odm_dm_struct * pDM_Odm)
{ {
struct dyn_primary_cca *PrimaryCCA = &(pDM_Odm->DM_PriCCA); struct dyn_primary_cca *PrimaryCCA = &(dm_odm->DM_PriCCA);
PrimaryCCA->DupRTS_flag = 0; PrimaryCCA->DupRTS_flag = 0;
PrimaryCCA->intf_flag = 0; PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0; PrimaryCCA->intf_type = 0;
@ -431,309 +391,14 @@ odm_PrimaryCCA_Init(
PrimaryCCA->PriCCA_flag = 0; PrimaryCCA->PriCCA_flag = 0;
} }
bool bool ODM_DynamicPrimaryCCA_DupRTS(struct odm_dm_struct *dm_odm)
ODM_DynamicPrimaryCCA_DupRTS(
struct odm_dm_struct * pDM_Odm
)
{ {
struct dyn_primary_cca *PrimaryCCA = &(pDM_Odm->DM_PriCCA); struct dyn_primary_cca *PrimaryCCA = &(dm_odm->DM_PriCCA);
return PrimaryCCA->DupRTS_flag; return PrimaryCCA->DupRTS_flag;
} }
void void odm_DynamicPrimaryCCA(struct odm_dm_struct *dm_odm)
odm_DynamicPrimaryCCA(
struct odm_dm_struct * pDM_Odm
)
{ {
struct adapter * Adapter = pDM_Odm->Adapter; /* for NIC */
struct rtl8192cd_priv *priv = pDM_Odm->priv; /* for AP */
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
struct dyn_primary_cca *PrimaryCCA = &(pDM_Odm->DM_PriCCA);
bool Is40MHz;
bool Client_40MHz = false, Client_tmp = false; /* connected client BW */
bool bConnected = false; /* connected or not */
static u1Byte Client_40MHz_pre = 0;
static u8Byte lastTxOkCnt = 0;
static u8Byte lastRxOkCnt = 0;
static u4Byte Counter = 0;
static u1Byte Delay = 1;
u8Byte curTxOkCnt;
u8Byte curRxOkCnt;
u1Byte SecCHOffset;
u1Byte i;
return;
if (pDM_Odm->SupportICType != ODM_RTL8188E)
return;
Is40MHz = *(pDM_Odm->pBandWidth);
SecCHOffset = *(pDM_Odm->pSecChOffset);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Second CH Offset = %d\n", SecCHOffset));
/* Debug Message==================== */
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("TP = %llu\n", curTxOkCnt+curRxOkCnt));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Is40MHz = %d\n", Is40MHz));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("BW_LSC = %d\n", FalseAlmCnt->Cnt_BW_LSC));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("BW_USC = %d\n", FalseAlmCnt->Cnt_BW_USC));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCA OFDM = %d\n", FalseAlmCnt->Cnt_OFDM_CCA));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCA CCK = %d\n", FalseAlmCnt->Cnt_CCK_CCA));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("OFDM FA = %d\n", FalseAlmCnt->Cnt_Ofdm_fail));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCK FA = %d\n", FalseAlmCnt->Cnt_Cck_fail));
/* */
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("bConnected=%d\n", bConnected));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Is Client 40MHz=%d\n", Client_40MHz));
/* 1 Monitor whether the interference exists or not */
if (PrimaryCCA->Monitor_flag == 1)
{
if (SecCHOffset == 1) /* secondary channel is below the primary channel */
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_LSC > FalseAlmCnt->Cnt_BW_USC+500))
{
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
{
PrimaryCCA->intf_type = 1;
PrimaryCCA->PriCCA_flag = 1;
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2); /* USC MF */
if (PrimaryCCA->DupRTS_flag == 1)
PrimaryCCA->DupRTS_flag = 0;
}
else
{
PrimaryCCA->intf_type = 2;
if (PrimaryCCA->DupRTS_flag == 0)
PrimaryCCA->DupRTS_flag = 1;
}
}
else /* interferecne disappear */
{
PrimaryCCA->DupRTS_flag = 0;
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
}
}
else if (SecCHOffset == 2) /* secondary channel is above the primary channel */
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_USC > FalseAlmCnt->Cnt_BW_LSC+500))
{
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
{
PrimaryCCA->intf_type = 1;
PrimaryCCA->PriCCA_flag = 1;
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1); /* LSC MF */
if (PrimaryCCA->DupRTS_flag == 1)
PrimaryCCA->DupRTS_flag = 0;
}
else
{
PrimaryCCA->intf_type = 2;
if (PrimaryCCA->DupRTS_flag == 0)
PrimaryCCA->DupRTS_flag = 1;
}
}
else /* interferecne disappear */
{
PrimaryCCA->DupRTS_flag = 0;
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
}
}
PrimaryCCA->Monitor_flag = 0;
}
/* 1 Dynamic Primary CCA Main Function */
if (PrimaryCCA->Monitor_flag == 0)
{
if (Is40MHz) /* if RFBW==40M mode which require to process primary cca */
{
/* 2 STA is NOT Connected */
if (!bConnected)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA NOT Connected!!!!\n"));
if (PrimaryCCA->PriCCA_flag == 1) /* reset primary cca when STA is disconnected */
{
PrimaryCCA->PriCCA_flag = 0;
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 0);
}
if (PrimaryCCA->DupRTS_flag == 1) /* reset Duplicate RTS when STA is disconnected */
PrimaryCCA->DupRTS_flag = 0;
if (SecCHOffset == 1) /* secondary channel is below the primary channel */
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9))
{
PrimaryCCA->intf_flag = 1; /* secondary channel interference is detected!!! */
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
}
else
{
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
}
}
else if (SecCHOffset == 2) /* secondary channel is above the primary channel */
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9))
{
PrimaryCCA->intf_flag = 1; /* secondary channel interference is detected!!! */
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
}
else
{
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
}
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("PrimaryCCA=%d\n",PrimaryCCA->PriCCA_flag));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Intf_Type=%d\n", PrimaryCCA->intf_type));
}
/* 2 STA is Connected */
else
{
if (Client_40MHz == 0) /* 3 client BW = 20MHz */
{
if (PrimaryCCA->PriCCA_flag == 0)
{
PrimaryCCA->PriCCA_flag = 1;
if (SecCHOffset==1)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2);
else if (SecCHOffset==2)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1);
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA Connected 20M!!! PrimaryCCA=%d\n", PrimaryCCA->PriCCA_flag));
}
else /* 3 client BW = 40MHz */
{
if (PrimaryCCA->intf_flag == 1) /* interference is detected!! */
{
if (PrimaryCCA->intf_type == 1)
{
if (PrimaryCCA->PriCCA_flag!=1)
{
PrimaryCCA->PriCCA_flag = 1;
if (SecCHOffset==1)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2);
else if (SecCHOffset==2)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1);
}
}
else if (PrimaryCCA->intf_type == 2)
{
if (PrimaryCCA->DupRTS_flag!=1)
PrimaryCCA->DupRTS_flag = 1;
}
}
else /* if intf_flag==0 */
{
if ((curTxOkCnt+curRxOkCnt)<10000) /* idle mode or TP traffic is very low */
{
if (SecCHOffset == 1)
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9))
{
PrimaryCCA->intf_flag = 1;
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
}
}
else if (SecCHOffset == 2)
{
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9))
{
PrimaryCCA->intf_flag = 1;
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
}
}
}
else /* TP Traffic is High */
{
if (SecCHOffset == 1)
{
if (FalseAlmCnt->Cnt_BW_LSC > (FalseAlmCnt->Cnt_BW_USC+500))
{
if (Delay == 0) /* add delay to avoid interference occurring abruptly, jump one time */
{
PrimaryCCA->intf_flag = 1;
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
Delay = 1;
}
else
Delay = 0;
}
}
else if (SecCHOffset == 2)
{
if (FalseAlmCnt->Cnt_BW_USC > (FalseAlmCnt->Cnt_BW_LSC+500))
{
if (Delay == 0) /* add delay to avoid interference occurring abruptly */
{
PrimaryCCA->intf_flag = 1;
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; /* interference is shift */
else
PrimaryCCA->intf_type = 2; /* interference is in-band */
Delay = 1;
}
else
Delay = 0;
}
}
}
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Primary CCA=%d\n", PrimaryCCA->PriCCA_flag));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Duplicate RTS=%d\n", PrimaryCCA->DupRTS_flag));
}
}/* end of connected */
}
}
/* 1 Dynamic Primary CCA Monitor Counter */
if ((PrimaryCCA->PriCCA_flag == 1)||(PrimaryCCA->DupRTS_flag == 1))
{
if (Client_40MHz == 0) /* client=20M no need to monitor primary cca flag */
{
Client_40MHz_pre = Client_40MHz;
return; return;
} }
Counter++;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Counter=%d\n", Counter));
if ((Counter == 30)||((Client_40MHz -Client_40MHz_pre)==1)) /* Every 60 sec to monitor one time */
{
PrimaryCCA->Monitor_flag = 1; /* monitor flag is triggered!!!!! */
if (PrimaryCCA->PriCCA_flag == 1)
{
PrimaryCCA->PriCCA_flag = 0;
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 0);
}
Counter = 0;
}
}
Client_40MHz_pre = Client_40MHz;
}

135
hal/odm_RegConfig8188E.c
View file

@ -20,69 +20,39 @@
#include "odm_precomp.h" #include "odm_precomp.h"
void void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr,
odm_ConfigRFReg_8188E( u4Byte Data, enum ODM_RF_RADIO_PATH RF_PATH,
struct odm_dm_struct * pDM_Odm, u4Byte RegAddr)
u4Byte Addr,
u4Byte Data,
enum ODM_RF_RADIO_PATH RF_PATH,
u4Byte RegAddr
)
{
if (Addr == 0xffe)
{ {
if (Addr == 0xffe) {
ODM_sleep_ms(50); ODM_sleep_ms(50);
} } else if (Addr == 0xfd) {
else if (Addr == 0xfd)
{
ODM_delay_ms(5); ODM_delay_ms(5);
} } else if (Addr == 0xfc) {
else if (Addr == 0xfc)
{
ODM_delay_ms(1); ODM_delay_ms(1);
} } else if (Addr == 0xfb) {
else if (Addr == 0xfb)
{
ODM_delay_us(50); ODM_delay_us(50);
} } else if (Addr == 0xfa) {
else if (Addr == 0xfa)
{
ODM_delay_us(5); ODM_delay_us(5);
} } else if (Addr == 0xf9) {
else if (Addr == 0xf9)
{
ODM_delay_us(1); ODM_delay_us(1);
} } else {
else
{
ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
/* Add 1us delay between BB/RF register setting. */ /* Add 1us delay between BB/RF register setting. */
ODM_delay_us(1); ODM_delay_us(1);
} }
} }
void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, u4Byte Data)
void
odm_ConfigRF_RadioA_8188E(
struct odm_dm_struct * pDM_Odm,
u4Byte Addr,
u4Byte Data
)
{ {
u4Byte content = 0x1000; /* RF_Content: radioa_txt */ u4Byte content = 0x1000; /* RF_Content: radioa_txt */
u4Byte maskforPhySet = (u4Byte)(content&0xE000); u4Byte maskforPhySet = (u4Byte)(content&0xE000);
odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_A, Addr|maskforPhySet); odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_A, Addr|maskforPhySet);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data));
} }
void void odm_ConfigRF_RadioB_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, u4Byte Data)
odm_ConfigRF_RadioB_8188E(
struct odm_dm_struct * pDM_Odm,
u4Byte Addr,
u4Byte Data
)
{ {
u4Byte content = 0x1001; /* RF_Content: radiob_txt */ u4Byte content = 0x1001; /* RF_Content: radiob_txt */
u4Byte maskforPhySet = (u4Byte)(content&0xE000); u4Byte maskforPhySet = (u4Byte)(content&0xE000);
@ -90,100 +60,71 @@ odm_ConfigRF_RadioB_8188E(
odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet); odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data));
} }
void void odm_ConfigMAC_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, u1Byte Data)
odm_ConfigMAC_8188E(
struct odm_dm_struct *pDM_Odm,
u4Byte Addr,
u1Byte Data
)
{ {
ODM_Write1Byte(pDM_Odm, Addr, Data); ODM_Write1Byte(pDM_Odm, Addr, Data);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data));
} }
void void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, u4Byte Bitmask, u4Byte Data)
odm_ConfigBB_AGC_8188E(
struct odm_dm_struct *pDM_Odm,
u4Byte Addr,
u4Byte Bitmask,
u4Byte Data
)
{ {
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
/* Add 1us delay between BB/RF register setting. */ /* Add 1us delay between BB/RF register setting. */
ODM_delay_us(1); ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n", Addr, Data)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE,
("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n",
Addr, Data));
} }
void void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr,
odm_ConfigBB_PHY_REG_PG_8188E( u4Byte Bitmask, u4Byte Data)
struct odm_dm_struct *pDM_Odm,
u4Byte Addr,
u4Byte Bitmask,
u4Byte Data
)
{ {
if (Addr == 0xfe) { if (Addr == 0xfe) {
ODM_sleep_ms(50); ODM_sleep_ms(50);
} } else if (Addr == 0xfd) {
else if (Addr == 0xfd){
ODM_delay_ms(5); ODM_delay_ms(5);
} } else if (Addr == 0xfc) {
else if (Addr == 0xfc){
ODM_delay_ms(1); ODM_delay_ms(1);
} } else if (Addr == 0xfb) {
else if (Addr == 0xfb){
ODM_delay_us(50); ODM_delay_us(50);
} } else if (Addr == 0xfa) {
else if (Addr == 0xfa){
ODM_delay_us(5); ODM_delay_us(5);
} } else if (Addr == 0xf9) {
else if (Addr == 0xf9){
ODM_delay_us(1); ODM_delay_us(1);
} } else{
else{ ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, ("===> @@@@@@@ ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data)); ("===> @@@@@@@ ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n",
Addr, Bitmask, Data));
storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data); storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data);
} }
} }
void void odm_ConfigBB_PHY_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, u4Byte Bitmask, u4Byte Data)
odm_ConfigBB_PHY_8188E(
struct odm_dm_struct *pDM_Odm,
u4Byte Addr,
u4Byte Bitmask,
u4Byte Data
)
{ {
if (Addr == 0xfe) { if (Addr == 0xfe) {
ODM_sleep_ms(50); ODM_sleep_ms(50);
} } else if (Addr == 0xfd) {
else if (Addr == 0xfd){
ODM_delay_ms(5); ODM_delay_ms(5);
} } else if (Addr == 0xfc) {
else if (Addr == 0xfc){
ODM_delay_ms(1); ODM_delay_ms(1);
} } else if (Addr == 0xfb) {
else if (Addr == 0xfb){
ODM_delay_us(50); ODM_delay_us(50);
} } else if (Addr == 0xfa) {
else if (Addr == 0xfa){
ODM_delay_us(5); ODM_delay_us(5);
} } else if (Addr == 0xf9) {
else if (Addr == 0xf9){
ODM_delay_us(1); ODM_delay_us(1);
} } else {
else{
if (Addr == 0xa24) if (Addr == 0xa24)
pDM_Odm->RFCalibrateInfo.RegA24 = Data; pDM_Odm->RFCalibrateInfo.RegA24 = Data;
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data); ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
/* Add 1us delay between BB/RF register setting. */ /* Add 1us delay between BB/RF register setting. */
ODM_delay_us(1); ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE,
("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n",
Addr, Data));
} }
} }

103
hal/odm_interface.c
View file

@ -18,14 +18,8 @@
* *
******************************************************************************/ ******************************************************************************/
/* */
/* include files */
/* */
#include "odm_precomp.h" #include "odm_precomp.h"
/* */
/* ODM IO Relative API. */ /* ODM IO Relative API. */
/* */
u1Byte ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr) u1Byte ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr)
{ {
@ -69,123 +63,63 @@ void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
} }
u4Byte u4Byte ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask)
ODM_GetMACReg(
struct odm_dm_struct *pDM_Odm,
u4Byte RegAddr,
u4Byte BitMask
)
{ {
struct adapter *Adapter = pDM_Odm->Adapter; struct adapter *Adapter = pDM_Odm->Adapter;
return PHY_QueryBBReg(Adapter, RegAddr, BitMask); return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
} }
void void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask, u4Byte Data)
ODM_SetBBReg(
struct odm_dm_struct *pDM_Odm,
u4Byte RegAddr,
u4Byte BitMask,
u4Byte Data
)
{ {
struct adapter *Adapter = pDM_Odm->Adapter; struct adapter *Adapter = pDM_Odm->Adapter;
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
} }
u4Byte u4Byte ODM_GetBBReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask)
ODM_GetBBReg(
struct odm_dm_struct *pDM_Odm,
u4Byte RegAddr,
u4Byte BitMask
)
{ {
struct adapter *Adapter = pDM_Odm->Adapter; struct adapter *Adapter = pDM_Odm->Adapter;
return PHY_QueryBBReg(Adapter, RegAddr, BitMask); return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
} }
void ODM_SetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u4Byte RegAddr, u4Byte BitMask, u4Byte Data)
void
ODM_SetRFReg(
struct odm_dm_struct *pDM_Odm,
enum ODM_RF_RADIO_PATH eRFPath,
u4Byte RegAddr,
u4Byte BitMask,
u4Byte Data
)
{ {
struct adapter *Adapter = pDM_Odm->Adapter; struct adapter *Adapter = pDM_Odm->Adapter;
PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask, Data); PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask, Data);
} }
u4Byte ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u4Byte RegAddr, u4Byte BitMask)
u4Byte
ODM_GetRFReg(
struct odm_dm_struct *pDM_Odm,
enum ODM_RF_RADIO_PATH eRFPath,
u4Byte RegAddr,
u4Byte BitMask
)
{ {
struct adapter *Adapter = pDM_Odm->Adapter; struct adapter *Adapter = pDM_Odm->Adapter;
return PHY_QueryRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask); return PHY_QueryRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask);
} }
/* */
/* ODM Memory relative API. */ /* ODM Memory relative API. */
/* */ void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u4Byte length)
void
ODM_AllocateMemory(
struct odm_dm_struct *pDM_Odm,
void * *pPtr,
u4Byte length
)
{ {
*pPtr = rtw_zvmalloc(length); *pPtr = rtw_zvmalloc(length);
} }
/* length could be ignored, used to detect memory leakage. */ /* length could be ignored, used to detect memory leakage. */
void void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u4Byte length)
ODM_FreeMemory(
struct odm_dm_struct *pDM_Odm,
void * pPtr,
u4Byte length
)
{ {
rtw_vmfree(pPtr, length); rtw_vmfree(pPtr, length);
} }
s4Byte ODM_CompareMemory( s4Byte ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2, u4Byte length)
struct odm_dm_struct *pDM_Odm,
void * pBuf1,
void * pBuf2,
u4Byte length
)
{ {
return _rtw_memcmp(pBuf1, pBuf2, length); return _rtw_memcmp(pBuf1, pBuf2, length);
} }
/* */
/* ODM MISC relative API. */ /* ODM MISC relative API. */
/* */ void ODM_AcquireSpinLock(struct odm_dm_struct *pDM_Odm, enum RT_SPINLOCK_TYPE type)
void
ODM_AcquireSpinLock(
struct odm_dm_struct *pDM_Odm,
enum RT_SPINLOCK_TYPE type
)
{ {
} }
void void ODM_ReleaseSpinLock(struct odm_dm_struct *pDM_Odm, enum RT_SPINLOCK_TYPE type)
ODM_ReleaseSpinLock(
struct odm_dm_struct *pDM_Odm,
enum RT_SPINLOCK_TYPE type
)
{ {
} }
/* */
/* Work item relative API. FOr MP driver only~! */ /* Work item relative API. FOr MP driver only~! */
/* */
void ODM_InitializeWorkItem(struct odm_dm_struct *pDM_Odm, void *pRtWorkItem, void ODM_InitializeWorkItem(struct odm_dm_struct *pDM_Odm, void *pRtWorkItem,
RT_WORKITEM_CALL_BACK RtWorkItemCallback, RT_WORKITEM_CALL_BACK RtWorkItemCallback,
void *pContext, const char *szID) void *pContext, const char *szID)
@ -212,9 +146,7 @@ void ODM_IsWorkItemScheduled(void *pRtWorkItem)
{ {
} }
/* */
/* ODM Timer relative API. */ /* ODM Timer relative API. */
/* */
void ODM_StallExecution(u4Byte usDelay) void ODM_StallExecution(u4Byte usDelay)
{ {
rtw_udelay_os(usDelay); rtw_udelay_os(usDelay);
@ -262,19 +194,10 @@ void ODM_ReleaseTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer)
{ {
} }
/* */
/* ODM FW relative API. */ /* ODM FW relative API. */
/* */ u4Byte ODM_FillH2CCmd(pu1Byte pH2CBuffer, u4Byte H2CBufferLen, u4Byte CmdNum,
u4Byte pu4Byte pElementID, pu4Byte pCmdLen,
ODM_FillH2CCmd( pu1Byte *pCmbBuffer, pu1Byte CmdStartSeq)
pu1Byte pH2CBuffer,
u4Byte H2CBufferLen,
u4Byte CmdNum,
pu4Byte pElementID,
pu4Byte pCmdLen,
pu1Byte* pCmbBuffer,
pu1Byte CmdStartSeq
)
{ {
return true; return true;
} }

356
hal/rtl8188e_cmd.c
View file

@ -34,8 +34,7 @@
#define RTL88E_MESSAGE_BOX_SIZE 4 #define RTL88E_MESSAGE_BOX_SIZE 4
#define RTL88E_EX_MESSAGE_BOX_SIZE 4 #define RTL88E_EX_MESSAGE_BOX_SIZE 4
static u8 _is_fw_read_cmd_down(struct adapter *adapt, u8 msgbox_num)
static u8 _is_fw_read_cmd_down(struct adapter* padapter, u8 msgbox_num)
{ {
u8 read_down = false; u8 read_down = false;
int retry_cnts = 100; int retry_cnts = 100;
@ -43,20 +42,17 @@ static u8 _is_fw_read_cmd_down(struct adapter* padapter, u8 msgbox_num)
u8 valid; u8 valid;
do { do {
valid = rtw_read8(padapter,REG_HMETFR) & BIT(msgbox_num); valid = rtw_read8(adapt, REG_HMETFR) & BIT(msgbox_num);
if (0 == valid ){ if (0 == valid)
read_down = true; read_down = true;
}
#ifdef CONFIG_WOWLAN #ifdef CONFIG_WOWLAN
rtw_msleep_os(2); rtw_msleep_os(2);
#endif #endif
} while ((!read_down) && (retry_cnts--)); } while ((!read_down) && (retry_cnts--));
return read_down; return read_down;
} }
/***************************************** /*****************************************
* H2C Msg format : * H2C Msg format :
* 0x1DF - 0x1D0 * 0x1DF - 0x1D0
@ -67,14 +63,14 @@ static u8 _is_fw_read_cmd_down(struct adapter* padapter, u8 msgbox_num)
*|31 - 0 | *|31 - 0 |
*|ext_msg| *|ext_msg|
******************************************/ ******************************************/
static s32 FillH2CCmd_88E(struct adapter * padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer) static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer)
{ {
u8 bcmd_down = false; u8 bcmd_down = false;
s32 retry_cnts = 100; s32 retry_cnts = 100;
u8 h2c_box_num; u8 h2c_box_num;
u32 msgbox_addr; u32 msgbox_addr;
u32 msgbox_ex_addr; u32 msgbox_ex_addr;
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
u8 cmd_idx, ext_cmd_len; u8 cmd_idx, ext_cmd_len;
u32 h2c_cmd = 0; u32 h2c_cmd = 0;
u32 h2c_cmd_ex = 0; u32 h2c_cmd_ex = 0;
@ -82,37 +78,32 @@ static s32 FillH2CCmd_88E(struct adapter * padapter, u8 ElementID, u32 CmdLen, u
_func_enter_; _func_enter_;
if (padapter->bFWReady == false) if (!adapt->bFWReady) {
{
DBG_88E("FillH2CCmd_88E(): return H2C cmd because fw is not ready\n"); DBG_88E("FillH2CCmd_88E(): return H2C cmd because fw is not ready\n");
return ret; return ret;
} }
if (!pCmdBuffer) { if (!pCmdBuffer)
goto exit; goto exit;
} if (CmdLen > RTL88E_MAX_CMD_LEN)
if (CmdLen > RTL88E_MAX_CMD_LEN) {
goto exit; goto exit;
} if (adapt->bSurpriseRemoved)
if (padapter->bSurpriseRemoved == true)
goto exit; goto exit;
/* pay attention to if race condition happened in H2C cmd setting. */ /* pay attention to if race condition happened in H2C cmd setting. */
do { do {
h2c_box_num = pHalData->LastHMEBoxNum; h2c_box_num = haldata->LastHMEBoxNum;
if (!_is_fw_read_cmd_down(padapter, h2c_box_num)){ if (!_is_fw_read_cmd_down(adapt, h2c_box_num)) {
DBG_88E(" fw read cmd failed...\n"); DBG_88E(" fw read cmd failed...\n");
goto exit; goto exit;
} }
*(u8 *)(&h2c_cmd) = ElementID; *(u8 *)(&h2c_cmd) = ElementID;
if (CmdLen<=3) if (CmdLen <= 3) {
{
_rtw_memcpy((u8 *)(&h2c_cmd)+1, pCmdBuffer, CmdLen); _rtw_memcpy((u8 *)(&h2c_cmd)+1, pCmdBuffer, CmdLen);
} } else {
else{
_rtw_memcpy((u8 *)(&h2c_cmd)+1, pCmdBuffer, 3); _rtw_memcpy((u8 *)(&h2c_cmd)+1, pCmdBuffer, 3);
ext_cmd_len = CmdLen-3; ext_cmd_len = CmdLen-3;
_rtw_memcpy((u8 *)(&h2c_cmd_ex), pCmdBuffer+3, ext_cmd_len); _rtw_memcpy((u8 *)(&h2c_cmd_ex), pCmdBuffer+3, ext_cmd_len);
@ -120,17 +111,17 @@ _func_enter_;
/* Write Ext command */ /* Write Ext command */
msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num * RTL88E_EX_MESSAGE_BOX_SIZE); msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num * RTL88E_EX_MESSAGE_BOX_SIZE);
for (cmd_idx = 0; cmd_idx < ext_cmd_len; cmd_idx++) { for (cmd_idx = 0; cmd_idx < ext_cmd_len; cmd_idx++) {
rtw_write8(padapter,msgbox_ex_addr+cmd_idx,*((u8*)(&h2c_cmd_ex)+cmd_idx)); rtw_write8(adapt, msgbox_ex_addr+cmd_idx, *((u8 *)(&h2c_cmd_ex)+cmd_idx));
} }
} }
/* Write command */ /* Write command */
msgbox_addr = REG_HMEBOX_0 + (h2c_box_num * RTL88E_MESSAGE_BOX_SIZE); msgbox_addr = REG_HMEBOX_0 + (h2c_box_num * RTL88E_MESSAGE_BOX_SIZE);
for (cmd_idx = 0; cmd_idx < RTL88E_MESSAGE_BOX_SIZE; cmd_idx++) { for (cmd_idx = 0; cmd_idx < RTL88E_MESSAGE_BOX_SIZE; cmd_idx++) {
rtw_write8(padapter,msgbox_addr+cmd_idx,*((u8*)(&h2c_cmd)+cmd_idx)); rtw_write8(adapt, msgbox_addr+cmd_idx, *((u8 *)(&h2c_cmd)+cmd_idx));
} }
bcmd_down = true; bcmd_down = true;
pHalData->LastHMEBoxNum = (h2c_box_num+1) % RTL88E_MAX_H2C_BOX_NUMS; haldata->LastHMEBoxNum = (h2c_box_num+1) % RTL88E_MAX_H2C_BOX_NUMS;
} while ((!bcmd_down) && (retry_cnts--)); } while ((!bcmd_down) && (retry_cnts--));
@ -143,13 +134,13 @@ _func_exit_;
return ret; return ret;
} }
u8 rtl8188e_set_rssi_cmd(struct adapter*padapter, u8 *param) u8 rtl8188e_set_rssi_cmd(struct adapter *adapt, u8 *param)
{ {
u8 res = _SUCCESS; u8 res = _SUCCESS;
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
_func_enter_; _func_enter_;
if (pHalData->fw_ractrl == true){ if (haldata->fw_ractrl) {
; ;
} else { } else {
DBG_88E("==>%s fw dont support RA\n", __func__); DBG_88E("==>%s fw dont support RA\n", __func__);
@ -161,21 +152,21 @@ _func_exit_;
return res; return res;
} }
u8 rtl8188e_set_raid_cmd(struct adapter*padapter, u32 mask) u8 rtl8188e_set_raid_cmd(struct adapter *adapt, u32 mask)
{ {
u8 buf[3]; u8 buf[3];
u8 res = _SUCCESS; u8 res = _SUCCESS;
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
_func_enter_; _func_enter_;
if (pHalData->fw_ractrl == true){ if (haldata->fw_ractrl) {
__le32 lmask; __le32 lmask;
_rtw_memset(buf, 0, 3); _rtw_memset(buf, 0, 3);
lmask = cpu_to_le32(mask); lmask = cpu_to_le32(mask);
_rtw_memcpy(buf, &lmask, 3); _rtw_memcpy(buf, &lmask, 3);
FillH2CCmd_88E(padapter, H2C_DM_MACID_CFG, 3, buf); FillH2CCmd_88E(adapt, H2C_DM_MACID_CFG, 3, buf);
} else { } else {
DBG_88E("==>%s fw dont support RA\n", __func__); DBG_88E("==>%s fw dont support RA\n", __func__);
res = _FAIL; res = _FAIL;
@ -184,7 +175,6 @@ _func_enter_;
_func_exit_; _func_exit_;
return res; return res;
} }
/* bitmap[0:27] = tx_rate_bitmap */ /* bitmap[0:27] = tx_rate_bitmap */
@ -193,7 +183,7 @@ _func_exit_;
/* arg[5] = Short GI */ /* arg[5] = Short GI */
void rtl8188e_Add_RateATid(struct adapter *pAdapter, u32 bitmap, u8 arg, u8 rssi_level) void rtl8188e_Add_RateATid(struct adapter *pAdapter, u32 bitmap, u8 arg, u8 rssi_level)
{ {
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); struct hal_data_8188e *haldata = GET_HAL_DATA(pAdapter);
u8 macid, init_rate, raid, shortGIrate = false; u8 macid, init_rate, raid, shortGIrate = false;
@ -203,16 +193,15 @@ void rtl8188e_Add_RateATid(struct adapter * pAdapter, u32 bitmap, u8 arg, u8 rss
bitmap &= 0x0fffffff; bitmap &= 0x0fffffff;
if (rssi_level != DM_RATR_STA_INIT) if (rssi_level != DM_RATR_STA_INIT)
bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv, macid, bitmap, rssi_level); bitmap = ODM_Get_Rate_Bitmap(&haldata->odmpriv, macid, bitmap, rssi_level);
bitmap |= ((raid<<28)&0xf0000000); bitmap |= ((raid<<28)&0xf0000000);
init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f; init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f;
shortGIrate = (arg&BIT(5)) ? true : false; shortGIrate = (arg&BIT(5)) ? true : false;
if (shortGIrate==true) if (shortGIrate)
init_rate |= BIT(6); init_rate |= BIT(6);
raid = (bitmap>>28) & 0x0f; raid = (bitmap>>28) & 0x0f;
@ -222,27 +211,20 @@ void rtl8188e_Add_RateATid(struct adapter * pAdapter, u32 bitmap, u8 arg, u8 rss
DBG_88E("%s=> mac_id:%d, raid:%d, ra_bitmap=0x%x, shortGIrate=0x%02x\n", DBG_88E("%s=> mac_id:%d, raid:%d, ra_bitmap=0x%x, shortGIrate=0x%02x\n",
__func__, macid, raid, bitmap, shortGIrate); __func__, macid, raid, bitmap, shortGIrate);
ODM_RA_UpdateRateInfo_8188E( ODM_RA_UpdateRateInfo_8188E(&(haldata->odmpriv), macid, raid, bitmap, shortGIrate);
&(pHalData->odmpriv),
macid,
raid,
bitmap,
shortGIrate
);
} }
void rtl8188e_set_FwPwrMode_cmd(struct adapter * padapter, u8 Mode) void rtl8188e_set_FwPwrMode_cmd(struct adapter *adapt, u8 Mode)
{ {
struct setpwrmode_parm H2CSetPwrMode; struct setpwrmode_parm H2CSetPwrMode;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; struct pwrctrl_priv *pwrpriv = &adapt->pwrctrlpriv;
u8 RLBM = 0; /* 0:Min, 1:Max, 2:User define */ u8 RLBM = 0; /* 0:Min, 1:Max, 2:User define */
_func_enter_; _func_enter_;
DBG_88E("%s: Mode=%d SmartPS=%d UAPSD=%d\n", __func__, DBG_88E("%s: Mode=%d SmartPS=%d UAPSD=%d\n", __func__,
Mode, pwrpriv->smart_ps, padapter->registrypriv.uapsd_enable); Mode, pwrpriv->smart_ps, adapt->registrypriv.uapsd_enable);
switch (Mode) switch (Mode) {
{
case PS_MODE_ACTIVE: case PS_MODE_ACTIVE:
H2CSetPwrMode.Mode = 0; H2CSetPwrMode.Mode = 0;
break; break;
@ -269,20 +251,19 @@ _func_enter_;
H2CSetPwrMode.AwakeInterval = 1; H2CSetPwrMode.AwakeInterval = 1;
H2CSetPwrMode.bAllQueueUAPSD = padapter->registrypriv.uapsd_enable; H2CSetPwrMode.bAllQueueUAPSD = adapt->registrypriv.uapsd_enable;
if (Mode > 0) if (Mode > 0)
H2CSetPwrMode.PwrState = 0x00;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */ H2CSetPwrMode.PwrState = 0x00;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */
else else
H2CSetPwrMode.PwrState = 0x0C;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */ H2CSetPwrMode.PwrState = 0x0C;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */
FillH2CCmd_88E(padapter, H2C_PS_PWR_MODE, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode); FillH2CCmd_88E(adapt, H2C_PS_PWR_MODE, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode);
_func_exit_; _func_exit_;
} }
void rtl8188e_set_FwMediaStatus_cmd(struct adapter * padapter, __le16 mstatus_rpt ) void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, __le16 mstatus_rpt)
{ {
u8 opmode, macid; u8 opmode, macid;
u16 mst_rpt = le16_to_cpu(mstatus_rpt); u16 mst_rpt = le16_to_cpu(mstatus_rpt);
@ -290,15 +271,15 @@ void rtl8188e_set_FwMediaStatus_cmd(struct adapter * padapter, __le16 mstatus_rp
macid = (u8)(mst_rpt >> 8); macid = (u8)(mst_rpt >> 8);
DBG_88E("### %s: MStatus=%x MACID=%d\n", __func__, opmode, macid); DBG_88E("### %s: MStatus=%x MACID=%d\n", __func__, opmode, macid);
FillH2CCmd_88E(padapter, H2C_COM_MEDIA_STATUS_RPT, sizeof(mst_rpt), (u8 *)&mst_rpt); FillH2CCmd_88E(adapt, H2C_COM_MEDIA_STATUS_RPT, sizeof(mst_rpt), (u8 *)&mst_rpt);
} }
static void ConstructBeacon(struct adapter *padapter, u8 *pframe, u32 *pLength) static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength)
{ {
struct rtw_ieee80211_hdr *pwlanhdr; struct rtw_ieee80211_hdr *pwlanhdr;
u16 *fctrl; u16 *fctrl;
u32 rate_len, pktlen; u32 rate_len, pktlen;
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network);
u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
@ -309,7 +290,7 @@ static void ConstructBeacon(struct adapter *padapter, u8 *pframe, u32 *pLength)
*(fctrl) = 0; *(fctrl) = 0;
_rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN);
SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/);
@ -334,8 +315,7 @@ static void ConstructBeacon(struct adapter *padapter, u8 *pframe, u32 *pLength)
pframe += 2; pframe += 2;
pktlen += 2; pktlen += 2;
if ( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
{
pktlen += cur_network->IELength - sizeof(struct ndis_802_11_fixed_ie); pktlen += cur_network->IELength - sizeof(struct ndis_802_11_fixed_ie);
_rtw_memcpy(pframe, cur_network->IEs+sizeof(struct ndis_802_11_fixed_ie), pktlen); _rtw_memcpy(pframe, cur_network->IEs+sizeof(struct ndis_802_11_fixed_ie), pktlen);
@ -354,31 +334,24 @@ static void ConstructBeacon(struct adapter *padapter, u8 *pframe, u32 *pLength)
/* DS parameter set */ /* DS parameter set */
pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen); pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen);
if ( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) if ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) {
{
u32 ATIMWindow; u32 ATIMWindow;
/* IBSS Parameter Set... */ /* IBSS Parameter Set... */
ATIMWindow = 0; ATIMWindow = 0;
pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen); pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen);
} }
/* todo: ERP IE */ /* todo: ERP IE */
/* EXTERNDED SUPPORTED RATE */ /* EXTERNDED SUPPORTED RATE */
if (rate_len > 8) if (rate_len > 8)
{
pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen);
}
/* todo:HT for adhoc */ /* todo:HT for adhoc */
_ConstructBeacon: _ConstructBeacon:
if ((pktlen + TXDESC_SIZE) > 512) if ((pktlen + TXDESC_SIZE) > 512) {
{
DBG_88E("beacon frame too large\n"); DBG_88E("beacon frame too large\n");
return; return;
} }
@ -386,12 +359,12 @@ _ConstructBeacon:
*pLength = pktlen; *pLength = pktlen;
} }
static void ConstructPSPoll(struct adapter *padapter, u8 *pframe, u32 *pLength) static void ConstructPSPoll(struct adapter *adapt, u8 *pframe, u32 *pLength)
{ {
struct rtw_ieee80211_hdr *pwlanhdr; struct rtw_ieee80211_hdr *pwlanhdr;
u16 *fctrl; u16 *fctrl;
u32 pktlen; u32 pktlen;
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
@ -409,14 +382,12 @@ static void ConstructPSPoll(struct adapter *padapter, u8 *pframe, u32 *pLength)
_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
/* TA. */ /* TA. */
_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
*pLength = 16; *pLength = 16;
} }
static void ConstructNullFunctionData( static void ConstructNullFunctionData(struct adapter *adapt, u8 *pframe,
struct adapter * padapter,
u8 *pframe,
u32 *pLength, u32 *pLength,
u8 *StaAddr, u8 *StaAddr,
u8 bQoS, u8 bQoS,
@ -427,9 +398,9 @@ static void ConstructNullFunctionData(
struct rtw_ieee80211_hdr *pwlanhdr; struct rtw_ieee80211_hdr *pwlanhdr;
u16 *fctrl; u16 *fctrl;
u32 pktlen; u32 pktlen;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_priv *pmlmepriv = &adapt->mlmepriv;
struct wlan_network *cur_network = &pmlmepriv->cur_network; struct wlan_network *cur_network = &pmlmepriv->cur_network;
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
@ -443,26 +414,26 @@ static void ConstructNullFunctionData(
case Ndis802_11Infrastructure: case Ndis802_11Infrastructure:
SetToDs(fctrl); SetToDs(fctrl);
_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN);
break; break;
case Ndis802_11APMode: case Ndis802_11APMode:
SetFrDs(fctrl); SetFrDs(fctrl);
_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, myid(&(adapt->eeprompriv)), ETH_ALEN);
break; break;
case Ndis802_11IBSS: case Ndis802_11IBSS:
default: default:
_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
break; break;
} }
SetSeqNum(pwlanhdr, 0); SetSeqNum(pwlanhdr, 0);
if (bQoS == true) { if (bQoS) {
struct rtw_ieee80211_hdr_3addr_qos *pwlanqoshdr; struct rtw_ieee80211_hdr_3addr_qos *pwlanqoshdr;
SetFrameSubType(pframe, WIFI_QOS_DATA_NULL); SetFrameSubType(pframe, WIFI_QOS_DATA_NULL);
@ -481,19 +452,19 @@ static void ConstructNullFunctionData(
*pLength = pktlen; *pLength = pktlen;
} }
static void ConstructProbeRsp(struct adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, bool bHideSSID) static void ConstructProbeRsp(struct adapter *adapt, u8 *pframe, u32 *pLength, u8 *StaAddr, bool bHideSSID)
{ {
struct rtw_ieee80211_hdr *pwlanhdr; struct rtw_ieee80211_hdr *pwlanhdr;
u16 *fctrl; u16 *fctrl;
u8 *mac, *bssid; u8 *mac, *bssid;
u32 pktlen; u32 pktlen;
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network); struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network);
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
mac = myid(&(padapter->eeprompriv)); mac = myid(&(adapt->eeprompriv));
bssid = cur_network->MacAddress; bssid = cur_network->MacAddress;
fctrl = &(pwlanhdr->frame_ctl); fctrl = &(pwlanhdr->frame_ctl);
@ -520,10 +491,7 @@ static void ConstructProbeRsp(struct adapter *padapter, u8 *pframe, u32 *pLength
/* To check if reserved page content is destroyed by beacon beacuse beacon is too large. */ /* To check if reserved page content is destroyed by beacon beacuse beacon is too large. */
/* 2010.06.23. Added by tynli. */ /* 2010.06.23. Added by tynli. */
void void CheckFwRsvdPageContent(struct adapter *Adapter)
CheckFwRsvdPageContent(
struct adapter * Adapter
)
{ {
} }
@ -537,9 +505,9 @@ CheckFwRsvdPageContent(
/* true: At the second time, we should send the first packet (default:beacon) */ /* true: At the second time, we should send the first packet (default:beacon) */
/* to Hw again and set the lengh in descriptor to the real beacon lengh. */ /* to Hw again and set the lengh in descriptor to the real beacon lengh. */
/* 2009.10.15 by tynli. */ /* 2009.10.15 by tynli. */
static void SetFwRsvdPagePkt(struct adapter * padapter, bool bDLFinished) static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished)
{ {
struct hal_data_8188e *pHalData; struct hal_data_8188e *haldata;
struct xmit_frame *pmgntframe; struct xmit_frame *pmgntframe;
struct pkt_attrib *pattrib; struct pkt_attrib *pattrib;
struct xmit_priv *pxmitpriv; struct xmit_priv *pxmitpriv;
@ -554,16 +522,15 @@ static void SetFwRsvdPagePkt(struct adapter * padapter, bool bDLFinished)
struct rsvdpage_loc RsvdPageLoc; struct rsvdpage_loc RsvdPageLoc;
DBG_88E("%s\n", __func__); DBG_88E("%s\n", __func__);
ReservedPagePacket = (u8 *)rtw_zmalloc(1000); ReservedPagePacket = (u8 *)rtw_zmalloc(1000);
if (ReservedPagePacket == NULL) { if (ReservedPagePacket == NULL) {
DBG_88E("%s: alloc ReservedPagePacket fail!\n", __func__); DBG_88E("%s: alloc ReservedPagePacket fail!\n", __func__);
return; return;
} }
pHalData = GET_HAL_DATA(padapter); haldata = GET_HAL_DATA(adapt);
pxmitpriv = &padapter->xmitpriv; pxmitpriv = &adapt->xmitpriv;
pmlmeext = &padapter->mlmeextpriv; pmlmeext = &adapt->mlmeextpriv;
pmlmeinfo = &pmlmeext->mlmext_info; pmlmeinfo = &pmlmeext->mlmext_info;
TxDescLen = TXDESC_SIZE; TxDescLen = TXDESC_SIZE;
@ -571,7 +538,7 @@ static void SetFwRsvdPagePkt(struct adapter * padapter, bool bDLFinished)
/* 3 (1) beacon * 2 pages */ /* 3 (1) beacon * 2 pages */
BufIndex = TXDESC_OFFSET; BufIndex = TXDESC_OFFSET;
ConstructBeacon(padapter, &ReservedPagePacket[BufIndex], &BeaconLength); ConstructBeacon(adapt, &ReservedPagePacket[BufIndex], &BeaconLength);
/* When we count the first page size, we need to reserve description size for the RSVD */ /* When we count the first page size, we need to reserve description size for the RSVD */
/* packet, it will be filled in front of the packet in TXPKTBUF. */ /* packet, it will be filled in front of the packet in TXPKTBUF. */
@ -580,14 +547,14 @@ static void SetFwRsvdPagePkt(struct adapter * padapter, bool bDLFinished)
if (PageNeed == 1) if (PageNeed == 1)
PageNeed += 1; PageNeed += 1;
PageNum += PageNeed; PageNum += PageNeed;
pHalData->FwRsvdPageStartOffset = PageNum; haldata->FwRsvdPageStartOffset = PageNum;
BufIndex += PageNeed*128; BufIndex += PageNeed*128;
/* 3 (2) ps-poll *1 page */ /* 3 (2) ps-poll *1 page */
RsvdPageLoc.LocPsPoll = PageNum; RsvdPageLoc.LocPsPoll = PageNum;
ConstructPSPoll(padapter, &ReservedPagePacket[BufIndex], &PSPollLength); ConstructPSPoll(adapt, &ReservedPagePacket[BufIndex], &PSPollLength);
rtl8188e_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, true, false); rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, true, false);
PageNeed = (u8)PageNum_128(TxDescLen + PSPollLength); PageNeed = (u8)PageNum_128(TxDescLen + PSPollLength);
PageNum += PageNeed; PageNum += PageNeed;
@ -596,13 +563,8 @@ static void SetFwRsvdPagePkt(struct adapter * padapter, bool bDLFinished)
/* 3 (3) null data * 1 page */ /* 3 (3) null data * 1 page */
RsvdPageLoc.LocNullData = PageNum; RsvdPageLoc.LocNullData = PageNum;
ConstructNullFunctionData( ConstructNullFunctionData(adapt, &ReservedPagePacket[BufIndex], &NullDataLength, get_my_bssid(&pmlmeinfo->network), false, 0, 0, false);
padapter, rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex-TxDescLen], NullDataLength, false, false);
&ReservedPagePacket[BufIndex],
&NullDataLength,
get_my_bssid(&pmlmeinfo->network),
false, 0, 0, false);
rtl8188e_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], NullDataLength, false, false);
PageNeed = (u8)PageNum_128(TxDescLen + NullDataLength); PageNeed = (u8)PageNum_128(TxDescLen + NullDataLength);
PageNum += PageNeed; PageNum += PageNeed;
@ -611,13 +573,8 @@ static void SetFwRsvdPagePkt(struct adapter * padapter, bool bDLFinished)
/* 3 (4) probe response * 1page */ /* 3 (4) probe response * 1page */
RsvdPageLoc.LocProbeRsp = PageNum; RsvdPageLoc.LocProbeRsp = PageNum;
ConstructProbeRsp( ConstructProbeRsp(adapt, &ReservedPagePacket[BufIndex], &ProbeRspLength, get_my_bssid(&pmlmeinfo->network), false);
padapter, rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, false, false);
&ReservedPagePacket[BufIndex],
&ProbeRspLength,
get_my_bssid(&pmlmeinfo->network),
false);
rtl8188e_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, false, false);
PageNeed = (u8)PageNum_128(TxDescLen + ProbeRspLength); PageNeed = (u8)PageNum_128(TxDescLen + ProbeRspLength);
PageNum += PageNeed; PageNum += PageNeed;
@ -626,13 +583,9 @@ static void SetFwRsvdPagePkt(struct adapter * padapter, bool bDLFinished)
/* 3 (5) Qos null data */ /* 3 (5) Qos null data */
RsvdPageLoc.LocQosNull = PageNum; RsvdPageLoc.LocQosNull = PageNum;
ConstructNullFunctionData( ConstructNullFunctionData(adapt, &ReservedPagePacket[BufIndex],
padapter, &QosNullLength, get_my_bssid(&pmlmeinfo->network), true, 0, 0, false);
&ReservedPagePacket[BufIndex], rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex-TxDescLen], QosNullLength, false, false);
&QosNullLength,
get_my_bssid(&pmlmeinfo->network),
true, 0, 0, false);
rtl8188e_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], QosNullLength, false, false);
PageNeed = (u8)PageNum_128(TxDescLen + QosNullLength); PageNeed = (u8)PageNum_128(TxDescLen + QosNullLength);
PageNum += PageNeed; PageNum += PageNeed;
@ -644,25 +597,26 @@ static void SetFwRsvdPagePkt(struct adapter * padapter, bool bDLFinished)
/* update attribute */ /* update attribute */
pattrib = &pmgntframe->attrib; pattrib = &pmgntframe->attrib;
update_mgntframe_attrib(padapter, pattrib); update_mgntframe_attrib(adapt, pattrib);
pattrib->qsel = 0x10; pattrib->qsel = 0x10;
pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TXDESC_OFFSET; pattrib->last_txcmdsz = TotalPacketLen - TXDESC_OFFSET;
pattrib->pktlen = pattrib->last_txcmdsz;
_rtw_memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen); _rtw_memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen);
rtw_hal_mgnt_xmit(padapter, pmgntframe); rtw_hal_mgnt_xmit(adapt, pmgntframe);
DBG_88E("%s: Set RSVD page location to Fw\n", __func__); DBG_88E("%s: Set RSVD page location to Fw\n", __func__);
FillH2CCmd_88E(padapter, H2C_COM_RSVD_PAGE, sizeof(RsvdPageLoc), (u8*)&RsvdPageLoc); FillH2CCmd_88E(adapt, H2C_COM_RSVD_PAGE, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc);
exit: exit:
rtw_mfree(ReservedPagePacket, 1000); rtw_mfree(ReservedPagePacket, 1000);
} }
void rtl8188e_set_FwJoinBssReport_cmd(struct adapter * padapter, u8 mstatus) void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
{ {
struct joinbssrpt_parm JoinBssRptParm; struct joinbssrpt_parm JoinBssRptParm;
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
bool bSendBeacon = false; bool bSendBeacon = false;
bool bcn_valid = false; bool bcn_valid = false;
@ -673,56 +627,50 @@ _func_enter_;
DBG_88E("%s mstatus(%x)\n", __func__, mstatus); DBG_88E("%s mstatus(%x)\n", __func__, mstatus);
if (mstatus == 1) if (mstatus == 1) {
{
/* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */ /* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */
/* Suggested by filen. Added by tynli. */ /* Suggested by filen. Added by tynli. */
rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid)); rtw_write16(adapt, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid));
/* Do not set TSF again here or vWiFi beacon DMA INT will not work. */ /* Do not set TSF again here or vWiFi beacon DMA INT will not work. */
/* Set REG_CR bit 8. DMA beacon by SW. */ /* Set REG_CR bit 8. DMA beacon by SW. */
pHalData->RegCR_1 |= BIT0; haldata->RegCR_1 |= BIT0;
rtw_write8(padapter, REG_CR+1, pHalData->RegCR_1); rtw_write8(adapt, REG_CR+1, haldata->RegCR_1);
/* Disable Hw protection for a time which revserd for Hw sending beacon. */ /* Disable Hw protection for a time which revserd for Hw sending beacon. */
/* Fix download reserved page packet fail that access collision with the protection time. */ /* Fix download reserved page packet fail that access collision with the protection time. */
/* 2010.05.11. Added by tynli. */ /* 2010.05.11. Added by tynli. */
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3))); rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)&(~BIT(3)));
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)); rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)|BIT(4));
if (pHalData->RegFwHwTxQCtrl&BIT6) if (haldata->RegFwHwTxQCtrl&BIT6) {
{
DBG_88E("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n"); DBG_88E("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n");
bSendBeacon = true; bSendBeacon = true;
} }
/* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */ /* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&(~BIT6))); rtw_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl&(~BIT6)));
pHalData->RegFwHwTxQCtrl &= (~BIT6); haldata->RegFwHwTxQCtrl &= (~BIT6);
/* Clear beacon valid check bit. */ /* Clear beacon valid check bit. */
rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); rtw_hal_set_hwreg(adapt, HW_VAR_BCN_VALID, NULL);
DLBcnCount = 0; DLBcnCount = 0;
poll = 0; poll = 0;
do do {
{
/* download rsvd page. */ /* download rsvd page. */
SetFwRsvdPagePkt(padapter, false); SetFwRsvdPagePkt(adapt, false);
DLBcnCount++; DLBcnCount++;
do do {
{
rtw_yield_os(); rtw_yield_os();
/* rtw_mdelay_os(10); */ /* rtw_mdelay_os(10); */
/* check rsvd page download OK. */ /* check rsvd page download OK. */
rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid)); rtw_hal_get_hwreg(adapt, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid));
poll++; poll++;
} while (!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); } while (!bcn_valid && (poll%10) != 0 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped);
} while (!bcn_valid && DLBcnCount <= 100 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped);
}while (!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); if (adapt->bSurpriseRemoved || adapt->bDriverStopped)
;
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
{
}
else if (!bcn_valid) else if (!bcn_valid)
DBG_88E("%s: 1 Download RSVD page failed! DLBcnCount:%u, poll:%u\n", __func__, DLBcnCount, poll); DBG_88E("%s: 1 Download RSVD page failed! DLBcnCount:%u, poll:%u\n", __func__, DLBcnCount, poll);
else else
@ -735,39 +683,35 @@ _func_enter_;
/* */ /* */
/* Enable Bcn */ /* Enable Bcn */
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3)); rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)|BIT(3));
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(4))); rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)&(~BIT(4)));
/* To make sure that if there exists an adapter which would like to send beacon. */ /* To make sure that if there exists an adapter which would like to send beacon. */
/* If exists, the origianl value of 0x422[6] will be 1, we should check this to */ /* If exists, the origianl value of 0x422[6] will be 1, we should check this to */
/* prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ /* prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */
/* the beacon cannot be sent by HW. */ /* the beacon cannot be sent by HW. */
/* 2010.06.23. Added by tynli. */ /* 2010.06.23. Added by tynli. */
if (bSendBeacon) if (bSendBeacon) {
{ rtw_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl|BIT6));
rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6)); haldata->RegFwHwTxQCtrl |= BIT6;
pHalData->RegFwHwTxQCtrl |= BIT6;
} }
/* */
/* Update RSVD page location H2C to Fw. */ /* Update RSVD page location H2C to Fw. */
/* */ if (bcn_valid) {
if (bcn_valid) rtw_hal_set_hwreg(adapt, HW_VAR_BCN_VALID, NULL);
{
rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
DBG_88E("Set RSVD page location to Fw.\n"); DBG_88E("Set RSVD page location to Fw.\n");
} }
/* Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. */ /* Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. */
/* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */ /* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
pHalData->RegCR_1 &= (~BIT0); haldata->RegCR_1 &= (~BIT0);
rtw_write8(padapter, REG_CR+1, pHalData->RegCR_1); rtw_write8(adapt, REG_CR+1, haldata->RegCR_1);
} }
#ifdef CONFIG_WOWLAN #ifdef CONFIG_WOWLAN
if (padapter->pwrctrlpriv.wowlan_mode){ if (adapt->pwrctrlpriv.wowlan_mode) {
JoinBssRptParm.OpMode = mstatus; JoinBssRptParm.OpMode = mstatus;
JoinBssRptParm.MacID = 0; JoinBssRptParm.MacID = 0;
FillH2CCmd_88E(padapter, H2C_COM_MEDIA_STATUS_RPT, sizeof(JoinBssRptParm), (u8 *)&JoinBssRptParm); FillH2CCmd_88E(adapt, H2C_COM_MEDIA_STATUS_RPT, sizeof(JoinBssRptParm), (u8 *)&JoinBssRptParm);
DBG_88E_LEVEL(_drv_info_, "%s opmode:%d MacId:%d\n", __func__, JoinBssRptParm.OpMode, JoinBssRptParm.MacID); DBG_88E_LEVEL(_drv_info_, "%s opmode:%d MacId:%d\n", __func__, JoinBssRptParm.OpMode, JoinBssRptParm.MacID);
} else { } else {
DBG_88E_LEVEL(_drv_info_, "%s wowlan_mode is off\n", __func__); DBG_88E_LEVEL(_drv_info_, "%s wowlan_mode is off\n", __func__);
@ -776,18 +720,17 @@ _func_enter_;
_func_exit_; _func_exit_;
} }
void rtl8188e_set_p2p_ps_offload_cmd(struct adapter* padapter, u8 p2p_ps_state) void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state)
{ {
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; struct pwrctrl_priv *pwrpriv = &adapt->pwrctrlpriv;
struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); struct wifidirect_info *pwdinfo = &(adapt->wdinfo);
struct P2P_PS_Offload_t *p2p_ps_offload = &pHalData->p2p_ps_offload; struct P2P_PS_Offload_t *p2p_ps_offload = &haldata->p2p_ps_offload;
u8 i; u8 i;
_func_enter_; _func_enter_;
switch (p2p_ps_state) switch (p2p_ps_state) {
{
case P2P_PS_DISABLE: case P2P_PS_DISABLE:
DBG_88E("P2P_PS_DISABLE\n"); DBG_88E("P2P_PS_DISABLE\n");
_rtw_memset(p2p_ps_offload, 0, 1); _rtw_memset(p2p_ps_offload, 0, 1);
@ -795,43 +738,37 @@ _func_enter_;
case P2P_PS_ENABLE: case P2P_PS_ENABLE:
DBG_88E("P2P_PS_ENABLE\n"); DBG_88E("P2P_PS_ENABLE\n");
/* update CTWindow value. */ /* update CTWindow value. */
if ( pwdinfo->ctwindow > 0 ) if (pwdinfo->ctwindow > 0) {
{
p2p_ps_offload->CTWindow_En = 1; p2p_ps_offload->CTWindow_En = 1;
rtw_write8(padapter, REG_P2P_CTWIN, pwdinfo->ctwindow); rtw_write8(adapt, REG_P2P_CTWIN, pwdinfo->ctwindow);
} }
/* hw only support 2 set of NoA */ /* hw only support 2 set of NoA */
for ( i=0 ; i<pwdinfo->noa_num ; i++) for (i = 0; i < pwdinfo->noa_num; i++) {
{
/* To control the register setting for which NOA */ /* To control the register setting for which NOA */
rtw_write8(padapter, REG_NOA_DESC_SEL, (i << 4)); rtw_write8(adapt, REG_NOA_DESC_SEL, (i << 4));
if (i == 0) if (i == 0)
p2p_ps_offload->NoA0_En = 1; p2p_ps_offload->NoA0_En = 1;
else else
p2p_ps_offload->NoA1_En = 1; p2p_ps_offload->NoA1_En = 1;
/* config P2P NoA Descriptor Register */ /* config P2P NoA Descriptor Register */
rtw_write32(padapter, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]); rtw_write32(adapt, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]);
rtw_write32(padapter, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]); rtw_write32(adapt, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]);
rtw_write32(padapter, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]); rtw_write32(adapt, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]);
rtw_write8(padapter, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]); rtw_write8(adapt, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]);
} }
if ( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) ) if ((pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0)) {
{
/* rst p2p circuit */ /* rst p2p circuit */
rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4)); rtw_write8(adapt, REG_DUAL_TSF_RST, BIT(4));
p2p_ps_offload->Offload_En = 1; p2p_ps_offload->Offload_En = 1;
if (pwdinfo->role == P2P_ROLE_GO) if (pwdinfo->role == P2P_ROLE_GO) {
{
p2p_ps_offload->role = 1; p2p_ps_offload->role = 1;
p2p_ps_offload->AllStaSleep = 0; p2p_ps_offload->AllStaSleep = 0;
} } else {
else
{
p2p_ps_offload->role = 0; p2p_ps_offload->role = 0;
} }
@ -851,21 +788,20 @@ _func_enter_;
break; break;
} }
FillH2CCmd_88E(padapter, H2C_PS_P2P_OFFLOAD, 1, (u8 *)p2p_ps_offload); FillH2CCmd_88E(adapt, H2C_PS_P2P_OFFLOAD, 1, (u8 *)p2p_ps_offload);
_func_exit_; _func_exit_;
} }
#ifdef CONFIG_WOWLAN #ifdef CONFIG_WOWLAN
void rtl8188es_set_wowlan_cmd(struct adapter* padapter, u8 enable) void rtl8188es_set_wowlan_cmd(struct adapter *adapt, u8 enable)
{ {
u8 res = _SUCCESS; u8 res = _SUCCESS;
u32 test = 0; u32 test = 0;
struct recv_priv *precvpriv = &padapter->recvpriv; struct recv_priv *precvpriv = &adapt->recvpriv;
struct setwowlan_parm pwowlan_parm; struct setwowlan_parm pwowlan_parm;
struct setaoac_glocal_info paoac_global_info_parm; struct setaoac_glocal_info paoac_global_info_parm;
struct pwrctrl_priv *pwrpriv=&padapter->pwrctrlpriv; struct pwrctrl_priv *pwrpriv = &adapt->pwrctrlpriv;
_func_enter_; _func_enter_;
DBG_88E_LEVEL(_drv_info_, "+%s+\n", __func__); DBG_88E_LEVEL(_drv_info_, "+%s+\n", __func__);
@ -877,32 +813,30 @@ _func_enter_;
pwowlan_parm.reserve = 0; pwowlan_parm.reserve = 0;
if (enable) { if (enable) {
pwowlan_parm.mode |= FW_WOWLAN_FUN_EN; pwowlan_parm.mode |= FW_WOWLAN_FUN_EN;
pwrpriv->wowlan_magic = true; pwrpriv->wowlan_magic = true;
pwrpriv->wowlan_unicast = true; pwrpriv->wowlan_unicast = true;
if (pwrpriv->wowlan_pattern ==true){ if (pwrpriv->wowlan_pattern) {
pwowlan_parm.mode |= FW_WOWLAN_PATTERN_MATCH; pwowlan_parm.mode |= FW_WOWLAN_PATTERN_MATCH;
DBG_88E_LEVEL(_drv_info_, "%s 2.pwowlan_parm.mode=0x%x\n", __func__, pwowlan_parm.mode); DBG_88E_LEVEL(_drv_info_, "%s 2.pwowlan_parm.mode=0x%x\n", __func__, pwowlan_parm.mode);
} }
if (pwrpriv->wowlan_magic ==true){ if (pwrpriv->wowlan_magic) {
pwowlan_parm.mode |= FW_WOWLAN_MAGIC_PKT; pwowlan_parm.mode |= FW_WOWLAN_MAGIC_PKT;
DBG_88E_LEVEL(_drv_info_, "%s 3.pwowlan_parm.mode=0x%x\n", __func__, pwowlan_parm.mode); DBG_88E_LEVEL(_drv_info_, "%s 3.pwowlan_parm.mode=0x%x\n", __func__, pwowlan_parm.mode);
} }
if (pwrpriv->wowlan_unicast ==true){ if (pwrpriv->wowlan_unicast) {
pwowlan_parm.mode |= FW_WOWLAN_UNICAST; pwowlan_parm.mode |= FW_WOWLAN_UNICAST;
DBG_88E_LEVEL(_drv_info_, "%s 4.pwowlan_parm.mode=0x%x\n", __func__, pwowlan_parm.mode); DBG_88E_LEVEL(_drv_info_, "%s 4.pwowlan_parm.mode=0x%x\n", __func__, pwowlan_parm.mode);
} }
if (!(padapter->pwrctrlpriv.wowlan_wake_reason & FWDecisionDisconnect)) if (!(adapt->pwrctrlpriv.wowlan_wake_reason & FWDecisionDisconnect))
rtl8188e_set_FwJoinBssReport_cmd(padapter, 1); rtl8188e_set_FwJoinBssReport_cmd(adapt, 1);
else else
DBG_88E_LEVEL(_drv_info_, "%s, disconnected, no FwJoinBssReport\n", __func__); DBG_88E_LEVEL(_drv_info_, "%s, disconnected, no FwJoinBssReport\n", __func__);
rtw_msleep_os(2); rtw_msleep_os(2);
/* WOWLAN_GPIO_ACTIVE means GPIO high active */ /* WOWLAN_GPIO_ACTIVE means GPIO high active */
/* pwowlan_parm.mode |=FW_WOWLAN_GPIO_ACTIVE; */
pwowlan_parm.mode |= FW_WOWLAN_REKEY_WAKEUP; pwowlan_parm.mode |= FW_WOWLAN_REKEY_WAKEUP;
pwowlan_parm.mode |= FW_WOWLAN_DEAUTH_WAKEUP; pwowlan_parm.mode |= FW_WOWLAN_DEAUTH_WAKEUP;
@ -910,7 +844,7 @@ _func_enter_;
pwowlan_parm.gpio_index = 0x0; pwowlan_parm.gpio_index = 0x0;
DBG_88E_LEVEL(_drv_info_, "%s 5.pwowlan_parm.mode=0x%x\n", __func__, pwowlan_parm.mode); DBG_88E_LEVEL(_drv_info_, "%s 5.pwowlan_parm.mode=0x%x\n", __func__, pwowlan_parm.mode);
DBG_88E_LEVEL(_drv_info_, "%s 6.pwowlan_parm.index=0x%x\n", __func__, pwowlan_parm.gpio_index); DBG_88E_LEVEL(_drv_info_, "%s 6.pwowlan_parm.index=0x%x\n", __func__, pwowlan_parm.gpio_index);
res = FillH2CCmd_88E(padapter, H2C_COM_WWLAN, 2, (u8 *)&pwowlan_parm); res = FillH2CCmd_88E(adapt, H2C_COM_WWLAN, 2, (u8 *)&pwowlan_parm);
rtw_msleep_os(2); rtw_msleep_os(2);
@ -918,32 +852,30 @@ _func_enter_;
pwowlan_parm.mode = 1; pwowlan_parm.mode = 1;
pwowlan_parm.gpio_index = 0; pwowlan_parm.gpio_index = 0;
pwowlan_parm.gpio_duration = 0; pwowlan_parm.gpio_duration = 0;
FillH2CCmd_88E(padapter, H2C_COM_DISCNT_DECISION, 3, (u8 *)&pwowlan_parm); FillH2CCmd_88E(adapt, H2C_COM_DISCNT_DECISION, 3, (u8 *)&pwowlan_parm);
/* keep alive period = 10 * 10 BCN interval */ /* keep alive period = 10 * 10 BCN interval */
pwowlan_parm.mode = 1; pwowlan_parm.mode = 1;
pwowlan_parm.gpio_index = 10; pwowlan_parm.gpio_index = 10;
res = FillH2CCmd_88E(padapter, H2C_COM_KEEP_ALIVE, 2, (u8 *)&pwowlan_parm); res = FillH2CCmd_88E(adapt, H2C_COM_KEEP_ALIVE, 2, (u8 *)&pwowlan_parm);
rtw_msleep_os(2); rtw_msleep_os(2);
/* Configure STA security information for GTK rekey wakeup event. */ /* Configure STA security information for GTK rekey wakeup event. */
paoac_global_info_parm.pairwiseEncAlg= paoac_global_info_parm.pairwiseEncAlg = adapt->securitypriv.dot11PrivacyAlgrthm;
padapter->securitypriv.dot11PrivacyAlgrthm; paoac_global_info_parm.groupEncAlg = adapt->securitypriv.dot118021XGrpPrivacy;
paoac_global_info_parm.groupEncAlg= res = FillH2CCmd_88E(adapt, H2C_COM_AOAC_GLOBAL_INFO, 2, (u8 *)&paoac_global_info_parm);
padapter->securitypriv.dot118021XGrpPrivacy;
res = FillH2CCmd_88E(padapter, H2C_COM_AOAC_GLOBAL_INFO, 2, (u8 *)&paoac_global_info_parm);
rtw_msleep_os(2); rtw_msleep_os(2);
/* enable Remote wake ctrl */ /* enable Remote wake ctrl */
pwowlan_parm.mode = 1; pwowlan_parm.mode = 1;
pwowlan_parm.gpio_index = 0; pwowlan_parm.gpio_index = 0;
pwowlan_parm.gpio_duration = 0; pwowlan_parm.gpio_duration = 0;
res = FillH2CCmd_88E(padapter, H2C_COM_REMOTE_WAKE_CTRL, 3, (u8 *)&pwowlan_parm); res = FillH2CCmd_88E(adapt, H2C_COM_REMOTE_WAKE_CTRL, 3, (u8 *)&pwowlan_parm);
} else { } else {
pwrpriv->wowlan_magic = false; pwrpriv->wowlan_magic = false;
res = FillH2CCmd_88E(padapter, H2C_COM_WWLAN, 2, (u8 *)&pwowlan_parm); res = FillH2CCmd_88E(adapt, H2C_COM_WWLAN, 2, (u8 *)&pwowlan_parm);
rtw_msleep_os(2); rtw_msleep_os(2);
res = FillH2CCmd_88E(padapter, H2C_COM_REMOTE_WAKE_CTRL, 3, (u8 *)&pwowlan_parm); res = FillH2CCmd_88E(adapt, H2C_COM_REMOTE_WAKE_CTRL, 3, (u8 *)&pwowlan_parm);
} }
_func_exit_; _func_exit_;
DBG_88E_LEVEL(_drv_info_, "-%s res:%d-\n", __func__, res); DBG_88E_LEVEL(_drv_info_, "-%s res:%d-\n", __func__, res);