skyfall/rtl8188eu
1
0
Fork 0
mirror of https://github.com/lwfinger/rtl8188eu.git synced 2024-11-25 05:53:41 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

Remove unused files

Browse source 
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2013-05-08 23:22:54 -05:00
parent d25660e511
commit 5b23242195
27 changed files with 0 additions and 12760 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1662
core/rtw_bt_mp.c
View file

File diff suppressed because it is too large Load diff

423
core/rtw_eeprom.c
View file

@ -1,423 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_EEPROM_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
void up_clk(_adapter* padapter, u16 *x)
{
_func_enter_;
*x = *x | _EESK;
rtw_write8(padapter, EE_9346CR, (u8)*x);
rtw_udelay_os(CLOCK_RATE);
_func_exit_;
}
void down_clk(_adapter * padapter, u16 *x )
{
_func_enter_;
*x = *x & ~_EESK;
rtw_write8(padapter, EE_9346CR, (u8)*x);
rtw_udelay_os(CLOCK_RATE);
_func_exit_;
}
void shift_out_bits(_adapter * padapter, u16 data, u16 count)
{
u16 x,mask;
_func_enter_;
if (padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
mask = 0x01 << (count - 1);
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDO | _EEDI);
do
{
x &= ~_EEDI;
if (data & mask)
x |= _EEDI;
if (padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
rtw_write8(padapter, EE_9346CR, (u8)x);
rtw_udelay_os(CLOCK_RATE);
up_clk(padapter, &x);
down_clk(padapter, &x);
mask = mask >> 1;
} while (mask);
if (padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x &= ~_EEDI;
rtw_write8(padapter, EE_9346CR, (u8)x);
out:
_func_exit_;
}
u16 shift_in_bits (_adapter * padapter)
{
u16 x,d=0,i;
_func_enter_;
if (padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x = rtw_read8(padapter, EE_9346CR);
x &= ~( _EEDO | _EEDI);
d = 0;
for (i=0; i<16; i++)
{
d = d << 1;
up_clk(padapter, &x);
if (padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDI);
if (x & _EEDO)
d |= 1;
down_clk(padapter, &x);
}
out:
_func_exit_;
return d;
}
void standby(_adapter * padapter )
{
u8 x;
_func_enter_;
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EECS | _EESK);
rtw_write8(padapter, EE_9346CR,x);
rtw_udelay_os(CLOCK_RATE);
x |= _EECS;
rtw_write8(padapter, EE_9346CR, x);
rtw_udelay_os(CLOCK_RATE);
_func_exit_;
}
u16 wait_eeprom_cmd_done(_adapter* padapter)
{
u8 x;
u16 i,res=_FALSE;
_func_enter_;
standby(padapter );
for (i=0; i<200; i++)
{
x = rtw_read8(padapter, EE_9346CR);
if (x & _EEDO){
res=_TRUE;
goto exit;
}
rtw_udelay_os(CLOCK_RATE);
}
exit:
_func_exit_;
return res;
}
void eeprom_clean(_adapter * padapter)
{
u16 x;
_func_enter_;
if (padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x = rtw_read8(padapter, EE_9346CR);
if (padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x &= ~(_EECS | _EEDI);
rtw_write8(padapter, EE_9346CR, (u8)x);
if (padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
up_clk(padapter, &x);
if (padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
down_clk(padapter, &x);
out:
_func_exit_;
}
void eeprom_write16(_adapter * padapter, u16 reg, u16 data)
{
u8 x;
#ifdef CONFIG_RTL8712
u8 tmp8_ori,tmp8_new,tmp8_clk_ori,tmp8_clk_new;
tmp8_ori=rtw_read8(padapter, 0x102502f1);
tmp8_new=tmp8_ori & 0xf7;
if (tmp8_ori != tmp8_new){
rtw_write8(padapter, 0x102502f1, tmp8_new);
RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x102502f1=====\n"));
}
tmp8_clk_ori=rtw_read8(padapter,0x10250003);
tmp8_clk_new=tmp8_clk_ori|0x20;
if (tmp8_clk_new!=tmp8_clk_ori){
RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x10250003=====\n"));
rtw_write8(padapter, 0x10250003, tmp8_clk_new);
}
#endif
_func_enter_;
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
rtw_write8(padapter, EE_9346CR, x);
shift_out_bits(padapter, EEPROM_EWEN_OPCODE, 5);
if (padapter->EepromAddressSize==8) //CF+ and SDIO
shift_out_bits(padapter, 0, 6);
else //USB
shift_out_bits(padapter, 0, 4);
standby( padapter);
// Commented out by rcnjko, 2004.0
// // Erase this particular word. Write the erase opcode and register
// // number in that order. The opcode is 3bits in length; reg is 6 bits long.
// shift_out_bits(Adapter, EEPROM_ERASE_OPCODE, 3);
// shift_out_bits(Adapter, reg, Adapter->EepromAddressSize);
//
// if (wait_eeprom_cmd_done(Adapter ) == FALSE)
// {
// return;
// }
standby(padapter );
// write the new word to the EEPROM
// send the write opcode the EEPORM
shift_out_bits(padapter, EEPROM_WRITE_OPCODE, 3);
// select which word in the EEPROM that we are writing to.
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
// write the data to the selected EEPROM word.
shift_out_bits(padapter, data, 16);
if (wait_eeprom_cmd_done(padapter ) == _FALSE)
{
goto exit;
}
standby(padapter );
shift_out_bits(padapter, EEPROM_EWDS_OPCODE, 5);
shift_out_bits(padapter, reg, 4);
eeprom_clean(padapter );
exit:
#ifdef CONFIG_RTL8712
if (tmp8_clk_new!=tmp8_clk_ori)
rtw_write8(padapter, 0x10250003, tmp8_clk_ori);
if (tmp8_new!=tmp8_ori)
rtw_write8(padapter, 0x102502f1, tmp8_ori);
#endif
_func_exit_;
return;
}
u16 eeprom_read16(_adapter * padapter, u16 reg) //ReadEEprom
{
u16 x;
u16 data=0;
#ifdef CONFIG_RTL8712
u8 tmp8_ori,tmp8_new,tmp8_clk_ori,tmp8_clk_new;
tmp8_ori= rtw_read8(padapter, 0x102502f1);
tmp8_new = tmp8_ori & 0xf7;
if (tmp8_ori != tmp8_new){
rtw_write8(padapter, 0x102502f1, tmp8_new);
RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x102502f1=====\n"));
}
tmp8_clk_ori=rtw_read8(padapter,0x10250003);
tmp8_clk_new=tmp8_clk_ori|0x20;
if (tmp8_clk_new!=tmp8_clk_ori){
RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x10250003=====\n"));
rtw_write8(padapter, 0x10250003, tmp8_clk_new);
}
#endif
_func_enter_;
if (padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
// select EEPROM, reset bits, set _EECS
x = rtw_read8(padapter, EE_9346CR);
if (padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
rtw_write8(padapter, EE_9346CR, (unsigned char)x);
// write the read opcode and register number in that order
// The opcode is 3bits in length, reg is 6 bits long
shift_out_bits(padapter, EEPROM_READ_OPCODE, 3);
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
// Now read the data (16 bits) in from the selected EEPROM word
data = shift_in_bits(padapter);
eeprom_clean(padapter);
out:
#ifdef CONFIG_RTL8712
if (tmp8_clk_new!=tmp8_clk_ori)
rtw_write8(padapter, 0x10250003, tmp8_clk_ori);
if (tmp8_new!=tmp8_ori)
rtw_write8(padapter, 0x102502f1, tmp8_ori);
#endif
_func_exit_;
return data;
}
//From even offset
void eeprom_read_sz(_adapter * padapter, u16 reg, u8* data, u32 sz)
{
u16 x, data16;
u32 i;
_func_enter_;
if (padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
// select EEPROM, reset bits, set _EECS
x = rtw_read8(padapter, EE_9346CR);
if (padapter->bSurpriseRemoved==_TRUE){
RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE"));
goto out;
}
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
rtw_write8(padapter, EE_9346CR, (unsigned char)x);
// write the read opcode and register number in that order
// The opcode is 3bits in length, reg is 6 bits long
shift_out_bits(padapter, EEPROM_READ_OPCODE, 3);
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
for (i=0; i<sz; i+=2)
{
data16 = shift_in_bits(padapter);
data[i] = data16 & 0xff;
data[i+1] = data16 >>8;
}
eeprom_clean(padapter);
out:
_func_exit_;
}
//addr_off : address offset of the entry in eeprom (not the tuple number of eeprom (reg); that is addr_off !=reg)
u8 eeprom_read(_adapter * padapter, u32 addr_off, u8 sz, u8* rbuf)
{
u8 quotient, remainder, addr_2align_odd;
u16 reg, stmp , i=0, idx = 0;
_func_enter_;
reg = (u16)(addr_off >> 1);
addr_2align_odd = (u8)(addr_off & 0x1);
if (addr_2align_odd) //read that start at high part: e.g 1,3,5,7,9,...
{
stmp = eeprom_read16(padapter, reg);
rbuf[idx++] = (u8) ((stmp>>8)&0xff); //return hogh-part of the short
reg++; sz--;
}
quotient = sz >> 1;
remainder = sz & 0x1;
for ( i=0 ; i < quotient; i++)
{
stmp = eeprom_read16(padapter, reg+i);
rbuf[idx++] = (u8) (stmp&0xff);
rbuf[idx++] = (u8) ((stmp>>8)&0xff);
}
reg = reg+i;
if (remainder){ //end of read at lower part of short : 0,2,4,6,...
stmp = eeprom_read16(padapter, reg);
rbuf[idx] = (u8)(stmp & 0xff);
}
_func_exit_;
return _TRUE;
}
VOID read_eeprom_content(_adapter * padapter)
{
_func_enter_;
_func_exit_;
}

1032
core/rtw_ioctl_rtl.c
View file

File diff suppressed because it is too large Load diff

1326
core/rtw_wapi.c
View file

File diff suppressed because it is too large Load diff

923
core/rtw_wapi_sms4.c
View file

@ -1,923 +0,0 @@
#ifdef CONFIG_WAPI_SUPPORT
#include <linux/unistd.h>
#include <linux/etherdevice.h>
#include <drv_types.h>
#include <rtw_wapi.h>
#ifdef CONFIG_WAPI_SW_SMS4
#define WAPI_LITTLE_ENDIAN
//#define BIG_ENDIAN
#define ENCRYPT 0
#define DECRYPT 1
/**********************************************************
**********************************************************/
const u8 Sbox[256] = {
0xd6,0x90,0xe9,0xfe,0xcc,0xe1,0x3d,0xb7,0x16,0xb6,0x14,0xc2,0x28,0xfb,0x2c,0x05,
0x2b,0x67,0x9a,0x76,0x2a,0xbe,0x04,0xc3,0xaa,0x44,0x13,0x26,0x49,0x86,0x06,0x99,
0x9c,0x42,0x50,0xf4,0x91,0xef,0x98,0x7a,0x33,0x54,0x0b,0x43,0xed,0xcf,0xac,0x62,
0xe4,0xb3,0x1c,0xa9,0xc9,0x08,0xe8,0x95,0x80,0xdf,0x94,0xfa,0x75,0x8f,0x3f,0xa6,
0x47,0x07,0xa7,0xfc,0xf3,0x73,0x17,0xba,0x83,0x59,0x3c,0x19,0xe6,0x85,0x4f,0xa8,
0x68,0x6b,0x81,0xb2,0x71,0x64,0xda,0x8b,0xf8,0xeb,0x0f,0x4b,0x70,0x56,0x9d,0x35,
0x1e,0x24,0x0e,0x5e,0x63,0x58,0xd1,0xa2,0x25,0x22,0x7c,0x3b,0x01,0x21,0x78,0x87,
0xd4,0x00,0x46,0x57,0x9f,0xd3,0x27,0x52,0x4c,0x36,0x02,0xe7,0xa0,0xc4,0xc8,0x9e,
0xea,0xbf,0x8a,0xd2,0x40,0xc7,0x38,0xb5,0xa3,0xf7,0xf2,0xce,0xf9,0x61,0x15,0xa1,
0xe0,0xae,0x5d,0xa4,0x9b,0x34,0x1a,0x55,0xad,0x93,0x32,0x30,0xf5,0x8c,0xb1,0xe3,
0x1d,0xf6,0xe2,0x2e,0x82,0x66,0xca,0x60,0xc0,0x29,0x23,0xab,0x0d,0x53,0x4e,0x6f,
0xd5,0xdb,0x37,0x45,0xde,0xfd,0x8e,0x2f,0x03,0xff,0x6a,0x72,0x6d,0x6c,0x5b,0x51,
0x8d,0x1b,0xaf,0x92,0xbb,0xdd,0xbc,0x7f,0x11,0xd9,0x5c,0x41,0x1f,0x10,0x5a,0xd8,
0x0a,0xc1,0x31,0x88,0xa5,0xcd,0x7b,0xbd,0x2d,0x74,0xd0,0x12,0xb8,0xe5,0xb4,0xb0,
0x89,0x69,0x97,0x4a,0x0c,0x96,0x77,0x7e,0x65,0xb9,0xf1,0x09,0xc5,0x6e,0xc6,0x84,
0x18,0xf0,0x7d,0xec,0x3a,0xdc,0x4d,0x20,0x79,0xee,0x5f,0x3e,0xd7,0xcb,0x39,0x48
};
const u32 CK[32] = {
0x00070e15, 0x1c232a31, 0x383f464d, 0x545b6269,
0x70777e85, 0x8c939aa1, 0xa8afb6bd, 0xc4cbd2d9,
0xe0e7eef5, 0xfc030a11, 0x181f262d, 0x343b4249,
0x50575e65, 0x6c737a81, 0x888f969d, 0xa4abb2b9,
0xc0c7ced5, 0xdce3eaf1, 0xf8ff060d, 0x141b2229,
0x30373e45, 0x4c535a61, 0x686f767d, 0x848b9299,
0xa0a7aeb5, 0xbcc3cad1, 0xd8dfe6ed, 0xf4fb0209,
0x10171e25, 0x2c333a41, 0x484f565d, 0x646b7279 };
#define Rotl(_x, _y) (((_x) << (_y)) | ((_x) >> (32 - (_y))))
#define ByteSub(_A) (Sbox[(_A) >> 24 & 0xFF] << 24 | \
Sbox[(_A) >> 16 & 0xFF] << 16 | \
Sbox[(_A) >> 8 & 0xFF] << 8 | \
Sbox[(_A) & 0xFF])
#define L1(_B) ((_B) ^ Rotl(_B, 2) ^ Rotl(_B, 10) ^ Rotl(_B, 18) ^ Rotl(_B, 24))
#define L2(_B) ((_B) ^ Rotl(_B, 13) ^ Rotl(_B, 23))
static void
xor_block(void *dst, void *src1, void *src2)
/* 128-bit xor: *dst = *src1 xor *src2. Pointers must be 32-bit aligned */
{
((u32 *)dst)[0] = ((u32 *)src1)[0] ^ ((u32 *)src2)[0];
((u32 *)dst)[1] = ((u32 *)src1)[1] ^ ((u32 *)src2)[1];
((u32 *)dst)[2] = ((u32 *)src1)[2] ^ ((u32 *)src2)[2];
((u32 *)dst)[3] = ((u32 *)src1)[3] ^ ((u32 *)src2)[3];
}
void SMS4Crypt(u8 *Input, u8 *Output, u32 *rk)
{
u32 r, mid, x0, x1, x2, x3, *p;
p = (u32 *)Input;
x0 = p[0];
x1 = p[1];
x2 = p[2];
x3 = p[3];
#ifdef WAPI_LITTLE_ENDIAN
x0 = Rotl(x0, 16); x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8);
x1 = Rotl(x1, 16); x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8);
x2 = Rotl(x2, 16); x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8);
x3 = Rotl(x3, 16); x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8);
#endif
for (r = 0; r < 32; r += 4)
{
mid = x1 ^ x2 ^ x3 ^ rk[r + 0];
mid = ByteSub(mid);
x0 ^= L1(mid);
mid = x2 ^ x3 ^ x0 ^ rk[r + 1];
mid = ByteSub(mid);
x1 ^= L1(mid);
mid = x3 ^ x0 ^ x1 ^ rk[r + 2];
mid = ByteSub(mid);
x2 ^= L1(mid);
mid = x0 ^ x1 ^ x2 ^ rk[r + 3];
mid = ByteSub(mid);
x3 ^= L1(mid);
}
#ifdef WAPI_LITTLE_ENDIAN
x0 = Rotl(x0, 16); x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8);
x1 = Rotl(x1, 16); x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8);
x2 = Rotl(x2, 16); x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8);
x3 = Rotl(x3, 16); x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8);
#endif
p = (u32 *)Output;
p[0] = x3;
p[1] = x2;
p[2] = x1;
p[3] = x0;
}
void SMS4KeyExt(u8 *Key, u32 *rk, u32 CryptFlag)
{
u32 r, mid, x0, x1, x2, x3, *p;
p = (u32 *)Key;
x0 = p[0];
x1 = p[1];
x2 = p[2];
x3 = p[3];
#ifdef WAPI_LITTLE_ENDIAN
x0 = Rotl(x0, 16); x0 = ((x0 & 0xFF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8);
x1 = Rotl(x1, 16); x1 = ((x1 & 0xFF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8);
x2 = Rotl(x2, 16); x2 = ((x2 & 0xFF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8);
x3 = Rotl(x3, 16); x3 = ((x3 & 0xFF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8);
#endif
x0 ^= 0xa3b1bac6;
x1 ^= 0x56aa3350;
x2 ^= 0x677d9197;
x3 ^= 0xb27022dc;
for (r = 0; r < 32; r += 4)
{
mid = x1 ^ x2 ^ x3 ^ CK[r + 0];
mid = ByteSub(mid);
rk[r + 0] = x0 ^= L2(mid);
mid = x2 ^ x3 ^ x0 ^ CK[r + 1];
mid = ByteSub(mid);
rk[r + 1] = x1 ^= L2(mid);
mid = x3 ^ x0 ^ x1 ^ CK[r + 2];
mid = ByteSub(mid);
rk[r + 2] = x2 ^= L2(mid);
mid = x0 ^ x1 ^ x2 ^ CK[r + 3];
mid = ByteSub(mid);
rk[r + 3] = x3 ^= L2(mid);
}
if (CryptFlag == DECRYPT)
{
for (r = 0; r < 16; r++)
mid = rk[r], rk[r] = rk[31 - r], rk[31 - r] = mid;
}
}
void WapiSMS4Cryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength,
u8 *Output, u16 *OutputLength, u32 CryptFlag)
{
u32 blockNum,i,j, rk[32];
u16 remainder;
u8 blockIn[16],blockOut[16], tempIV[16], k;
*OutputLength = 0;
remainder = InputLength & 0x0F;
blockNum = InputLength >> 4;
if (remainder !=0)
blockNum++;
else
remainder = 16;
for (k=0;k<16;k++)
tempIV[k] = IV[15-k];
memcpy(blockIn, tempIV, 16);
SMS4KeyExt((u8 *)Key, rk,CryptFlag);
for (i=0; i<blockNum-1; i++)
{
SMS4Crypt((u8 *)blockIn, blockOut, rk);
xor_block(&Output[i*16], &Input[i*16], blockOut);
memcpy(blockIn,blockOut,16);
}
*OutputLength = i*16;
SMS4Crypt((u8 *)blockIn, blockOut, rk);
for (j=0; j<remainder; j++)
{
Output[i*16+j] = Input[i*16+j] ^ blockOut[j];
}
*OutputLength += remainder;
}
void WapiSMS4Encryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength,
u8 *Output, u16 *OutputLength)
{
WapiSMS4Cryption(Key, IV, Input, InputLength, Output, OutputLength, ENCRYPT);
}
void WapiSMS4Decryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength,
u8 *Output, u16 *OutputLength)
{
// OFB mode: is also ENCRYPT flag
WapiSMS4Cryption(Key, IV, Input, InputLength, Output, OutputLength, ENCRYPT);
}
void WapiSMS4CalculateMic(u8 *Key, u8 *IV, u8 *Input1, u8 Input1Length,
u8 *Input2, u16 Input2Length, u8 *Output, u8 *OutputLength)
{
u32 blockNum, i, remainder, rk[32];
u8 BlockIn[16], BlockOut[16], TempBlock[16], tempIV[16], k;
*OutputLength = 0;
remainder = Input1Length & 0x0F;
blockNum = Input1Length >> 4;
for (k=0;k<16;k++)
tempIV[k] = IV[15-k];
memcpy(BlockIn, tempIV, 16);
SMS4KeyExt((u8 *)Key, rk, ENCRYPT);
SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
for (i=0; i<blockNum; i++){
xor_block(BlockIn, (Input1+i*16), BlockOut);
SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
}
if (remainder !=0){
memset(TempBlock, 0, 16);
memcpy(TempBlock, (Input1+blockNum*16), remainder);
xor_block(BlockIn, TempBlock, BlockOut);
SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
}
remainder = Input2Length & 0x0F;
blockNum = Input2Length >> 4;
for (i=0; i<blockNum; i++){
xor_block(BlockIn, (Input2+i*16), BlockOut);
SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
}
if (remainder !=0){
memset(TempBlock, 0, 16);
memcpy(TempBlock, (Input2+blockNum*16), remainder);
xor_block(BlockIn, TempBlock, BlockOut);
SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
}
memcpy(Output, BlockOut, 16);
*OutputLength = 16;
}
void SecCalculateMicSMS4(
u8 KeyIdx,
u8 *MicKey,
u8 *pHeader,
u8 *pData,
u16 DataLen,
u8 *MicBuffer
)
{
#if 0
struct ieee80211_hdr_3addr_qos *header;
u8 TempBuf[34], TempLen = 32, MicLen, QosOffset, *IV;
u16 *pTemp, fc;
WAPI_TRACE(WAPI_TX|WAPI_RX, "=========>%s\n", __FUNCTION__);
header = (struct ieee80211_hdr_3addr_qos *)pHeader;
memset(TempBuf, 0, 34);
memcpy(TempBuf, pHeader, 2); //FrameCtrl
pTemp = (u16*)TempBuf;
*pTemp &= 0xc78f; //bit4,5,6,11,12,13
memcpy((TempBuf+2), (pHeader+4), 12); //Addr1, Addr2
memcpy((TempBuf+14), (pHeader+22), 2); // SeqCtrl
pTemp = (u16*)(TempBuf + 14);
*pTemp &= 0x000f;
memcpy((TempBuf+16), (pHeader+16), 6); //Addr3
fc = le16_to_cpu(header->frame_ctl);
if (GetFrDs((u16*)&fc) && GetToDs((u16 *)&fc))
{
memcpy((TempBuf+22), (pHeader+24), 6);
QosOffset = 30;
}else{
memset((TempBuf+22), 0, 6);
QosOffset = 24;
}
if ((fc & 0x0088) == 0x0088){
memcpy((TempBuf+28), (pHeader+QosOffset), 2);
TempLen += 2;
//IV = pHeader + QosOffset + 2 + SNAP_SIZE + sizeof(u16) + 2;
IV = pHeader + QosOffset + 2 + 2;
}else{
IV = pHeader + QosOffset + 2;
//IV = pHeader + QosOffset + SNAP_SIZE + sizeof(u16) + 2;
}
TempBuf[TempLen-1] = (u8)(DataLen & 0xff);
TempBuf[TempLen-2] = (u8)((DataLen & 0xff00)>>8);
TempBuf[TempLen-4] = KeyIdx;
WAPI_DATA(WAPI_TX, "CalculateMic - KEY", MicKey, 16);
WAPI_DATA(WAPI_TX, "CalculateMic - IV", IV, 16);
WAPI_DATA(WAPI_TX, "CalculateMic - TempBuf", TempBuf, TempLen);
WAPI_DATA(WAPI_TX, "CalculateMic - pData", pData, DataLen);
WapiSMS4CalculateMic(MicKey, IV, TempBuf, TempLen,
pData, DataLen, MicBuffer, &MicLen);
if (MicLen != 16)
WAPI_TRACE(WAPI_ERR,"%s: MIC Length Error!!\n",__FUNCTION__);
WAPI_TRACE(WAPI_TX|WAPI_RX, "<=========%s\n", __FUNCTION__);
#endif
}
/* AddCount: 1 or 2.
* If overflow, return 1,
* else return 0.
*/
u8 WapiIncreasePN(u8 *PN, u8 AddCount)
{
u8 i;
if (NULL == PN)
return 1;
//YJ,test,091102
/*
if (AddCount == 2){
DBG_8192C("############################%s(): PN[0]=0x%x\n", __FUNCTION__, PN[0]);
if (PN[0] == 0x48){
PN[0] += AddCount;
return 1;
}else{
PN[0] += AddCount;
return 0;
}
}
*/
//YJ,test,091102,end
for (i=0; i<16; i++)
{
if (PN[i] + AddCount <= 0xff)
{
PN[i] += AddCount;
return 0;
}
else
{
PN[i] += AddCount;
AddCount = 1;
}
}
return 1;
}
void WapiGetLastRxUnicastPNForQoSData(
u8 UserPriority,
PRT_WAPI_STA_INFO pWapiStaInfo,
u8 *PNOut
)
{
WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__);
switch (UserPriority)
{
case 0:
case 3:
memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNBEQueue,16);
break;
case 1:
case 2:
memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNBKQueue,16);
break;
case 4:
case 5:
memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNVIQueue,16);
break;
case 6:
case 7:
memcpy(PNOut,pWapiStaInfo->lastRxUnicastPNVOQueue,16);
break;
default:
WAPI_TRACE(WAPI_ERR, "%s: Unknown TID\n", __FUNCTION__);
break;
}
WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__);
}
void WapiSetLastRxUnicastPNForQoSData(
u8 UserPriority,
u8 *PNIn,
PRT_WAPI_STA_INFO pWapiStaInfo
)
{
WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__);
switch (UserPriority)
{
case 0:
case 3:
memcpy(pWapiStaInfo->lastRxUnicastPNBEQueue,PNIn,16);
break;
case 1:
case 2:
memcpy(pWapiStaInfo->lastRxUnicastPNBKQueue,PNIn,16);
break;
case 4:
case 5:
memcpy(pWapiStaInfo->lastRxUnicastPNVIQueue,PNIn,16);
break;
case 6:
case 7:
memcpy(pWapiStaInfo->lastRxUnicastPNVOQueue,PNIn,16);
break;
default:
WAPI_TRACE(WAPI_ERR, "%s: Unknown TID\n", __FUNCTION__);
break;
}
WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__);
}
/****************************************************************************
FALSE not RX-Reorder
TRUE do RX Reorder
add to support WAPI to N-mode
*****************************************************************************/
u8 WapiCheckPnInSwDecrypt(
_adapter *padapter,
struct sk_buff *pskb
)
{
u8 ret = false;
#if 0
struct ieee80211_hdr_3addr_qos *header;
u16 fc;
u8 *pDaddr, *pTaddr, *pRaddr;
header = (struct ieee80211_hdr_3addr_qos *)pskb->data;
pTaddr = header->addr2;
pRaddr = header->addr1;
fc = le16_to_cpu(header->frame_ctl);
if (GetToDs(&fc))
pDaddr = header->addr3;
else
pDaddr = header->addr1;
if ((_rtw_memcmp(pRaddr, padapter->pnetdev->dev_addr, ETH_ALEN) == 0)
&& ! (pDaddr)
&& (GetFrameType(&fc) == WIFI_QOS_DATA_TYPE))
//&& ieee->pHTInfo->bCurrentHTSupport &&
//ieee->pHTInfo->bCurRxReorderEnable)
ret = false;
else
ret = true;
#endif
WAPI_TRACE(WAPI_RX, "%s: return %d\n", __FUNCTION__, ret);
return ret;
}
int SecSMS4HeaderFillIV(_adapter *padapter, u8 *pxmitframe)
{
struct pkt_attrib *pattrib = &((struct xmit_frame*)pxmitframe)->attrib;
u8 * frame = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_OFFSET;
u8 *pSecHeader = NULL, *pos = NULL, *pRA = NULL;
u8 bPNOverflow = false, bFindMatchPeer = false, hdr_len = 0;
PWLAN_HEADER_WAPI_EXTENSION pWapiExt = NULL;
PRT_WAPI_T pWapiInfo = &padapter->wapiInfo;
PRT_WAPI_STA_INFO pWapiSta = NULL;
int ret = 0;
WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__);
return ret;
#if 0
hdr_len = sMacHdrLng;
if (GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE)
{
hdr_len += 2;
}
//hdr_len += SNAP_SIZE + sizeof(u16);
pos = skb_push(pskb, padapter->wapiInfo.extra_prefix_len);
memmove(pos, pos+padapter->wapiInfo.extra_prefix_len, hdr_len);
pSecHeader = pskb->data + hdr_len;
pWapiExt = (PWLAN_HEADER_WAPI_EXTENSION)pSecHeader;
pRA = pskb->data + 4;
WAPI_DATA(WAPI_TX, "FillIV - Before Fill IV", pskb->data, pskb->len);
//Address 1 is always receiver's address
if ( IS_MCAST(pRA) ){
if (!pWapiInfo->wapiTxMsk.bTxEnable){
WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__);
return -2;
}
if (pWapiInfo->wapiTxMsk.keyId <= 1){
pWapiExt->KeyIdx = pWapiInfo->wapiTxMsk.keyId;
pWapiExt->Reserved = 0;
bPNOverflow = WapiIncreasePN(pWapiInfo->lastTxMulticastPN, 1);
memcpy(pWapiExt->PN, pWapiInfo->lastTxMulticastPN, 16);
if (bPNOverflow){
// Update MSK Notification.
WAPI_TRACE(WAPI_ERR,"===============>%s():multicast PN overflow\n",__FUNCTION__);
rtw_wapi_app_event_handler(padapter,NULL,0,pRA, false, false, true, 0, false);
}
}else{
WAPI_TRACE(WAPI_ERR,"%s: Invalid Wapi Multicast KeyIdx!!\n",__FUNCTION__);
ret = -3;
}
}
else{
list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
if (!memcmp(pWapiSta->PeerMacAddr,pRA,6)){
bFindMatchPeer = true;
break;
}
}
if (bFindMatchPeer){
if ((!pWapiSta->wapiUskUpdate.bTxEnable) && (!pWapiSta->wapiUsk.bTxEnable)){
WAPI_TRACE(WAPI_ERR,"%s: bTxEnable = 0!!\n",__FUNCTION__);
return -4;
}
if (pWapiSta->wapiUsk.keyId <= 1){
if (pWapiSta->wapiUskUpdate.bTxEnable)
pWapiExt->KeyIdx = pWapiSta->wapiUskUpdate.keyId;
else
pWapiExt->KeyIdx = pWapiSta->wapiUsk.keyId;
pWapiExt->Reserved = 0;
bPNOverflow = WapiIncreasePN(pWapiSta->lastTxUnicastPN, 2);
memcpy(pWapiExt->PN, pWapiSta->lastTxUnicastPN, 16);
if (bPNOverflow){
// Update USK Notification.
WAPI_TRACE(WAPI_ERR,"===============>%s():unicast PN overflow\n",__FUNCTION__);
rtw_wapi_app_event_handler(padapter,NULL,0,pWapiSta->PeerMacAddr, false, true, false, 0, false);
}
}else{
WAPI_TRACE(WAPI_ERR,"%s: Invalid Wapi Unicast KeyIdx!!\n",__FUNCTION__);
ret = -5;
}
}
else{
WAPI_TRACE(WAPI_ERR,"%s: Can not find Peer Sta "MAC_FMT"!!\n",__FUNCTION__, MAC_ARG(pRA));
ret = -6;
}
}
WAPI_DATA(WAPI_TX, "FillIV - After Fill IV", pskb->data, pskb->len);
WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__);
return ret;
#endif
}
// WAPI SW Enc: must have done Coalesce!
void SecSWSMS4Encryption(
_adapter *padapter,
u8 * pxmitframe
)
{
PRT_WAPI_T pWapiInfo = &padapter->wapiInfo;
PRT_WAPI_STA_INFO pWapiSta = NULL;
u8 *pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_SIZE;
struct pkt_attrib *pattrib = &((struct xmit_frame*)pxmitframe)->attrib;
u8 *SecPtr = NULL, *pRA, *pMicKey = NULL, *pDataKey = NULL, *pIV = NULL;
u8 IVOffset, DataOffset, bFindMatchPeer = false, KeyIdx = 0, MicBuffer[16];
u16 OutputLength;
WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__);
WAPI_TRACE(WAPI_TX,"hdrlen: %d\n",pattrib->hdrlen);
return;
DataOffset = pattrib->hdrlen + pattrib->iv_len;
pRA = pframe + 4;
if ( IS_MCAST(pRA) ){
KeyIdx = pWapiInfo->wapiTxMsk.keyId;
pIV = pWapiInfo->lastTxMulticastPN;
pMicKey = pWapiInfo->wapiTxMsk.micKey;
pDataKey = pWapiInfo->wapiTxMsk.dataKey;
}else{
if (!list_empty(&(pWapiInfo->wapiSTAUsedList))){
list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
if (0 == memcmp(pWapiSta->PeerMacAddr, pRA, 6)){
bFindMatchPeer = true;
break;
}
}
if (bFindMatchPeer){
if (pWapiSta->wapiUskUpdate.bTxEnable){
KeyIdx = pWapiSta->wapiUskUpdate.keyId;
WAPI_TRACE(WAPI_TX, "%s(): Use update USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx);
pIV = pWapiSta->lastTxUnicastPN;
pMicKey = pWapiSta->wapiUskUpdate.micKey;
pDataKey = pWapiSta->wapiUskUpdate.dataKey;
}else{
KeyIdx = pWapiSta->wapiUsk.keyId;
WAPI_TRACE(WAPI_TX, "%s(): Use USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx);
pIV = pWapiSta->lastTxUnicastPN;
pMicKey = pWapiSta->wapiUsk.micKey;
pDataKey = pWapiSta->wapiUsk.dataKey;
}
}else{
WAPI_TRACE(WAPI_ERR,"%s: Can not find Peer Sta!!\n",__FUNCTION__);
return;
}
}else{
WAPI_TRACE(WAPI_ERR,"%s: wapiSTAUsedList is empty!!\n",__FUNCTION__);
return;
}
}
SecPtr = pframe;
SecCalculateMicSMS4(KeyIdx, pMicKey, SecPtr, (SecPtr+DataOffset), pattrib->pktlen, MicBuffer);
WAPI_DATA(WAPI_TX, "Encryption - MIC", MicBuffer, padapter->wapiInfo.extra_postfix_len);
memcpy(pframe+pattrib->hdrlen+pattrib->iv_len+pattrib->pktlen-pattrib->icv_len,
(u8 *)MicBuffer,
padapter->wapiInfo.extra_postfix_len
);
WapiSMS4Encryption(pDataKey, pIV, (SecPtr+DataOffset),pattrib->pktlen+pattrib->icv_len, (SecPtr+DataOffset), &OutputLength);
WAPI_DATA(WAPI_TX, "Encryption - After SMS4 encryption",pframe,pattrib->hdrlen+pattrib->iv_len+pattrib->pktlen);
WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__);
}
u8 SecSWSMS4Decryption(
_adapter *padapter,
u8 *precv_frame,
struct recv_priv *precv_priv
)
{
PRT_WAPI_T pWapiInfo = &padapter->wapiInfo;
struct recv_frame_hdr *precv_hdr;
PRT_WAPI_STA_INFO pWapiSta = NULL;
u8 IVOffset, DataOffset, bFindMatchPeer = false, bUseUpdatedKey = false;
u8 KeyIdx, MicBuffer[16], lastRxPNforQoS[16];
u8 *pRA, *pTA, *pMicKey, *pDataKey, *pLastRxPN, *pRecvPN, *pSecData, *pRecvMic, *pos;
u8 TID = 0;
u16 OutputLength, DataLen;
u8 bQosData;
struct sk_buff * pskb;
WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__);
return 0;
precv_hdr = &((union recv_frame*)precv_frame)->u.hdr;
pskb = (struct sk_buff *)(precv_hdr->rx_data);
precv_hdr->bWapiCheckPNInDecrypt = WapiCheckPnInSwDecrypt(padapter, pskb);
WAPI_TRACE(WAPI_RX, "=========>%s: check PN %d\n", __FUNCTION__,precv_hdr->bWapiCheckPNInDecrypt);
WAPI_DATA(WAPI_RX, "Decryption - Before decryption", pskb->data, pskb->len);
IVOffset = sMacHdrLng;
bQosData = GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE;
if (bQosData){
IVOffset += 2;
}
//if (GetHTC())
// IVOffset += 4;
//IVOffset += SNAP_SIZE + sizeof(u16);
DataOffset = IVOffset + padapter->wapiInfo.extra_prefix_len;
pRA = pskb->data + 4;
pTA = pskb->data + 10;
KeyIdx = *(pskb->data + IVOffset);
pRecvPN = pskb->data + IVOffset + 2;
pSecData = pskb->data + DataOffset;
DataLen = pskb->len - DataOffset;
pRecvMic = pskb->data + pskb->len - padapter->wapiInfo.extra_postfix_len;
TID = GetTid(pskb->data);
if (!list_empty(&(pWapiInfo->wapiSTAUsedList))){
list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
if (0 == memcmp(pWapiSta->PeerMacAddr, pTA, 6)){
bFindMatchPeer = true;
break;
}
}
}
if (!bFindMatchPeer){
WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta "MAC_FMT" for Key Info!!!\n", __FUNCTION__, MAC_ARG(pTA));
return false;
}
if ( IS_MCAST(pRA) ){
WAPI_TRACE(WAPI_RX, "%s: Multicast decryption !!!\n", __FUNCTION__);
if (pWapiSta->wapiMsk.keyId == KeyIdx && pWapiSta->wapiMsk.bSet){
pLastRxPN = pWapiSta->lastRxMulticastPN;
if (!WapiComparePN(pRecvPN, pLastRxPN)){
WAPI_TRACE(WAPI_ERR, "%s: MSK PN is not larger than last, Dropped!!!\n", __FUNCTION__);
WAPI_DATA(WAPI_ERR, "pRecvPN:", pRecvPN, 16);
WAPI_DATA(WAPI_ERR, "pLastRxPN:", pLastRxPN, 16);
return false;
}
memcpy(pLastRxPN, pRecvPN, 16);
pMicKey = pWapiSta->wapiMsk.micKey;
pDataKey = pWapiSta->wapiMsk.dataKey;
}else if (pWapiSta->wapiMskUpdate.keyId == KeyIdx && pWapiSta->wapiMskUpdate.bSet){
WAPI_TRACE(WAPI_RX, "%s: Use Updated MSK for Decryption !!!\n", __FUNCTION__);
bUseUpdatedKey = true;
memcpy(pWapiSta->lastRxMulticastPN, pRecvPN, 16);
pMicKey = pWapiSta->wapiMskUpdate.micKey;
pDataKey = pWapiSta->wapiMskUpdate.dataKey;
}else{
WAPI_TRACE(WAPI_ERR, "%s: Can not find MSK with matched KeyIdx(%d), Dropped !!!\n", __FUNCTION__,KeyIdx);
return false;
}
}
else{
WAPI_TRACE(WAPI_RX, "%s: Unicast decryption !!!\n", __FUNCTION__);
if (pWapiSta->wapiUsk.keyId == KeyIdx && pWapiSta->wapiUsk.bSet){
WAPI_TRACE(WAPI_RX, "%s: Use USK for Decryption!!!\n", __FUNCTION__);
if (precv_hdr->bWapiCheckPNInDecrypt){
if (GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE){
WapiGetLastRxUnicastPNForQoSData(TID, pWapiSta, lastRxPNforQoS);
pLastRxPN = lastRxPNforQoS;
}else{
pLastRxPN = pWapiSta->lastRxUnicastPN;
}
if (!WapiComparePN(pRecvPN, pLastRxPN)){
return false;
}
if (bQosData){
WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta);
}else{
memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16);
}
}else{
memcpy(precv_hdr->WapiTempPN,pRecvPN,16);
}
if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE))
{
if ((pRecvPN[0] & 0x1) == 0){
WAPI_TRACE(WAPI_ERR, "%s: Rx USK PN is not odd when Infra STA mode, Dropped !!!\n", __FUNCTION__);
return false;
}
}
pMicKey = pWapiSta->wapiUsk.micKey;
pDataKey = pWapiSta->wapiUsk.dataKey;
}
else if (pWapiSta->wapiUskUpdate.keyId == KeyIdx && pWapiSta->wapiUskUpdate.bSet ){
WAPI_TRACE(WAPI_RX, "%s: Use Updated USK for Decryption!!!\n", __FUNCTION__);
if (pWapiSta->bAuthenticatorInUpdata)
bUseUpdatedKey = true;
else
bUseUpdatedKey = false;
if (bQosData){
WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta);
}else{
memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16);
}
pMicKey = pWapiSta->wapiUskUpdate.micKey;
pDataKey = pWapiSta->wapiUskUpdate.dataKey;
}else{
WAPI_TRACE(WAPI_ERR, "%s: No valid USK!!!KeyIdx=%d pWapiSta->wapiUsk.keyId=%d pWapiSta->wapiUskUpdate.keyId=%d\n", __FUNCTION__, KeyIdx, pWapiSta->wapiUsk.keyId, pWapiSta->wapiUskUpdate.keyId);
//dump_buf(pskb->data,pskb->len);
return false;
}
}
WAPI_DATA(WAPI_RX, "Decryption - DataKey", pDataKey, 16);
WAPI_DATA(WAPI_RX, "Decryption - IV", pRecvPN, 16);
WapiSMS4Decryption(pDataKey, pRecvPN, pSecData, DataLen, pSecData, &OutputLength);
if (OutputLength != DataLen)
WAPI_TRACE(WAPI_ERR, "%s: Output Length Error!!!!\n", __FUNCTION__);
WAPI_DATA(WAPI_RX, "Decryption - After decryption", pskb->data, pskb->len);
DataLen -= padapter->wapiInfo.extra_postfix_len;
SecCalculateMicSMS4(KeyIdx, pMicKey, pskb->data, pSecData, DataLen, MicBuffer);
WAPI_DATA(WAPI_RX, "Decryption - MIC received", pRecvMic, SMS4_MIC_LEN);
WAPI_DATA(WAPI_RX, "Decryption - MIC calculated", MicBuffer, SMS4_MIC_LEN);
if (0 == memcmp(MicBuffer, pRecvMic, padapter->wapiInfo.extra_postfix_len)){
WAPI_TRACE(WAPI_RX, "%s: Check MIC OK!!\n", __FUNCTION__);
if (bUseUpdatedKey){
// delete the old key
if ( IS_MCAST(pRA) ){
WAPI_TRACE(WAPI_API, "%s(): AE use new update MSK!!\n", __FUNCTION__);
pWapiSta->wapiMsk.keyId = pWapiSta->wapiMskUpdate.keyId;
memcpy(pWapiSta->wapiMsk.dataKey, pWapiSta->wapiMskUpdate.dataKey, 16);
memcpy(pWapiSta->wapiMsk.micKey, pWapiSta->wapiMskUpdate.micKey, 16);
pWapiSta->wapiMskUpdate.bTxEnable = pWapiSta->wapiMskUpdate.bSet = false;
}else{
WAPI_TRACE(WAPI_API, "%s(): AE use new update USK!!\n", __FUNCTION__);
pWapiSta->wapiUsk.keyId = pWapiSta->wapiUskUpdate.keyId;
memcpy(pWapiSta->wapiUsk.dataKey, pWapiSta->wapiUskUpdate.dataKey, 16);
memcpy(pWapiSta->wapiUsk.micKey, pWapiSta->wapiUskUpdate.micKey, 16);
pWapiSta->wapiUskUpdate.bTxEnable = pWapiSta->wapiUskUpdate.bSet = false;
}
}
}else{
WAPI_TRACE(WAPI_ERR, "%s: Check MIC Error, Dropped !!!!\n", __FUNCTION__);
return false;
}
pos = pskb->data;
memmove(pos+padapter->wapiInfo.extra_prefix_len, pos, IVOffset);
skb_pull(pskb, padapter->wapiInfo.extra_prefix_len);
WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__);
return true;
}
u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe)
{
u8 *pframe;
u32 res = _SUCCESS;
WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__);
if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable))
{
WAPI_TRACE(WAPI_TX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__);
return _FAIL;
}
if (((struct xmit_frame*)pxmitframe)->buf_addr==NULL)
return _FAIL;
pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_OFFSET;
SecSWSMS4Encryption(padapter, pxmitframe);
WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__);
return res;
}
u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe)
{
u8 *pframe;
u32 res = _SUCCESS;
WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__);
if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable))
{
WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__);
return _FAIL;
}
//drop packet when hw decrypt fail
//return tempraily
return _FAIL;
//pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data;
if (false == SecSWSMS4Decryption(padapter, precvframe, &padapter->recvpriv))
{
WAPI_TRACE(WAPI_ERR, "%s():SMS4 decrypt frame error\n",__FUNCTION__);
return _FAIL;
}
WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__);
return res;
}
#else
u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe)
{
WAPI_TRACE(WAPI_TX, "=========>Dummy %s\n", __FUNCTION__);
WAPI_TRACE(WAPI_TX, "<=========Dummy %s\n", __FUNCTION__);
return _SUCCESS;
}
u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe)
{
WAPI_TRACE(WAPI_RX, "=========>Dummy %s\n", __FUNCTION__);
WAPI_TRACE(WAPI_RX, "<=========Dummy %s\n", __FUNCTION__);
return _SUCCESS;
}
#endif
#endif

1077
hal/HalHWImg8188E_FW.c
View file

File diff suppressed because it is too large Load diff

1
hal/rtl8188e_xmit.c
View file

@ -22,7 +22,6 @@
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <sdio_ops.h>
#include <rtl8188e_hal.h>
#ifdef CONFIG_XMIT_ACK

37
include/gspi_hal.h
View file

@ -1,37 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __GSPI_HAL_H__
#define __GSPI_HAL_H__
void spi_int_dpc(PADAPTER padapter);
#ifdef CONFIG_RTL8723A
void rtl8723as_set_hal_ops(PADAPTER padapter);
#define hal_set_hal_ops rtl8723as_set_hal_ops
#endif
#ifdef CONFIG_RTL8188E
void rtl8188es_set_hal_ops(PADAPTER padapter);
#define hal_set_hal_ops rtl8188es_set_hal_ops
#endif
#endif //__GSPI_HAL_H__

171
include/gspi_ops.h
View file

@ -1,171 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __GSPI_OPS_H__
#define __GSPI_OPS_H__
/* follwing defination is based on
* GSPI spec of RTL8723, we temp
* suppose that it will be the same
* for diff chips of GSPI, if not
* we should move it to HAL folder */
#define SPI_LOCAL_DOMAIN 0x0
#define WLAN_IOREG_DOMAIN 0x8
#define FW_FIFO_DOMAIN 0x4
#define TX_HIQ_DOMAIN 0xc
#define TX_MIQ_DOMAIN 0xd
#define TX_LOQ_DOMAIN 0xe
#define RX_RXFIFO_DOMAIN 0x1f
//IO Bus domain address mapping
#define DEFUALT_OFFSET 0x0
#define SPI_LOCAL_OFFSET 0x10250000
#define WLAN_IOREG_OFFSET 0x10260000
#define FW_FIFO_OFFSET 0x10270000
#define TX_HIQ_OFFSET 0x10310000
#define TX_MIQ_OFFSET 0x1032000
#define TX_LOQ_OFFSET 0x10330000
#define RX_RXOFF_OFFSET 0x10340000
//SPI Local registers
#define SPI_REG_TX_CTRL 0x0000 // SPI Tx Control
#define SPI_REG_STATUS_RECOVERY 0x0004
#define SPI_REG_INT_TIMEOUT 0x0006
#define SPI_REG_HIMR 0x0014 // SPI Host Interrupt Mask
#define SPI_REG_HISR 0x0018 // SPI Host Interrupt Service Routine
#define SPI_REG_RX0_REQ_LEN 0x001C // RXDMA Request Length
#define SPI_REG_FREE_TXPG 0x0020 // Free Tx Buffer Page
#define SPI_REG_HCPWM1 0x0024 // HCI Current Power Mode 1
#define SPI_REG_HCPWM2 0x0026 // HCI Current Power Mode 2
#define SPI_REG_HTSFR_INFO 0x0030 // HTSF Informaion
#define SPI_REG_HRPWM1 0x0080 // HCI Request Power Mode 1
#define SPI_REG_HRPWM2 0x0082 // HCI Request Power Mode 2
#define SPI_REG_HPS_CLKR 0x0084 // HCI Power Save Clock
#define SPI_REG_HSUS_CTRL 0x0086 // SPI HCI Suspend Control
#define SPI_REG_HIMR_ON 0x0090 //SPI Host Extension Interrupt Mask Always
#define SPI_REG_HISR_ON 0x0091 //SPI Host Extension Interrupt Status Always
#define SPI_REG_CFG 0x00F0 //SPI Configuration Register
#define SPI_TX_CTRL (SPI_REG_TX_CTRL |SPI_LOCAL_OFFSET)
#define SPI_STATUS_RECOVERY (SPI_REG_STATUS_RECOVERY |SPI_LOCAL_OFFSET)
#define SPI_INT_TIMEOUT (SPI_REG_INT_TIMEOUT |SPI_LOCAL_OFFSET)
#define SPI_HIMR (SPI_REG_HIMR |SPI_LOCAL_OFFSET)
#define SPI_HISR (SPI_REG_HISR |SPI_LOCAL_OFFSET)
#define SPI_RX0_REQ_LEN_1_BYTE (SPI_REG_RX0_REQ_LEN |SPI_LOCAL_OFFSET)
#define SPI_FREE_TXPG (SPI_REG_FREE_TXPG |SPI_LOCAL_OFFSET)
#define SPI_HIMR_DISABLED 0
//SPI HIMR MASK diff with SDIO
#define SPI_HISR_RX_REQUEST BIT(0)
#define SPI_HISR_AVAL BIT(1)
#define SPI_HISR_TXERR BIT(2)
#define SPI_HISR_RXERR BIT(3)
#define SPI_HISR_TXFOVW BIT(4)
#define SPI_HISR_RXFOVW BIT(5)
#define SPI_HISR_TXBCNOK BIT(6)
#define SPI_HISR_TXBCNERR BIT(7)
#define SPI_HISR_BCNERLY_INT BIT(16)
#define SPI_HISR_ATIMEND BIT(17)
#define SPI_HISR_ATIMEND_E BIT(18)
#define SPI_HISR_CTWEND BIT(19)
#define SPI_HISR_C2HCMD BIT(20)
#define SPI_HISR_CPWM1 BIT(21)
#define SPI_HISR_CPWM2 BIT(22)
#define SPI_HISR_HSISR_IND BIT(23)
#define SPI_HISR_GTINT3_IND BIT(24)
#define SPI_HISR_GTINT4_IND BIT(25)
#define SPI_HISR_PSTIMEOUT BIT(26)
#define SPI_HISR_OCPINT BIT(27)
#define SPI_HISR_TSF_BIT32_TOGGLE BIT(29)
#define MASK_SPI_HISR_CLEAR (SPI_HISR_TXERR |\
SPI_HISR_RXERR |\
SPI_HISR_TXFOVW |\
SPI_HISR_RXFOVW |\
SPI_HISR_TXBCNOK |\
SPI_HISR_TXBCNERR |\
SPI_HISR_C2HCMD |\
SPI_HISR_CPWM1 |\
SPI_HISR_CPWM2 |\
SPI_HISR_HSISR_IND |\
SPI_HISR_GTINT3_IND |\
SPI_HISR_GTINT4_IND |\
SPI_HISR_PSTIMEOUT |\
SPI_HISR_OCPINT)
#define REG_LEN_FORMAT(pcmd, x) SET_BITS_TO_LE_4BYTE(pcmd, 0, 8, x)//(x<<(unsigned int)24)
#define REG_ADDR_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 8, 16, x)//(x<<(unsigned int)16)
#define REG_DOMAIN_ID_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 24, 5, x)//(x<<(unsigned int)0)
#define REG_FUN_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 29, 2, x)//(x<<(unsigned int)5)
#define REG_RW_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 31, 1, x)//(x<<(unsigned int)7)
#define FIFO_LEN_FORMAT(pcmd, x) SET_BITS_TO_LE_4BYTE(pcmd, 0, 16, x)//(x<<(unsigned int)24)
//#define FIFO_ADDR_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 8, 16, x)//(x<<(unsigned int)16)
#define FIFO_DOMAIN_ID_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 24, 5, x)//(x<<(unsigned int)0)
#define FIFO_FUN_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 29, 2, x)//(x<<(unsigned int)5)
#define FIFO_RW_FORMAT(pcmd,x) SET_BITS_TO_LE_4BYTE(pcmd, 31, 1, x)//(x<<(unsigned int)7)
//get status dword0
#define GET_STATUS_PUB_PAGE_NUM(status) LE_BITS_TO_4BYTE(status, 24, 8)
#define GET_STATUS_HI_PAGE_NUM(status) LE_BITS_TO_4BYTE(status, 18, 6)
#define GET_STATUS_MID_PAGE_NUM(status) LE_BITS_TO_4BYTE(status, 12, 6)
#define GET_STATUS_LOW_PAGE_NUM(status) LE_BITS_TO_4BYTE(status, 6, 6)
#define GET_STATUS_HISR_HI6BIT(status) LE_BITS_TO_4BYTE(status, 0, 6)
//get status dword1
#define GET_STATUS_HISR_MID8BIT(status) LE_BITS_TO_4BYTE(status + 4, 24, 8)
#define GET_STATUS_HISR_LOW8BIT(status) LE_BITS_TO_4BYTE(status + 4, 16, 8)
#define GET_STATUS_ERROR(status) LE_BITS_TO_4BYTE(status + 4, 17, 1)
#define GET_STATUS_INT(status) LE_BITS_TO_4BYTE(status + 4, 16, 1)
#define GET_STATUS_RX_LENGTH(status) LE_BITS_TO_4BYTE(status + 4, 0, 16)
#define RXDESC_SIZE 24
struct spi_more_data {
unsigned long more_data;
unsigned long len;
};
#ifdef CONFIG_RTL8723A
void rtl8723as_set_hal_ops(PADAPTER padapter);
#define set_hal_ops rtl8723as_set_hal_ops
#endif
#ifdef CONFIG_RTL8188E
void rtl8188es_set_hal_ops(PADAPTER padapter);
#define set_hal_ops rtl8188es_set_hal_ops
#endif
extern void spi_set_chip_endian(PADAPTER padapter);
extern void spi_set_intf_ops(struct _io_ops *pops);
extern void spi_set_chip_endian(PADAPTER padapter);
extern void InitInterrupt8723ASdio(PADAPTER padapter);
extern void InitSysInterrupt8723ASdio(PADAPTER padapter);
extern void EnableInterrupt8723ASdio(PADAPTER padapter);
extern void DisableInterrupt8723ASdio(PADAPTER padapter);
extern void spi_int_hdl(PADAPTER padapter);
extern u8 HalQueryTxBufferStatus8723ASdio(PADAPTER padapter);
extern void InitInterrupt8188ESdio(PADAPTER padapter);
extern void EnableInterrupt8188ESdio(PADAPTER padapter);
extern void DisableInterrupt8188ESdio(PADAPTER padapter);
#endif //__GSPI_OPS_H__

24
include/gspi_ops_linux.h
View file

@ -1,24 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __SDIO_OPS_LINUX_H__
#define __SDIO_OPS_LINUX_H__
#endif

35
include/gspi_osintf.h
View file

@ -1,35 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __SDIO_OSINTF_H__
#define __SDIO_OSINTF_H__
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#ifdef PLATFORM_OS_CE
extern NDIS_STATUS ce_sd_get_dev_hdl(PADAPTER padapter);
SD_API_STATUS ce_sd_int_callback(SD_DEVICE_HANDLE hDevice, PADAPTER padapter);
extern void sd_setup_irs(PADAPTER padapter);
#endif
#endif

177
include/pci_hal.h
View file

@ -1,177 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PCI_HAL_H__
#define __PCI_HAL_H__
#define INTEL_VENDOR_ID 0x8086
#define SIS_VENDOR_ID 0x1039
#define ATI_VENDOR_ID 0x1002
#define ATI_DEVICE_ID 0x7914
#define AMD_VENDOR_ID 0x1022
#define PCI_MAX_BRIDGE_NUMBER 255
#define PCI_MAX_DEVICES 32
#define PCI_MAX_FUNCTION 8
#define PCI_CONF_ADDRESS 0x0CF8 // PCI Configuration Space Address
#define PCI_CONF_DATA 0x0CFC // PCI Configuration Space Data
#define PCI_CLASS_BRIDGE_DEV 0x06
#define PCI_SUBCLASS_BR_PCI_TO_PCI 0x04
#define PCI_CAPABILITY_ID_PCI_EXPRESS 0x10
#define U1DONTCARE 0xFF
#define U2DONTCARE 0xFFFF
#define U4DONTCARE 0xFFFFFFFF
#define PCI_VENDER_ID_REALTEK 0x10ec
#define HAL_HW_PCI_8180_DEVICE_ID 0x8180
#define HAL_HW_PCI_8185_DEVICE_ID 0x8185 //8185 or 8185b
#define HAL_HW_PCI_8188_DEVICE_ID 0x8188 //8185b
#define HAL_HW_PCI_8198_DEVICE_ID 0x8198 //8185b
#define HAL_HW_PCI_8190_DEVICE_ID 0x8190 //8190
#define HAL_HW_PCI_8723E_DEVICE_ID 0x8723 //8723E
#define HAL_HW_PCI_8192_DEVICE_ID 0x8192 //8192 PCI-E
#define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192 //8192 SE
#define HAL_HW_PCI_8174_DEVICE_ID 0x8174 //8192 SE
#define HAL_HW_PCI_8173_DEVICE_ID 0x8173 //8191 SE Crab
#define HAL_HW_PCI_8172_DEVICE_ID 0x8172 //8191 SE RE
#define HAL_HW_PCI_8171_DEVICE_ID 0x8171 //8191 SE Unicron
#define HAL_HW_PCI_0045_DEVICE_ID 0x0045 //8190 PCI for Ceraga
#define HAL_HW_PCI_0046_DEVICE_ID 0x0046 //8190 Cardbus for Ceraga
#define HAL_HW_PCI_0044_DEVICE_ID 0x0044 //8192e PCIE for Ceraga
#define HAL_HW_PCI_0047_DEVICE_ID 0x0047 //8192e Express Card for Ceraga
#define HAL_HW_PCI_700F_DEVICE_ID 0x700F
#define HAL_HW_PCI_701F_DEVICE_ID 0x701F
#define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304
#define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191 //8192ce
#define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178 //8192ce
#define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177 //8192ce
#define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176 //8192ce
#define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191 //8192ce
#define HAL_HW_PCI_8192DE_DEVICE_ID 0x8193 //8192de
#define HAL_HW_PCI_002B_DEVICE_ID 0x002B //8192de, provided by HW SD
#define HAL_HW_PCI_8188EE_DEVICE_ID 0x8179
#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000 //8190 support 16 pages of IO registers
#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00
#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000 //8192 support 16 pages of IO registers
#define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01
#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000 //8192 support 16 pages of IO registers
#define HAL_HW_PCI_REVISION_ID_8192SE 0x10
#define HAL_HW_PCI_REVISION_ID_8192CE 0x1
#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000 //8192 support 16 pages of IO registers
#define HAL_HW_PCI_REVISION_ID_8192DE 0x0
#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000 //8192 support 16 pages of IO registers
enum pci_bridge_vendor {
PCI_BRIDGE_VENDOR_INTEL = 0x0,//0b'0000,0001
PCI_BRIDGE_VENDOR_ATI, //= 0x02,//0b'0000,0010
PCI_BRIDGE_VENDOR_AMD, //= 0x04,//0b'0000,0100
PCI_BRIDGE_VENDOR_SIS ,//= 0x08,//0b'0000,1000
PCI_BRIDGE_VENDOR_UNKNOWN, //= 0x40,//0b'0100,0000
PCI_BRIDGE_VENDOR_MAX ,//= 0x80
} ;
struct rt_pci_capabilities_header {
u8 capability_id;
u8 next;
};
struct pci_priv{
u8 linkctrl_reg;
u8 busnumber;
u8 devnumber;
u8 funcnumber;
u8 pcibridge_busnum;
u8 pcibridge_devnum;
u8 pcibridge_funcnum;
u8 pcibridge_vendor;
u16 pcibridge_vendorid;
u16 pcibridge_deviceid;
u8 pcibridge_pciehdr_offset;
u8 pcibridge_linkctrlreg;
u8 amd_l1_patch;
};
typedef struct _RT_ISR_CONTENT
{
union{
u32 IntArray[2];
u32 IntReg4Byte;
u16 IntReg2Byte;
};
}RT_ISR_CONTENT, *PRT_ISR_CONTENT;
//#define RegAddr(addr) (addr + 0xB2000000UL)
//some platform macros will def here
static inline void NdisRawWritePortUlong(u32 port, u32 val)
{
outl(val, port);
//writel(val, (u8 *)RegAddr(port));
}
static inline void NdisRawWritePortUchar(u32 port, u8 val)
{
outb(val, port);
//writeb(val, (u8 *)RegAddr(port));
}
static inline void NdisRawReadPortUchar(u32 port, u8 *pval)
{
*pval = inb(port);
//*pval = readb((u8 *)RegAddr(port));
}
static inline void NdisRawReadPortUshort(u32 port, u16 *pval)
{
*pval = inw(port);
//*pval = readw((u8 *)RegAddr(port));
}
static inline void NdisRawReadPortUlong(u32 port, u32 *pval)
{
*pval = inl(port);
//*pval = readl((u8 *)RegAddr(port));
}
#ifdef CONFIG_RTL8192C
void rtl8192ce_set_hal_ops(_adapter * padapter);
#define hal_set_hal_ops rtl8192ce_set_hal_ops
#endif
#ifdef CONFIG_RTL8192D
void rtl8192de_set_hal_ops(_adapter * padapter);
#define hal_set_hal_ops rtl8192de_set_hal_ops
#endif
#ifdef CONFIG_RTL8188E
void rtl8188ee_set_hal_ops(_adapter * padapter);
#define hal_set_hal_ops rtl8188ee_set_hal_ops
#endif
#endif //__PCIE_HAL_H__

78
include/pci_ops.h
View file

@ -1,78 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PCI_OPS_H_
#define __PCI_OPS_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
#ifdef CONFIG_RTL8188E
u32 rtl8188ee_init_desc_ring(_adapter * padapter);
u32 rtl8188ee_free_desc_ring(_adapter * padapter);
void rtl8188ee_reset_desc_ring(_adapter * padapter);
#ifdef CONFIG_64BIT_DMA
u8 PlatformEnable88EEDMA64(PADAPTER Adapter);
#endif
int rtl8188ee_interrupt(PADAPTER Adapter);
void rtl8188ee_xmit_tasklet(void *priv);
void rtl8188ee_recv_tasklet(void *priv);
void rtl8188ee_prepare_bcn_tasklet(void *priv);
void rtl8188ee_set_intf_ops(struct _io_ops *pops);
#define pci_set_intf_ops rtl8188ee_set_intf_ops
#endif
#ifdef CONFIG_RTL8192C
u32 rtl8192ce_init_desc_ring(_adapter * padapter);
u32 rtl8192ce_free_desc_ring(_adapter * padapter);
void rtl8192ce_reset_desc_ring(_adapter * padapter);
#ifdef CONFIG_64BIT_DMA
u8 PlatformEnable92CEDMA64(PADAPTER Adapter);
#endif
int rtl8192ce_interrupt(PADAPTER Adapter);
void rtl8192ce_xmit_tasklet(void *priv);
void rtl8192ce_recv_tasklet(void *priv);
void rtl8192ce_prepare_bcn_tasklet(void *priv);
void rtl8192ce_set_intf_ops(struct _io_ops *pops);
#define pci_set_intf_ops rtl8192ce_set_intf_ops
#endif
#ifdef CONFIG_RTL8192D
u32 rtl8192de_init_desc_ring(_adapter * padapter);
u32 rtl8192de_free_desc_ring(_adapter * padapter);
void rtl8192de_reset_desc_ring(_adapter * padapter);
#ifdef CONFIG_64BIT_DMA
u8 PlatformEnable92DEDMA64(PADAPTER Adapter);
#endif
int rtl8192de_interrupt(PADAPTER Adapter);
void rtl8192de_xmit_tasklet(void *priv);
void rtl8192de_recv_tasklet(void *priv);
void rtl8192de_prepare_bcn_tasklet(void *priv);
void rtl8192de_set_intf_ops(struct _io_ops *pops);
#define pci_set_intf_ops rtl8192de_set_intf_ops
u32 MpReadPCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u8 Direct);
void MpWritePCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u32 Value, IN u8 Direct);
#endif
#endif

33
include/pci_osintf.h
View file

@ -1,33 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PCI_OSINTF_H
#define __PCI_OSINTF_H
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
void rtw_pci_disable_aspm(_adapter *padapter);
void rtw_pci_enable_aspm(_adapter *padapter);
#endif

41
include/sdio_hal.h
View file

@ -1,41 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __SDIO_HAL_H__
#define __SDIO_HAL_H__
extern u8 sd_hal_bus_init(PADAPTER padapter);
extern u8 sd_hal_bus_deinit(PADAPTER padapter);
u8 sd_int_isr(PADAPTER padapter);
void sd_int_dpc(PADAPTER padapter);
#ifdef CONFIG_RTL8723A
void rtl8723as_set_hal_ops(PADAPTER padapter);
#define hal_set_hal_ops rtl8723as_set_hal_ops
#endif
#ifdef CONFIG_RTL8188E
void rtl8188es_set_hal_ops(PADAPTER padapter);
#define hal_set_hal_ops rtl8188es_set_hal_ops
#endif
#endif //__SDIO_HAL_H__

83
include/sdio_ops.h
View file

@ -1,83 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __SDIO_OPS_H__
#define __SDIO_OPS_H__
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
#ifdef PLATFORM_LINUX
#include <sdio_ops_linux.h>
#endif
#ifdef PLATFORM_WINDOWS
#ifdef PLATFORM_OS_XP
#include <sdio_ops_xp.h>
struct async_context
{
PMDL pmdl;
PSDBUS_REQUEST_PACKET sdrp;
unsigned char* r_buf;
unsigned char* padapter;
};
#endif
#ifdef PLATFORM_OS_CE
#include <sdio_ops_ce.h>
#endif
#endif
extern void sdio_set_intf_ops(struct _io_ops *pops);
//extern void sdio_func1cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem);
//extern void sdio_func1cmd52_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem);
extern u8 SdioLocalCmd52Read1Byte(PADAPTER padapter, u32 addr);
extern void SdioLocalCmd52Write1Byte(PADAPTER padapter, u32 addr, u8 v);
extern s32 _sdio_local_read(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf);
extern s32 sdio_local_read(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf);
extern s32 _sdio_local_write(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf);
extern s32 sdio_local_write(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf);
u32 _sdio_read32(PADAPTER padapter, u32 addr);
s32 _sdio_write32(PADAPTER padapter, u32 addr, u32 val);
extern void InitInterrupt8723ASdio(PADAPTER padapter);
extern void InitSysInterrupt8723ASdio(PADAPTER padapter);
extern void EnableInterrupt8723ASdio(PADAPTER padapter);
extern void DisableInterrupt8723ASdio(PADAPTER padapter);
extern void sd_int_hdl(PADAPTER padapter);
#ifdef CONFIG_RTL8723A
extern u8 HalQueryTxBufferStatus8723ASdio(PADAPTER padapter);
#endif //CONFIG_RTL8723A
#ifdef CONFIG_RTL8188E
extern u8 HalQueryTxBufferStatus8189ESdio(PADAPTER padapter);
#endif //CONFIG_RTL8188E
extern void InitInterrupt8188ESdio(PADAPTER padapter);
extern void EnableInterrupt8188ESdio(PADAPTER padapter);
extern void DisableInterrupt8188ESdio(PADAPTER padapter);
extern void UpdateInterruptMask8188ESdio(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR);
#ifdef CONFIG_WOWLAN
extern u8 RecvOnePkt(PADAPTER padapter, u32 size);
#endif //CONFIG_WOWLAN
#endif

55
include/sdio_ops_ce.h
View file

@ -1,55 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _SDIO_OPS_WINCE_H_
#define _SDIO_OPS_WINCE_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
#ifdef PLATFORM_OS_CE
extern u8 sdbus_cmd52r_ce(struct intf_priv *pintfpriv, u32 addr);
extern void sdbus_cmd52w_ce(struct intf_priv *pintfpriv, u32 addr,u8 val8);
uint sdbus_read_blocks_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
extern uint sdbus_read_bytes_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
extern uint sdbus_write_blocks_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async);
extern uint sdbus_write_bytes_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
extern u8 sdbus_func1cmd52r_ce(struct intf_priv *pintfpriv, u32 addr);
extern void sdbus_func1cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8);
extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata);
extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata);
extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata);
#endif
#endif

26
include/sdio_ops_linux.h
View file

@ -1,26 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __SDIO_OPS_LINUX_H__
#define __SDIO_OPS_LINUX_H__
void rtw_sdio_set_irq_thd(struct dvobj_priv *dvobj, _thread_hdl_ thd_hdl);
#endif

55
include/sdio_ops_xp.h
View file

@ -1,55 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _SDIO_OPS_XP_H_
#define _SDIO_OPS_XP_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
#ifdef PLATFORM_OS_XP
extern u8 sdbus_cmd52r_xp(struct intf_priv *pintfpriv, u32 addr);
extern void sdbus_cmd52w_xp(struct intf_priv *pintfpriv, u32 addr,u8 val8);
uint sdbus_read_blocks_to_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
extern uint sdbus_read_bytes_to_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
extern uint sdbus_write_blocks_from_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async);
extern uint sdbus_write_bytes_from_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
extern u8 sdbus_func1cmd52r_xp(struct intf_priv *pintfpriv, u32 addr);
extern void sdbus_func1cmd52w_xp(struct intf_priv *pintfpriv, u32 addr, u8 val8);
extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata);
extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata);
extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata);
#endif
#endif

40
include/sdio_osintf.h
View file

@ -1,40 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __SDIO_OSINTF_H__
#define __SDIO_OSINTF_H__
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
u8 sd_hal_bus_init(PADAPTER padapter);
u8 sd_hal_bus_deinit(PADAPTER padapter);
void sd_c2h_hdl(PADAPTER padapter);
#ifdef PLATFORM_OS_CE
extern NDIS_STATUS ce_sd_get_dev_hdl(PADAPTER padapter);
SD_API_STATUS ce_sd_int_callback(SD_DEVICE_HANDLE hDevice, PADAPTER padapter);
extern void sd_setup_irs(PADAPTER padapter);
#endif
#endif

187
os_dep/custom_gpio_linux.c
View file

@ -1,187 +0,0 @@
/******************************************************************************
* Customer code to add GPIO control during WLAN start/stop
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "osdep_service.h"
#include "drv_types.h"
#include "custom_gpio.h"
#ifdef CONFIG_PLATFORM_SPRD
//gspi func & GPIO define
#include <mach/gpio.h>//0915
#include <mach/board.h>
#if !(defined ANDROID_2X)
#ifdef CONFIG_GSPI_HCI
extern unsigned int oob_irq;
#endif //CONFIG_GSPI_HCI
int rtw_wifi_gpio_init(void)
{
#ifdef CONFIG_GSPI_HCI
if (GPIO_WIFI_IRQ > 0) {
gpio_request(GPIO_WIFI_IRQ, "oob_irq");
gpio_direction_input(GPIO_WIFI_IRQ);
oob_irq = gpio_to_irq(GPIO_WIFI_IRQ);
DBG_8192C("%s oob_irq:%d\n", __func__, oob_irq);
}
#endif
if (GPIO_WIFI_RESET > 0)
gpio_request(GPIO_WIFI_RESET , "wifi_rst");
return 0;
}
int rtw_wifi_gpio_deinit(void)
{
#ifdef CONFIG_GSPI_HCI
if (GPIO_WIFI_IRQ > 0) {
gpio_free(GPIO_WIFI_IRQ);
#endif
if (GPIO_WIFI_RESET > 0)
gpio_free(GPIO_WIFI_RESET );
return 0;
}
/* Customer function to control hw specific wlan gpios */
void rtw_wifi_gpio_wlan_ctrl(int onoff)
{
switch (onoff) {
case WLAN_PWDN_OFF:
DBG_8192C("%s: call customer specific GPIO to set wifi power down pin to 0\n",
__FUNCTION__);
if (GPIO_WIFI_RESET > 0)
gpio_direction_output(GPIO_WIFI_RESET , 0);
break;
case WLAN_PWDN_ON:
DBG_8192C("%s: callc customer specific GPIO to set wifi power down pin to 1\n",
__FUNCTION__);
if (GPIO_WIFI_RESET > 0)
gpio_direction_output(GPIO_WIFI_RESET , 1);
break;
case WLAN_POWER_OFF:
DBG_8192C("%s: call customer specific GPIO to turn off wifi power\n",
__FUNCTION__);
break;
case WLAN_POWER_ON:
DBG_8192C("%s: call customer specific GPIO to turn on wifi power\n",
__FUNCTION__);
break;
}
}
#else //ANDROID_2X
//gspi func & GPIO define
#include <mach/gpio.h>//0915
#include <mach/board.h>
#ifdef CONFIG_RTL8188E
extern int sprd_3rdparty_gpio_wifi_power;
#endif
extern int sprd_3rdparty_gpio_wifi_pwd;
#ifdef CONFIG_RTL8723A
extern int sprd_3rdparty_gpio_bt_reset;
#endif
int rtw_wifi_gpio_init(void)
{
#ifdef CONFIG_RTL8723A
if (sprd_3rdparty_gpio_bt_reset > 0)
gpio_direction_output(sprd_3rdparty_gpio_bt_reset, 1);
#endif
return 0;
}
int rtw_wifi_gpio_deinit(void)
{
return 0;
}
/* Customer function to control hw specific wlan gpios */
void rtw_wifi_gpio_wlan_ctrl(int onoff)
{
switch (onoff) {
case WLAN_PWDN_OFF:
DBG_8192C("%s: call customer specific GPIO to set wifi power down pin to 0\n",
__FUNCTION__);
if (sprd_3rdparty_gpio_wifi_pwd > 0)
gpio_set_value(sprd_3rdparty_gpio_wifi_pwd, 0);
break;
case WLAN_PWDN_ON:
DBG_8192C("%s: callc customer specific GPIO to set wifi power down pin to 1\n",
__FUNCTION__);
if (sprd_3rdparty_gpio_wifi_pwd > 0)
gpio_set_value(sprd_3rdparty_gpio_wifi_pwd, 1);
break;
case WLAN_POWER_OFF:
DBG_8192C("%s: call customer specific GPIO to turn off wifi power\n",
__FUNCTION__);
#ifdef CONFIG_RTL8188E
if (sprd_3rdparty_gpio_wifi_power > 0)
gpio_set_value(sprd_3rdparty_gpio_wifi_power, 0);
#endif
break;
case WLAN_POWER_ON:
DBG_8192C("%s: call customer specific GPIO to turn on wifi power\n",
__FUNCTION__);
#ifdef CONFIG_RTL8188E
if (sprd_3rdparty_gpio_wifi_power > 0)
gpio_set_value(sprd_3rdparty_gpio_wifi_power, 1);
#endif
case WLAN_BT_PWDN_OFF:
DBG_8192C("%s: call customer specific GPIO to set bt power down pin to 0\n",
__FUNCTION__);
#ifdef CONFIG_RTL8723A
if (sprd_3rdparty_gpio_bt_reset > 0)
gpio_set_value(sprd_3rdparty_gpio_bt_reset, 0);
#endif
break;
case WLAN_BT_PWDN_ON:
DBG_8192C("%s: callc customer specific GPIO to set bt power down pin to 1\n",
__FUNCTION__);
#ifdef CONFIG_RTL8723A
if (sprd_3rdparty_gpio_bt_reset > 0)
gpio_set_value(sprd_3rdparty_gpio_bt_reset, 1);
#endif
break;
break;
}
}
#endif //ANDROID_2X
#else //CONFIG_PLATFORM_SPRD
int rtw_wifi_gpio_init(void)
{
return 0;
}
void rtw_wifi_gpio_wlan_ctrl(int onoff)
{
}
#endif //CONFIG_PLATFORM_SPRD

950
os_dep/gspi_intf.c
View file

@ -1,950 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _HCI_INTF_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <xmit_osdep.h>
#include <rtw_version.h>
#ifndef CONFIG_GSPI_HCI
#error "CONFIG_GSPI_HCI should be on!\n"
#endif
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/gpio.h>
//#include <mach/ldo.h>
#include <asm/mach-types.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <mach/board.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#ifdef CONFIG_RTL8723A
#include <rtl8723a_hal.h>
#include <HalPwrSeqCmd.h>
#include <Hal8723PwrSeq.h>
#endif
#ifdef CONFIG_RTL8188E
#include <rtl8188e_hal.h>
#endif
#include <hal_intf.h>
#include <gspi_hal.h>
#include <gspi_ops.h>
#include <custom_gpio.h>
extern char* ifname;
typedef struct _driver_priv {
int drv_registered;
_mutex hw_init_mutex;
#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_DUALMAC_CONCURRENT)
//global variable
_mutex h2c_fwcmd_mutex;
_mutex setch_mutex;
_mutex setbw_mutex;
#endif
} drv_priv, *pdrv_priv;
unsigned int oob_irq;
static drv_priv drvpriv = {
};
static void decide_chip_type_by_device_id(PADAPTER padapter)
{
padapter->chip_type = NULL_CHIP_TYPE;
#if defined(CONFIG_RTL8723A)
padapter->chip_type = RTL8723A;
padapter->HardwareType = HARDWARE_TYPE_RTL8723AS;
#elif defined(CONFIG_RTL8188E)
padapter->chip_type = RTL8188E;
padapter->HardwareType = HARDWARE_TYPE_RTL8188ES;
#endif
}
static irqreturn_t spi_interrupt_thread(int irq, void *data)
{
struct dvobj_priv *dvobj;
PGSPI_DATA pgspi_data;
dvobj = (struct dvobj_priv*)data;
pgspi_data = &dvobj->intf_data;
//spi_int_hdl(padapter);
if (pgspi_data->priv_wq)
queue_delayed_work(pgspi_data->priv_wq, &pgspi_data->irq_work, 0);
return IRQ_HANDLED;
}
static u8 gspi_alloc_irq(struct dvobj_priv *dvobj)
{
PGSPI_DATA pgspi_data;
struct spi_device *spi;
int err;
pgspi_data = &dvobj->intf_data;
spi = pgspi_data->func;
err = request_irq(oob_irq, spi_interrupt_thread,
IRQF_TRIGGER_FALLING,//IRQF_TRIGGER_HIGH;//|IRQF_ONESHOT,
DRV_NAME, dvobj);
//err = request_threaded_irq(oob_irq, NULL, spi_interrupt_thread,
// IRQF_TRIGGER_FALLING,
// DRV_NAME, dvobj);
if (err < 0) {
DBG_871X("Oops: can't allocate irq %d err:%d\n", oob_irq, err);
goto exit;
}
enable_irq_wake(oob_irq);
disable_irq(oob_irq);
exit:
return err?_FAIL:_SUCCESS;
}
static u8 gspi_init(struct dvobj_priv *dvobj)
{
PGSPI_DATA pgspi_data;
int err = 0;
_func_enter_;
RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("+gspi_init\n"));
if (NULL == dvobj) {
DBG_8192C(KERN_ERR "%s: driver object is NULL!\n", __func__);
err = -1;
goto exit;
}
pgspi_data = &dvobj->intf_data;
pgspi_data->block_transfer_len = 512;
pgspi_data->tx_block_mode = 0;
pgspi_data->rx_block_mode = 0;
exit:
_func_exit_;
if (err) return _FAIL;
return _SUCCESS;
}
static void gspi_deinit(struct dvobj_priv *dvobj)
{
PGSPI_DATA pgspi_data;
struct spi_device *spi;
int err;
RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("+gspi_deinit\n"));
if (NULL == dvobj) {
DBG_8192C(KERN_ERR "%s: driver object is NULL!\n", __FUNCTION__);
return;
}
pgspi_data = &dvobj->intf_data;
spi = pgspi_data->func;
if (spi) {
free_irq(oob_irq, dvobj);
}
}
static struct dvobj_priv *gspi_dvobj_init(struct spi_device *spi)
{
int status = _FAIL;
struct dvobj_priv *dvobj = NULL;
PGSPI_DATA pgspi;
_func_enter_;
dvobj = (struct dvobj_priv*)rtw_zmalloc(sizeof(*dvobj));
if (NULL == dvobj) {
goto exit;
}
//spi init
/* This is the only SPI value that we need to set here, the rest
* comes from the board-peripherals file */
spi->bits_per_word = 32;
spi->max_speed_hz = 48 * 1000 * 1000;
//here mode 0 and 3 all ok,
//3 can run under 48M clock when SPI_CTL4 bit14 IS_FST set to 1
//0 can run under 24M clock, but can run under 48M when SPI_CTL4 bit14 IS_FST set to 1 and Ctl0_reg[1:0] set to 3.
spi->mode = SPI_MODE_3;
spi_setup(spi);
#if 1
//DBG_8192C("set spi ==========================%d\n", spi_setup(spi));
DBG_871X("%s, mode = %d\n", __func__, spi->mode);
DBG_871X("%s, bit_per_word = %d\n", __func__, spi->bits_per_word);
DBG_871X("%s, speed = %d\n", __func__, spi->max_speed_hz);
DBG_871X("%s, chip_select = %d\n", __func__, spi->chip_select);
DBG_871X("%s, controller_data = %d\n", __func__, *(int *)spi->controller_data);
DBG_871X("%s, irq= %d\n", __func__, oob_irq);
#endif
spi_set_drvdata(spi, dvobj);
pgspi = &dvobj->intf_data;
pgspi->func = spi;
if (gspi_init(dvobj) != _SUCCESS) {
DBG_871X("%s: initialize GSPI Failed!\n", __FUNCTION__);
goto free_dvobj;
}
status = _SUCCESS;
free_dvobj:
if (status != _SUCCESS && dvobj) {
spi_set_drvdata(spi, NULL);
rtw_mfree((u8*)dvobj, sizeof(*dvobj));
dvobj = NULL;
}
exit:
_func_exit_;
return dvobj;
}
static void gspi_dvobj_deinit(struct spi_device *spi)
{
struct dvobj_priv *dvobj = spi_get_drvdata(spi);
_func_enter_;
spi_set_drvdata(spi, NULL);
if (dvobj) {
gspi_deinit(dvobj);
rtw_mfree((u8*)dvobj, sizeof(*dvobj));
}
_func_exit_;
}
static void spi_irq_work(void *data)
{
struct delayed_work *dwork;
PGSPI_DATA pgspi;
struct dvobj_priv *dvobj;
dwork = container_of(data, struct delayed_work, work);
pgspi = container_of(dwork, GSPI_DATA, irq_work);
dvobj = spi_get_drvdata(pgspi->func);
if (!dvobj->if1) {
DBG_871X("%s if1 == NULL !!\n", __FUNCTION__);
return;
}
spi_int_hdl(dvobj->if1);
}
static void gspi_intf_start(PADAPTER padapter)
{
PGSPI_DATA pgspi;
if (padapter == NULL) {
DBG_871X(KERN_ERR "%s: padapter is NULL!\n", __FUNCTION__);
return;
}
pgspi = &adapter_to_dvobj(padapter)->intf_data;
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
pgspi->priv_wq = alloc_workqueue("spi_wq", 0, 0);
#else
pgspi->priv_wq = create_workqueue("spi_wq");
#endif
INIT_DELAYED_WORK(&pgspi->irq_work, (void*)spi_irq_work);
enable_irq(oob_irq);
//hal dep
rtw_hal_enable_interrupt(padapter);
}
static void gspi_intf_stop(PADAPTER padapter)
{
PGSPI_DATA pgspi;
if (padapter == NULL) {
DBG_871X(KERN_ERR "%s: padapter is NULL!\n", __FUNCTION__);
return;
}
pgspi = &adapter_to_dvobj(padapter)->intf_data;
if (pgspi->priv_wq) {
cancel_delayed_work_sync(&pgspi->irq_work);
flush_workqueue(pgspi->priv_wq);
destroy_workqueue(pgspi->priv_wq);
pgspi->priv_wq = NULL;
}
//hal dep
rtw_hal_disable_interrupt(padapter);
disable_irq(oob_irq);
}
/*
* Do deinit job corresponding to netdev_open()
*/
static void rtw_dev_unload(PADAPTER padapter)
{
struct net_device *pnetdev = (struct net_device*)padapter->pnetdev;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("+rtw_dev_unload\n"));
padapter->bDriverStopped = _TRUE;
#ifdef CONFIG_XMIT_ACK
if (padapter->xmitpriv.ack_tx)
rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_DRV_STOP);
#endif
if (padapter->bup == _TRUE)
{
#if 0
if (padapter->intf_stop)
padapter->intf_stop(padapter);
#else
gspi_intf_stop(padapter);
#endif
RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("@ rtw_dev_unload: stop intf complete!\n"));
if (!padapter->pwrctrlpriv.bInternalAutoSuspend)
rtw_stop_drv_threads(padapter);
RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("@ rtw_dev_unload: stop thread complete!\n"));
if (padapter->bSurpriseRemoved == _FALSE)
{
#ifdef CONFIG_WOWLAN
if (padapter->pwrctrlpriv.bSupportRemoteWakeup == _TRUE) {
DBG_871X("%s bSupportRemoteWakeup==_TRUE do not run rtw_hal_deinit()\n",__FUNCTION__);
}
else
#endif
{
rtw_hal_deinit(padapter);
}
padapter->bSurpriseRemoved = _TRUE;
}
RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("@ rtw_dev_unload: deinit hal complelt!\n"));
padapter->bup = _FALSE;
}
else {
RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("rtw_dev_unload: bup==_FALSE\n"));
}
RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("-rtw_dev_unload\n"));
}
static PADAPTER rtw_gspi_if1_init(struct dvobj_priv *dvobj)
{
int status = _FAIL;
struct net_device *pnetdev;
PADAPTER padapter = NULL;
padapter = (PADAPTER)rtw_zvmalloc(sizeof(*padapter));
if (NULL == padapter) {
goto exit;
}
padapter->dvobj = dvobj;
dvobj->if1 = padapter;
padapter->bDriverStopped = _TRUE;
#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_DUALMAC_CONCURRENT)
//set adapter_type/iface type for primary padapter
padapter->isprimary = _TRUE;
padapter->adapter_type = PRIMARY_ADAPTER;
#ifndef CONFIG_HWPORT_SWAP
padapter->iface_type = IFACE_PORT0;
#else
padapter->iface_type = IFACE_PORT1;
#endif
#endif
padapter->hw_init_mutex = &drvpriv.hw_init_mutex;
#ifdef CONFIG_CONCURRENT_MODE
//set global variable to primary adapter
padapter->ph2c_fwcmd_mutex = &drvpriv.h2c_fwcmd_mutex;
padapter->psetch_mutex = &drvpriv.setch_mutex;
padapter->psetbw_mutex = &drvpriv.setbw_mutex;
#endif
padapter->interface_type = RTW_GSPI;
decide_chip_type_by_device_id(padapter);
//3 1. init network device data
pnetdev = rtw_init_netdev(padapter);
if (!pnetdev)
goto free_adapter;
SET_NETDEV_DEV(pnetdev, dvobj_to_dev(dvobj));
#ifdef CONFIG_IOCTL_CFG80211
rtw_wdev_alloc(padapter, dvobj_to_dev(dvobj));
#endif
//3 3. init driver special setting, interface, OS and hardware relative
//4 3.1 set hardware operation functions
hal_set_hal_ops(padapter);
//3 5. initialize Chip version
padapter->intf_start = &gspi_intf_start;
padapter->intf_stop = &gspi_intf_stop;
if (rtw_init_io_priv(padapter, spi_set_intf_ops) == _FAIL)
{
RT_TRACE(_module_hci_intfs_c_, _drv_err_,
("rtw_drv_init: Can't init io_priv\n"));
goto free_hal_data;
}
{
u32 ret = 0;
DBG_8192C("read start:\n");
//spi_write8_endian(padapter, SPI_LOCAL_OFFSET | 0xF0, 0x01, 1);
rtw_write8(padapter, SPI_LOCAL_OFFSET | 0xF0, 0x03);
ret = rtw_read32(padapter, SPI_LOCAL_OFFSET | 0xF0);
DBG_8192C("read end 0xF0 read32:%x:\n", ret);
DBG_8192C("read end 0xF0 read8:%x:\n", rtw_read8(padapter, SPI_LOCAL_OFFSET | 0xF0));
}
rtw_hal_read_chip_version(padapter);
rtw_hal_chip_configure(padapter);
//3 6. read efuse/eeprom data
rtw_hal_read_chip_info(padapter);
//3 7. init driver common data
if (rtw_init_drv_sw(padapter) == _FAIL) {
RT_TRACE(_module_hci_intfs_c_, _drv_err_,
("rtw_drv_init: Initialize driver software resource Failed!\n"));
goto free_hal_data;
}
//3 8. get WLan MAC address
// alloc dev name after read efuse.
rtw_init_netdev_name(pnetdev, padapter->registrypriv.ifname);
rtw_macaddr_cfg(padapter->eeprompriv.mac_addr);
rtw_init_wifidirect_addrs(padapter, padapter->eeprompriv.mac_addr, padapter->eeprompriv.mac_addr);
_rtw_memcpy(pnetdev->dev_addr, padapter->eeprompriv.mac_addr, ETH_ALEN);
rtw_hal_disable_interrupt(padapter);
//3 9. Tell the network stack we exist
if (register_netdev(pnetdev) != 0) {
RT_TRACE(_module_hci_intfs_c_, _drv_err_,
("rtw_drv_init: register_netdev() failed\n"));
goto free_hal_data;
}
DBG_871X("bDriverStopped:%d, bSurpriseRemoved:%d, bup:%d, hw_init_completed:%d\n"
,padapter->bDriverStopped
,padapter->bSurpriseRemoved
,padapter->bup
,padapter->hw_init_completed
);
#ifdef CONFIG_HOSTAPD_MLME
hostapd_mode_init(padapter);
#endif
status = _SUCCESS;
free_hal_data:
if (status != _SUCCESS && padapter->HalData)
rtw_mfree(padapter->HalData, sizeof(*(padapter->HalData)));
free_wdev:
if (status != _SUCCESS) {
#ifdef CONFIG_IOCTL_CFG80211
rtw_wdev_unregister(padapter->rtw_wdev);
rtw_wdev_free(padapter->rtw_wdev);
#endif
}
free_adapter:
if (status != _SUCCESS) {
if (pnetdev)
rtw_free_netdev(pnetdev);
else if (padapter)
rtw_vmfree((u8*)padapter, sizeof(*padapter));
padapter = NULL;
}
exit:
return padapter;
}
static void rtw_gspi_if1_deinit(PADAPTER if1)
{
struct net_device *pnetdev = if1->pnetdev;
struct mlme_priv *pmlmepriv = &if1->mlmepriv;
if (check_fwstate(pmlmepriv, _FW_LINKED))
rtw_disassoc_cmd(if1, 0, _FALSE);
#ifdef CONFIG_AP_MODE
free_mlme_ap_info(if1);
#ifdef CONFIG_HOSTAPD_MLME
hostapd_mode_unload(if1);
#endif
#endif
if (if1->DriverState != DRIVER_DISAPPEAR) {
if (pnetdev) {
unregister_netdev(pnetdev); //will call netdev_close()
rtw_proc_remove_one(pnetdev);
}
}
rtw_cancel_all_timer(if1);
rtw_dev_unload(if1);
DBG_871X("+r871xu_dev_remove, hw_init_completed=%d\n", if1->hw_init_completed);
rtw_handle_dualmac(if1, 0);
#ifdef CONFIG_IOCTL_CFG80211
rtw_wdev_unregister(if1->rtw_wdev);
rtw_wdev_free(if1->rtw_wdev);
#endif
rtw_free_drv_sw(if1);
if (pnetdev)
rtw_free_netdev(pnetdev);
}
/*
* drv_init() - a device potentially for us
*
* notes: drv_init() is called when the bus driver has located a card for us to support.
* We accept the new device by returning 0.
*/
static int /*__devinit*/ rtw_drv_probe(struct spi_device *spi)
{
int status = _FAIL;
struct dvobj_priv *dvobj;
struct net_device *pnetdev;
PADAPTER if1 = NULL, if2 = NULL;
DBG_8192C("RTW: %s line:%d", __FUNCTION__, __LINE__);
if ((dvobj = gspi_dvobj_init(spi)) == NULL) {
DBG_871X("%s: Initialize device object priv Failed!\n", __FUNCTION__);
goto exit;
}
if ((if1 = rtw_gspi_if1_init(dvobj)) == NULL) {
DBG_871X("rtw_init_primary_adapter Failed!\n");
goto free_dvobj;
}
#ifdef CONFIG_CONCURRENT_MODE
if ((if2 = rtw_drv_if2_init(if1, NULL, spi_set_intf_ops)) == NULL) {
goto free_if1;
}
#endif
if (gspi_alloc_irq(dvobj) != _SUCCESS)
goto free_if2;
#ifdef CONFIG_GLOBAL_UI_PID
if (ui_pid[1]!=0) {
DBG_871X("ui_pid[1]:%d\n",ui_pid[1]);
rtw_signal_process(ui_pid[1], SIGUSR2);
}
#endif
RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-871x_drv - drv_init, success!\n"));
status = _SUCCESS;
free_if2:
if (status != _SUCCESS && if2) {
#ifdef CONFIG_CONCURRENT_MODE
rtw_drv_if2_stop(if2);
rtw_drv_if2_free(if2);
#endif
}
free_if1:
if (status != _SUCCESS && if1) {
rtw_gspi_if1_deinit(if1);
}
free_dvobj:
if (status != _SUCCESS)
gspi_dvobj_deinit(spi);
exit:
return status == _SUCCESS?0:-ENODEV;
}
static int /*__devexit*/ rtw_dev_remove(struct spi_device *spi)
{
struct dvobj_priv *dvobj = spi_get_drvdata(spi);
PADAPTER padapter = dvobj->if1;
_func_enter_;
RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("+rtw_dev_remove\n"));
#if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER)
rtw_unregister_early_suspend(&padapter->pwrctrlpriv);
#endif
rtw_pm_set_ips(padapter, IPS_NONE);
rtw_pm_set_lps(padapter, PS_MODE_ACTIVE);
LeaveAllPowerSaveMode(padapter);
#ifdef CONFIG_CONCURRENT_MODE
rtw_drv_if2_stop(dvobj->if2);
#endif
rtw_gspi_if1_deinit(padapter);
#ifdef CONFIG_CONCURRENT_MODE
rtw_drv_if2_free(dvobj->if2);
#endif
gspi_dvobj_deinit(spi);
RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("-rtw_dev_remove\n"));
_func_exit_;
return 0;
}
static int rtw_gspi_suspend(struct spi_device *spi, pm_message_t mesg)
{
struct dvobj_priv *dvobj = spi_get_drvdata(spi);
PADAPTER padapter = dvobj->if1;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct net_device *pnetdev = padapter->pnetdev;
int ret = 0;
u32 start_time = rtw_get_current_time();
_func_enter_;
DBG_871X("==> %s (%s:%d)\n",__FUNCTION__, current->comm, current->pid);
pwrpriv->bInSuspend = _TRUE;
while (pwrpriv->bips_processing == _TRUE)
rtw_msleep_os(1);
if ((!padapter->bup) || (padapter->bDriverStopped)||(padapter->bSurpriseRemoved))
{
DBG_871X("%s bup=%d bDriverStopped=%d bSurpriseRemoved = %d\n", __FUNCTION__
,padapter->bup, padapter->bDriverStopped,padapter->bSurpriseRemoved);
goto exit;
}
rtw_cancel_all_timer(padapter);
LeaveAllPowerSaveMode(padapter);
//padapter->net_closed = _TRUE;
//s1.
if (pnetdev)
{
netif_carrier_off(pnetdev);
rtw_netif_stop_queue(pnetdev);
}
#ifdef CONFIG_WOWLAN
padapter->pwrctrlpriv.bSupportRemoteWakeup=_TRUE;
#else
//s2.
rtw_disassoc_cmd(padapter, 0, _FALSE);
#endif
#ifdef CONFIG_LAYER2_ROAMING_RESUME
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED) )
{
DBG_871X("%s %s(" MAC_FMT "), length:%d assoc_ssid.length:%d\n",__FUNCTION__,
pmlmepriv->cur_network.network.Ssid.Ssid,
MAC_ARG(pmlmepriv->cur_network.network.MacAddress),
pmlmepriv->cur_network.network.Ssid.SsidLength,
pmlmepriv->assoc_ssid.SsidLength);
pmlmepriv->to_roaming = 1;
}
#endif
//s2-2. indicate disconnect to os
rtw_indicate_disconnect(padapter);
//s2-3.
rtw_free_assoc_resources(padapter, 1);
//s2-4.
rtw_free_network_queue(padapter, _TRUE);
rtw_led_control(padapter, LED_CTL_POWER_OFF);
rtw_dev_unload(padapter);
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
rtw_indicate_scan_done(padapter, 1);
if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING))
rtw_indicate_disconnect(padapter);
// interface deinit
gspi_deinit(dvobj);
RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("%s: deinit GSPI complete!\n", __FUNCTION__));
rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_OFF);
rtw_mdelay_os(1);
exit:
DBG_871X("<=== %s return %d.............. in %dms\n", __FUNCTION__
, ret, rtw_get_passing_time_ms(start_time));
_func_exit_;
return ret;
}
extern int pm_netdev_open(struct net_device *pnetdev,u8 bnormal);
int rtw_resume_process(_adapter *padapter)
{
struct net_device *pnetdev;
struct pwrctrl_priv *pwrpriv;
u8 is_pwrlock_hold_by_caller;
u8 is_directly_called_by_auto_resume;
int ret = 0;
u32 start_time = rtw_get_current_time();
_func_enter_;
DBG_871X("==> %s (%s:%d)\n",__FUNCTION__, current->comm, current->pid);
rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_ON);
rtw_mdelay_os(1);
{
u32 ret = 0;
DBG_8192C("read start:\n");
//spi_write8_endian(padapter, SPI_LOCAL_OFFSET | 0xF0, 0x01, 1);
rtw_write8(padapter, SPI_LOCAL_OFFSET | 0xF0, 0x03);
ret = rtw_read32(padapter, SPI_LOCAL_OFFSET | 0xF0);
DBG_8192C("read end 0xF0 read32:%x:\n", ret);
DBG_8192C("read end 0xF0 read8:%x:\n", rtw_read8(padapter, SPI_LOCAL_OFFSET | 0xF0));
}
if (padapter) {
pnetdev = padapter->pnetdev;
pwrpriv = &padapter->pwrctrlpriv;
} else {
ret = -1;
goto exit;
}
// interface init
if (gspi_init(adapter_to_dvobj(padapter)) != _SUCCESS)
{
ret = -1;
RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("%s: initialize SDIO Failed!!\n", __FUNCTION__));
goto exit;
}
rtw_hal_disable_interrupt(padapter);
if (gspi_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS)
{
ret = -1;
RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("%s: gspi_alloc_irq Failed!!\n", __FUNCTION__));
goto exit;
}
rtw_reset_drv_sw(padapter);
pwrpriv->bkeepfwalive = _FALSE;
DBG_871X("bkeepfwalive(%x)\n",pwrpriv->bkeepfwalive);
if (pm_netdev_open(pnetdev,_TRUE) != 0) {
ret = -1;
goto exit;
}
netif_device_attach(pnetdev);
netif_carrier_on(pnetdev);
if ( padapter->pid[1]!=0) {
DBG_871X("pid[1]:%d\n",padapter->pid[1]);
rtw_signal_process(padapter->pid[1], SIGUSR2);
}
#ifdef CONFIG_LAYER2_ROAMING_RESUME
rtw_roaming(padapter, NULL);
#endif
#ifdef CONFIG_RESUME_IN_WORKQUEUE
rtw_unlock_suspend();
#endif //CONFIG_RESUME_IN_WORKQUEUE
exit:
pwrpriv->bInSuspend = _FALSE;
DBG_871X("<=== %s return %d.............. in %dms\n", __FUNCTION__
, ret, rtw_get_passing_time_ms(start_time));
_func_exit_;
return ret;
}
static int rtw_gspi_resume(struct spi_device *spi)
{
struct dvobj_priv *dvobj = spi_get_drvdata(spi);
PADAPTER padapter = dvobj->if1;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
int ret = 0;
DBG_871X("==> %s (%s:%d)\n",__FUNCTION__, current->comm, current->pid);
if (pwrpriv->bInternalAutoSuspend ){
ret = rtw_resume_process(padapter);
} else {
#ifdef CONFIG_RESUME_IN_WORKQUEUE
rtw_resume_in_workqueue(pwrpriv);
#elif defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER)
if (rtw_is_earlysuspend_registered(pwrpriv)) {
//jeff: bypass resume here, do in late_resume
pwrpriv->do_late_resume = _TRUE;
} else {
ret = rtw_resume_process(padapter);
}
#else // Normal resume process
ret = rtw_resume_process(padapter);
#endif //CONFIG_RESUME_IN_WORKQUEUE
}
DBG_871X("<======== %s return %d\n", __FUNCTION__, ret);
return ret;
}
static struct spi_driver rtw_spi_drv = {
.probe = rtw_drv_probe,
.remove = rtw_dev_remove,
.suspend = rtw_gspi_suspend,
.resume = rtw_gspi_resume,
.driver = {
.name = "wlan_spi",
.bus = &spi_bus_type,
.owner = THIS_MODULE,
}
};
static int __init rtw_drv_entry(void)
{
int ret;
RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("+rtw_drv_entry\n"));
DBG_8192C("RTW: rtw_drv_entry enter\n");
rtw_suspend_lock_init();
_rtw_mutex_init(&drvpriv.hw_init_mutex);
#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_DUALMAC_CONCURRENT)
//init global variable
_rtw_mutex_init(&drvpriv.h2c_fwcmd_mutex);
_rtw_mutex_init(&drvpriv.setch_mutex);
_rtw_mutex_init(&drvpriv.setbw_mutex);
#endif
drvpriv.drv_registered = _TRUE;
rtw_wifi_gpio_init();
rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_ON);
ret = spi_register_driver(&rtw_spi_drv);
DBG_8192C("RTW: rtw_drv_entry exit %d\n", ret);
return 0;
}
static void __exit rtw_drv_halt(void)
{
RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("+rtw_drv_halt\n"));
DBG_8192C("RTW: rtw_drv_halt enter\n");
rtw_suspend_lock_uninit();
drvpriv.drv_registered = _FALSE;
spi_unregister_driver(&rtw_spi_drv);
_rtw_mutex_free(&drvpriv.hw_init_mutex);
#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_DUALMAC_CONCURRENT)
_rtw_mutex_free(&drvpriv.h2c_fwcmd_mutex);
_rtw_mutex_free(&drvpriv.setch_mutex);
_rtw_mutex_free(&drvpriv.setbw_mutex);
#endif
rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_OFF);
rtw_wifi_gpio_deinit();
DBG_8192C("RTW: rtw_drv_halt enter\n");
RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("-rtw_drv_halt\n"));
}
module_init(rtw_drv_entry);
module_exit(rtw_drv_halt);

432
os_dep/gspi_ops_linux.c
View file

@ -1,432 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*******************************************************************************/
#define _GSPI_OPS_LINUX_C_
#include <drv_types.h>
#include <linux/spi/spi.h>
#include "rtl8723a_hal.h"
#include "rtl8723a_spec.h"
#include "gspi_ops.h"
int spi_send_msg(PADAPTER Adapter, struct spi_transfer xfers[], u32 IoAction)
{
struct dvobj_priv *psddev;
struct spi_device *spi;
struct spi_message msg;
int ret = 1;
if (Adapter == NULL) {
DBG_8192C(KERN_ERR "%s: padapter is NULL!\n", __func__);
return 1;
}
psddev = adapter_to_dvobj(Adapter);
spi = psddev->intf_data.func;
spi_message_init(&msg);
spi_message_add_tail(&xfers[0], &msg);
spi_message_add_tail(&xfers[1], &msg);
spi_message_add_tail(&xfers[2], &msg);
ret = spi_sync(spi, &msg);
if (ret) {
DBG_8192C("%s: FAIL!\n", __func__);
}
return ret;
}
int addr_convert(u32 addr)
{
u32 domain_id = 0 ;
u32 temp_addr = addr&0xffff0000;
if (temp_addr == 0 ) {
domain_id = WLAN_IOREG_DOMAIN;
return domain_id;
}
switch (temp_addr) {
case SPI_LOCAL_OFFSET:
domain_id = SPI_LOCAL_DOMAIN;
break;
case WLAN_IOREG_OFFSET:
domain_id = WLAN_IOREG_DOMAIN;
break;
case FW_FIFO_OFFSET:
domain_id = FW_FIFO_DOMAIN;
break;
case TX_HIQ_OFFSET:
domain_id = TX_HIQ_DOMAIN;
break;
case TX_MIQ_OFFSET:
domain_id = TX_MIQ_DOMAIN;
break;
case TX_LOQ_OFFSET:
domain_id = TX_LOQ_DOMAIN;
break;
case RX_RXOFF_OFFSET:
domain_id = RX_RXFIFO_DOMAIN;
break;
default:
break;
}
//sys_mib.Spi_Transation_record.domain_id =domain_id;
return domain_id;
}
static u32 buf_endian_reverse(u32 src)
{
return (((src&0x000000ff)<<24)|((src&0x0000ff00)<<8)|
((src&0x00ff0000)>>8)|((src&0xff000000)>>24));
}
void spi_get_status_info(ADAPTER* Adapter, unsigned char *status)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
pHalData->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX] = GET_STATUS_PUB_PAGE_NUM(status);
pHalData->SdioTxFIFOFreePage[HI_QUEUE_IDX] = GET_STATUS_HI_PAGE_NUM(status);
pHalData->SdioTxFIFOFreePage[MID_QUEUE_IDX] = GET_STATUS_MID_PAGE_NUM(status);
pHalData->SdioTxFIFOFreePage[LOW_QUEUE_IDX] = GET_STATUS_LOW_PAGE_NUM(status);
//DBG_8192C("%s: Free page for HIQ(%#x),MIDQ(%#x),LOWQ(%#x),PUBQ(%#x)\n",
// __FUNCTION__,
// pHalData->SdioTxFIFOFreePage[HI_QUEUE_IDX],
// pHalData->SdioTxFIFOFreePage[MID_QUEUE_IDX],
// pHalData->SdioTxFIFOFreePage[LOW_QUEUE_IDX],
// pHalData->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX]);
}
int spi_read_write_reg(PADAPTER pAdapter, int write_flag, u32 addr, char * buf, int len, u32 eddien)
{
int fun = 1, domain_id = 0x0; //LOCAL
unsigned int cmd = 0 ;
int byte_en = 0 ;//,i = 0 ;
int ret = 0;
unsigned char status[8] = {0};
unsigned int data_tmp = 0;
//u32 force_bigendian = !eddien;
u32 force_bigendian = eddien;
if (len!=1 && len!=2 && len != 4) {
return -1;
}
domain_id = addr_convert(addr);
addr &= 0x7fff;
len &= 0xff;
if (write_flag) //write register
{
int remainder = addr % 4;
u32 val32 = *(u32 *)buf;
switch (len) {
case 1:
byte_en = (0x1 << remainder);
data_tmp = (val32& 0xff)<< (remainder*8);
break;
case 2:
byte_en = (0x3 << remainder);
data_tmp = (val32 & 0xffff)<< (remainder*8);
break;
case 4:
byte_en = 0xf;
data_tmp = val32 & 0xffffffff;
break;
default:
byte_en = 0xf;
data_tmp = val32 & 0xffffffff;
break;
}
}
else //read register
{
switch (len) {
case 1:
byte_en = 0x1;
break;
case 2:
byte_en = 0x3;
break;
case 4:
byte_en = 0xf;
break;
default:
byte_en = 0xf;
break;
}
}
//addr = 0xF0 4byte: 0x2800f00f
REG_LEN_FORMAT(&cmd, byte_en);
REG_ADDR_FORMAT(&cmd, (addr&0xfffffffc));
REG_DOMAIN_ID_FORMAT(&cmd, domain_id);
REG_FUN_FORMAT(&cmd, fun);
REG_RW_FORMAT(&cmd, write_flag);
//DBG_8192C("spi_read_write_reg cmd1: %x, data_tmp is %x\n",cmd, data_tmp);
if (force_bigendian) {
cmd = buf_endian_reverse(cmd);
}
//io is one by one, so we do not need fwps_lock here
//rtw_spin_lock(&padapter->halpriv.fwps_lock);
//padapter->io_fifo_processing = _TRUE;
if (!write_flag && (domain_id!= RX_RXFIFO_DOMAIN)) {
u32 read_data = 0;
struct spi_transfer xfers[3];
_rtw_memset(xfers, 0x00, 3*sizeof(struct spi_transfer));
_rtw_memset(buf, 0x0, len);
xfers[0].tx_buf = &cmd;
xfers[0].len = 4;
xfers[1].rx_buf = status;
xfers[1].len = 8;
xfers[2].rx_buf = &read_data;
xfers[2].len = 4;
//DBG_8192C("spi_read_write_reg: read_data is %x\n", read_data);
ret = spi_send_msg(pAdapter, xfers, 0);
if (ret) {
DBG_8192C(KERN_ERR "%s: FAIL!(%d) addr=0x%05x\n", __func__, ret, addr);
read_data = 0;
_rtw_memset(status, 0, 8);
}
//DBG_8192C("spi_read_write_reg: read_data is %x\n", read_data);
read_data = EF4Byte(read_data);
//add for 8810
#ifdef CONFIG_BIG_ENDIAN
if (!force_bigendian)
read_data = buf_endian_reverse(read_data);
#else
if (force_bigendian)
read_data = buf_endian_reverse(read_data);
#endif
*(u32*)buf = read_data;
//DBG_8192C("spi_read_write_reg: read: buf is %x %x %x %x\n", buf[0], buf[1], buf[2], buf[3]);
} else if (write_flag ) {
struct spi_transfer xfers[3];
_rtw_memset(xfers, 0x00, 3*sizeof(struct spi_transfer));
xfers[0].tx_buf = &cmd;
xfers[0].len = 4;
xfers[1].tx_buf = &data_tmp;
xfers[1].len = 4;
xfers[2].rx_buf = status;
xfers[2].len = 8;
//DBG_8192C("spi_read_write_reg data_tmp 111: %x\n",data_tmp);
#ifdef CONFIG_BIG_ENDIAN
if (!force_bigendian)
data_tmp = buf_endian_reverse(data_tmp);
#else
if (force_bigendian)
data_tmp = buf_endian_reverse(data_tmp);
#endif
ret = spi_send_msg(pAdapter, xfers, 0);
if (ret) {
DBG_8192C(KERN_ERR "%s: FAIL!(%d) addr=0x%05x\n", __func__, ret, addr);
_rtw_memset(status, 0, 8);
}
}
//padapter->io_fifo_processing = _FALSE;
spi_get_status_info(pAdapter, (unsigned char*)status);
return ret;
}
u8 spi_read8(ADAPTER *Adapter, unsigned int addr, s32 *err)
{
unsigned int ret = 0;
int val32 = 0 , remainder = 0 ;
s32 _err = 0;
_err = spi_read_write_reg(Adapter,0,addr&0xFFFFFFFC,(char *)&ret,4,0);
remainder = addr % 4;
val32 = ret;
val32 = (val32& (0xff<< (remainder<<3)))>>(remainder<<3);
if (err)
*err = _err;
return (u8)val32;
}
u16 spi_read16(ADAPTER *Adapter, u32 addr, s32 *err)
{
unsigned int ret = 0;
int val32 = 0 , remainder = 0 ;
s32 _err = 0;
_err = spi_read_write_reg(Adapter,0,addr&0xFFFFFFFC,(char *)&ret,4,0);
remainder = addr % 4;
val32 = ret;
val32 = (val32& (0xffff<< (remainder<<3)))>>(remainder<<3);
if (err)
*err = _err;
return (u16)val32;
}
u32 spi_read32(ADAPTER *Adapter, u32 addr, s32 *err)
{
unsigned int ret = 0;
s32 _err = 0;
_err = spi_read_write_reg(Adapter,0,addr&0xFFFFFFFC,(char *)&ret,4,0);
if (err)
*err = _err;
return ret;
}
void spi_write8(ADAPTER *Adapter, u32 addr, u8 buf, s32 *err)
{
int ret = 0;
ret = spi_read_write_reg(Adapter,1,addr,(char *)&buf,1,0);
if (err)
*err = ret;
}
void spi_write16(ADAPTER *Adapter, u32 addr, u16 buf, s32 *err)
{
int ret = 0;
ret = spi_read_write_reg(Adapter,1,addr,(char *)&buf,2,0);
if (err)
*err = ret;
}
void spi_write32(ADAPTER *Adapter, u32 addr, u32 buf, s32 *err)
{
int ret = 0;
ret = spi_read_write_reg(Adapter, 1,addr,(char *)&buf,4,0);
if (err)
*err = ret;
}
unsigned int spi_write8_endian(ADAPTER *Adapter, unsigned int addr, unsigned int buf, u32 big)
{
int ret = 0;
ret = spi_read_write_reg(Adapter,1,addr,(char *)&buf,1, big);
return ret;
}
void spi_write_tx_fifo(ADAPTER *Adapter, u8 *buf, int len, u32 fifo)
{
int fun =1; //TX_HIQ_FIFO
unsigned int cmd = 0;
unsigned char status[8];
u8 more_data = 0;
int ret = 0;
struct spi_transfer xfers[3];
_rtw_memset(xfers, 0x00, 3*sizeof(struct spi_transfer));
xfers[0].tx_buf = &cmd;
xfers[0].len = 4;
xfers[1].tx_buf = buf;
xfers[1].len = len;//len/4;
xfers[2].rx_buf = status;
xfers[2].len = 8;
_func_enter_;
FIFO_LEN_FORMAT(&cmd, len); //TX Agg len
FIFO_DOMAIN_ID_FORMAT(&cmd, fifo);
FIFO_FUN_FORMAT(&cmd, fun);
FIFO_RW_FORMAT(&cmd, (unsigned int)1); //write
_rtw_memset(status, 0x00, 8);
ret = spi_send_msg(Adapter, xfers, 1);
if (ret) {
DBG_8192C("%s: FAIL!(%d)\n", __func__, ret);
_rtw_memset(status, 0, 8);
}
spi_get_status_info(Adapter, status);
more_data = GET_STATUS_HISR_LOW8BIT(status) & BIT(0);
//if (more_data) {
// rtw_queue_delayed_work(Adapter->recv_wq, &Adapter->recv_work, 0, (void*)Adapter);
//}
_func_exit_;
return;
}
int spi_read_rx_fifo(ADAPTER *Adapter, unsigned char *buf, int len, struct spi_more_data *pmore_data)
{
int fun =1, domain_id = 0x1f; //RX_FIFO
unsigned int cmd = 0;
unsigned char status[8];
int ret = 0;
struct spi_transfer xfers[3];
_rtw_memset(xfers, 0x00, 3*sizeof(struct spi_transfer));
xfers[0].tx_buf = &cmd;
xfers[0].len = 4;
xfers[1].rx_buf = buf;
xfers[1].len = len;
xfers[2].rx_buf = status;
xfers[2].len = 8;
FIFO_LEN_FORMAT(&cmd, len); //TX Agg len
FIFO_DOMAIN_ID_FORMAT(&cmd, domain_id);
FIFO_FUN_FORMAT(&cmd, fun);
FIFO_RW_FORMAT(&cmd, 0); //read
_rtw_memset(status, 0x00, 8);
_rtw_memset(buf, 0x0, len);
ret = spi_send_msg(Adapter, xfers, 1);
if (ret) {
DBG_8192C(KERN_ERR "%s: FAIL!(%d)\n", __func__, ret);
_rtw_memset(status, 0x00, 8);
_rtw_memset(buf, 0x0, len);
return _FAIL;
}
spi_get_status_info(Adapter, (unsigned char*)status);
pmore_data->more_data = GET_STATUS_HISR_LOW8BIT(status) & BIT(0);
pmore_data->len = GET_STATUS_RX_LENGTH(status);
return _SUCCESS;
}

2005
os_dep/pci_intf.c
View file

File diff suppressed because it is too large Load diff

24
os_dep/pci_ops_linux.c
View file

@ -1,24 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*******************************************************************************/
#define _PCI_OPS_LINUX_C_
#include <drv_types.h>

1309
os_dep/sdio_intf.c
View file

File diff suppressed because it is too large Load diff

554
os_dep/sdio_ops_linux.c
View file

@ -1,554 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*******************************************************************************/
#define _SDIO_OPS_LINUX_C_
#include <drv_types.h>
#include <linux/mmc/sdio_func.h>
static bool rtw_sdio_claim_host_needed(struct sdio_func *func)
{
struct dvobj_priv *dvobj = sdio_get_drvdata(func);
PSDIO_DATA sdio_data = &dvobj->intf_data;
if (sdio_data->sys_sdio_irq_thd && sdio_data->sys_sdio_irq_thd == current)
return _FALSE;
return _TRUE;
}
inline void rtw_sdio_set_irq_thd(struct dvobj_priv *dvobj, _thread_hdl_ thd_hdl)
{
PSDIO_DATA sdio_data = &dvobj->intf_data;
sdio_data->sys_sdio_irq_thd = thd_hdl;
}
u8 sd_f0_read8(PSDIO_DATA psdio, u32 addr, s32 *err)
{
u8 v;
struct sdio_func *func;
bool claim_needed;
_func_enter_;
func = psdio->func;
claim_needed = rtw_sdio_claim_host_needed(func);
if (claim_needed)
sdio_claim_host(func);
v = sdio_f0_readb(func, addr, err);
if (claim_needed)
sdio_release_host(func);
if (err && *err)
DBG_871X(KERN_ERR "%s: FAIL!(%d) addr=0x%05x\n", __func__, *err, addr);
_func_exit_;
return v;
}
void sd_f0_write8(PSDIO_DATA psdio, u32 addr, u8 v, s32 *err)
{
struct sdio_func *func;
bool claim_needed;
_func_enter_;
func = psdio->func;
claim_needed = rtw_sdio_claim_host_needed(func);
if (claim_needed)
sdio_claim_host(func);
sdio_f0_writeb(func, v, addr, err);
if (claim_needed)
sdio_release_host(func);
if (err && *err)
DBG_871X(KERN_ERR "%s: FAIL!(%d) addr=0x%05x val=0x%02x\n", __func__, *err, addr, v);
_func_exit_;
}
/*
* Return:
* 0 Success
* others Fail
*/
s32 _sd_cmd52_read(PSDIO_DATA psdio, u32 addr, u32 cnt, u8 *pdata)
{
int err, i;
struct sdio_func *func;
_func_enter_;
err = 0;
func = psdio->func;
for (i = 0; i < cnt; i++) {
pdata[i] = sdio_readb(func, addr+i, &err);
if (err) {
DBG_871X(KERN_ERR "%s: FAIL!(%d) addr=0x%05x\n", __func__, err, addr+i);
break;
}
}
_func_exit_;
return err;
}
/*
* Return:
* 0 Success
* others Fail
*/
s32 sd_cmd52_read(PSDIO_DATA psdio, u32 addr, u32 cnt, u8 *pdata)
{
int err, i;
struct sdio_func *func;
bool claim_needed;
_func_enter_;
err = 0;
func = psdio->func;
claim_needed = rtw_sdio_claim_host_needed(func);
if (claim_needed)
sdio_claim_host(func);
err = _sd_cmd52_read(psdio, addr, cnt, pdata);
if (claim_needed)
sdio_release_host(func);
_func_exit_;
return err;
}
/*
* Return:
* 0 Success
* others Fail
*/
s32 _sd_cmd52_write(PSDIO_DATA psdio, u32 addr, u32 cnt, u8 *pdata)
{
int err, i;
struct sdio_func *func;
_func_enter_;
err = 0;
func = psdio->func;
for (i = 0; i < cnt; i++) {
sdio_writeb(func, pdata[i], addr+i, &err);
if (err) {
DBG_871X(KERN_ERR "%s: FAIL!(%d) addr=0x%05x val=0x%02x\n", __func__, err, addr+i, pdata[i]);
break;
}
}
_func_exit_;
return err;
}
/*
* Return:
* 0 Success
* others Fail
*/
s32 sd_cmd52_write(PSDIO_DATA psdio, u32 addr, u32 cnt, u8 *pdata)
{
int err, i;
struct sdio_func *func;
bool claim_needed;
_func_enter_;
err = 0;
func = psdio->func;
claim_needed = rtw_sdio_claim_host_needed(func);
if (claim_needed)
sdio_claim_host(func);
err = _sd_cmd52_write(psdio, addr, cnt, pdata);
if (claim_needed)
sdio_release_host(func);
_func_exit_;
return err;
}
u8 _sd_read8(PSDIO_DATA psdio, u32 addr, s32 *err)
{
u8 v;
struct sdio_func *func;
_func_enter_;
func = psdio->func;
v = sdio_readb(func, addr, err);
if (err && *err)
DBG_871X(KERN_ERR "%s: FAIL!(%d) addr=0x%05x\n", __func__, *err, addr);
_func_exit_;
return v;
}
u8 sd_read8(PSDIO_DATA psdio, u32 addr, s32 *err)
{
u8 v;
struct sdio_func *func;
bool claim_needed;
_func_enter_;
func = psdio->func;
claim_needed = rtw_sdio_claim_host_needed(func);
if (claim_needed)
sdio_claim_host(func);
v = sdio_readb(func, addr, err);
if (claim_needed)
sdio_release_host(func);
if (err && *err)
DBG_871X(KERN_ERR "%s: FAIL!(%d) addr=0x%05x\n", __func__, *err, addr);
_func_exit_;
return v;
}
u16 sd_read16(PSDIO_DATA psdio, u32 addr, s32 *err)
{
u16 v;
struct sdio_func *func;
bool claim_needed;
_func_enter_;
func = psdio->func;
claim_needed = rtw_sdio_claim_host_needed(func);
if (claim_needed)
sdio_claim_host(func);
v = sdio_readw(func, addr, err);
if (claim_needed)
sdio_release_host(func);
if (err && *err)
DBG_871X(KERN_ERR "%s: FAIL!(%d) addr=0x%05x\n", __func__, *err, addr);
_func_exit_;
return v;
}
u32 _sd_read32(PSDIO_DATA psdio, u32 addr, s32 *err)
{
u32 v;
struct sdio_func *func;
_func_enter_;
func = psdio->func;
v = sdio_readl(func, addr, err);
if (err && *err)
DBG_871X(KERN_ERR "%s: FAIL!(%d) addr=0x%05x\n", __func__, *err, addr);
_func_exit_;
return v;
}
u32 sd_read32(PSDIO_DATA psdio, u32 addr, s32 *err)
{
u32 v;
struct sdio_func *func;
bool claim_needed;
_func_enter_;
func = psdio->func;
claim_needed = rtw_sdio_claim_host_needed(func);
if (claim_needed)
sdio_claim_host(func);
v = sdio_readl(func, addr, err);
if (claim_needed)
sdio_release_host(func);
if (err && *err)
DBG_871X(KERN_ERR "%s: FAIL!(%d) addr=0x%05x\n", __func__, *err, addr);
_func_exit_;
return v;
}
void sd_write8(PSDIO_DATA psdio, u32 addr, u8 v, s32 *err)
{
struct sdio_func *func;
bool claim_needed;
_func_enter_;
func = psdio->func;
claim_needed = rtw_sdio_claim_host_needed(func);
if (claim_needed)
sdio_claim_host(func);
sdio_writeb(func, v, addr, err);
if (claim_needed)
sdio_release_host(func);
if (err && *err)
DBG_871X(KERN_ERR "%s: FAIL!(%d) addr=0x%05x val=0x%02x\n", __func__, *err, addr, v);
_func_exit_;
}
void sd_write16(PSDIO_DATA psdio, u32 addr, u16 v, s32 *err)
{
struct sdio_func *func;
bool claim_needed;
_func_enter_;
func = psdio->func;
claim_needed = rtw_sdio_claim_host_needed(func);
if (claim_needed)
sdio_claim_host(func);
sdio_writew(func, v, addr, err);
if (claim_needed)
sdio_release_host(func);
if (err && *err)
DBG_871X(KERN_ERR "%s: FAIL!(%d) addr=0x%05x val=0x%04x\n", __func__, *err, addr, v);
_func_exit_;
}
void _sd_write32(PSDIO_DATA psdio, u32 addr, u32 v, s32 *err)
{
struct sdio_func *func;
_func_enter_;
func = psdio->func;
sdio_writel(func, v, addr, err);
if (err && *err)
DBG_871X(KERN_ERR "%s: FAIL!(%d) addr=0x%05x val=0x%08x\n", __func__, *err, addr, v);
_func_exit_;
}
void sd_write32(PSDIO_DATA psdio, u32 addr, u32 v, s32 *err)
{
struct sdio_func *func;
bool claim_needed;
_func_enter_;
func = psdio->func;
claim_needed = rtw_sdio_claim_host_needed(func);
if (claim_needed)
sdio_claim_host(func);
sdio_writel(func, v, addr, err);
if (claim_needed)
sdio_release_host(func);
if (err && *err)
DBG_871X(KERN_ERR "%s: FAIL!(%d) addr=0x%05x val=0x%08x\n", __func__, *err, addr, v);
_func_exit_;
}
/*
* Use CMD53 to read data from SDIO device.
* This function MUST be called after sdio_claim_host() or
* in SDIO ISR(host had been claimed).
*
* Parameters:
* psdio pointer of SDIO_DATA
* addr address to read
* cnt amount to read
* pdata pointer to put data, this should be a "DMA:able scratch buffer"!
*
* Return:
* 0 Success
* others Fail
*/
s32 _sd_read(PSDIO_DATA psdio, u32 addr, u32 cnt, void *pdata)
{
int err;
struct sdio_func *func;
_func_enter_;
func = psdio->func;
if (unlikely((cnt==1) || (cnt==2)))
{
int i;
u8 *pbuf = (u8*)pdata;
for (i = 0; i < cnt; i++)
{
*(pbuf+i) = sdio_readb(func, addr+i, &err);
if (err) {
DBG_871X(KERN_ERR "%s: FAIL!(%d) addr=0x%05x\n", __func__, err, addr);
break;
}
}
return err;
}
err = sdio_memcpy_fromio(func, pdata, addr, cnt);
if (err) {
DBG_871X(KERN_ERR "%s: FAIL(%d)! ADDR=%#x Size=%d\n", __func__, err, addr, cnt);
}
_func_exit_;
return err;
}
/*
* Use CMD53 to read data from SDIO device.
*
* Parameters:
* psdio pointer of SDIO_DATA
* addr address to read
* cnt amount to read
* pdata pointer to put data, this should be a "DMA:able scratch buffer"!
*
* Return:
* 0 Success
* others Fail
*/
s32 sd_read(PSDIO_DATA psdio, u32 addr, u32 cnt, void *pdata)
{
s32 err;
struct sdio_func *func;
bool claim_needed;
func = psdio->func;
claim_needed = rtw_sdio_claim_host_needed(func);
if (claim_needed)
sdio_claim_host(func);
err = _sd_read(psdio, addr, cnt, pdata);
if (claim_needed)
sdio_release_host(func);
return err;
}
/*
* Use CMD53 to write data to SDIO device.
* This function MUST be called after sdio_claim_host() or
* in SDIO ISR(host had been claimed).
*
* Parameters:
* psdio pointer of SDIO_DATA
* addr address to write
* cnt amount to write
* pdata data pointer, this should be a "DMA:able scratch buffer"!
*
* Return:
* 0 Success
* others Fail
*/
s32 _sd_write(PSDIO_DATA psdio, u32 addr, u32 cnt, void *pdata)
{
int err;
struct sdio_func *func;
u32 size;
_func_enter_;
func = psdio->func;
// size = sdio_align_size(func, cnt);
if (unlikely((cnt==1) || (cnt==2)))
{
int i;
u8 *pbuf = (u8*)pdata;
for (i = 0; i < cnt; i++)
{
sdio_writeb(func, *(pbuf+i), addr+i, &err);
if (err) {
DBG_871X(KERN_ERR "%s: FAIL!(%d) addr=0x%05x val=0x%02x\n", __func__, err, addr, *(pbuf+i));
break;
}
}
return err;
}
size = cnt;
err = sdio_memcpy_toio(func, addr, pdata, size);
if (err) {
DBG_871X(KERN_ERR "%s: FAIL(%d)! ADDR=%#x Size=%d(%d)\n", __func__, err, addr, cnt, size);
}
_func_exit_;
return err;
}
/*
* Use CMD53 to write data to SDIO device.
*
* Parameters:
* psdio pointer of SDIO_DATA
* addr address to write
* cnt amount to write
* pdata data pointer, this should be a "DMA:able scratch buffer"!
*
* Return:
* 0 Success
* others Fail
*/
s32 sd_write(PSDIO_DATA psdio, u32 addr, u32 cnt, void *pdata)
{
s32 err;
struct sdio_func *func;
bool claim_needed;
func = psdio->func;
claim_needed = rtw_sdio_claim_host_needed(func);
if (claim_needed)
sdio_claim_host(func);
err = _sd_write(psdio, addr, cnt, pdata);
if (claim_needed)
sdio_release_host(func);
return err;
}