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rtl8188EUS: Initial addition of files in branch v5.2.2.4

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Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2018-10-14 19:07:45 -05:00
parent 77471b4361
commit 6fa9ed423c
541 changed files with 393757 additions and 85553 deletions
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87
hal/rtl8188e/Hal8188EPwrSeq.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "Hal8188EPwrSeq.h"
#include <rtl8188e_hal.h>
/*
drivers should parse below arrays and do the corresponding actions
*/
/* 3 Power on Array */
WLAN_PWR_CFG rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
};
/* 3Radio off Array */
WLAN_PWR_CFG rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_END
};
/* 3Card Disable Array */
WLAN_PWR_CFG rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_CARDDIS
RTL8188E_TRANS_END
};
/* 3 Card Enable Array */
WLAN_PWR_CFG rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_CARDDIS_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
};
/* 3Suspend Array */
WLAN_PWR_CFG rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_SUS
RTL8188E_TRANS_END
};
/* 3 Resume Array */
WLAN_PWR_CFG rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_SUS_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
};
/* 3HWPDN Array */
WLAN_PWR_CFG rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_PDN
RTL8188E_TRANS_END
};
/* 3 Enter LPS */
WLAN_PWR_CFG rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS + RTL8188E_TRANS_END_STEPS] = {
/* FW behavior */
RTL8188E_TRANS_ACT_TO_LPS
RTL8188E_TRANS_END
};
/* 3 Leave LPS */
WLAN_PWR_CFG rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS] = {
/* FW behavior */
RTL8188E_TRANS_LPS_TO_ACT
RTL8188E_TRANS_END
};

7303
hal/rtl8188e/hal8188e_s_fw.c Normal file
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45
hal/rtl8188e/hal8188e_s_fw.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2016 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _FW_HEADER_8188E_S_H
#define _FW_HEADER_8188E_S_H
#ifdef CONFIG_SFW_SUPPORTED
#ifdef LOAD_FW_HEADER_FROM_DRIVER
#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))
extern u8 array_mp_8188e_s_fw_ap[16054];
extern u32 array_length_mp_8188e_s_fw_ap;
#endif
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE))
extern u8 array_mp_8188e_s_fw_nic[19206];
extern u32 array_length_mp_8188e_s_fw_nic;
#ifdef CONFIG_WOWLAN
extern u8 array_mp_8188e_s_fw_wowlan[22710];
extern u32 array_length_mp_8188e_s_fw_wowlan;
#endif /*CONFIG_WOWLAN*/
#endif
#endif /* end of LOAD_FW_HEADER_FROM_DRIVER */
#endif /* end of CONFIG_SFW_SUPPORTED */
#endif

7749
hal/rtl8188e/hal8188e_t_fw.c Normal file
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43
hal/rtl8188e/hal8188e_t_fw.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2016 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _FW_HEADER_8188E_T_H
#define _FW_HEADER_8188E_T_H
#ifdef LOAD_FW_HEADER_FROM_DRIVER
#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))
extern u8 array_mp_8188e_t_fw_ap[15502];
extern u32 array_length_mp_8188e_t_fw_ap;
#endif
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE))
extern u8 array_mp_8188e_t_fw_nic[15262];
extern u32 array_length_mp_8188e_t_fw_nic;
extern u8 array_mp_8188e_t_fw_nic_89em[14364];
extern u32 array_length_mp_8188e_t_fw_nic_89em;
#ifdef CONFIG_WOWLAN
extern u8 array_mp_8188e_t_fw_wowlan[16388];
extern u32 array_length_mp_8188e_t_fw_wowlan;
#endif /*CONFIG_WOWLAN*/
#endif
#endif /* end of LOAD_FW_HEADER_FROM_DRIVER */
#endif

825
hal/rtl8188e/rtl8188e_cmd.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8188E_CMD_C_
#include <drv_types.h>
#include <rtl8188e_hal.h>
#include "hal_com_h2c.h"
#define CONFIG_H2C_EF
#define RTL88E_MAX_H2C_BOX_NUMS 4
#define RTL88E_MAX_CMD_LEN 7
#define RTL88E_MESSAGE_BOX_SIZE 4
#define RTL88E_EX_MESSAGE_BOX_SIZE 4
static u8 _is_fw_read_cmd_down(_adapter *padapter, u8 msgbox_num)
{
u8 read_down = _FALSE;
int retry_cnts = 100;
u8 valid;
/* RTW_INFO(" _is_fw_read_cmd_down ,reg_1cc(%x),msg_box(%d)...\n",rtw_read8(padapter,REG_HMETFR),msgbox_num); */
do {
valid = rtw_read8(padapter, REG_HMETFR) & BIT(msgbox_num);
if (0 == valid)
read_down = _TRUE;
else
rtw_msleep_os(1);
} while ((!read_down) && (retry_cnts--));
return read_down;
}
/*****************************************
* H2C Msg format :
* 0x1DF - 0x1D0
*| 31 - 8 | 7-5 4 - 0 |
*| h2c_msg |Class_ID CMD_ID |
*
* Extend 0x1FF - 0x1F0
*|31 - 0 |
*|ext_msg|
******************************************/
s32 FillH2CCmd_88E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer)
{
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
u8 h2c_box_num;
u32 msgbox_addr;
u32 msgbox_ex_addr = 0;
u8 cmd_idx, ext_cmd_len;
u32 h2c_cmd = 0;
u32 h2c_cmd_ex = 0;
s32 ret = _FAIL;
padapter = GET_PRIMARY_ADAPTER(padapter);
pHalData = GET_HAL_DATA(padapter);
if (padapter->bFWReady == _FALSE) {
RTW_INFO("FillH2CCmd_88E(): return H2C cmd because fw is not ready\n");
return ret;
}
_enter_critical_mutex(&(dvobj->h2c_fwcmd_mutex), NULL);
if (!pCmdBuffer)
goto exit;
if (CmdLen > RTL88E_MAX_CMD_LEN)
goto exit;
if (rtw_is_surprise_removed(padapter))
goto exit;
/* pay attention to if race condition happened in H2C cmd setting. */
do {
h2c_box_num = pHalData->LastHMEBoxNum;
if (!_is_fw_read_cmd_down(padapter, h2c_box_num)) {
RTW_INFO(" fw read cmd failed...\n");
goto exit;
}
*(u8 *)(&h2c_cmd) = ElementID;
if (CmdLen <= 3)
_rtw_memcpy((u8 *)(&h2c_cmd) + 1, pCmdBuffer, CmdLen);
else {
_rtw_memcpy((u8 *)(&h2c_cmd) + 1, pCmdBuffer, 3);
ext_cmd_len = CmdLen - 3;
_rtw_memcpy((u8 *)(&h2c_cmd_ex), pCmdBuffer + 3, ext_cmd_len);
/* Write Ext command */
msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num * RTL88E_EX_MESSAGE_BOX_SIZE);
#ifdef CONFIG_H2C_EF
for (cmd_idx = 0; cmd_idx < ext_cmd_len; cmd_idx++)
rtw_write8(padapter, msgbox_ex_addr + cmd_idx, *((u8 *)(&h2c_cmd_ex) + cmd_idx));
#else
h2c_cmd_ex = le32_to_cpu(h2c_cmd_ex);
rtw_write32(padapter, msgbox_ex_addr, h2c_cmd_ex);
#endif
}
/* Write command */
msgbox_addr = REG_HMEBOX_0 + (h2c_box_num * RTL88E_MESSAGE_BOX_SIZE);
#ifdef CONFIG_H2C_EF
for (cmd_idx = 0; cmd_idx < RTL88E_MESSAGE_BOX_SIZE; cmd_idx++)
rtw_write8(padapter, msgbox_addr + cmd_idx, *((u8 *)(&h2c_cmd) + cmd_idx));
#else
h2c_cmd = le32_to_cpu(h2c_cmd);
rtw_write32(padapter, msgbox_addr, h2c_cmd);
#endif
/* RTW_INFO("MSG_BOX:%d,CmdLen(%d), reg:0x%x =>h2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" */
/* ,pHalData->LastHMEBoxNum ,CmdLen,msgbox_addr,h2c_cmd,msgbox_ex_addr,h2c_cmd_ex); */
pHalData->LastHMEBoxNum = (h2c_box_num + 1) % RTL88E_MAX_H2C_BOX_NUMS;
} while (0);
ret = _SUCCESS;
exit:
_exit_critical_mutex(&(dvobj->h2c_fwcmd_mutex), NULL);
return ret;
}
u8 rtl8192c_h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf)
{
u8 ElementID, CmdLen;
u8 *pCmdBuffer;
struct cmd_msg_parm *pcmdmsg;
if (!pbuf)
return H2C_PARAMETERS_ERROR;
pcmdmsg = (struct cmd_msg_parm *)pbuf;
ElementID = pcmdmsg->eid;
CmdLen = pcmdmsg->sz;
pCmdBuffer = pcmdmsg->buf;
FillH2CCmd_88E(padapter, ElementID, CmdLen, pCmdBuffer);
return H2C_SUCCESS;
}
#if 0
#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED)
u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter *padapter , u8 bfwpoll, u16 period)
{
u8 res = _SUCCESS;
struct H2C_SS_RFOFF_PARAM param;
RTW_INFO("==>%s bfwpoll(%x)\n", __FUNCTION__, bfwpoll);
param.gpio_period = period;/* Polling GPIO_11 period time */
param.ROFOn = (_TRUE == bfwpoll) ? 1 : 0;
FillH2CCmd_88E(padapter, SELECTIVE_SUSPEND_ROF_CMD, sizeof(param), (u8 *)(&param));
return res;
}
#endif /* CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED */
#endif
u8 rtl8188e_set_rssi_cmd(_adapter *padapter, u8 *param)
{
u8 res = _SUCCESS;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if (pHalData->fw_ractrl == _FALSE) {
RTW_INFO("==>%s fw dont support RA\n", __FUNCTION__);
return _FAIL;
}
*((u32 *) param) = cpu_to_le32(*((u32 *) param));
FillH2CCmd_88E(padapter, H2C_RSSI_REPORT, 3, param);
return res;
}
u8 rtl8188e_set_raid_cmd(_adapter *padapter, u32 bitmap, u8 *arg, u8 bw)
{
u8 res = _SUCCESS;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sta_info *psta = NULL;
struct macid_ctl_t *macid_ctl = &padapter->dvobj->macid_ctl;
u8 macid, init_rate, raid, shortGIrate = _FALSE;
u8 H2CCommand[7] = {0};
u8 ignore_bw = _FALSE;
if (pHalData->fw_ractrl == _FALSE) {
RTW_INFO("==>%s fw dont support RA\n", __FUNCTION__);
return _FAIL;
}
macid = arg[0];
raid = arg[1];
shortGIrate = arg[2] & 0x0F;
ignore_bw = arg[2] >> 4;
init_rate = arg[3];
if (macid < macid_ctl->num)
psta = macid_ctl->sta[macid];
if (psta == NULL) {
RTW_PRINT(FUNC_ADPT_FMT" macid:%u, sta is NULL\n"
, FUNC_ADPT_ARG(padapter), macid);
return _FAIL;
}
H2CCommand[0] = macid;
H2CCommand[1] = raid | (shortGIrate ? 0x80 : 0x00) ;
H2CCommand[2] = bw & 0x03; /* BW; */
if (ignore_bw)
H2CCommand[2] |= BIT(3);
#ifdef CONFIG_INTEL_PROXIM
if (padapter->proximity.proxim_on == _TRUE)
pHalData->bDisableTXPowerTraining = _FALSE;
#endif
/* DisableTXPowerTraining */
if (pHalData->bDisableTXPowerTraining) {
H2CCommand[2] |= BIT6;
RTW_INFO("%s,Disable PWT by driver\n", __FUNCTION__);
} else {
struct PHY_DM_STRUCT *pDM_OutSrc = &pHalData->odmpriv;
if (pDM_OutSrc->is_disable_power_training) {
H2CCommand[2] |= BIT6;
RTW_INFO("%s,Disable PWT by DM\n", __FUNCTION__);
}
}
H2CCommand[3] = (u1Byte)(bitmap & 0x000000ff);
H2CCommand[4] = (u1Byte)((bitmap & 0x0000ff00) >> 8);
H2CCommand[5] = (u1Byte)((bitmap & 0x00ff0000) >> 16);
H2CCommand[6] = (u1Byte)((bitmap & 0xff000000) >> 24);
FillH2CCmd_88E(padapter, H2C_DM_MACID_CFG, 7, H2CCommand);
/* The firmware Rate Adaption function is triggered by TBTT INT, so to */
/* enable the rate adaption, we need to enable the hardware Beacon function Reg 0x550[3] */
/* SetBcnCtrlReg(padapter, BIT3, 0); */
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) | BIT3);
return res;
}
void rtl8188e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode)
{
SETPWRMODE_PARM H2CSetPwrMode;
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
u8 RLBM = 0; /* 0:Min, 1:Max , 2:User define */
RTW_INFO("%s: Mode=%d SmartPS=%d UAPSD=%d\n", __FUNCTION__,
Mode, pwrpriv->smart_ps, padapter->registrypriv.uapsd_enable);
H2CSetPwrMode.AwakeInterval = 2; /* DTIM = 1 */
switch (Mode) {
case PS_MODE_ACTIVE:
H2CSetPwrMode.Mode = 0;
break;
case PS_MODE_MIN:
H2CSetPwrMode.Mode = 1;
break;
case PS_MODE_MAX:
RLBM = 1;
H2CSetPwrMode.Mode = 1;
break;
case PS_MODE_DTIM:
RLBM = 2;
H2CSetPwrMode.AwakeInterval = 3; /* DTIM = 2 */
H2CSetPwrMode.Mode = 1;
break;
case PS_MODE_UAPSD_WMM:
H2CSetPwrMode.Mode = 2;
break;
default:
H2CSetPwrMode.Mode = 0;
break;
}
/* H2CSetPwrMode.Mode = Mode; */
H2CSetPwrMode.SmartPS_RLBM = (((pwrpriv->smart_ps << 4) & 0xf0) | (RLBM & 0x0f));
H2CSetPwrMode.bAllQueueUAPSD = padapter->registrypriv.uapsd_enable;
if (Mode > 0) {
H2CSetPwrMode.PwrState = 0x00;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */
#ifdef CONFIG_EXT_CLK
H2CSetPwrMode.Mode |= BIT(7);/* supporting 26M XTAL CLK_Request feature. */
#endif /* CONFIG_EXT_CLK */
} else
H2CSetPwrMode.PwrState = 0x0C;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */
FillH2CCmd_88E(padapter, H2C_PS_PWR_MODE, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode);
}
void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength)
{
struct rtw_ieee80211_hdr *pwlanhdr;
u16 *fctrl;
u32 rate_len, pktlen;
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network);
u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
/* RTW_INFO("%s\n", __FUNCTION__); */
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
fctrl = &(pwlanhdr->frame_ctl);
*(fctrl) = 0;
_rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN);
SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/);
/* pmlmeext->mgnt_seq++; */
set_frame_sub_type(pframe, WIFI_BEACON);
pframe += sizeof(struct rtw_ieee80211_hdr_3addr);
pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
/* timestamp will be inserted by hardware */
pframe += 8;
pktlen += 8;
/* beacon interval: 2 bytes */
_rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2);
pframe += 2;
pktlen += 2;
/* capability info: 2 bytes */
_rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2);
pframe += 2;
pktlen += 2;
if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
/* RTW_INFO("ie len=%d\n", cur_network->IELength); */
pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs);
_rtw_memcpy(pframe, cur_network->IEs + sizeof(NDIS_802_11_FIXED_IEs), pktlen);
goto _ConstructBeacon;
}
/* below for ad-hoc mode */
/* SSID */
pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen);
/* supported rates... */
rate_len = rtw_get_rateset_len(cur_network->SupportedRates);
pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8) ? 8 : rate_len), cur_network->SupportedRates, &pktlen);
/* DS parameter set */
pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen);
if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) {
u32 ATIMWindow;
/* IBSS Parameter Set... */
/* ATIMWindow = cur->Configuration.ATIMWindow; */
ATIMWindow = 0;
pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen);
}
/* todo: ERP IE */
/* EXTERNDED SUPPORTED RATE */
if (rate_len > 8)
pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen);
/* todo:HT for adhoc */
_ConstructBeacon:
if ((pktlen + TXDESC_SIZE) > 512) {
RTW_INFO("beacon frame too large\n");
return;
}
*pLength = pktlen;
/* RTW_INFO("%s bcn_sz=%d\n", __FUNCTION__, pktlen); */
}
void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength)
{
struct rtw_ieee80211_hdr *pwlanhdr;
u16 *fctrl;
u32 pktlen;
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
/* RTW_INFO("%s\n", __FUNCTION__); */
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
/* Frame control. */
fctrl = &(pwlanhdr->frame_ctl);
*(fctrl) = 0;
SetPwrMgt(fctrl);
set_frame_sub_type(pframe, WIFI_PSPOLL);
/* AID. */
set_duration(pframe, (pmlmeinfo->aid | 0xc000));
/* BSSID. */
_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
/* TA. */
_rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
*pLength = 16;
}
void ConstructNullFunctionData(
PADAPTER padapter,
u8 *pframe,
u32 *pLength,
u8 *StaAddr,
u8 bQoS,
u8 AC,
u8 bEosp,
u8 bForcePowerSave)
{
struct rtw_ieee80211_hdr *pwlanhdr;
u16 *fctrl;
u32 pktlen;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *cur_network = &pmlmepriv->cur_network;
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
/* RTW_INFO("%s:%d\n", __FUNCTION__, bForcePowerSave); */
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
fctrl = &pwlanhdr->frame_ctl;
*(fctrl) = 0;
if (bForcePowerSave)
SetPwrMgt(fctrl);
switch (cur_network->network.InfrastructureMode) {
case Ndis802_11Infrastructure:
SetToDs(fctrl);
_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN);
break;
case Ndis802_11APMode:
SetFrDs(fctrl);
_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN);
break;
case Ndis802_11IBSS:
default:
_rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
break;
}
SetSeqNum(pwlanhdr, 0);
if (bQoS == _TRUE) {
struct rtw_ieee80211_hdr_3addr_qos *pwlanqoshdr;
set_frame_sub_type(pframe, WIFI_QOS_DATA_NULL);
pwlanqoshdr = (struct rtw_ieee80211_hdr_3addr_qos *)pframe;
SetPriority(&pwlanqoshdr->qc, AC);
SetEOSP(&pwlanqoshdr->qc, bEosp);
pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos);
} else {
set_frame_sub_type(pframe, WIFI_DATA_NULL);
pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
}
*pLength = pktlen;
}
void rtl8188e_set_FwRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc)
{
u8 u1H2CRsvdPageParm[H2C_RSVDPAGE_LOC_LEN] = {0};
u8 u1H2CAoacRsvdPageParm[H2C_AOAC_RSVDPAGE_LOC_LEN] = {0};
/* RTW_INFO("8188RsvdPageLoc: PsPoll=%d Null=%d QoSNull=%d\n", */
/* rsvdpageloc->LocPsPoll, rsvdpageloc->LocNullData, rsvdpageloc->LocQosNull); */
SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1H2CRsvdPageParm, rsvdpageloc->LocPsPoll);
SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocNullData);
SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocQosNull);
FillH2CCmd_88E(padapter, H2C_COM_RSVD_PAGE, H2C_RSVDPAGE_LOC_LEN, u1H2CRsvdPageParm);
#ifdef CONFIG_WOWLAN
/* RTW_INFO("8188E_AOACRsvdPageLoc: RWC=%d ArpRsp=%d\n", rsvdpageloc->LocRemoteCtrlInfo, rsvdpageloc->LocArpRsp); */
SET_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocRemoteCtrlInfo);
SET_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocArpRsp);
FillH2CCmd_88E(padapter, H2C_COM_AOAC_RSVD_PAGE, H2C_AOAC_RSVDPAGE_LOC_LEN, u1H2CAoacRsvdPageParm);
#endif
}
/* To check if reserved page content is destroyed by beacon beacuse beacon is too large.
* 2010.06.23. Added by tynli. */
VOID
CheckFwRsvdPageContent(
IN PADAPTER Adapter
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u32 MaxBcnPageNum;
if (pHalData->FwRsvdPageStartOffset != 0) {
/*MaxBcnPageNum = PageNum_128(pMgntInfo->MaxBeaconSize);
RT_ASSERT((MaxBcnPageNum <= pHalData->FwRsvdPageStartOffset),
("CheckFwRsvdPageContent(): The reserved page content has been"\
"destroyed by beacon!!! MaxBcnPageNum(%d) FwRsvdPageStartOffset(%d)\n!",
MaxBcnPageNum, pHalData->FwRsvdPageStartOffset));*/
}
}
/*
* Description: Get the reserved page number in Tx packet buffer.
* Retrun value: the page number.
* 2012.08.09, by tynli.
* */
u8
GetTxBufferRsvdPageNum8188E(_adapter *padapter, bool wowlan)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
u8 RsvdPageNum = 0;
/* default reseved 1 page for the IC type which is undefined. */
u8 TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(padapter);
rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&TxPageBndy);
RsvdPageNum = LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(padapter) - TxPageBndy + 1;
return RsvdPageNum;
}
void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus)
{
JOINBSSRPT_PARM_88E JoinBssRptParm;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
#ifdef CONFIG_WOWLAN
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct sta_info *psta = NULL;
#endif
BOOLEAN bSendBeacon = _FALSE;
BOOLEAN bcn_valid = _FALSE;
u8 DLBcnCount = 0;
u32 poll = 0;
RTW_INFO("%s mstatus(%x)\n", __FUNCTION__, mstatus);
if (mstatus == 1) {
/* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */
/* Suggested by filen. Added by tynli. */
rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000 | pmlmeinfo->aid));
/* Do not set TSF again here or vWiFi beacon DMA INT will not work. */
/* correct_TSF(padapter, pmlmeext); */
/* Hw sequende enable by dedault. 2010.06.23. by tynli. */
/* rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF)); */
/* rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); */
/* Set REG_CR bit 8. DMA beacon by SW. */
pHalData->RegCR_1 |= BIT0;
rtw_write8(padapter, REG_CR + 1, pHalData->RegCR_1);
/* Disable Hw protection for a time which revserd for Hw sending beacon. */
/* Fix download reserved page packet fail that access collision with the protection time. */
/* 2010.05.11. Added by tynli. */
/* SetBcnCtrlReg(padapter, 0, BIT3); */
/* SetBcnCtrlReg(padapter, BIT4, 0); */
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) & (~BIT(3)));
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) | BIT(4));
if (pHalData->RegFwHwTxQCtrl & BIT6) {
RTW_INFO("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n");
bSendBeacon = _TRUE;
}
/* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, (pHalData->RegFwHwTxQCtrl & (~BIT6)));
pHalData->RegFwHwTxQCtrl &= (~BIT6);
/* Clear beacon valid check bit. */
rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
DLBcnCount = 0;
poll = 0;
do {
/* download rsvd page.*/
rtw_hal_set_fw_rsvd_page(padapter, _FALSE);
DLBcnCount++;
do {
rtw_yield_os();
/* rtw_mdelay_os(10); */
/* check rsvd page download OK. */
rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid));
poll++;
} while (!bcn_valid && (poll % 10) != 0 && !RTW_CANNOT_RUN(padapter));
} while (!bcn_valid && DLBcnCount <= 100 && !RTW_CANNOT_RUN(padapter));
/* RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage88ES(): 1 Download RSVD page failed!\n")); */
if (RTW_CANNOT_RUN(padapter))
;
else if (!bcn_valid)
RTW_INFO(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n",
ADPT_ARG(padapter) , DLBcnCount, poll);
else {
struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
pwrctl->fw_psmode_iface_id = padapter->iface_id;
RTW_INFO(ADPT_FMT": 1 DL RSVD page success! DLBcnCount:%u, poll:%u\n",
ADPT_ARG(padapter), DLBcnCount, poll);
}
/* Enable Bcn */
/* SetBcnCtrlReg(padapter, BIT3, 0); */
/* SetBcnCtrlReg(padapter, 0, BIT4); */
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) | BIT(3));
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL) & (~BIT(4)));
/* To make sure that if there exists an adapter which would like to send beacon. */
/* If exists, the origianl value of 0x422[6] will be 1, we should check this to */
/* prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */
/* the beacon cannot be sent by HW. */
/* 2010.06.23. Added by tynli. */
if (bSendBeacon) {
rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, (pHalData->RegFwHwTxQCtrl | BIT6));
pHalData->RegFwHwTxQCtrl |= BIT6;
}
/* */
/* Update RSVD page location H2C to Fw. */
/* */
if (bcn_valid) {
rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
RTW_INFO("Set RSVD page location to Fw.\n");
/* FillH2CCmd88E(Adapter, H2C_88E_RSVDPAGE, H2C_RSVDPAGE_LOC_LENGTH, pMgntInfo->u1RsvdPageLoc); */
}
/* Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. */
/* if(!padapter->bEnterPnpSleep) */
{
/* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
pHalData->RegCR_1 &= (~BIT0);
rtw_write8(padapter, REG_CR + 1, pHalData->RegCR_1);
}
}
}
#ifdef CONFIG_P2P_PS
void rtl8188e_set_p2p_ps_offload_cmd(_adapter *padapter, u8 p2p_ps_state)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
struct P2P_PS_Offload_t *p2p_ps_offload = (struct P2P_PS_Offload_t *)(&pHalData->p2p_ps_offload);
u8 i;
#if 1
switch (p2p_ps_state) {
case P2P_PS_DISABLE:
RTW_INFO("P2P_PS_DISABLE\n");
_rtw_memset(p2p_ps_offload, 0 , 1);
break;
case P2P_PS_ENABLE:
RTW_INFO("P2P_PS_ENABLE\n");
/* update CTWindow value. */
if (pwdinfo->ctwindow > 0) {
p2p_ps_offload->CTWindow_En = 1;
rtw_write8(padapter, REG_P2P_CTWIN, pwdinfo->ctwindow);
}
/* hw only support 2 set of NoA */
for (i = 0 ; i < pwdinfo->noa_num ; i++) {
/* To control the register setting for which NOA */
rtw_write8(padapter, REG_NOA_DESC_SEL, (i << 4));
if (i == 0)
p2p_ps_offload->NoA0_En = 1;
else
p2p_ps_offload->NoA1_En = 1;
/* config P2P NoA Descriptor Register */
/* RTW_INFO("%s(): noa_duration = %x\n",__FUNCTION__,pwdinfo->noa_duration[i]); */
rtw_write32(padapter, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]);
/* RTW_INFO("%s(): noa_interval = %x\n",__FUNCTION__,pwdinfo->noa_interval[i]); */
rtw_write32(padapter, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]);
/* RTW_INFO("%s(): start_time = %x\n",__FUNCTION__,pwdinfo->noa_start_time[i]); */
rtw_write32(padapter, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]);
/* RTW_INFO("%s(): noa_count = %x\n",__FUNCTION__,pwdinfo->noa_count[i]); */
rtw_write8(padapter, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]);
}
if ((pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0)) {
/* rst p2p circuit */
rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4));
p2p_ps_offload->Offload_En = 1;
if (pwdinfo->role == P2P_ROLE_GO) {
p2p_ps_offload->role = 1;
p2p_ps_offload->AllStaSleep = 0;
} else
p2p_ps_offload->role = 0;
p2p_ps_offload->discovery = 0;
}
break;
case P2P_PS_SCAN:
RTW_INFO("P2P_PS_SCAN\n");
p2p_ps_offload->discovery = 1;
break;
case P2P_PS_SCAN_DONE:
RTW_INFO("P2P_PS_SCAN_DONE\n");
p2p_ps_offload->discovery = 0;
pwdinfo->p2p_ps_state = P2P_PS_ENABLE;
break;
default:
break;
}
FillH2CCmd_88E(padapter, H2C_PS_P2P_OFFLOAD, 1, (u8 *)p2p_ps_offload);
#endif
}
#endif /* CONFIG_P2P_PS */
#ifdef CONFIG_TSF_RESET_OFFLOAD
/*
ask FW to Reset sync register at Beacon early interrupt
*/
u8 rtl8188e_reset_tsf(_adapter *padapter, u8 reset_port)
{
u8 buf[2];
u8 res = _SUCCESS;
s32 ret;
if (HW_PORT0 == reset_port) {
buf[0] = 0x1;
buf[1] = 0;
} else {
buf[0] = 0x0;
buf[1] = 0x1;
}
ret = FillH2CCmd_88E(padapter, H2C_RESET_TSF, 2, buf);
return res;
}
int reset_tsf(PADAPTER Adapter, u8 reset_port)
{
u8 reset_cnt_before = 0, reset_cnt_after = 0, loop_cnt = 0;
u32 reg_reset_tsf_cnt = (HW_PORT0 == reset_port) ?
REG_FW_RESET_TSF_CNT_0 : REG_FW_RESET_TSF_CNT_1;
u32 reg_bcncrtl = (HW_PORT0 == reset_port) ?
REG_BCN_CTRL_1 : REG_BCN_CTRL;
rtw_mi_buddy_scan_abort(Adapter, _FALSE); /* site survey will cause reset_tsf fail */
reset_cnt_after = reset_cnt_before = rtw_read8(Adapter, reg_reset_tsf_cnt);
rtl8188e_reset_tsf(Adapter, reset_port);
while ((reset_cnt_after == reset_cnt_before) && (loop_cnt < 10)) {
rtw_msleep_os(100);
loop_cnt++;
reset_cnt_after = rtw_read8(Adapter, reg_reset_tsf_cnt);
}
return (loop_cnt >= 10) ? _FAIL : _TRUE;
}
#endif /* CONFIG_TSF_RESET_OFFLOAD */

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hal/rtl8188e/rtl8188e_dm.c Normal file
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@ -0,0 +1,434 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* ************************************************************
* Description:
*
* This file is for 92CE/92CU dynamic mechanism only
*
*
* ************************************************************ */
#define _RTL8188E_DM_C_
/* ************************************************************
* include files
* ************************************************************ */
#include <drv_types.h>
#include <rtl8188e_hal.h>
/* ************************************************************
* Global var
* ************************************************************ */
static VOID
dm_CheckProtection(
IN PADAPTER Adapter
)
{
#if 0
PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
u1Byte CurRate, RateThreshold;
if (pMgntInfo->pHTInfo->bCurBW40MHz)
RateThreshold = MGN_MCS1;
else
RateThreshold = MGN_MCS3;
if (Adapter->TxStats.CurrentInitTxRate <= RateThreshold) {
pMgntInfo->bDmDisableProtect = TRUE;
dbg_print("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
} else {
pMgntInfo->bDmDisableProtect = FALSE;
dbg_print("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
}
#endif
}
static VOID
dm_CheckStatistics(
IN PADAPTER Adapter
)
{
#if 0
if (!Adapter->MgntInfo.bMediaConnect)
return;
/* 2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly. */
rtw_hal_get_hwreg(Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate));
/* Calculate current Tx Rate(Successful transmited!!) */
/* Calculate current Rx Rate(Successful received!!) */
/* for tx tx retry count */
rtw_hal_get_hwreg(Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount));
#endif
}
#ifdef CONFIG_SUPPORT_HW_WPS_PBC
static void dm_CheckPbcGPIO(_adapter *padapter)
{
u8 tmp1byte;
u8 bPbcPressed = _FALSE;
if (!padapter->registrypriv.hw_wps_pbc)
return;
#ifdef CONFIG_USB_HCI
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
tmp1byte |= (HAL_8188E_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as output mode */
tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IN, tmp1byte); /* reset the floating voltage level */
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT);
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as input mode */
tmp1byte = rtw_read8(padapter, GPIO_IN);
if (tmp1byte == 0xff)
return ;
if (tmp1byte & HAL_8188E_HW_GPIO_WPS_BIT)
bPbcPressed = _TRUE;
#else
tmp1byte = rtw_read8(padapter, GPIO_IN);
if (tmp1byte == 0xff || padapter->init_adpt_in_progress)
return ;
if ((tmp1byte & HAL_8188E_HW_GPIO_WPS_BIT) == 0)
bPbcPressed = _TRUE;
#endif
if (_TRUE == bPbcPressed) {
/* Here we only set bPbcPressed to true */
/* After trigger PBC, the variable will be set to false */
RTW_INFO("CheckPbcGPIO - PBC is pressed\n");
rtw_request_wps_pbc_event(padapter);
}
}
#endif/* #ifdef CONFIG_SUPPORT_HW_WPS_PBC */
#ifdef CONFIG_PCI_HCI
/*
* Description:
* Perform interrupt migration dynamically to reduce CPU utilization.
*
* Assumption:
* 1. Do not enable migration under WIFI test.
*
* Created by Roger, 2010.03.05.
* */
VOID
dm_InterruptMigration(
IN PADAPTER Adapter
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
BOOLEAN bCurrentIntMt, bCurrentACIntDisable;
BOOLEAN IntMtToSet = _FALSE;
BOOLEAN ACIntToSet = _FALSE;
/* Retrieve current interrupt migration and Tx four ACs IMR settings first. */
bCurrentIntMt = pHalData->bInterruptMigration;
bCurrentACIntDisable = pHalData->bDisableTxInt;
/* */
/* <Roger_Notes> Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics */
/* when interrupt migration is set before. 2010.03.05. */
/* */
if (!Adapter->registrypriv.wifi_spec &&
(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) &&
pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) {
IntMtToSet = _TRUE;
/* To check whether we should disable Tx interrupt or not. */
if (pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic)
ACIntToSet = _TRUE;
}
/* Update current settings. */
if (bCurrentIntMt != IntMtToSet) {
RTW_INFO("%s(): Update interrrupt migration(%d)\n", __FUNCTION__, IntMtToSet);
if (IntMtToSet) {
/* */
/* <Roger_Notes> Set interrrupt migration timer and corresponging Tx/Rx counter. */
/* timer 25ns*0xfa0=100us for 0xf packets. */
/* 2010.03.05. */
/* */
rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);/* 0x306:Rx, 0x307:Tx */
pHalData->bInterruptMigration = IntMtToSet;
} else {
/* Reset all interrupt migration settings. */
rtw_write32(Adapter, REG_INT_MIG, 0);
pHalData->bInterruptMigration = IntMtToSet;
}
}
#if 0
if (bCurrentACIntDisable != ACIntToSet) {
RTW_INFO("%s(): Update AC interrrupt(%d)\n", __FUNCTION__, ACIntToSet);
if (ACIntToSet) { /* Disable four ACs interrupts. */
/* */
/* <Roger_Notes> Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. */
/* When extremely highly Rx OK occurs, we will disable Tx interrupts. */
/* 2010.03.05. */
/* */
UpdateInterruptMask8192CE(Adapter, 0, RT_AC_INT_MASKS);
pHalData->bDisableTxInt = ACIntToSet;
} else { /* Enable four ACs interrupts. */
UpdateInterruptMask8192CE(Adapter, RT_AC_INT_MASKS, 0);
pHalData->bDisableTxInt = ACIntToSet;
}
}
#endif
}
#endif
/*
* Initialize GPIO setting registers
* */
static void
dm_InitGPIOSetting(
IN PADAPTER Adapter
)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
u8 tmp1byte;
tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG);
tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
}
/* ************************************************************
* functions
* ************************************************************ */
static void Init_ODM_ComInfo_88E(PADAPTER Adapter)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct PHY_DM_STRUCT *pDM_Odm = &(pHalData->odmpriv);
u32 SupportAbility = 0;
u8 cut_ver, fab_ver;
Init_ODM_ComInfo(Adapter);
fab_ver = ODM_TSMC;
cut_ver = ODM_CUT_A;
if (IS_VENDOR_8188E_I_CUT_SERIES(Adapter))
cut_ver = ODM_CUT_I;
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_FAB_VER, fab_ver);
odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_CUT_VER, cut_ver);
#ifdef CONFIG_DISABLE_ODM
SupportAbility = 0;
#else
SupportAbility = ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK
;
#endif
odm_cmn_info_update(pDM_Odm, ODM_CMNINFO_ABILITY, SupportAbility);
}
static void Update_ODM_ComInfo_88E(PADAPTER Adapter)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct PHY_DM_STRUCT *pDM_Odm = &(pHalData->odmpriv);
u32 SupportAbility = 0;
int i;
SupportAbility = 0
| ODM_BB_DIG
| ODM_BB_RA_MASK
| ODM_BB_DYNAMIC_TXPWR
| ODM_BB_FA_CNT
| ODM_BB_RSSI_MONITOR
| ODM_BB_CCK_PD
/* | ODM_BB_PWR_SAVE */
| ODM_BB_CFO_TRACKING
| ODM_RF_CALIBRATION
| ODM_RF_TX_PWR_TRACK
| ODM_BB_NHM_CNT
| ODM_BB_PRIMARY_CCA
/* | ODM_BB_PWR_TRAIN */
;
if (rtw_odm_adaptivity_needed(Adapter) == _TRUE) {
rtw_odm_adaptivity_config_msg(RTW_DBGDUMP, Adapter);
SupportAbility |= ODM_BB_ADAPTIVITY;
}
if (!Adapter->registrypriv.qos_opt_enable)
SupportAbility |= ODM_MAC_EDCA_TURBO;
#ifdef CONFIG_ANTENNA_DIVERSITY
if (pHalData->AntDivCfg)
SupportAbility |= ODM_BB_ANT_DIV;
#endif
#if (MP_DRIVER == 1)
if (Adapter->registrypriv.mp_mode == 1) {
SupportAbility = 0
| ODM_RF_CALIBRATION
| ODM_RF_TX_PWR_TRACK
;
}
#endif/* (MP_DRIVER==1) */
#ifdef CONFIG_DISABLE_ODM
SupportAbility = 0;
#endif/* CONFIG_DISABLE_ODM */
odm_cmn_info_update(pDM_Odm, ODM_CMNINFO_ABILITY, SupportAbility);
}
void
rtl8188e_InitHalDm(
IN PADAPTER Adapter
)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct PHY_DM_STRUCT *pDM_Odm = &(pHalData->odmpriv);
u8 i;
#ifdef CONFIG_USB_HCI
dm_InitGPIOSetting(Adapter);
#endif
pHalData->DM_Type = dm_type_by_driver;
Update_ODM_ComInfo_88E(Adapter);
odm_dm_init(pDM_Odm);
}
VOID
rtl8188e_HalDmWatchDog(
IN PADAPTER Adapter
)
{
BOOLEAN bFwCurrentInPSMode = _FALSE;
BOOLEAN bFwPSAwake = _TRUE;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct PHY_DM_STRUCT *pDM_Odm = &(pHalData->odmpriv);
if (!rtw_is_hw_init_completed(Adapter))
goto skip_dm;
#ifdef CONFIG_LPS
bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode;
rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));
#endif
#ifdef CONFIG_P2P_PS
/* Fw is under p2p powersaving mode, driver should stop dynamic mechanism. */
/* modifed by thomas. 2011.06.11. */
if (Adapter->wdinfo.p2p_ps_mode)
bFwPSAwake = _FALSE;
#endif /* CONFIG_P2P_PS */
if ((rtw_is_hw_init_completed(Adapter))
&& ((!bFwCurrentInPSMode) && bFwPSAwake)) {
/* */
/* Calculate Tx/Rx statistics. */
/* */
dm_CheckStatistics(Adapter);
rtw_hal_check_rxfifo_full(Adapter);
/* */
/* Dynamically switch RTS/CTS protection. */
/* */
/* dm_CheckProtection(Adapter); */
#ifdef CONFIG_PCI_HCI
/* 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. */
/* Tx Migration settings. */
/* dm_InterruptMigration(Adapter); */
/* if(Adapter->hal_func.TxCheckStuckHandler(Adapter)) */
/* PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); */
#endif
}
/* ODM */
if (rtw_is_hw_init_completed(Adapter)) {
u8 bLinked = _FALSE;
u8 bsta_state = _FALSE;
#ifdef CONFIG_DISABLE_ODM
pHalData->odmpriv.support_ability = 0;
#endif
if (rtw_mi_check_status(Adapter, MI_ASSOC)) {
bLinked = _TRUE;
if (rtw_mi_check_status(Adapter, MI_STA_LINKED))
bsta_state = _TRUE;
}
odm_cmn_info_update(&pHalData->odmpriv , ODM_CMNINFO_LINK, bLinked);
odm_cmn_info_update(&pHalData->odmpriv , ODM_CMNINFO_STATION_STATE, bsta_state);
odm_dm_watchdog(&pHalData->odmpriv);
}
skip_dm:
#ifdef CONFIG_SUPPORT_HW_WPS_PBC
/* Check GPIO to determine current Pbc status. */
dm_CheckPbcGPIO(Adapter);
#endif
return;
}
void rtl8188e_init_dm_priv(IN PADAPTER Adapter)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct PHY_DM_STRUCT *podmpriv = &pHalData->odmpriv;
/* _rtw_spinlock_init(&(pHalData->odm_stainfo_lock)); */
Init_ODM_ComInfo_88E(Adapter);
odm_init_all_timers(podmpriv);
}
void rtl8188e_deinit_dm_priv(IN PADAPTER Adapter)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct PHY_DM_STRUCT *podmpriv = &pHalData->odmpriv;
/* _rtw_spinlock_free(&pHalData->odm_stainfo_lock); */
odm_cancel_all_timers(podmpriv);
}

4867
hal/rtl8188e/rtl8188e_hal_init.c Normal file
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2021
hal/rtl8188e/rtl8188e_phycfg.c Normal file
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325
hal/rtl8188e/rtl8188e_rf6052.c Normal file
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@ -0,0 +1,325 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/******************************************************************************
*
*
* Module: rtl8188e_rf6052.c ( Source C File)
*
* Note: Provide RF 6052 series relative API.
*
* Function:
*
* Export:
*
* Abbrev:
*
* History:
* Data Who Remark
*
* 09/25/2008 MHC Create initial version.
* 11/05/2008 MHC Add API for tw power setting.
*
*
******************************************************************************/
#define _RTL8188E_RF6052_C_
#include <drv_types.h>
#include <rtl8188e_hal.h>
/*---------------------------Define Local Constant---------------------------*/
/*---------------------------Define Local Constant---------------------------*/
/*------------------------Define global variable-----------------------------*/
/*------------------------Define global variable-----------------------------*/
/*------------------------Define local variable------------------------------*/
/*------------------------Define local variable------------------------------*/
/*-----------------------------------------------------------------------------
* Function: RF_ChangeTxPath
*
* Overview: For RL6052, we must change some RF settign for 1T or 2T.
*
* Input: u2Byte DataRate // 0x80-8f, 0x90-9f
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 09/25/2008 MHC Create Version 0.
* Firmwaer support the utility later.
*
*---------------------------------------------------------------------------*/
void rtl8188e_RF_ChangeTxPath(IN PADAPTER Adapter,
IN u16 DataRate)
{
/* We do not support gain table change inACUT now !!!! Delete later !!! */
#if 0/* (RTL92SE_FPGA_VERIFY == 0) */
static u1Byte RF_Path_Type = 2; /* 1 = 1T 2= 2T */
static u4Byte tx_gain_tbl1[6]
= {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100};
static u4Byte tx_gain_tbl2[6]
= {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030};
u1Byte i;
if (RF_Path_Type == 2 && (DataRate & 0xF) <= 0x7) {
/* Set TX SYNC power G2G3 loop filter */
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TXPA_G2, bRFRegOffsetMask, 0x0f000);
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TXPA_G3, bRFRegOffsetMask, 0xeacf1);
/* Change TX AGC gain table */
for (i = 0; i < 6; i++)
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl1[i]);
/* Set PA to high value */
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TXPA_G2, bRFRegOffsetMask, 0x01e39);
} else if (RF_Path_Type == 1 && (DataRate & 0xF) >= 0x8) {
/* Set TX SYNC power G2G3 loop filter */
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TXPA_G2, bRFRegOffsetMask, 0x04440);
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TXPA_G3, bRFRegOffsetMask, 0xea4f1);
/* Change TX AGC gain table */
for (i = 0; i < 6; i++)
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl2[i]);
/* Set PA low gain */
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TXPA_G2, bRFRegOffsetMask, 0x01e19);
}
#endif
} /* RF_ChangeTxPath */
/*-----------------------------------------------------------------------------
* Function: PHY_RF6052SetBandwidth()
*
* Overview: This function is called by SetBWModeCallback8190Pci() only
*
* Input: PADAPTER Adapter
* WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M
*
* Output: NONE
*
* Return: NONE
*
* Note: For RF type 0222D
*---------------------------------------------------------------------------*/
VOID
rtl8188e_PHY_RF6052SetBandwidth(
IN PADAPTER Adapter,
IN CHANNEL_WIDTH Bandwidth) /* 20M or 40M */
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
switch (Bandwidth) {
case CHANNEL_WIDTH_20:
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10) | BIT(11));
phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
break;
case CHANNEL_WIDTH_40:
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10));
phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
break;
default:
break;
}
}
static int
phy_RF6052_Config_ParaFile(
IN PADAPTER Adapter
)
{
u32 u4RegValue = 0;
u8 eRFPath;
BB_REGISTER_DEFINITION_T *pPhyReg;
int rtStatus = _SUCCESS;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
/* 3 */ /* ----------------------------------------------------------------- */
/* 3 */ /* <2> Initialize RF */
/* 3 */ /* ----------------------------------------------------------------- */
/* for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++) */
for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) {
pPhyReg = &pHalData->PHYRegDef[eRFPath];
/*----Store original RFENV control type----*/
switch (eRFPath) {
case RF_PATH_A:
case RF_PATH_C:
u4RegValue = phy_query_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
break;
case RF_PATH_B:
case RF_PATH_D:
u4RegValue = phy_query_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16);
break;
}
/*----Set RF_ENV enable----*/
phy_set_bb_reg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1);
rtw_udelay_os(1);/* PlatformStallExecution(1); */
/*----Set RF_ENV output high----*/
phy_set_bb_reg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
rtw_udelay_os(1);/* PlatformStallExecution(1); */
/* Set bit number of Address and Data for RF register */
phy_set_bb_reg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */
rtw_udelay_os(1);/* PlatformStallExecution(1); */
phy_set_bb_reg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */
rtw_udelay_os(1);/* PlatformStallExecution(1); */
/*----Initialize RF fom connfiguration file----*/
switch (eRFPath) {
case RF_PATH_A:
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
if (PHY_ConfigRFWithParaFile(Adapter, PHY_FILE_RADIO_A, eRFPath) == _FAIL)
#endif
{
#ifdef CONFIG_EMBEDDED_FWIMG
if (HAL_STATUS_FAILURE == odm_config_rf_with_header_file(&pHalData->odmpriv, CONFIG_RF_RADIO, (enum odm_rf_radio_path_e)eRFPath))
rtStatus = _FAIL;
#endif
}
break;
case RF_PATH_B:
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
if (PHY_ConfigRFWithParaFile(Adapter, PHY_FILE_RADIO_B, eRFPath) == _FAIL)
#endif
{
#ifdef CONFIG_EMBEDDED_FWIMG
if (HAL_STATUS_FAILURE == odm_config_rf_with_header_file(&pHalData->odmpriv, CONFIG_RF_RADIO, (enum odm_rf_radio_path_e)eRFPath))
rtStatus = _FAIL;
#endif
}
break;
case RF_PATH_C:
break;
case RF_PATH_D:
break;
}
/*----Restore RFENV control type----*/;
switch (eRFPath) {
case RF_PATH_A:
case RF_PATH_C:
phy_set_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
break;
case RF_PATH_B:
case RF_PATH_D:
phy_set_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue);
break;
}
if (rtStatus != _SUCCESS) {
goto phy_RF6052_Config_ParaFile_Fail;
}
}
/* 3 ----------------------------------------------------------------- */
/* 3 Configuration of Tx Power Tracking */
/* 3 ----------------------------------------------------------------- */
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
if (PHY_ConfigRFWithTxPwrTrackParaFile(Adapter, PHY_FILE_TXPWR_TRACK) == _FAIL)
#endif
{
#ifdef CONFIG_EMBEDDED_FWIMG
odm_config_rf_with_tx_pwr_track_header_file(&pHalData->odmpriv);
#endif
}
return rtStatus;
phy_RF6052_Config_ParaFile_Fail:
return rtStatus;
}
int
PHY_RF6052_Config8188E(
IN PADAPTER Adapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
int rtStatus = _SUCCESS;
/* */
/* Initialize general global value */
/* */
/* TODO: Extend RF_PATH_C and RF_PATH_D in the future */
if (pHalData->rf_type == RF_1T1R)
pHalData->NumTotalRFPath = 1;
else
pHalData->NumTotalRFPath = 2;
/* */
/* Config BB and RF */
/* */
rtStatus = phy_RF6052_Config_ParaFile(Adapter);
#if 0
switch (Adapter->MgntInfo.bRegHwParaFile) {
case 0:
phy_RF6052_Config_HardCode(Adapter);
break;
case 1:
rtStatus = phy_RF6052_Config_ParaFile(Adapter);
break;
case 2:
/* Partial Modify. */
phy_RF6052_Config_HardCode(Adapter);
phy_RF6052_Config_ParaFile(Adapter);
break;
default:
phy_RF6052_Config_HardCode(Adapter);
break;
}
#endif
return rtStatus;
}
/* End of HalRf6052.c */

94
hal/rtl8188e/rtl8188e_rxdesc.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8188E_REDESC_C_
#include <drv_types.h>
#include <rtl8188e_hal.h>
void rtl8188e_query_rx_desc_status(
union recv_frame *precvframe,
struct recv_stat *prxstat)
{
struct rx_pkt_attrib *pattrib;
struct recv_stat report;
PRXREPORT prxreport;
/* struct recv_frame_hdr *phdr; */
/* phdr = &precvframe->u.hdr; */
report.rxdw0 = le32_to_cpu(prxstat->rxdw0);
report.rxdw1 = le32_to_cpu(prxstat->rxdw1);
report.rxdw2 = le32_to_cpu(prxstat->rxdw2);
report.rxdw3 = le32_to_cpu(prxstat->rxdw3);
report.rxdw4 = le32_to_cpu(prxstat->rxdw4);
report.rxdw5 = le32_to_cpu(prxstat->rxdw5);
prxreport = (PRXREPORT)&report;
pattrib = &precvframe->u.hdr.attrib;
_rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib));
pattrib->crc_err = (u8)((report.rxdw0 >> 14) & 0x1);;/* (u8)prxreport->crc32; */
/* update rx report to recv_frame attribute */
pattrib->pkt_rpt_type = (u8)((report.rxdw3 >> 14) & 0x3);/* prxreport->rpt_sel; */
if (pattrib->pkt_rpt_type == NORMAL_RX) { /* Normal rx packet */
pattrib->pkt_len = (u16)(report.rxdw0 & 0x00003fff); /* (u16)prxreport->pktlen; */
pattrib->drvinfo_sz = (u8)((report.rxdw0 >> 16) & 0xf) * 8;/* (u8)(prxreport->drvinfosize << 3); */
pattrib->physt = (u8)((report.rxdw0 >> 26) & 0x1); /* (u8)prxreport->physt; */
pattrib->bdecrypted = (report.rxdw0 & BIT(27)) ? 0 : 1; /* (u8)(prxreport->swdec ? 0 : 1); */
pattrib->encrypt = (u8)((report.rxdw0 >> 20) & 0x7);/* (u8)prxreport->security; */
pattrib->qos = (u8)((report.rxdw0 >> 23) & 0x1);/* (u8)prxreport->qos; */
pattrib->priority = (u8)((report.rxdw1 >> 8) & 0xf);/* (u8)prxreport->tid; */
pattrib->amsdu = (u8)((report.rxdw1 >> 13) & 0x1);/* (u8)prxreport->amsdu; */
pattrib->seq_num = (u16)(report.rxdw2 & 0x00000fff);/* (u16)prxreport->seq; */
pattrib->frag_num = (u8)((report.rxdw2 >> 12) & 0xf);/* (u8)prxreport->frag; */
pattrib->mfrag = (u8)((report.rxdw1 >> 27) & 0x1);/* (u8)prxreport->mf; */
pattrib->mdata = (u8)((report.rxdw1 >> 26) & 0x1);/* (u8)prxreport->md; */
pattrib->data_rate = (u8)(report.rxdw3 & 0x3f);/* (u8)prxreport->rxmcs; */
pattrib->icv_err = (u8)((report.rxdw0 >> 15) & 0x1);/* (u8)prxreport->icverr; */
pattrib->shift_sz = (u8)((report.rxdw0 >> 24) & 0x3);
} else if (pattrib->pkt_rpt_type == TX_REPORT1) { /* CCX */
pattrib->pkt_len = TX_RPT1_PKT_LEN;
pattrib->drvinfo_sz = 0;
} else if (pattrib->pkt_rpt_type == TX_REPORT2) { /* TX RPT */
pattrib->pkt_len = (u16)(report.rxdw0 & 0x3FF); /* Rx length[9:0] */
pattrib->drvinfo_sz = 0;
/* */
/* Get TX report MAC ID valid. */
/* */
pattrib->MacIDValidEntry[0] = report.rxdw4;
pattrib->MacIDValidEntry[1] = report.rxdw5;
} else if (pattrib->pkt_rpt_type == HIS_REPORT) { /* USB HISR RPT */
pattrib->pkt_len = (u16)(report.rxdw0 & 0x00003fff); /* (u16)prxreport->pktlen; */
}
}

121
hal/rtl8188e/rtl8188e_sreset.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8188E_SRESET_C_
/* #include <rtl8188e_sreset.h> */
#include <rtl8188e_hal.h>
#ifdef DBG_CONFIG_ERROR_DETECT
void rtl8188e_sreset_xmit_status_check(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
unsigned long current_time;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
unsigned int diff_time;
u32 txdma_status;
txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS);
if (txdma_status != 0x00 && txdma_status != 0xeaeaeaea) {
RTW_INFO("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status);
rtw_hal_sreset_reset(padapter);
}
#ifdef CONFIG_USB_HCI
/* total xmit irp = 4 */
/* RTW_INFO("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); */
/* if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) */
current_time = rtw_get_current_time();
if (0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) {
diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time);
if (diff_time > 2000) {
if (psrtpriv->last_tx_complete_time == 0)
psrtpriv->last_tx_complete_time = current_time;
else {
diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time);
if (diff_time > 4000) {
u32 ability = 0;
/* padapter->Wifi_Error_Status = WIFI_TX_HANG; */
ability = rtw_phydm_ability_get(padapter);
RTW_INFO("%s tx hang %s\n", __FUNCTION__,
(ability & ODM_BB_ADAPTIVITY) ? "ODM_BB_ADAPTIVITY" : "");
if (!(ability & ODM_BB_ADAPTIVITY))
rtw_hal_sreset_reset(padapter);
}
}
}
}
#endif /* CONFIG_USB_HCI */
if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) {
psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
rtw_hal_sreset_reset(padapter);
return;
}
}
void rtl8188e_sreset_linked_status_check(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
u32 rx_dma_status = 0;
u8 fw_status = 0;
rx_dma_status = rtw_read32(padapter, REG_RXDMA_STATUS);
if (rx_dma_status != 0x00) {
RTW_INFO("%s REG_RXDMA_STATUS:0x%08x\n", __FUNCTION__, rx_dma_status);
rtw_write32(padapter, REG_RXDMA_STATUS, rx_dma_status);
}
fw_status = rtw_read8(padapter, REG_FMETHR);
if (fw_status != 0x00) {
if (fw_status == 1)
RTW_INFO("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !!\n", __FUNCTION__, fw_status);
else if (fw_status == 2)
RTW_INFO("%s REG_FW_STATUS (0x%02x), Condition_No_Match !!\n", __FUNCTION__, fw_status);
}
#if 0
u32 regc50, regc58, reg824, reg800;
regc50 = rtw_read32(padapter, 0xc50);
regc58 = rtw_read32(padapter, 0xc58);
reg824 = rtw_read32(padapter, 0x824);
reg800 = rtw_read32(padapter, 0x800);
if (((regc50 & 0xFFFFFF00) != 0x69543400) ||
((regc58 & 0xFFFFFF00) != 0x69543400) ||
(((reg824 & 0xFFFFFF00) != 0x00390000) && (((reg824 & 0xFFFFFF00) != 0x80390000))) ||
(((reg800 & 0xFFFFFF00) != 0x03040000) && ((reg800 & 0xFFFFFF00) != 0x83040000))) {
RTW_INFO("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__,
regc50, regc58, reg824, reg800);
rtw_hal_sreset_reset(padapter);
}
#endif
if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) {
psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
rtw_hal_sreset_reset(padapter);
return;
}
}
#endif

306
hal/rtl8188e/rtl8188e_xmit.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8188E_XMIT_C_
#include <drv_types.h>
#include <rtl8188e_hal.h>
#ifdef CONFIG_XMIT_ACK
void dump_txrpt_ccx_88e(void *buf)
{
struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf;
RTW_INFO("%s:\n"
"tag1:%u, pkt_num:%u, txdma_underflow:%u, int_bt:%u, int_tri:%u, int_ccx:%u\n"
"mac_id:%u, pkt_ok:%u, bmc:%u\n"
"retry_cnt:%u, lifetime_over:%u, retry_over:%u\n"
"ccx_qtime:%u\n"
"final_data_rate:0x%02x\n"
"qsel:%u, sw:0x%03x\n"
, __func__
, txrpt_ccx->tag1, txrpt_ccx->pkt_num, txrpt_ccx->txdma_underflow, txrpt_ccx->int_bt, txrpt_ccx->int_tri, txrpt_ccx->int_ccx
, txrpt_ccx->mac_id, txrpt_ccx->pkt_ok, txrpt_ccx->bmc
, txrpt_ccx->retry_cnt, txrpt_ccx->lifetime_over, txrpt_ccx->retry_over
, txrpt_ccx_qtime_88e(txrpt_ccx)
, txrpt_ccx->final_data_rate
, txrpt_ccx->qsel, txrpt_ccx_sw_88e(txrpt_ccx)
);
}
void handle_txrpt_ccx_88e(_adapter *adapter, u8 *buf)
{
struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf;
#ifdef DBG_CCX
dump_txrpt_ccx_88e(buf);
#endif
if (txrpt_ccx->int_ccx) {
if (txrpt_ccx->pkt_ok)
rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_SUCCESS);
else
rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_CCX_PKT_FAIL);
}
}
#endif /* CONFIG_XMIT_ACK */
void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc)
{
u8 bDumpTxPkt;
u8 bDumpTxDesc = _FALSE;
rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DUMP_TXPKT, &(bDumpTxPkt));
if (bDumpTxPkt == 1) { /* dump txdesc for data frame */
RTW_INFO("dump tx_desc for data frame\n");
if ((frame_tag & 0x0f) == DATA_FRAMETAG)
bDumpTxDesc = _TRUE;
} else if (bDumpTxPkt == 2) { /* dump txdesc for mgnt frame */
RTW_INFO("dump tx_desc for mgnt frame\n");
if ((frame_tag & 0x0f) == MGNT_FRAMETAG)
bDumpTxDesc = _TRUE;
} else if (bDumpTxPkt == 3) { /* dump early info */
}
if (bDumpTxDesc) {
/* ptxdesc->txdw4 = cpu_to_le32(0x00001006); */ /* RTS Rate=24M */
/* ptxdesc->txdw6 = 0x6666f800; */
RTW_INFO("=====================================\n");
RTW_INFO("txdw0(0x%08x)\n", ptxdesc->txdw0);
RTW_INFO("txdw1(0x%08x)\n", ptxdesc->txdw1);
RTW_INFO("txdw2(0x%08x)\n", ptxdesc->txdw2);
RTW_INFO("txdw3(0x%08x)\n", ptxdesc->txdw3);
RTW_INFO("txdw4(0x%08x)\n", ptxdesc->txdw4);
RTW_INFO("txdw5(0x%08x)\n", ptxdesc->txdw5);
RTW_INFO("txdw6(0x%08x)\n", ptxdesc->txdw6);
RTW_INFO("txdw7(0x%08x)\n", ptxdesc->txdw7);
RTW_INFO("=====================================\n");
}
}
/*
* Description:
* Aggregation packets and send to hardware
*
* Return:
* 0 Success
* -1 Hardware resource(TX FIFO) not ready
* -2 Software resource(xmitbuf) not ready
*/
#ifdef CONFIG_TX_EARLY_MODE
/* #define DBG_EMINFO */
#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
#define EARLY_MODE_MAX_PKT_NUM 10
#else
#define EARLY_MODE_MAX_PKT_NUM 5
#endif
struct EMInfo {
u8 EMPktNum;
u16 EMPktLen[EARLY_MODE_MAX_PKT_NUM];
};
void
InsertEMContent_8188E(
struct EMInfo *pEMInfo,
IN pu1Byte VirtualAddress)
{
#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
u1Byte index = 0;
u4Byte dwtmp = 0;
#endif
_rtw_memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE);
if (pEMInfo->EMPktNum == 0)
return;
#ifdef DBG_EMINFO
{
int i;
RTW_INFO("\n%s ==> pEMInfo->EMPktNum =%d\n", __FUNCTION__, pEMInfo->EMPktNum);
for (i = 0; i < EARLY_MODE_MAX_PKT_NUM; i++)
RTW_INFO("%s ==> pEMInfo->EMPktLen[%d] =%d\n", __FUNCTION__, i, pEMInfo->EMPktLen[i]);
}
#endif
#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
if (pEMInfo->EMPktNum == 1)
dwtmp = pEMInfo->EMPktLen[0];
else {
dwtmp = pEMInfo->EMPktLen[0];
dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
dwtmp += pEMInfo->EMPktLen[1];
}
SET_EARLYMODE_LEN0(VirtualAddress, dwtmp);
if (pEMInfo->EMPktNum <= 3)
dwtmp = pEMInfo->EMPktLen[2];
else {
dwtmp = pEMInfo->EMPktLen[2];
dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
dwtmp += pEMInfo->EMPktLen[3];
}
SET_EARLYMODE_LEN1(VirtualAddress, dwtmp);
if (pEMInfo->EMPktNum <= 5)
dwtmp = pEMInfo->EMPktLen[4];
else {
dwtmp = pEMInfo->EMPktLen[4];
dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
dwtmp += pEMInfo->EMPktLen[5];
}
SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp & 0xF);
SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp >> 4);
if (pEMInfo->EMPktNum <= 7)
dwtmp = pEMInfo->EMPktLen[6];
else {
dwtmp = pEMInfo->EMPktLen[6];
dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
dwtmp += pEMInfo->EMPktLen[7];
}
SET_EARLYMODE_LEN3(VirtualAddress, dwtmp);
if (pEMInfo->EMPktNum <= 9)
dwtmp = pEMInfo->EMPktLen[8];
else {
dwtmp = pEMInfo->EMPktLen[8];
dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
dwtmp += pEMInfo->EMPktLen[9];
}
SET_EARLYMODE_LEN4(VirtualAddress, dwtmp);
#else
SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]);
SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]);
SET_EARLYMODE_LEN2_1(VirtualAddress, pEMInfo->EMPktLen[2] & 0xF);
SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2] >> 4);
SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]);
SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]);
#endif
}
void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
{
/* _adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq */
int index, j;
u16 offset, pktlen;
PTXDESC_8188E ptxdesc;
u8 *pmem, *pEMInfo_mem;
s8 node_num_0 = 0, node_num_1 = 0;
struct EMInfo eminfo;
struct agg_pkt_info *paggpkt;
struct xmit_frame *pframe = (struct xmit_frame *)pxmitbuf->priv_data;
pmem = pframe->buf_addr;
#ifdef DBG_EMINFO
RTW_INFO("\n%s ==> agg_num:%d\n", __FUNCTION__, pframe->agg_num);
for (index = 0; index < pframe->agg_num; index++) {
offset = pxmitpriv->agg_pkt[index].offset;
pktlen = pxmitpriv->agg_pkt[index].pkt_len;
RTW_INFO("%s ==> agg_pkt[%d].offset=%d\n", __FUNCTION__, index, offset);
RTW_INFO("%s ==> agg_pkt[%d].pkt_len=%d\n", __FUNCTION__, index, pktlen);
}
#endif
if (pframe->agg_num > EARLY_MODE_MAX_PKT_NUM) {
node_num_0 = pframe->agg_num;
node_num_1 = EARLY_MODE_MAX_PKT_NUM - 1;
}
for (index = 0; index < pframe->agg_num; index++) {
offset = pxmitpriv->agg_pkt[index].offset;
pktlen = pxmitpriv->agg_pkt[index].pkt_len;
_rtw_memset(&eminfo, 0, sizeof(struct EMInfo));
if (pframe->agg_num > EARLY_MODE_MAX_PKT_NUM) {
if (node_num_0 > EARLY_MODE_MAX_PKT_NUM) {
eminfo.EMPktNum = EARLY_MODE_MAX_PKT_NUM;
node_num_0--;
} else {
eminfo.EMPktNum = node_num_1;
node_num_1--;
}
} else
eminfo.EMPktNum = pframe->agg_num - (index + 1);
for (j = 0; j < eminfo.EMPktNum ; j++) {
eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index + 1 + j].pkt_len + 4; /* 4 bytes CRC */
}
if (pmem) {
if (index == 0) {
ptxdesc = (PTXDESC_8188E)(pmem);
pEMInfo_mem = ((u8 *)ptxdesc) + TXDESC_SIZE;
} else {
pmem = pmem + pxmitpriv->agg_pkt[index - 1].offset;
ptxdesc = (PTXDESC_8188E)(pmem);
pEMInfo_mem = ((u8 *)ptxdesc) + TXDESC_SIZE;
}
#ifdef DBG_EMINFO
RTW_INFO("%s ==> desc.pkt_len=%d\n", __FUNCTION__, ptxdesc->pktlen);
#endif
InsertEMContent_8188E(&eminfo, pEMInfo_mem);
}
}
_rtw_memset(pxmitpriv->agg_pkt, 0, sizeof(struct agg_pkt_info) * MAX_AGG_PKT_NUM);
}
#endif
#if defined(CONFIG_CONCURRENT_MODE)
void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc)
{
if ((pattrib->encrypt > 0) && (!pattrib->bswenc)
&& (pattrib->bmc_camid != INVALID_SEC_MAC_CAM_ID)) {
ptxdesc->txdw1 |= cpu_to_le32((0x01 << 21) & 0x00200000);
ptxdesc->txdw1 |= cpu_to_le32((pattrib->bmc_camid) & 0x1f);
}
}
#endif
void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc)
{
u16 *usPtr = (u16 *)ptxdesc;
u32 count = 16; /* (32 bytes / 2 bytes per XOR) => 16 times */
u32 index;
u16 checksum = 0;
/* Clear first */
ptxdesc->txdw7 &= cpu_to_le32(0xffff0000);
for (index = 0; index < count; index++)
checksum ^= le16_to_cpu(*(usPtr + index));
ptxdesc->txdw7 |= cpu_to_le32(checksum & 0x0000ffff);
}

160
hal/rtl8188e/usb/rtl8188eu_led.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include <drv_types.h>
#include <rtl8188e_hal.h>
/* ********************************************************************************
* LED object.
* ******************************************************************************** */
/* ********************************************************************************
* Prototype of protected function.
* ******************************************************************************** */
/* ********************************************************************************
* LED_819xUsb routines.
* ******************************************************************************** */
/*
* Description:
* Turn on LED according to LedPin specified.
* */
static void
SwLedOn_8188EU(
_adapter *padapter,
PLED_USB pLed
)
{
u8 LedCfg;
/* HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); */
if (RTW_CANNOT_RUN(padapter))
return;
LedCfg = rtw_read8(padapter, REG_LEDCFG2);
switch (pLed->LedPin) {
case LED_PIN_LED0:
rtw_write8(padapter, REG_LEDCFG2, (LedCfg & 0xf0) | BIT5 | BIT6); /* SW control led0 on. */
break;
case LED_PIN_LED1:
rtw_write8(padapter, REG_LEDCFG2, (LedCfg & 0x0f) | BIT5); /* SW control led1 on. */
break;
default:
break;
}
pLed->bLedOn = _TRUE;
}
/*
* Description:
* Turn off LED according to LedPin specified.
* */
static void
SwLedOff_8188EU(
_adapter *padapter,
PLED_USB pLed
)
{
u8 LedCfg;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if (RTW_CANNOT_RUN(padapter))
goto exit;
LedCfg = rtw_read8(padapter, REG_LEDCFG2);/* 0x4E */
switch (pLed->LedPin) {
case LED_PIN_LED0:
if (pHalData->bLedOpenDrain == _TRUE) { /* Open-drain arrangement for controlling the LED) */
LedCfg &= 0x90; /* Set to software control. */
rtw_write8(padapter, REG_LEDCFG2, (LedCfg | BIT3));
LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG);
LedCfg &= 0xFE;
rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg);
} else
rtw_write8(padapter, REG_LEDCFG2, (LedCfg | BIT3 | BIT5 | BIT6));
break;
case LED_PIN_LED1:
LedCfg &= 0x0f; /* Set to software control. */
rtw_write8(padapter, REG_LEDCFG2, (LedCfg | BIT3));
break;
default:
break;
}
exit:
pLed->bLedOn = _FALSE;
}
/* ********************************************************************************
* Interface to manipulate LED objects.
* ******************************************************************************** */
/* ********************************************************************************
* Default LED behavior.
* ******************************************************************************** */
/*
* Description:
* Initialize all LED_871x objects.
* */
void
rtl8188eu_InitSwLeds(
_adapter *padapter
)
{
struct led_priv *pledpriv = &(padapter->ledpriv);
pledpriv->LedControlHandler = LedControlUSB;
pledpriv->SwLedOn = SwLedOn_8188EU;
pledpriv->SwLedOff = SwLedOff_8188EU;
InitLed(padapter, &(pledpriv->SwLed0), LED_PIN_LED0);
InitLed(padapter, &(pledpriv->SwLed1), LED_PIN_LED1);
}
/*
* Description:
* DeInitialize all LED_819xUsb objects.
* */
void
rtl8188eu_DeInitSwLeds(
_adapter *padapter
)
{
struct led_priv *ledpriv = &(padapter->ledpriv);
DeInitLed(&(ledpriv->SwLed0));
DeInitLed(&(ledpriv->SwLed1));
}

33
hal/rtl8188e/usb/rtl8188eu_recv.c Normal file
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@ -0,0 +1,33 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8188EU_RECV_C_
#include <drv_types.h>
#include <rtl8188e_hal.h>
int rtl8188eu_init_recv_priv(_adapter *padapter)
{
return usb_init_recv_priv(padapter, INTERRUPT_MSG_FORMAT_LEN);
}
void rtl8188eu_free_recv_priv(_adapter *padapter)
{
usb_free_recv_priv(padapter, INTERRUPT_MSG_FORMAT_LEN);
}

1297
hal/rtl8188e/usb/rtl8188eu_xmit.c Normal file
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2610
hal/rtl8188e/usb/usb_halinit.c Normal file
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293
hal/rtl8188e/usb/usb_ops_linux.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _HCI_OPS_OS_C_
#include <drv_types.h>
#include <rtl8188e_hal.h>
#ifdef CONFIG_SUPPORT_USB_INT
void interrupt_handler_8188eu(_adapter *padapter, u16 pkt_len, u8 *pbuf)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct reportpwrstate_parm pwr_rpt;
if (pkt_len != INTERRUPT_MSG_FORMAT_LEN) {
RTW_INFO("%s Invalid interrupt content length (%d)!\n", __FUNCTION__, pkt_len);
return ;
}
/* HISR */
_rtw_memcpy(&(pHalData->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4);
_rtw_memcpy(&(pHalData->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4);
#if 0 /* DBG */
{
u32 hisr = 0 , hisr_ex = 0;
_rtw_memcpy(&hisr, &(pHalData->IntArray[0]), 4);
hisr = le32_to_cpu(hisr);
_rtw_memcpy(&hisr_ex, &(pHalData->IntArray[1]), 4);
hisr_ex = le32_to_cpu(hisr_ex);
if ((hisr != 0) || (hisr_ex != 0))
RTW_INFO("===> %s hisr:0x%08x ,hisr_ex:0x%08x\n", __FUNCTION__, hisr, hisr_ex);
}
#endif
#ifdef CONFIG_LPS_LCLK
if (pHalData->IntArray[0] & IMR_CPWM_88E) {
_rtw_memcpy(&pwr_rpt.state, &(pbuf[USB_INTR_CONTENT_CPWM1_OFFSET]), 1);
/* _rtw_memcpy(&pwr_rpt.state2, &(pbuf[USB_INTR_CONTENT_CPWM2_OFFSET]), 1); */
/* 88e's cpwm value only change BIT0, so driver need to add PS_STATE_S2 for LPS flow. */
pwr_rpt.state |= PS_STATE_S2;
_set_workitem(&(adapter_to_pwrctl(padapter)->cpwm_event));
}
#endif/* CONFIG_LPS_LCLK */
#ifdef CONFIG_INTERRUPT_BASED_TXBCN
#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
if (pHalData->IntArray[0] & IMR_BCNDMAINT0_88E) /*only for BCN_0*/
#endif
#ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
if (pHalData->IntArray[0] & (IMR_TBDER_88E | IMR_TBDOK_88E))
#endif
{
#if 0
if (pHalData->IntArray[0] & IMR_BCNDMAINT0_88E)
RTW_INFO("%s: HISR_BCNERLY_INT\n", __func__);
if (pHalData->IntArray[0] & IMR_TBDOK_88E)
RTW_INFO("%s: HISR_TXBCNOK\n", __func__);
if (pHalData->IntArray[0] & IMR_TBDER_88E)
RTW_INFO("%s: HISR_TXBCNERR\n", __func__);
#endif
rtw_mi_set_tx_beacon_cmd(padapter);
}
#endif /* CONFIG_INTERRUPT_BASED_TXBCN */
#ifdef DBG_CONFIG_ERROR_DETECT_INT
if (pHalData->IntArray[1] & IMR_TXERR_88E)
RTW_INFO("===> %s Tx Error Flag Interrupt Status\n", __FUNCTION__);
if (pHalData->IntArray[1] & IMR_RXERR_88E)
RTW_INFO("===> %s Rx Error Flag INT Status\n", __FUNCTION__);
if (pHalData->IntArray[1] & IMR_TXFOVW_88E)
RTW_INFO("===> %s Transmit FIFO Overflow\n", __FUNCTION__);
if (pHalData->IntArray[1] & IMR_RXFOVW_88E)
RTW_INFO("===> %s Receive FIFO Overflow\n", __FUNCTION__);
#endif/* DBG_CONFIG_ERROR_DETECT_INT */
#ifdef CONFIG_FW_C2H_REG
/* C2H Event */
if (pbuf[0] != 0)
usb_c2h_hisr_hdl(padapter, pbuf);
#endif
}
#endif
int recvbuf2recvframe(PADAPTER padapter, void *ptr)
{
u8 *pbuf;
u16 pkt_cnt;
u32 pkt_offset;
s32 transfer_len;
struct recv_stat *prxstat;
u8 *pphy_status = NULL;
union recv_frame *precvframe = NULL;
struct rx_pkt_attrib *pattrib = NULL;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct recv_priv *precvpriv = &padapter->recvpriv;
_queue *pfree_recv_queue = &precvpriv->free_recv_queue;
_pkt *pskb;
#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
pskb = NULL;
transfer_len = (s32)((struct recv_buf *)ptr)->transfer_len;
pbuf = ((struct recv_buf *)ptr)->pbuf;
#else
pskb = (_pkt *)ptr;
transfer_len = (s32)pskb->len;
pbuf = pskb->data;
#endif
prxstat = (struct recv_stat *)pbuf;
pkt_cnt = (le32_to_cpu(prxstat->rxdw2) >> 16) & 0xff;
#if 0 /* temp remove when disable usb rx aggregation */
if ((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_len < RXDESC_SIZE) || (pkt_len <= 0))
return _FAIL;
#endif
do {
prxstat = (struct recv_stat *)pbuf;
precvframe = rtw_alloc_recvframe(pfree_recv_queue);
if (precvframe == NULL) {
RTW_INFO("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__);
goto _exit_recvbuf2recvframe;
}
_rtw_init_listhead(&precvframe->u.hdr.list);
precvframe->u.hdr.precvbuf = NULL; /* can't access the precvbuf for new arch. */
precvframe->u.hdr.len = 0;
rtl8188e_query_rx_desc_status(precvframe, prxstat);
pattrib = &precvframe->u.hdr.attrib;
if ((padapter->registrypriv.mp_mode == 0) && ((pattrib->crc_err) || (pattrib->icv_err))) {
RTW_INFO("%s: RX Warning! crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err);
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len;
if ((pattrib->pkt_len <= 0) || (pkt_offset > transfer_len)) {
RTW_INFO("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfoer_len\n", __FUNCTION__, __LINE__);
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
#ifdef CONFIG_RX_PACKET_APPEND_FCS
if (check_fwstate(&padapter->mlmepriv, WIFI_MONITOR_STATE) == _FALSE)
if ((pattrib->pkt_rpt_type == NORMAL_RX) && (pHalData->ReceiveConfig & RCR_APPFCS))
pattrib->pkt_len -= IEEE80211_FCS_LEN;
#endif
if (rtw_os_alloc_recvframe(padapter, precvframe,
(pbuf + pattrib->shift_sz + pattrib->drvinfo_sz + RXDESC_SIZE), pskb) == _FAIL) {
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
recvframe_put(precvframe, pattrib->pkt_len);
/* recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); */
if (pattrib->pkt_rpt_type == NORMAL_RX) { /* Normal rx packet */
if (pattrib->physt)
pphy_status = pbuf + RXDESC_OFFSET;
#ifdef CONFIG_CONCURRENT_MODE
pre_recv_entry(precvframe, pphy_status);
#endif /*CONFIG_CONCURRENT_MODE*/
if (pattrib->physt && pphy_status)
rx_query_phy_status(precvframe, pphy_status);
rtw_recv_entry(precvframe);
} else { /* pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP */
/* enqueue recvframe to txrtp queue */
if (pattrib->pkt_rpt_type == TX_REPORT1) {
/* RTW_INFO("rx CCX\n"); */
/* CCX-TXRPT ack for xmit mgmt frames. */
handle_txrpt_ccx_88e(padapter, precvframe->u.hdr.rx_data);
} else if (pattrib->pkt_rpt_type == TX_REPORT2) {
/* RTW_INFO("recv TX RPT\n"); */
odm_ra_tx_rpt2_handle_8188e(
&pHalData->odmpriv,
precvframe->u.hdr.rx_data,
pattrib->pkt_len,
pattrib->MacIDValidEntry[0],
pattrib->MacIDValidEntry[1]
);
} else if (pattrib->pkt_rpt_type == HIS_REPORT) {
/* RTW_INFO("%s , rx USB HISR\n",__FUNCTION__); */
#ifdef CONFIG_SUPPORT_USB_INT
interrupt_handler_8188eu(padapter, pattrib->pkt_len, precvframe->u.hdr.rx_data);
#endif
}
rtw_free_recvframe(precvframe, pfree_recv_queue);
}
#ifdef CONFIG_USB_RX_AGGREGATION
switch (pHalData->rxagg_mode) {
case RX_AGG_DMA:
case RX_AGG_MIX:
pkt_offset = (u16)_RND128(pkt_offset);
break;
case RX_AGG_USB:
pkt_offset = (u16)_RND4(pkt_offset);
break;
case RX_AGG_DISABLE:
default:
break;
}
#endif
pkt_cnt--;
transfer_len -= pkt_offset;
pbuf += pkt_offset;
precvframe = NULL;
if (transfer_len > 0 && pkt_cnt == 0)
pkt_cnt = (le32_to_cpu(prxstat->rxdw2) >> 16) & 0xff;
} while ((transfer_len > 0) && (pkt_cnt > 0));
_exit_recvbuf2recvframe:
return _SUCCESS;
}
void rtl8188eu_xmit_tasklet(void *priv)
{
int ret = _FALSE;
_adapter *padapter = (_adapter *)priv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
while (1) {
if (RTW_CANNOT_TX(padapter)) {
RTW_INFO("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n");
break;
}
if (rtw_xmit_ac_blocked(padapter) == _TRUE)
break;
ret = rtl8188eu_xmitframe_complete(padapter, pxmitpriv, NULL);
if (ret == _FALSE)
break;
}
}
void rtl8188eu_set_hw_type(struct dvobj_priv *pdvobj)
{
pdvobj->HardwareType = HARDWARE_TYPE_RTL8188EU;
RTW_INFO("CHIP TYPE: RTL8188E\n");
}