rtl8188eu: Convert typedef statements in include/rtl8188e_hal.h

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2013-07-26 15:54:27 -05:00
parent 75fa3f7c0b
commit 7161cf35ba
2 changed files with 35 additions and 58 deletions

View file

@ -649,14 +649,14 @@ s32 rtl8188e_FirmwareDownload(PADAPTER padapter)
u32 FwImageWoWLANLen; u32 FwImageWoWLANLen;
#endif #endif
u8 *pucMappedFile = NULL; u8 *pucMappedFile = NULL;
PRT_FIRMWARE_8188E pFirmware = NULL; struct rt_firmware *pFirmware = NULL;
PRT_8188E_FIRMWARE_HDR pFwHdr = NULL; struct rt_firmware_hdr *pFwHdr = NULL;
u8 *pFirmwareBuf; u8 *pFirmwareBuf;
u32 FirmwareLen; u32 FirmwareLen;
RT_TRACE(_module_hal_init_c_, _drv_info_, ("+%s\n", __func__)); RT_TRACE(_module_hal_init_c_, _drv_info_, ("+%s\n", __func__));
pFirmware = (PRT_FIRMWARE_8188E)rtw_zmalloc(sizeof(RT_FIRMWARE_8188E)); pFirmware = (struct rt_firmware *)rtw_zmalloc(sizeof(struct rt_firmware));
if (!pFirmware) if (!pFirmware)
{ {
@ -715,7 +715,7 @@ s32 rtl8188e_FirmwareDownload(PADAPTER padapter)
if (bUsedWoWLANFw) { if (bUsedWoWLANFw) {
pFirmwareBuf = pFirmware->szWoWLANFwBuffer; pFirmwareBuf = pFirmware->szWoWLANFwBuffer;
FirmwareLen = pFirmware->ulWoWLANFwLength; FirmwareLen = pFirmware->ulWoWLANFwLength;
pFwHdr = (PRT_8188E_FIRMWARE_HDR)pFirmware->szWoWLANFwBuffer; pFwHdr = (struct rt_firmware_hdr *)pFirmware->szWoWLANFwBuffer;
} else } else
#endif #endif
{ {
@ -724,7 +724,7 @@ s32 rtl8188e_FirmwareDownload(PADAPTER padapter)
DBG_88E_LEVEL(_drv_info_, "+%s: !bUsedWoWLANFw, FmrmwareLen:%d+\n", __func__, FirmwareLen); DBG_88E_LEVEL(_drv_info_, "+%s: !bUsedWoWLANFw, FmrmwareLen:%d+\n", __func__, FirmwareLen);
/* To Check Fw header. Added by tynli. 2009.12.04. */ /* To Check Fw header. Added by tynli. 2009.12.04. */
pFwHdr = (PRT_8188E_FIRMWARE_HDR)pFirmware->szFwBuffer; pFwHdr = (struct rt_firmware_hdr *)pFirmware->szFwBuffer;
} }
pHalData->FirmwareVersion = le16_to_cpu(pFwHdr->Version); pHalData->FirmwareVersion = le16_to_cpu(pFwHdr->Version);
@ -783,7 +783,7 @@ s32 rtl8188e_FirmwareDownload(PADAPTER padapter)
Exit: Exit:
if (pFirmware) if (pFirmware)
rtw_mfree((u8*)pFirmware, sizeof(RT_FIRMWARE_8188E)); rtw_mfree((u8*)pFirmware, sizeof(struct rt_firmware));
#ifdef CONFIG_WOWLAN #ifdef CONFIG_WOWLAN
if (padapter->pwrctrlpriv.wowlan_mode) if (padapter->pwrctrlpriv.wowlan_mode)
@ -2715,14 +2715,14 @@ Hal_EEValueCheck(
static void static void
Hal_ReadPowerValueFromPROM_8188E( Hal_ReadPowerValueFromPROM_8188E(
PTxPowerInfo24G pwrInfo24G, struct txpowerinfo24g *pwrInfo24G,
u8* PROMContent, u8* PROMContent,
bool AutoLoadFail bool AutoLoadFail
) )
{ {
u32 rfPath, eeAddr=EEPROM_TX_PWR_INX_88E, group,TxCount=0; u32 rfPath, eeAddr=EEPROM_TX_PWR_INX_88E, group,TxCount=0;
_rtw_memset(pwrInfo24G, 0, sizeof(TxPowerInfo24G)); _rtw_memset(pwrInfo24G, 0, sizeof(struct txpowerinfo24g));
if (AutoLoadFail) if (AutoLoadFail)
{ {
@ -2954,7 +2954,7 @@ Hal_ReadTxPowerInfo88E(
) )
{ {
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter); struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
TxPowerInfo24G pwrInfo24G; struct txpowerinfo24g pwrInfo24G;
u8 rfPath, ch, group, rfPathMax=1; u8 rfPath, ch, group, rfPathMax=1;
u8 pwr, diff,bIn24G,TxCount; u8 pwr, diff,bIn24G,TxCount;

View file

@ -82,13 +82,13 @@
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300 ||\ (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300 ||\
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88E0) (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88E0)
typedef enum _FIRMWARE_SOURCE { enum firmware_source {
FW_SOURCE_IMG_FILE = 0, FW_SOURCE_IMG_FILE = 0,
FW_SOURCE_HEADER_FILE = 1, //from header file FW_SOURCE_HEADER_FILE = 1, //from header file
} FIRMWARE_SOURCE, *PFIRMWARE_SOURCE; };
typedef struct _RT_FIRMWARE { struct rt_firmware {
FIRMWARE_SOURCE eFWSource; enum firmware_source eFWSource;
u8* szFwBuffer; u8* szFwBuffer;
u32 ulFwLength; u32 ulFwLength;
@ -96,14 +96,11 @@ typedef struct _RT_FIRMWARE {
u8* szWoWLANFwBuffer; u8* szWoWLANFwBuffer;
u32 ulWoWLANFwLength; u32 ulWoWLANFwLength;
#endif //CONFIG_WOWLAN #endif //CONFIG_WOWLAN
} RT_FIRMWARE, *PRT_FIRMWARE, RT_FIRMWARE_8188E, *PRT_FIRMWARE_8188E; };
// // This structure must be careful with byte-ordering
// This structure must be cared byte-ordering
//
typedef struct _RT_8188E_FIRMWARE_HDR struct rt_firmware_hdr {
{
// 8-byte alinment required // 8-byte alinment required
//--- LONG WORD 0 ---- //--- LONG WORD 0 ----
@ -120,28 +117,28 @@ typedef struct _RT_8188E_FIRMWARE_HDR
u8 Date; // Release time Date field u8 Date; // Release time Date field
u8 Hour; // Release time Hour field u8 Hour; // Release time Hour field
u8 Minute; // Release time Minute field u8 Minute; // Release time Minute field
u16 RamCodeSize; // The size of RAM code __le16 RamCodeSize; // The size of RAM code
u8 Foundry; u8 Foundry;
u8 Rsvd2; u8 Rsvd2;
//--- LONG WORD 2 ---- //--- LONG WORD 2 ----
u32 SvnIdx; // The SVN entry index __le32 SvnIdx; // The SVN entry index
u32 Rsvd3; u32 Rsvd3;
//--- LONG WORD 3 ---- //--- LONG WORD 3 ----
u32 Rsvd4; u32 Rsvd4;
u32 Rsvd5; u32 Rsvd5;
}RT_8188E_FIRMWARE_HDR, *PRT_8188E_FIRMWARE_HDR; };
#define DRIVER_EARLY_INT_TIME 0x05 #define DRIVER_EARLY_INT_TIME 0x05
#define BCN_DMA_ATIME_INT_TIME 0x02 #define BCN_DMA_ATIME_INT_TIME 0x02
typedef enum _USB_RX_AGG_MODE{ enum usb_rx_agg_mode {
USB_RX_AGG_DISABLE, USB_RX_AGG_DISABLE,
USB_RX_AGG_DMA, USB_RX_AGG_DMA,
USB_RX_AGG_USB, USB_RX_AGG_USB,
USB_RX_AGG_MIX USB_RX_AGG_MIX
}USB_RX_AGG_MODE; };
#define MAX_RX_DMA_BUFFER_SIZE_88E 0x2400 //9k for 88E nornal chip , //MaxRxBuff=10k-max(TxReportSize(64*8), WOLPattern(16*24)) #define MAX_RX_DMA_BUFFER_SIZE_88E 0x2400 //9k for 88E nornal chip , //MaxRxBuff=10k-max(TxReportSize(64*8), WOLPattern(16*24))
@ -196,22 +193,7 @@ enum ChannelPlan
CHPL_WORLD = 10, CHPL_WORLD = 10,
}; };
typedef struct _TxPowerInfo struct txpowerinfo24g {
{
u8 CCKIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX_88E];
u8 HT40_1SIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX_88E];
u8 HT40_2SIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX_88E];
u8 HT20IndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX_88E];
u8 OFDMIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX_88E];
u8 HT40MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX_88E];
u8 HT20MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX_88E];
u8 TSSI_A[3];
u8 TSSI_B[3];
u8 TSSI_A_5G[3]; //5GL/5GM/5GH
u8 TSSI_B_5G[3];
} TxPowerInfo, *PTxPowerInfo;
typedef struct _TxPowerInfo24G{
u1Byte IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; u1Byte IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
u1Byte IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G-1]; u1Byte IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G-1];
//If only one tx, only BW20 and OFDM are used. //If only one tx, only BW20 and OFDM are used.
@ -219,7 +201,7 @@ typedef struct _TxPowerInfo24G{
s1Byte OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s1Byte OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s1Byte BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s1Byte BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s1Byte BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s1Byte BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT];
}TxPowerInfo24G, *PTxPowerInfo24G; };
#define EFUSE_REAL_CONTENT_LEN 512 #define EFUSE_REAL_CONTENT_LEN 512
#define EFUSE_MAP_LEN 128 #define EFUSE_MAP_LEN 128
@ -265,34 +247,33 @@ typedef struct _TxPowerInfo24G{
// //
// <Roger_Notes> For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06. // <Roger_Notes> For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06.
// //
typedef enum _RT_MULTI_FUNC { enum rt_multi_func {
RT_MULTI_FUNC_NONE = 0x00, RT_MULTI_FUNC_NONE = 0x00,
RT_MULTI_FUNC_WIFI = 0x01, RT_MULTI_FUNC_WIFI = 0x01,
RT_MULTI_FUNC_BT = 0x02, RT_MULTI_FUNC_BT = 0x02,
RT_MULTI_FUNC_GPS = 0x04, RT_MULTI_FUNC_GPS = 0x04,
} RT_MULTI_FUNC, *PRT_MULTI_FUNC; };
// //
// <Roger_Notes> For RTL8723 WiFi PDn/GPIO polarity control configuration. 2010.10.08. // <Roger_Notes> For RTL8723 WiFi PDn/GPIO polarity control configuration. 2010.10.08.
// //
typedef enum _RT_POLARITY_CTL { enum rt_polarity_ctl {
RT_POLARITY_LOW_ACT = 0, RT_POLARITY_LOW_ACT = 0,
RT_POLARITY_HIGH_ACT = 1, RT_POLARITY_HIGH_ACT = 1,
} RT_POLARITY_CTL, *PRT_POLARITY_CTL; };
// For RTL8723 regulator mode. by tynli. 2011.01.14. // For RTL8723 regulator mode. by tynli. 2011.01.14.
typedef enum _RT_REGULATOR_MODE { enum rt_regulator_mode {
RT_SWITCHING_REGULATOR = 0, RT_SWITCHING_REGULATOR = 0,
RT_LDO_REGULATOR = 1, RT_LDO_REGULATOR = 1,
} RT_REGULATOR_MODE, *PRT_REGULATOR_MODE; };
typedef struct hal_data_8188e struct hal_data_8188e {
{
struct HAL_VERSION VersionID; struct HAL_VERSION VersionID;
RT_MULTI_FUNC MultiFunc; // For multi-function consideration. enum rt_multi_func MultiFunc; // For multi-function consideration.
RT_POLARITY_CTL PolarityCtl; // For Wifi PDn Polarity control. enum rt_polarity_ctl PolarityCtl; // For Wifi PDn Polarity control.
RT_REGULATOR_MODE RegulatorMode; // switching regulator or LDO enum rt_regulator_mode RegulatorMode; // switching regulator or LDO
u16 CustomerID; u16 CustomerID;
u16 FirmwareVersion; u16 FirmwareVersion;
@ -382,12 +363,8 @@ typedef struct hal_data_8188e
u8 bLedOpenDrain; // Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. u8 bLedOpenDrain; // Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16.
//u32 LedControlNum;
//u32 LedControlMode;
//u32 TxPowerTrackControl;
u8 b1x1RecvCombine; // for 1T1R receive combining u8 b1x1RecvCombine; // for 1T1R receive combining
//u8 bCurrentTurboEDCA;
u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo. u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo.
struct bb_reg_def PHYRegDef[4]; //Radio A/B/C/D struct bb_reg_def PHYRegDef[4]; //Radio A/B/C/D
@ -461,12 +438,12 @@ typedef struct hal_data_8188e
u16 HwRxPageSize; // Hardware setting u16 HwRxPageSize; // Hardware setting
u32 MaxUsbRxAggBlock; u32 MaxUsbRxAggBlock;
USB_RX_AGG_MODE UsbRxAggMode; enum usb_rx_agg_mode UsbRxAggMode;
u8 UsbRxAggBlockCount; // USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed u8 UsbRxAggBlockCount; // USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed
u8 UsbRxAggBlockTimeout; u8 UsbRxAggBlockTimeout;
u8 UsbRxAggPageCount; // 8192C DMA page count u8 UsbRxAggPageCount; // 8192C DMA page count
u8 UsbRxAggPageTimeout; u8 UsbRxAggPageTimeout;
} HAL_DATA_8188E, *PHAL_DATA_8188E; };
#define GET_HAL_DATA(__pAdapter) ((struct hal_data_8188e *)((__pAdapter)->HalData)) #define GET_HAL_DATA(__pAdapter) ((struct hal_data_8188e *)((__pAdapter)->HalData))
#define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type) #define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type)