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rtl8188eu: Copy the code from the kernel into a new branch

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This version takes advantage of all the cleanups to the code. It has
been modified to build on older kernels.

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2022-06-08 18:46:35 -05:00
parent 30901e601a
commit 77d786b6e8
156 changed files with 6564 additions and 41050 deletions
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183
include/Hal8188EPhyCfg.h
View file

@ -1,73 +1,14 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __INC_HAL8188EPHYCFG_H__
#define __INC_HAL8188EPHYCFG_H__
/*--------------------------Define Parameters-------------------------------*/
#define LOOP_LIMIT 5
#define MAX_STALL_TIME 50 /* us */
#define AntennaDiversityValue 0x80
#define MAX_TXPWR_IDX_NMODE_92S 63
#define Reset_Cnt_Limit 3
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM 9
#define HP_THERMAL_NUM 8
#define MAX_AGGR_NUM 0x07
/*--------------------------Define Parameters-------------------------------*/
/*------------------------------Define structure----------------------------*/
enum sw_chnl_cmd_id {
CmdID_End,
CmdID_SetTxPowerLevel,
CmdID_BBRegWrite10,
CmdID_WritePortUlong,
CmdID_WritePortUshort,
CmdID_WritePortUchar,
CmdID_RF_WriteReg,
};
/* 1. Switch channel related */
struct sw_chnl_cmd {
enum sw_chnl_cmd_id CmdID;
u32 Para1;
u32 Para2;
u32 msDelay;
};
enum hw90_block {
HW90_BLOCK_MAC = 0,
HW90_BLOCK_PHY0 = 1,
HW90_BLOCK_PHY1 = 2,
HW90_BLOCK_RF = 3,
HW90_BLOCK_MAXIMUM = 4, /* Never use this */
};
enum rf_radio_path {
RF_PATH_A = 0, /* Radio Path A */
RF_PATH_B = 1, /* Radio Path B */
RF_PATH_C = 2, /* Radio Path C */
RF_PATH_D = 3, /* Radio Path D */
};
#define MAX_PG_GROUP 13
@ -79,39 +20,6 @@ enum rf_radio_path {
#define MAX_CHNL_GROUP_24G 6 /* ch1~2, ch3~5, ch6~8,
*ch9~11, ch12~13, CH 14
* total three groups */
#define CHANNEL_GROUP_MAX_88E 6
enum wireless_mode {
WIRELESS_MODE_UNKNOWN = 0x00,
WIRELESS_MODE_A = BIT2,
WIRELESS_MODE_B = BIT0,
WIRELESS_MODE_G = BIT1,
WIRELESS_MODE_AUTO = BIT5,
WIRELESS_MODE_N_24G = BIT3,
WIRELESS_MODE_N_5G = BIT4,
WIRELESS_MODE_AC = BIT6
};
enum phy_rate_tx_offset_area {
RA_OFFSET_LEGACY_OFDM1,
RA_OFFSET_LEGACY_OFDM2,
RA_OFFSET_HT_OFDM1,
RA_OFFSET_HT_OFDM2,
RA_OFFSET_HT_OFDM3,
RA_OFFSET_HT_OFDM4,
RA_OFFSET_HT_CCK,
};
/* BB/RF related */
enum RF_TYPE_8190P {
RF_TYPE_MIN, /* 0 */
RF_8225 = 1, /* 1 11b/g RF for verification only */
RF_8256 = 2, /* 2 11b/g/n */
RF_8258 = 3, /* 3 11a/b/g/n RF */
RF_6052 = 4, /* 4 11b/g/n RF */
/* TODO: We should remove this psudo PHY RF after we get new RF. */
RF_PSEUDO_11N = 5, /* 5, It is a temporality RF. */
};
struct bb_reg_def {
u32 rfintfs; /* set software control: */
@ -161,43 +69,12 @@ struct bb_reg_def {
* Path A and B */
};
struct ant_sel_ofdm {
u32 r_tx_antenna:4;
u32 r_ant_l:4;
u32 r_ant_non_ht:4;
u32 r_ant_ht1:4;
u32 r_ant_ht2:4;
u32 r_ant_ht_s1:4;
u32 r_ant_non_ht_s1:4;
u32 OFDM_TXSC:2;
u32 reserved:2;
};
struct ant_sel_cck {
u8 r_cckrx_enable_2:2;
u8 r_cckrx_enable:2;
u8 r_ccktx_enable:4;
};
/*------------------------------Define structure----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*--------------------------Exported Function prototype---------------------*/
/* */
/* BB and RF register read/write */
/* */
u32 rtl8188e_PHY_QueryBBReg(struct adapter *adapter, u32 regaddr, u32 mask);
void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr,
u32 mask, u32 data);
u32 rtl8188e_PHY_QueryRFReg(struct adapter *adapter, enum rf_radio_path rfpath,
u32 regaddr, u32 mask);
void rtl8188e_PHY_SetRFReg(struct adapter *adapter, enum rf_radio_path rfpath,
u32 regaddr, u32 mask, u32 data);
u32 rtl8188e_PHY_QueryRFReg(struct adapter *adapter, u32 regaddr, u32 mask);
void rtl8188e_PHY_SetRFReg(struct adapter *adapter, u32 regaddr, u32 mask, u32 data);
/* Initialization related function */
/* MAC/BB/RF HAL config */
@ -205,21 +82,8 @@ int PHY_MACConfig8188E(struct adapter *adapter);
int PHY_BBConfig8188E(struct adapter *adapter);
int PHY_RFConfig8188E(struct adapter *adapter);
/* RF config */
int rtl8188e_PHY_ConfigRFWithParaFile(struct adapter *adapter, u8 *filename,
enum rf_radio_path rfpath);
int rtl8188e_PHY_ConfigRFWithHeaderFile(struct adapter *adapter,
enum rf_radio_path rfpath);
/* Read initi reg value for tx power setting. */
void rtl8192c_PHY_GetHWRegOriginalValue(struct adapter *adapter);
/* BB TX Power R/W */
void PHY_GetTxPowerLevel8188E(struct adapter *adapter, u32 *powerlevel);
void PHY_SetTxPowerLevel8188E(struct adapter *adapter, u8 channel);
bool PHY_UpdateTxPowerDbm8188E(struct adapter *adapter, int power);
void PHY_ScanOperationBackup8188E(struct adapter *Adapter, u8 Operation);
/* Switch bandwidth for 8192S */
void PHY_SetBWMode8188E(struct adapter *adapter,
@ -227,43 +91,8 @@ void PHY_SetBWMode8188E(struct adapter *adapter,
/* channel switch related funciton */
void PHY_SwChnl8188E(struct adapter *adapter, u8 channel);
/* Call after initialization */
void ChkFwCmdIoDone(struct adapter *adapter);
/* BB/MAC/RF other monitor API */
void PHY_SetRFPathSwitch_8188E(struct adapter *adapter, bool main);
void PHY_SwitchEphyParameter(struct adapter *adapter);
void PHY_EnableHostClkReq(struct adapter *adapter);
bool SetAntennaConfig92C(struct adapter *adapter, u8 defaultant);
void storePwrIndexDiffRateOffset(struct adapter *adapter, u32 regaddr,
u32 mask, u32 data);
/*--------------------------Exported Function prototype---------------------*/
#define PHY_QueryBBReg(adapt, regaddr, mask) \
rtl8188e_PHY_QueryBBReg((adapt), (regaddr), (mask))
#define PHY_SetBBReg(adapt, regaddr, bitmask, data) \
rtl8188e_PHY_SetBBReg((adapt), (regaddr), (bitmask), (data))
#define PHY_QueryRFReg(adapt, rfpath, regaddr, bitmask) \
rtl8188e_PHY_QueryRFReg((adapt), (rfpath), (regaddr), (bitmask))
#define PHY_SetRFReg(adapt, rfpath, regaddr, bitmask, data) \
rtl8188e_PHY_SetRFReg((adapt), (rfpath), (regaddr), (bitmask), (data))
#define PHY_SetMacReg PHY_SetBBReg
#define SIC_HW_SUPPORT 0
#define SIC_MAX_POLL_CNT 5
#define SIC_CMD_READY 0
#define SIC_CMD_WRITE 1
#define SIC_CMD_READ 2
#define SIC_CMD_REG 0x1EB /* 1byte */
#define SIC_ADDR_REG 0x1E8 /* 1b9~1ba, 2 bytes */
#define SIC_DATA_REG 0x1EC /* 1bc~1bf */
#endif /* __INC_HAL8192CPHYCFG_H */
#endif

22
include/Hal8188EPhyReg.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __INC_HAL8188EPHYREG_H__
#define __INC_HAL8188EPHYREG_H__
/*--------------------------Define Parameters-------------------------------*/

170
include/Hal8188EPwrSeq.h
View file

@ -1,173 +1,13 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __HAL8188EPWRSEQ_H__
#define __HAL8188EPWRSEQ_H__
#include "HalPwrSeqCmd.h"
/*
Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd
There are 6 HW Power States:
0: POFF--Power Off
1: PDN--Power Down
2: CARDEMU--Card Emulation
3: ACT--Active Mode
4: LPS--Low Power State
5: SUS--Suspend
The transision from different states are defined below
TRANS_CARDEMU_TO_ACT
TRANS_ACT_TO_CARDEMU
TRANS_CARDEMU_TO_SUS
TRANS_SUS_TO_CARDEMU
TRANS_CARDEMU_TO_PDN
TRANS_ACT_TO_LPS
TRANS_LPS_TO_ACT
TRANS_END
PWR SEQ Version: rtl8188E_PwrSeq_V09.h
*/
#define RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS 10
#define RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 10
#define RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS 10
#define RTL8188E_TRANS_SUS_TO_CARDEMU_STEPS 10
#define RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS 10
#define RTL8188E_TRANS_PDN_TO_CARDEMU_STEPS 10
#define RTL8188E_TRANS_ACT_TO_LPS_STEPS 15
#define RTL8188E_TRANS_LPS_TO_ACT_STEPS 15
#define RTL8188E_TRANS_END_STEPS 1
#define RTL8188E_TRANS_CARDEMU_TO_ACT \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0|BIT1, 0}, /* 0x02[1:0] = 0 reset BB*/ \
{0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0}, /* 0x04[15] = 0 disable HWPDN (control by DRV)*/\
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, 0}, /*0x04[12:11] = 2b'00 disable WL suspend*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x04[8] = 1 polling until return 0*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0}, /*wait till 0x04[8] = 0*/ \
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*LDO normal mode*/ \
{0x0074, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*SDIO Driving*/ \
#define RTL8188E_TRANS_ACT_TO_CARDEMU \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*LDO Sleep mode*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \
#define RTL8188E_TRANS_CARDEMU_TO_SUS \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01enable WL suspend*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11enable WL suspend for PCIe*/ \
{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, BIT7}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \
{0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \
{0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/
#define RTL8188E_TRANS_SUS_TO_CARDEMU \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/
#define RTL8188E_TRANS_CARDEMU_TO_CARDDIS \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \
{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \
{0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \
{0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/
#define RTL8188E_TRANS_CARDDIS_TO_CARDEMU \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/
#define RTL8188E_TRANS_CARDEMU_TO_PDN \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/
#define RTL8188E_TRANS_PDN_TO_CARDEMU \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here */ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/
/* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */
#define RTL8188E_TRANS_ACT_TO_LPS \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here */ \
{0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \
{0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \
{0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \
{0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \
{0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \
{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \
{0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \
#define RTL8188E_TRANS_LPS_TO_ACT \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here */ \
{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\
{0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\
{0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\
{0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\
{0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\
{0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\
{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\
{0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/
#define RTL8188E_TRANS_END \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0, PWR_CMD_END, 0, 0}, /* */
extern struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_power_on_flow[];
extern struct wl_pwr_cfg rtl8188E_card_disable_flow[];
extern struct wl_pwr_cfg rtl8188E_enter_lps_flow[];
#endif /* __HAL8188EPWRSEQ_H__ */

63
include/Hal8188ERateAdaptive.h
View file

@ -1,19 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright (c) 2011 Realtek Semiconductor Corp. */
#ifndef __INC_RA_H
#define __INC_RA_H
/*++
Copyright (c) Realtek Semiconductor Corp. All rights reserved.
/* Module Name: RateAdaptive.h
* Abstract: Prototype of RA and related data structure.
*/
Module Name:
RateAdaptive.h
Abstract:
Prototype of RA and related data structure.
Major Change History:
When Who What
---------- --------------- -------------------------------
2011-08-12 Page Create.
--*/
#include <linux/bitfield.h>
/* Rate adaptive define */
#define PERENTRY 23
@ -21,35 +15,28 @@ Major Change History:
#define RATESIZE 28
#define TX_RPT2_ITEM_SIZE 8
/* */
/* TX report 2 format in Rx desc */
/* */
#define GET_TX_RPT2_DESC_PKT_LEN_88E(__pRxStatusDesc) \
LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 9)
#define GET_TX_RPT2_DESC_MACID_VALID_1_88E(__pRxStatusDesc) \
LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 0, 32)
#define GET_TX_RPT2_DESC_MACID_VALID_2_88E(__pRxStatusDesc) \
LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32)
#define GET_TX_REPORT_TYPE1_RERTY_0(__pAddr) \
LE_BITS_TO_4BYTE(__pAddr, 0, 16)
#define GET_TX_REPORT_TYPE1_RERTY_1(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr+2, 0, 8)
#define GET_TX_REPORT_TYPE1_RERTY_2(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr+3, 0, 8)
#define GET_TX_REPORT_TYPE1_RERTY_3(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr+4, 0, 8)
#define GET_TX_REPORT_TYPE1_RERTY_4(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr+4+1, 0, 8)
#define GET_TX_REPORT_TYPE1_DROP_0(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr+4+2, 0, 8)
#define GET_TX_REPORT_TYPE1_DROP_1(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr+4+3, 0, 8)
#define GET_TX_RPT2_DESC_PKT_LEN_88E(__rxstatusdesc) \
le32_get_bits(*(__le32 *)__rxstatusdesc, GENMASK(8, 0))
#define GET_TX_RPT2_DESC_MACID_VALID_1_88E(__rxstatusdesc) \
le32_to_cpu((*(__le32 *)(__rxstatusdesc + 16))
#define GET_TX_RPT2_DESC_MACID_VALID_2_88E(__rxstatusdesc) \
le32_to_cpu((*(__le32 *)(__rxstatusdesc + 20))
#define GET_TX_REPORT_TYPE1_RERTY_0(__paddr) \
le16_get_bits(*(__le16 *)__paddr, GENMASK(15, 0))
#define GET_TX_REPORT_TYPE1_RERTY_1(__paddr) \
LE_BITS_TO_1BYTE(__paddr + 2, 0, 8)
#define GET_TX_REPORT_TYPE1_RERTY_2(__paddr) \
LE_BITS_TO_1BYTE(__paddr + 3, 0, 8)
#define GET_TX_REPORT_TYPE1_RERTY_3(__paddr) \
LE_BITS_TO_1BYTE(__paddr + 4, 0, 8)
#define GET_TX_REPORT_TYPE1_RERTY_4(__paddr) \
LE_BITS_TO_1BYTE(__paddr + 5, 0, 8)
#define GET_TX_REPORT_TYPE1_DROP_0(__paddr) \
LE_BITS_TO_1BYTE(__paddr + 6, 0, 8)
/* End rate adaptive define */
void ODM_RASupport_Init(struct odm_dm_struct *dm_odm);
int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm);
int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 MacID);

44
include/Hal8188EReg.h
View file

@ -1,44 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* */
/* File Name: Hal8188EReg.h */
/* */
/* Description: */
/* */
/* This file is for RTL8188E register definition. */
/* */
/* */
/* */
#ifndef __HAL_8188E_REG_H__
#define __HAL_8188E_REG_H__
/* */
/* Register Definition */
/* */
#define TRX_ANTDIV_PATH 0x860
#define RX_ANTDIV_PATH 0xb2c
#define ODM_R_A_AGC_CORE1_8188E 0xc50
/* */
/* Bitmap Definition */
/* */
#define BIT_FA_RESET_8188E BIT0
#endif

21
include/HalHWImg8188E_BB.h
View file

@ -1,22 +1,5 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __INC_BB_8188E_HW_IMG_H
#define __INC_BB_8188E_HW_IMG_H

33
include/HalHWImg8188E_FW.h
View file

@ -1,33 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_FW_8188E_HW_IMG_H
#define __INC_FW_8188E_HW_IMG_H
/******************************************************************************
* FW_AP.TXT
******************************************************************************/
/******************************************************************************
* FW_WoWLAN.TXT
******************************************************************************/
#define ArrayLength_8188E_FW_WoWLAN 15764
extern const u8 Array_8188E_FW_WoWLAN[ArrayLength_8188E_FW_WoWLAN];
#endif

21
include/HalHWImg8188E_MAC.h
View file

@ -1,22 +1,5 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __INC_MAC_8188E_HW_IMG_H
#define __INC_MAC_8188E_HW_IMG_H

21
include/HalHWImg8188E_RF.h
View file

@ -1,22 +1,5 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __INC_RF_8188E_HW_IMG_H
#define __INC_RF_8188E_HW_IMG_H

30
include/HalPhyRf.h
View file

@ -1,30 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __HAL_PHY_RF_H__
#define __HAL_PHY_RF_H__
#define ODM_TARGET_CHNL_NUM_2G_5G 59
void ODM_ResetIQKResult(struct odm_dm_struct *pDM_Odm);
u8 ODM_GetRightChnlPlaceforIQK(u8 chnl);
#endif /* #ifndef __HAL_PHY_RF_H__ */

26
include/HalPhyRf_8188e.h
View file

@ -1,22 +1,5 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __HAL_PHY_RF_8188E_H__
#define __HAL_PHY_RF_8188E_H__
@ -47,12 +30,7 @@ void PHY_DigitalPredistortion_8188E(struct adapter *pAdapter);
void _PHY_SaveADDARegisters(struct adapter *pAdapter, u32 *ADDAReg,
u32 *ADDABackup, u32 RegisterNum);
void _PHY_PathADDAOn(struct adapter *pAdapter, u32 *ADDAReg,
bool isPathAOn, bool is2T);
void _PHY_MACSettingCalibration(struct adapter *pAdapter, u32 *MACReg,
u32 *MACBackup);
void _PHY_PathAStandBy(struct adapter *pAdapter);
#endif /* #ifndef __HAL_PHY_RF_8188E_H__ */

77
include/HalPwrSeqCmd.h
View file

@ -1,35 +1,14 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __HALPWRSEQCMD_H__
#define __HALPWRSEQCMD_H__
#include <drv_types.h>
#include "drv_types.h"
/*---------------------------------------------*/
/* 3 The value of cmd: 4 bits */
/*---------------------------------------------*/
#define PWR_CMD_READ 0x00
/* offset: the read register offset */
/* msk: the mask of the read value */
/* value: N/A, left by 0 */
/* note: dirver shall implement this function by read & msk */
#define PWR_CMD_WRITE 0x01
/* offset: the read register offset */
@ -57,43 +36,6 @@
/* msk: N/A */
/* value: N/A */
/*---------------------------------------------*/
/* 3 The value of base: 4 bits */
/*---------------------------------------------*/
/* define the base address of each block */
#define PWR_BASEADDR_MAC 0x00
#define PWR_BASEADDR_USB 0x01
#define PWR_BASEADDR_PCIE 0x02
#define PWR_BASEADDR_SDIO 0x03
/*---------------------------------------------*/
/* 3 The value of interface_msk: 4 bits */
/*---------------------------------------------*/
#define PWR_INTF_SDIO_MSK BIT(0)
#define PWR_INTF_USB_MSK BIT(1)
#define PWR_INTF_PCI_MSK BIT(2)
#define PWR_INTF_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
/*---------------------------------------------*/
/* 3 The value of fab_msk: 4 bits */
/*---------------------------------------------*/
#define PWR_FAB_TSMC_MSK BIT(0)
#define PWR_FAB_UMC_MSK BIT(1)
#define PWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
/*---------------------------------------------*/
/* 3 The value of cut_msk: 8 bits */
/*---------------------------------------------*/
#define PWR_CUT_TESTCHIP_MSK BIT(0)
#define PWR_CUT_A_MSK BIT(1)
#define PWR_CUT_B_MSK BIT(2)
#define PWR_CUT_C_MSK BIT(3)
#define PWR_CUT_D_MSK BIT(4)
#define PWR_CUT_E_MSK BIT(5)
#define PWR_CUT_F_MSK BIT(6)
#define PWR_CUT_G_MSK BIT(7)
#define PWR_CUT_ALL_MSK 0xFF
enum pwrseq_cmd_delat_unit {
PWRSEQ_DELAY_US,
PWRSEQ_DELAY_MS,
@ -101,26 +43,17 @@ enum pwrseq_cmd_delat_unit {
struct wl_pwr_cfg {
u16 offset;
u8 cut_msk;
u8 fab_msk:4;
u8 interface_msk:4;
u8 base:4;
u8 cmd:4;
u8 msk;
u8 value;
};
#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset
#define GET_PWR_CFG_CUT_MASK(__PWR_CMD) __PWR_CMD.cut_msk
#define GET_PWR_CFG_FAB_MASK(__PWR_CMD) __PWR_CMD.fab_msk
#define GET_PWR_CFG_INTF_MASK(__PWR_CMD) __PWR_CMD.interface_msk
#define GET_PWR_CFG_BASE(__PWR_CMD) __PWR_CMD.base
#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd
#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk
#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value
/* Prototype of protected function. */
u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 CutVersion, u8 FabVersion,
u8 InterfaceType, struct wl_pwr_cfg PwrCfgCmd[]);
u8 HalPwrSeqCmdParsing(struct adapter *padapter, struct wl_pwr_cfg PwrCfgCmd[]);
#endif

127
include/HalVerDef.h
View file

@ -1,43 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __HAL_VERSION_DEF_H__
#define __HAL_VERSION_DEF_H__
enum HAL_IC_TYPE {
CHIP_8192S = 0,
CHIP_8188C = 1,
CHIP_8192C = 2,
CHIP_8192D = 3,
CHIP_8723A = 4,
CHIP_8188E = 5,
CHIP_8881A = 6,
CHIP_8812A = 7,
CHIP_8821A = 8,
CHIP_8723B = 9,
CHIP_8192E = 10,
};
enum HAL_CHIP_TYPE {
TEST_CHIP = 0,
NORMAL_CHIP = 1,
FPGA = 2,
};
enum HAL_CUT_VERSION {
@ -46,8 +14,6 @@ enum HAL_CUT_VERSION {
C_CUT_VERSION = 2,
D_CUT_VERSION = 3,
E_CUT_VERSION = 4,
F_CUT_VERSION = 5,
G_CUT_VERSION = 6,
};
enum HAL_VENDOR {
@ -55,112 +21,23 @@ enum HAL_VENDOR {
CHIP_VENDOR_UMC = 1,
};
enum HAL_RF_TYPE {
RF_TYPE_1T1R = 0,
RF_TYPE_1T2R = 1,
RF_TYPE_2T2R = 2,
RF_TYPE_2T3R = 3,
RF_TYPE_2T4R = 4,
RF_TYPE_3T3R = 5,
RF_TYPE_3T4R = 6,
RF_TYPE_4T4R = 7,
};
struct HAL_VERSION {
enum HAL_IC_TYPE ICType;
enum HAL_CHIP_TYPE ChipType;
enum HAL_CUT_VERSION CUTVersion;
enum HAL_VENDOR VendorType;
enum HAL_RF_TYPE RFType;
u8 ROMVer;
};
/* Get element */
#define GET_CVID_IC_TYPE(version) (((version).ICType))
#define GET_CVID_CHIP_TYPE(version) (((version).ChipType))
#define GET_CVID_RF_TYPE(version) (((version).RFType))
#define GET_CVID_MANUFACTUER(version) (((version).VendorType))
#define GET_CVID_CUT_VERSION(version) (((version).CUTVersion))
#define GET_CVID_ROM_VERSION(version) (((version).ROMVer) & ROM_VERSION_MASK)
/* Common Macro. -- */
/* HAL_VERSION VersionID */
/* HAL_IC_TYPE_E */
#define IS_81XXC(version) \
(((GET_CVID_IC_TYPE(version) == CHIP_8192C) || \
(GET_CVID_IC_TYPE(version) == CHIP_8188C)) ? true : false)
#define IS_8723_SERIES(version) \
((GET_CVID_IC_TYPE(version) == CHIP_8723A) ? true : false)
#define IS_92D(version) \
((GET_CVID_IC_TYPE(version) == CHIP_8192D) ? true : false)
#define IS_8188E(version) \
((GET_CVID_IC_TYPE(version) == CHIP_8188E) ? true : false)
/* HAL_CHIP_TYPE_E */
#define IS_TEST_CHIP(version) \
((GET_CVID_CHIP_TYPE(version) == TEST_CHIP) ? true : false)
#define IS_NORMAL_CHIP(version) \
((GET_CVID_CHIP_TYPE(version) == NORMAL_CHIP) ? true : false)
/* HAL_CUT_VERSION_E */
#define IS_A_CUT(version) \
((GET_CVID_CUT_VERSION(version) == A_CUT_VERSION) ? true : false)
#define IS_B_CUT(version) \
((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? true : false)
#define IS_C_CUT(version) \
((GET_CVID_CUT_VERSION(version) == C_CUT_VERSION) ? true : false)
#define IS_D_CUT(version) \
((GET_CVID_CUT_VERSION(version) == D_CUT_VERSION) ? true : false)
#define IS_E_CUT(version) \
((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? true : false)
/* HAL_VENDOR_E */
#define IS_CHIP_VENDOR_TSMC(version) \
((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_TSMC) ? true : false)
#define IS_CHIP_VENDOR_UMC(version) \
((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_UMC) ? true : false)
/* HAL_RF_TYPE_E */
#define IS_1T1R(version) \
((GET_CVID_RF_TYPE(version) == RF_TYPE_1T1R) ? true : false)
#define IS_1T2R(version) \
((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R) ? true : false)
#define IS_2T2R(version) \
((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R) ? true : false)
/* Chip version Macro. -- */
#define IS_81XXC_TEST_CHIP(version) \
((IS_81XXC(version) && (!IS_NORMAL_CHIP(version))) ? true : false)
#define IS_92C_SERIAL(version) \
((IS_81XXC(version) && IS_2T2R(version)) ? true : false)
#define IS_81xxC_VENDOR_UMC_A_CUT(version) \
(IS_81XXC(version) ? (IS_CHIP_VENDOR_UMC(version) ? \
(IS_A_CUT(version) ? true : false) : false) : false)
#define IS_81xxC_VENDOR_UMC_B_CUT(version) \
(IS_81XXC(version) ? (IS_CHIP_VENDOR_UMC(version) ? \
(IS_B_CUT(version) ? true : false) : false) : false)
#define IS_81xxC_VENDOR_UMC_C_CUT(version) \
(IS_81XXC(version) ? (IS_CHIP_VENDOR_UMC(version) ? \
(IS_C_CUT(version) ? true : false) : false) : false)
#define IS_NORMAL_CHIP92D(version) \
((IS_92D(version)) ? \
((GET_CVID_CHIP_TYPE(version) == NORMAL_CHIP) ? true : false) : false)
#define IS_92D_SINGLEPHY(version) \
((IS_92D(version)) ? (IS_2T2R(version) ? true : false) : false)
#define IS_92D_C_CUT(version) \
((IS_92D(version)) ? (IS_C_CUT(version) ? true : false) : false)
#define IS_92D_D_CUT(version) \
((IS_92D(version)) ? (IS_D_CUT(version) ? true : false) : false)
#define IS_92D_E_CUT(version) \
((IS_92D(version)) ? (IS_E_CUT(version) ? true : false) : false)
#define IS_8723A_A_CUT(version) \
((IS_8723_SERIES(version)) ? (IS_A_CUT(version) ? true : false) : false)
#define IS_8723A_B_CUT(version) \
((IS_8723_SERIES(version)) ? (IS_B_CUT(version) ? true : false) : false)
#endif

43
include/autoconf.h
View file

@ -1,43 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* temporarily flag ******* */
/*
* Public General Config
*/
#define RTL871X_MODULE_NAME "88EU"
#define DRV_NAME "rtl8188eu"
/*
* Internal General Config
*/
#define CONFIG_AP_MODE
#define CONFIG_P2P
#define RTW_NOTCH_FILTER 0 /* 0:Disable, 1:Enable, */
#define CONFIG_BR_EXT_BRNAME "br0"
/*
* Debug Related Config
*/
#define DBG 1

67
include/basic_types.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __BASIC_TYPES_H__
#define __BASIC_TYPES_H__
@ -133,51 +117,6 @@ value to host byte ordering.*/
BIT_LEN_MASK_8(__bitlen) \
)
/* Description:
* Mask subfield (continuous bits in little-endian) of 4-byte value
* and return the result in 4-byte value in host byte ordering.
*/
#define LE_BITS_CLEARED_TO_4BYTE(__pstart, __bitoffset, __bitlen) \
( \
LE_P4BYTE_TO_HOST_4BYTE(__pstart) & \
(~BIT_OFFSET_LEN_MASK_32(__bitoffset, __bitlen)) \
)
#define LE_BITS_CLEARED_TO_2BYTE(__pstart, __bitoffset, __bitlen) \
( \
LE_P2BYTE_TO_HOST_2BYTE(__pstart) & \
(~BIT_OFFSET_LEN_MASK_16(__bitoffset, __bitlen)) \
)
#define LE_BITS_CLEARED_TO_1BYTE(__pstart, __bitoffset, __bitlen) \
( \
LE_P1BYTE_TO_HOST_1BYTE(__pstart) & \
(~BIT_OFFSET_LEN_MASK_8(__bitoffset, __bitlen)) \
)
/* Description:
* Set subfield of little-endian 4-byte value to specified value.
*/
#define SET_BITS_TO_LE_4BYTE(__pstart, __bitoffset, __bitlen, __val) \
*((u32 *)(__pstart)) = \
( \
LE_BITS_CLEARED_TO_4BYTE(__pstart, __bitoffset, __bitlen) | \
((((u32)__val) & BIT_LEN_MASK_32(__bitlen)) << (__bitoffset)) \
)
#define SET_BITS_TO_LE_2BYTE(__pstart, __bitoffset, __bitlen, __val) \
*((u16 *)(__pstart)) = \
( \
LE_BITS_CLEARED_TO_2BYTE(__pstart, __bitoffset, __bitlen) | \
((((u16)__val) & BIT_LEN_MASK_16(__bitlen)) << (__bitoffset)) \
);
#define SET_BITS_TO_LE_1BYTE(__pstart, __bitoffset, __bitlen, __val) \
*((u8 *)(__pstart)) = EF1BYTE \
( \
LE_BITS_CLEARED_TO_1BYTE(__pstart, __bitoffset, __bitlen) | \
((((u8)__val) & BIT_LEN_MASK_8(__bitlen)) << (__bitoffset)) \
)
/* Get the N-bytes aligment offset from the current length */
#define N_BYTE_ALIGMENT(__value, __aligment) ((__aligment == 1) ? \
(__value) : (((__value + __aligment - 1) / __aligment) * __aligment))

32
include/cmd_osdep.h
View file

@ -1,32 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __CMD_OSDEP_H_
#define __CMD_OSDEP_H_
#include <osdep_service.h>
#include <drv_types.h>
extern int _rtw_init_cmd_priv(struct cmd_priv *pcmdpriv);
extern int _rtw_init_evt_priv(struct evt_priv *pevtpriv);
extern void _rtw_free_cmd_priv(struct cmd_priv *pcmdpriv);
extern int _rtw_enqueue_cmd(struct __queue *queue, struct cmd_obj *obj);
extern struct cmd_obj *_rtw_dequeue_cmd(struct __queue *queue);
#endif

179
include/drv_types.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2012 Realtek Corporation. */
/*-----------------------------------------------------------------------------
For type defines and data structure defines
@ -27,54 +11,32 @@
#define __DRV_TYPES_H__
#define DRV_NAME "r8188eu"
#define CONFIG_88EU_AP_MODE 1
#define CONFIG_88EU_P2P 1
#include <osdep_service.h>
#include <wlan_bssdef.h>
#include <drv_types_linux.h>
#include <rtw_ht.h>
#include <rtw_cmd.h>
#include <rtw_xmit.h>
#include <rtw_recv.h>
#include <hal_intf.h>
#include <hal_com.h>
#include <rtw_qos.h>
#include <rtw_security.h>
#include <rtw_pwrctrl.h>
#include <rtw_io.h>
#include <rtw_eeprom.h>
#include <sta_info.h>
#include <rtw_mlme.h>
#include <rtw_debug.h>
#include <rtw_rf.h>
#include <rtw_event.h>
#include <rtw_led.h>
#include <rtw_mlme_ext.h>
#include <rtw_p2p.h>
#include <rtw_ap.h>
#include <rtw_mp.h>
#include <rtw_br_ext.h>
#include "osdep_service.h"
#include "wlan_bssdef.h"
#include "rtw_ht.h"
#include "rtw_cmd.h"
#include "rtw_xmit.h"
#include "rtw_recv.h"
#include "hal_intf.h"
#include "hal_com.h"
#include "rtw_security.h"
#include "rtw_pwrctrl.h"
#include "rtw_io.h"
#include "rtw_eeprom.h"
#include "sta_info.h"
#include "rtw_mlme.h"
#include "rtw_debug.h"
#include "rtw_rf.h"
#include "rtw_event.h"
#include "rtw_led.h"
#include "rtw_mlme_ext.h"
#include "rtw_p2p.h"
#include "rtw_ap.h"
#include "rtw_br_ext.h"
#include "rtl8188e_hal.h"
enum _NIC_VERSION {
RTL8711_NIC,
RTL8712_NIC,
RTL8713_NIC,
RTL8716_NIC
};
#define SPEC_DEV_ID_NONE BIT(0)
#define SPEC_DEV_ID_DISABLE_HT BIT(1)
#define SPEC_DEV_ID_ENABLE_PS BIT(2)
#define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3)
#define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4)
#define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5)
struct specific_device_id {
u32 flags;
u16 idVendor;
u16 idProduct;
};
#define DRIVERVERSION "v4.1.4_6773.20130222"
struct registry_priv {
u8 chip_version;
@ -101,7 +63,6 @@ struct registry_priv {
u8 short_retry_lmt;
u16 busy_thresh;
u8 ack_policy;
u8 mp_mode;
u8 software_encrypt;
u8 software_decrypt;
u8 acm_method;
@ -125,7 +86,6 @@ struct registry_priv {
u8 ampdu_amsdu;/* A-MPDU Supports A-MSDU is permitted */
u8 lowrate_two_xmit;
u8 rf_config;
u8 low_power;
u8 wifi_spec;/* !turbo_mode */
@ -154,55 +114,35 @@ struct registry_priv {
u8 notch_filter;
};
/* For registry parameters */
#define RGTRY_OFT(field) ((u32)FIELD_OFFSET(struct registry_priv, field))
#define RGTRY_SZ(field) sizeof(((struct registry_priv *)0)->field)
#define BSSID_OFT(field) ((u32)FIELD_OFFSET(struct wlan_bssid_ex, field))
#define BSSID_SZ(field) sizeof(((struct wlan_bssid_ex *)0)->field)
#define MAX_CONTINUAL_URB_ERR 4
struct rt_firmware {
u8 *szFwBuffer;
u32 ulFwLength;
u8 *data;
u32 size;
};
struct dvobj_priv {
struct adapter *if1;
struct adapter *if2;
/* For 92D, DMDP have 2 interface. */
u8 InterfaceNumber;
u8 NumInterfaces;
/* In /Out Pipe information */
int RtInPipe[2];
int RtInPipe;
int RtOutPipe[3];
u8 Queue2Pipe[HW_QUEUE_ENTRY];/* for out pipe mapping */
u8 irq_alloc;
struct rt_firmware firmware;
/*-------- below is for USB INTERFACE --------*/
u8 nr_endpoint;
u8 ishighspeed;
u8 RtNumInPipes;
u8 RtNumOutPipes;
int ep_num[5]; /* endpoint number */
int RegUsbSS;
struct semaphore usb_suspend_sema;
struct mutex usb_vendor_req_mutex;
u8 *usb_alloc_vendor_req_buf;
u8 *usb_vendor_req_buf;
struct usb_interface *pusbintf;
struct usb_device *pusbdev;
ATOMIC_T continual_urb_error;
u8 signal_strength;
atomic_t continual_urb_error;
};
static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
@ -212,32 +152,8 @@ static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
return &dvobj->pusbintf->dev;
};
enum _IFACE_TYPE {
IFACE_PORT0, /* mapping to port0 for C/D series chips */
IFACE_PORT1, /* mapping to port1 for C/D series chip */
MAX_IFACE_PORT,
};
enum _ADAPTER_TYPE {
PRIMARY_ADAPTER,
SECONDARY_ADAPTER,
MAX_ADAPTER,
};
enum driver_state {
DRIVER_NORMAL = 0,
DRIVER_DISAPPEAR = 1,
DRIVER_REPLACE_DONGLE = 2,
};
struct adapter {
int DriverState;/* for disable driver using module, use dongle toi
* replace module. */
int pid[3];/* process id from UI, 0:wps, 1:hostapd, 2:dhcpcd */
int bDongle;/* build-in module or external dongle */
u16 chip_type;
u16 HardwareType;
u16 interface_type;/* USB,SDIO,SPI,PCI */
struct dvobj_priv *dvobj;
struct mlme_priv mlmepriv;
@ -253,36 +169,18 @@ struct adapter {
struct pwrctrl_priv pwrctrlpriv;
struct eeprom_priv eeprompriv;
struct led_priv ledpriv;
struct mp_priv mppriv;
#ifdef CONFIG_88EU_AP_MODE
struct hostapd_priv *phostapdpriv;
#endif
struct wifidirect_info wdinfo;
void *HalData;
u32 hal_data_sz;
struct hal_ops HalFunc;
struct hal_data_8188e haldata;
s32 bDriverStopped;
s32 bSurpriseRemoved;
s32 bCardDisableWOHSM;
u32 IsrContent;
u32 ImrContent;
u8 EepromAddressSize;
u8 hw_init_completed;
u8 bDriverIsGoingToUnload;
u8 init_adpt_in_progress;
u8 bHaltInProgress;
s8 signal_strength;
void *cmdThread;
void *evtThread;
void *xmitThread;
void *recvThread;
void (*intf_start)(struct adapter *adapter);
void (*intf_stop)(struct adapter *adapter);
struct net_device *pnetdev;
@ -302,18 +200,15 @@ struct adapter {
int net_closed;
u8 bFWReady;
u8 bBTFWReady;
u8 bReadPortCancel;
u8 bWritePortCancel;
u8 bRxRSSIDisplay;
/* The driver will show up the desired channel number
* when this flag is 1. */
u8 bNotifyChannelChange;
#ifdef CONFIG_88EU_P2P
/* The driver will show the current P2P status when the
* upper application reads it. */
u8 bShowGetP2PState;
#endif
struct adapter *pbuddy_adapter;
struct mutex *hw_init_mutex;
@ -321,17 +216,13 @@ struct adapter {
spinlock_t br_ext_lock;
struct nat25_network_db_entry *nethash[NAT25_HASH_SIZE];
int pppoe_connection_in_progress;
unsigned char pppoe_addr[MACADDRLEN];
unsigned char scdb_mac[MACADDRLEN];
unsigned char pppoe_addr[ETH_ALEN];
unsigned char scdb_mac[ETH_ALEN];
unsigned char scdb_ip[4];
struct nat25_network_db_entry *scdb_entry;
unsigned char br_mac[MACADDRLEN];
unsigned char br_mac[ETH_ALEN];
unsigned char br_ip[4];
struct br_ext_info ethBrExtInfo;
u8 fix_rate;
unsigned char in_cta_test;
};
#define adapter_to_dvobj(adapter) (adapter->dvobj)

23
include/drv_types_linux.h
View file

@ -1,23 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __DRV_TYPES_LINUX_H__
#define __DRV_TYPES_LINUX_H__
#endif

41
include/ethernet.h
View file

@ -1,41 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*! \file */
#ifndef __INC_ETHERNET_H
#define __INC_ETHERNET_H
#define ETHERNET_ADDRESS_LENGTH 6 /* Ethernet Address Length */
#define ETHERNET_HEADER_SIZE 14 /* Ethernet Header Length */
#define LLC_HEADER_SIZE 6 /* LLC Header Length */
#define TYPE_LENGTH_FIELD_SIZE 2 /* Type/Length Size */
#define MINIMUM_ETHERNET_PACKET_SIZE 60 /* Min Ethernet Packet Size */
#define MAXIMUM_ETHERNET_PACKET_SIZE 1514 /* Max Ethernet Packet Size */
/* Is Multicast Address? */
#define RT_ETH_IS_MULTICAST(_addr) ((((u8 *)(_addr))[0]&0x01) != 0)
#define RT_ETH_IS_BROADCAST(_addr) ( \
((u8 *)(_addr))[0] == 0xff && \
((u8 *)(_addr))[1] == 0xff && \
((u8 *)(_addr))[2] == 0xff && \
((u8 *)(_addr))[3] == 0xff && \
((u8 *)(_addr))[4] == 0xff && \
((u8 *)(_addr))[5] == 0xff) /* Is Broadcast Address? */
#endif /* #ifndef __INC_ETHERNET_H */

32
include/h2clbk.h
View file

@ -1,32 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _H2CLBK_H_
#include <rtl8711_spec.h>
#include <TypeDef.h>
void _lbk_cmd(struct adapter *adapter);
void _lbk_rsp(struct adapter *adapter);
void _lbk_evt(IN struct adapter *adapter);
void h2c_event_callback(unsigned char *dev, unsigned char *pbuf);

25
include/hal_com.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __HAL_COMMON_H__
#define __HAL_COMMON_H__
@ -164,9 +148,6 @@ void HalSetBrateCfg(struct adapter *Adapter, u8 *mBratesOS, u16 *pBrateCfg);
bool Hal_MappingOutPipe(struct adapter *pAdapter, u8 NumOutPipe);
void hal_init_macaddr(struct adapter *adapter);
void c2h_evt_clear(struct adapter *adapter);
s32 c2h_evt_read(struct adapter *adapter, u8 *buf);
#endif /* __HAL_COMMON_H__ */

393
include/hal_intf.h
View file

@ -1,113 +1,41 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2012 Realtek Corporation. */
#ifndef __HAL_INTF_H__
#define __HAL_INTF_H__
#include <osdep_service.h>
#include <drv_types.h>
#include <Hal8188EPhyCfg.h>
enum RTL871X_HCI_TYPE {
RTW_PCIE = BIT0,
RTW_USB = BIT1,
RTW_SDIO = BIT2,
RTW_GSPI = BIT3,
};
enum _CHIP_TYPE {
NULL_CHIP_TYPE,
RTL8712_8188S_8191S_8192S,
RTL8188C_8192C,
RTL8192D,
RTL8723A,
RTL8188E,
MAX_CHIP_TYPE
};
#include "osdep_service.h"
#include "drv_types.h"
#include "Hal8188EPhyCfg.h"
enum hw_variables {
HW_VAR_MEDIA_STATUS,
HW_VAR_MEDIA_STATUS1,
HW_VAR_SET_OPMODE,
HW_VAR_MAC_ADDR,
HW_VAR_BSSID,
HW_VAR_INIT_RTS_RATE,
HW_VAR_BASIC_RATE,
HW_VAR_TXPAUSE,
HW_VAR_BCN_FUNC,
HW_VAR_CORRECT_TSF,
HW_VAR_CHECK_BSSID,
HW_VAR_MLME_DISCONNECT,
HW_VAR_MLME_SITESURVEY,
HW_VAR_MLME_JOIN,
HW_VAR_BEACON_INTERVAL,
HW_VAR_SLOT_TIME,
HW_VAR_RESP_SIFS,
HW_VAR_ACK_PREAMBLE,
HW_VAR_SEC_CFG,
HW_VAR_BCN_VALID,
HW_VAR_RF_TYPE,
HW_VAR_DM_FLAG,
HW_VAR_DM_FUNC_OP,
HW_VAR_DM_FUNC_SET,
HW_VAR_DM_FUNC_CLR,
HW_VAR_CAM_EMPTY_ENTRY,
HW_VAR_CAM_INVALID_ALL,
HW_VAR_CAM_WRITE,
HW_VAR_CAM_READ,
HW_VAR_AC_PARAM_VO,
HW_VAR_AC_PARAM_VI,
HW_VAR_AC_PARAM_BE,
HW_VAR_AC_PARAM_BK,
HW_VAR_ACM_CTRL,
HW_VAR_AMPDU_MIN_SPACE,
HW_VAR_AMPDU_FACTOR,
HW_VAR_RXDMA_AGG_PG_TH,
HW_VAR_SET_RPWM,
HW_VAR_H2C_FW_PWRMODE,
HW_VAR_H2C_FW_JOINBSSRPT,
HW_VAR_FWLPS_RF_ON,
HW_VAR_H2C_FW_P2P_PS_OFFLOAD,
HW_VAR_TDLS_WRCR,
HW_VAR_TDLS_INIT_CH_SEN,
HW_VAR_TDLS_RS_RCR,
HW_VAR_TDLS_DONE_CH_SEN,
HW_VAR_INITIAL_GAIN,
HW_VAR_TRIGGER_GPIO_0,
HW_VAR_BT_SET_COEXIST,
HW_VAR_BT_ISSUE_DELBA,
HW_VAR_CURRENT_ANTENNA,
HW_VAR_ANTENNA_DIVERSITY_LINK,
HW_VAR_ANTENNA_DIVERSITY_SELECT,
HW_VAR_SWITCH_EPHY_WoWLAN,
HW_VAR_EFUSE_USAGE,
HW_VAR_EFUSE_BYTES,
HW_VAR_EFUSE_BT_USAGE,
HW_VAR_EFUSE_BT_BYTES,
HW_VAR_FIFO_CLEARN_UP,
HW_VAR_CHECK_TXBUF,
HW_VAR_APFM_ON_MAC, /* Auto FSM to Turn On, include clock, isolation,
* power control for MAC only */
/* The valid upper nav range for the HW updating, if the true value is
* larger than the upper range, the HW won't update it. */
/* Unit in microsecond. 0 means disable this function. */
HW_VAR_NAV_UPPER,
HW_VAR_RPT_TIMER_SETTING,
HW_VAR_TX_RPT_MAX_MACID,
HW_VAR_H2C_MEDIA_STATUS_RPT,
@ -115,315 +43,52 @@ enum hw_variables {
};
enum hal_def_variable {
HAL_DEF_UNDERCORATEDSMOOTHEDPWDB,
HAL_DEF_IS_SUPPORT_ANT_DIV,
HAL_DEF_CURRENT_ANTENNA,
HAL_DEF_DRVINFO_SZ,
HAL_DEF_MAX_RECVBUF_SZ,
HAL_DEF_RX_PACKET_OFFSET,
HAL_DEF_DBG_DUMP_RXPKT,/* for dbg */
HAL_DEF_DBG_DM_FUNC,/* for dbg */
HAL_DEF_RA_DECISION_RATE,
HAL_DEF_RA_SGI,
HAL_DEF_PT_PWR_STATUS,
HW_VAR_MAX_RX_AMPDU_FACTOR,
HW_DEF_RA_INFO_DUMP,
HAL_DEF_DBG_DUMP_TXPKT,
HW_DEF_FA_CNT_DUMP,
HW_DEF_ODM_DBG_FLAG,
};
enum hal_odm_variable {
HAL_ODM_STA_INFO,
HAL_ODM_P2P_STATE,
HAL_ODM_WIFI_DISPLAY_STATE,
};
enum hal_intf_ps_func {
HAL_USB_SELECT_SUSPEND,
HAL_MAX_ID,
};
typedef s32 (*c2h_id_filter)(u8 id);
struct hal_ops {
u32 (*hal_power_on)(struct adapter *padapter);
u32 (*hal_init)(struct adapter *padapter);
u32 (*hal_deinit)(struct adapter *padapter);
void (*free_hal_data)(struct adapter *padapter);
u32 (*inirp_init)(struct adapter *padapter);
u32 (*inirp_deinit)(struct adapter *padapter);
s32 (*init_xmit_priv)(struct adapter *padapter);
void (*free_xmit_priv)(struct adapter *padapter);
s32 (*init_recv_priv)(struct adapter *padapter);
void (*free_recv_priv)(struct adapter *padapter);
void (*InitSwLeds)(struct adapter *padapter);
void (*DeInitSwLeds)(struct adapter *padapter);
void (*dm_init)(struct adapter *padapter);
void (*dm_deinit)(struct adapter *padapter);
void (*read_chip_version)(struct adapter *padapter);
void (*init_default_value)(struct adapter *padapter);
void (*intf_chip_configure)(struct adapter *padapter);
void (*read_adapter_info)(struct adapter *padapter);
void (*enable_interrupt)(struct adapter *padapter);
void (*disable_interrupt)(struct adapter *padapter);
s32 (*interrupt_handler)(struct adapter *padapter);
void (*set_bwmode_handler)(struct adapter *padapter,
enum ht_channel_width Bandwidth,
u8 Offset);
void (*set_channel_handler)(struct adapter *padapter, u8 channel);
void (*hal_dm_watchdog)(struct adapter *padapter);
void (*SetHwRegHandler)(struct adapter *padapter, u8 variable,
u8 *val);
void (*GetHwRegHandler)(struct adapter *padapter, u8 variable,
u8 *val);
u8 (*GetHalDefVarHandler)(struct adapter *padapter,
enum hal_def_variable eVariable,
void *pValue);
u8 (*SetHalDefVarHandler)(struct adapter *padapter,
enum hal_def_variable eVariable,
void *pValue);
void (*GetHalODMVarHandler)(struct adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
void (*SetHalODMVarHandler)(struct adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
void (*UpdateRAMaskHandler)(struct adapter *padapter,
u32 mac_id, u8 rssi_level);
void (*SetBeaconRelatedRegistersHandler)(struct adapter *padapter);
void (*Add_RateATid)(struct adapter *adapter, u32 bitmap, u8 arg,
u8 rssi_level);
void (*run_thread)(struct adapter *adapter);
void (*cancel_thread)(struct adapter *adapter);
u8 (*AntDivBeforeLinkHandler)(struct adapter *adapter);
void (*AntDivCompareHandler)(struct adapter *adapter,
struct wlan_bssid_ex *dst,
struct wlan_bssid_ex *src);
u8 (*interface_ps_func)(struct adapter *padapter,
enum hal_intf_ps_func efunc_id, u8 *val);
s32 (*hal_xmit)(struct adapter *padapter,
struct xmit_frame *pxmitframe);
s32 (*mgnt_xmit)(struct adapter *padapter,
struct xmit_frame *pmgntframe);
s32 (*hal_xmitframe_enqueue)(struct adapter *padapter,
struct xmit_frame *pxmitframe);
u32 (*read_bbreg)(struct adapter *padapter, u32 RegAddr,
u32 BitMask);
void (*write_bbreg)(struct adapter *padapter, u32 RegAddr,
u32 BitMask, u32 Data);
u32 (*read_rfreg)(struct adapter *padapter,
enum rf_radio_path eRFPath, u32 RegAddr,
u32 BitMask);
void (*write_rfreg)(struct adapter *padapter,
enum rf_radio_path eRFPath, u32 RegAddr,
u32 BitMask, u32 Data);
void (*EfusePowerSwitch)(struct adapter *padapter, u8 bWrite,
u8 PwrState);
void (*ReadEFuse)(struct adapter *padapter, u8 efuseType, u16 _offset,
u16 _size_byte, u8 *pbuf, bool bPseudoTest);
void (*EFUSEGetEfuseDefinition)(struct adapter *padapter, u8 efuseType,
u8 type, void *pOut, bool bPseudoTest);
u16 (*EfuseGetCurrentSize)(struct adapter *padapter, u8 efuseType,
bool bPseudoTest);
int (*Efuse_PgPacketRead)(struct adapter *adapter, u8 offset,
u8 *data, bool bPseudoTest);
int (*Efuse_PgPacketWrite)(struct adapter *padapter, u8 offset,
u8 word_en, u8 *data, bool bPseudoTest);
u8 (*Efuse_WordEnableDataWrite)(struct adapter *padapter,
u16 efuse_addr, u8 word_en,
u8 *data, bool bPseudoTest);
bool (*Efuse_PgPacketWrite_BT)(struct adapter *padapter, u8 offset,
u8 word_en, u8 *data, bool test);
void (*sreset_init_value)(struct adapter *padapter);
void (*sreset_reset_value)(struct adapter *padapter);
void (*silentreset)(struct adapter *padapter);
void (*sreset_xmit_status_check)(struct adapter *padapter);
void (*sreset_linked_status_check) (struct adapter *padapter);
u8 (*sreset_get_wifi_status)(struct adapter *padapter);
int (*IOL_exec_cmds_sync)(struct adapter *padapter,
struct xmit_frame *frame, u32 max_wait,
u32 bndy_cnt);
void (*hal_notch_filter)(struct adapter *adapter, bool enable);
void (*hal_reset_security_engine)(struct adapter *adapter);
s32 (*c2h_handler)(struct adapter *padapter,
struct c2h_evt_hdr *c2h_evt);
c2h_id_filter c2h_id_filter_ccx;
};
enum rt_eeprom_type {
EEPROM_93C46,
EEPROM_93C56,
EEPROM_BOOT_EFUSE,
};
#define RF_CHANGE_BY_INIT 0
#define RF_CHANGE_BY_IPS BIT28
#define RF_CHANGE_BY_PS BIT29
#define RF_CHANGE_BY_HW BIT30
#define RF_CHANGE_BY_SW BIT31
enum hardware_type {
HARDWARE_TYPE_RTL8180,
HARDWARE_TYPE_RTL8185,
HARDWARE_TYPE_RTL8187,
HARDWARE_TYPE_RTL8188,
HARDWARE_TYPE_RTL8190P,
HARDWARE_TYPE_RTL8192E,
HARDWARE_TYPE_RTL819xU,
HARDWARE_TYPE_RTL8192SE,
HARDWARE_TYPE_RTL8192SU,
HARDWARE_TYPE_RTL8192CE,
HARDWARE_TYPE_RTL8192CU,
HARDWARE_TYPE_RTL8192DE,
HARDWARE_TYPE_RTL8192DU,
HARDWARE_TYPE_RTL8723AE,
HARDWARE_TYPE_RTL8723AU,
HARDWARE_TYPE_RTL8723AS,
HARDWARE_TYPE_RTL8188EE,
HARDWARE_TYPE_RTL8188EU,
HARDWARE_TYPE_RTL8188ES,
HARDWARE_TYPE_MAX,
};
/* RTL8188E Series */
#define IS_HARDWARE_TYPE_8188EE(_Adapter) \
(((struct adapter *)_Adapter)->HardwareType == HARDWARE_TYPE_RTL8188EE)
#define IS_HARDWARE_TYPE_8188EU(_Adapter) \
(((struct adapter *)_Adapter)->HardwareType == HARDWARE_TYPE_RTL8188EU)
#define IS_HARDWARE_TYPE_8188ES(_Adapter) \
(((struct adapter *)_Adapter)->HardwareType == HARDWARE_TYPE_RTL8188ES)
#define IS_HARDWARE_TYPE_8188E(_Adapter) \
(IS_HARDWARE_TYPE_8188EE(_Adapter) || IS_HARDWARE_TYPE_8188EU(_Adapter) || \
IS_HARDWARE_TYPE_8188ES(_Adapter))
#define GET_EEPROM_EFUSE_PRIV(adapter) (&adapter->eeprompriv)
#define is_boot_from_eeprom(adapter) (adapter->eeprompriv.EepromOrEfuse)
void rtw_hal_def_value_init(struct adapter *padapter);
void rtl8188eu_interface_configure(struct adapter *adapt);
void ReadAdapterInfo8188EU(struct adapter *Adapter);
void rtl8188eu_init_default_value(struct adapter *adapt);
void rtl8188e_SetHalODMVar(struct adapter *Adapter, void *pValue1, bool bSet);
u32 rtl8188eu_InitPowerOn(struct adapter *adapt);
void rtl8188e_EfusePowerSwitch(struct adapter *pAdapter, u8 PwrState);
void rtl8188e_ReadEFuse(struct adapter *Adapter, u16 _offset, u16 _size_byte, u8 *pbuf);
void rtw_hal_free_data(struct adapter *padapter);
void hal_notch_filter_8188e(struct adapter *adapter, bool enable);
void rtw_hal_dm_init(struct adapter *padapter);
void rtw_hal_dm_deinit(struct adapter *padapter);
void rtw_hal_sw_led_init(struct adapter *padapter);
void rtw_hal_sw_led_deinit(struct adapter *padapter);
void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt);
void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level);
int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter,
struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt);
void SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue);
void GetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue);
unsigned int rtl8188eu_inirp_init(struct adapter *Adapter);
void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val);
void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val);
u32 rtw_hal_power_on(struct adapter *padapter);
uint rtw_hal_init(struct adapter *padapter);
uint rtw_hal_deinit(struct adapter *padapter);
void rtw_hal_stop(struct adapter *padapter);
void rtw_hal_set_hwreg(struct adapter *padapter, u8 variable, u8 *val);
void rtw_hal_get_hwreg(struct adapter *padapter, u8 variable, u8 *val);
void rtw_hal_chip_configure(struct adapter *padapter);
void rtw_hal_read_chip_info(struct adapter *padapter);
void rtw_hal_read_chip_version(struct adapter *padapter);
u8 rtw_hal_set_def_var(struct adapter *padapter,
enum hal_def_variable eVariable, void *pValue);
u8 rtw_hal_get_def_var(struct adapter *padapter,
enum hal_def_variable eVariable, void *pValue);
void rtw_hal_set_odm_var(struct adapter *padapter,
enum hal_odm_variable eVariable, void *pValue1,
bool bSet);
void rtw_hal_get_odm_var(struct adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
void rtw_hal_enable_interrupt(struct adapter *padapter);
void rtw_hal_disable_interrupt(struct adapter *padapter);
u32 rtw_hal_inirp_init(struct adapter *padapter);
u32 rtw_hal_inirp_deinit(struct adapter *padapter);
u8 rtw_hal_intf_ps_func(struct adapter *padapter,
enum hal_intf_ps_func efunc_id, u8 *val);
s32 rtw_hal_xmitframe_enqueue(struct adapter *padapter,
struct xmit_frame *pxmitframe);
s32 rtw_hal_xmit(struct adapter *padapter, struct xmit_frame *pxmitframe);
s32 rtw_hal_mgnt_xmit(struct adapter *padapter,
struct xmit_frame *pmgntframe);
s32 rtw_hal_init_xmit_priv(struct adapter *padapter);
void rtw_hal_free_xmit_priv(struct adapter *padapter);
s32 rtw_hal_init_recv_priv(struct adapter *padapter);
void rtw_hal_free_recv_priv(struct adapter *padapter);
u32 rtl8188eu_hal_init(struct adapter *Adapter);
u32 rtl8188eu_hal_deinit(struct adapter *Adapter);
void rtw_hal_update_ra_mask(struct adapter *padapter, u32 mac_id, u8 level);
void rtw_hal_add_ra_tid(struct adapter *adapt, u32 bitmap, u8 arg, u8 level);
void rtw_hal_clone_data(struct adapter *dst_adapt,
struct adapter *src_adapt);
void rtw_hal_start_thread(struct adapter *padapter);
void rtw_hal_stop_thread(struct adapter *padapter);
void rtw_hal_bcn_related_reg_setting(struct adapter *padapter);
u32 rtw_hal_read_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask);
void rtw_hal_write_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask,
u32 Data);
u32 rtw_hal_read_rfreg(struct adapter *padapter, enum rf_radio_path eRFPath,
u32 RegAddr, u32 BitMask);
void rtw_hal_write_rfreg(struct adapter *padapter,
enum rf_radio_path eRFPath, u32 RegAddr,
u32 BitMask, u32 Data);
s32 rtw_hal_interrupt_handler(struct adapter *padapter);
void rtw_hal_set_bwmode(struct adapter *padapter,
enum ht_channel_width Bandwidth, u8 Offset);
void rtw_hal_set_chan(struct adapter *padapter, u8 channel);
void rtw_hal_dm_watchdog(struct adapter *padapter);
u8 rtw_hal_antdiv_before_linked(struct adapter *padapter);
void rtw_hal_antdiv_rssi_compared(struct adapter *padapter,
struct wlan_bssid_ex *dst,
struct wlan_bssid_ex *src);
void rtw_hal_sreset_init(struct adapter *padapter);
void rtw_hal_sreset_reset(struct adapter *padapter);
void rtw_hal_sreset_reset_value(struct adapter *padapter);
void rtw_hal_sreset_xmit_status_check(struct adapter *padapter);
void rtw_hal_sreset_linked_status_check(struct adapter *padapter);
u8 rtw_hal_sreset_get_wifi_status(struct adapter *padapter);
int rtw_hal_iol_cmd(struct adapter *adapter, struct xmit_frame *xmit_frame,
u32 max_wating_ms, u32 bndy_cnt);
void rtw_hal_notch_filter(struct adapter *adapter, bool enable);
void rtw_hal_reset_security_engine(struct adapter *adapter);
s32 rtw_hal_c2h_handler(struct adapter *adapter,
struct c2h_evt_hdr *c2h_evt);
c2h_id_filter rtw_hal_c2h_id_filter_ccx(struct adapter *adapter);
void indicate_wx_scan_complete_event(struct adapter *padapter);
u8 rtw_do_join(struct adapter *padapter);

400
include/ieee80211.h
View file

@ -1,68 +1,21 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __IEEE80211_H
#define __IEEE80211_H
#include <osdep_service.h>
#include <drv_types.h>
#include "osdep_service.h"
#include "drv_types.h"
#include "wifi.h"
#include <linux/wireless.h>
#define MGMT_QUEUE_NUM 5
#define ETH_ALEN 6
#define ETH_TYPE_LEN 2
#define PAYLOAD_TYPE_LEN 1
#ifdef CONFIG_88EU_AP_MODE
#define RTL_IOCTL_HOSTAPD (SIOCIWFIRSTPRIV + 28)
/* RTL871X_IOCTL_HOSTAPD ioctl() cmd: */
enum {
RTL871X_HOSTAPD_FLUSH = 1,
RTL871X_HOSTAPD_ADD_STA = 2,
RTL871X_HOSTAPD_REMOVE_STA = 3,
RTL871X_HOSTAPD_GET_INFO_STA = 4,
/* REMOVED: PRISM2_HOSTAPD_RESET_TXEXC_STA = 5, */
RTL871X_HOSTAPD_GET_WPAIE_STA = 5,
RTL871X_SET_ENCRYPTION = 6,
RTL871X_GET_ENCRYPTION = 7,
RTL871X_HOSTAPD_SET_FLAGS_STA = 8,
RTL871X_HOSTAPD_GET_RID = 9,
RTL871X_HOSTAPD_SET_RID = 10,
RTL871X_HOSTAPD_SET_ASSOC_AP_ADDR = 11,
RTL871X_HOSTAPD_SET_GENERIC_ELEMENT = 12,
RTL871X_HOSTAPD_MLME = 13,
RTL871X_HOSTAPD_SCAN_REQ = 14,
RTL871X_HOSTAPD_STA_CLEAR_STATS = 15,
RTL871X_HOSTAPD_SET_BEACON = 16,
RTL871X_HOSTAPD_SET_WPS_BEACON = 17,
RTL871X_HOSTAPD_SET_WPS_PROBE_RESP = 18,
RTL871X_HOSTAPD_SET_WPS_ASSOC_RESP = 19,
RTL871X_HOSTAPD_SET_HIDDEN_SSID = 20,
RTL871X_HOSTAPD_SET_MACADDR_ACL = 21,
RTL871X_HOSTAPD_ACL_ADD_STA = 22,
RTL871X_HOSTAPD_ACL_REMOVE_STA = 23,
};
/* STA flags */
#define WLAN_STA_AUTH BIT(0)
#define WLAN_STA_ASSOC BIT(1)
@ -80,8 +33,6 @@ enum {
#define WLAN_STA_MAYBE_WPS BIT(13)
#define WLAN_STA_NONERP BIT(31)
#endif
#define IEEE_CMD_SET_WPA_PARAM 1
#define IEEE_CMD_SET_WPA_IE 2
#define IEEE_CMD_SET_ENCRYPTION 3
@ -161,53 +112,34 @@ enum NETWORK_TYPE {
/* Sub-Element */
WIRELESS_11B = BIT(0), /* tx:cck only, rx:cck only, hw: cck */
WIRELESS_11G = BIT(1), /* tx:ofdm only, rx:ofdm & cck, hw:cck & ofdm*/
WIRELESS_11A = BIT(2), /* tx:ofdm only, rx: ofdm only, hw:ofdm only */
WIRELESS_11_24N = BIT(3), /* tx:MCS only, rx:MCS & cck, hw:MCS & cck */
WIRELESS_11_5N = BIT(4), /* tx:MCS only, rx:MCS & ofdm, hw:ofdm only */
WIRELESS_AC = BIT(6),
/* Combination */
/* tx: cck & ofdm, rx: cck & ofdm & MCS, hw: cck & ofdm */
WIRELESS_11BG = (WIRELESS_11B | WIRELESS_11G),
/* tx: ofdm & MCS, rx: ofdm & cck & MCS, hw: cck & ofdm */
WIRELESS_11G_24N = (WIRELESS_11G | WIRELESS_11_24N),
/* tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only */
WIRELESS_11A_5N = (WIRELESS_11A | WIRELESS_11_5N),
/* tx: ofdm & cck & MCS, rx: ofdm & cck & MCS, hw: ofdm & cck */
WIRELESS_11BG_24N = (WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N),
/* tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only */
WIRELESS_11AGN = (WIRELESS_11A | WIRELESS_11G | WIRELESS_11_24N |
WIRELESS_11_5N),
WIRELESS_11ABGN = (WIRELESS_11A | WIRELESS_11B | WIRELESS_11G |
WIRELESS_11_24N | WIRELESS_11_5N),
};
#define SUPPORTED_24G_NETTYPE_MSK \
(WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N)
#define SUPPORTED_5G_NETTYPE_MSK \
(WIRELESS_11A | WIRELESS_11_5N)
#define IsSupported24G(NetType) \
((NetType) & SUPPORTED_24G_NETTYPE_MSK ? true : false)
#define IsSupported5G(NetType) \
((NetType) & SUPPORTED_5G_NETTYPE_MSK ? true : false)
#define IsEnableHWCCK(NetType) \
IsSupported24G(NetType)
#define IsEnableHWOFDM(NetType) \
((NetType) & (WIRELESS_11G | WIRELESS_11_24N | \
SUPPORTED_5G_NETTYPE_MSK) ? true : false)
#define IsSupportedRxCCK(NetType) IsEnableHWCCK(NetType)
#define IsSupportedRxOFDM(NetType) IsEnableHWOFDM(NetType)
#define IsSupportedRxMCS(NetType) IsEnableHWOFDM(NetType)
#define IsSupportedTxCCK(NetType) \
((NetType) & (WIRELESS_11B) ? true : false)
#define IsSupportedTxOFDM(NetType) \
((NetType) & (WIRELESS_11G|WIRELESS_11A) ? true : false)
((NetType) & (WIRELESS_11G) ? true : false)
#define IsSupportedTxMCS(NetType) \
((NetType) & (WIRELESS_11_24N|WIRELESS_11_5N) ? true : false)
((NetType) & (WIRELESS_11_24N) ? true : false)
struct ieee_param {
u32 cmd;
@ -220,7 +152,7 @@ struct ieee_param {
struct {
u32 len;
u8 reserved[32];
u8 data[0];
u8 data[];
} wpa_ie;
struct {
int command;
@ -233,9 +165,8 @@ struct ieee_param {
u8 idx;
u8 seq[8]; /* sequence counter (set: RX, get: TX) */
u16 key_len;
u8 key[0];
u8 key[];
} crypt;
#ifdef CONFIG_88EU_AP_MODE
struct {
u16 aid;
u16 capability;
@ -245,37 +176,11 @@ struct ieee_param {
} add_sta;
struct {
u8 reserved[2];/* for set max_num_sta */
u8 buf[0];
u8 buf[];
} bcn_ie;
#endif
} u;
};
#ifdef CONFIG_88EU_AP_MODE
struct ieee_param_ex {
u32 cmd;
u8 sta_addr[ETH_ALEN];
u8 data[0];
};
struct sta_data {
u16 aid;
u16 capability;
int flags;
u32 sta_set;
u8 tx_supp_rates[16];
u32 tx_supp_rates_len;
struct ieee80211_ht_cap ht_cap;
u64 rx_pkts;
u64 rx_bytes;
u64 rx_drops;
u64 tx_pkts;
u64 tx_bytes;
u64 tx_drops;
};
#endif
#define IEEE80211_DATA_LEN 2304
/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
6.2.1.1.2.
@ -291,14 +196,6 @@ struct sta_data {
/* this is stolen from ipw2200 driver */
#define IEEE_IBSS_MAC_HASH_SIZE 31
struct ieee_ibss_seq {
u8 mac[ETH_ALEN];
u16 seq_num;
u16 frag_num;
unsigned long packet_time;
struct list_head list;
};
struct rtw_ieee80211_hdr {
__le16 frame_ctl;
__le16 duration_id;
@ -318,17 +215,6 @@ struct rtw_ieee80211_hdr_3addr {
u16 seq_ctl;
} __packed;
struct rtw_ieee80211_hdr_qos {
__le16 frame_ctl;
__le16 duration_id;
u8 addr1[ETH_ALEN];
u8 addr2[ETH_ALEN];
u8 addr3[ETH_ALEN];
u16 seq_ctl;
u8 addr4[ETH_ALEN];
u16 qc;
} __packed;
struct rtw_ieee80211_hdr_3addr_qos {
__le16 frame_ctl;
__le16 duration_id;
@ -339,22 +225,6 @@ struct rtw_ieee80211_hdr_3addr_qos {
u16 qc;
} __packed;
struct eapol {
u8 snap[6];
u16 ethertype;
u8 version;
u8 type;
u16 length;
} __packed;
enum eap_type {
EAP_PACKET = 0,
EAPOL_START,
EAPOL_LOGOFF,
EAPOL_KEY,
EAPOL_ENCAP_ASF_ALERT
};
#define IEEE80211_3ADDR_LEN 24
#define IEEE80211_4ADDR_LEN 30
#define IEEE80211_FCS_LEN 4
@ -629,83 +499,12 @@ struct ieee80211_snap_hdr {
#define IEEE80211_NUM_CCK_RATES 4
#define IEEE80211_OFDM_SHIFT_MASK_A 4
/* NOTE: This data is for statistical purposes; not all hardware provides this
* information for frames received. Not setting these will not cause
* any adverse affects. */
struct ieee80211_rx_stats {
/* u32 mac_time[2]; */
s8 rssi;
u8 signal;
u8 noise;
u8 received_channel;
u16 rate; /* in 100 kbps */
/* u8 control; */
u8 mask;
u8 freq;
u16 len;
};
/* IEEE 802.11 requires that STA supports concurrent reception of at least
* three fragmented frames. This define can be increased to support more
* concurrent frames, but it should be noted that each entry can consume about
* 2 kB of RAM and increasing cache size will slow down frame reassembly. */
#define IEEE80211_FRAG_CACHE_LEN 4
struct ieee80211_frag_entry {
u32 first_frag_time;
uint seq;
uint last_frag;
uint qos; /* jackson */
uint tid; /* jackson */
struct sk_buff *skb;
u8 src_addr[ETH_ALEN];
u8 dst_addr[ETH_ALEN];
};
struct ieee80211_stats {
uint tx_unicast_frames;
uint tx_multicast_frames;
uint tx_fragments;
uint tx_unicast_octets;
uint tx_multicast_octets;
uint tx_deferred_transmissions;
uint tx_single_retry_frames;
uint tx_multiple_retry_frames;
uint tx_retry_limit_exceeded;
uint tx_discards;
uint rx_unicast_frames;
uint rx_multicast_frames;
uint rx_fragments;
uint rx_unicast_octets;
uint rx_multicast_octets;
uint rx_fcs_errors;
uint rx_discards_no_buffer;
uint tx_discards_wrong_sa;
uint rx_discards_undecryptable;
uint rx_message_in_msg_fragments;
uint rx_message_in_bad_msg_fragments;
};
struct ieee80211_softmac_stats {
uint rx_ass_ok;
uint rx_ass_err;
uint rx_probe_rq;
uint tx_probe_rs;
uint tx_beacons;
uint rx_auth_rq;
uint rx_auth_rs_ok;
uint rx_auth_rs_err;
uint tx_auth_rq;
uint no_auth_rs;
uint no_ass_rs;
uint tx_ass_rq;
uint rx_ass_rq;
uint tx_probe_rq;
uint reassoc;
uint swtxstop;
uint swtxawake;
};
#define SEC_KEY_1 (1<<0)
#define SEC_KEY_2 (1<<1)
#define SEC_KEY_3 (1<<2)
@ -725,18 +524,6 @@ struct ieee80211_softmac_stats {
#define WEP_KEYS 4
#define WEP_KEY_LEN 13
struct ieee80211_security {
u16 active_key:2,
enabled:1,
auth_mode:2,
auth_algo:4,
unicast_uses_group:1;
u8 key_sizes[WEP_KEYS];
u8 keys[WEP_KEYS][WEP_KEY_LEN];
u8 level;
u16 flags;
} __packed;
/*
802.11 data frame from AP
@ -752,15 +539,6 @@ Total: 28-2340 bytes
*/
struct ieee80211_header_data {
u16 frame_ctl;
u16 duration_id;
u8 addr1[6];
u8 addr2[6];
u8 addr3[6];
u16 seq_ctrl;
};
#define BEACON_PROBE_SSID_ID_POSITION 12
/* Management Frame Information Element Types */
@ -777,17 +555,6 @@ struct ieee80211_header_data {
#define MFIE_TYPE_RATES_EX 50
#define MFIE_TYPE_GENERIC 221
struct ieee80211_info_element_hdr {
u8 id;
u8 len;
} __packed;
struct ieee80211_info_element {
u8 id;
u8 len;
u8 data[0];
} __packed;
/*
* These are the data types that can make up management packets
*
@ -808,49 +575,6 @@ struct ieee80211_info_element {
#define IEEE80211_DEFAULT_TX_ESSID "Penguin"
#define IEEE80211_DEFAULT_BASIC_RATE 10
struct ieee80211_authentication {
struct ieee80211_header_data header;
u16 algorithm;
u16 transaction;
u16 status;
/* struct ieee80211_info_element_hdr info_element; */
} __packed;
struct ieee80211_probe_response {
struct ieee80211_header_data header;
u32 time_stamp[2];
u16 beacon_interval;
u16 capability;
struct ieee80211_info_element info_element;
} __packed;
struct ieee80211_probe_request {
struct ieee80211_header_data header;
} __packed;
struct ieee80211_assoc_request_frame {
struct rtw_ieee80211_hdr_3addr header;
u16 capability;
u16 listen_interval;
struct ieee80211_info_element_hdr info_element;
} __packed;
struct ieee80211_assoc_response_frame {
struct rtw_ieee80211_hdr_3addr header;
u16 capability;
u16 status;
u16 aid;
} __packed;
struct ieee80211_txb {
u8 nr_frags;
u8 encrypted;
u16 reserved;
u16 frag_size;
u16 payload_size;
struct sk_buff *fragments[0];
};
/* SWEEP TABLE ENTRIES NUMBER*/
#define MAX_SWEEP_TAB_ENTRIES 42
#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7
@ -893,44 +617,6 @@ join_res:
> 0: TID
*/
enum ieee80211_state {
/* the card is not linked at all */
IEEE80211_NOLINK = 0,
/* IEEE80211_ASSOCIATING* are for BSS client mode
* the driver shall not perform RX filtering unless
* the state is LINKED.
* The driver shall just check for the state LINKED and
* defaults to NOLINK for ALL the other states (including
* LINKED_SCANNING)
*/
/* the association procedure will start (wq scheduling)*/
IEEE80211_ASSOCIATING,
IEEE80211_ASSOCIATING_RETRY,
/* the association procedure is sending AUTH request*/
IEEE80211_ASSOCIATING_AUTHENTICATING,
/* the association procedure has successfully authentcated
* and is sending association request
*/
IEEE80211_ASSOCIATING_AUTHENTICATED,
/* the link is ok. the card associated to a BSS or linked
* to a ibss cell or acting as an AP and creating the bss
*/
IEEE80211_LINKED,
/* same as LINKED, but the driver shall apply RX filter
* rules as we are in NO_LINK mode. As the card is still
* logically linked, but it is doing a syncro site survey
* then it will be back to LINKED state.
*/
IEEE80211_LINKED_SCANNING,
};
#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
#define DEFAULT_FTS 2346
@ -948,11 +634,6 @@ static inline int is_broadcast_mac_addr(const u8 *addr)
#define CFG_IEEE80211_RESERVE_FCS (1<<0)
#define CFG_IEEE80211_COMPUTE_FCS (1<<1)
struct tx_pending {
int frag;
struct ieee80211_txb *txb;
};
#define MAXTID 16
#define IEEE_A (1<<0)
@ -960,10 +641,6 @@ struct tx_pending {
#define IEEE_G (1<<2)
#define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G)
/* Baron move to ieee80211.c */
int ieee80211_is_empty_essid(const char *essid, int essid_len);
int ieee80211_get_hdrlen(u16 fc);
/* Action category code */
enum rtw_ieee80211_category {
RTW_WLAN_CATEGORY_SPECTRUM_MGMT = 0,
@ -1017,26 +694,6 @@ enum rtw_ieee80211_back_actioncode {
RTW_WLAN_ACTION_DELBA = 2,
};
/* HT features action code */
enum rtw_ieee80211_ht_actioncode {
RTW_WLAN_ACTION_NOTIFY_CH_WIDTH = 0,
RTW_WLAN_ACTION_SM_PS = 1,
RTW_WLAN_ACTION_PSPM = 2,
RTW_WLAN_ACTION_PCO_PHASE = 3,
RTW_WLAN_ACTION_MIMO_CSI_MX = 4,
RTW_WLAN_ACTION_MIMO_NONCP_BF = 5,
RTW_WLAN_ACTION_MIMP_CP_BF = 6,
RTW_WLAN_ACTION_ASEL_INDICATES_FB = 7,
RTW_WLAN_ACTION_HI_INFO_EXCHG = 8,
};
/* BACK (block-ack) parties */
enum rtw_ieee80211_back_parties {
RTW_WLAN_BACK_RECIPIENT = 0,
RTW_WLAN_BACK_INITIATOR = 1,
RTW_WLAN_BACK_TIMER = 2,
};
#define OUI_MICROSOFT 0x0050f2 /* Microsoft (also used in Wi-Fi specs)
* 00:50:F2 */
#define WME_OUI_TYPE 2
@ -1165,26 +822,7 @@ enum parse_res rtw_ieee802_11_parse_elems(u8 *start, uint len,
u8 *rtw_set_fixed_ie(unsigned char *pbuf, unsigned int len,
unsigned char *source, unsigned int *frlen);
u8 *rtw_set_ie(u8 *pbuf, int index, uint len, u8 *source, uint *frlen);
enum secondary_ch_offset {
SCN = 0, /* no secondary channel */
SCA = 1, /* secondary channel above */
SCB = 3, /* secondary channel below */
};
u8 secondary_ch_offset_to_hal_ch_offset(u8 ch_offset);
u8 hal_ch_offset_to_secondary_ch_offset(u8 ch_offset);
u8 *rtw_set_ie_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode,
u8 new_ch, u8 ch_switch_cnt);
u8 *rtw_set_ie_secondary_ch_offset(u8 *buf, u32 *buf_len,
u8 secondary_ch_offset);
u8 *rtw_set_ie_mesh_ch_switch_parm(u8 *buf, u32 *buf_len, u8 ttl,
u8 flags, u16 reason, u16 precedence);
u8 *rtw_get_ie(u8 *pbuf, int index, int *len, int limit);
u8 *rtw_get_ie_ex(u8 *in_ie, uint in_len, u8 eid, u8 *oui,
u8 oui_len, u8 *ie, uint *ielen);
int rtw_ies_remove_ie(u8 *ies, uint *ies_len, uint offset,
u8 eid, u8 *oui, u8 oui_len);
void rtw_set_supported_rate(u8 *SupportedRates, uint mode);
@ -1218,11 +856,6 @@ u8 *rtw_get_wps_attr_content(u8 *wps_ie, uint wps_ielen, u16 target_attr_id,
for (ie = (void *)buf; (((u8 *)ie) - ((u8 *)buf) + 1) < buf_len; \
ie = (void *)(((u8 *)ie) + *(((u8 *)ie)+1) + 2))
void dump_ies(u8 *buf, u32 buf_len);
void dump_wps_ie(u8 *ie, u32 ie_len);
#ifdef CONFIG_88EU_P2P
void dump_p2p_ie(u8 *ie, u32 ie_len);
u8 *rtw_get_p2p_ie(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen);
u8 *rtw_get_p2p_attr(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id,
u8 *buf_attr, u32 *len_attr);
@ -1232,8 +865,6 @@ u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len,
u8 *pdata_attr);
void rtw_wlan_bssid_ex_remove_p2p_attr(struct wlan_bssid_ex *bss_ex,
u8 attr_id);
#endif
uint rtw_get_rateset_len(u8 *rateset);
struct registry_priv;
@ -1241,9 +872,9 @@ int rtw_generate_ie(struct registry_priv *pregistrypriv);
int rtw_get_bit_value_from_ieee_value(u8 val);
uint rtw_is_cckrates_included(u8 *rate);
bool rtw_is_cckrates_included(u8 *rate);
uint rtw_is_cckratesonly_included(u8 *rate);
bool rtw_is_cckratesonly_included(u8 *rate);
int rtw_check_network_type(unsigned char *rate, int ratelen, int channel);
@ -1251,11 +882,6 @@ void rtw_get_bcn_info(struct wlan_network *pnetwork);
void rtw_macaddr_cfg(u8 *mac_addr);
u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40,
unsigned char *MCS_rate);
int rtw_action_frame_parse(const u8 *frame, u32 frame_len, u8 *category,
u8 *action);
const char *action_public_str(u8 action);
u16 rtw_mcs_rate(u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40, unsigned char *MCS_rate);
#endif /* IEEE80211_H */

287
include/ieee80211_ext.h
View file

@ -1,287 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __IEEE80211_EXT_H
#define __IEEE80211_EXT_H
#include <osdep_service.h>
#include <drv_types.h>
#define WMM_OUI_TYPE 2
#define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0
#define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1
#define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2
#define WMM_VERSION 1
#define WPA_PROTO_WPA BIT(0)
#define WPA_PROTO_RSN BIT(1)
#define WPA_KEY_MGMT_IEEE8021X BIT(0)
#define WPA_KEY_MGMT_PSK BIT(1)
#define WPA_KEY_MGMT_NONE BIT(2)
#define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3)
#define WPA_KEY_MGMT_WPA_NONE BIT(4)
#define WPA_CAPABILITY_PREAUTH BIT(0)
#define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6)
#define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9)
#define PMKID_LEN 16
struct wpa_ie_hdr {
u8 elem_id;
u8 len;
u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */
u8 version[2]; /* little endian */
} __packed;
struct rsn_ie_hdr {
u8 elem_id; /* WLAN_EID_RSN */
u8 len;
u8 version[2]; /* little endian */
} __packed;
struct wme_ac_parameter {
#if defined(__LITTLE_ENDIAN)
/* byte 1 */
u8 aifsn:4,
acm:1,
aci:2,
reserved:1;
/* byte 2 */
u8 eCWmin:4,
eCWmax:4;
#elif defined(__BIG_ENDIAN)
/* byte 1 */
u8 reserved:1,
aci:2,
acm:1,
aifsn:4;
/* byte 2 */
u8 eCWmax:4,
eCWmin:4;
#else
#error "Please fix <endian.h>"
#endif
/* bytes 3 & 4 */
u16 txopLimit;
} __packed;
struct wme_parameter_element {
/* required fields for WME version 1 */
u8 oui[3];
u8 oui_type;
u8 oui_subtype;
u8 version;
u8 acInfo;
u8 reserved;
struct wme_ac_parameter ac[4];
} __packed;
#define WPA_PUT_LE16(a, val) \
do { \
(a)[1] = ((u16) (val)) >> 8; \
(a)[0] = ((u16) (val)) & 0xff; \
} while (0)
#define WPA_PUT_BE32(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[3] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define WPA_PUT_LE32(a, val) \
do { \
(a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[0] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *)(a), (val))
/* Action category code */
enum ieee80211_category {
WLAN_CATEGORY_SPECTRUM_MGMT = 0,
WLAN_CATEGORY_QOS = 1,
WLAN_CATEGORY_DLS = 2,
WLAN_CATEGORY_BACK = 3,
WLAN_CATEGORY_HT = 7,
WLAN_CATEGORY_WMM = 17,
};
/* SPECTRUM_MGMT action code */
enum ieee80211_spectrum_mgmt_actioncode {
WLAN_ACTION_SPCT_MSR_REQ = 0,
WLAN_ACTION_SPCT_MSR_RPRT = 1,
WLAN_ACTION_SPCT_TPC_REQ = 2,
WLAN_ACTION_SPCT_TPC_RPRT = 3,
WLAN_ACTION_SPCT_CHL_SWITCH = 4,
WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5,
};
/* BACK action code */
enum ieee80211_back_actioncode {
WLAN_ACTION_ADDBA_REQ = 0,
WLAN_ACTION_ADDBA_RESP = 1,
WLAN_ACTION_DELBA = 2,
};
/* HT features action code */
enum ieee80211_ht_actioncode {
WLAN_ACTION_NOTIFY_CH_WIDTH = 0,
WLAN_ACTION_SM_PS = 1,
WLAN_ACTION_PSPM = 2,
WLAN_ACTION_PCO_PHASE = 3,
WLAN_ACTION_MIMO_CSI_MX = 4,
WLAN_ACTION_MIMO_NONCP_BF = 5,
WLAN_ACTION_MIMP_CP_BF = 6,
WLAN_ACTION_ASEL_INDICATES_FB = 7,
WLAN_ACTION_HI_INFO_EXCHG = 8,
};
/* BACK (block-ack) parties */
enum ieee80211_back_parties {
WLAN_BACK_RECIPIENT = 0,
WLAN_BACK_INITIATOR = 1,
WLAN_BACK_TIMER = 2,
};
struct ieee80211_mgmt {
u16 frame_control;
u16 duration;
u8 da[6];
u8 sa[6];
u8 bssid[6];
u16 seq_ctrl;
union {
struct {
u16 auth_alg;
u16 auth_transaction;
u16 status_code;
/* possibly followed by Challenge text */
u8 variable[0];
} __packed auth;
struct {
u16 reason_code;
} __packed deauth;
struct {
u16 capab_info;
u16 listen_interval;
/* followed by SSID and Supported rates */
u8 variable[0];
} __packed assoc_req;
struct {
u16 capab_info;
u16 status_code;
u16 aid;
/* followed by Supported rates */
u8 variable[0];
} __packed assoc_resp, reassoc_resp;
struct {
u16 capab_info;
u16 listen_interval;
u8 current_ap[6];
/* followed by SSID and Supported rates */
u8 variable[0];
} __packed reassoc_req;
struct {
u16 reason_code;
} __packed disassoc;
struct {
__le64 timestamp;
u16 beacon_int;
u16 capab_info;
/* followed by some of SSID, Supported rates,
* FH Params, DS Params, CF Params, IBSS Params, TIM */
u8 variable[0];
} __packed beacon;
struct {
/* only variable items: SSID, Supported rates */
u8 variable[0];
} __packed probe_req;
struct {
__le64 timestamp;
u16 beacon_int;
u16 capab_info;
/* followed by some of SSID, Supported rates,
* FH Params, DS Params, CF Params, IBSS Params */
u8 variable[0];
} __packed probe_resp;
struct {
u8 category;
union {
struct {
u8 action_code;
u8 dialog_token;
u8 status_code;
u8 variable[0];
} __packed wme_action;
struct {
u8 action_code;
u8 dialog_token;
u16 capab;
u16 timeout;
u16 start_seq_num;
} __packed addba_req;
struct {
u8 action_code;
u8 dialog_token;
u16 status;
u16 capab;
u16 timeout;
} __packed addba_resp;
struct {
u8 action_code;
u16 params;
u16 reason_code;
} __packed delba;
structi {
u8 action_code;
/* capab_info for open and confirm,
* reason for close
*/
u16 aux;
/* Followed in plink_confirm by status
* code, AID and supported rates,
* and directly by supported rates in
* plink_open and plink_close
*/
u8 variable[0];
} __packed plink_action;
struct{
u8 action_code;
u8 variable[0];
} __packed mesh_action;
} __packed u;
} __packed action;
} __packed u;
} __packed;
/* mgmt header + 1 byte category code */
#define IEEE80211_MIN_ACTION_SIZE \
FIELD_OFFSET(struct ieee80211_mgmt, u.action.u)
#endif

111
include/if_ether.h
View file

@ -1,111 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_IF_ETHER_H
#define _LINUX_IF_ETHER_H
/*
* IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble
* and FCS/CRC (frame check sequence).
*/
#define ETH_ALEN 6 /* Octets in one ethernet addr */
#define ETH_HLEN 14 /* Total octets in header. */
#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */
#define ETH_DATA_LEN 1500 /* Max. octets in payload */
#define ETH_FRAME_LEN 1514 /* Max. octets in frame sans FCS */
/*
* These are the defined Ethernet Protocol ID's.
*/
#define ETH_P_LOOP 0x0060 /* Ethernet Loopback packet */
#define ETH_P_PUP 0x0200 /* Xerox PUP packet */
#define ETH_P_PUPAT 0x0201 /* Xerox PUP Addr Trans packet */
#define ETH_P_IP 0x0800 /* Internet Protocol packet */
#define ETH_P_X25 0x0805 /* CCITT X.25 */
#define ETH_P_ARP 0x0806 /* Address Resolution packet */
#define ETH_P_BPQ 0x08FF /* G8BPQ AX.25 Ethernet Packet */
#define ETH_P_IEEEPUP 0x0a00 /* Xerox IEEE802.3 PUP packet */
#define ETH_P_IEEEPUPAT 0x0a01 /* Xerox IEEE802.3 PUP */
#define ETH_P_DEC 0x6000 /* DEC Assigned proto */
#define ETH_P_DNA_DL 0x6001 /* DEC DNA Dump/Load */
#define ETH_P_DNA_RC 0x6002 /* DEC DNA Remote Console */
#define ETH_P_DNA_RT 0x6003 /* DEC DNA Routing */
#define ETH_P_LAT 0x6004 /* DEC LAT */
#define ETH_P_DIAG 0x6005 /* DEC Diagnostics */
#define ETH_P_CUST 0x6006 /* DEC Customer use */
#define ETH_P_SCA 0x6007 /* DEC Systems Comms Arch */
#define ETH_P_RARP 0x8035 /* Reverse Addr Res packet */
#define ETH_P_ATALK 0x809B /* Appletalk DDP */
#define ETH_P_AARP 0x80F3 /* Appletalk AARP */
#define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */
#define ETH_P_IPX 0x8137 /* IPX over DIX */
#define ETH_P_IPV6 0x86DD /* IPv6 over bluebook */
#define ETH_P_PPP_DISC 0x8863 /* PPPoE discovery messages */
#define ETH_P_PPP_SES 0x8864 /* PPPoE session messages */
#define ETH_P_ATMMPOA 0x884c /* MultiProtocol Over ATM */
#define ETH_P_ATMFATE 0x8884 /* Frame-based ATM Transport
* over Ethernet
*/
/*
* Non DIX types. Won't clash for 1500 types.
*/
#define ETH_P_802_3 0x0001 /* Dummy type for 802.3 frames */
#define ETH_P_AX25 0x0002 /* Dummy protocol id for AX.25 */
#define ETH_P_ALL 0x0003 /* Every packet (be careful!!!) */
#define ETH_P_802_2 0x0004 /* 802.2 frames */
#define ETH_P_SNAP 0x0005 /* Internal only */
#define ETH_P_DDCMP 0x0006 /* DEC DDCMP: Internal only */
#define ETH_P_WAN_PPP 0x0007 /* Dummy type for WAN PPP frames*/
#define ETH_P_PPP_MP 0x0008 /* Dummy type for PPP MP frames */
#define ETH_P_LOCALTALK 0x0009 /* Localtalk pseudo type */
#define ETH_P_PPPTALK 0x0010 /* Dummy type for Atalk over PPP*/
#define ETH_P_TR_802_2 0x0011 /* 802.2 frames */
#define ETH_P_MOBITEX 0x0015 /* Mobitex (kaz@cafe.net) */
#define ETH_P_CONTROL 0x0016 /* Card specific control frames */
#define ETH_P_IRDA 0x0017 /* Linux-IrDA */
#define ETH_P_ECONET 0x0018 /* Acorn Econet */
/*
* This is an Ethernet frame header.
*/
struct ethhdr {
unsigned char h_dest[ETH_ALEN]; /* destination eth addr */
unsigned char h_source[ETH_ALEN]; /* source ether addr */
unsigned short h_proto; /* packet type ID field */
};
struct _vlan {
unsigned short h_vlan_TCI; /* Encap prio and VLAN ID */
unsigned short h_vlan_encapsulated_proto;
};
#define get_vlan_id(pvlan) \
((ntohs((unsigned short)pvlan->h_vlan_TCI)) & 0xfff)
#define get_vlan_priority(pvlan) \
((ntohs((unsigned short)pvlan->h_vlan_TCI))>>13)
#define get_vlan_encap_proto(pvlan) \
(ntohs((unsigned short)pvlan->h_vlan_encapsulated_proto))
#endif /* _LINUX_IF_ETHER_H */

24
include/ioctl_cfg80211.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. i*/
#ifndef __IOCTL_CFG80211_H__
#define __IOCTL_CFG80211_H__
@ -77,13 +61,11 @@ void rtw_cfg80211_indicate_disconnect(struct adapter *padapter);
void rtw_cfg80211_indicate_scan_done(struct rtw_wdev_priv *pwdev_priv,
bool aborted);
#ifdef CONFIG_88EU_AP_MODE
void rtw_cfg80211_indicate_sta_assoc(struct adapter *padapter,
u8 *pmgmt_frame, uint frame_len);
void rtw_cfg80211_indicate_sta_disassoc(struct adapter *padapter,
unsigned char *da,
unsigned short reason);
#endif /* CONFIG_88EU_AP_MODE */
void rtw_cfg80211_issue_p2p_provision_request(struct adapter *padapter,
const u8 *buf, size_t len);

125
include/ip.h
View file

@ -1,125 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_IP_H
#define _LINUX_IP_H
/* SOL_IP socket options */
#define IPTOS_TOS_MASK 0x1E
#define IPTOS_TOS(tos) ((tos)&IPTOS_TOS_MASK)
#define IPTOS_LOWDELAY 0x10
#define IPTOS_THROUGHPUT 0x08
#define IPTOS_RELIABILITY 0x04
#define IPTOS_MINCOST 0x02
#define IPTOS_PREC_MASK 0xE0
#define IPTOS_PREC(tos) ((tos)&IPTOS_PREC_MASK)
#define IPTOS_PREC_NETCONTROL 0xe0
#define IPTOS_PREC_INTERNETCONTROL 0xc0
#define IPTOS_PREC_CRITIC_ECP 0xa0
#define IPTOS_PREC_FLASHOVERRIDE 0x80
#define IPTOS_PREC_FLASH 0x60
#define IPTOS_PREC_IMMEDIATE 0x40
#define IPTOS_PREC_PRIORITY 0x20
#define IPTOS_PREC_ROUTINE 0x00
/* IP options */
#define IPOPT_COPY 0x80
#define IPOPT_CLASS_MASK 0x60
#define IPOPT_NUMBER_MASK 0x1f
#define IPOPT_COPIED(o) ((o)&IPOPT_COPY)
#define IPOPT_CLASS(o) ((o)&IPOPT_CLASS_MASK)
#define IPOPT_NUMBER(o) ((o)&IPOPT_NUMBER_MASK)
#define IPOPT_CONTROL 0x00
#define IPOPT_RESERVED1 0x20
#define IPOPT_MEASUREMENT 0x40
#define IPOPT_RESERVED2 0x60
#define IPOPT_END (0 | IPOPT_CONTROL)
#define IPOPT_NOOP (1 | IPOPT_CONTROL)
#define IPOPT_SEC (2 | IPOPT_CONTROL | IPOPT_COPY)
#define IPOPT_LSRR (3 | IPOPT_CONTROL | IPOPT_COPY)
#define IPOPT_TIMESTAMP (4 | IPOPT_MEASUREMENT)
#define IPOPT_RR (7 | IPOPT_CONTROL)
#define IPOPT_SID (8 | IPOPT_CONTROL | IPOPT_COPY)
#define IPOPT_SSRR (9 | IPOPT_CONTROL | IPOPT_COPY)
#define IPOPT_RA (20 | IPOPT_CONTROL | IPOPT_COPY)
#define IPVERSION 4
#define MAXTTL 255
#define IPDEFTTL 64
#define IPOPT_OPTVAL 0
#define IPOPT_OLEN 1
#define IPOPT_OFFSET 2
#define IPOPT_MINOFF 4
#define MAX_IPOPTLEN 40
#define IPOPT_NOP IPOPT_NOOP
#define IPOPT_EOL IPOPT_END
#define IPOPT_TS IPOPT_TIMESTAMP
#define IPOPT_TS_TSONLY 0 /* timestamps only */
#define IPOPT_TS_TSANDADDR 1 /* timestamps and addresses */
#define IPOPT_TS_PRESPEC 3 /* specified modules only */
struct ip_options {
__u32 faddr; /* Saved first hop address */
unsigned char optlen;
unsigned char srr;
unsigned char rr;
unsigned char ts;
unsigned char is_setbyuser:1, /* Set by setsockopt? */
is_data:1, /* Options in __data, rather than skb*/
is_strictroute:1,/* Strict source route */
srr_is_hit:1, /* Packet destn addr was ours */
is_changed:1, /* IP checksum more not valid */
rr_needaddr:1, /* Need to record addr of out dev*/
ts_needtime:1, /* Need to record timestamp */
ts_needaddr:1; /* Need to record addr of out dev */
unsigned char router_alert;
unsigned char __pad1;
unsigned char __pad2;
unsigned char __data[0];
};
#define optlength(opt) (sizeof(struct ip_options) + opt->optlen)
struct iphdr {
#if defined(__LITTLE_ENDIAN_BITFIELD)
__u8 ihl:4,
version:4;
#elif defined(__BIG_ENDIAN_BITFIELD)
__u8 version:4,
ihl:4;
#endif
__u8 tos;
__u16 tot_len;
__u16 id;
__u16 frag_off;
__u8 ttl;
__u8 protocol;
__u16 check;
__u32 saddr;
__u32 daddr;
/*The options start here. */
};
#endif /* _LINUX_IP_H */

26
include/mlme_osdep.h
View file

@ -1,27 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __MLME_OSDEP_H_
#define __MLME_OSDEP_H_
#include <osdep_service.h>
#include <drv_types.h>
#include "osdep_service.h"
#include "drv_types.h"
void rtw_init_mlme_timer(struct adapter *padapter);
void rtw_os_indicate_disconnect(struct adapter *adapter);

349
include/mp_custom_oid.h
View file

@ -1,349 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __CUSTOM_OID_H
#define __CUSTOM_OID_H
/* by Owen */
/* 0xFF818000 - 0xFF81802F RTL8180 Mass Production Kit */
/* 0xFF818500 - 0xFF81850F RTL8185 Setup Utility */
/* 0xFF818580 - 0xFF81858F RTL8185 Phy Status Utility */
/* */
/* by Owen for Production Kit */
/* For Production Kit with Agilent Equipments */
/* in order to make our custom oids hopefully somewhat unique */
/* we will use 0xFF (indicating implementation specific OID) */
/* 81(first byte of non zero Realtek unique identifier) */
/* 80 (second byte of non zero Realtek unique identifier) */
/* XX (the custom OID number - providing 255 possible custom oids) */
#define OID_RT_PRO_RESET_DUT 0xFF818000
#define OID_RT_PRO_SET_DATA_RATE 0xFF818001
#define OID_RT_PRO_START_TEST 0xFF818002
#define OID_RT_PRO_STOP_TEST 0xFF818003
#define OID_RT_PRO_SET_PREAMBLE 0xFF818004
#define OID_RT_PRO_SET_SCRAMBLER 0xFF818005
#define OID_RT_PRO_SET_FILTER_BB 0xFF818006
#define OID_RT_PRO_SET_MANUAL_DIVERSITY_BB 0xFF818007
#define OID_RT_PRO_SET_CHANNEL_DIRECT_CALL 0xFF818008
#define OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL 0xFF818009
#define OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL 0xFF81800A
#define OID_RT_PRO_SET_TX_ANTENNA_BB 0xFF81800D
#define OID_RT_PRO_SET_ANTENNA_BB 0xFF81800E
#define OID_RT_PRO_SET_CR_SCRAMBLER 0xFF81800F
#define OID_RT_PRO_SET_CR_NEW_FILTER 0xFF818010
#define OID_RT_PRO_SET_TX_POWER_CONTROL 0xFF818011
#define OID_RT_PRO_SET_CR_TX_CONFIG 0xFF818012
#define OID_RT_PRO_GET_TX_POWER_CONTROL 0xFF818013
#define OID_RT_PRO_GET_CR_SIGNAL_QUALITY 0xFF818014
#define OID_RT_PRO_SET_CR_SETPOINT 0xFF818015
#define OID_RT_PRO_SET_INTEGRATOR 0xFF818016
#define OID_RT_PRO_SET_SIGNAL_QUALITY 0xFF818017
#define OID_RT_PRO_GET_INTEGRATOR 0xFF818018
#define OID_RT_PRO_GET_SIGNAL_QUALITY 0xFF818019
#define OID_RT_PRO_QUERY_EEPROM_TYPE 0xFF81801A
#define OID_RT_PRO_WRITE_MAC_ADDRESS 0xFF81801B
#define OID_RT_PRO_READ_MAC_ADDRESS 0xFF81801C
#define OID_RT_PRO_WRITE_CIS_DATA 0xFF81801D
#define OID_RT_PRO_READ_CIS_DATA 0xFF81801E
#define OID_RT_PRO_WRITE_POWER_CONTROL 0xFF81801F
#define OID_RT_PRO_READ_POWER_CONTROL 0xFF818020
#define OID_RT_PRO_WRITE_EEPROM 0xFF818021
#define OID_RT_PRO_READ_EEPROM 0xFF818022
#define OID_RT_PRO_RESET_TX_PACKET_SENT 0xFF818023
#define OID_RT_PRO_QUERY_TX_PACKET_SENT 0xFF818024
#define OID_RT_PRO_RESET_RX_PACKET_RECEIVED 0xFF818025
#define OID_RT_PRO_QUERY_RX_PACKET_RECEIVED 0xFF818026
#define OID_RT_PRO_QUERY_RX_PACKET_CRC32_ERROR 0xFF818027
#define OID_RT_PRO_QUERY_CURRENT_ADDRESS 0xFF818028
#define OID_RT_PRO_QUERY_PERMANENT_ADDRESS 0xFF818029
#define OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS 0xFF81802A
#define OID_RT_PRO_RECEIVE_PACKET 0xFF81802C
/* added by Owen on 04/08/03 for Cameo's request */
#define OID_RT_PRO_WRITE_EEPROM_BYTE 0xFF81802D
#define OID_RT_PRO_READ_EEPROM_BYTE 0xFF81802E
#define OID_RT_PRO_SET_MODULATION 0xFF81802F
/* */
/* Sean */
#define OID_RT_DRIVER_OPTION 0xFF818080
#define OID_RT_RF_OFF 0xFF818081
#define OID_RT_AUTH_STATUS 0xFF818082
/* */
#define OID_RT_PRO_SET_CONTINUOUS_TX 0xFF81800B
#define OID_RT_PRO_SET_SINGLE_CARRIER_TX 0xFF81800C
#define OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX 0xFF81802B
#define OID_RT_PRO_SET_SINGLE_TONE_TX 0xFF818043
/* */
/* by Owen for RTL8185 Phy Status Report Utility */
#define OID_RT_UTILITY_false_ALARM_COUNTERS 0xFF818580
#define OID_RT_UTILITY_SELECT_DEBUG_MODE 0xFF818581
#define OID_RT_UTILITY_SELECT_SUBCARRIER_NUMBER 0xFF818582
#define OID_RT_UTILITY_GET_RSSI_STATUS 0xFF818583
#define OID_RT_UTILITY_GET_FRAME_DETECTION_STATUS 0xFF818584
#define OID_RT_UTILITY_GET_AGC_AND_FREQUENCY_OFFSET_ESTIMATION_STATUS \
0xFF818585
#define OID_RT_UTILITY_GET_CHANNEL_ESTIMATION_STATUS 0xFF818586
/* */
/* by Owen on 03/09/19-03/09/22 for RTL8185 */
#define OID_RT_WIRELESS_MODE 0xFF818500
#define OID_RT_SUPPORTED_RATES 0xFF818501
#define OID_RT_DESIRED_RATES 0xFF818502
#define OID_RT_WIRELESS_MODE_STARTING_ADHOC 0xFF818503
/* */
#define OID_RT_GET_CONNECT_STATE 0xFF030001
#define OID_RT_RESCAN 0xFF030002
#define OID_RT_SET_KEY_LENGTH 0xFF030003
#define OID_RT_SET_DEFAULT_KEY_ID 0xFF030004
#define OID_RT_SET_CHANNEL 0xFF010182
#define OID_RT_SET_SNIFFER_MODE 0xFF010183
#define OID_RT_GET_SIGNAL_QUALITY 0xFF010184
#define OID_RT_GET_SMALL_PACKET_CRC 0xFF010185
#define OID_RT_GET_MIDDLE_PACKET_CRC 0xFF010186
#define OID_RT_GET_LARGE_PACKET_CRC 0xFF010187
#define OID_RT_GET_TX_RETRY 0xFF010188
#define OID_RT_GET_RX_RETRY 0xFF010189
#define OID_RT_PRO_SET_FW_DIG_STATE 0xFF01018A/* S */
#define OID_RT_PRO_SET_FW_RA_STATE 0xFF01018B/* S */
#define OID_RT_GET_RX_TOTAL_PACKET 0xFF010190
#define OID_RT_GET_TX_BEACON_OK 0xFF010191
#define OID_RT_GET_TX_BEACON_ERR 0xFF010192
#define OID_RT_GET_RX_ICV_ERR 0xFF010193
#define OID_RT_SET_ENCRYPTION_ALGORITHM 0xFF010194
#define OID_RT_SET_NO_AUTO_RESCAN 0xFF010195
#define OID_RT_GET_PREAMBLE_MODE 0xFF010196
#define OID_RT_GET_DRIVER_UP_DELTA_TIME 0xFF010197
#define OID_RT_GET_AP_IP 0xFF010198
#define OID_RT_GET_CHANNELPLAN 0xFF010199
#define OID_RT_SET_PREAMBLE_MODE 0xFF01019A
#define OID_RT_SET_BCN_INTVL 0xFF01019B
#define OID_RT_GET_RF_VENDER 0xFF01019C
#define OID_RT_DEDICATE_PROBE 0xFF01019D
#define OID_RT_PRO_RX_FILTER_PATTERN 0xFF01019E
#define OID_RT_GET_DCST_CURRENT_THRESHOLD 0xFF01019F
#define OID_RT_GET_CCA_ERR 0xFF0101A0
#define OID_RT_GET_CCA_UPGRADE_THRESHOLD 0xFF0101A1
#define OID_RT_GET_CCA_FALLBACK_THRESHOLD 0xFF0101A2
#define OID_RT_GET_CCA_UPGRADE_EVALUATE_TIMES 0xFF0101A3
#define OID_RT_GET_CCA_FALLBACK_EVALUATE_TIMES 0xFF0101A4
/* by Owen on 03/31/03 for Cameo's request */
#define OID_RT_SET_RATE_ADAPTIVE 0xFF0101A5
/* */
#define OID_RT_GET_DCST_EVALUATE_PERIOD 0xFF0101A5
#define OID_RT_GET_DCST_TIME_UNIT_INDEX 0xFF0101A6
#define OID_RT_GET_TOTAL_TX_BYTES 0xFF0101A7
#define OID_RT_GET_TOTAL_RX_BYTES 0xFF0101A8
#define OID_RT_CURRENT_TX_POWER_LEVEL 0xFF0101A9
#define OID_RT_GET_ENC_KEY_MISMATCH_COUNT 0xFF0101AA
#define OID_RT_GET_ENC_KEY_MATCH_COUNT 0xFF0101AB
#define OID_RT_GET_CHANNEL 0xFF0101AC
#define OID_RT_SET_CHANNELPLAN 0xFF0101AD
#define OID_RT_GET_HARDWARE_RADIO_OFF 0xFF0101AE
#define OID_RT_CHANNELPLAN_BY_COUNTRY 0xFF0101AF
#define OID_RT_SCAN_AVAILABLE_BSSID 0xFF0101B0
#define OID_RT_GET_HARDWARE_VERSION 0xFF0101B1
#define OID_RT_GET_IS_ROAMING 0xFF0101B2
#define OID_RT_GET_IS_PRIVACY 0xFF0101B3
#define OID_RT_GET_KEY_MISMATCH 0xFF0101B4
#define OID_RT_SET_RSSI_ROAM_TRAFFIC_TH 0xFF0101B5
#define OID_RT_SET_RSSI_ROAM_SIGNAL_TH 0xFF0101B6
#define OID_RT_RESET_LOG 0xFF0101B7
#define OID_RT_GET_LOG 0xFF0101B8
#define OID_RT_SET_INDICATE_HIDDEN_AP 0xFF0101B9
#define OID_RT_GET_HEADER_FAIL 0xFF0101BA
#define OID_RT_SUPPORTED_WIRELESS_MODE 0xFF0101BB
#define OID_RT_GET_CHANNEL_LIST 0xFF0101BC
#define OID_RT_GET_SCAN_IN_PROGRESS 0xFF0101BD
#define OID_RT_GET_TX_INFO 0xFF0101BE
#define OID_RT_RF_READ_WRITE_OFFSET 0xFF0101BF
#define OID_RT_RF_READ_WRITE 0xFF0101C0
/* For Netgear request. 2005.01.13, by rcnjko. */
#define OID_RT_FORCED_DATA_RATE 0xFF0101C1
#define OID_RT_WIRELESS_MODE_FOR_SCAN_LIST 0xFF0101C2
/* For Netgear request. 2005.02.17, by rcnjko. */
#define OID_RT_GET_BSS_WIRELESS_MODE 0xFF0101C3
/* For AZ project. 2005.06.27, by rcnjko. */
#define OID_RT_SCAN_WITH_MAGIC_PACKET 0xFF0101C4
/* Vincent 8185MP */
#define OID_RT_PRO_RX_FILTER 0xFF0111C0
#define OID_CE_USB_WRITE_REGISTRY 0xFF0111C1
#define OID_CE_USB_READ_REGISTRY 0xFF0111C2
#define OID_RT_PRO_SET_INITIAL_GA 0xFF0111C3
#define OID_RT_PRO_SET_BB_RF_STANDBY_MODE 0xFF0111C4
#define OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE 0xFF0111C5
#define OID_RT_PRO_SET_TX_CHARGE_PUMP 0xFF0111C6
#define OID_RT_PRO_SET_RX_CHARGE_PUMP 0xFF0111C7
#define OID_RT_PRO_RF_WRITE_REGISTRY 0xFF0111C8
#define OID_RT_PRO_RF_READ_REGISTRY 0xFF0111C9
#define OID_RT_PRO_QUERY_RF_TYPE 0xFF0111CA
/* AP OID */
#define OID_RT_AP_GET_ASSOCIATED_STATION_LIST 0xFF010300
#define OID_RT_AP_GET_CURRENT_TIME_STAMP 0xFF010301
#define OID_RT_AP_SWITCH_INTO_AP_MODE 0xFF010302
#define OID_RT_AP_SET_DTIM_PERIOD 0xFF010303
/* Determine if driver supports AP mode. */
#define OID_RT_AP_SUPPORTED 0xFF010304
/* Set WPA-PSK passphrase into authenticator. */
#define OID_RT_AP_SET_PASSPHRASE 0xFF010305
/* 8187MP. 2004.09.06, by rcnjko. */
#define OID_RT_PRO8187_WI_POLL 0xFF818780
#define OID_RT_PRO_WRITE_BB_REG 0xFF818781
#define OID_RT_PRO_READ_BB_REG 0xFF818782
#define OID_RT_PRO_WRITE_RF_REG 0xFF818783
#define OID_RT_PRO_READ_RF_REG 0xFF818784
/* Meeting House. added by Annie, 2005-07-20. */
#define OID_RT_MH_VENDER_ID 0xFFEDC100
/* 8711 MP OID added 20051230. */
#define OID_RT_PRO8711_JOIN_BSS 0xFF871100/* S */
#define OID_RT_PRO_READ_REGISTER 0xFF871101 /* Q */
#define OID_RT_PRO_WRITE_REGISTER 0xFF871102 /* S */
#define OID_RT_PRO_BURST_READ_REGISTER 0xFF871103 /* Q */
#define OID_RT_PRO_BURST_WRITE_REGISTER 0xFF871104 /* S */
#define OID_RT_PRO_WRITE_TXCMD 0xFF871105 /* S */
#define OID_RT_PRO_READ16_EEPROM 0xFF871106 /* Q */
#define OID_RT_PRO_WRITE16_EEPROM 0xFF871107 /* S */
#define OID_RT_PRO_H2C_SET_COMMAND 0xFF871108 /* S */
#define OID_RT_PRO_H2C_QUERY_RESULT 0xFF871109 /* Q */
#define OID_RT_PRO8711_WI_POLL 0xFF87110A /* Q */
#define OID_RT_PRO8711_PKT_LOSS 0xFF87110B /* Q */
#define OID_RT_RD_ATTRIB_MEM 0xFF87110C/* Q */
#define OID_RT_WR_ATTRIB_MEM 0xFF87110D/* S */
/* Method 2 for H2C/C2H */
#define OID_RT_PRO_H2C_CMD_MODE 0xFF871110 /* S */
#define OID_RT_PRO_H2C_CMD_RSP_MODE 0xFF871111 /* Q */
#define OID_RT_PRO_H2C_CMD_EVENT_MODE 0xFF871112 /* S */
#define OID_RT_PRO_WAIT_C2H_EVENT 0xFF871113 /* Q */
#define OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST 0xFF871114/* Q */
#define OID_RT_PRO_SCSI_ACCESS_TEST 0xFF871115 /* Q, S */
#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT 0xFF871116 /* S */
#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN 0xFF871117 /* Q,S */
#define OID_RT_RRO_RX_PKT_VIA_IOCTRL 0xFF871118 /* Q */
#define OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL 0xFF871119 /* Q */
#define OID_RT_RPO_SET_PWRMGT_TEST 0xFF87111A /* S */
#define OID_RT_PRO_QRY_PWRMGT_TEST 0XFF87111B /* Q */
#define OID_RT_RPO_ASYNC_RWIO_TEST 0xFF87111C /* S */
#define OID_RT_RPO_ASYNC_RWIO_POLL 0xFF87111D /* Q */
#define OID_RT_PRO_SET_RF_INTFS 0xFF87111E /* S */
#define OID_RT_POLL_RX_STATUS 0xFF87111F /* Q */
#define OID_RT_PRO_CFG_DEBUG_MESSAGE 0xFF871120 /* Q,S */
#define OID_RT_PRO_SET_DATA_RATE_EX 0xFF871121/* S */
#define OID_RT_PRO_SET_BASIC_RATE 0xFF871122/* S */
#define OID_RT_PRO_READ_TSSI 0xFF871123/* S */
#define OID_RT_PRO_SET_POWER_TRACKING 0xFF871124/* S */
#define OID_RT_PRO_QRY_PWRSTATE 0xFF871150 /* Q */
#define OID_RT_PRO_SET_PWRSTATE 0xFF871151 /* S */
/* Method 2 , using workitem */
#define OID_RT_SET_READ_REG 0xFF871181 /* S */
#define OID_RT_SET_WRITE_REG 0xFF871182 /* S */
#define OID_RT_SET_BURST_READ_REG 0xFF871183 /* S */
#define OID_RT_SET_BURST_WRITE_REG 0xFF871184 /* S */
#define OID_RT_SET_WRITE_TXCMD 0xFF871185 /* S */
#define OID_RT_SET_READ16_EEPROM 0xFF871186 /* S */
#define OID_RT_SET_WRITE16_EEPROM 0xFF871187 /* S */
#define OID_RT_QRY_POLL_WKITEM 0xFF871188 /* Q */
/* For SDIO INTERFACE only */
#define OID_RT_PRO_SYNCPAGERW_SRAM 0xFF8711A0 /* Q, S */
#define OID_RT_PRO_871X_DRV_EXT 0xFF8711A1
/* For USB INTERFACE only */
#define OID_RT_PRO_USB_VENDOR_REQ 0xFF8711B0 /* Q, S */
#define OID_RT_PRO_SCSI_AUTO_TEST 0xFF8711B1 /* S */
#define OID_RT_PRO_USB_MAC_AC_FIFO_WRITE 0xFF8711B2 /* S */
#define OID_RT_PRO_USB_MAC_RX_FIFO_READ 0xFF8711B3 /* Q */
#define OID_RT_PRO_USB_MAC_RX_FIFO_POLLING 0xFF8711B4 /* Q */
#define OID_RT_PRO_H2C_SET_RATE_TABLE 0xFF8711FB /* S */
#define OID_RT_PRO_H2C_GET_RATE_TABLE 0xFF8711FC /* S */
#define OID_RT_PRO_H2C_C2H_LBK_TEST 0xFF8711FE
#define OID_RT_PRO_ENCRYPTION_CTRL 0xFF871200 /* Q, S */
#define OID_RT_PRO_ADD_STA_INFO 0xFF871201 /* S */
#define OID_RT_PRO_DELE_STA_INFO 0xFF871202 /* S */
#define OID_RT_PRO_QUERY_DR_VARIABLE 0xFF871203 /* Q */
#define OID_RT_PRO_RX_PACKET_TYPE 0xFF871204 /* Q, S */
#define OID_RT_PRO_READ_EFUSE 0xFF871205 /* Q */
#define OID_RT_PRO_WRITE_EFUSE 0xFF871206 /* S */
#define OID_RT_PRO_RW_EFUSE_PGPKT 0xFF871207 /* Q, S */
#define OID_RT_GET_EFUSE_CURRENT_SIZE 0xFF871208 /* Q */
#define OID_RT_SET_BANDWIDTH 0xFF871209 /* S */
#define OID_RT_SET_CRYSTAL_CAP 0xFF87120A /* S */
#define OID_RT_SET_RX_PACKET_TYPE 0xFF87120B /* S */
#define OID_RT_GET_EFUSE_MAX_SIZE 0xFF87120C /* Q */
#define OID_RT_PRO_SET_TX_AGC_OFFSET 0xFF87120D /* S */
#define OID_RT_PRO_SET_PKT_TEST_MODE 0xFF87120E /* S */
#define OID_RT_PRO_FOR_EVM_TEST_SETTING 0xFF87120F /* S */
#define OID_RT_PRO_GET_THERMAL_METER 0xFF871210 /* Q */
#define OID_RT_RESET_PHY_RX_PACKET_COUNT 0xFF871211 /* S */
#define OID_RT_GET_PHY_RX_PACKET_RECEIVED 0xFF871212 /* Q */
#define OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR 0xFF871213 /* Q */
#define OID_RT_SET_POWER_DOWN 0xFF871214 /* S */
#define OID_RT_GET_POWER_MODE 0xFF871215 /* Q */
#define OID_RT_PRO_EFUSE 0xFF871216 /* Q, S */
#define OID_RT_PRO_EFUSE_MAP 0xFF871217 /* Q, S */
#endif /* ifndef __CUSTOM_OID_H */

41
include/nic_spec.h
View file

@ -1,41 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __NIC_SPEC_H__
#define __NIC_SPEC_H__
#define RTL8711_MCTRL_ (0x20000)
#define RTL8711_UART_ (0x30000)
#define RTL8711_TIMER_ (0x40000)
#define RTL8711_FINT_ (0x50000)
#define RTL8711_HINT_ (0x50000)
#define RTL8711_GPIO_ (0x60000)
#define RTL8711_WLANCTRL_ (0x200000)
#define RTL8711_WLANFF_ (0xe00000)
#define RTL8711_HCICTRL_ (0x600000)
#define RTL8711_SYSCFG_ (0x620000)
#define RTL8711_SYSCTRL_ (0x620000)
#define RTL8711_MCCTRL_ (0x020000)
#include <rtl8711_regdef.h>
#include <rtl8711_bitdef.h>
#endif /* __RTL8711_SPEC_H__ */

797
include/odm.h
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File diff suppressed because it is too large Load diff

71
include/odm_HWConfig.h
View file

@ -1,62 +1,16 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __HALHWOUTSRC_H__
#define __HALHWOUTSRC_H__
/* Definition */
/* CCK Rates, TxHT = 0 */
#define DESC92C_RATE1M 0x00
#define DESC92C_RATE2M 0x01
#define DESC92C_RATE5_5M 0x02
#define DESC92C_RATE11M 0x03
/* OFDM Rates, TxHT = 0 */
#define DESC92C_RATE6M 0x04
#define DESC92C_RATE9M 0x05
#define DESC92C_RATE12M 0x06
#define DESC92C_RATE18M 0x07
#define DESC92C_RATE24M 0x08
#define DESC92C_RATE36M 0x09
#define DESC92C_RATE48M 0x0a
#define DESC92C_RATE54M 0x0b
/* MCS Rates, TxHT = 1 */
#define DESC92C_RATEMCS0 0x0c
#define DESC92C_RATEMCS1 0x0d
#define DESC92C_RATEMCS2 0x0e
#define DESC92C_RATEMCS3 0x0f
#define DESC92C_RATEMCS4 0x10
#define DESC92C_RATEMCS5 0x11
#define DESC92C_RATEMCS6 0x12
#define DESC92C_RATEMCS7 0x13
#define DESC92C_RATEMCS8 0x14
#define DESC92C_RATEMCS9 0x15
#define DESC92C_RATEMCS10 0x16
#define DESC92C_RATEMCS11 0x17
#define DESC92C_RATEMCS12 0x18
#define DESC92C_RATEMCS13 0x19
#define DESC92C_RATEMCS14 0x1a
#define DESC92C_RATEMCS15 0x1b
#define DESC92C_RATEMCS15_SG 0x1c
#define DESC92C_RATEMCS32 0x20
/* structure and define */
@ -106,28 +60,11 @@ struct phy_status_rpt {
#endif
};
void odm_Init_RSSIForDM(struct odm_dm_struct *pDM_Odm);
void ODM_PhyStatusQuery(struct odm_dm_struct *pDM_Odm,
struct odm_phy_status_info *pPhyInfo,
struct phy_info *pPhyInfo,
u8 *pPhyStatus,
struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt);
void ODM_MacStatusQuery(struct odm_dm_struct *pDM_Odm,
u8 *pMacStatus,
u8 MacID,
bool bPacketMatchBSSID,
bool bPacketToSelf,
bool bPacketBeacon);
enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *pDM_Odm,
enum rf_radio_path Content,
enum rf_radio_path eRFPath);
enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *pDM_Odm,
enum odm_bb_config_type ConfigType);
enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *pDM_Odm);
enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *pDM_Odm);
#endif

34
include/odm_RTL8188E.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __ODM_RTL8188E_H__
#define __ODM_RTL8188E_H__
@ -27,8 +11,6 @@
#define MAIN_ANT_CGCS_RX 0
#define AUX_ANT_CGCS_RX 1
void ODM_DIG_LowerBound_88E(struct odm_dm_struct *pDM_Odm);
void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *pDM_Odm);
void ODM_AntennaDiversity_88E(struct odm_dm_struct *pDM_Odm);
@ -43,14 +25,4 @@ void ODM_AntselStatistics_88E(struct odm_dm_struct *pDM_Odm, u8 antsel_tr_mux,
void odm_FastAntTraining(struct odm_dm_struct *pDM_Odm);
void odm_FastAntTrainingCallback(struct odm_dm_struct *pDM_Odm);
void odm_FastAntTrainingWorkItemCallback(struct odm_dm_struct *pDM_Odm);
void odm_PrimaryCCA_Init(struct odm_dm_struct *pDM_Odm);
bool ODM_DynamicPrimaryCCA_DupRTS(struct odm_dm_struct *pDM_Odm);
void odm_DynamicPrimaryCCA(struct odm_dm_struct *pDM_Odm);
#endif

28
include/odm_RegConfig8188E.h
View file

@ -1,34 +1,12 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __INC_ODM_REGCONFIG_H_8188E
#define __INC_ODM_REGCONFIG_H_8188E
void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data,
enum rf_radio_path RF_PATH, u32 RegAddr);
void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm,
u32 Addr, u32 Data);
void odm_ConfigRF_RadioB_8188E(struct odm_dm_struct *pDM_Odm,
u32 Addr, u32 Data);
void odm_ConfigMAC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u8 Data);
void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,

46
include/odm_RegDefine11AC.h
View file

@ -1,46 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_REGDEFINE11AC_H__
#define __ODM_REGDEFINE11AC_H__
/* 2 RF REG LIST */
/* 2 BB REG LIST */
/* PAGE 8 */
/* PAGE 9 */
#define ODM_REG_OFDM_FA_RST_11AC 0x9A4
/* PAGE A */
#define ODM_REG_CCK_CCA_11AC 0xA0A
#define ODM_REG_CCK_FA_RST_11AC 0xA2C
#define ODM_REG_CCK_FA_11AC 0xA5C
/* PAGE C */
#define ODM_REG_IGI_A_11AC 0xC50
/* PAGE E */
#define ODM_REG_IGI_B_11AC 0xE50
/* PAGE F */
#define ODM_REG_OFDM_FA_11AC 0xF48
/* 2 MAC REG LIST */
/* DIG Related */
#define ODM_BIT_IGI_11AC 0xFFFFFFFF
#endif

133
include/odm_RegDefine11N.h
View file

@ -1,76 +1,23 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __ODM_REGDEFINE11N_H__
#define __ODM_REGDEFINE11N_H__
/* 2 RF REG LIST */
#define ODM_REG_RF_MODE_11N 0x00
#define ODM_REG_RF_0B_11N 0x0B
#define ODM_REG_CHNBW_11N 0x18
#define ODM_REG_T_METER_11N 0x24
#define ODM_REG_RF_25_11N 0x25
#define ODM_REG_RF_26_11N 0x26
#define ODM_REG_RF_27_11N 0x27
#define ODM_REG_RF_2B_11N 0x2B
#define ODM_REG_RF_2C_11N 0x2C
#define ODM_REG_RXRF_A3_11N 0x3C
#define ODM_REG_T_METER_92D_11N 0x42
#define ODM_REG_T_METER_88E_11N 0x42
/* 2 BB REG LIST */
/* PAGE 8 */
#define ODM_REG_BB_CTRL_11N 0x800
#define ODM_REG_RF_PIN_11N 0x804
#define ODM_REG_PSD_CTRL_11N 0x808
#define ODM_REG_TX_ANT_CTRL_11N 0x80C
#define ODM_REG_BB_PWR_SAV5_11N 0x818
#define ODM_REG_CCK_RPT_FORMAT_11N 0x824
#define ODM_REG_RX_DEFUALT_A_11N 0x858
#define ODM_REG_RX_DEFUALT_B_11N 0x85A
#define ODM_REG_BB_PWR_SAV3_11N 0x85C
#define ODM_REG_ANTSEL_CTRL_11N 0x860
#define ODM_REG_RX_ANT_CTRL_11N 0x864
#define ODM_REG_PIN_CTRL_11N 0x870
#define ODM_REG_BB_PWR_SAV1_11N 0x874
#define ODM_REG_ANTSEL_PATH_11N 0x878
#define ODM_REG_BB_3WIRE_11N 0x88C
#define ODM_REG_SC_CNT_11N 0x8C4
#define ODM_REG_PSD_DATA_11N 0x8B4
#define ODM_REG_PIN_CTRL_11N 0x870
#define ODM_REG_SC_CNT_11N 0x8C4
/* PAGE 9 */
#define ODM_REG_ANT_MAPPING1_11N 0x914
#define ODM_REG_ANT_MAPPING2_11N 0x918
/* PAGE A */
#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00
#define ODM_REG_CCK_CCA_11N 0xA0A
#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C
#define ODM_REG_CCK_ANTDIV_PARA3_11N 0xA10
#define ODM_REG_CCK_ANTDIV_PARA4_11N 0xA14
#define ODM_REG_CCK_FILTER_PARA1_11N 0xA22
#define ODM_REG_CCK_FILTER_PARA2_11N 0xA23
#define ODM_REG_CCK_FILTER_PARA3_11N 0xA24
#define ODM_REG_CCK_FILTER_PARA4_11N 0xA25
#define ODM_REG_CCK_FILTER_PARA5_11N 0xA26
#define ODM_REG_CCK_FILTER_PARA6_11N 0xA27
#define ODM_REG_CCK_FILTER_PARA7_11N 0xA28
#define ODM_REG_CCK_FILTER_PARA8_11N 0xA29
#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00
#define ODM_REG_CCK_CCA_11N 0xA0A
#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C
#define ODM_REG_CCK_FA_RST_11N 0xA2C
#define ODM_REG_CCK_FA_MSB_11N 0xA58
#define ODM_REG_CCK_FA_LSB_11N 0xA5C
@ -78,28 +25,10 @@
#define ODM_REG_BB_PWR_SAV4_11N 0xA74
/* PAGE B */
#define ODM_REG_LNA_SWITCH_11N 0xB2C
#define ODM_REG_PATH_SWITCH_11N 0xB30
#define ODM_REG_RSSI_CTRL_11N 0xB38
#define ODM_REG_CONFIG_ANTA_11N 0xB68
#define ODM_REG_RSSI_BT_11N 0xB9C
/* PAGE C */
#define ODM_REG_OFDM_FA_HOLDC_11N 0xC00
#define ODM_REG_RX_PATH_11N 0xC04
#define ODM_REG_TRMUX_11N 0xC08
#define ODM_REG_OFDM_FA_RSTC_11N 0xC0C
#define ODM_REG_RXIQI_MATRIX_11N 0xC14
#define ODM_REG_TXIQK_MATRIX_LSB1_11N 0xC4C
#define ODM_REG_IGI_A_11N 0xC50
#define ODM_REG_ANTDIV_PARA2_11N 0xC54
#define ODM_REG_IGI_B_11N 0xC58
#define ODM_REG_ANTDIV_PARA3_11N 0xC5C
#define ODM_REG_BB_PWR_SAV2_11N 0xC70
#define ODM_REG_RX_OFF_11N 0xC7C
#define ODM_REG_TXIQK_MATRIXA_11N 0xC80
#define ODM_REG_TXIQK_MATRIXB_11N 0xC88
#define ODM_REG_TXIQK_MATRIXA_LSB2_11N 0xC94
#define ODM_REG_TXIQK_MATRIXB_LSB2_11N 0xC9C
#define ODM_REG_RXIQK_MATRIX_LSB_11N 0xCA0
#define ODM_REG_IGI_A_11N 0xC50
#define ODM_REG_ANTDIV_PARA1_11N 0xCA4
#define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0
/* PAGE D */
@ -107,54 +36,12 @@
#define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0
#define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4
#define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8
/* PAGE E */
#define ODM_REG_TXAGC_A_6_18_11N 0xE00
#define ODM_REG_TXAGC_A_24_54_11N 0xE04
#define ODM_REG_TXAGC_A_1_MCS32_11N 0xE08
#define ODM_REG_TXAGC_A_MCS0_3_11N 0xE10
#define ODM_REG_TXAGC_A_MCS4_7_11N 0xE14
#define ODM_REG_TXAGC_A_MCS8_11_11N 0xE18
#define ODM_REG_TXAGC_A_MCS12_15_11N 0xE1C
#define ODM_REG_FPGA0_IQK_11N 0xE28
#define ODM_REG_TXIQK_TONE_A_11N 0xE30
#define ODM_REG_RXIQK_TONE_A_11N 0xE34
#define ODM_REG_TXIQK_PI_A_11N 0xE38
#define ODM_REG_RXIQK_PI_A_11N 0xE3C
#define ODM_REG_TXIQK_11N 0xE40
#define ODM_REG_RXIQK_11N 0xE44
#define ODM_REG_IQK_AGC_PTS_11N 0xE48
#define ODM_REG_IQK_AGC_RSP_11N 0xE4C
#define ODM_REG_BLUETOOTH_11N 0xE6C
#define ODM_REG_RX_WAIT_CCA_11N 0xE70
#define ODM_REG_TX_CCK_RFON_11N 0xE74
#define ODM_REG_TX_CCK_BBON_11N 0xE78
#define ODM_REG_OFDM_RFON_11N 0xE7C
#define ODM_REG_OFDM_BBON_11N 0xE80
#define ODM_REG_TX2RX_11N 0xE84
#define ODM_REG_TX2TX_11N 0xE88
#define ODM_REG_RX_CCK_11N 0xE8C
#define ODM_REG_RX_OFDM_11N 0xED0
#define ODM_REG_RX_WAIT_RIFS_11N 0xED4
#define ODM_REG_RX2RX_11N 0xED8
#define ODM_REG_STANDBY_11N 0xEDC
#define ODM_REG_SLEEP_11N 0xEE0
#define ODM_REG_PMPD_ANAEN_11N 0xEEC
/* 2 MAC REG LIST */
#define ODM_REG_BB_RST_11N 0x02
#define ODM_REG_ANTSEL_PIN_11N 0x4C
#define ODM_REG_EARLY_MODE_11N 0x4D0
#define ODM_REG_RSSI_MONITOR_11N 0x4FE
#define ODM_REG_EDCA_VO_11N 0x500
#define ODM_REG_EDCA_VI_11N 0x504
#define ODM_REG_EDCA_BE_11N 0x508
#define ODM_REG_EDCA_BK_11N 0x50C
#define ODM_REG_TXPAUSE_11N 0x522
#define ODM_REG_RESP_TX_11N 0x6D8
#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0
#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4
#define ODM_REG_RESP_TX_11N 0x6D8
/* DIG Related */
#define ODM_BIT_IGI_11N 0x0000007F
#define ODM_BIT_IGI_11N 0x0000007F
#endif

143
include/odm_debug.h
View file

@ -1,143 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_DBG_H__
#define __ODM_DBG_H__
/* */
/* Define the debug levels */
/* */
/* 1. DBG_TRACE and DBG_LOUD are used for normal cases. */
/* They can help SW engineer to develop or trace states changed */
/* and also help HW enginner to trace every operation to and from HW, */
/* e.g IO, Tx, Rx. */
/* */
/* 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases, */
/* which help us to debug SW or HW. */
/* Never used in a call to ODM_RT_TRACE()! */
#define ODM_DBG_OFF 1
/* Fatal bug. */
/* For example, Tx/Rx/IO locked up, OS hangs, memory access violation, */
/* resource allocation failed, unexpected HW behavior, HW BUG and so on. */
#define ODM_DBG_SERIOUS 2
/* Abnormal, rare, or unexpeted cases. */
/* For example, IRP/Packet/OID canceled, device suprisely unremoved and so on. */
#define ODM_DBG_WARNING 3
/* Normal case with useful information about current SW or HW state. */
/* For example, Tx/Rx descriptor to fill, Tx/Rx descr. completed status, */
/* SW protocol state change, dynamic mechanism state change and so on. */
/* */
#define ODM_DBG_LOUD 4
/* Normal case with detail execution flow or information. */
#define ODM_DBG_TRACE 5
/* Define the tracing components */
/* BB Functions */
#define ODM_COMP_DIG BIT0
#define ODM_COMP_RA_MASK BIT1
#define ODM_COMP_DYNAMIC_TXPWR BIT2
#define ODM_COMP_FA_CNT BIT3
#define ODM_COMP_RSSI_MONITOR BIT4
#define ODM_COMP_CCK_PD BIT5
#define ODM_COMP_ANT_DIV BIT6
#define ODM_COMP_PWR_SAVE BIT7
#define ODM_COMP_PWR_TRA BIT8
#define ODM_COMP_RATE_ADAPTIVE BIT9
#define ODM_COMP_PATH_DIV BIT10
#define ODM_COMP_PSD BIT11
#define ODM_COMP_DYNAMIC_PRICCA BIT12
#define ODM_COMP_RXHP BIT13
/* MAC Functions */
#define ODM_COMP_EDCA_TURBO BIT16
#define ODM_COMP_EARLY_MODE BIT17
/* RF Functions */
#define ODM_COMP_TX_PWR_TRACK BIT24
#define ODM_COMP_RX_GAIN_TRACK BIT25
#define ODM_COMP_CALIBRATION BIT26
/* Common Functions */
#define ODM_COMP_COMMON BIT30
#define ODM_COMP_INIT BIT31
/*------------------------Export Marco Definition---------------------------*/
#define DbgPrint pr_info
#define RT_PRINTK(fmt, args...) \
DbgPrint( "%s(): " fmt, __func__, ## args);
#ifndef ASSERT
#define ASSERT(expr)
#endif
#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) \
if (((comp) & pDM_Odm->DebugComponents) && \
(level <= pDM_Odm->DebugLevel)) { \
if (pDM_Odm->SupportICType == ODM_RTL8192C) \
DbgPrint("[ODM-92C] "); \
else if (pDM_Odm->SupportICType == ODM_RTL8192D) \
DbgPrint("[ODM-92D] "); \
else if (pDM_Odm->SupportICType == ODM_RTL8723A) \
DbgPrint("[ODM-8723A] "); \
else if (pDM_Odm->SupportICType == ODM_RTL8188E) \
DbgPrint("[ODM-8188E] "); \
else if (pDM_Odm->SupportICType == ODM_RTL8812) \
DbgPrint("[ODM-8812] "); \
else if (pDM_Odm->SupportICType == ODM_RTL8821) \
DbgPrint("[ODM-8821] "); \
RT_PRINTK fmt; \
}
#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) \
if (((comp) & pDM_Odm->DebugComponents) && \
(level <= pDM_Odm->DebugLevel)) { \
RT_PRINTK fmt; \
}
#define ODM_RT_ASSERT(pDM_Odm, expr, fmt) \
if (!(expr)) { \
DbgPrint( "Assertion failed! %s at ......\n", #expr); \
DbgPrint( " ......%s,%s,line=%d\n", __FILE__, \
__func__, __LINE__); \
RT_PRINTK fmt; \
ASSERT(false); \
}
#define ODM_dbg_enter() { DbgPrint("==> %s\n", __func__); }
#define ODM_dbg_exit() { DbgPrint("<== %s\n", __func__); }
#define ODM_dbg_trace(str) { DbgPrint("%s:%s\n", __func__, str); }
#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) \
if (((comp) & pDM_Odm->DebugComponents) && \
(level <= pDM_Odm->DebugLevel)) { \
int __i; \
u8 *__ptr = (u8 *)ptr; \
DbgPrint("[ODM] "); \
DbgPrint(title_str); \
DbgPrint(" "); \
for (__i = 0; __i < 6; __i++) \
DbgPrint("%02X%s", __ptr[__i], (__i==5)?"":"-");\
DbgPrint("\n"); \
}
void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm);
#endif /* __ODM_DBG_H__ */

164
include/odm_interface.h
View file

@ -1,164 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_INTERFACE_H__
#define __ODM_INTERFACE_H__
/* */
/* =========== Constant/Structure/Enum/... Define */
/* */
/* */
/* =========== Macro Define */
/* */
#define _reg_all(_name) ODM_##_name
#define _reg_ic(_name, _ic) ODM_##_name##_ic
#define _bit_all(_name) BIT_##_name
#define _bit_ic(_name, _ic) BIT_##_name##_ic
/* _cat: implemented by Token-Pasting Operator. */
/*===================================
#define ODM_REG_DIG_11N 0xC50
#define ODM_REG_DIG_11AC 0xDDD
ODM_REG(DIG,_pDM_Odm)
=====================================*/
#define _reg_11N(_name) ODM_REG_##_name##_11N
#define _reg_11AC(_name) ODM_REG_##_name##_11AC
#define _bit_11N(_name) ODM_BIT_##_name##_11N
#define _bit_11AC(_name) ODM_BIT_##_name##_11AC
#define _cat(_name, _ic_type, _func) \
( \
((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) : \
_func##_11AC(_name) \
)
/* _name: name of register or bit. */
/* Example: "ODM_REG(R_A_AGC_CORE1, pDM_Odm)" */
/* gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C",
* depends on SupportICType. */
#define ODM_REG(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _reg)
#define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit)
enum odm_h2c_cmd {
ODM_H2C_RSSI_REPORT = 0,
ODM_H2C_PSD_RESULT= 1,
ODM_H2C_PathDiv = 2,
ODM_MAX_H2CCMD
};
/* 2012/02/17 MH For non-MP compile pass only. Linux does not support workitem. */
/* Suggest HW team to use thread instead of workitem. Windows also support the feature. */
typedef void (*RT_WORKITEM_CALL_BACK)(void *pContext);
/* =========== Extern Variable ??? It should be forbidden. */
/* =========== EXtern Function Prototype */
u8 ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr);
u16 ODM_Read2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr);
u32 ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr);
void ODM_Write1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u8 Data);
void ODM_Write2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u16 Data);
void ODM_Write4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 Data);
void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr,
u32 BitMask, u32 Data);
u32 ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask);
void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr,
u32 BitMask, u32 Data);
u32 ODM_GetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask);
void ODM_SetRFReg(struct odm_dm_struct *pDM_Odm, enum rf_radio_path eRFPath,
u32 RegAddr, u32 BitMask, u32 Data);
u32 ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum rf_radio_path eRFPath,
u32 RegAddr, u32 BitMask);
/* Memory Relative Function. */
void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u32 length);
void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u32 length);
s32 ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2,
u32 length);
/* ODM MISC-spin lock relative API. */
void ODM_AcquireSpinLock(struct odm_dm_struct *pDM_Odm,
enum RT_SPINLOCK_TYPE type);
void ODM_ReleaseSpinLock(struct odm_dm_struct *pDM_Odm,
enum RT_SPINLOCK_TYPE type);
/* ODM MISC-workitem relative API. */
void ODM_InitializeWorkItem(struct odm_dm_struct *pDM_Odm, void *pRtWorkItem,
RT_WORKITEM_CALL_BACK RtWorkItemCallback,
void *pContext, const char *szID);
void ODM_StartWorkItem(void *pRtWorkItem);
void ODM_StopWorkItem(void *pRtWorkItem);
void ODM_FreeWorkItem(void *pRtWorkItem);
void ODM_ScheduleWorkItem(void *pRtWorkItem);
void ODM_IsWorkItemScheduled(void *pRtWorkItem);
/* ODM Timer relative API. */
void ODM_StallExecution(u32 usDelay);
void ODM_delay_ms(u32 ms);
void ODM_delay_us(u32 us);
void ODM_sleep_ms(u32 ms);
void ODM_sleep_us(u32 us);
void ODM_SetTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer,
u32 msDelay);
void ODM_InitializeTimer(struct odm_dm_struct *pDM_Odm,
struct timer_list *pTimer, void *CallBackFunc,
void *pContext, const char *szID);
void ODM_CancelTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer);
void ODM_ReleaseTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer);
/* ODM FW relative API. */
u32 ODM_FillH2CCmd(u8 *pH2CBuffer, u32 H2CBufferLen, u32 CmdNum,
u32 *pElementID, u32 *pCmdLen, u8 **pCmbBuffer,
u8 *CmdStartSeq);
#endif /* __ODM_INTERFACE_H__ */

103
include/odm_precomp.h
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@ -1,103 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_PRECOMP_H__
#define __ODM_PRECOMP_H__
#include "odm_types.h"
#define TEST_FALG___ 1
/* 2 Config Flags and Structs - defined by each ODM Type */
#include <osdep_service.h>
#include <drv_types.h>
#include <hal_intf.h>
/* 2 OutSrc Header Files */
#include "odm.h"
#include "odm_HWConfig.h"
#include "odm_debug.h"
#include "odm_RegDefine11AC.h"
#include "odm_RegDefine11N.h"
#include "HalPhyRf.h"
#include "HalPhyRf_8188e.h"/* for IQK,LCK,Power-tracking */
#include "Hal8188ERateAdaptive.h"/* for RA,Power training */
#include "rtl8188e_hal.h"
#include "odm_interface.h"
#include "odm_reg.h"
#include "HalHWImg8188E_MAC.h"
#include "HalHWImg8188E_RF.h"
#include "HalHWImg8188E_BB.h"
#include "Hal8188EReg.h"
#include "odm_RegConfig8188E.h"
#include "odm_RTL8188E.h"
void odm_CmnInfoHook_Debug(struct odm_dm_struct *pDM_Odm);
void odm_CmnInfoInit_Debug(struct odm_dm_struct *pDM_Odm);
void odm_DIGInit(struct odm_dm_struct *pDM_Odm);
void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm);
void odm_DynamicBBPowerSavingInit(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm);
void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivInit_NIC(struct odm_dm_struct *pDM_Odm);
void odm_GlobalAdapterCheck(void);
void odm_CmnInfoUpdate_Debug(struct odm_dm_struct *pDM_Odm);
void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm);
void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm);
void odm_DIG(struct odm_dm_struct *pDM_Odm);
void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMaskMP(struct odm_dm_struct *pDM_Odm);
void odm_DynamicBBPowerSaving(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivChkAntSwitch(struct odm_dm_struct *pDM_Odm, u8 Step);
void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPower(struct odm_dm_struct *pDM_Odm);
void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivInit(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm);
void odm_1R_CCA(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMaskAPADSL(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPowerNIC(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPowerAP(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheckMP(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheckAP(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm);
void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingCheckMP(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingCheckAP(struct odm_dm_struct *pDM_Odm);
#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0)
void odm_SwAntDivChkAntSwitchCallback(void *FunctionContext);
#else
void odm_SwAntDivChkAntSwitchCallback(struct timer_list *t);
#endif
void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm);
void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm);
#endif /* __ODM_PRECOMP_H__ */

116
include/odm_reg.h
View file

@ -1,116 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* */
/* File Name: odm_reg.h */
/* */
/* Description: */
/* */
/* This file is for general register definition. */
/* */
/* */
/* */
#ifndef __HAL_ODM_REG_H__
#define __HAL_ODM_REG_H__
/* */
/* Register Definition */
/* */
/* MAC REG */
#define ODM_BB_RESET 0x002
#define ODM_DUMMY 0x4fe
#define ODM_EDCA_VO_PARAM 0x500
#define ODM_EDCA_VI_PARAM 0x504
#define ODM_EDCA_BE_PARAM 0x508
#define ODM_EDCA_BK_PARAM 0x50C
#define ODM_TXPAUSE 0x522
/* BB REG */
#define ODM_FPGA_PHY0_PAGE8 0x800
#define ODM_PSD_SETTING 0x808
#define ODM_AFE_SETTING 0x818
#define ODM_TXAGC_B_6_18 0x830
#define ODM_TXAGC_B_24_54 0x834
#define ODM_TXAGC_B_MCS32_5 0x838
#define ODM_TXAGC_B_MCS0_MCS3 0x83c
#define ODM_TXAGC_B_MCS4_MCS7 0x848
#define ODM_TXAGC_B_MCS8_MCS11 0x84c
#define ODM_ANALOG_REGISTER 0x85c
#define ODM_RF_INTERFACE_OUTPUT 0x860
#define ODM_TXAGC_B_MCS12_MCS15 0x868
#define ODM_TXAGC_B_11_A_2_11 0x86c
#define ODM_AD_DA_LSB_MASK 0x874
#define ODM_ENABLE_3_WIRE 0x88c
#define ODM_PSD_REPORT 0x8b4
#define ODM_R_ANT_SELECT 0x90c
#define ODM_CCK_ANT_SELECT 0xa07
#define ODM_CCK_PD_THRESH 0xa0a
#define ODM_CCK_RF_REG1 0xa11
#define ODM_CCK_MATCH_FILTER 0xa20
#define ODM_CCK_RAKE_MAC 0xa2e
#define ODM_CCK_CNT_RESET 0xa2d
#define ODM_CCK_TX_DIVERSITY 0xa2f
#define ODM_CCK_FA_CNT_MSB 0xa5b
#define ODM_CCK_FA_CNT_LSB 0xa5c
#define ODM_CCK_NEW_FUNCTION 0xa75
#define ODM_OFDM_PHY0_PAGE_C 0xc00
#define ODM_OFDM_RX_ANT 0xc04
#define ODM_R_A_RXIQI 0xc14
#define ODM_R_A_AGC_CORE1 0xc50
#define ODM_R_A_AGC_CORE2 0xc54
#define ODM_R_B_AGC_CORE1 0xc58
#define ODM_R_AGC_PAR 0xc70
#define ODM_R_HTSTF_AGC_PAR 0xc7c
#define ODM_TX_PWR_TRAINING_A 0xc90
#define ODM_TX_PWR_TRAINING_B 0xc98
#define ODM_OFDM_FA_CNT1 0xcf0
#define ODM_OFDM_PHY0_PAGE_D 0xd00
#define ODM_OFDM_FA_CNT2 0xda0
#define ODM_OFDM_FA_CNT3 0xda4
#define ODM_OFDM_FA_CNT4 0xda8
#define ODM_TXAGC_A_6_18 0xe00
#define ODM_TXAGC_A_24_54 0xe04
#define ODM_TXAGC_A_1_MCS32 0xe08
#define ODM_TXAGC_A_MCS0_MCS3 0xe10
#define ODM_TXAGC_A_MCS4_MCS7 0xe14
#define ODM_TXAGC_A_MCS8_MCS11 0xe18
#define ODM_TXAGC_A_MCS12_MCS15 0xe1c
/* RF REG */
#define ODM_GAIN_SETTING 0x00
#define ODM_CHANNEL 0x18
/* Ant Detect Reg */
#define ODM_DPDT 0x300
/* PSD Init */
#define ODM_PSDREG 0x808
/* 92D Path Div */
#define PATHDIV_REG 0xB30
#define PATHDIV_TRI 0xBA0
/* */
/* Bitmap Definition */
/* */
#define BIT_FA_RESET BIT0
#endif

60
include/odm_types.h
View file

@ -1,61 +1,21 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __ODM_TYPES_H__
#define __ODM_TYPES_H__
/* */
/* Define Different SW team support */
/* */
#define ODM_AP 0x01 /* BIT0 */
#define ODM_ADSL 0x02 /* BIT1 */
#define ODM_CE 0x04 /* BIT2 */
#define ODM_MP 0x08 /* BIT3 */
#define RT_PCI_INTERFACE 1
#define RT_USB_INTERFACE 2
#define RT_SDIO_INTERFACE 3
#define ODM_CE 0x04 /* BIT(2) */
enum HAL_STATUS {
HAL_STATUS_SUCCESS,
HAL_STATUS_FAILURE,
};
enum RT_SPINLOCK_TYPE {
RT_TEMP = 1,
};
#include <basic_types.h>
#define DEV_BUS_TYPE RT_USB_INTERFACE
#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) \
SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
#define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) \
SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value)
#define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) \
SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)
/* define useless flag to avoid compile warning */
#define USE_WORKITEM 0
#define FOR_BRAZIL_PRETEST 0
#define BT_30_SUPPORT 0
#define FPGA_TWO_MAC_VERIFICATION 0
#define SET_TX_DESC_ANTSEL_A_88E(__ptxdesc, __value) \
le32p_replace_bits((__le32 *)(__ptxdesc + 8), __value, BIT(24))
#define SET_TX_DESC_ANTSEL_B_88E(__ptxdesc, __value) \
le32p_replace_bits((__le32 *)(__ptxdesc + 8), __value, BIT(25))
#define SET_TX_DESC_ANTSEL_C_88E(__ptxdesc, __value) \
le32p_replace_bits((__le32 *)(__ptxdesc + 28), __value, BIT(29))
#endif /* __ODM_TYPES_H__ */

32
include/osdep_intf.h
View file

@ -1,28 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __OSDEP_INTF_H_
#define __OSDEP_INTF_H_
#include <osdep_service.h>
#include <drv_types.h>
#include "osdep_service.h"
#include "drv_types.h"
struct intf_priv {
u8 *intf_dev;
@ -51,7 +34,6 @@ The protection mechanism is through the pending queue.
struct urb *piorw_urb;
u8 io_irp_cnt;
u8 bio_irp_pending;
struct semaphore io_retevt;
struct timer_list io_timer;
u8 bio_irp_timeout;
u8 bio_timer_cancel;
@ -65,19 +47,13 @@ u32 rtw_start_drv_threads(struct adapter *padapter);
void rtw_stop_drv_threads (struct adapter *padapter);
void rtw_cancel_all_timer(struct adapter *padapter);
int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname);
struct net_device *rtw_init_netdev(struct adapter *padapter);
u16 rtw_recv_select_queue(struct sk_buff *skb);
void rtw_proc_init_one(struct net_device *dev);
void rtw_proc_remove_one(struct net_device *dev);
void rtw_ips_dev_unload(struct adapter *padapter);
int rtw_ips_pwr_up(struct adapter *padapter);
void rtw_ips_pwr_down(struct adapter *padapter);
int rtw_hw_suspend(struct adapter *padapter);
int rtw_hw_resume(struct adapter *padapter);
#endif /* _OSDEP_INTF_H_ */

314
include/osdep_service.h
View file

@ -1,30 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __OSDEP_SERVICE_H_
#define __OSDEP_SERVICE_H_
#include <linux/version.h>
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)
#include <linux/sched/signal.h>
#endif
#include <basic_types.h>
#include "basic_types.h"
#define _FAIL 0
#define _SUCCESS 1
@ -58,6 +39,7 @@
#include <linux/interrupt.h> /* for struct tasklet_struct */
#include <linux/ip.h>
#include <linux/kthread.h>
#include <linux/vmalloc.h>
#include <linux/usb.h>
#include <linux/usb/ch9.h>
@ -67,89 +49,14 @@ struct __queue {
spinlock_t lock;
};
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0)
#define thread_exit() complete_and_exit(NULL, 0)
#else
#define thread_exit() kthread_complete_and_exit(NULL, 0)
#endif
static inline struct list_head *get_list_head(struct __queue *queue)
{
return (&(queue->queue));
}
static inline int _enter_critical_mutex(struct mutex *pmutex, unsigned long *pirqL)
{
int ret;
ret = mutex_lock_interruptible(pmutex);
return ret;
}
static inline void _exit_critical_mutex(struct mutex *pmutex, unsigned long *pirqL)
{
mutex_unlock(pmutex);
}
static inline void rtw_list_delete(struct list_head *plist)
{
list_del_init(plist);
}
#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0)
static inline void _init_timer(struct timer_list *ptimer,struct net_device *nic_hdl,void *pfunc,void* cntx)
{
ptimer->function = pfunc;
ptimer->data = (unsigned long)cntx;
init_timer(ptimer);
}
#endif
static inline void _set_timer(struct timer_list *ptimer,u32 delay_time)
{
mod_timer(ptimer , (jiffies+(delay_time*HZ/1000)));
}
static inline void _cancel_timer(struct timer_list *ptimer,u8 *bcancelled)
{
del_timer_sync(ptimer);
*bcancelled= true;/* true ==1; false==0 */
}
#define RTW_TIMER_HDL_ARGS void *FunctionContext
#define RTW_TIMER_HDL_NAME(name) rtw_##name##_timer_hdl
#define RTW_DECLARE_TIMER_HDL(name) void RTW_TIMER_HDL_NAME(name)(RTW_TIMER_HDL_ARGS)
static inline void _init_workitem(struct work_struct *pwork, void *pfunc, void * cntx)
{
INIT_WORK(pwork, pfunc);
}
static inline void _set_workitem(struct work_struct *pwork)
{
schedule_work(pwork);
}
static inline void _cancel_workitem_sync(struct work_struct *pwork)
{
cancel_work_sync(pwork);
}
/* */
/* Global Mutex: can only be used at PASSIVE level. */
/* */
#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \
{ \
while (atomic_inc_return((atomic_t *)&(_MutexCounter)) != 1)\
{ \
atomic_dec((atomic_t *)&(_MutexCounter)); \
msleep(10); \
} \
}
#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \
{ \
atomic_dec((atomic_t *)&(_MutexCounter)); \
mod_timer(ptimer, jiffies + msecs_to_jiffies(delay_time));
}
static inline int rtw_netif_queue_stopped(struct net_device *pnetdev)
@ -160,154 +67,33 @@ static inline int rtw_netif_queue_stopped(struct net_device *pnetdev)
netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 3));
}
static inline void rtw_netif_wake_queue(struct net_device *pnetdev)
{
netif_tx_wake_all_queues(pnetdev);
}
static inline void rtw_netif_start_queue(struct net_device *pnetdev)
{
netif_tx_start_all_queues(pnetdev);
}
static inline void rtw_netif_stop_queue(struct net_device *pnetdev)
{
netif_tx_stop_all_queues(pnetdev);
}
#ifndef BIT
#define BIT(x) ( 1 << (x))
#endif
#define BIT0 0x00000001
#define BIT1 0x00000002
#define BIT2 0x00000004
#define BIT3 0x00000008
#define BIT4 0x00000010
#define BIT5 0x00000020
#define BIT6 0x00000040
#define BIT7 0x00000080
#define BIT8 0x00000100
#define BIT9 0x00000200
#define BIT10 0x00000400
#define BIT11 0x00000800
#define BIT12 0x00001000
#define BIT13 0x00002000
#define BIT14 0x00004000
#define BIT15 0x00008000
#define BIT16 0x00010000
#define BIT17 0x00020000
#define BIT18 0x00040000
#define BIT19 0x00080000
#define BIT20 0x00100000
#define BIT21 0x00200000
#define BIT22 0x00400000
#define BIT23 0x00800000
#define BIT24 0x01000000
#define BIT25 0x02000000
#define BIT26 0x04000000
#define BIT27 0x08000000
#define BIT28 0x10000000
#define BIT29 0x20000000
#define BIT30 0x40000000
#define BIT31 0x80000000
#define BIT32 0x0100000000
#define BIT33 0x0200000000
#define BIT34 0x0400000000
#define BIT35 0x0800000000
#define BIT36 0x1000000000
extern int RTW_STATUS_CODE(int error_code);
/* flags used for rtw_update_mem_stat() */
enum {
MEM_STAT_VIR_ALLOC_SUCCESS,
MEM_STAT_VIR_ALLOC_FAIL,
MEM_STAT_VIR_FREE,
MEM_STAT_PHY_ALLOC_SUCCESS,
MEM_STAT_PHY_ALLOC_FAIL,
MEM_STAT_PHY_FREE,
MEM_STAT_TX, /* used to distinguish TX/RX, asigned from caller */
MEM_STAT_TX_ALLOC_SUCCESS,
MEM_STAT_TX_ALLOC_FAIL,
MEM_STAT_TX_FREE,
MEM_STAT_RX, /* used to distinguish TX/RX, asigned from caller */
MEM_STAT_RX_ALLOC_SUCCESS,
MEM_STAT_RX_ALLOC_FAIL,
MEM_STAT_RX_FREE
};
extern unsigned char MCS_rate_2R[16];
extern unsigned char MCS_rate_1R[16];
extern unsigned char RTW_WPA_OUI[];
extern unsigned char WPA_TKIP_CIPHER[4];
extern unsigned char RSN_TKIP_CIPHER[4];
#define rtw_update_mem_stat(flag, sz) do {} while (0)
u8 *_rtw_vmalloc(u32 sz);
u8 *_rtw_zvmalloc(u32 sz);
void _rtw_vmfree(u8 *pbuf, u32 sz);
u8 *_rtw_zmalloc(u32 sz);
u8 *_rtw_malloc(u32 sz);
void _rtw_mfree(u8 *pbuf, u32 sz);
#define rtw_vmalloc(sz) _rtw_vmalloc((sz))
#define rtw_zvmalloc(sz) _rtw_zvmalloc((sz))
#define rtw_vmfree(pbuf, sz) _rtw_vmfree((pbuf), (sz))
#define rtw_malloc(sz) _rtw_malloc((sz))
#define rtw_zmalloc(sz) _rtw_zmalloc((sz))
#define rtw_mfree(pbuf, sz) _rtw_mfree((pbuf), (sz))
void *rtw_malloc2d(int h, int w, int size);
void rtw_mfree2d(void *pbuf, int h, int w, int size);
u32 _rtw_down_sema(struct semaphore *sema);
void _rtw_mutex_init(struct mutex *pmutex);
void _rtw_mutex_free(struct mutex *pmutex);
void _rtw_spinlock_free(spinlock_t *plock);
void _rtw_init_queue(struct __queue *pqueue);
#define rtw_init_queue(q) \
do { \
INIT_LIST_HEAD(&((q)->queue)); \
spin_lock_init(&((q)->lock)); \
} while (0)
u32 rtw_systime_to_ms(u32 systime);
u32 rtw_ms_to_systime(u32 ms);
s32 rtw_get_passing_time_ms(u32 start);
s32 rtw_get_time_interval_ms(u32 start, u32 end);
void rtw_sleep_schedulable(int ms);
void rtw_msleep_os(int ms);
void rtw_usleep_os(int us);
u32 rtw_atoi(u8 *s);
void rtw_mdelay_os(int ms);
void rtw_udelay_os(int us);
void rtw_yield_os(void);
static inline unsigned char _cancel_timer_ex(struct timer_list *ptimer)
{
return del_timer_sync(ptimer);
}
static __inline void thread_enter(char *name)
{
#ifdef daemonize
daemonize("%s", name);
#endif
allow_signal(SIGTERM);
}
static inline void flush_signals_thread(void)
{
if (signal_pending (current))
flush_signals(current);
}
static inline int res_to_status(int res)
{
return res;
}
#define _RND(sz, r) ((((sz)+((r)-1))/(r))*(r))
#define RND4(x) (((x >> 2) + (((x & 3) == 0) ? 0: 1)) << 2)
@ -351,37 +137,6 @@ static inline u32 _RND512(u32 sz)
return val;
}
static inline u32 bitshift(u32 bitmask)
{
u32 i;
for (i = 0; i <= 31; i++)
if (((bitmask>>i) & 0x1) == 1) break;
return i;
}
/* limitation of path length */
#define PATH_LENGTH_MAX PATH_MAX
void rtw_suspend_lock_init(void);
void rtw_suspend_lock_uninit(void);
void rtw_lock_suspend(void);
void rtw_unlock_suspend(void);
/* Atomic integer operations */
#define ATOMIC_T atomic_t
void ATOMIC_SET(ATOMIC_T *v, int i);
int ATOMIC_READ(ATOMIC_T *v);
void ATOMIC_ADD(ATOMIC_T *v, int i);
void ATOMIC_SUB(ATOMIC_T *v, int i);
void ATOMIC_INC(ATOMIC_T *v);
void ATOMIC_DEC(ATOMIC_T *v);
int ATOMIC_ADD_RETURN(ATOMIC_T *v, int i);
int ATOMIC_SUB_RETURN(ATOMIC_T *v, int i);
int ATOMIC_INC_RETURN(ATOMIC_T *v);
int ATOMIC_DEC_RETURN(ATOMIC_T *v);
struct rtw_netdev_priv_indicator {
void *priv;
u32 sizeof_priv;
@ -405,9 +160,6 @@ void rtw_free_netdev(struct net_device *netdev);
#define rtw_signal_process(pid, sig) kill_pid(find_vpid((pid)),(sig), 1)
u64 rtw_modular64(u64 x, u64 y);
u64 rtw_division64(u64 x, u64 y);
/* Macros for handling unaligned memory accesses */
#define RTW_GET_BE16(a) ((u16) (((a)[0] << 8) | (a)[1]))
@ -425,15 +177,7 @@ u64 rtw_division64(u64 x, u64 y);
#define RTW_GET_BE24(a) ((((u32) (a)[0]) << 16) | (((u32) (a)[1]) << 8) | \
((u32) (a)[2]))
#define RTW_PUT_BE24(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[2] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RTW_GET_BE32(a) ((((u32) (a)[0]) << 24) | (((u32) (a)[1]) << 16) | \
(((u32) (a)[2]) << 8) | ((u32) (a)[3]))
#define RTW_PUT_BE32(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \
@ -442,50 +186,16 @@ u64 rtw_division64(u64 x, u64 y);
(a)[3] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RTW_GET_LE32(a) ((((u32) (a)[3]) << 24) | (((u32) (a)[2]) << 16) | \
(((u32) (a)[1]) << 8) | ((u32) (a)[0]))
#define RTW_PUT_LE32(a, val) \
do { \
(a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[0] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RTW_GET_BE64(a) ((((u64) (a)[0]) << 56) | (((u64) (a)[1]) << 48) | \
(((u64) (a)[2]) << 40) | (((u64) (a)[3]) << 32) | \
(((u64) (a)[4]) << 24) | (((u64) (a)[5]) << 16) | \
(((u64) (a)[6]) << 8) | ((u64) (a)[7]))
#define RTW_PUT_BE64(a, val) \
do { \
(a)[0] = (u8) (((u64) (val)) >> 56); \
(a)[1] = (u8) (((u64) (val)) >> 48); \
(a)[2] = (u8) (((u64) (val)) >> 40); \
(a)[3] = (u8) (((u64) (val)) >> 32); \
(a)[4] = (u8) (((u64) (val)) >> 24); \
(a)[5] = (u8) (((u64) (val)) >> 16); \
(a)[6] = (u8) (((u64) (val)) >> 8); \
(a)[7] = (u8) (((u64) (val)) & 0xff); \
} while (0)
#define RTW_GET_LE64(a) ((((u64) (a)[7]) << 56) | (((u64) (a)[6]) << 48) | \
(((u64) (a)[5]) << 40) | (((u64) (a)[4]) << 32) | \
(((u64) (a)[3]) << 24) | (((u64) (a)[2]) << 16) | \
(((u64) (a)[1]) << 8) | ((u64) (a)[0]))
void rtw_buf_free(u8 **buf, u32 *buf_len);
void rtw_buf_update(u8 **buf, u32 *buf_len, u8 *src, u32 src_len);
struct rtw_cbuf {
u32 write;
u32 read;
u32 size;
void *bufs[0];
void *bufs[];
};
bool rtw_cbuf_full(struct rtw_cbuf *cbuf);
bool rtw_cbuf_empty(struct rtw_cbuf *cbuf);
bool rtw_cbuf_push(struct rtw_cbuf *cbuf, void *buf);
void *rtw_cbuf_pop(struct rtw_cbuf *cbuf);
struct rtw_cbuf *rtw_cbuf_alloc(u32 size);
int wifirate2_ratetbl_inx(unsigned char rate);

34
include/recv_osdep.h
View file

@ -1,27 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RECV_OSDEP_H_
#define __RECV_OSDEP_H_
#include <osdep_service.h>
#include <drv_types.h>
#include "osdep_service.h"
#include "drv_types.h"
int _rtw_init_recv_priv(struct recv_priv *precvpriv, struct adapter *padapter);
void _rtw_free_recv_priv(struct recv_priv *precvpriv);
@ -30,23 +14,15 @@ s32 rtw_recv_entry(struct recv_frame *precv_frame);
int rtw_recv_indicatepkt(struct adapter *adapter, struct recv_frame *recv_frame);
void rtw_recv_returnpacket(struct net_device *cnxt, struct sk_buff *retpkt);
void rtw_hostapd_mlme_rx(struct adapter *padapter, struct recv_frame *recv_fr);
void rtw_handle_tkip_mic_err(struct adapter *padapter, u8 bgroup);
int rtw_init_recv_priv(struct recv_priv *precvpriv, struct adapter *padapter);
void rtw_free_recv_priv(struct recv_priv *precvpriv);
int rtw_os_recv_resource_init(struct recv_priv *recvpr, struct adapter *adapt);
int rtw_os_recv_resource_alloc(struct adapter *adapt, struct recv_frame *recvfr);
void rtw_os_recv_resource_free(struct recv_priv *precvpriv);
int rtw_os_recvbuf_resource_alloc(struct adapter *adapt, struct recv_buf *buf);
int rtw_os_recvbuf_resource_free(struct adapter *adapt, struct recv_buf *buf);
void rtw_os_read_port(struct adapter *padapter, struct recv_buf *precvbuf);
void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl);
int nat25_handle_frame(struct adapter *priv, struct sk_buff *skb);
int _netdev_open(struct net_device *pnetdev);
int netdev_open(struct net_device *pnetdev);
int netdev_close(struct net_device *pnetdev);

38
include/rtl8188e_cmd.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTL8188E_CMD_H__
#define __RTL8188E_CMD_H__
@ -43,15 +27,6 @@ enum RTL8188E_H2C_CMD_ID {
/* Class DM */
H2C_DM_MACID_CFG = 0x40,
H2C_DM_TXBF = 0x41,
/* Class BT */
H2C_BT_COEX_MASK = 0x60,
H2C_BT_COEX_GPIO_MODE = 0x61,
H2C_BT_DAC_SWING_VAL = 0x62,
H2C_BT_PSD_RST = 0x63,
/* Class */
H2C_RESET_TSF = 0xc0,
};
struct cmd_msg_parm {
@ -60,10 +35,6 @@ struct cmd_msg_parm {
u8 buf[6];
};
enum {
PWRS
};
struct setpwrmode_parm {
u8 Mode;/* 0:Active,1:LPS,2:WMMPS */
u8 SmartPS_RLBM;/* LPS= 0:PS_Poll,1:PS_Poll,2:NullData,WMM= 0:PS_Poll,1:NullData */
@ -107,14 +78,11 @@ struct P2P_PS_CTWPeriod_t {
/* host message to firmware cmd */
void rtl8188e_set_FwPwrMode_cmd(struct adapter *padapter, u8 Mode);
void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *padapter, u8 mstatus);
u8 rtl8188e_set_rssi_cmd(struct adapter *padapter, u8 *param);
u8 rtl8188e_set_raid_cmd(struct adapter *padapter, u32 mask);
void rtl8188e_Add_RateATid(struct adapter *padapter, u32 bitmap, u8 arg,
u8 rssi_level);
#ifdef CONFIG_88EU_P2P
void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state);
#endif /* CONFIG_88EU_P2P */
void CheckFwRsvdPageContent(struct adapter *adapt);
void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, __le16 mstatus_rpt);

46
include/rtl8188e_dm.h
View file

@ -1,57 +1,23 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTL8188E_DM_H__
#define __RTL8188E_DM_H__
enum{
UP_LINK,
DOWN_LINK,
};
/* duplicate code,will move to ODM ######### */
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM 9
#define HP_THERMAL_NUM 8
/* duplicate code,will move to ODM ######### */
struct dm_priv {
u8 DM_Type;
u8 DMFlag;
u8 InitDMFlag;
u32 InitODMFlag;
/* Upper and Lower Signal threshold for Rate Adaptive*/
int UndecoratedSmoothedPWDB;
int UndecoratedSmoothedCCK;
/* Lower Signal threshold for Rate Adaptive */
int EntryMinUndecoratedSmoothedPWDB;
int EntryMaxUndecoratedSmoothedPWDB;
int MinUndecoratedPWDBForDM;
int LastMinUndecoratedPWDBForDM;
/* for High Power */
u8 bDynamicTxPowerEnable;
u8 LastDTPLvl;
u8 DynamicTxHighPowerLvl;/* Tx Power Control for Near/Far Range */
u8 PowerIndex_backup[6];
};
void rtl8188e_init_dm_priv(struct adapter *adapt);
void rtl8188e_deinit_dm_priv(struct adapter *adapt);
void rtl8188e_InitHalDm(struct adapter *adapt);
void rtl8188e_HalDmWatchDog(struct adapter *adapt);

318
include/rtl8188e_hal.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTL8188E_HAL_H__
#define __RTL8188E_HAL_H__
@ -29,106 +13,34 @@
#include "rtl8188e_recv.h"
#include "rtl8188e_xmit.h"
#include "rtl8188e_cmd.h"
#include "Hal8188EPwrSeq.h"
#include "rtl8188e_sreset.h"
#include "rtw_efuse.h"
#include "odm_precomp.h"
/* Fw Array */
#define Rtl8188E_FwImageArray Rtl8188EFwImgArray
#define Rtl8188E_FWImgArrayLength Rtl8188EFWImgArrayLength
#define RTL8188E_FW_UMC_IMG "rtl8188E\\rtl8188efw.bin"
#define RTL8188E_PHY_REG "rtl8188E\\PHY_REG_1T.txt"
#define RTL8188E_PHY_RADIO_A "rtl8188E\\radio_a_1T.txt"
#define RTL8188E_PHY_RADIO_B "rtl8188E\\radio_b_1T.txt"
#define RTL8188E_AGC_TAB "rtl8188E\\AGC_TAB_1T.txt"
#define RTL8188E_PHY_MACREG "rtl8188E\\MAC_REG.txt"
#define RTL8188E_PHY_REG_PG "rtl8188E\\PHY_REG_PG.txt"
#define RTL8188E_PHY_REG_MP "rtl8188E\\PHY_REG_MP.txt"
#include "odm_types.h"
#include "odm.h"
#include "odm_HWConfig.h"
#include "odm_RegDefine11N.h"
#include "HalPhyRf_8188e.h"
#include "Hal8188ERateAdaptive.h"
#include "HalHWImg8188E_MAC.h"
#include "HalHWImg8188E_RF.h"
#include "HalHWImg8188E_BB.h"
#include "odm_RegConfig8188E.h"
#include "odm_RTL8188E.h"
/* RTL8188E Power Configuration CMDs for USB/SDIO interfaces */
#define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow
#define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow
#define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow
#define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow
#define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow
#define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow
#define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow
#define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow
#define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow
#define DRVINFO_SZ 4 /* unit is 8bytes */
#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len) & 0x7F ? 1 : 0))
/* download firmware related data structure */
#define FW_8188E_SIZE 0x4000 /* 16384,16k */
#define FW_8188E_START_ADDRESS 0x1000
#define FW_8188E_END_ADDRESS 0x1FFF /* 0x5FFF */
#define MAX_PAGE_SIZE 4096 /* @ page : 4k bytes */
#define IS_FW_HEADER_EXIST(_pFwHdr) \
((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 || \
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 || \
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300 || \
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88E0)
/* This structure must be careful with byte-ordering */
struct rt_firmware_hdr {
/* 8-byte alinment required */
/* LONG WORD 0 ---- */
__le16 Signature; /* 92C0: test chip; 92C,
* 88C0: test chip; 88C1: MP A-cut;
* 92C1: MP A-cut */
u8 Category; /* AP/NIC and USB/PCI */
u8 Function; /* Reserved for different FW function
* indcation, for further use when
* driver needs to download different
* FW for different conditions */
__le16 Version; /* FW Version */
u8 Subversion; /* FW Subversion, default 0x00 */
u16 Rsvd1;
/* LONG WORD 1 ---- */
u8 Month; /* Release time Month field */
u8 Date; /* Release time Date field */
u8 Hour; /* Release time Hour field */
u8 Minute; /* Release time Minute field */
__le16 RamCodeSize; /* The size of RAM code */
u8 Foundry;
u8 Rsvd2;
/* LONG WORD 2 ---- */
__le32 SvnIdx; /* The SVN entry index */
u32 Rsvd3;
/* LONG WORD 3 ---- */
u32 Rsvd4;
u32 Rsvd5;
};
#define DRIVER_EARLY_INT_TIME 0x05
#define BCN_DMA_ATIME_INT_TIME 0x02
enum usb_rx_agg_mode {
USB_RX_AGG_DISABLE,
USB_RX_AGG_DMA,
USB_RX_AGG_USB,
USB_RX_AGG_MIX
};
#define MAX_RX_DMA_BUFFER_SIZE_88E \
0x2400 /* 9k for 88E nornal chip , MaxRxBuff=10k-max(TxReportSize(64*8),
* WOLPattern(16*24)) */
#define MAX_TX_REPORT_BUFFER_SIZE 0x0400 /* 1k */
/* BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON. */
#define MAX_TX_QUEUE 9
#define TX_SELE_HQ BIT(0) /* High Queue */
#define TX_SELE_LQ BIT(1) /* Low Queue */
#define TX_SELE_NQ BIT(2) /* Normal Queue */
@ -150,11 +62,6 @@ enum usb_rx_agg_mode {
#define WMM_NORMAL_TX_PAGE_BOUNDARY_88E \
(WMM_NORMAL_TX_TOTAL_PAGE_NUMBER + 1) /* 0xA9 */
/* Chip specific */
#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3)
#define CHIP_BONDING_92C_1T2R 0x1
#define CHIP_BONDING_88C_USB_MCARD 0x2
#define CHIP_BONDING_88C_USB_HP 0x1
#include "HalVerDef.h"
#include "hal_com.h"
@ -184,29 +91,11 @@ struct txpowerinfo24g {
};
#define EFUSE_REAL_CONTENT_LEN 512
#define EFUSE_MAX_SECTION 16
#define EFUSE_IC_ID_OFFSET 506 /* For some inferior IC purpose*/
#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN)
/* To prevent out of boundary programming case, */
/* leave 1byte and program full section */
/* 9bytes + 1byt + 5bytes and pre 1byte. */
/* For worst case: */
/* | 1byte|----8bytes----|1byte|--5bytes--| */
/* | | Reserved(14bytes) | */
/* PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. */
#define EFUSE_OOB_PROTECT_BYTES 15
#define HWSET_MAX_SIZE_88E 512
#define EFUSE_REAL_CONTENT_LEN_88E 256
#define EFUSE_MAP_LEN_88E 512
#define EFUSE_MAP_LEN EFUSE_MAP_LEN_88E
#define EFUSE_MAX_SECTION_88E 64
#define EFUSE_MAX_WORD_UNIT_88E 4
#define EFUSE_IC_ID_OFFSET_88E 506
#define AVAILABLE_EFUSE_ADDR_88E(addr) \
(addr < EFUSE_REAL_CONTENT_LEN_88E)
/* To prevent out of boundary programming case, leave 1byte and program
* full section */
/* 9bytes + 1byt + 5bytes and pre 1byte. */
@ -214,89 +103,28 @@ struct txpowerinfo24g {
/* | 2byte|----8bytes----|1byte|--7bytes--| 92D */
/* PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. */
#define EFUSE_OOB_PROTECT_BYTES_88E 18
#define EFUSE_PROTECT_BYTES_BANK_88E 16
/* EFUSE for BT definition */
#define EFUSE_BT_REAL_CONTENT_LEN 1536 /* 512*3 */
#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */
#define EFUSE_BT_MAX_SECTION 128 /* 1024/8 */
#define EFUSE_PROTECT_BYTES_BANK 16
/* For RTL8723 WiFi/BT/GPS multi-function configuration. */
enum rt_multi_func {
RT_MULTI_FUNC_NONE = 0x00,
RT_MULTI_FUNC_WIFI = 0x01,
RT_MULTI_FUNC_BT = 0x02,
RT_MULTI_FUNC_GPS = 0x04,
};
/* For RTL8723 regulator mode. */
enum rt_regulator_mode {
RT_SWITCHING_REGULATOR = 0,
RT_LDO_REGULATOR = 1,
};
#define USB_RXAGG_PAGE_COUNT 48
#define USB_RXAGG_PAGE_TIMEOUT 0x4
struct hal_data_8188e {
struct HAL_VERSION VersionID;
enum rt_multi_func MultiFunc; /* For multi-function consideration. */
enum rt_regulator_mode RegulatorMode; /* switching regulator or LDO */
u16 CustomerID;
u16 FirmwareVersion;
u16 FirmwareVersionRev;
u16 FirmwareSubVersion;
u16 FirmwareSignature;
u8 PGMaxGroup;
/* current WIFI_PHY values */
u32 ReceiveConfig;
enum wireless_mode CurrentWirelessMode;
enum ht_channel_width CurrentChannelBW;
u8 CurrentChannel;
u8 nCur40MhzPrimeSC;/* Control channel sub-carrier */
u16 BasicRateSet;
/* rf_ctrl */
u8 rf_chip;
u8 rf_type;
u8 NumTotalRFPath;
u8 BoardType;
/* EEPROM setting. */
u16 EEPROMVID;
u16 EEPROMPID;
u16 EEPROMSVID;
u16 EEPROMSDID;
u8 EEPROMCustomerID;
u8 EEPROMSubCustomerID;
u8 EEPROMVersion;
u8 EEPROMRegulatory;
u8 bTXPowerDataReadFromEEPORM;
u8 EEPROMThermalMeter;
u8 bAPKThermalMeterIgnore;
bool EepromOrEfuse;
/* 92C:256bytes, 88E:512bytes, we use union set (512bytes) */
u8 EfuseMap[2][HWSET_MAX_SIZE_512];
u8 EfuseUsedPercentage;
struct efuse_hal EfuseHal;
u8 Index24G_CCK_Base[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 Index24G_BW40_Base[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 Index24G_CCK_Base[CHANNEL_MAX_NUMBER];
u8 Index24G_BW40_Base[CHANNEL_MAX_NUMBER];
/* If only one tx, only BW20 and OFDM are used. */
s8 CCK_24G_Diff[RF_PATH_MAX][MAX_TX_COUNT];
s8 OFDM_24G_Diff[RF_PATH_MAX][MAX_TX_COUNT];
s8 BW20_24G_Diff[RF_PATH_MAX][MAX_TX_COUNT];
s8 BW40_24G_Diff[RF_PATH_MAX][MAX_TX_COUNT];
s8 OFDM_24G_Diff[MAX_TX_COUNT];
s8 BW20_24G_Diff[MAX_TX_COUNT];
u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
/* For HT 40MHZ pwr */
u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
/* For HT 40MHZ pwr */
u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
/* HT 20<->40 Pwr diff */
u8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
/* For HT<->legacy pwr diff */
@ -305,55 +133,28 @@ struct hal_data_8188e {
u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 LegacyHTTxPowerDiff;/* Legacy to HT rate power diff */
/* The current Tx Power Level */
u8 CurrentCckTxPwrIdx;
u8 CurrentOfdm24GTxPwrIdx;
u8 CurrentBW2024GTxPwrIdx;
u8 CurrentBW4024GTxPwrIdx;
/* Read/write are allow for following hardware information variables */
u8 framesync;
u32 framesyncC34;
u8 framesyncMonitor;
u8 DefaultInitialGain[4];
u8 pwrGroupCnt;
u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16];
u32 CCKTxPowerLevelOriginalOffset;
u8 CrystalCap;
u32 AntennaTxPath; /* Antenna path Tx */
u32 AntennaRxPath; /* Antenna path Rx */
u8 BluetoothCoexist;
u8 ExternalPA;
u8 bLedOpenDrain; /* Open-drain support for controlling the LED.*/
u8 b1x1RecvCombine; /* for 1T1R receive combining */
u32 AcParam_BE; /* Original parameter for BE, use for EDCA turbo. */
struct bb_reg_def PHYRegDef[4]; /* Radio A/B/C/D */
struct bb_reg_def PHYRegDef;
u32 RfRegChnlVal[2];
/* RDG enable */
bool bRDGEnable;
u32 RfRegChnlVal;
/* for host message to fw */
u8 LastHMEBoxNum;
u8 fw_ractrl;
u8 RegTxPause;
/* Beacon function related global variable. */
u32 RegBcnCtrlVal;
u8 RegFwHwTxQCtrl;
u8 RegReg542;
u8 RegCR_1;
struct dm_priv dmpriv;
struct odm_dm_struct odmpriv;
struct sreset_priv srestpriv;
u8 CurAntenna;
u8 AntDivCfg;
@ -361,111 +162,38 @@ struct hal_data_8188e {
u8 bDumpRxPkt;/* for debug */
u8 bDumpTxPkt;/* for debug */
u8 FwRsvdPageStartOffset; /* Reserve page start offset except
* beacon in TxQ. */
/* 2010/08/09 MH Add CU power down mode. */
bool pwrdown;
/* Add for dual MAC 0--Mac0 1--Mac1 */
u32 interfaceIndex;
u8 OutEpQueueSel;
u8 OutEpNumber;
/* Add for USB aggreation mode dynamic shceme. */
bool UsbRxHighSpeedMode;
/* 2010/11/22 MH Add for slim combo debug mode selective. */
/* This is used for fix the drawback of CU TSMC-A/UMC-A cut.
* HW auto suspend ability. Close BT clock. */
bool SlimComboDbg;
u16 EfuseUsedBytes;
#ifdef CONFIG_88EU_P2P
struct P2P_PS_Offload_t p2p_ps_offload;
#endif
/* Auto FSM to Turn On, include clock, isolation, power control
* for MAC only */
u8 bMacPwrCtrlOn;
u32 UsbBulkOutSize;
/* Interrupt relatd register information. */
u32 IntArray[3];/* HISR0,HISR1,HSISR */
u32 IntrMask[3];
u8 C2hArray[16];
u8 UsbTxAggMode;
u8 UsbTxAggDescNum;
u16 HwRxPageSize; /* Hardware setting */
u32 MaxUsbRxAggBlock;
enum usb_rx_agg_mode UsbRxAggMode;
u8 UsbRxAggBlockCount; /* USB Block count. Block size is
* 512-byte in high speed and 64-byte
* in full speed */
u8 UsbRxAggBlockTimeout;
u8 UsbRxAggPageCount; /* 8192C DMA page count */
u8 UsbRxAggPageTimeout;
};
#define GET_HAL_DATA(__pAdapter) \
((struct hal_data_8188e *)((__pAdapter)->HalData))
#define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type)
#define INCLUDE_MULTI_FUNC_BT(_Adapter) \
(GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT)
#define INCLUDE_MULTI_FUNC_GPS(_Adapter) \
(GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)
/* rtl8188e_hal_init.c */
s32 rtl8188e_FirmwareDownload(struct adapter *padapter);
void _8051Reset88E(struct adapter *padapter);
void rtl8188e_InitializeFirmwareVars(struct adapter *padapter);
s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy);
/* EFuse */
u8 GetEEPROMSize8188E(struct adapter *padapter);
void Hal_InitPGData88E(struct adapter *padapter);
void Hal_EfuseParseIDCode88E(struct adapter *padapter, u8 *hwinfo);
void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *hwinfo,
bool AutoLoadFail);
void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo,
bool AutoLoadFail);
void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo,
bool AutoLoadFail);
void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo,
bool AutoLoadFail);
void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter,u8 *PROMContent,
bool AutoLoadFail);
void Hal_ReadThermalMeter_88E(struct adapter * dapter, u8 *PROMContent,
bool AutoloadFail);
void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo,
bool AutoLoadFail);
void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo,
bool AutoLoadFail);
void Hal_ReadPowerSavingMode88E(struct adapter *pAdapter, u8 *hwinfo,
bool AutoLoadFail);
bool HalDetectPwrDownMode88E(struct adapter *Adapter);
void rtl8188e_read_chip_version(struct adapter *padapter);
void Hal_InitChannelPlan(struct adapter *padapter);
void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc);
/* register */
void SetBcnCtrlReg(struct adapter *padapter, u8 SetBits, u8 ClearBits);
void rtl8188e_clone_haldata(struct adapter *dst, struct adapter *src);
void rtl8188e_start_thread(struct adapter *padapter);
void rtl8188e_stop_thread(struct adapter *padapter);
void rtw_IOL_cmd_tx_pkt_buf_dump(struct adapter *Adapter, int len);
s32 rtl8188e_iol_efuse_patch(struct adapter *padapter);
void rtw_cancel_all_timer(struct adapter *padapter);
void _ps_open_RF(struct adapter *adapt);
#endif /* __RTL8188E_HAL_H__ */

34
include/rtl8188e_led.h
View file

@ -1,34 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTL8188E_LED_H__
#define __RTL8188E_LED_H__
#include <osdep_service.h>
#include <drv_types.h>
/* */
/* Interface to manipulate LED objects. */
/* */
void rtl8188eu_InitSwLeds(struct adapter *padapter);
void rtl8188eu_DeInitSwLeds(struct adapter *padapter);
void SwLedOn(struct adapter *padapter, struct LED_871x *pLed);
void SwLedOff(struct adapter *padapter, struct LED_871x *pLed);
#endif

35
include/rtl8188e_recv.h
View file

@ -1,33 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTL8188E_RECV_H__
#define __RTL8188E_RECV_H__
#define TX_RPT1_PKT_LEN 8
#define RECV_BLK_SZ 512
#define RECV_BLK_CNT 16
#define RECV_BLK_TH RECV_BLK_CNT
#define RECV_BULK_IN_ADDR 0x80
#define RECV_INT_IN_ADDR 0x81
#define NR_PREALLOC_RECV_SKB (8)
#define NR_RECVBUFF (4)
@ -55,14 +33,9 @@ enum rx_packet_type {
HIS_REPORT,/* USB HISR RPT */
};
#define INTERRUPT_MSG_FORMAT_LEN 60
void rtl8188eu_init_recvbuf(struct adapter *padapter, struct recv_buf *buf);
s32 rtl8188eu_init_recv_priv(struct adapter *padapter);
void rtl8188eu_free_recv_priv(struct adapter * padapter);
void rtl8188eu_recv_hdl(struct adapter * padapter, struct recv_buf *precvbuf);
void rtl8188eu_recv_tasklet(void *priv);
void rtl8188e_query_rx_phy_status(struct recv_frame *fr, struct phy_stat *phy);
void rtl8188e_process_phy_info(struct adapter * padapter, void *prframe);
void rtl8188eu_recv_tasklet(unsigned long priv);
void update_recvframe_phyinfo_88e(struct recv_frame *fra, struct phy_stat *phy);
void update_recvframe_attrib_88e(struct recv_frame *fra, struct recv_stat *stat);

23
include/rtl8188e_rf.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTL8188E_RF_H__
#define __RTL8188E_RF_H__
@ -25,7 +9,6 @@
#define RF6052_MAX_PATH 2
int PHY_RF6052_Config8188E(struct adapter *Adapter);
void rtl8188e_RF_ChangeTxPath(struct adapter *Adapter, u16 DataRate);
void rtl8188e_PHY_RF6052SetBandwidth(struct adapter *Adapter,
enum ht_channel_width Bandwidth);
void rtl8188e_PHY_RF6052SetCckTxPower(struct adapter *Adapter, u8 *level);

506
include/rtl8188e_spec.h
View file

@ -1,61 +1,9 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTL8188E_SPEC_H__
#define __RTL8188E_SPEC_H__
#ifndef BIT
#define BIT(x) (1 << (x))
#endif
#define BIT0 0x00000001
#define BIT1 0x00000002
#define BIT2 0x00000004
#define BIT3 0x00000008
#define BIT4 0x00000010
#define BIT5 0x00000020
#define BIT6 0x00000040
#define BIT7 0x00000080
#define BIT8 0x00000100
#define BIT9 0x00000200
#define BIT10 0x00000400
#define BIT11 0x00000800
#define BIT12 0x00001000
#define BIT13 0x00002000
#define BIT14 0x00004000
#define BIT15 0x00008000
#define BIT16 0x00010000
#define BIT17 0x00020000
#define BIT18 0x00040000
#define BIT19 0x00080000
#define BIT20 0x00100000
#define BIT21 0x00200000
#define BIT22 0x00400000
#define BIT23 0x00800000
#define BIT24 0x01000000
#define BIT25 0x02000000
#define BIT26 0x04000000
#define BIT27 0x08000000
#define BIT28 0x10000000
#define BIT29 0x20000000
#define BIT30 0x40000000
#define BIT31 0x80000000
/* 8192C Regsiter offset definition */
#define HAL_PS_TIMER_INT_DELAY 50 /* 50 microseconds */
@ -480,14 +428,14 @@
#define MAX_MSS_DENSITY_1T 0x0A
/* EEPROM enable when set 1 */
#define CmdEEPROM_En BIT5
#define CmdEEPROM_En BIT(5)
/* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346 */
#define CmdEERPOMSEL BIT4
#define Cmd9346CR_9356SEL BIT4
#define CmdEERPOMSEL BIT(4)
#define Cmd9346CR_9356SEL BIT(4)
/* 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) */
#define GPIOSEL_GPIO 0
#define GPIOSEL_ENBT BIT5
#define GPIOSEL_ENBT BIT(5)
/* 8192C GPIO PIN Control Register (offset 0x44, 4 byte) */
/* GPIO pins input value */
@ -500,18 +448,18 @@
#define GPIO_MOD (REG_GPIO_PIN_CTRL+3)
/* 8723/8188E Host System Interrupt Mask Register (offset 0x58, 32 byte) */
#define HSIMR_GPIO12_0_INT_EN BIT0
#define HSIMR_SPS_OCP_INT_EN BIT5
#define HSIMR_RON_INT_EN BIT6
#define HSIMR_PDN_INT_EN BIT7
#define HSIMR_GPIO9_INT_EN BIT25
#define HSIMR_GPIO12_0_INT_EN BIT(0)
#define HSIMR_SPS_OCP_INT_EN BIT(5)
#define HSIMR_RON_INT_EN BIT(6)
#define HSIMR_PDN_INT_EN BIT(7)
#define HSIMR_GPIO9_INT_EN BIT(25)
/* 8723/8188E Host System Interrupt Status Register (offset 0x5C, 32 byte) */
#define HSISR_GPIO12_0_INT BIT0
#define HSISR_SPS_OCP_INT BIT5
#define HSISR_RON_INT_EN BIT6
#define HSISR_PDNINT BIT7
#define HSISR_GPIO9_INT BIT25
#define HSISR_GPIO12_0_INT BIT(0)
#define HSISR_SPS_OCP_INT BIT(5)
#define HSISR_RON_INT_EN BIT(6)
#define HSISR_PDNINT BIT(7)
#define HSISR_GPIO9_INT BIT(25)
/* 8192C (MSR) Media Status Register (Offset 0x4C, 8 bits) */
/*
@ -527,60 +475,52 @@ Default: 00b.
#define MSR_INFRA 0x02
#define MSR_AP 0x03
/* 88EU (MSR) Media Status Register (Offset 0x4C, 8 bits) */
#define USB_INTR_CONTENT_C2H_OFFSET 0
#define USB_INTR_CONTENT_CPWM1_OFFSET 16
#define USB_INTR_CONTENT_CPWM2_OFFSET 20
#define USB_INTR_CONTENT_HISR_OFFSET 48
#define USB_INTR_CONTENT_HISRE_OFFSET 52
/* 88E Driver Initialization Offload REG_FDHM0(Offset 0x88, 8 bits) */
/* IOL config for REG_FDHM0(Reg0x88) */
#define CMD_INIT_LLT BIT0
#define CMD_READ_EFUSE_MAP BIT1
#define CMD_EFUSE_PATCH BIT2
#define CMD_IOCONFIG BIT3
#define CMD_INIT_LLT_ERR BIT4
#define CMD_READ_EFUSE_MAP_ERR BIT5
#define CMD_EFUSE_PATCH_ERR BIT6
#define CMD_IOCONFIG_ERR BIT7
#define CMD_INIT_LLT BIT(0)
#define CMD_READ_EFUSE_MAP BIT(1)
#define CMD_EFUSE_PATCH BIT(2)
#define CMD_IOCONFIG BIT(3)
#define CMD_INIT_LLT_ERR BIT(4)
#define CMD_READ_EFUSE_MAP_ERR BIT(5)
#define CMD_EFUSE_PATCH_ERR BIT(6)
#define CMD_IOCONFIG_ERR BIT(7)
/* 6. Adaptive Control Registers (Offset: 0x0160 - 0x01CF) */
/* 8192C Response Rate Set Register (offset 0x181, 24bits) */
#define RRSR_1M BIT0
#define RRSR_2M BIT1
#define RRSR_5_5M BIT2
#define RRSR_11M BIT3
#define RRSR_6M BIT4
#define RRSR_9M BIT5
#define RRSR_12M BIT6
#define RRSR_18M BIT7
#define RRSR_24M BIT8
#define RRSR_36M BIT9
#define RRSR_48M BIT10
#define RRSR_54M BIT11
#define RRSR_MCS0 BIT12
#define RRSR_MCS1 BIT13
#define RRSR_MCS2 BIT14
#define RRSR_MCS3 BIT15
#define RRSR_MCS4 BIT16
#define RRSR_MCS5 BIT17
#define RRSR_MCS6 BIT18
#define RRSR_MCS7 BIT19
#define RRSR_1M BIT(0)
#define RRSR_2M BIT(1)
#define RRSR_5_5M BIT(2)
#define RRSR_11M BIT(3)
#define RRSR_6M BIT(4)
#define RRSR_9M BIT(5)
#define RRSR_12M BIT(6)
#define RRSR_18M BIT(7)
#define RRSR_24M BIT(8)
#define RRSR_36M BIT(9)
#define RRSR_48M BIT(10)
#define RRSR_54M BIT(11)
#define RRSR_MCS0 BIT(12)
#define RRSR_MCS1 BIT(13)
#define RRSR_MCS2 BIT(14)
#define RRSR_MCS3 BIT(15)
#define RRSR_MCS4 BIT(16)
#define RRSR_MCS5 BIT(17)
#define RRSR_MCS6 BIT(18)
#define RRSR_MCS7 BIT(19)
/* 8192C Response Rate Set Register (offset 0x1BF, 8bits) */
/* WOL bit information */
#define HAL92C_WOL_PTK_UPDATE_EVENT BIT0
#define HAL92C_WOL_GTK_UPDATE_EVENT BIT1
#define HAL92C_WOL_PTK_UPDATE_EVENT BIT(0)
#define HAL92C_WOL_GTK_UPDATE_EVENT BIT(1)
/* 8192C BW_OPMODE bits (Offset 0x203, 8bit) */
#define BW_OPMODE_20MHZ BIT2
#define BW_OPMODE_5G BIT1
#define BW_OPMODE_20MHZ BIT(2)
/* 8192C CAM Config Setting (offset 0x250, 1 byte) */
#define CAM_VALID BIT15
#define CAM_VALID BIT(15)
#define CAM_NOTVALID 0x0000
#define CAM_USEDK BIT5
#define CAM_USEDK BIT(5)
#define CAM_CONTENT_COUNT 8
@ -597,69 +537,69 @@ Default: 00b.
#define CAM_CONFIG_USEDK true
#define CAM_CONFIG_NO_USEDK false
#define CAM_WRITE BIT16
#define CAM_WRITE BIT(16)
#define CAM_READ 0x00000000
#define CAM_POLLINIG BIT31
#define CAM_POLLINIG BIT(31)
#define SCR_UseDK 0x01
#define SCR_TxSecEnable 0x02
#define SCR_RxSecEnable 0x04
/* 10. Power Save Control Registers (Offset: 0x0260 - 0x02DF) */
#define WOW_PMEN BIT0 /* Power management Enable. */
#define WOW_WOMEN BIT1 /* WoW function on or off. */
#define WOW_MAGIC BIT2 /* Magic packet */
#define WOW_UWF BIT3 /* Unicast Wakeup frame. */
#define WOW_PMEN BIT(0) /* Power management Enable. */
#define WOW_WOMEN BIT(1) /* WoW function on or off. */
#define WOW_MAGIC BIT(2) /* Magic packet */
#define WOW_UWF BIT(3) /* Unicast Wakeup frame. */
/* 12. Host Interrupt Status Registers (Offset: 0x0300 - 0x030F) */
/* 8188 IMR/ISR bits */
#define IMR_DISABLED_88E 0x0
/* IMR DW0(0x0060-0063) Bit 0-31 */
#define IMR_TXCCK_88E BIT30 /* TXRPT interrupt when CCX bit of the packet is set */
#define IMR_PSTIMEOUT_88E BIT29 /* Power Save Time Out Interrupt */
#define IMR_GTINT4_88E BIT28 /* When GTIMER4 expires, this bit is set to 1 */
#define IMR_GTINT3_88E BIT27 /* When GTIMER3 expires, this bit is set to 1 */
#define IMR_TBDER_88E BIT26 /* Transmit Beacon0 Error */
#define IMR_TBDOK_88E BIT25 /* Transmit Beacon0 OK */
#define IMR_TSF_BIT32_TOGGLE_88E BIT24 /* TSF Timer BIT32 toggle indication interrupt */
#define IMR_BCNDMAINT0_88E BIT20 /* Beacon DMA Interrupt 0 */
#define IMR_BCNDERR0_88E BIT16 /* Beacon Queue DMA Error 0 */
#define IMR_HSISR_IND_ON_INT_88E BIT15 /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */
#define IMR_BCNDMAINT_E_88E BIT14 /* Beacon DMA Interrupt Extension for Win7 */
#define IMR_ATIMEND_88E BIT12 /* CTWidnow End or ATIM Window End */
#define IMR_HISR1_IND_INT_88E BIT11 /* HISR1 Indicator (HISR1 & HIMR1 is true, this bit is set to 1) */
#define IMR_C2HCMD_88E BIT10 /* CPU to Host Command INT Status, Write 1 clear */
#define IMR_CPWM2_88E BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */
#define IMR_CPWM_88E BIT8 /* CPU power Mode exchange INT Status, Write 1 clear */
#define IMR_HIGHDOK_88E BIT7 /* High Queue DMA OK */
#define IMR_MGNTDOK_88E BIT6 /* Management Queue DMA OK */
#define IMR_BKDOK_88E BIT5 /* AC_BK DMA OK */
#define IMR_BEDOK_88E BIT4 /* AC_BE DMA OK */
#define IMR_VIDOK_88E BIT3 /* AC_VI DMA OK */
#define IMR_VODOK_88E BIT2 /* AC_VO DMA OK */
#define IMR_RDU_88E BIT1 /* Rx Descriptor Unavailable */
#define IMR_ROK_88E BIT0 /* Receive DMA OK */
#define IMR_TXCCK_88E BIT(30) /* TXRPT interrupt when CCX bit of the packet is set */
#define IMR_PSTIMEOUT_88E BIT(29) /* Power Save Time Out Interrupt */
#define IMR_GTINT4_88E BIT(28) /* When GTIMER4 expires, this bit is set to 1 */
#define IMR_GTINT3_88E BIT(27) /* When GTIMER3 expires, this bit is set to 1 */
#define IMR_TBDER_88E BIT(26) /* Transmit Beacon0 Error */
#define IMR_TBDOK_88E BIT(25) /* Transmit Beacon0 OK */
#define IMR_TSF_BIT32_TOGGLE_88E BIT(24) /* TSF Timer BIT32 toggle indication interrupt */
#define IMR_BCNDMAINT0_88E BIT(20) /* Beacon DMA Interrupt 0 */
#define IMR_BCNDERR0_88E BIT(16) /* Beacon Queue DMA Error 0 */
#define IMR_HSISR_IND_ON_INT_88E BIT(15) /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */
#define IMR_BCNDMAINT_E_88E BIT(14) /* Beacon DMA Interrupt Extension for Win7 */
#define IMR_ATIMEND_88E BIT(12) /* CTWidnow End or ATIM Window End */
#define IMR_HISR1_IND_INT_88E BIT(11) /* HISR1 Indicator (HISR1 & HIMR1 is true, this bit is set to 1) */
#define IMR_C2HCMD_88E BIT(10) /* CPU to Host Command INT Status, Write 1 clear */
#define IMR_CPWM2_88E BIT(9) /* CPU power Mode exchange INT Status, Write 1 clear */
#define IMR_CPWM_88E BIT(8) /* CPU power Mode exchange INT Status, Write 1 clear */
#define IMR_HIGHDOK_88E BIT(7) /* High Queue DMA OK */
#define IMR_MGNTDOK_88E BIT(6) /* Management Queue DMA OK */
#define IMR_BKDOK_88E BIT(5) /* AC_BK DMA OK */
#define IMR_BEDOK_88E BIT(4) /* AC_BE DMA OK */
#define IMR_VIDOK_88E BIT(3) /* AC_VI DMA OK */
#define IMR_VODOK_88E BIT(2) /* AC_VO DMA OK */
#define IMR_RDU_88E BIT(1) /* Rx Descriptor Unavailable */
#define IMR_ROK_88E BIT(0) /* Receive DMA OK */
/* IMR DW1(0x00B4-00B7) Bit 0-31 */
#define IMR_BCNDMAINT7_88E BIT27 /* Beacon DMA Interrupt 7 */
#define IMR_BCNDMAINT6_88E BIT26 /* Beacon DMA Interrupt 6 */
#define IMR_BCNDMAINT5_88E BIT25 /* Beacon DMA Interrupt 5 */
#define IMR_BCNDMAINT4_88E BIT24 /* Beacon DMA Interrupt 4 */
#define IMR_BCNDMAINT3_88E BIT23 /* Beacon DMA Interrupt 3 */
#define IMR_BCNDMAINT2_88E BIT22 /* Beacon DMA Interrupt 2 */
#define IMR_BCNDMAINT1_88E BIT21 /* Beacon DMA Interrupt 1 */
#define IMR_BCNDERR7_88E BIT20 /* Beacon DMA Error Int 7 */
#define IMR_BCNDERR6_88E BIT19 /* Beacon DMA Error Int 6 */
#define IMR_BCNDERR5_88E BIT18 /* Beacon DMA Error Int 5 */
#define IMR_BCNDERR4_88E BIT17 /* Beacon DMA Error Int 4 */
#define IMR_BCNDERR3_88E BIT16 /* Beacon DMA Error Int 3 */
#define IMR_BCNDERR2_88E BIT15 /* Beacon DMA Error Int 2 */
#define IMR_BCNDERR1_88E BIT14 /* Beacon DMA Error Int 1 */
#define IMR_ATIMEND_E_88E BIT13 /* ATIM Window End Ext for Win7 */
#define IMR_TXERR_88E BIT11 /* Tx Err Flag Int Status, write 1 clear. */
#define IMR_RXERR_88E BIT10 /* Rx Err Flag INT Status, Write 1 clear */
#define IMR_TXFOVW_88E BIT9 /* Transmit FIFO Overflow */
#define IMR_RXFOVW_88E BIT8 /* Receive FIFO Overflow */
#define IMR_BCNDMAINT7_88E BIT(27) /* Beacon DMA Interrupt 7 */
#define IMR_BCNDMAINT6_88E BIT(26) /* Beacon DMA Interrupt 6 */
#define IMR_BCNDMAINT5_88E BIT(25) /* Beacon DMA Interrupt 5 */
#define IMR_BCNDMAINT4_88E BIT(24) /* Beacon DMA Interrupt 4 */
#define IMR_BCNDMAINT3_88E BIT(23) /* Beacon DMA Interrupt 3 */
#define IMR_BCNDMAINT2_88E BIT(22) /* Beacon DMA Interrupt 2 */
#define IMR_BCNDMAINT1_88E BIT(21) /* Beacon DMA Interrupt 1 */
#define IMR_BCNDERR7_88E BIT(20) /* Beacon DMA Error Int 7 */
#define IMR_BCNDERR6_88E BIT(19) /* Beacon DMA Error Int 6 */
#define IMR_BCNDERR5_88E BIT(18) /* Beacon DMA Error Int 5 */
#define IMR_BCNDERR4_88E BIT(17) /* Beacon DMA Error Int 4 */
#define IMR_BCNDERR3_88E BIT(16) /* Beacon DMA Error Int 3 */
#define IMR_BCNDERR2_88E BIT(15) /* Beacon DMA Error Int 2 */
#define IMR_BCNDERR1_88E BIT(14) /* Beacon DMA Error Int 1 */
#define IMR_ATIMEND_E_88E BIT(13) /* ATIM Window End Ext for Win7 */
#define IMR_TXERR_88E BIT(11) /* Tx Err Flag Int Status, write 1 clear. */
#define IMR_RXERR_88E BIT(10) /* Rx Err Flag INT Status, Write 1 clear */
#define IMR_TXFOVW_88E BIT(9) /* Transmit FIFO Overflow */
#define IMR_RXFOVW_88E BIT(8) /* Receive FIFO Overflow */
#define HAL_NIC_UNPLUG_ISR 0xFFFFFFFF /* The value when the NIC is unplugged for PCI. */
@ -695,40 +635,40 @@ Current IOREG MAP
/* the correct arragement is VO - Bit0, VI - Bit1, BE - Bit2,
* and BK - Bit3. */
/* 8723 and 88E may be not correct either in the earlier version. */
#define StopBecon BIT6
#define StopHigh BIT5
#define StopMgt BIT4
#define StopBK BIT3
#define StopBE BIT2
#define StopVI BIT1
#define StopVO BIT0
#define StopBecon BIT(6)
#define StopHigh BIT(5)
#define StopMgt BIT(4)
#define StopBK BIT(3)
#define StopBE BIT(2)
#define StopVI BIT(1)
#define StopVO BIT(0)
/* 8192C (RCR) Receive Configuration Register(Offset 0x608, 32 bits) */
#define RCR_APPFCS BIT31 /* WMAC append FCS after payload */
#define RCR_APP_MIC BIT30
#define RCR_APP_PHYSTS BIT28
#define RCR_APP_ICV BIT29
#define RCR_APP_PHYST_RXFF BIT28
#define RCR_APP_BA_SSN BIT27 /* Accept BA SSN */
#define RCR_ENMBID BIT24 /* Enable Multiple BssId. */
#define RCR_LSIGEN BIT23
#define RCR_MFBEN BIT22
#define RCR_HTC_LOC_CTRL BIT14 /* MFC<--HTC=1 MFC-->HTC=0 */
#define RCR_AMF BIT13 /* Accept management type frame */
#define RCR_ACF BIT12 /* Accept control type frame */
#define RCR_ADF BIT11 /* Accept data type frame */
#define RCR_AICV BIT9 /* Accept ICV error packet */
#define RCR_ACRC32 BIT8 /* Accept CRC32 error packet */
#define RCR_CBSSID_BCN BIT7 /* Accept BSSID match packet
#define RCR_APPFCS BIT(31) /* WMAC append FCS after payload */
#define RCR_APP_MIC BIT(30)
#define RCR_APP_PHYSTS BIT(28)
#define RCR_APP_ICV BIT(29)
#define RCR_APP_PHYST_RXFF BIT(28)
#define RCR_APP_BA_SSN BIT(27) /* Accept BA SSN */
#define RCR_ENMBID BIT(24) /* Enable Multiple BssId. */
#define RCR_LSIGEN BIT(23)
#define RCR_MFBEN BIT(22)
#define RCR_HTC_LOC_CTRL BIT(14) /* MFC<--HTC=1 MFC-->HTC=0 */
#define RCR_AMF BIT(13) /* Accept management type frame */
#define RCR_ACF BIT(12) /* Accept control type frame */
#define RCR_ADF BIT(11) /* Accept data type frame */
#define RCR_AICV BIT(9) /* Accept ICV error packet */
#define RCR_ACRC32 BIT(8) /* Accept CRC32 error packet */
#define RCR_CBSSID_BCN BIT(7) /* Accept BSSID match packet
* (Rx beacon, probe rsp) */
#define RCR_CBSSID_DATA BIT6 /* Accept BSSID match (Data)*/
#define RCR_CBSSID_DATA BIT(6) /* Accept BSSID match (Data)*/
#define RCR_CBSSID RCR_CBSSID_DATA /* Accept BSSID match */
#define RCR_APWRMGT BIT5 /* Accept power management pkt*/
#define RCR_ADD3 BIT4 /* Accept address 3 match pkt */
#define RCR_AB BIT3 /* Accept broadcast packet */
#define RCR_AM BIT2 /* Accept multicast packet */
#define RCR_APM BIT1 /* Accept physical match pkt */
#define RCR_AAP BIT0 /* Accept all unicast packet */
#define RCR_APWRMGT BIT(5) /* Accept power management pkt*/
#define RCR_ADD3 BIT(4) /* Accept address 3 match pkt */
#define RCR_AB BIT(3) /* Accept broadcast packet */
#define RCR_AM BIT(2) /* Accept multicast packet */
#define RCR_APM BIT(1) /* Accept physical match pkt */
#define RCR_AAP BIT(0) /* Accept all unicast packet */
#define RCR_MXDMA_OFFSET 8
#define RCR_FIFO_OFFSET 13
@ -854,7 +794,7 @@ Current IOREG MAP
/* 2 MCUFWDL */
#define MCUFWDL_EN BIT(0)
#define MCUFWDL_RDY BIT(1)
#define FWDL_ChkSum_rpt BIT(2)
#define FWDL_CHKSUM_RPT BIT(2)
#define MACINI_RDY BIT(3)
#define BBINI_RDY BIT(4)
#define RFINI_RDY BIT(5)
@ -946,11 +886,7 @@ Current IOREG MAP
#define _PSRX(x) (x)
#define _PSTX(x) ((x) << 4)
#define PBP_64 0x0
#define PBP_128 0x1
#define PBP_256 0x2
#define PBP_512 0x3
#define PBP_1024 0x4
/* 2 TX/RXDMA */
#define RXDMA_ARBBW_EN BIT(0)
@ -1196,56 +1132,56 @@ Current IOREG MAP
#define SDIO_HIMR_DISABLED 0
/* RTL8188E SDIO Host Interrupt Mask Register */
#define SDIO_HIMR_RX_REQUEST_MSK BIT0
#define SDIO_HIMR_AVAL_MSK BIT1
#define SDIO_HIMR_TXERR_MSK BIT2
#define SDIO_HIMR_RXERR_MSK BIT3
#define SDIO_HIMR_TXFOVW_MSK BIT4
#define SDIO_HIMR_RXFOVW_MSK BIT5
#define SDIO_HIMR_TXBCNOK_MSK BIT6
#define SDIO_HIMR_TXBCNERR_MSK BIT7
#define SDIO_HIMR_BCNERLY_INT_MSK BIT16
#define SDIO_HIMR_C2HCMD_MSK BIT17
#define SDIO_HIMR_CPWM1_MSK BIT18
#define SDIO_HIMR_CPWM2_MSK BIT19
#define SDIO_HIMR_HSISR_IND_MSK BIT20
#define SDIO_HIMR_GTINT3_IND_MSK BIT21
#define SDIO_HIMR_GTINT4_IND_MSK BIT22
#define SDIO_HIMR_PSTIMEOUT_MSK BIT23
#define SDIO_HIMR_OCPINT_MSK BIT24
#define SDIO_HIMR_ATIMEND_MSK BIT25
#define SDIO_HIMR_ATIMEND_E_MSK BIT26
#define SDIO_HIMR_CTWEND_MSK BIT27
#define SDIO_HIMR_RX_REQUEST_MSK BIT(0)
#define SDIO_HIMR_AVAL_MSK BIT(1)
#define SDIO_HIMR_TXERR_MSK BIT(2)
#define SDIO_HIMR_RXERR_MSK BIT(3)
#define SDIO_HIMR_TXFOVW_MSK BIT(4)
#define SDIO_HIMR_RXFOVW_MSK BIT(5)
#define SDIO_HIMR_TXBCNOK_MSK BIT(6)
#define SDIO_HIMR_TXBCNERR_MSK BIT(7)
#define SDIO_HIMR_BCNERLY_INT_MSK BIT(16)
#define SDIO_HIMR_C2HCMD_MSK BIT(17)
#define SDIO_HIMR_CPWM1_MSK BIT(18)
#define SDIO_HIMR_CPWM2_MSK BIT(19)
#define SDIO_HIMR_HSISR_IND_MSK BIT(20)
#define SDIO_HIMR_GTINT3_IND_MSK BIT(21)
#define SDIO_HIMR_GTINT4_IND_MSK BIT(22)
#define SDIO_HIMR_PSTIMEOUT_MSK BIT(23)
#define SDIO_HIMR_OCPINT_MSK BIT(24)
#define SDIO_HIMR_ATIMEND_MSK BIT(25)
#define SDIO_HIMR_ATIMEND_E_MSK BIT(26)
#define SDIO_HIMR_CTWEND_MSK BIT(27)
/* RTL8188E SDIO Specific */
#define SDIO_HIMR_MCU_ERR_MSK BIT28
#define SDIO_HIMR_TSF_BIT32_TOGGLE_MSK BIT29
#define SDIO_HIMR_MCU_ERR_MSK BIT(28)
#define SDIO_HIMR_TSF_BIT32_TOGGLE_MSK BIT(29)
/* SDIO Host Interrupt Service Routine */
#define SDIO_HISR_RX_REQUEST BIT0
#define SDIO_HISR_AVAL BIT1
#define SDIO_HISR_TXERR BIT2
#define SDIO_HISR_RXERR BIT3
#define SDIO_HISR_TXFOVW BIT4
#define SDIO_HISR_RXFOVW BIT5
#define SDIO_HISR_TXBCNOK BIT6
#define SDIO_HISR_TXBCNERR BIT7
#define SDIO_HISR_BCNERLY_INT BIT16
#define SDIO_HISR_C2HCMD BIT17
#define SDIO_HISR_CPWM1 BIT18
#define SDIO_HISR_CPWM2 BIT19
#define SDIO_HISR_HSISR_IND BIT20
#define SDIO_HISR_GTINT3_IND BIT21
#define SDIO_HISR_GTINT4_IND BIT22
#define SDIO_HISR_PSTIME BIT23
#define SDIO_HISR_OCPINT BIT24
#define SDIO_HISR_ATIMEND BIT25
#define SDIO_HISR_ATIMEND_E BIT26
#define SDIO_HISR_CTWEND BIT27
#define SDIO_HISR_RX_REQUEST BIT(0)
#define SDIO_HISR_AVAL BIT(1)
#define SDIO_HISR_TXERR BIT(2)
#define SDIO_HISR_RXERR BIT(3)
#define SDIO_HISR_TXFOVW BIT(4)
#define SDIO_HISR_RXFOVW BIT(5)
#define SDIO_HISR_TXBCNOK BIT(6)
#define SDIO_HISR_TXBCNERR BIT(7)
#define SDIO_HISR_BCNERLY_INT BIT(16)
#define SDIO_HISR_C2HCMD BIT(17)
#define SDIO_HISR_CPWM1 BIT(18)
#define SDIO_HISR_CPWM2 BIT(19)
#define SDIO_HISR_HSISR_IND BIT(20)
#define SDIO_HISR_GTINT3_IND BIT(21)
#define SDIO_HISR_GTINT4_IND BIT(22)
#define SDIO_HISR_PSTIME BIT(23)
#define SDIO_HISR_OCPINT BIT(24)
#define SDIO_HISR_ATIMEND BIT(25)
#define SDIO_HISR_ATIMEND_E BIT(26)
#define SDIO_HISR_CTWEND BIT(27)
/* RTL8188E SDIO Specific */
#define SDIO_HISR_MCU_ERR BIT28
#define SDIO_HISR_TSF_BIT32_TOGGLE BIT29
#define SDIO_HISR_MCU_ERR BIT(28)
#define SDIO_HISR_TSF_BIT32_TOGGLE BIT(29)
#define MASK_SDIO_HISR_CLEAR \
(SDIO_HISR_TXERR | SDIO_HISR_RXERR | SDIO_HISR_TXFOVW |\
@ -1255,8 +1191,8 @@ Current IOREG MAP
SDIO_HISR_PSTIMEOUT | SDIO_HISR_OCPINT)
/* SDIO HCI Suspend Control Register */
#define HCI_RESUME_PWR_RDY BIT1
#define HCI_SUS_CTRL BIT0
#define HCI_RESUME_PWR_RDY BIT(1)
#define HCI_SUS_CTRL BIT(0)
/* SDIO Tx FIFO related */
/* The number of Tx FIFO free page */
@ -1290,33 +1226,33 @@ Current IOREG MAP
/* 2REG_MULTI_FUNC_CTRL(For RTL8723 Only) */
/* Enable GPIO[9] as WiFi HW PDn source */
#define WL_HWPDN_EN BIT0
#define WL_HWPDN_EN BIT(0)
/* WiFi HW PDn polarity control */
#define WL_HWPDN_SL BIT1
#define WL_HWPDN_SL BIT(1)
/* WiFi function enable */
#define WL_FUNC_EN BIT2
#define WL_FUNC_EN BIT(2)
/* Enable GPIO[9] as WiFi RF HW PDn source */
#define WL_HWROF_EN BIT3
#define WL_HWROF_EN BIT(3)
/* Enable GPIO[11] as BT HW PDn source */
#define BT_HWPDN_EN BIT16
#define BT_HWPDN_EN BIT(16)
/* BT HW PDn polarity control */
#define BT_HWPDN_SL BIT17
#define BT_HWPDN_SL BIT(17)
/* BT function enable */
#define BT_FUNC_EN BIT18
#define BT_FUNC_EN BIT(18)
/* Enable GPIO[11] as BT/GPS RF HW PDn source */
#define BT_HWROF_EN BIT19
#define BT_HWROF_EN BIT(19)
/* Enable GPIO[10] as GPS HW PDn source */
#define GPS_HWPDN_EN BIT20
#define GPS_HWPDN_EN BIT(20)
/* GPS HW PDn polarity control */
#define GPS_HWPDN_SL BIT21
#define GPS_HWPDN_SL BIT(21)
/* GPS function enable */
#define GPS_FUNC_EN BIT22
#define GPS_FUNC_EN BIT(22)
/* 3 REG_LIFECTRL_CTRL */
#define HAL92C_EN_PKT_LIFE_TIME_BK BIT3
#define HAL92C_EN_PKT_LIFE_TIME_BE BIT2
#define HAL92C_EN_PKT_LIFE_TIME_VI BIT1
#define HAL92C_EN_PKT_LIFE_TIME_VO BIT0
#define HAL92C_EN_PKT_LIFE_TIME_BK BIT(3)
#define HAL92C_EN_PKT_LIFE_TIME_BE BIT(2)
#define HAL92C_EN_PKT_LIFE_TIME_VI BIT(1)
#define HAL92C_EN_PKT_LIFE_TIME_VO BIT(0)
#define HAL92C_MSDU_LIFE_TIME_UNIT 128 /* in us */
@ -1326,7 +1262,7 @@ Current IOREG MAP
#define POLLING_LLT_THRESHOLD 20
#define POLLING_READY_TIMEOUT_COUNT 1000
/* GPIO BIT */
#define HAL_8192C_HW_GPIO_WPS_BIT BIT2
#define HAL_8192C_HW_GPIO_WPS_BIT BIT(2)
/* 8192C EEPROM/EFUSE share register definition. */
@ -1340,53 +1276,15 @@ Current IOREG MAP
#define EEPROM_RF_BOARD_OPTION_88E 0xC1
#define EEPROM_RF_FEATURE_OPTION_88E 0xC2
#define EEPROM_RF_BT_SETTING_88E 0xC3
#define EEPROM_VERSION_88E 0xC4
#define EEPROM_CUSTOMERID_88E 0xC5
#define EEPROM_RF_ANTENNA_OPT_88E 0xC9
/* RTL88EE */
#define EEPROM_MAC_ADDR_88EE 0xD0
#define EEPROM_VID_88EE 0xD6
#define EEPROM_DID_88EE 0xD8
#define EEPROM_SVID_88EE 0xDA
#define EEPROM_SMID_88EE 0xDC
/* RTL88EU */
#define EEPROM_MAC_ADDR_88EU 0xD7
#define EEPROM_VID_88EU 0xD0
#define EEPROM_PID_88EU 0xD2
#define EEPROM_USB_OPTIONAL_FUNCTION0 0xD4
/* RTL88ES */
#define EEPROM_MAC_ADDR_88ES 0x11A
/* EEPROM/Efuse Value Type */
#define EETYPE_TX_PWR 0x0
/* Default Value for EEPROM or EFUSE!!! */
#define EEPROM_Default_TSSI 0x0
#define EEPROM_Default_TxPowerDiff 0x0
#define EEPROM_Default_CrystalCap 0x5
/* Default: 2X2, RTL8192CE(QFPN68) */
#define EEPROM_Default_BoardType 0x02
#define EEPROM_Default_TxPower 0x1010
#define EEPROM_Default_HT2T_TxPwr 0x10
#define EEPROM_Default_LegacyHTTxPowerDiff 0x3
#define EEPROM_Default_ThermalMeter 0x12
#define EEPROM_Default_AntTxPowerDiff 0x0
#define EEPROM_Default_TxPwDiff_CrystalCap 0x5
#define EEPROM_Default_TxPowerLevel 0x2A
#define EEPROM_Default_HT40_2SDiff 0x0
/* HT20<->40 default Tx Power Index Difference */
#define EEPROM_Default_HT20_Diff 2
#define EEPROM_Default_LegacyHTTxPowerDiff 0x3
#define EEPROM_Default_HT40_PwrMaxOffset 0
#define EEPROM_Default_HT20_PwrMaxOffset 0
#define EEPROM_Default_CrystalCap_88E 0x20
#define EEPROM_Default_ThermalMeter_88E 0x18
@ -1395,23 +1293,8 @@ Current IOREG MAP
#define EEPROM_DEFAULT_24G_HT20_DIFF 0X02
#define EEPROM_DEFAULT_24G_OFDM_DIFF 0X04
#define EEPROM_DEFAULT_5G_INDEX 0X2A
#define EEPROM_DEFAULT_5G_HT20_DIFF 0X00
#define EEPROM_DEFAULT_5G_OFDM_DIFF 0X04
#define EEPROM_DEFAULT_DIFF 0XFE
#define EEPROM_DEFAULT_CHANNEL_PLAN 0x7F
#define EEPROM_DEFAULT_BOARD_OPTION 0x00
#define EEPROM_DEFAULT_FEATURE_OPTION 0x00
#define EEPROM_DEFAULT_BT_OPTION 0x10
/* For debug */
#define EEPROM_Default_PID 0x1234
#define EEPROM_Default_VID 0x5678
#define EEPROM_Default_CustomerID 0xAB
#define EEPROM_Default_CustomerID_8188E 0x00
#define EEPROM_Default_SubCustomerID 0xCD
#define EEPROM_Default_Version 0
#define EEPROM_CHANNEL_PLAN_FCC 0x0
#define EEPROM_CHANNEL_PLAN_IC 0x1
@ -1428,11 +1311,6 @@ Current IOREG MAP
#define EEPROM_USB_OPTIONAL1 0xE
#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80
#define EEPROM_CID_DEFAULT 0x0
#define EEPROM_CID_TOSHIBA 0x4
#define EEPROM_CID_CCX 0x10 /* CCX test. */
#define EEPROM_CID_QMI 0x0D
#define EEPROM_CID_WHQL 0xFE
#define RTL_EEPROM_ID 0x8129
#endif /* __RTL8188E_SPEC_H__ */

31
include/rtl8188e_sreset.h
View file

@ -1,31 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTL8188E_SRESET_H_
#define _RTL8188E_SRESET_H_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_sreset.h>
void rtl8188e_silentreset_for_specific_platform(struct adapter *padapter);
void rtl8188e_sreset_xmit_status_check(struct adapter *padapter);
void rtl8188e_sreset_linked_status_check(struct adapter *padapter);
#endif

63
include/rtl8188e_xmit.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTL8188E_XMIT_H__
#define __RTL8188E_XMIT_H__
@ -34,24 +18,22 @@
#define QSLT_CMD 0x13
/* For 88e early mode */
#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) \
SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value)
#define SET_EARLYMODE_PKTNUM(__paddr, __value) \
le32p_replace_bits((__le32 *)__paddr, __value, GENMASK(2, 0))
#define SET_EARLYMODE_LEN0(__pAddr, __Value) \
SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value)
#define SET_EARLYMODE_LEN1(__pAddr, __Value) \
SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value)
#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) \
SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value)
#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) \
SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value)
le32p_replace_bits((__le32 *)__paddr, __value, GENMASK(15, 4))
#define SET_EARLYMODE_LEN1(__paddr, __value) \
le32p_replace_bits((__le32 *)__paddr, __value, GENMASK(27, 16))
#define SET_EARLYMODE_LEN2_1(__pdr, __vValue) \
le32p_replace_bits((__le32 *)__paddr, __value, GENMASK(31, 28))
#define SET_EARLYMODE_LEN2_2(__paddr, __value) \
le32p_replace_bits((__le32 *)(__paddr + 4), __value, GENMASK(7, 0))
#define SET_EARLYMODE_LEN3(__pAddr, __Value) \
SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value)
#define SET_EARLYMODE_LEN4(__pAddr, __Value) \
SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value)
le32p_replace_bits((__le32 *)(__paddr + 4), __value, GENMASK(19, 8))
#define SET_EARLYMODE_LEN4(__paAddr, __vValue) \
le32p_replace_bits((__le32 *)(__paddr + 4), __value, GENMASK(31, 20))
/* */
/* defined for TX DESC Operation */
/* */
#define MAX_TID (15)
@ -111,6 +93,8 @@ enum TXDESC_SC {
#define SGI BIT(6)
#define USB_TXAGG_NUM_SHT 24
#define USB_TXAGG_DESC_NUM 0x6
#define txdesc_set_ccx_sw_88e(txdesc, value) \
do { \
((struct txdesc_88e *)(txdesc))->sw1 = (((value)>>8) & 0x0f); \
@ -151,27 +135,18 @@ struct txrpt_ccx_88e {
u8 sw0;
};
#define txrpt_ccx_sw_88e(txrpt_ccx) ((txrpt_ccx)->sw0 + ((txrpt_ccx)->sw1<<8))
#define txrpt_ccx_qtime_88e(txrpt_ccx) \
((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8))
void rtl8188e_fill_fake_txdesc(struct adapter *padapter, u8 *pDesc,
u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull);
s32 rtl8188eu_init_xmit_priv(struct adapter *padapter);
void rtl8188eu_free_xmit_priv(struct adapter *padapter);
s32 rtl8188eu_hal_xmit(struct adapter *padapter, struct xmit_frame *frame);
s32 rtl8188eu_mgnt_xmit(struct adapter *padapter, struct xmit_frame *frame);
s32 rtl8188eu_xmit_buf_handler(struct adapter *padapter);
#define hal_xmit_handler rtl8188eu_xmit_buf_handler
void rtl8188eu_xmit_tasklet(void *priv);
s32 rtl8188eu_xmitframe_complete(struct adapter *padapter,
void rtl8188eu_xmit_tasklet(unsigned long priv);
bool rtl8188eu_xmitframe_complete(struct adapter *padapter,
struct xmit_priv *pxmitpriv,
struct xmit_buf *pxmitbuf);
void dump_txrpt_ccx_88e(void *buf);
void handle_txrpt_ccx_88e(struct adapter *adapter, u8 *buf);
void _dbg_dump_tx_info(struct adapter *padapter, int frame_tag,
struct tx_desc *ptxdesc);
#endif /* __RTL8188E_XMIT_H__ */

64
include/rtw_android.h
View file

@ -1,64 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTW_ANDROID_H__
#define __RTW_ANDROID_H__
#include <linux/module.h>
#include <linux/netdevice.h>
enum ANDROID_WIFI_CMD {
ANDROID_WIFI_CMD_START,
ANDROID_WIFI_CMD_STOP,
ANDROID_WIFI_CMD_SCAN_ACTIVE,
ANDROID_WIFI_CMD_SCAN_PASSIVE,
ANDROID_WIFI_CMD_RSSI,
ANDROID_WIFI_CMD_LINKSPEED,
ANDROID_WIFI_CMD_RXFILTER_START,
ANDROID_WIFI_CMD_RXFILTER_STOP,
ANDROID_WIFI_CMD_RXFILTER_ADD,
ANDROID_WIFI_CMD_RXFILTER_REMOVE,
ANDROID_WIFI_CMD_BTCOEXSCAN_START,
ANDROID_WIFI_CMD_BTCOEXSCAN_STOP,
ANDROID_WIFI_CMD_BTCOEXMODE,
ANDROID_WIFI_CMD_SETSUSPENDOPT,
ANDROID_WIFI_CMD_P2P_DEV_ADDR,
ANDROID_WIFI_CMD_SETFWPATH,
ANDROID_WIFI_CMD_SETBAND,
ANDROID_WIFI_CMD_GETBAND,
ANDROID_WIFI_CMD_COUNTRY,
ANDROID_WIFI_CMD_P2P_SET_NOA,
ANDROID_WIFI_CMD_P2P_GET_NOA,
ANDROID_WIFI_CMD_P2P_SET_PS,
ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE,
ANDROID_WIFI_CMD_MACADDR,
ANDROID_WIFI_CMD_BLOCK,
ANDROID_WIFI_CMD_WFD_ENABLE,
ANDROID_WIFI_CMD_WFD_DISABLE,
ANDROID_WIFI_CMD_WFD_SET_TCPPORT,
ANDROID_WIFI_CMD_WFD_SET_MAX_TPUT,
ANDROID_WIFI_CMD_WFD_SET_DEVTYPE,
ANDROID_WIFI_CMD_MAX
};
int rtw_android_cmdstr_to_num(char *cmdstr);
int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd);
#endif /* __RTW_ANDROID_H__ */

41
include/rtw_ap.h
View file

@ -1,29 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2012 Realtek Corporation. */
#ifndef __RTW_AP_H_
#define __RTW_AP_H_
#include <osdep_service.h>
#include <drv_types.h>
#ifdef CONFIG_88EU_AP_MODE
#include "osdep_service.h"
#include "drv_types.h"
/* external function */
void rtw_indicate_sta_assoc_event(struct adapter *padapter,
@ -32,36 +14,23 @@ void rtw_indicate_sta_disassoc_event(struct adapter *padapter,
struct sta_info *psta);
void init_mlme_ap_info(struct adapter *padapter);
void free_mlme_ap_info(struct adapter *padapter);
void rtw_add_bcn_ie(struct adapter *padapter, struct wlan_bssid_ex *pnetwork,
u8 index, u8 *data, u8 len);
void rtw_remove_bcn_ie(struct adapter *padapter,
struct wlan_bssid_ex *pnetwork, u8 index);
void update_beacon(struct adapter *padapter, u8 ie_id,
u8 *oui, u8 tx);
void add_RATid(struct adapter *padapter, struct sta_info *psta,
u8 rssi_level);
void expire_timeout_chk(struct adapter *padapter);
void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta);
int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len);
void rtw_ap_restore_network(struct adapter *padapter);
void rtw_set_macaddr_acl(struct adapter *padapter, int mode);
int rtw_acl_add_sta(struct adapter *padapter, u8 *addr);
int rtw_acl_remove_sta(struct adapter *padapter, u8 *addr);
#ifdef CONFIG_88EU_AP_MODE
void associated_clients_update(struct adapter *padapter, u8 updated);
void bss_cap_update_on_sta_join(struct adapter *padapter, struct sta_info *psta);
u8 bss_cap_update_on_sta_leave(struct adapter *padapter, struct sta_info *psta);
void sta_info_update(struct adapter *padapter, struct sta_info *psta);
void ap_sta_info_defer_update(struct adapter *padapter, struct sta_info *psta);
u8 ap_free_sta(struct adapter *padapter, struct sta_info *psta,
bool active, u16 reason);
int rtw_sta_flush(struct adapter *padapter);
int rtw_ap_inform_ch_switch(struct adapter *padapter, u8 new_ch, u8 ch_offset);
void start_ap_mode(struct adapter *padapter);
void stop_ap_mode(struct adapter *padapter);
#endif
#endif /* end of CONFIG_88EU_AP_MODE */
void update_bmc_sta(struct adapter *padapter);
#endif

31
include/rtw_br_ext.h
View file

@ -1,31 +1,9 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef _RTW_BR_EXT_H_
#define _RTW_BR_EXT_H_
#define MACADDRLEN 6
#define _DEBUG_ERR DBG_88E
#define _DEBUG_INFO DBG_88E
#define DEBUG_WARN DBG_88E
#define DEBUG_INFO DBG_88E
#define DEBUG_ERR DBG_88E
#define GET_MY_HWADDR(padapter) ((padapter)->eeprompriv.mac_addr)
#define NAT25_HASH_BITS 4
@ -47,7 +25,6 @@ enum NAT25_METHOD {
NAT25_MIN,
NAT25_CHECK,
NAT25_INSERT,
NAT25_LOOKUP,
NAT25_PARSE,
NAT25_MAX
};
@ -57,7 +34,7 @@ struct br_ext_info {
unsigned int macclone_enable;
unsigned int dhcp_bcst_disable;
int addPPPoETag; /* 1: Add PPPoE relay-SID, 0: disable */
unsigned char nat25_dmzMac[MACADDRLEN];
unsigned char nat25_dmzMac[ETH_ALEN];
unsigned int nat25sc_disable;
};

88
include/rtw_cmd.h
View file

@ -1,33 +1,17 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTW_CMD_H_
#define __RTW_CMD_H_
#include <wlan_bssdef.h>
#include <rtw_rf.h>
#include <rtw_led.h>
#include "wlan_bssdef.h"
#include "rtw_rf.h"
#include "rtw_led.h"
#define C2H_MEM_SZ (16*1024)
#include <osdep_service.h>
#include <ieee80211.h> /* <ieee80211/ieee80211.h> */
#include "osdep_service.h"
#include "ieee80211.h" /* <ieee80211/ieee80211.h> */
#define FREE_CMDOBJ_SZ 128
@ -49,15 +33,15 @@ struct cmd_obj {
};
struct cmd_priv {
struct semaphore cmd_queue_sema;
struct semaphore terminate_cmdthread_sema;
struct completion enqueue_cmd;
struct completion start_cmd_thread;
struct completion stop_cmd_thread;
struct __queue cmd_queue;
u8 cmd_seq;
u8 *cmd_buf; /* shall be non-paged, and 4 bytes aligned */
u8 *cmd_allocated_buf;
u8 *rsp_buf; /* shall be non-paged, and 4 bytes aligned */
u8 *rsp_allocated_buf;
u32 cmd_issued_cnt;
u32 cmd_done_cnt;
u32 rsp_cnt;
u8 cmdthd_running;
@ -69,10 +53,8 @@ struct evt_priv {
bool c2h_wk_alive;
struct rtw_cbuf *c2h_queue;
#define C2H_QUEUE_MAX_LEN 10
ATOMIC_T event_seq;
atomic_t event_seq;
u8 *evt_buf; /* shall be non-paged, and 4 bytes aligned */
u8 *evt_allocated_buf;
u32 evt_done_cnt;
};
#define init_h2fwcmd_w_parm_no_rsp(pcmd, pparm, code) \
@ -89,7 +71,7 @@ struct c2h_evt_hdr {
u8 id:4;
u8 plen:4;
u8 seq;
u8 payload[0];
u8 payload[];
};
#define c2h_evt_exist(c2h_evt) ((c2h_evt)->id || (c2h_evt)->plen)
@ -105,11 +87,8 @@ void rtw_free_cmd_priv(struct cmd_priv *pcmdpriv);
u32 rtw_init_evt_priv(struct evt_priv *pevtpriv);
void rtw_free_evt_priv(struct evt_priv *pevtpriv);
void rtw_cmd_clr_isr(struct cmd_priv *pcmdpriv);
void rtw_evt_notify_isr(struct evt_priv *pevtpriv);
#ifdef CONFIG_88EU_P2P
u8 p2p_protocol_wk_cmd(struct adapter *padapter, int intCmdType);
#endif /* CONFIG_88EU_P2P */
enum rtw_drvextra_cmd_id {
NONE_WK_CID,
@ -143,18 +122,6 @@ enum RFINTFS {
HWPI,
};
/*
Caller Mode: Infra, Ad-HoC(C)
Notes: To enter USB suspend mode
Command Mode
*/
struct usb_suspend_parm {
u32 action;/* 1: sleep, 0:resume */
};
/*
Caller Mode: Infra, Ad-HoC
@ -681,25 +648,25 @@ struct getcurtxpwrlevel_rspi {
struct setprobereqextraie_parm {
unsigned char e_id;
unsigned char ie_len;
unsigned char ie[0];
unsigned char ie[];
};
struct setassocreqextraie_parm {
unsigned char e_id;
unsigned char ie_len;
unsigned char ie[0];
unsigned char ie[];
};
struct setproberspextraie_parm {
unsigned char e_id;
unsigned char ie_len;
unsigned char ie[0];
unsigned char ie[];
};
struct setassocrspextraie_parm {
unsigned char e_id;
unsigned char ie_len;
unsigned char ie[0];
unsigned char ie[];
};
struct addBaReq_parm {
@ -763,29 +730,17 @@ Result:
#define H2C_CMD_OVERFLOW 0x06
#define H2C_RESERVED 0x07
u8 rtw_setassocsta_cmd(struct adapter *padapter, u8 *mac_addr);
u8 rtw_setstandby_cmd(struct adapter *padapter, uint action);
u8 rtw_sitesurvey_cmd(struct adapter *padapter, struct ndis_802_11_ssid *ssid,
int ssid_num, struct rtw_ieee80211_channel *ch,
int ch_num);
u8 rtw_createbss_cmd(struct adapter *padapter);
u8 rtw_createbss_cmd_ex(struct adapter *padapter, unsigned char *pbss,
unsigned int sz);
u8 rtw_setphy_cmd(struct adapter *padapter, u8 modem, u8 ch);
u8 rtw_setstakey_cmd(struct adapter *padapter, u8 *psta, u8 unicast_key);
u8 rtw_clearstakey_cmd(struct adapter *padapter, u8 *psta, u8 entry, u8 enqueue);
u8 rtw_joinbss_cmd(struct adapter *padapter, struct wlan_network* pnetwork);
u8 rtw_disassoc_cmd(struct adapter *padapter, u32 deauth_timeout_ms, bool enqueue);
u8 rtw_setopmode_cmd(struct adapter *padapter, enum ndis_802_11_network_infra networktype);
u8 rtw_setdatarate_cmd(struct adapter *padapter, u8 *rateset);
u8 rtw_setbasicrate_cmd(struct adapter *padapter, u8 *rateset);
u8 rtw_setbbreg_cmd(struct adapter * padapter, u8 offset, u8 val);
u8 rtw_setrfreg_cmd(struct adapter * padapter, u8 offset, u32 val);
u8 rtw_getbbreg_cmd(struct adapter * padapter, u8 offset, u8 * pval);
u8 rtw_getrfreg_cmd(struct adapter * padapter, u8 offset, u8 * pval);
u8 rtw_setrfintfs_cmd(struct adapter *padapter, u8 mode);
u8 rtw_setrttbl_cmd(struct adapter *padapter, struct setratable_parm *prate_table);
u8 rtw_getrttbl_cmd(struct adapter *padapter, struct getratable_rsp *pval);
u8 rtw_gettssi_cmd(struct adapter *padapter, u8 offset,u8 *pval);
u8 rtw_setfwdig_cmd(struct adapter*padapter, u8 type);
@ -801,15 +756,9 @@ u8 rtw_rpt_timer_cfg_cmd(struct adapter*padapter, u16 minRptTime);
u8 rtw_antenna_select_cmd(struct adapter*padapter, u8 antenna,u8 enqueue);
u8 rtw_ps_cmd(struct adapter*padapter);
#ifdef CONFIG_88EU_AP_MODE
u8 rtw_chk_hi_queue_cmd(struct adapter*padapter);
#endif
u8 rtw_set_ch_cmd(struct adapter*padapter, u8 ch, u8 bw, u8 ch_offset, u8 enqueue);
u8 rtw_set_chplan_cmd(struct adapter*padapter, u8 chplan, u8 enqueue);
u8 rtw_led_blink_cmd(struct adapter*padapter, struct LED_871x * pLed);
u8 rtw_set_csa_cmd(struct adapter*padapter, u8 new_ch_no);
u8 rtw_tdls_cmd(struct adapter *padapter, u8 *addr, u8 option);
u8 rtw_set_chplan_cmd(struct adapter *padapter, u8 chplan);
u8 rtw_c2h_wk_cmd(struct adapter *padapter, u8 *c2h_evt);
@ -820,7 +769,6 @@ void rtw_disassoc_cmd_callback(struct adapter *padapter, struct cmd_obj *pcmd);
void rtw_joinbss_cmd_callback(struct adapter *padapter, struct cmd_obj *pcmd);
void rtw_createbss_cmd_callback(struct adapter *adapt, struct cmd_obj *pcmd);
void rtw_getbbrfreg_cmdrsp_callback(struct adapter *adapt, struct cmd_obj *cmd);
void rtw_readtssi_cmdrsp_callback(struct adapter *adapt, struct cmd_obj *cmd);
void rtw_setstaKey_cmdrsp_callback(struct adapter *adapt, struct cmd_obj *cmd);
void rtw_setassocsta_cmdrsp_callback(struct adapter *adapt, struct cmd_obj *cm);

229
include/rtw_debug.h
View file

@ -1,27 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTW_DEBUG_H__
#define __RTW_DEBUG_H__
#include <osdep_service.h>
#include <drv_types.h>
#include "osdep_service.h"
#include "drv_types.h"
#define _drv_always_ 1
#define _drv_emerg_ 2
@ -68,207 +52,4 @@
#define DRIVER_PREFIX "R8188EU: "
extern u32 GlobalDebugLevel;
#define DBG_88E_LEVEL(_level, fmt, arg...) \
do { \
if (_level <= GlobalDebugLevel) \
pr_info(DRIVER_PREFIX"INFO " fmt, ##arg); \
} while (0)
#define DBG_88E(...) \
do { \
if (_drv_err_ <= GlobalDebugLevel) \
pr_info(DRIVER_PREFIX __VA_ARGS__); \
} while (0)
#define MSG_88E(...) \
do { \
if (_drv_err_ <= GlobalDebugLevel) \
pr_info(DRIVER_PREFIX __VA_ARGS__); \
} while (0)
#define RT_TRACE(_comp, _level, fmt) \
do { \
if (_level <= GlobalDebugLevel) { \
pr_info("%s [0x%08x,%d]", DRIVER_PREFIX, \
(unsigned int)_comp, _level); \
pr_info fmt; \
} \
} while (0)
#define RT_PRINT_DATA(_comp, _level, _titlestring, _hexdata, _hexdatalen)\
do { \
if (_level <= GlobalDebugLevel) { \
int __i; \
u8 *ptr = (u8 *)_hexdata; \
pr_info("%s", DRIVER_PREFIX); \
pr_info(_titlestring); \
for (__i = 0; __i < (int)_hexdatalen; __i++ ) { \
pr_info("%02X%s", ptr[__i], \
(((__i + 1) % 4) == 0) ? \
" " : " "); \
if (((__i + 1) % 16) == 0) \
printk("\n"); \
} \
printk("\n"); \
} \
} while (0)
int proc_get_drv_version(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_write_reg(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_write_reg(struct file *file, const char __user *buffer,
unsigned long count, void *data);
int proc_get_read_reg(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_read_reg(struct file *file, const char __user *buffer,
unsigned long count, void *data);
int proc_get_fwstate(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_sec_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_mlmext_state(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_qos_option(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_ht_option(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rf_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_ap_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_adapter_state(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_trx_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_mac_reg_dump1(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_mac_reg_dump2(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_mac_reg_dump3(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_bb_reg_dump1(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_bb_reg_dump2(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_bb_reg_dump3(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rf_reg_dump1(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rf_reg_dump2(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rf_reg_dump3(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rf_reg_dump4(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
#ifdef CONFIG_88EU_AP_MODE
int proc_get_all_sta_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
#endif
int proc_get_best_channel(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rx_signal(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_rx_signal(struct file *file, const char __user *buffer,
unsigned long count, void *data);
int proc_get_ht_enable(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_ht_enable(struct file *file, const char __user *buffer,
unsigned long count, void *data);
int proc_get_cbw40_enable(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_cbw40_enable(struct file *file, const char __user *buffer,
unsigned long count, void *data);
int proc_get_ampdu_enable(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_ampdu_enable(struct file *file, const char __user *buffer,
unsigned long count, void *data);
int proc_get_rx_stbc(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_rx_stbc(struct file *file, const char __user *buffer,
unsigned long count, void *data);
int proc_get_two_path_rssi(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rssi_disp(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_rssi_disp(struct file *file, const char __user *buffer,
unsigned long count, void *data);
#ifdef CONFIG_BT_COEXIST
int proc_get_btcoex_dbg(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_btcoex_dbg(struct file *file, const char *buffer,
signed long count, void *data);
#endif /* CONFIG_BT_COEXIST */
#endif /* __RTW_DEBUG_H__ */

114
include/rtw_eeprom.h
View file

@ -1,121 +1,19 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTW_EEPROM_H__
#define __RTW_EEPROM_H__
#include <osdep_service.h>
#include <drv_types.h>
#define RTL8712_EEPROM_ID 0x8712
#include "osdep_service.h"
#include "drv_types.h"
#define HWSET_MAX_SIZE_512 512
#define EEPROM_MAX_SIZE HWSET_MAX_SIZE_512
#define CLOCK_RATE 50 /* 100us */
/* EEPROM opcodes */
#define EEPROM_READ_OPCODE 06
#define EEPROM_WRITE_OPCODE 05
#define EEPROM_ERASE_OPCODE 07
#define EEPROM_EWEN_OPCODE 19 /* Erase/write enable */
#define EEPROM_EWDS_OPCODE 16 /* Erase/write disable */
/* Country codes */
#define USA 0x555320
#define EUROPE 0x1 /* temp, should be provided later */
#define JAPAN 0x2 /* temp, should be provided later */
#define EEPROM_CID_DEFAULT 0x0
#define EEPROM_CID_ALPHA 0x1
#define EEPROM_CID_Senao 0x3
#define EEPROM_CID_NetCore 0x5
#define EEPROM_CID_CAMEO 0X8
#define EEPROM_CID_SITECOM 0x9
#define EEPROM_CID_COREGA 0xB
#define EEPROM_CID_EDIMAX_BELK 0xC
#define EEPROM_CID_SERCOMM_BELK 0xE
#define EEPROM_CID_CAMEO1 0xF
#define EEPROM_CID_WNC_COREGA 0x12
#define EEPROM_CID_CLEVO 0x13
#define EEPROM_CID_WHQL 0xFE
/* Customer ID, note that: */
/* This variable is initiailzed through EEPROM or registry, */
/* however, its definition may be different with that in EEPROM for */
/* EEPROM size consideration. So, we have to perform proper translation
* between them. */
/* Besides, CustomerID of registry has precedence of that of EEPROM. */
/* defined below. 060703, by rcnjko. */
enum RT_CUSTOMER_ID {
RT_CID_DEFAULT = 0,
RT_CID_8187_ALPHA0 = 1,
RT_CID_8187_SERCOMM_PS = 2,
RT_CID_8187_HW_LED = 3,
RT_CID_8187_NETGEAR = 4,
RT_CID_WHQL = 5,
RT_CID_819x_CAMEO = 6,
RT_CID_819x_RUNTOP = 7,
RT_CID_819x_Senao = 8,
RT_CID_TOSHIBA = 9, /* Merge by Jacken, 2008/01/31. */
RT_CID_819x_Netcore = 10,
RT_CID_Nettronix = 11,
RT_CID_DLINK = 12,
RT_CID_PRONET = 13,
RT_CID_COREGA = 14,
RT_CID_CHINA_MOBILE = 15,
RT_CID_819x_ALPHA = 16,
RT_CID_819x_Sitecom = 17,
RT_CID_CCX = 18, /* It's set under CCX logo test and isn't demanded
* for CCX functions, but for test behavior like retry
* limit and tx report. By Bruce, 2009-02-17. */
RT_CID_819x_Lenovo = 19,
RT_CID_819x_QMI = 20,
RT_CID_819x_Edimax_Belkin = 21,
RT_CID_819x_Sercomm_Belkin = 22,
RT_CID_819x_CAMEO1 = 23,
RT_CID_819x_MSI = 24,
RT_CID_819x_Acer = 25,
RT_CID_819x_AzWave_ASUS = 26,
RT_CID_819x_AzWave = 27, /* For AzWave in PCIe,i
* The ID is AzWave use and not only Asus */
RT_CID_819x_HP = 28,
RT_CID_819x_WNC_COREGA = 29,
RT_CID_819x_Arcadyan_Belkin = 30,
RT_CID_819x_SAMSUNG = 31,
RT_CID_819x_CLEVO = 32,
RT_CID_819x_DELL = 33,
RT_CID_819x_PRONETS = 34,
RT_CID_819x_Edimax_ASUS = 35,
RT_CID_819x_CAMEO_NETGEAR = 36,
RT_CID_PLANEX = 37,
RT_CID_CC_C = 38,
RT_CID_819x_Xavi = 39,
RT_CID_819x_FUNAI_TV = 40,
RT_CID_819x_ALPHA_WD=41,
};
struct eeprom_priv {
u8 bautoload_fail_flag;
u8 bloadfile_fail_flag;
u8 bloadmac_fail_flag;
u8 mac_addr[6]; /* PermanentAddress */
u8 mac_addr[ETH_ALEN] __aligned(2); /* PermanentAddress */
u16 channel_plan;
u8 EepromOrEfuse;
u8 efuse_eeprom_data[HWSET_MAX_SIZE_512] __aligned(4);

147
include/rtw_efuse.h
View file

@ -1,150 +1,13 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTW_EFUSE_H__
#define __RTW_EFUSE_H__
#include <osdep_service.h>
#define EFUSE_ERROE_HANDLE 1
#define PG_STATE_HEADER 0x01
#define PG_STATE_WORD_0 0x02
#define PG_STATE_WORD_1 0x04
#define PG_STATE_WORD_2 0x08
#define PG_STATE_WORD_3 0x10
#define PG_STATE_DATA 0x20
#define PG_SWBYTE_H 0x01
#define PG_SWBYTE_L 0x02
#define PGPKT_DATA_SIZE 8
#define EFUSE_WIFI 0
#define EFUSE_BT 1
enum _EFUSE_DEF_TYPE {
TYPE_EFUSE_MAX_SECTION = 0,
TYPE_EFUSE_REAL_CONTENT_LEN = 1,
TYPE_AVAILABLE_EFUSE_BYTES_BANK = 2,
TYPE_AVAILABLE_EFUSE_BYTES_TOTAL = 3,
TYPE_EFUSE_MAP_LEN = 4,
TYPE_EFUSE_PROTECT_BYTES_BANK = 5,
TYPE_EFUSE_CONTENT_LEN_BANK = 6,
};
/* E-Fuse */
#define EFUSE_MAP_SIZE 512
#define EFUSE_MAX_SIZE 256
/* end of E-Fuse */
#define EFUSE_MAX_MAP_LEN 512
#define EFUSE_MAX_HW_SIZE 512
#define EFUSE_MAX_SECTION_BASE 16
#define EXT_HEADER(header) ((header & 0x1F) == 0x0F)
#define ALL_WORDS_DISABLED(wde) ((wde & 0x0F) == 0x0F)
#define GET_HDR_OFFSET_2_0(header) ((header & 0xE0) >> 5)
#define EFUSE_REPEAT_THRESHOLD_ 3
/* The following is for BT Efuse definition */
#define EFUSE_BT_MAX_MAP_LEN 1024
#define EFUSE_MAX_BANK 4
#define EFUSE_MAX_BT_BANK (EFUSE_MAX_BANK-1)
/*--------------------------Define Parameters-------------------------------*/
#define EFUSE_MAX_WORD_UNIT 4
/*------------------------------Define structure----------------------------*/
struct pgpkt {
u8 offset;
u8 word_en;
u8 data[8];
u8 word_cnts;
};
void ReadEFuseByte(struct adapter *adapter, u16 _offset, u8 *pbuf);
/*------------------------------Define structure----------------------------*/
struct efuse_hal {
u8 fakeEfuseBank;
u32 fakeEfuseUsedBytes;
u8 fakeEfuseContent[EFUSE_MAX_HW_SIZE];
u8 fakeEfuseInitMap[EFUSE_MAX_MAP_LEN];
u8 fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN];
u16 BTEfuseUsedBytes;
u8 BTEfuseUsedPercentage;
u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
u8 BTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN];
u8 BTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN];
u16 fakeBTEfuseUsedBytes;
u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN];
u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN];
};
/*------------------------Export global variable----------------------------*/
extern u8 fakeEfuseBank;
extern u32 fakeEfuseUsedBytes;
extern u8 fakeEfuseContent[];
extern u8 fakeEfuseInitMap[];
extern u8 fakeEfuseModifiedMap[];
extern u32 BTEfuseUsedBytes;
extern u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
extern u8 BTEfuseInitMap[];
extern u8 BTEfuseModifiedMap[];
extern u32 fakeBTEfuseUsedBytes;
extern u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
extern u8 fakeBTEfuseInitMap[];
extern u8 fakeBTEfuseModifiedMap[];
/*------------------------Export global variable----------------------------*/
u8 efuse_GetCurrentSize(struct adapter *adapter, u16 *size);
u16 efuse_GetMaxSize(struct adapter *adapter);
u8 rtw_efuse_access(struct adapter *adapter, u8 read, u16 start_addr,
u16 cnts, u8 *data);
u8 rtw_efuse_map_read(struct adapter *adapter, u16 addr, u16 cnts, u8 *data);
u8 rtw_efuse_map_write(struct adapter *adapter, u16 addr, u16 cnts, u8 *data);
u8 rtw_BT_efuse_map_read(struct adapter *adapter, u16 addr,
u16 cnts, u8 *data);
u8 rtw_BT_efuse_map_write(struct adapter *adapter, u16 addr,
u16 cnts, u8 *data);
u16 Efuse_GetCurrentSize(struct adapter *adapter, u8 efusetype, bool test);
u8 Efuse_CalculateWordCnts(u8 word_en);
void ReadEFuseByte(struct adapter *adapter, u16 _offset, u8 *pbuf, bool test);
void EFUSE_GetEfuseDefinition(struct adapter *adapt, u8 type, u8 type1,
void *out, bool bPseudoTest);
u8 efuse_OneByteRead(struct adapter *adapter, u16 addr, u8 *data, bool test);
u8 efuse_OneByteWrite(struct adapter *adapter, u16 addr, u8 data, bool test);
void Efuse_PowerSwitch(struct adapter *adapt,u8 bWrite,u8 PwrState);
int Efuse_PgPacketRead(struct adapter *adapt, u8 offset, u8 *data, bool test);
int Efuse_PgPacketWrite(struct adapter *adapter, u8 offset, u8 word, u8 *data,
bool test);
void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata);
u8 Efuse_WordEnableDataWrite(struct adapter *adapter, u16 efuse_addr,
u8 word_en, u8 *data, bool test);
u8 EFUSE_Read1Byte(struct adapter *adapter, u16 address);
void EFUSE_ShadowMapUpdate(struct adapter *adapter, u8 efusetype, bool test);
void EFUSE_ShadowRead(struct adapter *adapt, u8 type, u16 offset, u32 *val);
void EFUSE_ShadowMapUpdate(struct adapter *adapter);
#endif

26
include/rtw_event.h
View file

@ -1,28 +1,12 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef _RTW_EVENT_H_
#define _RTW_EVENT_H_
#include <osdep_service.h>
#include "osdep_service.h"
#include <wlan_bssdef.h>
#include "wlan_bssdef.h"
#include <linux/semaphore.h>
#include <linux/sem.h>

12
include/rtw_fw.h Normal file
View file

@ -0,0 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTW_FW_H__
#define __RTW_FW_H__
#include "drv_types.h"
int rtl8188e_firmware_download(struct adapter *padapter);
void rtw_reset_8051(struct adapter *padapter);
#endif

24
include/rtw_ht.h
View file

@ -1,26 +1,10 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef _RTW_HT_H_
#define _RTW_HT_H_
#include <osdep_service.h>
#include "osdep_service.h"
#include "wifi.h"
struct ht_priv {

115
include/rtw_io.h
View file

@ -1,28 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef _RTW_IO_H_
#define _RTW_IO_H_
#include <osdep_service.h>
#include <osdep_intf.h>
#include "osdep_service.h"
#include "osdep_intf.h"
#include <asm/byteorder.h>
#include <linux/semaphore.h>
@ -101,33 +84,6 @@ struct intf_priv;
struct intf_hdl;
struct io_queue;
struct _io_ops {
u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length,
u8 *pdata);
int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
u8 *pmem);
void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
u8 *pmem);
void (*_sync_irp_protocol_rw)(struct io_queue *pio_q);
u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr);
u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
u8 *pmem);
u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
u8 *pmem);
u32 (*_write_scsi)(struct intf_hdl *pintfhdl,u32 cnt, u8 *pmem);
void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
};
struct io_req {
struct list_head list;
u32 addr;
@ -145,7 +101,6 @@ struct io_req {
struct intf_hdl {
struct adapter *padapter;
struct dvobj_priv *pintf_dev;
struct _io_ops io_ops;
};
struct reg_protocol_rd {
@ -265,58 +220,21 @@ void unregister_intf_hdl(struct intf_hdl *pintfhdl);
void _rtw_attrib_read(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
void _rtw_attrib_write(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
u8 _rtw_read8(struct adapter *adapter, u32 addr);
u16 _rtw_read16(struct adapter *adapter, u32 addr);
u32 _rtw_read32(struct adapter *adapter, u32 addr);
u8 rtw_read8(struct adapter *adapter, u32 addr);
u16 rtw_read16(struct adapter *adapter, u32 addr);
u32 rtw_read32(struct adapter *adapter, u32 addr);
void _rtw_read_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
void _rtw_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
void _rtw_read_port_cancel(struct adapter *adapter);
u32 rtw_read_port(struct adapter *adapter, u8 *pmem);
void rtw_read_port_cancel(struct adapter *adapter);
int _rtw_write8(struct adapter *adapter, u32 addr, u8 val);
int _rtw_write16(struct adapter *adapter, u32 addr, u16 val);
int _rtw_write32(struct adapter *adapter, u32 addr, u32 val);
int _rtw_writeN(struct adapter *adapter, u32 addr, u32 length, u8 *pdata);
int _rtw_write8_async(struct adapter *adapter, u32 addr, u8 val);
int _rtw_write16_async(struct adapter *adapter, u32 addr, u16 val);
int _rtw_write32_async(struct adapter *adapter, u32 addr, u32 val);
int rtw_write8(struct adapter *adapter, u32 addr, u8 val);
int rtw_write16(struct adapter *adapter, u32 addr, u16 val);
int rtw_write32(struct adapter *adapter, u32 addr, u32 val);
int rtw_writeN(struct adapter *adapter, u32 addr, u32 length, u8 *pdata);
void _rtw_write_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
u32 _rtw_write_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
u32 _rtw_write_port_and_wait(struct adapter *adapter, u32 addr, u32 cnt,
u8 *pmem, int timeout_ms);
void _rtw_write_port_cancel(struct adapter *adapter);
#define rtw_read8(adapter, addr) _rtw_read8((adapter), (addr))
#define rtw_read16(adapter, addr) _rtw_read16((adapter), (addr))
#define rtw_read32(adapter, addr) _rtw_read32((adapter), (addr))
#define rtw_read_mem(adapter, addr, cnt, mem) \
_rtw_read_mem((adapter), (addr), (cnt), (mem))
#define rtw_read_port(adapter, addr, cnt, mem) \
_rtw_read_port((adapter), (addr), (cnt), (mem))
#define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter))
#define rtw_write8(adapter, addr, val) \
_rtw_write8((adapter), (addr), (val))
#define rtw_write16(adapter, addr, val) \
_rtw_write16((adapter), (addr), (val))
#define rtw_write32(adapter, addr, val) \
_rtw_write32((adapter), (addr), (val))
#define rtw_writeN(adapter, addr, length, data) \
_rtw_writeN((adapter), (addr), (length), (data))
#define rtw_write8_async(adapter, addr, val) \
_rtw_write8_async((adapter), (addr), (val))
#define rtw_write16_async(adapter, addr, val) \
_rtw_write16_async((adapter), (addr), (val))
#define rtw_write32_async(adapter, addr, val) \
_rtw_write32_async((adapter), (addr), (val))
#define rtw_write_mem(adapter, addr, cnt, mem) \
_rtw_write_mem((adapter), (addr), (cnt), (mem))
#define rtw_write_port(adapter, addr, cnt, mem) \
_rtw_write_port((adapter), (addr), (cnt), (mem))
#define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) \
_rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms))
#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel((adapter))
u32 rtw_write_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
void rtw_write_port_cancel(struct adapter *adapter);
void rtw_write_scsi(struct adapter *adapter, u32 cnt, u8 *pmem);
@ -360,9 +278,6 @@ void async_write32(struct adapter *adapter, u32 addr, u32 val,
void async_write_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
void async_write_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
int rtw_init_io_priv(struct adapter *padapter,
void (*set_intf_ops)(struct _io_ops *pops));
uint alloc_io_queue(struct adapter *adapter);
void free_io_queue(struct adapter *adapter);
void async_bus_io(struct io_queue *pio_q);

38
include/rtw_ioctl.h
View file

@ -1,27 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef _RTW_IOCTL_H_
#define _RTW_IOCTL_H_
#include <osdep_service.h>
#include <drv_types.h>
#include "osdep_service.h"
#include "drv_types.h"
#ifndef OID_802_11_CAPABILITY
#define OID_802_11_CAPABILITY 0x0d010122
@ -61,12 +45,6 @@
#define OID_MP_SEG3 0xFF818700
#define OID_MP_SEG4 0xFF011100
#define DEBUG_OID(dbg, str) \
if ((!dbg)) { \
RT_TRACE(_module_rtl871x_ioctl_c_, _drv_info_, \
("%s(%d): %s", __func__, __line__, str)); \
}
enum oid_type {
QUERY_OID,
SET_OID
@ -98,12 +76,6 @@ struct oid_obj_priv {
int (*oidfuns)(struct oid_par_priv *poid_par_priv);
};
#if defined(_RTW_MP_IOCTL_C_)
static int oid_null_function(struct oid_par_priv *poid_par_priv) {
return NDIS_STATUS_SUCCESS;
}
#endif
extern struct iw_handler_def rtw_handlers_def;
int drv_query_info(struct net_device *miniportadaptercontext, NDIS_OID oid,

79
include/rtw_ioctl_rtl.h
View file

@ -1,79 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTW_IOCTL_RTL_H_
#define _RTW_IOCTL_RTL_H_
#include <osdep_service.h>
#include <drv_types.h>
/* oid_rtl_seg_01_01 ************** */
int oid_rt_get_signal_quality_hdl(struct oid_par_priv *poid_par_priv);/* 84 */
int oid_rt_get_small_packet_crc_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_middle_packet_crc_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_large_packet_crc_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_tx_retry_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_rx_retry_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_rx_total_packet_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_tx_beacon_ok_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_tx_beacon_err_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_pro_set_fw_dig_state_hdl(struct oid_par_priv *poid_par_priv);/* 8a */
int oid_rt_pro_set_fw_ra_state_hdl(struct oid_par_priv *poid_par_priv); /* 8b */
int oid_rt_get_rx_icv_err_hdl(struct oid_par_priv *poid_par_priv);/* 93 */
int oid_rt_set_encryption_algorithm_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_preamble_mode_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_ap_ip_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_channelplan_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_set_channelplan_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_set_preamble_mode_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_set_bcn_intvl_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_dedicate_probe_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_total_tx_bytes_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_total_rx_bytes_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_current_tx_power_level_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_enc_key_mismatch_count_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_enc_key_match_count_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_channel_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_hardware_radio_off_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_key_mismatch_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_supported_wireless_mode_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_channel_list_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_scan_in_progress_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_forced_data_rate_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_wireless_mode_for_scan_list_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_get_bss_wireless_mode_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_scan_with_magic_packet_hdl(struct oid_par_priv *poid_par_priv);
/* oid_rtl_seg_01_03 section start ************** */
int oid_rt_ap_get_associated_station_list_hdl(struct oid_par_priv *priv);
int oid_rt_ap_switch_into_ap_mode_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_ap_supported_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_ap_set_passphrase_hdl(struct oid_par_priv *poid_par_priv);
/* oid_rtl_seg_01_11 */
int oid_rt_pro_rf_write_registry_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_pro_rf_read_registry_hdl(struct oid_par_priv *poid_par_priv);
/* oid_rtl_seg_03_00 section start ************** */
int oid_rt_get_connect_state_hdl(struct oid_par_priv *poid_par_priv);
int oid_rt_set_default_key_id_hdl(struct oid_par_priv *poid_par_priv);
#endif

32
include/rtw_ioctl_set.h
View file

@ -1,30 +1,13 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTW_IOCTL_SET_H_
#define __RTW_IOCTL_SET_H_
#include <drv_types.h>
#include "drv_types.h"
typedef u8 NDIS_802_11_PMKID_VALUE[16];
u8 rtw_set_802_11_add_key(struct adapter *adapt, struct ndis_802_11_key *key);
u8 rtw_set_802_11_authentication_mode(struct adapter *adapt,
enum ndis_802_11_auth_mode authmode);
u8 rtw_set_802_11_bssid(struct adapter*adapter, u8 *bssid);
@ -35,15 +18,8 @@ u8 rtw_set_802_11_bssid_list_scan(struct adapter*adapter,
int ssid_max_num);
u8 rtw_set_802_11_infrastructure_mode(struct adapter *adapter,
enum ndis_802_11_network_infra type);
u8 rtw_set_802_11_remove_wep(struct adapter *adapter, u32 keyindex);
u8 rtw_set_802_11_ssid(struct adapter *adapt, struct ndis_802_11_ssid *ssid);
u8 rtw_set_802_11_remove_key(struct adapter *adapt,
struct ndis_802_11_remove_key *key);
u8 rtw_validate_ssid(struct ndis_802_11_ssid *ssid);
u16 rtw_get_cur_max_rate(struct adapter *adapter);
int rtw_set_scan_mode(struct adapter *adapter, enum rt_scan_type scan_mode);
int rtw_set_channel_plan(struct adapter *adapter, u8 channel_plan);
int rtw_set_country(struct adapter *adapter, const char *country_code);
int rtw_change_ifname(struct adapter *padapter, const char *ifname);
#endif

31
include/rtw_iol.h
View file

@ -1,27 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTW_IOL_H_
#define __RTW_IOL_H_
#include <osdep_service.h>
#include <drv_types.h>
#include "osdep_service.h"
#include "drv_types.h"
#define IOREG_CMD_END_LEN 4
@ -49,10 +33,6 @@ enum ioreg_cmd {
struct xmit_frame *rtw_IOL_accquire_xmit_frame(struct adapter *adapter);
int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds,
u32 cmd_len);
int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary);
int rtw_IOL_exec_cmds_sync(struct adapter *adapter,
struct xmit_frame *xmit_frame, u32 max_wating_ms,
u32 bndy_cnt);
bool rtw_IOL_applied(struct adapter *adapter);
int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us);
int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms);
@ -79,6 +59,5 @@ int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path,
_rtw_IOL_append_WRF_cmd((xmit_frame),(rf_path), (addr), (value), (mask))
u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame);
void rtw_IOL_cmd_buf_dump(struct adapter *Adapter,int buf_len,u8 *pbuf);
#endif /* __RTW_IOL_H_ */

166
include/rtw_led.h
View file

@ -1,63 +1,13 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTW_LED_H_
#define __RTW_LED_H_
#include <osdep_service.h>
#include <drv_types.h>
#define MSECS(t) (HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000)
#define LED_BLINK_NORMAL_INTERVAL 100
#define LED_BLINK_SLOWLY_INTERVAL 200
#define LED_BLINK_LONG_INTERVAL 400
#define LED_BLINK_NO_LINK_INTERVAL_ALPHA 1000
#define LED_BLINK_LINK_INTERVAL_ALPHA 500 /* 500 */
#define LED_BLINK_SCAN_INTERVAL_ALPHA 180 /* 150 */
#define LED_BLINK_FASTER_INTERVAL_ALPHA 50
#define LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA 5000
#define LED_BLINK_NORMAL_INTERVAL_NETTRONIX 100
#define LED_BLINK_SLOWLY_INTERVAL_NETTRONIX 2000
#define LED_BLINK_SLOWLY_INTERVAL_PORNET 1000
#define LED_BLINK_NORMAL_INTERVAL_PORNET 100
#define LED_BLINK_FAST_INTERVAL_BITLAND 30
/* 060403, rcnjko: Customized for AzWave. */
#define LED_CM2_BLINK_ON_INTERVAL 250
#define LED_CM2_BLINK_OFF_INTERVAL 4750
#define LED_CM8_BLINK_INTERVAL 500 /* for QMI */
#define LED_CM8_BLINK_OFF_INTERVAL 3750 /* for QMI */
/* 080124, lanhsin: Customized for RunTop */
#define LED_RunTop_BLINK_INTERVAL 300
/* 060421, rcnjko: Customized for Sercomm Printer Server case. */
#define LED_CM3_BLINK_INTERVAL 1500
#include "osdep_service.h"
#include "drv_types.h"
enum LED_CTL_MODE {
LED_CTL_POWER_ON = 1,
LED_CTL_LINK = 2,
LED_CTL_NO_LINK = 3,
LED_CTL_TX = 4,
@ -67,10 +17,7 @@ enum LED_CTL_MODE {
LED_CTL_START_TO_LINK = 8,
LED_CTL_START_WPS = 9,
LED_CTL_STOP_WPS = 10,
LED_CTL_START_WPS_BOTTON = 11, /* added for runtop */
LED_CTL_STOP_WPS_FAIL = 12, /* added for ALPHA */
LED_CTL_STOP_WPS_FAIL_OVERLAP = 13, /* added for BELKIN */
LED_CTL_CONNECTION_NO_TRANSFER = 14,
LED_CTL_STOP_WPS_FAIL = 12,
};
enum LED_STATE_871x {
@ -79,123 +26,46 @@ enum LED_STATE_871x {
RTW_LED_OFF = 2,
LED_BLINK_NORMAL = 3,
LED_BLINK_SLOWLY = 4,
LED_BLINK_POWER_ON = 5,
LED_BLINK_SCAN = 6, /* LED is blinking during scanning period,
* the # of times to blink is depend on time
* for scanning. */
LED_BLINK_NO_LINK = 7, /* LED is blinking during no link state. */
LED_BLINK_StartToBlink = 8,/* Customzied for Sercomm Printer
* Server case */
LED_BLINK_TXRX = 9,
LED_BLINK_WPS = 10, /* LED is blinkg during WPS communication */
LED_BLINK_WPS_STOP = 11, /* for ALPHA */
LED_BLINK_WPS_STOP_OVERLAP = 12, /* for BELKIN */
LED_BLINK_WPS_STOP = 11,
LED_BLINK_RUNTOP = 13, /* Customized for RunTop */
LED_BLINK_CAMEO = 14,
LED_BLINK_XAVI = 15,
LED_BLINK_ALWAYS_ON = 16,
};
enum LED_PIN_871x {
LED_PIN_NULL = 0,
LED_PIN_LED0 = 1,
LED_PIN_LED1 = 2,
LED_PIN_LED2 = 3,
LED_PIN_GPIO0 = 4,
};
struct LED_871x {
struct adapter *padapter;
enum LED_PIN_871x LedPin; /* Identify how to implement this
* SW led. */
enum LED_STATE_871x CurrLedState; /* Current LED state. */
enum LED_STATE_871x BlinkingLedState; /* Next state for blinking,
* either RTW_LED_ON or RTW_LED_OFF are. */
u8 bLedOn; /* true if LED is ON, false if LED is OFF. */
bool bLedOn; /* true if LED is ON, false if LED is OFF. */
u8 bLedBlinkInProgress; /* true if it is blinking, false o.w.. */
bool bLedBlinkInProgress; /* true if it is blinking, false o.w.. */
u8 bLedWPSBlinkInProgress;
bool bLedWPSBlinkInProgress;
u32 BlinkTimes; /* Number of times to toggle led state for blinking. */
struct timer_list BlinkTimer; /* Timer object for led blinking. */
u8 bSWLedCtrl;
/* ALPHA, added by chiyoko, 20090106 */
u8 bLedNoLinkBlinkInProgress;
u8 bLedLinkBlinkInProgress;
u8 bLedStartToLinkBlinkInProgress;
u8 bLedScanBlinkInProgress;
struct work_struct BlinkWorkItem; /* Workitem used by BlinkTimer to
* manipulate H/W to blink LED. */
bool bLedNoLinkBlinkInProgress;
bool bLedLinkBlinkInProgress;
bool bLedScanBlinkInProgress;
struct delayed_work blink_work;
};
#define IS_LED_WPS_BLINKING(_LED_871x) \
(((struct LED_871x *)_LED_871x)->CurrLedState == LED_BLINK_WPS || \
((struct LED_871x *)_LED_871x)->CurrLedState == LED_BLINK_WPS_STOP || \
((struct LED_871x *)_LED_871x)->bLedWPSBlinkInProgress)
#define IS_LED_BLINKING(_LED_871x) \
(((struct LED_871x *)_LED_871x)->bLedWPSBlinkInProgress || \
((struct LED_871x *)_LED_871x)->bLedScanBlinkInProgress)
/* LED customization. */
enum LED_STRATEGY_871x {
SW_LED_MODE0 = 0, /* SW control 1 LED via GPIO0. It is default option.*/
SW_LED_MODE1= 1, /* 2 LEDs, through LED0 and LED1. For ALPHA. */
SW_LED_MODE2 = 2, /* SW control 1 LED via GPIO0, customized for AzWave
* 8187 minicard. */
SW_LED_MODE3 = 3, /* SW control 1 LED via GPIO0, customized for Sercomm
* Printer Server case. */
SW_LED_MODE4 = 4, /* for Edimax / Belkin */
SW_LED_MODE5 = 5, /* for Sercomm / Belkin */
SW_LED_MODE6 = 6, /* for 88CU minicard, porting from ce SW_LED_MODE7 */
HW_LED = 50, /* HW control 2 LEDs, LED0 and LED1 (there are 4
* different control modes, see MAC.CONFIG1 for details.)*/
LED_ST_NONE = 99,
};
void LedControl8188eu(struct adapter *padapter, enum LED_CTL_MODE LedAction);
struct led_priv{
/* add for led control */
struct LED_871x SwLed0;
struct LED_871x SwLed1;
enum LED_STRATEGY_871x LedStrategy;
u8 bRegUseLed;
void (*LedControlHandler)(struct adapter *padapter,
enum LED_CTL_MODE LedAction);
/* add for led control */
bool bRegUseLed;
};
#define rtw_led_control(adapt, action) \
do { \
if ((adapt)->ledpriv.LedControlHandler) \
(adapt)->ledpriv.LedControlHandler((adapt), (action)); \
} while (0)
void rtl8188eu_InitSwLeds(struct adapter *padapter);
void rtl8188eu_DeInitSwLeds(struct adapter *padapter);
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
void BlinkTimerCallback(struct timer_list *t);
#else
void BlinkTimerCallback(void *data);
#endif
void BlinkWorkItemCallback(struct work_struct *work);
void ResetLedStatus(struct LED_871x * pLed);
void InitLed871x(struct adapter *padapter, struct LED_871x *pLed,
enum LED_PIN_871x LedPin);
void DeInitLed871x(struct LED_871x *pLed);
/* hal... */
void BlinkHandler(struct LED_871x * pLed);
void SwLedOn(struct adapter *padapter, struct LED_871x *pLed);
void SwLedOff(struct adapter *padapter, struct LED_871x *pLed);
void rtw_led_control(struct adapter *padapter, enum LED_CTL_MODE LedAction);
#endif /* __RTW_LED_H_ */

79
include/rtw_mlme.h
View file

@ -1,29 +1,13 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTW_MLME_H_
#define __RTW_MLME_H_
#include <osdep_service.h>
#include <mlme_osdep.h>
#include <drv_types.h>
#include <wlan_bssdef.h>
#include "osdep_service.h"
#include "mlme_osdep.h"
#include "drv_types.h"
#include "wlan_bssdef.h"
#define MAX_BSS_CNT 128
#define MAX_JOIN_TIMEOUT 6500
@ -259,18 +243,6 @@ struct wifidirect_info {
* by using the sta_preset CAPI. */
/* 0: disable */
/* 1: enable */
u8 wfd_tdls_enable; /* Flag to enable or disable the TDLS by WFD Sigma*/
/* 0: disable */
/* 1: enable */
u8 wfd_tdls_weaksec; /* Flag to enable or disable the weak security
* function for TDLS by WFD Sigma */
/* 0: disable */
/* In this case, the driver can't issue the tdsl
* setup request frame. */
/* 1: enable */
/* In this case, the driver can issue the tdls
* setup request frame */
/* even the current security is weak security. */
/* This field will store the WPS value (PIN value or PBC) that UI had
* got from the user. */
@ -329,16 +301,21 @@ struct tdls_info {
u8 enable;
};
struct qos_priv {
/* bit mask option: u-apsd,
* s-apsd, ts, block ack... */
unsigned int qos_option;
};
struct mlme_priv {
spinlock_t lock;
int fw_state; /* shall we protect this variable? maybe not necessarily... */
u8 bScanInProcess;
bool bScanInProcess;
u8 to_join; /* flag */
u8 to_roaming; /* roaming trying times */
u8 *nic_hdl;
u8 not_indic_disco;
struct list_head *pscanned;
struct __queue free_bss_pool;
struct __queue scanned_queue;
@ -389,7 +366,6 @@ struct mlme_priv {
u8 *assoc_rsp;
u32 assoc_rsp_len;
#if defined (CONFIG_88EU_AP_MODE)
/* Number of associated Non-ERP stations (i.e., stations using 802.11b
* in 802.11g BSS) */
int num_sta_non_erp;
@ -438,18 +414,10 @@ struct mlme_priv {
u32 p2p_assoc_req_ie_len;
spinlock_t bcn_update_lock;
u8 update_bcn;
#endif /* if defined (CONFIG_88EU_AP_MODE) */
};
#ifdef CONFIG_88EU_AP_MODE
struct hostapd_priv {
struct adapter *padapter;
};
int hostapd_mode_init(struct adapter *padapter);
void hostapd_mode_unload(struct adapter *padapter);
#endif
extern unsigned char WPA_TKIP_CIPHER[4];
extern unsigned char RSN_TKIP_CIPHER[4];
@ -463,19 +431,12 @@ void rtw_surveydone_event_callback(struct adapter *adapter, u8 *pbuf);
void rtw_joinbss_event_callback(struct adapter *adapter, u8 *pbuf);
void rtw_stassoc_event_callback(struct adapter *adapter, u8 *pbuf);
void rtw_stadel_event_callback(struct adapter *adapter, u8 *pbuf);
void rtw_atimdone_event_callback(struct adapter *adapter, u8 *pbuf);
void rtw_cpwm_event_callback(struct adapter *adapter, u8 *pbuf);
void indicate_wx_scan_complete_event(struct adapter *padapter);
void rtw_indicate_wx_assoc_event(struct adapter *padapter);
void rtw_indicate_wx_disassoc_event(struct adapter *padapter);
int event_thread(void *context);
#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0)
void rtw_join_timeout_handler (void *FunctionContext);
void _rtw_scan_timeout_handler(void *FunctionContext);
#else
void rtw_join_timeout_handler (struct timer_list *t);
void _rtw_scan_timeout_handler (struct timer_list *t);
#endif
void rtw_free_network_queue(struct adapter *adapter, u8 isfreeall);
int rtw_init_mlme_priv(struct adapter *adapter);
void rtw_free_mlme_priv (struct mlme_priv *pmlmepriv);
@ -490,7 +451,7 @@ static inline u8 *get_bssid(struct mlme_priv *pmlmepriv)
return pmlmepriv->cur_network.network.MacAddress;
}
static inline int check_fwstate(struct mlme_priv *pmlmepriv, int state)
static inline bool check_fwstate(struct mlme_priv *pmlmepriv, int state)
{
if (pmlmepriv->fw_state & state)
return true;
@ -533,7 +494,7 @@ static inline void _clr_fwstate_(struct mlme_priv *pmlmepriv, int state)
static inline void clr_fwstate(struct mlme_priv *pmlmepriv, int state)
{
spin_lock_bh(&pmlmepriv->lock);
if (check_fwstate(pmlmepriv, state) == true)
if (check_fwstate(pmlmepriv, state))
pmlmepriv->fw_state ^= state;
spin_unlock_bh(&pmlmepriv->lock);
}
@ -579,7 +540,6 @@ void rtw_free_assoc_resources(struct adapter *adapter, int lock_scanned_queue);
void rtw_indicate_disconnect(struct adapter *adapter);
void rtw_indicate_connect(struct adapter *adapter);
void rtw_indicate_scan_done( struct adapter *padapter, bool aborted);
void rtw_scan_abort(struct adapter *adapter);
int rtw_restruct_sec_ie(struct adapter *adapter, u8 *in_ie, u8 *out_ie,
uint in_len);
@ -589,8 +549,6 @@ void rtw_init_registrypriv_dev_network(struct adapter *adapter);
void rtw_update_registrypriv_dev_network(struct adapter *adapter);
void rtw_get_encrypt_decrypt_from_registrypriv(struct adapter *adapter);
void _rtw_join_timeout_handler(struct adapter *adapter);
void rtw_scan_timeout_handler(struct adapter *adapter);
@ -606,10 +564,6 @@ void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv);
void _rtw_free_mlme_priv(struct mlme_priv *pmlmepriv);
int _rtw_enqueue_network(struct __queue *queue, struct wlan_network *pnetwork);
struct wlan_network *_rtw_dequeue_network(struct __queue *queue);
struct wlan_network *_rtw_alloc_network(struct mlme_priv *pmlmepriv);
void _rtw_free_network(struct mlme_priv *pmlmepriv,
@ -624,7 +578,6 @@ void _rtw_free_network_queue(struct adapter *padapter, u8 isfreeall);
int rtw_if_up(struct adapter *padapter);
u8 *rtw_get_capability_from_ie(u8 *ie);
u8 *rtw_get_timestampe_from_ie(u8 *ie);
u8 *rtw_get_beacon_interval_from_ie(u8 *ie);
void rtw_joinbss_reset(struct adapter *padapter);

60
include/rtw_mlme_ext.h
View file

@ -1,28 +1,12 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTW_MLME_EXT_H_
#define __RTW_MLME_EXT_H_
#include <osdep_service.h>
#include <drv_types.h>
#include <wlan_bssdef.h>
#include "osdep_service.h"
#include "drv_types.h"
#include "wlan_bssdef.h"
/* Commented by Albert 20101105 */
/* Increase the SURVEY_TO value from 100 to 150 ( 100ms to 150ms ) */
@ -128,7 +112,6 @@ enum RT_CHANNEL_DOMAIN {
RT_CHANNEL_DOMAIN_JAPAN = 0x10,
RT_CHANNEL_DOMAIN_FCC_NO_DFS = 0x11,
RT_CHANNEL_DOMAIN_JAPAN_NO_DFS = 0x12,
RT_CHANNEL_DOMAIN_WORLD_WIDE_5G = 0x13,
RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS = 0x14,
/* new channel plan mapping, (2GDOMAIN_5GDOMAIN) ===== */
@ -179,11 +162,6 @@ struct rt_channel_plan {
unsigned char Len;
};
struct rt_channel_plan_2g {
unsigned char Channel[MAX_CHANNEL_NUM_2G];
unsigned char Len;
};
struct rt_channel_plan_map {
unsigned char Index2G;
};
@ -398,7 +376,7 @@ struct p2p_oper_class_map {
struct mlme_ext_priv {
struct adapter *padapter;
u8 mlmeext_init;
ATOMIC_T event_seq;
atomic_t event_seq;
u16 mgnt_seq;
unsigned char cur_channel;
@ -433,9 +411,7 @@ struct mlme_ext_priv {
u64 TSFValue;
#ifdef CONFIG_88EU_AP_MODE
unsigned char bstart_bss;
#endif
u8 update_channel_plan_by_ap_done;
/* recv_decache check for Action_public frame */
u8 action_public_dialog_token;
@ -464,9 +440,7 @@ void Set_MSR(struct adapter *padapter, u8 type);
u8 rtw_get_oper_ch(struct adapter *adapter);
void rtw_set_oper_ch(struct adapter *adapter, u8 ch);
u8 rtw_get_oper_bw(struct adapter *adapter);
void rtw_set_oper_bw(struct adapter *adapter, u8 bw);
u8 rtw_get_oper_choffset(struct adapter *adapter);
void rtw_set_oper_choffset(struct adapter *adapter, u8 offset);
void set_channel_bwmode(struct adapter *padapter, unsigned char channel,
@ -481,7 +455,6 @@ void write_cam(struct adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key);
void clear_cam_entry(struct adapter *padapter, u8 entry);
void invalidate_cam_all(struct adapter *padapter);
void CAM_empty_entry(struct adapter * Adapter, u8 ucIndex);
int allocate_fw_sta_entry(struct adapter *padapter);
void flush_all_cam_entry(struct adapter *padapter);
@ -492,7 +465,6 @@ u8 collect_bss_info(struct adapter *padapter, struct recv_frame *precv_frame,
void update_network(struct wlan_bssid_ex *dst, struct wlan_bssid_ex *src,
struct adapter *adapter, bool update_ie);
int get_bsstype(unsigned short capability);
u8 *get_my_bssid(struct wlan_bssid_ex *pnetwork);
u16 get_beacon_interval(struct wlan_bssid_ex *bss);
@ -536,9 +508,7 @@ unsigned int receive_disconnect(struct adapter *padapter,
unsigned char get_highest_rate_idx(u32 mask);
int support_short_GI(struct adapter *padapter, struct HT_caps_element *caps);
unsigned int is_ap_in_tkip(struct adapter *padapter);
unsigned int is_ap_in_wep(struct adapter *padapter);
unsigned int should_forbid_n_rate(struct adapter *padapter);
bool is_ap_in_tkip(struct adapter *padapter);
void report_join_res(struct adapter *padapter, int res);
void report_survey_event(struct adapter *padapter, struct recv_frame *precv_frame);
@ -561,18 +531,14 @@ s32 dump_mgntframe_and_wait(struct adapter *padapter,
s32 dump_mgntframe_and_wait_ack(struct adapter *padapter,
struct xmit_frame *pmgntframe);
#ifdef CONFIG_88EU_P2P
void issue_probersp_p2p(struct adapter *padapter, unsigned char *da);
void issue_p2p_provision_request(struct adapter *padapter, u8 *pssid,
u8 ussidlen, u8 *pdev_raddr);
void issue_p2p_GO_request(struct adapter *padapter, u8 *raddr);
void issue_probereq_p2p(struct adapter *padapter, u8 *da);
int issue_probereq_p2p_ex(struct adapter *adapter, u8 *da, int try_cnt,
int wait_ms);
void issue_p2p_invitation_response(struct adapter *padapter, u8 *raddr,
u8 dialogToken, u8 success);
void issue_p2p_invitation_request(struct adapter *padapter, u8* raddr);
#endif /* CONFIG_88EU_P2P */
void issue_beacon(struct adapter *padapter, int timeout_ms);
void issue_probersp(struct adapter *padapter, unsigned char *da,
u8 is_valid_p2p_probereq);
@ -593,8 +559,6 @@ int issue_deauth(struct adapter *padapter, unsigned char *da,
unsigned short reason);
int issue_deauth_ex(struct adapter *padapter, u8 *da, unsigned short reason,
int try_cnt, int wait_ms);
void issue_action_spct_ch_switch(struct adapter *padapter, u8 *ra, u8 new_ch,
u8 ch_offset);
void issue_action_BA(struct adapter *padapter, unsigned char *raddr,
unsigned char action, unsigned short status);
unsigned int send_delba(struct adapter *padapter, u8 initiator, u8 *addr);
@ -668,8 +632,8 @@ void addba_timer_hdl(struct sta_info *psta);
_set_timer(&(mlmeext)->link_timer, (ms)); \
} while (0)
int cckrates_included(unsigned char *rate, int ratelen);
int cckratesonly_included(unsigned char *rate, int ratelen);
bool cckrates_included(unsigned char *rate, int ratelen);
bool cckratesonly_included(unsigned char *rate, int ratelen);
void process_addba_req(struct adapter *padapter, u8 *paddba_req, u8 *addr);
@ -855,7 +819,7 @@ static struct fwevent wlanevents[] = {
{0, &rtw_joinbss_event_callback}, /*10*/
{sizeof(struct stassoc_event), &rtw_stassoc_event_callback},
{sizeof(struct stadel_event), &rtw_stadel_event_callback},
{0, &rtw_atimdone_event_callback},
{0, NULL},
{0, rtw_dummy_event_callback},
{0, NULL}, /*15*/
{0, NULL},
@ -865,7 +829,7 @@ static struct fwevent wlanevents[] = {
{0, NULL}, /*20*/
{0, NULL},
{0, NULL},
{0, &rtw_cpwm_event_callback},
{0, NULL},
{0, NULL},
};

492
include/rtw_mp.h
View file

@ -1,492 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTW_MP_H_
#define _RTW_MP_H_
/* 00 - Success */
/* 11 - Error */
#define STATUS_SUCCESS (0x00000000L)
#define STATUS_PENDING (0x00000103L)
#define STATUS_UNSUCCESSFUL (0xC0000001L)
#define STATUS_INSUFFICIENT_RESOURCES (0xC000009AL)
#define STATUS_NOT_SUPPORTED (0xC00000BBL)
#define NDIS_STATUS_SUCCESS ((int)STATUS_SUCCESS)
#define NDIS_STATUS_PENDING ((int)STATUS_PENDING)
#define NDIS_STATUS_NOT_RECOGNIZED ((int)0x00010001L)
#define NDIS_STATUS_NOT_COPIED ((int)0x00010002L)
#define NDIS_STATUS_NOT_ACCEPTED ((int)0x00010003L)
#define NDIS_STATUS_CALL_ACTIVE ((int)0x00010007L)
#define NDIS_STATUS_FAILURE ((int)STATUS_UNSUCCESSFUL)
#define NDIS_STATUS_RESOURCES ((int)STATUS_INSUFFICIENT_RESOURCES)
#define NDIS_STATUS_CLOSING ((int)0xC0010002L)
#define NDIS_STATUS_BAD_VERSION ((int)0xC0010004L)
#define NDIS_STATUS_BAD_CHARACTERISTICS ((int)0xC0010005L)
#define NDIS_STATUS_ADAPTER_NOT_FOUND ((int)0xC0010006L)
#define NDIS_STATUS_OPEN_FAILED ((int)0xC0010007L)
#define NDIS_STATUS_DEVICE_FAILED ((int)0xC0010008L)
#define NDIS_STATUS_MULTICAST_FULL ((int)0xC0010009L)
#define NDIS_STATUS_MULTICAST_EXISTS ((int)0xC001000AL)
#define NDIS_STATUS_MULTICAST_NOT_FOUND ((int)0xC001000BL)
#define NDIS_STATUS_REQUEST_ABORTED ((int)0xC001000CL)
#define NDIS_STATUS_RESET_IN_PROGRESS ((int)0xC001000DL)
#define NDIS_STATUS_CLOSING_INDICATING ((int)0xC001000EL)
#define NDIS_STATUS_NOT_SUPPORTED ((int)STATUS_NOT_SUPPORTED)
#define NDIS_STATUS_INVALID_PACKET ((int)0xC001000FL)
#define NDIS_STATUS_OPEN_LIST_FULL ((int)0xC0010010L)
#define NDIS_STATUS_ADAPTER_NOT_READY ((int)0xC0010011L)
#define NDIS_STATUS_ADAPTER_NOT_OPEN ((int)0xC0010012L)
#define NDIS_STATUS_NOT_INDICATING ((int)0xC0010013L)
#define NDIS_STATUS_INVALID_LENGTH ((int)0xC0010014L)
#define NDIS_STATUS_INVALID_DATA ((int)0xC0010015L)
#define NDIS_STATUS_BUFFER_TOO_SHORT ((int)0xC0010016L)
#define NDIS_STATUS_INVALID_OID ((int)0xC0010017L)
#define NDIS_STATUS_ADAPTER_REMOVED ((int)0xC0010018L)
#define NDIS_STATUS_UNSUPPORTED_MEDIA ((int)0xC0010019L)
#define NDIS_STATUS_GROUP_ADDRESS_IN_USE ((int)0xC001001AL)
#define NDIS_STATUS_FILE_NOT_FOUND ((int)0xC001001BL)
#define NDIS_STATUS_ERROR_READING_FILE ((int)0xC001001CL)
#define NDIS_STATUS_ALREADY_MAPPED ((int)0xC001001DL)
#define NDIS_STATUS_RESOURCE_CONFLICT ((int)0xC001001EL)
#define NDIS_STATUS_NO_CABLE ((int)0xC001001FL)
#define NDIS_STATUS_INVALID_SAP ((int)0xC0010020L)
#define NDIS_STATUS_SAP_IN_USE ((int)0xC0010021L)
#define NDIS_STATUS_INVALID_ADDRESS ((int)0xC0010022L)
#define NDIS_STATUS_VC_NOT_ACTIVATED ((int)0xC0010023L)
#define NDIS_STATUS_DEST_OUT_OF_ORDER ((int)0xC0010024L) /*cause 27*/
#define NDIS_STATUS_VC_NOT_AVAILABLE ((int)0xC0010025L) /*cause 35,45 */
#define NDIS_STATUS_CELLRATE_NOT_AVAILABLE ((int)0xC0010026L) /*cause 37*/
#define NDIS_STATUS_INCOMPATABLE_QOS ((int)0xC0010027L) /*cause 49*/
#define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED ((int)0xC0010028L) /*cause 93*/
#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((int)0xC0010029L) /*cause 3 */
enum antenna_path {
ANTENNA_NONE = 0x00,
ANTENNA_D,
ANTENNA_C,
ANTENNA_CD,
ANTENNA_B,
ANTENNA_BD,
ANTENNA_BC,
ANTENNA_BCD,
ANTENNA_A,
ANTENNA_AD,
ANTENNA_AC,
ANTENNA_ACD,
ANTENNA_AB,
ANTENNA_ABD,
ANTENNA_ABC,
ANTENNA_ABCD
};
#define MAX_MP_XMITBUF_SZ 2048
#define NR_MP_XMITFRAME 8
struct mp_xmit_frame {
struct list_head list;
struct pkt_attrib attrib;
struct sk_buff *pkt;
int frame_tag;
struct adapter *padapter;
struct urb *pxmit_urb[8];
/* insert urb, irp, and irpcnt info below... */
u8 *mem_addr;
u32 sz[8];
u8 bpending[8];
int ac_tag[8];
int last[8];
uint irpcnt;
uint fragcnt;
uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
};
struct mp_wiparam {
u32 bcompleted;
u32 act_type;
u32 io_offset;
u32 io_value;
};
typedef void(*wi_act_func)(void *padapter);
struct mp_tx {
u8 stop;
u32 count, sended;
u8 payload;
struct pkt_attrib attrib;
struct tx_desc desc;
u8 *pallocated_buf;
u8 *buf;
u32 buf_size, write_size;
void *PktTxThread;
};
#include <Hal8188EPhyCfg.h>
#define MP_MAX_LINES 1000
#define MP_MAX_LINES_BYTES 256
typedef void (*MPT_WORK_ITEM_HANDLER)(void *Adapter);
struct mpt_context {
/* Indicate if we have started Mass Production Test. */
bool bMassProdTest;
/* Indicate if the driver is unloading or unloaded. */
bool bMptDrvUnload;
struct semaphore MPh2c_Sema;
struct timer_list MPh2c_timeout_timer;
/* Event used to sync H2c for BT control */
bool MptH2cRspEvent;
bool MptBtC2hEvent;
bool bMPh2c_timeout;
/* 8190 PCI does not support NDIS_WORK_ITEM. */
/* Work Item for Mass Production Test. */
/* Event used to sync the case unloading driver and MptWorkItem
* is still in progress. */
/* Indicate a MptWorkItem is scheduled and not yet finished. */
bool bMptWorkItemInProgress;
/* An instance which implements function and context of MptWorkItem. */
MPT_WORK_ITEM_HANDLER CurrMptAct;
/* 1=Start, 0=Stop from UI. */
u32 MptTestStart;
/* _TEST_MODE, defined in MPT_Req2.h */
u32 MptTestItem;
/* Variable needed in each implementation of CurrMptAct. */
u32 MptActType; /* Type of action performed in CurrMptAct. */
/* The Offset of IO operation is depend of MptActType. */
u32 MptIoOffset;
/* The Value of IO operation is depend of MptActType. */
u32 MptIoValue;
/* The RfPath of IO operation is depend of MptActType. */
u32 MptRfPath;
enum wireless_mode MptWirelessModeToSw; /* Wireless mode to switch. */
u8 MptChannelToSw; /* Channel to switch. */
u8 MptInitGainToSet; /* Initial gain to set. */
u32 MptBandWidth; /* bandwidth to switch. */
u32 MptRateIndex; /* rate index. */
/* Register value kept for Single Carrier Tx test. */
u8 btMpCckTxPower;
/* Register value kept for Single Carrier Tx test. */
u8 btMpOfdmTxPower;
/* For MP Tx Power index */
u8 TxPwrLevel[2]; /* rf-A, rf-B */
/* Content of RCR Regsiter for Mass Production Test. */
u32 MptRCR;
/* true if we only receive packets with specific pattern. */
bool bMptFilterPattern;
/* Rx OK count, statistics used in Mass Production Test. */
u32 MptRxOkCnt;
/* Rx CRC32 error count, statistics used in Mass Production Test. */
u32 MptRxCrcErrCnt;
bool bCckContTx; /* true if we are in CCK Continuous Tx test. */
bool bOfdmContTx; /* true if we are in OFDM Continuous Tx test. */
bool bStartContTx; /* true if we have start Continuous Tx test. */
/* true if we are in Single Carrier Tx test. */
bool bSingleCarrier;
/* true if we are in Carrier Suppression Tx Test. */
bool bCarrierSuppression;
/* true if we are in Single Tone Tx test. */
bool bSingleTone;
/* ACK counter asked by K.Y.. */
bool bMptEnableAckCounter;
u32 MptAckCounter;
u8 APK_bound[2]; /* for APK path A/path B */
bool bMptIndexEven;
u8 backup0xc50;
u8 backup0xc58;
u8 backup0xc30;
u8 backup0x52_RF_A;
u8 backup0x52_RF_B;
u8 h2cReqNum;
u8 c2hBuf[20];
u8 btInBuf[100];
u32 mptOutLen;
u8 mptOutBuf[100];
};
enum {
WRITE_REG = 1,
READ_REG,
WRITE_RF,
READ_RF,
MP_START,
MP_STOP,
MP_RATE,
MP_CHANNEL,
MP_BANDWIDTH,
MP_TXPOWER,
MP_ANT_TX,
MP_ANT_RX,
MP_CTX,
MP_QUERY,
MP_ARX,
MP_PSD,
MP_PWRTRK,
MP_THER,
MP_IOCTL,
EFUSE_GET,
EFUSE_SET,
MP_RESET_STATS,
MP_DUMP,
MP_PHYPARA,
MP_SetRFPathSwh,
MP_QueryDrvStats,
MP_SetBT,
CTA_TEST,
MP_NULL,
};
struct mp_priv {
struct adapter *papdater;
/* Testing Flag */
/* 0 for normal type packet, 1 for loopback packet (16bytes TXCMD) */
u32 mode;
u32 prev_fw_state;
/* OID cmd handler */
struct mp_wiparam workparam;
/* Tx Section */
u8 TID;
u32 tx_pktcount;
struct mp_tx tx;
/* Rx Section */
u32 rx_pktcount;
u32 rx_crcerrpktcount;
u32 rx_pktloss;
struct recv_stat rxstat;
/* RF/BB relative */
u8 channel;
u8 bandwidth;
u8 prime_channel_offset;
u8 txpoweridx;
u8 txpoweridx_b;
u8 rateidx;
u32 preamble;
u32 CrystalCap;
u16 antenna_tx;
u16 antenna_rx;
u8 check_mp_pkt;
u8 bSetTxPower;
struct wlan_network mp_network;
unsigned char network_macaddr[ETH_ALEN];
u8 *pallocated_mp_xmitframe_buf;
u8 *pmp_xmtframe_buf;
struct __queue free_mp_xmitqueue;
u32 free_mp_xmitframe_cnt;
struct mpt_context MptCtx;
};
struct iocmd_struct {
u8 cmdclass;
u16 value;
u8 index;
};
struct rf_reg_param {
u32 path;
u32 offset;
u32 value;
};
struct bb_reg_param {
u32 offset;
u32 value;
};
/* */
#define LOWER true
#define RAISE false
/* Hardware Registers */
#define BB_REG_BASE_ADDR 0x800
/* MP variables */
enum mp_mode_{
MP_OFF,
MP_ON,
MP_ERR,
MP_CONTINUOUS_TX,
MP_SINGLE_CARRIER_TX,
MP_CARRIER_SUPPRISSION_TX,
MP_SINGLE_TONE_TX,
MP_PACKET_TX,
MP_PACKET_RX
};
extern u8 mpdatarate[NumRates];
/* MP set force data rate base on the definition. */
enum mpt_rate_index {
/* CCK rate. */
MPT_RATE_1M, /* 0 */
MPT_RATE_2M,
MPT_RATE_55M,
MPT_RATE_11M, /* 3 */
/* OFDM rate. */
MPT_RATE_6M, /* 4 */
MPT_RATE_9M,
MPT_RATE_12M,
MPT_RATE_18M,
MPT_RATE_24M,
MPT_RATE_36M,
MPT_RATE_48M,
MPT_RATE_54M, /* 11 */
/* HT rate. */
MPT_RATE_MCS0, /* 12 */
MPT_RATE_MCS1,
MPT_RATE_MCS2,
MPT_RATE_MCS3,
MPT_RATE_MCS4,
MPT_RATE_MCS5,
MPT_RATE_MCS6,
MPT_RATE_MCS7, /* 19 */
MPT_RATE_MCS8,
MPT_RATE_MCS9,
MPT_RATE_MCS10,
MPT_RATE_MCS11,
MPT_RATE_MCS12,
MPT_RATE_MCS13,
MPT_RATE_MCS14,
MPT_RATE_MCS15, /* 27 */
MPT_RATE_LAST
};
#define MAX_TX_PWR_INDEX_N_MODE 64 /* 0x3F */
enum power_mode {
POWER_LOW = 0,
POWER_NORMAL
};
#define RX_PKT_BROADCAST 1
#define RX_PKT_DEST_ADDR 2
#define RX_PKT_PHY_MATCH 3
enum encry_ctrl_state {
HW_CONTROL, /* hw encryption& decryption */
SW_CONTROL, /* sw encryption& decryption */
HW_ENCRY_SW_DECRY, /* hw encryption & sw decryption */
SW_ENCRY_HW_DECRY /* sw encryption & hw decryption */
};
s32 init_mp_priv(struct adapter *padapter);
void free_mp_priv(struct mp_priv *pmp_priv);
s32 MPT_InitializeAdapter(struct adapter *padapter, u8 Channel);
void MPT_DeInitAdapter(struct adapter *padapter);
s32 mp_start_test(struct adapter *padapter);
void mp_stop_test(struct adapter *padapter);
u32 _read_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 bitmask);
void _write_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val);
u32 read_macreg(struct adapter *padapter, u32 addr, u32 sz);
void write_macreg(struct adapter *padapter, u32 addr, u32 val, u32 sz);
u32 read_bbreg(struct adapter *padapter, u32 addr, u32 bitmask);
void write_bbreg(struct adapter *padapter, u32 addr, u32 bitmask, u32 val);
u32 read_rfreg(struct adapter *padapter, u8 rfpath, u32 addr);
void write_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 val);
void SetChannel(struct adapter *pAdapter);
void SetBandwidth(struct adapter *pAdapter);
void SetTxPower(struct adapter *pAdapter);
void SetAntennaPathPower(struct adapter *pAdapter);
void SetDataRate(struct adapter *pAdapter);
void SetAntenna(struct adapter *pAdapter);
s32 SetThermalMeter(struct adapter *pAdapter, u8 target_ther);
void GetThermalMeter(struct adapter *pAdapter, u8 *value);
void SetContinuousTx(struct adapter *pAdapter, u8 bStart);
void SetSingleCarrierTx(struct adapter *pAdapter, u8 bStart);
void SetSingleToneTx(struct adapter *pAdapter, u8 bStart);
void SetCarrierSuppressionTx(struct adapter *pAdapter, u8 bStart);
void PhySetTxPowerLevel(struct adapter *pAdapter);
void fill_txdesc_for_mp(struct adapter *padapter, struct tx_desc *ptxdesc);
void SetPacketTx(struct adapter *padapter);
void SetPacketRx(struct adapter *pAdapter, u8 bStartRx);
void ResetPhyRxPktCount(struct adapter *pAdapter);
u32 GetPhyRxPktReceived(struct adapter *pAdapter);
u32 GetPhyRxPktCRC32Error(struct adapter *pAdapter);
s32 SetPowerTracking(struct adapter *padapter, u8 enable);
void GetPowerTracking(struct adapter *padapter, u8 *enable);
u32 mp_query_psd(struct adapter *pAdapter, u8 *data);
void Hal_SetAntenna(struct adapter *pAdapter);
void Hal_SetBandwidth(struct adapter *pAdapter);
void Hal_SetTxPower(struct adapter *pAdapter);
void Hal_SetCarrierSuppressionTx(struct adapter *pAdapter, u8 bStart);
void Hal_SetSingleToneTx(struct adapter *pAdapter, u8 bStart);
void Hal_SetSingleCarrierTx (struct adapter *pAdapter, u8 bStart);
void Hal_SetContinuousTx (struct adapter *pAdapter, u8 bStart);
void Hal_SetBandwidth(struct adapter *pAdapter);
void Hal_SetDataRate(struct adapter *pAdapter);
void Hal_SetChannel(struct adapter *pAdapter);
void Hal_SetAntennaPathPower(struct adapter *pAdapter);
s32 Hal_SetThermalMeter(struct adapter *pAdapter, u8 target_ther);
s32 Hal_SetPowerTracking(struct adapter *padapter, u8 enable);
void Hal_GetPowerTracking(struct adapter *padapter, u8 * enable);
void Hal_GetThermalMeter(struct adapter *pAdapter, u8 *value);
void Hal_mpt_SwitchRfSetting(struct adapter *pAdapter);
void Hal_MPT_CCKTxPowerAdjust(struct adapter * Adapter, bool bInCH14);
void Hal_MPT_CCKTxPowerAdjustbyIndex(struct adapter *pAdapter, bool beven);
void Hal_SetCCKTxPower(struct adapter *pAdapter, u8 * TxPower);
void Hal_SetOFDMTxPower(struct adapter *pAdapter, u8 * TxPower);
void Hal_TriggerRFThermalMeter(struct adapter *pAdapter);
u8 Hal_ReadRFThermalMeter(struct adapter *pAdapter);
void Hal_SetCCKContinuousTx(struct adapter *pAdapter, u8 bStart);
void Hal_SetOFDMContinuousTx(struct adapter *pAdapter, u8 bStart);
void Hal_ProSetCrystalCap (struct adapter *pAdapter , u32 CrystalCapVal);
void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv);
void MP_PHY_SetRFPathSwitch(struct adapter *pAdapter ,bool bMain);
#endif /* _RTW_MP_H_ */

339
include/rtw_mp_ioctl.h
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@ -1,339 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTW_MP_IOCTL_H_
#define _RTW_MP_IOCTL_H_
#include <drv_types.h>
#include <mp_custom_oid.h>
#include <rtw_ioctl.h>
#include <rtw_ioctl_rtl.h>
#include <rtw_efuse.h>
#include <rtw_mp.h>
/* */
struct cfg_dbg_msg_struct {
u32 DebugLevel;
u32 DebugComponent_H32;
u32 DebugComponent_L32;
};
struct mp_rw_reg {
u32 offset;
u32 width;
u32 value;
};
struct efuse_access_struct {
u16 start_addr;
u16 cnts;
u8 data[0];
};
struct burst_rw_reg {
u32 offset;
u32 len;
u8 Data[256];
};
struct usb_vendor_req {
u8 bRequest;
u16 wValue;
u16 wIndex;
u16 wLength;
u8 u8Dir;/* 0:OUT, 1:IN */
u8 u8InData;
};
struct dr_variable_struct {
u8 offset;
u32 variable;
};
#define _irqlevel_changed_(a, b)
/* rtl8188eu_oid_rtl_seg_81_80_00 */
int rtl8188eu_oid_rt_pro_set_data_rate_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_start_test_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_stop_test_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_set_channel_direct_call_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_set_antenna_bb_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_set_tx_power_control_hdl(struct oid_par_priv *poid_par_priv);
/* rtl8188eu_oid_rtl_seg_81_80_20 */
int rtl8188eu_oid_rt_pro_query_tx_packet_sent_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_query_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_query_rx_packet_crc32_error_hdl(struct oid_par_priv *par_priv);
int rtl8188eu_oid_rt_pro_reset_tx_packet_sent_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_reset_rx_packet_received_hdl(struct oid_par_priv *par_priv);
int rtl8188eu_oid_rt_pro_set_modulation_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_set_continuous_tx_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_set_single_carrier_tx_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_set_carrier_suppression_tx_hdl(struct oid_par_priv *par_priv);
int rtl8188eu_oid_rt_pro_set_single_tone_tx_hdl(struct oid_par_priv *poid_par_priv);
/* rtl8188eu_oid_rtl_seg_81_87 */
int rtl8188eu_oid_rt_pro_write_bb_reg_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_read_bb_reg_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_write_rf_reg_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_read_rf_reg_hdl(struct oid_par_priv *poid_par_priv);
/* rtl8188eu_oid_rtl_seg_81_85 */
int rtl8188eu_oid_rt_wireless_mode_hdl(struct oid_par_priv *poid_par_priv);
/* rtl8188eu_oid_rtl_seg_87_11_00 */
int rtl8188eu_oid_rt_pro8711_join_bss_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_read_register_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_write_register_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_burst_read_register_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_burst_write_register_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_write_txcmd_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_read16_eeprom_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_write16_eeprom_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro8711_wi_poll_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro8711_pkt_loss_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_rd_attrib_mem_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_wr_attrib_mem_hdl (struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_set_rf_intfs_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_poll_rx_status_hdl(struct oid_par_priv *poid_par_priv);
/* rtl8188eu_oid_rtl_seg_87_11_20 */
int rtl8188eu_oid_rt_pro_cfg_debug_message_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_set_data_rate_ex_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_set_basic_rate_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_read_tssi_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_set_power_tracking_hdl(struct oid_par_priv *poid_par_priv);
/* rtl8188eu_oid_rtl_seg_87_11_50 */
int rtl8188eu_oid_rt_pro_qry_pwrstate_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_set_pwrstate_hdl(struct oid_par_priv *poid_par_priv);
/* rtl8188eu_oid_rtl_seg_87_11_F0 */
int rtl8188eu_oid_rt_pro_h2c_set_rate_table_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_h2c_get_rate_table_hdl(struct oid_par_priv *poid_par_priv);
/* rtl8188eu_oid_rtl_seg_87_12_00 */
int rtl8188eu_oid_rt_pro_encryption_ctrl_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_add_sta_info_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_dele_sta_info_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_query_dr_variable_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_read_efuse_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_write_efuse_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_rw_efuse_pgpkt_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_get_efuse_current_size_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_efuse_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_efuse_map_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_set_bandwidth_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_set_crystal_cap_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_set_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_get_efuse_max_size_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_set_tx_agc_offset_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_set_pkt_test_mode_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_get_thermal_meter_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_reset_phy_rx_packet_count_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_get_phy_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_get_phy_rx_packet_crc32_error_hdl(struct oid_par_priv *par_priv);
int rtl8188eu_oid_rt_set_power_down_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_get_power_mode_hdl(struct oid_par_priv *poid_par_priv);
int rtl8188eu_oid_rt_pro_trigger_gpio_hdl(struct oid_par_priv *poid_par_priv);
#ifdef _RTW_MP_IOCTL_C_
static const struct oid_obj_priv rtl8188eu_oid_rtl_seg_81_80_00[] = {
{1, &oid_null_function}, /* 0x00 OID_RT_PRO_RESET_DUT */
{1, &rtl8188eu_oid_rt_pro_set_data_rate_hdl}, /* 0x01 */
{1, &rtl8188eu_oid_rt_pro_start_test_hdl}, /* 0x02 */
{1, &rtl8188eu_oid_rt_pro_stop_test_hdl}, /* 0x03 */
{1, &oid_null_function}, /* 0x04 OID_RT_PRO_SET_PREAMBLE */
{1, &oid_null_function}, /* 0x05 OID_RT_PRO_SET_SCRAMBLER */
{1, &oid_null_function}, /* 0x06 OID_RT_PRO_SET_FILTER_BB */
{1, &oid_null_function},/* 0x07 OID_RT_PRO_SET_MANUAL_DIVERSITY_BB */
{1, &rtl8188eu_oid_rt_pro_set_channel_direct_call_hdl}, /* 0x08 */
{1, &oid_null_function},/* 0x09 OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL */
{1, &oid_null_function},/* 0x0A OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL */
{1, &rtl8188eu_oid_rt_pro_set_continuous_tx_hdl}, /* 0x0B OID_RT_PRO_SET_TX_CONTINUOUS_DIRECT_CALL */
{1, &rtl8188eu_oid_rt_pro_set_single_carrier_tx_hdl},/* 0x0C OID_RT_PRO_SET_SINGLE_CARRIER_TX_CONTINUOUS */
{1, &oid_null_function}, /* 0x0D OID_RT_PRO_SET_TX_ANTENNA_BB */
{1, &rtl8188eu_oid_rt_pro_set_antenna_bb_hdl}, /* 0x0E */
{1, &oid_null_function}, /* 0x0F OID_RT_PRO_SET_CR_SCRAMBLER */
{1, &oid_null_function}, /* 0x10 OID_RT_PRO_SET_CR_NEW_FILTER */
{1, &rtl8188eu_oid_rt_pro_set_tx_power_control_hdl},/* 0x11 OID_RT_PRO_SET_TX_POWER_CONTROL */
{1, &oid_null_function}, /* 0x12 OID_RT_PRO_SET_CR_TX_CONFIG */
{1, &oid_null_function}, /* 0x13 OID_RT_PRO_GET_TX_POWER_CONTROL */
{1, &oid_null_function}, /* 0x14 OID_RT_PRO_GET_CR_SIGNAL_QUALITY */
{1, &oid_null_function}, /* 0x15 OID_RT_PRO_SET_CR_SETPOINT */
{1, &oid_null_function}, /* 0x16 OID_RT_PRO_SET_INTEGRATOR */
{1, &oid_null_function}, /* 0x17 OID_RT_PRO_SET_SIGNAL_QUALITY */
{1, &oid_null_function}, /* 0x18 OID_RT_PRO_GET_INTEGRATOR */
{1, &oid_null_function}, /* 0x19 OID_RT_PRO_GET_SIGNAL_QUALITY */
{1, &oid_null_function}, /* 0x1A OID_RT_PRO_QUERY_EEPROM_TYPE */
{1, &oid_null_function}, /* 0x1B OID_RT_PRO_WRITE_MAC_ADDRESS */
{1, &oid_null_function}, /* 0x1C OID_RT_PRO_READ_MAC_ADDRESS */
{1, &oid_null_function}, /* 0x1D OID_RT_PRO_WRITE_CIS_DATA */
{1, &oid_null_function}, /* 0x1E OID_RT_PRO_READ_CIS_DATA */
{1, &oid_null_function} /* 0x1F OID_RT_PRO_WRITE_POWER_CONTROL */
};
static const struct oid_obj_priv rtl8188eu_oid_rtl_seg_81_80_20[] = {
{1, &oid_null_function}, /* 0x20 OID_RT_PRO_READ_POWER_CONTROL */
{1, &oid_null_function}, /* 0x21 OID_RT_PRO_WRITE_EEPROM */
{1, &oid_null_function}, /* 0x22 OID_RT_PRO_READ_EEPROM */
{1, &rtl8188eu_oid_rt_pro_reset_tx_packet_sent_hdl}, /* 0x23 */
{1, &rtl8188eu_oid_rt_pro_query_tx_packet_sent_hdl}, /* 0x24 */
{1, &rtl8188eu_oid_rt_pro_reset_rx_packet_received_hdl}, /* 0x25 */
{1, &rtl8188eu_oid_rt_pro_query_rx_packet_received_hdl}, /* 0x26 */
{1, &rtl8188eu_oid_rt_pro_query_rx_packet_crc32_error_hdl}, /* 0x27 */
{1, &oid_null_function}, /* 0x28 OID_RT_PRO_QUERY_CURRENT_ADDRESS */
{1, &oid_null_function}, /* 0x29 OID_RT_PRO_QUERY_PERMANENT_ADDRESS */
{1, &oid_null_function}, /* 0x2A OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS */
{1, &rtl8188eu_oid_rt_pro_set_carrier_suppression_tx_hdl},/* 0x2B OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX */
{1, &oid_null_function}, /* 0x2C OID_RT_PRO_RECEIVE_PACKET */
{1, &oid_null_function}, /* 0x2D OID_RT_PRO_WRITE_EEPROM_BYTE */
{1, &oid_null_function}, /* 0x2E OID_RT_PRO_READ_EEPROM_BYTE */
{1, &rtl8188eu_oid_rt_pro_set_modulation_hdl} /* 0x2F */
};
static const struct oid_obj_priv rtl8188eu_oid_rtl_seg_81_80_40[] = {
{1, &oid_null_function}, /* 0x40 */
{1, &oid_null_function}, /* 0x41 */
{1, &oid_null_function}, /* 0x42 */
{1, &rtl8188eu_oid_rt_pro_set_single_tone_tx_hdl}, /* 0x43 */
{1, &oid_null_function}, /* 0x44 */
{1, &oid_null_function} /* 0x45 */
};
static const struct oid_obj_priv rtl8188eu_oid_rtl_seg_81_80_80[] = {
{1, &oid_null_function}, /* 0x80 OID_RT_DRIVER_OPTION */
{1, &oid_null_function}, /* 0x81 OID_RT_RF_OFF */
{1, &oid_null_function} /* 0x82 OID_RT_AUTH_STATUS */
};
static const struct oid_obj_priv rtl8188eu_oid_rtl_seg_81_85[] = {
{1, &rtl8188eu_oid_rt_wireless_mode_hdl} /* 0x00 OID_RT_WIRELESS_MODE */
};
#endif /* _RTL871X_MP_IOCTL_C_ */
struct rwreg_param {
u32 offset;
u32 width;
u32 value;
};
struct bbreg_param {
u32 offset;
u32 phymask;
u32 value;
};
struct txpower_param {
u32 pwr_index;
};
struct datarate_param {
u32 rate_index;
};
struct rfintfs_parm {
u32 rfintfs;
};
struct mp_xmit_parm {
u8 enable;
u32 count;
u16 length;
u8 payload_type;
u8 da[ETH_ALEN];
};
struct mp_xmit_packet {
u32 len;
u32 mem[MAX_MP_XMITBUF_SZ >> 2];
};
struct psmode_param {
u32 ps_mode;
u32 smart_ps;
};
/* for OID_RT_PRO_READ16_EEPROM & OID_RT_PRO_WRITE16_EEPROM */
struct eeprom_rw_param {
u32 offset;
u16 value;
};
struct mp_ioctl_handler {
u32 paramsize;
s32 (*handler)(struct oid_par_priv* poid_par_priv);
u32 oid;
};
struct mp_ioctl_param{
u32 subcode;
u32 len;
u8 data[0];
};
#define GEN_MP_IOCTL_SUBCODE(code) _MP_IOCTL_ ## code ## _CMD_
enum RTL871X_MP_IOCTL_SUBCODE {
GEN_MP_IOCTL_SUBCODE(MP_START), /*0*/
GEN_MP_IOCTL_SUBCODE(MP_STOP),
GEN_MP_IOCTL_SUBCODE(READ_REG),
GEN_MP_IOCTL_SUBCODE(WRITE_REG),
GEN_MP_IOCTL_SUBCODE(READ_BB_REG),
GEN_MP_IOCTL_SUBCODE(WRITE_BB_REG), /*5*/
GEN_MP_IOCTL_SUBCODE(READ_RF_REG),
GEN_MP_IOCTL_SUBCODE(WRITE_RF_REG),
GEN_MP_IOCTL_SUBCODE(SET_CHANNEL),
GEN_MP_IOCTL_SUBCODE(SET_TXPOWER),
GEN_MP_IOCTL_SUBCODE(SET_DATARATE), /*10*/
GEN_MP_IOCTL_SUBCODE(SET_BANDWIDTH),
GEN_MP_IOCTL_SUBCODE(SET_ANTENNA),
GEN_MP_IOCTL_SUBCODE(CNTU_TX),
GEN_MP_IOCTL_SUBCODE(SC_TX),
GEN_MP_IOCTL_SUBCODE(CS_TX), /*15*/
GEN_MP_IOCTL_SUBCODE(ST_TX),
GEN_MP_IOCTL_SUBCODE(IOCTL_XMIT_PACKET),
GEN_MP_IOCTL_SUBCODE(SET_RX_PKT_TYPE),
GEN_MP_IOCTL_SUBCODE(RESET_PHY_RX_PKT_CNT),
GEN_MP_IOCTL_SUBCODE(GET_PHY_RX_PKT_RECV), /*20*/
GEN_MP_IOCTL_SUBCODE(GET_PHY_RX_PKT_ERROR),
GEN_MP_IOCTL_SUBCODE(READ16_EEPROM),
GEN_MP_IOCTL_SUBCODE(WRITE16_EEPROM),
GEN_MP_IOCTL_SUBCODE(EFUSE),
GEN_MP_IOCTL_SUBCODE(EFUSE_MAP), /*25*/
GEN_MP_IOCTL_SUBCODE(GET_EFUSE_MAX_SIZE),
GEN_MP_IOCTL_SUBCODE(GET_EFUSE_CURRENT_SIZE),
GEN_MP_IOCTL_SUBCODE(GET_THERMAL_METER),
GEN_MP_IOCTL_SUBCODE(SET_PTM),
GEN_MP_IOCTL_SUBCODE(SET_POWER_DOWN), /*30*/
GEN_MP_IOCTL_SUBCODE(TRIGGER_GPIO),
GEN_MP_IOCTL_SUBCODE(SET_DM_BT), /*35*/
GEN_MP_IOCTL_SUBCODE(DEL_BA), /*36*/
GEN_MP_IOCTL_SUBCODE(GET_WIFI_STATUS), /*37*/
MAX_MP_IOCTL_SUBCODE,
};
s32 rtl8188eu_mp_ioctl_xmit_packet_hdl(struct oid_par_priv *poid_par_priv);
#define GEN_HANDLER(sz, hdl, oid) {sz, hdl, oid},
#define EXT_MP_IOCTL_HANDLER(sz, subcode, oid) \
{sz, rtl8188eu_mp_ioctl_##subcode##_hdl, oid},
#endif

1079
include/rtw_mp_phy_regdef.h
View file

File diff suppressed because it is too large Load diff

25
include/rtw_p2p.h
View file

@ -1,26 +1,10 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTW_P2P_H_
#define __RTW_P2P_H_
#include <drv_types.h>
#include "drv_types.h"
u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
@ -29,7 +13,6 @@ u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo,
u8 *pdev_raddr);
u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo,
u8 *pbuf, u8 status_code);
u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo,
u8 *pframe, uint len);
u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo,

165
include/rtw_pwrctrl.h
View file

@ -1,39 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2012 Realtek Corporation. */
#ifndef __RTW_PWRCTRL_H_
#define __RTW_PWRCTRL_H_
#include <osdep_service.h>
#include <drv_types.h>
#define FW_PWR0 0
#define FW_PWR1 1
#define FW_PWR2 2
#define FW_PWR3 3
#define HW_PWR0 7
#define HW_PWR1 6
#define HW_PWR2 2
#define HW_PWR3 0
#define HW_PWR4 8
#define FW_PWRMSK 0x7
#include "osdep_service.h"
#include "drv_types.h"
#define XMIT_ALIVE BIT(0)
#define RECV_ALIVE BIT(1)
@ -47,81 +19,12 @@ enum power_mgnt {
PS_MODE_DTIM,
PS_MODE_VOIP,
PS_MODE_UAPSD_WMM,
PS_MODE_UAPSD,
PS_MODE_IBSS,
PS_MODE_WWLAN,
PM_Radio_Off,
PM_Card_Disable,
PS_MODE_NUM
};
/*
BIT[2:0] = HW state
BIT[3] = Protocol PS state, 0: register active state,
1: register sleep state
BIT[4] = sub-state
*/
#define PS_DPS BIT(0)
#define PS_LCLK (PS_DPS)
#define PS_RF_OFF BIT(1)
#define PS_ALL_ON BIT(2)
#define PS_ST_ACTIVE BIT(3)
#define PS_ISR_ENABLE BIT(4)
#define PS_IMR_ENABLE BIT(5)
#define PS_ACK BIT(6)
#define PS_TOGGLE BIT(7)
#define PS_STATE_MASK (0x0F)
#define PS_STATE_HW_MASK (0x07)
#define PS_SEQ_MASK (0xc0)
#define PS_STATE(x) (PS_STATE_MASK & (x))
#define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x))
#define PS_SEQ(x) (PS_SEQ_MASK & (x))
#define PS_STATE_S0 (PS_DPS)
#define PS_STATE_S1 (PS_LCLK)
#define PS_STATE_S2 (PS_RF_OFF)
#define PS_STATE_S3 (PS_ALL_ON)
#define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON))
#define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON))
#define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE))
#define CLR_PS_STATE(x) ((x) = ((x) & (0xF0)))
struct reportpwrstate_parm {
unsigned char mode;
unsigned char state; /* the CPWM value */
unsigned short rsvd;
};
static inline void _init_pwrlock(struct semaphore *plock)
{
sema_init(plock, 1);
}
static inline void _free_pwrlock(struct semaphore *plock)
{
}
static inline void _enter_pwrlock(struct semaphore *plock)
{
_rtw_down_sema(plock);
}
static inline void _exit_pwrlock(struct semaphore *plock)
{
up(plock);
}
#define LPS_DELAY_TIME 1*HZ /* 1 sec */
#define EXE_PWR_NONE 0x01
#define EXE_PWR_IPS 0x02
#define EXE_PWR_LPS 0x04
/* RF state. */
enum rt_rf_power_state {
rf_on, /* RF is on after RFSleep or RFOff */
@ -131,34 +34,6 @@ enum rt_rf_power_state {
rf_max
};
/* RF Off Level for IPS or HW/SW radio off */
#define RT_RF_OFF_LEVL_ASPM BIT(0) /* PCI ASPM */
#define RT_RF_OFF_LEVL_CLK_REQ BIT(1) /* PCI clock request */
#define RT_RF_OFF_LEVL_PCI_D3 BIT(2) /* PCI D3 mode */
#define RT_RF_OFF_LEVL_HALT_NIC BIT(3) /* NIC halt, re-init hw param*/
#define RT_RF_OFF_LEVL_FREE_FW BIT(4) /* FW free, re-download the FW*/
#define RT_RF_OFF_LEVL_FW_32K BIT(5) /* FW in 32k */
#define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT(6) /* Always enable ASPM and Clock
* Req in initialization. */
#define RT_RF_LPS_DISALBE_2R BIT(30) /* When LPS is on, disable 2R
* if no packet is RX or TX. */
#define RT_RF_LPS_LEVEL_ASPM BIT(31) /* LPS with ASPM */
#define RT_IN_PS_LEVEL(ppsc, _PS_FLAG) \
((ppsc->cur_ps_level & _PS_FLAG) ? true : false)
#define RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG) \
(ppsc->cur_ps_level &= (~(_PS_FLAG)))
#define RT_SET_PS_LEVEL(ppsc, _PS_FLAG) \
(ppsc->cur_ps_level |= _PS_FLAG)
enum _PS_BBRegBackup_ {
PSBBREG_RF0 = 0,
PSBBREG_RF1,
PSBBREG_RF2,
PSBBREG_AFE0,
PSBBREG_TOTALCNT
};
enum { /* for ips_mode */
IPS_NONE = 0,
IPS_NORMAL,
@ -166,12 +41,7 @@ enum { /* for ips_mode */
};
struct pwrctrl_priv {
struct semaphore lock;
volatile u8 rpwm; /* requested power state for fw */
volatile u8 cpwm; /* fw current power state. updated when
* 1. read from HCPWM 2. driver lowers power level */
volatile u8 tog; /* toggling */
volatile u8 cpwm_tog; /* toggling */
struct mutex lock; /* Mutex used to protect struct pwrctrl_priv */
u8 pwr_mode;
u8 smart_ps;
@ -179,12 +49,10 @@ struct pwrctrl_priv {
u32 alives;
struct work_struct cpwm_event;
u8 bpower_saving;
bool bpower_saving;
u8 b_hw_radio_off;
u8 reg_rfoff;
u8 reg_pdnmode; /* powerdown mode */
u32 rfoff_reason;
/* RF OFF Level */
u32 cur_ps_level;
@ -204,16 +72,10 @@ struct pwrctrl_priv {
u8 power_mgnt;
u8 bFwCurrentInPSMode;
u32 DelayLPSLastTimeStamp;
u8 btcoex_rfon;
s32 pnp_current_pwr_state;
u8 pnp_bstop_trx;
u8 bInternalAutoSuspend;
u8 bInSuspend;
#ifdef CONFIG_BT_COEXIST
u8 bAutoResume;
u8 autopm_cnt;
#endif
u8 bSupportRemoteWakeup;
struct timer_list pwr_state_check_timer;
int pwr_state_check_interval;
@ -225,11 +87,7 @@ struct pwrctrl_priv {
enum rt_rf_power_state change_rfpwrstate;
u8 wepkeymask;
u8 bHWPowerdown;/* if support hw power down */
u8 bHWPwrPindetect;
u8 bkeepfwalive;
u8 brfoffbyhw;
unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT];
};
#define rtw_get_ips_mode_req(pwrctrlpriv) \
@ -250,32 +108,23 @@ struct pwrctrl_priv {
(pwrctrl)->pwr_state_check_interval)
void rtw_init_pwrctrl_priv(struct adapter *adapter);
void rtw_free_pwrctrl_priv(struct adapter *adapter);
void rtw_set_ps_mode(struct adapter *adapter, u8 ps_mode, u8 smart_ps,
u8 bcn_ant_mode);
void rtw_set_rpwm(struct adapter *adapter, u8 val8);
void LeaveAllPowerSaveMode(struct adapter *adapter);
void ips_enter(struct adapter *padapter);
int ips_leave(struct adapter *padapter);
void rtw_ps_processor(struct adapter *padapter);
enum rt_rf_power_state RfOnOffDetect(struct adapter *iadapter);
s32 LPS_RF_ON_check(struct adapter *adapter, u32 delay_ms);
void LPS_Enter(struct adapter *adapter);
void LPS_Leave(struct adapter *adapter);
u8 rtw_interface_ps_func(struct adapter *adapter,
enum hal_intf_ps_func efunc_id, u8 *val);
void rtw_set_ips_deny(struct adapter *adapter, u32 ms);
int _rtw_pwr_wakeup(struct adapter *adapter, u32 ips_defer_ms,
const char *caller);
#define rtw_pwr_wakeup(adapter) \
_rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __func__)
#define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) \
_rtw_pwr_wakeup(adapter, ips_deffer_ms, __func__)
int rtw_pm_set_ips(struct adapter *adapter, u8 mode);
int rtw_pm_set_lps(struct adapter *adapter, u8 mode);

30
include/rtw_qos.h
View file

@ -1,30 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTW_QOS_H_
#define _RTW_QOS_H_
#include <osdep_service.h>
struct qos_priv {
unsigned int qos_option; /* bit mask option: u-apsd,
* s-apsd, ts, block ack... */
};
#endif /* _RTL871X_QOS_H_ */

152
include/rtw_recv.h
View file

@ -1,27 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2012 Realtek Corporation. */
#ifndef _RTW_RECV_H_
#define _RTW_RECV_H_
#include <osdep_service.h>
#include <drv_types.h>
#include "osdep_service.h"
#include "drv_types.h"
#define NR_RECVFRAME 256
@ -36,6 +20,8 @@
#define MAX_SUBFRAME_COUNT 64
#define LLC_HEADER_SIZE 6
/* for Rx reordering buffer control */
struct recv_reorder_ctrl {
struct adapter *padapter;
@ -69,13 +55,6 @@ struct stainfo_rxcache {
*/
};
struct smooth_rssi_data {
u32 elements[100]; /* array to store values */
u32 index; /* index to current array to store */
u32 total_num; /* num of valid elements */
u32 total_val; /* sum of valid elements */
};
struct signal_stat {
u8 update_req; /* used to indicate */
u8 avg_val; /* avg of valid elements */
@ -86,16 +65,13 @@ struct signal_stat {
struct phy_info {
u8 RxPWDBAll;
u8 SignalQuality; /* in 0-100 index. */
u8 RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; /* EVM */
u8 RxMIMOSignalStrength[MAX_PATH_NUM_92CS];/* in 0~100 index */
s8 RxPower; /* in dBm Translate from PWdB */
/* Real power in dBm for this packet, no beautification and aggregation.
* Keep this raw info to be used for the other procedures. */
s8 recvpower;
u8 BTRxRSSIPercentage;
u8 SignalStrength; /* in 0-100 index. */
u8 RxPwr[MAX_PATH_NUM_92CS];/* per-path's pwdb */
u8 RxSNR[MAX_PATH_NUM_92CS];/* per-path's SNR */
};
struct rx_pkt_attrib {
@ -106,7 +82,7 @@ struct rx_pkt_attrib {
u8 hdrlen; /* the WLAN Header Len */
u8 to_fr_ds;
u8 amsdu;
u8 qos;
bool qos;
u8 priority;
u8 pw_save;
u8 mdata;
@ -125,11 +101,11 @@ struct rx_pkt_attrib {
u16 eth_type;
u8 dst[ETH_ALEN];
u8 src[ETH_ALEN];
u8 ta[ETH_ALEN];
u8 ra[ETH_ALEN];
u8 bssid[ETH_ALEN];
u8 dst[ETH_ALEN] __aligned(2);
u8 src[ETH_ALEN] __aligned(2);
u8 ta[ETH_ALEN] __aligned(2);
u8 ra[ETH_ALEN] __aligned(2);
u8 bssid[ETH_ALEN] __aligned(2);
u8 ack_policy;
@ -192,10 +168,8 @@ struct recv_priv {
uint rx_smallpacket_crcerr;
uint rx_middlepacket_crcerr;
struct semaphore allrxreturnevt;
uint ff_hwaddr;
u8 rx_pending_cnt;
struct tasklet_struct irq_prepare_beacon_tasklet;
struct tasklet_struct recv_tasklet;
struct sk_buff_head free_recv_skb_queue;
struct sk_buff_head rx_skb_queue;
@ -233,22 +207,8 @@ struct sta_recv_priv {
};
struct recv_buf {
struct list_head list;
spinlock_t recvbuf_lock;
u32 ref_cnt;
struct adapter *adapter;
u8 *pbuf;
u8 *pallocated_buf;
u32 len;
u8 *phead;
u8 *pdata;
u8 *ptail;
u8 *pend;
struct urb *purb;
dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */
u32 alloc_sz;
u8 irp_pending;
int transfer_len;
struct sk_buff *pskb;
u8 reuse;
};
@ -288,19 +248,13 @@ struct recv_frame {
struct recv_frame *_rtw_alloc_recvframe(struct __queue *pfree_recv_queue);
struct recv_frame *rtw_alloc_recvframe(struct __queue *pfree_recv_queue);
void rtw_init_recvframe(struct recv_frame *precvframe,
struct recv_priv *precvpriv);
int rtw_free_recvframe(struct recv_frame *precvframe,
struct __queue *pfree_recv_queue);
#define rtw_dequeue_recvframe(queue) rtw_alloc_recvframe(queue)
int _rtw_enqueue_recvframe(struct recv_frame *precvframe, struct __queue *queue);
int rtw_enqueue_recvframe(struct recv_frame *precvframe, struct __queue *queue);
void rtw_free_recvframe_queue(struct __queue *pframequeue,
struct __queue *pfree_recv_queue);
u32 rtw_free_uc_swdec_pending_queue(struct adapter *adapter);
int rtw_enqueue_recvbuf_to_head(struct recv_buf *buf, struct __queue *queue);
int rtw_enqueue_recvbuf(struct recv_buf *precvbuf, struct __queue *queue);
struct recv_buf *rtw_dequeue_recvbuf(struct __queue *queue);
void rtw_reordering_ctrl_timeout_handler(void *pcontext);
@ -312,40 +266,6 @@ static inline u8 *get_rxmem(struct recv_frame *precvframe)
return precvframe->rx_head;
}
static inline u8 *get_rx_status(struct recv_frame *precvframe)
{
return get_rxmem(precvframe);
}
static inline u8 *get_recvframe_data(struct recv_frame *precvframe)
{
/* always return rx_data */
if (precvframe == NULL)
return NULL;
return precvframe->rx_data;
}
static inline u8 *recvframe_push(struct recv_frame *precvframe, int sz)
{
/* append data before rx_data */
/* add data to the start of recv_frame
*
* This function extends the used data area of the recv_frame at the buffer
* start. rx_data must be still larger than rx_head, after pushing.
*/
if (precvframe == NULL)
return NULL;
precvframe->rx_data -= sz ;
if (precvframe->rx_data < precvframe->rx_head) {
precvframe->rx_data += sz;
return NULL;
}
precvframe->len += sz;
return precvframe->rx_data;
}
static inline u8 *recvframe_pull(struct recv_frame *precvframe, int sz)
{
/* rx_data += sz; move rx_data sz bytes hereafter */
@ -402,52 +322,6 @@ static inline u8 *recvframe_pull_tail(struct recv_frame *precvframe, int sz)
return precvframe->rx_tail;
}
static inline unsigned char *get_rxbuf_desc(struct recv_frame *precvframe)
{
unsigned char *buf_desc;
if (precvframe == NULL)
return NULL;
return buf_desc;
}
static inline struct recv_frame *rxmem_to_recvframe(u8 *rxmem)
{
/* due to the design of 2048 bytes alignment of recv_frame,
* we can reference the struct recv_frame */
/* from any given member of recv_frame. */
/* rxmem indicates the any member/address in recv_frame */
return (struct recv_frame *)(((size_t)rxmem >> RXFRAME_ALIGN) << RXFRAME_ALIGN);
}
static inline struct recv_frame *pkt_to_recvframe(struct sk_buff *pkt)
{
u8 *buf_star;
struct recv_frame *precv_frame;
precv_frame = rxmem_to_recvframe((unsigned char *)buf_star);
return precv_frame;
}
static inline u8 *pkt_to_recvmem(struct sk_buff *pkt)
{
/* return the rx_head */
struct recv_frame *precv_frame = pkt_to_recvframe(pkt);
return precv_frame->rx_head;
}
static inline u8 *pkt_to_recvdata(struct sk_buff *pkt)
{
/* return the rx_data */
struct recv_frame *precv_frame = pkt_to_recvframe(pkt);
return precv_frame->rx_data;
}
static inline int get_recvframe_len(struct recv_frame *precvframe)
{
return precvframe->len;

73
include/rtw_rf.h
View file

@ -1,30 +1,10 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTW_RF_H_
#define __RTW_RF_H_
#include <rtw_cmd.h>
#define OFDM_PHY 1
#define MIXED_PHY 2
#define CCK_PHY 3
#include "rtw_cmd.h"
#define NumRates (13)
@ -32,23 +12,10 @@
#define SHORT_SLOT_TIME 9
#define NON_SHORT_SLOT_TIME 20
#define RTL8711_RF_MAX_SENS 6
#define RTL8711_RF_DEF_SENS 4
/* We now define the following channels as the max channels in each
* channel plan. */
/* 2G, total 14 chnls */
/* {1,2,3,4,5,6,7,8,9,10,11,12,13,14} */
#define MAX_CHANNEL_NUM_2G 14
#define MAX_CHANNEL_NUM 14 /* 2.4 GHz only */
#define NUM_REGULATORYS 1
/* Country codes */
#define USA 0x555320
#define EUROPE 0x1 /* temp, should be provided later */
#define JAPAN 0x2 /* temp, should be provided later */
struct regulatory_class {
u32 starting_freq; /* MHz, */
u8 channel_set[MAX_CHANNEL_NUM];
@ -85,24 +52,6 @@ enum _REG_PREAMBLE_MODE {
PREAMBLE_SHORT = 3,
};
enum _RTL8712_RF_MIMO_CONFIG_ {
RTL8712_RFCONFIG_1T = 0x10,
RTL8712_RFCONFIG_2T = 0x20,
RTL8712_RFCONFIG_1R = 0x01,
RTL8712_RFCONFIG_2R = 0x02,
RTL8712_RFCONFIG_1T1R = 0x11,
RTL8712_RFCONFIG_1T2R = 0x12,
RTL8712_RFCONFIG_TURBO = 0x92,
RTL8712_RFCONFIG_2T2R = 0x22
};
enum rf90_radio_path {
RF90_PATH_A = 0, /* Radio Path A */
RF90_PATH_B = 1, /* Radio Path B */
RF90_PATH_C = 2, /* Radio Path C */
RF90_PATH_D = 3 /* Radio Path D */
};
/* Bandwidth Offset */
#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
#define HAL_PRIME_CHNL_OFFSET_LOWER 1
@ -113,9 +62,6 @@ enum rf90_radio_path {
enum ht_channel_width {
HT_CHANNEL_WIDTH_20 = 0,
HT_CHANNEL_WIDTH_40 = 1,
HT_CHANNEL_WIDTH_80 = 2,
HT_CHANNEL_WIDTH_160 = 3,
HT_CHANNEL_WIDTH_10 = 4,
};
/* */
@ -129,17 +75,6 @@ enum ht_extchnl_offset {
HT_EXTCHNL_OFFSET_LOWER = 3,
};
/* 2007/11/15 MH Define different RF type. */
enum rt_rf_type_def {
RF_1T2R = 0,
RF_2T4R = 1,
RF_2T2R = 2,
RF_1T1R = 3,
RF_2T2R_GREEN = 4,
RF_819X_MAX_TYPE = 5,
};
u32 rtw_ch2freq(u32 ch);
u32 rtw_freq2ch(u32 freq);
#endif /* _RTL8711_RF_H_ */

183
include/rtw_security.h
View file

@ -1,27 +1,12 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTW_SECURITY_H_
#define __RTW_SECURITY_H_
#include <osdep_service.h>
#include <drv_types.h>
#include "osdep_service.h"
#include "drv_types.h"
#include <crypto/arc4.h>
#define _NO_PRIVACY_ 0x0
#define _WEP40_ 0x1
@ -29,18 +14,11 @@
#define _TKIP_WTMIC_ 0x3
#define _AES_ 0x4
#define _WEP104_ 0x5
#define _WEP_WPA_MIXED_ 0x07 /* WEP + WPA */
#define _SMS4_ 0x06
#define is_wep_enc(alg) (((alg) == _WEP40_) || ((alg) == _WEP104_))
#define _WPA_IE_ID_ 0xdd
#define _WPA2_IE_ID_ 0x30
#define SHA256_MAC_LEN 32
#define AES_BLOCK_SIZE 16
#define AES_PRIV_SIZE (4 * 44)
enum {
ENCRYP_PROTOCOL_OPENSYS, /* open system */
ENCRYP_PROTOCOL_WEP, /* WEP */
@ -122,7 +100,10 @@ struct security_priv {
union Keytype dot118021XGrprxmickey[4];
union pn48 dot11Grptxpn; /* PN48 used for Grp Key xmit.*/
union pn48 dot11Grprxpn; /* PN48 used for Grp Key recv.*/
#ifdef CONFIG_88EU_AP_MODE
struct arc4_ctx xmit_arc4_ctx;
struct arc4_ctx recv_arc4_ctx;
/* extend security capabilities for AP_MODE */
unsigned int dot8021xalg;/* 0:disable, 1:psk, 2:802.1x */
unsigned int wpa_psk;/* 0:disable, bit(0): WPA, bit(1):WPA2 */
@ -130,7 +111,6 @@ struct security_priv {
unsigned int wpa2_group_cipher;
unsigned int wpa_pairwise_cipher;
unsigned int wpa2_pairwise_cipher;
#endif
u8 wps_ie[MAX_WPS_IE_LEN];/* added in assoc req */
int wps_ie_len;
u8 binstallGrpkey;
@ -168,14 +148,6 @@ struct security_priv {
u8 bWepDefaultKeyIdxSet;
};
#if LINUX_VERSION_CODE <= KERNEL_VERSION(5, 8, 0)
struct sha256_state {
u64 length;
u32 state[8], curlen;
u8 buf[64];
};
#endif
#define GET_ENCRY_ALGO(psecuritypriv, psta, encry_algo, bmcst) \
do { \
switch (psecuritypriv->dot11AuthAlgrthm) { \
@ -243,140 +215,17 @@ struct mic_data {
u32 nBytesInM; /* # bytes in M */
};
extern const u32 Te0[256];
extern const u32 Te1[256];
extern const u32 Te2[256];
extern const u32 Te3[256];
extern const u32 Te4[256];
extern const u32 Td0[256];
extern const u32 Td1[256];
extern const u32 Td2[256];
extern const u32 Td3[256];
extern const u32 Td4[256];
extern const u32 rcon[10];
extern const u8 Td4s[256];
extern const u8 rcons[10];
#define RCON(i) (rcons[(i)] << 24)
static inline u32 rotr(u32 val, int bits)
{
return (val >> bits) | (val << (32 - bits));
}
#define TE0(i) Te0[((i) >> 24) & 0xff]
#define TE1(i) rotr(Te0[((i) >> 16) & 0xff], 8)
#define TE2(i) rotr(Te0[((i) >> 8) & 0xff], 16)
#define TE3(i) rotr(Te0[(i) & 0xff], 24)
#define TE41(i) ((Te0[((i) >> 24) & 0xff] << 8) & 0xff000000)
#define TE42(i) (Te0[((i) >> 16) & 0xff] & 0x00ff0000)
#define TE43(i) (Te0[((i) >> 8) & 0xff] & 0x0000ff00)
#define TE44(i) ((Te0[(i) & 0xff] >> 8) & 0x000000ff)
#define TE421(i) ((Te0[((i) >> 16) & 0xff] << 8) & 0xff000000)
#define TE432(i) (Te0[((i) >> 8) & 0xff] & 0x00ff0000)
#define TE443(i) (Te0[(i) & 0xff] & 0x0000ff00)
#define TE414(i) ((Te0[((i) >> 24) & 0xff] >> 8) & 0x000000ff)
#define TE4(i) ((Te0[(i)] >> 8) & 0x000000ff)
#define TD0(i) Td0[((i) >> 24) & 0xff]
#define TD1(i) rotr(Td0[((i) >> 16) & 0xff], 8)
#define TD2(i) rotr(Td0[((i) >> 8) & 0xff], 16)
#define TD3(i) rotr(Td0[(i) & 0xff], 24)
#define TD41(i) (Td4s[((i) >> 24) & 0xff] << 24)
#define TD42(i) (Td4s[((i) >> 16) & 0xff] << 16)
#define TD43(i) (Td4s[((i) >> 8) & 0xff] << 8)
#define TD44(i) (Td4s[(i) & 0xff])
#define TD0_(i) Td0[(i) & 0xff]
#define TD1_(i) rotr(Td0[(i) & 0xff], 8)
#define TD2_(i) rotr(Td0[(i) & 0xff], 16)
#define TD3_(i) rotr(Td0[(i) & 0xff], 24)
#define GETU32(pt) (((u32)(pt)[0] << 24) ^ ((u32)(pt)[1] << 16) ^ \
((u32)(pt)[2] << 8) ^ ((u32)(pt)[3]))
#define PUTU32(ct, st) { \
(ct)[0] = (u8)((st) >> 24); (ct)[1] = (u8)((st) >> 16); \
(ct)[2] = (u8)((st) >> 8); (ct)[3] = (u8)(st); }
#define WPA_GET_BE32(a) ((((u32)(a)[0]) << 24) | (((u32)(a)[1]) << 16) | \
(((u32)(a)[2]) << 8) | ((u32)(a)[3]))
#define WPA_PUT_LE16(a, val) \
do { \
(a)[1] = ((u16)(val)) >> 8; \
(a)[0] = ((u16)(val)) & 0xff; \
} while (0)
#define WPA_PUT_BE32(a, val) \
do { \
(a)[0] = (u8)((((u32)(val)) >> 24) & 0xff); \
(a)[1] = (u8)((((u32)(val)) >> 16) & 0xff); \
(a)[2] = (u8)((((u32)(val)) >> 8) & 0xff); \
(a)[3] = (u8)(((u32)(val)) & 0xff); \
} while (0)
#define WPA_PUT_BE64(a, val) \
do { \
(a)[0] = (u8)(((u64)(val)) >> 56); \
(a)[1] = (u8)(((u64)(val)) >> 48); \
(a)[2] = (u8)(((u64)(val)) >> 40); \
(a)[3] = (u8)(((u64)(val)) >> 32); \
(a)[4] = (u8)(((u64)(val)) >> 24); \
(a)[5] = (u8)(((u64)(val)) >> 16); \
(a)[6] = (u8)(((u64)(val)) >> 8); \
(a)[7] = (u8)(((u64)(val)) & 0xff); \
} while (0)
/* ===== start - public domain SHA256 implementation ===== */
/* This is based on SHA256 implementation in LibTomCrypt that was released into
* public domain by Tom St Denis. */
/* the K array */
static const unsigned long K[64] = {
0x428a2f98UL, 0x71374491UL, 0xb5c0fbcfUL, 0xe9b5dba5UL, 0x3956c25bUL,
0x59f111f1UL, 0x923f82a4UL, 0xab1c5ed5UL, 0xd807aa98UL, 0x12835b01UL,
0x243185beUL, 0x550c7dc3UL, 0x72be5d74UL, 0x80deb1feUL, 0x9bdc06a7UL,
0xc19bf174UL, 0xe49b69c1UL, 0xefbe4786UL, 0x0fc19dc6UL, 0x240ca1ccUL,
0x2de92c6fUL, 0x4a7484aaUL, 0x5cb0a9dcUL, 0x76f988daUL, 0x983e5152UL,
0xa831c66dUL, 0xb00327c8UL, 0xbf597fc7UL, 0xc6e00bf3UL, 0xd5a79147UL,
0x06ca6351UL, 0x14292967UL, 0x27b70a85UL, 0x2e1b2138UL, 0x4d2c6dfcUL,
0x53380d13UL, 0x650a7354UL, 0x766a0abbUL, 0x81c2c92eUL, 0x92722c85UL,
0xa2bfe8a1UL, 0xa81a664bUL, 0xc24b8b70UL, 0xc76c51a3UL, 0xd192e819UL,
0xd6990624UL, 0xf40e3585UL, 0x106aa070UL, 0x19a4c116UL, 0x1e376c08UL,
0x2748774cUL, 0x34b0bcb5UL, 0x391c0cb3UL, 0x4ed8aa4aUL, 0x5b9cca4fUL,
0x682e6ff3UL, 0x748f82eeUL, 0x78a5636fUL, 0x84c87814UL, 0x8cc70208UL,
0x90befffaUL, 0xa4506cebUL, 0xbef9a3f7UL, 0xc67178f2UL
};
/* Various logical functions */
#define RORc(x, y) \
(((((unsigned long)(x) & 0xFFFFFFFFUL) >> (unsigned long)((y)&31)) | \
((unsigned long)(x) << (unsigned long)(32-((y)&31)))) & 0xFFFFFFFFUL)
#define Ch(x, y ,z) (z ^ (x & (y ^ z)))
#define Maj(x, y, z) (((x | y) & z) | (x & y))
#define S(x, n) RORc((x), (n))
#define R(x, n) (((x)&0xFFFFFFFFUL)>>(n))
#define Sigma0(x) (S(x, 2) ^ S(x, 13) ^ S(x, 22))
#define Sigma1(x) (S(x, 6) ^ S(x, 11) ^ S(x, 25))
#define Gamma0(x) (S(x, 7) ^ S(x, 18) ^ R(x, 3))
#define Gamma1(x) (S(x, 17) ^ S(x, 19) ^ R(x, 10))
#ifndef MIN
#define MIN(x, y) (((x) < (y)) ? (x) : (y))
#endif
void rtw_secmicsetkey(struct mic_data *pmicdata, u8 *key);
void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b);
void rtw_secmicappend(struct mic_data *pmicdata, u8 *src, u32 nBytes);
void rtw_secgetmic(struct mic_data *pmicdata, u8 *dst);
void rtw_seccalctkipmic(u8 *key, u8 *header, u8 *data, u32 data_len,
u8 *Miccode, u8 priority);
u32 rtw_aes_encrypt(struct adapter *padapter, u8 *pxmitframe);
u32 rtw_tkip_encrypt(struct adapter *padapter, u8 *pxmitframe);
void rtw_wep_encrypt(struct adapter *padapter, u8 *pxmitframe);
u32 rtw_aes_decrypt(struct adapter *padapter, u8 *precvframe);
u32 rtw_tkip_decrypt(struct adapter *padapter, u8 *precvframe);
void rtw_wep_decrypt(struct adapter *padapter, u8 *precvframe);
void rtw_use_tkipkey_handler(void *FunctionContext);
u32 rtw_aes_encrypt(struct adapter *padapter, struct xmit_frame *pxmitframe);
u32 rtw_tkip_encrypt(struct adapter *padapter, struct xmit_frame *pxmitframe);
void rtw_wep_encrypt(struct adapter *padapter, struct xmit_frame *pxmitframe);
u32 rtw_aes_decrypt(struct adapter *padapter, struct recv_frame *precvframe);
u32 rtw_tkip_decrypt(struct adapter *padapter, struct recv_frame *precvframe);
void rtw_wep_decrypt(struct adapter *padapter, struct recv_frame *precvframe);
#endif /* __RTL871X_SECURITY_H_ */

50
include/rtw_sreset.h
View file

@ -1,50 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTW_SRESET_C_
#define _RTW_SRESET_C_
#include <osdep_service.h>
#include <drv_types.h>
struct sreset_priv {
struct mutex silentreset_mutex;
u8 silent_reset_inprogress;
u8 Wifi_Error_Status;
unsigned long last_tx_time;
unsigned long last_tx_complete_time;
};
#include <rtl8188e_hal.h>
#define WIFI_STATUS_SUCCESS 0
#define USB_VEN_REQ_CMD_FAIL BIT0
#define USB_READ_PORT_FAIL BIT1
#define USB_WRITE_PORT_FAIL BIT2
#define WIFI_MAC_TXDMA_ERROR BIT3
#define WIFI_TX_HANG BIT4
#define WIFI_RX_HANG BIT5
#define WIFI_IF_NOT_EXIST BIT6
void sreset_init_value(struct adapter *padapter);
void sreset_reset_value(struct adapter *padapter);
u8 sreset_get_wifi_status(struct adapter *padapter);
void sreset_set_wifi_error_status(struct adapter *padapter, u32 status);
#endif

1
include/rtw_version.h
View file

@ -1 +0,0 @@
#define DRIVERVERSION "v4.1.4_6773.20130222"

44
include/rtw_xmit.h
View file

@ -1,27 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef _RTW_XMIT_H_
#define _RTW_XMIT_H_
#include <osdep_service.h>
#include <drv_types.h>
#include "osdep_service.h"
#include "drv_types.h"
#define MAX_XMITBUF_SZ (20480) /* 20k */
#define NR_XMITBUFF (4)
@ -138,10 +122,10 @@ struct pkt_attrib {
u8 ack_policy;
u8 mac_id;
u8 vcs_mode; /* virtual carrier sense method */
u8 dst[ETH_ALEN];
u8 src[ETH_ALEN];
u8 ta[ETH_ALEN];
u8 ra[ETH_ALEN];
u8 dst[ETH_ALEN] __aligned(2);
u8 src[ETH_ALEN] __aligned(2);
u8 ta[ETH_ALEN] __aligned(2);
u8 ra[ETH_ALEN] __aligned(2);
u8 key_idx;
u8 qos_en;
u8 ht_en;
@ -201,7 +185,6 @@ enum {
void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms);
int rtw_sctx_wait(struct submit_ctx *sctx);
void rtw_sctx_done_err(struct submit_ctx **sctx, int status);
void rtw_sctx_done(struct submit_ctx **sctx);
struct xmit_buf {
struct list_head list;
@ -273,7 +256,6 @@ struct agg_pkt_info {
struct xmit_priv {
spinlock_t lock;
struct semaphore xmit_sema;
struct semaphore terminate_xmitthread_sema;
struct __queue be_pending;
struct __queue bk_pending;
@ -349,8 +331,6 @@ struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv,
s32 rtw_xmit_classifier(struct adapter *padapter,
struct xmit_frame *pxmitframe);
u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib);
#define rtw_wlan_pkt_size(f) rtw_calculate_wlan_pkt_size_by_attribue(&f->attrib)
s32 rtw_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt,
struct xmit_frame *pxmitframe);
s32 _rtw_init_hw_txqueue(struct hw_txqueue *phw_txqueue, u8 ac_tag);
@ -361,16 +341,14 @@ s32 rtw_txframes_sta_ac_pending(struct adapter *padapter,
void rtw_init_hwxmits(struct hw_xmit *phwxmit, int entry);
s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter);
void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv);
void rtw_alloc_hwxmits(struct adapter *padapter);
int rtw_alloc_hwxmits(struct adapter *padapter);
void rtw_free_hwxmits(struct adapter *padapter);
s32 rtw_xmit(struct adapter *padapter, struct sk_buff **pkt);
#if defined(CONFIG_88EU_AP_MODE)
int xmitframe_enqueue_for_sleeping_sta(struct adapter *padapter, struct xmit_frame *pxmitframe);
void stop_sta_xmit(struct adapter *padapter, struct sta_info *psta);
void wakeup_sta_to_xmit(struct adapter *padapter, struct sta_info *psta);
void xmit_delivery_enabled_frames(struct adapter *padapter, struct sta_info *psta);
#endif
u8 qos_acm(u8 acm_mask, u8 priority);
u32 rtw_get_ff_hwaddr(struct xmit_frame *pxmitframe);
@ -378,6 +356,6 @@ int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms);
void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status);
/* include after declaring struct xmit_buf, in order to avoid warning */
#include <xmit_osdep.h>
#include "xmit_osdep.h"
#endif /* _RTL871X_XMIT_H_ */

83
include/sta_info.h
View file

@ -1,28 +1,12 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __STA_INFO_H_
#define __STA_INFO_H_
#include <osdep_service.h>
#include <drv_types.h>
#include <wifi.h>
#include "osdep_service.h"
#include "drv_types.h"
#include "wifi.h"
#define IBSS_START_MAC_ID 2
#define NUM_STA 32
@ -140,7 +124,6 @@ struct sta_info {
/* sta_info: (AP & STA) CAP/INFO */
struct list_head asoc_list;
#ifdef CONFIG_88EU_AP_MODE
struct list_head auth_list;
unsigned int expire_to;
@ -180,9 +163,7 @@ struct sta_info {
u8 has_legacy_ac;
unsigned int sleepq_ac_len;
#endif /* CONFIG_88EU_AP_MODE */
#ifdef CONFIG_88EU_P2P
/* p2p priv data */
u8 is_p2p_device;
u8 p2p_status_code;
@ -196,7 +177,6 @@ struct sta_info {
u8 secdev_types_list[32];/* 32/8 == 4; */
u16 dev_name_len;
u8 dev_name[32];
#endif /* CONFIG_88EU_P2P */
u8 under_exist_checking;
u8 keep_alive_trycnt;
@ -230,53 +210,24 @@ struct sta_info {
+ sta->sta_stats.rx_ctrl_pkts \
+ sta->sta_stats.rx_data_pkts)
#define sta_last_rx_pkts(sta) \
(sta->sta_stats.last_rx_mgnt_pkts \
+ sta->sta_stats.last_rx_ctrl_pkts \
+ sta->sta_stats.last_rx_data_pkts)
#define sta_rx_data_pkts(sta) \
(sta->sta_stats.rx_data_pkts)
#define sta_last_rx_data_pkts(sta) \
(sta->sta_stats.last_rx_data_pkts)
#define sta_rx_mgnt_pkts(sta) \
(sta->sta_stats.rx_mgnt_pkts)
#define sta_last_rx_mgnt_pkts(sta) \
(sta->sta_stats.last_rx_mgnt_pkts)
#define sta_rx_beacon_pkts(sta) \
(sta->sta_stats.rx_beacon_pkts)
#define sta_last_rx_beacon_pkts(sta) \
(sta->sta_stats.last_rx_beacon_pkts)
#define sta_rx_probereq_pkts(sta) \
(sta->sta_stats.rx_probereq_pkts)
#define sta_last_rx_probereq_pkts(sta) \
(sta->sta_stats.last_rx_probereq_pkts)
#define sta_rx_probersp_pkts(sta) \
(sta->sta_stats.rx_probersp_pkts)
#define sta_last_rx_probersp_pkts(sta) \
(sta->sta_stats.last_rx_probersp_pkts)
#define sta_rx_probersp_bm_pkts(sta) \
(sta->sta_stats.rx_probersp_bm_pkts)
#define sta_last_rx_probersp_bm_pkts(sta) \
(sta->sta_stats.last_rx_probersp_bm_pkts)
#define sta_rx_probersp_uo_pkts(sta) \
(sta->sta_stats.rx_probersp_uo_pkts)
#define sta_last_rx_probersp_uo_pkts(sta) \
(sta->sta_stats.last_rx_probersp_uo_pkts)
#define sta_update_last_rx_pkts(sta) \
do { \
sta->sta_stats.last_rx_mgnt_pkts = sta->sta_stats.rx_mgnt_pkts; \
@ -289,23 +240,6 @@ do { \
sta->sta_stats.last_rx_data_pkts = sta->sta_stats.rx_data_pkts; \
} while (0)
#define STA_RX_PKTS_ARG(sta) \
sta->sta_stats.rx_mgnt_pkts \
, sta->sta_stats.rx_ctrl_pkts \
, sta->sta_stats.rx_data_pkts
#define STA_LAST_RX_PKTS_ARG(sta) \
sta->sta_stats.last_rx_mgnt_pkts \
, sta->sta_stats.last_rx_ctrl_pkts \
, sta->sta_stats.last_rx_data_pkts
#define STA_RX_PKTS_DIFF_ARG(sta) \
sta->sta_stats.rx_mgnt_pkts - sta->sta_stats.last_rx_mgnt_pkts \
, sta->sta_stats.rx_ctrl_pkts - sta->sta_stats.last_rx_ctrl_pkts \
, sta->sta_stats.rx_data_pkts - sta->sta_stats.last_rx_data_pkts
#define STA_PKTS_FMT "(m:%llu, c:%llu, d:%llu)"
struct sta_priv {
u8 *pallocated_stainfo_buf;
u8 *pstainfo_buf;
@ -322,7 +256,6 @@ struct sta_priv {
spinlock_t asoc_list_lock;
struct list_head asoc_list;
#ifdef CONFIG_88EU_AP_MODE
struct list_head auth_list;
spinlock_t auth_list_lock;
u8 asoc_list_cnt;
@ -346,8 +279,6 @@ struct sta_priv {
u16 max_num_sta;
struct wlan_acl_pool acl_list;
#endif
};
static inline u32 wifi_mac_hash(u8 *mac)
@ -367,7 +298,7 @@ static inline u32 wifi_mac_hash(u8 *mac)
}
extern u32 _rtw_init_sta_priv(struct sta_priv *pstapriv);
extern u32 _rtw_free_sta_priv(struct sta_priv *pstapriv);
extern void _rtw_free_sta_priv(struct sta_priv *pstapriv);
#define stainfo_offset_valid(offset) (offset < NUM_STA && offset >= 0)
int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta);

26
include/usb_hal.h
View file

@ -1,26 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __USB_HAL_H__
#define __USB_HAL_H__
void rtl8188eu_set_hal_ops(struct adapter *padapter);
#define hal_set_hal_ops rtl8188eu_set_hal_ops
#endif /* __USB_HAL_H__ */

78
include/usb_ops.h
View file

@ -1,71 +1,23 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __USB_OPS_H_
#define __USB_OPS_H_
#include <linux/version.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
#include "osdep_service.h"
#include "drv_types.h"
#include "osdep_intf.h"
#define REALTEK_USB_VENQT_READ 0xC0
#define REALTEK_USB_VENQT_WRITE 0x40
#define REALTEK_USB_VENQT_READ (USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE)
#define REALTEK_USB_VENQT_WRITE (USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE)
#define REALTEK_USB_VENQT_CMD_REQ 0x05
#define REALTEK_USB_VENQT_CMD_IDX 0x00
enum {
VENDOR_WRITE = 0x00,
VENDOR_READ = 0x01,
};
#define ALIGNMENT_UNIT 16
#define MAX_VENDOR_REQ_CMD_SIZE 254 /* 8188cu SIE Support */
#define MAX_USB_IO_CTL_SIZE (MAX_VENDOR_REQ_CMD_SIZE + ALIGNMENT_UNIT)
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 12))
#define rtw_usb_control_msg(dev, pipe, request, requesttype, \
value, index, data, size, timeout_ms) \
usb_control_msg((dev), (pipe), (request), (requesttype), (value),\
(index), (data), (size), (timeout_ms))
#define rtw_usb_bulk_msg(usb_dev, pipe, data, len, actual_length, timeout_ms) \
usb_bulk_msg((usb_dev), (pipe), (data), (len), \
(actual_length), (timeout_ms))
#else
#define rtw_usb_control_msg(dev, pipe, request, requesttype, \
value, index, data, size, timeout_ms) \
usb_control_msg((dev), (pipe), (request), (requesttype), \
(value), (index), (data), (size), \
((timeout_ms) == 0) || \
((timeout_ms)*HZ/1000 > 0) ? \
((timeout_ms)*HZ/1000) : 1)
#define rtw_usb_bulk_msg(usb_dev, pipe, data, len, \
actual_length, timeout_ms) \
usb_bulk_msg((usb_dev), (pipe), (data), (len), (actual_length), \
((timeout_ms) == 0) || ((timeout_ms)*HZ/1000 > 0) ?\
((timeout_ms)*HZ/1000) : 1)
#endif
#include <usb_ops_linux.h>
void rtl8188eu_set_hw_type(struct adapter *padapter);
#define hal_set_hw_type rtl8188eu_set_hw_type
void rtl8188eu_set_intf_ops(struct _io_ops *pops);
#define usb_set_intf_ops rtl8188eu_set_intf_ops
#include "usb_ops_linux.h"
/*
* Increase and check if the continual_urb_error of this @param dvobjprivei
@ -77,12 +29,10 @@ static inline int rtw_inc_and_chk_continual_urb_error(struct dvobj_priv *dvobj)
{
int ret = false;
int value;
value = ATOMIC_INC_RETURN(&dvobj->continual_urb_error);
if (value > MAX_CONTINUAL_URB_ERR) {
DBG_88E("[dvobj:%p][ERROR] continual_urb_error:%d > %d\n",
dvobj, value, MAX_CONTINUAL_URB_ERR);
value = atomic_inc_return(&dvobj->continual_urb_error);
if (value > MAX_CONTINUAL_URB_ERR)
ret = true;
}
return ret;
}
@ -91,7 +41,7 @@ static inline int rtw_inc_and_chk_continual_urb_error(struct dvobj_priv *dvobj)
*/
static inline void rtw_reset_continual_urb_error(struct dvobj_priv *dvobj)
{
ATOMIC_SET(&dvobj->continual_urb_error, 0);
atomic_set(&dvobj->continual_urb_error, 0);
}
#define USB_HIGH_SPEED_BULK_SIZE 512
@ -103,7 +53,7 @@ static inline u8 rtw_usb_bulk_size_boundary(struct adapter *padapter,
u8 rst = true;
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
if (pdvobjpriv->ishighspeed)
if (pdvobjpriv->pusbdev->speed == USB_SPEED_HIGH)
rst = (0 == (buf_len) % USB_HIGH_SPEED_BULK_SIZE) ?
true : false;
else

30
include/usb_ops_linux.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __USB_OPS_LINUX_H__
#define __USB_OPS_LINUX_H__
@ -44,12 +28,4 @@
unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr);
void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem);
void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem);
void usb_read_port_cancel(struct intf_hdl *pintfhdl);
u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem);
void usb_write_port_cancel(struct intf_hdl *pintfhdl);
#endif

34
include/usb_osintf.h
View file

@ -1,28 +1,12 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __USB_OSINTF_H
#define __USB_OSINTF_H
#include <osdep_service.h>
#include <drv_types.h>
#include <usb_vendor_req.h>
#include "osdep_service.h"
#include "drv_types.h"
#include "usb_vendor_req.h"
extern char *rtw_initmac;
extern int rtw_mc2u_disable;
@ -32,14 +16,10 @@ extern int rtw_mc2u_disable;
u8 usbvendorrequest(struct dvobj_priv *pdvobjpriv, enum bt_usb_request brequest,
enum rt_usb_wvalue wvalue, u8 windex, void *data,
u8 datalen, u8 isdirectionin);
int pm_netdev_open(struct net_device *pnetdev, u8 bnormal);
void netdev_br_init(struct net_device *netdev);
void dhcp_flag_bcast(struct adapter *priv, struct sk_buff *skb);
void *scdb_findEntry(struct adapter *priv, unsigned char *macAddr,
unsigned char *ipAddr);
void *scdb_findEntry(struct adapter *priv, unsigned char *ipAddr);
void nat25_db_expire(struct adapter *priv);
int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method);
int rtw_resume_process(struct adapter *padapter);
#endif

22
include/usb_vendor_req.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef _USB_VENDOR_REQUEST_H_
#define _USB_VENDOR_REQUEST_H_

265
include/wifi.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2012 Realtek Corporation. */
#ifndef _WIFI_H_
#define _WIFI_H_
@ -29,35 +13,11 @@
#define BIT(x) (1 << (x))
#define WLAN_ETHHDR_LEN 14
#define WLAN_ETHADDR_LEN 6
#define WLAN_IEEE_OUI_LEN 3
#define WLAN_ADDR_LEN 6
#define WLAN_CRC_LEN 4
#define WLAN_BSSID_LEN 6
#define WLAN_BSS_TS_LEN 8
#define WLAN_HDR_A3_LEN 24
#define WLAN_HDR_A4_LEN 30
#define WLAN_HDR_A3_QOS_LEN 26
#define WLAN_HDR_A4_QOS_LEN 32
#define WLAN_SSID_MAXLEN 32
#define WLAN_DATA_MAXLEN 2312
#define WLAN_A3_PN_OFFSET 24
#define WLAN_A4_PN_OFFSET 30
#define WLAN_MIN_ETHFRM_LEN 60
#define WLAN_MAX_ETHFRM_LEN 1514
#define WLAN_ETHHDR_LEN 14
#define P80211CAPTURE_VERSION 0x80211001
/* This value is tested by WiFi 11n Test Plan 5.2.3. */
/* This test verifies the WLAN NIC can update the NAV through sending
* the CTS with large duration. */
#define WiFiNavUpperUs 30000 /* 30 ms */
enum WIFI_FRAME_TYPE {
WIFI_MGT_TYPE = (0),
WIFI_CTRL_TYPE = (BIT(2)),
WIFI_DATA_TYPE = (BIT(3)),
WIFI_QOS_DATA_TYPE = (BIT(7)|BIT(3)), /* QoS Data */
@ -65,18 +25,18 @@ enum WIFI_FRAME_TYPE {
enum WIFI_FRAME_SUBTYPE {
/* below is for mgt frame */
WIFI_ASSOCREQ = (0 | WIFI_MGT_TYPE),
WIFI_ASSOCRSP = (BIT(4) | WIFI_MGT_TYPE),
WIFI_REASSOCREQ = (BIT(5) | WIFI_MGT_TYPE),
WIFI_REASSOCRSP = (BIT(5) | BIT(4) | WIFI_MGT_TYPE),
WIFI_PROBEREQ = (BIT(6) | WIFI_MGT_TYPE),
WIFI_PROBERSP = (BIT(6) | BIT(4) | WIFI_MGT_TYPE),
WIFI_BEACON = (BIT(7) | WIFI_MGT_TYPE),
WIFI_ATIM = (BIT(7) | BIT(4) | WIFI_MGT_TYPE),
WIFI_DISASSOC = (BIT(7) | BIT(5) | WIFI_MGT_TYPE),
WIFI_AUTH = (BIT(7) | BIT(5) | BIT(4) | WIFI_MGT_TYPE),
WIFI_DEAUTH = (BIT(7) | BIT(6) | WIFI_MGT_TYPE),
WIFI_ACTION = (BIT(7) | BIT(6) | BIT(4) | WIFI_MGT_TYPE),
WIFI_ASSOCREQ = (0 | IEEE80211_FTYPE_MGMT),
WIFI_ASSOCRSP = (BIT(4) | IEEE80211_FTYPE_MGMT),
WIFI_REASSOCREQ = (BIT(5) | IEEE80211_FTYPE_MGMT),
WIFI_REASSOCRSP = (BIT(5) | BIT(4) | IEEE80211_FTYPE_MGMT),
WIFI_PROBEREQ = (BIT(6) | IEEE80211_FTYPE_MGMT),
WIFI_PROBERSP = (BIT(6) | BIT(4) | IEEE80211_FTYPE_MGMT),
WIFI_BEACON = (BIT(7) | IEEE80211_FTYPE_MGMT),
WIFI_ATIM = (BIT(7) | BIT(4) | IEEE80211_FTYPE_MGMT),
WIFI_DISASSOC = (BIT(7) | BIT(5) | IEEE80211_FTYPE_MGMT),
WIFI_AUTH = (BIT(7) | BIT(5) | BIT(4) | IEEE80211_FTYPE_MGMT),
WIFI_DEAUTH = (BIT(7) | BIT(6) | IEEE80211_FTYPE_MGMT),
WIFI_ACTION = (BIT(7) | BIT(6) | BIT(4) | IEEE80211_FTYPE_MGMT),
/* below is for control frame */
WIFI_PSPOLL = (BIT(7) | BIT(5) | WIFI_CTRL_TYPE),
@ -130,35 +90,6 @@ enum WIFI_REASON_CODE {
_RSON_TDLS_TEAR_UN_RSN_ = 26,
};
/* Reason codes (IEEE 802.11-2007, 7.3.1.7, Table 7-22)
#define WLAN_REASON_UNSPECIFIED 1
#define WLAN_REASON_PREV_AUTH_NOT_VALID 2
#define WLAN_REASON_DEAUTH_LEAVING 3
#define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4
#define WLAN_REASON_DISASSOC_AP_BUSY 5
#define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6
#define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7
#define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8
#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9 */
/* IEEE 802.11h */
#define WLAN_REASON_PWR_CAPABILITY_NOT_VALID 10
#define WLAN_REASON_SUPPORTED_CHANNEL_NOT_VALID 11
/* IEEE 802.11i
#define WLAN_REASON_INVALID_IE 13
#define WLAN_REASON_MICHAEL_MIC_FAILURE 14
#define WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT 15
#define WLAN_REASON_GROUP_KEY_UPDATE_TIMEOUT 16
#define WLAN_REASON_IE_IN_4WAY_DIFFERS 17
#define WLAN_REASON_GROUP_CIPHER_NOT_VALID 18
#define WLAN_REASON_PAIRWISE_CIPHER_NOT_VALID 19
#define WLAN_REASON_AKMP_NOT_VALID 20
#define WLAN_REASON_UNSUPPORTED_RSN_IE_VERSION 21
#define WLAN_REASON_INVALID_RSN_IE_CAPAB 22
#define WLAN_REASON_IEEE_802_1X_AUTH_FAILED 23
#define WLAN_REASON_CIPHER_SUITE_REJECTED 24 */
enum WIFI_STATUS_CODE {
_STATS_SUCCESSFUL_ = 0,
_STATS_FAILURE_ = 1,
@ -173,19 +104,6 @@ enum WIFI_STATUS_CODE {
_STATS_RATE_FAIL_ = 18,
};
/* Status codes (IEEE 802.11-2007, 7.3.1.9, Table 7-23)
#define WLAN_STATUS_SUCCESS 0
#define WLAN_STATUS_UNSPECIFIED_FAILURE 1
#define WLAN_STATUS_CAPS_UNSUPPORTED 10
#define WLAN_STATUS_REASSOC_NO_ASSOC 11
#define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12
#define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13
#define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14
#define WLAN_STATUS_CHALLENGE_FAIL 15
#define WLAN_STATUS_AUTH_TIMEOUT 16
#define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17
#define WLAN_STATUS_ASSOC_DENIED_RATES 18 */
/* entended */
/* IEEE 802.11b */
#define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19
@ -249,72 +167,38 @@ enum WIFI_REG_DOMAIN {
#define GetToDs(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(_TO_DS_)) != 0)
#define ClearToDs(pbuf) \
*(__le16 *)(pbuf) &= (~cpu_to_le16(_TO_DS_))
#define SetFrDs(pbuf) \
*(__le16 *)(pbuf) |= cpu_to_le16(_FROM_DS_)
#define GetFrDs(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(_FROM_DS_)) != 0)
#define ClearFrDs(pbuf) \
*(__le16 *)(pbuf) &= (~cpu_to_le16(_FROM_DS_))
#define get_tofr_ds(pframe) ((GetToDs(pframe) << 1) | GetFrDs(pframe))
#define SetMFrag(pbuf) \
*(__le16 *)(pbuf) |= cpu_to_le16(_MORE_FRAG_)
#define GetMFrag(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(_MORE_FRAG_)) != 0)
#define ClearMFrag(pbuf) \
*(__le16 *)(pbuf) &= (~cpu_to_le16(_MORE_FRAG_))
#define SetRetry(pbuf) \
*(__le16 *)(pbuf) |= cpu_to_le16(_RETRY_)
#define GetRetry(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(_RETRY_)) != 0)
#define ClearRetry(pbuf) \
*(__le16 *)(pbuf) &= (~cpu_to_le16(_RETRY_))
#define SetPwrMgt(pbuf) \
*(__le16 *)(pbuf) |= cpu_to_le16(_PWRMGT_)
#define GetPwrMgt(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(_PWRMGT_)) != 0)
#define ClearPwrMgt(pbuf) \
*(__le16 *)(pbuf) &= (~cpu_to_le16(_PWRMGT_))
#define SetMData(pbuf) \
*(__le16 *)(pbuf) |= cpu_to_le16(_MORE_DATA_)
#define GetMData(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(_MORE_DATA_)) != 0)
#define ClearMData(pbuf) \
*(__le16 *)(pbuf) &= (~cpu_to_le16(_MORE_DATA_))
#define SetPrivacy(pbuf) \
*(__le16 *)(pbuf) |= cpu_to_le16(_PRIVACY_)
#define GetPrivacy(pbuf) \
(((*(__le16 *)(pbuf)) & cpu_to_le16(_PRIVACY_)) != 0)
#define ClearPrivacy(pbuf) \
*(__le16 *)(pbuf) &= (~cpu_to_le16(_PRIVACY_))
#define GetOrder(pbuf) \
(((*(__le16 *)(pbuf)) & cpu_to_le16(_ORDER_)) != 0)
#define GetFrameType(pbuf) \
(le16_to_cpu(*(__le16 *)(pbuf)) & (BIT(3) | BIT(2)))
#define SetFrameType(pbuf, type) \
do { \
*(unsigned short *)(pbuf) &= __constant_cpu_to_le16(~(BIT(3) | BIT(2))); \
*(unsigned short *)(pbuf) |= __constant_cpu_to_le16(type); \
} while (0)
#define GetFrameSubType(pbuf) (le16_to_cpu(*(__le16 *)(pbuf)) & (BIT(7) |\
BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2)))
@ -384,14 +268,7 @@ enum WIFI_REG_DOMAIN {
#define GetAddr4Ptr(pbuf) ((unsigned char *)((size_t)(pbuf) + 24))
#define MacAddr_isBcst(addr) \
( \
((addr[0] == 0xff) && (addr[1] == 0xff) && \
(addr[2] == 0xff) && (addr[3] == 0xff) && \
(addr[4] == 0xff) && (addr[5] == 0xff)) ? true : false \
)
static inline int IS_MCAST(unsigned char *da)
static inline bool IS_MCAST(unsigned char *da)
{
if ((*da) & 0x01)
return true;
@ -468,7 +345,7 @@ static inline unsigned char *get_hdr_bssid(unsigned char *pframe)
return sa;
}
static inline int IsFrameTypeCtrl(unsigned char *pframe)
static inline bool IsFrameTypeCtrl(unsigned char *pframe)
{
if (WIFI_CTRL_TYPE == GetFrameType(pframe))
return true;
@ -487,7 +364,7 @@ static inline int IsFrameTypeCtrl(unsigned char *pframe)
#define _PRE_ALLOCMICHDR_ 6
#define _SIFSTIME_ \
((priv->pmib->dot11BssType.net_work_type & WIRELESS_11A) ? 16 : 10)
(priv->pmib->dot11BssType.net_work_type = 10)
#define _ACKCTSLNG_ 14 /* 14 bytes long, including crclng */
#define _CRCLNG_ 4
@ -552,13 +429,6 @@ static inline int IsFrameTypeCtrl(unsigned char *pframe)
#define _STATUS_CODE_ 2
#define _TIMESTAMP_ 8
#define AUTH_ODD_TO 0
#define AUTH_EVEN_TO 1
#define WLAN_ETHCONV_ENCAP 1
#define WLAN_ETHCONV_RFC1042 2
#define WLAN_ETHCONV_8021h 3
#define cap_ESS BIT(0)
#define cap_IBSS BIT(1)
#define cap_CFPollable BIT(2)
@ -577,16 +447,6 @@ static inline int IsFrameTypeCtrl(unsigned char *pframe)
#define _IEEE8021X_MGT_ 1 /* WPA */
#define _IEEE8021X_PSK_ 2 /* WPA with pre-shared key */
/*
#define _NO_PRIVACY_ 0
#define _WEP_40_PRIVACY_ 1
#define _TKIP_PRIVACY_ 2
#define _WRAP_PRIVACY_ 3
#define _CCMP_PRIVACY_ 4
#define _WEP_104_PRIVACY_ 5
#define _WEP_WPA_MIXED_PRIVACY_ 6 WEP + WPA
*/
/*-----------------------------------------------------------------------------
Below is the definition for WMM
------------------------------------------------------------------------------*/
@ -620,10 +480,6 @@ struct rtw_ieee80211_bar {
__le16 start_seq_num;
} __packed;
/* 802.11 BAR control masks */
#define IEEE80211_BAR_CTRL_ACK_POLICY_NORMAL 0x0000
#define IEEE80211_BAR_CTRL_CBMTID_COMPRESSED_BA 0x0004
/**
* struct ieee80211_ht_cap - HT additional information
*
@ -678,61 +534,7 @@ struct ADDBA_request {
__le16 BA_starting_seqctrl;
} __packed;
enum ht_cap_ampdu_factor {
MAX_AMPDU_FACTOR_8K = 0,
MAX_AMPDU_FACTOR_16K = 1,
MAX_AMPDU_FACTOR_32K = 2,
MAX_AMPDU_FACTOR_64K = 3,
};
/* 802.11n HT capabilities masks */
#define IEEE80211_HT_CAP_SUP_WIDTH 0x0002
#define IEEE80211_HT_CAP_SM_PS 0x000C
#define IEEE80211_HT_CAP_GRN_FLD 0x0010
#define IEEE80211_HT_CAP_SGI_20 0x0020
#define IEEE80211_HT_CAP_SGI_40 0x0040
#define IEEE80211_HT_CAP_TX_STBC 0x0080
#define IEEE80211_HT_CAP_RX_STBC 0x0300
#define IEEE80211_HT_CAP_DELAY_BA 0x0400
#define IEEE80211_HT_CAP_MAX_AMSDU 0x0800
#define IEEE80211_HT_CAP_DSSSCCK40 0x1000
/* 802.11n HT capability AMPDU settings */
#define IEEE80211_HT_CAP_AMPDU_FACTOR 0x03
#define IEEE80211_HT_CAP_AMPDU_DENSITY 0x1C
/* 802.11n HT capability MSC set */
#define IEEE80211_SUPP_MCS_SET_UEQM 4
#define IEEE80211_HT_CAP_MAX_STREAMS 4
#define IEEE80211_SUPP_MCS_SET_LEN 10
/* maximum streams the spec allows */
#define IEEE80211_HT_CAP_MCS_TX_DEFINED 0x01
#define IEEE80211_HT_CAP_MCS_TX_RX_DIFF 0x02
#define IEEE80211_HT_CAP_MCS_TX_STREAMS 0x0C
#define IEEE80211_HT_CAP_MCS_TX_UEQM 0x10
/* 802.11n HT IE masks */
#define IEEE80211_HT_IE_CHA_SEC_OFFSET 0x03
#define IEEE80211_HT_IE_CHA_SEC_NONE 0x00
#define IEEE80211_HT_IE_CHA_SEC_ABOVE 0x01
#define IEEE80211_HT_IE_CHA_SEC_BELOW 0x03
#define IEEE80211_HT_IE_CHA_WIDTH 0x04
#define IEEE80211_HT_IE_HT_PROTECTION 0x0003
#define IEEE80211_HT_IE_NON_GF_STA_PRSNT 0x0004
#define IEEE80211_HT_IE_NON_HT_STA_PRSNT 0x0010
/* block-ack parameters */
#define IEEE80211_ADDBA_PARAM_POLICY_MASK 0x0002
#define IEEE80211_ADDBA_PARAM_TID_MASK 0x003C
#define RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK 0xFFC0
#define IEEE80211_DELBA_PARAM_TID_MASK 0xF000
#define IEEE80211_DELBA_PARAM_INITIATOR_MASK 0x0800
/*
* A-PMDU buffer sizes
* According to IEEE802.11n spec size varies from 8K to 64K (in powers of 2)
*/
#define IEEE80211_MIN_AMPDU_BUF 0x8
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,19,0))
#define IEEE80211_MAX_AMPDU_BUF 0x40
#endif
#define MAX_AMPDU_FACTOR_64K 3
/* Spatial Multiplexing Power Save Modes */
#define WLAN_HT_CAP_SM_PS_STATIC 0
@ -760,13 +562,6 @@ enum ht_cap_ampdu_factor {
#define HT_INFO_OPERATION_MODE_TRANSMIT_BURST_LIMIT ((u8) BIT(3))
#define HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT ((u8) BIT(4))
#define HT_INFO_STBC_PARAM_DUAL_BEACON ((u16) BIT(6))
#define HT_INFO_STBC_PARAM_DUAL_STBC_PROTECT ((u16) BIT(7))
#define HT_INFO_STBC_PARAM_SECONDARY_BC ((u16) BIT(8))
#define HT_INFO_STBC_PARAM_LSIG_TXOP_PROTECT_ALLOWED ((u16) BIT(9))
#define HT_INFO_STBC_PARAM_PCO_ACTIVE ((u16) BIT(10))
#define HT_INFO_STBC_PARAM_PCO_PHASE ((u16) BIT(11))
/* ===============WPS Section=============== */
/* For WPSv1.0 */
#define WPSOUI 0x0050f204
@ -1058,7 +853,7 @@ enum P2P_PROTO_WK_ID {
P2P_PRE_TX_PROVDISC_PROCESS_WK = 2,
P2P_PRE_TX_NEGOREQ_PROCESS_WK = 3,
P2P_PRE_TX_INVITEREQ_PROCESS_WK = 4,
P2P_AP_P2P_CH_SWITCH_PROCESS_WK =5,
P2P_AP_P2P_CH_SWITCH_PROCESS_WK = 5,
P2P_RO_CH_WK = 6,
};
@ -1077,26 +872,6 @@ enum P2P_PS_MODE {
P2P_PS_MIX = 3, /* CTWindow and NoA */
};
/* =====================WFD Section===================== */
/* For Wi-Fi Display */
#define WFD_ATTR_DEVICE_INFO 0x00
#define WFD_ATTR_ASSOC_BSSID 0x01
#define WFD_ATTR_COUPLED_SINK_INFO 0x06
#define WFD_ATTR_LOCAL_IP_ADDR 0x08
#define WFD_ATTR_SESSION_INFO 0x09
#define WFD_ATTR_ALTER_MAC 0x0a
/* For WFD Device Information Attribute */
#define WFD_DEVINFO_SOURCE 0x0000
#define WFD_DEVINFO_PSINK 0x0001
#define WFD_DEVINFO_SSINK 0x0002
#define WFD_DEVINFO_DUAL 0x0003
#define WFD_DEVINFO_SESSION_AVAIL 0x0010
#define WFD_DEVINFO_WSD 0x0040
#define WFD_DEVINFO_PC_TDLS 0x0080
#define WFD_DEVINFO_HDCP_SUPPORT 0x0100
#define IP_MCAST_MAC(mac) \
((mac[0] == 0x01) && (mac[1] == 0x00) && (mac[2] == 0x5e))
#define ICMPV6_MCAST_MAC(mac) \

26
include/wlan_bssdef.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __WLAN_BSSDEF_H__
#define __WLAN_BSSDEF_H__
@ -77,7 +61,7 @@ struct ndis_802_11_fixed_ie {
struct ndis_802_11_var_ie {
u8 ElementID;
u8 Length;
u8 data[1];
u8 data[];
};
/*
@ -270,7 +254,7 @@ static inline uint get_wlan_bssid_ex_sz(struct wlan_bssid_ex *bss)
struct wlan_network {
struct list_head list;
int network_type; /* refer to ieee80211.h for WIRELESS_11A/B/G */
int network_type; /* refer to ieee80211.h for WIRELESS_11B/G */
int fixed; /* set fixed when not to be removed
* in site-surveying */
unsigned long last_scanned; /* timestamp for the network */

30
include/xmit_osdep.h
View file

@ -1,27 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __XMIT_OSDEP_H_
#define __XMIT_OSDEP_H_
#include <osdep_service.h>
#include <drv_types.h>
#include "osdep_service.h"
#include "drv_types.h"
struct pkt_file {
struct sk_buff *pkt;
@ -53,12 +37,10 @@ int rtw_os_xmit_resource_alloc(struct adapter *padapter,
void rtw_os_xmit_resource_free(struct adapter *padapter,
struct xmit_buf *pxmitbuf, u32 free_sz);
void rtw_set_tx_chksum_offload(struct sk_buff *pkt, struct pkt_attrib *pattrib);
uint rtw_remainder_len(struct pkt_file *pfile);
void _rtw_open_pktfile(struct sk_buff *pkt, struct pkt_file *pfile);
uint _rtw_pktfile_read(struct pkt_file *pfile, u8 *rmem, uint rlen);
int rtw_endofpktfile(struct pkt_file *pfile);
bool rtw_endofpktfile(struct pkt_file *pfile);
void rtw_os_pkt_complete(struct adapter *padapter, struct sk_buff *pkt);
void rtw_os_xmit_complete(struct adapter *padapter,