mirror of
https://github.com/lwfinger/rtl8188eu.git
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rtl8188eu: Remove dead code for DM_ODM_SUPPORT_TYPE - Part 1
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
parent
37122aaa43
commit
78015aef77
9 changed files with 123 additions and 1666 deletions
530
hal/odm.h
530
hal/odm.h
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@ -125,31 +125,10 @@
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// 2011/09/20 MH Add for AP/ADSLpseudo DM structuer requirement.
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// We need to remove to other position???
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//
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#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
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typedef struct rtl8192cd_priv {
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u1Byte temp;
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}rtl8192cd_priv, *prtl8192cd_priv;
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#endif
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#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
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typedef struct _ADAPTER{
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u1Byte temp;
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#ifdef AP_BUILD_WORKAROUND
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HAL_DATA_TYPE* temp2;
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prtl8192cd_priv priv;
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#endif
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}ADAPTER, *struct adapter *;
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#endif
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#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
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typedef struct _WLAN_STA{
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u1Byte temp;
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} WLAN_STA, *PRT_WLAN_STA;
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#endif
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typedef struct _Dynamic_Initial_Gain_Threshold_
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{
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@ -249,30 +228,11 @@ typedef struct _RX_High_Power_
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BOOLEAN RXHP_enable;
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u1Byte TP_Mode;
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RT_TIMER PSDTimer;
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#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
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#if USE_WORKITEM
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RT_WORK_ITEM PSDTimeWorkitem;
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#endif
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#endif
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}RXHP_T, *pRXHP_T;
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#if(DM_ODM_SUPPORT_TYPE & (ODM_CE))
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#define ASSOCIATE_ENTRY_NUM 32 // Max size of AsocEntry[].
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#define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM
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#elif(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
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#define ASSOCIATE_ENTRY_NUM NUM_STAT
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#define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM+1
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#else
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//
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// 2012/01/12 MH Revise for compatiable with other SW team.
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// 0 is for STA 1-n is for AP clients.
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//
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#define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM+1// Default port only one
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#endif
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//#ifdef CONFIG_ANTENNA_DIVERSITY
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// This indicates two different the steps.
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// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air.
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@ -317,27 +277,6 @@ typedef struct _SW_Antenna_Switch_
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u8Byte RXByteCnt_B;
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u1Byte TrafficLoad;
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RT_TIMER SwAntennaSwitchTimer;
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#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
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#if USE_WORKITEM
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RT_WORK_ITEM SwAntennaSwitchWorkitem;
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#endif
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#endif
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/* CE Platform use
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#ifdef CONFIG_SW_ANTENNA_DIVERSITY
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_timer SwAntennaSwitchTimer;
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u8Byte lastTxOkCnt;
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u8Byte lastRxOkCnt;
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u8Byte TXByteCnt_A;
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u8Byte TXByteCnt_B;
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u8Byte RXByteCnt_A;
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u8Byte RXByteCnt_B;
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u1Byte DoubleComfirm;
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u1Byte TrafficLoad;
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//SW Antenna Switch
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#endif
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*/
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#ifdef CONFIG_HW_ANTENNA_DIVERSITY
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//Hybrid Antenna Diversity
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u4Byte CCK_Ant1_Cnt[ASSOCIATE_ENTRY_NUM];
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@ -352,17 +291,12 @@ typedef struct _SW_Antenna_Switch_
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u1Byte RxIdleAnt;
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#endif
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}SWAT_T, *pSWAT_T;
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//#endif
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typedef struct _EDCA_TURBO_
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{
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typedef struct _EDCA_TURBO_ {
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BOOLEAN bCurrentTurboEDCA;
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BOOLEAN bIsCurRDLState;
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#if(DM_ODM_SUPPORT_TYPE == ODM_CE )
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u4Byte prv_traffic_idx; // edca turbo
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#endif
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}EDCA_T,*pEDCA_T;
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@ -376,42 +310,6 @@ typedef struct _ODM_RATE_ADAPTIVE
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} ODM_RATE_ADAPTIVE, *PODM_RATE_ADAPTIVE;
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#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
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#ifdef ADSL_AP_BUILD_WORKAROUND
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#define MAX_TOLERANCE 5
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#define IQK_DELAY_TIME 1 //ms
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#endif
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//
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// Indicate different AP vendor for IOT issue.
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//
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typedef enum _HT_IOT_PEER
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{
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HT_IOT_PEER_UNKNOWN = 0,
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HT_IOT_PEER_REALTEK = 1,
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HT_IOT_PEER_REALTEK_92SE = 2,
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HT_IOT_PEER_BROADCOM = 3,
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HT_IOT_PEER_RALINK = 4,
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HT_IOT_PEER_ATHEROS = 5,
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HT_IOT_PEER_CISCO = 6,
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HT_IOT_PEER_MERU = 7,
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HT_IOT_PEER_MARVELL = 8,
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HT_IOT_PEER_REALTEK_SOFTAP = 9,// peer is RealTek SOFT_AP, by Bohn, 2009.12.17
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HT_IOT_PEER_SELF_SOFTAP = 10, // Self is SoftAP
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HT_IOT_PEER_AIRGO = 11,
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HT_IOT_PEER_INTEL = 12,
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HT_IOT_PEER_RTK_APCLIENT = 13,
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HT_IOT_PEER_REALTEK_81XX = 14,
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HT_IOT_PEER_REALTEK_WOW = 15,
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HT_IOT_PEER_MAX = 16
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}HT_IOT_PEER_E, *PHTIOT_PEER_E;
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#endif//#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
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#define IQK_MAC_REG_NUM 4
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#define IQK_ADDA_REG_NUM 16
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#define IQK_BB_REG_NUM_MAX 10
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@ -442,13 +340,11 @@ typedef struct _ODM_Phy_Status_Info_
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u1Byte SignalQuality; // in 0-100 index.
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u1Byte RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; //EVM
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u1Byte RxMIMOSignalStrength[MAX_PATH_NUM_92CS];// in 0~100 index
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#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
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s1Byte RxPower; // in dBm Translate from PWdB
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s1Byte RecvSignalPower;// Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures.
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u1Byte BTRxRSSIPercentage;
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u1Byte SignalStrength; // in 0-100 index.
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u1Byte RxPwr[MAX_PATH_NUM_92CS];//per-path's pwdb
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#endif
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u1Byte RxSNR[MAX_PATH_NUM_92CS];//per-path's SNR
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}ODM_PHY_INFO_T,*PODM_PHY_INFO_T;
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@ -900,31 +796,6 @@ typedef struct _IQK_MATRIX_REGS_SETTING{
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s4Byte Value[1][IQK_Matrix_REG_NUM];
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}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING;
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#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
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typedef struct _PathDiv_Parameter_define_
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{
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u4Byte org_5g_RegE30;
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u4Byte org_5g_RegC14;
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u4Byte org_5g_RegCA0;
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u4Byte swt_5g_RegE30;
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u4Byte swt_5g_RegC14;
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u4Byte swt_5g_RegCA0;
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//for 2G IQK information
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u4Byte org_2g_RegC80;
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u4Byte org_2g_RegC4C;
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u4Byte org_2g_RegC94;
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u4Byte org_2g_RegC14;
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u4Byte org_2g_RegCA0;
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u4Byte swt_2g_RegC80;
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u4Byte swt_2g_RegC4C;
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u4Byte swt_2g_RegC94;
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u4Byte swt_2g_RegC14;
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u4Byte swt_2g_RegCA0;
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}PATHDIV_PARA,*pPATHDIV_PARA;
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#endif
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typedef struct ODM_RF_Calibration_Structure
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{
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//for tx power tracking
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@ -1062,11 +933,7 @@ typedef enum _ANT_DIV_TYPE
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//
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// 2011/09/22 MH Copy from SD4 defined structure. We use to support PHY DM integration.
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//
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#if(DM_ODM_SUPPORT_TYPE & ODM_MP)
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struct DM_Out_Source_Dynamic_Mechanism_Structure
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#else// for AP,ADSL,CE Team
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typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
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#endif
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{
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//RT_TIMER FastAntTrainingTimer;
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//
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@ -1077,14 +944,7 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
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// WHen you use Adapter or priv pointer, you must make sure the pointer is ready.
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BOOLEAN odm_ready;
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#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
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rtl8192cd_priv fake_priv;
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#endif
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#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
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// ADSL_AP_BUILD_WORKAROUND
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ADAPTER fake_adapter;
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#endif
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u8Byte DebugComponents;
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u4Byte DebugLevel;
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@ -1281,16 +1141,9 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
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RXHP_T DM_RXHP_Table;
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FALSE_ALARM_STATISTICS FalseAlmCnt;
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FALSE_ALARM_STATISTICS FlaseAlmCntBuddyAdapter;
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//#ifdef CONFIG_ANTENNA_DIVERSITY
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SWAT_T DM_SWAT_Table;
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BOOLEAN RSSI_test;
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//#endif
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#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
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//Path Div Struct
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PATHDIV_PARA pathIQK;
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#endif
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EDCA_T DM_EDCA_Table;
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u4Byte WMMEDCA_BE;
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// Copy from SD4 structure
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@ -1298,17 +1151,6 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
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// ==================================================
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//
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//common
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//u1Byte DM_Type;
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//u1Byte PSD_Report_RXHP[80]; // Add By Gary
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//u1Byte PSD_func_flag; // Add By Gary
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//for DIG
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//u1Byte bDMInitialGainEnable;
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//u1Byte binitialized; // for dm_initial_gain_Multi_STA use.
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//for Antenna diversity
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//u8 AntDivCfg;// 0:OFF , 1:ON, 2:by efuse
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//PSTA_INFO_T RSSI_target;
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BOOLEAN *pbDriverStopped;
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BOOLEAN *pbDriverIsGoingToPnpSetPowerSleep;
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BOOLEAN *pinit_adpt_in_progress;
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@ -1355,29 +1197,9 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
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RT_TIMER FastAntTrainingTimer;
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// ODM relative workitem.
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#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
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#if USE_WORKITEM
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RT_WORK_ITEM PathDivSwitchWorkitem;
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RT_WORK_ITEM CCKPathDiversityWorkitem;
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RT_WORK_ITEM FastAntTrainingWorkitem;
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#endif
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#endif
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#if(DM_ODM_SUPPORT_TYPE & ODM_MP)
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};
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#else// for AP,ADSL,CE Team
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} DM_ODM_T, *PDM_ODM_T; // DM_Dynamic_Mechanism_Structure
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#endif
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#if 1 //92c-series
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#define ODM_RF_PATH_MAX 2
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#else //jaguar - series
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#define ODM_RF_PATH_MAX 4
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#endif
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typedef enum _ODM_RF_RADIO_PATH {
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ODM_RF_PATH_A = 0, //Radio Path A
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@ -1403,7 +1225,6 @@ typedef enum _ODM_BB_Config_Type{
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} ODM_BB_Config_Type, *PODM_BB_Config_Type;
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// Status code
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#if (DM_ODM_SUPPORT_TYPE != ODM_MP)
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typedef enum _RT_STATUS{
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RT_STATUS_SUCCESS,
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RT_STATUS_FAILURE,
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@ -1414,13 +1235,6 @@ typedef enum _RT_STATUS{
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RT_STATUS_NOT_SUPPORT,
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RT_STATUS_OS_API_FAILED,
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}RT_STATUS,*PRT_STATUS;
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#endif // end of RT_STATUS definition
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#ifdef REMOVE_PACK
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#pragma pack()
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#endif
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//#include "odm_function.h"
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//3===========================================================
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//3 DIG
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@ -1607,13 +1421,8 @@ extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8];
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//
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// check Sta pointer valid or not
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//
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#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
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#define IS_STA_VALID(pSta) (pSta && pSta->expire_to)
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#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
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#define IS_STA_VALID(pSta) (pSta && pSta->bUsed)
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#else
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#define IS_STA_VALID(pSta) (pSta)
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#endif
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// 20100514 Joseph: Add definition for antenna switching test after link.
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// This indicates two different the steps.
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// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air.
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@ -1622,115 +1431,43 @@ extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8];
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#define SWAW_STEP_PEAK 0
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#define SWAW_STEP_DETERMINE 1
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void ODM_Write_DIG(IN PDM_ODM_T pDM_Odm, IN u1Byte CurrentIGI);
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void ODM_Write_CCK_CCA_Thres(IN PDM_ODM_T pDM_Odm, IN u1Byte CurCCK_CCAThres);
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void ODM_Write_DIG(PDM_ODM_T pDM_Odm, u1Byte CurrentIGI);
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void ODM_Write_CCK_CCA_Thres(PDM_ODM_T pDM_Odm, u1Byte CurCCK_CCAThres);
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void
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ODM_SetAntenna(
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IN PDM_ODM_T pDM_Odm,
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IN u1Byte Antenna);
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PDM_ODM_T pDM_Odm,
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u1Byte Antenna);
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#define dm_RF_Saving ODM_RF_Saving
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void ODM_RF_Saving( IN PDM_ODM_T pDM_Odm,
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IN u1Byte bForceInNormal );
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void ODM_RF_Saving( PDM_ODM_T pDM_Odm,
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u1Byte bForceInNormal );
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#define SwAntDivRestAfterLink ODM_SwAntDivRestAfterLink
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void ODM_SwAntDivRestAfterLink( IN PDM_ODM_T pDM_Odm);
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void ODM_SwAntDivRestAfterLink( PDM_ODM_T pDM_Odm);
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#define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck
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void
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ODM_TXPowerTrackingCheck(
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IN PDM_ODM_T pDM_Odm
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PDM_ODM_T pDM_Odm
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);
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BOOLEAN
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ODM_RAStateCheck(
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IN PDM_ODM_T pDM_Odm,
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IN s4Byte RSSI,
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IN BOOLEAN bForceUpdate,
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PDM_ODM_T pDM_Odm,
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s4Byte RSSI,
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BOOLEAN bForceUpdate,
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OUT pu1Byte pRATRState
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);
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#if(DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_AP|ODM_ADSL))
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//============================================================
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// function prototype
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//============================================================
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//#define DM_ChangeDynamicInitGainThresh ODM_ChangeDynamicInitGainThresh
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//void ODM_ChangeDynamicInitGainThresh(IN struct adapter * pAdapter,
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// IN INT32 DM_Type,
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// IN INT32 DM_Value);
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void
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ODM_ChangeDynamicInitGainThresh(
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IN PDM_ODM_T pDM_Odm,
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IN u4Byte DM_Type,
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IN u4Byte DM_Value
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);
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BOOLEAN
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ODM_CheckPowerStatus(
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IN struct adapter * Adapter
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);
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#if (DM_ODM_SUPPORT_TYPE != ODM_ADSL)
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void
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ODM_RateAdaptiveStateApInit(
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IN struct adapter * Adapter ,
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IN PRT_WLAN_STA pEntry
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);
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#endif
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#define AP_InitRateAdaptiveState ODM_RateAdaptiveStateApInit
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#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
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#ifdef WIFI_WMM
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void
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ODM_IotEdcaSwitch(
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IN PDM_ODM_T pDM_Odm,
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IN unsigned char enable
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);
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#endif
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BOOLEAN
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ODM_ChooseIotMainSTA(
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IN PDM_ODM_T pDM_Odm,
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IN PSTA_INFO_T pstat
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);
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#endif
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#if(DM_ODM_SUPPORT_TYPE==ODM_AP)
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#ifdef HW_ANT_SWITCH
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u1Byte
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ODM_Diversity_AntennaSelect(
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IN PDM_ODM_T pDM_Odm,
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IN u1Byte *data
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);
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#endif
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#endif
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#define SwAntDivResetBeforeLink ODM_SwAntDivResetBeforeLink
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void ODM_SwAntDivResetBeforeLink(IN PDM_ODM_T pDM_Odm);
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//#define SwAntDivCheckBeforeLink8192C ODM_SwAntDivCheckBeforeLink8192C
|
||||
#define SwAntDivCheckBeforeLink ODM_SwAntDivCheckBeforeLink8192C
|
||||
BOOLEAN
|
||||
ODM_SwAntDivCheckBeforeLink8192C(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#define dm_SWAW_RSSI_Check ODM_SwAntDivChkPerPktRssi
|
||||
void ODM_SwAntDivChkPerPktRssi(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN u1Byte StationID,
|
||||
IN PODM_PHY_INFO_T pPhyInfo
|
||||
PDM_ODM_T pDM_Odm,
|
||||
u1Byte StationID,
|
||||
PODM_PHY_INFO_T pPhyInfo
|
||||
);
|
||||
|
||||
#if((DM_ODM_SUPPORT_TYPE==ODM_MP)||(DM_ODM_SUPPORT_TYPE==ODM_CE))
|
||||
|
||||
u4Byte ConvertTo_dB(u4Byte Value);
|
||||
|
||||
u4Byte
|
||||
|
@ -1739,266 +1476,93 @@ GetPSDData(
|
|||
unsigned int point,
|
||||
u1Byte initial_gain_psd);
|
||||
|
||||
#endif
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
|
||||
void
|
||||
odm_DIGbyRSSI_LPS(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
u4Byte ODM_Get_Rate_Bitmap(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN u4Byte macid,
|
||||
IN u4Byte ra_mask,
|
||||
IN u1Byte rssi_level);
|
||||
#endif
|
||||
PDM_ODM_T pDM_Odm,
|
||||
u4Byte macid,
|
||||
u4Byte ra_mask,
|
||||
u1Byte rssi_level);
|
||||
|
||||
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_MP))
|
||||
#define dm_PSDMonitorCallback odm_PSDMonitorCallback
|
||||
void odm_PSDMonitorCallback(PRT_TIMER pTimer);
|
||||
|
||||
void
|
||||
odm_PSDMonitorWorkItemCallback(
|
||||
IN void * pContext
|
||||
);
|
||||
|
||||
|
||||
void
|
||||
PatchDCTone(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
pu4Byte PSD_report,
|
||||
u1Byte initial_gain_psd
|
||||
);
|
||||
void
|
||||
ODM_PSDMonitor(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
void odm_PSD_Monitor(PDM_ODM_T pDM_Odm);
|
||||
void odm_PSDMonitorInit(PDM_ODM_T pDM_Odm);
|
||||
|
||||
void
|
||||
ODM_PSDDbgControl(
|
||||
IN struct adapter * Adapter,
|
||||
IN u4Byte mode,
|
||||
IN u4Byte btRssi
|
||||
);
|
||||
|
||||
#endif // DM_ODM_SUPPORT_TYPE
|
||||
|
||||
|
||||
|
||||
void ODM_DMInit( IN PDM_ODM_T pDM_Odm);
|
||||
void ODM_DMInit(PDM_ODM_T pDM_Odm);
|
||||
|
||||
void
|
||||
ODM_DMWatchdog(
|
||||
IN PDM_ODM_T pDM_Odm // For common use in the future
|
||||
PDM_ODM_T pDM_Odm // For common use in the future
|
||||
);
|
||||
|
||||
void
|
||||
ODM_CmnInfoInit(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN ODM_CMNINFO_E CmnInfo,
|
||||
IN u4Byte Value
|
||||
PDM_ODM_T pDM_Odm,
|
||||
ODM_CMNINFO_E CmnInfo,
|
||||
u4Byte Value
|
||||
);
|
||||
|
||||
void
|
||||
ODM_CmnInfoHook(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN ODM_CMNINFO_E CmnInfo,
|
||||
IN void * pValue
|
||||
PDM_ODM_T pDM_Odm,
|
||||
ODM_CMNINFO_E CmnInfo,
|
||||
void * pValue
|
||||
);
|
||||
|
||||
void
|
||||
ODM_CmnInfoPtrArrayHook(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN ODM_CMNINFO_E CmnInfo,
|
||||
IN u2Byte Index,
|
||||
IN void * pValue
|
||||
PDM_ODM_T pDM_Odm,
|
||||
ODM_CMNINFO_E CmnInfo,
|
||||
u2Byte Index,
|
||||
void * pValue
|
||||
);
|
||||
|
||||
void
|
||||
ODM_CmnInfoUpdate(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN u4Byte CmnInfo,
|
||||
IN u8Byte Value
|
||||
PDM_ODM_T pDM_Odm,
|
||||
u4Byte CmnInfo,
|
||||
u8Byte Value
|
||||
);
|
||||
|
||||
void
|
||||
ODM_InitAllTimers(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
void
|
||||
ODM_CancelAllTimers(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
void
|
||||
ODM_ReleaseAllTimers(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
void
|
||||
ODM_ResetIQKResult(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
|
||||
void ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm );
|
||||
void ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm );
|
||||
|
||||
void odm_PathDivChkAntSwitch(PDM_ODM_T pDM_Odm);
|
||||
void ODM_PathDivRestAfterLink(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
|
||||
//===========================================//
|
||||
// Neil Chen----2011--06--15--
|
||||
|
||||
//3 Path Diversity
|
||||
//===========================================================
|
||||
|
||||
#define TP_MODE 0
|
||||
#define RSSI_MODE 1
|
||||
#define TRAFFIC_LOW 0
|
||||
#define TRAFFIC_HIGH 1
|
||||
|
||||
//#define PATHDIV_ENABLE 1
|
||||
|
||||
//void odm_PathDivChkAntSwitch(struct adapter * Adapter,u1Byte Step);
|
||||
void ODM_PathDivRestAfterLink(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
#define dm_PathDiv_RSSI_Check ODM_PathDivChkPerPktRssi
|
||||
void ODM_PathDivChkPerPktRssi(struct adapter * Adapter,
|
||||
BOOLEAN bIsDefPort,
|
||||
BOOLEAN bMatchBSSID,
|
||||
PRT_WLAN_STA pEntry,
|
||||
PRT_RFD pRfd );
|
||||
|
||||
u8Byte
|
||||
PlatformDivision64(
|
||||
IN u8Byte x,
|
||||
IN u8Byte y
|
||||
);
|
||||
|
||||
|
||||
// 20100514 Joseph: Add definition for antenna switching test after link.
|
||||
// This indicates two different the steps.
|
||||
// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air.
|
||||
// In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK
|
||||
// with original RSSI to determine if it is necessary to switch antenna.
|
||||
#define SWAW_STEP_PEAK 0
|
||||
#define SWAW_STEP_DETERMINE 1
|
||||
|
||||
//====================================================
|
||||
//3 PathDiV End
|
||||
//====================================================
|
||||
|
||||
#define PathDivCheckBeforeLink8192C ODM_PathDiversityBeforeLink92C
|
||||
BOOLEAN
|
||||
ODM_PathDiversityBeforeLink92C(
|
||||
//IN struct adapter * Adapter
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
#define DM_ChangeDynamicInitGainThresh ODM_ChangeDynamicInitGainThresh
|
||||
//void ODM_ChangeDynamicInitGainThresh(IN struct adapter * pAdapter,
|
||||
// IN INT32 DM_Type,
|
||||
// IN INT32 DM_Value);
|
||||
//
|
||||
|
||||
|
||||
void
|
||||
ODM_CCKPathDiversityChkPerPktRssi(
|
||||
struct adapter * Adapter,
|
||||
BOOLEAN bIsDefPort,
|
||||
BOOLEAN bMatchBSSID,
|
||||
PRT_WLAN_STA pEntry,
|
||||
PRT_RFD pRfd,
|
||||
pu1Byte pDesc
|
||||
);
|
||||
|
||||
|
||||
typedef enum tag_DIG_Connect_Definition
|
||||
{
|
||||
DIG_STA_DISCONNECT = 0,
|
||||
DIG_STA_CONNECT = 1,
|
||||
DIG_STA_BEFORE_CONNECT = 2,
|
||||
DIG_MultiSTA_DISCONNECT = 3,
|
||||
DIG_MultiSTA_CONNECT = 4,
|
||||
DIG_CONNECT_MAX
|
||||
}DM_DIG_CONNECT_E;
|
||||
|
||||
|
||||
void
|
||||
ODM_FillTXPathInTXDESC(
|
||||
IN struct adapter * Adapter,
|
||||
IN PRT_TCB pTcb,
|
||||
IN pu1Byte pDesc
|
||||
);
|
||||
|
||||
|
||||
#define dm_SWAW_RSSI_Check ODM_SwAntDivChkPerPktRssi
|
||||
|
||||
//
|
||||
// 2012/01/12 MH Check afapter status. Temp fix BSOD.
|
||||
//
|
||||
#define HAL_ADAPTER_STS_CHK(pDM_Odm)\
|
||||
if (pDM_Odm->Adapter == NULL)\
|
||||
{\
|
||||
return;\
|
||||
}\
|
||||
|
||||
|
||||
//
|
||||
// For new definition in MP temporarily fro power tracking,
|
||||
//
|
||||
#define odm_TXPowerTrackingDirectCall(_Adapter) \
|
||||
IS_HARDWARE_TYPE_8192D(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_92D(_Adapter) : \
|
||||
IS_HARDWARE_TYPE_8192C(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_92C(_Adapter) : \
|
||||
IS_HARDWARE_TYPE_8723A(_Adapter) ? odm_TXPowerTrackingCallback_ThermalMeter_8723A(_Adapter) :\
|
||||
odm_TXPowerTrackingCallback_ThermalMeter_8188E(_Adapter)
|
||||
|
||||
void
|
||||
ODM_SetTxAntByTxInfo_88C_92D(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN pu1Byte pDesc,
|
||||
IN u1Byte macId
|
||||
);
|
||||
#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_MP)
|
||||
void
|
||||
ODM_AntselStatistics_88C(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN u1Byte MacId,
|
||||
IN u4Byte PWDBAll,
|
||||
IN BOOLEAN isCCKrate
|
||||
PDM_ODM_T pDM_Odm,
|
||||
u1Byte MacId,
|
||||
u4Byte PWDBAll,
|
||||
BOOLEAN isCCKrate
|
||||
);
|
||||
|
||||
#if( DM_ODM_SUPPORT_TYPE & (ODM_MP |ODM_CE))
|
||||
|
||||
void
|
||||
ODM_SingleDualAntennaDefaultSetting(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
ODM_SingleDualAntennaDetection(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN u1Byte mode
|
||||
PDM_ODM_T pDM_Odm,
|
||||
u1Byte mode
|
||||
);
|
||||
|
||||
#endif // #if((DM_ODM_SUPPORT_TYPE==ODM_MP)||(DM_ODM_SUPPORT_TYPE==ODM_CE))
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
void odm_dtc(PDM_ODM_T pDM_Odm);
|
||||
#endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
@ -60,7 +60,6 @@ odm_QueryRxPwrPercentage(
|
|||
|
||||
}
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE != ODM_MP)
|
||||
//
|
||||
// 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer.
|
||||
// IF other SW team do not support the feature, remove this section.??
|
||||
|
@ -298,7 +297,6 @@ odm_SignalScaleMapping(
|
|||
}
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
//pMgntInfo->CustomerID == RT_CID_819x_Lenovo
|
||||
static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo(
|
||||
|
@ -1041,8 +1039,6 @@ ODM_MacStatusQuery(
|
|||
|
||||
}
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE|ODM_AP))
|
||||
|
||||
HAL_STATUS
|
||||
ODM_ConfigRFWithHeaderFile(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
|
@ -1163,6 +1159,3 @@ ODM_ConfigMACWithHeaderFile(
|
|||
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
#endif // end of (#if DM_ODM_SUPPORT_TYPE)
|
||||
|
|
|
@ -150,46 +150,43 @@ typedef struct _Phy_Status_Rpt_8195
|
|||
|
||||
void
|
||||
odm_Init_RSSIForDM(
|
||||
IN OUT PDM_ODM_T pDM_Odm
|
||||
PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
void
|
||||
ODM_PhyStatusQuery(
|
||||
IN OUT PDM_ODM_T pDM_Odm,
|
||||
OUT PODM_PHY_INFO_T pPhyInfo,
|
||||
IN pu1Byte pPhyStatus,
|
||||
IN PODM_PACKET_INFO_T pPktinfo
|
||||
PDM_ODM_T pDM_Odm,
|
||||
PODM_PHY_INFO_T pPhyInfo,
|
||||
pu1Byte pPhyStatus,
|
||||
PODM_PACKET_INFO_T pPktinfo
|
||||
);
|
||||
|
||||
void
|
||||
ODM_MacStatusQuery(
|
||||
IN OUT PDM_ODM_T pDM_Odm,
|
||||
IN pu1Byte pMacStatus,
|
||||
IN u1Byte MacID,
|
||||
IN BOOLEAN bPacketMatchBSSID,
|
||||
IN BOOLEAN bPacketToSelf,
|
||||
IN BOOLEAN bPacketBeacon
|
||||
PDM_ODM_T pDM_Odm,
|
||||
pu1Byte pMacStatus,
|
||||
u1Byte MacID,
|
||||
BOOLEAN bPacketMatchBSSID,
|
||||
BOOLEAN bPacketToSelf,
|
||||
BOOLEAN bPacketBeacon
|
||||
);
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE|ODM_AP))
|
||||
HAL_STATUS
|
||||
ODM_ConfigRFWithHeaderFile(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN ODM_RF_RADIO_PATH_E Content,
|
||||
IN ODM_RF_RADIO_PATH_E eRFPath
|
||||
PDM_ODM_T pDM_Odm,
|
||||
ODM_RF_RADIO_PATH_E Content,
|
||||
ODM_RF_RADIO_PATH_E eRFPath
|
||||
);
|
||||
|
||||
HAL_STATUS
|
||||
ODM_ConfigBBWithHeaderFile(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN ODM_BB_Config_Type ConfigType
|
||||
PDM_ODM_T pDM_Odm,
|
||||
ODM_BB_Config_Type ConfigType
|
||||
);
|
||||
|
||||
HAL_STATUS
|
||||
ODM_ConfigMACWithHeaderFile(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
@ -337,7 +337,6 @@ odm_UpdateTxAnt_88E(IN PDM_ODM_T pDM_Odm, IN u1Byte Ant, IN u4Byte MacId)
|
|||
pDM_FatTable->antsel_c[MacId] , pDM_FatTable->antsel_b[MacId] , pDM_FatTable->antsel_a[MacId] ));
|
||||
}
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
|
||||
void
|
||||
ODM_SetTxAntByTxInfo_88E(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
|
@ -356,14 +355,6 @@ ODM_SetTxAntByTxInfo_88E(
|
|||
// macId, pDM_FatTable->antsel_c[macId], pDM_FatTable->antsel_b[macId], pDM_FatTable->antsel_a[macId]));
|
||||
}
|
||||
}
|
||||
#else// (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
||||
void
|
||||
ODM_SetTxAntByTxInfo_88E(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
void
|
||||
ODM_AntselStatistics_88E(
|
||||
|
@ -474,185 +465,6 @@ odm_HWAntDiv(
|
|||
pDM_DigTable->RSSI_max = MaxRSSI;
|
||||
}
|
||||
|
||||
|
||||
#if (!(DM_ODM_SUPPORT_TYPE == ODM_CE))
|
||||
void
|
||||
odm_SetNextMACAddrTarget(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
|
||||
PSTA_INFO_T pEntry;
|
||||
//u1Byte Bssid[6];
|
||||
u4Byte value32, i;
|
||||
|
||||
//
|
||||
//2012.03.26 LukeLee: The MAC address is changed according to MACID in turn
|
||||
//
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SetNextMACAddrTarget() ==>\n"));
|
||||
if(pDM_Odm->bLinked)
|
||||
{
|
||||
for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
|
||||
{
|
||||
if((pDM_FatTable->TrainIdx+1) == ODM_ASSOCIATE_ENTRY_NUM)
|
||||
pDM_FatTable->TrainIdx = 0;
|
||||
else
|
||||
pDM_FatTable->TrainIdx++;
|
||||
|
||||
pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx];
|
||||
if(IS_STA_VALID(pEntry))
|
||||
{
|
||||
//Match MAC ADDR
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
value32 = (pEntry->hwaddr[5]<<8)|pEntry->hwaddr[4];
|
||||
#else
|
||||
value32 = (pEntry->MacAddr[5]<<8)|pEntry->MacAddr[4];
|
||||
#endif
|
||||
ODM_SetMACReg(pDM_Odm, 0x7b4, 0xFFFF, value32);
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
value32 = (pEntry->hwaddr[3]<<24)|(pEntry->hwaddr[2]<<16) |(pEntry->hwaddr[1]<<8) |pEntry->hwaddr[0];
|
||||
#else
|
||||
value32 = (pEntry->MacAddr[3]<<24)|(pEntry->MacAddr[2]<<16) |(pEntry->MacAddr[1]<<8) |pEntry->MacAddr[0];
|
||||
#endif
|
||||
ODM_SetMACReg(pDM_Odm, 0x7b0, bMaskDWord, value32);
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_FatTable->TrainIdx=%d\n",pDM_FatTable->TrainIdx));
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n",
|
||||
pEntry->hwaddr[5],pEntry->hwaddr[4],pEntry->hwaddr[3],pEntry->hwaddr[2],pEntry->hwaddr[1],pEntry->hwaddr[0]));
|
||||
#else
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Training MAC Addr = %x:%x:%x:%x:%x:%x\n",
|
||||
pEntry->MacAddr[5],pEntry->MacAddr[4],pEntry->MacAddr[3],pEntry->MacAddr[2],pEntry->MacAddr[1],pEntry->MacAddr[0]));
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
odm_FastAntTraining(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
u4Byte i, MaxRSSI=0;
|
||||
u1Byte TargetAnt=2;
|
||||
pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
|
||||
BOOLEAN bPktFilterMacth = FALSE;
|
||||
PSTA_INFO_T pEntry;
|
||||
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("==>odm_FastAntTraining()\n"));
|
||||
|
||||
//1 TRAINING STATE
|
||||
if(pDM_FatTable->FAT_State == FAT_TRAINING_STATE)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Enter FAT_TRAINING_STATE\n"));
|
||||
//2 Caculate RSSI per Antenna
|
||||
for (i=0; i<7; i++)
|
||||
{
|
||||
if(pDM_FatTable->antRSSIcnt[i] == 0)
|
||||
pDM_FatTable->antAveRSSI[i] = 0;
|
||||
else
|
||||
{
|
||||
pDM_FatTable->antAveRSSI[i] = pDM_FatTable->antSumRSSI[i] /pDM_FatTable->antRSSIcnt[i];
|
||||
bPktFilterMacth = TRUE;
|
||||
}
|
||||
if(pDM_FatTable->antAveRSSI[i] > MaxRSSI)
|
||||
{
|
||||
MaxRSSI = pDM_FatTable->antAveRSSI[i];
|
||||
TargetAnt = (u1Byte) i;
|
||||
}
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_FatTable->antAveRSSI[%d] = %d, pDM_FatTable->antRSSIcnt[%d] = %d\n",
|
||||
i, pDM_FatTable->antAveRSSI[i], i, pDM_FatTable->antRSSIcnt[i]));
|
||||
}
|
||||
|
||||
//2 Select TRX Antenna
|
||||
if(bPktFilterMacth == FALSE)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("None Packet is matched\n"));
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 0); //RegE08[16]=1'b0 //disable fast training
|
||||
ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv
|
||||
}
|
||||
else
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TargetAnt=%d, MaxRSSI=%d\n",TargetAnt,MaxRSSI));
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 0); //RegE08[16]=1'b0 //disable fast training
|
||||
//ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv
|
||||
ODM_SetBBReg(pDM_Odm, 0x864 , BIT8|BIT7|BIT6, TargetAnt); //Default RX is Omni, Optional RX is the best decision by FAT
|
||||
//ODM_SetBBReg(pDM_Odm, 0x860 , BIT14|BIT13|BIT12, TargetAnt); //Default TX
|
||||
ODM_SetBBReg(pDM_Odm, 0x80c , BIT21, 1); //Reg80c[21]=1'b1 //from TX Info
|
||||
|
||||
pDM_FatTable->antsel_a[pDM_FatTable->TrainIdx] = TargetAnt&BIT0;
|
||||
pDM_FatTable->antsel_b[pDM_FatTable->TrainIdx] = (TargetAnt&BIT1)>>1;
|
||||
pDM_FatTable->antsel_c[pDM_FatTable->TrainIdx] = (TargetAnt&BIT2)>>2;
|
||||
|
||||
if(TargetAnt == 0)
|
||||
ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv
|
||||
}
|
||||
|
||||
//2 Reset Counter
|
||||
for(i=0; i<7; i++)
|
||||
{
|
||||
pDM_FatTable->antSumRSSI[i] = 0;
|
||||
pDM_FatTable->antRSSIcnt[i] = 0;
|
||||
}
|
||||
|
||||
pDM_FatTable->FAT_State = FAT_NORMAL_STATE;
|
||||
return;
|
||||
}
|
||||
|
||||
//1 NORMAL STATE
|
||||
if(pDM_FatTable->FAT_State == FAT_NORMAL_STATE)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Enter FAT_NORMAL_STATE\n"));
|
||||
|
||||
odm_SetNextMACAddrTarget(pDM_Odm);
|
||||
|
||||
//2 Prepare Training
|
||||
pDM_FatTable->FAT_State = FAT_TRAINING_STATE;
|
||||
ODM_SetBBReg(pDM_Odm, 0xe08 , BIT16, 1); //RegE08[16]=1'b1 //enable fast training
|
||||
ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 1); //RegC50[7]=1'b1 //enable HW AntDiv
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Start FAT_TRAINING_STATE\n"));
|
||||
ODM_SetTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, 500 ); //ms
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void
|
||||
odm_FastAntTrainingCallback(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
struct adapter *padapter = pDM_Odm->Adapter;
|
||||
if(padapter->net_closed == true)
|
||||
return;
|
||||
//if(*pDM_Odm->pbNet_closed == TRUE)
|
||||
// return;
|
||||
#endif
|
||||
|
||||
#if USE_WORKITEM
|
||||
ODM_ScheduleWorkItem(&pDM_Odm->FastAntTrainingWorkitem);
|
||||
#else
|
||||
odm_FastAntTraining(pDM_Odm);
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
odm_FastAntTrainingWorkItemCallback(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
odm_FastAntTraining(pDM_Odm);
|
||||
}
|
||||
#endif
|
||||
|
||||
void
|
||||
ODM_AntennaDiversity_88E(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
|
@ -735,55 +547,10 @@ ODM_AntennaDiversity_88E(
|
|||
|
||||
if((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV))
|
||||
odm_HWAntDiv(pDM_Odm);
|
||||
#if (!(DM_ODM_SUPPORT_TYPE == ODM_CE))
|
||||
else if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)
|
||||
odm_FastAntTraining(pDM_Odm);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
|
||||
void
|
||||
odm_FastAntTrainingCallback(
|
||||
PRT_TIMER pTimer
|
||||
)
|
||||
{
|
||||
struct adapter * Adapter = (PADAPTER)pTimer->Adapter;
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
|
||||
//#if DEV_BUS_TYPE==RT_PCI_INTERFACE
|
||||
//#if USE_WORKITEM
|
||||
//PlatformScheduleWorkItem(&pHalData->SwAntennaSwitchWorkitem);
|
||||
//#else
|
||||
odm_FastAntTraining(&pHalData->DM_OutSrc);
|
||||
//#endif
|
||||
//#else
|
||||
//PlatformScheduleWorkItem(&pHalData->SwAntennaSwitchWorkitem);
|
||||
//#endif
|
||||
|
||||
}
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
void odm_FastAntTrainingCallback(void *FunctionContext)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext;
|
||||
struct adapter *padapter = pDM_Odm->Adapter;
|
||||
if(padapter->net_closed == true)
|
||||
return;
|
||||
odm_FastAntTraining(pDM_Odm);
|
||||
}
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
||||
void odm_FastAntTrainingCallback(void *FunctionContext)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext;
|
||||
odm_FastAntTraining(pDM_Odm);
|
||||
}
|
||||
|
||||
#endif
|
||||
*/
|
||||
|
||||
#else //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
|
||||
void
|
||||
ODM_SetTxAntByTxInfo_88E(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
|
@ -792,14 +559,6 @@ ODM_SetTxAntByTxInfo_88E(
|
|||
)
|
||||
{
|
||||
}
|
||||
#else// (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
||||
void
|
||||
ODM_SetTxAntByTxInfo_88E(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
#endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
|
||||
//3============================================================
|
||||
//3 Dynamic Primary CCA
|
||||
|
@ -834,16 +593,9 @@ odm_DynamicPrimaryCCA(
|
|||
{
|
||||
struct adapter *Adapter = pDM_Odm->Adapter; // for NIC
|
||||
prtl8192cd_priv priv = pDM_Odm->priv; // for AP
|
||||
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP))
|
||||
PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
|
||||
PRT_WLAN_STA pEntry;
|
||||
#endif
|
||||
|
||||
PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
|
||||
pPri_CCA_T PrimaryCCA = &(pDM_Odm->DM_PriCCA);
|
||||
|
||||
BOOLEAN Is40MHz;
|
||||
BOOLEAN Client_40MHz = FALSE, Client_tmp = FALSE; // connected client BW
|
||||
BOOLEAN bConnected = FALSE; // connected or not
|
||||
|
@ -857,345 +609,7 @@ odm_DynamicPrimaryCCA(
|
|||
u1Byte SecCHOffset;
|
||||
u1Byte i;
|
||||
|
||||
#if((DM_ODM_SUPPORT_TYPE==ODM_ADSL) ||( DM_ODM_SUPPORT_TYPE==ODM_CE))
|
||||
return;
|
||||
#endif
|
||||
|
||||
if(pDM_Odm->SupportICType != ODM_RTL8188E)
|
||||
return;
|
||||
|
||||
Is40MHz = *(pDM_Odm->pBandWidth);
|
||||
SecCHOffset = *(pDM_Odm->pSecChOffset);
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Second CH Offset = %d\n", SecCHOffset));
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
|
||||
if(Is40MHz==1)
|
||||
SecCHOffset = SecCHOffset%2+1; // NIC's definition is reverse to AP 1:secondary below, 2: secondary above
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Second CH Offset = %d\n", SecCHOffset));
|
||||
//3 Check Current WLAN Traffic
|
||||
curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - lastTxOkCnt;
|
||||
curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - lastRxOkCnt;
|
||||
lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast;
|
||||
lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast;
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
||||
//3 Check Current WLAN Traffic
|
||||
curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast)-lastTxOkCnt;
|
||||
curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast)-lastRxOkCnt;
|
||||
lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast);
|
||||
lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast);
|
||||
#endif
|
||||
|
||||
//==================Debug Message====================
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("TP = %llu\n", curTxOkCnt+curRxOkCnt));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Is40MHz = %d\n", Is40MHz));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("BW_LSC = %d\n", FalseAlmCnt->Cnt_BW_LSC));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("BW_USC = %d\n", FalseAlmCnt->Cnt_BW_USC));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCA OFDM = %d\n", FalseAlmCnt->Cnt_OFDM_CCA));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCA CCK = %d\n", FalseAlmCnt->Cnt_CCK_CCA));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("OFDM FA = %d\n", FalseAlmCnt->Cnt_Ofdm_fail));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("CCK FA = %d\n", FalseAlmCnt->Cnt_Cck_fail));
|
||||
//================================================
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
|
||||
if (ACTING_AS_AP(Adapter)) // primary cca process only do at AP mode
|
||||
#endif
|
||||
{
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("ACTING as AP mode=%d\n", ACTING_AS_AP(Adapter)));
|
||||
//3 To get entry's connection and BW infomation status.
|
||||
for(i=0;i<ASSOCIATE_ENTRY_NUM;i++)
|
||||
{
|
||||
if(IsAPModeExist(Adapter)&&GetFirstExtAdapter(Adapter)!=NULL)
|
||||
pEntry=AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i);
|
||||
else
|
||||
pEntry=AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i);
|
||||
if(pEntry!=NULL)
|
||||
{
|
||||
Client_tmp = pEntry->HTInfo.bBw40MHz; // client BW
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Client_BW=%d\n", Client_tmp));
|
||||
if(Client_tmp>Client_40MHz)
|
||||
Client_40MHz = Client_tmp; // 40M/20M coexist => 40M priority is High
|
||||
|
||||
if(pEntry->bAssociated)
|
||||
{
|
||||
bConnected=TRUE; // client is connected or not
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
||||
//3 To get entry's connection and BW infomation status.
|
||||
|
||||
PSTA_INFO_T pstat;
|
||||
|
||||
for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
|
||||
{
|
||||
pstat = pDM_Odm->pODM_StaInfo[i];
|
||||
if(IS_STA_VALID(pstat) )
|
||||
{
|
||||
Client_tmp = pstat->tx_bw;
|
||||
if(Client_tmp>Client_40MHz)
|
||||
Client_40MHz = Client_tmp; // 40M/20M coexist => 40M priority is High
|
||||
|
||||
bConnected = TRUE;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("bConnected=%d\n", bConnected));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Is Client 40MHz=%d\n", Client_40MHz));
|
||||
//1 Monitor whether the interference exists or not
|
||||
if(PrimaryCCA->Monitor_flag == 1)
|
||||
{
|
||||
if(SecCHOffset == 1) // secondary channel is below the primary channel
|
||||
{
|
||||
if((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_LSC > FalseAlmCnt->Cnt_BW_USC+500))
|
||||
{
|
||||
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
|
||||
{
|
||||
PrimaryCCA->intf_type = 1;
|
||||
PrimaryCCA->PriCCA_flag = 1;
|
||||
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2); // USC MF
|
||||
if(PrimaryCCA->DupRTS_flag == 1)
|
||||
PrimaryCCA->DupRTS_flag = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
PrimaryCCA->intf_type = 2;
|
||||
if(PrimaryCCA->DupRTS_flag == 0)
|
||||
PrimaryCCA->DupRTS_flag = 1;
|
||||
}
|
||||
|
||||
}
|
||||
else // interferecne disappear
|
||||
{
|
||||
PrimaryCCA->DupRTS_flag = 0;
|
||||
PrimaryCCA->intf_flag = 0;
|
||||
PrimaryCCA->intf_type = 0;
|
||||
}
|
||||
}
|
||||
else if(SecCHOffset == 2) // secondary channel is above the primary channel
|
||||
{
|
||||
if((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_USC > FalseAlmCnt->Cnt_BW_LSC+500))
|
||||
{
|
||||
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
|
||||
{
|
||||
PrimaryCCA->intf_type = 1;
|
||||
PrimaryCCA->PriCCA_flag = 1;
|
||||
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1); // LSC MF
|
||||
if(PrimaryCCA->DupRTS_flag == 1)
|
||||
PrimaryCCA->DupRTS_flag = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
PrimaryCCA->intf_type = 2;
|
||||
if(PrimaryCCA->DupRTS_flag == 0)
|
||||
PrimaryCCA->DupRTS_flag = 1;
|
||||
}
|
||||
|
||||
}
|
||||
else // interferecne disappear
|
||||
{
|
||||
PrimaryCCA->DupRTS_flag = 0;
|
||||
PrimaryCCA->intf_flag = 0;
|
||||
PrimaryCCA->intf_type = 0;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
PrimaryCCA->Monitor_flag = 0;
|
||||
}
|
||||
|
||||
//1 Dynamic Primary CCA Main Function
|
||||
if(PrimaryCCA->Monitor_flag == 0)
|
||||
{
|
||||
if(Is40MHz) // if RFBW==40M mode which require to process primary cca
|
||||
{
|
||||
//2 STA is NOT Connected
|
||||
if(!bConnected)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA NOT Connected!!!!\n"));
|
||||
|
||||
if(PrimaryCCA->PriCCA_flag == 1) // reset primary cca when STA is disconnected
|
||||
{
|
||||
PrimaryCCA->PriCCA_flag = 0;
|
||||
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 0);
|
||||
}
|
||||
if(PrimaryCCA->DupRTS_flag == 1) // reset Duplicate RTS when STA is disconnected
|
||||
PrimaryCCA->DupRTS_flag = 0;
|
||||
|
||||
if(SecCHOffset == 1) // secondary channel is below the primary channel
|
||||
{
|
||||
if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9))
|
||||
{
|
||||
PrimaryCCA->intf_flag = 1; // secondary channel interference is detected!!!
|
||||
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
|
||||
PrimaryCCA->intf_type = 1; // interference is shift
|
||||
else
|
||||
PrimaryCCA->intf_type = 2; // interference is in-band
|
||||
}
|
||||
else
|
||||
{
|
||||
PrimaryCCA->intf_flag = 0;
|
||||
PrimaryCCA->intf_type = 0;
|
||||
}
|
||||
}
|
||||
else if(SecCHOffset == 2) // secondary channel is above the primary channel
|
||||
{
|
||||
if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9))
|
||||
{
|
||||
PrimaryCCA->intf_flag = 1; // secondary channel interference is detected!!!
|
||||
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
|
||||
PrimaryCCA->intf_type = 1; // interference is shift
|
||||
else
|
||||
PrimaryCCA->intf_type = 2; // interference is in-band
|
||||
}
|
||||
else
|
||||
{
|
||||
PrimaryCCA->intf_flag = 0;
|
||||
PrimaryCCA->intf_type = 0;
|
||||
}
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("PrimaryCCA=%d\n",PrimaryCCA->PriCCA_flag));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Intf_Type=%d\n", PrimaryCCA->intf_type));
|
||||
}
|
||||
//2 STA is Connected
|
||||
else
|
||||
{
|
||||
if(Client_40MHz == 0) //3 // client BW = 20MHz
|
||||
{
|
||||
if(PrimaryCCA->PriCCA_flag == 0)
|
||||
{
|
||||
PrimaryCCA->PriCCA_flag = 1;
|
||||
if(SecCHOffset==1)
|
||||
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2);
|
||||
else if(SecCHOffset==2)
|
||||
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1);
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA Connected 20M!!! PrimaryCCA=%d\n", PrimaryCCA->PriCCA_flag));
|
||||
}
|
||||
else //3 // client BW = 40MHz
|
||||
{
|
||||
if(PrimaryCCA->intf_flag == 1) // interference is detected!!
|
||||
{
|
||||
if(PrimaryCCA->intf_type == 1)
|
||||
{
|
||||
if(PrimaryCCA->PriCCA_flag!=1)
|
||||
{
|
||||
PrimaryCCA->PriCCA_flag = 1;
|
||||
if(SecCHOffset==1)
|
||||
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2);
|
||||
else if(SecCHOffset==2)
|
||||
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1);
|
||||
}
|
||||
}
|
||||
else if(PrimaryCCA->intf_type == 2)
|
||||
{
|
||||
if(PrimaryCCA->DupRTS_flag!=1)
|
||||
PrimaryCCA->DupRTS_flag = 1;
|
||||
}
|
||||
}
|
||||
else // if intf_flag==0
|
||||
{
|
||||
if((curTxOkCnt+curRxOkCnt)<10000) //idle mode or TP traffic is very low
|
||||
{
|
||||
if(SecCHOffset == 1)
|
||||
{
|
||||
if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9))
|
||||
{
|
||||
PrimaryCCA->intf_flag = 1;
|
||||
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
|
||||
PrimaryCCA->intf_type = 1; // interference is shift
|
||||
else
|
||||
PrimaryCCA->intf_type = 2; // interference is in-band
|
||||
}
|
||||
}
|
||||
else if(SecCHOffset == 2)
|
||||
{
|
||||
if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9))
|
||||
{
|
||||
PrimaryCCA->intf_flag = 1;
|
||||
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
|
||||
PrimaryCCA->intf_type = 1; // interference is shift
|
||||
else
|
||||
PrimaryCCA->intf_type = 2; // interference is in-band
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
else // TP Traffic is High
|
||||
{
|
||||
if(SecCHOffset == 1)
|
||||
{
|
||||
if(FalseAlmCnt->Cnt_BW_LSC > (FalseAlmCnt->Cnt_BW_USC+500))
|
||||
{
|
||||
if(Delay == 0) // add delay to avoid interference occurring abruptly, jump one time
|
||||
{
|
||||
PrimaryCCA->intf_flag = 1;
|
||||
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
|
||||
PrimaryCCA->intf_type = 1; // interference is shift
|
||||
else
|
||||
PrimaryCCA->intf_type = 2; // interference is in-band
|
||||
Delay = 1;
|
||||
}
|
||||
else
|
||||
Delay = 0;
|
||||
}
|
||||
}
|
||||
else if(SecCHOffset == 2)
|
||||
{
|
||||
if(FalseAlmCnt->Cnt_BW_USC > (FalseAlmCnt->Cnt_BW_LSC+500))
|
||||
{
|
||||
if(Delay == 0) // add delay to avoid interference occurring abruptly
|
||||
{
|
||||
PrimaryCCA->intf_flag = 1;
|
||||
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
|
||||
PrimaryCCA->intf_type = 1; // interference is shift
|
||||
else
|
||||
PrimaryCCA->intf_type = 2; // interference is in-band
|
||||
Delay = 1;
|
||||
}
|
||||
else
|
||||
Delay = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Primary CCA=%d\n", PrimaryCCA->PriCCA_flag));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Duplicate RTS=%d\n", PrimaryCCA->DupRTS_flag));
|
||||
}
|
||||
|
||||
}// end of connected
|
||||
}
|
||||
}
|
||||
//1 Dynamic Primary CCA Monitor Counter
|
||||
if((PrimaryCCA->PriCCA_flag == 1)||(PrimaryCCA->DupRTS_flag == 1))
|
||||
{
|
||||
if(Client_40MHz == 0) // client=20M no need to monitor primary cca flag
|
||||
{
|
||||
Client_40MHz_pre = Client_40MHz;
|
||||
return;
|
||||
}
|
||||
Counter++;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Counter=%d\n", Counter));
|
||||
if((Counter == 30)||((Client_40MHz -Client_40MHz_pre)==1)) // Every 60 sec to monitor one time
|
||||
{
|
||||
PrimaryCCA->Monitor_flag = 1; // monitor flag is triggered!!!!!
|
||||
if(PrimaryCCA->PriCCA_flag == 1)
|
||||
{
|
||||
PrimaryCCA->PriCCA_flag = 0;
|
||||
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 0);
|
||||
}
|
||||
Counter = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Client_40MHz_pre = Client_40MHz;
|
||||
}
|
||||
#else //#if (RTL8188E_SUPPORT == 1)
|
||||
void
|
||||
|
|
|
@ -27,83 +27,28 @@
|
|||
#define MAIN_ANT_CGCS_RX 0
|
||||
#define AUX_ANT_CGCS_RX 1
|
||||
|
||||
void
|
||||
ODM_DIG_LowerBound_88E(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
#if ( !(DM_ODM_SUPPORT_TYPE == ODM_CE))
|
||||
void
|
||||
odm_FastAntTrainingInit(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
#endif
|
||||
void ODM_DIG_LowerBound_88E(PDM_ODM_T pDM_Odm);
|
||||
void odm_FastAntTrainingInit(PDM_ODM_T pDM_Odm);
|
||||
|
||||
void
|
||||
ODM_AntennaDiversityInit_88E(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
void ODM_AntennaDiversityInit_88E(PDM_ODM_T pDM_Odm);
|
||||
|
||||
void
|
||||
ODM_AntennaDiversity_88E
|
||||
(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
void ODM_AntennaDiversity_88E(PDM_ODM_T pDM_Odm);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
|
||||
void
|
||||
ODM_SetTxAntByTxInfo_88E(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN pu1Byte pDesc,
|
||||
IN u1Byte macId
|
||||
);
|
||||
#else// (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
||||
void
|
||||
ODM_SetTxAntByTxInfo_88E(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
#endif
|
||||
void ODM_SetTxAntByTxInfo_88E(PDM_ODM_T pDM_Odm, pu1Byte pDesc, u1Byte macId);
|
||||
|
||||
void
|
||||
ODM_UpdateRxIdleAnt_88E(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN u1Byte Ant
|
||||
);
|
||||
void ODM_UpdateRxIdleAnt_88E(PDM_ODM_T pDM_Odm, u1Byte Ant);
|
||||
|
||||
void
|
||||
ODM_AntselStatistics_88E(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN u1Byte antsel_tr_mux,
|
||||
IN u4Byte MacId,
|
||||
IN u1Byte RxPWDBAll
|
||||
);
|
||||
void ODM_AntselStatistics_88E(PDM_ODM_T pDM_Odm, u1Byte antsel_tr_mux, u4Byte MacId, u1Byte RxPWDBAll);
|
||||
|
||||
#if ( !(DM_ODM_SUPPORT_TYPE == ODM_CE))
|
||||
void
|
||||
odm_FastAntTraining(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
void odm_FastAntTraining(PDM_ODM_T pDM_Odm);
|
||||
|
||||
void
|
||||
odm_FastAntTrainingCallback(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
void odm_FastAntTrainingCallback(PDM_ODM_T pDM_Odm);
|
||||
|
||||
void
|
||||
odm_FastAntTrainingWorkItemCallback(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
#endif
|
||||
void
|
||||
odm_PrimaryCCA_Init(
|
||||
IN PDM_ODM_T pDM_Odm);
|
||||
void odm_FastAntTrainingWorkItemCallback(PDM_ODM_T pDM_Odm);
|
||||
void odm_PrimaryCCA_Init(PDM_ODM_T pDM_Odm);
|
||||
|
||||
BOOLEAN
|
||||
ODM_DynamicPrimaryCCA_DupRTS(
|
||||
IN PDM_ODM_T pDM_Odm);
|
||||
BOOLEAN ODM_DynamicPrimaryCCA_DupRTS(PDM_ODM_T pDM_Odm);
|
||||
|
||||
void
|
||||
odm_DynamicPrimaryCCA(
|
||||
IN PDM_ODM_T pDM_Odm);
|
||||
void odm_DynamicPrimaryCCA(PDM_ODM_T pDM_Odm);
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
@ -33,17 +33,8 @@ ODM_Read1Byte(
|
|||
IN u4Byte RegAddr
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
prtl8192cd_priv priv = pDM_Odm->priv;
|
||||
return RTL_R8(RegAddr);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
return rtw_read8(Adapter,RegAddr);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
return PlatformEFIORead1Byte(Adapter, RegAddr);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
@ -53,40 +44,20 @@ ODM_Read2Byte(
|
|||
IN u4Byte RegAddr
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
prtl8192cd_priv priv = pDM_Odm->priv;
|
||||
return RTL_R16(RegAddr);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
return rtw_read16(Adapter,RegAddr);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
return PlatformEFIORead2Byte(Adapter, RegAddr);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
|
||||
u4Byte
|
||||
ODM_Read4Byte(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN u4Byte RegAddr
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
prtl8192cd_priv priv = pDM_Odm->priv;
|
||||
return RTL_R32(RegAddr);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
return rtw_read32(Adapter,RegAddr);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
return PlatformEFIORead4Byte(Adapter, RegAddr);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
ODM_Write1Byte(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
|
@ -94,20 +65,10 @@ ODM_Write1Byte(
|
|||
IN u1Byte Data
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
prtl8192cd_priv priv = pDM_Odm->priv;
|
||||
RTL_W8(RegAddr, Data);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
rtw_write8(Adapter,RegAddr, Data);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
PlatformEFIOWrite1Byte(Adapter, RegAddr, Data);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
ODM_Write2Byte(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
|
@ -115,20 +76,10 @@ ODM_Write2Byte(
|
|||
IN u2Byte Data
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
prtl8192cd_priv priv = pDM_Odm->priv;
|
||||
RTL_W16(RegAddr, Data);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
rtw_write16(Adapter,RegAddr, Data);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
PlatformEFIOWrite2Byte(Adapter, RegAddr, Data);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
ODM_Write4Byte(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
|
@ -136,20 +87,10 @@ ODM_Write4Byte(
|
|||
IN u4Byte Data
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
prtl8192cd_priv priv = pDM_Odm->priv;
|
||||
RTL_W32(RegAddr, Data);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
rtw_write32(Adapter,RegAddr, Data);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
PlatformEFIOWrite4Byte(Adapter, RegAddr, Data);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
ODM_SetMACReg(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
|
@ -158,15 +99,10 @@ ODM_SetMACReg(
|
|||
IN u4Byte Data
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
u4Byte
|
||||
ODM_GetMACReg(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
|
@ -174,15 +110,10 @@ ODM_GetMACReg(
|
|||
IN u4Byte BitMask
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
ODM_SetBBReg(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
|
@ -191,12 +122,8 @@ ODM_SetBBReg(
|
|||
IN u4Byte Data
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
@ -207,15 +134,10 @@ ODM_GetBBReg(
|
|||
IN u4Byte BitMask
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
ODM_SetRFReg(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
|
@ -225,15 +147,10 @@ ODM_SetRFReg(
|
|||
IN u4Byte Data
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
PHY_SetRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, Data);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
u4Byte
|
||||
ODM_GetRFReg(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
|
@ -242,17 +159,10 @@ ODM_GetRFReg(
|
|||
IN u4Byte BitMask
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
return PHY_QueryRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, 1);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
return PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
//
|
||||
// ODM Memory relative API.
|
||||
//
|
||||
|
@ -263,14 +173,7 @@ ODM_AllocateMemory(
|
|||
IN u4Byte length
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
*pPtr = kmalloc(length, GFP_ATOMIC);
|
||||
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
|
||||
*pPtr = rtw_zvmalloc(length);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
PlatformAllocateMemory(Adapter, pPtr, length);
|
||||
#endif
|
||||
}
|
||||
|
||||
// length could be ignored, used to detect memory leakage.
|
||||
|
@ -281,15 +184,9 @@ ODM_FreeMemory(
|
|||
IN u4Byte length
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
kfree(pPtr);
|
||||
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
|
||||
rtw_vmfree(pPtr, length);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
//struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
PlatformFreeMemory(pPtr, length);
|
||||
#endif
|
||||
}
|
||||
|
||||
s4Byte ODM_CompareMemory(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN void * pBuf1,
|
||||
|
@ -297,17 +194,9 @@ s4Byte ODM_CompareMemory(
|
|||
IN u4Byte length
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
return memcmp(pBuf1,pBuf2,length);
|
||||
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
|
||||
return _rtw_memcmp(pBuf1,pBuf2,length);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
return PlatformCompareMemory(pBuf1,pBuf2,length);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
//
|
||||
// ODM MISC relative API.
|
||||
//
|
||||
|
@ -317,29 +206,14 @@ ODM_AcquireSpinLock(
|
|||
IN RT_SPINLOCK_TYPE type
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
|
||||
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
PlatformAcquireSpinLock(Adapter, type);
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
ODM_ReleaseSpinLock(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN RT_SPINLOCK_TYPE type
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
|
||||
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
PlatformReleaseSpinLock(Adapter, type);
|
||||
#endif
|
||||
}
|
||||
|
||||
//
|
||||
|
@ -354,93 +228,43 @@ ODM_InitializeWorkItem(
|
|||
IN const char* szID
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
PlatformInitializeWorkItem(Adapter, pRtWorkItem, RtWorkItemCallback, pContext, szID);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
ODM_StartWorkItem(
|
||||
IN PRT_WORK_ITEM pRtWorkItem
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
PlatformStartWorkItem(pRtWorkItem);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
ODM_StopWorkItem(
|
||||
IN PRT_WORK_ITEM pRtWorkItem
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
PlatformStopWorkItem(pRtWorkItem);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
ODM_FreeWorkItem(
|
||||
IN PRT_WORK_ITEM pRtWorkItem
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
PlatformFreeWorkItem(pRtWorkItem);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
ODM_ScheduleWorkItem(
|
||||
IN PRT_WORK_ITEM pRtWorkItem
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
PlatformScheduleWorkItem(pRtWorkItem);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
ODM_IsWorkItemScheduled(
|
||||
IN PRT_WORK_ITEM pRtWorkItem
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
PlatformIsWorkItemScheduled(pRtWorkItem);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
//
|
||||
// ODM Timer relative API.
|
||||
//
|
||||
|
@ -449,59 +273,31 @@ ODM_StallExecution(
|
|||
IN u4Byte usDelay
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
rtw_udelay_os(usDelay);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
PlatformStallExecution(usDelay);
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
ODM_delay_ms(IN u4Byte ms)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
delay_ms(ms);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
rtw_mdelay_os(ms);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
delay_ms(ms);
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
ODM_delay_us(IN u4Byte us)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
delay_us(us);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
rtw_udelay_os(us);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
PlatformStallExecution(us);
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
ODM_sleep_ms(IN u4Byte ms)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
rtw_msleep_os(ms);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
ODM_sleep_us(IN u4Byte us)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
rtw_usleep_os(us);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
|
@ -511,15 +307,7 @@ ODM_SetTimer(
|
|||
IN u4Byte msDelay
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
mod_timer(pTimer, jiffies + (msDelay+9)/10);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
_set_timer(pTimer,msDelay ); //ms
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
PlatformSetTimer(Adapter, pTimer, msDelay);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
void
|
||||
|
@ -531,111 +319,30 @@ ODM_InitializeTimer(
|
|||
IN const char* szID
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
pTimer->function = CallBackFunc;
|
||||
pTimer->data = (unsigned long)pDM_Odm;
|
||||
init_timer(pTimer);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
_init_timer(pTimer,Adapter->pnetdev,CallBackFunc,pDM_Odm);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
PlatformInitializeTimer(Adapter, pTimer, CallBackFunc,pContext,szID);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
ODM_CancelTimer(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN PRT_TIMER pTimer
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
del_timer_sync(pTimer);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
_cancel_timer_ex(pTimer);
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
PlatformCancelTimer(Adapter, pTimer);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
ODM_ReleaseTimer(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN PRT_TIMER pTimer
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
|
||||
// <20120301, Kordan> If the initilization fails, InitializeAdapterXxx will return regardless of InitHalDm.
|
||||
// Hence, uninitialized timers cause BSOD when the driver releases resources since the init fail.
|
||||
if (pTimer == 0)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_SERIOUS, ("=====>ODM_ReleaseTimer(), The timer is NULL! Please check it!\n"));
|
||||
return;
|
||||
}
|
||||
|
||||
PlatformReleaseTimer(Adapter, pTimer);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
//
|
||||
// ODM FW relative API.
|
||||
//
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
void
|
||||
ODM_FillH2CCmd(
|
||||
IN struct adapter * Adapter,
|
||||
IN u1Byte ElementID,
|
||||
IN u4Byte CmdLen,
|
||||
IN pu1Byte pCmdBuffer
|
||||
)
|
||||
{
|
||||
if(IS_HARDWARE_TYPE_JAGUAR(Adapter))
|
||||
{
|
||||
switch(ElementID)
|
||||
{
|
||||
case ODM_H2C_RSSI_REPORT:
|
||||
FillH2CCmd8812(Adapter, H2C_8812_RSSI_REPORT, CmdLen, pCmdBuffer);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
else if(IS_HARDWARE_TYPE_8188E(Adapter))
|
||||
{
|
||||
switch(ElementID)
|
||||
{
|
||||
case ODM_H2C_PSD_RESULT:
|
||||
FillH2CCmd88E(Adapter, H2C_88E_PSD_RESULT, CmdLen, pCmdBuffer);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
switch(ElementID)
|
||||
{
|
||||
case ODM_H2C_RSSI_REPORT:
|
||||
FillH2CCmd92C(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer);
|
||||
case ODM_H2C_PSD_RESULT:
|
||||
FillH2CCmd92C(Adapter, H2C_92C_PSD_RESULT, CmdLen, pCmdBuffer);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
#else
|
||||
u4Byte
|
||||
ODM_FillH2CCmd(
|
||||
IN pu1Byte pH2CBuffer,
|
||||
|
@ -647,15 +354,5 @@ ODM_FillH2CCmd(
|
|||
IN pu1Byte CmdStartSeq
|
||||
)
|
||||
{
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
//FillH2CCmd(pH2CBuffer, H2CBufferLen, CmdNum, pElementID, pCmdLen, pCmbBuffer, CmdStartSeq);
|
||||
return FALSE;
|
||||
#endif
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
#endif
|
||||
|
|
|
@ -77,11 +77,9 @@ typedef enum _ODM_H2C_CMD
|
|||
// 2012/02/17 MH For non-MP compile pass only. Linux does not support workitem.
|
||||
// Suggest HW team to use thread instead of workitem. Windows also support the feature.
|
||||
//
|
||||
#if (DM_ODM_SUPPORT_TYPE != ODM_MP)
|
||||
typedef void *PRT_WORK_ITEM ;
|
||||
typedef void RT_WORKITEM_HANDLE,*PRT_WORKITEM_HANDLE;
|
||||
typedef void (*RT_WORKITEM_CALL_BACK)(void * pContext);
|
||||
#endif
|
||||
|
||||
//
|
||||
// =========== Extern Variable ??? It should be forbidden.
|
||||
|
@ -309,15 +307,6 @@ ODM_ReleaseTimer(
|
|||
//
|
||||
// ODM FW relative API.
|
||||
//
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
|
||||
void
|
||||
ODM_FillH2CCmd(
|
||||
IN PADAPTER Adapter,
|
||||
IN u1Byte ElementID,
|
||||
IN u4Byte CmdLen,
|
||||
IN pu1Byte pCmdBuffer
|
||||
);
|
||||
#else
|
||||
u4Byte
|
||||
ODM_FillH2CCmd(
|
||||
IN pu1Byte pH2CBuffer,
|
||||
|
@ -328,6 +317,5 @@ ODM_FillH2CCmd(
|
|||
IN pu1Byte* pCmbBuffer,
|
||||
IN pu1Byte CmdStartSeq
|
||||
);
|
||||
#endif
|
||||
#endif // __ODM_INTERFACE_H__
|
||||
|
||||
#endif // __ODM_INTERFACE_H__
|
||||
|
|
208
hal/odm_types.h
208
hal/odm_types.h
|
@ -34,11 +34,9 @@
|
|||
#define ODM_ENDIAN_BIG 0
|
||||
#define ODM_ENDIAN_LITTLE 1
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE != ODM_MP)
|
||||
#define RT_PCI_INTERFACE 1
|
||||
#define RT_USB_INTERFACE 2
|
||||
#define RT_SDIO_INTERFACE 3
|
||||
#endif
|
||||
|
||||
typedef enum _HAL_STATUS{
|
||||
HAL_STATUS_SUCCESS,
|
||||
|
@ -51,182 +49,64 @@ typedef enum _HAL_STATUS{
|
|||
RT_STATUS_OS_API_FAILED,*/
|
||||
}HAL_STATUS,*PHAL_STATUS;
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
typedef enum _RT_SPINLOCK_TYPE{
|
||||
RT_TEMP =1,
|
||||
}RT_SPINLOCK_TYPE;
|
||||
#elif( (DM_ODM_SUPPORT_TYPE == ODM_AP) ||(DM_ODM_SUPPORT_TYPE == ODM_ADSL))
|
||||
|
||||
#define VISTA_USB_RX_REVISE 0
|
||||
#include <basic_types.h>
|
||||
|
||||
//
|
||||
// Declare for ODM spin lock defintion temporarily fro compile pass.
|
||||
//
|
||||
typedef enum _RT_SPINLOCK_TYPE{
|
||||
RT_TX_SPINLOCK = 1,
|
||||
RT_RX_SPINLOCK = 2,
|
||||
RT_RM_SPINLOCK = 3,
|
||||
RT_CAM_SPINLOCK = 4,
|
||||
RT_SCAN_SPINLOCK = 5,
|
||||
RT_LOG_SPINLOCK = 7,
|
||||
RT_BW_SPINLOCK = 8,
|
||||
RT_CHNLOP_SPINLOCK = 9,
|
||||
RT_RF_OPERATE_SPINLOCK = 10,
|
||||
RT_INITIAL_SPINLOCK = 11,
|
||||
RT_RF_STATE_SPINLOCK = 12, // For RF state. Added by Bruce, 2007-10-30.
|
||||
#if VISTA_USB_RX_REVISE
|
||||
RT_USBRX_CONTEXT_SPINLOCK = 13,
|
||||
RT_USBRX_POSTPROC_SPINLOCK = 14, // protect data of Adapter->IndicateW/ IndicateR
|
||||
#endif
|
||||
//Shall we define Ndis 6.2 SpinLock Here ?
|
||||
RT_PORT_SPINLOCK=16,
|
||||
RT_VNIC_SPINLOCK=17,
|
||||
RT_HVL_SPINLOCK=18,
|
||||
RT_H2C_SPINLOCK = 20, // For H2C cmd. Added by tynli. 2009.11.09.
|
||||
#define u1Byte u8
|
||||
#define pu1Byte u8*
|
||||
|
||||
RT_BTData_SPINLOCK=25,
|
||||
#define u2Byte u16
|
||||
#define pu2Byte u16*
|
||||
|
||||
RT_WAPI_OPTION_SPINLOCK=26,
|
||||
RT_WAPI_RX_SPINLOCK=27,
|
||||
#define u4Byte u32
|
||||
#define pu4Byte u32*
|
||||
|
||||
// add for 92D CCK control issue
|
||||
RT_CCK_PAGEA_SPINLOCK = 28,
|
||||
RT_BUFFER_SPINLOCK = 29,
|
||||
RT_CHANNEL_AND_BANDWIDTH_SPINLOCK = 30,
|
||||
RT_GEN_TEMP_BUF_SPINLOCK = 31,
|
||||
RT_AWB_SPINLOCK = 32,
|
||||
RT_FW_PS_SPINLOCK = 33,
|
||||
RT_HW_TIMER_SPIN_LOCK = 34,
|
||||
RT_MPT_WI_SPINLOCK = 35
|
||||
}RT_SPINLOCK_TYPE;
|
||||
#define u8Byte u64
|
||||
#define pu8Byte u64*
|
||||
|
||||
#define s1Byte s8
|
||||
#define ps1Byte s8*
|
||||
|
||||
#define s2Byte s16
|
||||
#define ps2Byte s16*
|
||||
|
||||
#define s4Byte s32
|
||||
#define ps4Byte s32*
|
||||
|
||||
#define s8Byte s64
|
||||
#define ps8Byte s64*
|
||||
|
||||
#define DEV_BUS_TYPE RT_USB_INTERFACE
|
||||
|
||||
#if defined(CONFIG_LITTLE_ENDIAN)
|
||||
#define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE
|
||||
#elif defined (CONFIG_BIG_ENDIAN)
|
||||
#define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG
|
||||
#endif
|
||||
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
|
||||
#define STA_INFO_T RT_WLAN_STA
|
||||
#define PSTA_INFO_T PRT_WLAN_STA
|
||||
|
||||
// typedef unsigned long u4Byte,*pu4Byte;
|
||||
#define CONFIG_HW_ANTENNA_DIVERSITY
|
||||
#define CONFIG_SW_ANTENNA_DIVERSITY
|
||||
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
||||
|
||||
// To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07.
|
||||
#define ADSL_AP_BUILD_WORKAROUND
|
||||
#define AP_BUILD_WORKAROUND
|
||||
//
|
||||
|
||||
#ifdef AP_BUILD_WORKAROUND
|
||||
#include "../typedef.h"
|
||||
#else
|
||||
typedef void void,*void *;
|
||||
typedef unsigned char BOOLEAN,*PBOOLEAN;
|
||||
typedef unsigned char u1Byte,*pu1Byte;
|
||||
typedef unsigned short u2Byte,*pu2Byte;
|
||||
typedef unsigned int u4Byte,*pu4Byte;
|
||||
typedef unsigned long long u8Byte,*pu8Byte;
|
||||
typedef char s1Byte,*ps1Byte;
|
||||
typedef short s2Byte,*ps2Byte;
|
||||
typedef long s4Byte,*ps4Byte;
|
||||
typedef long long s8Byte,*ps8Byte;
|
||||
#endif
|
||||
|
||||
typedef struct rtl8192cd_priv *prtl8192cd_priv;
|
||||
typedef struct stat_info STA_INFO_T,*PSTA_INFO_T;
|
||||
typedef struct timer_list RT_TIMER, *PRT_TIMER;
|
||||
typedef void * RT_TIMER_CALL_BACK;
|
||||
|
||||
#define DEV_BUS_TYPE RT_PCI_INTERFACE
|
||||
|
||||
#define true 1
|
||||
#define false 0
|
||||
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
|
||||
|
||||
// To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07.
|
||||
#define ADSL_AP_BUILD_WORKAROUND
|
||||
#define ADSL_BUILD_WORKAROUND
|
||||
//
|
||||
|
||||
typedef unsigned char BOOLEAN,*PBOOLEAN;
|
||||
typedef unsigned char u1Byte,*pu1Byte;
|
||||
typedef unsigned short u2Byte,*pu2Byte;
|
||||
typedef unsigned int u4Byte,*pu4Byte;
|
||||
typedef unsigned long long u8Byte,*pu8Byte;
|
||||
typedef char s1Byte,*ps1Byte;
|
||||
typedef short s2Byte,*ps2Byte;
|
||||
typedef long s4Byte,*ps4Byte;
|
||||
typedef long long s8Byte,*ps8Byte;
|
||||
|
||||
typedef struct rtl8192cd_priv *prtl8192cd_priv;
|
||||
typedef struct stat_info STA_INFO_T,*PSTA_INFO_T;
|
||||
typedef struct timer_list RT_TIMER, *PRT_TIMER;
|
||||
typedef void * RT_TIMER_CALL_BACK;
|
||||
|
||||
#define DEV_BUS_TYPE RT_PCI_INTERFACE
|
||||
|
||||
#define true 1
|
||||
#define false 0
|
||||
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
#include <basic_types.h>
|
||||
|
||||
#define u1Byte u8
|
||||
#define pu1Byte u8*
|
||||
|
||||
#define u2Byte u16
|
||||
#define pu2Byte u16*
|
||||
|
||||
#define u4Byte u32
|
||||
#define pu4Byte u32*
|
||||
|
||||
#define u8Byte u64
|
||||
#define pu8Byte u64*
|
||||
|
||||
#define s1Byte s8
|
||||
#define ps1Byte s8*
|
||||
|
||||
#define s2Byte s16
|
||||
#define ps2Byte s16*
|
||||
|
||||
#define s4Byte s32
|
||||
#define ps4Byte s32*
|
||||
|
||||
#define s8Byte s64
|
||||
#define ps8Byte s64*
|
||||
|
||||
#define DEV_BUS_TYPE RT_USB_INTERFACE
|
||||
|
||||
#if defined(CONFIG_LITTLE_ENDIAN)
|
||||
#define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE
|
||||
#elif defined (CONFIG_BIG_ENDIAN)
|
||||
#define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG
|
||||
#endif
|
||||
|
||||
typedef struct timer_list RT_TIMER, *PRT_TIMER;
|
||||
typedef void * RT_TIMER_CALL_BACK;
|
||||
#define STA_INFO_T struct sta_info
|
||||
#define PSTA_INFO_T struct sta_info *
|
||||
|
||||
|
||||
|
||||
#define TRUE true
|
||||
#define FALSE false
|
||||
typedef struct timer_list RT_TIMER, *PRT_TIMER;
|
||||
typedef void * RT_TIMER_CALL_BACK;
|
||||
#define STA_INFO_T struct sta_info
|
||||
#define PSTA_INFO_T struct sta_info *
|
||||
|
||||
|
||||
#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
|
||||
#define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value)
|
||||
#define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)
|
||||
|
||||
//define useless flag to avoid compile warning
|
||||
#define USE_WORKITEM 0
|
||||
#define FOR_BRAZIL_PRETEST 0
|
||||
#define BT_30_SUPPORT 0
|
||||
#define FPGA_TWO_MAC_VERIFICATION 0
|
||||
#endif
|
||||
#define TRUE true
|
||||
#define FALSE false
|
||||
|
||||
|
||||
#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
|
||||
#define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value)
|
||||
#define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)
|
||||
|
||||
//define useless flag to avoid compile warning
|
||||
#define USE_WORKITEM 0
|
||||
#define FOR_BRAZIL_PRETEST 0
|
||||
#define BT_30_SUPPORT 0
|
||||
#define FPGA_TWO_MAC_VERIFICATION 0
|
||||
|
||||
|
||||
#endif // __ODM_TYPES_H__
|
||||
|
||||
|
|
|
@ -101,25 +101,6 @@ struct signal_stat {
|
|||
u32 total_num; //num of valid elements
|
||||
u32 total_val; //sum of valid elements
|
||||
};
|
||||
/*
|
||||
#define MAX_PATH_NUM_92CS 2
|
||||
|
||||
typedef struct _ODM_Phy_Status_Info_
|
||||
{
|
||||
u1Byte RxPWDBAll;
|
||||
u1Byte SignalQuality; // in 0-100 index.
|
||||
u1Byte RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; //EVM
|
||||
u1Byte RxMIMOSignalStrength[MAX_PATH_NUM_92CS];// in 0~100 index
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
|
||||
s1Byte RxPower; // in dBm Translate from PWdB
|
||||
s1Byte RecvSignalPower;// Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures.
|
||||
u1Byte BTRxRSSIPercentage;
|
||||
u1Byte SignalStrength; // in 0-100 index.
|
||||
u1Byte RxPwr[MAX_PATH_NUM_92CS];//per-path's pwdb
|
||||
#endif
|
||||
u1Byte RxSNR[MAX_PATH_NUM_92CS];//per-path's SNR
|
||||
}ODM_PHY_INFO_T,*PODM_PHY_INFO_T;
|
||||
*/
|
||||
|
||||
#define MAX_PATH_NUM_92CS 2
|
||||
struct phy_info //ODM_PHY_INFO_T
|
||||
|
@ -128,14 +109,12 @@ struct phy_info //ODM_PHY_INFO_T
|
|||
u8 SignalQuality; // in 0-100 index.
|
||||
u8 RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; //EVM
|
||||
u8 RxMIMOSignalStrength[MAX_PATH_NUM_92CS];// in 0~100 index
|
||||
//#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
|
||||
s8 RxPower; // in dBm Translate from PWdB
|
||||
s8 RecvSignalPower;// Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures.
|
||||
u8 BTRxRSSIPercentage;
|
||||
u8 SignalStrength; // in 0-100 index.
|
||||
u8 RxPwr[MAX_PATH_NUM_92CS];//per-path's pwdb
|
||||
u8 RxSNR[MAX_PATH_NUM_92CS];//per-path's SNR
|
||||
//#endif
|
||||
};
|
||||
|
||||
|
||||
|
|
Loading…
Reference in a new issue