From 7f635252a0dead93819a0a20fccdf621c001079b Mon Sep 17 00:00:00 2001 From: Larry Finger Date: Fri, 30 Nov 2018 16:36:29 -0600 Subject: [PATCH] rtl8188eu: Remove all synonyms for u8, u16, u32, qnd u64 Signed-off-by: Larry Finger --- core/rtw_btcoex.c | 4 +- core/rtw_efuse.c | 4 +- core/rtw_mp.c | 14 +- core/rtw_odm.c | 2 +- hal/HalEfuseMask8188E_USB.c | 12 +- hal/HalEfuseMask8188E_USB.h | 6 +- hal/btc/halbtcoutsrc.h | 260 ++++++++++++++++++------------------ hal/btc/mp_precomp.h | 2 +- hal/hal_btcoex.c | 42 +++--- hal/hal_com.c | 14 +- hal/hal_com_phycfg.c | 2 +- hal/hal_mp.c | 48 +++---- hal/hal_phy.c | 4 +- hal/rtl8188e_cmd.c | 8 +- hal/rtl8188e_hal_init.c | 38 +++--- hal/rtl8188e_phycfg.c | 64 ++++----- hal/rtl8188e_rf6052.c | 2 +- hal/rtl8188e_xmit.c | 6 +- hal/usb_halinit.c | 2 +- include/rtw_bt_mp.h | 52 ++++---- include/rtw_btcoex.h | 48 +++---- include/rtw_mp.h | 45 ++----- 22 files changed, 326 insertions(+), 353 deletions(-) diff --git a/core/rtw_btcoex.c b/core/rtw_btcoex.c index 695f39b..995a3b7 100644 --- a/core/rtw_btcoex.c +++ b/core/rtw_btcoex.c @@ -819,7 +819,7 @@ u8 rtw_btcoex_parse_HCI_link_status_notify_cmd(_adapter *padapter, u8 *pcmd, u16 RTW_INFO("Connection_Handle=0x%x, BTProfile=%d, BTSpec=%d\n", conHandle, btProfile, btCoreSpec); pTriple += 4; } else if (pBtMgnt->ExtConfig.HCIExtensionVer >= 1) { - conHandle = *((pu2Byte)&pTriple[0]); + conHandle = *((u16 *)&pTriple[0]); btProfile = pTriple[2]; btCoreSpec = pTriple[3]; linkRole = pTriple[4]; @@ -1542,7 +1542,7 @@ void rtw_btcoex_SendEventExtBtCoexControl(PADAPTER padapter, u8 bNeedDbgRsp, u8 u8 localBuf[32] = ""; u8 *pRetPar; u8 opCode = 0; - u8 *pInBuf = (pu1Byte)pData; + u8 *pInBuf = (u8 *)pData; u8 *pOpCodeContent; rtw_HCI_event *pEvent; diff --git a/core/rtw_efuse.c b/core/rtw_efuse.c index 90dafd7..ac7819c 100644 --- a/core/rtw_efuse.c +++ b/core/rtw_efuse.c @@ -127,13 +127,13 @@ u8 rtw_efuse_mask_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) static void efuse_PreUpdateAction( PADAPTER pAdapter, - pu4Byte BackupRegs) + u32 * BackupRegs) { } static void efuse_PostUpdateAction( PADAPTER pAdapter, - pu4Byte BackupRegs) + u32 * BackupRegs) { } diff --git a/core/rtw_mp.c b/core/rtw_mp.c index f693922..8dea9ff 100644 --- a/core/rtw_mp.c +++ b/core/rtw_mp.c @@ -369,11 +369,11 @@ MPT_InitializeAdapter( PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); /* default use Main */ - pMptCtx->backup0xc50 = (u1Byte)phy_query_bb_reg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0); - pMptCtx->backup0xc58 = (u1Byte)phy_query_bb_reg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0); - pMptCtx->backup0xc30 = (u1Byte)phy_query_bb_reg(pAdapter, rOFDM0_RxDetector1, bMaskByte0); - pMptCtx->backup0x52_RF_A = (u1Byte)phy_query_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); - pMptCtx->backup0x52_RF_B = (u1Byte)phy_query_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0); + pMptCtx->backup0xc50 = (u8)phy_query_bb_reg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0); + pMptCtx->backup0xc58 = (u8)phy_query_bb_reg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0); + pMptCtx->backup0xc30 = (u8)phy_query_bb_reg(pAdapter, rOFDM0_RxDetector1, bMaskByte0); + pMptCtx->backup0x52_RF_A = (u8)phy_query_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); + pMptCtx->backup0x52_RF_B = (u8)phy_query_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0); rtw_write32(pAdapter, REG_MACID_NO_LINK_0, 0x0); rtw_write32(pAdapter, REG_MACID_NO_LINK_1, 0x0); return rtStatus; @@ -490,7 +490,7 @@ void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart) padapter->mppriv.mp_dm = 0; { struct _TXPWRTRACK_CFG c; - u1Byte chnl = 0 ; + u8 chnl = 0 ; memset(&c, 0, sizeof(struct _TXPWRTRACK_CFG)); configure_txpower_track(pDM_Odm, &c); odm_clear_txpowertracking_state(pDM_Odm); @@ -1787,7 +1787,7 @@ u32 mpt_ProQueryCalTxPower( PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); u32 TxPower = 1; - u1Byte rate = 0; + u8 rate = 0; struct txpwr_idx_comp tic; u8 mgn_rate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index); diff --git a/core/rtw_odm.c b/core/rtw_odm.c index e40033b..1ee1431 100644 --- a/core/rtw_odm.c +++ b/core/rtw_odm.c @@ -28,7 +28,7 @@ void rtw_odm_init_ic_type(_adapter *adapter) { HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); struct PHY_DM_STRUCT *odm = &hal_data->odmpriv; - u4Byte ic_type = chip_type_to_odm_ic_type(rtw_get_chip_type(adapter)); + u32 ic_type = chip_type_to_odm_ic_type(rtw_get_chip_type(adapter)); rtw_warn_on(!ic_type); diff --git a/hal/HalEfuseMask8188E_USB.c b/hal/HalEfuseMask8188E_USB.c index 08e628c..e3a261a 100644 --- a/hal/HalEfuseMask8188E_USB.c +++ b/hal/HalEfuseMask8188E_USB.c @@ -30,7 +30,7 @@ * MUSB.TXT ******************************************************************************/ -static u1Byte Array_MP_8188E_MUSB[] = { +static u8 Array_MP_8188E_MUSB[] = { 0xFF, 0xF3, 0x00, @@ -66,25 +66,25 @@ static u1Byte Array_MP_8188E_MUSB[] = { }; -u2Byte +u16 EFUSE_GetArrayLen_MP_8188E_MUSB(void) { - return sizeof(Array_MP_8188E_MUSB) / sizeof(u1Byte); + return sizeof(Array_MP_8188E_MUSB) / sizeof(u8); } void EFUSE_GetMaskArray_MP_8188E_MUSB( - pu1Byte Array + u8 * Array ) { - u2Byte len = EFUSE_GetArrayLen_MP_8188E_MUSB(), i = 0; + u16 len = EFUSE_GetArrayLen_MP_8188E_MUSB(), i = 0; for (i = 0; i < len; ++i) Array[i] = Array_MP_8188E_MUSB[i]; } bool EFUSE_IsAddressMasked_MP_8188E_MUSB( - u2Byte Offset + u16 Offset ) { int r = Offset / 16; diff --git a/hal/HalEfuseMask8188E_USB.h b/hal/HalEfuseMask8188E_USB.h index e7da366..b33e52d 100644 --- a/hal/HalEfuseMask8188E_USB.h +++ b/hal/HalEfuseMask8188E_USB.h @@ -25,15 +25,15 @@ ******************************************************************************/ -u2Byte +u16 EFUSE_GetArrayLen_MP_8188E_MUSB(void); void EFUSE_GetMaskArray_MP_8188E_MUSB( - pu1Byte Array + u8 * Array ); bool EFUSE_IsAddressMasked_MP_8188E_MUSB(/* TC: Test Chip, MP: MP Chip */ - u2Byte Offset + u16 Offset ); diff --git a/hal/btc/halbtcoutsrc.h b/hal/btc/halbtcoutsrc.h index f9aebdd..0f25098 100644 --- a/hal/btc/halbtcoutsrc.h +++ b/hal/btc/halbtcoutsrc.h @@ -5,7 +5,7 @@ #define BTC_COEX_OFFLOAD 0 #define BTC_TMP_BUF_SHORT 20 -extern u1Byte gl_btc_trace_buf[]; +extern u8 gl_btc_trace_buf[]; #define BTC_SPRINTF rsprintf #define BTC_TRACE(_MSG_)\ do {\ @@ -254,7 +254,7 @@ typedef enum _BTC_GET_TYPE { BTC_GET_S4_WIFI_RSSI, BTC_GET_S4_HS_RSSI, - /* type u4Byte */ + /* type u32 */ BTC_GET_U4_WIFI_BW, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, BTC_GET_U4_WIFI_FW_VER, @@ -267,7 +267,7 @@ typedef enum _BTC_GET_TYPE { BTC_GET_U4_WIFI_IQK_OK, BTC_GET_U4_WIFI_IQK_FAIL, - /* type u1Byte */ + /* type u8 */ BTC_GET_U1_WIFI_DOT11_CHNL, BTC_GET_U1_WIFI_CENTRAL_CHNL, BTC_GET_U1_WIFI_HS_CHNL, @@ -297,7 +297,7 @@ typedef enum _BTC_SET_TYPE { BTC_SET_BL_BT_TX_RX_MASK, BTC_SET_BL_MIRACAST_PLUS_BT, - /* type u1Byte */ + /* type u8 */ BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, BTC_SET_U1_AGG_BUF_SIZE, @@ -308,7 +308,7 @@ typedef enum _BTC_SET_TYPE { /*===== for 1Ant ======*/ /* type bool */ - /* type u1Byte */ + /* type u8 */ BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, BTC_SET_U1_LPS_VAL, BTC_SET_U1_RPWM_VAL, @@ -399,27 +399,27 @@ typedef enum _BTC_BT_OFFON { For following block is for coex offload ==================================================*/ typedef struct _COL_H2C { - u1Byte opcode; - u1Byte opcode_ver:4; - u1Byte req_num:4; - u1Byte buf[1]; + u8 opcode; + u8 opcode_ver:4; + u8 req_num:4; + u8 buf[1]; } COL_H2C, *PCOL_H2C; #define COL_C2H_ACK_HDR_LEN 3 typedef struct _COL_C2H_ACK { - u1Byte status; - u1Byte opcode_ver:4; - u1Byte req_num:4; - u1Byte ret_len; - u1Byte buf[1]; + u8 status; + u8 opcode_ver:4; + u8 req_num:4; + u8 ret_len; + u8 buf[1]; } COL_C2H_ACK, *PCOL_C2H_ACK; #define COL_C2H_IND_HDR_LEN 3 typedef struct _COL_C2H_IND { - u1Byte type; - u1Byte version; - u1Byte length; - u1Byte data[1]; + u8 type; + u8 version; + u8 length; + u8 data[1]; } COL_C2H_IND, *PCOL_C2H_IND; /*============================================ @@ -466,191 +466,191 @@ typedef enum _COL_IND_TYPE { } COL_IND_TYPE, *PCOL_IND_TYPE; typedef struct _COL_SINGLE_H2C_RECORD { - u1Byte h2c_buf[COL_H2C_BUF_LEN]; /* the latest sent h2c buffer */ - u4Byte h2c_len; - u1Byte c2h_ack_buf[COL_H2C_BUF_LEN]; /* the latest received c2h buffer */ - u4Byte c2h_ack_len; - u4Byte count; /* the total number of the sent h2c command */ - u4Byte status[COL_STATUS_MAX]; /* the c2h status for the sent h2c command */ + u8 h2c_buf[COL_H2C_BUF_LEN]; /* the latest sent h2c buffer */ + u32 h2c_len; + u8 c2h_ack_buf[COL_H2C_BUF_LEN]; /* the latest received c2h buffer */ + u32 c2h_ack_len; + u32 count; /* the total number of the sent h2c command */ + u32 status[COL_STATUS_MAX]; /* the c2h status for the sent h2c command */ } COL_SINGLE_H2C_RECORD, *PCOL_SINGLE_H2C_RECORD; typedef struct _COL_SINGLE_C2H_IND_RECORD { - u1Byte ind_buf[COL_H2C_BUF_LEN]; /* the latest received c2h indication buffer */ - u4Byte ind_len; - u4Byte count; /* the total number of the rcvd c2h indication */ - u4Byte status[COL_STATUS_MAX]; /* the c2h indication verified status */ + u8 ind_buf[COL_H2C_BUF_LEN]; /* the latest received c2h indication buffer */ + u32 ind_len; + u32 count; /* the total number of the rcvd c2h indication */ + u32 status[COL_STATUS_MAX]; /* the c2h indication verified status */ } COL_SINGLE_C2H_IND_RECORD, *PCOL_SINGLE_C2H_IND_RECORD; typedef struct _BTC_OFFLOAD { /* H2C command related */ - u1Byte h2c_req_num; - u4Byte cnt_h2c_sent; + u8 h2c_req_num; + u32 cnt_h2c_sent; COL_SINGLE_H2C_RECORD h2c_record[COL_OP_WIFI_OPCODE_MAX]; /* C2H Ack related */ - u4Byte cnt_c2h_ack; - u4Byte status[COL_STATUS_MAX]; + u32 cnt_c2h_ack; + u32 status[COL_STATUS_MAX]; struct completion c2h_event[COL_MAX_H2C_REQ_NUM]; /* for req_num = 1~COL_MAX_H2C_REQ_NUM */ - u1Byte c2h_ack_buf[COL_MAX_H2C_REQ_NUM][COL_H2C_BUF_LEN]; - u1Byte c2h_ack_len[COL_MAX_H2C_REQ_NUM]; + u8 c2h_ack_buf[COL_MAX_H2C_REQ_NUM][COL_H2C_BUF_LEN]; + u8 c2h_ack_len[COL_MAX_H2C_REQ_NUM]; /* C2H Indication related */ - u4Byte cnt_c2h_ind; + u32 cnt_c2h_ind; COL_SINGLE_C2H_IND_RECORD c2h_ind_record[COL_IND_MAX]; - u4Byte c2h_ind_status[COL_STATUS_MAX]; - u1Byte c2h_ind_buf[COL_H2C_BUF_LEN]; - u1Byte c2h_ind_len; + u32 c2h_ind_status[COL_STATUS_MAX]; + u8 c2h_ind_buf[COL_H2C_BUF_LEN]; + u8 c2h_ind_len; } BTC_OFFLOAD, *PBTC_OFFLOAD; extern BTC_OFFLOAD gl_coex_offload; /*==================================================*/ -typedef u1Byte +typedef u8 (*BFP_BTC_R1)( void * pBtcContext, - u4Byte RegAddr + u32 RegAddr ); -typedef u2Byte +typedef u16 (*BFP_BTC_R2)( void * pBtcContext, - u4Byte RegAddr + u32 RegAddr ); -typedef u4Byte +typedef u32 (*BFP_BTC_R4)( void * pBtcContext, - u4Byte RegAddr + u32 RegAddr ); typedef void (*BFP_BTC_W1)( void * pBtcContext, - u4Byte RegAddr, - u1Byte Data + u32 RegAddr, + u8 Data ); typedef void (*BFP_BTC_W1_BIT_MASK)( void * pBtcContext, - u4Byte regAddr, - u1Byte bitMask, - u1Byte data1b + u32 regAddr, + u8 bitMask, + u8 data1b ); typedef void (*BFP_BTC_W2)( void * pBtcContext, - u4Byte RegAddr, - u2Byte Data + u32 RegAddr, + u16 Data ); typedef void (*BFP_BTC_W4)( void * pBtcContext, - u4Byte RegAddr, - u4Byte Data + u32 RegAddr, + u32 Data ); typedef void (*BFP_BTC_LOCAL_REG_W1)( void * pBtcContext, - u4Byte RegAddr, - u1Byte Data + u32 RegAddr, + u8 Data ); typedef void (*BFP_BTC_SET_BB_REG)( void * pBtcContext, - u4Byte RegAddr, - u4Byte BitMask, - u4Byte Data + u32 RegAddr, + u32 BitMask, + u32 Data ); -typedef u4Byte +typedef u32 (*BFP_BTC_GET_BB_REG)( void * pBtcContext, - u4Byte RegAddr, - u4Byte BitMask + u32 RegAddr, + u32 BitMask ); typedef void (*BFP_BTC_SET_RF_REG)( void * pBtcContext, - u1Byte eRFPath, - u4Byte RegAddr, - u4Byte BitMask, - u4Byte Data + u8 eRFPath, + u32 RegAddr, + u32 BitMask, + u32 Data ); -typedef u4Byte +typedef u32 (*BFP_BTC_GET_RF_REG)( void * pBtcContext, - u1Byte eRFPath, - u4Byte RegAddr, - u4Byte BitMask + u8 eRFPath, + u32 RegAddr, + u32 BitMask ); typedef void (*BFP_BTC_FILL_H2C)( void * pBtcContext, - u1Byte elementId, - u4Byte cmdLen, - pu1Byte pCmdBuffer + u8 elementId, + u32 cmdLen, + u8 * pCmdBuffer ); typedef bool (*BFP_BTC_GET)( void * pBtCoexist, - u1Byte getType, + u8 getType, void * pOutBuf ); typedef bool (*BFP_BTC_SET)( void * pBtCoexist, - u1Byte setType, + u8 setType, void * pInBuf ); -typedef u2Byte +typedef u16 (*BFP_BTC_SET_BT_REG)( void * pBtcContext, - u1Byte regType, - u4Byte offset, - u4Byte value + u8 regType, + u32 offset, + u32 value ); typedef bool (*BFP_BTC_SET_BT_ANT_DETECTION)( void * pBtcContext, - u1Byte txTime, - u1Byte btChnl + u8 txTime, + u8 btChnl ); typedef bool (*BFP_BTC_SET_BT_TRX_MASK)( void * pBtcContext, - u1Byte bt_trx_mask + u8 bt_trx_mask ); -typedef u4Byte +typedef u32 (*BFP_BTC_GET_BT_REG)( void * pBtcContext, - u1Byte regType, - u4Byte offset + u8 regType, + u32 offset ); typedef void (*BFP_BTC_DISP_DBG_MSG)( void * pBtCoexist, - u1Byte dispType + u8 dispType ); typedef COL_H2C_STATUS (*BFP_BTC_COEX_H2C_PROCESS)( void * pBtCoexist, - u1Byte opcode, - u1Byte opcode_ver, - pu1Byte ph2c_par, - u1Byte h2c_par_len + u8 opcode, + u8 opcode_ver, + u8 * ph2c_par, + u8 h2c_par_len ); -typedef u4Byte +typedef u32 (*BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE)( void * pBtcContext ); -typedef u4Byte +typedef u32 (*BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION)( void * pBtcContext ); -typedef u4Byte +typedef u32 (*BFP_BTC_GET_PHYDM_VERSION)( void * pBtcContext ); @@ -658,38 +658,38 @@ typedef u4Byte typedef void (*BTC_PHYDM_MODIFY_RA_PCR_THRESHLOD)( void * pDM_Odm, - u1Byte RA_offset_direction, - u1Byte RA_threshold_offset + u8 RA_offset_direction, + u8 RA_threshold_offset ); -typedef u4Byte +typedef u32 (*BTC_PHYDM_CMNINFOQUERY)( void * pDM_Odm, - u1Byte info_type + u8 info_type ); -typedef u1Byte +typedef u8 (*BFP_BTC_GET_ANT_DET_VAL_FROM_BT)( void * pBtcContext ); -typedef u1Byte +typedef u8 (*BFP_BTC_GET_BLE_SCAN_TYPE_FROM_BT)( void * pBtcContext ); -typedef u4Byte +typedef u32 (*BFP_BTC_GET_BLE_SCAN_PARA_FROM_BT)( void * pBtcContext, - u1Byte scanType + u8 scanType ); typedef bool (*BFP_BTC_GET_BT_AFH_MAP_FROM_BT)( void * pBtcContext, - u1Byte mapType, - pu1Byte afhMap + u8 mapType, + u8 * afhMap ); struct btc_bt_info { @@ -788,9 +788,9 @@ struct btc_coexist { bool stop_coex_dm; bool manual_control; bool bdontenterLPS; - pu1Byte cli_buf; + u8 * cli_buf; struct btc_statistics statistics; - u1Byte pwrModeVal[10]; + u8 pwrModeVal[10]; /* function pointers */ /* io related */ @@ -863,27 +863,27 @@ EXhalbtcoutsrc_InitCoexDm( void EXhalbtcoutsrc_IpsNotify( PBTC_COEXIST pBtCoexist, - u1Byte type + u8 type ); void EXhalbtcoutsrc_LpsNotify( PBTC_COEXIST pBtCoexist, - u1Byte type + u8 type ); void EXhalbtcoutsrc_ScanNotify( PBTC_COEXIST pBtCoexist, - u1Byte type + u8 type ); void EXhalbtcoutsrc_SetAntennaPathNotify( PBTC_COEXIST pBtCoexist, - u1Byte type + u8 type ); void EXhalbtcoutsrc_ConnectNotify( PBTC_COEXIST pBtCoexist, - u1Byte action + u8 action ); void EXhalbtcoutsrc_MediaStatusNotify( @@ -893,23 +893,23 @@ EXhalbtcoutsrc_MediaStatusNotify( void EXhalbtcoutsrc_SpecificPacketNotify( PBTC_COEXIST pBtCoexist, - u1Byte pktType + u8 pktType ); void EXhalbtcoutsrc_BtInfoNotify( PBTC_COEXIST pBtCoexist, - pu1Byte tmpBuf, - u1Byte length + u8 * tmpBuf, + u8 length ); void EXhalbtcoutsrc_RfStatusNotify( PBTC_COEXIST pBtCoexist, - u1Byte type + u8 type ); void EXhalbtcoutsrc_StackOperationNotify( PBTC_COEXIST pBtCoexist, - u1Byte type + u8 type ); void EXhalbtcoutsrc_HaltNotify( @@ -918,7 +918,7 @@ EXhalbtcoutsrc_HaltNotify( void EXhalbtcoutsrc_PnpNotify( PBTC_COEXIST pBtCoexist, - u1Byte pnpState + u8 pnpState ); void EXhalbtcoutsrc_CoexDmSwitch( @@ -931,17 +931,17 @@ EXhalbtcoutsrc_Periodical( void EXhalbtcoutsrc_DbgControl( PBTC_COEXIST pBtCoexist, - u1Byte opCode, - u1Byte opLen, - pu1Byte pData + u8 opCode, + u8 opLen, + u8 * pData ); void EXhalbtcoutsrc_AntennaDetection( PBTC_COEXIST pBtCoexist, - u4Byte centFreq, - u4Byte offset, - u4Byte span, - u4Byte seconds + u32 centFreq, + u32 offset, + u32 span, + u32 seconds ); void EXhalbtcoutsrc_StackUpdateProfileInfo( @@ -949,29 +949,29 @@ EXhalbtcoutsrc_StackUpdateProfileInfo( ); void EXhalbtcoutsrc_SetHciVersion( - u2Byte hciVersion + u16 hciVersion ); void EXhalbtcoutsrc_SetBtPatchVersion( - u2Byte btHciVersion, - u2Byte btPatchVersion + u16 btHciVersion, + u16 btPatchVersion ); void EXhalbtcoutsrc_UpdateMinBtRssi( - s1Byte btRssi + s8 btRssi ); void EXhalbtcoutsrc_SetChipType( - u1Byte chipType + u8 chipType ); void EXhalbtcoutsrc_SetAntNum( - u1Byte type, - u1Byte antNum + u8 type, + u8 antNum ); void EXhalbtcoutsrc_SetSingleAntPath( - u1Byte singleAntPath + u8 singleAntPath ); void EXhalbtcoutsrc_DisplayBtCoexInfo( diff --git a/hal/btc/mp_precomp.h b/hal/btc/mp_precomp.h index 2ad03a4..c15cbbb 100644 --- a/hal/btc/mp_precomp.h +++ b/hal/btc/mp_precomp.h @@ -41,7 +41,7 @@ typedef enum _BTC_MSG_COMP_TYPE { COMP_COEX = 0, COMP_MAX } BTC_MSG_COMP_TYPE; -extern u4Byte GLBtcDbgType[]; +extern u32 GLBtcDbgType[]; #define DBG_OFF 0 #define DBG_SEC 1 diff --git a/hal/hal_btcoex.c b/hal/hal_btcoex.c index 2a9daf9..7ae6ccf 100644 --- a/hal/hal_btcoex.c +++ b/hal/hal_btcoex.c @@ -204,7 +204,7 @@ u8 GLBtcBtMpRptBTOK; */ u32 GLBtcDbgType[COMP_MAX]; u8 GLBtcDbgBuf[BT_TMP_BUF_SIZE]; -u1Byte gl_btc_trace_buf[BT_TMP_BUF_SIZE]; +u8 gl_btc_trace_buf[BT_TMP_BUF_SIZE]; typedef struct _btcoexdbginfo { u8 *info; @@ -670,8 +670,8 @@ u32 halbtcoutsrc_GetBtPatchVer(PBTC_COEXIST pBtCoexist) _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); } else { #ifdef CONFIG_BT_COEXIST_SOCKET_TRX - u1Byte dataLen = 2; - u1Byte buf[4] = {0}; + u8 dataLen = 2; + u8 buf[4] = {0}; buf[0] = 0x0; /* OP_Code */ buf[1] = 0x0; /* OP_Code_Length */ @@ -1002,24 +1002,24 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf) case BTC_GET_U1_ANT_TYPE: switch (pHalData->bt_coexist.btAntisolation) { case 0: - *pU1Tmp = (u1Byte)BTC_ANT_TYPE_0; - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_0; + *pU1Tmp = (u8)BTC_ANT_TYPE_0; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_0; break; case 1: - *pU1Tmp = (u1Byte)BTC_ANT_TYPE_1; - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_1; + *pU1Tmp = (u8)BTC_ANT_TYPE_1; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_1; break; case 2: - *pU1Tmp = (u1Byte)BTC_ANT_TYPE_2; - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_2; + *pU1Tmp = (u8)BTC_ANT_TYPE_2; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_2; break; case 3: - *pU1Tmp = (u1Byte)BTC_ANT_TYPE_3; - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_3; + *pU1Tmp = (u8)BTC_ANT_TYPE_3; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_3; break; case 4: - *pU1Tmp = (u1Byte)BTC_ANT_TYPE_4; - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_4; + *pU1Tmp = (u8)BTC_ANT_TYPE_4; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_4; break; } break; @@ -1585,7 +1585,7 @@ u8 halbtcoutsrc_SetBtAntDetection(void *pBtcContext, u8 txTime, u8 btChnl) bool halbtcoutsrc_SetBtTRXMASK( IN void * pBtcContext, - IN u1Byte bt_trx_mask + IN u8 bt_trx_mask ) { /* Always return _FALSE since we don't implement this yet */ @@ -1646,7 +1646,7 @@ void halbtcoutsrc_FillH2cCmd(void *pBtcContext, u8 elementId, u32 cmdLen, u8 *pC static void halbtcoutsrc_coex_offload_init(void) { - u1Byte i; + u8 i; gl_coex_offload.h2c_req_num = 0; gl_coex_offload.cnt_h2c_sent = 0; @@ -2631,7 +2631,7 @@ void EXhalbtcoutsrc_bt_info_notify(PBTC_COEXIST pBtCoexist, u8 *tmpBuf, u8 lengt void EXhalbtcoutsrc_RfStatusNotify( IN PBTC_COEXIST pBtCoexist, - IN u1Byte type + IN u8 type ) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) @@ -3612,19 +3612,19 @@ void hal_btcoex_SetAntIsolationType(PADAPTER padapter, u8 anttype) switch (pHalData->bt_coexist.btAntisolation) { case 0: - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_0; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_0; break; case 1: - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_1; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_1; break; case 2: - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_2; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_2; break; case 3: - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_3; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_3; break; case 4: - pBtCoexist->board_info.ant_type = (u1Byte)BTC_ANT_TYPE_4; + pBtCoexist->board_info.ant_type = (u8)BTC_ANT_TYPE_4; break; } diff --git a/hal/hal_com.c b/hal/hal_com.c index e8d6f5d..c872438 100644 --- a/hal/hal_com.c +++ b/hal/hal_com.c @@ -8471,10 +8471,10 @@ void SetHalODMVar( podmpriv->debug_components &= ~(ODM_COMP_DIG | ODM_COMP_FA_CNT); break; case HAL_ODM_DBG_FLAG: - odm_cmn_info_update(podmpriv, ODM_CMNINFO_DBG_COMP, *((u8Byte *)pValue1)); + odm_cmn_info_update(podmpriv, ODM_CMNINFO_DBG_COMP, *((u64 *)pValue1)); break; case HAL_ODM_DBG_LEVEL: - odm_cmn_info_update(podmpriv, ODM_CMNINFO_DBG_LEVEL, *((u4Byte *)pValue1)); + odm_cmn_info_update(podmpriv, ODM_CMNINFO_DBG_LEVEL, *((u32 *)pValue1)); break; case HAL_ODM_RX_INFO_DUMP: { struct _FALSE_ALARM_STATISTICS *false_alm_cnt = (struct _FALSE_ALARM_STATISTICS *)phydm_get_structure(podmpriv , PHYDM_FALSEALMCNT); @@ -8577,10 +8577,10 @@ void GetHalODMVar( break; #endif/*#ifdef CONFIG_BACKGROUND_NOISE_MONITOR*/ case HAL_ODM_DBG_FLAG: - *((u8Byte *)pValue1) = podmpriv->debug_components; + *((u64 *)pValue1) = podmpriv->debug_components; break; case HAL_ODM_DBG_LEVEL: - *((u4Byte *)pValue1) = podmpriv->debug_level; + *((u32 *)pValue1) = podmpriv->debug_level; break; #ifdef CONFIG_AUTO_CHNL_SEL_NHM @@ -9362,9 +9362,9 @@ void rtw_bb_rf_gain_offset(_adapter *padapter) u8 value = pHalData->EEPROMRFGainOffset; u8 tmp = 0x3e; u32 res, i = 0; - u4Byte ArrayLen = sizeof(Array_kfreemap) / sizeof(u32); - pu4Byte Array = Array_kfreemap; - u4Byte v1 = 0, v2 = 0, GainValue = 0, target = 0; + u32 ArrayLen = sizeof(Array_kfreemap) / sizeof(u32); + u32 * Array = Array_kfreemap; + u32 v1 = 0, v2 = 0, GainValue = 0, target = 0; if (registry_par->RegPwrTrimEnable == 2) { RTW_INFO("Registry kfree default force disable.\n"); diff --git a/hal/hal_com_phycfg.c b/hal/hal_com_phycfg.c index cb37ad7..539bb0a 100644 --- a/hal/hal_com_phycfg.c +++ b/hal/hal_com_phycfg.c @@ -4191,7 +4191,7 @@ static int phy_ParseBBPgParaFile(PADAPTER Adapter, char *buffer) /* RTW_INFO("The values in PHY_REG_PG are exact values ok\n"); */ firstLine = _FALSE; continue; - } else if (eqNByte(szLine + 5, (pu1Byte)("[Relative]#"), 11)) { + } else if (eqNByte(szLine + 5, (u8 *)("[Relative]#"), 11)) { pHalData->odmpriv.phy_reg_pg_value_type = PHY_REG_PG_RELATIVE_VALUE; /* RTW_INFO("The values in PHY_REG_PG are relative values ok\n"); */ firstLine = _FALSE; diff --git a/hal/hal_mp.c b/hal/hal_mp.c index 8664071..6a2dab2 100644 --- a/hal/hal_mp.c +++ b/hal/hal_mp.c @@ -102,9 +102,9 @@ void hal_mpt_CCKTxPowerAdjust(PADAPTER Adapter, bool bInCH14) u8 i; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); - u1Byte u1Channel = pHalData->current_channel; + u8 u1Channel = pHalData->current_channel; u32 ulRateIdx = pMptCtx->mpt_rate_index; - u1Byte DataRate = 0xFF; + u8 DataRate = 0xFF; DataRate = mpt_to_mgnt_rate(ulRateIdx); @@ -216,8 +216,8 @@ static void mpt_SetTxPower_Old(PADAPTER pAdapter, MPT_TXPWR_DEF Rate, u8 *pTxPow { switch (Rate) { case MPT_CCK: { - u4Byte TxAGC = 0, pwr = 0; - u1Byte rf; + u32 TxAGC = 0, pwr = 0; + u8 rf; pwr = pTxPower[ODM_RF_PATH_A]; if (pwr < 0x3f) { @@ -235,8 +235,8 @@ static void mpt_SetTxPower_Old(PADAPTER pAdapter, MPT_TXPWR_DEF Rate, u8 *pTxPow break; case MPT_OFDM_AND_HT: { - u4Byte TxAGC = 0; - u1Byte pwr = 0, rf; + u32 TxAGC = 0; + u8 pwr = 0, rf; pwr = pTxPower[0]; if (pwr < 0x3f) { @@ -274,17 +274,17 @@ static void mpt_SetTxPower( PADAPTER pAdapter, MPT_TXPWR_DEF Rate, - pu1Byte pTxPower + u8 * pTxPower ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u1Byte path = 0 , i = 0, MaxRate = MGN_6M; - u1Byte StartPath = ODM_RF_PATH_A, EndPath = ODM_RF_PATH_B; + u8 path = 0 , i = 0, MaxRate = MGN_6M; + u8 StartPath = ODM_RF_PATH_A, EndPath = ODM_RF_PATH_B; switch (Rate) { case MPT_CCK: { - u1Byte rate[] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M}; + u8 rate[] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M}; for (path = StartPath; path <= EndPath; path++) for (i = 0; i < sizeof(rate); ++i) @@ -292,7 +292,7 @@ mpt_SetTxPower( } break; case MPT_OFDM: { - u1Byte rate[] = { + u8 rate[] = { MGN_6M, MGN_9M, MGN_12M, MGN_18M, MGN_24M, MGN_36M, MGN_48M, MGN_54M, }; @@ -303,7 +303,7 @@ mpt_SetTxPower( } break; case MPT_HT: { - u1Byte rate[] = { + u8 rate[] = { MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7, MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11, MGN_MCS12, MGN_MCS13, MGN_MCS14, @@ -328,7 +328,7 @@ mpt_SetTxPower( } break; case MPT_VHT: { - u1Byte rate[] = { + u8 rate[] = { MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3, MGN_VHT1SS_MCS4, MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7, MGN_VHT1SS_MCS8, MGN_VHT1SS_MCS9, MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1, MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4, @@ -407,12 +407,12 @@ static void mpt_SetRFPath_819X(PADAPTER pAdapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); - u4Byte ulAntennaTx, ulAntennaRx; + u32 ulAntennaTx, ulAntennaRx; R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ R_ANTENNA_SELECT_CCK *p_cck_txrx; - u1Byte r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; - u1Byte chgTx = 0, chgRx = 0; - u4Byte r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; + u8 r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; + u8 chgTx = 0, chgRx = 0; + u32 r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; ulAntennaTx = pHalData->antenna_tx_path; ulAntennaRx = pHalData->AntennaRxPath; @@ -597,7 +597,7 @@ u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter) { u32 ThermalValue = 0; - ThermalValue = (u1Byte)phy_query_rf_reg(pAdapter, ODM_RF_PATH_A, 0x42, 0xfc00); /*0x42: RF Reg[15:10]*/ + ThermalValue = (u8)phy_query_rf_reg(pAdapter, ODM_RF_PATH_A, 0x42, 0xfc00); /*0x42: RF Reg[15:10]*/ return (u8)ThermalValue; } @@ -647,8 +647,8 @@ void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); - u4Byte ulAntennaTx = pHalData->antenna_tx_path; - static u4Byte regRF = 0, regBB0 = 0, regBB1 = 0, regBB2 = 0, regBB3 = 0; + u32 ulAntennaTx = pHalData->antenna_tx_path; + static u32 regRF = 0, regBB0 = 0, regBB1 = 0, regBB2 = 0, regBB3 = 0; u8 rfPath; switch (ulAntennaTx) { @@ -763,7 +763,7 @@ static void mpt_StopCckContTx( { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); - u1Byte u1bReg; + u8 u1bReg; pMptCtx->bCckContTx = FALSE; pMptCtx->bOfdmContTx = FALSE; @@ -787,8 +787,8 @@ static void mpt_StopOfdmContTx( { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); - u1Byte u1bReg; - u4Byte data; + u8 u1bReg; + u32 data; pMptCtx->bCckContTx = FALSE; pMptCtx->bOfdmContTx = FALSE; @@ -812,7 +812,7 @@ static void mpt_StartCckContTx( { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); - u4Byte cckrate; + u32 cckrate; /* 1. if CCK block on */ if (!phy_query_bb_reg(pAdapter, rFPGA0_RFMOD, bCCKEn)) diff --git a/hal/hal_phy.c b/hal/hal_phy.c index 555acbd..ff07c91 100644 --- a/hal/hal_phy.c +++ b/hal/hal_phy.c @@ -33,10 +33,10 @@ static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG]; * OverView: Get shifted position of the BitMask * * Input: -* u4Byte BitMask, +* u32 BitMask, * * Output: none -* Return: u4Byte Return the shift bit bit position of the mask +* Return: u32 Return the shift bit bit position of the mask */ u32 PHY_CalculateBitShift( diff --git a/hal/rtl8188e_cmd.c b/hal/rtl8188e_cmd.c index 700bbf5..2807881 100644 --- a/hal/rtl8188e_cmd.c +++ b/hal/rtl8188e_cmd.c @@ -236,10 +236,10 @@ u8 rtl8188e_set_raid_cmd(_adapter *padapter, u32 bitmap, u8 *arg, u8 bw) } } - H2CCommand[3] = (u1Byte)(bitmap & 0x000000ff); - H2CCommand[4] = (u1Byte)((bitmap & 0x0000ff00) >> 8); - H2CCommand[5] = (u1Byte)((bitmap & 0x00ff0000) >> 16); - H2CCommand[6] = (u1Byte)((bitmap & 0xff000000) >> 24); + H2CCommand[3] = (u8)(bitmap & 0x000000ff); + H2CCommand[4] = (u8)((bitmap & 0x0000ff00) >> 8); + H2CCommand[5] = (u8)((bitmap & 0x00ff0000) >> 16); + H2CCommand[6] = (u8)((bitmap & 0xff000000) >> 24); FillH2CCmd_88E(padapter, H2C_DM_MACID_CFG, 7, H2CCommand); diff --git a/hal/rtl8188e_hal_init.c b/hal/rtl8188e_hal_init.c index 77a92d2..cae87fb 100644 --- a/hal/rtl8188e_hal_init.c +++ b/hal/rtl8188e_hal_init.c @@ -199,7 +199,7 @@ efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf) /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); */ efuse_utilized++; - eFuseWord[offset][i] |= (((u2Byte)rtemp8 << 8) & 0xff00); + eFuseWord[offset][i] |= (((u16)rtemp8 << 8) & 0xff00); if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) break; @@ -240,7 +240,7 @@ efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf) /* */ /* 5. Calculate Efuse utilization. */ /* */ - efuse_usage = (u1Byte)((efuse_utilized * 100) / EFUSE_REAL_CONTENT_LEN_88E); + efuse_usage = (u8)((efuse_utilized * 100) / EFUSE_REAL_CONTENT_LEN_88E); /* rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized); */ exit: @@ -1208,7 +1208,7 @@ Hal_EfuseReadEFuse88E( /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); */ efuse_utilized++; - eFuseWord[offset][i] |= (((u2Byte)*rtemp8 << 8) & 0xff00); + eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00); if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) break; @@ -1263,7 +1263,7 @@ Hal_EfuseReadEFuse88E( /* */ /* 5. Calculate Efuse utilization. */ /* */ - efuse_usage = (u1Byte)((eFuse_Addr * 100) / EFUSE_REAL_CONTENT_LEN_88E); + efuse_usage = (u8)((eFuse_Addr * 100) / EFUSE_REAL_CONTENT_LEN_88E); rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr); exit: @@ -1385,8 +1385,8 @@ rtl8188e_ReadEFuse( static void Hal_EFUSEGetEfuseDefinition88E( PADAPTER pAdapter, - u1Byte efuseType, - u1Byte type, + u8 efuseType, + u8 type, void * pOut ) { @@ -1453,38 +1453,38 @@ Hal_EFUSEGetEfuseDefinition_Pseudo88E( switch (type) { case TYPE_EFUSE_MAX_SECTION: { u8 *pMax_section; - pMax_section = (pu1Byte)pOut; + pMax_section = (u8 *)pOut; *pMax_section = EFUSE_MAX_SECTION_88E; } break; case TYPE_EFUSE_REAL_CONTENT_LEN: { u16 *pu2Tmp; - pu2Tmp = (pu2Byte)pOut; + pu2Tmp = (u16 *)pOut; *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; } break; case TYPE_EFUSE_CONTENT_LEN_BANK: { u16 *pu2Tmp; - pu2Tmp = (pu2Byte)pOut; + pu2Tmp = (u16 *)pOut; *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; } break; case TYPE_AVAILABLE_EFUSE_BYTES_BANK: { u16 *pu2Tmp; - pu2Tmp = (pu2Byte)pOut; - *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); + pu2Tmp = (u16 *)pOut; + *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); } break; case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: { u16 *pu2Tmp; - pu2Tmp = (pu2Byte)pOut; - *pu2Tmp = (u2Byte)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); + pu2Tmp = (u16 *)pOut; + *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); } break; case TYPE_EFUSE_MAP_LEN: { u16 *pu2Tmp; - pu2Tmp = (pu2Byte)pOut; - *pu2Tmp = (u2Byte)EFUSE_MAP_LEN_88E; + pu2Tmp = (u16 *)pOut; + *pu2Tmp = (u16)EFUSE_MAP_LEN_88E; } break; case TYPE_EFUSE_PROTECT_BYTES_BANK: { @@ -2658,7 +2658,7 @@ Hal_InitPGData88E(PADAPTER padapter) if (is_boot_from_eeprom(padapter)) { /* Read all Content from EEPROM or EFUSE. */ for (i = 0; i < HWSET_MAX_SIZE; i += 2) { - /* value16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1))); + /* value16 = EF2Byte(ReadEEprom(pAdapter, (u16) (i>>1))); * *((u16*)(&PROMContent[i])) = value16; */ } } else { @@ -2845,7 +2845,7 @@ Hal_ReadPAType_8188E( void Hal_ReadAmplifierType_8188E( PADAPTER Adapter, - pu1Byte PROMContent, + u8 * PROMContent, bool AutoloadFail ) { @@ -2883,7 +2883,7 @@ Hal_ReadAmplifierType_8188E( void Hal_ReadRFEType_8188E( PADAPTER Adapter, - pu1Byte PROMContent, + u8 * PROMContent, bool AutoloadFail ) { @@ -3045,7 +3045,7 @@ Hal_ReadThermalMeter_88E( ) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u1Byte tempval; + u8 tempval; /* */ /* ThermalMeter from EEPROM */ diff --git a/hal/rtl8188e_phycfg.c b/hal/rtl8188e_phycfg.c index db2d12c..1e6e6dc 100644 --- a/hal/rtl8188e_phycfg.c +++ b/hal/rtl8188e_phycfg.c @@ -122,11 +122,11 @@ sic_Read4Byte( /* RTPRINT(FPHY, PHY_SICR, ("write cmdreg 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_PREREAD)); */ #endif rtw_write8(Adapter, SIC_ADDR_REG, (u8)(offset & 0xff)); - /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u1Byte)(offset&0xff)); */ - /* RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG, (u1Byte)(offset&0xff))); */ + /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u8)(offset&0xff)); */ + /* RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG, (u8)(offset&0xff))); */ rtw_write8(Adapter, SIC_ADDR_REG + 1, (u8)((offset & 0xff00) >> 8)); - /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8)); */ - /* RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8))); */ + /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8)); */ + /* RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8))); */ rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_READ); /* PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_READ); */ /* RTPRINT(FPHY, PHY_SICR, ("write cmdreg 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_READ)); */ @@ -172,13 +172,13 @@ sic_Write4Byte( /* RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_PREWRITE)); */ #endif rtw_write8(Adapter, SIC_ADDR_REG, (u8)(offset & 0xff)); - /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u1Byte)(offset&0xff)); */ - /* RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", SIC_ADDR_REG, (u1Byte)(offset&0xff))); */ + /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u8)(offset&0xff)); */ + /* RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", SIC_ADDR_REG, (u8)(offset&0xff))); */ rtw_write8(Adapter, SIC_ADDR_REG + 1, (u8)((offset & 0xff00) >> 8)); - /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8)); */ - /* RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", (SIC_ADDR_REG+1), (u1Byte)((offset&0xff00)>>8))); */ + /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8)); */ + /* RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", (SIC_ADDR_REG+1), (u8)((offset&0xff00)>>8))); */ rtw_write32(Adapter, SIC_DATA_REG, (u32)data); - /* PlatformEFIOWrite4Byte(Adapter, SIC_DATA_REG, (u4Byte)data); */ + /* PlatformEFIOWrite4Byte(Adapter, SIC_DATA_REG, (u32)data); */ /* RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_DATA_REG, data)); */ rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_WRITE); /* PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_WRITE); */ @@ -282,11 +282,11 @@ SIC_LedOff( * * Input: * PADAPTER Adapter, -* u4Byte RegAddr, //The target address to be readback -* u4Byte BitMask //The target bit position in the target address +* u32 RegAddr, //The target address to be readback +* u32 BitMask //The target bit position in the target address * //to be readback * Output: None -* Return: u4Byte Data //The readback register value +* Return: u32 Data //The readback register value * Note: This function is equal to "GetRegSetting" in PHY programming guide */ u32 @@ -326,10 +326,10 @@ PHY_QueryBBReg8188E( * * Input: * PADAPTER Adapter, -* u4Byte RegAddr, //The target address to be modified -* u4Byte BitMask //The target bit position in the target address +* u32 RegAddr, //The target address to be modified +* u32 BitMask //The target bit position in the target address * //to be modified -* u4Byte Data //The new register value in the target bit position +* u32 Data //The new register value in the target bit position * //of the target address * * Output: None @@ -383,10 +383,10 @@ PHY_SetBBReg8188E( * Input: * PADAPTER Adapter, * u8 eRFPath, //Radio path of A/B/C/D -* u4Byte Offset, //The target address to be read +* u32 Offset, //The target address to be read * * Output: None -* Return: u4Byte reback value +* Return: u32 reback value * Note: Threre are three types of serial operations: * 1. Software serial write * 2. Hardware LSSI-Low Speed Serial Interface @@ -472,8 +472,8 @@ phy_RFSerialRead( * Input: * PADAPTER Adapter, * u8 eRFPath, //Radio path of A/B/C/D -* u4Byte Offset, //The target address to be read -* u4Byte Data //The new register Data in the target bit position +* u32 Offset, //The target address to be read +* u32 Data //The new register Data in the target bit position * //of the target to be read * * Output: None @@ -540,12 +540,12 @@ phy_RFSerialWrite( * Input: * PADAPTER Adapter, * u8 eRFPath, //Radio path of A/B/C/D -* u4Byte RegAddr, //The target address to be read -* u4Byte BitMask //The target bit position in the target address +* u32 RegAddr, //The target address to be read +* u32 BitMask //The target bit position in the target address * //to be read * * Output: None -* Return: u4Byte Readback value +* Return: u32 Readback value * Note: This function is equal to "GetRFRegSetting" in PHY programming guide */ u32 @@ -582,10 +582,10 @@ PHY_QueryRFReg8188E( * Input: * PADAPTER Adapter, * u8 eRFPath, //Radio path of A/B/C/D -* u4Byte RegAddr, //The target address to be modified -* u4Byte BitMask //The target bit position in the target address +* u32 RegAddr, //The target address to be modified +* u32 BitMask //The target bit position in the target address * //to be modified -* u4Byte Data //The new register Data in the target bit position +* u32 Data //The new register Data in the target bit position * //of the target address * * Output: None @@ -603,7 +603,7 @@ PHY_SetRFReg8188E( { /* HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); */ - /* u1Byte RFWaitCounter = 0; */ + /* u8 RFWaitCounter = 0; */ u32 Original_Value, BitShift; /* _irqL irqL; */ @@ -961,7 +961,7 @@ PHY_GetTxPowerLevel8188E( * We must consider RF path later!!!!!!! * * Input: PADAPTER Adapter - * u1Byte channel + * u8 channel * * Output: NONE * @@ -1343,8 +1343,8 @@ _PHY_SetBWMode88E( /* return; */ /* Added it for 20/40 mhz switch time evaluation by guangan 070531 */ - /* u4Byte NowL, NowH; */ - /* u8Byte BeginTime, EndTime; */ + /* u32 NowL, NowH; */ + /* u64 BeginTime, EndTime; */ if (pHalData->rf_chip == RF_PSEUDO_11N) { /* pHalData->SetBWModeInProgress= _FALSE; */ @@ -1361,7 +1361,7 @@ _PHY_SetBWMode88E( /* Added it for 20/40 mhz switch time evaluation by guangan 070531 */ /* NowL = PlatformEFIORead4Byte(Adapter, TSFR); */ /* NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); */ - /* BeginTime = ((u8Byte)NowH << 32) + NowL; */ + /* BeginTime = ((u64)NowH << 32) + NowL; */ /* 3 */ /* 3 */ /* <1>Set MAC register */ @@ -1370,7 +1370,7 @@ _PHY_SetBWMode88E( regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE); regRRSR_RSC = rtw_read8(Adapter, REG_RRSR + 2); - /* regBwOpMode = rtw_hal_get_hwreg(Adapter,HW_VAR_BWMODE,(pu1Byte)®BwOpMode); */ + /* regBwOpMode = rtw_hal_get_hwreg(Adapter,HW_VAR_BWMODE,(u8 *)®BwOpMode); */ switch (pHalData->current_channel_bw) { case CHANNEL_WIDTH_20: @@ -1430,7 +1430,7 @@ _PHY_SetBWMode88E( /* Added it for 20/40 mhz switch time evaluation by guangan 070531 */ /* NowL = PlatformEFIORead4Byte(Adapter, TSFR); */ /* NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); */ - /* EndTime = ((u8Byte)NowH << 32) + NowL; */ + /* EndTime = ((u64)NowH << 32) + NowL; */ /* 3<3>Set RF related register */ switch (pHalData->rf_chip) { diff --git a/hal/rtl8188e_rf6052.c b/hal/rtl8188e_rf6052.c index b088aa9..d6046ba 100644 --- a/hal/rtl8188e_rf6052.c +++ b/hal/rtl8188e_rf6052.c @@ -63,7 +63,7 @@ * * Overview: For RL6052, we must change some RF settign for 1T or 2T. * - * Input: u2Byte DataRate // 0x80-8f, 0x90-9f + * Input: u16 DataRate // 0x80-8f, 0x90-9f * * Output: NONE * diff --git a/hal/rtl8188e_xmit.c b/hal/rtl8188e_xmit.c index 9e2e51c..fef2521 100644 --- a/hal/rtl8188e_xmit.c +++ b/hal/rtl8188e_xmit.c @@ -124,12 +124,12 @@ struct EMInfo { void InsertEMContent_8188E( struct EMInfo *pEMInfo, - IN pu1Byte VirtualAddress) + IN u8 * VirtualAddress) { #if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 - u1Byte index = 0; - u4Byte dwtmp = 0; + u8 index = 0; + u32 dwtmp = 0; #endif memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE); diff --git a/hal/usb_halinit.c b/hal/usb_halinit.c index 93656e6..1961d49 100644 --- a/hal/usb_halinit.c +++ b/hal/usb_halinit.c @@ -564,7 +564,7 @@ _InitWMACSetting( PADAPTER Adapter ) { - /* u4Byte value32; */ + /* u32 value32; */ /* u16 value16; */ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); diff --git a/include/rtw_bt_mp.h b/include/rtw_bt_mp.h index b5ff910..bd60b9b 100644 --- a/include/rtw_bt_mp.h +++ b/include/rtw_bt_mp.h @@ -42,16 +42,16 @@ typedef enum _MP_BT_MODE { /* definition for BT_UP_OP_BT_SET_TX_RX_PARAMETER */ typedef struct _BT_TXRX_PARAMETERS { - u1Byte txrxChannel; - u4Byte txrxTxPktCnt; - u1Byte txrxTxPktInterval; - u1Byte txrxPayloadType; - u1Byte txrxPktType; - u2Byte txrxPayloadLen; - u4Byte txrxPktHeader; - u1Byte txrxWhitenCoeff; - u1Byte txrxBdaddr[6]; - u1Byte txrxTxGainIndex; + u8 txrxChannel; + u32 txrxTxPktCnt; + u8 txrxTxPktInterval; + u8 txrxPayloadType; + u8 txrxPktType; + u16 txrxPayloadLen; + u32 txrxPktHeader; + u8 txrxWhitenCoeff; + u8 txrxBdaddr[6]; + u8 txrxTxGainIndex; } BT_TXRX_PARAMETERS, *PBT_TXRX_PARAMETERS; /* txrxPktType */ @@ -168,10 +168,10 @@ typedef enum _BT_REPORT_TYPE { void MPTBT_Test( IN PADAPTER Adapter, - IN u1Byte opCode, - IN u1Byte byte1, - IN u1Byte byte2, - IN u1Byte byte3 + IN u8 opCode, + IN u8 byte1, + IN u8 byte2, + IN u8 byte3 ); NDIS_STATUS @@ -186,8 +186,8 @@ MPTBT_SendOidBT( void MPTBT_FwC2hBtMpCtrl( PADAPTER Adapter, - pu1Byte tmpBuf, - u1Byte length + u8 * tmpBuf, + u8 length ); void MPh2c_timeout_handle(void *FunctionContext); @@ -215,21 +215,21 @@ typedef struct _BT_RSP_CMD { typedef struct _BT_H2C { - u1Byte opCodeVer:4; - u1Byte reqNum:4; - u1Byte opCode; - u1Byte buf[100]; + u8 opCodeVer:4; + u8 reqNum:4; + u8 opCode; + u8 buf[100]; } BT_H2C, *PBT_H2C; typedef struct _BT_EXT_C2H { - u1Byte extendId; - u1Byte statusCode:4; - u1Byte retLen:4; - u1Byte opCodeVer:4; - u1Byte reqNum:4; - u1Byte buf[100]; + u8 extendId; + u8 statusCode:4; + u8 retLen:4; + u8 opCodeVer:4; + u8 reqNum:4; + u8 buf[100]; } BT_EXT_C2H, *PBT_EXT_C2H; diff --git a/include/rtw_btcoex.h b/include/rtw_btcoex.h index 08eb8c8..64c91ae 100644 --- a/include/rtw_btcoex.h +++ b/include/rtw_btcoex.h @@ -93,35 +93,35 @@ typedef enum _BTCOEX_SUSPEND_STATE { #define BT_INFO_LEN 8 typedef struct _HCI_LINK_INFO { - u2Byte ConnectHandle; - u1Byte IncomingTrafficMode; - u1Byte OutgoingTrafficMode; - u1Byte BTProfile; - u1Byte BTCoreSpec; + u16 ConnectHandle; + u8 IncomingTrafficMode; + u8 OutgoingTrafficMode; + u8 BTProfile; + u8 BTCoreSpec; s1Byte BT_RSSI; - u1Byte TrafficProfile; - u1Byte linkRole; + u8 TrafficProfile; + u8 linkRole; } HCI_LINK_INFO, *PHCI_LINK_INFO; #define MAX_BT_ACL_LINK_NUM 8 typedef struct _HCI_EXT_CONFIG { HCI_LINK_INFO aclLink[MAX_BT_ACL_LINK_NUM]; - u1Byte btOperationCode; - u2Byte CurrentConnectHandle; - u1Byte CurrentIncomingTrafficMode; - u1Byte CurrentOutgoingTrafficMode; + u8 btOperationCode; + u16 CurrentConnectHandle; + u8 CurrentIncomingTrafficMode; + u8 CurrentOutgoingTrafficMode; - u1Byte NumberOfACL; - u1Byte NumberOfSCO; - u1Byte CurrentBTStatus; - u2Byte HCIExtensionVer; + u8 NumberOfACL; + u8 NumberOfSCO; + u8 CurrentBTStatus; + u16 HCIExtensionVer; bool bEnableWifiScanNotify; } HCI_EXT_CONFIG, *PHCI_EXT_CONFIG; typedef struct _HCI_PHY_LINK_BSS_INFO { - u2Byte bdCap; /* capability information */ + u16 bdCap; /* capability information */ /* Qos related. Added by Annie, 2005-11-01. */ /* BSS_QOS BssQos; */ @@ -318,15 +318,15 @@ typedef struct _BT_MGNT { bool bLogLinkInProgress; bool bPhyLinkInProgress; bool bPhyLinkInProgressStartLL; - u1Byte BtCurrentPhyLinkhandle; - u2Byte BtCurrentLogLinkhandle; - u1Byte CurrentConnectEntryNum; - u1Byte DisconnectEntryNum; - u1Byte CurrentBTConnectionCnt; + u8 BtCurrentPhyLinkhandle; + u16 BtCurrentLogLinkhandle; + u8 CurrentConnectEntryNum; + u8 DisconnectEntryNum; + u8 CurrentBTConnectionCnt; BT_CONNECT_TYPE BTCurrentConnectType; BT_CONNECT_TYPE BTReceiveConnectPkt; - u1Byte BTAuthCount; - u1Byte BTAsocCount; + u8 BTAuthCount; + u8 BTAsocCount; bool bStartSendSupervisionPkt; bool BtOperationOn; bool BTNeedAMPStatusChg; @@ -336,7 +336,7 @@ typedef struct _BT_MGNT { bool bNeedNotifyAMPNoCap; bool bCreateSpportQos; bool bSupportProfile; - u1Byte BTChannel; + u8 BTChannel; bool CheckChnlIsSuit; bool bBtScan; bool btLogoTest; diff --git a/include/rtw_mp.h b/include/rtw_mp.h index d33cfbc..a7a4a27 100644 --- a/include/rtw_mp.h +++ b/include/rtw_mp.h @@ -78,33 +78,6 @@ struct mp_tx { #define MP_MAX_LINES 1000 #define MP_MAX_LINES_BYTES 256 -#define u1Byte u8 -#define s1Byte s8 -#define u4Byte u32 -#define s4Byte s32 -#define u1Byte u8 -#define pu1Byte u8* - -#define u2Byte u16 -#define pu2Byte u16* - -#define u4Byte u32 -#define pu4Byte u32* - -#define u8Byte u64 -#define pu8Byte u64* - -#define s1Byte s8 -#define ps1Byte s8* - -#define s2Byte s16 -#define ps2Byte s16* - -#define s4Byte s32 -#define ps4Byte s32* - -#define s8Byte s64 -#define ps8Byte s64* typedef struct _RT_PMAC_PKT_INFO { u8 MCS; @@ -236,9 +209,9 @@ typedef struct _MPT_CONTEXT { u32 MptAckCounter; /* SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~! */ - /* s1Byte BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT]; */ - /* s1Byte BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES]; */ - /* s4Byte RfReadLine[2]; */ + /* s8 BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT]; */ + /* s8 BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES]; */ + /* s32 RfReadLine[2]; */ u8 APK_bound[2]; /* for APK path A/path B */ bool bMptIndexEven; @@ -249,15 +222,15 @@ typedef struct _MPT_CONTEXT { u8 backup0x52_RF_A; u8 backup0x52_RF_B; - u4Byte backup0x58_RF_A; - u4Byte backup0x58_RF_B; + u32 backup0x58_RF_A; + u32 backup0x58_RF_B; - u1Byte h2cReqNum; - u1Byte c2hBuf[32]; + u8 h2cReqNum; + u8 c2hBuf[32]; - u1Byte btInBuf[100]; + u8 btInBuf[100]; u32 mptOutLen; - u1Byte mptOutBuf[100]; + u8 mptOutBuf[100]; RT_PMAC_TX_INFO PMacTxInfo; RT_PMAC_PKT_INFO PMacPktInfo; u8 HWTxmode;