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rtl8188eu: Fix sparse issues in core/rtw_mp.c
For the most part, these are endian related. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
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8a098e4f68
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80c723e738
4 changed files with 45 additions and 97 deletions
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@ -392,7 +392,7 @@ static VOID PHY_SetRFPathSwitch_default(
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}
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void mpt_InitHWConfig(PADAPTER Adapter)
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static void mpt_InitHWConfig(PADAPTER Adapter)
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{
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if (IS_HARDWARE_TYPE_8723B(Adapter)) {
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/* TODO: <20130114, Kordan> The following setting is only for DPDT and Fixed board type. */
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@ -1247,7 +1247,7 @@ int SetTxPower(PADAPTER pAdapter)
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return _TRUE;
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}
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void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset)
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static void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset)
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{
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u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D, tmpAGC;
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@ -1427,7 +1427,7 @@ void fill_txdesc_for_mp(PADAPTER padapter, u8 *ptxdesc)
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}
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#if defined(CONFIG_RTL8188E)
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void fill_tx_desc_8188e(PADAPTER padapter)
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static void fill_tx_desc_8188e(PADAPTER padapter)
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{
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struct mp_priv *pmp_priv = &padapter->mppriv;
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struct tx_desc *desc = (struct tx_desc *)&(pmp_priv->tx.desc);
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@ -345,107 +345,55 @@ struct ieee_ibss_seq {
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_list list;
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};
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#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) || defined(PLATFORM_FREEBSD)
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struct rtw_ieee80211_hdr {
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u16 frame_ctl;
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u16 duration_id;
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__le16 frame_ctl;
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__le16 duration_id;
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u8 addr1[ETH_ALEN];
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u8 addr2[ETH_ALEN];
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u8 addr3[ETH_ALEN];
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u16 seq_ctl;
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__le16 seq_ctl;
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u8 addr4[ETH_ALEN];
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} __attribute__((packed));
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struct rtw_ieee80211_hdr_3addr {
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u16 frame_ctl;
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u16 duration_id;
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__le16 frame_ctl;
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__le16 duration_id;
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u8 addr1[ETH_ALEN];
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u8 addr2[ETH_ALEN];
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u8 addr3[ETH_ALEN];
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u16 seq_ctl;
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__le16 seq_ctl;
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} __attribute__((packed));
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struct rtw_ieee80211_hdr_qos {
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u16 frame_ctl;
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u16 duration_id;
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__le16 frame_ctl;
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__le16 duration_id;
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u8 addr1[ETH_ALEN];
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u8 addr2[ETH_ALEN];
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u8 addr3[ETH_ALEN];
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u16 seq_ctl;
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__le16 seq_ctl;
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u8 addr4[ETH_ALEN];
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u16 qc;
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__le16 qc;
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} __attribute__((packed));
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struct rtw_ieee80211_hdr_3addr_qos {
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u16 frame_ctl;
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u16 duration_id;
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__le16 frame_ctl;
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__le16 duration_id;
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u8 addr1[ETH_ALEN];
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u8 addr2[ETH_ALEN];
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u8 addr3[ETH_ALEN];
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u16 seq_ctl;
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u16 qc;
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__le16 seq_ctl;
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__le16 qc;
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} __attribute__((packed));
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struct eapol {
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u8 snap[6];
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u16 ethertype;
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__le16 ethertype;
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u8 version;
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u8 type;
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u16 length;
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__le16 length;
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} __attribute__((packed));
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#endif
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#ifdef PLATFORM_WINDOWS
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#pragma pack(1)
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struct rtw_ieee80211_hdr {
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u16 frame_ctl;
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u16 duration_id;
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u8 addr1[ETH_ALEN];
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u8 addr2[ETH_ALEN];
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u8 addr3[ETH_ALEN];
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u16 seq_ctl;
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u8 addr4[ETH_ALEN];
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};
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struct rtw_ieee80211_hdr_3addr {
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u16 frame_ctl;
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u16 duration_id;
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u8 addr1[ETH_ALEN];
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u8 addr2[ETH_ALEN];
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u8 addr3[ETH_ALEN];
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u16 seq_ctl;
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};
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struct rtw_ieee80211_hdr_qos {
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struct rtw_ieee80211_hdr wlan_hdr;
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u16 qc;
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};
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struct rtw_ieee80211_hdr_3addr_qos {
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struct rtw_ieee80211_hdr_3addr wlan_hdr;
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u16 qc;
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};
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struct eapol {
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u8 snap[6];
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u16 ethertype;
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u8 version;
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u8 type;
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u16 length;
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};
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#pragma pack()
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#endif
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enum eap_type {
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EAP_PACKET = 0,
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EAPOL_START,
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@ -257,43 +257,43 @@ struct tx_buf_desc {
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#elif (defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)) && defined(CONFIG_PCI_HCI) /* 8192ee or 8814ae */
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/* 8192EE_TODO */
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struct tx_desc {
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unsigned int txdw0;
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unsigned int txdw1;
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unsigned int txdw2;
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unsigned int txdw3;
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unsigned int txdw4;
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unsigned int txdw5;
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unsigned int txdw6;
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unsigned int txdw7;
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__le32 txdw0;
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__le32 txdw1;
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__le32 txdw2;
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__le32 txdw3;
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__le32 txdw4;
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__le32 txdw5;
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__le32 txdw6;
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__le32 txdw7;
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};
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#else
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struct tx_desc {
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unsigned int txdw0;
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unsigned int txdw1;
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unsigned int txdw2;
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unsigned int txdw3;
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unsigned int txdw4;
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unsigned int txdw5;
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unsigned int txdw6;
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unsigned int txdw7;
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__le32 txdw0;
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__le32 txdw1;
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__le32 txdw2;
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__le32 txdw3;
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__le32 txdw4;
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__le32 txdw5;
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__le32 txdw6;
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__le32 txdw7;
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#if defined(TXDESC_40_BYTES) || defined(TXDESC_64_BYTES)
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unsigned int txdw8;
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unsigned int txdw9;
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__le32 txdw8;
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__le32 txdw9;
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#endif /* TXDESC_40_BYTES */
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#ifdef TXDESC_64_BYTES
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unsigned int txdw10;
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unsigned int txdw11;
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__le32 txdw10;
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__le32 txdw11;
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/* 2008/05/15 MH Because PCIE HW memory R/W 4K limit. And now, our descriptor */
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/* size is 40 bytes. If you use more than 102 descriptor( 103*40>4096), HW will execute */
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/* memoryR/W CRC error. And then all DMA fetch will fail. We must decrease descriptor */
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/* number or enlarge descriptor size as 64 bytes. */
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unsigned int txdw12;
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unsigned int txdw13;
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unsigned int txdw14;
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unsigned int txdw15;
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__le32 txdw12;
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__le32 txdw13;
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__le32 txdw14;
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__le32 txdw15;
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#endif
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};
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#endif
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@ -374,8 +374,8 @@ enum WIFI_REG_DOMAIN {
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#define set_frame_sub_type(pbuf, type) \
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do { \
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*(unsigned short *)(pbuf) &= cpu_to_le16(~(BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2))); \
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*(unsigned short *)(pbuf) |= cpu_to_le16(type); \
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*(__le16 *)(pbuf) &= cpu_to_le16(~(BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2))); \
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*(__le16 *)(pbuf) |= cpu_to_le16(type); \
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} while (0)
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