From 8576d2647ad5c92d60f169a5a72aa5c41be94a41 Mon Sep 17 00:00:00 2001 From: Larry Finger Date: Thu, 8 Nov 2018 18:50:24 -0600 Subject: [PATCH] rtl8188eu: Remove more dead code for DM_ODM_SUPPORT_TYPE Signed-off-by: Larry Finger --- hal/hal8188e_s_fw.c | 8 +- hal/hal8188e_s_fw.h | 5 +- hal/hal8188e_t_fw.c | 8 +- hal/hal8188e_t_fw.h | 4 +- hal/phydm/phydm_acs.c | 971 ---------------------------- hal/phydm/phydm_beamforming.h | 344 ---------- hal/phydm/phydm_dynamictxpower.h | 29 +- hal/phydm/phydm_interface.h | 47 +- hal/phydm/phydm_powertracking_ce.c | 79 --- hal/phydm/phydm_powertracking_win.h | 299 --------- hal/phydm/phydm_regconfig8188e.c | 19 - hal/phydm/txbf/phydm_hal_txbf_api.c | 113 +--- hal/phydm/txbf/phydm_hal_txbf_api.h | 3 - 13 files changed, 13 insertions(+), 1916 deletions(-) delete mode 100644 hal/phydm/phydm_powertracking_win.h diff --git a/hal/hal8188e_s_fw.c b/hal/hal8188e_s_fw.c index ae10bf9..2c8e969 100644 --- a/hal/hal8188e_s_fw.c +++ b/hal/hal8188e_s_fw.c @@ -24,7 +24,7 @@ #ifdef LOAD_FW_HEADER_FROM_DRIVER -#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))) +#if (defined(CONFIG_AP_WOWLAN)) u8 array_mp_8188e_s_fw_ap[] = { 0xE3, 0x88, 0x20, 0x00, 0x1C, 0x00, 0x00, 0x00, @@ -2038,9 +2038,7 @@ u8 array_mp_8188e_s_fw_ap[] = { u32 array_length_mp_8188e_s_fw_ap = 16054; -#endif /*defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))*/ - -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE)) +#endif /*defined(CONFIG_AP_WOWLAN) */ u8 array_mp_8188e_s_fw_nic[] = { 0xE3, 0x88, 0x10, 0x00, 0x1C, 0x00, 0x00, 0x00, @@ -7296,8 +7294,6 @@ u32 array_length_mp_8188e_s_fw_wowlan = 22710; #endif /*CONFIG_WOWLAN*/ -#endif - #endif /* end of LOAD_FW_HEADER_FROM_DRIVER */ #endif /* end of CONFIG_SFW_SUPPORTED */ diff --git a/hal/hal8188e_s_fw.h b/hal/hal8188e_s_fw.h index 194615e..b359091 100644 --- a/hal/hal8188e_s_fw.h +++ b/hal/hal8188e_s_fw.h @@ -24,21 +24,18 @@ #ifdef CONFIG_SFW_SUPPORTED #ifdef LOAD_FW_HEADER_FROM_DRIVER -#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))) +#if defined(CONFIG_AP_WOWLAN) extern u8 array_mp_8188e_s_fw_ap[16054]; extern u32 array_length_mp_8188e_s_fw_ap; #endif -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE)) extern u8 array_mp_8188e_s_fw_nic[19206]; extern u32 array_length_mp_8188e_s_fw_nic; #ifdef CONFIG_WOWLAN extern u8 array_mp_8188e_s_fw_wowlan[22710]; extern u32 array_length_mp_8188e_s_fw_wowlan; #endif /*CONFIG_WOWLAN*/ -#endif #endif /* end of LOAD_FW_HEADER_FROM_DRIVER */ - #endif /* end of CONFIG_SFW_SUPPORTED */ #endif diff --git a/hal/hal8188e_t_fw.c b/hal/hal8188e_t_fw.c index 67797ef..8dbf148 100644 --- a/hal/hal8188e_t_fw.c +++ b/hal/hal8188e_t_fw.c @@ -23,7 +23,7 @@ #ifdef LOAD_FW_HEADER_FROM_DRIVER -#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))) +#if (defined(CONFIG_AP_WOWLAN)) u8 array_mp_8188e_t_fw_ap[] = { 0xE1, 0x88, 0x20, 0x00, 0x1C, 0x00, 0x00, 0x00, @@ -1968,9 +1968,7 @@ u8 array_mp_8188e_t_fw_ap[] = { u32 array_length_mp_8188e_t_fw_ap = 15502; -#endif /*defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))*/ - -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE)) +#endif /*defined(CONFIG_AP_WOWLAN)*/ u8 array_mp_8188e_t_fw_nic[] = { 0xE1, 0x88, 0x10, 0x00, 0x1C, 0x00, 0x00, 0x00, @@ -7744,7 +7742,5 @@ u32 array_length_mp_8188e_t_fw_wowlan = 16388; #endif /*CONFIG_WOWLAN*/ -#endif - #endif /* end of LOAD_FW_HEADER_FROM_DRIVER */ diff --git a/hal/hal8188e_t_fw.h b/hal/hal8188e_t_fw.h index c396e82..c65a441 100644 --- a/hal/hal8188e_t_fw.h +++ b/hal/hal8188e_t_fw.h @@ -22,12 +22,11 @@ #define _FW_HEADER_8188E_T_H #ifdef LOAD_FW_HEADER_FROM_DRIVER -#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))) +#if (defined(CONFIG_AP_WOWLAN)) extern u8 array_mp_8188e_t_fw_ap[15502]; extern u32 array_length_mp_8188e_t_fw_ap; #endif -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE)) extern u8 array_mp_8188e_t_fw_nic[15262]; extern u32 array_length_mp_8188e_t_fw_nic; extern u8 array_mp_8188e_t_fw_nic_89em[14364]; @@ -36,7 +35,6 @@ extern u32 array_length_mp_8188e_t_fw_nic_89em; extern u8 array_mp_8188e_t_fw_wowlan[16388]; extern u32 array_length_mp_8188e_t_fw_wowlan; #endif /*CONFIG_WOWLAN*/ -#endif #endif /* end of LOAD_FW_HEADER_FROM_DRIVER */ #endif diff --git a/hal/phydm/phydm_acs.c b/hal/phydm/phydm_acs.c index 0f737f5..77a79c5 100644 --- a/hal/phydm/phydm_acs.c +++ b/hal/phydm/phydm_acs.c @@ -34,7 +34,6 @@ odm_get_auto_channel_select_result( struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void; struct _ACS_ *p_acs = &p_dm_odm->dm_acs; -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) if (band == ODM_BAND_2_4G) { ODM_RT_TRACE(p_dm_odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[struct _ACS_] odm_get_auto_channel_select_result(): clean_channel_2g(%d)\n", p_acs->clean_channel_2g)); return (u8)p_acs->clean_channel_2g; @@ -42,10 +41,6 @@ odm_get_auto_channel_select_result( ODM_RT_TRACE(p_dm_odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[struct _ACS_] odm_get_auto_channel_select_result(): clean_channel_5g(%d)\n", p_acs->clean_channel_5g)); return (u8)p_acs->clean_channel_5g; } -#else - return (u8)p_acs->clean_channel_2g; -#endif - } static void @@ -54,7 +49,6 @@ odm_auto_channel_select_setting( bool is_enable ) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void; u16 period = 0x2710;/* 40ms in default */ u16 nhm_type = 0x7; @@ -76,7 +70,6 @@ odm_auto_channel_select_setting( odm_write_2byte(p_dm_odm, ODM_REG_CCX_PERIOD_11N + 2, period); /* 0x894[31:16]=0x2710 Time duration for NHM unit: 4us, 0x2710=40ms */ /* odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, BIT(10)|BIT9|BIT8, nhm_type); */ /* 0x890[9:8]=3 enable CCX */ } -#endif } void @@ -84,7 +77,6 @@ odm_auto_channel_select_init( void *p_dm_void ) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void; struct _ACS_ *p_acs = &p_dm_odm->dm_acs; u8 i; @@ -111,7 +103,6 @@ odm_auto_channel_select_init( p_acs->channel_info_5g[1][i] = 0; } } -#endif } void @@ -119,7 +110,6 @@ odm_auto_channel_select_reset( void *p_dm_void ) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void; struct _ACS_ *p_acs = &p_dm_odm->dm_acs; @@ -133,7 +123,6 @@ odm_auto_channel_select_reset( odm_auto_channel_select_setting(p_dm_odm, true); /* for 20ms measurement */ phydm_nhm_counter_statistics_reset(p_dm_odm); -#endif } void @@ -142,7 +131,6 @@ odm_auto_channel_select( u8 channel ) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void; struct _ACS_ *p_acs = &p_dm_odm->dm_acs; u8 channel_idx = 0, search_idx = 0; @@ -192,963 +180,4 @@ odm_auto_channel_select( /* Need to do */ p_acs->clean_channel_5g = channel; } -#endif } - -#if (DM_ODM_SUPPORT_TYPE & ODM_AP) - -void -phydm_auto_channel_select_setting_ap( - void *p_dm_void, - u32 setting, /* 0: STORE_DEFAULT_NHM_SETTING; 1: RESTORE_DEFAULT_NHM_SETTING, 2: ACS_NHM_SETTING */ - u32 acs_step -) -{ - struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void; - struct rtl8192cd_priv *priv = p_dm_odm->priv; - struct _ACS_ *p_acs = &p_dm_odm->dm_acs; - - ODM_RT_TRACE(p_dm_odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectSettingAP()=========>\n")); - - /* 3 Store Default setting */ - if (setting == STORE_DEFAULT_NHM_SETTING) { - ODM_RT_TRACE(p_dm_odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("STORE_DEFAULT_NHM_SETTING\n")); - - if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) { /* store reg0x990, reg0x994, reg0x998, reg0x99c, Reg0x9a0 */ - p_acs->reg0x990 = odm_read_4byte(p_dm_odm, ODM_REG_CCX_PERIOD_11AC); /* reg0x990 */ - p_acs->reg0x994 = odm_read_4byte(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC); /* reg0x994 */ - p_acs->reg0x998 = odm_read_4byte(p_dm_odm, ODM_REG_NHM_TH3_TO_TH0_11AC); /* reg0x998 */ - p_acs->reg0x99c = odm_read_4byte(p_dm_odm, ODM_REG_NHM_TH7_TO_TH4_11AC); /* Reg0x99c */ - p_acs->reg0x9a0 = odm_read_1byte(p_dm_odm, ODM_REG_NHM_TH8_11AC); /* Reg0x9a0, u8 */ - } else if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) { - p_acs->reg0x890 = odm_read_4byte(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N); /* reg0x890 */ - p_acs->reg0x894 = odm_read_4byte(p_dm_odm, ODM_REG_CCX_PERIOD_11N); /* reg0x894 */ - p_acs->reg0x898 = odm_read_4byte(p_dm_odm, ODM_REG_NHM_TH3_TO_TH0_11N); /* reg0x898 */ - p_acs->reg0x89c = odm_read_4byte(p_dm_odm, ODM_REG_NHM_TH7_TO_TH4_11N); /* Reg0x89c */ - p_acs->reg0xe28 = odm_read_1byte(p_dm_odm, ODM_REG_NHM_TH8_11N); /* Reg0xe28, u8 */ - } - } - - /* 3 Restore Default setting */ - else if (setting == RESTORE_DEFAULT_NHM_SETTING) { - ODM_RT_TRACE(p_dm_odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("RESTORE_DEFAULT_NHM_SETTING\n")); - - if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) { /* store reg0x990, reg0x994, reg0x998, reg0x99c, Reg0x9a0 */ - odm_write_4byte(p_dm_odm, ODM_REG_CCX_PERIOD_11AC, p_acs->reg0x990); - odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC, p_acs->reg0x994); - odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH3_TO_TH0_11AC, p_acs->reg0x998); - odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH7_TO_TH4_11AC, p_acs->reg0x99c); - odm_write_1byte(p_dm_odm, ODM_REG_NHM_TH8_11AC, p_acs->reg0x9a0); - } else if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) { - odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, p_acs->reg0x890); - odm_write_4byte(p_dm_odm, ODM_REG_CCX_PERIOD_11AC, p_acs->reg0x894); - odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH3_TO_TH0_11N, p_acs->reg0x898); - odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH7_TO_TH4_11N, p_acs->reg0x89c); - odm_write_1byte(p_dm_odm, ODM_REG_NHM_TH8_11N, p_acs->reg0xe28); - } - } - - /* 3 struct _ACS_ setting */ - else if (setting == ACS_NHM_SETTING) { - ODM_RT_TRACE(p_dm_odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("ACS_NHM_SETTING\n")); - u16 period; - period = 0x61a8; - p_acs->acs_step = acs_step; - - if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) { - /* 4 Set NHM period, 0x990[31:16]=0x61a8, Time duration for NHM unit: 4us, 0x61a8=100ms */ - odm_write_2byte(p_dm_odm, ODM_REG_CCX_PERIOD_11AC + 2, period); - /* 4 Set NHM ignore_cca=1, ignore_txon=1, ccx_en=0 */ - odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC, BIT(8) | BIT(9) | BIT(10), 3); - - if (p_acs->acs_step == 0) { - /* 4 Set IGI */ - odm_set_bb_reg(p_dm_odm, 0xc50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x3E); - if (get_rf_mimo_mode(priv) != MIMO_1T1R) - odm_set_bb_reg(p_dm_odm, 0xe50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x3E); - - /* 4 Set struct _ACS_ NHM threshold */ - odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0x82786e64); - odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffff8c); - odm_write_1byte(p_dm_odm, ODM_REG_NHM_TH8_11AC, 0xff); - odm_write_2byte(p_dm_odm, ODM_REG_NHM_TH9_TH10_11AC + 2, 0xffff); - - } else if (p_acs->acs_step == 1) { - /* 4 Set IGI */ - odm_set_bb_reg(p_dm_odm, 0xc50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x2A); - if (get_rf_mimo_mode(priv) != MIMO_1T1R) - odm_set_bb_reg(p_dm_odm, 0xe50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x2A); - - /* 4 Set struct _ACS_ NHM threshold */ - odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0x5a50463c); - odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffff64); - - } - - } else if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) { - /* 4 Set NHM period, 0x894[31:16]=0x61a8, Time duration for NHM unit: 4us, 0x61a8=100ms */ - odm_write_2byte(p_dm_odm, ODM_REG_CCX_PERIOD_11AC + 2, period); - /* 4 Set NHM ignore_cca=1, ignore_txon=1, ccx_en=0 */ - odm_set_bb_reg(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N, BIT(8) | BIT(9) | BIT(10), 3); - - if (p_acs->acs_step == 0) { - /* 4 Set IGI */ - odm_set_bb_reg(p_dm_odm, 0xc50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x3E); - if (get_rf_mimo_mode(priv) != MIMO_1T1R) - odm_set_bb_reg(p_dm_odm, 0xc58, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x3E); - - /* 4 Set struct _ACS_ NHM threshold */ - odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0x82786e64); - odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffff8c); - odm_write_1byte(p_dm_odm, ODM_REG_NHM_TH8_11N, 0xff); - odm_write_2byte(p_dm_odm, ODM_REG_NHM_TH9_TH10_11N + 2, 0xffff); - - } else if (p_acs->acs_step == 1) { - /* 4 Set IGI */ - odm_set_bb_reg(p_dm_odm, 0xc50, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x2A); - if (get_rf_mimo_mode(priv) != MIMO_1T1R) - odm_set_bb_reg(p_dm_odm, 0xc58, BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6), 0x2A); - - /* 4 Set struct _ACS_ NHM threshold */ - odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0x5a50463c); - odm_write_4byte(p_dm_odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffff64); - - } - } - } - -} - -void -phydm_get_nhm_statistics_ap( - void *p_dm_void, - u32 idx, /* @ 2G, Real channel number = idx+1 */ - u32 acs_step -) -{ - struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void; - struct rtl8192cd_priv *priv = p_dm_odm->priv; - struct _ACS_ *p_acs = &p_dm_odm->dm_acs; - u32 value32 = 0; - u8 i; - - p_acs->acs_step = acs_step; - - if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) { - /* 4 Check if NHM result is ready */ - for (i = 0; i < 20; i++) { - - ODM_delay_ms(1); - if (odm_get_bb_reg(p_dm_odm, REG_FPGA0_PSD_REPORT, BIT(17))) - break; - } - - /* 4 Get NHM Statistics */ - if (p_acs->acs_step == 1) { - - value32 = odm_read_4byte(p_dm_odm, ODM_REG_NHM_CNT7_TO_CNT4_11N); - - p_acs->nhm_cnt[idx][9] = (value32 & MASKBYTE1) >> 8; - p_acs->nhm_cnt[idx][8] = (value32 & MASKBYTE0); - - value32 = odm_read_4byte(p_dm_odm, ODM_REG_NHM_CNT_11N); /* ODM_REG_NHM_CNT3_TO_CNT0_11N */ - - p_acs->nhm_cnt[idx][7] = (value32 & MASKBYTE3) >> 24; - p_acs->nhm_cnt[idx][6] = (value32 & MASKBYTE2) >> 16; - p_acs->nhm_cnt[idx][5] = (value32 & MASKBYTE1) >> 8; - - } else if (p_acs->acs_step == 2) { - - value32 = odm_read_4byte(p_dm_odm, ODM_REG_NHM_CNT_11N); /* ODM_REG_NHM_CNT3_TO_CNT0_11N */ - - p_acs->nhm_cnt[idx][4] = odm_read_1byte(p_dm_odm, ODM_REG_NHM_CNT7_TO_CNT4_11N); - p_acs->nhm_cnt[idx][3] = (value32 & MASKBYTE3) >> 24; - p_acs->nhm_cnt[idx][2] = (value32 & MASKBYTE2) >> 16; - p_acs->nhm_cnt[idx][1] = (value32 & MASKBYTE1) >> 8; - p_acs->nhm_cnt[idx][0] = (value32 & MASKBYTE0); - } - } else if (p_dm_odm->support_ic_type & ODM_IC_11AC_SERIES) { - /* 4 Check if NHM result is ready */ - for (i = 0; i < 20; i++) { - - ODM_delay_ms(1); - if (odm_get_bb_reg(p_dm_odm, ODM_REG_NHM_DUR_READY_11AC, BIT(16))) - break; - } - - if (p_acs->acs_step == 1) { - - value32 = odm_read_4byte(p_dm_odm, ODM_REG_NHM_CNT7_TO_CNT4_11AC); - - p_acs->nhm_cnt[idx][9] = (value32 & MASKBYTE1) >> 8; - p_acs->nhm_cnt[idx][8] = (value32 & MASKBYTE0); - - value32 = odm_read_4byte(p_dm_odm, ODM_REG_NHM_CNT_11AC); /* ODM_REG_NHM_CNT3_TO_CNT0_11AC */ - - p_acs->nhm_cnt[idx][7] = (value32 & MASKBYTE3) >> 24; - p_acs->nhm_cnt[idx][6] = (value32 & MASKBYTE2) >> 16; - p_acs->nhm_cnt[idx][5] = (value32 & MASKBYTE1) >> 8; - - } else if (p_acs->acs_step == 2) { - - value32 = odm_read_4byte(p_dm_odm, ODM_REG_NHM_CNT_11AC); /* ODM_REG_NHM_CNT3_TO_CNT0_11AC */ - - p_acs->nhm_cnt[idx][4] = odm_read_1byte(p_dm_odm, ODM_REG_NHM_CNT7_TO_CNT4_11AC); - p_acs->nhm_cnt[idx][3] = (value32 & MASKBYTE3) >> 24; - p_acs->nhm_cnt[idx][2] = (value32 & MASKBYTE2) >> 16; - p_acs->nhm_cnt[idx][1] = (value32 & MASKBYTE1) >> 8; - p_acs->nhm_cnt[idx][0] = (value32 & MASKBYTE0); - } - } - -} - - -/* #define ACS_DEBUG_INFO */ /* acs debug default off */ -#if 0 -int phydm_AutoChannelSelectAP( - void *p_dm_void, - u32 ACS_Type, /* 0: RXCount_Type, 1:NHM_Type */ - u32 available_chnl_num /* amount of all channels */ -) -{ - struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void; - struct _ACS_ *p_acs = &p_dm_odm->dm_acs; - struct rtl8192cd_priv *priv = p_dm_odm->priv; - - static u32 score2G[MAX_2G_CHANNEL_NUM], score5G[MAX_5G_CHANNEL_NUM]; - u32 score[MAX_BSS_NUM], use_nhm = 0; - u32 minScore = 0xffffffff; - u32 tmpScore, tmpIdx = 0; - u32 traffic_check = 0; - u32 fa_count_weighting = 1; - int i, j, idx = 0, idx_2G_end = -1, idx_5G_begin = -1, minChan = 0; - struct bss_desc *pBss = NULL; - -#ifdef _DEBUG_RTL8192CD_ - char tmpbuf[400]; - int len = 0; -#endif - - memset(score2G, '\0', sizeof(score2G)); - memset(score5G, '\0', sizeof(score5G)); - - for (i = 0; i < priv->available_chnl_num; i++) { - if (priv->available_chnl[i] <= 14) - idx_2G_end = i; - else - break; - } - - for (i = 0; i < priv->available_chnl_num; i++) { - if (priv->available_chnl[i] > 14) { - idx_5G_begin = i; - break; - } - } - - /* DELETE */ -#ifndef CONFIG_RTL_NEW_AUTOCH - for (i = 0; i < priv->site_survey->count; i++) { - pBss = &priv->site_survey->bss[i]; - for (idx = 0; idx < priv->available_chnl_num; idx++) { - if (pBss->channel == priv->available_chnl[idx]) { - if (pBss->channel <= 14) - setChannelScore(idx, score2G, 0, MAX_2G_CHANNEL_NUM - 1); - else - score5G[idx - idx_5G_begin] += 5; - break; - } - } - } -#endif - - if (idx_2G_end >= 0) - for (i = 0; i <= idx_2G_end; i++) - score[i] = score2G[i]; - if (idx_5G_begin >= 0) - for (i = idx_5G_begin; i < priv->available_chnl_num; i++) - score[i] = score5G[i - idx_5G_begin]; - -#ifdef CONFIG_RTL_NEW_AUTOCH - { - u32 y, ch_begin = 0, ch_end = priv->available_chnl_num; - - u32 do_ap_check = 1, ap_ratio = 0; - - if (idx_2G_end >= 0) - ch_end = idx_2G_end + 1; - if (idx_5G_begin >= 0) - ch_begin = idx_5G_begin; - -#ifdef ACS_DEBUG_INFO/* for debug */ - printk("\n"); - for (y = ch_begin; y < ch_end; y++) - printk("1. init: chnl[%d] 20M_rx[%d] 40M_rx[%d] fa_cnt[%d] score[%d]\n", - priv->available_chnl[y], - priv->chnl_ss_mac_rx_count[y], - priv->chnl_ss_mac_rx_count_40M[y], - priv->chnl_ss_fa_count[y], - score[y]); - printk("\n"); -#endif - -#if defined(CONFIG_RTL_88E_SUPPORT) || defined(CONFIG_WLAN_HAL_8192EE) - if (p_dm_odm->support_ic_type & (ODM_RTL8188E | ODM_RTL8192E) && priv->pmib->dot11RFEntry.acs_type) { - u32 tmp_score[MAX_BSS_NUM]; - memcpy(tmp_score, score, sizeof(score)); - if (find_clean_channel(priv, ch_begin, ch_end, tmp_score)) { - /* memcpy(score, tmp_score, sizeof(score)); */ -#ifdef _DEBUG_RTL8192CD_ - printk("!! Found clean channel, select minimum FA channel\n"); -#endif - goto USE_CLN_CH; - } -#ifdef _DEBUG_RTL8192CD_ - printk("!! Not found clean channel, use NHM algorithm\n"); -#endif - use_nhm = 1; -USE_CLN_CH: - for (y = ch_begin; y < ch_end; y++) { - for (i = 0; i <= 9; i++) { - u32 val32 = priv->nhm_cnt[y][i]; - for (j = 0; j < i; j++) - val32 *= 3; - score[y] += val32; - } - -#ifdef _DEBUG_RTL8192CD_ - printk("nhm_cnt_%d: H<-[ %3d %3d %3d %3d %3d %3d %3d %3d %3d %3d]->L, score: %d\n", - y + 1, priv->nhm_cnt[y][9], priv->nhm_cnt[y][8], priv->nhm_cnt[y][7], - priv->nhm_cnt[y][6], priv->nhm_cnt[y][5], priv->nhm_cnt[y][4], - priv->nhm_cnt[y][3], priv->nhm_cnt[y][2], priv->nhm_cnt[y][1], - priv->nhm_cnt[y][0], score[y]); -#endif - } - - if (!use_nhm) - memcpy(score, tmp_score, sizeof(score)); - - goto choose_ch; - } -#endif - - /* For each channel, weighting behind channels with MAC RX counter */ - /* For each channel, weighting the channel with FA counter */ - - for (y = ch_begin; y < ch_end; y++) { - score[y] += 8 * priv->chnl_ss_mac_rx_count[y]; - if (priv->chnl_ss_mac_rx_count[y] > 30) - do_ap_check = 0; - if (priv->chnl_ss_mac_rx_count[y] > MAC_RX_COUNT_THRESHOLD) - traffic_check = 1; - -#ifdef RTK_5G_SUPPORT - if (*p_dm_odm->p_band_type == ODM_BAND_2_4G) -#endif - { - if ((int)(y - 4) >= (int)ch_begin) - score[y - 4] += 2 * priv->chnl_ss_mac_rx_count[y]; - if ((int)(y - 3) >= (int)ch_begin) - score[y - 3] += 8 * priv->chnl_ss_mac_rx_count[y]; - if ((int)(y - 2) >= (int)ch_begin) - score[y - 2] += 8 * priv->chnl_ss_mac_rx_count[y]; - if ((int)(y - 1) >= (int)ch_begin) - score[y - 1] += 10 * priv->chnl_ss_mac_rx_count[y]; - if ((int)(y + 1) < (int)ch_end) - score[y + 1] += 10 * priv->chnl_ss_mac_rx_count[y]; - if ((int)(y + 2) < (int)ch_end) - score[y + 2] += 8 * priv->chnl_ss_mac_rx_count[y]; - if ((int)(y + 3) < (int)ch_end) - score[y + 3] += 8 * priv->chnl_ss_mac_rx_count[y]; - if ((int)(y + 4) < (int)ch_end) - score[y + 4] += 2 * priv->chnl_ss_mac_rx_count[y]; - } - - /* this is for CH_LOAD caculation */ - if (priv->chnl_ss_cca_count[y] > priv->chnl_ss_fa_count[y]) - priv->chnl_ss_cca_count[y] -= priv->chnl_ss_fa_count[y]; - else - priv->chnl_ss_cca_count[y] = 0; - } - -#ifdef ACS_DEBUG_INFO/* for debug */ - printk("\n"); - for (y = ch_begin; y < ch_end; y++) - printk("2. after 20M check: chnl[%d] score[%d]\n", priv->available_chnl[y], score[y]); - printk("\n"); -#endif - - for (y = ch_begin; y < ch_end; y++) { - if (priv->chnl_ss_mac_rx_count_40M[y]) { - score[y] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; - if (priv->chnl_ss_mac_rx_count_40M[y] > 30) - do_ap_check = 0; - if (priv->chnl_ss_mac_rx_count_40M[y] > MAC_RX_COUNT_THRESHOLD) - traffic_check = 1; - -#ifdef RTK_5G_SUPPORT - if (*p_dm_odm->p_band_type == ODM_BAND_2_4G) -#endif - { - if ((int)(y - 6) >= (int)ch_begin) - score[y - 6] += 1 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y - 5) >= (int)ch_begin) - score[y - 5] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y - 4) >= (int)ch_begin) - score[y - 4] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y - 3) >= (int)ch_begin) - score[y - 3] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y - 2) >= (int)ch_begin) - score[y - 2] += (5 * priv->chnl_ss_mac_rx_count_40M[y]) / 2; - if ((int)(y - 1) >= (int)ch_begin) - score[y - 1] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y + 1) < (int)ch_end) - score[y + 1] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y + 2) < (int)ch_end) - score[y + 2] += (5 * priv->chnl_ss_mac_rx_count_40M[y]) / 2; - if ((int)(y + 3) < (int)ch_end) - score[y + 3] += 5 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y + 4) < (int)ch_end) - score[y + 4] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y + 5) < (int)ch_end) - score[y + 5] += 4 * priv->chnl_ss_mac_rx_count_40M[y]; - if ((int)(y + 6) < (int)ch_end) - score[y + 6] += 1 * priv->chnl_ss_mac_rx_count_40M[y]; - } - } - } - -#ifdef ACS_DEBUG_INFO/* for debug */ - printk("\n"); - for (y = ch_begin; y < ch_end; y++) - printk("3. after 40M check: chnl[%d] score[%d]\n", priv->available_chnl[y], score[y]); - printk("\n"); - printk("4. do_ap_check=%d traffic_check=%d\n", do_ap_check, traffic_check); - printk("\n"); -#endif - - if (traffic_check == 0) - fa_count_weighting = 5; - else - fa_count_weighting = 1; - - for (y = ch_begin; y < ch_end; y++) - score[y] += fa_count_weighting * priv->chnl_ss_fa_count[y]; - -#ifdef ACS_DEBUG_INFO/* for debug */ - printk("\n"); - for (y = ch_begin; y < ch_end; y++) - printk("5. after fa check: chnl[%d] score[%d]\n", priv->available_chnl[y], score[y]); - printk("\n"); -#endif - - if (do_ap_check) { - for (i = 0; i < priv->site_survey->count; i++) { - pBss = &priv->site_survey->bss[i]; - for (y = ch_begin; y < ch_end; y++) { - if (pBss->channel == priv->available_chnl[y]) { - if (pBss->channel <= 14) { -#ifdef ACS_DEBUG_INFO/* for debug */ - printk("\n"); - printk("chnl[%d] has ap rssi=%d bw[0x%02x]\n", - pBss->channel, pBss->rssi, pBss->t_stamp[1]); - printk("\n"); -#endif - if (pBss->rssi > 60) - ap_ratio = 4; - else if (pBss->rssi > 35) - ap_ratio = 2; - else - ap_ratio = 1; - - if ((pBss->t_stamp[1] & 0x6) == 0) { - score[y] += 50 * ap_ratio; - if ((int)(y - 4) >= (int)ch_begin) - score[y - 4] += 10 * ap_ratio; - if ((int)(y - 3) >= (int)ch_begin) - score[y - 3] += 20 * ap_ratio; - if ((int)(y - 2) >= (int)ch_begin) - score[y - 2] += 30 * ap_ratio; - if ((int)(y - 1) >= (int)ch_begin) - score[y - 1] += 40 * ap_ratio; - if ((int)(y + 1) < (int)ch_end) - score[y + 1] += 40 * ap_ratio; - if ((int)(y + 2) < (int)ch_end) - score[y + 2] += 30 * ap_ratio; - if ((int)(y + 3) < (int)ch_end) - score[y + 3] += 20 * ap_ratio; - if ((int)(y + 4) < (int)ch_end) - score[y + 4] += 10 * ap_ratio; - } else if ((pBss->t_stamp[1] & 0x4) == 0) { - score[y] += 50 * ap_ratio; - if ((int)(y - 3) >= (int)ch_begin) - score[y - 3] += 20 * ap_ratio; - if ((int)(y - 2) >= (int)ch_begin) - score[y - 2] += 30 * ap_ratio; - if ((int)(y - 1) >= (int)ch_begin) - score[y - 1] += 40 * ap_ratio; - if ((int)(y + 1) < (int)ch_end) - score[y + 1] += 50 * ap_ratio; - if ((int)(y + 2) < (int)ch_end) - score[y + 2] += 50 * ap_ratio; - if ((int)(y + 3) < (int)ch_end) - score[y + 3] += 50 * ap_ratio; - if ((int)(y + 4) < (int)ch_end) - score[y + 4] += 50 * ap_ratio; - if ((int)(y + 5) < (int)ch_end) - score[y + 5] += 40 * ap_ratio; - if ((int)(y + 6) < (int)ch_end) - score[y + 6] += 30 * ap_ratio; - if ((int)(y + 7) < (int)ch_end) - score[y + 7] += 20 * ap_ratio; - } else { - score[y] += 50 * ap_ratio; - if ((int)(y - 7) >= (int)ch_begin) - score[y - 7] += 20 * ap_ratio; - if ((int)(y - 6) >= (int)ch_begin) - score[y - 6] += 30 * ap_ratio; - if ((int)(y - 5) >= (int)ch_begin) - score[y - 5] += 40 * ap_ratio; - if ((int)(y - 4) >= (int)ch_begin) - score[y - 4] += 50 * ap_ratio; - if ((int)(y - 3) >= (int)ch_begin) - score[y - 3] += 50 * ap_ratio; - if ((int)(y - 2) >= (int)ch_begin) - score[y - 2] += 50 * ap_ratio; - if ((int)(y - 1) >= (int)ch_begin) - score[y - 1] += 50 * ap_ratio; - if ((int)(y + 1) < (int)ch_end) - score[y + 1] += 40 * ap_ratio; - if ((int)(y + 2) < (int)ch_end) - score[y + 2] += 30 * ap_ratio; - if ((int)(y + 3) < (int)ch_end) - score[y + 3] += 20 * ap_ratio; - } - } else { - if ((pBss->t_stamp[1] & 0x6) == 0) - score[y] += 500; - else if ((pBss->t_stamp[1] & 0x4) == 0) { - score[y] += 500; - if ((int)(y + 1) < (int)ch_end) - score[y + 1] += 500; - } else { - score[y] += 500; - if ((int)(y - 1) >= (int)ch_begin) - score[y - 1] += 500; - } - } - break; - } - } - } - } - -#ifdef ACS_DEBUG_INFO/* for debug */ - printk("\n"); - for (y = ch_begin; y < ch_end; y++) - printk("6. after ap check: chnl[%d]:%d\n", priv->available_chnl[y], score[y]); - printk("\n"); -#endif - -#ifdef SS_CH_LOAD_PROC - - /* caculate noise level -- suggested by wilson */ - for (y = ch_begin; y < ch_end; y++) { - int fa_lv = 0, cca_lv = 0; - if (priv->chnl_ss_fa_count[y] > 1000) - fa_lv = 100; - else if (priv->chnl_ss_fa_count[y] > 500) - fa_lv = 34 * (priv->chnl_ss_fa_count[y] - 500) / 500 + 66; - else if (priv->chnl_ss_fa_count[y] > 200) - fa_lv = 33 * (priv->chnl_ss_fa_count[y] - 200) / 300 + 33; - else if (priv->chnl_ss_fa_count[y] > 100) - fa_lv = 18 * (priv->chnl_ss_fa_count[y] - 100) / 100 + 15; - else - fa_lv = 15 * priv->chnl_ss_fa_count[y] / 100; - if (priv->chnl_ss_cca_count[y] > 400) - cca_lv = 100; - else if (priv->chnl_ss_cca_count[y] > 200) - cca_lv = 34 * (priv->chnl_ss_cca_count[y] - 200) / 200 + 66; - else if (priv->chnl_ss_cca_count[y] > 80) - cca_lv = 33 * (priv->chnl_ss_cca_count[y] - 80) / 120 + 33; - else if (priv->chnl_ss_cca_count[y] > 40) - cca_lv = 18 * (priv->chnl_ss_cca_count[y] - 40) / 40 + 15; - else - cca_lv = 15 * priv->chnl_ss_cca_count[y] / 40; - - priv->chnl_ss_load[y] = (((fa_lv > cca_lv) ? fa_lv : cca_lv) * 75 + ((score[y] > 100) ? 100 : score[y]) * 25) / 100; - - DEBUG_INFO("ch:%d f=%d (%d), c=%d (%d), fl=%d, cl=%d, sc=%d, cu=%d\n", - priv->available_chnl[y], - priv->chnl_ss_fa_count[y], fa_thd, - priv->chnl_ss_cca_count[y], cca_thd, - fa_lv, - cca_lv, - score[y], - priv->chnl_ss_load[y]); - - } -#endif - } -#endif - -choose_ch: - -#ifdef DFS - /* heavy weighted DFS channel */ - if (idx_5G_begin >= 0) { - for (i = idx_5G_begin; i < priv->available_chnl_num; i++) { - if (!priv->pmib->dot11DFSEntry.disable_DFS && is_DFS_channel(priv->available_chnl[i]) - && (score[i] != 0xffffffff)) - score[i] += 1600; - } - } -#endif - - - /* prevent Auto channel selecting wrong channel in 40M mode----------------- */ - if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) - && priv->pshare->is_40m_bw) { -#if 0 - if (GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset == 1) { - /* Upper Primary channel, cannot select the two lowest channels */ - if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) { - score[0] = 0xffffffff; - score[1] = 0xffffffff; - score[2] = 0xffffffff; - score[3] = 0xffffffff; - score[4] = 0xffffffff; - - score[13] = 0xffffffff; - score[12] = 0xffffffff; - score[11] = 0xffffffff; - } - - /* if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11A) { */ - /* score[idx_5G_begin] = 0xffffffff; */ - /* score[idx_5G_begin + 1] = 0xffffffff; */ - /* } */ - } else if (GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset == 2) { - /* Lower Primary channel, cannot select the two highest channels */ - if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) { - score[0] = 0xffffffff; - score[1] = 0xffffffff; - score[2] = 0xffffffff; - - score[13] = 0xffffffff; - score[12] = 0xffffffff; - score[11] = 0xffffffff; - score[10] = 0xffffffff; - score[9] = 0xffffffff; - } - - /* if (priv->pmib->dot11BssType.net_work_type & WIRELESS_11A) { */ - /* score[priv->available_chnl_num - 2] = 0xffffffff; */ - /* score[priv->available_chnl_num - 1] = 0xffffffff; */ - /* } */ - } -#endif - for (i = 0; i <= idx_2G_end; ++i) - if (priv->available_chnl[i] == 14) - score[i] = 0xffffffff; /* mask chan14 */ - -#ifdef RTK_5G_SUPPORT - if (idx_5G_begin >= 0) { - for (i = idx_5G_begin; i < priv->available_chnl_num; i++) { - int ch = priv->available_chnl[i]; - if (priv->available_chnl[i] > 144) - --ch; - if ((ch % 4) || ch == 140 || ch == 164) /* mask ch 140, ch 165, ch 184... */ - score[i] = 0xffffffff; - } - } -#endif - - - } - - if (priv->pmib->dot11RFEntry.disable_ch1213) { - for (i = 0; i <= idx_2G_end; ++i) { - int ch = priv->available_chnl[i]; - if ((ch == 12) || (ch == 13)) - score[i] = 0xffffffff; - } - } - - if (((priv->pmib->dot11StationConfigEntry.dot11RegDomain == DOMAIN_GLOBAL) || - (priv->pmib->dot11StationConfigEntry.dot11RegDomain == DOMAIN_WORLD_WIDE)) && - (idx_2G_end >= 11) && (idx_2G_end < 14)) { - score[13] = 0xffffffff; /* mask chan14 */ - score[12] = 0xffffffff; /* mask chan13 */ - score[11] = 0xffffffff; /* mask chan12 */ - } - - /* ------------------------------------------------------------------ */ - -#ifdef _DEBUG_RTL8192CD_ - for (i = 0; i < priv->available_chnl_num; i++) - len += sprintf(tmpbuf + len, "ch%d:%u ", priv->available_chnl[i], score[i]); - strcat(tmpbuf, "\n"); - panic_printk("%s", tmpbuf); - -#endif - - if ((*p_dm_odm->p_band_type == ODM_BAND_5G) - && (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_80)) { - for (i = 0; i < priv->available_chnl_num; i++) { - if (is80MChannel(priv->available_chnl, priv->available_chnl_num, priv->available_chnl[i])) { - tmpScore = 0; - for (j = 0; j < 4; j++) { - if ((tmpScore != 0xffffffff) && (score[i + j] != 0xffffffff)) - tmpScore += score[i + j]; - else - tmpScore = 0xffffffff; - } - tmpScore = tmpScore / 4; - if (minScore > tmpScore) { - minScore = tmpScore; - - tmpScore = 0xffffffff; - for (j = 0; j < 4; j++) { - if (score[i + j] < tmpScore) { - tmpScore = score[i + j]; - tmpIdx = i + j; - } - } - - idx = tmpIdx; - } - i += 3; - } - } - if (minScore == 0xffffffff) { - /* there is no 80M channels */ - priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20; - for (i = 0; i < priv->available_chnl_num; i++) { - if (score[i] < minScore) { - minScore = score[i]; - idx = i; - } - } - } - } else if ((*p_dm_odm->p_band_type == ODM_BAND_5G) - && (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_20_40)) { - for (i = 0; i < priv->available_chnl_num; i++) { - if (is40MChannel(priv->available_chnl, priv->available_chnl_num, priv->available_chnl[i])) { - tmpScore = 0; - for (j = 0; j < 2; j++) { - if ((tmpScore != 0xffffffff) && (score[i + j] != 0xffffffff)) - tmpScore += score[i + j]; - else - tmpScore = 0xffffffff; - } - tmpScore = tmpScore / 2; - if (minScore > tmpScore) { - minScore = tmpScore; - - tmpScore = 0xffffffff; - for (j = 0; j < 2; j++) { - if (score[i + j] < tmpScore) { - tmpScore = score[i + j]; - tmpIdx = i + j; - } - } - - idx = tmpIdx; - } - i += 1; - } - } - if (minScore == 0xffffffff) { - /* there is no 40M channels */ - priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20; - for (i = 0; i < priv->available_chnl_num; i++) { - if (score[i] < minScore) { - minScore = score[i]; - idx = i; - } - } - } - } else if ((*p_dm_odm->p_band_type == ODM_BAND_2_4G) - && (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_20_40) - && (priv->available_chnl_num >= 8)) { - u32 groupScore[14]; - - memset(groupScore, 0xff, sizeof(groupScore)); - for (i = 0; i < priv->available_chnl_num - 4; i++) { - if (score[i] != 0xffffffff && score[i + 4] != 0xffffffff) { - groupScore[i] = score[i] + score[i + 4]; - DEBUG_INFO("groupScore, ch %d,%d: %d\n", i + 1, i + 5, groupScore[i]); - if (groupScore[i] < minScore) { -#ifdef AUTOCH_SS_SPEEDUP - if (priv->pmib->miscEntry.autoch_1611_enable) { - if (priv->available_chnl[i] == 1 || priv->available_chnl[i] == 6 || priv->available_chnl[i] == 11) { - minScore = groupScore[i]; - idx = i; - } - } else -#endif - { - minScore = groupScore[i]; - idx = i; - } - } - } - } - - if (score[idx] < score[idx + 4]) { - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; - } else { - idx = idx + 4; - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; - } - } else { - for (i = 0; i < priv->available_chnl_num; i++) { - if (score[i] < minScore) { -#ifdef AUTOCH_SS_SPEEDUP - if (priv->pmib->miscEntry.autoch_1611_enable) { - if (priv->available_chnl[i] == 1 || priv->available_chnl[i] == 6 || priv->available_chnl[i] == 11) { - minScore = score[i]; - idx = i; - } - } else -#endif - { - minScore = score[i]; - idx = i; - } - } - } - } - - if (IS_A_CUT_8881A(priv) && - (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_80)) { - if ((priv->available_chnl[idx] == 36) || - (priv->available_chnl[idx] == 52) || - (priv->available_chnl[idx] == 100) || - (priv->available_chnl[idx] == 116) || - (priv->available_chnl[idx] == 132) || - (priv->available_chnl[idx] == 149) || - (priv->available_chnl[idx] == 165)) - idx++; - else if ((priv->available_chnl[idx] == 48) || - (priv->available_chnl[idx] == 64) || - (priv->available_chnl[idx] == 112) || - (priv->available_chnl[idx] == 128) || - (priv->available_chnl[idx] == 144) || - (priv->available_chnl[idx] == 161) || - (priv->available_chnl[idx] == 177)) - idx--; - } - - minChan = priv->available_chnl[idx]; - - /* skip channel 14 if don't support ofdm */ - if ((priv->pmib->dot11RFEntry.disable_ch14_ofdm) && - (minChan == 14)) { - score[idx] = 0xffffffff; - - minScore = 0xffffffff; - for (i = 0; i < priv->available_chnl_num; i++) { - if (score[i] < minScore) { - minScore = score[i]; - idx = i; - } - } - minChan = priv->available_chnl[idx]; - } - -#if 0 - /* Check if selected channel available for 80M/40M BW or NOT ? */ - if (*p_dm_odm->p_band_type == ODM_BAND_5G) { - if (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_80) { - if (!is80MChannel(priv->available_chnl, priv->available_chnl_num, minChan)) { - - /* priv->pmib->dot11n_config_entry.dot11nUse40M = HT_CHANNEL_WIDTH_20_40; */ - priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20_40; - } - } - - if (priv->pmib->dot11nConfigEntry.dot11nUse40M == HT_CHANNEL_WIDTH_20_40) { - if (!is40MChannel(priv->available_chnl, priv->available_chnl_num, minChan)) { - - /* priv->pmib->dot11n_config_entry.dot11nUse40M = HT_CHANNEL_WIDTH_20; */ - priv->pshare->is_40m_bw = HT_CHANNEL_WIDTH_20; - } - } - } -#endif - -#ifdef CONFIG_RTL_NEW_AUTOCH - RTL_W32(RXERR_RPT, RXERR_RPT_RST); -#endif - - /* auto adjust contro-sideband */ - if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) - && (priv->pshare->is_40m_bw == 1 || priv->pshare->is_40m_bw == 2)) { - -#ifdef RTK_5G_SUPPORT - if (*p_dm_odm->p_band_type == ODM_BAND_5G) { - if ((minChan > 144) ? ((minChan - 1) % 8) : (minChan % 8)) { - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; - } else { - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; - } - - } else -#endif - { -#if 0 -#ifdef CONFIG_RTL_NEW_AUTOCH - unsigned int ch_max; - - if (priv->available_chnl[idx_2G_end] >= 13) - ch_max = 13; - else - ch_max = priv->available_chnl[idx_2G_end]; - - if ((minChan >= 5) && (minChan <= (ch_max - 5))) { - if (score[minChan + 4] > score[minChan - 4]) { /* what if some channels were cancelled? */ - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; - } else { - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; - } - } else -#endif - { - if (minChan < 5) { - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_ABOVE; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_ABOVE; - } else if (minChan > 7) { - GET_MIB(priv)->dot11nConfigEntry.dot11n2ndChOffset = HT_2NDCH_OFFSET_BELOW; - priv->pshare->offset_2nd_chan = HT_2NDCH_OFFSET_BELOW; - } - } -#endif - } - } - /* ----------------------- */ - -#if defined(__ECOS) && defined(CONFIG_SDIO_HCI) - panic_printk("Auto channel choose ch:%d\n", minChan); -#else -#ifdef _DEBUG_RTL8192CD_ - panic_printk("Auto channel choose ch:%d\n", minChan); -#endif -#endif -#ifdef ACS_DEBUG_INFO/* for debug */ - printk("7. minChan:%d 2nd_offset:%d\n", minChan, priv->pshare->offset_2nd_chan); -#endif - - return minChan; -} -#endif - -#endif diff --git a/hal/phydm/phydm_beamforming.h b/hal/phydm/phydm_beamforming.h index ad76dcc..14a8ae8 100644 --- a/hal/phydm/phydm_beamforming.h +++ b/hal/phydm/phydm_beamforming.h @@ -10,348 +10,6 @@ #include "txbf/haltxbfjaguar.h" #include "txbf/haltxbfinterface.h" -#if (BEAMFORMING_SUPPORT == 1) - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - -#define eq_mac_addr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 ) -#define cp_mac_addr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5]) - -#endif - -#define MAX_BEAMFORMEE_SU 2 -#define MAX_BEAMFORMER_SU 2 -#if (RTL8822B_SUPPORT == 1) - #define MAX_BEAMFORMEE_MU 6 - #define MAX_BEAMFORMER_MU 1 -#else - #define MAX_BEAMFORMEE_MU 0 - #define MAX_BEAMFORMER_MU 0 -#endif - -#define BEAMFORMEE_ENTRY_NUM (MAX_BEAMFORMEE_SU + MAX_BEAMFORMEE_MU) -#define BEAMFORMER_ENTRY_NUM (MAX_BEAMFORMER_SU + MAX_BEAMFORMER_MU) - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) - /*for different naming between WIN and CE*/ - #define BEACON_QUEUE BCN_QUEUE_INX - #define NORMAL_QUEUE MGT_QUEUE_INX - #define RT_DISABLE_FUNC RTW_DISABLE_FUNC - #define RT_ENABLE_FUNC RTW_ENABLE_FUNC -#endif - -enum beamforming_entry_state { - BEAMFORMING_ENTRY_STATE_UNINITIALIZE, - BEAMFORMING_ENTRY_STATE_INITIALIZEING, - BEAMFORMING_ENTRY_STATE_INITIALIZED, - BEAMFORMING_ENTRY_STATE_PROGRESSING, - BEAMFORMING_ENTRY_STATE_PROGRESSED -}; - - -enum beamforming_notify_state { - BEAMFORMING_NOTIFY_NONE, - BEAMFORMING_NOTIFY_ADD, - BEAMFORMING_NOTIFY_DELETE, - BEAMFORMEE_NOTIFY_ADD_SU, - BEAMFORMEE_NOTIFY_DELETE_SU, - BEAMFORMEE_NOTIFY_ADD_MU, - BEAMFORMEE_NOTIFY_DELETE_MU, - BEAMFORMING_NOTIFY_RESET -}; - -enum beamforming_cap { - BEAMFORMING_CAP_NONE = 0x0, - BEAMFORMER_CAP_HT_EXPLICIT = BIT(1), - BEAMFORMEE_CAP_HT_EXPLICIT = BIT(2), - BEAMFORMER_CAP_VHT_SU = BIT(5), /* Self has er Cap, because Reg er & peer ee */ - BEAMFORMEE_CAP_VHT_SU = BIT(6), /* Self has ee Cap, because Reg ee & peer er */ - BEAMFORMER_CAP_VHT_MU = BIT(7), /* Self has er Cap, because Reg er & peer ee */ - BEAMFORMEE_CAP_VHT_MU = BIT(8), /* Self has ee Cap, because Reg ee & peer er */ - BEAMFORMER_CAP = BIT(9), - BEAMFORMEE_CAP = BIT(10), -}; - - -enum sounding_mode { - SOUNDING_SW_VHT_TIMER = 0x0, - SOUNDING_SW_HT_TIMER = 0x1, - sounding_stop_all_timer = 0x2, - SOUNDING_HW_VHT_TIMER = 0x3, - SOUNDING_HW_HT_TIMER = 0x4, - SOUNDING_STOP_OID_TIMER = 0x5, - SOUNDING_AUTO_VHT_TIMER = 0x6, - SOUNDING_AUTO_HT_TIMER = 0x7, - SOUNDING_FW_VHT_TIMER = 0x8, - SOUNDING_FW_HT_TIMER = 0x9, -}; - -struct _RT_BEAMFORM_STAINFO { - u8 *ra; - u16 aid; - u16 mac_id; - u8 my_mac_addr[6]; - WIRELESS_MODE wireless_mode; - CHANNEL_WIDTH bw; - enum beamforming_cap beamform_cap; - u8 ht_beamform_cap; - u16 vht_beamform_cap; - u8 cur_beamform; - u16 cur_beamform_vht; -}; - - -struct _RT_BEAMFORMEE_ENTRY { - bool is_used; - bool is_txbf; - bool is_sound; - u16 aid; /*Used to construct AID field of NDPA packet.*/ - u16 mac_id; /*Used to Set Reg42C in IBSS mode. */ - u16 p_aid; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */ - u16 g_id; /*Used to fill Tx DESC*/ - u8 my_mac_addr[6]; - u8 mac_addr[6]; /*Used to fill Reg6E4 to fill Mac address of CSI report frame.*/ - CHANNEL_WIDTH sound_bw; /*Sounding band_width*/ - u16 sound_period; - enum beamforming_cap beamform_entry_cap; - enum beamforming_entry_state beamform_entry_state; - bool is_beamforming_in_progress; - /*u8 log_seq; // Move to _RT_BEAMFORMER_ENTRY*/ - /*u16 log_retry_cnt:3; // 0~4 // Move to _RT_BEAMFORMER_ENTRY*/ - /*u16 LogSuccessCnt:2; // 0~2 // Move to _RT_BEAMFORMER_ENTRY*/ - u16 log_status_fail_cnt:5; /* 0~21 */ - u16 default_csi_cnt:5; /* 0~21 */ - u8 csi_matrix[327]; - u16 csi_matrix_len; - u8 num_of_sounding_dim; - u8 comp_steering_num_of_bfer; - u8 su_reg_index; - /*For MU-MIMO*/ - bool is_mu_sta; - u8 mu_reg_index; - u8 gid_valid[8]; - u8 user_position[16]; -}; - -struct _RT_BEAMFORMER_ENTRY { - bool is_used; - /*P_AID of BFer entry is probably not used*/ - u16 p_aid; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */ - u16 g_id; - u8 my_mac_addr[6]; - u8 mac_addr[6]; - enum beamforming_cap beamform_entry_cap; - u8 num_of_sounding_dim; - u8 clock_reset_times; /*Modified by Jeffery @2015-04-10*/ - u8 pre_log_seq; /*Modified by Jeffery @2015-03-30*/ - u8 log_seq; /*Modified by Jeffery @2014-10-29*/ - u16 log_retry_cnt:3; /*Modified by Jeffery @2014-10-29*/ - u16 log_success:2; /*Modified by Jeffery @2014-10-29*/ - u8 su_reg_index; - /*For MU-MIMO*/ - bool is_mu_ap; - u8 gid_valid[8]; - u8 user_position[16]; - u16 aid; -}; - -struct _RT_SOUNDING_INFO { - u8 sound_idx; - CHANNEL_WIDTH sound_bw; - enum sounding_mode sound_mode; - u16 sound_period; -}; - - - -struct _RT_BEAMFORMING_OID_INFO { - u8 sound_oid_idx; - CHANNEL_WIDTH sound_oid_bw; - enum sounding_mode sound_oid_mode; - u16 sound_oid_period; -}; - - -struct _RT_BEAMFORMING_INFO { - enum beamforming_cap beamform_cap; - struct _RT_BEAMFORMEE_ENTRY beamformee_entry[BEAMFORMEE_ENTRY_NUM]; - struct _RT_BEAMFORMER_ENTRY beamformer_entry[BEAMFORMER_ENTRY_NUM]; - struct _RT_BEAMFORM_STAINFO beamform_sta_info; - u8 beamformee_cur_idx; - struct timer_list beamforming_timer; - struct timer_list mu_timer; - struct _RT_SOUNDING_INFO sounding_info; - struct _RT_BEAMFORMING_OID_INFO beamforming_oid_info; - struct _HAL_TXBF_INFO txbf_info; - u8 sounding_sequence; - u8 beamformee_su_cnt; - u8 beamformer_su_cnt; - u32 beamformee_su_reg_maping; - u32 beamformer_su_reg_maping; - /*For MU-MINO*/ - u8 beamformee_mu_cnt; - u8 beamformer_mu_cnt; - u32 beamformee_mu_reg_maping; - u8 mu_ap_index; - bool is_mu_sounding; - u8 first_mu_bfee_index; - bool is_mu_sounding_in_progress; - bool dbg_disable_mu_tx; - bool apply_v_matrix; - bool snding3ss; -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct _ADAPTER *source_adapter; -#endif - /* Control register */ - u32 reg_mu_tx_ctrl; /* For USB/SDIO interfaces aync I/O */ -}; - - -struct _RT_NDPA_STA_INFO { - u16 aid:12; - u16 feedback_type:1; - u16 nc_index:3; -}; - -enum phydm_acting_type { - phydm_acting_as_ibss = 0, - phydm_acting_as_ap = 1 -}; - - -enum beamforming_cap -phydm_beamforming_get_entry_beam_cap_by_mac_id( - void *p_dm_void, - u8 mac_id -); - -struct _RT_BEAMFORMEE_ENTRY * -phydm_beamforming_get_bfee_entry_by_addr( - void *p_dm_void, - u8 *RA, - u8 *idx -); - -struct _RT_BEAMFORMER_ENTRY * -phydm_beamforming_get_bfer_entry_by_addr( - void *p_dm_void, - u8 *TA, - u8 *idx -); - -void -phydm_beamforming_notify( - void *p_dm_void -); - -bool -phydm_acting_determine( - void *p_dm_void, - enum phydm_acting_type type -); - -void -beamforming_enter( - void *p_dm_void, - u16 sta_idx -); - -void -beamforming_leave( - void *p_dm_void, - u8 *RA -); - -bool -beamforming_start_fw( - void *p_dm_void, - u8 idx -); - -void -beamforming_check_sounding_success( - void *p_dm_void, - bool status -); - -void -phydm_beamforming_end_sw( - void *p_dm_void, - bool status -); - -void -beamforming_timer_callback( - void *p_dm_void -); - -void -phydm_beamforming_init( - void *p_dm_void -); - - - -enum beamforming_cap -phydm_beamforming_get_beam_cap( - void *p_dm_void, - struct _RT_BEAMFORMING_INFO *p_beam_info -); - - -bool -beamforming_control_v1( - void *p_dm_void, - u8 *RA, - u8 AID, - u8 mode, - CHANNEL_WIDTH BW, - u8 rate -); - - -bool -phydm_beamforming_control_v2( - void *p_dm_void, - u8 idx, - u8 mode, - CHANNEL_WIDTH BW, - u16 period -); - -void -phydm_beamforming_watchdog( - void *p_dm_void -); - -void -beamforming_sw_timer_callback( -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct timer_list *p_timer -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - void *function_context -#endif -); - -bool -beamforming_send_ht_ndpa_packet( - void *p_dm_void, - u8 *RA, - CHANNEL_WIDTH BW, - u8 q_idx -); - - -bool -beamforming_send_vht_ndpa_packet( - void *p_dm_void, - u8 *RA, - u16 AID, - CHANNEL_WIDTH BW, - u8 q_idx -); - -#else #define beamforming_gid_paid(adapter, p_tcb) #define phydm_acting_determine(p_dm_odm, type) false #define beamforming_enter(p_dm_odm, sta_idx) @@ -366,6 +24,4 @@ beamforming_send_vht_ndpa_packet( #define beamforming_watchdog(p_dm_odm) #define phydm_beamforming_watchdog(p_dm_odm) - -#endif #endif diff --git a/hal/phydm/phydm_dynamictxpower.h b/hal/phydm/phydm_dynamictxpower.h index badae89..8626448 100644 --- a/hal/phydm/phydm_dynamictxpower.h +++ b/hal/phydm/phydm_dynamictxpower.h @@ -25,17 +25,8 @@ /*#define DYNAMIC_TXPWR_VERSION "1.3" */ /*2015.08.26, Add 8814 Dynamic TX power*/ #define DYNAMIC_TXPWR_VERSION "1.4" /*2015.11.06, Add CE 8821A Dynamic TX power*/ -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - #define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 - #define TX_POWER_NEAR_FIELD_THRESH_LVL1 60 - #define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F -#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) - #define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 - #define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - #define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 - #define TX_POWER_NEAR_FIELD_THRESH_LVL1 60 -#endif +#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 +#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60 #define tx_high_pwr_level_normal 0 #define tx_high_pwr_level_level1 1 @@ -64,7 +55,6 @@ odm_dynamic_tx_power_nic( void *p_dm_void ); -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) void odm_dynamic_tx_power_save_power_index( void *p_dm_void @@ -81,21 +71,6 @@ odm_dynamic_tx_power_8821( u8 *p_desc, u8 mac_id ); -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -odm_dynamic_tx_power_8814a( - void *p_dm_void -); - - -void -odm_set_tx_power_level8814( - struct _ADAPTER *adapter, - u8 channel, - u8 pwr_lvl -); -#endif -#endif void odm_dynamic_tx_power( diff --git a/hal/phydm/phydm_interface.h b/hal/phydm/phydm_interface.h index 3d7f4a3..507afcb 100644 --- a/hal/phydm/phydm_interface.h +++ b/hal/phydm/phydm_interface.h @@ -275,45 +275,6 @@ odm_release_spin_lock( enum rt_spinlock_type type ); -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -/* - * ODM MISC-workitem relative API. - * */ -void -odm_initialize_work_item( - struct PHY_DM_STRUCT *p_dm_odm, - PRT_WORK_ITEM p_rt_work_item, - RT_WORKITEM_CALL_BACK rt_work_item_callback, - void *p_context, - const char *sz_id -); - -void -odm_start_work_item( - PRT_WORK_ITEM p_rt_work_item -); - -void -odm_stop_work_item( - PRT_WORK_ITEM p_rt_work_item -); - -void -odm_free_work_item( - PRT_WORK_ITEM p_rt_work_item -); - -void -odm_schedule_work_item( - PRT_WORK_ITEM p_rt_work_item -); - -bool -odm_is_work_item_scheduled( - PRT_WORK_ITEM p_rt_work_item -); -#endif - /* * ODM Timer relative API. * */ @@ -387,14 +348,13 @@ u64 odm_get_current_time( struct PHY_DM_STRUCT *p_dm_odm ); + u64 odm_get_progressing_time( struct PHY_DM_STRUCT *p_dm_odm, u64 start_time ); -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) - void phydm_set_hw_reg_handler_interface ( struct PHY_DM_STRUCT *p_dm_odm, @@ -407,10 +367,7 @@ phydm_get_hal_def_var_handler_interface ( struct PHY_DM_STRUCT *p_dm_odm, enum _HAL_DEF_VARIABLE e_variable, void *p_value - ); - -#endif - +); #endif /* __ODM_INTERFACE_H__ */ diff --git a/hal/phydm/phydm_powertracking_ce.c b/hal/phydm/phydm_powertracking_ce.c index a3a8c77..9475343 100644 --- a/hal/phydm/phydm_powertracking_ce.c +++ b/hal/phydm/phydm_powertracking_ce.c @@ -472,10 +472,6 @@ odm_txpowertracking_init( ) { struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void; -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) - if (!(p_dm_odm->support_ic_type & (ODM_RTL8814A | ODM_IC_11N_SERIES | ODM_RTL8822B))) - return; -#endif odm_txpowertracking_thermal_meter_init(p_dm_odm); } @@ -535,13 +531,6 @@ odm_txpowertracking_thermal_meter_init( u8 default_swing_index = get_swing_index(p_dm_odm); u8 p = 0; struct odm_rf_calibration_structure *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info); -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct _ADAPTER *adapter = p_dm_odm->adapter; - HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter); - - if (p_dm_odm->mp_mode == false) - p_hal_data->txpowertrack_control = true; -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) struct _ADAPTER *adapter = p_dm_odm->adapter; HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter); @@ -559,17 +548,6 @@ odm_txpowertracking_thermal_meter_init( ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("p_dm_odm txpowertrack_control = %d\n", p_rf_calibrate_info->txpowertrack_control)); -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP)) -#ifdef RTL8188E_SUPPORT - { - p_rf_calibrate_info->is_txpowertracking = _TRUE; - p_rf_calibrate_info->tx_powercount = 0; - p_rf_calibrate_info->is_txpowertracking_init = _FALSE; - p_rf_calibrate_info->txpowertrack_control = _TRUE; - } -#endif -#endif - /* p_dm_odm->rf_calibrate_info.txpowertrack_control = true; */ p_rf_calibrate_info->thermal_value = p_hal_data->eeprom_thermal_meter; p_rf_calibrate_info->thermal_value_iqk = p_hal_data->eeprom_thermal_meter; @@ -644,7 +622,6 @@ odm_txpowertracking_check_ce( ) { struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void; -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) struct _ADAPTER *adapter = p_dm_odm->adapter; if (!(p_dm_odm->support_ability & ODM_RF_TX_PWR_TRACK)) @@ -670,8 +647,6 @@ odm_txpowertracking_check_ce( odm_txpowertracking_callback_thermal_meter(adapter); p_dm_odm->rf_calibrate_info.tm_trigger = 0; } - -#endif } void @@ -680,66 +655,12 @@ odm_txpowertracking_check_mp( ) { struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void; -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - struct _ADAPTER *adapter = p_dm_odm->adapter; - - if (odm_check_power_status(adapter) == false) { - RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("===>odm_check_power_status() return false\n")); - return; - } - - odm_txpowertracking_thermal_meter_check(adapter); -#endif - } - void odm_txpowertracking_check_ap( void *p_dm_void ) { struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void; -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - struct rtl8192cd_priv *priv = p_dm_odm->priv; - - return; - -#endif } - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -void -odm_txpowertracking_thermal_meter_check( - struct _ADAPTER *adapter -) -{ -#ifndef AP_BUILD_WORKAROUND - static u8 tm_trigger = 0; - - if (!(GET_HAL_DATA(adapter)->DM_OutSrc.support_ability & ODM_RF_TX_PWR_TRACK)) { - RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, - ("===>odm_txpowertracking_thermal_meter_check(),p_mgnt_info->is_txpowertracking is false, return!!\n")); - return; - } - - if (!tm_trigger) { - if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_8192E(adapter) || - IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_8814A(adapter) || IS_HARDWARE_TYPE_8188F(adapter) - || IS_HARDWARE_TYPE_8703B(adapter) || IS_HARDWARE_TYPE_8723D(adapter)) - phy_set_rf_reg(adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03); - else - phy_set_rf_reg(adapter, ODM_RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60); - - RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Trigger Thermal Meter!!\n")); - - tm_trigger = 1; - return; - } else { - RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Schedule TxPowerTracking direct call!!\n")); - odm_txpowertracking_direct_call(adapter); - tm_trigger = 0; - } -#endif -} -#endif diff --git a/hal/phydm/phydm_powertracking_win.h b/hal/phydm/phydm_powertracking_win.h deleted file mode 100644 index a158135..0000000 --- a/hal/phydm/phydm_powertracking_win.h +++ /dev/null @@ -1,299 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA - * - * - ******************************************************************************/ - -#ifndef __PHYDMPOWERTRACKING_H__ -#define __PHYDMPOWERTRACKING_H__ - -#define POWRTRACKING_VERSION "1.1" - -#define DPK_DELTA_MAPPING_NUM 13 -#define index_mapping_HP_NUM 15 -#define TXSCALE_TABLE_SIZE 37 -#define CCK_TABLE_SIZE_8723D 41 -#define TXPWR_TRACK_TABLE_SIZE 30 -#define DELTA_SWINGIDX_SIZE 30 -#define DELTA_SWINTSSI_SIZE 61 -#define BAND_NUM 3 -#define MAX_RF_PATH 4 -#define CCK_TABLE_SIZE_88F 21 - - -#define dm_check_txpowertracking odm_txpowertracking_check - -#define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */ -#define AVG_THERMAL_NUM 8 -#define HP_THERMAL_NUM 8 -#define iqk_matrix_reg_num 8 -#define IQK_MAC_REG_NUM 4 -#define IQK_ADDA_REG_NUM 16 - -#define IQK_BB_REG_NUM 9 - - -extern u32 ofdm_swing_table[OFDM_TABLE_SIZE]; -extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8]; -extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8]; - -extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE]; -extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8]; -extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8]; -extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16]; -extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16]; -extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16]; -extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D]; - -extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE]; - -/* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */ -static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9}; -static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11}; - -void -odm_txpowertracking_check( - void *p_dm_void -); - -void -odm_txpowertracking_check_ap( - void *p_dm_void -); - -void -odm_txpowertracking_thermal_meter_init( - void *p_dm_void -); - -void -odm_txpowertracking_init( - void *p_dm_void -); - -void -odm_txpowertracking_check_mp( - void *p_dm_void -); - - -void -odm_txpowertracking_check_ce( - void *p_dm_void -); - -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) - - -void -odm_txpowertracking_thermal_meter_check( - struct _ADAPTER *adapter -); - -#endif - -struct _IQK_MATRIX_REGS_SETTING { - bool is_iqk_done; - s32 value[3][iqk_matrix_reg_num]; - bool is_bw_iqk_result_saved[3]; -}; - -struct odm_rf_calibration_structure { - /* for tx power tracking */ - - u32 rega24; /* for TempCCK */ - s32 rege94; - s32 rege9c; - s32 regeb4; - s32 regebc; - /* u8 is_txpowertracking; */ - u8 tx_powercount; - bool is_txpowertracking_init; - bool is_txpowertracking; - u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */ - u8 tm_trigger; - u8 internal_pa_5g[2]; /* pathA / pathB */ - - u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */ - u8 thermal_value; - u8 thermal_value_lck; - u8 thermal_value_iqk; - s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */ - u8 thermal_value_avg[AVG_THERMAL_NUM]; - u8 thermal_value_avg_index; - u8 thermal_value_rx_gain; - - bool is_reloadtxpowerindex; - u8 is_rf_pi_enable; - u32 txpowertracking_callback_cnt; /* cosa add for debug */ - - - /* ------------------------- Tx power Tracking ------------------------- */ - u8 is_cck_in_ch14; - u8 CCK_index; - u8 OFDM_index[MAX_RF_PATH]; - s8 power_index_offset[MAX_RF_PATH]; - s8 delta_power_index[MAX_RF_PATH]; - s8 delta_power_index_last[MAX_RF_PATH]; - bool is_tx_power_changed; - s8 xtal_offset; - s8 xtal_offset_last; - - u8 thermal_value_hp[HP_THERMAL_NUM]; - u8 thermal_value_hp_index; - struct _IQK_MATRIX_REGS_SETTING iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM]; - u8 delta_lck; - s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */ - u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE]; - u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE]; - u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE]; - s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE]; - s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE]; - u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE]; - - u8 bb_swing_idx_ofdm[MAX_RF_PATH]; - u8 bb_swing_idx_ofdm_current; -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) - u8 bb_swing_idx_ofdm_base[MAX_RF_PATH]; -#else - u8 bb_swing_idx_ofdm_base; -#endif - bool default_bb_swing_index_flag; - bool bb_swing_flag_ofdm; - u8 bb_swing_idx_cck; - u8 bb_swing_idx_cck_current; - u8 bb_swing_idx_cck_base; - u8 default_ofdm_index; - u8 default_cck_index; - bool bb_swing_flag_cck; - - s8 absolute_ofdm_swing_idx[MAX_RF_PATH]; - s8 remnant_ofdm_swing_idx[MAX_RF_PATH]; - s8 absolute_cck_swing_idx[MAX_RF_PATH]; - s8 remnant_cck_swing_idx; - s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */ - bool modify_tx_agc_flag_path_a; - bool modify_tx_agc_flag_path_b; - bool modify_tx_agc_flag_path_c; - bool modify_tx_agc_flag_path_d; - bool modify_tx_agc_flag_path_a_cck; - - s8 kfree_offset[MAX_RF_PATH]; - - /* -------------------------------------------------------------------- */ - - /* for IQK */ - u32 regc04; - u32 reg874; - u32 regc08; - u32 regb68; - u32 regb6c; - u32 reg870; - u32 reg860; - u32 reg864; - - bool is_iqk_initialized; - bool is_lck_in_progress; - bool is_antenna_detected; - bool is_need_iqk; - bool is_iqk_in_progress; - bool is_iqk_pa_off; - u8 delta_iqk; - u32 ADDA_backup[IQK_ADDA_REG_NUM]; - u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; - u32 IQK_BB_backup_recover[9]; - u32 IQK_BB_backup[IQK_BB_REG_NUM]; - u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */ - u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */ - u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ - u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ - u32 tx_iqc_8723d[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/ - u32 rx_iqc_8723d[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/ - - u64 iqk_start_time; - u64 iqk_total_progressing_time; - u64 iqk_progressing_time; - u32 lok_result; - u8 iqk_step; - u8 kcount; - u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */ - bool is_mp_mode; - - /* for APK */ - u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */ - u8 is_ap_kdone; - u8 is_apk_thermal_meter_ignore; - - /* DPK */ - bool is_dpk_fail; - u8 is_dp_done; - u8 is_dp_path_aok; - u8 is_dp_path_bok; - - u32 tx_lok[2]; - u32 dpk_tx_agc; - s32 dpk_gain; - u32 dpk_thermal[4]; - - s8 modify_tx_agc_value_ofdm; - s8 modify_tx_agc_value_cck; - - /*Add by Yuchen for Kfree Phydm*/ - u8 reg_rf_kfree_enable; /*for registry*/ - u8 rf_kfree_enable; /*for efuse enable check*/ - - HALMAC_PWR_TRACKING_OPTION HALMAC_PWR_TRACKING_INFO; -}; - - - - -#endif diff --git a/hal/phydm/phydm_regconfig8188e.c b/hal/phydm/phydm_regconfig8188e.c index fb83f5e..4cf9705 100644 --- a/hal/phydm/phydm_regconfig8188e.c +++ b/hal/phydm/phydm_regconfig8188e.c @@ -33,13 +33,6 @@ odm_config_rf_reg_8188e( u32 reg_addr ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -#ifndef SMP_SYNC - unsigned long x; -#endif - struct rtl8192cd_priv *priv = p_dm_odm->priv; -#endif - if (addr == 0xffe) { #ifdef CONFIG_LONG_DELAY_ISSUE ODM_sleep_ms(50); @@ -57,14 +50,7 @@ odm_config_rf_reg_8188e( else if (addr == 0xf9) ODM_delay_us(1); else { - -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - SAVE_INT_AND_CLI(x); odm_set_rf_reg(p_dm_odm, RF_PATH, reg_addr, RFREGOFFSETMASK, data); - RESTORE_INT(x); -#else - odm_set_rf_reg(p_dm_odm, RF_PATH, reg_addr, RFREGOFFSETMASK, data); -#endif /* Add 1us delay between BB/RF register setting. */ ODM_delay_us(1); } @@ -157,10 +143,7 @@ odm_config_bb_phy_reg_pg_8188e( ODM_delay_us(1); else { ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> odm_config_bb_with_header_file: [PHY_REG] %08X %08X %08X\n", addr, bitmask, data)); - -#if !(DM_ODM_SUPPORT_TYPE&ODM_AP) phy_store_tx_power_by_rate(p_dm_odm->adapter, band, rf_path, tx_num, addr, bitmask, data); -#endif } } @@ -176,10 +159,8 @@ odm_config_bb_txpwr_lmt_8188e( u8 *power_limit ) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) phy_set_tx_power_limit(p_dm_odm, regulation, band, bandwidth, rate_section, rf_path, channel, power_limit); -#endif } void diff --git a/hal/phydm/txbf/phydm_hal_txbf_api.c b/hal/phydm/txbf/phydm_hal_txbf_api.c index 317204d..36ccbde 100644 --- a/hal/phydm/txbf/phydm_hal_txbf_api.c +++ b/hal/phydm/txbf/phydm_hal_txbf_api.c @@ -2,103 +2,7 @@ #include "phydm_precomp.h" #if (defined(CONFIG_BB_TXBF_API)) -#if (RTL8822B_SUPPORT == 1) -/*Add by YuChen for 8822B MU-MIMO API*/ - -/*this function is only used for BFer*/ -u8 -phydm_get_ndpa_rate( - void *p_dm_void -) -{ - struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void; - u8 ndpa_rate = ODM_RATE6M; - - if (p_dm_odm->rssi_min >= 30) /*link RSSI > 30%*/ - ndpa_rate = ODM_RATE24M; - else if (p_dm_odm->rssi_min <= 25) - ndpa_rate = ODM_RATE6M; - - ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_TRACE, ("[%s] ndpa_rate = 0x%x\n", __func__, ndpa_rate)); - - return ndpa_rate; - -} - -/*this function is only used for BFer*/ -u8 -phydm_get_beamforming_sounding_info( - void *p_dm_void, - u16 *troughput, - u8 total_bfee_num, - u8 *tx_rate -) -{ - u8 idx = 0; - u8 soundingdecision = 0xff; - struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void; - - for (idx = 0; idx < total_bfee_num; idx++) { - if (((tx_rate[idx] >= ODM_RATEVHTSS3MCS7) && (tx_rate[idx] <= ODM_RATEVHTSS3MCS9))) - soundingdecision = soundingdecision & ~(1 << idx); - } - - for (idx = 0; idx < total_bfee_num; idx++) { - if (troughput[idx] <= 10) - soundingdecision = soundingdecision & ~(1 << idx); - } - - ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_TRACE, ("[%s] soundingdecision = 0x%x\n", __func__, soundingdecision)); - - return soundingdecision; - -} - -/*this function is only used for BFer*/ -u8 -phydm_get_mu_bfee_snding_decision( - void *p_dm_void, - u16 throughput -) -{ - u8 snding_score = 0; - struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void; - - /*throughput unit is Mbps*/ - if (throughput >= 500) - snding_score = 100; - else if (throughput >= 450) - snding_score = 90; - else if (throughput >= 400) - snding_score = 80; - else if (throughput >= 350) - snding_score = 70; - else if (throughput >= 300) - snding_score = 60; - else if (throughput >= 250) - snding_score = 50; - else if (throughput >= 200) - snding_score = 40; - else if (throughput >= 150) - snding_score = 30; - else if (throughput >= 100) - snding_score = 20; - else if (throughput >= 50) - snding_score = 10; - else - snding_score = 0; - - ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_TRACE, ("[%s] snding_score = 0x%x\n", __func__, snding_score)); - - return snding_score; - -} - - -#endif -#if (DM_ODM_SUPPORT_TYPE != ODM_AP) -u8 -beamforming_get_htndp_tx_rate( +u8 beamforming_get_htndp_tx_rate( void *p_dm_void, u8 comp_steering_num_of_bfer ) @@ -107,12 +11,7 @@ beamforming_get_htndp_tx_rate( u8 nr_index = 0; u8 ndp_tx_rate; /*Find nr*/ -#if (RTL8814A_SUPPORT == 1) - if (p_dm_odm->support_ic_type & ODM_RTL8814A) - nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(p_dm_odm), comp_steering_num_of_bfer); - else -#endif - nr_index = tx_bf_nr(1, comp_steering_num_of_bfer); + nr_index = tx_bf_nr(1, comp_steering_num_of_bfer); switch (nr_index) { case 1: @@ -146,12 +45,7 @@ beamforming_get_vht_ndp_tx_rate( u8 nr_index = 0; u8 ndp_tx_rate; /*Find nr*/ -#if (RTL8814A_SUPPORT == 1) - if (p_dm_odm->support_ic_type & ODM_RTL8814A) - nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(p_dm_odm), comp_steering_num_of_bfer); - else -#endif - nr_index = tx_bf_nr(1, comp_steering_num_of_bfer); + nr_index = tx_bf_nr(1, comp_steering_num_of_bfer); switch (nr_index) { case 1: @@ -174,6 +68,5 @@ beamforming_get_vht_ndp_tx_rate( return ndp_tx_rate; } -#endif #endif diff --git a/hal/phydm/txbf/phydm_hal_txbf_api.h b/hal/phydm/txbf/phydm_hal_txbf_api.h index 93fb784..66a1254 100644 --- a/hal/phydm/txbf/phydm_hal_txbf_api.h +++ b/hal/phydm/txbf/phydm_hal_txbf_api.h @@ -21,7 +21,6 @@ #if (defined(CONFIG_BB_TXBF_API)) -#if (DM_ODM_SUPPORT_TYPE != ODM_AP) #define tx_bf_nr(a, b) ((a > b) ? (b) : (a)) u8 @@ -36,8 +35,6 @@ beamforming_get_vht_ndp_tx_rate( u8 comp_steering_num_of_bfer ); -#endif - #if (RTL8822B_SUPPORT == 1) u8 phydm_get_beamforming_sounding_info(