mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2025-05-08 14:33:05 +00:00
rtl8188eu: Change "while(" to "while ("
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
parent
6ead3e77dc
commit
8e22f0d2e8
37 changed files with 151 additions and 151 deletions
|
@ -900,7 +900,7 @@ ODM_RA_TxRPT2Handle_8188E(
|
|||
|
||||
pBuffer += TX_RPT2_ITEM_SIZE;
|
||||
MacId++;
|
||||
}while(MacId < ItemNum);
|
||||
}while (MacId < ItemNum);
|
||||
|
||||
odm_RATxRPTTimerSetting(pDM_Odm,minRptTime);
|
||||
|
||||
|
|
|
@ -328,7 +328,7 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
|
|||
PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
|
||||
|
||||
u32 hex = 0;
|
||||
u32 i = 0;
|
||||
|
@ -535,7 +535,7 @@ ODM_ReadAndConfig_AGC_TAB_1T_ICUT_8188E(
|
|||
PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
|
||||
|
||||
u32 hex = 0;
|
||||
u32 i = 0;
|
||||
|
@ -815,7 +815,7 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
|
|||
PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
|
||||
|
||||
u32 hex = 0;
|
||||
u32 i = 0;
|
||||
|
@ -1074,7 +1074,7 @@ ODM_ReadAndConfig_PHY_REG_1T_ICUT_8188E(
|
|||
PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
|
||||
|
||||
u32 hex = 0;
|
||||
u32 i = 0;
|
||||
|
|
|
@ -158,7 +158,7 @@ ODM_ReadAndConfig_MAC_REG_8188E(
|
|||
PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
|
||||
|
||||
u32 hex = 0;
|
||||
u32 i = 0;
|
||||
|
@ -318,7 +318,7 @@ ODM_ReadAndConfig_MAC_REG_ICUT_8188E(
|
|||
PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
|
||||
|
||||
u32 hex = 0;
|
||||
u32 i = 0;
|
||||
|
|
|
@ -177,7 +177,7 @@ ODM_ReadAndConfig_RadioA_1T_8188E(
|
|||
PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
|
||||
|
||||
u32 hex = 0;
|
||||
u32 i = 0;
|
||||
|
@ -348,7 +348,7 @@ ODM_ReadAndConfig_RadioA_1T_ICUT_8188E(
|
|||
PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
|
||||
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
|
||||
|
||||
u32 hex = 0;
|
||||
u32 i = 0;
|
||||
|
|
|
@ -40,7 +40,7 @@
|
|||
} \
|
||||
if (_offset >= _size)\
|
||||
_offset = _size-1;\
|
||||
} while(0)
|
||||
} while (0)
|
||||
|
||||
/* 3============================================================ */
|
||||
/* 3 Tx Power Tracking */
|
||||
|
@ -1833,7 +1833,7 @@ if ( *(pDM_Odm->mp_mode) == 1)
|
|||
|
||||
i++;
|
||||
}
|
||||
while(tmpReg > apkbound && i < 4);
|
||||
while (tmpReg > apkbound && i < 4);
|
||||
|
||||
APK_result[path][index] = tmpReg;
|
||||
}
|
||||
|
@ -2130,7 +2130,7 @@ if (*(pDM_Odm->mp_mode) == 1)
|
|||
if (bSingleTone || bCarrierSuppression)
|
||||
return;
|
||||
|
||||
while(*(pDM_Odm->pbScanInProcess) && timecount < timeout)
|
||||
while (*(pDM_Odm->pbScanInProcess) && timecount < timeout)
|
||||
{
|
||||
ODM_delay_ms(50);
|
||||
timecount += 50;
|
||||
|
|
|
@ -140,7 +140,7 @@ u8 HalPwrSeqCmdParsing(
|
|||
}
|
||||
|
||||
AryIdx++;/* Add Array Index */
|
||||
}while(1);
|
||||
}while (1);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
|
|
@ -53,7 +53,7 @@ static u8 _is_fw_read_cmd_down(struct adapter* padapter, u8 msgbox_num)
|
|||
if (0 == valid ){
|
||||
read_down = true;
|
||||
}
|
||||
}while( (!read_down) && (retry_cnts--));
|
||||
}while ( (!read_down) && (retry_cnts--));
|
||||
|
||||
return read_down;
|
||||
|
||||
|
@ -150,7 +150,7 @@ static s32 FillH2CCmd_88E(struct adapter *padapter, u8 ElementID, u32 CmdLen, u8
|
|||
bcmd_down = true;
|
||||
|
||||
pHalData->LastHMEBoxNum = (h2c_box_num+1) % RTL88E_MAX_H2C_BOX_NUMS;
|
||||
}while((!bcmd_down) && (retry_cnts--));
|
||||
}while ((!bcmd_down) && (retry_cnts--));
|
||||
|
||||
ret = _SUCCESS;
|
||||
|
||||
|
@ -756,9 +756,9 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *padapter, u8 mstatus)
|
|||
/* check rsvd page download OK. */
|
||||
rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid));
|
||||
poll++;
|
||||
} while(!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
|
||||
} while (!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
|
||||
|
||||
}while(!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
|
||||
}while (!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
|
||||
|
||||
/* RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage88ES(): 1 Download RSVD page failed!\n")); */
|
||||
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
|
||||
|
@ -794,8 +794,8 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *padapter, u8 mstatus)
|
|||
/* check rsvd page download OK. */
|
||||
rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid));
|
||||
poll++;
|
||||
} while(!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
|
||||
}while(!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
|
||||
} while (!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
|
||||
}while (!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
|
||||
|
||||
/* RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage(): 2 Download RSVD page failed!\n")); */
|
||||
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
|
||||
|
|
|
@ -69,7 +69,7 @@ static s32 iol_execute(struct adapter *padapter, u8 control)
|
|||
rtw_write8(padapter, REG_HMEBOX_E0, reg_0x88|control);
|
||||
|
||||
t1 = start = rtw_get_current_time();
|
||||
while(
|
||||
while (
|
||||
/* reg_1c7 = rtw_read8(padapter, 0x1c7) >1) && */
|
||||
(reg_0x88=rtw_read8(padapter, REG_HMEBOX_E0)) & control
|
||||
&& (passing_time=rtw_get_passing_time_ms(start))<1000
|
||||
|
@ -157,7 +157,7 @@ efuse_phymap_to_logical(u8 * phymap, u16 _offset, u16 _size_byte, u8 *pbuf)
|
|||
/* */
|
||||
/* 2. Read real efuse content. Filter PG header and every section data. */
|
||||
/* */
|
||||
while((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
|
||||
while ((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
|
||||
{
|
||||
/* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr-1, *rtemp8)); */
|
||||
|
||||
|
@ -311,7 +311,7 @@ static void efuse_read_phymap_from_txpktbuf(
|
|||
|
||||
dbg_addr = bcnhead*128/8; /* 8-bytes addressing */
|
||||
|
||||
while(1)
|
||||
while (1)
|
||||
{
|
||||
/* DBG_871X("%s dbg_addr:0x%x\n", __FUNCTION__, dbg_addr+i); */
|
||||
rtw_write16(adapter, REG_PKTBUF_DBG_ADDR, dbg_addr+i);
|
||||
|
@ -319,8 +319,8 @@ static void efuse_read_phymap_from_txpktbuf(
|
|||
/* DBG_871X("%s write reg_0x143:0x00\n", __FUNCTION__); */
|
||||
rtw_write8(adapter, REG_TXPKTBUF_DBG, 0);
|
||||
start = rtw_get_current_time();
|
||||
while(!(reg_0x143=rtw_read8(adapter, REG_TXPKTBUF_DBG))/* dbg */
|
||||
/* while(rtw_read8(adapter, REG_TXPKTBUF_DBG) & BIT0 */
|
||||
while (!(reg_0x143=rtw_read8(adapter, REG_TXPKTBUF_DBG))/* dbg */
|
||||
/* while (rtw_read8(adapter, REG_TXPKTBUF_DBG) & BIT0 */
|
||||
&& (passing_time=rtw_get_passing_time_ms(start))<1000
|
||||
) {
|
||||
DBG_871X("%s polling reg_0x143:0x%02x, reg_0x106:0x%02x\n", __FUNCTION__, reg_0x143, rtw_read8(adapter, 0x106));
|
||||
|
@ -506,7 +506,7 @@ void rtw_IOL_cmd_tx_pkt_buf_dump(struct adapter *Adapter,int data_len)
|
|||
|
||||
}
|
||||
rtw_usleep_os(2);
|
||||
}while( !rstatus && (loop++ <10));
|
||||
}while ( !rstatus && (loop++ <10));
|
||||
}
|
||||
rtw_IOL_cmd_buf_dump(Adapter,data_len,pbuf);
|
||||
rtw_vmfree(pbuf, data_len+10);
|
||||
|
@ -652,7 +652,7 @@ _FillDummy(
|
|||
u8 remain = (u8)(FwLen%4);
|
||||
remain = (remain==0)?0:(4-remain);
|
||||
|
||||
while(remain>0)
|
||||
while (remain>0)
|
||||
{
|
||||
pFwBuf[FwLen] = 0;
|
||||
FwLen++;
|
||||
|
@ -1026,7 +1026,7 @@ static bool efuse_read_phymap(
|
|||
/* */
|
||||
/* Read physical efuse content. */
|
||||
/* */
|
||||
while(addr < limit)
|
||||
while (addr < limit)
|
||||
{
|
||||
ReadEFuseByte(Adapter, addr, pos, false);
|
||||
if (*pos != 0xFF)
|
||||
|
@ -1117,7 +1117,7 @@ Hal_EfuseReadEFuse88E(
|
|||
/* */
|
||||
/* 2. Read real efuse content. Filter PG header and every section data. */
|
||||
/* */
|
||||
while((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
|
||||
while ((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
|
||||
{
|
||||
/* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr-1, *rtemp8)); */
|
||||
|
||||
|
@ -1783,7 +1783,7 @@ hal_EfusePgPacketRead_8188e(
|
|||
/* Skip dummy parts to prevent unexpected data read from Efuse. */
|
||||
/* By pass right now. 2009.02.19. */
|
||||
/* */
|
||||
while(bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr) )
|
||||
while (bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr) )
|
||||
{
|
||||
/* Header Read ------------- */
|
||||
if (ReadState & PG_STATE_HEADER)
|
||||
|
@ -1967,14 +1967,14 @@ hal_EfusePgPacketWrite2ByteHeader(
|
|||
/* RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 2byte header\n")); */
|
||||
EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest);
|
||||
|
||||
while(efuse_addr < efuse_max_available_len)
|
||||
while (efuse_addr < efuse_max_available_len)
|
||||
{
|
||||
pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F;
|
||||
/* RTPRINT(FEEPROM, EFUSE_PG, ("pg_header = 0x%x\n", pg_header)); */
|
||||
efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
|
||||
efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
|
||||
|
||||
while(tmp_header == 0xFF)
|
||||
while (tmp_header == 0xFF)
|
||||
{
|
||||
if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
|
||||
{
|
||||
|
@ -1996,7 +1996,7 @@ hal_EfusePgPacketWrite2ByteHeader(
|
|||
efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
|
||||
efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
|
||||
|
||||
while(tmp_header == 0xFF)
|
||||
while (tmp_header == 0xFF)
|
||||
{
|
||||
if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
|
||||
{
|
||||
|
@ -2067,7 +2067,7 @@ hal_EfusePgPacketWrite1ByteHeader(
|
|||
efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest);
|
||||
efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest);
|
||||
|
||||
while(tmp_header == 0xFF)
|
||||
while (tmp_header == 0xFF)
|
||||
{
|
||||
if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
|
||||
{
|
||||
|
@ -2258,7 +2258,7 @@ hal_EfusePartialWriteCheck(
|
|||
}
|
||||
/* RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePartialWriteCheck(), startAddr=%d\n", startAddr)); */
|
||||
|
||||
while(1)
|
||||
while (1)
|
||||
{
|
||||
if (startAddr >= efuse_max_available_len)
|
||||
{
|
||||
|
|
|
@ -87,7 +87,7 @@ sic_IsSICReady(
|
|||
u32 retryCnt=0;
|
||||
u8 sic_cmd=0xff;
|
||||
|
||||
while(1)
|
||||
while (1)
|
||||
{
|
||||
if (retryCnt++ >= SIC_MAX_POLL_CNT)
|
||||
{
|
||||
|
@ -145,7 +145,7 @@ sic_Read4Byte(
|
|||
/* RTPRINT(FPHY, PHY_SICR, ("write cmdreg 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_READ)); */
|
||||
|
||||
retry = 4;
|
||||
while(retry--){
|
||||
while (retry--){
|
||||
rtw_udelay_os(50);
|
||||
/* PlatformStallExecution(50); */
|
||||
}
|
||||
|
@ -179,7 +179,7 @@ sic_Write4Byte(
|
|||
rtw_write8(Adapter, SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8));
|
||||
rtw_write32(Adapter, SIC_DATA_REG, (u32)data);
|
||||
rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_WRITE);
|
||||
while(retry--){
|
||||
while (retry--){
|
||||
rtw_udelay_os(50);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -763,7 +763,7 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *padapter, struct xmit_priv *pxm
|
|||
descCount = 0;
|
||||
bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize;
|
||||
}
|
||||
}/* end while( aggregate same priority and same DA(AP or STA) frames) */
|
||||
}/* end while ( aggregate same priority and same DA(AP or STA) frames) */
|
||||
|
||||
|
||||
if (_rtw_queue_empty(&ptxservq->sta_pending) == true)
|
||||
|
|
|
@ -1233,7 +1233,7 @@ static u32 rtl8188eu_hal_init(struct adapter *Adapter)
|
|||
|
||||
#define HAL_INIT_PROFILE_TAG(stage) hal_init_stages_timestamp[(stage)]=rtw_get_current_time();
|
||||
#else
|
||||
#define HAL_INIT_PROFILE_TAG(stage) do {} while(0)
|
||||
#define HAL_INIT_PROFILE_TAG(stage) do {} while (0)
|
||||
#endif /* DBG_HAL_INIT_PROFILING */
|
||||
|
||||
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
|
||||
|
@ -2262,7 +2262,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8* val)
|
|||
rtw_write8(Adapter, REG_RRSR+2, rtw_read8(Adapter, REG_RRSR+2)&0xf0);
|
||||
|
||||
/* Set RTS initial rate */
|
||||
while(BrateCfg > 0x1)
|
||||
while (BrateCfg > 0x1)
|
||||
{
|
||||
BrateCfg = (BrateCfg>> 1);
|
||||
RateIndex++;
|
||||
|
@ -2809,7 +2809,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8* val)
|
|||
do{
|
||||
if (!(rtw_read32(Adapter,REG_RXPKT_NUM)&RXDMA_IDLE))
|
||||
break;
|
||||
}while(trycnt--);
|
||||
}while (trycnt--);
|
||||
if (trycnt ==0)
|
||||
DBG_8192C("Stop RX DMA failed......\n");
|
||||
|
||||
|
@ -3125,7 +3125,7 @@ static void _update_response_rate(struct adapter *padapter,unsigned int mask)
|
|||
rtw_write8(padapter,REG_RRSR+1, (mask>>8)&0xff);
|
||||
|
||||
/* Set RTS initial rate */
|
||||
while(mask > 0x1)
|
||||
while (mask > 0x1)
|
||||
{
|
||||
mask = (mask>> 1);
|
||||
RateIndex++;
|
||||
|
|
|
@ -63,7 +63,7 @@ static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u
|
|||
goto release_mutex;
|
||||
}
|
||||
|
||||
while(++vendorreq_times<= MAX_USBCTRL_VENDORREQ_TIMES)
|
||||
while (++vendorreq_times<= MAX_USBCTRL_VENDORREQ_TIMES)
|
||||
{
|
||||
memset(pIo_buf, 0, len);
|
||||
|
||||
|
@ -605,7 +605,7 @@ static int recvbuf2recvframe(struct adapter *padapter, struct sk_buff *pskb)
|
|||
if (transfer_len>0 && pkt_cnt==0)
|
||||
pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
|
||||
|
||||
}while((transfer_len>0) && (pkt_cnt>0));
|
||||
}while ((transfer_len>0) && (pkt_cnt>0));
|
||||
|
||||
_exit_recvbuf2recvframe:
|
||||
|
||||
|
@ -835,7 +835,7 @@ void rtl8188eu_xmit_tasklet(void *priv)
|
|||
if (check_fwstate(&padapter->mlmepriv, _FW_UNDER_SURVEY) == true)
|
||||
return;
|
||||
|
||||
while(1) {
|
||||
while (1) {
|
||||
if (padapter->bDriverStopped ||
|
||||
padapter->bSurpriseRemoved ||
|
||||
padapter->bWritePortCancel) {
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue