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rtl8188eu: Remove configuration variables CONFIG_IOL_XXX and associated dead code

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Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2013-07-14 11:21:05 -05:00
parent 927e984c73
commit 9ba4954378
16 changed files with 36 additions and 672 deletions
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87
hal/HalHWImg8188E_BB.c
View file

@ -20,9 +20,7 @@
#include "odm_precomp.h"
#ifdef CONFIG_IOL_IOREG_CFG
#include <rtw_iol.h>
#endif
#if (RTL8188E_SUPPORT == 1)
static bool
@ -208,18 +206,15 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
u4Byte ArrayLen = sizeof(Array_AGC_TAB_1T_8188E)/sizeof(u4Byte);
pu4Byte Array = Array_AGC_TAB_1T_8188E;
bool biol = false;
#ifdef CONFIG_IOL_IOREG_CFG
PADAPTER Adapter = pDM_Odm->Adapter;
struct xmit_frame *pxmit_frame;
u8 bndy_cnt=1;
#endif/* ifdef CONFIG_IOL_IOREG_CFG */
HAL_STATUS rst =HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += 0xFF000000;
#ifdef CONFIG_IOL_IOREG_CFG
biol = rtw_IOL_applied(Adapter);
if (biol){
@ -228,7 +223,6 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
return HAL_STATUS_FAILURE;
}
}
#endif/* ifdef CONFIG_IOL_IOREG_CFG */
for (i = 0; i < ArrayLen; i += 2 )
{
@ -238,14 +232,12 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
/* This (offset, data) pair meets the condition. */
if ( v1 < 0xCDCDCDCD )
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord);
}
else
#endif /* ifdef CONFIG_IOL_IOREG_CFG */
{
odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2);
}
@ -271,14 +263,12 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen -2)
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord);
}
else
#endif /* ifdef CONFIG_IOL_IOREG_CFG */
{
odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2);
}
@ -293,32 +283,12 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
}
}
}
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
{
#ifdef CONFIG_IOL_IOREG_CFG_DBG
printk("~~~ %s Success !!!\n",__func__);
{
/* dump data from TX packet buffer */
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
#endif /* CONFIG_IOL_IOREG_CFG_DBG */
}
else{
if (!rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
printk("~~~ %s IOL_exec_cmds Failed !!!\n",__func__);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
{
/* dump data from TX packet buffer */
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
#endif /* CONFIG_IOL_IOREG_CFG_DBG */
rst = HAL_STATUS_FAILURE;
}
}
#endif /* ifdef CONFIG_IOL_IOREG_CFG */
return rst;
}
@ -538,21 +508,14 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
u4Byte ArrayLen = sizeof(Array_PHY_REG_1T_8188E)/sizeof(u4Byte);
pu4Byte Array = Array_PHY_REG_1T_8188E;
bool biol = false;
#ifdef CONFIG_IOL_IOREG_CFG
PADAPTER Adapter = pDM_Odm->Adapter;
struct xmit_frame *pxmit_frame;
u8 bndy_cnt=1;
#ifdef CONFIG_IOL_IOREG_CFG_DBG
struct cmd_cmp cmpdata[ArrayLen];
u4Byte cmpdata_idx=0;
#endif
#endif/* ifdef CONFIG_IOL_IOREG_CFG */
HAL_STATUS rst =HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += 0xFF000000;
#ifdef CONFIG_IOL_IOREG_CFG
biol = rtw_IOL_applied(Adapter);
if (biol){
@ -562,7 +525,6 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
return HAL_STATUS_FAILURE;
}
}
#endif/* ifdef CONFIG_IOL_IOREG_CFG */
for (i = 0; i < ArrayLen; i += 2 )
{
@ -573,7 +535,6 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
/* This (offset, data) pair meets the condition. */
if ( v1 < 0xCDCDCDCD )
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
@ -602,15 +563,9 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
pDM_Odm->RFCalibrateInfo.RegA24 = v2;
rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
cmpdata[cmpdata_idx].addr = v1;
cmpdata[cmpdata_idx].value= v2;
cmpdata_idx++;
#endif
}
}
else
#endif /* ifdef CONFIG_IOL_IOREG_CFG */
{
odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2);
}
@ -636,7 +591,6 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen -2)
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
@ -663,15 +617,9 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
pDM_Odm->RFCalibrateInfo.RegA24 = v2;
rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
cmpdata[cmpdata_idx].addr = v1;
cmpdata[cmpdata_idx].value= v2;
cmpdata_idx++;
#endif
}
}
else
#endif /* ifdef CONFIG_IOL_IOREG_CFG */
{
odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2);
}
@ -686,44 +634,13 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
}
}
}
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
/* printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__func__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt); */
if (rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
{
#ifdef CONFIG_IOL_IOREG_CFG_DBG
printk("~~~ %s IOL_exec_cmds Success !!!\n",__func__);
{
u4Byte idx;
u4Byte cdata;
printk(" %s data compare => array_len:%d\n",__func__,cmpdata_idx);
printk("### %s data compared !!###\n",__func__);
for (idx=0;idx< cmpdata_idx;idx++)
{
cdata = ODM_Read4Byte(pDM_Odm, cmpdata[idx].addr);
if (cdata != cmpdata[idx].value){
printk(" addr:0x%04x, data:(0x%02x : 0x%02x)\n",
cmpdata[idx].addr,cmpdata[idx].value,cdata);
rst = HAL_STATUS_FAILURE;
}
}
printk("### %s data compared !!###\n",__func__);
/* dump data from TX packet buffer */
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
#endif /* CONFIG_IOL_IOREG_CFG_DBG */
} else {
if (!rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
rst = HAL_STATUS_FAILURE;
printk("~~~ IOL Config %s Failed !!!\n",__func__);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
{
/* dump data from TX packet buffer */
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
#endif /* CONFIG_IOL_IOREG_CFG_DBG */
}
}
#endif /* ifdef CONFIG_IOL_IOREG_CFG */
return rst;
}

67
hal/HalHWImg8188E_MAC.c
View file

@ -19,9 +19,7 @@
******************************************************************************/
#include "odm_precomp.h"
#ifdef CONFIG_IOL_IOREG_CFG
#include <rtw_iol.h>
#endif
#if (RTL8188E_SUPPORT == 1)
static bool
CheckCondition(
@ -169,22 +167,15 @@ ODM_ReadAndConfig_MAC_REG_8188E(
pu4Byte Array = Array_MAC_REG_8188E;
bool biol = false;
#ifdef CONFIG_IOL_IOREG_CFG
PADAPTER Adapter = pDM_Odm->Adapter;
struct xmit_frame *pxmit_frame;
u8 bndy_cnt = 1;
#ifdef CONFIG_IOL_IOREG_CFG_DBG
struct cmd_cmp cmpdata[ArrayLen];
u4Byte cmpdata_idx=0;
#endif
#endif /* CONFIG_IOL_IOREG_CFG */
HAL_STATUS rst =HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += 0xFF000000;
#ifdef CONFIG_IOL_IOREG_CFG
biol = rtw_IOL_applied(Adapter);
if (biol){
@ -195,8 +186,6 @@ ODM_ReadAndConfig_MAC_REG_8188E(
}
}
#endif /* CONFIG_IOL_IOREG_CFG */
for (i = 0; i < ArrayLen; i += 2 )
{
u4Byte v1 = Array[i];
@ -205,21 +194,12 @@ ODM_ReadAndConfig_MAC_REG_8188E(
/* This (offset, data) pair meets the condition. */
if ( v1 < 0xCDCDCDCD )
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WB_cmd(pxmit_frame,(u2Byte)v1, (u1Byte)v2,0xFF);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
cmpdata[cmpdata_idx].addr = v1;
cmpdata[cmpdata_idx].value= v2;
cmpdata_idx++;
#endif
}
else
#endif /* endif CONFIG_IOL_IOREG_CFG */
{
odm_ConfigMAC_8188E(pDM_Odm, v1, (u1Byte)v2);
}
@ -245,19 +225,12 @@ ODM_ReadAndConfig_MAC_REG_8188E(
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen -2)
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WB_cmd(pxmit_frame,(u2Byte)v1, (u1Byte)v2,0xFF);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
cmpdata[cmpdata_idx].addr = v1;
cmpdata[cmpdata_idx].value= v2;
cmpdata_idx++;
#endif
}
else
#endif /* ifdef CONFIG_IOL_IOREG_CFG */
{
odm_ConfigMAC_8188E(pDM_Odm, v1, (u1Byte)v2);
}
@ -274,51 +247,13 @@ ODM_ReadAndConfig_MAC_REG_8188E(
}
}
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
#ifdef CONFIG_IOL_IOREG_CFG_DBG
printk("~~~ IOL Config MAC Success !!!\n");
/* compare written data */
{
u4Byte idx;
u1Byte cdata;
/* HAL_STATUS_FAILURE; */
printk(" MAC data compare => array_len:%d\n",cmpdata_idx);
for (idx=0;idx< cmpdata_idx;idx++)
{
cdata = ODM_Read1Byte(pDM_Odm, cmpdata[idx].addr);
if (cdata != cmpdata[idx].value){
printk("### MAC data compared failed !! addr:0x%04x, data:(0x%02x : 0x%02x) ###\n",
cmpdata[idx].addr,cmpdata[idx].value,cdata);
/* rst = HAL_STATUS_FAILURE; */
}
}
/* dump data from TX packet buffer */
/* if (rst == HAL_STATUS_FAILURE) */
{
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
}
#endif /* CONFIG_IOL_IOREG_CFG_DBG */
}
else{
if (!rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
printk("~~~ MAC IOL_exec_cmds Failed !!!\n");
#ifdef CONFIG_IOL_IOREG_CFG_DBG
{
/* dump data from TX packet buffer */
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
#endif /* CONFIG_IOL_IOREG_CFG_DBG */
rst = HAL_STATUS_FAILURE;
}
}
#endif /* ifdef CONFIG_IOL_IOREG_CFG */
return rst;
}

66
hal/HalHWImg8188E_RF.c
View file

@ -20,9 +20,7 @@
#include "odm_precomp.h"
#ifdef CONFIG_IOL_IOREG_CFG
#include <rtw_iol.h>
#endif
#if (RTL8188E_SUPPORT == 1)
static bool
@ -176,22 +174,15 @@ HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(PDM_ODM_T pDM_Odm)
u4Byte ArrayLen = sizeof(Array_RadioA_1T_8188E)/sizeof(u4Byte);
pu4Byte Array = Array_RadioA_1T_8188E;
bool biol = false;
#ifdef CONFIG_IOL_IOREG_CFG
PADAPTER Adapter = pDM_Odm->Adapter;
struct xmit_frame *pxmit_frame;
u8 bndy_cnt = 1;
#ifdef CONFIG_IOL_IOREG_CFG_DBG
struct cmd_cmp cmpdata[ArrayLen];
u4Byte cmpdata_idx=0;
#endif
#endif/* ifdef CONFIG_IOL_IOREG_CFG */
HAL_STATUS rst =HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += 0xFF000000;
#ifdef CONFIG_IOL_IOREG_CFG
biol = rtw_IOL_applied(Adapter);
if (biol){
@ -201,7 +192,6 @@ HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(PDM_ODM_T pDM_Odm)
return HAL_STATUS_FAILURE;
}
}
#endif/* ifdef CONFIG_IOL_IOREG_CFG */
for (i = 0; i < ArrayLen; i += 2 )
{
@ -211,7 +201,6 @@ HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(PDM_ODM_T pDM_Odm)
/* This (offset, data) pair meets the condition. */
if ( v1 < 0xCDCDCDCD )
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
@ -237,16 +226,10 @@ HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(PDM_ODM_T pDM_Odm)
}
else{
rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A,(u2Byte)v1, v2,bRFRegOffsetMask) ;
#ifdef CONFIG_IOL_IOREG_CFG_DBG
cmpdata[cmpdata_idx].addr = v1;
cmpdata[cmpdata_idx].value= v2;
cmpdata_idx++;
#endif
}
}
else
#endif /* ifdef CONFIG_IOL_IOREG_CFG */
{
odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2);
}
@ -272,7 +255,6 @@ HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(PDM_ODM_T pDM_Odm)
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen -2)
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
@ -298,17 +280,10 @@ HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(PDM_ODM_T pDM_Odm)
}
else{
rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A,(u2Byte)v1, v2,bRFRegOffsetMask) ;
#ifdef CONFIG_IOL_IOREG_CFG_DBG
cmpdata[cmpdata_idx].addr = v1;
cmpdata[cmpdata_idx].value= v2;
cmpdata_idx++;
#endif
}
}
else
#endif /* ifdef CONFIG_IOL_IOREG_CFG */
{
odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2);
}
@ -316,55 +291,16 @@ HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(PDM_ODM_T pDM_Odm)
}
while (v2 != 0xDEAD && i < ArrayLen -2)
{
READ_NEXT_PAIR(v1, v2, i);
}
}
}
}
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
{
#ifdef CONFIG_IOL_IOREG_CFG_DBG
printk("~~~ %s Success !!!\n",__func__);
{
u4Byte idx;
u4Byte cdata;
printk(" %s data compare => array_len:%d\n",__func__,cmpdata_idx);
printk("### %s data compared !!###\n",__func__);
for (idx=0;idx< cmpdata_idx;idx++)
{
cdata = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A,cmpdata[idx].addr,bRFRegOffsetMask);
if (cdata != cmpdata[idx].value){
printk("addr:0x%04x, data:(0x%02x : 0x%02x)\n",
cmpdata[idx].addr,cmpdata[idx].value,cdata);
rst = HAL_STATUS_FAILURE;
}
}
printk("### %s data compared !!###\n",__func__);
{/* dump data from TX packet buffer */
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
}
#endif /* CONFIG_IOL_IOREG_CFG_DBG */
}
else{
if (!rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
rst = HAL_STATUS_FAILURE;
printk("~~~ IOL Config %s Failed !!!\n",__func__);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
{
/* dump data from TX packet buffer */
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
#endif /* CONFIG_IOL_IOREG_CFG_DBG */
}
}
#endif /* ifdef CONFIG_IOL_IOREG_CFG */
return rst;
}

2
hal/hal_intf.c
View file

@ -404,14 +404,12 @@ u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter)
#endif /* DBG_CONFIG_ERROR_DETECT */
#ifdef CONFIG_IOL
int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt)
{
if (adapter->HalFunc.IOL_exec_cmds_sync)
return adapter->HalFunc.IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms,bndy_cnt);
return _FAIL;
}
#endif
#ifdef CONFIG_XMIT_THREAD_MODE
s32 rtw_hal_xmit_thread_handler(_adapter *padapter)

15
hal/rtl8188e_hal_init.c
View file

@ -26,7 +26,6 @@
#include <rtw_iol.h>
#if defined(CONFIG_IOL)
#include <usb_ops.h>
static void iol_mode_enable(PADAPTER padapter, u8 enable)
@ -413,7 +412,6 @@ void rtw_IOL_cmd_tx_pkt_buf_dump(ADAPTER *Adapter,int data_len)
}
DBG_88E("###### %s ######\n",__func__);
}
#endif /* defined(CONFIG_IOL) */
static void _FWDownloadEnable(PADAPTER padapter, bool enable)
{
@ -1250,7 +1248,6 @@ ReadEFuseByIC(
u8 logical_map[512];
#endif
#ifdef CONFIG_IOL_READ_EFUSE_MAP
if (!bPseudoTest )/* rtw_IOL_applied(Adapter)) */
{
int ret = _FAIL;
@ -1270,7 +1267,6 @@ ReadEFuseByIC(
goto exit;
}
}
#endif
Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
exit:
@ -2592,9 +2588,7 @@ void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
pHalFunc->xmit_thread_handler = &hal_xmit_handler;
#endif
#ifdef CONFIG_IOL
pHalFunc->IOL_exec_cmds_sync = &rtl8188e_IOL_exec_cmds_sync;
#endif
pHalFunc->hal_notch_filter = &hal_notch_filter_8188e;
@ -2653,14 +2647,9 @@ s32 InitLLTTable(PADAPTER padapter, u8 txpktbuf_bndy)
u32 Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;/* 176, 22k */
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
#if defined(CONFIG_IOL_LLT)
if (rtw_IOL_applied(padapter))
{
if (rtw_IOL_applied(padapter)) {
status = iol_InitLLTTable(padapter, txpktbuf_bndy);
}
else
#endif
{
} else {
for (i = 0; i < (txpktbuf_bndy - 1); i++) {
status = _LLTWrite(padapter, i, i + 1);
if (_SUCCESS != status) {

149
hal/rtl8188e_phycfg.c
View file

@ -22,14 +22,9 @@
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#ifdef CONFIG_IOL
#include <rtw_iol.h>
#endif
#include <rtl8188e_hal.h>
/*---------------------------Define Local Constant---------------------------*/
/* Channel switch:The size of command tables for switch channel*/
#define MAX_PRECMD_CNT 16
@ -638,26 +633,10 @@ phy_ConfigMACWithHeaderFile(
ArrayLength = Rtl8188E_MAC_ArrayLength;
ptrArray = (u32*)Rtl8188E_MAC_Array;
#ifdef CONFIG_IOL_MAC
{
struct xmit_frame *xmit_frame;
if ((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL)
return _FAIL;
for (i = 0 ;i < ArrayLength;i=i+2){ /* Add by tynli for 2 column */
rtw_IOL_append_WB_cmd(xmit_frame, ptrArray[i], (u8)ptrArray[i+1]);
}
return rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0);
}
#else
for (i = 0 ;i < ArrayLength;i=i+2){ /* Add by tynli for 2 column */
rtw_write8(Adapter, ptrArray[i], (u8)ptrArray[i+1]);
}
#endif
return _SUCCESS;
}
#endif /* ifndef CONFIG_PHY_SETTING_WITH_ODM */
@ -913,41 +892,6 @@ phy_ConfigBBWithHeaderFile(
if (ConfigType == CONFIG_BB_PHY_REG)
{
#ifdef CONFIG_IOL_BB_PHY_REG
{
struct xmit_frame *xmit_frame;
u32 tmp_value;
if ((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) {
ret = _FAIL;
goto exit;
}
for (i=0;i<PHY_REGArrayLen;i=i+2)
{
tmp_value=Rtl819XPHY_REGArray_Table[i+1];
if (Rtl819XPHY_REGArray_Table[i] == 0xfe)
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 50);
else if (Rtl819XPHY_REGArray_Table[i] == 0xfd)
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 5);
else if (Rtl819XPHY_REGArray_Table[i] == 0xfc)
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 1);
else if (Rtl819XPHY_REGArray_Table[i] == 0xfb)
rtw_IOL_append_DELAY_US_cmd(xmit_frame, 50);
else if (Rtl819XPHY_REGArray_Table[i] == 0xfa)
rtw_IOL_append_DELAY_US_cmd(xmit_frame, 5);
else if (Rtl819XPHY_REGArray_Table[i] == 0xf9)
rtw_IOL_append_DELAY_US_cmd(xmit_frame, 1);
else if (Rtl819XPHY_REGArray_Table[i] == 0xa24)
podmpriv->RFCalibrateInfo.RegA24 = Rtl819XPHY_REGArray_Table[i+1];
rtw_IOL_append_WD_cmd(xmit_frame, Rtl819XPHY_REGArray_Table[i], tmp_value);
}
ret = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0);
}
#else
for (i=0;i<PHY_REGArrayLen;i=i+2)
{
if (Rtl819XPHY_REGArray_Table[i] == 0xfe){
@ -971,29 +915,11 @@ phy_ConfigBBWithHeaderFile(
/* Add 1us delay between BB/RF register setting. */
rtw_udelay_os(1);
}
#endif
/* for External PA */
phy_ConfigBBExternalPA(Adapter);
}
else if (ConfigType == CONFIG_BB_AGC_TAB)
{
#ifdef CONFIG_IOL_BB_AGC_TAB
{
struct xmit_frame *xmit_frame;
if ((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) {
ret = _FAIL;
goto exit;
}
for (i=0;i<AGCTAB_ArrayLen;i=i+2)
{
rtw_IOL_append_WD_cmd(xmit_frame, Rtl819XAGCTAB_Array_Table[i], Rtl819XAGCTAB_Array_Table[i+1]);
}
ret = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0);
}
#else
for (i=0;i<AGCTAB_ArrayLen;i=i+2)
{
PHY_SetBBReg(Adapter, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, Rtl819XAGCTAB_Array_Table[i+1]);
@ -1001,7 +927,6 @@ phy_ConfigBBWithHeaderFile(
/* Add 1us delay between BB/RF register setting. */
rtw_udelay_os(1);
}
#endif
}
exit:
@ -1391,42 +1316,6 @@ rtl8188e_PHY_ConfigRFWithHeaderFile(
switch (eRFPath)
{
case RF_PATH_A:
#ifdef CONFIG_IOL_RF_RF_PATH_A
{
struct xmit_frame *xmit_frame;
if ((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) {
rtStatus = _FAIL;
goto exit;
}
for (i = 0;i<RadioA_ArrayLen; i=i+2)
{
if (Rtl819XRadioA_Array_Table[i] == 0xfe)
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 50);
else if (Rtl819XRadioA_Array_Table[i] == 0xfd)
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 5);
else if (Rtl819XRadioA_Array_Table[i] == 0xfc)
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 1);
else if (Rtl819XRadioA_Array_Table[i] == 0xfb)
rtw_IOL_append_DELAY_US_cmd(xmit_frame, 50);
else if (Rtl819XRadioA_Array_Table[i] == 0xfa)
rtw_IOL_append_DELAY_US_cmd(xmit_frame, 5);
else if (Rtl819XRadioA_Array_Table[i] == 0xf9)
rtw_IOL_append_DELAY_US_cmd(xmit_frame, 1);
else
{
BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath];
u32 NewOffset = 0;
u32 DataAndAddr = 0;
NewOffset = Rtl819XRadioA_Array_Table[i] & 0x3f;
DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioA_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; /* T65 RF */
rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr);
}
}
rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0);
}
#else
for (i = 0;i<RadioA_ArrayLen; i=i+2)
{
if (Rtl819XRadioA_Array_Table[i] == 0xfe) {
@ -1449,47 +1338,10 @@ rtl8188e_PHY_ConfigRFWithHeaderFile(
rtw_udelay_os(1);
}
}
#endif
/* Add for High Power PA */
PHY_ConfigRFExternalPA(Adapter, eRFPath);
break;
case RF_PATH_B:
#ifdef CONFIG_IOL_RF_RF_PATH_B
{
struct xmit_frame *xmit_frame;
if ((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) {
rtStatus = _FAIL;
goto exit;
}
for (i = 0;i<RadioB_ArrayLen; i=i+2)
{
if (Rtl819XRadioB_Array_Table[i] == 0xfe)
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 50);
else if (Rtl819XRadioB_Array_Table[i] == 0xfd)
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 5);
else if (Rtl819XRadioB_Array_Table[i] == 0xfc)
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, 1);
else if (Rtl819XRadioB_Array_Table[i] == 0xfb)
rtw_IOL_append_DELAY_US_cmd(xmit_frame, 50);
else if (Rtl819XRadioB_Array_Table[i] == 0xfa)
rtw_IOL_append_DELAY_US_cmd(xmit_frame, 5);
else if (Rtl819XRadioB_Array_Table[i] == 0xf9)
rtw_IOL_append_DELAY_US_cmd(xmit_frame, 1);
else
{
BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath];
u32 NewOffset = 0;
u32 DataAndAddr = 0;
NewOffset = Rtl819XRadioB_Array_Table[i] & 0x3f;
DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioB_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; /* T65 RF */
rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr);
}
}
rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000,0);
}
#else
for (i = 0;i<RadioB_ArrayLen; i=i+2)
{
if (Rtl819XRadioB_Array_Table[i] == 0xfe)
@ -1513,7 +1365,6 @@ rtl8188e_PHY_ConfigRFWithHeaderFile(
rtw_udelay_os(1);
}
}
#endif
break;
case RF_PATH_C:
break;

6
hal/rtl8188eu_xmit.c
View file

@ -508,9 +508,6 @@ s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter)
}
#endif
#ifdef CONFIG_IOL_IOREG_CFG_DBG
#include <rtw_iol.h>
#endif
/* for non-agg data frame or management frame */
static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe)
{
@ -568,9 +565,6 @@ static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe)
{
w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ;
}
#ifdef CONFIG_IOL_IOREG_CFG_DBG
rtw_IOL_cmd_buf_dump(padapter,w_sz,pxmitframe->buf_addr);
#endif
ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe);
#ifdef CONFIG_XMIT_THREAD_MODE

31
hal/usb_halinit.c
View file

@ -26,11 +26,7 @@
#include <rtl8188e_hal.h>
#include <rtl8188e_led.h>
#ifdef CONFIG_IOL
#include <rtw_iol.h>
#endif
#include <usb_ops.h>
#include <usb_hal.h>
#include <usb_osintf.h>
@ -1236,7 +1232,7 @@ static u32 rtl8188eu_hal_init(PADAPTER Adapter)
_func_enter_;
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
#ifdef CONFIG_WOWLAN
@ -1288,8 +1284,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
goto exit;
}
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
status = rtl8188eu_InitPowerOn(Adapter);
if (status == _FAIL){
RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n"));
@ -1315,19 +1310,15 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E;
}
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);
_InitQueueReservedPage(Adapter);
_InitQueuePriority(Adapter);
_InitPageBoundary(Adapter);
_InitTransferPageSize(Adapter);
#ifdef CONFIG_IOL_IOREG_CFG
_InitTxBufferBoundary(Adapter, 0);
#endif
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
#if (MP_DRIVER == 1)
if (Adapter->registrypriv.mp_mode == 1)
{
@ -1357,7 +1348,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
}
rtl8188e_InitializeFirmwareVars(Adapter);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC);
#if (HAL_MAC_ENABLE == 1)
status = PHY_MACConfig8188E(Adapter);
if (status == _FAIL)
@ -1370,7 +1361,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC);
/* */
/* d. Initialize BB related configurations. */
/* */
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB);
#if (HAL_BB_ENABLE == 1)
status = PHY_BBConfig8188E(Adapter);
if (status == _FAIL)
@ -1381,7 +1372,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB);
#endif
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF);
#if (HAL_RF_ENABLE == 1)
status = PHY_RFConfig8188E(Adapter);
if (status == _FAIL)
@ -1391,25 +1382,23 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF);
}
#endif
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH);
#if defined(CONFIG_IOL_EFUSE_PATCH)
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH);
status = rtl8188e_iol_efuse_patch(Adapter);
if (status == _FAIL){
DBG_88E("%s rtl8188e_iol_efuse_patch failed\n",__func__);
goto exit;
}
#endif
_InitTxBufferBoundary(Adapter, txpktbuf_bndy);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);
status = InitLLTTable(Adapter, txpktbuf_bndy);
if (status == _FAIL){
RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n"));
goto exit;
}
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
/* Get Rx PHY status in order to report RSSI and others. */
_InitDriverInfoSize(Adapter, DRVINFO_SZ);