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Change "if(" to "if (" and the same changes for "while", "for", "switch" and "do"

Browse source 
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2013-05-08 23:04:25 -05:00
parent 124abebb96
commit a55f866a62
105 changed files with 6893 additions and 6893 deletions
Download patch file Download diff file Expand all files Collapse all files

92
hal/Hal8188ERateAdaptive.c
View file

@ -15,7 +15,7 @@ Major Change History:
--*/
#include "odm_precomp.h"
//#if( DM_ODM_SUPPORT_TYPE == ODM_MP)
//#if ( DM_ODM_SUPPORT_TYPE == ODM_MP)
//#include "Mp_Precomp.h"
//#endif
@ -169,8 +169,8 @@ odm_SetTxRPTTiming_8188E(
{
u1Byte idx = 0;
for(idx=0; idx<5; idx++)
if(DynamicTxRPTTiming[idx] == pRaInfo->RptTime)
for (idx=0; idx<5; idx++)
if (DynamicTxRPTTiming[idx] == pRaInfo->RptTime)
break;
if (extend==0) // back to default timing
@ -181,7 +181,7 @@ odm_SetTxRPTTiming_8188E(
idx=5;
}
else if (extend==2) {// decrease the timing
if(idx!=0)
if (idx!=0)
idx-=1;
}
pRaInfo->RptTime=DynamicTxRPTTiming[idx];
@ -199,7 +199,7 @@ odm_RateDown_8188E(
u1Byte i;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDown_8188E()\n"));
if(NULL == pRaInfo)
if (NULL == pRaInfo)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateDown_8188E(): pRaInfo is NULL\n"));
return -1;
@ -215,7 +215,7 @@ odm_RateDown_8188E(
{
RateID=HighestRate;
}
else if(pRaInfo->RateSGI)
else if (pRaInfo->RateSGI)
{
pRaInfo->RateSGI=0;
}
@ -243,14 +243,14 @@ RateDownFinish:
pRaInfo->RAWaitingCounter+=1;
pRaInfo->RAPendingCounter+=1;
}
else if(pRaInfo->RAWaitingCounter==0){
else if (pRaInfo->RAWaitingCounter==0){
}
else{
pRaInfo->RAWaitingCounter=0;
pRaInfo->RAPendingCounter=0;
}
if(pRaInfo->RAPendingCounter>=4)
if (pRaInfo->RAPendingCounter>=4)
pRaInfo->RAPendingCounter=4;
pRaInfo->DecisionRate=RateID;
@ -272,7 +272,7 @@ odm_RateUp_8188E(
u1Byte i;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateUp_8188E() \n"));
if(NULL == pRaInfo)
if (NULL == pRaInfo)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E(): pRaInfo is NULL\n"));
return -1;
@ -304,21 +304,21 @@ odm_RateUp_8188E(
}
}
}
else if(RateID == HighestRate)
else if (RateID == HighestRate)
{
if (pRaInfo->SGIEnable && (pRaInfo->RateSGI != 1))
pRaInfo->RateSGI = 1;
else if((pRaInfo->SGIEnable) !=1 )
else if ((pRaInfo->SGIEnable) !=1 )
pRaInfo->RateSGI = 0;
}
else //if((sta_info_ra->Decision_rate) > (sta_info_ra->Highest_rate))
else //if ((sta_info_ra->Decision_rate) > (sta_info_ra->Highest_rate))
{
RateID = HighestRate;
}
RateUpfinish:
//if(pRaInfo->RAWaitingCounter==10)
if(pRaInfo->RAWaitingCounter==(4+PendingForRateUpFail[pRaInfo->RAPendingCounter]))
//if (pRaInfo->RAWaitingCounter==10)
if (pRaInfo->RAWaitingCounter==(4+PendingForRateUpFail[pRaInfo->RAPendingCounter]))
pRaInfo->RAWaitingCounter=0;
else
pRaInfo->RAWaitingCounter++;
@ -408,7 +408,7 @@ odm_RateDecision_8188E(
else if (pRaInfo->NscUp > N_THRESHOLD_HIGH[RateID])
odm_RateUp_8188E(pDM_Odm,pRaInfo);
if(pRaInfo->DecisionRate > pRaInfo->HighestRate)
if (pRaInfo->DecisionRate > pRaInfo->HighestRate)
pRaInfo->DecisionRate = pRaInfo->HighestRate;
if ((pRaInfo->DecisionRate)==(pRaInfo->PreRate))
@ -438,7 +438,7 @@ odm_ARFBRefresh_8188E(
u4Byte MaskFromReg;
s1Byte i;
switch(pRaInfo->RateID){
switch (pRaInfo->RateID){
case RATR_INX_WIRELESS_NGB:
pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0f8ff015;
break;
@ -485,7 +485,7 @@ odm_ARFBRefresh_8188E(
if (pRaInfo->RAUseRate){
for (i=RATESIZE;i>=0;i--)
{
if((pRaInfo->RAUseRate)&BIT(i)){
if ((pRaInfo->RAUseRate)&BIT(i)){
pRaInfo->HighestRate=i;
break;
}
@ -498,7 +498,7 @@ odm_ARFBRefresh_8188E(
if (pRaInfo->RAUseRate){
for (i=0;i<RATESIZE;i++)
{
if((pRaInfo->RAUseRate)&BIT(i))
if ((pRaInfo->RAUseRate)&BIT(i))
{
pRaInfo->LowestRate=i;
break;
@ -512,9 +512,9 @@ odm_ARFBRefresh_8188E(
#if POWER_TRAINING_ACTIVE == 1
if (pRaInfo->HighestRate >0x13)
pRaInfo->PTModeSS=3;
else if(pRaInfo->HighestRate >0x0b)
else if (pRaInfo->HighestRate >0x0b)
pRaInfo->PTModeSS=2;
else if(pRaInfo->HighestRate >0x0b)
else if (pRaInfo->HighestRate >0x0b)
pRaInfo->PTModeSS=1;
else
pRaInfo->PTModeSS=0;
@ -523,7 +523,7 @@ odm_ARFBRefresh_8188E(
#endif
if(pRaInfo->DecisionRate > pRaInfo->HighestRate)
if (pRaInfo->DecisionRate > pRaInfo->HighestRate)
pRaInfo->DecisionRate = pRaInfo->HighestRate;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
@ -572,7 +572,7 @@ odm_PTTryState_8188E(
{
if (pRaInfo->PTStage==0)
pRaInfo->PTStage=1;
else if(pRaInfo->PTStage==1)
else if (pRaInfo->PTStage==1)
pRaInfo->PTStage=3;
else
pRaInfo->PTStage=5;
@ -608,10 +608,10 @@ odm_PTDecision_8188E(
stage_BUF=pRaInfo->PTStage;
numsc = 0;
num_total= pRaInfo->TOTAL* PT_PENALTY[5];
for(j=0;j<=4;j++)
for (j=0;j<=4;j++)
{
numsc += pRaInfo->RTY[j] * PT_PENALTY[j];
if(numsc>num_total)
if (numsc>num_total)
break;
}
@ -645,10 +645,10 @@ odm_RATxRPTTimerSetting(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,(" =====>odm_RATxRPTTimerSetting()\n"));
if(pDM_Odm->CurrminRptTime != minRptTime){
if (pDM_Odm->CurrminRptTime != minRptTime){
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
(" CurrminRptTime =0x%04x minRptTime=0x%04x\n", pDM_Odm->CurrminRptTime, minRptTime));
#if(DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_AP))
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_AP))
ODM_RA_Set_TxRPT_Time(pDM_Odm,minRptTime);
#else
rtw_rpt_timer_cfg_cmd(pDM_Odm->Adapter,minRptTime);
@ -684,16 +684,16 @@ ODM_RAInfo_Init(
#if 1
u1Byte WirelessMode=0xFF; //invalid value
u1Byte max_rate_idx = 0x13; //MCS7
if(pDM_Odm->pWirelessMode!=NULL){
if (pDM_Odm->pWirelessMode!=NULL){
WirelessMode=*(pDM_Odm->pWirelessMode);
}
if(WirelessMode != 0xFF ){
if(WirelessMode & ODM_WM_N24G)
if (WirelessMode != 0xFF ){
if (WirelessMode & ODM_WM_N24G)
max_rate_idx = 0x13;
else if(WirelessMode & ODM_WM_G)
else if (WirelessMode & ODM_WM_G)
max_rate_idx = 0x0b;
else if(WirelessMode & ODM_WM_B)
else if (WirelessMode & ODM_WM_B)
max_rate_idx = 0x03;
}
@ -755,7 +755,7 @@ ODM_RAInfo_Init_all(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>\n"));
pDM_Odm->CurrminRptTime = 0;
for(MacID=0; MacID<ODM_ASSOCIATE_ENTRY_NUM; MacID++)
for (MacID=0; MacID<ODM_ASSOCIATE_ENTRY_NUM; MacID++)
ODM_RAInfo_Init(pDM_Odm,MacID);
return 0;
@ -768,7 +768,7 @@ ODM_RA_GetShortGI_8188E(
IN u1Byte MacID
)
{
if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
if ((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
return 0;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("MacID=%d SGI=%d\n", MacID, pDM_Odm->RAInfo[MacID].RateSGI));
@ -783,7 +783,7 @@ ODM_RA_GetDecisionRate_8188E(
{
u1Byte DecisionRate = 0;
if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
if ((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
return 0;
DecisionRate = (pDM_Odm->RAInfo[MacID].DecisionRate);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
@ -798,7 +798,7 @@ ODM_RA_GetHwPwrStatus_8188E(
)
{
u1Byte PTStage = 5;
if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
if ((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
return 0;
PTStage = (pDM_Odm->RAInfo[MacID].PTStage);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
@ -820,7 +820,7 @@ ODM_RA_UpdateRateInfo_8188E(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("MacID=%d RateID=0x%x RateMask=0x%x SGIEnable=%d\n",
MacID, RateID, RateMask, SGIEnable));
if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
if ((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
return;
pRaInfo = &(pDM_Odm->RAInfo[MacID]);
@ -841,7 +841,7 @@ ODM_RA_SetRSSI_8188E(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" MacID=%d Rssi=%d\n", MacID, Rssi));
if((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
if ((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
return;
pRaInfo = &(pDM_Odm->RAInfo[MacID]);
@ -854,7 +854,7 @@ ODM_RA_Set_TxRPT_Time(
IN u2Byte minRptTime
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
if (minRptTime != 0xffff)
#endif
ODM_Write2Byte(pDM_Odm, REG_TX_RPT_TIME, minRptTime);
@ -884,15 +884,15 @@ ODM_RA_TxRPT2Handle_8188E(
do
{
if(MacId >= ASSOCIATE_ENTRY_NUM)
if (MacId >= ASSOCIATE_ENTRY_NUM)
valid = 0;
else if(MacId >= 32)
else if (MacId >= 32)
valid = (1<<(MacId-32)) & MacIDValidEntry1;
else
valid = (1<<MacId) & MacIDValidEntry0;
pRAInfo = &(pDM_Odm->RAInfo[MacId]);
if(valid)
if (valid)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
@ -916,7 +916,7 @@ ODM_RA_TxRPT2Handle_8188E(
pRAInfo->RTY[3] + \
pRAInfo->RTY[4] + \
pRAInfo->DROP;
if(pRAInfo->TOTAL != 0)
if (pRAInfo->TOTAL != 0)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("macid=%d Total=%d R0=%d R1=%d R2=%d R3=%d R4=%d D0=%d valid0=%x valid1=%x\n",
@ -932,10 +932,10 @@ ODM_RA_TxRPT2Handle_8188E(
MacIDValidEntry1));
#if POWER_TRAINING_ACTIVE == 1
if (pRAInfo->PTActive){
if(pRAInfo->RAstage<5){
if (pRAInfo->RAstage<5){
odm_RateDecision_8188E(pDM_Odm,pRAInfo);
}
else if(pRAInfo->RAstage==5){ // Power training try state
else if (pRAInfo->RAstage==5){ // Power training try state
odm_PTTryState_8188E(pRAInfo);
}
else {// RAstage==6
@ -981,12 +981,12 @@ ODM_RA_TxRPT2Handle_8188E(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, (" TOTAL=0!!!!\n"));
}
if(minRptTime > pRAInfo->RptTime)
if (minRptTime > pRAInfo->RptTime)
minRptTime = pRAInfo->RptTime;
pBuffer += TX_RPT2_ITEM_SIZE;
MacId++;
}while(MacId < ItemNum);
}while (MacId < ItemNum);
odm_RATxRPTTimerSetting(pDM_Odm,minRptTime);

42
hal/HalHWImg8188E_BB.c
View file

@ -196,7 +196,7 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
IN PDM_ODM_T pDM_Odm
)
{
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
u4Byte hex = 0;
u4Byte i = 0;
@ -222,8 +222,8 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
#ifdef CONFIG_IOL_IOREG_CFG
biol = rtw_IOL_applied(Adapter);
if(biol){
if((pxmit_frame= rtw_IOL_accquire_xmit_frame(Adapter)) == NULL){
if (biol){
if ((pxmit_frame= rtw_IOL_accquire_xmit_frame(Adapter)) == NULL){
printk("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
}
@ -239,8 +239,8 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
if ( v1 < 0xCDCDCDCD )
{
#ifdef CONFIG_IOL_IOREG_CFG
if(biol){
if(rtw_IOL_cmd_boundary_handle(pxmit_frame))
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord);
}
@ -272,8 +272,8 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
v2 != 0xCDCD && i < ArrayLen -2)
{
#ifdef CONFIG_IOL_IOREG_CFG
if(biol){
if(rtw_IOL_cmd_boundary_handle(pxmit_frame))
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord);
}
@ -294,9 +294,9 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
}
}
#ifdef CONFIG_IOL_IOREG_CFG
if(biol){
if (biol){
//printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt);
if(rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
if (rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
{
#ifdef CONFIG_IOL_IOREG_CFG_DBG
printk("~~~ %s Success !!! \n",__FUNCTION__);
@ -527,7 +527,7 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
IN PDM_ODM_T pDM_Odm
)
{
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
u4Byte hex = 0;
u4Byte i = 0;
@ -556,8 +556,8 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
#ifdef CONFIG_IOL_IOREG_CFG
biol = rtw_IOL_applied(Adapter);
if(biol){
if((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL)
if (biol){
if ((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL)
{
printk("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
@ -575,8 +575,8 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
if ( v1 < 0xCDCDCDCD )
{
#ifdef CONFIG_IOL_IOREG_CFG
if(biol){
if(rtw_IOL_cmd_boundary_handle(pxmit_frame))
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
@ -638,8 +638,8 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
v2 != 0xCDCD && i < ArrayLen -2)
{
#ifdef CONFIG_IOL_IOREG_CFG
if(biol){
if(rtw_IOL_cmd_boundary_handle(pxmit_frame))
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
if (v1 == 0xfe){
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,50);
@ -688,9 +688,9 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
}
}
#ifdef CONFIG_IOL_IOREG_CFG
if(biol){
if (biol){
//printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt);
if(rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
if (rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
{
#ifdef CONFIG_IOL_IOREG_CFG_DBG
printk("~~~ %s IOL_exec_cmds Success !!! \n",__FUNCTION__);
@ -699,17 +699,17 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
u4Byte cdata;
printk(" %s data compare => array_len:%d \n",__FUNCTION__,cmpdata_idx);
printk("### %s data compared !!###\n",__FUNCTION__);
for(idx=0;idx< cmpdata_idx;idx++)
for (idx=0;idx< cmpdata_idx;idx++)
{
cdata = ODM_Read4Byte(pDM_Odm, cmpdata[idx].addr);
if(cdata != cmpdata[idx].value){
if (cdata != cmpdata[idx].value){
printk(" addr:0x%04x, data:(0x%02x : 0x%02x) \n",
cmpdata[idx].addr,cmpdata[idx].value,cdata);
rst = HAL_STATUS_FAILURE;
}
}
printk("### %s data compared !!###\n",__FUNCTION__);
//if(rst == HAL_STATUS_FAILURE)
//if (rst == HAL_STATUS_FAILURE)
{//dump data from TX packet buffer
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}

2
hal/HalHWImg8188E_FW.c
View file

@ -23,7 +23,7 @@
#include "../odm_precomp.h"
#if (RTL8188E_SUPPORT == 1)
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
u1Byte Array_8188E_FW_AP[] = {

24
hal/HalHWImg8188E_MAC.c
View file

@ -156,7 +156,7 @@ ODM_ReadAndConfig_MAC_REG_8188E(
IN PDM_ODM_T pDM_Odm
)
{
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
u4Byte hex = 0;
u4Byte i = 0;
@ -187,8 +187,8 @@ ODM_ReadAndConfig_MAC_REG_8188E(
#ifdef CONFIG_IOL_IOREG_CFG
biol = rtw_IOL_applied(Adapter);
if(biol){
if((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL)
if (biol){
if ((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL)
{
printk("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
@ -207,9 +207,9 @@ ODM_ReadAndConfig_MAC_REG_8188E(
{
#ifdef CONFIG_IOL_IOREG_CFG
if(biol){
if (biol){
if(rtw_IOL_cmd_boundary_handle(pxmit_frame))
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WB_cmd(pxmit_frame,(u2Byte)v1, (u1Byte)v2,0xFF);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
@ -246,8 +246,8 @@ ODM_ReadAndConfig_MAC_REG_8188E(
v2 != 0xCDCD && i < ArrayLen -2)
{
#ifdef CONFIG_IOL_IOREG_CFG
if(biol){
if(rtw_IOL_cmd_boundary_handle(pxmit_frame))
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WB_cmd(pxmit_frame,(u2Byte)v1, (u1Byte)v2,0xFF);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
@ -275,10 +275,10 @@ ODM_ReadAndConfig_MAC_REG_8188E(
}
#ifdef CONFIG_IOL_IOREG_CFG
if(biol){
if (biol){
//printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt);
if(rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
if (rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
{
#ifdef CONFIG_IOL_IOREG_CFG_DBG
printk("~~~ IOL Config MAC Success !!! \n");
@ -288,10 +288,10 @@ ODM_ReadAndConfig_MAC_REG_8188E(
u1Byte cdata;
// HAL_STATUS_FAILURE;
printk(" MAC data compare => array_len:%d \n",cmpdata_idx);
for(idx=0;idx< cmpdata_idx;idx++)
for (idx=0;idx< cmpdata_idx;idx++)
{
cdata = ODM_Read1Byte(pDM_Odm, cmpdata[idx].addr);
if(cdata != cmpdata[idx].value){
if (cdata != cmpdata[idx].value){
printk("### MAC data compared failed !! addr:0x%04x, data:(0x%02x : 0x%02x) ###\n",
cmpdata[idx].addr,cmpdata[idx].value,cdata);
//rst = HAL_STATUS_FAILURE;
@ -300,7 +300,7 @@ ODM_ReadAndConfig_MAC_REG_8188E(
//dump data from TX packet buffer
//if(rst == HAL_STATUS_FAILURE)
//if (rst == HAL_STATUS_FAILURE)
{
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}

28
hal/HalHWImg8188E_RF.c
View file

@ -167,7 +167,7 @@ ODM_ReadAndConfig_RadioA_1T_8188E(
IN PDM_ODM_T pDM_Odm
)
{
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
u4Byte hex = 0;
u4Byte i = 0;
@ -197,8 +197,8 @@ ODM_ReadAndConfig_RadioA_1T_8188E(
#ifdef CONFIG_IOL_IOREG_CFG
biol = rtw_IOL_applied(Adapter);
if(biol){
if((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL)
if (biol){
if ((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL)
{
printk("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
@ -215,11 +215,11 @@ ODM_ReadAndConfig_RadioA_1T_8188E(
if ( v1 < 0xCDCDCDCD )
{
#ifdef CONFIG_IOL_IOREG_CFG
if(biol){
if(rtw_IOL_cmd_boundary_handle(pxmit_frame))
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
if(v1 == 0xffe)
if (v1 == 0xffe)
{
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,50);
}
@ -276,11 +276,11 @@ ODM_ReadAndConfig_RadioA_1T_8188E(
v2 != 0xCDCD && i < ArrayLen -2)
{
#ifdef CONFIG_IOL_IOREG_CFG
if(biol){
if(rtw_IOL_cmd_boundary_handle(pxmit_frame))
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
if(v1 == 0xffe)
if (v1 == 0xffe)
{
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,50);
}
@ -327,9 +327,9 @@ ODM_ReadAndConfig_RadioA_1T_8188E(
}
}
#ifdef CONFIG_IOL_IOREG_CFG
if(biol){
if (biol){
//printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt);
if(rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
if (rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
{
#ifdef CONFIG_IOL_IOREG_CFG_DBG
printk("~~~ %s Success !!! \n",__FUNCTION__);
@ -338,17 +338,17 @@ ODM_ReadAndConfig_RadioA_1T_8188E(
u4Byte cdata;
printk(" %s data compare => array_len:%d \n",__FUNCTION__,cmpdata_idx);
printk("### %s data compared !!###\n",__FUNCTION__);
for(idx=0;idx< cmpdata_idx;idx++)
for (idx=0;idx< cmpdata_idx;idx++)
{
cdata = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A,cmpdata[idx].addr,bRFRegOffsetMask);
if(cdata != cmpdata[idx].value){
if (cdata != cmpdata[idx].value){
printk("addr:0x%04x, data:(0x%02x : 0x%02x) \n",
cmpdata[idx].addr,cmpdata[idx].value,cdata);
rst = HAL_STATUS_FAILURE;
}
}
printk("### %s data compared !!###\n",__FUNCTION__);
//if(rst == HAL_STATUS_FAILURE)
//if (rst == HAL_STATUS_FAILURE)
{//dump data from TX packet buffer
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}

276
hal/HalPhyRf.c
View file

@ -20,7 +20,7 @@
#include "odm_precomp.h"
#if(DM_ODM_SUPPORT_TYPE & ODM_MP)
#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
#include "Mp_Precomp.h"
VOID
@ -54,7 +54,7 @@ phy_PathA_IQK_8192C(
//path-A IQK setting
RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n"));
if(pAdapter->interfaceIndex == 0)
if (pAdapter->interfaceIndex == 0)
{
PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
@ -71,12 +71,12 @@ phy_PathA_IQK_8192C(
IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)?0x28160202:0x28160502);
//path-B IQK setting
if(configPathB)
if (configPathB)
{
PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x10008c22);
PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x10008c22);
PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140102);
if(IS_HARDWARE_TYPE_8192D(pAdapter))
if (IS_HARDWARE_TYPE_8192D(pAdapter))
PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160206);
else
PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160202);
@ -84,7 +84,7 @@ phy_PathA_IQK_8192C(
//LO calibration setting
RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n"));
if(IS_HARDWARE_TYPE_8192D(pAdapter))
if (IS_HARDWARE_TYPE_8192D(pAdapter))
PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x00462911);
else
PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x001028d1);
@ -108,14 +108,14 @@ phy_PathA_IQK_8192C(
regEA4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord);
RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", regEA4));
if(!(regEAC & BIT28) &&
if (!(regEAC & BIT28) &&
(((regE94 & 0x03FF0000)>>16) != 0x142) &&
(((regE9C & 0x03FF0000)>>16) != 0x42) )
result |= 0x01;
else //if Tx not OK, ignore Rx
return result;
if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK
if (!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK
(((regEA4 & 0x03FF0000)>>16) != 0x132) &&
(((regEAC & 0x03FF0000)>>16) != 0x36))
result |= 0x02;
@ -157,14 +157,14 @@ phy_PathB_IQK_8192C(
regECC= PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord);
RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", regECC));
if(!(regEAC & BIT31) &&
if (!(regEAC & BIT31) &&
(((regEB4 & 0x03FF0000)>>16) != 0x142) &&
(((regEBC & 0x03FF0000)>>16) != 0x42))
result |= 0x01;
else
return result;
if(!(regEAC & BIT30) &&
if (!(regEAC & BIT30) &&
(((regEC4 & 0x03FF0000)>>16) != 0x132) &&
(((regECC & 0x03FF0000)>>16) != 0x36))
result |= 0x02;
@ -191,10 +191,10 @@ phy_PathAFillIQKMatrix(
RTPRINT(FINIT, INIT_IQK, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed"));
if(final_candidate == 0xFF)
if (final_candidate == 0xFF)
return;
else if(bIQKOK)
else if (bIQKOK)
{
Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF;
@ -204,7 +204,7 @@ phy_PathAFillIQKMatrix(
TX0_A = (X * Oldval_0) >> 8;
RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", X, TX0_A, Oldval_0));
PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A);
if(IS_HARDWARE_TYPE_8192D(pAdapter))
if (IS_HARDWARE_TYPE_8192D(pAdapter))
PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT24, ((X* Oldval_0>>7) & 0x1));
else
PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1));
@ -214,19 +214,19 @@ phy_PathAFillIQKMatrix(
Y = Y | 0xFFFFFC00;
//path B IQK result + 3
if(pAdapter->interfaceIndex == 1 && pHalData->CurrentBandType92D == BAND_ON_5G)
if (pAdapter->interfaceIndex == 1 && pHalData->CurrentBandType92D == BAND_ON_5G)
Y += 3;
TX0_C = (Y * Oldval_0) >> 8;
RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C));
PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6));
PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F));
if(IS_HARDWARE_TYPE_8192D(pAdapter)/*&&is2T*/)
if (IS_HARDWARE_TYPE_8192D(pAdapter)/*&&is2T*/)
PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT26, ((Y* Oldval_0>>7) & 0x1));
else
PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1));
if(bTxOnly)
if (bTxOnly)
{
RTPRINT(FINIT, INIT_IQK, ("phy_PathAFillIQKMatrix only Tx OK\n"));
return;
@ -258,10 +258,10 @@ phy_PathBFillIQKMatrix(
RTPRINT(FINIT, INIT_IQK, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed"));
if(final_candidate == 0xFF)
if (final_candidate == 0xFF)
return;
else if(bIQKOK)
else if (bIQKOK)
{
Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF;
@ -271,7 +271,7 @@ phy_PathBFillIQKMatrix(
TX1_A = (X * Oldval_1) >> 8;
RTPRINT(FINIT, INIT_IQK, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A));
PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A);
if(IS_HARDWARE_TYPE_8192D(pAdapter))
if (IS_HARDWARE_TYPE_8192D(pAdapter))
PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT28, ((X* Oldval_1>>7) & 0x1));
else
PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1));
@ -279,18 +279,18 @@ phy_PathBFillIQKMatrix(
Y = result[final_candidate][5];
if ((Y & 0x00000200) != 0)
Y = Y | 0xFFFFFC00;
if(pHalData->CurrentBandType92D == BAND_ON_5G)
if (pHalData->CurrentBandType92D == BAND_ON_5G)
Y += 3; //temp modify for preformance
TX1_C = (Y * Oldval_1) >> 8;
RTPRINT(FINIT, INIT_IQK, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C));
PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6));
PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F));
if(IS_HARDWARE_TYPE_8192D(pAdapter))
if (IS_HARDWARE_TYPE_8192D(pAdapter))
PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT30, ((Y* Oldval_1>>7) & 0x1));
else
PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1));
if(bTxOnly)
if (bTxOnly)
return;
reg = result[final_candidate][6];
@ -318,21 +318,21 @@ phy_SimularityCompare_92C(
u1Byte final_candidate[2] = {0xFF, 0xFF}; //for path A and path B
BOOLEAN bResult = TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID);
if(is2T)
if (is2T)
bound = 8;
else
bound = 4;
SimularityBitMap = 0;
for( i = 0; i < bound; i++ )
for ( i = 0; i < bound; i++ )
{
diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]);
if (diff > MAX_TOLERANCE)
{
if((i == 2 || i == 6) && !SimularityBitMap)
if ((i == 2 || i == 6) && !SimularityBitMap)
{
if(result[c1][i]+result[c1][i+1] == 0)
if (result[c1][i]+result[c1][i+1] == 0)
final_candidate[(i/4)] = c2;
else if (result[c2][i]+result[c2][i+1] == 0)
final_candidate[(i/4)] = c1;
@ -346,11 +346,11 @@ phy_SimularityCompare_92C(
if ( SimularityBitMap == 0)
{
for( i = 0; i < (bound/4); i++ )
for ( i = 0; i < (bound/4); i++ )
{
if(final_candidate[i] != 0xFF)
if (final_candidate[i] != 0xFF)
{
for( j = i*4; j < (i+1)*4-2; j++)
for ( j = i*4; j < (i+1)*4-2; j++)
result[3][j] = result[final_candidate[i]][j];
bResult = FALSE;
}
@ -359,13 +359,13 @@ phy_SimularityCompare_92C(
}
else if (!(SimularityBitMap & 0x0F)) //path A OK
{
for(i = 0; i < 4; i++)
for (i = 0; i < 4; i++)
result[3][i] = result[c1][i];
return FALSE;
}
else if (!(SimularityBitMap & 0xF0) && is2T) //path B OK
{
for(i = 4; i < 8; i++)
for (i = 4; i < 8; i++)
result[3][i] = result[c1][i];
return FALSE;
}
@ -385,7 +385,7 @@ phy_SimularityCompare(
IN u1Byte c2
)
{
if(IS_HARDWARE_TYPE_8192D(pAdapter))
if (IS_HARDWARE_TYPE_8192D(pAdapter))
return phy_SimularityCompare_92D(pAdapter, result, c1, c2);
else
return phy_SimularityCompare_92C(pAdapter, result, c1, c2);
@ -449,7 +449,7 @@ phy_IQCalibrate_8192C(
u4Byte bbvalue;
if(t==0)
if (t==0)
{
bbvalue = PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bMaskDWord);
RTPRINT(FINIT, INIT_IQK, ("phy_IQCalibrate_8192C()==>0x%08x\n",bbvalue));
@ -459,7 +459,7 @@ phy_IQCalibrate_8192C(
// Save ADDA parameters, turn Path A ADDA on
phy_SaveADDARegisters(pAdapter, ADDA_REG, pHalData->ADDA_backup, IQK_ADDA_REG_NUM);
phy_SaveMACRegisters(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup);
if(IS_HARDWARE_TYPE_8192D(pAdapter))
if (IS_HARDWARE_TYPE_8192D(pAdapter))
phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92D, pHalData->IQK_BB_backup, IQK_BB_REG_NUM_92D);
else
phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM);
@ -469,7 +469,7 @@ phy_IQCalibrate_8192C(
if(IS_HARDWARE_TYPE_8192D(pAdapter)){
if (IS_HARDWARE_TYPE_8192D(pAdapter)){
//==============================
//3 Path Diversity
////Neil Chen--2011--05--20
@ -477,7 +477,7 @@ phy_IQCalibrate_8192C(
//rfPathSwitch = (u1Byte) DataB30;
rfPathSwitch = rfPathSwitch&(0x01);
if(rfPathSwitch) // Path Div On
if (rfPathSwitch) // Path Div On
{
phy_PathADDAOn(pAdapter, ADDA_REG, TRUE, is2T);
//DbgPrint("=STEP= change ADDA Path from B to A Path\n");
@ -492,12 +492,12 @@ phy_IQCalibrate_8192C(
PHY_SetBBReg(pAdapter, rPdp_AntA, bMaskDWord, 0x01017038);
}
if(t==0)
if (t==0)
{
pHalData->bRfPiEnable = (u1Byte)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8));
}
if(!pHalData->bRfPiEnable){
if (!pHalData->bRfPiEnable){
// Switch BB to PI mode to do IQ Calibration.
phy_PIModeSwitch(pAdapter, TRUE);
}
@ -506,7 +506,7 @@ phy_IQCalibrate_8192C(
PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600);
PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4);
PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000);
if(IS_HARDWARE_TYPE_8192D(pAdapter))
if (IS_HARDWARE_TYPE_8192D(pAdapter))
PHY_SetBBReg(pAdapter, rFPGA0_AnalogParameter4, 0xf00000, 0x0f);
else
{
@ -516,7 +516,7 @@ phy_IQCalibrate_8192C(
PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00);
}
if(is2T)
if (is2T)
{
PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000);
PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000);
@ -525,11 +525,11 @@ phy_IQCalibrate_8192C(
//MAC settings
phy_MACSettingCalibration(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup);
if(IS_HARDWARE_TYPE_8192D(pAdapter))
if (IS_HARDWARE_TYPE_8192D(pAdapter))
{
PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x0f600000);
if(is2T)
if (is2T)
{
PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x0f600000);
}
@ -539,7 +539,7 @@ phy_IQCalibrate_8192C(
//Page B init
PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x00080000);
if(is2T)
if (is2T)
{
PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x00080000);
}
@ -550,9 +550,9 @@ phy_IQCalibrate_8192C(
PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x01007c00);
PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800);
for(i = 0 ; i < retryCount ; i++){
for (i = 0 ; i < retryCount ; i++){
PathAOK = phy_PathA_IQK_8192C(pAdapter, is2T);
if(PathAOK == 0x03){
if (PathAOK == 0x03){
RTPRINT(FINIT, INIT_IQK, ("Path A IQK Success!!\n"));
result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;
@ -569,19 +569,19 @@ phy_IQCalibrate_8192C(
}
}
if(0x00 == PathAOK){
if (0x00 == PathAOK){
RTPRINT(FINIT, INIT_IQK, ("Path A IQK failed!!\n"));
}
if(is2T){
if (is2T){
phy_PathAStandBy(pAdapter);
// Turn Path B ADDA on
phy_PathADDAOn(pAdapter, ADDA_REG, FALSE, is2T);
for(i = 0 ; i < retryCount ; i++){
for (i = 0 ; i < retryCount ; i++){
PathBOK = phy_PathB_IQK_8192C(pAdapter);
if(PathBOK == 0x03){
if (PathBOK == 0x03){
RTPRINT(FINIT, INIT_IQK, ("Path B IQK Success!!\n"));
result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16;
result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16;
@ -597,7 +597,7 @@ phy_IQCalibrate_8192C(
}
}
if(0x00 == PathBOK){
if (0x00 == PathBOK){
RTPRINT(FINIT, INIT_IQK, ("Path B IQK failed!!\n"));
}
}
@ -606,9 +606,9 @@ phy_IQCalibrate_8192C(
RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n"));
PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0);
if(t!=0)
if (t!=0)
{
if(!pHalData->bRfPiEnable){
if (!pHalData->bRfPiEnable){
// Switch back BB to SI mode after finish IQ Calibration.
phy_PIModeSwitch(pAdapter, FALSE);
}
@ -620,9 +620,9 @@ phy_IQCalibrate_8192C(
phy_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pHalData->IQK_MAC_backup);
// Reload BB parameters
if(IS_HARDWARE_TYPE_8192D(pAdapter))
if (IS_HARDWARE_TYPE_8192D(pAdapter))
{
if(is2T)
if (is2T)
phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92D, pHalData->IQK_BB_backup, IQK_BB_REG_NUM_92D);
else
phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92D, pHalData->IQK_BB_backup, IQK_BB_REG_NUM_92D -1);
@ -630,11 +630,11 @@ phy_IQCalibrate_8192C(
else
phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup, IQK_BB_REG_NUM);
if(!IS_HARDWARE_TYPE_8192D(pAdapter))
if (!IS_HARDWARE_TYPE_8192D(pAdapter))
{
// Restore RX initial gain
PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3);
if(is2T){
if (is2T){
PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3);
}
}
@ -661,19 +661,19 @@ phy_LCCalibrate92C(
//Check continuous TX and Packet TX
tmpReg = PlatformEFIORead1Byte(pAdapter, 0xd03);
if((tmpReg&0x70) != 0) //Deal with contisuous TX case
if ((tmpReg&0x70) != 0) //Deal with contisuous TX case
PlatformEFIOWrite1Byte(pAdapter, 0xd03, tmpReg&0x8F); //disable all continuous TX
else // Deal with Packet TX case
PlatformEFIOWrite1Byte(pAdapter, REG_TXPAUSE, 0xFF); // block all queues
if((tmpReg&0x70) != 0)
if ((tmpReg&0x70) != 0)
{
//1. Read original RF mode
//Path-A
RF_Amode = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits);
//Path-B
if(is2T)
if (is2T)
RF_Bmode = PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits);
//2. Set RF mode = standby mode
@ -681,7 +681,7 @@ phy_LCCalibrate92C(
PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000);
//Path-B
if(is2T)
if (is2T)
PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000);
}
@ -695,14 +695,14 @@ phy_LCCalibrate92C(
//Restore original situation
if((tmpReg&0x70) != 0) //Deal with contisuous TX case
if ((tmpReg&0x70) != 0) //Deal with contisuous TX case
{
//Path-A
PlatformEFIOWrite1Byte(pAdapter, 0xd03, tmpReg);
PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode);
//Path-B
if(is2T)
if (is2T)
PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode);
}
else // Deal with Packet TX case
@ -718,7 +718,7 @@ phy_LCCalibrate(
IN BOOLEAN is2T
)
{
if(IS_HARDWARE_TYPE_8192D(pAdapter))
if (IS_HARDWARE_TYPE_8192D(pAdapter))
{
#if SWLCK == 1
phy_LCCalibrate92DSW(pAdapter, is2T);
@ -858,7 +858,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
RTPRINT(FINIT, INIT_IQK, ("==>phy_APCalibrate_8192C() delta %d\n", delta));
RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R")));
if(!is2T)
if (!is2T)
pathbound = 1;
//2 FOR NORMAL CHIP SETTINGS
@ -875,16 +875,16 @@ if (pAdapter->registrypriv.mp_mode == 1)
return;
//settings adjust for normal chip
for(index = 0; index < PATH_NUM; index ++)
for (index = 0; index < PATH_NUM; index ++)
{
APK_offset[index] = APK_normal_offset[index];
APK_value[index] = APK_normal_value[index];
AFE_on_off[index] = 0x6fdb25a4;
}
for(index = 0; index < APK_BB_REG_NUM; index ++)
for (index = 0; index < APK_BB_REG_NUM; index ++)
{
for(path = 0; path < pathbound; path++)
for (path = 0; path < pathbound; path++)
{
APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index];
APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index];
@ -895,9 +895,9 @@ if (pAdapter->registrypriv.mp_mode == 1)
apkbound = 6;
//save BB default value
for(index = 0; index < APK_BB_REG_NUM ; index++)
for (index = 0; index < APK_BB_REG_NUM ; index++)
{
if(index == 0) //skip
if (index == 0) //skip
continue;
BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord);
}
@ -908,17 +908,17 @@ if (pAdapter->registrypriv.mp_mode == 1)
//save AFE default value
phy_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
for(path = 0; path < pathbound; path++)
for (path = 0; path < pathbound; path++)
{
if(path == RF_PATH_A)
if (path == RF_PATH_A)
{
//path A APK
//load APK setting
//path-A
offset = rPdp_AntA;
for(index = 0; index < 11; index ++)
for (index = 0; index < 11; index ++)
{
PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord)));
@ -929,7 +929,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000);
offset = rConfig_AntA;
for(; index < 13; index ++)
for (; index < 13; index ++)
{
PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord)));
@ -942,7 +942,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
//path A
offset = rPdp_AntA;
for(index = 0; index < 16; index++)
for (index = 0; index < 16; index++)
{
PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]);
RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord)));
@ -951,13 +951,13 @@ if (pAdapter->registrypriv.mp_mode == 1)
}
PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000);
}
else if(path == RF_PATH_B)
else if (path == RF_PATH_B)
{
//path B APK
//load APK setting
//path-B
offset = rPdp_AntB;
for(index = 0; index < 10; index ++)
for (index = 0; index < 10; index ++)
{
PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord)));
@ -970,7 +970,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
offset = rConfig_AntA;
index = 11;
for(; index < 13; index ++) //offset 0xb68, 0xb6c
for (; index < 13; index ++) //offset 0xb68, 0xb6c
{
PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord)));
@ -983,7 +983,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
//path B
offset = 0xb60;
for(index = 0; index < 16; index++)
for (index = 0; index < 16; index++)
{
PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]);
RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord)));
@ -997,17 +997,17 @@ if (pAdapter->registrypriv.mp_mode == 1)
regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask);
//Path A AFE all on, path B AFE All off or vise versa
for(index = 0; index < IQK_ADDA_REG_NUM ; index++)
for (index = 0; index < IQK_ADDA_REG_NUM ; index++)
PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, AFE_on_off[path]);
RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() offset 0xe70 %x\n", PHY_QueryBBReg(pAdapter, rRx_Wait_CCA, bMaskDWord)));
//BB to AP mode
if(path == 0)
if (path == 0)
{
for(index = 0; index < APK_BB_REG_NUM ; index++)
for (index = 0; index < APK_BB_REG_NUM ; index++)
{
if(index == 0) //skip
if (index == 0) //skip
continue;
else if (index < 5)
PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_AP_MODE[index]);
@ -1032,7 +1032,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
//MAC settings
phy_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup);
if(path == RF_PATH_A) //Path B to standby mode
if (path == RF_PATH_A) //Path B to standby mode
{
PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bRFRegOffsetMask, 0x10000);
}
@ -1044,24 +1044,24 @@ if (pAdapter->registrypriv.mp_mode == 1)
}
delta_offset = ((delta+14)/2);
if(delta_offset < 0)
if (delta_offset < 0)
delta_offset = 0;
else if (delta_offset > 12)
delta_offset = 12;
//AP calibration
for(index = 0; index < APK_BB_REG_NUM; index++)
for (index = 0; index < APK_BB_REG_NUM; index++)
{
if(index != 1) //only DO PA11+PAD01001, AP RF setting
if (index != 1) //only DO PA11+PAD01001, AP RF setting
continue;
tmpReg = APK_RF_init_value[path][index];
#if 1
if(!pHalData->bAPKThermalMeterIgnore)
if (!pHalData->bAPKThermalMeterIgnore)
{
BB_offset = (tmpReg & 0xF0000) >> 16;
if(!(tmpReg & BIT15)) //sign bit 0
if (!(tmpReg & BIT15)) //sign bit 0
{
BB_offset = -BB_offset;
}
@ -1072,7 +1072,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
RTPRINT(FINIT, INIT_IQK, ("phy_APCalibrate_8192C() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, delta_V, delta_offset));
if(BB_offset < 0)
if (BB_offset < 0)
{
tmpReg = tmpReg & (~BIT15);
BB_offset = -BB_offset;
@ -1086,7 +1086,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
#endif
#if DEV_BUS_TYPE==RT_PCI_INTERFACE
if(IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID))
if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID))
PHY_SetRFReg(pAdapter, path, RF_IPA_A, bRFRegOffsetMask, 0x894ae);
else
#endif
@ -1113,7 +1113,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
}
PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000);
if(path == RF_PATH_A)
if (path == RF_PATH_A)
tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0x03E00000);
else
tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0xF8000000);
@ -1122,7 +1122,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
i++;
}
while(tmpReg > apkbound && i < 4);
while (tmpReg > apkbound && i < 4);
APK_result[path][index] = tmpReg;
}
@ -1132,10 +1132,10 @@ if (pAdapter->registrypriv.mp_mode == 1)
phy_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup);
//reload BB default value
for(index = 0; index < APK_BB_REG_NUM ; index++)
for (index = 0; index < APK_BB_REG_NUM ; index++)
{
if(index == 0) //skip
if (index == 0) //skip
continue;
PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]);
}
@ -1144,10 +1144,10 @@ if (pAdapter->registrypriv.mp_mode == 1)
phy_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
//reload RF path default value
for(path = 0; path < pathbound; path++)
for (path = 0; path < pathbound; path++)
{
PHY_SetRFReg(pAdapter, path, RF_TXBIAS_A, bRFRegOffsetMask, regD[path]);
if(path == RF_PATH_B)
if (path == RF_PATH_B)
{
PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f);
PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20101);
@ -1162,18 +1162,18 @@ if (pAdapter->registrypriv.mp_mode == 1)
RTPRINT(FINIT, INIT_IQK, ("\n"));
for(path = 0; path < pathbound; path++)
for (path = 0; path < pathbound; path++)
{
PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G1_G4, bRFRegOffsetMask,
((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1]));
if(path == RF_PATH_A)
if (path == RF_PATH_A)
PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask,
((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05));
else
PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask,
((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05));
if(!IS_HARDWARE_TYPE_8723A(pAdapter))
if (!IS_HARDWARE_TYPE_8723A(pAdapter))
PHY_SetRFReg(pAdapter, path, RF_BS_PA_APSET_G9_G11, bRFRegOffsetMask,
((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08));
}
@ -1217,18 +1217,18 @@ if (pAdapter->registrypriv.mp_mode == 1)
#endif
//ignore IQK when continuous Tx
if(bStartContTx || bSingleTone || bCarrierSuppression)
if (bStartContTx || bSingleTone || bCarrierSuppression)
return;
#if DISABLE_BB_RF
return;
#endif
if(pAdapter->bSlaveOfDMSP)
if (pAdapter->bSlaveOfDMSP)
return;
if(!IS_HARDWARE_TYPE_8192D(pAdapter))
if (!IS_HARDWARE_TYPE_8192D(pAdapter))
{
if(bReCovery)
if (bReCovery)
{
phy_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup_recover, 9);
return;
@ -1237,7 +1237,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
}
RTPRINT(FINIT, INIT_IQK, ("IQK:Start!!!\n"));
for(i = 0; i < 8; i++)
for (i = 0; i < 8; i++)
{
result[0][i] = 0;
result[1][i] = 0;
@ -1257,10 +1257,10 @@ if (pAdapter->registrypriv.mp_mode == 1)
// RT_TRACE(COMP_INIT,DBG_LOUD,("Acquire Mutex in IQCalibrate \n"));
for (i=0; i<3; i++)
{
// if(IS_HARDWARE_TYPE_8192C(pAdapter) || IS_HARDWARE_TYPE_8723A(pAdapter))
if(!IS_HARDWARE_TYPE_8192D(pAdapter))
// if (IS_HARDWARE_TYPE_8192C(pAdapter) || IS_HARDWARE_TYPE_8723A(pAdapter))
if (!IS_HARDWARE_TYPE_8192D(pAdapter))
{
if(IS_92C_SERIAL( pHalData->VersionID))
if (IS_92C_SERIAL( pHalData->VersionID))
{
phy_IQCalibrate_8192C(pAdapter, result, i, TRUE);
}
@ -1270,49 +1270,49 @@ if (pAdapter->registrypriv.mp_mode == 1)
phy_IQCalibrate_8192C(pAdapter, result, i, FALSE);
}
}
else/* if(IS_HARDWARE_TYPE_8192D(pAdapter))*/
else/* if (IS_HARDWARE_TYPE_8192D(pAdapter))*/
{
if(pHalData->CurrentBandType92D == BAND_ON_5G)
if (pHalData->CurrentBandType92D == BAND_ON_5G)
{
phy_IQCalibrate_5G_Normal(pAdapter, result, i);
}
else if(pHalData->CurrentBandType92D == BAND_ON_2_4G)
else if (pHalData->CurrentBandType92D == BAND_ON_2_4G)
{
if(IS_92D_SINGLEPHY(pHalData->VersionID))
if (IS_92D_SINGLEPHY(pHalData->VersionID))
phy_IQCalibrate_8192C(pAdapter, result, i, TRUE);
else
phy_IQCalibrate_8192C(pAdapter, result, i, FALSE);
}
}
if(i == 1)
if (i == 1)
{
is12simular = phy_SimularityCompare(pAdapter, result, 0, 1);
if(is12simular)
if (is12simular)
{
final_candidate = 0;
break;
}
}
if(i == 2)
if (i == 2)
{
is13simular = phy_SimularityCompare(pAdapter, result, 0, 2);
if(is13simular)
if (is13simular)
{
final_candidate = 0;
break;
}
is23simular = phy_SimularityCompare(pAdapter, result, 1, 2);
if(is23simular)
if (is23simular)
final_candidate = 1;
else
{
for(i = 0; i < 8; i++)
for (i = 0; i < 8; i++)
RegTmp += result[3][i];
if(RegTmp != 0)
if (RegTmp != 0)
final_candidate = 3;
else
final_candidate = 0xFF;
@ -1335,7 +1335,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC));
}
if(final_candidate != 0xff)
if (final_candidate != 0xff)
{
pHalData->RegE94 = RegE94 = result[final_candidate][0];
pHalData->RegE9C = RegE9C = result[final_candidate][1];
@ -1355,9 +1355,9 @@ if (pAdapter->registrypriv.mp_mode == 1)
RegE9C = RegEBC = pHalData->RegE9C = pHalData->RegEBC = 0x0; //Y default value
}
if((RegE94 != 0)/*&&(RegEA4 != 0)*/)
if ((RegE94 != 0)/*&&(RegEA4 != 0)*/)
{
if(pHalData->CurrentBandType92D == BAND_ON_5G)
if (pHalData->CurrentBandType92D == BAND_ON_5G)
phy_PathAFillIQKMatrix_5G_Normal(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0));
else
phy_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0));
@ -1366,20 +1366,20 @@ if (pAdapter->registrypriv.mp_mode == 1)
if (IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID))
{
if((RegEB4 != 0)/*&&(RegEC4 != 0)*/)
if ((RegEB4 != 0)/*&&(RegEC4 != 0)*/)
{
if(pHalData->CurrentBandType92D == BAND_ON_5G)
if (pHalData->CurrentBandType92D == BAND_ON_5G)
phy_PathBFillIQKMatrix_5G_Normal(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0));
else
phy_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0));
}
}
if(IS_HARDWARE_TYPE_8192D(pAdapter) && final_candidate != 0xFF)
if (IS_HARDWARE_TYPE_8192D(pAdapter) && final_candidate != 0xFF)
{
Indexforchannel = GetRightChnlPlaceforIQK(pHalData->CurrentChannel);
for(i = 0; i < IQK_Matrix_REG_NUM; i++)
for (i = 0; i < IQK_Matrix_REG_NUM; i++)
pHalData->IQKMatrixRegSetting[Indexforchannel].Value[0][i] =
result[final_candidate][i];
@ -1388,7 +1388,7 @@ if (pAdapter->registrypriv.mp_mode == 1)
RTPRINT(FINIT, INIT_IQK, ("\nIQK OK Indexforchannel %d.\n", Indexforchannel));
}
if(!IS_HARDWARE_TYPE_8192D(pAdapter))
if (!IS_HARDWARE_TYPE_8192D(pAdapter))
phy_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pHalData->IQK_BB_backup_recover, 9);
}
@ -1420,22 +1420,22 @@ if (pAdapter->registrypriv.mp_mode == 1)
#endif
//ignore LCK when continuous Tx
if(bStartContTx || bSingleTone || bCarrierSuppression)
if (bStartContTx || bSingleTone || bCarrierSuppression)
return;
if(BuddyAdapter != NULL &&
if (BuddyAdapter != NULL &&
((pAdapter->interfaceIndex == 0 && pHalData->CurrentBandType92D == BAND_ON_2_4G) ||
(pAdapter->interfaceIndex == 1 && pHalData->CurrentBandType92D == BAND_ON_5G)))
{
pMgntInfoBuddyAdapter=&BuddyAdapter->MgntInfo;
while(pMgntInfoBuddyAdapter->bScanInProgress && timecount < timeout)
while (pMgntInfoBuddyAdapter->bScanInProgress && timecount < timeout)
{
delay_ms(50);
timecount += 50;
}
}
while(pMgntInfo->bScanInProgress && timecount < timeout)
while (pMgntInfo->bScanInProgress && timecount < timeout)
{
delay_ms(50);
timecount += 50;
@ -1445,8 +1445,8 @@ if (pAdapter->registrypriv.mp_mode == 1)
RTPRINT(FINIT, INIT_IQK, ("LCK:Start!!!interface %d currentband %x delay %d ms\n", pAdapter->interfaceIndex, pHalData->CurrentBandType92D, timecount));
//if(IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID))
if(IS_2T2R(pHalData->VersionID))
//if (IS_92C_SERIAL(pHalData->VersionID) || IS_92D_SINGLEPHY(pHalData->VersionID))
if (IS_2T2R(pHalData->VersionID))
{
phy_LCCalibrate(pAdapter, TRUE);
}
@ -1477,15 +1477,15 @@ PHY_APCalibrate_8192C(
return;
#endif
if(IS_HARDWARE_TYPE_8192D(pAdapter) || IS_HARDWARE_TYPE_8723A(pAdapter))
if (IS_HARDWARE_TYPE_8192D(pAdapter) || IS_HARDWARE_TYPE_8723A(pAdapter))
return;
#if FOR_BRAZIL_PRETEST != 1
if(pHalData->bAPKdone)
if (pHalData->bAPKdone)
#endif
return;
if(IS_92C_SERIAL( pHalData->VersionID)){
if (IS_92C_SERIAL( pHalData->VersionID)){
phy_APCalibrate_8192C(pAdapter, delta, TRUE);
}
else{
@ -1517,7 +1517,7 @@ ODM_ResetIQKResult(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD,("PHY_ResetIQKResult:: settings regs %d default regs %d\n", (u32)(sizeof(pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting)/sizeof(IQK_MATRIX_REGS_SETTING)), IQK_Matrix_Settings_NUM));
//0xe94, 0xe9c, 0xea4, 0xeac, 0xeb4, 0xebc, 0xec4, 0xecc
for(i = 0; i < IQK_Matrix_Settings_NUM; i++)
for (i = 0; i < IQK_Matrix_Settings_NUM; i++)
{
{
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][0] =
@ -1544,11 +1544,11 @@ u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl)
u1Byte place = chnl;
if(chnl > 14)
if (chnl > 14)
{
for(place = 14; place<sizeof(channel_all); place++)
for (place = 14; place<sizeof(channel_all); place++)
{
if(channel_all[place] == chnl)
if (channel_all[place] == chnl)
{
return place-13;
}

438
hal/HalPhyRf_8188e.c
View file

File diff suppressed because it is too large Load diff

2
hal/HalPwrSeqCmd.c
View file

@ -179,7 +179,7 @@ u8 HalPwrSeqCmdParsing(
}
AryIdx++;//Add Array Index
}while(1);
}while (1);
return _TRUE;
}

38
hal/hal_com.c
View file

@ -45,31 +45,31 @@ void dump_chip_info(HAL_VERSION ChipVersion)
int cnt = 0;
u8 buf[128];
if(IS_81XXC(ChipVersion)){
if (IS_81XXC(ChipVersion)){
cnt += sprintf((buf+cnt), "Chip Version Info: %s_", IS_92C_SERIAL(ChipVersion)?"CHIP_8192C":"CHIP_8188C");
}
else if(IS_92D(ChipVersion)){
else if (IS_92D(ChipVersion)){
cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8192D_");
}
else if(IS_8723_SERIES(ChipVersion)){
else if (IS_8723_SERIES(ChipVersion)){
cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8723A_");
}
else if(IS_8188E(ChipVersion)){
else if (IS_8188E(ChipVersion)){
cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8188E_");
}
cnt += sprintf((buf+cnt), "%s_", IS_NORMAL_CHIP(ChipVersion)?"Normal_Chip":"Test_Chip");
cnt += sprintf((buf+cnt), "%s_", IS_CHIP_VENDOR_TSMC(ChipVersion)?"TSMC":"UMC");
if(IS_A_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "A_CUT_");
else if(IS_B_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "B_CUT_");
else if(IS_C_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "C_CUT_");
else if(IS_D_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "D_CUT_");
else if(IS_E_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "E_CUT_");
if (IS_A_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "A_CUT_");
else if (IS_B_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "B_CUT_");
else if (IS_C_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "C_CUT_");
else if (IS_D_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "D_CUT_");
else if (IS_E_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "E_CUT_");
else cnt += sprintf((buf+cnt), "UNKNOWN_CUT(%d)_", ChipVersion.CUTVersion);
if(IS_1T1R(ChipVersion)) cnt += sprintf((buf+cnt), "1T1R_");
else if(IS_1T2R(ChipVersion)) cnt += sprintf((buf+cnt), "1T2R_");
else if(IS_2T2R(ChipVersion)) cnt += sprintf((buf+cnt), "2T2R_");
if (IS_1T1R(ChipVersion)) cnt += sprintf((buf+cnt), "1T1R_");
else if (IS_1T2R(ChipVersion)) cnt += sprintf((buf+cnt), "1T2R_");
else if (IS_2T2R(ChipVersion)) cnt += sprintf((buf+cnt), "2T2R_");
else cnt += sprintf((buf+cnt), "UNKNOWN_RFTYPE(%d)_", ChipVersion.RFType);
cnt += sprintf((buf+cnt), "RomVer(%d)\n", ChipVersion.ROMVer);
@ -116,7 +116,7 @@ u8 MRateToHwRate(u8 rate)
{
u8 ret = DESC_RATE1M;
switch(rate)
switch (rate)
{
// CCK and OFDM non-HT rates
case IEEE80211_CCK_RATE_1MB: ret = DESC_RATE1M; break;
@ -155,14 +155,14 @@ void HalSetBrateCfg(
{
u8 i, is_brate, brate;
for(i=0;i<NDIS_802_11_LENGTH_RATES_EX;i++)
for (i=0;i<NDIS_802_11_LENGTH_RATES_EX;i++)
{
is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
brate = mBratesOS[i] & 0x7f;
if( is_brate )
if ( is_brate )
{
switch(brate)
switch (brate)
{
case IEEE80211_CCK_RATE_1MB: *pBrateCfg |= RATE_1M; break;
case IEEE80211_CCK_RATE_2MB: *pBrateCfg |= RATE_2M; break;
@ -207,7 +207,7 @@ _TwoOutPipeMapping(
{
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
if(bWIFICfg){ //WMM
if (bWIFICfg){ //WMM
// BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
//{ 0, 1, 0, 1, 0, 0, 0, 0, 0 };
@ -252,7 +252,7 @@ static VOID _ThreeOutPipeMapping(
{
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
if(bWIFICfg){//for WMM
if (bWIFICfg){//for WMM
// BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
//{ 1, 2, 1, 0, 0, 0, 0, 0, 0 };
@ -301,7 +301,7 @@ Hal_MappingOutPipe(
BOOLEAN result = _TRUE;
switch(NumOutPipe)
switch (NumOutPipe)
{
case 2:
_TwoOutPipeMapping(pAdapter, bWIFICfg);

118
hal/hal_intf.c
View file

@ -36,58 +36,58 @@
void rtw_hal_chip_configure(_adapter *padapter)
{
if(padapter->HalFunc.intf_chip_configure)
if (padapter->HalFunc.intf_chip_configure)
padapter->HalFunc.intf_chip_configure(padapter);
}
void rtw_hal_read_chip_info(_adapter *padapter)
{
if(padapter->HalFunc.read_adapter_info)
if (padapter->HalFunc.read_adapter_info)
padapter->HalFunc.read_adapter_info(padapter);
}
void rtw_hal_read_chip_version(_adapter *padapter)
{
if(padapter->HalFunc.read_chip_version)
if (padapter->HalFunc.read_chip_version)
padapter->HalFunc.read_chip_version(padapter);
}
void rtw_hal_def_value_init(_adapter *padapter)
{
if(padapter->HalFunc.init_default_value)
if (padapter->HalFunc.init_default_value)
padapter->HalFunc.init_default_value(padapter);
}
void rtw_hal_free_data(_adapter *padapter)
{
if(padapter->HalFunc.free_hal_data)
if (padapter->HalFunc.free_hal_data)
padapter->HalFunc.free_hal_data(padapter);
}
void rtw_hal_dm_init(_adapter *padapter)
{
if(padapter->HalFunc.dm_init)
if (padapter->HalFunc.dm_init)
padapter->HalFunc.dm_init(padapter);
}
void rtw_hal_dm_deinit(_adapter *padapter)
{
// cancel dm timer
if(padapter->HalFunc.dm_deinit)
if (padapter->HalFunc.dm_deinit)
padapter->HalFunc.dm_deinit(padapter);
}
void rtw_hal_sw_led_init(_adapter *padapter)
{
if(padapter->HalFunc.InitSwLeds)
if (padapter->HalFunc.InitSwLeds)
padapter->HalFunc.InitSwLeds(padapter);
}
void rtw_hal_sw_led_deinit(_adapter *padapter)
{
if(padapter->HalFunc.DeInitSwLeds)
if (padapter->HalFunc.DeInitSwLeds)
padapter->HalFunc.DeInitSwLeds(padapter);
}
u32 rtw_hal_power_on(_adapter *padapter)
{
if(padapter->HalFunc.hal_power_on)
if (padapter->HalFunc.hal_power_on)
return padapter->HalFunc.hal_power_on(padapter);
return _FAIL;
}
@ -98,24 +98,24 @@ uint rtw_hal_init(_adapter *padapter)
uint status = _SUCCESS;
#ifdef CONFIG_DUALMAC_CONCURRENT
if(padapter->hw_init_completed == _TRUE)
if (padapter->hw_init_completed == _TRUE)
{
DBG_871X("rtw_hal_init: hw_init_completed == _TRUE\n");
return status;
}
// before init mac0, driver must init mac1 first to avoid usb rx error.
if((padapter->pbuddy_adapter != NULL) && (padapter->DualMacConcurrent == _TRUE)
if ((padapter->pbuddy_adapter != NULL) && (padapter->DualMacConcurrent == _TRUE)
&& (padapter->adapter_type == PRIMARY_ADAPTER))
{
if(padapter->pbuddy_adapter->hw_init_completed == _TRUE)
if (padapter->pbuddy_adapter->hw_init_completed == _TRUE)
{
DBG_871X("rtw_hal_init: pbuddy_adapter hw_init_completed == _TRUE\n");
}
else
{
status = padapter->HalFunc.hal_init(padapter->pbuddy_adapter);
if(status == _SUCCESS){
if (status == _SUCCESS){
padapter->pbuddy_adapter->hw_init_completed = _TRUE;
}
else{
@ -132,7 +132,7 @@ uint rtw_hal_init(_adapter *padapter)
status = padapter->HalFunc.hal_init(padapter);
if(status == _SUCCESS){
if (status == _SUCCESS){
padapter->hw_init_completed = _TRUE;
if (padapter->registrypriv.notch_filter == 1)
@ -159,7 +159,7 @@ _func_enter_;
status = padapter->HalFunc.hal_deinit(padapter);
if(status == _SUCCESS){
if (status == _SUCCESS){
padapter->hw_init_completed = _FALSE;
}
else
@ -186,25 +186,25 @@ void rtw_hal_get_hwreg(_adapter *padapter, u8 variable, u8 *val)
u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue)
{
if(padapter->HalFunc.SetHalDefVarHandler)
if (padapter->HalFunc.SetHalDefVarHandler)
return padapter->HalFunc.SetHalDefVarHandler(padapter,eVariable,pValue);
return _FAIL;
}
u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue)
{
if(padapter->HalFunc.GetHalDefVarHandler)
if (padapter->HalFunc.GetHalDefVarHandler)
return padapter->HalFunc.GetHalDefVarHandler(padapter,eVariable,pValue);
return _FAIL;
}
void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet)
{
if(padapter->HalFunc.SetHalODMVarHandler)
if (padapter->HalFunc.SetHalODMVarHandler)
padapter->HalFunc.SetHalODMVarHandler(padapter,eVariable,pValue1,bSet);
}
void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet)
{
if(padapter->HalFunc.GetHalODMVarHandler)
if (padapter->HalFunc.GetHalODMVarHandler)
padapter->HalFunc.GetHalODMVarHandler(padapter,eVariable,pValue1,bSet);
}
@ -229,7 +229,7 @@ void rtw_hal_disable_interrupt(_adapter *padapter)
u32 rtw_hal_inirp_init(_adapter *padapter)
{
u32 rst = _FAIL;
if(padapter->HalFunc.inirp_init)
if (padapter->HalFunc.inirp_init)
rst = padapter->HalFunc.inirp_init(padapter);
else
DBG_871X(" %s HalFunc.inirp_init is NULL!!!\n",__FUNCTION__);
@ -239,7 +239,7 @@ u32 rtw_hal_inirp_init(_adapter *padapter)
u32 rtw_hal_inirp_deinit(_adapter *padapter)
{
if(padapter->HalFunc.inirp_deinit)
if (padapter->HalFunc.inirp_deinit)
return padapter->HalFunc.inirp_deinit(padapter);
return _FAIL;
@ -248,14 +248,14 @@ u32 rtw_hal_inirp_deinit(_adapter *padapter)
u8 rtw_hal_intf_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val)
{
if(padapter->HalFunc.interface_ps_func)
if (padapter->HalFunc.interface_ps_func)
return padapter->HalFunc.interface_ps_func(padapter,efunc_id,val);
return _FAIL;
}
s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe)
{
if(padapter->HalFunc.hal_xmit)
if (padapter->HalFunc.hal_xmit)
return padapter->HalFunc.hal_xmit(padapter, pxmitframe);
return _FALSE;
@ -264,33 +264,33 @@ s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe)
s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe)
{
s32 ret = _FAIL;
if(padapter->HalFunc.mgnt_xmit)
if (padapter->HalFunc.mgnt_xmit)
ret = padapter->HalFunc.mgnt_xmit(padapter, pmgntframe);
return ret;
}
s32 rtw_hal_init_xmit_priv(_adapter *padapter)
{
if(padapter->HalFunc.init_xmit_priv != NULL)
if (padapter->HalFunc.init_xmit_priv != NULL)
return padapter->HalFunc.init_xmit_priv(padapter);
return _FAIL;
}
void rtw_hal_free_xmit_priv(_adapter *padapter)
{
if(padapter->HalFunc.free_xmit_priv != NULL)
if (padapter->HalFunc.free_xmit_priv != NULL)
padapter->HalFunc.free_xmit_priv(padapter);
}
s32 rtw_hal_init_recv_priv(_adapter *padapter)
{
if(padapter->HalFunc.init_recv_priv)
if (padapter->HalFunc.init_recv_priv)
return padapter->HalFunc.init_recv_priv(padapter);
return _FAIL;
}
void rtw_hal_free_recv_priv(_adapter *padapter)
{
if(padapter->HalFunc.free_recv_priv)
if (padapter->HalFunc.free_recv_priv)
padapter->HalFunc.free_recv_priv(padapter);
}
@ -298,91 +298,91 @@ void rtw_hal_update_ra_mask(_adapter *padapter, u32 mac_id, u8 rssi_level)
{
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
{
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
#ifdef CONFIG_NATIVEAP_MLME
if((mac_id-1)>0)
if ((mac_id-1)>0)
psta = pstapriv->sta_aid[(mac_id-1) - 1];
#endif
if(psta)
if (psta)
add_RATid(padapter, psta, 0);//todo: based on rssi_level
}
else
{
if(padapter->HalFunc.UpdateRAMaskHandler)
if (padapter->HalFunc.UpdateRAMaskHandler)
padapter->HalFunc.UpdateRAMaskHandler(padapter,mac_id,rssi_level);
}
}
void rtw_hal_add_ra_tid(_adapter *padapter, u32 bitmap, u8 arg, u8 rssi_level)
{
if(padapter->HalFunc.Add_RateATid)
if (padapter->HalFunc.Add_RateATid)
padapter->HalFunc.Add_RateATid(padapter, bitmap, arg, rssi_level);
}
#ifdef CONFIG_CONCURRENT_MODE
void rtw_hal_clone_data(_adapter *dst_padapter, _adapter *src_padapter)
{
if(dst_padapter->HalFunc.clone_haldata)
if (dst_padapter->HalFunc.clone_haldata)
dst_padapter->HalFunc.clone_haldata(dst_padapter, src_padapter);
}
#endif
/* Start specifical interface thread */
void rtw_hal_start_thread(_adapter *padapter)
{
if(padapter->HalFunc.run_thread)
if (padapter->HalFunc.run_thread)
padapter->HalFunc.run_thread(padapter);
}
/* Start specifical interface thread */
void rtw_hal_stop_thread(_adapter *padapter)
{
if(padapter->HalFunc.cancel_thread)
if (padapter->HalFunc.cancel_thread)
padapter->HalFunc.cancel_thread(padapter);
}
u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask)
{
u32 data = 0;
if(padapter->HalFunc.read_bbreg)
if (padapter->HalFunc.read_bbreg)
data = padapter->HalFunc.read_bbreg(padapter, RegAddr, BitMask);
return data;
}
void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data)
{
if(padapter->HalFunc.write_bbreg)
if (padapter->HalFunc.write_bbreg)
padapter->HalFunc.write_bbreg(padapter, RegAddr, BitMask, Data);
}
u32 rtw_hal_read_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask)
{
u32 data = 0;
if( padapter->HalFunc.read_rfreg)
if ( padapter->HalFunc.read_rfreg)
data = padapter->HalFunc.read_rfreg(padapter, eRFPath, RegAddr, BitMask);
return data;
}
void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
{
if(padapter->HalFunc.write_rfreg)
if (padapter->HalFunc.write_rfreg)
padapter->HalFunc.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data);
}
s32 rtw_hal_interrupt_handler(_adapter *padapter)
{
if(padapter->HalFunc.interrupt_handler)
if (padapter->HalFunc.interrupt_handler)
return padapter->HalFunc.interrupt_handler(padapter);
return _FAIL;
}
void rtw_hal_set_bwmode(_adapter *padapter, HT_CHANNEL_WIDTH Bandwidth, u8 Offset)
{
if(padapter->HalFunc.set_bwmode_handler)
if (padapter->HalFunc.set_bwmode_handler)
padapter->HalFunc.set_bwmode_handler(padapter, Bandwidth, Offset);
}
void rtw_hal_set_chan(_adapter *padapter, u8 channel)
{
if(padapter->HalFunc.set_channel_handler)
if (padapter->HalFunc.set_channel_handler)
padapter->HalFunc.set_channel_handler(padapter, channel);
}
@ -392,13 +392,13 @@ void rtw_hal_dm_watchdog(_adapter *padapter)
if (padapter->adapter_type != PRIMARY_ADAPTER)
return;
#endif
if(padapter->HalFunc.hal_dm_watchdog)
if (padapter->HalFunc.hal_dm_watchdog)
padapter->HalFunc.hal_dm_watchdog(padapter);
}
void rtw_hal_bcn_related_reg_setting(_adapter *padapter)
{
if(padapter->HalFunc.SetBeaconRelatedRegistersHandler)
if (padapter->HalFunc.SetBeaconRelatedRegistersHandler)
padapter->HalFunc.SetBeaconRelatedRegistersHandler(padapter);
}
@ -406,13 +406,13 @@ void rtw_hal_bcn_related_reg_setting(_adapter *padapter)
#ifdef CONFIG_ANTENNA_DIVERSITY
u8 rtw_hal_antdiv_before_linked(_adapter *padapter)
{
if(padapter->HalFunc.AntDivBeforeLinkHandler)
if (padapter->HalFunc.AntDivBeforeLinkHandler)
return padapter->HalFunc.AntDivBeforeLinkHandler(padapter);
return _FALSE;
}
void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src)
{
if(padapter->HalFunc.AntDivCompareHandler)
if (padapter->HalFunc.AntDivCompareHandler)
padapter->HalFunc.AntDivCompareHandler(padapter, dst, src);
}
#endif
@ -420,7 +420,7 @@ void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_B
#ifdef CONFIG_HOSTAPD_MLME
s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
{
if(padapter->HalFunc.hostap_mgnt_xmit_entry)
if (padapter->HalFunc.hostap_mgnt_xmit_entry)
return padapter->HalFunc.hostap_mgnt_xmit_entry(padapter, pkt);
return _FAIL;
}
@ -429,18 +429,18 @@ s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
#ifdef DBG_CONFIG_ERROR_DETECT
void rtw_hal_sreset_init(_adapter *padapter)
{
if(padapter->HalFunc.sreset_init_value)
if (padapter->HalFunc.sreset_init_value)
padapter->HalFunc.sreset_init_value(padapter);
}
void rtw_hal_sreset_reset(_adapter *padapter)
{
if(padapter->HalFunc.silentreset)
if (padapter->HalFunc.silentreset)
padapter->HalFunc.silentreset(padapter);
}
void rtw_hal_sreset_reset_value(_adapter *padapter)
{
if(padapter->HalFunc.sreset_reset_value)
if (padapter->HalFunc.sreset_reset_value)
padapter->HalFunc.sreset_reset_value(padapter);
}
@ -450,18 +450,18 @@ void rtw_hal_sreset_xmit_status_check(_adapter *padapter)
if (padapter->adapter_type != PRIMARY_ADAPTER)
return;
#endif
if(padapter->HalFunc.sreset_xmit_status_check)
if (padapter->HalFunc.sreset_xmit_status_check)
padapter->HalFunc.sreset_xmit_status_check(padapter);
}
void rtw_hal_sreset_linked_status_check(_adapter *padapter)
{
if(padapter->HalFunc.sreset_linked_status_check)
if (padapter->HalFunc.sreset_linked_status_check)
padapter->HalFunc.sreset_linked_status_check(padapter);
}
u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter)
{
u8 status = 0;
if(padapter->HalFunc.sreset_get_wifi_status)
if (padapter->HalFunc.sreset_get_wifi_status)
status = padapter->HalFunc.sreset_get_wifi_status(padapter);
return status;
}
@ -471,7 +471,7 @@ u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter)
#ifdef CONFIG_IOL
int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt)
{
if(adapter->HalFunc.IOL_exec_cmds_sync)
if (adapter->HalFunc.IOL_exec_cmds_sync)
return adapter->HalFunc.IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms,bndy_cnt);
return _FAIL;
}
@ -480,7 +480,7 @@ int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wat
#ifdef CONFIG_XMIT_THREAD_MODE
s32 rtw_hal_xmit_thread_handler(_adapter *padapter)
{
if(padapter->HalFunc.xmit_thread_handler)
if (padapter->HalFunc.xmit_thread_handler)
return padapter->HalFunc.xmit_thread_handler(padapter);
return _FAIL;
}
@ -488,13 +488,13 @@ s32 rtw_hal_xmit_thread_handler(_adapter *padapter)
void rtw_hal_notch_filter(_adapter *adapter, bool enable)
{
if(adapter->HalFunc.hal_notch_filter)
if (adapter->HalFunc.hal_notch_filter)
adapter->HalFunc.hal_notch_filter(adapter,enable);
}
void rtw_hal_reset_security_engine(_adapter * adapter)
{
if(adapter->HalFunc.hal_reset_security_engine)
if (adapter->HalFunc.hal_reset_security_engine)
adapter->HalFunc.hal_reset_security_engine(adapter);
}

1906
hal/odm.c
View file

File diff suppressed because it is too large Load diff

270
hal/odm_HWConfig.c
View file

@ -30,7 +30,7 @@
READ_AND_CONFIG_MP(ic,txt);\
else\
READ_AND_CONFIG_TC(ic,txt);\
} while(0)
} while (0)
#elif (RTL8188E_FOR_TEST_CHIP == 1)
#define READ_AND_CONFIG READ_AND_CONFIG_TC
#else
@ -73,46 +73,46 @@ odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(
{
s4Byte RetSig;
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
//if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
//if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
{
// Step 1. Scale mapping.
// 20100611 Joseph: Re-tunning RSSI presentation for Lenovo.
// 20100426 Joseph: Modify Signal strength mapping.
// This modification makes the RSSI indication similar to Intel solution.
// 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE.
if(CurrSig >= 54 && CurrSig <= 100)
if (CurrSig >= 54 && CurrSig <= 100)
{
RetSig = 100;
}
else if(CurrSig>=42 && CurrSig <= 53 )
else if (CurrSig>=42 && CurrSig <= 53 )
{
RetSig = 95;
}
else if(CurrSig>=36 && CurrSig <= 41 )
else if (CurrSig>=36 && CurrSig <= 41 )
{
RetSig = 74 + ((CurrSig - 36) *20)/6;
}
else if(CurrSig>=33 && CurrSig <= 35 )
else if (CurrSig>=33 && CurrSig <= 35 )
{
RetSig = 65 + ((CurrSig - 33) *8)/2;
}
else if(CurrSig>=18 && CurrSig <= 32 )
else if (CurrSig>=18 && CurrSig <= 32 )
{
RetSig = 62 + ((CurrSig - 18) *2)/15;
}
else if(CurrSig>=15 && CurrSig <= 17 )
else if (CurrSig>=15 && CurrSig <= 17 )
{
RetSig = 33 + ((CurrSig - 15) *28)/2;
}
else if(CurrSig>=10 && CurrSig <= 14 )
else if (CurrSig>=10 && CurrSig <= 14 )
{
RetSig = 39;
}
else if(CurrSig>=8 && CurrSig <= 9 )
else if (CurrSig>=8 && CurrSig <= 9 )
{
RetSig = 33;
}
else if(CurrSig <= 8 )
else if (CurrSig <= 8 )
{
RetSig = 19;
}
@ -129,46 +129,46 @@ odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(
{
s4Byte RetSig;
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
//if(pDM_Odm->SupportInterface == ODM_ITRF_USB)
//if (pDM_Odm->SupportInterface == ODM_ITRF_USB)
{
// Netcore request this modification because 2009.04.13 SU driver use it.
if(CurrSig >= 31 && CurrSig <= 100)
if (CurrSig >= 31 && CurrSig <= 100)
{
RetSig = 100;
}
else if(CurrSig >= 21 && CurrSig <= 30)
else if (CurrSig >= 21 && CurrSig <= 30)
{
RetSig = 90 + ((CurrSig - 20) / 1);
}
else if(CurrSig >= 11 && CurrSig <= 20)
else if (CurrSig >= 11 && CurrSig <= 20)
{
RetSig = 80 + ((CurrSig - 10) / 1);
}
else if(CurrSig >= 7 && CurrSig <= 10)
else if (CurrSig >= 7 && CurrSig <= 10)
{
RetSig = 69 + (CurrSig - 7);
}
else if(CurrSig == 6)
else if (CurrSig == 6)
{
RetSig = 54;
}
else if(CurrSig == 5)
else if (CurrSig == 5)
{
RetSig = 45;
}
else if(CurrSig == 4)
else if (CurrSig == 4)
{
RetSig = 36;
}
else if(CurrSig == 3)
else if (CurrSig == 3)
{
RetSig = 27;
}
else if(CurrSig == 2)
else if (CurrSig == 2)
{
RetSig = 18;
}
else if(CurrSig == 1)
else if (CurrSig == 1)
{
RetSig = 9;
}
@ -190,42 +190,42 @@ odm_SignalScaleMapping_92CSeries(
{
s4Byte RetSig;
#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
{
// Step 1. Scale mapping.
if(CurrSig >= 61 && CurrSig <= 100)
if (CurrSig >= 61 && CurrSig <= 100)
{
RetSig = 90 + ((CurrSig - 60) / 4);
}
else if(CurrSig >= 41 && CurrSig <= 60)
else if (CurrSig >= 41 && CurrSig <= 60)
{
RetSig = 78 + ((CurrSig - 40) / 2);
}
else if(CurrSig >= 31 && CurrSig <= 40)
else if (CurrSig >= 31 && CurrSig <= 40)
{
RetSig = 66 + (CurrSig - 30);
}
else if(CurrSig >= 21 && CurrSig <= 30)
else if (CurrSig >= 21 && CurrSig <= 30)
{
RetSig = 54 + (CurrSig - 20);
}
else if(CurrSig >= 5 && CurrSig <= 20)
else if (CurrSig >= 5 && CurrSig <= 20)
{
RetSig = 42 + (((CurrSig - 5) * 2) / 3);
}
else if(CurrSig == 4)
else if (CurrSig == 4)
{
RetSig = 36;
}
else if(CurrSig == 3)
else if (CurrSig == 3)
{
RetSig = 27;
}
else if(CurrSig == 2)
else if (CurrSig == 2)
{
RetSig = 18;
}
else if(CurrSig == 1)
else if (CurrSig == 1)
{
RetSig = 9;
}
@ -237,33 +237,33 @@ odm_SignalScaleMapping_92CSeries(
#endif
#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE))
if((pDM_Odm->SupportInterface == ODM_ITRF_USB) || (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) )
if ((pDM_Odm->SupportInterface == ODM_ITRF_USB) || (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) )
{
if(CurrSig >= 51 && CurrSig <= 100)
if (CurrSig >= 51 && CurrSig <= 100)
{
RetSig = 100;
}
else if(CurrSig >= 41 && CurrSig <= 50)
else if (CurrSig >= 41 && CurrSig <= 50)
{
RetSig = 80 + ((CurrSig - 40)*2);
}
else if(CurrSig >= 31 && CurrSig <= 40)
else if (CurrSig >= 31 && CurrSig <= 40)
{
RetSig = 66 + (CurrSig - 30);
}
else if(CurrSig >= 21 && CurrSig <= 30)
else if (CurrSig >= 21 && CurrSig <= 30)
{
RetSig = 54 + (CurrSig - 20);
}
else if(CurrSig >= 10 && CurrSig <= 20)
else if (CurrSig >= 10 && CurrSig <= 20)
{
RetSig = 42 + (((CurrSig - 10) * 2) / 3);
}
else if(CurrSig >= 5 && CurrSig <= 9)
else if (CurrSig >= 5 && CurrSig <= 9)
{
RetSig = 22 + (((CurrSig - 5) * 3) / 2);
}
else if(CurrSig >= 1 && CurrSig <= 4)
else if (CurrSig >= 1 && CurrSig <= 4)
{
RetSig = 6 + (((CurrSig - 1) * 3) / 2);
}
@ -281,13 +281,13 @@ odm_SignalScaleMapping(
IN s4Byte CurrSig
)
{
if( (pDM_Odm->SupportPlatform == ODM_MP) &&
if ( (pDM_Odm->SupportPlatform == ODM_MP) &&
(pDM_Odm->SupportInterface != ODM_ITRF_PCIE) && //USB & SDIO
(pDM_Odm->PatchID==10))//pMgntInfo->CustomerID == RT_CID_819x_Netcore
{
return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(pDM_Odm,CurrSig);
}
else if( (pDM_Odm->SupportPlatform == ODM_MP) &&
else if ( (pDM_Odm->SupportPlatform == ODM_MP) &&
(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) &&
(pDM_Odm->PatchID==19))//pMgntInfo->CustomerID == RT_CID_819x_Lenovo)
{
@ -313,15 +313,15 @@ static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo(
#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
// mapping to 5 bars for vista signal strength
// signal quality in driver will be displayed to signal strength
if(isCCKrate){
if (isCCKrate){
// in vista.
if(PWDB_ALL >= 50)
if (PWDB_ALL >= 50)
SQ = 100;
else if(PWDB_ALL >= 35 && PWDB_ALL < 50)
else if (PWDB_ALL >= 35 && PWDB_ALL < 50)
SQ = 80;
else if(PWDB_ALL >= 22 && PWDB_ALL < 35)
else if (PWDB_ALL >= 22 && PWDB_ALL < 35)
SQ = 60;
else if(PWDB_ALL >= 18 && PWDB_ALL < 22)
else if (PWDB_ALL >= 18 && PWDB_ALL < 22)
SQ = 40;
else
SQ = 20;
@ -331,13 +331,13 @@ static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo(
// mapping to 5 bars for vista signal strength
// signal quality in driver will be displayed to signal strength
// in vista.
if(RSSI >= 50)
if (RSSI >= 50)
SQ = 100;
else if(RSSI >= 35 && RSSI < 50)
else if (RSSI >= 35 && RSSI < 50)
SQ = 80;
else if(RSSI >= 22 && RSSI < 35)
else if (RSSI >= 22 && RSSI < 35)
SQ = 60;
else if(RSSI >= 18 && RSSI < 22)
else if (RSSI >= 18 && RSSI < 22)
SQ = 40;
else
SQ = 20;
@ -361,15 +361,15 @@ odm_EVMdbToPercentage(
//ODM_RTPRINT(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x \n", ret_val, ret_val));
if(ret_val >= 0)
if (ret_val >= 0)
ret_val = 0;
if(ret_val <= -33)
if (ret_val <= -33)
ret_val = -33;
ret_val = 0 - ret_val;
ret_val*=3;
if(ret_val == 99)
if (ret_val == 99)
ret_val = 100;
return(ret_val);
@ -403,7 +403,7 @@ odm_RxPhyStatus92CSeries_Parsing(
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
if(isCCKrate)
if (isCCKrate)
{
u1Byte report;
u1Byte cck_agc_rpt;
@ -414,7 +414,7 @@ odm_RxPhyStatus92CSeries_Parsing(
// (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
//
//if(pHalData->eRFPowerState == eRfOn)
//if (pHalData->eRFPowerState == eRfOn)
cck_highpwr = pDM_Odm->bCckHighPower;
//else
// cck_highpwr = FALSE;
@ -424,14 +424,14 @@ odm_RxPhyStatus92CSeries_Parsing(
//2011.11.28 LukeLee: 88E use different LNA & VGA gain table
//The RSSI formula should be modified according to the gain table
//In 88E, cck_highpwr is always set to 1
if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8812))
if (pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8812))
{
LNA_idx = ((cck_agc_rpt & 0xE0) >>5);
VGA_idx = (cck_agc_rpt & 0x1F);
switch(LNA_idx)
switch (LNA_idx)
{
case 7:
if(VGA_idx <= 27)
if (VGA_idx <= 27)
rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2
else
rx_pwr_all = -100;
@ -450,7 +450,7 @@ odm_RxPhyStatus92CSeries_Parsing(
rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0
break;
case 2:
if(cck_highpwr)
if (cck_highpwr)
rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0
else
rx_pwr_all = -6+ 2*(5-VGA_idx);
@ -467,22 +467,22 @@ odm_RxPhyStatus92CSeries_Parsing(
}
rx_pwr_all += 6;
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
if(cck_highpwr == FALSE)
if (cck_highpwr == FALSE)
{
if(PWDB_ALL >= 80)
if (PWDB_ALL >= 80)
PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
PWDB_ALL += 3;
if(PWDB_ALL>100)
if (PWDB_ALL>100)
PWDB_ALL = 100;
}
}
else
{
if(!cck_highpwr)
if (!cck_highpwr)
{
report =( cck_agc_rpt & 0xc0 )>>6;
switch(report)
switch (report)
{
// 03312009 modified by cosa
// Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion
@ -507,7 +507,7 @@ odm_RxPhyStatus92CSeries_Parsing(
//report = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a& 0x60;
report = (cck_agc_rpt & 0x60)>>5;
switch(report)
switch (report)
{
case 0x3:
rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ;
@ -527,30 +527,30 @@ odm_RxPhyStatus92CSeries_Parsing(
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
//Modification for ext-LNA board
if(pDM_Odm->BoardType == ODM_BOARD_HIGHPWR)
if (pDM_Odm->BoardType == ODM_BOARD_HIGHPWR)
{
if((cck_agc_rpt>>7) == 0){
if ((cck_agc_rpt>>7) == 0){
PWDB_ALL = (PWDB_ALL>94)?100:(PWDB_ALL +6);
}
else
{
if(PWDB_ALL > 38)
if (PWDB_ALL > 38)
PWDB_ALL -= 16;
else
PWDB_ALL = (PWDB_ALL<=16)?(PWDB_ALL>>2):(PWDB_ALL -12);
}
//CCK modification
if(PWDB_ALL > 25 && PWDB_ALL <= 60)
if (PWDB_ALL > 25 && PWDB_ALL <= 60)
PWDB_ALL += 6;
//else if (PWDB_ALL <= 25)
// PWDB_ALL += 8;
}
else//Modification for int-LNA board
{
if(PWDB_ALL > 99)
if (PWDB_ALL > 99)
PWDB_ALL -= 8;
else if(PWDB_ALL > 50 && PWDB_ALL <= 68)
else if (PWDB_ALL > 50 && PWDB_ALL <= 68)
PWDB_ALL += 4;
}
}
@ -563,20 +563,20 @@ odm_RxPhyStatus92CSeries_Parsing(
//
// (3) Get Signal Quality (EVM)
//
if(pPktinfo->bPacketMatchBSSID)
if (pPktinfo->bPacketMatchBSSID)
{
u1Byte SQ,SQ_rpt;
if((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)){//pMgntInfo->CustomerID == RT_CID_819x_Lenovo
if ((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)){//pMgntInfo->CustomerID == RT_CID_819x_Lenovo
SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0);
}
else if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){
else if (pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){
SQ = 100;
}
else{
SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
if(SQ_rpt > 64)
if (SQ_rpt > 64)
SQ = 0;
else if (SQ_rpt < 20)
SQ = 100;
@ -599,7 +599,7 @@ odm_RxPhyStatus92CSeries_Parsing(
// (1)Get RSSI for HT rate
//
for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++)
for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++)
{
// 2008/01/30 MH we will judge RF RX path now.
if (pDM_Odm->RFPathRxEnable & BIT(i))
@ -619,14 +619,14 @@ odm_RxPhyStatus92CSeries_Parsing(
//RTPRINT(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));
//Modification for ext-LNA board
if(pDM_Odm->BoardType == ODM_BOARD_HIGHPWR)
if (pDM_Odm->BoardType == ODM_BOARD_HIGHPWR)
{
if((pPhyStaRpt->path_agc[i].trsw) == 1)
if ((pPhyStaRpt->path_agc[i].trsw) == 1)
RSSI = (RSSI>94)?100:(RSSI +6);
else
RSSI = (RSSI<=16)?(RSSI>>3):(RSSI -16);
if((RSSI <= 34) && (RSSI >=4))
if ((RSSI <= 34) && (RSSI >=4))
RSSI -= 4;
}
@ -638,11 +638,11 @@ odm_RxPhyStatus92CSeries_Parsing(
#endif
/* Record Signal Strength for next packet */
if(pPktinfo->bPacketMatchBSSID)
if (pPktinfo->bPacketMatchBSSID)
{
if((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19))
if ((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19))
{
if(i==ODM_RF_PATH_A)
if (i==ODM_RF_PATH_A)
pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,i,RSSI);
}
@ -668,19 +668,19 @@ odm_RxPhyStatus92CSeries_Parsing(
pPhyInfo->RecvSignalPower = rx_pwr_all;
#endif
if((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)){
if ((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)){
//do nothing
}
else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo
//
// (3)EVM of HT rate
//
if(pPktinfo->Rate >=DESC92C_RATEMCS8 && pPktinfo->Rate <=DESC92C_RATEMCS15)
if (pPktinfo->Rate >=DESC92C_RATEMCS8 && pPktinfo->Rate <=DESC92C_RATEMCS15)
Max_spatial_stream = 2; //both spatial stream make sense
else
Max_spatial_stream = 1; //only spatial stream 1 makes sense
for(i=0; i<Max_spatial_stream; i++)
for (i=0; i<Max_spatial_stream; i++)
{
// Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
// fill most significant bit to "zero" when doing shifting operation which may change a negative
@ -690,9 +690,9 @@ odm_RxPhyStatus92CSeries_Parsing(
//RTPRINT(FRX, RX_PHY_SQ, ("RXRATE=%x RXEVM=%x EVM=%s%d\n",
//GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM));
if(pPktinfo->bPacketMatchBSSID)
if (pPktinfo->bPacketMatchBSSID)
{
if(i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only
if (i==ODM_RF_PATH_A) // Fill value in RFD, Get the first spatial stream only
{
pPhyInfo->SignalQuality = (u1Byte)(EVM & 0xff);
}
@ -705,7 +705,7 @@ odm_RxPhyStatus92CSeries_Parsing(
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
//UI BSS List signal strength(in percentage), make it good looking, from 0~100.
//It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
if(isCCKrate)
if (isCCKrate)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
// 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/
@ -729,7 +729,7 @@ odm_RxPhyStatus92CSeries_Parsing(
#endif
//For 92C/92D HW (Hybrid) Antenna Diversity
#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
#if (defined(CONFIG_HW_ANTENNA_DIVERSITY))
pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;
//For 88E HW Antenna Diversity
pDM_Odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;
@ -762,7 +762,7 @@ odm_Process_RSSIForDM(
PSTA_INFO_T pEntry;
if(pPktinfo->StationID == 0xFF)
if (pPktinfo->StationID == 0xFF)
return;
// 2011/11/17 MH Need to debug
@ -772,23 +772,23 @@ odm_Process_RSSIForDM(
}
pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->StationID];
if(!IS_STA_VALID(pEntry) ){
if (!IS_STA_VALID(pEntry) ){
return;
}
if((!pPktinfo->bPacketMatchBSSID) )
if ((!pPktinfo->bPacketMatchBSSID) )
{
return;
}
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M ) && (pPktinfo->Rate <= DESC92C_RATE11M ))?TRUE :FALSE;
#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
#if (defined(CONFIG_HW_ANTENNA_DIVERSITY))
#if ((RTL8192C_SUPPORT == 1) ||(RTL8192D_SUPPORT == 1))
if(pDM_Odm->SupportICType & ODM_RTL8192C|ODM_RTL8192D)
if (pDM_Odm->SupportICType & ODM_RTL8192C|ODM_RTL8192D)
{
if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
{
//if(pPktinfo->bPacketBeacon)
//if (pPktinfo->bPacketBeacon)
//{
// DbgPrint("This is beacon, isCCKrate=%d\n", isCCKrate);
//}
@ -798,16 +798,16 @@ odm_Process_RSSIForDM(
#endif
//-----------------Smart Antenna Debug Message------------------//
#if (RTL8188E_SUPPORT == 1)
if(pDM_Odm->SupportICType == ODM_RTL8188E)
if (pDM_Odm->SupportICType == ODM_RTL8188E)
{
u1Byte antsel_tr_mux;
pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)
if (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)
{
if(pDM_FatTable->FAT_State == FAT_TRAINING_STATE)
if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE)
{
if(pPktinfo->bPacketToSelf) //(pPktinfo->bPacketMatchBSSID && (!pPktinfo->bPacketBeacon))
if (pPktinfo->bPacketToSelf) //(pPktinfo->bPacketMatchBSSID && (!pPktinfo->bPacketBeacon))
{
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |(pDM_FatTable->antsel_rx_keep_1 <<1) |pDM_FatTable->antsel_rx_keep_0;
pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll;
@ -819,9 +819,9 @@ odm_Process_RSSIForDM(
}
}
}
else if((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV))
else if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV))
{
if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
{
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |(pDM_FatTable->antsel_rx_keep_1 <<1) |pDM_FatTable->antsel_rx_keep_0;
//ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("antsel_tr_mux=3'b%d%d%d\n",
@ -833,19 +833,19 @@ odm_Process_RSSIForDM(
}
#endif
#endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
#endif //#if (defined(CONFIG_HW_ANTENNA_DIVERSITY))
//-----------------Smart Antenna Debug Message------------------//
UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK;
UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;
UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
{
if(!isCCKrate)//ofdm rate
if (!isCCKrate)//ofdm rate
{
if(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0){
if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0){
RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
}
else
@ -854,7 +854,7 @@ odm_Process_RSSIForDM(
//pRfd->Status.RxMIMOSignalStrength[0], pRfd->Status.RxMIMOSignalStrength[1]);
if(pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B])
if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B])
{
RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
@ -864,24 +864,24 @@ odm_Process_RSSIForDM(
RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
}
if((RSSI_max -RSSI_min) < 3)
if ((RSSI_max -RSSI_min) < 3)
RSSI_Ave = RSSI_max;
else if((RSSI_max -RSSI_min) < 6)
else if ((RSSI_max -RSSI_min) < 6)
RSSI_Ave = RSSI_max - 1;
else if((RSSI_max -RSSI_min) < 10)
else if ((RSSI_max -RSSI_min) < 10)
RSSI_Ave = RSSI_max - 2;
else
RSSI_Ave = RSSI_max - 3;
}
//1 Process OFDM RSSI
if(UndecoratedSmoothedOFDM <= 0) // initialize
if (UndecoratedSmoothedOFDM <= 0) // initialize
{
UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;
}
else
{
if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedOFDM)
if (pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedOFDM)
{
UndecoratedSmoothedOFDM =
( ((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
@ -904,13 +904,13 @@ odm_Process_RSSIForDM(
RSSI_Ave = pPhyInfo->RxPWDBAll;
//1 Process CCK RSSI
if(UndecoratedSmoothedCCK <= 0) // initialize
if (UndecoratedSmoothedCCK <= 0) // initialize
{
UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;
}
else
{
if(pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedCCK)
if (pPhyInfo->RxPWDBAll > (u4Byte)UndecoratedSmoothedCCK)
{
UndecoratedSmoothedCCK =
( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) +
@ -927,25 +927,25 @@ odm_Process_RSSIForDM(
pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1;
}
//if(pEntry)
//if (pEntry)
{
//2011.07.28 LukeLee: modified to prevent unstable CCK RSSI
if(pEntry->rssi_stat.ValidBit >= 64)
if (pEntry->rssi_stat.ValidBit >= 64)
pEntry->rssi_stat.ValidBit = 64;
else
pEntry->rssi_stat.ValidBit++;
for(i=0; i<pEntry->rssi_stat.ValidBit; i++)
for (i=0; i<pEntry->rssi_stat.ValidBit; i++)
OFDM_pkt += (u1Byte)(pEntry->rssi_stat.PacketMap>>i)&BIT0;
if(pEntry->rssi_stat.ValidBit == 64)
if (pEntry->rssi_stat.ValidBit == 64)
{
Weighting = ((OFDM_pkt<<4) > 64)?64:(OFDM_pkt<<4);
UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6;
}
else
{
if(pEntry->rssi_stat.ValidBit != 0)
if (pEntry->rssi_stat.ValidBit != 0)
UndecoratedSmoothedPWDB = (OFDM_pkt*UndecoratedSmoothedOFDM+(pEntry->rssi_stat.ValidBit-OFDM_pkt)*UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;
else
UndecoratedSmoothedPWDB = 0;
@ -983,10 +983,10 @@ ODM_PhyStatusQuery_92CSeries(
pPhyStatus,
pPktinfo);
if( pDM_Odm->RSSI_test == TRUE)
if ( pDM_Odm->RSSI_test == TRUE)
{
// Select the packets to do RSSI checking for antenna switching.
if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon )
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon )
{
/*
#if 0//(DM_ODM_SUPPORT_TYPE == ODM_MP)
@ -1037,7 +1037,7 @@ ODM_PhyStatusQuery(
)
{
#if 0 // How to jaguar jugar series??
if(pDM_Odm->SupportICType >= ODM_RTL8195 )
if (pDM_Odm->SupportICType >= ODM_RTL8195 )
{
ODM_PhyStatusQuery_JaguarSeries(pDM_Odm,pPhyInfo,pPhyStatus,pPktinfo);
}
@ -1079,7 +1079,7 @@ ODM_ConfigRFWithHeaderFile(
#if (RTL8723A_SUPPORT == 1)
if (pDM_Odm->SupportICType == ODM_RTL8723A)
{
if(eRFPath == ODM_RF_PATH_A)
if (eRFPath == ODM_RF_PATH_A)
READ_AND_CONFIG_MP(8723A,_RadioA_1T_);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_A:Rtl8723RadioA_1TArray\n"));
@ -1092,9 +1092,9 @@ ODM_ConfigRFWithHeaderFile(
#if (RTL8188E_SUPPORT == 1)
if (pDM_Odm->SupportICType == ODM_RTL8188E)
{
if(eRFPath == ODM_RF_PATH_A)
if (eRFPath == ODM_RF_PATH_A)
READ_AND_CONFIG(8188E,_RadioA_1T_);
//else if(eRFPath == ODM_RF_PATH_B)
//else if (eRFPath == ODM_RF_PATH_B)
// READ_AND_CONFIG(8188E,_RadioB_1T_);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_A:Rtl8188ERadioA_1TArray\n"));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_B:Rtl8188ERadioB_1TArray\n"));
@ -1114,14 +1114,14 @@ ODM_ConfigBBWithHeaderFile(
)
{
#if (RTL8723A_SUPPORT == 1)
if(pDM_Odm->SupportICType == ODM_RTL8723A)
if (pDM_Odm->SupportICType == ODM_RTL8723A)
{
if(ConfigType == CONFIG_BB_PHY_REG)
if (ConfigType == CONFIG_BB_PHY_REG)
{
READ_AND_CONFIG_MP(8723A,_PHY_REG_1T_);
}
else if(ConfigType == CONFIG_BB_AGC_TAB)
else if (ConfigType == CONFIG_BB_AGC_TAB)
{
READ_AND_CONFIG_MP(8723A,_AGC_TAB_1T_);
}
@ -1131,22 +1131,22 @@ ODM_ConfigBBWithHeaderFile(
#endif
#if (RTL8188E_SUPPORT == 1)
if(pDM_Odm->SupportICType == ODM_RTL8188E)
if (pDM_Odm->SupportICType == ODM_RTL8188E)
{
if(ConfigType == CONFIG_BB_PHY_REG)
if (ConfigType == CONFIG_BB_PHY_REG)
{
READ_AND_CONFIG(8188E,_PHY_REG_1T_);
}
// else if(ConfigType == ODM_BaseBand_Config_PHY_REG_MP)
// else if (ConfigType == ODM_BaseBand_Config_PHY_REG_MP)
// {
//READ_AND_CONFIG(8188E,_PHY_REG_MP_);
// }
else if(ConfigType == CONFIG_BB_AGC_TAB)
else if (ConfigType == CONFIG_BB_AGC_TAB)
{
READ_AND_CONFIG(8188E,_AGC_TAB_1T_);
}
else if(ConfigType == CONFIG_BB_PHY_REG_PG)
else if (ConfigType == CONFIG_BB_PHY_REG_PG)
{
READ_AND_CONFIG(8188E,_PHY_REG_PG_);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8188EPHY_REG_PGArray\n"));

248
hal/odm_RTL8188E.c
View file

@ -33,7 +33,7 @@ ODM_DIG_LowerBound_88E(
{
pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
{
pDM_DigTable->rx_gain_range_min = (u1Byte) pDM_DigTable->AntDiv_RSSI_max;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_DIG_LowerBound_88E(): pDM_DigTable->AntDiv_RSSI_max=%d \n",pDM_DigTable->AntDiv_RSSI_max));
@ -44,7 +44,7 @@ ODM_DIG_LowerBound_88E(
}
#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
#if (defined(CONFIG_HW_ANTENNA_DIVERSITY))
VOID
odm_RX_HWAntDivInit(
IN PDM_ODM_T pDM_Odm
@ -122,7 +122,7 @@ odm_TRX_HWAntDivInit(
ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT);
//antenna mapping table
if(!pDM_Odm->bIsMPChip) //testchip
if (!pDM_Odm->bIsMPChip) //testchip
{
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT10|BIT9|BIT8, 1); //Reg858[10:8]=3'b001
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_DEFUALT_A_11N , BIT13|BIT12|BIT11, 2); //Reg858[13:11]=3'b010
@ -153,7 +153,7 @@ odm_FastAntTrainingInit(
}
#endif
for(i=0; i<6; i++)
for (i=0; i<6; i++)
{
pDM_FatTable->Bssid[i] = 0;
pDM_FatTable->antSumRSSI[i] = 0;
@ -182,9 +182,9 @@ odm_FastAntTrainingInit(
ODM_SetBBReg(pDM_Odm, 0xca4 , bMaskDWord, 0x000000a0);
//antenna mapping table
if(AntCombination == 2)
if (AntCombination == 2)
{
if(!pDM_Odm->bIsMPChip) //testchip
if (!pDM_Odm->bIsMPChip) //testchip
{
ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 1); //Reg858[10:8]=3'b001
ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 2); //Reg858[13:11]=3'b010
@ -195,9 +195,9 @@ odm_FastAntTrainingInit(
ODM_SetBBReg(pDM_Odm, 0x914 , bMaskByte1, 2);
}
}
else if(AntCombination == 7)
else if (AntCombination == 7)
{
if(!pDM_Odm->bIsMPChip) //testchip
if (!pDM_Odm->bIsMPChip) //testchip
{
ODM_SetBBReg(pDM_Odm, 0x858 , BIT10|BIT9|BIT8, 0); //Reg858[10:8]=3'b000
ODM_SetBBReg(pDM_Odm, 0x858 , BIT13|BIT12|BIT11, 1); //Reg858[13:11]=3'b001
@ -259,7 +259,7 @@ ODM_AntennaDiversityInit_88E(
//pHalData->AntDivCfg = 1;
//}
*/
if(pDM_Odm->SupportICType != ODM_RTL8188E)
if (pDM_Odm->SupportICType != ODM_RTL8188E)
return;
//ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->AntDivType=%d, pHalData->AntDivCfg=%d\n",
@ -267,11 +267,11 @@ ODM_AntennaDiversityInit_88E(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->AntDivType=%d\n",pDM_Odm->AntDivType));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_Odm->bIsMPChip=%s\n",(pDM_Odm->bIsMPChip?"TRUE":"FALSE")));
if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)
if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)
odm_RX_HWAntDivInit(pDM_Odm);
else if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
else if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
odm_TRX_HWAntDivInit(pDM_Odm);
else if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)
else if (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)
odm_FastAntTrainingInit(pDM_Odm);
}
@ -282,10 +282,10 @@ ODM_UpdateRxIdleAnt_88E(IN PDM_ODM_T pDM_Odm, IN u1Byte Ant)
pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
u4Byte DefaultAnt, OptionalAnt;
if(pDM_FatTable->RxIdleAnt != Ant)
if (pDM_FatTable->RxIdleAnt != Ant)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Update Rx Idle Ant\n"));
if(Ant == MAIN_ANT)
if (Ant == MAIN_ANT)
{
DefaultAnt = (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)?MAIN_ANT_CG_TRX:MAIN_ANT_CGCS_RX;
OptionalAnt = (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)?AUX_ANT_CG_TRX:AUX_ANT_CGCS_RX;
@ -296,7 +296,7 @@ ODM_UpdateRxIdleAnt_88E(IN PDM_ODM_T pDM_Odm, IN u1Byte Ant)
OptionalAnt = (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)?MAIN_ANT_CG_TRX:MAIN_ANT_CGCS_RX;
}
if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
{
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, DefaultAnt); //Default RX
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT8|BIT7|BIT6, OptionalAnt); //Optional RX
@ -304,7 +304,7 @@ ODM_UpdateRxIdleAnt_88E(IN PDM_ODM_T pDM_Odm, IN u1Byte Ant)
ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11N , BIT6|BIT7, DefaultAnt); //Resp Tx
}
else if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)
else if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)
{
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, DefaultAnt); //Default RX
ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT8|BIT7|BIT6, OptionalAnt); //Optional RX
@ -322,7 +322,7 @@ odm_UpdateTxAnt_88E(IN PDM_ODM_T pDM_Odm, IN u1Byte Ant, IN u4Byte MacId)
pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
u1Byte TargetAnt;
if(Ant == MAIN_ANT)
if (Ant == MAIN_ANT)
TargetAnt = MAIN_ANT_CG_TRX;
else
TargetAnt = AUX_ANT_CG_TRX;
@ -347,7 +347,7 @@ ODM_SetTxAntByTxInfo_88E(
{
pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
if((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV))
if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV))
{
SET_TX_DESC_ANTSEL_A_88E(pDesc, pDM_FatTable->antsel_a[macId]);
SET_TX_DESC_ANTSEL_B_88E(pDesc, pDM_FatTable->antsel_b[macId]);
@ -374,9 +374,9 @@ ODM_AntselStatistics_88E(
)
{
pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
{
if(antsel_tr_mux == MAIN_ANT_CG_TRX)
if (antsel_tr_mux == MAIN_ANT_CG_TRX)
{
pDM_FatTable->MainAnt_Sum[MacId]+=RxPWDBAll;
@ -389,9 +389,9 @@ ODM_AntselStatistics_88E(
}
}
else if(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)
else if (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV)
{
if(antsel_tr_mux == MAIN_ANT_CGCS_RX)
if (antsel_tr_mux == MAIN_ANT_CGCS_RX)
{
pDM_FatTable->MainAnt_Sum[MacId]+=RxPWDBAll;
@ -424,7 +424,7 @@ odm_HWAntDiv(
for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
{
pEntry = pDM_Odm->pODM_StaInfo[i];
if(IS_STA_VALID(pEntry))
if (IS_STA_VALID(pEntry))
{
//2 Caculate RSSI per Antenna
Main_RSSI = (pDM_FatTable->MainAnt_Cnt[i]!=0)?(pDM_FatTable->MainAnt_Sum[i]/pDM_FatTable->MainAnt_Cnt[i]):0;
@ -436,19 +436,19 @@ odm_HWAntDiv(
//2 Select MaxRSSI for DIG
LocalMaxRSSI = (Main_RSSI>Aux_RSSI)?Main_RSSI:Aux_RSSI;
if((LocalMaxRSSI > AntDivMaxRSSI) && (LocalMaxRSSI < 40))
if ((LocalMaxRSSI > AntDivMaxRSSI) && (LocalMaxRSSI < 40))
AntDivMaxRSSI = LocalMaxRSSI;
if(LocalMaxRSSI > MaxRSSI)
if (LocalMaxRSSI > MaxRSSI)
MaxRSSI = LocalMaxRSSI;
//2 Select RX Idle Antenna
if((pDM_FatTable->RxIdleAnt == MAIN_ANT) && (Main_RSSI == 0))
if ((pDM_FatTable->RxIdleAnt == MAIN_ANT) && (Main_RSSI == 0))
Main_RSSI = Aux_RSSI;
else if((pDM_FatTable->RxIdleAnt == AUX_ANT) && (Aux_RSSI == 0))
else if ((pDM_FatTable->RxIdleAnt == AUX_ANT) && (Aux_RSSI == 0))
Aux_RSSI = Main_RSSI;
LocalMinRSSI = (Main_RSSI>Aux_RSSI)?Aux_RSSI:Main_RSSI;
if(LocalMinRSSI < MinRSSI)
if (LocalMinRSSI < MinRSSI)
{
MinRSSI = LocalMinRSSI;
RxIdleAnt = TargetAnt;
@ -457,7 +457,7 @@ odm_HWAntDiv(
#else
//2 Select TRX Antenna
if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
odm_UpdateTxAnt_88E(pDM_Odm, TargetAnt, i);
#endif
}
@ -490,17 +490,17 @@ odm_SetNextMACAddrTarget(
//2012.03.26 LukeLee: The MAC address is changed according to MACID in turn
//
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SetNextMACAddrTarget() ==>\n"));
if(pDM_Odm->bLinked)
if (pDM_Odm->bLinked)
{
for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
{
if((pDM_FatTable->TrainIdx+1) == ODM_ASSOCIATE_ENTRY_NUM)
if ((pDM_FatTable->TrainIdx+1) == ODM_ASSOCIATE_ENTRY_NUM)
pDM_FatTable->TrainIdx = 0;
else
pDM_FatTable->TrainIdx++;
pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx];
if(IS_STA_VALID(pEntry))
if (IS_STA_VALID(pEntry))
{
//Match MAC ADDR
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
@ -535,7 +535,7 @@ odm_SetNextMACAddrTarget(
//
//2012.03.26 LukeLee: This should be removed later, the MAC address is changed according to MACID in turn
//
#if( DM_ODM_SUPPORT_TYPE & ODM_MP)
#if ( DM_ODM_SUPPORT_TYPE & ODM_MP)
{
PADAPTER Adapter = pDM_Odm->Adapter;
PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
@ -553,13 +553,13 @@ odm_SetNextMACAddrTarget(
//1 Select MAC Address Filter
for (i=0; i<6; i++)
{
if(Bssid[i] != pDM_FatTable->Bssid[i])
if (Bssid[i] != pDM_FatTable->Bssid[i])
{
bMatchBSSID = FALSE;
break;
}
}
if(bMatchBSSID == FALSE)
if (bMatchBSSID == FALSE)
{
//Match MAC ADDR
value32 = (Bssid[5]<<8)|Bssid[4];
@ -588,20 +588,20 @@ odm_FastAntTraining(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("==>odm_FastAntTraining()\n"));
//1 TRAINING STATE
if(pDM_FatTable->FAT_State == FAT_TRAINING_STATE)
if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Enter FAT_TRAINING_STATE\n"));
//2 Caculate RSSI per Antenna
for (i=0; i<7; i++)
{
if(pDM_FatTable->antRSSIcnt[i] == 0)
if (pDM_FatTable->antRSSIcnt[i] == 0)
pDM_FatTable->antAveRSSI[i] = 0;
else
{
pDM_FatTable->antAveRSSI[i] = pDM_FatTable->antSumRSSI[i] /pDM_FatTable->antRSSIcnt[i];
bPktFilterMacth = TRUE;
}
if(pDM_FatTable->antAveRSSI[i] > MaxRSSI)
if (pDM_FatTable->antAveRSSI[i] > MaxRSSI)
{
MaxRSSI = pDM_FatTable->antAveRSSI[i];
TargetAnt = (u1Byte) i;
@ -612,7 +612,7 @@ odm_FastAntTraining(
}
//2 Select TRX Antenna
if(bPktFilterMacth == FALSE)
if (bPktFilterMacth == FALSE)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("None Packet is matched\n"));
@ -632,7 +632,7 @@ odm_FastAntTraining(
#if 0
pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx];
if(IS_STA_VALID(pEntry))
if (IS_STA_VALID(pEntry))
{
pEntry->antsel_a = TargetAnt&BIT0;
pEntry->antsel_b = (TargetAnt&BIT1)>>1;
@ -645,13 +645,13 @@ odm_FastAntTraining(
#endif
if(TargetAnt == 0)
if (TargetAnt == 0)
ODM_SetBBReg(pDM_Odm, 0xc50 , BIT7, 0); //RegC50[7]=1'b0 //disable HW AntDiv
}
//2 Reset Counter
for(i=0; i<7; i++)
for (i=0; i<7; i++)
{
pDM_FatTable->antSumRSSI[i] = 0;
pDM_FatTable->antRSSIcnt[i] = 0;
@ -662,7 +662,7 @@ odm_FastAntTraining(
}
//1 NORMAL STATE
if(pDM_FatTable->FAT_State == FAT_NORMAL_STATE)
if (pDM_FatTable->FAT_State == FAT_NORMAL_STATE)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Enter FAT_NORMAL_STATE\n"));
@ -670,7 +670,7 @@ odm_FastAntTraining(
#if 0
pEntry = pDM_Odm->pODM_StaInfo[pDM_FatTable->TrainIdx];
if(IS_STA_VALID(pEntry))
if (IS_STA_VALID(pEntry))
{
pEntry->antsel_a = TargetAnt&BIT0;
pEntry->antsel_b = (TargetAnt&BIT1)>>1;
@ -697,9 +697,9 @@ odm_FastAntTrainingCallback(
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PADAPTER padapter = pDM_Odm->Adapter;
if(padapter->net_closed == _TRUE)
if (padapter->net_closed == _TRUE)
return;
//if(*pDM_Odm->pbNet_closed == TRUE)
//if (*pDM_Odm->pbNet_closed == TRUE)
// return;
#endif
@ -725,14 +725,14 @@ ODM_AntennaDiversity_88E(
)
{
pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
if((pDM_Odm->SupportICType != ODM_RTL8188E) || (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)))
if ((pDM_Odm->SupportICType != ODM_RTL8188E) || (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)))
{
//ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_AntennaDiversity_88E: Not Support 88E AntDiv\n"));
return;
}
#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
if(pDM_Odm->bLinked){
if(pDM_Odm->Adapter->registrypriv.force_ant != 0)
if (pDM_Odm->bLinked){
if (pDM_Odm->Adapter->registrypriv.force_ant != 0)
{
u4Byte Main_RSSI, Aux_RSSI;
u8 i=0;
@ -747,12 +747,12 @@ ODM_AntennaDiversity_88E(
pDM_FatTable->MainAnt_Cnt[i] = 0;
pDM_FatTable->AuxAnt_Cnt[i] = 0;
}
if(pDM_Odm->Adapter->registrypriv.force_ant==1){
if (pDM_Odm->Adapter->registrypriv.force_ant==1){
ODM_UpdateRxIdleAnt_88E(pDM_Odm, MAIN_ANT);
printk("%s fixed antenna in Main ant\n",__FUNCTION__);
return;
}
else if(pDM_Odm->Adapter->registrypriv.force_ant==2){
else if (pDM_Odm->Adapter->registrypriv.force_ant==2){
ODM_UpdateRxIdleAnt_88E(pDM_Odm, AUX_ANT);
printk("%s fixed antenna in AUX ant\n",__FUNCTION__);
return;
@ -762,15 +762,15 @@ ODM_AntennaDiversity_88E(
if(!pDM_Odm->bLinked)
if (!pDM_Odm->bLinked)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_AntennaDiversity_88E(): No Link.\n"));
if(pDM_FatTable->bBecomeLinked == TRUE)
if (pDM_FatTable->bBecomeLinked == TRUE)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn off HW AntDiv\n"));
ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); //RegC50[7]=1'b1 //enable HW AntDiv
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA1_11N , BIT15, 0); //Enable CCK AntDiv
if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N , BIT21, 0); //Reg80c[21]=1'b0 //from TX Reg
pDM_FatTable->bBecomeLinked = pDM_Odm->bLinked;
}
@ -778,14 +778,14 @@ ODM_AntennaDiversity_88E(
}
else
{
if(pDM_FatTable->bBecomeLinked ==FALSE)
if (pDM_FatTable->bBecomeLinked ==FALSE)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn on HW AntDiv\n"));
//Because HW AntDiv is disabled before Link, we enable HW AntDiv after link
ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 1); //RegC50[7]=1'b1 //enable HW AntDiv
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_ANTDIV_PARA1_11N , BIT15, 1); //Enable CCK AntDiv
//ODM_SetMACReg(pDM_Odm, 0x7B4 , BIT18, 1); //Response Tx by current HW antdiv
if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
{
#if TX_BY_REG
ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N , BIT21, 0); //Reg80c[21]=1'b0 //from Reg
@ -799,10 +799,10 @@ ODM_AntennaDiversity_88E(
if((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV))
if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV))
odm_HWAntDiv(pDM_Odm);
#if (!(DM_ODM_SUPPORT_TYPE == ODM_CE))
else if(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)
else if (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)
odm_FastAntTraining(pDM_Odm);
#endif
}
@ -834,7 +834,7 @@ VOID odm_FastAntTrainingCallback(void *FunctionContext)
{
PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext;
PADAPTER padapter = pDM_Odm->Adapter;
if(padapter->net_closed == _TRUE)
if (padapter->net_closed == _TRUE)
return;
odm_FastAntTraining(pDM_Odm);
}
@ -848,7 +848,7 @@ VOID odm_FastAntTrainingCallback(void *FunctionContext)
#endif
*/
#else //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
#else //#if (defined(CONFIG_HW_ANTENNA_DIVERSITY))
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
VOID
ODM_SetTxAntByTxInfo_88E(
@ -866,7 +866,7 @@ ODM_SetTxAntByTxInfo_88E(
{
}
#endif
#endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
#endif //#if (defined(CONFIG_HW_ANTENNA_DIVERSITY))
//3============================================================
//3 Dynamic Primary CCA
//3============================================================
@ -923,11 +923,11 @@ odm_DynamicPrimaryCCA(
u1Byte SecCHOffset;
u1Byte i;
#if((DM_ODM_SUPPORT_TYPE==ODM_ADSL) ||( DM_ODM_SUPPORT_TYPE==ODM_CE))
#if ((DM_ODM_SUPPORT_TYPE==ODM_ADSL) ||( DM_ODM_SUPPORT_TYPE==ODM_CE))
return;
#endif
if(pDM_Odm->SupportICType != ODM_RTL8188E)
if (pDM_Odm->SupportICType != ODM_RTL8188E)
return;
Is40MHz = *(pDM_Odm->pBandWidth);
@ -935,7 +935,7 @@ odm_DynamicPrimaryCCA(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Second CH Offset = %d\n", SecCHOffset));
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
if(Is40MHz==1)
if (Is40MHz==1)
SecCHOffset = SecCHOffset%2+1; // NIC's definition is reverse to AP 1:secondary below, 2: secondary above
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Second CH Offset = %d\n", SecCHOffset));
//3 Check Current WLAN Traffic
@ -970,20 +970,20 @@ odm_DynamicPrimaryCCA(
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("ACTING as AP mode=%d\n", ACTING_AS_AP(Adapter)));
//3 To get entry's connection and BW infomation status.
for(i=0;i<ASSOCIATE_ENTRY_NUM;i++)
for (i=0;i<ASSOCIATE_ENTRY_NUM;i++)
{
if(IsAPModeExist(Adapter)&&GetFirstExtAdapter(Adapter)!=NULL)
if (IsAPModeExist(Adapter)&&GetFirstExtAdapter(Adapter)!=NULL)
pEntry=AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i);
else
pEntry=AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i);
if(pEntry!=NULL)
if (pEntry!=NULL)
{
Client_tmp = pEntry->HTInfo.bBw40MHz; // client BW
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Client_BW=%d\n", Client_tmp));
if(Client_tmp>Client_40MHz)
if (Client_tmp>Client_40MHz)
Client_40MHz = Client_tmp; // 40M/20M coexist => 40M priority is High
if(pEntry->bAssociated)
if (pEntry->bAssociated)
{
bConnected=TRUE; // client is connected or not
break;
@ -999,13 +999,13 @@ odm_DynamicPrimaryCCA(
PSTA_INFO_T pstat;
for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
{
pstat = pDM_Odm->pODM_StaInfo[i];
if(IS_STA_VALID(pstat) )
if (IS_STA_VALID(pstat) )
{
Client_tmp = pstat->tx_bw;
if(Client_tmp>Client_40MHz)
if (Client_tmp>Client_40MHz)
Client_40MHz = Client_tmp; // 40M/20M coexist => 40M priority is High
bConnected = TRUE;
@ -1015,24 +1015,24 @@ odm_DynamicPrimaryCCA(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("bConnected=%d\n", bConnected));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Is Client 40MHz=%d\n", Client_40MHz));
//1 Monitor whether the interference exists or not
if(PrimaryCCA->Monitor_flag == 1)
if (PrimaryCCA->Monitor_flag == 1)
{
if(SecCHOffset == 1) // secondary channel is below the primary channel
if (SecCHOffset == 1) // secondary channel is below the primary channel
{
if((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_LSC > FalseAlmCnt->Cnt_BW_USC+500))
if ((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_LSC > FalseAlmCnt->Cnt_BW_USC+500))
{
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
{
PrimaryCCA->intf_type = 1;
PrimaryCCA->PriCCA_flag = 1;
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2); // USC MF
if(PrimaryCCA->DupRTS_flag == 1)
if (PrimaryCCA->DupRTS_flag == 1)
PrimaryCCA->DupRTS_flag = 0;
}
else
{
PrimaryCCA->intf_type = 2;
if(PrimaryCCA->DupRTS_flag == 0)
if (PrimaryCCA->DupRTS_flag == 0)
PrimaryCCA->DupRTS_flag = 1;
}
@ -1044,22 +1044,22 @@ odm_DynamicPrimaryCCA(
PrimaryCCA->intf_type = 0;
}
}
else if(SecCHOffset == 2) // secondary channel is above the primary channel
else if (SecCHOffset == 2) // secondary channel is above the primary channel
{
if((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_USC > FalseAlmCnt->Cnt_BW_LSC+500))
if ((FalseAlmCnt->Cnt_OFDM_CCA > 500)&&(FalseAlmCnt->Cnt_BW_USC > FalseAlmCnt->Cnt_BW_LSC+500))
{
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
{
PrimaryCCA->intf_type = 1;
PrimaryCCA->PriCCA_flag = 1;
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1); // LSC MF
if(PrimaryCCA->DupRTS_flag == 1)
if (PrimaryCCA->DupRTS_flag == 1)
PrimaryCCA->DupRTS_flag = 0;
}
else
{
PrimaryCCA->intf_type = 2;
if(PrimaryCCA->DupRTS_flag == 0)
if (PrimaryCCA->DupRTS_flag == 0)
PrimaryCCA->DupRTS_flag = 1;
}
@ -1077,29 +1077,29 @@ odm_DynamicPrimaryCCA(
}
//1 Dynamic Primary CCA Main Function
if(PrimaryCCA->Monitor_flag == 0)
if (PrimaryCCA->Monitor_flag == 0)
{
if(Is40MHz) // if RFBW==40M mode which require to process primary cca
if (Is40MHz) // if RFBW==40M mode which require to process primary cca
{
//2 STA is NOT Connected
if(!bConnected)
if (!bConnected)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA NOT Connected!!!!\n"));
if(PrimaryCCA->PriCCA_flag == 1) // reset primary cca when STA is disconnected
if (PrimaryCCA->PriCCA_flag == 1) // reset primary cca when STA is disconnected
{
PrimaryCCA->PriCCA_flag = 0;
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 0);
}
if(PrimaryCCA->DupRTS_flag == 1) // reset Duplicate RTS when STA is disconnected
if (PrimaryCCA->DupRTS_flag == 1) // reset Duplicate RTS when STA is disconnected
PrimaryCCA->DupRTS_flag = 0;
if(SecCHOffset == 1) // secondary channel is below the primary channel
if (SecCHOffset == 1) // secondary channel is below the primary channel
{
if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9))
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9))
{
PrimaryCCA->intf_flag = 1; // secondary channel interference is detected!!!
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; // interference is shift
else
PrimaryCCA->intf_type = 2; // interference is in-band
@ -1110,12 +1110,12 @@ odm_DynamicPrimaryCCA(
PrimaryCCA->intf_type = 0;
}
}
else if(SecCHOffset == 2) // secondary channel is above the primary channel
else if (SecCHOffset == 2) // secondary channel is above the primary channel
{
if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9))
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9))
{
PrimaryCCA->intf_flag = 1; // secondary channel interference is detected!!!
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; // interference is shift
else
PrimaryCCA->intf_type = 2; // interference is in-band
@ -1132,60 +1132,60 @@ odm_DynamicPrimaryCCA(
//2 STA is Connected
else
{
if(Client_40MHz == 0) //3 // client BW = 20MHz
if (Client_40MHz == 0) //3 // client BW = 20MHz
{
if(PrimaryCCA->PriCCA_flag == 0)
if (PrimaryCCA->PriCCA_flag == 0)
{
PrimaryCCA->PriCCA_flag = 1;
if(SecCHOffset==1)
if (SecCHOffset==1)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2);
else if(SecCHOffset==2)
else if (SecCHOffset==2)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1);
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("STA Connected 20M!!! PrimaryCCA=%d\n", PrimaryCCA->PriCCA_flag));
}
else //3 // client BW = 40MHz
{
if(PrimaryCCA->intf_flag == 1) // interference is detected!!
if (PrimaryCCA->intf_flag == 1) // interference is detected!!
{
if(PrimaryCCA->intf_type == 1)
if (PrimaryCCA->intf_type == 1)
{
if(PrimaryCCA->PriCCA_flag!=1)
if (PrimaryCCA->PriCCA_flag!=1)
{
PrimaryCCA->PriCCA_flag = 1;
if(SecCHOffset==1)
if (SecCHOffset==1)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 2);
else if(SecCHOffset==2)
else if (SecCHOffset==2)
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 1);
}
}
else if(PrimaryCCA->intf_type == 2)
else if (PrimaryCCA->intf_type == 2)
{
if(PrimaryCCA->DupRTS_flag!=1)
if (PrimaryCCA->DupRTS_flag!=1)
PrimaryCCA->DupRTS_flag = 1;
}
}
else // if intf_flag==0
{
if((curTxOkCnt+curRxOkCnt)<10000) //idle mode or TP traffic is very low
if ((curTxOkCnt+curRxOkCnt)<10000) //idle mode or TP traffic is very low
{
if(SecCHOffset == 1)
if (SecCHOffset == 1)
{
if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9))
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_LSC*5 > FalseAlmCnt->Cnt_BW_USC*9))
{
PrimaryCCA->intf_flag = 1;
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; // interference is shift
else
PrimaryCCA->intf_type = 2; // interference is in-band
}
}
else if(SecCHOffset == 2)
else if (SecCHOffset == 2)
{
if((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9))
if ((FalseAlmCnt->Cnt_OFDM_CCA > 800)&&(FalseAlmCnt->Cnt_BW_USC*5 > FalseAlmCnt->Cnt_BW_LSC*9))
{
PrimaryCCA->intf_flag = 1;
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; // interference is shift
else
PrimaryCCA->intf_type = 2; // interference is in-band
@ -1195,14 +1195,14 @@ odm_DynamicPrimaryCCA(
}
else // TP Traffic is High
{
if(SecCHOffset == 1)
if (SecCHOffset == 1)
{
if(FalseAlmCnt->Cnt_BW_LSC > (FalseAlmCnt->Cnt_BW_USC+500))
if (FalseAlmCnt->Cnt_BW_LSC > (FalseAlmCnt->Cnt_BW_USC+500))
{
if(Delay == 0) // add delay to avoid interference occurring abruptly, jump one time
if (Delay == 0) // add delay to avoid interference occurring abruptly, jump one time
{
PrimaryCCA->intf_flag = 1;
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; // interference is shift
else
PrimaryCCA->intf_type = 2; // interference is in-band
@ -1212,14 +1212,14 @@ odm_DynamicPrimaryCCA(
Delay = 0;
}
}
else if(SecCHOffset == 2)
else if (SecCHOffset == 2)
{
if(FalseAlmCnt->Cnt_BW_USC > (FalseAlmCnt->Cnt_BW_LSC+500))
if (FalseAlmCnt->Cnt_BW_USC > (FalseAlmCnt->Cnt_BW_LSC+500))
{
if(Delay == 0) // add delay to avoid interference occurring abruptly
if (Delay == 0) // add delay to avoid interference occurring abruptly
{
PrimaryCCA->intf_flag = 1;
if(FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
if (FalseAlmCnt->Cnt_Ofdm_fail > FalseAlmCnt->Cnt_OFDM_CCA>>1)
PrimaryCCA->intf_type = 1; // interference is shift
else
PrimaryCCA->intf_type = 2; // interference is in-band
@ -1239,19 +1239,19 @@ odm_DynamicPrimaryCCA(
}
}
//1 Dynamic Primary CCA Monitor Counter
if((PrimaryCCA->PriCCA_flag == 1)||(PrimaryCCA->DupRTS_flag == 1))
if ((PrimaryCCA->PriCCA_flag == 1)||(PrimaryCCA->DupRTS_flag == 1))
{
if(Client_40MHz == 0) // client=20M no need to monitor primary cca flag
if (Client_40MHz == 0) // client=20M no need to monitor primary cca flag
{
Client_40MHz_pre = Client_40MHz;
return;
}
Counter++;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("Counter=%d\n", Counter));
if((Counter == 30)||((Client_40MHz -Client_40MHz_pre)==1)) // Every 60 sec to monitor one time
if ((Counter == 30)||((Client_40MHz -Client_40MHz_pre)==1)) // Every 60 sec to monitor one time
{
PrimaryCCA->Monitor_flag = 1; // monitor flag is triggered!!!!!
if(PrimaryCCA->PriCCA_flag == 1)
if (PrimaryCCA->PriCCA_flag == 1)
{
PrimaryCCA->PriCCA_flag = 0;
ODM_SetBBReg(pDM_Odm, 0xc6c, BIT8|BIT7, 0);

2
hal/odm_RegConfig8188E.c
View file

@ -31,7 +31,7 @@ odm_ConfigRFReg_8188E(
IN u4Byte RegAddr
)
{
if(Addr == 0xffe)
if (Addr == 0xffe)
{
#ifdef CONFIG_LONG_DELAY_ISSUE
ODM_sleep_ms(50);

2
hal/odm_debug.c
View file

@ -498,7 +498,7 @@ extern void DBG_PrintAllComp(void)
*---------------------------------------------------------------------------*/
extern void DBG_PrintFlagEvent(u1Byte DbgFlag)
{
switch(DbgFlag)
switch (DbgFlag)
{
case FQoS:
ODM_RT_TRACE(pDM_Odm,COMP_CMD, DBG_LOUD, ("BIT 0 QoS_INIT\n"));

186
hal/odm_interface.c
View file

@ -33,13 +33,13 @@ ODM_Read1Byte(
IN u4Byte RegAddr
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
return RTL_R8(RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
return rtw_read8(Adapter,RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
return PlatformEFIORead1Byte(Adapter, RegAddr);
#endif
@ -53,13 +53,13 @@ ODM_Read2Byte(
IN u4Byte RegAddr
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
return RTL_R16(RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
return rtw_read16(Adapter,RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
return PlatformEFIORead2Byte(Adapter, RegAddr);
#endif
@ -73,13 +73,13 @@ ODM_Read4Byte(
IN u4Byte RegAddr
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
return RTL_R32(RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
return rtw_read32(Adapter,RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
return PlatformEFIORead4Byte(Adapter, RegAddr);
#endif
@ -94,13 +94,13 @@ ODM_Write1Byte(
IN u1Byte Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
RTL_W8(RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_write8(Adapter,RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformEFIOWrite1Byte(Adapter, RegAddr, Data);
#endif
@ -115,13 +115,13 @@ ODM_Write2Byte(
IN u2Byte Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
RTL_W16(RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_write16(Adapter,RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformEFIOWrite2Byte(Adapter, RegAddr, Data);
#endif
@ -136,13 +136,13 @@ ODM_Write4Byte(
IN u4Byte Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
RTL_W32(RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_write32(Adapter,RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformEFIOWrite4Byte(Adapter, RegAddr, Data);
#endif
@ -158,9 +158,9 @@ ODM_SetMACReg(
IN u4Byte Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
PADAPTER Adapter = pDM_Odm->Adapter;
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
#endif
@ -174,9 +174,9 @@ ODM_GetMACReg(
IN u4Byte BitMask
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
PADAPTER Adapter = pDM_Odm->Adapter;
return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
#endif
@ -191,9 +191,9 @@ ODM_SetBBReg(
IN u4Byte Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
PADAPTER Adapter = pDM_Odm->Adapter;
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
#endif
@ -207,9 +207,9 @@ ODM_GetBBReg(
IN u4Byte BitMask
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
PADAPTER Adapter = pDM_Odm->Adapter;
return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
#endif
@ -225,9 +225,9 @@ ODM_SetRFReg(
IN u4Byte Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
PHY_SetRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, Data);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
PADAPTER Adapter = pDM_Odm->Adapter;
PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data);
#endif
@ -242,9 +242,9 @@ ODM_GetRFReg(
IN u4Byte BitMask
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return PHY_QueryRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, 1);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_MP))
PADAPTER Adapter = pDM_Odm->Adapter;
return PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask);
#endif
@ -263,11 +263,11 @@ ODM_AllocateMemory(
IN u4Byte length
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
*pPtr = kmalloc(length, GFP_ATOMIC);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
*pPtr = rtw_zvmalloc(length);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformAllocateMemory(Adapter, pPtr, length);
#endif
@ -281,11 +281,11 @@ ODM_FreeMemory(
IN u4Byte length
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
kfree(pPtr);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
rtw_vmfree(pPtr, length);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
//PADAPTER Adapter = pDM_Odm->Adapter;
PlatformFreeMemory(pPtr, length);
#endif
@ -297,11 +297,11 @@ s4Byte ODM_CompareMemory(
IN u4Byte length
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return memcmp(pBuf1,pBuf2,length);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
return _rtw_memcmp(pBuf1,pBuf2,length);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
return PlatformCompareMemory(pBuf1,pBuf2,length);
#endif
}
@ -317,11 +317,11 @@ ODM_AcquireSpinLock(
IN RT_SPINLOCK_TYPE type
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformAcquireSpinLock(Adapter, type);
#endif
@ -332,11 +332,11 @@ ODM_ReleaseSpinLock(
IN RT_SPINLOCK_TYPE type
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformReleaseSpinLock(Adapter, type);
#endif
@ -354,11 +354,11 @@ ODM_InitializeWorkItem(
IN const char* szID
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformInitializeWorkItem(Adapter, pRtWorkItem, RtWorkItemCallback, pContext, szID);
#endif
@ -370,11 +370,11 @@ ODM_StartWorkItem(
IN PRT_WORK_ITEM pRtWorkItem
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PlatformStartWorkItem(pRtWorkItem);
#endif
}
@ -385,11 +385,11 @@ ODM_StopWorkItem(
IN PRT_WORK_ITEM pRtWorkItem
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PlatformStopWorkItem(pRtWorkItem);
#endif
}
@ -400,11 +400,11 @@ ODM_FreeWorkItem(
IN PRT_WORK_ITEM pRtWorkItem
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PlatformFreeWorkItem(pRtWorkItem);
#endif
}
@ -415,11 +415,11 @@ ODM_ScheduleWorkItem(
IN PRT_WORK_ITEM pRtWorkItem
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PlatformScheduleWorkItem(pRtWorkItem);
#endif
}
@ -430,11 +430,11 @@ ODM_IsWorkItemScheduled(
IN PRT_WORK_ITEM pRtWorkItem
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PlatformIsWorkItemScheduled(pRtWorkItem);
#endif
}
@ -449,11 +449,11 @@ ODM_StallExecution(
IN u4Byte usDelay
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_udelay_os(usDelay);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PlatformStallExecution(usDelay);
#endif
}
@ -461,11 +461,11 @@ ODM_StallExecution(
VOID
ODM_delay_ms(IN u4Byte ms)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
delay_ms(ms);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_mdelay_os(ms);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
delay_ms(ms);
#endif
}
@ -473,11 +473,11 @@ ODM_delay_ms(IN u4Byte ms)
VOID
ODM_delay_us(IN u4Byte us)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
delay_us(us);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_udelay_os(us);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PlatformStallExecution(us);
#endif
}
@ -485,22 +485,22 @@ ODM_delay_us(IN u4Byte us)
VOID
ODM_sleep_ms(IN u4Byte ms)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_msleep_os(ms);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
#endif
}
VOID
ODM_sleep_us(IN u4Byte us)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_usleep_os(us);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
#endif
}
@ -511,11 +511,11 @@ ODM_SetTimer(
IN u4Byte msDelay
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
mod_timer(pTimer, jiffies + (msDelay+9)/10);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
_set_timer(pTimer,msDelay ); //ms
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformSetTimer(Adapter, pTimer, msDelay);
#endif
@ -531,14 +531,14 @@ ODM_InitializeTimer(
IN const char* szID
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
pTimer->function = CallBackFunc;
pTimer->data = (unsigned long)pDM_Odm;
init_timer(pTimer);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
_init_timer(pTimer,Adapter->pnetdev,CallBackFunc,pDM_Odm);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformInitializeTimer(Adapter, pTimer, CallBackFunc,pContext,szID);
#endif
@ -551,11 +551,11 @@ ODM_CancelTimer(
IN PRT_TIMER pTimer
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
del_timer_sync(pTimer);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
_cancel_timer_ex(pTimer);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformCancelTimer(Adapter, pTimer);
#endif
@ -568,11 +568,11 @@ ODM_ReleaseTimer(
IN PRT_TIMER pTimer
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
@ -601,9 +601,9 @@ ODM_FillH2CCmd(
IN pu1Byte pCmdBuffer
)
{
if(IS_HARDWARE_TYPE_JAGUAR(Adapter))
if (IS_HARDWARE_TYPE_JAGUAR(Adapter))
{
switch(ElementID)
switch (ElementID)
{
case ODM_H2C_RSSI_REPORT:
FillH2CCmd8812(Adapter, H2C_8812_RSSI_REPORT, CmdLen, pCmdBuffer);
@ -612,9 +612,9 @@ ODM_FillH2CCmd(
}
}
else if(IS_HARDWARE_TYPE_8188E(Adapter))
else if (IS_HARDWARE_TYPE_8188E(Adapter))
{
switch(ElementID)
switch (ElementID)
{
case ODM_H2C_PSD_RESULT:
FillH2CCmd88E(Adapter, H2C_88E_PSD_RESULT, CmdLen, pCmdBuffer);
@ -624,7 +624,7 @@ ODM_FillH2CCmd(
}
else
{
switch(ElementID)
switch (ElementID)
{
case ODM_H2C_RSSI_REPORT:
FillH2CCmd92C(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer);
@ -647,11 +647,11 @@ ODM_FillH2CCmd(
IN pu1Byte CmdStartSeq
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
#elif (DM_ODM_SUPPORT_TYPE & ODM_MP)
//FillH2CCmd(pH2CBuffer, H2CBufferLen, CmdNum, pElementID, pCmdLen, pCmbBuffer, CmdStartSeq);
return FALSE;
#endif

98
hal/rtl8188e_cmd.c
View file

@ -50,13 +50,13 @@ static u8 _is_fw_read_cmd_down(_adapter* padapter, u8 msgbox_num)
do{
valid = rtw_read8(padapter,REG_HMETFR) & BIT(msgbox_num);
if(0 == valid ){
if (0 == valid ){
read_down = _TRUE;
}
#ifdef CONFIG_WOWLAN
rtw_msleep_os(2);
#endif
}while( (!read_down) && (retry_cnts--));
}while ( (!read_down) && (retry_cnts--));
return read_down;
@ -88,7 +88,7 @@ static s32 FillH2CCmd_88E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdB
_func_enter_;
if(padapter->bFWReady == _FALSE)
if (padapter->bFWReady == _FALSE)
{
DBG_8192C("FillH2CCmd_88E(): return H2C cmd because fw is not ready\n");
return ret;
@ -96,7 +96,7 @@ _func_enter_;
#ifdef CONFIG_CONCURRENT_MODE
if(padapter->adapter_type > PRIMARY_ADAPTER)
if (padapter->adapter_type > PRIMARY_ADAPTER)
{
padapter = padapter->pbuddy_adapter;
}
@ -120,14 +120,14 @@ _func_enter_;
do{
h2c_box_num = pHalData->LastHMEBoxNum;
if(!_is_fw_read_cmd_down(padapter, h2c_box_num)){
if (!_is_fw_read_cmd_down(padapter, h2c_box_num)){
DBG_8192C(" fw read cmd failed...\n");
goto exit;
}
*(u8*)(&h2c_cmd) = ElementID;
if(CmdLen<=3)
if (CmdLen<=3)
{
_rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer, CmdLen );
}
@ -139,7 +139,7 @@ _func_enter_;
//Write Ext command
msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num *RTL88E_EX_MESSAGE_BOX_SIZE);
#ifdef CONFIG_H2C_EF
for(cmd_idx=0;cmd_idx<ext_cmd_len;cmd_idx++ ){
for (cmd_idx=0;cmd_idx<ext_cmd_len;cmd_idx++ ){
rtw_write8(padapter,msgbox_ex_addr+cmd_idx,*((u8*)(&h2c_cmd_ex)+cmd_idx));
}
#else
@ -150,7 +150,7 @@ _func_enter_;
// Write command
msgbox_addr =REG_HMEBOX_0 + (h2c_box_num *RTL88E_MESSAGE_BOX_SIZE);
#ifdef CONFIG_H2C_EF
for(cmd_idx=0;cmd_idx<RTL88E_MESSAGE_BOX_SIZE;cmd_idx++ ){
for (cmd_idx=0;cmd_idx<RTL88E_MESSAGE_BOX_SIZE;cmd_idx++ ){
rtw_write8(padapter,msgbox_addr+cmd_idx,*((u8*)(&h2c_cmd)+cmd_idx));
}
#else
@ -165,7 +165,7 @@ _func_enter_;
pHalData->LastHMEBoxNum = (h2c_box_num+1) % RTL88E_MAX_H2C_BOX_NUMS;
}while((!bcmd_down) && (retry_cnts--));
}while ((!bcmd_down) && (retry_cnts--));
ret = _SUCCESS;
@ -186,7 +186,7 @@ u8 rtl8192c_h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf)
u8 *pCmdBuffer;
struct cmd_msg_parm *pcmdmsg;
if(!pbuf)
if (!pbuf)
return H2C_PARAMETERS_ERROR;
pcmdmsg = (struct cmd_msg_parm*)pbuf;
@ -218,7 +218,7 @@ u8 rtl8188e_set_rssi_cmd(_adapter*padapter, u8 *param)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
_func_enter_;
if(pHalData->fw_ractrl == _TRUE){
if (pHalData->fw_ractrl == _TRUE){
#if 0
*((u32*) param ) = cpu_to_le32( *((u32*) param ) );
@ -240,7 +240,7 @@ u8 rtl8188e_set_raid_cmd(_adapter*padapter, u32 mask)
u8 res=_SUCCESS;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
_func_enter_;
if(pHalData->fw_ractrl == _TRUE){
if (pHalData->fw_ractrl == _TRUE){
_rtw_memset(buf, 0, 3);
mask = cpu_to_le32( mask );
_rtw_memcpy(buf, &mask, 3);
@ -269,7 +269,7 @@ void rtl8188e_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 rssi_level)
u8 macid, init_rate, raid, shortGIrate=_FALSE;
#ifdef CONFIG_CONCURRENT_MODE
if(rtw_buddy_adapter_up(pAdapter) && pAdapter->adapter_type > PRIMARY_ADAPTER)
if (rtw_buddy_adapter_up(pAdapter) && pAdapter->adapter_type > PRIMARY_ADAPTER)
pHalData = GET_HAL_DATA(pAdapter->pbuddy_adapter);
#endif //CONFIG_CONCURRENT_MODE
@ -279,7 +279,7 @@ void rtl8188e_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 rssi_level)
raid = (bitmap>>28) & 0x0f;
bitmap &=0x0fffffff;
if(rssi_level != DM_RATR_STA_INIT)
if (rssi_level != DM_RATR_STA_INIT)
bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv, macid, bitmap, rssi_level);
bitmap |= ((raid<<28)&0xf0000000);
@ -304,7 +304,7 @@ void rtl8188e_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 rssi_level)
__FUNCTION__,macid ,raid ,bitmap, shortGIrate);
#if(RATE_ADAPTIVE_SUPPORT == 1)
#if (RATE_ADAPTIVE_SUPPORT == 1)
ODM_RA_UpdateRateInfo_8188E(
&(pHalData->odmpriv),
macid,
@ -326,7 +326,7 @@ _func_enter_;
DBG_871X("%s: Mode=%d SmartPS=%d UAPSD=%d\n", __FUNCTION__,
Mode, pwrpriv->smart_ps, padapter->registrypriv.uapsd_enable);
switch(Mode)
switch (Mode)
{
case PS_MODE_ACTIVE:
H2CSetPwrMode.Mode = 0;
@ -358,7 +358,7 @@ _func_enter_;
H2CSetPwrMode.bAllQueueUAPSD = padapter->registrypriv.uapsd_enable;
if(Mode > 0)
if (Mode > 0)
{
H2CSetPwrMode.PwrState = 0x00;// AllON(0x0C), RFON(0x04), RFOFF(0x00)
#ifdef CONFIG_EXT_CLK
@ -430,7 +430,7 @@ void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength)
pframe += 2;
pktlen += 2;
if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
if ( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
{
//DBG_871X("ie len=%d\n", cur_network->IELength);
pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs);
@ -451,7 +451,7 @@ void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength)
// DS parameter set
pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen);
if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)
if ( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)
{
u32 ATIMWindow;
// IBSS Parameter Set...
@ -547,7 +547,7 @@ void ConstructNullFunctionData(
SetPwrMgt(fctrl);
}
switch(cur_network->network.InfrastructureMode)
switch (cur_network->network.InfrastructureMode)
{
case Ndis802_11Infrastructure:
SetToDs(fctrl);
@ -620,7 +620,7 @@ void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr
pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
pframe += pktlen;
if(cur_network->IELength>MAX_IE_SZ)
if (cur_network->IELength>MAX_IE_SZ)
return;
_rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength);
@ -640,7 +640,7 @@ CheckFwRsvdPageContent(
HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter);
u32 MaxBcnPageNum;
if(pHalData->FwRsvdPageStartOffset != 0)
if (pHalData->FwRsvdPageStartOffset != 0)
{
/*MaxBcnPageNum = PageNum_128(pMgntInfo->MaxBeaconSize);
RT_ASSERT((MaxBcnPageNum <= pHalData->FwRsvdPageStartOffset),
@ -813,7 +813,7 @@ _func_enter_;
DBG_871X("%s mstatus(%x)\n", __FUNCTION__,mstatus);
if(mstatus == 1)
if (mstatus == 1)
{
// We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C.
// Suggested by filen. Added by tynli.
@ -836,7 +836,7 @@ _func_enter_;
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3)));
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4));
if(pHalData->RegFwHwTxQCtrl&BIT6)
if (pHalData->RegFwHwTxQCtrl&BIT6)
{
DBG_871X("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n");
bSendBeacon = _TRUE;
@ -862,15 +862,15 @@ _func_enter_;
// check rsvd page download OK.
rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid));
poll++;
} while(!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
} while (!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
}while(!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
}while (!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
//RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage88ES(): 1 Download RSVD page failed!\n"));
if(padapter->bSurpriseRemoved || padapter->bDriverStopped)
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
{
}
else if(!bcn_valid)
else if (!bcn_valid)
DBG_871X("%s: 1 Download RSVD page failed! DLBcnCount:%u, poll:%u\n", __FUNCTION__ ,DLBcnCount, poll);
else
DBG_871X("%s: 1 Download RSVD success! DLBcnCount:%u, poll:%u\n", __FUNCTION__, DLBcnCount, poll);
@ -880,10 +880,10 @@ _func_enter_;
// At run time, we cannot get the Tx Desc until it is released in TxHandleInterrupt() so we will return
// the beacon TCB in the following code. 2011.11.23. by tynli.
//
//if(bcn_valid && padapter->bEnterPnpSleep)
if(0)
//if (bcn_valid && padapter->bEnterPnpSleep)
if (0)
{
if(bSendBeacon)
if (bSendBeacon)
{
rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
DLBcnCount = 0;
@ -900,14 +900,14 @@ _func_enter_;
// check rsvd page download OK.
rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid));
poll++;
} while(!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
}while(!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
} while (!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
}while (!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
//RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage(): 2 Download RSVD page failed!\n"));
if(padapter->bSurpriseRemoved || padapter->bDriverStopped)
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
{
}
else if(!bcn_valid)
else if (!bcn_valid)
DBG_871X("%s: 2 Download RSVD page failed! DLBcnCount:%u, poll:%u\n", __FUNCTION__ ,DLBcnCount, poll);
else
DBG_871X("%s: 2 Download RSVD success! DLBcnCount:%u, poll:%u\n", __FUNCTION__, DLBcnCount, poll);
@ -925,7 +925,7 @@ _func_enter_;
// prevent from setting 0x422[6] to 0 after download reserved page, or it will cause
// the beacon cannot be sent by HW.
// 2010.06.23. Added by tynli.
if(bSendBeacon)
if (bSendBeacon)
{
rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6));
pHalData->RegFwHwTxQCtrl |= BIT6;
@ -934,7 +934,7 @@ _func_enter_;
//
// Update RSVD page location H2C to Fw.
//
if(bcn_valid)
if (bcn_valid)
{
rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
DBG_871X("Set RSVD page location to Fw.\n");
@ -942,7 +942,7 @@ _func_enter_;
}
// Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.
//if(!padapter->bEnterPnpSleep)
//if (!padapter->bEnterPnpSleep)
{
// Clear CR[8] or beacon packet will not be send to TxBuf anymore.
pHalData->RegCR_1 &= (~BIT0);
@ -974,7 +974,7 @@ void rtl8188e_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state)
_func_enter_;
#if 1
switch(p2p_ps_state)
switch (p2p_ps_state)
{
case P2P_PS_DISABLE:
DBG_8192C("P2P_PS_DISABLE \n");
@ -983,18 +983,18 @@ _func_enter_;
case P2P_PS_ENABLE:
DBG_8192C("P2P_PS_ENABLE \n");
// update CTWindow value.
if( pwdinfo->ctwindow > 0 )
if ( pwdinfo->ctwindow > 0 )
{
p2p_ps_offload->CTWindow_En = 1;
rtw_write8(padapter, REG_P2P_CTWIN, pwdinfo->ctwindow);
}
// hw only support 2 set of NoA
for( i=0 ; i<pwdinfo->noa_num ; i++)
for ( i=0 ; i<pwdinfo->noa_num ; i++)
{
// To control the register setting for which NOA
rtw_write8(padapter, REG_NOA_DESC_SEL, (i << 4));
if(i == 0)
if (i == 0)
p2p_ps_offload->NoA0_En = 1;
else
p2p_ps_offload->NoA1_En = 1;
@ -1013,14 +1013,14 @@ _func_enter_;
rtw_write8(padapter, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]);
}
if( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) )
if ( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) )
{
// rst p2p circuit
rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4));
p2p_ps_offload->Offload_En = 1;
if(pwdinfo->role == P2P_ROLE_GO)
if (pwdinfo->role == P2P_ROLE_GO)
{
p2p_ps_offload->role= 1;
p2p_ps_offload->AllStaSleep = 0;
@ -1121,26 +1121,26 @@ _func_enter_;
pwowlan_parm.second_mode =0;
pwowlan_parm.reserve=0;
if(enable){
if (enable){
pwowlan_parm.mode |=FW_WOWLAN_FUN_EN;
pwrpriv->wowlan_magic =_TRUE;
pwrpriv->wowlan_unicast =_TRUE;
if(pwrpriv->wowlan_pattern ==_TRUE){
if (pwrpriv->wowlan_pattern ==_TRUE){
pwowlan_parm.mode |= FW_WOWLAN_PATTERN_MATCH;
DBG_871X_LEVEL(_drv_info_, "%s 2.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode );
}
if(pwrpriv->wowlan_magic ==_TRUE){
if (pwrpriv->wowlan_magic ==_TRUE){
pwowlan_parm.mode |=FW_WOWLAN_MAGIC_PKT;
DBG_871X_LEVEL(_drv_info_, "%s 3.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode );
}
if(pwrpriv->wowlan_unicast ==_TRUE){
if (pwrpriv->wowlan_unicast ==_TRUE){
pwowlan_parm.mode |=FW_WOWLAN_UNICAST;
DBG_871X_LEVEL(_drv_info_, "%s 4.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode );
}
if(!(padapter->pwrctrlpriv.wowlan_wake_reason & FWDecisionDisconnect))
if (!(padapter->pwrctrlpriv.wowlan_wake_reason & FWDecisionDisconnect))
rtl8188e_set_FwJoinBssReport_cmd(padapter, 1);
else
DBG_871X_LEVEL(_drv_always_, "%s, disconnected, no FwJoinBssReport\n",__FUNCTION__);

68
hal/rtl8188e_dm.c
View file

@ -50,12 +50,12 @@ dm_CheckProtection(
PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
u1Byte CurRate, RateThreshold;
if(pMgntInfo->pHTInfo->bCurBW40MHz)
if (pMgntInfo->pHTInfo->bCurBW40MHz)
RateThreshold = MGN_MCS1;
else
RateThreshold = MGN_MCS3;
if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold)
if (Adapter->TxStats.CurrentInitTxRate <= RateThreshold)
{
pMgntInfo->bDmDisableProtect = TRUE;
DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
@ -74,7 +74,7 @@ dm_CheckStatistics(
)
{
#if 0
if(!Adapter->MgntInfo.bMediaConnect)
if (!Adapter->MgntInfo.bMediaConnect)
return;
//2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly.
@ -94,7 +94,7 @@ static void dm_CheckPbcGPIO(_adapter *padapter)
u8 tmp1byte;
u8 bPbcPressed = _FALSE;
if(!padapter->registrypriv.hw_wps_pbc)
if (!padapter->registrypriv.hw_wps_pbc)
return;
#ifdef CONFIG_USB_HCI
@ -125,13 +125,13 @@ static void dm_CheckPbcGPIO(_adapter *padapter)
if (tmp1byte == 0xff || padapter->init_adpt_in_progress)
return ;
if((tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)==0)
if ((tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)==0)
{
bPbcPressed = _TRUE;
}
#endif
if( _TRUE == bPbcPressed)
if ( _TRUE == bPbcPressed)
{
// Here we only set bPbcPressed to true
// After trigger PBC, the variable will be set to false
@ -187,21 +187,21 @@ dm_InterruptMigration(
// <Roger_Notes> Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics
// when interrupt migration is set before. 2010.03.05.
//
if(!Adapter->registrypriv.wifi_spec &&
if (!Adapter->registrypriv.wifi_spec &&
(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) &&
pmlmepriv->LinkDetectInfo.bHigherBusyTraffic)
{
IntMtToSet = _TRUE;
// To check whether we should disable Tx interrupt or not.
if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic )
if (pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic )
ACIntToSet = _TRUE;
}
//Update current settings.
if( bCurrentIntMt != IntMtToSet ){
if ( bCurrentIntMt != IntMtToSet ){
DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet);
if(IntMtToSet)
if (IntMtToSet)
{
//
// <Roger_Notes> Set interrrupt migration timer and corresponging Tx/Rx counter.
@ -219,9 +219,9 @@ dm_InterruptMigration(
}
}
/*if( bCurrentACIntDisable != ACIntToSet ){
/*if ( bCurrentACIntDisable != ACIntToSet ){
DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet);
if(ACIntToSet) // Disable four ACs interrupts.
if (ACIntToSet) // Disable four ACs interrupts.
{
//
// <Roger_Notes> Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization.
@ -289,7 +289,7 @@ static void Init_ODM_ComInfo_88E(PADAPTER Adapter)
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PLATFORM,ODM_CE);
if(Adapter->interface_type == RTW_GSPI )
if (Adapter->interface_type == RTW_GSPI )
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,ODM_ITRF_SDIO);
else
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,Adapter->interface_type);//RTL871X_HCI_TYPE
@ -308,7 +308,7 @@ static void Init_ODM_ComInfo_88E(PADAPTER Adapter)
//#ifdef CONFIG_USB_HCI
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BOARD_TYPE,pHalData->BoardType);
if(pHalData->BoardType == BOARD_USB_High_PA){
if (pHalData->BoardType == BOARD_USB_High_PA){
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_LNA,_TRUE);
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_EXT_PA,_TRUE);
}
@ -318,13 +318,13 @@ static void Init_ODM_ComInfo_88E(PADAPTER Adapter)
ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BWIFI_TEST,Adapter->registrypriv.wifi_spec);
if(pHalData->rf_type == RF_1T1R){
if (pHalData->rf_type == RF_1T1R){
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T1R);
}
else if(pHalData->rf_type == RF_2T2R){
else if (pHalData->rf_type == RF_2T2R){
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_2T2R);
}
else if(pHalData->rf_type == RF_1T2R){
else if (pHalData->rf_type == RF_1T2R){
ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_RF_TYPE,ODM_1T2R);
}
@ -336,7 +336,7 @@ static void Init_ODM_ComInfo_88E(PADAPTER Adapter)
pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK //|
;
//if(pHalData->AntDivCfg)
//if (pHalData->AntDivCfg)
// pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV;
#endif
@ -369,7 +369,7 @@ static void Update_ODM_ComInfo_88E(PADAPTER Adapter)
ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK
;
if(pHalData->AntDivCfg)
if (pHalData->AntDivCfg)
pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV;
#if (MP_DRIVER==1)
@ -409,7 +409,7 @@ static void Update_ODM_ComInfo_88E(PADAPTER Adapter)
ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_POWER_SAVING,&(pwrctrlpriv->bpower_saving));
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType);
for(i=0; i< NUM_STA; i++)
for (i=0; i< NUM_STA; i++)
{
//pDM_Odm->pODM_StaInfo[i] = NULL;
ODM_CmnInfoPtrArrayHook(pDM_Odm, ODM_CMNINFO_STA_STATUS,i,NULL);
@ -486,11 +486,11 @@ rtl8188e_HalDmWatchDog(
#ifdef CONFIG_P2P_PS
// Fw is under p2p powersaving mode, driver should stop dynamic mechanism.
// modifed by thomas. 2011.06.11.
if(Adapter->wdinfo.p2p_ps_mode)
if (Adapter->wdinfo.p2p_ps_mode)
bFwPSAwake = _FALSE;
#endif //CONFIG_P2P_PS
if( (hw_init_completed == _TRUE)
if ( (hw_init_completed == _TRUE)
&& ((!bFwCurrentInPSMode) && bFwPSAwake))
{
//
@ -499,7 +499,7 @@ rtl8188e_HalDmWatchDog(
dm_CheckStatistics(Adapter);
#ifdef CONFIG_CONCURRENT_MODE
if(Adapter->adapter_type > PRIMARY_ADAPTER)
if (Adapter->adapter_type > PRIMARY_ADAPTER)
goto _record_initrate;
#endif
@ -513,7 +513,7 @@ rtl8188e_HalDmWatchDog(
// Tx Migration settings.
//dm_InterruptMigration(Adapter);
//if(Adapter->HalFunc.TxCheckStuckHandler(Adapter))
//if (Adapter->HalFunc.TxCheckStuckHandler(Adapter))
// PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem));
#endif
_record_initrate:
@ -530,19 +530,19 @@ rtl8188e_HalDmWatchDog(
pHalData->odmpriv.SupportAbility = 0;
#endif
if( (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ||
if ( (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE))
{
if(Adapter->stapriv.asoc_sta_count > 2)
if (Adapter->stapriv.asoc_sta_count > 2)
bLinked = _TRUE;
}
else{//Station mode
if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
if (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
bLinked = _TRUE;
}
#ifdef CONFIG_CONCURRENT_MODE
if(check_buddy_fw_link(Adapter))
if (check_buddy_fw_link(Adapter))
bLinked = _TRUE;
#endif //CONFIG_CONCURRENT_MODE
@ -556,7 +556,7 @@ skip_dm:
// Check GPIO to determine current RF on/off and Pbc status.
// Check Hardware Radio ON/OFF or not
#ifdef CONFIG_PCI_HCI
if(pHalData->bGpioHwWpsPbc)
if (pHalData->bGpioHwWpsPbc)
#endif
{
//temp removed
@ -602,12 +602,12 @@ void AntDivCompare8188E(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src
//PADAPTER Adapter = pDM_Odm->Adapter ;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
if(0 != pHalData->AntDivCfg )
if (0 != pHalData->AntDivCfg )
{
//DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi),
// src->Rssi,query_rx_pwr_percentage(src->Rssi));
//select optimum_antenna for before linked =>For antenna diversity
if(dst->Rssi >= src->Rssi )//keep org parameter
if (dst->Rssi >= src->Rssi )//keep org parameter
{
src->Rssi = dst->Rssi;
src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna;
@ -625,19 +625,19 @@ u8 AntDivBeforeLink8188E(PADAPTER Adapter )
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
// Condition that does not need to use antenna diversity.
if(pHalData->AntDivCfg==0)
if (pHalData->AntDivCfg==0)
{
//DBG_8192C("odm_AntDivBeforeLink8192C(): No AntDiv Mechanism.\n");
return _FALSE;
}
if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
{
return _FALSE;
}
if(pDM_SWAT_Table->SWAS_NoLink_State == 0){
if (pDM_SWAT_Table->SWAS_NoLink_State == 0){
//switch channel
pDM_SWAT_Table->SWAS_NoLink_State = 1;
pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A;

530
hal/rtl8188e_hal_init.c
View file

File diff suppressed because it is too large Load diff

22
hal/rtl8188e_mp.c
View file

@ -226,11 +226,11 @@ void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven)
if (!IS_92C_SERIAL(pHalData->VersionID))
return;
#if 0
while(PlatformAtomicExchange(&Adapter->IntrCCKRefCount, TRUE) == TRUE)
while (PlatformAtomicExchange(&Adapter->IntrCCKRefCount, TRUE) == TRUE)
{
PlatformSleepUs(100);
TimeOut--;
if(TimeOut <= 0)
if (TimeOut <= 0)
{
RTPRINT(FINIT, INIT_TxPower,
("!!!MPT_CCKTxPowerAdjustbyIndex Wait for check CCK gain index too long!!!\n" ));
@ -344,7 +344,7 @@ void Hal_SetChannel(PADAPTER pAdapter)
// set RF channel register
for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++)
{
if(IS_HARDWARE_TYPE_8192D(pAdapter))
if (IS_HARDWARE_TYPE_8192D(pAdapter))
_write_rfreg(pAdapter, (RF_RADIO_PATH_E)eRFPath, ODM_CHANNEL, 0xFF, channel);
else
_write_rfreg(pAdapter, eRFPath, ODM_CHANNEL, 0x3FF, channel);
@ -692,7 +692,7 @@ void Hal_SetAntenna(PADAPTER pAdapter)
if (chgTx && chgRx)
{
switch(pHalData->rf_chip)
switch (pHalData->rf_chip)
{
case RF_8225:
case RF_8256:
@ -783,7 +783,7 @@ void Hal_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart)
{
RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test start\n"));
// 1. if OFDM block on?
if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on
{
@ -938,11 +938,11 @@ void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart)
if (bStart) // Start Carrier Suppression.
{
RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test start\n"));
//if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B)
//if (pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B)
if (pAdapter->mppriv.rateidx <= MPT_RATE_11M)
{
// 1. if CCK block on?
if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn))
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on
//Turn Off All Test Mode
@ -966,7 +966,7 @@ void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart)
else// Stop Carrier Suppression.
{
RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test stop\n"));
//if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B)
//if (pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B)
if (pAdapter->mppriv.rateidx <= MPT_RATE_11M ) {
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); //normal mode
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); //turn on scramble setting
@ -994,7 +994,7 @@ void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart)
("SetCCKContinuousTx: test start\n"));
// 1. if CCK block on?
if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn))
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on
//Turn Off All Test Mode
@ -1003,7 +1003,7 @@ void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart)
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
//Set CCK Tx Test Rate
#if 0
switch(pAdapter->mppriv.rateidx)
switch (pAdapter->mppriv.rateidx)
{
case 2:
cckrate = 0;
@ -1067,7 +1067,7 @@ void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart)
if (bStart) {
RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test start\n"));
// 1. if OFDM block on?
if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on
{

338
hal/rtl8188e_phycfg.c
View file

File diff suppressed because it is too large Load diff

142
hal/rtl8188e_rf6052.c
View file

@ -165,7 +165,7 @@ rtl8188e_PHY_RF6052SetBandwidth(
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
switch(Bandwidth)
switch (Bandwidth)
{
case HT_CHANNEL_WIDTH_20:
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10) | BIT(11));
@ -221,16 +221,16 @@ rtl8188e_PHY_RF6052SetCckTxPower(
TurboScanOff = _TRUE;
if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS)
if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS)
{
TxAGC[RF_PATH_A] = 0x3f3f3f3f;
TxAGC[RF_PATH_B] = 0x3f3f3f3f;
TurboScanOff = _TRUE;//disable turbo scan
if(TurboScanOff)
if (TurboScanOff)
{
for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
for (idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
{
TxAGC[idx1] =
pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
@ -248,26 +248,26 @@ rtl8188e_PHY_RF6052SetCckTxPower(
// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism.
// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism.
// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder.
if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
{
TxAGC[RF_PATH_A] = 0x10101010;
TxAGC[RF_PATH_B] = 0x10101010;
}
else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
{
TxAGC[RF_PATH_A] = 0x00000000;
TxAGC[RF_PATH_B] = 0x00000000;
}
else
{
for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
for (idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
{
TxAGC[idx1] =
pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
}
if(pHalData->EEPROMRegulatory==0)
if (pHalData->EEPROMRegulatory==0)
{
tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) +
(pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8);
@ -280,12 +280,12 @@ rtl8188e_PHY_RF6052SetCckTxPower(
}
}
for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
for (idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
{
ptr = (u8*)(&(TxAGC[idx1]));
for(idx2=0; idx2<4; idx2++)
for (idx2=0; idx2<4; idx2++)
{
if(*ptr > RF6052_MAX_TX_PWR)
if (*ptr > RF6052_MAX_TX_PWR)
*ptr = RF6052_MAX_TX_PWR;
ptr++;
}
@ -341,7 +341,7 @@ static void getPowerBase(
u8 Legacy_pwrdiff=0, HT20_pwrdiff=0;
u8 i, powerlevel[2];
for(i=0; i<2; i++)
for (i=0; i<2; i++)
{
powerlevel[i] = pPowerLevel[i];
Legacy_pwrdiff = pHalData->TxPwrLegacyHtDiff[i][Channel-1];
@ -352,10 +352,10 @@ static void getPowerBase(
//RTPRINT(FPHY, PHY_TXPWR, (" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i)));
}
for(i=0; i<2; i++)
for (i=0; i<2; i++)
{
//Check HT20 to HT40 diff
if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
{
HT20_pwrdiff = pHalData->TxPwrHt20Diff[i][Channel-1];
powerlevel[i] += HT20_pwrdiff;
@ -387,7 +387,7 @@ void getPowerBase88E(
s8 HT20_pwrdiff=0;
u8 i, powerlevel[2];
for(i=0; i<2; i++)
for (i=0; i<2; i++)
{
powerBase0 = pPowerLevelOFDM[i];
@ -396,10 +396,10 @@ void getPowerBase88E(
//DBG_871X(" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i));
}
for(i=0; i<pHalData->NumTotalRFPath; i++)
for (i=0; i<pHalData->NumTotalRFPath; i++)
{
//Check HT20 to HT40 diff
if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
{
powerlevel[i] = pPowerLevelBW20[i];
}
@ -431,9 +431,9 @@ static void getTxPowerWriteValByRegulatory(
//
// Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate
//
for(rf=0; rf<2; rf++)
for (rf=0; rf<2; rf++)
{
switch(pHalData->EEPROMRegulatory)
switch (pHalData->EEPROMRegulatory)
{
case 0: // Realtek better performance
// increase power diff defined by Realtek for large power
@ -447,18 +447,18 @@ static void getTxPowerWriteValByRegulatory(
case 1: // Realtek regulatory
// increase power diff defined by Realtek for regulatory
{
if(pHalData->pwrGroupCnt == 1)
if (pHalData->pwrGroupCnt == 1)
chnlGroup = 0;
if(pHalData->pwrGroupCnt >= 3)
if (pHalData->pwrGroupCnt >= 3)
{
if(Channel <= 3)
if (Channel <= 3)
chnlGroup = 0;
else if(Channel >= 4 && Channel <= 9)
else if (Channel >= 4 && Channel <= 9)
chnlGroup = 1;
else if(Channel > 9)
else if (Channel > 9)
chnlGroup = 2;
if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
chnlGroup++;
else
chnlGroup+=4;
@ -496,12 +496,12 @@ static void getTxPowerWriteValByRegulatory(
pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8));
if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
{
if(pwr_diff_limit[i] > pHalData->PwrGroupHT40[rf][Channel-1])
if (pwr_diff_limit[i] > pHalData->PwrGroupHT40[rf][Channel-1])
pwr_diff_limit[i] = pHalData->PwrGroupHT40[rf][Channel-1];
}
else
{
if(pwr_diff_limit[i] > pHalData->PwrGroupHT20[rf][Channel-1])
if (pwr_diff_limit[i] > pHalData->PwrGroupHT20[rf][Channel-1])
pwr_diff_limit[i] = pHalData->PwrGroupHT20[rf][Channel-1];
}
}
@ -524,20 +524,20 @@ static void getTxPowerWriteValByRegulatory(
// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism.
// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder.
if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
writeVal = 0x14141414;
else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
writeVal = 0x00000000;
// 20100628 Joseph: High power mode for BT-Coexist mechanism.
// This mechanism is only applied when Driver-Highpower-Mechanism is OFF.
if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1)
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1)
{
//RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n"));
writeVal = writeVal - 0x06060606;
}
else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2)
else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2)
{
//RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n"));
writeVal = writeVal;
@ -567,13 +567,13 @@ void getTxPowerWriteValByRegulatory88E(
// Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate
//
#if 0 // (INTEL_PROXIMITY_SUPPORT == 1)
if(pMgntInfo->IntelProximityModeInfo.PowerOutput > 0)
if (pMgntInfo->IntelProximityModeInfo.PowerOutput > 0)
Regulatory = 2;
#endif
for(rf=0; rf<2; rf++)
for (rf=0; rf<2; rf++)
{
switch(Regulatory)
switch (Regulatory)
{
case 0: // Realtek better performance
// increase power diff defined by Realtek for large power
@ -587,33 +587,33 @@ void getTxPowerWriteValByRegulatory88E(
case 1: // Realtek regulatory
// increase power diff defined by Realtek for regulatory
{
if(pHalData->pwrGroupCnt == 1)
if (pHalData->pwrGroupCnt == 1)
chnlGroup = 0;
if(pHalData->pwrGroupCnt >= pHalData->PGMaxGroup)
if (pHalData->pwrGroupCnt >= pHalData->PGMaxGroup)
{
if (Channel < 3) // Chanel 1-2
chnlGroup = 0;
else if (Channel < 6) // Channel 3-5
chnlGroup = 1;
else if(Channel <9) // Channel 6-8
else if (Channel <9) // Channel 6-8
chnlGroup = 2;
else if(Channel <12) // Channel 9-11
else if (Channel <12) // Channel 9-11
chnlGroup = 3;
else if(Channel <14) // Channel 12-13
else if (Channel <14) // Channel 12-13
chnlGroup = 4;
else if(Channel ==14) // Channel 14
else if (Channel ==14) // Channel 14
chnlGroup = 5;
/*
if(Channel <= 3)
if (Channel <= 3)
chnlGroup = 0;
else if(Channel >= 4 && Channel <= 9)
else if (Channel >= 4 && Channel <= 9)
chnlGroup = 1;
else if(Channel > 9)
else if (Channel > 9)
chnlGroup = 2;
if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
chnlGroup++;
else
chnlGroup+=4;
@ -649,7 +649,7 @@ void getTxPowerWriteValByRegulatory88E(
((rf==0)?'A':'B'), pHalData->PwrGroupHT20[rf][Channel-1]));
}*/
if(index < 2)
if (index < 2)
pwr_diff = pHalData->TxPwrLegacyHtDiff[rf][Channel-1];
else if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
pwr_diff = pHalData->TxPwrHt20Diff[rf][Channel-1];
@ -663,7 +663,7 @@ void getTxPowerWriteValByRegulatory88E(
//RTPRINT(FPHY, PHY_TXPWR, ("customer pwr limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_pwr_limit));
if(pwr_diff >= customer_pwr_limit)
if (pwr_diff >= customer_pwr_limit)
pwr_diff = 0;
else
pwr_diff = customer_pwr_limit - pwr_diff;
@ -672,7 +672,7 @@ void getTxPowerWriteValByRegulatory88E(
{
pwr_diff_limit[i] = (u1Byte)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8));
if(pwr_diff_limit[i] > pwr_diff)
if (pwr_diff_limit[i] > pwr_diff)
pwr_diff_limit[i] = pwr_diff;
}
customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) |
@ -693,25 +693,25 @@ void getTxPowerWriteValByRegulatory88E(
// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism.
// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder.
//92d do not need this
if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
writeVal = 0x14141414;
else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
writeVal = 0x00000000;
// 20100628 Joseph: High power mode for BT-Coexist mechanism.
// This mechanism is only applied when Driver-Highpower-Mechanism is OFF.
if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1)
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1)
{
//RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n"));
writeVal = writeVal - 0x06060606;
}
else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2)
else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2)
{
//RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n"));
writeVal = writeVal ;
}
/*
if(pMgntInfo->bDisableTXPowerByRate)
if (pMgntInfo->bDisableTXPowerByRate)
{
// add for OID_RT_11N_TX_POWER_BY_RATE ,disable tx powre change by rate
writeVal = 0x2c2c2c2c;
@ -738,10 +738,10 @@ static void writeOFDMPowerReg88E(
u32 writeVal;
u16 RegOffset;
for(rf=0; rf<2; rf++)
for (rf=0; rf<2; rf++)
{
writeVal = pValue[rf];
for(i=0; i<4; i++)
for (i=0; i<4; i++)
{
pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
if (pwr_val[i] > RF6052_MAX_TX_PWR)
@ -749,7 +749,7 @@ static void writeOFDMPowerReg88E(
}
writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) |(pwr_val[1]<<8) |pwr_val[0];
if(rf == 0)
if (rf == 0)
RegOffset = RegOffset_A[index];
else
RegOffset = RegOffset_B[index];
@ -758,19 +758,19 @@ static void writeOFDMPowerReg88E(
//RTPRINT(FPHY, PHY_TXPWR, ("Set 0x%x = %08x\n", RegOffset, writeVal));
// 201005115 Joseph: Set Tx Power diff for Tx power training mechanism.
if(((pHalData->rf_type == RF_2T2R) &&
if (((pHalData->rf_type == RF_2T2R) &&
(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs15_Mcs12))||
((pHalData->rf_type != RF_2T2R) &&
(RegOffset == rTxAGC_A_Mcs07_Mcs04 || RegOffset == rTxAGC_B_Mcs07_Mcs04)) )
{
writeVal = pwr_val[3];
if(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_A_Mcs07_Mcs04)
if (RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_A_Mcs07_Mcs04)
RegOffset = 0xc90;
if(RegOffset == rTxAGC_B_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs07_Mcs04)
if (RegOffset == rTxAGC_B_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs07_Mcs04)
RegOffset = 0xc98;
for(i=0; i<3; i++)
for (i=0; i<3; i++)
{
if(i!=2)
if (i!=2)
writeVal = (writeVal>8)?(writeVal-8):0;
else
writeVal = (writeVal>6)?(writeVal-6):0;
@ -828,7 +828,7 @@ rtl8188e_PHY_RF6052SetOFDMTxPower(
//
ODM_TxPwrTrackAdjust88E(&pHalData->odmpriv, 0, &direction, &pwrtrac_value);
for(index=0; index<6; index++)
for (index=0; index<6; index++)
{
getTxPowerWriteValByRegulatory88E(Adapter, Channel, index,
&powerBase0[0], &powerBase1[0], &writeVal[0]);
@ -887,14 +887,14 @@ phy_RF6052_Config_ParaFile(
//3//-----------------------------------------------------------------
//3// <2> Initialize RF
//3//-----------------------------------------------------------------
//for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
//for (eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
for (eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
{
pPhyReg = &pHalData->PHYRegDef[eRFPath];
/*----Store original RFENV control type----*/
switch(eRFPath)
switch (eRFPath)
{
case RF_PATH_A:
case RF_PATH_C:
@ -922,12 +922,12 @@ phy_RF6052_Config_ParaFile(
rtw_udelay_os(1);//PlatformStallExecution(1);
/*----Initialize RF fom connfiguration file----*/
switch(eRFPath)
switch (eRFPath)
{
case RF_PATH_A:
#ifdef CONFIG_EMBEDDED_FWIMG
#ifdef CONFIG_PHY_SETTING_WITH_ODM
if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath))
if (HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath))
rtStatus= _FAIL;
#else
rtStatus= rtl8188e_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath);
@ -939,7 +939,7 @@ phy_RF6052_Config_ParaFile(
case RF_PATH_B:
#ifdef CONFIG_EMBEDDED_FWIMG
#ifdef CONFIG_PHY_SETTING_WITH_ODM
if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath))
if (HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath))
rtStatus= _FAIL;
#else
rtStatus = rtl8188e_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath);
@ -955,7 +955,7 @@ phy_RF6052_Config_ParaFile(
}
/*----Restore RFENV control type----*/;
switch(eRFPath)
switch (eRFPath)
{
case RF_PATH_A:
case RF_PATH_C:
@ -967,7 +967,7 @@ phy_RF6052_Config_ParaFile(
break;
}
if(rtStatus != _SUCCESS){
if (rtStatus != _SUCCESS){
//RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath));
goto phy_RF6052_Config_ParaFile_Fail;
}
@ -993,7 +993,7 @@ PHY_RF6052_Config8188E(
// Initialize general global value
//
// TODO: Extend RF_PATH_C and RF_PATH_D in the future
if(pHalData->rf_type == RF_1T1R)
if (pHalData->rf_type == RF_1T1R)
pHalData->NumTotalRFPath = 1;
else
pHalData->NumTotalRFPath = 2;
@ -1003,7 +1003,7 @@ PHY_RF6052_Config8188E(
//
rtStatus = phy_RF6052_Config_ParaFile(Adapter);
#if 0
switch( Adapter->MgntInfo.bRegHwParaFile )
switch ( Adapter->MgntInfo.bRegHwParaFile )
{
case 0:
phy_RF6052_Config_HardCode(Adapter);

34
hal/rtl8188e_rxdesc.c
View file

@ -46,11 +46,11 @@ static void process_rssi(_adapter *padapter,union recv_frame *prframe)
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
//DBG_8192C("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->RecvSignalPower,pattrib->signal_strength);
//if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon)
//if (pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon)
{
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
if(signal_stat->update_req) {
if (signal_stat->update_req) {
signal_stat->total_num = 0;
signal_stat->total_val = 0;
signal_stat->update_req = 0;
@ -62,7 +62,7 @@ static void process_rssi(_adapter *padapter,union recv_frame *prframe)
#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
//Adapter->RxStats.RssiCalculateCnt++; //For antenna Test
if(padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX)
if (padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX)
{
padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX;
last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index];
@ -71,13 +71,13 @@ static void process_rssi(_adapter *padapter,union recv_frame *prframe)
padapter->recvpriv.signal_strength_data.total_val +=pattrib->phy_info.SignalStrength;
padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->phy_info.SignalStrength;
if(padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX)
if (padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX)
padapter->recvpriv.signal_strength_data.index = 0;
tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num;
if(padapter->recvpriv.is_signal_dbg) {
if (padapter->recvpriv.is_signal_dbg) {
padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg;
padapter->recvpriv.rssi=(s8)translate2dbm((u8)padapter->recvpriv.signal_strength_dbg);
} else {
@ -101,7 +101,7 @@ static void process_link_qual(_adapter *padapter,union recv_frame *prframe)
struct signal_stat * signal_stat;
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
if(prframe == NULL || padapter==NULL){
if (prframe == NULL || padapter==NULL){
return;
}
@ -113,7 +113,7 @@ static void process_link_qual(_adapter *padapter,union recv_frame *prframe)
//DBG_8192C("process_link_qual=> pattrib->signal_qual(%d)\n ",pattrib->signal_qual);
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
if(signal_stat->update_req) {
if (signal_stat->update_req) {
signal_stat->total_num = 0;
signal_stat->total_val = 0;
signal_stat->update_req = 0;
@ -124,12 +124,12 @@ static void process_link_qual(_adapter *padapter,union recv_frame *prframe)
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
if(pattrib->phy_info.SignalQuality != 0)
if (pattrib->phy_info.SignalQuality != 0)
{
//
// 1. Record the general EVM to the sliding window.
//
if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX)
if (padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX)
{
padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX;
last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index];
@ -138,7 +138,7 @@ static void process_link_qual(_adapter *padapter,union recv_frame *prframe)
padapter->recvpriv.signal_qual_data.total_val += pattrib->phy_info.SignalQuality;
padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->phy_info.SignalQuality;
if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX)
if (padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX)
padapter->recvpriv.signal_qual_data.index = 0;
RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, pattrib->phy_info.SignalQuality));
@ -207,7 +207,7 @@ void update_recvframe_attrib_88e(
// update rx report to recv_frame attribute
pattrib->pkt_rpt_type = (u8)((report.rxdw3 >> 14) & 0x3);//prxreport->rpt_sel;
if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet
if (pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet
{
pattrib->pkt_len = (u16)(report.rxdw0 &0x00003fff);//(u16)prxreport->pktlen;
pattrib->drvinfo_sz = (u8)((report.rxdw0 >> 16) & 0xf) * 8;//(u8)(prxreport->drvinfosize << 3);
@ -234,12 +234,12 @@ void update_recvframe_attrib_88e(
pattrib->shift_sz = (u8)((report.rxdw0 >> 24) & 0x3);
}
else if(pattrib->pkt_rpt_type == TX_REPORT1)//CCX
else if (pattrib->pkt_rpt_type == TX_REPORT1)//CCX
{
pattrib->pkt_len = TX_RPT1_PKT_LEN;
pattrib->drvinfo_sz = 0;
}
else if(pattrib->pkt_rpt_type == TX_REPORT2)// TX RPT
else if (pattrib->pkt_rpt_type == TX_REPORT2)// TX RPT
{
pattrib->pkt_len =(u16)(report.rxdw0 & 0x3FF);//Rx length[9:0]
pattrib->drvinfo_sz = 0;
@ -251,7 +251,7 @@ void update_recvframe_attrib_88e(
pattrib->MacIDValidEntry[1] = report.rxdw5;
}
else if(pattrib->pkt_rpt_type == HIS_REPORT)// USB HISR RPT
else if (pattrib->pkt_rpt_type == HIS_REPORT)// USB HISR RPT
{
pattrib->pkt_len = (u16)(report.rxdw0 &0x00003fff);//(u16)prxreport->pktlen;
}
@ -292,8 +292,8 @@ void update_recvframe_phyinfo_88e(
pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID && (GetFrameSubType(wlanhdr) == WIFI_BEACON);
if(pkt_info.bPacketBeacon){
if(check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){
if (pkt_info.bPacketBeacon){
if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){
sa = padapter->mlmepriv.cur_network.network.MacAddress;
#if 0
{
@ -321,7 +321,7 @@ void update_recvframe_phyinfo_88e(
#ifdef CONFIG_CONCURRENT_MODE
//get Primary adapter's odmpriv
if(padapter->adapter_type > PRIMARY_ADAPTER){
if (padapter->adapter_type > PRIMARY_ADAPTER){
pHalData = GET_HAL_DATA(padapter->pbuddy_adapter);
}
#endif

30
hal/rtl8188e_sreset.c
View file

@ -41,16 +41,16 @@ static void _restore_security_setting(_adapter *padapter)
( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ ))
{
for(EntryId=0; EntryId<4; EntryId++)
for (EntryId=0; EntryId<4; EntryId++)
{
if(EntryId == psecuritypriv->dot11PrivacyKeyIndex)
if (EntryId == psecuritypriv->dot11PrivacyKeyIndex)
rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1);
else
rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0);
}
}
else if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) ||
else if ((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) ||
(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_))
{
psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));
@ -159,7 +159,7 @@ void rtl8188e_silentreset_for_specific_platform(_adapter *padapter)
ips_enter(padapter);
ips_leave(padapter);
#endif
if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
if (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
{
_restore_network_status(padapter);
_restore_security_setting(padapter);
@ -188,7 +188,7 @@ void rtl8188e_sreset_xmit_status_check(_adapter *padapter)
unsigned int diff_time;
u32 txdma_status;
if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){
if ( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){
DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status);
rtw_write32(padapter,REG_TXDMA_STATUS,txdma_status);
rtl8188e_silentreset_for_specific_platform(padapter);
@ -196,19 +196,19 @@ void rtl8188e_sreset_xmit_status_check(_adapter *padapter)
#ifdef CONFIG_USB_HCI
//total xmit irp = 4
//DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt);
//if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1)
//if (pxmitpriv->txirp_cnt == NR_XMITBUFF+1)
current_time = rtw_get_current_time();
if(0==pxmitpriv->free_xmitbuf_cnt)
if (0==pxmitpriv->free_xmitbuf_cnt)
{
diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_time);
if(diff_time > 2000){
if(psrtpriv->last_tx_complete_time==0){
if (diff_time > 2000){
if (psrtpriv->last_tx_complete_time==0){
psrtpriv->last_tx_complete_time = current_time;
}
else{
diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_complete_time);
if(diff_time > 4000){
if (diff_time > 4000){
//padapter->Wifi_Error_Status = WIFI_TX_HANG;
DBG_8192C("%s tx hang\n", __FUNCTION__);
rtl8188e_silentreset_for_specific_platform(padapter);
@ -224,16 +224,16 @@ void rtl8188e_sreset_linked_status_check(_adapter *padapter)
u32 rx_dma_status = 0;
u8 fw_status=0;
rx_dma_status = rtw_read32(padapter,REG_RXDMA_STATUS);
if(rx_dma_status!= 0x00){
if (rx_dma_status!= 0x00){
DBG_8192C("%s REG_RXDMA_STATUS:0x%08x \n",__FUNCTION__,rx_dma_status);
rtw_write32(padapter,REG_RXDMA_STATUS,rx_dma_status);
}
fw_status = rtw_read8(padapter,REG_FMETHR);
if(fw_status != 0x00)
if (fw_status != 0x00)
{
if(fw_status == 1)
if (fw_status == 1)
DBG_8192C("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !! \n",__FUNCTION__,fw_status);
else if(fw_status == 2)
else if (fw_status == 2)
DBG_8192C("%s REG_FW_STATUS (0x%02x), Condition_No_Match !! \n",__FUNCTION__,fw_status);
}
#if 0
@ -242,7 +242,7 @@ void rtl8188e_sreset_linked_status_check(_adapter *padapter)
regc58 = rtw_read32(padapter,0xc58);
reg824 = rtw_read32(padapter,0x824);
reg800 = rtw_read32(padapter,0x800);
if( ((regc50&0xFFFFFF00)!= 0x69543400)||
if ( ((regc50&0xFFFFFF00)!= 0x69543400)||
((regc58&0xFFFFFF00)!= 0x69543400)||
(((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))||
( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000)))

42
hal/rtl8188e_xmit.c
View file

@ -70,22 +70,22 @@ void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc)
u8 bDumpTxDesc = _FALSE;
rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DUMP_TXPKT, &(bDumpTxPkt));
if(bDumpTxPkt ==1){//dump txdesc for data frame
if (bDumpTxPkt ==1){//dump txdesc for data frame
DBG_871X("dump tx_desc for data frame\n");
if((frame_tag&0x0f) == DATA_FRAMETAG){
if ((frame_tag&0x0f) == DATA_FRAMETAG){
bDumpTxDesc = _TRUE;
}
}
else if(bDumpTxPkt ==2){//dump txdesc for mgnt frame
else if (bDumpTxPkt ==2){//dump txdesc for mgnt frame
DBG_871X("dump tx_desc for mgnt frame\n");
if((frame_tag&0x0f) == MGNT_FRAMETAG){
if ((frame_tag&0x0f) == MGNT_FRAMETAG){
bDumpTxDesc = _TRUE;
}
}
else if(bDumpTxPkt ==3){//dump early info
else if (bDumpTxPkt ==3){//dump early info
}
if(bDumpTxDesc){
if (bDumpTxDesc){
// ptxdesc->txdw4 = cpu_to_le32(0x00001006);//RTS Rate=24M
// ptxdesc->txdw6 = 0x6666f800;
DBG_8192C("=====================================\n");
@ -140,14 +140,14 @@ InsertEMContent_8188E(
#endif
_rtw_memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE);
if(pEMInfo->EMPktNum==0)
if (pEMInfo->EMPktNum==0)
return;
#ifdef DBG_EMINFO
{
int i;
DBG_8192C("\n%s ==> pEMInfo->EMPktNum =%d\n",__FUNCTION__,pEMInfo->EMPktNum);
for(i=0;i< EARLY_MODE_MAX_PKT_NUM;i++){
for (i=0;i< EARLY_MODE_MAX_PKT_NUM;i++){
DBG_8192C("%s ==> pEMInfo->EMPktLen[%d] =%d\n",__FUNCTION__,i,pEMInfo->EMPktLen[i]);
}
@ -157,7 +157,7 @@ InsertEMContent_8188E(
#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
if(pEMInfo->EMPktNum == 1){
if (pEMInfo->EMPktNum == 1){
dwtmp = pEMInfo->EMPktLen[0];
}else{
dwtmp = pEMInfo->EMPktLen[0];
@ -165,7 +165,7 @@ InsertEMContent_8188E(
dwtmp += pEMInfo->EMPktLen[1];
}
SET_EARLYMODE_LEN0(VirtualAddress, dwtmp);
if(pEMInfo->EMPktNum <= 3){
if (pEMInfo->EMPktNum <= 3){
dwtmp = pEMInfo->EMPktLen[2];
}else{
dwtmp = pEMInfo->EMPktLen[2];
@ -173,7 +173,7 @@ InsertEMContent_8188E(
dwtmp += pEMInfo->EMPktLen[3];
}
SET_EARLYMODE_LEN1(VirtualAddress, dwtmp);
if(pEMInfo->EMPktNum <= 5){
if (pEMInfo->EMPktNum <= 5){
dwtmp = pEMInfo->EMPktLen[4];
}else{
dwtmp = pEMInfo->EMPktLen[4];
@ -182,7 +182,7 @@ InsertEMContent_8188E(
}
SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp&0xF);
SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp>>4);
if(pEMInfo->EMPktNum <= 7){
if (pEMInfo->EMPktNum <= 7){
dwtmp = pEMInfo->EMPktLen[6];
}else{
dwtmp = pEMInfo->EMPktLen[6];
@ -190,7 +190,7 @@ InsertEMContent_8188E(
dwtmp += pEMInfo->EMPktLen[7];
}
SET_EARLYMODE_LEN3(VirtualAddress, dwtmp);
if(pEMInfo->EMPktNum <= 9){
if (pEMInfo->EMPktNum <= 9){
dwtmp = pEMInfo->EMPktLen[8];
}else{
dwtmp = pEMInfo->EMPktLen[8];
@ -229,7 +229,7 @@ void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmit
#ifdef DBG_EMINFO
DBG_8192C("\n%s ==> agg_num:%d\n",__FUNCTION__, pframe->agg_num);
for(index=0;index<pframe->agg_num;index++){
for (index=0;index<pframe->agg_num;index++){
offset = pxmitpriv->agg_pkt[index].offset;
pktlen = pxmitpriv->agg_pkt[index].pkt_len;
DBG_8192C("%s ==> agg_pkt[%d].offset=%d\n",__FUNCTION__,index,offset);
@ -237,20 +237,20 @@ void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmit
}
#endif
if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM)
if ( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM)
{
node_num_0 = pframe->agg_num;
node_num_1= EARLY_MODE_MAX_PKT_NUM-1;
}
for(index=0;index<pframe->agg_num;index++){
for (index=0;index<pframe->agg_num;index++){
offset = pxmitpriv->agg_pkt[index].offset;
pktlen = pxmitpriv->agg_pkt[index].pkt_len;
_rtw_memset(&eminfo,0,sizeof(struct EMInfo));
if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM){
if(node_num_0 > EARLY_MODE_MAX_PKT_NUM){
if ( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM){
if (node_num_0 > EARLY_MODE_MAX_PKT_NUM){
eminfo.EMPktNum = EARLY_MODE_MAX_PKT_NUM;
node_num_0--;
}
@ -262,12 +262,12 @@ void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmit
else{
eminfo.EMPktNum = pframe->agg_num-(index+1);
}
for(j=0;j< eminfo.EMPktNum ;j++){
for (j=0;j< eminfo.EMPktNum ;j++){
eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index+1+j].pkt_len+4;// 4 bytes CRC
}
if(pmem){
if(index==0){
if (pmem){
if (index==0){
ptxdesc = (PTXDESC)(pmem);
pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE;
}

10
hal/rtl8188eu_led.c
View file

@ -50,13 +50,13 @@ SwLedOn(
u8 LedCfg;
//HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))
if ( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))
{
return;
}
LedCfg = rtw_read8(padapter, REG_LEDCFG2);
switch(pLed->LedPin)
switch (pLed->LedPin)
{
case LED_PIN_LED0:
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on.
@ -87,7 +87,7 @@ SwLedOff(
u8 LedCfg;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))
if ((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))
{
goto exit;
}
@ -95,10 +95,10 @@ SwLedOff(
LedCfg = rtw_read8(padapter, REG_LEDCFG2);//0x4E
switch(pLed->LedPin)
switch (pLed->LedPin)
{
case LED_PIN_LED0:
if(pHalData->bLedOpenDrain == _TRUE) // Open-drain arrangement for controlling the LED)
if (pHalData->bLedOpenDrain == _TRUE) // Open-drain arrangement for controlling the LED)
{
LedCfg &= 0x90; // Set to software control.
rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));

24
hal/rtl8188eu_recv.c
View file

@ -50,7 +50,7 @@ void rtl8188eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf)
precvbuf->ref_cnt = 0;
if(precvbuf->pbuf)
if (precvbuf->pbuf)
{
precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pbuf;
precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ;
@ -78,14 +78,14 @@ int rtl8188eu_init_recv_priv(_adapter *padapter)
#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
#ifdef PLATFORM_LINUX
precvpriv->int_in_urb = usb_alloc_urb(0, GFP_KERNEL);
if(precvpriv->int_in_urb == NULL){
if (precvpriv->int_in_urb == NULL){
res= _FAIL;
DBG_8192C("alloc_urb for interrupt in endpoint fail !!!!\n");
goto exit;
}
#endif
precvpriv->int_in_buf = rtw_zmalloc(INTERRUPT_MSG_FORMAT_LEN);
if(precvpriv->int_in_buf == NULL){
if (precvpriv->int_in_buf == NULL){
res= _FAIL;
DBG_8192C("alloc_mem for interrupt in endpoint fail !!!!\n");
goto exit;
@ -100,7 +100,7 @@ int rtl8188eu_init_recv_priv(_adapter *padapter)
#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX
precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF *sizeof(struct recv_buf) + 4);
if(precvpriv->pallocated_recv_buf==NULL){
if (precvpriv->pallocated_recv_buf==NULL){
res= _FAIL;
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("alloc recv_buf fail!\n"));
goto exit;
@ -114,7 +114,7 @@ int rtl8188eu_init_recv_priv(_adapter *padapter)
precvbuf = (struct recv_buf*)precvpriv->precv_buf;
for(i=0; i < NR_RECVBUFF ; i++)
for (i=0; i < NR_RECVBUFF ; i++)
{
_rtw_init_listhead(&precvbuf->list);
@ -123,7 +123,7 @@ int rtl8188eu_init_recv_priv(_adapter *padapter)
precvbuf->alloc_sz = MAX_RECVBUF_SZ;
res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf);
if(res==_FAIL)
if (res==_FAIL)
break;
precvbuf->ref_cnt = 0;
@ -151,7 +151,7 @@ int rtl8188eu_init_recv_priv(_adapter *padapter)
skb_queue_head_init(&precvpriv->free_recv_skb_queue);
for(i=0; i<NR_PREALLOC_RECV_SKB; i++)
for (i=0; i<NR_PREALLOC_RECV_SKB; i++)
{
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
@ -160,7 +160,7 @@ int rtl8188eu_init_recv_priv(_adapter *padapter)
pskb = __netdev_alloc_skb(padapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ, GFP_KERNEL);
#endif
if(pskb)
if (pskb)
{
pskb->dev = padapter->pnetdev;
@ -193,24 +193,24 @@ void rtl8188eu_free_recv_priv (_adapter *padapter)
precvbuf = (struct recv_buf *)precvpriv->precv_buf;
for(i=0; i < NR_RECVBUFF ; i++)
for (i=0; i < NR_RECVBUFF ; i++)
{
rtw_os_recvbuf_resource_free(padapter, precvbuf);
precvbuf++;
}
if(precvpriv->pallocated_recv_buf)
if (precvpriv->pallocated_recv_buf)
rtw_mfree(precvpriv->pallocated_recv_buf, NR_RECVBUFF *sizeof(struct recv_buf) + 4);
#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
#ifdef PLATFORM_LINUX
if(precvpriv->int_in_urb)
if (precvpriv->int_in_urb)
{
usb_free_urb(precvpriv->int_in_urb);
}
#endif//PLATFORM_LINUX
if(precvpriv->int_in_buf)
if (precvpriv->int_in_buf)
rtw_mfree(precvpriv->int_in_buf, INTERRUPT_MSG_FORMAT_LEN);
#endif//CONFIG_USB_INTERRUPT_IN_PIPE

86
hal/rtl8188eu_xmit.c
View file

@ -94,7 +94,7 @@ void rtl8188eu_cal_txdesc_chksum(struct tx_desc *ptxdesc)
//Clear first
ptxdesc->txdw7 &= cpu_to_le32(0xffff0000);
for(index = 0 ; index < count ; index++){
for (index = 0 ; index < count ; index++){
checksum = checksum ^ le16_to_cpu(*(usPtr + index));
}
@ -197,7 +197,7 @@ void fill_txdesc_vcs(struct pkt_attrib *pattrib, u32 *pdw)
{
//DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode);
switch(pattrib->vcs_mode)
switch (pattrib->vcs_mode)
{
case RTS_CTS:
*pdw |= cpu_to_le32(RTS_EN);
@ -210,19 +210,19 @@ void fill_txdesc_vcs(struct pkt_attrib *pattrib, u32 *pdw)
break;
}
if(pattrib->vcs_mode) {
if (pattrib->vcs_mode) {
*pdw |= cpu_to_le32(HW_RTS_EN);
// Set RTS BW
if(pattrib->ht_en)
if (pattrib->ht_en)
{
*pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)? cpu_to_le32(BIT(27)):0;
if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
*pdw |= cpu_to_le32((0x01<<28)&0x30000000);
else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
*pdw |= cpu_to_le32((0x02<<28)&0x30000000);
else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
*pdw |= 0;
else
*pdw |= cpu_to_le32((0x03<<28)&0x30000000);
@ -234,15 +234,15 @@ void fill_txdesc_phy(struct pkt_attrib *pattrib, u32 *pdw)
{
//DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset);
if(pattrib->ht_en)
if (pattrib->ht_en)
{
*pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)? cpu_to_le32(BIT(25)):0;
if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
*pdw |= cpu_to_le32((0x01<<DATA_SC_SHT)&0x003f0000);
else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
*pdw |= cpu_to_le32((0x02<<DATA_SC_SHT)&0x003f0000);
else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
*pdw |= 0;
else
*pdw |= cpu_to_le32((0x03<<DATA_SC_SHT)&0x003f0000);
@ -270,15 +270,15 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bag
#endif //CONFIG_P2P
#ifdef CONFIG_CONCURRENT_MODE
if(rtw_buddy_adapter_up(padapter) && padapter->adapter_type > PRIMARY_ADAPTER)
if (rtw_buddy_adapter_up(padapter) && padapter->adapter_type > PRIMARY_ADAPTER)
pHalData = GET_HAL_DATA(padapter->pbuddy_adapter);
#endif //CONFIG_CONCURRENT_MODE
#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
if (padapter->registrypriv.mp_mode == 0)
{
if((!bagg_pkt) &&(urb_zero_packet_chk(padapter, sz)==0))//(sz %512) != 0
//if((!bagg_pkt) &&(rtw_usb_bulk_size_boundary(padapter,TXDESC_SIZE+sz)==_FALSE))
if ((!bagg_pkt) &&(urb_zero_packet_chk(padapter, sz)==0))//(sz %512) != 0
//if ((!bagg_pkt) &&(rtw_usb_bulk_size_boundary(padapter,TXDESC_SIZE+sz)==_FALSE))
{
ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ);
//DBG_8192C("==> non-agg-pkt,shift pointer...\n");
@ -297,7 +297,7 @@ if (padapter->registrypriv.mp_mode == 0)
offset = TXDESC_SIZE + OFFSET_SZ;
#ifdef CONFIG_TX_EARLY_MODE
if(bagg_pkt){
if (bagg_pkt){
offset += EARLY_MODE_INFO_SIZE ;//0x28
}
#endif
@ -309,8 +309,8 @@ if (padapter->registrypriv.mp_mode == 0)
#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
if (padapter->registrypriv.mp_mode == 0)
{
if(!bagg_pkt){
if((pull) && (pxmitframe->pkt_offset>0)) {
if (!bagg_pkt){
if ((pull) && (pxmitframe->pkt_offset>0)) {
pxmitframe->pkt_offset = pxmitframe->pkt_offset -1;
}
}
@ -325,7 +325,7 @@ if (padapter->registrypriv.mp_mode == 0)
//driver uses rate
ptxdesc->txdw4 |= cpu_to_le32(USERATE);//rate control always by driver
if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
if ((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
{
//DBG_8192C("pxmitframe->frame_tag == DATA_FRAMETAG\n");
@ -340,7 +340,7 @@ if (padapter->registrypriv.mp_mode == 0)
fill_txdesc_sectype(pattrib, ptxdesc);
if(pattrib->ampdu_en==_TRUE){
if (pattrib->ampdu_en==_TRUE){
ptxdesc->txdw2 |= cpu_to_le32(AGG_EN);//AGG EN
//SET_TX_DESC_MAX_AGG_NUM_88E(pDesc, 0x1F);
@ -387,8 +387,8 @@ if (padapter->registrypriv.mp_mode == 0)
ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);//DATA/RTS Rate FB LMT
#if (RATE_ADAPTIVE_SUPPORT == 1)
if(pattrib->ht_en){
if( ODM_RA_GetShortGI_8188E(&pHalData->odmpriv,pattrib->mac_id))
if (pattrib->ht_en){
if ( ODM_RA_GetShortGI_8188E(&pHalData->odmpriv,pattrib->mac_id))
ptxdesc->txdw5 |= cpu_to_le32(SGI);//SGI
}
@ -397,7 +397,7 @@ if (padapter->registrypriv.mp_mode == 0)
//for debug
#if 0
if(padapter->fix_rate!= 0xFF){
if (padapter->fix_rate!= 0xFF){
ptxdesc->datarate = padapter->fix_rate;
}
#endif
@ -408,11 +408,11 @@ if (padapter->registrypriv.mp_mode == 0)
#endif //(POWER_TRAINING_ACTIVE==1)
#else//if (RATE_ADAPTIVE_SUPPORT == 1)
if(pattrib->ht_en)
if (pattrib->ht_en)
ptxdesc->txdw5 |= cpu_to_le32(SGI);//SGI
data_rate = 0x13; //default rate: MCS7
if(padapter->fix_rate!= 0xFF){//rate control by iwpriv
if (padapter->fix_rate!= 0xFF){//rate control by iwpriv
data_rate = padapter->fix_rate;
}
ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F);
@ -444,7 +444,7 @@ if (padapter->registrypriv.mp_mode == 0)
}
#endif
}
else if((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG)
else if ((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG)
{
//DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n");
@ -477,13 +477,13 @@ if (padapter->registrypriv.mp_mode == 0)
//offset 20
ptxdesc->txdw5 |= cpu_to_le32(RTY_LMT_EN);//retry limit enable
if(pattrib->retry_ctrl == _TRUE)
if (pattrib->retry_ctrl == _TRUE)
ptxdesc->txdw5 |= cpu_to_le32(0x00180000);//retry limit = 6
else
ptxdesc->txdw5 |= cpu_to_le32(0x00300000);//retry limit = 12
#ifdef CONFIG_INTEL_PROXIM
if((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){
if ((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){
DBG_871X("\n %s pattrib->rate=%d\n",__FUNCTION__,pattrib->rate);
ptxdesc->txdw5 |= cpu_to_le32( pattrib->rate);
}
@ -493,12 +493,12 @@ if (padapter->registrypriv.mp_mode == 0)
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
}
}
else if((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG)
else if ((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG)
{
DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n");
}
#ifdef CONFIG_MP_INCLUDED
else if(((pxmitframe->frame_tag&0x0f) == MP_FRAMETAG) &&
else if (((pxmitframe->frame_tag&0x0f) == MP_FRAMETAG) &&
(padapter->registrypriv.mp_mode == 1))
{
fill_txdesc_for_mp(padapter, ptxdesc);
@ -530,7 +530,7 @@ if (padapter->registrypriv.mp_mode == 0)
// (2) Enable HW SEQ control for beacon packet, because we use Hw beacon.
// (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets.
// 2010.06.23. Added by tynli.
if(!pattrib->qos_en)
if (!pattrib->qos_en)
{
//ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
//ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
@ -586,7 +586,7 @@ s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter)
return _FAIL;
}
if(check_pending_xmitbuf(pxmitpriv) == _FALSE)
if (check_pending_xmitbuf(pxmitpriv) == _FALSE)
return _SUCCESS;
#ifdef CONFIG_LPS_LCLK
@ -662,7 +662,7 @@ static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe)
pull = update_txdesc(pxmitframe, mem_addr, sz, _FALSE);
if(pull)
if (pull)
{
mem_addr += PACKET_OFFSET_SZ; //pull txdesc head
@ -720,7 +720,7 @@ static u32 xmitframe_need_length(struct xmit_frame *pxmitframe)
pattrib->pktlen +
((pattrib->bswenc) ? pattrib->icv_len : 0);
if(pattrib->encrypt ==_TKIP_)
if (pattrib->encrypt ==_TKIP_)
len += 8;
return len;
@ -972,7 +972,7 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
descCount = 0;
bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize;
}
}//end while( aggregate same priority and same DA(AP or STA) frames)
}//end while ( aggregate same priority and same DA(AP or STA) frames)
if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE)
@ -1043,10 +1043,10 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete()\n"));
if(pxmitbuf==NULL)
if (pxmitbuf==NULL)
{
pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
if(!pxmitbuf)
if (!pxmitbuf)
{
return _FALSE;
}
@ -1057,7 +1057,7 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
{
pxmitframe = rtw_dequeue_xframe(pxmitpriv, phwxmits, hwentry);
if(pxmitframe)
if (pxmitframe)
{
pxmitframe->pxmitbuf = pxmitbuf;
@ -1065,9 +1065,9 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
pxmitbuf->priv_data = pxmitframe;
if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
if ((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
{
if(pxmitframe->attrib.priority<=15)//TID0~15
if (pxmitframe->attrib.priority<=15)//TID0~15
{
res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
}
@ -1079,7 +1079,7 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete(): rtw_dump_xframe\n"));
if(res == _SUCCESS)
if (res == _SUCCESS)
{
rtw_dump_xframe(padapter, pxmitframe);
}
@ -1100,7 +1100,7 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
break;
}while(0/*xcnt < (NR_XMITFRAME >> 3)*/);
}while (0/*xcnt < (NR_XMITFRAME >> 3)*/);
return _TRUE;
@ -1259,7 +1259,7 @@ s32 rtl8188eu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
pxmit_skb = netdev_alloc_skb(pnetdev, len + TXDESC_SIZE);
#endif
if(!pxmit_skb)
if (!pxmit_skb)
goto _exit;
pxmitbuf = pxmit_skb->data;
@ -1278,7 +1278,7 @@ s32 rtl8188eu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);//default = 32 bytes for TX Desc
ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
if(bmcst)
if (bmcst)
{
ptxdesc->txdw0 |= cpu_to_le32(BIT(24));
}

496
hal/usb_halinit.c
View file

File diff suppressed because it is too large Load diff

204
hal/usb_ops_linux.c
View file

@ -54,7 +54,7 @@ static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u
#endif
#ifdef CONFIG_CONCURRENT_MODE
if(padapter->adapter_type > PRIMARY_ADAPTER)
if (padapter->adapter_type > PRIMARY_ADAPTER)
{
padapter = padapter->pbuddy_adapter;
pdvobjpriv = adapter_to_dvobj(padapter);
@ -64,13 +64,13 @@ static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u
//DBG_871X("%s %s:%d\n",__FUNCTION__, current->comm, current->pid);
if((padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)){
if ((padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)){
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq:(padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
status = -EPERM;
goto exit;
}
if(len>MAX_VENDOR_REQ_CMD_SIZE){
if (len>MAX_VENDOR_REQ_CMD_SIZE){
DBG_8192C( "[%s] Buffer len error ,vendor request failed\n", __FUNCTION__ );
status = -EINVAL;
goto exit;
@ -104,7 +104,7 @@ static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u
goto release_mutex;
}
while(++vendorreq_times<= MAX_USBCTRL_VENDORREQ_TIMES)
while (++vendorreq_times<= MAX_USBCTRL_VENDORREQ_TIMES)
{
_rtw_memset(pIo_buf, 0, len);
@ -142,7 +142,7 @@ static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u
, value,(requesttype == 0x01)?"read":"write" , len, status, *(u32*)pdata, vendorreq_times);
if (status < 0) {
if(status == (-ESHUTDOWN) || status == -ENODEV )
if (status == (-ESHUTDOWN) || status == -ENODEV )
{
padapter->bSurpriseRemoved = _TRUE;
} else {
@ -156,7 +156,7 @@ static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u
}
else // status != len && status >= 0
{
if(status > 0) {
if (status > 0) {
if ( requesttype == 0x01 )
{ // For Control read transfer, we have to copy the read data from pIo_buf to pdata.
_rtw_memcpy( pdata, pIo_buf, len );
@ -164,7 +164,7 @@ static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u
}
}
if(rtw_inc_and_chk_continual_urb_error(pdvobjpriv) == _TRUE ){
if (rtw_inc_and_chk_continual_urb_error(pdvobjpriv) == _TRUE ){
padapter->bSurpriseRemoved = _TRUE;
break;
}
@ -172,7 +172,7 @@ static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u
}
// firmware download is checksumed, don't retry
if( (value >= FW_8188E_START_ADDRESS && value <= FW_8188E_END_ADDRESS) || status == len )
if ( (value >= FW_8188E_START_ADDRESS && value <= FW_8188E_END_ADDRESS) || status == len )
break;
}
@ -408,14 +408,14 @@ void interrupt_handler_8188eu(_adapter *padapter,u16 pkt_len,u8 *pbuf)
_rtw_memcpy(&hisr_ex,&(pHalData->IntArray[1]),4);
hisr_ex = le32_to_cpu(hisr_ex);
if((hisr != 0) || (hisr_ex!=0))
if ((hisr != 0) || (hisr_ex!=0))
DBG_871X("===> %s hisr:0x%08x ,hisr_ex:0x%08x \n",__FUNCTION__,hisr,hisr_ex);
}
#endif
#ifdef CONFIG_LPS_LCLK
if( pHalData->IntArray[0] & IMR_CPWM_88E )
if ( pHalData->IntArray[0] & IMR_CPWM_88E )
{
_rtw_memcpy(&pwr_rpt.state, &(pbuf[USB_INTR_CONTENT_CPWM1_OFFSET]), 1);
//_rtw_memcpy(&pwr_rpt.state2, &(pbuf[USB_INTR_CONTENT_CPWM2_OFFSET]), 1);
@ -437,29 +437,29 @@ void interrupt_handler_8188eu(_adapter *padapter,u16 pkt_len,u8 *pbuf)
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
#if 0
if(pHalData->IntArray[0] & IMR_BCNDMAINT0_88E)
if (pHalData->IntArray[0] & IMR_BCNDMAINT0_88E)
DBG_8192C("%s: HISR_BCNERLY_INT\n", __func__);
if(pHalData->IntArray[0] & IMR_TBDOK_88E)
if (pHalData->IntArray[0] & IMR_TBDOK_88E)
DBG_8192C("%s: HISR_TXBCNOK\n", __func__);
if(pHalData->IntArray[0] & IMR_TBDER_88E)
if (pHalData->IntArray[0] & IMR_TBDER_88E)
DBG_8192C("%s: HISR_TXBCNERR\n", __func__);
#endif
if(check_fwstate(pmlmepriv, WIFI_AP_STATE))
if (check_fwstate(pmlmepriv, WIFI_AP_STATE))
{
//send_beacon(padapter);
if(pmlmepriv->update_bcn == _TRUE)
if (pmlmepriv->update_bcn == _TRUE)
{
//tx_beacon_hdl(padapter, NULL);
set_tx_beacon_cmd(padapter);
}
}
#ifdef CONFIG_CONCURRENT_MODE
if(check_buddy_fwstate(padapter, WIFI_AP_STATE))
if (check_buddy_fwstate(padapter, WIFI_AP_STATE))
{
//send_beacon(padapter);
if(padapter->pbuddy_adapter->mlmepriv.update_bcn == _TRUE)
if (padapter->pbuddy_adapter->mlmepriv.update_bcn == _TRUE)
{
//tx_beacon_hdl(padapter, NULL);
set_tx_beacon_cmd(padapter->pbuddy_adapter);
@ -474,19 +474,19 @@ void interrupt_handler_8188eu(_adapter *padapter,u16 pkt_len,u8 *pbuf)
#ifdef DBG_CONFIG_ERROR_DETECT_INT
if( pHalData->IntArray[1] & IMR_TXERR_88E )
if ( pHalData->IntArray[1] & IMR_TXERR_88E )
DBG_871X("===> %s Tx Error Flag Interrupt Status \n",__FUNCTION__);
if( pHalData->IntArray[1] & IMR_RXERR_88E )
if ( pHalData->IntArray[1] & IMR_RXERR_88E )
DBG_871X("===> %s Rx Error Flag INT Status \n",__FUNCTION__);
if( pHalData->IntArray[1] & IMR_TXFOVW_88E )
if ( pHalData->IntArray[1] & IMR_TXFOVW_88E )
DBG_871X("===> %s Transmit FIFO Overflow \n",__FUNCTION__);
if( pHalData->IntArray[1] & IMR_RXFOVW_88E )
if ( pHalData->IntArray[1] & IMR_RXFOVW_88E )
DBG_871X("===> %s Receive FIFO Overflow \n",__FUNCTION__);
#endif//DBG_CONFIG_ERROR_DETECT_INT
// C2H Event
if(pbuf[0]!= 0){
if (pbuf[0]!= 0){
_rtw_memcpy(&(pHalData->C2hArray[0]), &(pbuf[USB_INTR_CONTENT_C2H_OFFSET]), 16);
//rtw_c2h_wk_cmd(padapter); to do..
}
@ -500,7 +500,7 @@ static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs)
int err;
_adapter *padapter = (_adapter *)purb->context;
if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel)
if (padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel)
{
DBG_8192C("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n",
__FUNCTION__,padapter->bDriverStopped, padapter->bSurpriseRemoved,padapter->bReadPortCancel);
@ -508,7 +508,7 @@ static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs)
return;
}
if(purb->status==0)//SUCCESS
if (purb->status==0)//SUCCESS
{
if (purb->actual_length > INTERRUPT_MSG_FORMAT_LEN)
{
@ -518,7 +518,7 @@ static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs)
interrupt_handler_8188eu(padapter, purb->actual_length,purb->transfer_buffer );
err = usb_submit_urb(purb, GFP_ATOMIC);
if((err) && (err != (-EPERM)))
if ((err) && (err != (-EPERM)))
{
DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, purb->status);
}
@ -527,7 +527,7 @@ static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs)
{
DBG_8192C("###=> usb_read_interrupt_complete => urb status(%d)\n", purb->status);
switch(purb->status) {
switch (purb->status) {
case -EINVAL:
case -EPIPE:
case -ENODEV:
@ -573,7 +573,7 @@ _func_enter_;
1);
err = usb_submit_urb(precvpriv->int_in_urb, GFP_ATOMIC);
if((err) && (err != (-EPERM)))
if ((err) && (err != (-EPERM)))
{
DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, precvpriv->int_in_urb->status);
ret = _FAIL;
@ -597,17 +597,17 @@ static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxsta
_queue *pfree_recv_queue = &precvpriv->free_recv_queue;
u8 *pbuf = precvframe->u.hdr.rx_data;
if(!secondary_padapter)
if (!secondary_padapter)
return ret;
paddr1 = GetAddr1Ptr(precvframe->u.hdr.rx_data);
if(IS_MCAST(paddr1) == _FALSE)//unicast packets
if (IS_MCAST(paddr1) == _FALSE)//unicast packets
{
//primary_myid = myid(&primary_padapter->eeprompriv);
secondary_myid = myid(&secondary_padapter->eeprompriv);
if(_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN))
if (_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN))
{
//change to secondary interface
precvframe->u.hdr.adapter = secondary_padapter;
@ -629,7 +629,7 @@ static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxsta
switch (type)
{
case WIFI_MGT_TYPE: //Handle BC/MC mgnt Packets
if(subtype == WIFI_BEACON)
if (subtype == WIFI_BEACON)
{
paddr3 = GetAddr3Ptr(precvframe->u.hdr.rx_data);
@ -641,10 +641,10 @@ static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxsta
clone = _FALSE;
}
if(check_fwstate(&primary_padapter->mlmepriv, _FW_LINKED) &&
if (check_fwstate(&primary_padapter->mlmepriv, _FW_LINKED) &&
_rtw_memcmp(paddr3, get_bssid(&primary_padapter->mlmepriv), ETH_ALEN))
{
if(clone==_FALSE)
if (clone==_FALSE)
{
clone = _TRUE;
}
@ -656,7 +656,7 @@ static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxsta
precvframe->u.hdr.adapter = primary_padapter;
}
if(check_fwstate(&primary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) ||
if (check_fwstate(&primary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) ||
check_fwstate(&secondary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING))
{
clone = _TRUE;
@ -664,7 +664,7 @@ static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxsta
}
}
else if(subtype == WIFI_PROBEREQ)
else if (subtype == WIFI_PROBEREQ)
{
//probe req frame is only for interface2
//change to secondary interface
@ -680,7 +680,7 @@ static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxsta
paddr2 = GetAddr2Ptr(precvframe->u.hdr.rx_data);
if(_rtw_memcmp(paddr2, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN))
if (_rtw_memcmp(paddr2, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN))
{
//change to secondary interface
precvframe->u.hdr.adapter = secondary_padapter;
@ -694,7 +694,7 @@ static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxsta
}
#endif
if(_TRUE == clone)
if (_TRUE == clone)
{
//clone/copy to if2
u8 shift_sz = 0;
@ -703,7 +703,7 @@ static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxsta
struct rx_pkt_attrib *pattrib = NULL;
precvframe_if2 = rtw_alloc_recvframe(pfree_recv_queue);
if(precvframe_if2)
if (precvframe_if2)
{
precvframe_if2->u.hdr.adapter = secondary_padapter;
@ -730,9 +730,9 @@ static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxsta
// for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet.
// modify alloc_sz for recvive crc error packet by thomas 2011-06-02
if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){
if ((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){
//alloc_sz = 1664; //1664 is 128 alignment.
if(skb_len <= 1650)
if (skb_len <= 1650)
alloc_sz = 1664;
else
alloc_sz = skb_len + 14;
@ -749,7 +749,7 @@ static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxsta
#else
pkt_copy = netdev_alloc_skb(secondary_padapter->pnetdev, alloc_sz);
#endif
if(pkt_copy)
if (pkt_copy)
{
pkt_copy->dev = secondary_padapter->pnetdev;
precvframe_if2->u.hdr.pkt = pkt_copy;
@ -812,7 +812,7 @@ static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf)
pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
#if 0 //temp remove when disable usb rx aggregation
if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_len<RXDESC_SIZE) ||(pkt_len<=0))
if ((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_len<RXDESC_SIZE) ||(pkt_len<=0))
{
return _FAIL;
}
@ -826,7 +826,7 @@ static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf)
prxstat = (struct recv_stat *)pbuf;
precvframe = rtw_alloc_recvframe(pfree_recv_queue);
if(precvframe==NULL)
if (precvframe==NULL)
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n"));
DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__);
@ -843,13 +843,13 @@ static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf)
pattrib = &precvframe->u.hdr.attrib;
#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
//if(pattrib->pkt_len>2000){
//if (pattrib->pkt_len>2000){
// printk("%s: RX Warning!pkt_len= %d, data rate=0x%02x \n", __FUNCTION__,pattrib->pkt_len,pattrib->mcs_rate);
//}
#endif
if ((pattrib->crc_err) || (pattrib->icv_err))
{
if(pattrib->pkt_len>2000){
if (pattrib->pkt_len>2000){
DBG_8192C("%s: RX Warning! crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err);
#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
printk("%s: RX Warning!pkt_len= %d, data rate=0x%02x \n", __FUNCTION__,pattrib->pkt_len,pattrib->mcs_rate);
@ -860,14 +860,14 @@ static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf)
}
if( (pattrib->physt) && (pattrib->pkt_rpt_type == NORMAL_RX))
if ( (pattrib->physt) && (pattrib->pkt_rpt_type == NORMAL_RX))
{
pphy_status = (struct phy_stat *)(pbuf + RXDESC_OFFSET);
}
pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len;
if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len))
if ((pattrib->pkt_len<=0) || (pkt_offset>transfer_len))
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n"));
DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__);
@ -890,9 +890,9 @@ static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf)
// for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet.
// modify alloc_sz for recvive crc error packet by thomas 2011-06-02
if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){
if ((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){
//alloc_sz = 1664; //1664 is 128 alignment.
if(skb_len <= 1650)
if (skb_len <= 1650)
alloc_sz = 1664;
else
alloc_sz = skb_len + 14;
@ -909,7 +909,7 @@ static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf)
#else
pkt_copy = netdev_alloc_skb(padapter->pnetdev, alloc_sz);
#endif
if(pkt_copy)
if (pkt_copy)
{
pkt_copy->dev = padapter->pnetdev;
precvframe->u.hdr.pkt = pkt_copy;
@ -937,7 +937,7 @@ static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf)
//recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE);
#ifdef CONFIG_USB_RX_AGGREGATION
switch(pHalData->UsbRxAggMode)
switch (pHalData->UsbRxAggMode)
{
case USB_RX_AGG_DMA:
case USB_RX_AGG_MIX:
@ -952,12 +952,12 @@ static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf)
}
#endif
if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet
if (pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet
{
#ifdef CONFIG_CONCURRENT_MODE
if(rtw_buddy_adapter_up(padapter))
if (rtw_buddy_adapter_up(padapter))
{
if(pre_recv_entry(precvframe, prxstat, pphy_status) != _SUCCESS)
if (pre_recv_entry(precvframe, prxstat, pphy_status) != _SUCCESS)
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,
("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n"));
@ -968,7 +968,7 @@ static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf)
{
if (pattrib->physt)
update_recvframe_phyinfo_88e(precvframe, (struct phy_stat*)pphy_status);
if(rtw_recv_entry(precvframe) != _SUCCESS)
if (rtw_recv_entry(precvframe) != _SUCCESS)
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,
("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n"));
@ -979,13 +979,13 @@ static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf)
else{ // pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP
//enqueue recvframe to txrtp queue
if(pattrib->pkt_rpt_type == TX_REPORT1){
if (pattrib->pkt_rpt_type == TX_REPORT1){
//DBG_8192C("rx CCX \n");
//CCX-TXRPT ack for xmit mgmt frames.
handle_txrpt_ccx_88e(padapter, precvframe->u.hdr.rx_data);
}
else if(pattrib->pkt_rpt_type == TX_REPORT2){
else if (pattrib->pkt_rpt_type == TX_REPORT2){
//DBG_8192C("rx TX RPT \n");
ODM_RA_TxRPT2Handle_8188E(
&pHalData->odmpriv,
@ -996,7 +996,7 @@ static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf)
);
}
else if(pattrib->pkt_rpt_type == HIS_REPORT)
else if (pattrib->pkt_rpt_type == HIS_REPORT)
{
//DBG_8192C("%s , rx USB HISR \n",__FUNCTION__);
#ifdef CONFIG_SUPPORT_USB_INT
@ -1013,10 +1013,10 @@ static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf)
precvframe = NULL;
pkt_copy = NULL;
if(transfer_len>0 && pkt_cnt==0)
if (transfer_len>0 && pkt_cnt==0)
pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
}while((transfer_len>0) && (pkt_cnt>0));
}while ((transfer_len>0) && (pkt_cnt>0));
_exit_recvbuf2recvframe:
@ -1056,7 +1056,7 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
precvpriv->rx_pending_cnt --;
if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel)
if (padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel)
{
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved));
DBG_8192C("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n",
@ -1064,7 +1064,7 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
goto exit;
}
if(purb->status==0)//SUCCESS
if (purb->status==0)//SUCCESS
{
if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE))
{
@ -1090,11 +1090,11 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status);
if(rtw_inc_and_chk_continual_urb_error(adapter_to_dvobj(padapter)) == _TRUE ){
if (rtw_inc_and_chk_continual_urb_error(adapter_to_dvobj(padapter)) == _TRUE ){
padapter->bSurpriseRemoved = _TRUE;
}
switch(purb->status) {
switch (purb->status) {
case -EINVAL:
case -EPIPE:
case -ENODEV:
@ -1144,17 +1144,17 @@ static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
_func_enter_;
if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)
if (adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)
{
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
return _FAIL;
}
if(precvbuf !=NULL)
if (precvbuf !=NULL)
{
rtl8188eu_init_recvbuf(adapter, precvbuf);
if(precvbuf->pbuf)
if (precvbuf->pbuf)
{
precvpriv->rx_pending_cnt++;
@ -1173,7 +1173,7 @@ _func_enter_;
purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
err = usb_submit_urb(purb, GFP_ATOMIC);
if((err) && (err != (-EPERM)))
if ((err) && (err != (-EPERM)))
{
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status));
DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status);
@ -1218,7 +1218,7 @@ static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
#if 0 //temp remove when disable usb rx aggregation
if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_len<RXDESC_SIZE) ||(pkt_len<=0))
if ((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_len<RXDESC_SIZE) ||(pkt_len<=0))
{
return _FAIL;
}
@ -1231,7 +1231,7 @@ static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
prxstat = (struct recv_stat *)pbuf;
precvframe = rtw_alloc_recvframe(pfree_recv_queue);
if(precvframe==NULL)
if (precvframe==NULL)
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n"));
DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__);
@ -1255,14 +1255,14 @@ static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
goto _exit_recvbuf2recvframe;
}
if( (pattrib->physt) && (pattrib->pkt_rpt_type == NORMAL_RX))
if ( (pattrib->physt) && (pattrib->pkt_rpt_type == NORMAL_RX))
{
pphy_status = (struct phy_stat *)(pbuf + RXDESC_OFFSET);
}
pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len;
if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len))
if ((pattrib->pkt_len<=0) || (pkt_offset>transfer_len))
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n"));
DBG_8192C("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfoer_len \n", __FUNCTION__, __LINE__);
@ -1285,9 +1285,9 @@ static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
// for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet.
// modify alloc_sz for recvive crc error packet by thomas 2011-06-02
if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){
if ((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){
//alloc_sz = 1664; //1664 is 128 alignment.
if(skb_len <= 1650)
if (skb_len <= 1650)
alloc_sz = 1664;
else
alloc_sz = skb_len + 14;
@ -1304,7 +1304,7 @@ static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
#else
pkt_copy = netdev_alloc_skb(padapter->pnetdev, alloc_sz);
#endif
if(pkt_copy)
if (pkt_copy)
{
pkt_copy->dev = padapter->pnetdev;
precvframe->u.hdr.pkt = pkt_copy;
@ -1317,7 +1317,7 @@ static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
}
else
{
if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0))
if ((pattrib->mfrag == 1)&&(pattrib->frag_num == 0))
{
DBG_8192C("recvbuf2recvframe: alloc_skb fail , drop frag frame \n");
rtw_free_recvframe(precvframe, pfree_recv_queue);
@ -1325,7 +1325,7 @@ static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
}
precvframe->u.hdr.pkt = skb_clone(pskb, GFP_ATOMIC);
if(precvframe->u.hdr.pkt)
if (precvframe->u.hdr.pkt)
{
precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail
= pbuf+ pattrib->drvinfo_sz + RXDESC_SIZE;
@ -1344,7 +1344,7 @@ static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
//recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE);
#ifdef CONFIG_USB_RX_AGGREGATION
switch(pHalData->UsbRxAggMode)
switch (pHalData->UsbRxAggMode)
{
case USB_RX_AGG_DMA:
case USB_RX_AGG_MIX:
@ -1359,12 +1359,12 @@ static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
}
#endif
if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet
if (pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet
{
#ifdef CONFIG_CONCURRENT_MODE
if(rtw_buddy_adapter_up(padapter))
if (rtw_buddy_adapter_up(padapter))
{
if(pre_recv_entry(precvframe, prxstat, pphy_status) != _SUCCESS)
if (pre_recv_entry(precvframe, prxstat, pphy_status) != _SUCCESS)
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,
("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n"));
@ -1375,7 +1375,7 @@ static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
{
if (pattrib->physt)
update_recvframe_phyinfo_88e(precvframe, (struct phy_stat*)pphy_status);
if(rtw_recv_entry(precvframe) != _SUCCESS)
if (rtw_recv_entry(precvframe) != _SUCCESS)
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,
("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n"));
@ -1385,12 +1385,12 @@ static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
else{ // pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP
//enqueue recvframe to txrtp queue
if(pattrib->pkt_rpt_type == TX_REPORT1){
if (pattrib->pkt_rpt_type == TX_REPORT1){
//DBG_8192C("rx CCX \n");
//CCX-TXRPT ack for xmit mgmt frames.
handle_txrpt_ccx_88e(padapter, precvframe->u.hdr.rx_data);
}
else if(pattrib->pkt_rpt_type == TX_REPORT2){
else if (pattrib->pkt_rpt_type == TX_REPORT2){
//DBG_8192C("rx TX RPT \n");
ODM_RA_TxRPT2Handle_8188E(
&pHalData->odmpriv,
@ -1401,7 +1401,7 @@ static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
);
}
else if(pattrib->pkt_rpt_type == HIS_REPORT)
else if (pattrib->pkt_rpt_type == HIS_REPORT)
{
//DBG_8192C("%s , rx USB HISR \n",__FUNCTION__);
#ifdef CONFIG_SUPPORT_USB_INT
@ -1418,10 +1418,10 @@ static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb)
precvframe = NULL;
pkt_copy = NULL;
if(transfer_len>0 && pkt_cnt==0)
if (transfer_len>0 && pkt_cnt==0)
pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
}while((transfer_len>0) && (pkt_cnt>0));
}while ((transfer_len>0) && (pkt_cnt>0));
_exit_recvbuf2recvframe:
@ -1479,20 +1479,20 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
precvpriv->rx_pending_cnt --;
//if(precvpriv->rx_pending_cnt== 0)
//if (precvpriv->rx_pending_cnt== 0)
//{
// RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: rx_pending_cnt== 0, set allrxreturnevt!\n"));
// _rtw_up_sema(&precvpriv->allrxreturnevt);
//}
if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel)
if (padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel)
{
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved));
#ifdef CONFIG_PREALLOC_RECV_SKB
precvbuf->reuse = _TRUE;
#else
if(precvbuf->pskb){
if (precvbuf->pskb){
DBG_8192C("==> free skb(%p)\n",precvbuf->pskb);
dev_kfree_skb_any(precvbuf->pskb);
}
@ -1502,7 +1502,7 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
goto exit;
}
if(purb->status==0)//SUCCESS
if (purb->status==0)//SUCCESS
{
if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE))
{
@ -1533,11 +1533,11 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status);
if(rtw_inc_and_chk_continual_urb_error(adapter_to_dvobj(padapter)) == _TRUE ){
if (rtw_inc_and_chk_continual_urb_error(adapter_to_dvobj(padapter)) == _TRUE ){
padapter->bSurpriseRemoved = _TRUE;
}
switch(purb->status) {
switch (purb->status) {
case -EINVAL:
case -EPIPE:
case -ENODEV:
@ -1592,14 +1592,14 @@ static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
_func_enter_;
if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)
if (adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)
{
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
return _FAIL;
}
#ifdef CONFIG_PREALLOC_RECV_SKB
if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL))
if ((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL))
{
if (NULL != (precvbuf->pskb = skb_dequeue(&precvpriv->free_recv_skb_queue)))
{
@ -1609,12 +1609,12 @@ _func_enter_;
#endif
if(precvbuf !=NULL)
if (precvbuf !=NULL)
{
rtl8188eu_init_recvbuf(adapter, precvbuf);
//re-assign for linux based on skb
if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL))
if ((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL))
{
//precvbuf->pskb = alloc_skb(MAX_RECVBUF_SZ, GFP_ATOMIC);//don't use this after v2.6.25
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
@ -1622,7 +1622,7 @@ _func_enter_;
#else
precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
#endif
if(precvbuf->pskb == NULL)
if (precvbuf->pskb == NULL)
{
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("init_recvbuf(): alloc_skb fail!\n"));
DBG_8192C("#### usb_read_port() alloc_skb fail!#####\n");
@ -1669,7 +1669,7 @@ _func_enter_;
precvbuf);//context is precvbuf
err = usb_submit_urb(purb, GFP_ATOMIC);
if((err) && (err != (-EPERM)))
if ((err) && (err != (-EPERM)))
{
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status));
DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status);
@ -1694,10 +1694,10 @@ void rtl8188eu_xmit_tasklet(void *priv)
_adapter *padapter = (_adapter*)priv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
if(check_fwstate(&padapter->mlmepriv, _FW_UNDER_SURVEY) == _TRUE)
if (check_fwstate(&padapter->mlmepriv, _FW_UNDER_SURVEY) == _TRUE)
return;
while(1)
while (1)
{
if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE) || (padapter->bWritePortCancel == _TRUE))
{
@ -1707,7 +1707,7 @@ void rtl8188eu_xmit_tasklet(void *priv)
ret = rtl8188eu_xmitframe_complete(padapter, pxmitpriv, NULL);
if(ret==_FALSE)
if (ret==_FALSE)
break;
}