mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2025-06-23 08:34:20 +00:00
Change "if(" to "if (" and the same changes for "while", "for", "switch" and "do"
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
124abebb96
commit
a55f866a62
105 changed files with 6893 additions and 6893 deletions
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@ -165,7 +165,7 @@ rtl8188e_PHY_RF6052SetBandwidth(
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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switch(Bandwidth)
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switch (Bandwidth)
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{
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case HT_CHANNEL_WIDTH_20:
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pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10) | BIT(11));
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@ -221,16 +221,16 @@ rtl8188e_PHY_RF6052SetCckTxPower(
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TurboScanOff = _TRUE;
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if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS)
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if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS)
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{
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TxAGC[RF_PATH_A] = 0x3f3f3f3f;
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TxAGC[RF_PATH_B] = 0x3f3f3f3f;
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TurboScanOff = _TRUE;//disable turbo scan
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if(TurboScanOff)
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if (TurboScanOff)
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{
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for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
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for (idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
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{
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TxAGC[idx1] =
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pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
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@ -248,26 +248,26 @@ rtl8188e_PHY_RF6052SetCckTxPower(
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// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism.
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// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism.
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// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder.
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if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
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if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
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{
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TxAGC[RF_PATH_A] = 0x10101010;
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TxAGC[RF_PATH_B] = 0x10101010;
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}
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else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
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else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
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{
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TxAGC[RF_PATH_A] = 0x00000000;
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TxAGC[RF_PATH_B] = 0x00000000;
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}
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else
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{
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for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
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for (idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
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{
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TxAGC[idx1] =
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pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
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(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
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}
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if(pHalData->EEPROMRegulatory==0)
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if (pHalData->EEPROMRegulatory==0)
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{
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tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) +
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(pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8);
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@ -280,12 +280,12 @@ rtl8188e_PHY_RF6052SetCckTxPower(
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}
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}
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for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
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for (idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++)
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{
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ptr = (u8*)(&(TxAGC[idx1]));
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for(idx2=0; idx2<4; idx2++)
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for (idx2=0; idx2<4; idx2++)
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{
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if(*ptr > RF6052_MAX_TX_PWR)
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if (*ptr > RF6052_MAX_TX_PWR)
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*ptr = RF6052_MAX_TX_PWR;
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ptr++;
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}
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@ -341,7 +341,7 @@ static void getPowerBase(
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u8 Legacy_pwrdiff=0, HT20_pwrdiff=0;
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u8 i, powerlevel[2];
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for(i=0; i<2; i++)
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for (i=0; i<2; i++)
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{
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powerlevel[i] = pPowerLevel[i];
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Legacy_pwrdiff = pHalData->TxPwrLegacyHtDiff[i][Channel-1];
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@ -352,10 +352,10 @@ static void getPowerBase(
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//RTPRINT(FPHY, PHY_TXPWR, (" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i)));
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}
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for(i=0; i<2; i++)
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for (i=0; i<2; i++)
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{
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//Check HT20 to HT40 diff
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if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
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if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
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{
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HT20_pwrdiff = pHalData->TxPwrHt20Diff[i][Channel-1];
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powerlevel[i] += HT20_pwrdiff;
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@ -387,7 +387,7 @@ void getPowerBase88E(
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s8 HT20_pwrdiff=0;
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u8 i, powerlevel[2];
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for(i=0; i<2; i++)
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for (i=0; i<2; i++)
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{
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powerBase0 = pPowerLevelOFDM[i];
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@ -396,10 +396,10 @@ void getPowerBase88E(
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//DBG_871X(" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i));
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}
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for(i=0; i<pHalData->NumTotalRFPath; i++)
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for (i=0; i<pHalData->NumTotalRFPath; i++)
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{
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//Check HT20 to HT40 diff
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if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
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if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
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{
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powerlevel[i] = pPowerLevelBW20[i];
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}
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@ -431,9 +431,9 @@ static void getTxPowerWriteValByRegulatory(
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//
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// Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate
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//
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for(rf=0; rf<2; rf++)
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for (rf=0; rf<2; rf++)
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{
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switch(pHalData->EEPROMRegulatory)
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switch (pHalData->EEPROMRegulatory)
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{
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case 0: // Realtek better performance
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// increase power diff defined by Realtek for large power
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@ -447,18 +447,18 @@ static void getTxPowerWriteValByRegulatory(
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case 1: // Realtek regulatory
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// increase power diff defined by Realtek for regulatory
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{
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if(pHalData->pwrGroupCnt == 1)
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if (pHalData->pwrGroupCnt == 1)
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chnlGroup = 0;
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if(pHalData->pwrGroupCnt >= 3)
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if (pHalData->pwrGroupCnt >= 3)
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{
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if(Channel <= 3)
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if (Channel <= 3)
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chnlGroup = 0;
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else if(Channel >= 4 && Channel <= 9)
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else if (Channel >= 4 && Channel <= 9)
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chnlGroup = 1;
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else if(Channel > 9)
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else if (Channel > 9)
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chnlGroup = 2;
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if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
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if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
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chnlGroup++;
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else
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chnlGroup+=4;
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@ -496,12 +496,12 @@ static void getTxPowerWriteValByRegulatory(
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pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8));
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if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
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{
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if(pwr_diff_limit[i] > pHalData->PwrGroupHT40[rf][Channel-1])
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if (pwr_diff_limit[i] > pHalData->PwrGroupHT40[rf][Channel-1])
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pwr_diff_limit[i] = pHalData->PwrGroupHT40[rf][Channel-1];
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}
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else
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{
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if(pwr_diff_limit[i] > pHalData->PwrGroupHT20[rf][Channel-1])
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if (pwr_diff_limit[i] > pHalData->PwrGroupHT20[rf][Channel-1])
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pwr_diff_limit[i] = pHalData->PwrGroupHT20[rf][Channel-1];
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}
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}
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@ -524,20 +524,20 @@ static void getTxPowerWriteValByRegulatory(
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// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism.
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// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder.
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if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
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if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
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writeVal = 0x14141414;
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else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
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else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
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writeVal = 0x00000000;
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// 20100628 Joseph: High power mode for BT-Coexist mechanism.
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// This mechanism is only applied when Driver-Highpower-Mechanism is OFF.
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if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1)
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if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1)
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{
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//RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n"));
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writeVal = writeVal - 0x06060606;
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}
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else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2)
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else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2)
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{
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//RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n"));
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writeVal = writeVal;
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@ -567,13 +567,13 @@ void getTxPowerWriteValByRegulatory88E(
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// Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate
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//
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#if 0 // (INTEL_PROXIMITY_SUPPORT == 1)
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if(pMgntInfo->IntelProximityModeInfo.PowerOutput > 0)
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if (pMgntInfo->IntelProximityModeInfo.PowerOutput > 0)
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Regulatory = 2;
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#endif
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for(rf=0; rf<2; rf++)
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for (rf=0; rf<2; rf++)
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{
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switch(Regulatory)
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switch (Regulatory)
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{
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case 0: // Realtek better performance
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// increase power diff defined by Realtek for large power
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@ -587,33 +587,33 @@ void getTxPowerWriteValByRegulatory88E(
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case 1: // Realtek regulatory
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// increase power diff defined by Realtek for regulatory
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{
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if(pHalData->pwrGroupCnt == 1)
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if (pHalData->pwrGroupCnt == 1)
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chnlGroup = 0;
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if(pHalData->pwrGroupCnt >= pHalData->PGMaxGroup)
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if (pHalData->pwrGroupCnt >= pHalData->PGMaxGroup)
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{
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if (Channel < 3) // Chanel 1-2
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chnlGroup = 0;
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else if (Channel < 6) // Channel 3-5
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chnlGroup = 1;
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else if(Channel <9) // Channel 6-8
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else if (Channel <9) // Channel 6-8
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chnlGroup = 2;
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else if(Channel <12) // Channel 9-11
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else if (Channel <12) // Channel 9-11
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chnlGroup = 3;
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else if(Channel <14) // Channel 12-13
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else if (Channel <14) // Channel 12-13
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chnlGroup = 4;
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else if(Channel ==14) // Channel 14
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else if (Channel ==14) // Channel 14
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chnlGroup = 5;
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/*
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if(Channel <= 3)
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if (Channel <= 3)
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chnlGroup = 0;
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else if(Channel >= 4 && Channel <= 9)
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else if (Channel >= 4 && Channel <= 9)
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chnlGroup = 1;
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else if(Channel > 9)
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else if (Channel > 9)
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chnlGroup = 2;
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if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
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if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
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chnlGroup++;
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else
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chnlGroup+=4;
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@ -649,7 +649,7 @@ void getTxPowerWriteValByRegulatory88E(
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((rf==0)?'A':'B'), pHalData->PwrGroupHT20[rf][Channel-1]));
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}*/
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if(index < 2)
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if (index < 2)
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pwr_diff = pHalData->TxPwrLegacyHtDiff[rf][Channel-1];
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else if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
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pwr_diff = pHalData->TxPwrHt20Diff[rf][Channel-1];
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@ -663,7 +663,7 @@ void getTxPowerWriteValByRegulatory88E(
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//RTPRINT(FPHY, PHY_TXPWR, ("customer pwr limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_pwr_limit));
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if(pwr_diff >= customer_pwr_limit)
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if (pwr_diff >= customer_pwr_limit)
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pwr_diff = 0;
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else
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pwr_diff = customer_pwr_limit - pwr_diff;
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@ -672,7 +672,7 @@ void getTxPowerWriteValByRegulatory88E(
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{
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pwr_diff_limit[i] = (u1Byte)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8));
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if(pwr_diff_limit[i] > pwr_diff)
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if (pwr_diff_limit[i] > pwr_diff)
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pwr_diff_limit[i] = pwr_diff;
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}
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customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) |
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@ -693,25 +693,25 @@ void getTxPowerWriteValByRegulatory88E(
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// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism.
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// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder.
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//92d do not need this
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if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
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if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
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writeVal = 0x14141414;
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else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
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else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
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writeVal = 0x00000000;
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// 20100628 Joseph: High power mode for BT-Coexist mechanism.
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// This mechanism is only applied when Driver-Highpower-Mechanism is OFF.
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if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1)
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if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1)
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{
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//RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n"));
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writeVal = writeVal - 0x06060606;
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}
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else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2)
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else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2)
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{
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//RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n"));
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writeVal = writeVal ;
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}
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/*
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if(pMgntInfo->bDisableTXPowerByRate)
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if (pMgntInfo->bDisableTXPowerByRate)
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{
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// add for OID_RT_11N_TX_POWER_BY_RATE ,disable tx powre change by rate
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writeVal = 0x2c2c2c2c;
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@ -738,10 +738,10 @@ static void writeOFDMPowerReg88E(
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u32 writeVal;
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u16 RegOffset;
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for(rf=0; rf<2; rf++)
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for (rf=0; rf<2; rf++)
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{
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writeVal = pValue[rf];
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for(i=0; i<4; i++)
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for (i=0; i<4; i++)
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{
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pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
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if (pwr_val[i] > RF6052_MAX_TX_PWR)
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@ -749,7 +749,7 @@ static void writeOFDMPowerReg88E(
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}
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writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) |(pwr_val[1]<<8) |pwr_val[0];
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if(rf == 0)
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if (rf == 0)
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RegOffset = RegOffset_A[index];
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else
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RegOffset = RegOffset_B[index];
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@ -758,19 +758,19 @@ static void writeOFDMPowerReg88E(
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//RTPRINT(FPHY, PHY_TXPWR, ("Set 0x%x = %08x\n", RegOffset, writeVal));
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// 201005115 Joseph: Set Tx Power diff for Tx power training mechanism.
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if(((pHalData->rf_type == RF_2T2R) &&
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if (((pHalData->rf_type == RF_2T2R) &&
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(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs15_Mcs12))||
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((pHalData->rf_type != RF_2T2R) &&
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(RegOffset == rTxAGC_A_Mcs07_Mcs04 || RegOffset == rTxAGC_B_Mcs07_Mcs04)) )
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{
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writeVal = pwr_val[3];
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if(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_A_Mcs07_Mcs04)
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if (RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_A_Mcs07_Mcs04)
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RegOffset = 0xc90;
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if(RegOffset == rTxAGC_B_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs07_Mcs04)
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if (RegOffset == rTxAGC_B_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs07_Mcs04)
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RegOffset = 0xc98;
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for(i=0; i<3; i++)
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for (i=0; i<3; i++)
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{
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if(i!=2)
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if (i!=2)
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writeVal = (writeVal>8)?(writeVal-8):0;
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else
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writeVal = (writeVal>6)?(writeVal-6):0;
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@ -828,7 +828,7 @@ rtl8188e_PHY_RF6052SetOFDMTxPower(
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//
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ODM_TxPwrTrackAdjust88E(&pHalData->odmpriv, 0, &direction, &pwrtrac_value);
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for(index=0; index<6; index++)
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for (index=0; index<6; index++)
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{
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getTxPowerWriteValByRegulatory88E(Adapter, Channel, index,
|
||||
&powerBase0[0], &powerBase1[0], &writeVal[0]);
|
||||
|
|
@ -887,14 +887,14 @@ phy_RF6052_Config_ParaFile(
|
|||
//3//-----------------------------------------------------------------
|
||||
//3// <2> Initialize RF
|
||||
//3//-----------------------------------------------------------------
|
||||
//for(eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
|
||||
for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
|
||||
//for (eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
|
||||
for (eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
|
||||
{
|
||||
|
||||
pPhyReg = &pHalData->PHYRegDef[eRFPath];
|
||||
|
||||
/*----Store original RFENV control type----*/
|
||||
switch(eRFPath)
|
||||
switch (eRFPath)
|
||||
{
|
||||
case RF_PATH_A:
|
||||
case RF_PATH_C:
|
||||
|
|
@ -922,12 +922,12 @@ phy_RF6052_Config_ParaFile(
|
|||
rtw_udelay_os(1);//PlatformStallExecution(1);
|
||||
|
||||
/*----Initialize RF fom connfiguration file----*/
|
||||
switch(eRFPath)
|
||||
switch (eRFPath)
|
||||
{
|
||||
case RF_PATH_A:
|
||||
#ifdef CONFIG_EMBEDDED_FWIMG
|
||||
#ifdef CONFIG_PHY_SETTING_WITH_ODM
|
||||
if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath))
|
||||
if (HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath))
|
||||
rtStatus= _FAIL;
|
||||
#else
|
||||
rtStatus= rtl8188e_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath);
|
||||
|
|
@ -939,7 +939,7 @@ phy_RF6052_Config_ParaFile(
|
|||
case RF_PATH_B:
|
||||
#ifdef CONFIG_EMBEDDED_FWIMG
|
||||
#ifdef CONFIG_PHY_SETTING_WITH_ODM
|
||||
if(HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath))
|
||||
if (HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath))
|
||||
rtStatus= _FAIL;
|
||||
#else
|
||||
rtStatus = rtl8188e_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath);
|
||||
|
|
@ -955,7 +955,7 @@ phy_RF6052_Config_ParaFile(
|
|||
}
|
||||
|
||||
/*----Restore RFENV control type----*/;
|
||||
switch(eRFPath)
|
||||
switch (eRFPath)
|
||||
{
|
||||
case RF_PATH_A:
|
||||
case RF_PATH_C:
|
||||
|
|
@ -967,7 +967,7 @@ phy_RF6052_Config_ParaFile(
|
|||
break;
|
||||
}
|
||||
|
||||
if(rtStatus != _SUCCESS){
|
||||
if (rtStatus != _SUCCESS){
|
||||
//RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath));
|
||||
goto phy_RF6052_Config_ParaFile_Fail;
|
||||
}
|
||||
|
|
@ -993,7 +993,7 @@ PHY_RF6052_Config8188E(
|
|||
// Initialize general global value
|
||||
//
|
||||
// TODO: Extend RF_PATH_C and RF_PATH_D in the future
|
||||
if(pHalData->rf_type == RF_1T1R)
|
||||
if (pHalData->rf_type == RF_1T1R)
|
||||
pHalData->NumTotalRFPath = 1;
|
||||
else
|
||||
pHalData->NumTotalRFPath = 2;
|
||||
|
|
@ -1003,7 +1003,7 @@ PHY_RF6052_Config8188E(
|
|||
//
|
||||
rtStatus = phy_RF6052_Config_ParaFile(Adapter);
|
||||
#if 0
|
||||
switch( Adapter->MgntInfo.bRegHwParaFile )
|
||||
switch ( Adapter->MgntInfo.bRegHwParaFile )
|
||||
{
|
||||
case 0:
|
||||
phy_RF6052_Config_HardCode(Adapter);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue