mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2025-05-08 14:33:05 +00:00
rtl8188eu: Remove spaces before quoted newline
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
parent
b8f73d9a8f
commit
aa89a39a09
35 changed files with 235 additions and 235 deletions
|
@ -201,7 +201,7 @@ RateDownFinish:
|
|||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down, RPT Timing default\n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d",pRaInfo->RAWaitingCounter,pRaInfo->RAPendingCounter));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down to RateID %d RateSGI %d\n", RateID, pRaInfo->RateSGI));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateDown_8188E() \n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateDown_8188E()\n"));
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -214,7 +214,7 @@ odm_RateUp_8188E(
|
|||
u8 RateID, HighestRate;
|
||||
u8 i;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateUp_8188E() \n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateUp_8188E()\n"));
|
||||
if(NULL == pRaInfo)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E(): pRaInfo is NULL\n"));
|
||||
|
@ -269,7 +269,7 @@ RateUpfinish:
|
|||
pRaInfo->DecisionRate=RateID;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate up to RateID %d\n", RateID));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d",pRaInfo->RAWaitingCounter,pRaInfo->RAPendingCounter));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateUp_8188E() \n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateUp_8188E()\n"));
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -290,7 +290,7 @@ odm_RateDecision_8188E(
|
|||
/* u32 pool_retry; */
|
||||
static u8 DynamicTxRPTTimingCounter=0;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDecision_8188E() \n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDecision_8188E()\n"));
|
||||
|
||||
if (pRaInfo->Active && (pRaInfo->TOTAL > 0)) /* STA used and data packet exits */
|
||||
{
|
||||
|
@ -369,7 +369,7 @@ odm_RateDecision_8188E(
|
|||
|
||||
odm_ResetRaCounter_8188E( pRaInfo);
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateDecision_8188E() \n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateDecision_8188E()\n"));
|
||||
}
|
||||
|
||||
static int
|
||||
|
@ -470,7 +470,7 @@ odm_ARFBRefresh_8188E(
|
|||
pRaInfo->DecisionRate = pRaInfo->HighestRate;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
|
||||
("ODM_ARFBRefresh_8188E(): RateID=%d RateMask=%8.8x RAUseRate=%8.8x HighestRate=%d,DecisionRate=%d \n",
|
||||
("ODM_ARFBRefresh_8188E(): RateID=%d RateMask=%8.8x RAUseRate=%8.8x HighestRate=%d,DecisionRate=%d\n",
|
||||
pRaInfo->RateID, pRaInfo->RateMask, pRaInfo->RAUseRate, pRaInfo->HighestRate,pRaInfo->DecisionRate));
|
||||
return 0;
|
||||
}
|
||||
|
@ -637,7 +637,7 @@ ODM_RAInfo_Init(
|
|||
|
||||
/* printk("%s ==>WirelessMode:0x%08x ,max_raid_idx:0x%02x\n ",__FUNCTION__,WirelessMode,max_rate_idx); */
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
|
||||
("ODM_RAInfo_Init(): WirelessMode:0x%08x ,max_raid_idx:0x%02x \n",
|
||||
("ODM_RAInfo_Init(): WirelessMode:0x%08x ,max_raid_idx:0x%02x\n",
|
||||
WirelessMode,max_rate_idx));
|
||||
|
||||
pRaInfo->DecisionRate = max_rate_idx;
|
||||
|
|
|
@ -55,7 +55,7 @@ static void setIqkMatrix(
|
|||
{
|
||||
s32 ele_A=0, ele_D, ele_C=0, TempCCk, value32;
|
||||
|
||||
/* printk("%s==> OFDM_index:%d \n",__FUNCTION__,OFDM_index); */
|
||||
/* printk("%s==> OFDM_index:%d\n",__FUNCTION__,OFDM_index); */
|
||||
|
||||
/* if(OFDM_index> OFDM_TABLE_SIZE_92D) */
|
||||
/* */
|
||||
|
@ -259,7 +259,7 @@ odm_TxPwrTrackSetPwr88E(
|
|||
u8 rf = 0;
|
||||
u32 pwr = 0, TxAGC = 0;
|
||||
struct adapter *Adapter = pDM_Odm->Adapter;
|
||||
/* printk("odm_TxPwrTrackSetPwr88E CH=%d, modify TXAGC \n", *(pDM_Odm->pChannel)); */
|
||||
/* printk("odm_TxPwrTrackSetPwr88E CH=%d, modify TXAGC\n", *(pDM_Odm->pChannel)); */
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("odm_TxPwrTrackSetPwr88E CH=%d\n", *(pDM_Odm->pChannel)));
|
||||
|
||||
/* if (MP_DRIVER != 1) */
|
||||
|
@ -379,7 +379,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
|
|||
pDM_Odm->RFCalibrateInfo.RegA24 = 0x090e1317;
|
||||
#endif
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("===>odm_TXPowerTrackingCallback_ThermalMeter_8188E, pDM_Odm->BbSwingIdxCckBase: %d, pDM_Odm->BbSwingIdxOfdmBase: %d \n", pDM_Odm->BbSwingIdxCckBase, pDM_Odm->BbSwingIdxOfdmBase));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("===>odm_TXPowerTrackingCallback_ThermalMeter_8188E, pDM_Odm->BbSwingIdxCckBase: %d, pDM_Odm->BbSwingIdxOfdmBase: %d\n", pDM_Odm->BbSwingIdxCckBase, pDM_Odm->BbSwingIdxOfdmBase));
|
||||
ThermalValue = (u8)ODM_GetRFReg(pDM_Odm, RF_PATH_A, RF_T_METER_88E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
|
||||
if (!ThermalValue || ! pDM_Odm->RFCalibrateInfo.TxPowerTrackControl)
|
||||
return;
|
||||
|
@ -416,7 +416,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
|
|||
if(ThermalValue_AVG_count)
|
||||
{
|
||||
ThermalValue = (u8)(ThermalValue_AVG / ThermalValue_AVG_count);
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("AVG Thermal Meter = 0x%x \n", ThermalValue));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("AVG Thermal Meter = 0x%x\n", ThermalValue));
|
||||
}
|
||||
|
||||
/* 4 5. Calculate delta, delta_LCK, delta_IQK. */
|
||||
|
@ -687,7 +687,7 @@ phy_PathA_RxIQK(
|
|||
|
||||
u4tmp = 0x80007C00 | (regE94&0x3FF0000) | ((regE9C&0x3FF0000) >> 16);
|
||||
ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, u4tmp);
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe40 = 0x%x u4tmp = 0x%x \n", ODM_GetBBReg(pDM_Odm, rTx_IQK, bMaskDWord), u4tmp));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe40 = 0x%x u4tmp = 0x%x\n", ODM_GetBBReg(pDM_Odm, rTx_IQK, bMaskDWord), u4tmp));
|
||||
|
||||
|
||||
/* 1 RX IQK */
|
||||
|
@ -1986,8 +1986,8 @@ if (*(pDM_Odm->mp_mode) == 1)
|
|||
is13simular = false;
|
||||
|
||||
|
||||
/* ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK !!!interface %d currentband %d ishardwareD %d \n", pDM_Odm->interfaceIndex, pHalData->CurrentBandType92D, IS_HARDWARE_TYPE_8192D(pAdapter))); */
|
||||
/* RT_TRACE(COMP_INIT,DBG_LOUD,("Acquire Mutex in IQCalibrate \n")); */
|
||||
/* ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK !!!interface %d currentband %d ishardwareD %d\n", pDM_Odm->interfaceIndex, pHalData->CurrentBandType92D, IS_HARDWARE_TYPE_8192D(pAdapter))); */
|
||||
/* RT_TRACE(COMP_INIT,DBG_LOUD,("Acquire Mutex in IQCalibrate\n")); */
|
||||
for (i=0; i<3; i++)
|
||||
{
|
||||
|
||||
|
@ -2030,7 +2030,7 @@ if (*(pDM_Odm->mp_mode) == 1)
|
|||
}
|
||||
}
|
||||
}
|
||||
/* RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate \n")); */
|
||||
/* RT_TRACE(COMP_INIT,DBG_LOUD,("Release Mutex in IQCalibrate\n")); */
|
||||
|
||||
for (i=0; i<4; i++)
|
||||
{
|
||||
|
|
36
hal/odm.c
36
hal/odm.c
|
@ -1162,7 +1162,7 @@ ODM_Write_DIG(
|
|||
{
|
||||
pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_REG(IGI_A,pDM_Odm)=0x%x, ODM_BIT(IGI,pDM_Odm)=0x%x \n",
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_REG(IGI_A,pDM_Odm)=0x%x, ODM_BIT(IGI,pDM_Odm)=0x%x\n",
|
||||
ODM_REG(IGI_A,pDM_Odm),ODM_BIT(IGI,pDM_Odm)));
|
||||
|
||||
if(pDM_DigTable->CurIGValue != CurrentIGI)/* if(pDM_DigTable->PreIGValue != CurrentIGI) */
|
||||
|
@ -1190,11 +1190,11 @@ ODM_Write_DIG(
|
|||
break;
|
||||
}
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("CurrentIGI(0x%02x). \n",CurrentIGI));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("CurrentIGI(0x%02x).\n",CurrentIGI));
|
||||
/* pDM_DigTable->PreIGValue = pDM_DigTable->CurIGValue; */
|
||||
pDM_DigTable->CurIGValue = CurrentIGI;
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG():CurrentIGI=0x%x \n",CurrentIGI));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG():CurrentIGI=0x%x\n",CurrentIGI));
|
||||
}
|
||||
|
||||
/* Need LPS mode for CE platform --2012--08--24--- */
|
||||
|
@ -1293,10 +1293,10 @@ odm_Adaptivity(
|
|||
bool EDCCA_State = 0;
|
||||
|
||||
if(!(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)) {
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Go to odm_DynamicEDCCA() \n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Go to odm_DynamicEDCCA()\n"));
|
||||
return;
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_Adaptivity() =====> \n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_Adaptivity() =====>\n"));
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ForceEDCCA=%d, IGI_Base=0x%x, TH_L2H_ini = %d, TH_EDCCA_HL_diff = %d, AdapEn_RSSI = %d\n",
|
||||
pDM_Odm->ForceEDCCA, pDM_Odm->IGI_Base, pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff, pDM_Odm->AdapEn_RSSI));
|
||||
|
@ -1443,7 +1443,7 @@ odm_DIG(
|
|||
|
||||
if(*(pDM_Odm->pbScanInProcess))
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In Scan Progress \n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In Scan Progress\n"));
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -1452,7 +1452,7 @@ odm_DIG(
|
|||
{
|
||||
if(pDM_Odm->bDMInitialGainEnable == false)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: PSD is Processing \n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: PSD is Processing\n"));
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
@ -1612,7 +1612,7 @@ odm_DIG(
|
|||
if((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ||(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV))
|
||||
{
|
||||
DIG_Dynamic_MIN = (u8) pDM_DigTable->AntDiv_RSSI_max;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d \n",pDM_DigTable->AntDiv_RSSI_max));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d\n",pDM_DigTable->AntDiv_RSSI_max));
|
||||
}
|
||||
}
|
||||
else
|
||||
|
@ -1646,7 +1646,7 @@ odm_DIG(
|
|||
/* 1 Modify DIG lower bound, deal with abnorally large false alarm */
|
||||
if(pFalseAlmCnt->Cnt_all > 10000)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnornally false alarm case.\n"));
|
||||
|
||||
if(pDM_DigTable->LargeFAHit != 3)
|
||||
pDM_DigTable->LargeFAHit++;
|
||||
|
@ -1775,7 +1775,7 @@ odm_DIG(
|
|||
if(FirstDisConnect)
|
||||
{
|
||||
CurrentIGI = pDM_DigTable->rx_gain_range_min;
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First DisConnect \n"));
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First DisConnect\n"));
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -1786,7 +1786,7 @@ odm_DIG(
|
|||
CurrentIGI = CurrentIGI + 2;
|
||||
else if(pFalseAlmCnt->Cnt_all < 500)
|
||||
CurrentIGI = CurrentIGI - 2;
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): England DIG \n"));
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): England DIG\n"));
|
||||
}
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG End Adjust IGI\n"));
|
||||
|
@ -2334,8 +2334,8 @@ u32 ODM_Get_Rate_Bitmap(
|
|||
|
||||
}
|
||||
|
||||
/* printk("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n",__FUNCTION__,rssi_level,WirelessMode,rate_bitmap); */
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n",rssi_level,WirelessMode,rate_bitmap));
|
||||
/* printk("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n",__FUNCTION__,rssi_level,WirelessMode,rate_bitmap); */
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n",rssi_level,WirelessMode,rate_bitmap));
|
||||
|
||||
return rate_bitmap;
|
||||
|
||||
|
@ -2481,7 +2481,7 @@ ODM_RAStateCheck(
|
|||
RATRState = DM_RATR_STA_MIDDLE;
|
||||
else
|
||||
RATRState = DM_RATR_STA_LOW;
|
||||
/* printk("==>%s,RATRState:0x%02x ,RSSI:%d \n",__FUNCTION__,RATRState,RSSI); */
|
||||
/* printk("==>%s,RATRState:0x%02x ,RSSI:%d\n",__FUNCTION__,RATRState,RSSI); */
|
||||
|
||||
if( *pRATRState!=RATRState || bForceUpdate)
|
||||
{
|
||||
|
@ -3761,9 +3761,9 @@ ODM_SingleDualAntennaDetection(
|
|||
/* Reload AFE Registers */
|
||||
odm_PHY_ReloadAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16);
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d \n", 2416, AntO_report));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d\n", 2416, AntA_report));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d\n", 2416, AntB_report));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d\n", 2416, AntO_report));
|
||||
|
||||
|
||||
if(pDM_Odm->SupportICType == ODM_RTL8723A)
|
||||
|
@ -3827,7 +3827,7 @@ ODM_SingleDualAntennaDetection(
|
|||
{
|
||||
pDM_SWAT_Table->ANTA_ON=true;
|
||||
pDM_SWAT_Table->ANTB_ON=true;
|
||||
RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna \n"));
|
||||
RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna\n"));
|
||||
}
|
||||
}
|
||||
else
|
||||
|
|
|
@ -217,7 +217,7 @@ odm_EVMdbToPercentage(
|
|||
ret_val = Value;
|
||||
/* ret_val /= 2; */
|
||||
|
||||
/* ODM_RTPRINT(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x \n", ret_val, ret_val)); */
|
||||
/* ODM_RTPRINT(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x\n", ret_val, ret_val)); */
|
||||
|
||||
if(ret_val >= 0)
|
||||
ret_val = 0;
|
||||
|
@ -643,7 +643,7 @@ odm_Process_RSSIForDM(
|
|||
}
|
||||
else
|
||||
{
|
||||
/* DbgPrint("pRfd->Status.RxMIMOSignalStrength[0] = %d, pRfd->Status.RxMIMOSignalStrength[1] = %d \n", */
|
||||
/* DbgPrint("pRfd->Status.RxMIMOSignalStrength[0] = %d, pRfd->Status.RxMIMOSignalStrength[1] = %d\n", */
|
||||
/* pRfd->Status.RxMIMOSignalStrength[0], pRfd->Status.RxMIMOSignalStrength[1]); */
|
||||
pDM_Odm->RSSI_A = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
|
||||
pDM_Odm->RSSI_B = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
|
||||
|
|
|
@ -34,7 +34,7 @@ ODM_DIG_LowerBound_88E(
|
|||
if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
|
||||
{
|
||||
pDM_DigTable->rx_gain_range_min = (u8) pDM_DigTable->AntDiv_RSSI_max;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_DIG_LowerBound_88E(): pDM_DigTable->AntDiv_RSSI_max=%d \n",pDM_DigTable->AntDiv_RSSI_max));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_DIG_LowerBound_88E(): pDM_DigTable->AntDiv_RSSI_max=%d\n",pDM_DigTable->AntDiv_RSSI_max));
|
||||
}
|
||||
/* If only one Entry connected */
|
||||
|
||||
|
@ -58,7 +58,7 @@ odm_RX_HWAntDivInit(
|
|||
return;
|
||||
}
|
||||
#endif
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_RX_HWAntDivInit() \n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_RX_HWAntDivInit()\n"));
|
||||
|
||||
/* MAC Setting */
|
||||
value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
|
||||
|
@ -99,7 +99,7 @@ odm_TRX_HWAntDivInit(
|
|||
|
||||
#endif
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_TRX_HWAntDivInit() \n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_TRX_HWAntDivInit()\n"));
|
||||
|
||||
/* MAC Setting */
|
||||
value32 = ODM_GetMACReg(pDM_Odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
|
||||
|
@ -142,7 +142,7 @@ odm_FastAntTrainingInit(
|
|||
struct adapter * Adapter = pDM_Odm->Adapter;
|
||||
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_FastAntTrainingInit() \n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_FastAntTrainingInit()\n"));
|
||||
|
||||
#if (MP_DRIVER == 1)
|
||||
if (*(pDM_Odm->mp_mode) == 1) {
|
||||
|
|
|
@ -171,7 +171,7 @@ u8 rtl8188e_set_rssi_cmd(struct adapter*padapter, u8 *param)
|
|||
|
||||
if(pHalData->fw_ractrl == true){
|
||||
}else{
|
||||
DBG_8192C("==>%s fw dont support RA \n",__FUNCTION__);
|
||||
DBG_8192C("==>%s fw dont support RA\n",__FUNCTION__);
|
||||
res=_FAIL;
|
||||
}
|
||||
return res;
|
||||
|
@ -192,7 +192,7 @@ u8 rtl8188e_set_raid_cmd(struct adapter*padapter, u32 mask)
|
|||
|
||||
FillH2CCmd_88E(padapter, H2C_DM_MACID_CFG, 3, buf);
|
||||
}else{
|
||||
DBG_8192C("==>%s fw dont support RA \n",__FUNCTION__);
|
||||
DBG_8192C("==>%s fw dont support RA\n",__FUNCTION__);
|
||||
res=_FAIL;
|
||||
}
|
||||
return res;
|
||||
|
@ -309,7 +309,7 @@ void rtl8188e_set_FwMediaStatus_cmd(struct adapter *padapter, __le16 mstatus_rpt
|
|||
u32 reg_macid_no_link = REG_MACID_NO_LINK_0;
|
||||
opmode = (u8) mst_rpt;
|
||||
macid = (u8)(mst_rpt >> 8) ;
|
||||
DBG_871X("### %s: MStatus=%x MACID=%d \n", __FUNCTION__,opmode,macid);
|
||||
DBG_871X("### %s: MStatus=%x MACID=%d\n", __FUNCTION__,opmode,macid);
|
||||
FillH2CCmd_88E(padapter, H2C_COM_MEDIA_STATUS_RPT, sizeof(mst_rpt), (u8 *)&mst_rpt);
|
||||
|
||||
if(macid > 31){
|
||||
|
@ -857,11 +857,11 @@ void rtl8188e_set_p2p_ps_offload_cmd(struct adapter* padapter, u8 p2p_ps_state)
|
|||
switch(p2p_ps_state)
|
||||
{
|
||||
case P2P_PS_DISABLE:
|
||||
DBG_8192C("P2P_PS_DISABLE \n");
|
||||
DBG_8192C("P2P_PS_DISABLE\n");
|
||||
memset(p2p_ps_offload, 0 ,1);
|
||||
break;
|
||||
case P2P_PS_ENABLE:
|
||||
DBG_8192C("P2P_PS_ENABLE \n");
|
||||
DBG_8192C("P2P_PS_ENABLE\n");
|
||||
/* update CTWindow value. */
|
||||
if( pwdinfo->ctwindow > 0 )
|
||||
{
|
||||
|
@ -914,11 +914,11 @@ void rtl8188e_set_p2p_ps_offload_cmd(struct adapter* padapter, u8 p2p_ps_state)
|
|||
}
|
||||
break;
|
||||
case P2P_PS_SCAN:
|
||||
DBG_8192C("P2P_PS_SCAN \n");
|
||||
DBG_8192C("P2P_PS_SCAN\n");
|
||||
p2p_ps_offload->discovery = 1;
|
||||
break;
|
||||
case P2P_PS_SCAN_DONE:
|
||||
DBG_8192C("P2P_PS_SCAN_DONE \n");
|
||||
DBG_8192C("P2P_PS_SCAN_DONE\n");
|
||||
p2p_ps_offload->discovery = 0;
|
||||
pwdinfo->p2p_ps_state = P2P_PS_ENABLE;
|
||||
break;
|
||||
|
|
|
@ -167,7 +167,7 @@ efuse_phymap_to_logical(u8 * phymap, u16 _offset, u16 _size_byte, u8 *pbuf)
|
|||
u1temp =( (rtemp8 & 0xE0) >> 5);
|
||||
/* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x *rtemp&0xE0 0x%x\n", u1temp, *rtemp8 & 0xE0)); */
|
||||
|
||||
/* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x \n", u1temp)); */
|
||||
/* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x\n", u1temp)); */
|
||||
|
||||
rtemp8 = *(phymap+eFuse_Addr);
|
||||
|
||||
|
@ -207,7 +207,7 @@ efuse_phymap_to_logical(u8 * phymap, u16 _offset, u16 _size_byte, u8 *pbuf)
|
|||
/* Check word enable condition in the section */
|
||||
if(!(wren & 0x01))
|
||||
{
|
||||
/* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d \n", eFuse_Addr)); */
|
||||
/* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr)); */
|
||||
rtemp8 = *(phymap+eFuse_Addr);
|
||||
eFuse_Addr++;
|
||||
/* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); */
|
||||
|
@ -406,7 +406,7 @@ static s32 iol_read_efuse(
|
|||
s32 rtl8188e_iol_efuse_patch(struct adapter *padapter)
|
||||
{
|
||||
s32 result = _SUCCESS;
|
||||
printk("==> %s \n",__FUNCTION__);
|
||||
printk("==> %s\n",__FUNCTION__);
|
||||
|
||||
if(rtw_IOL_applied(padapter)){
|
||||
iol_mode_enable(padapter, 1);
|
||||
|
@ -442,7 +442,7 @@ static int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter, struct xmit_fram
|
|||
int ret = _FAIL;
|
||||
u32 t1,t2;
|
||||
|
||||
/* printk("===> %s ,bndy_cnt = %d \n",__FUNCTION__,bndy_cnt); */
|
||||
/* printk("===> %s ,bndy_cnt = %d\n",__FUNCTION__,bndy_cnt); */
|
||||
if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS)
|
||||
goto exit;
|
||||
{
|
||||
|
@ -461,7 +461,7 @@ static int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter, struct xmit_fram
|
|||
for(i=0;i<bndy_cnt;i++){
|
||||
u8 page_no = 0;
|
||||
page_no = i*2 ;
|
||||
/* printk(" i = %d, page_no = %d \n",i,page_no); */
|
||||
/* printk(" i = %d, page_no = %d\n",i,page_no); */
|
||||
if( (ret = iol_ioconfig(adapter, page_no)) != _SUCCESS)
|
||||
{
|
||||
break;
|
||||
|
@ -1127,7 +1127,7 @@ Hal_EfuseReadEFuse88E(
|
|||
u1temp =( (*rtemp8 & 0xE0) >> 5);
|
||||
/* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x *rtemp&0xE0 0x%x\n", u1temp, *rtemp8 & 0xE0)); */
|
||||
|
||||
/* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x \n", u1temp)); */
|
||||
/* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x\n", u1temp)); */
|
||||
|
||||
ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
|
||||
|
||||
|
@ -1167,7 +1167,7 @@ Hal_EfuseReadEFuse88E(
|
|||
/* Check word enable condition in the section */
|
||||
if(!(wren & 0x01))
|
||||
{
|
||||
/* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d \n", eFuse_Addr)); */
|
||||
/* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr)); */
|
||||
ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest);
|
||||
eFuse_Addr++;
|
||||
/* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); */
|
||||
|
@ -2930,7 +2930,7 @@ Hal_ReadPowerValueFromPROM_8188E(
|
|||
{
|
||||
/* printk(" IndexCCK_Base rfPath:%d group:%d,eeAddr:0x%02x ",rfPath,group,eeAddr); */
|
||||
pwrInfo24G->IndexCCK_Base[rfPath][group] = PROMContent[eeAddr++];
|
||||
/* printk(" IndexCCK_Base:%02x \n",pwrInfo24G->IndexCCK_Base[rfPath][group] ); */
|
||||
/* printk(" IndexCCK_Base:%02x\n",pwrInfo24G->IndexCCK_Base[rfPath][group] ); */
|
||||
if(pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF)
|
||||
{
|
||||
pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
|
||||
|
@ -2941,7 +2941,7 @@ Hal_ReadPowerValueFromPROM_8188E(
|
|||
{
|
||||
/* printk(" IndexBW40_Base rfPath:%d group:%d,eeAddr:0x%02x ",rfPath,group,eeAddr); */
|
||||
pwrInfo24G->IndexBW40_Base[rfPath][group] = PROMContent[eeAddr++];
|
||||
/* printk(" IndexBW40_Base: %02x \n",pwrInfo24G->IndexBW40_Base[rfPath][group] ); */
|
||||
/* printk(" IndexBW40_Base: %02x\n",pwrInfo24G->IndexBW40_Base[rfPath][group] ); */
|
||||
if(pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF)
|
||||
pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
|
||||
}
|
||||
|
@ -3059,7 +3059,7 @@ Hal_GetChnlGroup88E(
|
|||
*pGroup = 5;
|
||||
else
|
||||
{
|
||||
/* RT_TRACE(COMP_EFUSE,DBG_LOUD,("==>Hal_GetChnlGroup88E in 2.4 G, but Channel %d in Group not found \n",chnl)); */
|
||||
/* RT_TRACE(COMP_EFUSE,DBG_LOUD,("==>Hal_GetChnlGroup88E in 2.4 G, but Channel %d in Group not found\n",chnl)); */
|
||||
}
|
||||
}
|
||||
else
|
||||
|
@ -3094,7 +3094,7 @@ Hal_GetChnlGroup88E(
|
|||
*pGroup = 11;
|
||||
else
|
||||
{
|
||||
/* RT_TRACE(COMP_EFUSE,DBG_LOUD,("==>Hal_GetChnlGroup88E in 5G, but Channel %d in Group not found \n",chnl)); */
|
||||
/* RT_TRACE(COMP_EFUSE,DBG_LOUD,("==>Hal_GetChnlGroup88E in 5G, but Channel %d in Group not found\n",chnl)); */
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
@ -1031,7 +1031,7 @@ phy_BB8190_Config_HardCode(
|
|||
struct adapter *Adapter
|
||||
)
|
||||
{
|
||||
/* RT_ASSERT(false, ("This function is not implement yet!! \n")); */
|
||||
/* RT_ASSERT(false, ("This function is not implement yet!!\n")); */
|
||||
return _SUCCESS;
|
||||
}
|
||||
|
||||
|
@ -1312,7 +1312,7 @@ PHY_CheckBBAndRFOK(
|
|||
/* */
|
||||
if(ulRegRead != WriteData[i])
|
||||
{
|
||||
/* RT_TRACE(COMP_FPGA, DBG_LOUD, ("ulRegRead: %lx, WriteData: %lx \n", ulRegRead, WriteData[i])); */
|
||||
/* RT_TRACE(COMP_FPGA, DBG_LOUD, ("ulRegRead: %lx, WriteData: %lx\n", ulRegRead, WriteData[i])); */
|
||||
rtStatus = _FAIL;
|
||||
break;
|
||||
}
|
||||
|
@ -1335,14 +1335,14 @@ rtl8192c_PHY_GetHWRegOriginalValue(
|
|||
pHalData->DefaultInitialGain[2] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XCAGCCore1, bMaskByte0);
|
||||
pHalData->DefaultInitialGain[3] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XDAGCCore1, bMaskByte0);
|
||||
/* RT_TRACE(COMP_INIT, DBG_LOUD, */
|
||||
/* Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x) \n", */
|
||||
/* Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x)\n", */
|
||||
/* pHalData->DefaultInitialGain[0], pHalData->DefaultInitialGain[1], */
|
||||
/* pHalData->DefaultInitialGain[2], pHalData->DefaultInitialGain[3])); */
|
||||
|
||||
/* read framesync */
|
||||
pHalData->framesync = (u8)PHY_QueryBBReg(Adapter, rOFDM0_RxDetector3, bMaskByte0);
|
||||
pHalData->framesyncC34 = PHY_QueryBBReg(Adapter, rOFDM0_RxDetector2, bMaskDWord);
|
||||
/* RT_TRACE(COMP_INIT, DBG_LOUD, ("Default framesync (0x%x) = 0x%x \n", */
|
||||
/* RT_TRACE(COMP_INIT, DBG_LOUD, ("Default framesync (0x%x) = 0x%x\n", */
|
||||
/* rOFDM0_RxDetector3, pHalData->framesync)); */
|
||||
}
|
||||
|
||||
|
@ -1824,7 +1824,7 @@ _PHY_SetBWMode92C(
|
|||
|
||||
/* pHalData->SetBWModeInProgress= false; */
|
||||
|
||||
/* RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SetBWModeCallback8192C() \n" )); */
|
||||
/* RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SetBWModeCallback8192C()\n" )); */
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -232,8 +232,8 @@ rtl8188e_PHY_RF6052SetCckTxPower(
|
|||
|
||||
|
||||
ODM_TxPwrTrackAdjust88E(&pHalData->odmpriv, 1, &direction, &pwrtrac_value);
|
||||
/* printk("ODM_TxPwrTrackAdjust88E => direction:%02x, pwrtrac_value:%d \n", direction, pwrtrac_value); */
|
||||
/* printk(" ==> TxAGC:0x%08x \n",TxAGC[0] ); */
|
||||
/* printk("ODM_TxPwrTrackAdjust88E => direction:%02x, pwrtrac_value:%d\n", direction, pwrtrac_value); */
|
||||
/* printk(" ==> TxAGC:0x%08x\n",TxAGC[0] ); */
|
||||
|
||||
if (direction == 1) /* Increase TX pwoer */
|
||||
{
|
||||
|
@ -257,7 +257,7 @@ rtl8188e_PHY_RF6052SetCckTxPower(
|
|||
ptr++;
|
||||
}
|
||||
}
|
||||
/* printk(" ==> TxAGC:0x%08x \n",TxAGC[0] ); */
|
||||
/* printk(" ==> TxAGC:0x%08x\n",TxAGC[0] ); */
|
||||
|
||||
/* rf-A cck tx power */
|
||||
tmpval = TxAGC[RF_PATH_A]&0xff;
|
||||
|
@ -541,7 +541,7 @@ rtl8188e_PHY_RF6052SetOFDMTxPower(
|
|||
u8 index = 0;
|
||||
|
||||
|
||||
/* DBG_871X("PHY_RF6052SetOFDMTxPower, channel(%d) \n", Channel); */
|
||||
/* DBG_871X("PHY_RF6052SetOFDMTxPower, channel(%d)\n", Channel); */
|
||||
|
||||
getPowerBase88E(Adapter, pPowerLevelOFDM,pPowerLevelBW20,pPowerLevelBW40, Channel, &powerBase0[0], &powerBase1[0]);
|
||||
|
||||
|
|
|
@ -78,16 +78,16 @@ void rtl8188e_sreset_linked_status_check(struct adapter *padapter)
|
|||
u8 fw_status=0;
|
||||
rx_dma_status = rtw_read32(padapter,REG_RXDMA_STATUS);
|
||||
if(rx_dma_status!= 0x00){
|
||||
DBG_8192C("%s REG_RXDMA_STATUS:0x%08x \n",__FUNCTION__,rx_dma_status);
|
||||
DBG_8192C("%s REG_RXDMA_STATUS:0x%08x\n",__FUNCTION__,rx_dma_status);
|
||||
rtw_write32(padapter,REG_RXDMA_STATUS,rx_dma_status);
|
||||
}
|
||||
fw_status = rtw_read8(padapter,REG_FMETHR);
|
||||
if(fw_status != 0x00)
|
||||
{
|
||||
if(fw_status == 1)
|
||||
DBG_8192C("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !! \n",__FUNCTION__,fw_status);
|
||||
DBG_8192C("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !! \n",__FUNCTION__,fw_status);
|
||||
else if(fw_status == 2)
|
||||
DBG_8192C("%s REG_FW_STATUS (0x%02x), Condition_No_Match !! \n",__FUNCTION__,fw_status);
|
||||
DBG_8192C("%s REG_FW_STATUS (0x%02x), Condition_No_Match !! \n",__FUNCTION__,fw_status);
|
||||
}
|
||||
if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) {
|
||||
psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
|
||||
|
|
|
@ -260,7 +260,7 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bag
|
|||
ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x3F);
|
||||
|
||||
qsel = (uint)(pattrib->qsel & 0x0000001f);
|
||||
/* DBG_8192C("==> macid(%d) qsel:0x%02x \n",pattrib->mac_id,qsel); */
|
||||
/* DBG_8192C("==> macid(%d) qsel:0x%02x\n",pattrib->mac_id,qsel); */
|
||||
ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
|
||||
|
||||
ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< RATE_ID_SHT) & 0x000F0000);
|
||||
|
@ -568,12 +568,12 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *padapter, struct xmit_priv *pxm
|
|||
if (pxmitbuf == NULL) {
|
||||
pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
|
||||
if (pxmitbuf == NULL){
|
||||
/* DBG_871X("%s #1, connot alloc xmitbuf!!!! \n",__FUNCTION__); */
|
||||
/* DBG_871X("%s #1, connot alloc xmitbuf!!!!\n",__FUNCTION__); */
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
/* DBG_8192C("%s ===================================== \n",__FUNCTION__); */
|
||||
/* DBG_8192C("%s =====================================\n",__FUNCTION__); */
|
||||
/* 3 1. pick up first frame */
|
||||
do {
|
||||
rtw_free_xmitframe(pxmitpriv, pxmitframe);
|
||||
|
@ -614,7 +614,7 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *padapter, struct xmit_priv *pxm
|
|||
pxmitframe->pkt_offset = 1; /* first frame of aggregation, reserve offset */
|
||||
|
||||
if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == false) {
|
||||
DBG_871X("%s coalesce 1st xmitframe failed \n",__FUNCTION__);
|
||||
DBG_871X("%s coalesce 1st xmitframe failed\n",__FUNCTION__);
|
||||
continue;
|
||||
}
|
||||
|
||||
|
@ -731,7 +731,7 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *padapter, struct xmit_priv *pxm
|
|||
pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf;
|
||||
|
||||
if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == false) {
|
||||
DBG_871X("%s coalesce failed \n",__FUNCTION__);
|
||||
DBG_871X("%s coalesce failed\n",__FUNCTION__);
|
||||
rtw_free_xmitframe(pxmitpriv, pxmitframe);
|
||||
continue;
|
||||
}
|
||||
|
@ -808,7 +808,7 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *padapter, struct xmit_priv *pxm
|
|||
static s32 xmitframe_direct(struct adapter *padapter, struct xmit_frame *pxmitframe)
|
||||
{
|
||||
s32 res = _SUCCESS;
|
||||
/* DBG_8192C("==> %s \n",__FUNCTION__); */
|
||||
/* DBG_8192C("==> %s\n",__FUNCTION__); */
|
||||
|
||||
res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
|
||||
if (res == _SUCCESS) {
|
||||
|
|
|
@ -67,7 +67,7 @@ _ConfigNormalChipOutEP_8188E(
|
|||
break;
|
||||
|
||||
}
|
||||
DBG_871X("%s OutEpQueueSel(0x%02x), OutEpNumber(%d) \n",__FUNCTION__,pHalData->OutEpQueueSel,pHalData->OutEpNumber );
|
||||
DBG_871X("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n",__FUNCTION__,pHalData->OutEpQueueSel,pHalData->OutEpNumber );
|
||||
|
||||
}
|
||||
|
||||
|
@ -191,7 +191,7 @@ static void _InitPABias(struct adapter *padapter)
|
|||
/* efuse_one_byte_read(padapter, 0x1FA, &pa_setting); */
|
||||
pa_setting = EFUSE_Read1Byte(padapter, 0x1FA);
|
||||
|
||||
/* RT_TRACE(COMP_INIT, DBG_LOUD, ("_InitPABias 0x1FA 0x%x \n",pa_setting)); */
|
||||
/* RT_TRACE(COMP_INIT, DBG_LOUD, ("_InitPABias 0x1FA 0x%x\n",pa_setting)); */
|
||||
|
||||
if(!(pa_setting & BIT0))
|
||||
{
|
||||
|
@ -1317,7 +1317,7 @@ static u32 rtl8188eu_hal_init(struct adapter *Adapter)
|
|||
status = PHY_MACConfig8188E(Adapter);
|
||||
if(status == _FAIL)
|
||||
{
|
||||
DBG_871X(" ### Failed to init MAC ...... \n ");
|
||||
DBG_871X(" ### Failed to init MAC ......\n ");
|
||||
goto exit;
|
||||
}
|
||||
#endif
|
||||
|
@ -1330,7 +1330,7 @@ static u32 rtl8188eu_hal_init(struct adapter *Adapter)
|
|||
status = PHY_BBConfig8188E(Adapter);
|
||||
if(status == _FAIL)
|
||||
{
|
||||
DBG_871X(" ### Failed to init BB ...... \n ");
|
||||
DBG_871X(" ### Failed to init BB ......\n ");
|
||||
goto exit;
|
||||
}
|
||||
#endif
|
||||
|
@ -1341,7 +1341,7 @@ static u32 rtl8188eu_hal_init(struct adapter *Adapter)
|
|||
status = PHY_RFConfig8188E(Adapter);
|
||||
if(status == _FAIL)
|
||||
{
|
||||
DBG_871X(" ### Failed to init RF ...... \n ");
|
||||
DBG_871X(" ### Failed to init RF ......\n ");
|
||||
goto exit;
|
||||
}
|
||||
#endif
|
||||
|
@ -1349,7 +1349,7 @@ static u32 rtl8188eu_hal_init(struct adapter *Adapter)
|
|||
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH);
|
||||
status = rtl8188e_iol_efuse_patch(Adapter);
|
||||
if(status == _FAIL){
|
||||
DBG_871X("%s rtl8188e_iol_efuse_patch failed \n",__FUNCTION__);
|
||||
DBG_871X("%s rtl8188e_iol_efuse_patch failed\n",__FUNCTION__);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
|
@ -1630,7 +1630,7 @@ static u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
|
|||
{
|
||||
struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter);
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
DBG_8192C("==> %s \n",__FUNCTION__);
|
||||
DBG_8192C("==> %s\n",__FUNCTION__);
|
||||
|
||||
rtw_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
|
||||
rtw_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
|
||||
|
@ -1672,7 +1672,7 @@ static unsigned int rtl8188eu_inirp_init(struct adapter *Adapter)
|
|||
|
||||
status = _SUCCESS;
|
||||
|
||||
RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("===> usb_inirp_init \n"));
|
||||
RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("===> usb_inirp_init\n"));
|
||||
|
||||
precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR;
|
||||
|
||||
|
@ -1682,7 +1682,7 @@ static unsigned int rtl8188eu_inirp_init(struct adapter *Adapter)
|
|||
{
|
||||
if(_read_port(pintfhdl, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == false )
|
||||
{
|
||||
RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_port error \n"));
|
||||
RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_port error\n"));
|
||||
status = _FAIL;
|
||||
goto exit;
|
||||
}
|
||||
|
@ -1701,14 +1701,14 @@ static unsigned int rtl8188eu_inirp_init(struct adapter *Adapter)
|
|||
_read_interrupt = pintfhdl->io_ops._read_interrupt;
|
||||
if(_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == false )
|
||||
{
|
||||
RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_interrupt error \n"));
|
||||
RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_interrupt error\n"));
|
||||
status = _FAIL;
|
||||
}
|
||||
#endif
|
||||
|
||||
exit:
|
||||
|
||||
RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("<=== usb_inirp_init \n"));
|
||||
RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("<=== usb_inirp_init\n"));
|
||||
|
||||
;
|
||||
|
||||
|
@ -1718,11 +1718,11 @@ exit:
|
|||
|
||||
static unsigned int rtl8188eu_inirp_deinit(struct adapter *Adapter)
|
||||
{
|
||||
RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n ===> usb_rx_deinit \n"));
|
||||
RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n ===> usb_rx_deinit\n"));
|
||||
|
||||
rtw_read_port_cancel(Adapter);
|
||||
|
||||
RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n <=== usb_rx_deinit \n"));
|
||||
RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n <=== usb_rx_deinit\n"));
|
||||
|
||||
return _SUCCESS;
|
||||
}
|
||||
|
@ -2446,11 +2446,11 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8* val)
|
|||
break;
|
||||
case HW_VAR_ON_RCR_AM:
|
||||
rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_AM);
|
||||
DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(Adapter, REG_RCR));
|
||||
DBG_871X("%s, %d, RCR= %x\n", __FUNCTION__,__LINE__, rtw_read32(Adapter, REG_RCR));
|
||||
break;
|
||||
case HW_VAR_OFF_RCR_AM:
|
||||
rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)& (~RCR_AM));
|
||||
DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(Adapter, REG_RCR));
|
||||
DBG_871X("%s, %d, RCR= %x\n", __FUNCTION__,__LINE__, rtw_read32(Adapter, REG_RCR));
|
||||
break;
|
||||
case HW_VAR_BEACON_INTERVAL:
|
||||
rtw_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
|
||||
|
@ -2507,7 +2507,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8* val)
|
|||
break;
|
||||
case HW_VAR_DM_FLAG:
|
||||
podmpriv->SupportAbility = *((u8 *)val);
|
||||
/* DBG_871X("HW_VAR_DM_FLAG ==> SupportAbility:0x%08x \n",podmpriv->SupportAbility ); */
|
||||
/* DBG_871X("HW_VAR_DM_FLAG ==> SupportAbility:0x%08x\n",podmpriv->SupportAbility ); */
|
||||
break;
|
||||
case HW_VAR_DM_FUNC_OP:
|
||||
if(val[0])
|
||||
|
@ -2518,7 +2518,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8* val)
|
|||
{/* restore dm flag */
|
||||
podmpriv->SupportAbility = podmpriv->BK_SupportAbility;
|
||||
}
|
||||
/* DBG_871X("HW_VAR_DM_FUNC_OP ==> %s SupportAbility:0x%08x \n", */
|
||||
/* DBG_871X("HW_VAR_DM_FUNC_OP ==> %s SupportAbility:0x%08x\n", */
|
||||
/* (val[0]==1)?"Save":"Restore", */
|
||||
/* podmpriv->SupportAbility */
|
||||
/* ); */
|
||||
|
@ -2531,7 +2531,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8* val)
|
|||
else{
|
||||
podmpriv->SupportAbility |= *((u32 *)val);
|
||||
}
|
||||
/* DBG_871X("HW_VAR_DM_FUNC_SET ==> SupportAbility:0x%08x \n",podmpriv->SupportAbility ); */
|
||||
/* DBG_871X("HW_VAR_DM_FUNC_SET ==> SupportAbility:0x%08x\n",podmpriv->SupportAbility ); */
|
||||
break;
|
||||
case HW_VAR_DM_FUNC_CLR:
|
||||
podmpriv->SupportAbility &= *((u32 *)val);
|
||||
|
@ -2562,9 +2562,9 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8* val)
|
|||
ulCommand= ulCommand | CAM_POLLINIG|CAM_WRITE;
|
||||
/* write content 0 is equall to mark invalid */
|
||||
rtw_write32(Adapter, WCAMI, ulContent); /* delay_ms(40); */
|
||||
/* RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A4: %lx \n",ulContent)); */
|
||||
/* RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A4: %lx\n",ulContent)); */
|
||||
rtw_write32(Adapter, RWCAM, ulCommand); /* delay_ms(40); */
|
||||
/* RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A0: %lx \n",ulCommand)); */
|
||||
/* RT_TRACE(COMP_SEC, DBG_LOUD, ("CAM_empty_entry(): WRITE A0: %lx\n",ulCommand)); */
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
@ -2811,7 +2811,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8* val)
|
|||
break;
|
||||
}while(trycnt--);
|
||||
if(trycnt ==0)
|
||||
DBG_8192C("Stop RX DMA failed...... \n");
|
||||
DBG_8192C("Stop RX DMA failed......\n");
|
||||
|
||||
/* RQPN Load 0 */
|
||||
rtw_write16(Adapter,REG_RQPN_NPQ,0x0);
|
||||
|
@ -3371,7 +3371,7 @@ void rtl8188eu_set_hal_ops(struct adapter * padapter)
|
|||
|
||||
padapter->HalData = rtw_zmalloc(sizeof(HAL_DATA_TYPE));
|
||||
if(padapter->HalData == NULL){
|
||||
DBG_8192C("cant not alloc memory for HAL DATA \n");
|
||||
DBG_8192C("cant not alloc memory for HAL DATA\n");
|
||||
}
|
||||
|
||||
padapter->hal_data_sz = sizeof(HAL_DATA_TYPE);
|
||||
|
|
|
@ -58,7 +58,7 @@ static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u
|
|||
pIo_buf = pdvobjpriv->usb_vendor_req_buf;
|
||||
|
||||
if ( pIo_buf== NULL) {
|
||||
DBG_8192C( "[%s] pIo_buf == NULL \n", __FUNCTION__ );
|
||||
DBG_8192C( "[%s] pIo_buf == NULL\n", __FUNCTION__ );
|
||||
status = -ENOMEM;
|
||||
goto release_mutex;
|
||||
}
|
||||
|
@ -301,13 +301,13 @@ static void interrupt_handler_8188eu(struct adapter *padapter,u16 pkt_len,u8 *pb
|
|||
memcpy(&(pHalData->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4);
|
||||
|
||||
if ( pHalData->IntArray[1] & IMR_TXERR_88E )
|
||||
DBG_871X("===> %s Tx Error Flag Interrupt Status \n",__FUNCTION__);
|
||||
DBG_871X("===> %s Tx Error Flag Interrupt Status\n",__FUNCTION__);
|
||||
if ( pHalData->IntArray[1] & IMR_RXERR_88E )
|
||||
DBG_871X("===> %s Rx Error Flag INT Status \n",__FUNCTION__);
|
||||
DBG_871X("===> %s Rx Error Flag INT Status\n",__FUNCTION__);
|
||||
if ( pHalData->IntArray[1] & IMR_TXFOVW_88E )
|
||||
DBG_871X("===> %s Transmit FIFO Overflow \n",__FUNCTION__);
|
||||
DBG_871X("===> %s Transmit FIFO Overflow\n",__FUNCTION__);
|
||||
if ( pHalData->IntArray[1] & IMR_RXFOVW_88E )
|
||||
DBG_871X("===> %s Receive FIFO Overflow \n",__FUNCTION__);
|
||||
DBG_871X("===> %s Receive FIFO Overflow\n",__FUNCTION__);
|
||||
|
||||
/* C2H Event */
|
||||
if (pbuf[0]!= 0){
|
||||
|
@ -478,7 +478,7 @@ static int recvbuf2recvframe(struct adapter *padapter, struct sk_buff *pskb)
|
|||
if ((pattrib->pkt_len<=0) || (pkt_offset>transfer_len))
|
||||
{
|
||||
RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n"));
|
||||
DBG_8192C("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfoer_len \n", __FUNCTION__, __LINE__);
|
||||
DBG_8192C("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfoer_len\n", __FUNCTION__, __LINE__);
|
||||
rtw_free_recvframe(precvframe, pfree_recv_queue);
|
||||
goto _exit_recvbuf2recvframe;
|
||||
}
|
||||
|
@ -528,7 +528,7 @@ static int recvbuf2recvframe(struct adapter *padapter, struct sk_buff *pskb)
|
|||
{
|
||||
if ((pattrib->mfrag == 1)&&(pattrib->frag_num == 0))
|
||||
{
|
||||
DBG_8192C("recvbuf2recvframe: alloc_skb fail , drop frag frame \n");
|
||||
DBG_8192C("recvbuf2recvframe: alloc_skb fail , drop frag frame\n");
|
||||
rtw_free_recvframe(precvframe, pfree_recv_queue);
|
||||
goto _exit_recvbuf2recvframe;
|
||||
}
|
||||
|
@ -577,12 +577,12 @@ static int recvbuf2recvframe(struct adapter *padapter, struct sk_buff *pskb)
|
|||
} else{ /* pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP */
|
||||
/* enqueue recvframe to txrtp queue */
|
||||
if (pattrib->pkt_rpt_type == TX_REPORT1){
|
||||
/* DBG_8192C("rx CCX \n"); */
|
||||
/* DBG_8192C("rx CCX\n"); */
|
||||
/* CCX-TXRPT ack for xmit mgmt frames. */
|
||||
handle_txrpt_ccx_88e(padapter, precvframe->u.hdr.rx_data);
|
||||
}
|
||||
else if (pattrib->pkt_rpt_type == TX_REPORT2){
|
||||
/* DBG_8192C("rx TX RPT \n"); */
|
||||
/* DBG_8192C("rx TX RPT\n"); */
|
||||
ODM_RA_TxRPT2Handle_8188E(
|
||||
&pHalData->odmpriv,
|
||||
precvframe->u.hdr.rx_data,
|
||||
|
@ -622,7 +622,7 @@ void rtl8188eu_recv_tasklet(void *priv)
|
|||
{
|
||||
if ((padapter->bDriverStopped == true)||(padapter->bSurpriseRemoved== true))
|
||||
{
|
||||
DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n");
|
||||
DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved\n");
|
||||
rtw_skb_free(pskb);
|
||||
break;
|
||||
}
|
||||
|
@ -699,7 +699,7 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
|
|||
}
|
||||
else
|
||||
{
|
||||
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status));
|
||||
RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0\n", purb->status));
|
||||
|
||||
DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status);
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue