rtl8188eu: Remove all unused code for DM_ODM_SUPPORT_TYPE of ODM_WIN and ODM_AP

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2018-10-15 03:55:32 -05:00
parent e5bc0e7d9b
commit ab27643547
8 changed files with 65 additions and 2392 deletions

File diff suppressed because it is too large Load diff

View file

@ -130,19 +130,9 @@
#define config_phydm_read_txagc_check(data) (data != INVALID_TXAGC_DATA) #define config_phydm_read_txagc_check(data) (data != INVALID_TXAGC_DATA)
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#define dbg_print DbgPrint
#define dcmd_printf DCMD_Printf
#define dcmd_scanf DCMD_Scanf
#define RT_PRINTK dbg_print
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#define dbg_print printk #define dbg_print printk
#define RT_PRINTK(fmt, args...) dbg_print("%s(): " fmt, __FUNCTION__, ## args); #define RT_PRINTK(fmt, args...) dbg_print("%s(): " fmt, __FUNCTION__, ## args);
#define RT_DISP(dbgtype, dbgflag, printstr) #define RT_DISP(dbgtype, dbgflag, printstr)
#else
#define dbg_print panic_printk
#define RT_PRINTK(fmt, args...) dbg_print("%s(): " fmt, __FUNCTION__, ## args);
#endif
#ifndef ASSERT #ifndef ASSERT
#define ASSERT(expr) #define ASSERT(expr)
@ -224,29 +214,7 @@ phydm_init_debug_setting(struct PHY_DM_STRUCT *p_dm_odm);
void phydm_basic_dbg_message(void *p_dm_void); void phydm_basic_dbg_message(void *p_dm_void);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#define PHYDM_DBGPRINT 0 #define PHYDM_DBGPRINT 0
#define PHYDM_SSCANF(x, y, z) dcmd_scanf(x, y, z)
#define PHYDM_VAST_INFO_SNPRINTF PHYDM_SNPRINTF
#if (PHYDM_DBGPRINT == 1)
#define PHYDM_SNPRINTF(msg) \
do {\
rsprintf msg;\
dbg_print(output);\
} while (0)
#else
#define PHYDM_SNPRINTF(msg) \
do {\
rsprintf msg;\
dcmd_printf(output);\
} while (0)
#endif
#else
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) || defined(__OSK__)
#define PHYDM_DBGPRINT 0
#else
#define PHYDM_DBGPRINT 1
#endif
#define MAX_ARGC 20 #define MAX_ARGC 20
#define MAX_ARGV 16 #define MAX_ARGV 16
#define DCMD_DECIMAL "%d" #define DCMD_DECIMAL "%d"
@ -274,8 +242,6 @@ void phydm_basic_dbg_message(void *p_dm_void);
used += snprintf msg;\ used += snprintf msg;\
} while (0) } while (0)
#endif #endif
#endif
void phydm_basic_profile( void phydm_basic_profile(
void *p_dm_void, void *p_dm_void,
@ -283,7 +249,6 @@ void phydm_basic_profile(
char *output, char *output,
u32 *_out_len u32 *_out_len
); );
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
s32 s32
phydm_cmd( phydm_cmd(
struct PHY_DM_STRUCT *p_dm_odm, struct PHY_DM_STRUCT *p_dm_odm,
@ -293,7 +258,7 @@ phydm_cmd(
char *output, char *output,
u32 out_len u32 out_len
); );
#endif
void void
phydm_cmd_parser( phydm_cmd_parser(
struct PHY_DM_STRUCT *p_dm_odm, struct PHY_DM_STRUCT *p_dm_odm,
@ -312,20 +277,6 @@ phydm_api_trx_mode(
bool is_tx2_path bool is_tx2_path
); );
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void phydm_sbd_check(
struct PHY_DM_STRUCT *p_dm_odm
);
void phydm_sbd_callback(
struct timer_list *p_timer
);
void phydm_sbd_workitem_callback(
void *p_context
);
#endif
void void
phydm_fw_trace_en_h2c( phydm_fw_trace_en_h2c(
void *p_dm_void, void *p_dm_void,

View file

@ -94,14 +94,6 @@ struct _dynamic_initial_gain_threshold_ {
u32 cck_fa_ma; u32 cck_fa_ma;
enum dig_goupcheck_level dig_go_up_check_level; enum dig_goupcheck_level dig_go_up_check_level;
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
bool is_tp_target;
bool is_noise_est;
u32 tp_train_th_min;
u8 igi_offset_a;
u8 igi_offset_b;
#endif
#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1 || RTL8821C_SUPPORT == 1) #if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
u8 rf_gain_idx; u8 rf_gain_idx;
u8 agc_table_idx; u8 agc_table_idx;
@ -232,27 +224,13 @@ enum phydm_pause_level {
#define DM_DIG_MAX_AP_HP 0x42 #define DM_DIG_MAX_AP_HP 0x42
#define DM_DIG_MIN_AP_HP 0x30 #define DM_DIG_MIN_AP_HP 0x30
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
#define DM_DIG_MAX_AP_COVERAGR 0x26
#define DM_DIG_MIN_AP_COVERAGE 0x1c
#define DM_DIG_MAX_OF_MIN_COVERAGE 0x22
#define dm_dig_tp_target_th0 500
#define dm_dig_tp_target_th1 1000
#define dm_dig_tp_training_period 10
#endif
/* vivi 92c&92d has different definition, 20110504 /* vivi 92c&92d has different definition, 20110504
* this is for 92c */ * this is for 92c */
#if (DM_ODM_SUPPORT_TYPE & ODM_CE)
#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
#define DM_DIG_FA_TH0 0x80/* 0x20 */ #define DM_DIG_FA_TH0 0x80/* 0x20 */
#else #else
#define DM_DIG_FA_TH0 0x200/* 0x20 */ #define DM_DIG_FA_TH0 0x200/* 0x20 */
#endif #endif
#else
#define DM_DIG_FA_TH0 0x200/* 0x20 */
#endif
#define DM_DIG_FA_TH1 0x300 #define DM_DIG_FA_TH1 0x300
#define DM_DIG_FA_TH2 0x400 #define DM_DIG_FA_TH2 0x400
@ -337,32 +315,4 @@ phydm_dig_go_up_check(
void *p_dm_void void *p_dm_void
); );
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void
odm_mpt_dig_callback(
struct timer_list *p_timer
);
void
odm_mpt_dig_work_item_callback(
void *p_context
);
#endif
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
void
odm_mpt_dig_callback(
void *p_dm_void
);
#endif
#if (DM_ODM_SUPPORT_TYPE != ODM_CE)
void
ODM_MPT_DIG(
void *p_dm_void
);
#endif
#endif #endif

View file

@ -185,45 +185,6 @@ phydm_dynamic_rx_path(
} }
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void
phydm_dynamic_rx_path_callback(
struct timer_list *p_timer
)
{
struct _ADAPTER *adapter = (struct _ADAPTER *)p_timer->adapter;
HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter);
struct PHY_DM_STRUCT *p_dm_odm = &(p_hal_data->DM_OutSrc);
struct _DYNAMIC_RX_PATH_ *p_dm_drp_table = &(p_dm_odm->dm_drp_table);
#if DEV_BUS_TYPE == RT_PCI_INTERFACE
#if USE_WORKITEM
odm_schedule_work_item(&(p_dm_drp_table->phydm_dynamic_rx_path_workitem));
#else
{
/* dbg_print("phydm_dynamic_rx_path\n"); */
phydm_dynamic_rx_path(p_dm_odm);
}
#endif
#else
odm_schedule_work_item(&(p_dm_drp_table->phydm_dynamic_rx_path_workitem));
#endif
}
void
phydm_dynamic_rx_path_workitem_callback(
void *p_context
)
{
struct _ADAPTER *p_adapter = (struct _ADAPTER *)p_context;
HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(p_adapter);
struct PHY_DM_STRUCT *p_dm_odm = &(p_hal_data->DM_OutSrc);
/* dbg_print("phydm_dynamic_rx_path\n"); */
phydm_dynamic_rx_path(p_dm_odm);
}
#else if (DM_ODM_SUPPORT_TYPE == ODM_CE)
void void
phydm_dynamic_rx_path_callback( phydm_dynamic_rx_path_callback(
void *function_context void *function_context
@ -234,16 +195,8 @@ phydm_dynamic_rx_path_callback(
if (padapter->net_closed == _TRUE) if (padapter->net_closed == _TRUE)
return; return;
#if 0 /* Can't do I/O in timer callback*/
odm_s0s1_sw_ant_div(p_dm_odm, SWAW_STEP_DETERMINE);
#else
/*rtw_run_in_thread_cmd(padapter, odm_sw_antdiv_workitem_callback, padapter);*/
#endif
} }
#endif
void void
phydm_dynamic_rx_path_timers( phydm_dynamic_rx_path_timers(
void *p_dm_void, void *p_dm_void,

View file

@ -64,14 +64,7 @@ struct _DYNAMIC_RX_PATH_ {
u8 drp_skip_counter; u8 drp_skip_counter;
u8 drp_period; u8 drp_period;
u8 drp_init_finished; u8 drp_init_finished;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#if USE_WORKITEM
RT_WORK_ITEM phydm_dynamic_rx_path_workitem;
#endif
#endif
struct timer_list phydm_dynamic_rx_path_timer; struct timer_list phydm_dynamic_rx_path_timer;
}; };
@ -83,30 +76,9 @@ phydm_process_phy_status_for_dynamic_rx_path(
void *p_pkt_info_void void *p_pkt_info_void
); );
void void phydm_dynamic_rx_path(void *p_dm_void);
phydm_dynamic_rx_path(
void *p_dm_void
);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) void phydm_dynamic_rx_path_callback(void *function_context);
void
phydm_dynamic_rx_path_callback(
struct timer_list *p_timer
);
void
phydm_dynamic_rx_path_workitem_callback(
void *p_context
);
#else if (DM_ODM_SUPPORT_TYPE == ODM_CE)
void
phydm_dynamic_rx_path_callback(
void *function_context
);
#endif
void void
phydm_dynamic_rx_path_timers( phydm_dynamic_rx_path_timers(

View file

@ -23,40 +23,12 @@
#include "phydm_types.h" #include "phydm_types.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#include "Precomp.h" /* We need to include mp_precomp.h due to batch file setting. */
#else
#define TEST_FALG___ 1 #define TEST_FALG___ 1
#endif
/* 2 Config Flags and Structs - defined by each ODM type */ /* 2 Config Flags and Structs - defined by each ODM type */
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#include "../8192cd_cfg.h"
#include "../odm_inc.h"
#include "../8192cd.h"
#include "../8192cd_util.h"
#ifdef _BIG_ENDIAN_
#define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG
#else
#define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE
#endif
#ifdef AP_BUILD_WORKAROUND
#include "../8192cd_headers.h"
#include "../8192cd_debug.h"
#endif
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#define __PACK #define __PACK
#define __WLAN_ATTRIB_PACK__ #define __WLAN_ATTRIB_PACK__
#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#include "mp_precomp.h"
#define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE
#define __PACK
#define __WLAN_ATTRIB_PACK__
#endif
/* 2 OutSrc Header Files */ /* 2 OutSrc Header Files */
@ -70,7 +42,6 @@
#include "phydm_adc_sampling.h" #include "phydm_adc_sampling.h"
#if (DM_ODM_SUPPORT_TYPE & ODM_CE)
void void
phy_set_tx_power_limit( phy_set_tx_power_limit(
@ -84,14 +55,6 @@ phy_set_tx_power_limit(
u8 *power_limit u8 *power_limit
); );
#endif
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
#define RTL8703B_SUPPORT 0
#define RTL8188F_SUPPORT 0
#define RTL8723D_SUPPORT 0
#endif
#if RTL8188E_SUPPORT == 1 #if RTL8188E_SUPPORT == 1
#define RTL8188E_T_SUPPORT 1 #define RTL8188E_T_SUPPORT 1
#ifdef CONFIG_SFW_SUPPORTED #ifdef CONFIG_SFW_SUPPORTED
@ -112,66 +75,37 @@ phy_set_tx_power_limit(
#include "rtl8188e/phydm_rtl8188e.h" #include "rtl8188e/phydm_rtl8188e.h"
#include "rtl8188e/hal8188ereg.h" #include "rtl8188e/hal8188ereg.h"
#include "rtl8188e/version_rtl8188e.h" #include "rtl8188e/version_rtl8188e.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "rtl8188e_hal.h" #include "rtl8188e_hal.h"
#include "rtl8188e/halphyrf_8188e_ce.h" #include "rtl8188e/halphyrf_8188e_ce.h"
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#include "rtl8188e/halphyrf_8188e_win.h"
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#include "rtl8188e/halphyrf_8188e_ap.h"
#endif
#endif /* 88E END */ #endif /* 88E END */
#if (RTL8192E_SUPPORT == 1) #if (RTL8192E_SUPPORT == 1)
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#include "rtl8192e/halphyrf_8192e_win.h" /*FOR_8192E_IQK*/
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
#include "rtl8192e/halphyrf_8192e_ap.h" /*FOR_8192E_IQK*/
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "rtl8192e/halphyrf_8192e_ce.h" /*FOR_8192E_IQK*/ #include "rtl8192e/halphyrf_8192e_ce.h" /*FOR_8192E_IQK*/
#endif
#include "rtl8192e/phydm_rtl8192e.h" /* FOR_8192E_IQK */ #include "rtl8192e/phydm_rtl8192e.h" /* FOR_8192E_IQK */
#include "rtl8192e/version_rtl8192e.h" #include "rtl8192e/version_rtl8192e.h"
#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
#include "rtl8192e/halhwimg8192e_bb.h" #include "rtl8192e/halhwimg8192e_bb.h"
#include "rtl8192e/halhwimg8192e_mac.h" #include "rtl8192e/halhwimg8192e_mac.h"
#include "rtl8192e/halhwimg8192e_rf.h" #include "rtl8192e/halhwimg8192e_rf.h"
#include "rtl8192e/phydm_regconfig8192e.h" #include "rtl8192e/phydm_regconfig8192e.h"
#include "rtl8192e/halhwimg8192e_fw.h" #include "rtl8192e/halhwimg8192e_fw.h"
#include "rtl8192e/hal8192ereg.h" #include "rtl8192e/hal8192ereg.h"
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "rtl8192e_hal.h" #include "rtl8192e_hal.h"
#endif
#endif /* 92E END */ #endif /* 92E END */
#if (RTL8812A_SUPPORT == 1) #if (RTL8812A_SUPPORT == 1)
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#include "rtl8812a/halphyrf_8812a_win.h"
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
#include "rtl8812a/halphyrf_8812a_ap.h"
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "rtl8812a/halphyrf_8812a_ce.h" #include "rtl8812a/halphyrf_8812a_ce.h"
#endif
/* #include "rtl8812a/HalPhyRf_8812A.h" */ /* FOR_8812_IQK */ /* #include "rtl8812a/HalPhyRf_8812A.h" */ /* FOR_8812_IQK */
#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
#include "rtl8812a/halhwimg8812a_bb.h" #include "rtl8812a/halhwimg8812a_bb.h"
#include "rtl8812a/halhwimg8812a_mac.h" #include "rtl8812a/halhwimg8812a_mac.h"
#include "rtl8812a/halhwimg8812a_rf.h" #include "rtl8812a/halhwimg8812a_rf.h"
#include "rtl8812a/phydm_regconfig8812a.h" #include "rtl8812a/phydm_regconfig8812a.h"
#include "rtl8812a/halhwimg8812a_fw.h" #include "rtl8812a/halhwimg8812a_fw.h"
#include "rtl8812a/phydm_rtl8812a.h" #include "rtl8812a/phydm_rtl8812a.h"
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "rtl8812a_hal.h" #include "rtl8812a_hal.h"
#endif
#include "rtl8812a/version_rtl8812a.h" #include "rtl8812a/version_rtl8812a.h"
#endif /* 8812 END */ #endif /* 8812 END */
@ -183,35 +117,15 @@ phy_set_tx_power_limit(
#include "rtl8814a/halhwimg8814a_bb.h" #include "rtl8814a/halhwimg8814a_bb.h"
#include "rtl8814a/version_rtl8814a.h" #include "rtl8814a/version_rtl8814a.h"
#include "rtl8814a/phydm_rtl8814a.h" #include "rtl8814a/phydm_rtl8814a.h"
#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
#include "rtl8814a/halhwimg8814a_fw.h" #include "rtl8814a/halhwimg8814a_fw.h"
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#include "rtl8814a/halphyrf_8814a_win.h"
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "rtl8814a/halphyrf_8814a_ce.h" #include "rtl8814a/halphyrf_8814a_ce.h"
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
#include "rtl8814a/halphyrf_8814a_ap.h"
#endif
#include "rtl8814a/phydm_regconfig8814a.h" #include "rtl8814a/phydm_regconfig8814a.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "rtl8814a_hal.h" #include "rtl8814a_hal.h"
#include "rtl8814a/phydm_iqk_8814a.h" #include "rtl8814a/phydm_iqk_8814a.h"
#endif
#endif /* 8814 END */ #endif /* 8814 END */
#if (RTL8881A_SUPPORT == 1)/* FOR_8881_IQK */ #if (RTL8881A_SUPPORT == 1)/* FOR_8881_IQK */
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#include "rtl8821a/phydm_iqk_8821a_win.h"
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "rtl8821a/phydm_iqk_8821a_ce.h" #include "rtl8821a/phydm_iqk_8821a_ce.h"
#else
#include "rtl8821a/phydm_iqk_8821a_ap.h"
#endif
/* #include "rtl8881a/HalHWImg8881A_BB.h" */
/* #include "rtl8881a/HalHWImg8881A_MAC.h" */
/* #include "rtl8881a/HalHWImg8881A_RF.h" */
/* #include "rtl8881a/odm_RegConfig8881A.h" */
#endif #endif
#if (RTL8723B_SUPPORT == 1) #if (RTL8723B_SUPPORT == 1)
@ -223,15 +137,9 @@ phy_set_tx_power_limit(
#include "rtl8723b/phydm_rtl8723b.h" #include "rtl8723b/phydm_rtl8723b.h"
#include "rtl8723b/hal8723breg.h" #include "rtl8723b/hal8723breg.h"
#include "rtl8723b/version_rtl8723b.h" #include "rtl8723b/version_rtl8723b.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#include "rtl8723b/halphyrf_8723b_win.h"
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "rtl8723b/halphyrf_8723b_ce.h" #include "rtl8723b/halphyrf_8723b_ce.h"
#include "rtl8723b/halhwimg8723b_mp.h" #include "rtl8723b/halhwimg8723b_mp.h"
#include "rtl8723b_hal.h" #include "rtl8723b_hal.h"
#else
#include "rtl8723b/halphyrf_8723b_ap.h"
#endif
#endif #endif
#if (RTL8821A_SUPPORT == 1) #if (RTL8821A_SUPPORT == 1)
@ -242,15 +150,10 @@ phy_set_tx_power_limit(
#include "rtl8821a/phydm_regconfig8821a.h" #include "rtl8821a/phydm_regconfig8821a.h"
#include "rtl8821a/phydm_rtl8821a.h" #include "rtl8821a/phydm_rtl8821a.h"
#include "rtl8821a/version_rtl8821a.h" #include "rtl8821a/version_rtl8821a.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#include "rtl8821a/halphyrf_8821a_win.h"
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "rtl8821a/halphyrf_8821a_ce.h" #include "rtl8821a/halphyrf_8821a_ce.h"
#include "rtl8821a/phydm_iqk_8821a_ce.h"/*for IQK*/ #include "rtl8821a/phydm_iqk_8821a_ce.h"/*for IQK*/
#include "rtl8812a/halphyrf_8812a_ce.h"/*for IQK,LCK,Power-tracking*/ #include "rtl8812a/halphyrf_8812a_ce.h"/*for IQK,LCK,Power-tracking*/
#include "rtl8812a_hal.h" #include "rtl8812a_hal.h"
#else
#endif
#endif #endif
#if (RTL8822B_SUPPORT == 1) #if (RTL8822B_SUPPORT == 1)
@ -264,12 +167,8 @@ phy_set_tx_power_limit(
#include "rtl8822b/phydm_hal_api8822b.h" #include "rtl8822b/phydm_hal_api8822b.h"
#include "rtl8822b/version_rtl8822b.h" #include "rtl8822b/version_rtl8822b.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include <hal_data.h> /* struct HAL_DATA_TYPE */ #include <hal_data.h> /* struct HAL_DATA_TYPE */
#include <rtl8822b_hal.h> /* RX_SMOOTH_FACTOR, reg definition and etc.*/ #include <rtl8822b_hal.h> /* RX_SMOOTH_FACTOR, reg definition and etc.*/
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
#endif
#endif #endif
@ -281,10 +180,8 @@ phy_set_tx_power_limit(
#include "rtl8703b/halhwimg8703b_fw.h" #include "rtl8703b/halhwimg8703b_fw.h"
#include "rtl8703b/halphyrf_8703b.h" #include "rtl8703b/halphyrf_8703b.h"
#include "rtl8703b/version_rtl8703b.h" #include "rtl8703b/version_rtl8703b.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "rtl8703b_hal.h" #include "rtl8703b_hal.h"
#endif #endif
#endif
#if (RTL8188F_SUPPORT == 1) #if (RTL8188F_SUPPORT == 1)
#include "rtl8188f/halhwimg8188f_mac.h" #include "rtl8188f/halhwimg8188f_mac.h"
@ -296,14 +193,10 @@ phy_set_tx_power_limit(
#include "rtl8188f/phydm_regconfig8188f.h" #include "rtl8188f/phydm_regconfig8188f.h"
#include "rtl8188f/halphyrf_8188f.h" /* for IQK,LCK,Power-tracking */ #include "rtl8188f/halphyrf_8188f.h" /* for IQK,LCK,Power-tracking */
#include "rtl8188f/version_rtl8188f.h" #include "rtl8188f/version_rtl8188f.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "rtl8188f_hal.h" #include "rtl8188f_hal.h"
#endif #endif
#endif
#if (RTL8723D_SUPPORT == 1) #if (RTL8723D_SUPPORT == 1)
#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
#include "rtl8723d/halhwimg8723d_bb.h" #include "rtl8723d/halhwimg8723d_bb.h"
#include "rtl8723d/halhwimg8723d_mac.h" #include "rtl8723d/halhwimg8723d_mac.h"
#include "rtl8723d/halhwimg8723d_rf.h" #include "rtl8723d/halhwimg8723d_rf.h"
@ -313,10 +206,7 @@ phy_set_tx_power_limit(
#include "rtl8723d/phydm_rtl8723d.h" #include "rtl8723d/phydm_rtl8723d.h"
#include "rtl8723d/halphyrf_8723d.h" #include "rtl8723d/halphyrf_8723d.h"
#include "rtl8723d/version_rtl8723d.h" #include "rtl8723d/version_rtl8723d.h"
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "rtl8723d_hal.h" #include "rtl8723d_hal.h"
#endif
#endif /* 8723D End */ #endif /* 8723D End */
#if (RTL8197F_SUPPORT == 1) #if (RTL8197F_SUPPORT == 1)
@ -343,9 +233,7 @@ phy_set_tx_power_limit(
#include "rtl8821c/phydm_regconfig8821c.h" #include "rtl8821c/phydm_regconfig8821c.h"
#include "rtl8821c/halphyrf_8821c.h" #include "rtl8821c/halphyrf_8821c.h"
#include "rtl8821c/version_rtl8821c.h" #include "rtl8821c/version_rtl8821c.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "rtl8821c_hal.h" #include "rtl8821c_hal.h"
#endif #endif
#endif
#endif /* __ODM_PRECOMP_H__ */ #endif /* __ODM_PRECOMP_H__ */

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@ -143,40 +143,6 @@ struct signal_stat {
u32 total_num; /* num of valid elements */ u32 total_num; /* num of valid elements */
u32 total_val; /* sum of valid elements */ u32 total_val; /* sum of valid elements */
}; };
#if 0
typedef struct _ODM_Phy_Status_Info_ {
/* */
/* Be care, if you want to add any element please insert between */
/* RxPWDBAll & SignalStrength. */
/* */
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
u4Byte RxPWDBAll;
#else
u1Byte RxPWDBAll;
#endif
u1Byte SignalQuality; /* in 0-100 index. */
s1Byte RxMIMOSignalQuality[4]; /* per-path's EVM */
u1Byte RxMIMOEVMdbm[4]; /* per-path's EVM dbm */
u1Byte RxMIMOSignalStrength[4];/* in 0~100 index */
u2Byte Cfo_short[4]; /* per-path's Cfo_short */
u2Byte Cfo_tail[4]; /* per-path's Cfo_tail */
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
s1Byte RxPower; /* in dBm Translate from PWdB */
s1Byte RecvSignalPower; /* Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures. */
u1Byte BTRxRSSIPercentage;
u1Byte SignalStrength; /* in 0-100 index. */
u1Byte RxPwr[4]; /* per-path's pwdb */
#endif
u1Byte RxSNR[4]; /* per-path's SNR */
u1Byte BandWidth;
u1Byte btCoexPwrAdjust;
} ODM_PHY_INFO_T, *PODM_PHY_INFO_T;
#endif
struct phy_info { struct phy_info {
u8 RxPWDBAll; u8 RxPWDBAll;