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rtl8188eu: Remove RTL8192C_RECONFIG_TO_1T1R
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
parent
4c042ff344
commit
bef55d3a6c
4 changed files with 2 additions and 34 deletions
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@ -2991,21 +2991,11 @@ void rtw_update_ht_cap(struct adapter *padapter, u8 *pie, uint ie_len)
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padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
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padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
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/* update the MCS rates */
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/* update the MCS rates */
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for (i = 0; i < 16; i++)
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for (i = 0; i < 16; i++) {
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{
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if((rf_type == RF_1T1R) || (rf_type == RF_1T2R))
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if((rf_type == RF_1T1R) || (rf_type == RF_1T2R))
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{
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pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i];
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pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i];
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}
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else
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else
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{
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pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i];
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pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i];
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}
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#ifdef RTL8192C_RECONFIG_TO_1T1R
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{
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pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i];
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}
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#endif
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}
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}
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/* switch to the 40M Hz mode accoring to the AP */
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/* switch to the 40M Hz mode accoring to the AP */
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pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40;
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pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40;
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@ -6838,15 +6838,6 @@ void issue_assocreq(struct adapter *padapter)
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memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_2R, 16);
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memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_2R, 16);
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break;
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break;
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}
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}
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#ifdef RTL8192C_RECONFIG_TO_1T1R
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{
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if(pregpriv->rx_stbc)
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pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0100);/* RX STBC One spatial stream */
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memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_1R, 16);
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}
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#endif
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#ifdef CONFIG_BT_COEXIST
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#ifdef CONFIG_BT_COEXIST
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if (BT_1Ant(padapter) == true)
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if (BT_1Ant(padapter) == true)
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{
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{
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@ -1029,21 +1029,11 @@ void HT_caps_handler(struct adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
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rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
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rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
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/* update the MCS rates */
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/* update the MCS rates */
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for (i = 0; i < 16; i++)
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for (i = 0; i < 16; i++) {
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{
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if((rf_type == RF_1T1R) || (rf_type == RF_1T2R))
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if((rf_type == RF_1T1R) || (rf_type == RF_1T2R))
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{
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pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i];
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pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i];
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}
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else
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else
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{
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pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i];
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pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i];
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}
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#ifdef RTL8192C_RECONFIG_TO_1T1R
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{
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pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i];
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}
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#endif
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}
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}
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}
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}
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@ -352,9 +352,6 @@ SetAntennaConfig92C(
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IN u8 DefaultAnt
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IN u8 DefaultAnt
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);
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);
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#ifdef RTL8192C_RECONFIG_TO_1T1R
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extern void PHY_Reconfig_To_1T1R(struct adapter *padapter);
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#endif
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/*--------------------------Exported Function prototype---------------------*/
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/*--------------------------Exported Function prototype---------------------*/
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#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192c_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask))
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#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192c_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask))
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