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rtl8188eu: Fix more sparse warnings

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Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2018-10-25 14:23:42 -05:00
parent e36aed3385
commit c1068fee54
17 changed files with 91 additions and 103 deletions
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8
core/rtw_mi.c
View file

@ -33,7 +33,7 @@ void rtw_mi_update_union_chan_inf(_adapter *adapter, u8 ch, u8 offset , u8 bw)
}
/* Find union about ch, bw, ch_offset of all linked/linking interfaces */
int _rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset, bool include_self)
static int _rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset, bool include_self)
{
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
_adapter *iface;
@ -111,7 +111,7 @@ inline int rtw_mi_get_ch_setting_union_no_self(_adapter *adapter, u8 *ch, u8 *bw
}
/* For now, not return union_ch/bw/offset */
void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, bool include_self)
static void _rtw_mi_status(_adapter *adapter, struct mi_state *mstate, bool include_self)
{
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
_adapter *iface;
@ -667,7 +667,7 @@ void rtw_mi_buddy_xmit_tasklet_schedule(_adapter *padapter)
}
#endif
u8 _rtw_mi_busy_traffic_check(_adapter *padapter, void *data)
static u8 _rtw_mi_busy_traffic_check(_adapter *padapter, void *data)
{
u32 passtime;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
@ -1118,7 +1118,7 @@ _adapter *rtw_get_iface_by_hwport(_adapter *padapter, u8 hw_port)
/*#define CONFIG_SKB_ALLOCATED*/
#define DBG_SKB_PROCESS
#ifdef DBG_SKB_PROCESS
void rtw_dbg_skb_process(_adapter *padapter, union recv_frame *precvframe, union recv_frame *pcloneframe)
static void rtw_dbg_skb_process(_adapter *padapter, union recv_frame *precvframe, union recv_frame *pcloneframe)
{
_pkt *pkt_copy, *pkt_org;

6
hal/phydm/halhwimg8188e_bb.c
View file

@ -119,7 +119,7 @@ check_negative(
* AGC_TAB.TXT
******************************************************************************/
u32 array_mp_8188e_agc_tab[] = {
static u32 array_mp_8188e_agc_tab[] = {
0x88000001, 0x00000000, 0x40000000, 0x00000000,
0xC78, 0xF6000001,
0xC78, 0xF5010001,
@ -1117,7 +1117,7 @@ odm_get_version_mp_8188e_agc_tab(void)
* PHY_REG.TXT
******************************************************************************/
u32 array_mp_8188e_phy_reg[] = {
static u32 array_mp_8188e_phy_reg[] = {
0x800, 0x80040000,
0x804, 0x00000003,
0x808, 0x0000FC00,
@ -1711,7 +1711,7 @@ odm_get_version_mp_8188e_phy_reg(void)
* PHY_REG_PG.TXT
******************************************************************************/
u32 array_mp_8188e_phy_reg_pg[] = {
static u32 array_mp_8188e_phy_reg_pg[] = {
0, 0, 0, 0x00000e08, 0x0000ff00, 0x00003800,
0, 0, 0, 0x0000086c, 0xffffff00, 0x32343600,
0, 0, 0, 0x00000e00, 0xffffffff, 0x40424446,

2
hal/phydm/halhwimg8188e_mac.c
View file

@ -119,7 +119,7 @@ check_negative(
* MAC_REG.TXT
******************************************************************************/
u32 array_mp_8188e_mac_reg[] = {
static u32 array_mp_8188e_mac_reg[] = {
0x026, 0x00000041,
0x027, 0x00000035,
0x80000002, 0x00000000, 0x40000000, 0x00000000,

2
hal/phydm/halphyrf_ce.c
View file

@ -718,7 +718,7 @@ u8 odm_get_right_chnl_place_for_iqk(u8 chnl)
}
#endif
void
static void
odm_iq_calibrate(
struct PHY_DM_STRUCT *p_dm_odm
)

46
hal/phydm/phydm.c
View file

@ -25,7 +25,7 @@
#include "mp_precomp.h"
#include "phydm_precomp.h"
const u16 db_invert_table[12][8] = {
static const u16 db_invert_table[12][8] = {
{ 1, 1, 1, 2, 2, 2, 2, 3},
{ 3, 3, 4, 4, 4, 5, 6, 6},
{ 7, 8, 9, 10, 11, 13, 14, 16},
@ -164,7 +164,7 @@ odm_init_mp_driver_status(
}
void
static void
odm_update_mp_driver_status(
struct PHY_DM_STRUCT *p_dm_odm
)
@ -175,7 +175,7 @@ odm_update_mp_driver_status(
p_dm_odm->mp_mode = (bool)adapter->registrypriv.mp_mode;
}
void
static void
phydm_init_trx_antenna_setting(
struct PHY_DM_STRUCT *p_dm_odm
)
@ -197,7 +197,7 @@ phydm_init_trx_antenna_setting(
/*#endif*/
}
void
static void
phydm_traffic_load_decision(
void *p_dm_void
)
@ -248,7 +248,7 @@ phydm_traffic_load_decision(
}
}
void
static void
phydm_config_ofdm_tx_path(
struct PHY_DM_STRUCT *p_dm_odm,
u32 path
@ -338,7 +338,7 @@ phydm_config_ofdm_rx_path(
#endif
}
void
static void
phydm_config_cck_rx_antenna_init(
struct PHY_DM_STRUCT *p_dm_odm
)
@ -358,7 +358,7 @@ phydm_config_cck_rx_antenna_init(
#endif
}
void
static void
phydm_config_cck_rx_path(
struct PHY_DM_STRUCT *p_dm_odm,
u8 path,
@ -460,7 +460,7 @@ phydm_config_trx_path(
}
void
static void
phydm_init_cck_setting(
struct PHY_DM_STRUCT *p_dm_odm
)
@ -506,7 +506,7 @@ phydm_init_cck_setting(
}
void
static void
phydm_init_soft_ml_setting(
struct PHY_DM_STRUCT *p_dm_odm
)
@ -519,7 +519,7 @@ phydm_init_soft_ml_setting(
#endif
}
void
static void
phydm_init_hw_info_by_rfe(
struct PHY_DM_STRUCT *p_dm_odm
)
@ -538,7 +538,7 @@ phydm_init_hw_info_by_rfe(
#endif
}
void
static void
odm_common_info_self_init(
struct PHY_DM_STRUCT *p_dm_odm
)
@ -580,7 +580,7 @@ odm_common_info_self_init(
}
void
static void
odm_common_info_self_update(
struct PHY_DM_STRUCT *p_dm_odm
)
@ -627,7 +627,7 @@ odm_common_info_self_update(
p_dm_odm->phydm_sys_up_time += p_dm_odm->phydm_period;
}
void
static void
odm_common_info_self_reset(
struct PHY_DM_STRUCT *p_dm_odm
)
@ -683,7 +683,7 @@ phydm_get_structure(
return p_struct;
}
void
static void
odm_hw_setting(
struct PHY_DM_STRUCT *p_dm_odm
)
@ -709,7 +709,7 @@ odm_hw_setting(
#endif
}
#if SUPPORTABLITY_PHYDMLIZE
void
static void
phydm_supportability_init(
void *p_dm_void
)
@ -2055,7 +2055,7 @@ phydm_set_ext_switch(
}
}
void
static void
phydm_csi_mask_enable(
void *p_dm_void,
u32 enable
@ -2079,7 +2079,7 @@ phydm_csi_mask_enable(
}
void
static void
phydm_clean_all_csi_mask(
void *p_dm_void
)
@ -2106,7 +2106,7 @@ phydm_clean_all_csi_mask(
}
}
void
static void
phydm_set_csi_mask_reg(
void *p_dm_void,
u32 tone_idx_tmp,
@ -2169,7 +2169,7 @@ phydm_set_csi_mask_reg(
ODM_RT_TRACE(p_dm_odm, ODM_COMP_API, ODM_DBG_LOUD, ("New Mask tone idx[%d]: Reg0x%x = ((0x%x))\n", (tone_idx_tmp + tone_num_shift), target_reg, reg_tmp_value));
}
void
static void
phydm_set_nbi_reg(
void *p_dm_void,
u32 tone_idx_tmp,
@ -2239,7 +2239,7 @@ phydm_set_nbi_reg(
}
void
static void
phydm_nbi_enable(
void *p_dm_void,
u32 enable
@ -2262,7 +2262,7 @@ phydm_nbi_enable(
}
}
u8
static u8
phydm_calculate_fc(
void *p_dm_void,
u32 channel,
@ -2342,7 +2342,7 @@ phydm_calculate_fc(
}
u8
static u8
phydm_calculate_intf_distance(
void *p_dm_void,
u32 bw,
@ -2376,7 +2376,7 @@ phydm_calculate_intf_distance(
}
u8
static u8
phydm_csi_mask_setting(
void *p_dm_void,
u32 enable,

2
hal/phydm/phydm_acs.c
View file

@ -48,7 +48,7 @@ odm_get_auto_channel_select_result(
}
void
static void
odm_auto_channel_select_setting(
void *p_dm_void,
bool is_enable

4
hal/phydm/phydm_adaptivity.c
View file

@ -240,7 +240,7 @@ phydm_set_edcca_threshold(
}
void
static void
phydm_set_lna(
void *p_dm_void,
enum phydm_set_lna type
@ -596,7 +596,7 @@ phydm_search_pwdb_lower_bound(
phydm_set_edcca_threshold(p_dm_odm, 0x7f, 0x7f); /*resume to no link state*/
}
bool
static bool
phydm_re_search_condition(
void *p_dm_void
)

5
hal/phydm/phydm_ccx.c
View file

@ -285,10 +285,7 @@ phydm_check_nhm_ready(
return ret;
}
void
phydm_store_nhm_setting(
void *p_dm_void
)
static void phydm_store_nhm_setting(void *p_dm_void)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _CCX_INFO *ccx_info = &p_dm_odm->dm_ccx_info;

8
hal/phydm/phydm_cfotracking.c
View file

@ -20,7 +20,7 @@
#include "mp_precomp.h"
#include "phydm_precomp.h"
void
static void
odm_set_crystal_cap(
void *p_dm_void,
u8 crystal_cap
@ -65,7 +65,7 @@ odm_set_crystal_cap(
#endif
}
u8
static u8
odm_get_default_crytaltal_cap(
void *p_dm_void
)
@ -90,7 +90,7 @@ odm_get_default_crytaltal_cap(
return crystal_cap;
}
void
static void
odm_set_atc_status(
void *p_dm_void,
bool atc_status
@ -106,7 +106,7 @@ odm_set_atc_status(
p_cfo_track->is_atc_status = atc_status;
}
bool
static bool
odm_get_atc_status(
void *p_dm_void
)

14
hal/phydm/phydm_dig.c
View file

@ -58,7 +58,7 @@ odm_change_dynamic_init_gain_thresh(
}
} /* dm_change_dynamic_init_gain_thresh */
int
static int
get_igi_for_diff(int value_IGI)
{
#define ONERCCA_LOW_TH 0x30
@ -73,7 +73,7 @@ get_igi_for_diff(int value_IGI)
return value_IGI;
}
void
static void
odm_fa_threshold_check(
void *p_dm_void,
bool is_dfs_band,
@ -121,7 +121,7 @@ odm_fa_threshold_check(
return;
}
u8
static u8
odm_forbidden_igi_check(
void *p_dm_void,
u8 dig_dynamic_min,
@ -226,7 +226,7 @@ odm_forbidden_igi_check(
}
void
static void
odm_inband_noise_calculate(
void *p_dm_void
)
@ -337,7 +337,7 @@ odm_inband_noise_calculate(
return;
}
void
static void
odm_dig_for_bt_hs_mode(
void *p_dm_void
)
@ -369,7 +369,7 @@ odm_dig_for_bt_hs_mode(
#endif
}
void
static void
phydm_set_big_jump_step(
void *p_dm_void,
u8 current_igi
@ -612,7 +612,7 @@ odm_pause_dig(
}
bool
static bool
odm_dig_abort(
void *p_dm_void
)

2
hal/phydm/phydm_dynamictxpower.c
View file

@ -126,7 +126,7 @@ odm_dynamic_tx_power_write_power_index(
}
void
static void
odm_dynamic_tx_power_nic_ce(
void *p_dm_void
)

18
hal/phydm/phydm_hwconfig.c
View file

@ -62,7 +62,7 @@
#define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt)
#endif
u8
static u8
odm_query_rx_pwr_percentage(
s8 ant_power
)
@ -79,7 +79,7 @@ odm_query_rx_pwr_percentage(
* 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer.
* IF other SW team do not support the feature, remove this section.??
* */
s32
static s32
odm_signal_scale_mapping_92c_series_patch_rt_cid_819x_lenovo(
struct PHY_DM_STRUCT *p_dm_odm,
s32 curr_sig
@ -117,7 +117,7 @@ odm_signal_scale_mapping_92c_series_patch_rt_cid_819x_lenovo(
return ret_sig;
}
s32
static s32
odm_signal_scale_mapping_92c_series_patch_rt_cid_819x_netcore(
struct PHY_DM_STRUCT *p_dm_odm,
s32 curr_sig
@ -155,7 +155,7 @@ odm_signal_scale_mapping_92c_series_patch_rt_cid_819x_netcore(
return ret_sig;
}
s32
static s32
odm_signal_scale_mapping_92c_series(
struct PHY_DM_STRUCT *p_dm_odm,
s32 curr_sig
@ -482,7 +482,7 @@ odm_cfo(
return ret_val;
}
u8
static u8
phydm_rate_to_num_ss(
struct PHY_DM_STRUCT *p_dm_odm,
u8 data_rate
@ -598,7 +598,7 @@ odm_CCKRSSI_8192E(
#endif
#if (RTL8188E_SUPPORT == 1)
s8
static s8
odm_CCKRSSI_8188E(
struct PHY_DM_STRUCT *p_dm_odm,
u16 LNA_idx,
@ -621,7 +621,7 @@ odm_CCKRSSI_8188E(
}
#endif
void
static void
odm_rx_phy_status92c_series_parsing(
struct PHY_DM_STRUCT *p_dm_odm,
struct _odm_phy_status_info_ *p_phy_info,
@ -1420,7 +1420,7 @@ odm_init_rssi_for_dm(
}
void
static void
odm_process_rssi_for_dm(
struct PHY_DM_STRUCT *p_dm_odm,
struct _odm_phy_status_info_ *p_phy_info,
@ -1721,7 +1721,7 @@ odm_process_rssi_for_dm(
/*
* Endianness before calling this API
* */
void
static void
odm_phy_status_query_92c_series(
struct PHY_DM_STRUCT *p_dm_odm,
struct _odm_phy_status_info_ *p_phy_info,

14
hal/phydm/phydm_kfree.c
View file

@ -28,12 +28,7 @@
/*<YuChen, 150720> Add for KFree Feature Requested by RF David.*/
/*This is a phydm API*/
void
phydm_set_kfree_to_rf_8814a(
void *p_dm_void,
u8 e_rf_path,
u8 data
)
static void phydm_set_kfree_to_rf_8814a(void *p_dm_void, u8 e_rf_path, u8 data)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct odm_rf_calibration_structure *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
@ -119,12 +114,7 @@ phydm_set_kfree_to_rf_8814a(
}
void
phydm_set_kfree_to_rf(
void *p_dm_void,
u8 e_rf_path,
u8 data
)
static void phydm_set_kfree_to_rf(void *p_dm_void, u8 e_rf_path, u8 data)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;

4
hal/phydm/phydm_noisemonitor.c
View file

@ -41,7 +41,7 @@
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_WIN))
s16 odm_inband_noise_monitor_n_series(struct PHY_DM_STRUCT *p_dm_odm, u8 is_pause_dig, u8 igi_value, u32 max_time)
static s16 odm_inband_noise_monitor_n_series(struct PHY_DM_STRUCT *p_dm_odm, u8 is_pause_dig, u8 igi_value, u32 max_time)
{
u32 tmp4b;
u8 max_rf_path = 0, rf_path;
@ -167,7 +167,7 @@ s16 odm_inband_noise_monitor_n_series(struct PHY_DM_STRUCT *p_dm_odm, u8 is_paus
}
s16
static s16
odm_inband_noise_monitor_ac_series(struct PHY_DM_STRUCT *p_dm_odm, u8 is_pause_dig, u8 igi_value, u32 max_time
)
{

2
hal/phydm/phydm_powertracking_ce.c
View file

@ -480,7 +480,7 @@ odm_txpowertracking_init(
odm_txpowertracking_thermal_meter_init(p_dm_odm);
}
u8
static u8
get_swing_index(
void *p_dm_void
)

33
hal/usb_halinit.c
View file

@ -86,7 +86,7 @@ static BOOLEAN HalUsbSetQueuePipeMapping8188EUsb(
}
void rtl8188eu_interface_configure(_adapter *padapter)
static void rtl8188eu_interface_configure(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
@ -874,7 +874,8 @@ InitUsbAggregationSetting(
/* 201/12/10 MH Add for USB agg mode dynamic switch. */
pHalData->UsbRxHighSpeedMode = _FALSE;
}
VOID
static VOID
HalRxAggr8188EUsb(
IN PADAPTER Adapter,
IN BOOLEAN Value
@ -901,7 +902,7 @@ HalRxAggr8188EUsb(
* 12/10/2010 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
VOID
static VOID
USB_AggModeSwitch(
IN PADAPTER Adapter
)
@ -1054,7 +1055,7 @@ rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter)
void _ps_open_RF(_adapter *padapter);
u32 rtl8188eu_hal_init(PADAPTER Adapter)
static u32 rtl8188eu_hal_init(PADAPTER Adapter)
{
u8 value8 = 0;
u16 value16;
@ -1489,13 +1490,13 @@ void _ps_open_RF(_adapter *padapter)
/* phy_SsPwrSwitch92CU(padapter, rf_on, 1); */
}
void _ps_close_RF(_adapter *padapter)
static void _ps_close_RF(_adapter *padapter)
{
/* here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified */
/* phy_SsPwrSwitch92CU(padapter, rf_off, 1); */
}
VOID
static void
hal_poweroff_8188eu(
IN PADAPTER Adapter
)
@ -1582,7 +1583,7 @@ static void rtl8188eu_hw_power_down(_adapter *padapter)
rtw_write16(padapter, REG_APS_FSMCO, 0x8812);
}
u32 rtl8188eu_hal_deinit(PADAPTER Adapter)
static u32 rtl8188eu_hal_deinit(PADAPTER Adapter)
{
struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
@ -1613,7 +1614,7 @@ u32 rtl8188eu_hal_deinit(PADAPTER Adapter)
return _SUCCESS;
}
unsigned int rtl8188eu_inirp_init(PADAPTER Adapter)
static unsigned int rtl8188eu_inirp_init(PADAPTER Adapter)
{
u8 i;
struct recv_buf *precvbuf;
@ -1663,7 +1664,7 @@ exit:
}
unsigned int rtl8188eu_inirp_deinit(PADAPTER Adapter)
static unsigned int rtl8188eu_inirp_deinit(PADAPTER Adapter)
{
rtw_read_port_cancel(Adapter);
@ -1850,7 +1851,7 @@ static u8 ReadAdapterInfo8188EU(PADAPTER Adapter)
return _SUCCESS;
}
void UpdateInterruptMask8188EU(PADAPTER padapter, u8 bHIMR0 , u32 AddMSR, u32 RemoveMSR)
static void UpdateInterruptMask8188EU(PADAPTER padapter, u8 bHIMR0 , u32 AddMSR, u32 RemoveMSR)
{
HAL_DATA_TYPE *pHalData;
@ -1875,7 +1876,7 @@ void UpdateInterruptMask8188EU(PADAPTER padapter, u8 bHIMR0 , u32 AddMSR, u32 Re
}
void SetHwReg8188EU(PADAPTER Adapter, u8 variable, u8 *val)
static void SetHwReg8188EU(PADAPTER Adapter, u8 variable, u8 *val)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
@ -1913,7 +1914,7 @@ void SetHwReg8188EU(PADAPTER Adapter, u8 variable, u8 *val)
}
void GetHwReg8188EU(PADAPTER Adapter, u8 variable, u8 *val)
static void GetHwReg8188EU(PADAPTER Adapter, u8 variable, u8 *val)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
@ -1929,7 +1930,7 @@ void GetHwReg8188EU(PADAPTER Adapter, u8 variable, u8 *val)
* Description:
* Query setting of specified variable.
* */
u8
static u8
GetHalDefVar8188EUsb(
IN PADAPTER Adapter,
IN HAL_DEF_VARIABLE eVariable,
@ -1966,7 +1967,7 @@ GetHalDefVar8188EUsb(
* Description:
* Change default setting of specified variable.
* */
u8
static u8
SetHalDefVar8188EUsb(
IN PADAPTER Adapter,
IN HAL_DEF_VARIABLE eVariable,
@ -1985,7 +1986,7 @@ SetHalDefVar8188EUsb(
return bResult;
}
void _update_response_rate(_adapter *padapter, unsigned int mask)
static void _update_response_rate(_adapter *padapter, unsigned int mask)
{
u8 RateIndex = 0;
/* Set RRSR rate table. */
@ -2000,7 +2001,7 @@ void _update_response_rate(_adapter *padapter, unsigned int mask)
rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex);
}
void SetBeaconRelatedRegisters8188EUsb(PADAPTER padapter)
static void SetBeaconRelatedRegisters8188EUsb(PADAPTER padapter)
{
u32 value32;
/* HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); */

24
include/basic_types.h
View file

@ -108,43 +108,43 @@
/*
* Read LE data from memory to host byte order
*/
#define ReadLE4Byte(_ptr) le32_to_cpu(*((u32 *)(_ptr)))
#define ReadLE2Byte(_ptr) le16_to_cpu(*((u16 *)(_ptr)))
#define ReadLE4Byte(_ptr) le32_to_cpu(*((__le32 *)(_ptr)))
#define ReadLE2Byte(_ptr) le16_to_cpu(*((__le16 *)(_ptr)))
#define ReadLE1Byte(_ptr) (*((u8 *)(_ptr)))
/*
* Read BE data from memory to host byte order
*/
#define ReadBEE4Byte(_ptr) be32_to_cpu(*((u32 *)(_ptr)))
#define ReadBE2Byte(_ptr) be16_to_cpu(*((u16 *)(_ptr)))
#define ReadBEE4Byte(_ptr) be32_to_cpu(*((__be32 *)(_ptr)))
#define ReadBE2Byte(_ptr) be16_to_cpu(*((__be16 *)(_ptr)))
#define ReadBE1Byte(_ptr) (*((u8 *)(_ptr)))
/*
* Write host byte order data to memory in LE order
*/
#define WriteLE4Byte(_ptr, _val) ((*((u32 *)(_ptr))) = cpu_to_le32(_val))
#define WriteLE2Byte(_ptr, _val) ((*((u16 *)(_ptr))) = cpu_to_le16(_val))
#define WriteLE4Byte(_ptr, _val) ((*((__le32 *)(_ptr))) = cpu_to_le32(_val))
#define WriteLE2Byte(_ptr, _val) ((*((i__le16 *)(_ptr))) = cpu_to_le16(_val))
#define WriteLE1Byte(_ptr, _val) ((*((u8 *)(_ptr))) = ((u8)(_val)))
/*
* Write host byte order data to memory in BE order
*/
#define WriteBE4Byte(_ptr, _val) ((*((u32 *)(_ptr))) = cpu_to_be32(_val))
#define WriteBE2Byte(_ptr, _val) ((*((u16 *)(_ptr))) = cpu_to_be16(_val))
#define WriteBE4Byte(_ptr, _val) ((*((__be32 *)(_ptr))) = cpu_to_be32(_val))
#define WriteBE2Byte(_ptr, _val) ((*((__be16 *)(_ptr))) = cpu_to_be16(_val))
#define WriteBE1Byte(_ptr, _val) ((*((u8 *)(_ptr))) = ((u8)(_val)))
/*
* Return 4-byte value in host byte ordering from 4-byte pointer in litten-endian system.
*/
#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) (le32_to_cpu(*((u32 *)(__pStart))))
#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) (le16_to_cpu(*((u16 *)(__pStart))))
#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) (le32_to_cpu(*((__le32 *)(__pStart))))
#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) (le16_to_cpu(*((__le16 *)(__pStart))))
#define LE_P1BYTE_TO_HOST_1BYTE(__pStart) ((*((u8 *)(__pStart))))
/*
* Return 4-byte value in host byte ordering from 4-byte pointer in big-endian system.
*/
#define BE_P4BYTE_TO_HOST_4BYTE(__pStart) (be32_to_cpu(*((u32 *)(__pStart))))
#define BE_P2BYTE_TO_HOST_2BYTE(__pStart) (be16_to_cpu(*((u16 *)(__pStart))))
#define BE_P4BYTE_TO_HOST_4BYTE(__pStart) (be32_to_cpu(*((__be32 *)(__pStart))))
#define BE_P2BYTE_TO_HOST_2BYTE(__pStart) (be16_to_cpu(*((__be16 *)(__pStart))))
#define BE_P1BYTE_TO_HOST_1BYTE(__pStart) ((*((u8 *)(__pStart))))
/*