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rtl8188eu: Change "==0" to "== 0"

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Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2015-08-15 13:22:58 -05:00
parent 83488f50f7
commit c137ff21e5
40 changed files with 242 additions and 242 deletions
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6
hal/Hal8188ERateAdaptive.c
View file

@ -116,7 +116,7 @@ odm_SetTxRPTTiming_8188E(
if (DynamicTxRPTTiming[idx] == pRaInfo->RptTime)
break;
if (extend==0) /* back to default timing */
if (extend== 0) /* back to default timing */
idx=0; /* 200ms */
else if (extend==1) {/* increase the timing */
idx+=1;
@ -186,7 +186,7 @@ RateDownFinish:
pRaInfo->RAWaitingCounter+=1;
pRaInfo->RAPendingCounter+=1;
}
else if (pRaInfo->RAWaitingCounter==0){
else if (pRaInfo->RAWaitingCounter== 0){
}
else{
pRaInfo->RAWaitingCounter=0;
@ -513,7 +513,7 @@ odm_PTTryState_8188E(
if ((pRaInfo->PTStopCount>=10)||(pRaInfo->PTPreRssi>pRaInfo->RssiStaRA+5)
||(pRaInfo->PTPreRssi<pRaInfo->RssiStaRA-5)||(pRaInfo->DecisionRate!=pRaInfo->PTPreRate))
{
if (pRaInfo->PTStage==0)
if (pRaInfo->PTStage== 0)
pRaInfo->PTStage=1;
else if (pRaInfo->PTStage==1)
pRaInfo->PTStage=3;

6
hal/HalPhyRf_8188e.c
View file

@ -1256,7 +1256,7 @@ else
/* Note: IQ calibration must be performed after loading */
/* PHY_REG.txt , and radio_a, radio_b.txt */
if (t==0) {
if (t== 0) {
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t));
/* Save ADDA parameters, turn Path A ADDA on */
@ -1268,7 +1268,7 @@ else
_PHY_PathADDAOn(pAdapter, ADDA_REG, true, is2T);
if (t==0) {
if (t== 0) {
pDM_Odm->RFCalibrateInfo.bRfPiEnable = (u8)ODM_GetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter1, BIT(8));
}
@ -1973,7 +1973,7 @@ if (*(pDM_Odm->mp_mode) == 1)
result[0][i] = 0;
result[1][i] = 0;
result[2][i] = 0;
if ((i==0) ||(i==2) || (i==4) || (i==6))
if ((i== 0) ||(i==2) || (i==4) || (i==6))
result[3][i] = 0x100;
else
result[3][i] = 0;

4
hal/odm.c
View file

@ -3111,7 +3111,7 @@ odm_StaDefAntSel(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("CCK_Ant1_Cnt:%d, CCK_Ant2_Cnt:%d\n",CCK_Ant1_Cnt,CCK_Ant2_Cnt));
if (((OFDM_Ant1_Cnt+OFDM_Ant2_Cnt)==0)&&((CCK_Ant1_Cnt + CCK_Ant2_Cnt) <10)){
if (((OFDM_Ant1_Cnt+OFDM_Ant2_Cnt)== 0)&&((CCK_Ant1_Cnt + CCK_Ant2_Cnt) <10)){
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_StaDefAntSelect Fail: No enough packet info!\n"));
return false;
}
@ -3162,7 +3162,7 @@ odm_SetRxIdleAnt(
/* for path-B */
if (bDualPath){
if (Ant==0)
if (Ant== 0)
ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF0000, 0x65a9); /* right-side antenna */
else
ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF0000, 0x569a); /* left-side antenna */

2
hal/rtl8188e_dm.c
View file

@ -378,7 +378,7 @@ u8 AntDivBeforeLink8188E(struct adapter *Adapter )
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
/* Condition that does not need to use antenna diversity. */
if (pHalData->AntDivCfg==0)
if (pHalData->AntDivCfg== 0)
{
/* DBG_8192C("odm_AntDivBeforeLink8192C(): No AntDiv Mechanism.\n"); */
return false;

16
hal/rtl8188e_hal_init.c
View file

@ -650,7 +650,7 @@ _FillDummy(
{
u32 FwLen = *pFwLen;
u8 remain = (u8)(FwLen%4);
remain = (remain==0)?0:(4-remain);
remain = (remain== 0)?0:(4-remain);
while (remain>0)
{
@ -1338,7 +1338,7 @@ exit:
DBG_871X("%s compare first 0x130 byte fail\n", __FUNCTION__);
for (i=0;i<512;i++)
{
if (i%16==0)
if (i%16== 0)
DBG_871X("0x%03x: ", i);
DBG_871X("%02x ", logical_map[i]);
if (i%16==15)
@ -1769,7 +1769,7 @@ hal_EfusePgPacketRead_8188e(
EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (void *)&max_section, bPseudoTest);
if (data==NULL)
if (data== NULL)
return false;
if (offset>max_section)
return false;
@ -1855,8 +1855,8 @@ hal_EfusePgPacketRead_8188e(
}
if ( (data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff) && (data[3]==0xff) &&
(data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff) && (data[7]==0xff))
if ( (data[0]== 0xff) &&(data[1]== 0xff) && (data[2]== 0xff) && (data[3]== 0xff) &&
(data[4]== 0xff) &&(data[5]== 0xff) && (data[6]== 0xff) && (data[7]== 0xff))
return false;
else
return true;
@ -2743,7 +2743,7 @@ void Read_LLT_Tab(struct adapter *padapter)
for (addr=0;addr<176;addr++) {
next_addr = _LLTRead(padapter,addr);
printk("%d->",next_addr);
if (((addr+1) %8) ==0)
if (((addr+1) %8) == 0)
printk("\n");
}
printk("\n##################################\n");
@ -2902,7 +2902,7 @@ Hal_ReadPowerValueFromPROM_8188E(
}
for (TxCount=0;TxCount<MAX_TX_COUNT;TxCount++)
{
if (TxCount==0)
if (TxCount== 0)
{
pwrInfo24G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF;
pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF;
@ -2947,7 +2947,7 @@ Hal_ReadPowerValueFromPROM_8188E(
}
for (TxCount=0;TxCount<MAX_TX_COUNT;TxCount++)
{
if (TxCount==0)
if (TxCount== 0)
{
pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0;
if (PROMContent[eeAddr] == 0xFF)

14
hal/rtl8188e_rf6052.c
View file

@ -217,7 +217,7 @@ rtl8188e_PHY_RF6052SetCckTxPower(
(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
}
if (pHalData->EEPROMRegulatory==0)
if (pHalData->EEPROMRegulatory== 0)
{
tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) +
(pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8);
@ -295,7 +295,7 @@ static void getPowerBase88E(
powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0;
*(OfdmBase+i) = powerBase0;
/* DBG_871X(" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i)); */
/* DBG_871X(" [OFDM power base index rf(%c) = 0x%x]\n", ((i== 0)?'A':'B'), *(OfdmBase+i)); */
}
for (i=0; i<pHalData->NumTotalRFPath; i++)
@ -312,7 +312,7 @@ static void getPowerBase88E(
powerBase1 = powerlevel[i];
powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1;
*(MCSBase+i) = powerBase1;
/* DBG_871X(" [MCS power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(MCSBase+i)); */
/* DBG_871X(" [MCS power base index rf(%c) = 0x%x]\n", ((i== 0)?'A':'B'), *(MCSBase+i)); */
}
}
@ -345,7 +345,7 @@ static void getTxPowerWriteValByRegulatory88E(
/* chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); */
writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] +
((index<2)?powerBase0[rf]:powerBase1[rf]);
/* RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); */
/* RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%x\n", ((rf== 0)?'A':'B'), writeVal)); */
break;
case 1: /* Realtek regulatory */
/* increase power diff defined by Realtek for regulatory */
@ -407,15 +407,15 @@ static void getTxPowerWriteValByRegulatory88E(
}
customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) |
(pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]);
/* RTPRINT(FPHY, PHY_TXPWR, ("Customer's limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_limit)); */
/* RTPRINT(FPHY, PHY_TXPWR, ("Customer's limit rf(%c) = 0x%x\n", ((rf== 0)?'A':'B'), customer_limit)); */
writeVal = customer_limit + ((index<2)?powerBase0[rf]:powerBase1[rf]);
/* RTPRINT(FPHY, PHY_TXPWR, ("Customer, writeVal rf(%c)= 0x%x\n", ((rf==0)?'A':'B'), writeVal)); */
/* RTPRINT(FPHY, PHY_TXPWR, ("Customer, writeVal rf(%c)= 0x%x\n", ((rf== 0)?'A':'B'), writeVal)); */
break;
default:
chnlGroup = 0;
writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] +
((index<2)?powerBase0[rf]:powerBase1[rf]);
/* RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); */
/* RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%x\n", ((rf== 0)?'A':'B'), writeVal)); */
break;
}

2
hal/rtl8188e_rxdesc.c
View file

@ -61,7 +61,7 @@ static void process_link_qual(struct adapter *padapter,union recv_frame *prframe
struct rx_pkt_attrib *pattrib;
struct signal_stat * signal_stat;
if (prframe == NULL || padapter==NULL){
if (prframe == NULL || padapter== NULL){
return;
}

2
hal/rtl8188eu_recv.c
View file

@ -81,7 +81,7 @@ int rtl8188eu_init_recv_priv(struct adapter *padapter)
_rtw_init_queue(&precvpriv->free_recv_buf_queue);
precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF *sizeof(struct recv_buf) + 4);
if (precvpriv->pallocated_recv_buf==NULL){
if (precvpriv->pallocated_recv_buf== NULL){
res= _FAIL;
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("alloc recv_buf fail!\n"));
goto exit;

4
hal/rtl8188eu_xmit.c
View file

@ -47,7 +47,7 @@ static u8 urb_zero_packet_chk(struct adapter *padapter, int sz)
{
u8 blnSetTxDescOffset;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
blnSetTxDescOffset = (((sz + TXDESC_SIZE) % pHalData->UsbBulkOutSize) ==0)?1:0;
blnSetTxDescOffset = (((sz + TXDESC_SIZE) % pHalData->UsbBulkOutSize) == 0)?1:0;
return blnSetTxDescOffset;
}
@ -221,7 +221,7 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bag
#endif /* CONFIG_P2P */
if (padapter->registrypriv.mp_mode == 0) {
if ((!bagg_pkt) &&(urb_zero_packet_chk(padapter, sz)==0)) {
if ((!bagg_pkt) &&(urb_zero_packet_chk(padapter, sz)== 0)) {
ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ);
pull = 1;
}

8
hal/usb_halinit.c
View file

@ -1071,7 +1071,7 @@ _InitAntenna_Selection(struct adapter *Adapter)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
if (pHalData->AntDivCfg==0)
if (pHalData->AntDivCfg== 0)
return;
DBG_8192C("==> %s ....\n",__FUNCTION__);
@ -2810,7 +2810,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8* val)
if (!(rtw_read32(Adapter,REG_RXPKT_NUM)&RXDMA_IDLE))
break;
}while (trycnt--);
if (trycnt ==0)
if (trycnt == 0)
DBG_8192C("Stop RX DMA failed......\n");
/* RQPN Load 0 */
@ -2907,7 +2907,7 @@ static void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8* val)
*val = pHalData->bMacPwrCtrlOn;
break;
case HW_VAR_CHK_HI_QUEUE_EMPTY:
*val = ((rtw_read32(Adapter, REG_HGQ_INFORMATION)&0x0000ff00)==0) ? true:false;
*val = ((rtw_read32(Adapter, REG_HGQ_INFORMATION)&0x0000ff00)== 0) ? true:false;
break;
case HW_VAR_READ_LLT_TAB:
Read_LLT_Tab(Adapter);
@ -2958,7 +2958,7 @@ static u8 GetHalDefVar8188EUsb(
}
break;
case HAL_DEF_IS_SUPPORT_ANT_DIV:
*((u8 *)pValue) = (pHalData->AntDivCfg==0)?false:true;
*((u8 *)pValue) = (pHalData->AntDivCfg== 0)?false:true;
break;
case HAL_DEF_CURRENT_ANTENNA:
*(( u8*)pValue) = pHalData->CurAntenna;

10
hal/usb_ops_linux.c
View file

@ -331,7 +331,7 @@ static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs)
return;
}
if (purb->status==0)/* SUCCESS */
if (purb->status== 0)/* SUCCESS */
{
if (purb->actual_length > INTERRUPT_MSG_FORMAT_LEN)
{
@ -444,9 +444,9 @@ static int recvbuf2recvframe(struct adapter *padapter, struct sk_buff *pskb)
prxstat = (struct recv_stat *)pbuf;
precvframe = rtw_alloc_recvframe(pfree_recv_queue);
if (precvframe==NULL)
if (precvframe== NULL)
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n"));
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe== NULL\n"));
DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__);
goto _exit_recvbuf2recvframe;
}
@ -602,7 +602,7 @@ static int recvbuf2recvframe(struct adapter *padapter, struct sk_buff *pskb)
precvframe = NULL;
pkt_copy = NULL;
if (transfer_len>0 && pkt_cnt==0)
if (transfer_len>0 && pkt_cnt== 0)
pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
}while ((transfer_len>0) && (pkt_cnt>0));
@ -672,7 +672,7 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
goto exit;
}
if (purb->status==0)/* SUCCESS */
if (purb->status== 0)/* SUCCESS */
{
if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE))
{