skyfall/rtl8188eu
1
0
Fork 0
mirror of https://github.com/lwfinger/rtl8188eu.git synced 2024-11-10 15:39:38 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

rtl8188eu: Replace u8Byte with u64

Browse source 
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2014-12-30 17:52:40 -06:00
parent b77dd7b8df
commit c8a4d4ba06
7 changed files with 34 additions and 36 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
hal/hal_com.c
View file

@ -400,7 +400,7 @@ SetHalDefVar(struct adapter *adapter, HAL_DEF_VARIABLE variable, void *value)
pDM_Odm->DebugComponents &= ~(ODM_COMP_DIG |ODM_COMP_FA_CNT);
break;
case HW_DEF_ODM_DBG_FLAG:
ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_DBG_COMP, *((u8Byte*)value));
ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_DBG_COMP, *((u64*)value));
break;
case HW_DEF_ODM_DBG_LEVEL:
ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_DBG_LEVEL, *((u32*)value));
@ -423,7 +423,7 @@ GetHalDefVar(struct adapter *adapter, HAL_DEF_VARIABLE variable, void *value)
switch(variable) {
case HW_DEF_ODM_DBG_FLAG:
*((u8Byte*)value) = pDM_Odm->DebugComponents;
*((u64*)value) = pDM_Odm->DebugComponents;
break;
case HW_DEF_ODM_DBG_LEVEL:
*((u32*)value) = pDM_Odm->DebugLevel;

6
hal/odm.c
View file

@ -767,11 +767,11 @@ ODM_CmnInfoHook(
break;
case ODM_CMNINFO_TX_UNI:
pDM_Odm->pNumTxBytesUnicast = (u8Byte *)pValue;
pDM_Odm->pNumTxBytesUnicast = (u64 *)pValue;
break;
case ODM_CMNINFO_RX_UNI:
pDM_Odm->pNumRxBytesUnicast = (u8Byte *)pValue;
pDM_Odm->pNumRxBytesUnicast = (u64 *)pValue;
break;
case ODM_CMNINFO_WM_MODE:
@ -904,7 +904,7 @@ void
ODM_CmnInfoUpdate(
IN PDM_ODM_T pDM_Odm,
IN u32 CmnInfo,
IN u8Byte Value
IN u64 Value
)
{
//

40
hal/odm.h
View file

@ -269,12 +269,12 @@ typedef struct _SW_Antenna_Switch_
s4Byte RSSI_cnt_A;
s4Byte RSSI_cnt_B;
u8Byte lastTxOkCnt;
u8Byte lastRxOkCnt;
u8Byte TXByteCnt_A;
u8Byte TXByteCnt_B;
u8Byte RXByteCnt_A;
u8Byte RXByteCnt_B;
u64 lastTxOkCnt;
u64 lastRxOkCnt;
u64 TXByteCnt_A;
u64 TXByteCnt_B;
u64 RXByteCnt_A;
u64 RXByteCnt_B;
u8 TrafficLoad;
RT_TIMER SwAntennaSwitchTimer;
#ifdef CONFIG_HW_ANTENNA_DIVERSITY
@ -353,9 +353,9 @@ typedef struct _ODM_Phy_Dbg_Info_
{
//ODM Write,debug info
s1Byte RxSNRdB[MAX_PATH_NUM_92CS];
u8Byte NumQryPhyStatus;
u8Byte NumQryPhyStatusCCK;
u8Byte NumQryPhyStatusOFDM;
u64 NumQryPhyStatus;
u64 NumQryPhyStatusCCK;
u64 NumQryPhyStatusOFDM;
u8 NumQryBeaconPkt;
//Others
s4Byte RxEVM[MAX_PATH_NUM_92CS];
@ -483,7 +483,7 @@ typedef enum _ODM_Common_Info_Definition
ODM_CMNINFO_WIFI_DISPLAY,
ODM_CMNINFO_LINK,
ODM_CMNINFO_RSSI_MIN,
ODM_CMNINFO_DBG_COMP, // u8Byte
ODM_CMNINFO_DBG_COMP, // u64
ODM_CMNINFO_DBG_LEVEL, // u32
ODM_CMNINFO_RA_THRESHOLD_HIGH, // u8
ODM_CMNINFO_RA_THRESHOLD_LOW, // u8
@ -945,7 +945,7 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
BOOLEAN odm_ready;
rtl8192cd_priv fake_priv;
u8Byte DebugComponents;
u64 DebugComponents;
u32 DebugLevel;
//------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------//
@ -1015,9 +1015,9 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
// MAC PHY Mode SMSP/DMSP/DMDP = 0/1/2
u8 *pMacPhyMode;
//TX Unicast byte count
u8Byte *pNumTxBytesUnicast;
u64 *pNumTxBytesUnicast;
//RX Unicast byte count
u8Byte *pNumRxBytesUnicast;
u64 *pNumRxBytesUnicast;
// Wireless mode B/G/A/N = BIT0/BIT1/BIT2/BIT3
u8 *pWirelessMode; //ODM_WIRELESS_MODE_E
// Frequence band 2.4G/5G = 0/1
@ -1066,10 +1066,10 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
//------------CALL BY VALUE-------------//
u8 RSSI_A;
u8 RSSI_B;
u8Byte RSSI_TRSW;
u8Byte RSSI_TRSW_H;
u8Byte RSSI_TRSW_L;
u8Byte RSSI_TRSW_iso;
u64 RSSI_TRSW;
u64 RSSI_TRSW_H;
u64 RSSI_TRSW_L;
u64 RSSI_TRSW_iso;
u8 RxRate;
BOOLEAN StopDIG;
@ -1080,8 +1080,8 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
BOOLEAN IsTxagcOffsetPositiveA;
u32 TxagcOffsetValueB;
BOOLEAN IsTxagcOffsetPositiveB;
u8Byte lastTxOkCnt;
u8Byte lastRxOkCnt;
u64 lastTxOkCnt;
u64 lastRxOkCnt;
u32 BbSwingOffsetA;
BOOLEAN IsBbSwingOffsetPositiveA;
u32 BbSwingOffsetB;
@ -1520,7 +1520,7 @@ void
ODM_CmnInfoUpdate(
PDM_ODM_T pDM_Odm,
u32 CmnInfo,
u8Byte Value
u64 Value
);
void

8
hal/odm_RTL8188E.c
View file

@ -598,12 +598,12 @@ odm_DynamicPrimaryCCA(
BOOLEAN Client_40MHz = FALSE, Client_tmp = FALSE; // connected client BW
BOOLEAN bConnected = FALSE; // connected or not
static u8 Client_40MHz_pre = 0;
static u8Byte lastTxOkCnt = 0;
static u8Byte lastRxOkCnt = 0;
static u64 lastTxOkCnt = 0;
static u64 lastRxOkCnt = 0;
static u32 Counter = 0;
static u8 Delay = 1;
u8Byte curTxOkCnt;
u8Byte curRxOkCnt;
u64 curTxOkCnt;
u64 curRxOkCnt;
u8 SecCHOffset;
u8 i;

3
hal/odm_types.h
View file

@ -55,8 +55,7 @@ typedef enum _RT_SPINLOCK_TYPE{
#define u8 u8
#define u8Byte u64
#define pu8Byte u64*
#define u64 u64
#define s1Byte s8
#define ps1Byte s8*

6
hal/rtl8188e_phycfg.c
View file

@ -2311,7 +2311,7 @@ _PHY_SetBWMode92C(
// Added it for 20/40 mhz switch time evaluation by guangan 070531
//u32 NowL, NowH;
//u8Byte BeginTime, EndTime;
//u64 BeginTime, EndTime;
/*RT_TRACE(COMP_SCAN, DBG_LOUD, ("==>PHY_SetBWModeCallback8192C() Switch to %s bandwidth\n", \
pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"))*/
@ -2332,7 +2332,7 @@ _PHY_SetBWMode92C(
// Added it for 20/40 mhz switch time evaluation by guangan 070531
//NowL = PlatformEFIORead4Byte(Adapter, TSFR);
//NowH = PlatformEFIORead4Byte(Adapter, TSFR+4);
//BeginTime = ((u8Byte)NowH << 32) + NowL;
//BeginTime = ((u64)NowH << 32) + NowL;
//3//
//3//<1>Set MAC register
@ -2407,7 +2407,7 @@ _PHY_SetBWMode92C(
// Added it for 20/40 mhz switch time evaluation by guangan 070531
//NowL = PlatformEFIORead4Byte(Adapter, TSFR);
//NowH = PlatformEFIORead4Byte(Adapter, TSFR+4);
//EndTime = ((u8Byte)NowH << 32) + NowL;
//EndTime = ((u64)NowH << 32) + NowL;
//RT_TRACE(COMP_SCAN, DBG_LOUD, ("SetBWModeCallback8190Pci: time of SetBWMode = %I64d us!\n", (EndTime - BeginTime)));
//3<3>Set RF related register

3
include/rtw_mp.h
View file

@ -165,8 +165,7 @@ struct mp_tx
#define s4Byte s32
#define u8 u8
#define u8Byte u64
#define pu8Byte u64*
#define u64 u64
#define s1Byte s8
#define ps1Byte s8*