mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2024-11-22 12:33:40 +00:00
rtl8188eu: Replace u8Byte with u64
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
parent
b77dd7b8df
commit
c8a4d4ba06
7 changed files with 34 additions and 36 deletions
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@ -400,7 +400,7 @@ SetHalDefVar(struct adapter *adapter, HAL_DEF_VARIABLE variable, void *value)
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pDM_Odm->DebugComponents &= ~(ODM_COMP_DIG |ODM_COMP_FA_CNT);
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break;
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case HW_DEF_ODM_DBG_FLAG:
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ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_DBG_COMP, *((u8Byte*)value));
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ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_DBG_COMP, *((u64*)value));
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break;
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case HW_DEF_ODM_DBG_LEVEL:
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ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_DBG_LEVEL, *((u32*)value));
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@ -423,7 +423,7 @@ GetHalDefVar(struct adapter *adapter, HAL_DEF_VARIABLE variable, void *value)
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switch(variable) {
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case HW_DEF_ODM_DBG_FLAG:
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*((u8Byte*)value) = pDM_Odm->DebugComponents;
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*((u64*)value) = pDM_Odm->DebugComponents;
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break;
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case HW_DEF_ODM_DBG_LEVEL:
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*((u32*)value) = pDM_Odm->DebugLevel;
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@ -767,11 +767,11 @@ ODM_CmnInfoHook(
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break;
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case ODM_CMNINFO_TX_UNI:
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pDM_Odm->pNumTxBytesUnicast = (u8Byte *)pValue;
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pDM_Odm->pNumTxBytesUnicast = (u64 *)pValue;
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break;
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case ODM_CMNINFO_RX_UNI:
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pDM_Odm->pNumRxBytesUnicast = (u8Byte *)pValue;
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pDM_Odm->pNumRxBytesUnicast = (u64 *)pValue;
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break;
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case ODM_CMNINFO_WM_MODE:
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@ -904,7 +904,7 @@ void
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ODM_CmnInfoUpdate(
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IN PDM_ODM_T pDM_Odm,
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IN u32 CmnInfo,
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IN u8Byte Value
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IN u64 Value
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)
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{
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//
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40
hal/odm.h
40
hal/odm.h
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@ -269,12 +269,12 @@ typedef struct _SW_Antenna_Switch_
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s4Byte RSSI_cnt_A;
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s4Byte RSSI_cnt_B;
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u8Byte lastTxOkCnt;
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u8Byte lastRxOkCnt;
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u8Byte TXByteCnt_A;
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u8Byte TXByteCnt_B;
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u8Byte RXByteCnt_A;
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u8Byte RXByteCnt_B;
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u64 lastTxOkCnt;
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u64 lastRxOkCnt;
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u64 TXByteCnt_A;
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u64 TXByteCnt_B;
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u64 RXByteCnt_A;
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u64 RXByteCnt_B;
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u8 TrafficLoad;
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RT_TIMER SwAntennaSwitchTimer;
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#ifdef CONFIG_HW_ANTENNA_DIVERSITY
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@ -353,9 +353,9 @@ typedef struct _ODM_Phy_Dbg_Info_
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{
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//ODM Write,debug info
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s1Byte RxSNRdB[MAX_PATH_NUM_92CS];
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u8Byte NumQryPhyStatus;
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u8Byte NumQryPhyStatusCCK;
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u8Byte NumQryPhyStatusOFDM;
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u64 NumQryPhyStatus;
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u64 NumQryPhyStatusCCK;
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u64 NumQryPhyStatusOFDM;
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u8 NumQryBeaconPkt;
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//Others
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s4Byte RxEVM[MAX_PATH_NUM_92CS];
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@ -483,7 +483,7 @@ typedef enum _ODM_Common_Info_Definition
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ODM_CMNINFO_WIFI_DISPLAY,
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ODM_CMNINFO_LINK,
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ODM_CMNINFO_RSSI_MIN,
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ODM_CMNINFO_DBG_COMP, // u8Byte
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ODM_CMNINFO_DBG_COMP, // u64
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ODM_CMNINFO_DBG_LEVEL, // u32
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ODM_CMNINFO_RA_THRESHOLD_HIGH, // u8
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ODM_CMNINFO_RA_THRESHOLD_LOW, // u8
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@ -945,7 +945,7 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
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BOOLEAN odm_ready;
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rtl8192cd_priv fake_priv;
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u8Byte DebugComponents;
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u64 DebugComponents;
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u32 DebugLevel;
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//------ ODM HANDLE, DRIVER NEEDS NOT TO HOOK------//
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@ -1015,9 +1015,9 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
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// MAC PHY Mode SMSP/DMSP/DMDP = 0/1/2
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u8 *pMacPhyMode;
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//TX Unicast byte count
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u8Byte *pNumTxBytesUnicast;
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u64 *pNumTxBytesUnicast;
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//RX Unicast byte count
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u8Byte *pNumRxBytesUnicast;
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u64 *pNumRxBytesUnicast;
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// Wireless mode B/G/A/N = BIT0/BIT1/BIT2/BIT3
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u8 *pWirelessMode; //ODM_WIRELESS_MODE_E
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// Frequence band 2.4G/5G = 0/1
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@ -1066,10 +1066,10 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
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//------------CALL BY VALUE-------------//
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u8 RSSI_A;
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u8 RSSI_B;
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u8Byte RSSI_TRSW;
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u8Byte RSSI_TRSW_H;
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u8Byte RSSI_TRSW_L;
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u8Byte RSSI_TRSW_iso;
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u64 RSSI_TRSW;
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u64 RSSI_TRSW_H;
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u64 RSSI_TRSW_L;
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u64 RSSI_TRSW_iso;
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u8 RxRate;
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BOOLEAN StopDIG;
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@ -1080,8 +1080,8 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
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BOOLEAN IsTxagcOffsetPositiveA;
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u32 TxagcOffsetValueB;
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BOOLEAN IsTxagcOffsetPositiveB;
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u8Byte lastTxOkCnt;
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u8Byte lastRxOkCnt;
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u64 lastTxOkCnt;
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u64 lastRxOkCnt;
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u32 BbSwingOffsetA;
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BOOLEAN IsBbSwingOffsetPositiveA;
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u32 BbSwingOffsetB;
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@ -1520,7 +1520,7 @@ void
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ODM_CmnInfoUpdate(
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PDM_ODM_T pDM_Odm,
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u32 CmnInfo,
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u8Byte Value
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u64 Value
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);
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void
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@ -598,12 +598,12 @@ odm_DynamicPrimaryCCA(
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BOOLEAN Client_40MHz = FALSE, Client_tmp = FALSE; // connected client BW
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BOOLEAN bConnected = FALSE; // connected or not
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static u8 Client_40MHz_pre = 0;
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static u8Byte lastTxOkCnt = 0;
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static u8Byte lastRxOkCnt = 0;
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static u64 lastTxOkCnt = 0;
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static u64 lastRxOkCnt = 0;
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static u32 Counter = 0;
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static u8 Delay = 1;
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u8Byte curTxOkCnt;
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u8Byte curRxOkCnt;
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u64 curTxOkCnt;
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u64 curRxOkCnt;
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u8 SecCHOffset;
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u8 i;
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@ -55,8 +55,7 @@ typedef enum _RT_SPINLOCK_TYPE{
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#define u8 u8
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#define u8Byte u64
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#define pu8Byte u64*
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#define u64 u64
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#define s1Byte s8
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#define ps1Byte s8*
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@ -2311,7 +2311,7 @@ _PHY_SetBWMode92C(
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// Added it for 20/40 mhz switch time evaluation by guangan 070531
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//u32 NowL, NowH;
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//u8Byte BeginTime, EndTime;
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//u64 BeginTime, EndTime;
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/*RT_TRACE(COMP_SCAN, DBG_LOUD, ("==>PHY_SetBWModeCallback8192C() Switch to %s bandwidth\n", \
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pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"))*/
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@ -2332,7 +2332,7 @@ _PHY_SetBWMode92C(
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// Added it for 20/40 mhz switch time evaluation by guangan 070531
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//NowL = PlatformEFIORead4Byte(Adapter, TSFR);
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//NowH = PlatformEFIORead4Byte(Adapter, TSFR+4);
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//BeginTime = ((u8Byte)NowH << 32) + NowL;
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//BeginTime = ((u64)NowH << 32) + NowL;
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//3//
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//3//<1>Set MAC register
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@ -2407,7 +2407,7 @@ _PHY_SetBWMode92C(
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// Added it for 20/40 mhz switch time evaluation by guangan 070531
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//NowL = PlatformEFIORead4Byte(Adapter, TSFR);
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//NowH = PlatformEFIORead4Byte(Adapter, TSFR+4);
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//EndTime = ((u8Byte)NowH << 32) + NowL;
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//EndTime = ((u64)NowH << 32) + NowL;
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//RT_TRACE(COMP_SCAN, DBG_LOUD, ("SetBWModeCallback8190Pci: time of SetBWMode = %I64d us!\n", (EndTime - BeginTime)));
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//3<3>Set RF related register
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@ -165,8 +165,7 @@ struct mp_tx
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#define s4Byte s32
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#define u8 u8
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#define u8Byte u64
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#define pu8Byte u64*
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#define u64 u64
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#define s1Byte s8
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#define ps1Byte s8*
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