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rtl8188eu: Fix checkpatch errors in hal/HalPhyRf.c

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Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2013-08-06 15:37:28 -05:00
parent f1cf522a99
commit cacca3d6b2
1 changed files with 26 additions and 32 deletions
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54
hal/HalPhyRf.c
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@ -24,56 +24,50 @@
/* 3 IQ Calibration */ /* 3 IQ Calibration */
/* 3============================================================ */ /* 3============================================================ */
void void ODM_ResetIQKResult(struct odm_dm_struct *pDM_Odm)
ODM_ResetIQKResult(
struct odm_dm_struct *pDM_Odm
)
{ {
u1Byte i; u1Byte i;
struct adapter * Adapter = pDM_Odm->Adapter; struct adapter *adapt = pDM_Odm->Adapter;
if (!IS_HARDWARE_TYPE_8192D(Adapter)) if (!IS_HARDWARE_TYPE_8192D(adapt))
return; return;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD,("PHY_ResetIQKResult:: settings regs %d default regs %d\n", (u32)(sizeof(pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting)/sizeof(struct ijk_matrix_regs_set)), IQK_Matrix_Settings_NUM)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
("PHY_ResetIQKResult:: settings regs %d default regs %d\n",
(u32)(sizeof(pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting) /
sizeof(struct ijk_matrix_regs_set)), IQK_Matrix_Settings_NUM));
/* 0xe94, 0xe9c, 0xea4, 0xeac, 0xeb4, 0xebc, 0xec4, 0xecc */ /* 0xe94, 0xe9c, 0xea4, 0xeac, 0xeb4, 0xebc, 0xec4, 0xecc */
for (i = 0; i < IQK_Matrix_Settings_NUM; i++) for (i = 0; i < IQK_Matrix_Settings_NUM; i++) {
{ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][0] = 0x100;
{ pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][2] = 0x100;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][0] = pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][4] = 0x100;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][2] =
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][4] =
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][6] = 0x100; pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][6] = 0x100;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][1] = pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][1] = 0;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][3] = pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][3] = 0;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][5] = pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][5] = 0;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][7] = 0x0; pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].Value[0][7] = 0;
pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].bIQKDone = false; pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[i].bIQKDone = false;
} }
} }
}
u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl) u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl)
{ {
u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {
{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165}; 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64,
100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122,
124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153,
155, 157, 159, 161, 163, 165
};
u1Byte place = chnl; u1Byte place = chnl;
if (chnl > 14) {
if (chnl > 14) for (place = 14; place < sizeof(channel_all); place++) {
{
for (place = 14; place<sizeof(channel_all); place++)
{
if (channel_all[place] == chnl) if (channel_all[place] == chnl)
{
return place-13; return place-13;
} }
} }
}
return 0; return 0;
} }